Source: http://www.google.com/patents/US6388879?dq=5,072,412
Timestamp: 2017-04-26 19:56:55
Document Index: 385516899

Matched Legal Cases: ['arts 32', 'arts 32', 'arts 32', 'arts 32', 'arts 31', 'arts 32', 'arts 31']

Patent US6388879 - Circuit board packaging structure - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA circuit board packaging structure comprises a plurality of circuit boards disposed in parallel to each other and each packaged with electric circuit parts. The circuit board packaged with electric circuit parts exhibiting a larger exothermic quantity than those of the electric circuit parts packaged...http://www.google.com/patents/US6388879?utm_source=gb-gplus-sharePatent US6388879 - Circuit board packaging structureAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS6388879 B1Publication typeGrantApplication numberUS 08/387,046Publication dateMay 14, 2002Filing dateFeb 9, 1995Priority dateMar 17, 1994Fee statusLapsedAlso published asCA2143996A1, CA2143996C, EP0672926A1Publication number08387046, 387046, US 6388879 B1, US 6388879B1, US-B1-6388879, US6388879 B1, US6388879B1InventorsHiroyuki Otaguro, Takayuki Ashida, Hitoshi Yokemura, Hidenao Nakajima, Yoshimi Watanabe, Shuuhei FujitaOriginal AssigneeFujitsu LimitedExport CitationBiBTeX, EndNote, RefManPatent Citations (10), Non-Patent Citations (13), Referenced by (40), Classifications (15), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetCircuit board packaging structure
US 6388879 B1Abstract
What is claimed is: 1. A circuit board packaging structure comprising:
a plurality of circuit boards each packaged with electric circuit parts and disposed in parallel to each other, wherein a circuit board packaged with electric circuit parts exhibiting a larger exothermic quantity than those of the electric circuit parts packaged on other circuit boards of said plurality of circuit board is disposed outermost among said plurality of circuit boards and, at the same time, disposed so that the surface of the circuit board packed with the electric circuit parts exhibiting the larger exothermic quantity is directed outside; a first cooling fan for flowing cooling air from outside of the structure along said plurality of circuit boards to cool off the electric circuit parts packaged on said plurality of circuit boards; and a second cooling fan for pulling said cooling air in a direction from said first cooling fan along said circuit board toward the outside of the structure. 2. A circuit board packaging structure according to claim 1, wherein the electric circuit parts include a transmission line corresponding unit of a switching equipment for accommodating a plurality of transmission lines and, at the same time, processing the data from each transmission line on a packet-basis.
said circuit boards packaged with said common units are disposed at both ends of said plurality of circuit boards. 7. A circuit board packaging structure according to claim 6, wherein said plurality of circuit boards are connected to a same connecting board, and
an outer surface of said connecting board is provided with wires for connecting said common unit to each of said individual units. 8. A packaging structure of a circuit board according to claim 7, wherein said circuit boards packaged with said common units are connected to said connecting board in a rotationally symmetrical arrangement about an axis orthogonal to said connecting board, and
said wires provided on the outer surface of said connecting board having the same rotational symmetry as that of said respective common units. 9. A circuit board packaging comprising:
a plurality of circuit boards each packaged with electric circuit parts and disposed in parallel to each other, wherein a circuit board packaged with electric circuit parts exhibiting a larger exothermic quantity than those of the electric circuit parts packaged on other circuit boards of said plurality of circuit board is disposed outermost among said plurality of circuit boards and, at the same time, disposed so that the surface of the circuit board packed with the electric circuit parts exhibiting the larger exothermic quantity is directed outside; a first cooling fan for flowing cooling air along said plurality of circuit boards to cool off the electric circuit parts packaged on said plurality of circuit boards; a plate for collecting cooling air from said first cooling fan, bended to gather air, disposed outside of said circuit board packed with the electric circuit parts exhibiting the larger exothermic quantity; and a second cooling fan for blowing said cooling air from said first cooling fan against said circuit board disposed outermost among said plurality of circuit boards from a direction perpendicular to said circuit board to cool off said electric circuit parts exhibiting the larger exothermic quantity, mounted on said plate.
The junction transmission line corresponding unit 30 effects mapping of the cells transmitted from the ATM cell switch 4 in the synchronous digital hierarchy (SDH) frame and transmits them to the junction transmission lines connected to other ATM switching equipment. Note that if a full-ATM is utilized, the junction transmission line corresponding unit 30 transmits the cells sent from the ATM cell switch 4 to the junction transmission lines in the ATM cell format. Further, the junction transmission line corresponding unit 30, when receiving the SDH frame or the cell from the junction transmission line, performs a necessary cell conversion and transmits it to the ATM cell switch 4. An internal configuration of this junction transmission line corresponding unit 30 is substantially the same as that of the subscriber's transmission line corresponding unit 3. Hence, the junction transmission line corresponding unit 30 is constructed of a 0-system (active system) junction transmission line corresponding subunit 30 a and a 1-system (standby system) junction transmission line corresponding subunit 30 b. Each of these subunits is connected to both of the 0-system ATM cell switch element 4 a and the 1-system ATM cell switch element 4 b. Thus, the whole ATM switching equipment is duplicated, and, therefore, if a fault occurs, each element is switched over from the 0-system to the 1-system, thereby making it possible to avoid communications troubles. In particular, the common unit 32 processes the cells transmitted from the respective individual units 31, and hence the switchover to the 1-system common subunit 32 b in the case of the occurrence of a fault in the 0-system common subunit 32 a exhibits a large effect.
As shown in FIG. 38, the basic processing unit 5B comprises the multiplex/demultiplex portion 81 connected to each of the individual units 31B-1 through 31B-N and a VP-SW internal identifier conversion portion 183 connected to the multiplex/demultiplex portion 81. The basic processing unit 5B further comprises a selector 6 a connected to the VP-SW internal identifier conversion portion 183, a selector 6 b connected to the selector 6 a, a selector 6 c connected to the selector 6 b, the OAM portion 16 connected to the selector 6 c and the MC portion 17 connected to the OAM portion 16. The basic processing unit 5B also comprises a header conversion portion 18 c connected to the MC portion 17, the microprocessor 19 connected to the multiplex/demultiplex portion 81, the VP-SW internal identifier conversion portion 183, the OAM portion 16, the MC portion 17 and the header conversion portion 18 c. The basic processing unit 5B still further comprises an internal identifier converting table 184 connected to the header conversion portion 18 c. On the other hand, the add processing unit 7A comprises a VC-SW internal identifier conversion portion 185, the UPC portion 14 and the accounting portion 15. The VC-SW internal identifier conversion portion 185 is connected in parallel to the VP-SW internal identifier conversion portion 183 between the multiplex/demultiplex portion 81 and the selector 6 a. The UPC portion 14 is so connected between the selectors 6 a and 6 b as to be parallel to a direct-connection wire of these selectors. The accounting portion 15 is so connected between the selectors 6 b and 6 c as to be parallel to a direct-connection wire of these selectors.
The microprocessor 19 controls the VP-SW internal identifier conversion portion 183, the VC-SW internal identifier conversion portion 185, the UPC portion 14, the accounting portion 15, the OAM portion 16, the MC portion 17 and the VPI conversion portion 18 c. The discussion given above has dealt with the cell transfer from the subscriber's terminal 1 via the transmission line corresponding unit 3B to the switch 4. Conversely to this, the cell can be transferred from the switch 4 via the transmission line corresponding unit 3B to the subscriber's terminal 1.
The first optical connector 61 is an optical connector for leading the subscriber-side optical cable 53 from the subscriber's terminal 1 connected to the board (BWB) 101 to the coupler package board 151. Accordingly, this first optical connector 61 has a structure for connecting the 8-system subscriber's transmission line cables 53 which is the same number as the number of the 0-system (active system) individual package boards 102 a. Each subscriber-side optical cable 53 extending from the package board side portion 61 a of this optical connector 61 is connected to the beam splitter 60 a. This beam splitter 60 a works to branch off the subscriber-side optical cable 53 into an 0-system (active system) subscriber-side optical cable 53 a and a 1-system (standby system) subscriber-side optical cable 53 b. The second optical connector 62 is an optical connector for connecting bundles of the 0-system (active system) optical cables 53 to the board (BWB) 101. Each 0-system (active system) subscriber-side optical cable 53 a extending from a side portion 62 b of this second optical connector 62 on the side of the board (BWB) 101 is connected to the corresponding subscriber-side optical module 101 (connected to the 0-system individual unit package board 102 a).
On the other hand, the 1-system (standby system) subscriber-side optical cable 53 b is connected to the input terminal of the switching device 60 b. The third optical connector 63 is an optical connector for connecting a single line of optical cable 53 b connected to the output terminal of the switching device 60 b to the board (BWB) 101. The 1-system (standby system) subscriber-side optical cable 53 b extending from a side portion 63 b of this third optical connector 63 on the side of the board (BWB) 101 is connected to the optical module 104 (connected to the 1-system individual unit package board 102 b).
The common unit package boards 730 a, b are all identically constructed regardless of the difference between the 0-system and the 1-system. That is, first electric connectors (not shown) for connecting to common unit/individual unit connector 713 leading to the individual unit 31 are mounted on the (B)-sides, shown in FIG. 16, of the common unit package boards 730 a, 730 b. Further, second electric connectors (unillustrated) for connections to switch-side optical modules 720 leading to the switch 4 are mounted on the A-sides, shown in FIG. 16, of the common unit package boards 730 a, b. Accordingly, two sheets of the thus constructed common unit package boards 730 a, b are disposed outwardly of the individual unit package boards 702 in such manner that the circuit parts 32P mounted thereon are directed outward and thus connected to the board (BWB) 701. To accomplish this, the two common unit package boards 730 a, b are disposed in a positional relationship wherein the boards are turned 180° with respect to each other.
Further, the rectifying plate 765 and the collision jet fan 764 are provided for each of the common unit package boards 730 a, 730 b. As discussed above, according to the seventh embodiment, the construction is such that two sheets of the common unit package boards 730 a, 730 b are disposed outwardly of each individual unit package board 702 where the circuit parts mounting surface thereof is directed towards the outside. The construction is also such that, where the box body 761 houses the package shelf 760 assembled in the illustrated positional relationship, the collision jet of air collides with the circuit parts 32P of the common unit 32 packaged on this common unit package board 730 from a direction perpendicular to the common unit package board 730. Consequently, the circuit parts 32P constituting the common unit 32 exhibiting a relatively large exothermic quantity can be cooled off with a high efficiency.
As illustrated in FIG. 19, the box body 861 in this eighth embodiment houses one package shelf 860 as in the seventh embodiment. The interior of this box body 861 is largely partitioned by a partitioning wall 865 in the vertical direction in FIG. 19. One of the partitioned spaces is a first space 861 a for housing the individual unit package boards 802. The other space is cut in half by a partitioning wall 866 in the horizontal direction in FIG. 19. Above the wall 866 is a second space 861 b for housing the 0-system (active system) common unit package board 830 a. Below the wall 866 is a third space 861 c for housing the 1-system (standby system) common unit package board 830 b. When the box body 861 houses the package shelf 860, the board (BWB) 801 is fitted into an opening formed in the partitioning wall 865. The first, second and third spaces 861 a, 861 b, 861 c are thereby completely isolated from each other. A partitioning plate 852 is fitted in an opening formed in the partitioning wall 866. The second and third spaces 861 b, 861 c are completely isolated from each other.
The first space 861 a of this box body 861 assumes a shape of rectangular parallelopiped. PULL-fans 862 for forcibly sucking air from the interior of the first space 861 a toward the outside are disposed on the upper edge surface of this first space 861 a. Further, PUSH-fans (not shown) for forcibly causing an inflow of the air from the outside of the first space 861 a toward the interior thereof are disposed on the lower edge surface of the first space 861 a. Accordingly, within the first space 861 a, as indicated by arrows A in FIGS. 18 and 19, the cooling air flows from the lower side to the upper side. Thus, the circuits packaged on the individual unit package board 802 are cooled off. In particular, with the adoption of the above-stated bookshelf structure, the individual unit package boards 802 are disposed along the cooling air direction. In this way, the flow of cooling air is prevented from being shut off and the cooling efficiency is kept high.
In this state, a triangular space defined by the opening 965, the movable duct 964 and the duct 967 is closed by the bellows 978. Accordingly, as illustrated in FIG. 26, there is formed a cooling air path through which the interior of the lower air duct 961 b communicates with the interior of the duct 967. Hence, when the PUSH-fans 963 are energized, the cooling air flows through the package unit 961 c, and, simultaneously, some cooling air flows through the duct 967 via the opening 965. In this way, the circuit parts 32P of the common unit 32 packaged on the auxiliary board 900 covered with the duct 967 are cooled together with the circuit parts 31P packaged on each package board (e.g., the individual unit package board 902) housed in the package unit 961 c. In contrast with this, when maintaining and inspecting the circuit parts 32P of the common unit 32, the movable duct 964 is closed, and the set screw 979 is threaded into the fastening plate 980. As illustrated in FIG. 21, the opening 965 is closed, and cooling air cannot pass though the opening 965. Hence, all the cooling air blown by the PUSH-fans 963 run through within the package unit 961 c, and consequently the cooling of the circuit parts 31P packaged on each package board (e.g., the individual unit package 902) housed in the package unit 961 c is unaffected and continues as if the door 968 were closed.
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H05K7/1458European ClassificationG02B6/43, H05K7/14G6Legal EventsDateCodeEventDescriptionApr 13, 1995ASAssignmentOwner name: FUJITSU LIMITED, JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:OTAGURO, HIROYUKI;ASHIDA, TAKAYUKI;YOKEMURA, HITOSHI;ANDOTHERS;REEL/FRAME:007450/0453Effective date: 19950323Nov 30, 2005REMIMaintenance fee reminder mailedMay 15, 2006LAPSLapse for failure to pay maintenance feesJul 11, 2006FPExpired due to failure to pay maintenance feeEffective date: 20060514RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services