Source: http://www.google.se/patents/US8172980?hl=sv
Timestamp: 2013-05-24 00:13:43
Document Index: 177787371

Matched Legal Cases: ['Application No. 200803957', 'Application No. 200803929', 'Application No. 200803956', 'Application No. 200803957', 'Application No. 200803929', 'Application No. 200803956', 'Application No. 200803957']

Patent US8172980 - Device with self aligned gaps for capacitance reduction - Google PatentS�k Bilder Kartor Play YouTube Nyheter Gmail Drive Mer » Avancerad patents�kning | Webbhistorik | Logga in Avancerad patents�kning PatentA method for reducing capacitances between semiconductor device wirings is provided. A sacrificial layer is formed over a dielectric layer. A plurality of features are etched into the sacrificial layer and dielectric layer. The features are filled with a filler material. The sacrificial layer is removed,...http://www.google.se/patents/US8172980?utm_source=gb-gplus-sharePatent US8172980 - Device with self aligned gaps for capacitance reduction PublikationsnummerUS8172980 B2Typ av kung�relseBeviljande Ans�kningsnummer12/202,043 Publiceringsdatum8 maj 2012 Registreringsdatum29 aug 2008 Prioritetsdatum30 nov 2005�ven publicerat somCN101317260ACN101317260BUS7432189US20070123017US20080314521WO2007064488A1 UppfinnareZhi-Song HuangS. M. Reza Sadjadi Ursprunglig innehavareLam Research Corporation USA-klassificering156/345.26118/723.00E156/345.43 Internationell klassificeringC23C16/00C23F1/00H01L21/306 Kooperativ klassningH01L21/0338H01J37/32642H01L21/7682H01L21/0337H01L21/31144H01J37/32633H01J37/32623 Europeisk klassificeringH01L21/768B6H01L21/033F6H01L21/311DH01L21/033F4H01J37/32O8H01J37/32O8DH01J37/32O8BH�nvisningarCitat fr�n patent (26)Citat fr�n andra k�llor (21)Externa l�nkarUSPTO �verl�telse av �gander�tt till patent som har registrerats av USPTO EspacenetDevice with self aligned gaps for capacitance reductionUS 8172980 B2 Sammanfattning A method for reducing capacitances between semiconductor device wirings is provided. A sacrificial layer is formed over a dielectric layer. A plurality of features are etched into the sacrificial layer and dielectric layer. The features are filled with a filler material. The sacrificial layer is removed, so that parts of the filler material remain exposed above a surface of the dielectric layer, where spaces are between the exposed parts of the filler material, where the spaces are in an area formerly occupied by the sacrificial layer. Widths of the spaces between the parts of the filler material are shrunk with a shrink sidewall deposition. Gaps are etched into the dielectric layer through the shrink sidewall deposition. The filler material and shrink sidewall deposition are removed.
12. The apparatus, as recited in claim 1, wherein the non-transitory computer readable media further comprises computer readable code for removing the filler material after closing the gap. Beskrivning
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