Source: http://www.google.com/patents/US20030203743?dq=6,460,050
Timestamp: 2018-01-17 20:36:24
Document Index: 552029903

Matched Legal Cases: ['Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 60']

Patent US20030203743 - Multiple-Input Multiple-Output Radio Transceiver - Google Patents
Abstract of Disclosure A MIMO radio transceiver to support processing of multiple signals for simultaneous transmission via corresponding ones of a plurality of antennas and to support receive processing of multiple signals detected by corresponding ones of the plurality of antennas. The radio transceiver...http://www.google.com/patents/US20030203743?utm_source=gb-gplus-sharePatent US20030203743 - Multiple-Input Multiple-Output Radio Transceiver
Publication number US20030203743 A1
Application number US 10/065,388
Also published as EP2557696A1, EP2557696B1, EP2757704A1, EP3240199A1, US6728517
Publication number 065388, 10065388, US 2003/0203743 A1, US 2003/203743 A1, US 20030203743 A1, US 20030203743A1, US 2003203743 A1, US 2003203743A1, US-A1-20030203743, US-A1-2003203743, US2003/0203743A1, US2003/203743A1, US20030203743 A1, US20030203743A1, US2003203743 A1, US2003203743A1
Inventors Gary Sugar, Robert Masucci, David Rahn
Patent Citations (15), Referenced by (216), Classifications (26), Legal Events (6)
US 20030203743 A1
Application No. 60/374,531, filed April 22, 2002;
Application No. 60/376,722, filed April 29, 2002;
Application No. 60/319,336, filed June 21, 2002;
Application No. 60/319,360, filed June 27, 2002; and
Application No. 60/319,434, filed July 30, 2002.
[0015]FIG. 1 is a general block diagram of a radio transceiver having multiple processing paths for multiple-input multiple-output (MIMO).
[0017]FIG. 3 is a schematic diagram of a MIMO radio transceiver having a variable intermediate frequency architecture.
[0018]FIG. 4 is a schematic diagram of a MIMO radio transceiver having a direct-conversion architecture.
[0023]FIGs. 11 and 12 are diagrams showing how digital-to-analog converters and analog-to-digital converters may be shared in connection with a MIMO radio transceiver.
[0024]FIGs. 13 and 14 are diagrams showing how filters in the radio transceiver can be shared so as to reduce the area of an integrated circuit.
[0025]FIG. 1 shows a block diagram of a radio transceiver 10. The radio transceiver 10 is suitable for processing radio frequency signals detected by at least two antennas. The foregoing description is directed to an embodiment with two antennas 12 and 14, and an associated transmit and receive path for each, but this same architecture can be generalized to support in general N processing paths for N-antennas. This radio transceiver architecture is useful to support the aforementioned CBF techniques. CBF systems and methods are described in U.S. Patent Application No. 10/164,728, filed June 19, 2002 entitled "System and Method for Antenna Diversity Scheme Using Joint Maximal Ratio Combining"; U.S. Patent Application No. 10/174,689, filed June 19, 2002, entitled "System and Method for Antenna Diversity Using Equal Gain Joint Maximal Ratio Combining"; and U.S. Patent Application No. 10/064,482, filed July 18, 2002 entitled "System and Method for Joint Maximal Ratio Combining Using Time-Domain Signal Processing." These co-pending and commonly assigned patent applications all relate to optimizing the received SNR at one communication based on the transmit vector used at the other communication device.
[0035]FIGs. 2-4 show more specific examples of the MIMO radio transceiver shown in FIG. 1. FIG. 2 shows a dual-band radio transceiver employing a super-heterodyne (two-stage) conversion architecture. FIG. 3 shows a dual-band radio transceiver employing a walking intermediate frequency (IF) conversion architecture using only one frequency synthesizer. FIG. 4 shows a dual-band radio transceiver employing a direct conversion (single-stage) architecture. FIG. 5 illustrates a radio-front end section that can be used with any of the radio transceivers shown in FIGs. 2-4.
Since radio transceiver 100 is a super-heterodyne device, RF local oscillator signals for the radio frequencies associated with RFB1 and RFB2 and IF local oscillator signals need to be generated. To this end, there is an IF synthesizer (IF LO synth) 250 and a voltage controlled oscillator (VCO) 252 (including a 90ºphase component, not shown for simplicity) to generate in-phase and quadrature phase IF local oscillator signals that are coupled to the mixers 148, 156, 178 and 186, and to mixers 212, 214, 232 and 234. There is an RF local oscillator synthesizer (RF LO synth) 260 coupled to VCOs 262, 264 and 266 that supply different RF local oscillator signals to mixers 144, 154, 174 and 184 on the receive side and to mixers 218 and 238 on the transmit side. There are multiple VCOs to supply RF signals for the multiple RF bands. For example, VCO 262 supplies an RF local oscillator signal (for any RF channel in or the center frequency) for the 2.4 GHz unlicensed band, VCO 264 supplies an RF local oscillator signal (for any RF channel in or the center frequency) for the low 5 GHz unlicensed band, and VCO 266 supplies an RF local oscillator signal (for any RF channel in or the center frequency) for the high 5 GHz unlicensed band.
An interface and control block 290 interfaces a clock signal, data signals and an enable signal to/from an external device, such as a baseband processor and/or a control processor. Transceiver control signals sourced from an external device may be coupled to the appropriate transceiver components through the interface control block 290 or coupled to pins that are tied to the appropriate components. The transceiver control signals include, for example, an RF center frequency control signal, a filter bandwidth control signal, a transmit gain adjustment signal, a receive gain adjustment signal and switch control signals. The RF center frequency control signal controls which RF band, and the particular RF channel in that band, for which the RF LO synthesizer 260 and associated VCOs 262, 264 or 267 outputs a local oscillator signal. An example of a frequency synthesizer suitable for use with the radio transceivers described herein is disclosed in commonly assigned U.S. Provisional Application No. 60/319,518, filed September 4, 2002, and entitled "Frequency Synthesizer for Multi-Band Super-Heterodyne Transceiver Applications." The filter bandwidth control signal controls the cut-off frequencies of the variable lowpass filters 150, 158, 180 and 188 in the receiver or the cut-off frequencies of the variable lowpass filters 276, 278, 286 and 288 in the transmitter . The transmit gain control signals control the gain of the variable amplifiers 216 and 236 on the transmit side and the receive gain control signals control the gain of the variable amplifiers 146 and 176 on the receive side. The switch control signals control the position of the switches 106, 108, 110, 112, 114, 116, 200 and 202 according to the operating mode of the radio transceiver 100 and the frequency band of operation.
With reference to FIGs. 2 and 5, operation of the transceiver 100 will be described. For example, RFB1 is the 2.4 GHz unlicensed band and RFB2 is one of the 5 GHz unlicensed bands. It should be understood that the same architecture shown in FIG. 2 can be used for other applications, and that the 2.4/5 GHz dual band application is only an example. For purposes of this example, the IF is 902.5 MHz, and the frequency output by the IF LO synth 250 is 1805 MHz; the RF LO synthesizer outputs an RF local oscillator signal that ranges from 3319.5 MHz to 4277.5 MHz. The variable lowpass filters 150, 158, 180 and 188 are controllable to filter a variety of bandwidths in the RF band, for example to facilitate MIMO receive processing of signals detected by the antennas 102 and 104 in 20 MHz of bandwidth up to 80 MHz or 100 MHz of bandwidth. Similarly, the variable lowpass filters 276, 278, 286 and 288 are controllable (by the filter bandwidth control signal) to filter a variety of bandwidths in the RF band, for example to facilitate MIMO transmit processing of baseband signals to be transmitted in 20 MHz of bandwidth up to 80 MHz or 100 MHz of bandwidth. Alternatively, and as described hereinafter in conjunction with FIGs. 13 and 14, the variable lowpass filters 150, 158, 180 and 188 may be shared for receive processing and transmit processing. Generally, the radio transceiver 100 is operated in a half-duplex mode during which it does not simultaneously transmit and receive in either RFB1 or RFB2.
[0053]FIG. 3 shows a radio transceiver 100' that is similar to radio transceiver 100 except that it employs a variable or walking IF architecture, rather than a super-heterodyne architecture. Particularly, in the receiver circuits of the radio transceiver 100', the received RF signal is down-mixed to an intermediate frequency that depends on the RF local oscillator signal, and an IF filter is not needed or is optional. A similar principle applies for the transmit circuits. Therefore, the RF local oscillator signal output of the RF LO synthesizer 260 is coupled to a divide-by-four circuit 265 which in turn supplies an IF local oscillator signal to mixers 148 and 156 in receiver circuit 140, mixers 178 and 186 in receiver circuit 170, mixers 212 and 214 in the transmit circuit 210 and mixers 232 and 234 in the transmit circuit 230. The divide-by-four circuit 265 generates the IF local oscillator signal based on the RF local oscillator signal supplied by the RF LO synthesizer 260. No IF filters are needed and only a single synthesizer (for the RF local oscillator signal) is required. Otherwise, the operation of the radio transceiver 100' is similar to that of radio transceiver 100.
On the transmit side, transmit circuit 370 comprises first and second sample-and-hold circuits 372 and 374 that receive I and Q baseband signals for a first transmit signal from switch 371. The outputs of the sample-and-hold circuits 372 and 374 are coupled to the variable lowpass filters 376 and 378. The outputs of the lowpass filters 376 and 378 are coupled to quad mixers 380 and 382, respectively. The quad mixers 380 and 382 up-mix the filtered I and Q signals output by the lowpass filters 376 and 378 to output RF I and Q signals which are combined and coupled to a variable amplifier 384. The variable amplifier 384 adjusts the gain of the first RF signal and supplies this signal to bandpass filters 386 and 388, associated with RFB1 and RFB2, respectively. The outputs of bandpass filters 386 and 388 are coupled to power amplifiers 394 and 396. Power amplifiers 390 and 392 amplify the RF signals for frequency bands RFB1 and RFB2 which are coupled to the RF front end 105.
A dual modulus phase-lock loop (PLL) 430, VCOs 432, 434 and 436, a squaring block 438 and a 90ºphase shifter 440 may be provided to supply the appropriate in-phase and quadrature RF local oscillator signals to the mixers 320 and 322, respectively, in receiver circuit 310; mixers 350 and 352 in receiver circuit 370; mixers 380 and 382, respectively, in transmit circuit 370; and mixers 410 and 412, respectively, in transmit circuit 400. The dual modulus PLL 430 is a standard component for generating high frequency signals. The squaring block 438 acts as a frequency doubler, reducing pull of the VCO by the power amplifiers. For example, in order to provide RF mixing signals for the 2.4 GHz unlicensed band and the high and low 5GHz unlicensed band, the VCO 432 produces an RF signal in the range 1200 through 1240 MHz, VCO 434 produces an RF signal in the range 2575 through 2675 MHz, and VCO 436 produces an RF signal in the range 2862 through 2912 MHz.
[0063]FIGs. 6-10 illustrate alternative front-end sections. In FIG. 6, the front-end 500 section comprises many of the same components as front-end section 105, albeit in a slightly different configuration. The LPFs 128, 130, 132 and 134 may be integrated on the radio transceiver IC or incorporated in the radio front-end 500. Instead of switches 106 and 108, diplexers 502 and 504 are used for band selection from the antennas 102 and 104. As known in the art, a diplexer is a 3-port device that has one common port and two other ports, one for high frequency signals and one for lower frequency signals. Thus, the diplexers 106 and 108 serve as band select switches. In the example of FIG. 6, the two bands that are supported are the 2.4 GHz band and the 5.25 GHz band. Switches 110, 112, 114 and 116 are transmit/receive switches that select the appropriate signals depending on whether the radio transceiver is transmitting or receiving. For example, when the radio transceiver is transmitting a signal in the 2.4 GHz band through antennas 102 and 104, the diplexer 502 receives the first 2.4 GHz transmit signal from switch 110 and couples it to the antenna 102, and the diplexer 504 receives the second 2.4 GHz transmit signal from switch 114 and couples it to antenna 104. All the other switch positions are essentially irrelevant. Likewise, when receiving a signal in the 5.25 GHz band, diplexer 502 couples the first 5.25 GHz receive signal from antenna 102 to switch 112 and diplexer 504 couples the second 5.25 GHz receive signal from antenna 104 to switch 116. Switch 112 selects the output of the diplexer 502 and switch 116 selects the output of the diplexer 504.
[0065]FIG. 7 illustrates a front-end section 500' that is similar to front-end section 500 except that the transmit/receive switches are effectively integrated on the radio transceiver IC. Many techniques are known to integrate switches similar to the transmit/receive switches on the radio transceiver IC. When the transmit/receive switches are integrated on the radio transceiver IC, for each antenna, a quarter-wave element 515 is provided in the radio front-end 500" at each band branch off of the diplexer for each antenna. FIG. 8 shows this configuration for one antenna 102 only as an example, but it is repeated for each antenna. When a signal is being transmitted, the transmit/receive switch is switched to the terminal that is connected to ground so that the signal output by the corresponding power amplifier (PA) of the transmitter is selected and coupled to the diplexer, and when a signal is received, it is switched to the other terminal so that the receive signal passes through the quarter-wave element 525, the transmit/receive switch and passes to the LNA in the receiver. The quarter-wave element 515 may be any quarter-wave transmission line. One example of an implementation of the quarter-wave element 515 is a microstrip structure disposed on a printed circuit board. The quarter-wavelength characteristic of the quarter-wave element 515 creates a phase shift that acts as an impedance transformer, either shorting the connection between the bandpass filter and ground, or creating an open circuit, depending on the position of the switch.
[0067]FIG. 9 illustrates a front-end section 600 that interfaces with two radio transceiver ICs to provide a 4 path MIMO radio transceiver device. One example of a use for this type of configuration is in an access point (AP) for a WLAN. Whereas the radio transceiver configurations described up to this point were for 2-path MIMO operation, 4-path MIMO operation provides even greater link margin with other devices when used in connection with the maximal ratio combining schemes referred to above.
[0069]FIG. 10 illustrates a front-end section 600' that is similar to front-end section 600 but excludes the transmit/receive switches. Moreover, the radio transceiver 670 is a single IC that integrates 4-paths (what is otherwise included on two radio transceiver ICs as shown in FIG. 9). The transmit/receive switches are integrated on the radio transceiver IC 670. The operation of the front-end section 600' is similar to that of front-end section 600. FIG. 10 illustrates the ability to scale the number of MIMO paths to 3, 4 or more separate paths.
[0070]FIGs. 9 and 10 also illustrate the radio transceivers 100, 100' and 300 deployed in multiple instances to support multiple channel capability in a communication device, such as an AP. For example, as shown in FIG. 9, one radio transceiver, such as an access point, could perform 2-path MIMO communication with devices on a channel while the other radio transceiver would perform 2-path MIMO communication with devices on another channel. Instead of interfacing to one baseband IC, each would interface to a separate baseband IC or a single baseband IC capable of dual channel simultaneous operation.
[0071]FIGs. 11 and 12 show a configuration whereby the number of DACs and ADCs that are coupled to the radio transceiver can be reduced. Normally, a separate DAC or ADC would be required for every signal that requires processing. However, in a half-duplex radio transceiver, since transmit and receive operations are not concurrent, there is opportunity for sharing DACs and ADCs. For example, FIG. 11 shows a configuration comprising two ADCs 710 and 720 and three DACs 730, 740 and 750. ADC 720 and DAC 730 are shared. Switch 760 selects input to the ADC 720 and switch 770 selects the output of the DAC 730. A digital multiplexer (MUX) 780 is coupled to the ADC 720 to route the output therefrom, and to the DAC 730 to coordinate input thereto. The ADCs, DACs and digital MUX 780 may reside on a separate integrated circuit from the radio transceiver integrated circuit. For example, these components may reside on the baseband integrated circuit where a baseband demodulator 790 and a baseband modulator 795 reside.
[0076]FIGs. 13 and 14 illustrate configurations that allow for sharing of the LPFs used to filter the baseband receive signals and baseband transmit signals in the radio transceivers of FIGs. 2-4. As an example, a single antenna path of the direct conversion radio transceiver 300 is selected to illustrate the filter sharing technique. Some intermediate components, such as variable amplifiers and sample-and-hold circuits, are not shown for simplicity. LPFs 328 and 330 are shared to both filter the received I and Q signals (RX I and RX Q) associated with an antenna, such as antenna 102, and filter the baseband transmit I and Q signals (TX I and TX Q) to be transmitted. The switches 710 and 720 each have two input terminals and an output terminal coupled to the input of the LPFs 328 and 330, respectively. Coupled to the input terminals of the switch 710 are the receive I signal output by the quad mixer 320 and the baseband transmit I signal. Similarly, coupled to the input terminals of the switch 720 are the receive Q signal output by the quad mixer 322 and the baseband transmit Q signal. A transmit/receive control signal is coupled to the switches 710 and 720 to cause the switches to select either their terminals to which the receive I and Q signals are connected or the terminals to which the transmit I and Q signals are connected. In FIG. 13, it is assumed that the output impedance at each filter is low and each load impedance is high (typical in most analog ICs) so that the output of each filter can be summed. Therefore, only a single multiplexer is needed at the input to the filters. The configuration of FIG. 14 is similar to FIG. 15, except that additional switches 730 and 740 are provided in case the impedances are not as described above.
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U.S. Classification 455/550.1, 455/314, 455/273, 455/118, 455/137, 455/73, 455/101, 455/278.1, 455/323, 455/260, 455/76, 455/103, 455/317
International Classification H03D7/14, H04B1/40
Cooperative Classification H03D7/165, H03D2200/0025, H04B1/406, H04B1/005, H04B1/006, H04B1/0057
European Classification H03D7/14C1, H04B1/00M, H04B1/00M2S, H04B1/00M2D, H04B1/40C4
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