Source: https://patents.google.com/patent/US6828683
Timestamp: 2018-09-26 01:47:49
Document Index: 491949082

Matched Legal Cases: ['application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No.09']

US6828683B2 - Semiconductor devices, and semiconductor processing methods - Google Patents
Semiconductor devices, and semiconductor processing methods Download PDF
US6828683B2
US6828683B2 US09219041 US21904198A US6828683B2 US 6828683 B2 US6828683 B2 US 6828683B2 US 09219041 US09219041 US 09219041 US 21904198 A US21904198 A US 21904198A US 6828683 B2 US6828683 B2 US 6828683B2
US09219041
US20020020919A1 (en )
It would be desirable to employ copper-containing materials in semiconductor devices. Copper has conductive properties that are superior to those of many of the conductive materials presently utilized in semiconductor devices. Unfortunately, copper has a drawback associated with it that it cannot generally be placed against oxide-comprising insulative materials (such as, for example, silicon dioxide). If copper-containing materials are placed adjacent oxide-comprising insulative materials, oxygen can diffuse into the copper-containing material and react to reduce conductivity of the material. Also, copper can diffuse into the oxide-containing material to reduce the insulative properties of the oxide-containing material. Additionally, copper can diffuse through oxide insulative material to device regions and cause degradation of device (e.g., transistor) performance. The problems associated with copper are occasionally addressed by providing nitride containing barrier layers adjacent the copper-containing materials, but such can result in problems associated with parasitic capacitance, as illustrated in FIG. 1. Specifically, FIG. 1 illustrates a fragment of a prior art integrated circuit, and illustrates regions where parasitic capacitance can occur.
Conductive materials 32, 36 and 44 can be conductive interconnects between electrical devices, or portions of electrical devices. The function of materials 32, 36 and 44 within a semiconductor circuit is not germane to this discussion. Instead, it is the orientation of conductive materials 32, 36 and 44 relative to one another that is of interest to the present discussion. Specifically, each of materials 32, 36 and 44 is separated from the other materials by intervening insulative (or dielectric) materials. Accordingly, parasitic capacitance can occur between the conductive materials 32, 36 and 44. A method of reducing the parasitic capacitance is to utilize insulative materials that have relatively low dielectric constants (“k”). For instance, as silicon dioxide has a lower dielectric constant that silicon nitride, it is generally preferable to utilize silicon dioxide between adjacent conductive components, rather than silicon nitride. However, as discussed previously, copper-containing materials are preferably not provided against silicon dioxide due to diffusion problems that can occur. Accordingly, when copper is utilized as a conductive material in a structure, it must generally be spaced from silicon dioxide-comprising insulative materials to prevent diffusion of oxygen into the copper structure, as well as to prevent diffusion of copper into the oxygen-comprising insulative material. Accordingly, the copper materials are generally surrounded by nitride-comprising materials (such as the shown is barrier layers 34 and 38) to prevent diffusion from the copper materials, or into the copper materials. Unfortunately, this creates the disadvantage of having relatively high dielectric constant nitride materials (for example, the material of layer 38) separating conductive materials. Accordingly, the requirement of nitride-comprising barrier layers can take away some of the fundamental advantage of utilizing copper-comprising materials in integrated circuit constructions.
An exemplary reaction is to combine methylsilane (CH3SiH3) with ammonia (NH3) in the presence of a plasma to form (CH3)xSi3N4−x. The exemplary reaction can occur, for example, under the following conditions. A substrate is placed within a reaction chamber of a reactor, and a surface of the substrate is maintained at a temperature of from about 0° C. to about 600° C. Ammonia and methylsilane are flowed into the reaction chamber, and a pressure within the chamber is maintained at from about 300 m Torr to about 30 Torr, with a plasma at radio frequency (RF) power of from about 50 watts to about 500 watts. A product comprising (CH3)xSi3N(4−x) is then formed and deposited on the substrate. The reactor can comprise, for example, a cold wall plasma reactor.
In exemplary embodiments of the present invention, barrier layer 100 comprises (CH3)xSi3N(4−x) (wherein “X” is from about 1 to about 4, and preferably wherein “X” is about 0.7). Such barrier layer 100 can be formed by the methods discussed above, and can, for example, consist essentially of Si3Ny and (CH3)xSi3N(4−x). Also, an amount of (CH3)xSi3N(4−x) within barrier layer 100 can be adjusted by the above-discussed methods of adjusting a ratio of SiH4 and CH3SiH3 during formation of the layer. An exemplary concentration of (CH3)xSi3N(4−x) within barrier layer 100 is from greater than 0% to about 20% (mole percent).
forming a conductive copper-containing material over a semiconductive substrate;
forming a second material proximate the conductive material; and
forming a barrier layer between the conductive material and the second material, the barrier layer comprising (CH3)xSi3N(4−x), with x being greater than 0 and no greater than 4.
2. The method of claim 1 wherein conductive material consist essentially of copper.
3. The method of claim 1 wherein the barrier layer is against the conductive material.
4. The method of claim 1 wherein the barrier layer is against both the conductive material and the second material.
5. The method of claim 1 wherein the second material is an insulative material.
forming a second material proximate the conductive material;
forming a barrier layer between the conductive material and the second material, the barrier layer comprising a compound having silicon chemically bonded to both nitrogen and an organic material, the barrier layer being in physically contact with the second material; and
wherein the second material comprises silicon dioxide.
7. The method of claim 1 wherein the barrier layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), and wherein y is greater than 0 and no greater than about 4.
8. The method of claim 1 wherein the barrier layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), wherein y is greater than 0 and no greater than about 4, and wherein the (CH3)xSi3N(4−x) is present in the barrier layer to a concentration of from greater than 0% to about 20% (mole percent).
9. The method of claim 1 wherein the forming the barrier layer occurs in a reaction chamber and comprises combining CH3SiH3 and NH3 in the chamber to deposit the (CH3)xSi3N(4−x) over the substrate.
10. The method of claim 1 wherein the forming the barrier layer occurs in a reaction chamber and comprises combining CH3SiH3 and NH3 in the chamber with a plasma to deposit the (CH3)xSi3N(4−x) over the substrate.
11. The method of claim 1 wherein the barrier layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), and wherein the forming the barrier layer occurs in a reaction chamber and comprises combining CH3SiH3, SiH4 and NH3 in the chamber with a plasma to deposit the (CH3)xSi3N(4−x) over the substrate, and wherein y is greater than 0 and no greater than about 4.
12. A semiconductor processing method, comprising:
providing a semiconductive substrate;
forming a first material over the semiconductive substrate;
forming a barrier layer proximate the first material, the barrier layer comprising (CH3)xSi3N(4−x), with x being greater than 0 and no greater than 4; and
forming a second material separated from the first material by the barrier layer.
13. The method of claim 12 wherein the barrier layer is formed against the first material.
14. The method of claim 12 wherein the barrier layer is formed against the first material, and wherein the second material is formed against the barrier layer.
15. The method of claim 12 wherein at least one of the first and second materials is conductive.
16. The method of claim 12 wherein at least one of the first and second materials is insulative.
17. The method of claim 12 wherein the barrier layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), and wherein y is greater than 0 and no greater than about 4.
18. A semiconductor processing method, comprising:
providing a semiconductive substrate; and
forming a layer over the semiconductive substrate, the layer comprising (CH3)xSi3N(4−x), with x being greater than 0 and no greater than 4.
19. The method of claim 18 wherein the layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), and wherein y is greater than 0 and no greater than about 4.
20. The method of claim 18 wherein the layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), wherein the (CH3)xSi3N(4−x) is present in the layer to a concentration of from greater than 0% to about 20% (mole percent), and wherein y is greater than 0 and no greater than about 4.
21. The method of claim 18 wherein the forming occurs in a reaction chamber and comprises combining CH3SiH3 and NH3 in the chamber to deposit the (CH3)xSi3N(4−x) over the substrate.
22. The method of claim 18 wherein the forming occurs in a reaction chamber and comprises combining CH3SiH3 and NH3 in the chamber with a plasma to deposit the (CH3)xSi3N(4−x) over the substrate.
23. The method of claim 18 wherein the layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), and wherein the forming occurs in a reaction chamber and comprises combining CH3SiH3, SiH4 and NH3 in the chamber with a plasma to deposit the (CH3)xSi3N(4−x) over the substrate.
a semiconductive substrate; and
a layer over the semiconductive substrate, the layer comprising (CH3)xSi3N(4−x), with x being greater than 0 and no greater than 4.
25. The device of claim 24 wherein the layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), and wherein y is greater than 0 and no greater than about 4.
26. The device of claim 24 wherein the layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), wherein the (CH3)xSi3N(4−x) is present in the layer to a concentration of from greater than 0% to about 50% (mole percent), and wherein y is no greater than about 4.
a first material over the semiconductive substrate;
a second material proximate the first material; and
a barrier layer separating the second material from the first material, the barrier layer comprising (CH3)xSi3N(4−x), with x being greater than 0 and no greater than 4.
28. The device of claim 27 wherein at least one of the first and second materials is conductive.
29. The device of claim 27 wherein the nitrogen is not bonded to carbon.
30. The device of claim 27 wherein at least one of the first and second materials is insulative.
31. The device of claim 27 wherein the barrier layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), and wherein y is no greater than about 4.
a conductive copper-containing material over the semiconductive substrate;
a second material proximate the conductive material; and
a barrier layer between the conductive material and the second material, the barrier layer comprising (CH3)xSi3N(4−x), with x being greater than 0 and no greater than 4.
33. The device of claim 32 wherein the barrier layer is against the conductive material.
34. The device of claim 32 wherein the barrier layer is against both the conductive material and the second material.
35. The device of claim 32 wherein the second material is an insulative material.
a second material proximate the conductive material;
a barrier layer between the conductive material and the second material, the barrier layer comprising a compound having silicon chemically bonded to both nitrogen and an organic material, the barrier layer being in physical contact with the second material; and
37. The device of claim 32 wherein the barrier layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), and wherein y is no greater than about 4.
38. The device of claim 32 wherein the barrier layer consists essentially of Si3Ny and the (CH3)xSi3N(4−x), wherein the (CH3)xSi3N(4−x), is present in the layer to a concentration of from greater than 0% to about 50% (mole percent), and wherein y is no greater than about 4.
US09219041 1998-12-23 1998-12-23 Semiconductor devices, and semiconductor processing methods Active US6828683B2 (en)
US09219041 US6828683B2 (en) 1998-12-23 1998-12-23 Semiconductor devices, and semiconductor processing methods
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US09641826 Division US6719919B1 (en) 1998-12-23 2000-08-17 Composition of matter
US20020020919A1 true US20020020919A1 (en) 2002-02-21
US6828683B2 true US6828683B2 (en) 2004-12-07
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US09219041 Active US6828683B2 (en) 1998-12-23 1998-12-23 Semiconductor devices, and semiconductor processing methods
US09641826 Active US6719919B1 (en) 1998-12-23 2000-08-17 Composition of matter
US10776553 Active US7279118B2 (en) 1998-12-23 2004-02-10 Compositions of matter and barrier layer compositions
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2016-03-29 IPR Aia trial proceeding filed before the patent and appeal board: inter partes review
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Opponent name: RICOH CO., LTD.,RICOH AMERICAS HOLDINGS, INC.,RICO