Source: http://www.google.com/patents/US7917106?ie=ISO-8859-1&dq=6,418,462
Timestamp: 2014-03-17 10:18:29
Document Index: 161427572

Matched Legal Cases: ['Application No. 60', 'Application No. 2008', 'Application No. 2008', 'Application No. 2008', 'Application No. 10', 'art 4', 'art 3', 'art 4', 'art 3']

Patent US7917106 - RF power amplifier controller circuit including calibrated phase control loop - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsAn RF power amplifier system comprises an amplitude control loop and a phase control loop. The amplitude control loop adjusts the supply voltage to the power amplifier based upon the amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated...http://www.google.com/patents/US7917106?utm_source=gb-gplus-sharePatent US7917106 - RF power amplifier controller circuit including calibrated phase control loopAdvanced Patent SearchPublication numberUS7917106 B2Publication typeGrantApplication numberUS 11/669,648Publication dateMar 29, 2011Filing dateJan 31, 2007Priority dateFeb 3, 2006Also published asUS8340604, US20070184794, US20110140777Publication number11669648, 669648, US 7917106 B2, US 7917106B2, US-B2-7917106, US7917106 B2, US7917106B2InventorsSerge Francois Drogi, Vikas Vinayak, Mark Gehring, Cary Renzema, Jeremy LubkinOriginal AssigneeQuantance, Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (104), Non-Patent Citations (45), Referenced by (5), Classifications (21), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetRF power amplifier controller circuit including calibrated phase control loopUS 7917106 B2Abstract An RF power amplifier system comprises an amplitude control loop and a phase control loop. The amplitude control loop adjusts the supply voltage to the power amplifier based upon the amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated amplitude of the output signal. The phase control loop adjusts the phase of the input signal based upon a phase error signal indicating a phase difference between phases of the input signal and the output signal. The phase control loop may comprise one or more variable phase delays introducing a relative phase delay to allow the phase differences between the input and output signals of the PA circuit to be within a range compatible with a phase comparator generating the phase error signal, and a low frequency blocking module that removes the larger extent, lower frequency components of the phase error signal.
4. The RF power amplifier system of claim 3, wherein the operating phase range of the phase comparator is approximately �90 degrees about a center point.
14. The method of claim 13, wherein the predetermined phase range is approximately �90 degrees about a center point.
23. The RF power amplifier system of claim 22, wherein an operating phase range of the phase comparator is approximately �90 degrees about a center point and said one or more variable phase delays adjust the phase difference between the phases of the RF input signal and the RF output signal to be within the operating phase range of the phase comparator.
30. The method of claim 29, wherein the predetermined phase range is approximately �90 degrees about a center point.
CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority under 35 U.S.C. �119(e) from co-pending U.S. Provisional Patent Application No. 60/764,947, entitled �RF Power Amplifier with Efficiency Improvement for High Peak to Average Modulation Types,� filed on Feb. 3, 2006; and this application is a continuation-in-part application of, and claims the benefit under 35 U.S.C. �120 from, co-pending U.S. patent application Ser. No. 11/429,119, entitled �Power Amplifier Controller Circuit,� filed on May 4, 2006, the subject matter of both of which are incorporated by reference herein in their entirety.
P bat ≈I pa �V pa +Effl�(Vcc−V pa)�I pa ≈Effl�Vcc�I pa with Effl=1.05, which is sufficiently close to 1 to allow for this approximation, where Pbat is the power from the battery, Ipa is the input current to the PA 104, Vpa is the input supply voltage to the PA 104, and Vcc is the supply voltage of the battery. In addition, power consumed by the SMPS 404 from a power source such as a battery (not shown) for a given control voltage 208 on the PA 104 can be approximated as follows:
Referring to FIG. 12A, as the process begins 1202, a center frequency is set 1204. The center frequency is the frequency around which the RF PA system will operate and is set based upon the wireless communication standard (e.g., WCDMA) employed for communication in the RF PA system. Additionally, the RF PA may be set 1205 to operate at a particular output power level. The method of FIG. 12A is performed to set a parameter (VarDel) used as the relative delay offset in the phase control loop seen as an offset of phase difference across the inputs to the phase comparator 316, and thus to set the one or more variable phase delays 1002, 1004 accordingly. In step 1206, VarDel is initialized, for example, set to zero. Note that the �delay� for the one or more variable phase delays 1002, 1004 herein is the total relative differential delay introduced at the inputs 324, 325 to the phase comparator 316 by the one or more variable phase delays 1002, 1004 in the phase control loop regardless of how many variable phase delays 1002, 1004 are present in the phase control loop. Thus, if there are two variable phase delays 1002, 1004, �delay� is the relative delay introduced by the two variable phase delays 1002, 1004 combined. However, if there is only one variable phase delay 1002 or 1004, then the �delay� is what is introduced by the single variable phase delay component 1002 or 1004. Then, it is determined 1208 whether the phase control loop is apparently locked. One test to determine whether the phase control loop is apparently locked is to check whether the output phase error signal 317 of the phase comparator 316 is approximately centered within its operating range. If the phase control loop is apparently locked in step 1208, VarDel is changed in step 1210 by a predetermined amount �Step_1� (e.g., 90 degrees), thereby ensuring that the subsequent steps in the method of FIG. 12A start from a condition where the phase control loop is not locked. Ensuring that the phase control loop is not locked eliminates the possibility that the phase control loop is in an inverted condition, or �false lock,� as will be explained later.
If the phase control loop is not locked in step 1208, then the process of adjusting the parameter VarDel, and thus the �delay� for the one or more variable phase delays 1002, 1004, can begin. First, the polarity of the phase comparator output 317 is checked 1211. If the polarity of the phase comparator output 317 indicates excessive delay (positive), VarDel is decremented 1212 by predetermined amount �Step_2� (e.g., 45 degrees). Similarly, if the polarity of the phase comparator output 317 indicates insufficient delay (negative), VarDel is incremented 1213 by the predetermined amount �Step_2� (e.g., 45 degrees). In this case, incrementing VarDel means increasing the value of �delay,� and decrementing VarDel means decreasing the value of �delay.� Then, another check is made 1214 to determine whether the phase control loop is apparently locked. Steps 1212 and 1213 are performed using the relatively large increment value Step_2 to determine generally in what range the appropriate phase delay for the phase control loop is. Thus, steps 1212 or 1213, and step 1214 are relatively coarse searching steps in search for the appropriate VarDel value. If the phase control loop is apparently locked in step 1214, the current value of VarDel is saved in step 1222 as the phase delay to use for the current output power level and center frequency. If the phase control loop is not apparently locked in step 1214, it is determined in step 1216 whether the phase comparator 316 flipped polarity, i.e., whether the phase error signal 317 has an opposite polarity relative to its value prior to the decrease or increase of Step_2 in step 1212 or 1213, respectively. If the polarity of the phase error signal 317 is determined in step 1216 to have flipped, this means that decrementing or incrementing Step_2 in step 1212 or step 1213 caused the phase control loop to overshoot the appropriate phase delay value that would have resulted in a locked condition. Thus, the appropriate VarDel value can be obtained by adjusting the VarDel value by a small amount smaller than Step_2 in a direction opposite to the direction of adjustment of Step_2. To accomplish this, VarDel is either incremented (if it was previously decremented in step 1212) or decremented (if it was previously incremented in step 1213) in steps of a predetermined value �Step_3� (e.g., 6 degrees) smaller than Step_2 until it is determined 1220 that the phase control loop is locked, at which point the corresponding value of VarDel is saved in step 1222 as the phase delay to use for the current output power level and center frequency. The value of �Step_3� is set to be small enough so that the phase control loop can achieve lock without overshoot as VarDel is stepped. As before, incrementing VarDel means increasing the value of �delay,� and decrementing VarDel means decreasing the value of �delay.� Note that steps 1218 and 1220 are relatively fine searching steps in search for the appropriate VarDel value. If the polarity of the phase error signal 317 did not flip in step 1216, the process goes back to step 1211 and step 1212 or step 1213 to adjust VarDel by Step_2 (e.g., 45 degrees) again, and the subsequent steps 1214, 1216, 1218, 1220, 1222 are repeated as necessary. In step 1222, after obtaining the appropriate value of phase delay to be introduced to the phase control loop of the RF PA system for the center frequency and the output power level, the variable phase delay(s) 1002, 1004 are set accordingly to introduce such relative phase delay in the phase control loop. For cases where the phase of the RF PA does not change substantially when operating at different output power levels, the calibration procedure of steps 1205 through 1222 can be performed at a single output power level. However, if the phase of the RF PA does change substantially when operating at difference output power levels, and thus there are more output power levels to set phase delays for (step 1223), the process returns to step 1205 to repeat steps 1205 through 1222 for a different output power level, and the appropriate settings for the variable phase delays 1002, 1004 are stored 1222 separately for each of the output power levels, at the currently set center frequency. Such settings are recalled in accordance with the output power level being used with the RF PA system. Similarly, for cases where the operating frequency range is narrow, for example, 1920-1980 MHz, the calibration procedure of steps 1204 through 1222 can be performed at a single center frequency and the process may end 1226. However, if the RF PA system must operate across a wide range of frequencies and thus there are more frequencies to set phase delays for (step 1224), the process returns to step 1204 to repeat steps 1204 through 1222 for a different center frequency.
FIG. 12B illustrates another method of setting the phase delay in the one or more variable phase delay(s) in the RF power amplifier systems illustrated in FIGS. 11A-11C and 11E-11G, according to another embodiment of the present invention. Referring to FIG. 12B, as the process begins 1232, a center frequency is set 1234. Additionally, the RF PA may be set 1235 to operate at a particular output power level. The method of FIG. 12B is performed to set a parameter (VarDel) used as the relative delay offset in the phase control loop, seen as an offset of phase difference across the inputs to the phase comparator 316, and to set the one or more variable phase delays 1002, 1004 accordingly. In step 1236, VarDel is initialized, for example, set to zero. Again, note that the �delay� for the one or more variable phase delays 1002, 1004 herein is the total relative delay introduced by the one or more variable phase delays 1002, 1004 in the phase control loop regardless of how many variable phase delays 1002, 1004 are present in the phase control loop. Then, it is determined 1237 whether the phase control loop is apparently locked. As explained above, one test to determine whether the phase control loop is apparently locked is to check whether the output phase error signal 317 of the phase comparator 316 is approximately centered within its operating range. If the phase is not apparently locked in step 1237, the polarity of the phase comparator output 317 is checked 1238. If the polarity of the phase comparator output 317 indicates excessive �delay� (positive), VarDel is decremented 1239 by Step_4 (e.g., 10 degrees). Similarly, if the polarity of the phase comparator output 317 indicates insufficient �delay� (negative), VarDel is incremented 1240 by Step_4 (e.g., 10 degrees). Then, a check 1237 is made again to determine whether phase control loop is apparently locked. If not, steps 1238 and 1239 or 1240 are repeated until it is determined 1237 that the phase control loop is apparently locked, at which time the value of VarDel is saved 1242 in the parameter VarDel_Candidate as the tentative relative delay to be introduced in the phase control loop.
In determining the appropriate settings for the one or more variable phase delay elements 1002, 1004, care must be taken to ensure that the phase control loop is not in an inverted condition, which is often referred to as a �false lock� condition, in which the phase comparator 316 would cause the phase shifter 320 to adjust in precisely the opposite of the appropriate direction. An inverted condition can arise because the phase comparator 316 generally operates with a limited range of phase difference at its inputs 324, 325. In this example, this range may be limited to approximately +/−90 degrees about a center point, which may be at 90 degrees. If the phase difference at 324, 325 is −90 degrees, which in this example is 180 degrees offset from the center point of 90 degrees, the phase comparator 316 can generate a zero signal at its output 317 indicating that the phase is locked when in fact the phase comparator 316 is in an inverted condition. Steps 1244, 1246, 1248, 1250 deal with ensuring that the phase control loop is not in an inverted condition. To accomplish this, VarDel is changed 1244 by a predetermined amount, Offset_Check. Offset_Check may be typically a moderate amount (e.g., 20 degrees), and VarDel may be changed in either direction (either incremented or decremented). Then, the behavior of the phase comparator 316 is observed to test for an expected polarity for a given polarity of Offset_Check. If the phase control loop was in an inverted condition with VarDel_Candidate applied, the polarity of the phase error signal 317 output from the phase comparator 316 would be at a polarity opposite to the expected polarity if the phase control loop was in a normal, non-inverted condition. Thus, step 1246 tests whether the value of VarDel_Candidate resulted in the phase control loop's proper locked condition, or an inverted condition. It is important that the magnitude of Offset_Check is large enough to ensure a reliable measurement of the polarity�e.g., substantially larger than noise levels in the circuit. If it is determined that the phase control loop is operating in an inverted condition in step 1246, VarDel is adjusted 1248 by another predetermined amount �Step_5� (e.g., 180 degrees) and the process goes back to step 1238 with this new VarDel value. The value of Step_5 may be set to be approximately 180 degrees since in this example an inverted condition occurs when the phase delay in the phase control loop is offset from a non-inverted condition by approximately 180 degrees. If it is determined that the phase control loop is operating in a proper non-inverted locked condition in step 1246, the value of VarDel_Candidate is stored 1250 as the final relative phase delay to be introduced to the phase control loop of the RF PA system for that output power level and center frequency, and the variable phase delay(s) 1002, 1004 are set accordingly to introduce such relative phase delay in the phase control loop. For cases where the phase of the RF PA does not change substantially when operating at different output power levels, the calibration procedure of steps 1235 through 1250 can be performed at a single output power level. However, if the phase of the RF PA does change substantially when operating at difference output power levels, and thus there are more output power levels to set phase delays for (step 1251), the process returns to step 1235 to repeat steps 1235 through 1250 for a different output power level, and the appropriate settings for the variable phase delays 1002, 1004 are stored 1250 separately for each of the output power levels, at the currently set center frequency. Such settings are recalled in accordance with the output power level being used with the RF PA system. Similarly, for cases where the operating frequency range is narrow, for example, 1920-1980 MHz, the calibration procedure of steps 1234 through 1250 can be performed at a single center frequency and the process may end 1254. If the RF PA system must operate across a wide range of frequencies and thus there are more frequencies to set phase delays for (step 1252), the process returns to step 1234 to repeat steps 1234 through 1250 for a different center frequency.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS3900823Mar 28, 1973Aug 19, 1975Alan D SokalAmplifying and processing apparatus for modulated carrier signalsUS4262264Feb 16, 1979Apr 14, 1981General Electric CompanyApparatus and method for achieving acquisition and maintaining lock in a phase locked loopUS4420723Mar 27, 1981Dec 13, 1983U.S. Philips CorporationPhase locked loop amplifier for variable amplitude radio wavesUS4591800Oct 1, 1984May 27, 1986Motorola, Inc.Linear power amplifier feedback improvementUS4754260Jul 27, 1987Jun 28, 1988Timeback Systems, Inc.Method of and apparatus for reducing quantizing noise in analog to digital convertersUS5023937May 9, 1989Jun 11, 1991Motorola, Inc.Transmitter with improved linear amplifier controlUS5087829Dec 1, 1989Feb 11, 1992Hitachi, Ltd.High speed clock distribution systemUS5128629Apr 22, 1991Jul 7, 1992Hughes Aircraft CompanyMethod for controlling the output power of digital cellular telephonesUS5142240Dec 21, 1990Aug 25, 1992Mitsubishi Denki Kabushiki KaishaAmplifier circuit with correction of amplitude and phase distortionsUS5305468Mar 18, 1992Apr 19, 1994Motorola, Inc.Power control method for use in a communication systemUS5410276Dec 28, 1993Apr 25, 1995Hughes Aircraft CompanyRF modulation using a pulsed DC power supplyUS5590408Mar 20, 1995Dec 31, 1996Qualcomm IncorporatedReverse link, transmit power correction and limitation in a radiotelephone systemUS5606285Jul 21, 1995Feb 25, 1997Oki Electric Industry Co., Ltd.Power control circuit for use with transmitterUS5675288Jul 7, 1995Oct 7, 1997Alcatel EspaceMethod of linearizing a non-linear amplifier, linearization circuit and amplifier including a circuit of this kindUS5732334Dec 6, 1996Mar 24, 1998Mitsubishi Denki Kabushiki KaishaRadio transmitter and method of controlling transmission by radio transmitterUS5815531Jun 12, 1996Sep 29, 1998Ericsson Inc.Transmitter for encoded data bitsUS5822442Sep 11, 1995Oct 13, 1998Starkey Labs, Inc.Gain compression amplfier providing a linear compression functionUS5880633May 8, 1997Mar 9, 1999Motorola, Inc.High efficiency power amplifierUS5936464Nov 3, 1997Aug 10, 1999Motorola, Inc.Method and apparatus for reducing distortion in a high efficiency power amplifierUS5973556Sep 18, 1998Oct 26, 1999Hewlett-Packard CompanyDelta-modulated power supplyUS6002300Aug 21, 1998Dec 14, 1999Siemens AktiengesellschaftControl system for the linearization of an amplifier circuitUS6031421Jul 22, 1998Feb 29, 2000Mcewan; Thomas E.Controlled gain amplifier with variable control exponentUS6043707Jan 7, 1999Mar 28, 2000Motorola, Inc.Method and apparatus for operating a radio-frequency power amplifier as a variable-class linear amplifierUS6133792Sep 17, 1998Oct 17, 2000Telefonakteibolaget Lm EricssonMethod and apparatus for preventing power amplifier saturationUS6141541Dec 31, 1997Oct 31, 2000Motorola, Inc.Method, device, phone and base station for providing envelope-following for variable envelope radio frequency signalsUS6166596Mar 31, 1999Dec 26, 2000Matsushita Electric Industrial Co., Ltd.High efficiency power amplifying apparatus with phase compensation circuitUS6166598Jul 22, 1999Dec 26, 2000Motorola, Inc.Power amplifying circuit with supply adjust to control adjacent and alternate channel powerUS6175273Apr 2, 2000Jan 16, 2001Motorola, Inc.Method and apparatus for high efficiency wideband power amplificationUS6198347Jul 29, 1999Mar 6, 2001Tropian, Inc.Driving circuits for switch mode RF power amplifiersUS6208199Mar 17, 1999Mar 27, 2001Mitel Semiconductor AbPulse amplifier with low duty cycle errorsUS6275685 *Dec 10, 1998Aug 14, 2001Nortel Networks LimitedLinear amplifier arrangementUS6300826May 5, 2000Oct 9, 2001Telefonaktiebolaget Lm EricssonApparatus and method for efficiently amplifying wideband envelope signalsUS6353359Nov 6, 2000Mar 5, 2002Motorola, Inc.Training scheme for high efficiency amplifierUS6377784Feb 9, 1999Apr 23, 2002Tropian, Inc.High-efficiency modulation RF amplifierUS6404823Jul 1, 1998Jun 11, 2002Conexant Systems, Inc.Envelope feedforward technique with power control for efficient linear RF power amplificationUS6437641Sep 26, 2000Aug 20, 2002Paragon Communications Ltd.Method and apparatus for improving the efficiency of power amplifiers, operating under a large peak-to-average ratioUS6438360Jul 22, 1999Aug 20, 2002Motorola, Inc.Amplifier system with load control to produce an amplitude envelopeUS6445249Aug 8, 2001Sep 3, 2002Motorola, Inc.Modification of phase component of error signal to reduce variation of phase component of output signal of power amplifierUS6449465Dec 20, 1999Sep 10, 2002Motorola, Inc.Method and apparatus for linear amplification of a radio frequency signalUS6472934Dec 29, 2000Oct 29, 2002Ericsson Inc.Triple class E Doherty amplifier topology for high efficiency signal transmittersUS6528975Dec 15, 2000Mar 4, 2003Tropian Inc.Saturation prevention and amplifier distortion reductionUS6539072Mar 13, 2000Mar 25, 2003Rambus, Inc.Delay locked loop circuitry for clock delay adjustmentUS6583664Jul 23, 2001Jun 24, 2003Telefonaktiebolaget Lm Ericsson (Publ)Apparatus and method for efficiently amplifying wideband envelope signalsUS6633199 *Dec 14, 2001Oct 14, 2003Nokia CorporationAmplifier circuit, radio transmitter, method and useUS6646501Jun 25, 2002Nov 11, 2003Nortel Networks LimitedPower amplifier configurationUS6661210Jan 23, 2002Dec 9, 2003Telfonaktiebolaget L.M. EricssonApparatus and method for DC-to-DC power conversionUS6734724Oct 6, 2000May 11, 2004Tropian, Inc.Power control and modulation of switched-mode power amplifiers with one or more stagesUS6741127Apr 9, 2002May 25, 2004Sony CorporationHigh-frequency amplifier circuit and radio communication apparatus using sameUS6781452Aug 29, 2001Aug 24, 2004Tropian, Inc.Power supply processing for power amplifiersUS6825726Jul 12, 2001Nov 30, 2004Indigo Manufacturing Inc.Power amplifier with multiple power suppliesUS6917244Jun 10, 2003Jul 12, 2005Nokia CorporationPower control for a switching mode power amplifierUS6924695Apr 27, 2004Aug 2, 2005Tropian, Inc.Power supply processing for power amplifiersUS6924700Sep 30, 2003Aug 2, 2005Mitsubishi Denki Kabushiki KaishaClass D amplifierUS6924711Mar 10, 2003Aug 2, 2005Utstarcom, Inc.Multimode modulator employing a phase lock loop for wireless communicationsUS6928272Dec 3, 2002Aug 9, 2005Nec CorporationDistortion compensating circuit for compensating distortion occurring in power amplifierUS6968163Mar 2, 2001Nov 22, 2005Siemens AktiengesellschaftMethod and transmission circuit for generating a transmission signalUS7058373Sep 16, 2004Jun 6, 2006Nokia CorporationHybrid switched mode/linear power amplifier power supply for use in polar transmitterUS7068743Dec 16, 1999Jun 27, 2006Nec CorporationDS-CDMA multi-user interference canceller and CDMA multi-user system using the sameUS7109897Oct 7, 2005Sep 19, 2006Rf Micro Devices, Inc.Power amplifier control reducing output power variationUS7197286Feb 20, 2003Mar 27, 2007Fujitsu LimitedRadio with a distortion compensation capabilityUS7250815 *Feb 25, 2004Jul 31, 2007Intel CorporationAmplifier distortion management apparatus, systems, and methodsUS7359685 *May 12, 2005Apr 15, 2008Fraunhofer-Gesellschaft zur F�rderung der Angewandten Forschung EvTransmitting stageUS7440731Jul 27, 2005Oct 21, 2008Freescale Semiconductor, Inc.Power amplifier with VSWR detection and correction featureUS7761065Jan 12, 2007Jul 20, 2010Quantance, Inc.RF power amplifier controller circuit with compensation for output impedance mismatchUS20020053897Aug 27, 1999May 9, 2002Jun KajiwaraSwitching regulator and lsi systemUS20020137481May 16, 2001Sep 26, 2002Chieh-Sheng ChenPower controllerUS20020168949Jul 9, 1999Nov 14, 2002Bjorn JohannissonArrangement and method relating to radio communicationUS20020175764Apr 16, 2002Nov 28, 2002Toru MatsuuraPower amplifier circuit, control method for power amplifier circuit, and portable terminal apparatus for mobile communicationUS20030017840Sep 19, 2002Jan 23, 2003Hitachi, Ltd.Cellular telephoneUS20030155978Feb 21, 2002Aug 21, 2003Pehlke David R.Dynamic bias controller for power amplifier circuitsUS20040071225Sep 5, 2003Apr 15, 2004May SuzukiWireless communication apparatusUS20040162039Jun 5, 2002Aug 19, 2004Gerard Marque-PucheuMethod for amplitude modulation of a radio frequency signal, and device thereforUS20040189378Mar 23, 2004Sep 30, 2004Ntt Docomo, Inc.High-efficiency linear power amplifierUS20040198257Feb 26, 2003Oct 7, 2004Ryoichi TakanoCommunication semiconductor integrated circuit, a wireless communication apparatus, and a loop gain calibration methodUS20040263254Apr 12, 2004Dec 30, 2004Renesas Technology Corp.High frequency power amplifier circuit and radio communication systemUS20050046474Aug 20, 2004Mar 3, 2005Hidetoshi MatsumotoAmplifier and radio frequency power amplifier using the sameUS20050059362Aug 29, 2003Mar 17, 2005Nokia CorporationMethod and apparatus providing integrated load matching using adaptive power amplifier compensationUS20050064830Sep 16, 2004Mar 24, 2005Nokia CorporationHybrid switched mode/linear power amplifier power supply for use in polar transmitterUS20050122163Dec 8, 2003Jun 9, 2005Northrop Grumman CorporationEER modulator with power amplifier having feedback loop providing soft output impedanceUS20050156662Nov 12, 2004Jul 21, 2005Arun RaghupathyAmplifier predistortion and autocalibration method and apparatusUS20050242880Aug 6, 2003Nov 3, 2005John DomokosPower amplifier systemUS20060001483Jul 6, 2005Jan 5, 2006Tropian, Inc.Power supply processing for power amplifiersUS20060040625Oct 25, 2005Feb 23, 2006Yutaka SaitoTransmission power amplifier unitUS20060232332Apr 11, 2006Oct 19, 2006Braithwaite Richard NAdaptive predistortion linearized amplifier system employing selective samplingUS20070096806Dec 12, 2006May 3, 2007Parkervision, Inc.RF power transmission, modulation, and amplification embodimentsUS20070184791May 4, 2006Aug 9, 2007Vikas VinayakPower amplifier controller circuitUS20070184792Jan 9, 2007Aug 9, 2007Quantance, Inc.RF Power Amplifier Controller CircuitUS20070184793Jan 12, 2007Aug 9, 2007Quantance, Inc.RF Power Amplifier Controller Circuit With Compensation For Output Impedance MismatchUS20070184795Feb 1, 2007Aug 9, 2007Quantance, Inc.Amplitude error de-glitching circuit and method of operatingUS20070184796Feb 2, 2007Aug 9, 2007Quantance, Inc.Amplifier compression controller circuitUS20070218848Feb 5, 2007Sep 20, 2007Quantance, Inc.Phase error de-glitching circuit and method of operatingUS20070247253Apr 4, 2007Oct 25, 2007Eoin CareyApparatus, system, and method for digital modulation of power amplifier in polar transmitterUSRE37407 *Apr 19, 2000Oct 16, 2001Spectrian CorporationPolar envelope correction mechanism for enhancing linearity of RF/microwave power amplifierEP0473299A2Aug 6, 1991Mar 4, 1992Hughes Aircraft CompanySolid state power amplifier with dynamically adjusted operating pointEP0812064B1Mar 15, 1997Sep 24, 2003Matsushita Electric Industrial Co., Ltd.Reception automatic gain control system and methodEP1225690A2Dec 19, 2001Jul 24, 2002Nokia CorporationTransmitter circuitsJP3207153B2 Title not availableJP2000507751A Title not availableJP2001519612A Title not availableJP2005117315A Title not availableJPH04192907A Title not availableJPH06164249A Title not availableJPH08204774A Title not availableWO1995034128A1Jun 6, 1995Dec 14, 1995Antonio AbbiatiLinear microwave power amplifier with supply power injection controlled by the modulation envelope* Cited by examinerNon-Patent CitationsReference1"LF-2.7 GHz RF/IF Gain and Phase Detector, AD8302," Analog Devices, Inc., 2002, pp. 1-24, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: < URL:http://www.analog.com/UploadedFiles/Data-Sheets/797075782AD8302-a.pdf#search='AD8302'>.2"SEQ5400-The World's First Single-Chip WEDGE Transceiver," Sequoia Communications, 2 pages, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: .3"The Changing Face of Amplifier Design," Nujira, 2 pages, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: .4"LF-2.7 GHz RF/IF Gain and Phase Detector, AD8302," Analog Devices, Inc., 2002, pp. 1-24, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: < URL:http://www.analog.com/UploadedFiles/Data�Sheets/797075782AD8302�a.pdf#search=�AD8302�>.5"SEQ5400�The World's First Single-Chip WEDGE Transceiver," Sequoia Communications, 2 pages, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: <URL:http:www.sequoia-communications.com/SEQ5400Data�Sheet.pdf>.6"The Changing Face of Amplifier Design," Nujira, 2 pages, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: <URL:http://www.nujira.com/technology/>.7Cardinal, J-S. et al., "A New Adaptive Double Envelope Feedback (ADEF) Linearizer for Solid State Power Amplifiers," IEEE Transactions on Microwave Theory and Techniques, Jul. 1995, pp. 1508-1515, vol. 43, No. 7.8Fergus, T.J., "EDGE Modulation-How Linearization Improves Amplifier Performance," RFDesign, Oct. 2002, pp. 18-30.9Fergus, T.J., "EDGE Modulation�How Linearization Improves Amplifier Performance," RFDesign, Oct. 2002, pp. 18-30.10Japanese Office Action, Japanese Application No. 2008-553289, Sep. 30, 2010, 5 pages.11Japanese Office Action, Japanese Application No. 2008-553333, Oct. 1, 2010, 5 pages.12Japanese Office Action, Japanese Application No. 2008-553347, Oct. 1, 2010, 6 pages.13Korean Office Action, Korean Application No. 10-2008-7020806, Nov. 29, 2010, 21 pages.14McCune, Jr., E.W., "Direct Polar Modulation has the Right Stuff," CommsDesign, Nov. 7, 2005, 3 pages, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: .15McCune, Jr., E.W., "Direct Polar Modulation has the Right Stuff," CommsDesign, Nov. 7, 2005, 3 pages, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: <URL:http://www.commsdesign.com/showArticle.jhtm?articleID=173500205>.16Morgan, P., "Highly Integrated Transceiver Enables High-Volume Production of GSM/EDGE Handsets," Silicon Laboratories, Inc., 2005, pp. 1-6, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: <URL:http://www.silabs.com/public/documents/marcom-doc/mcoll/Wireless/Aero-RF-Transceivers/en/Aerolle-Overview.pdf>.17Morgan, P., "Highly Integrated Transceiver Enables High-Volume Production of GSM/EDGE Handsets," Silicon Laboratories, Inc., 2005, pp. 1-6, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: <URL:http://www.silabs.com/public/documents/marcom�doc/mcoll/Wireless/Aero�RF�Transceivers/en/Aerolle�Overview.pdf>.18Park, H-M. et al., "A New Predistortion Linearizer Using Envelope-Feedback Technique for PCS High Power Amplifier Application," Proceedings of the IEEE Radio and Wireless Conference (RAWCON), Aug. 1999, pp. 223-226.19Park, H-M. et al., "A Predistortion Linearizer Using Envelope-Feedback Technique with Simplified Carrier Cancellation Scheme for Class-A and Class-AB Power Amplifiers," IEEE Transactions on Microwave Theory and Techniques, Jun. 2000, pp. 898-904, vol. 48, No. 6.20PCT International Search Report and Written Opinion, PCT/US07/02389, Oct. 19, 2007, 10 Pages.21PCT International Search Report and Written Opinion, PCT/US07/02676, Nov. 6, 2007, 9 pages.22PCT International Search Report and Written Opinion, PCT/US07/61499, Nov. 6, 2007, 11 pages.23PCT International Search Report and Written Opinion, PCT/US07/61578, Oct. 11, 2007, 7 pages.24Raab, F. et al., "RF and Microware Power Amplifier and Transmitter Technologies-Part 4," High Frequency Electronics, Nov. 2003, pp. 38-49.25Raab, F. et al., "RF and Microwave Power Amplifier and Transmitter Technologies-Part 3," High Frequency Electronics, Sep. 2003, pp. 34-48.26Raab, F. et al., "RF and Microware Power Amplifier and Transmitter Technologies�Part 4," High Frequency Electronics, Nov. 2003, pp. 38-49.27Raab, F. et al., "RF and Microwave Power Amplifier and Transmitter Technologies�Part 3," High Frequency Electronics, Sep. 2003, pp. 34-48.28Sowlati, T. et al., "Polar Loop Transmitter," Skyworks(TM), pp. 1-24, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: .29Sowlati, T. et al., "Polar Loop Transmitter," Skyworks�, pp. 1-24, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: <URL:http://paworkshop.ucsd.edu/papers2004/S1�2Polar%20Loop%20Transmitter.ppt>.30U.S. Office Action, U.S. Appl. No. 11/621,522, Oct. 5, 2009, 5 pages.31U.S. Office Action, U.S. Appl. No. 11/623,030, Sep. 1, 2009, 7 pages.32United States Office Action, U.S. Appl. No. 11/429,119, Oct. 29, 2009, 25 pages.33United States Office Action, U.S. Appl. No. 11/429,119, Sep. 17, 2010, 27 pages.34United States Office Action, U.S. Appl. No. 11/621,522, Apr. 21, 2010, 16 pages.35United States Office Action, U.S. Appl. No. 11/621,522, Dec. 6, 2010, 23 pages.36United States Office Action, U.S. Appl. No. 11/670,402, Apr. 2, 2010, 25 pages.37United States Office Action, U.S. Appl. No. 11/670,402, Jan. 3, 2011, 24 pages.38United States Office Action, U.S. Appl. No. 11/670,931, Apr. 28, 2010, 20 pages.39United States Office Action, U.S. Appl. No. 11/670,931, Jan. 7, 2011, 14 pages.40United States Office Action, U.S. Appl. No. 11/671,423, Jun. 21, 2010, 7 pages.41United States Office Action, U.S. Appl. No. 12/761,258, Aug. 5, 2010, 6 pages.42United States Office Action, U.S. Appl. No. 12/815,209, Oct. 19, 2010, 6 pages.43Wilkins, B. et al., "Large Signal Polar Modulation Reduces Heat Dissipation and Increases Battery Life in EDGE Handsets" Feb. 2005, Microwave Product Digest, 11 pages, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: .44Wilkins, B. et al., "Large Signal Polar Modulation Reduces Heat Dissipation and Increases Battery Life in EDGE Handsets" Feb. 2005, Microwave Product Digest, 11 pages, [online] [Retrieved on Apr. 5, 2006] Retrieved from the Internet: <URL:http:www.mpdigest.com/Articles/2005/feb2005/rfmd/Default.htm>.45Woo, W. et al., "A New Envelope Predistortion Linearization Architecture for Handset Power Amplifiers," Proceedings of the IEEE Radio and Wireless Conference (RAWCON) 2004, Sep. 2004, pp. 175-178.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8489033 *Dec 14, 2011Jul 16, 2013Research In Motion LimitedEnhanced wideband transceiverUS8582497 *Jul 25, 2012Nov 12, 2013Broadcom CorporationMethod and system for minimizing power consumption in a communication systemUS8615207 *Jan 26, 2011Dec 24, 2013Intersil Americas Inc.Power amplifier linearization feedback methods and systemsUS8620226 *Sep 15, 2012Dec 31, 2013Blackberry LimitedEnhanced wideband transceiverUS20110190028 *Jan 26, 2011Aug 4, 2011Intersil Americas Inc.Power Amplifier Linearization Feedback Methods and Systems* Cited by examinerClassifications U.S. Classification455/127.1, 455/127.2, 330/291, 330/296International ClassificationH04B1/04, H03G3/20Cooperative ClassificationH03G3/004, H03F2200/451, H03F2200/99, H03F1/0227, H03F2200/78, H03G3/3042, H03F1/0205, H03F1/3247, H03F1/0238European ClassificationH03F1/32P2, H03F1/02T1C2K, H03F1/02T1C1K, H03F1/02T, H03G3/30D2, H03G3/00PLegal EventsDateCodeEventDescriptionJul 12, 2011CCCertificate of correctionApr 2, 2007ASAssignmentOwner name: QUANTANCE, INC., CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:DROGI, SERGE FRANCOIS;VINAYAK, VIKAS;GEHRING, MARK;AND OTHERS;REEL/FRAME:019101/0859;SIGNING DATES FROM 20070305 TO 20070314Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:DROGI, SERGE FRANCOIS;VINAYAK, VIKAS;GEHRING, MARK;AND OTHERS;SIGNING DATES FROM 20070305 TO 20070314;REEL/FRAME:019101/0859RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google