Source: http://www.google.com/patents/US20040115866?ie=ISO-8859-1&dq=6,757,710
Timestamp: 2015-04-19 23:46:43
Document Index: 91001919

Matched Legal Cases: ['art 62', 'art 64', 'art 62', 'art 64', 'art 64', 'art 62', 'art 64', 'art 62', 'art 64', 'art 62', 'art 62', 'art 62', 'art 64', 'art 62', 'art 64', 'art 62', 'art 64', 'art 22', 'art 22', 'art 22', 'art 22', 'art 32', 'arts 23', 'art 162', 'art 164', 'art 162', 'art 164', 'art 165', 'art 165', 'art 162', 'art 164', 'art 262', 'art 264', 'art 262', 'art 264', 'art 262', 'art 264', 'art 362', 'art 362', 'art 362', 'art 362', 'art 362', 'arts 62', 'arts 99', 'art 562', 'art 564']

Patent US20040115866 - Methods of making microelectronic packages including folded substrates - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA microelectronic package is fabricated by a process which includes folding a substrate. A substrate is folded by engaging a folding portion of the substrate with a die so that the folding portion pivots with respect to a first portion of the substrate....http://www.google.com/patents/US20040115866?utm_source=gb-gplus-sharePatent US20040115866 - Methods of making microelectronic packages including folded substratesAdvanced Patent SearchPublication numberUS20040115866 A1Publication typeApplicationApplication numberUS 10/654,375Publication dateJun 17, 2004Filing dateSep 3, 2003Priority dateSep 6, 2002Also published asUS7246431, WO2004023546A1, WO2004023546A9Publication number10654375, 654375, US 2004/0115866 A1, US 2004/115866 A1, US 20040115866 A1, US 20040115866A1, US 2004115866 A1, US 2004115866A1, US-A1-20040115866, US-A1-2004115866, US2004/0115866A1, US2004/115866A1, US20040115866 A1, US20040115866A1, US2004115866 A1, US2004115866A1InventorsKyong-Mo Bang, Teck-Gyu KangOriginal AssigneeTessera, Inc.Export CitationBiBTeX, EndNote, RefManReferenced by (15), Classifications (46), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetMethods of making microelectronic packages including folded substrates
DETAILED DESCRIPTION [0041] A method of making a microelectronic package, according to one embodiment, is shown in FIGS. 1-5. The method includes providing a microelectronic element 10 on a substrate 20. The substrate 20 comprises an elongated strip of dielectric material having a central portion 22, a first end 23 and a second end 24 opposite the first end 22. The substrate is arranged so that an interior surface 26 faces upwardly and an exterior surface 28 faces downwardly. As used herein, directional terms such as �upwardly�, �downwardly�, �top� or �bottom� do not refer to any gravitational frame of reference. Rather, these directional terms are relative to the package. [0042] A set of electrically conductive mounting terminals 30 are provided in the central portion 22 of the substrate. Terminals 30 are disposed at or near the interior surface 26 of the substrate and exposed to the exterior surface 28 through holes or vias 32 extending through the substrate. Connection terminals 34 are provided in the first end 23 and second end 24 of the substrate. The connection terminals 34 are exposed to the external surface 28 of the substrate through holes 36. The substrate also includes electrically conductive traces 38 having connection pads 44. Some of the traces are connected to the connection pads 44 and extend from the central portion 22 to the connection terminals 34 in the first end 23, whereas other traces extend from the connection pads 44 to the connection terminals 34 in the second end 24. At least some traces interconnect at least some of the connection terminals 34 with at least some of the mounting terminals 30 and some connect the connection pads to the mounting terminals. Only a few of the traces 38 are depicted in FIG. 1 for clarity of illustration. None of the drawings are to scale and various parts shown may be enlarged for clarity of illustration. [0043] Substrate 20 may be formed from essentially any flexible dielectric material as, for example, one or more layers of a dielectric such as polyimide, BT or flexibilized epoxy. The conductive features such as terminals 30 and 34 and traces 38 may be formed from a conventional metallic elements of the type commonly used in flexible circuitry as, for example, copper, gold, alloys thereof, or combinations thereof, formed by selective deposition such as plating or by selective removal from a layer, as by etching. The techniques commonly employed to make flexible circuitry can be employed in fabrication of substrate 20 and the metallic features thereon. The substrate may include additional features as, for example, one or more additional layers of traces and electrically conductive planes such as metallic layers which can serve as a ground or power planes and which cooperate with the traces to form controlled impedance striplines. [0044] A microelectronic element 10, such as a semiconductor chip, is mounted on the interior surface 26 of the substrate in the central portion 22. Element 10 is electrically connected to at least some of the conductive features on the substrate in a conventional manner as, for example, by wire bonding using fine wires 42 to connect contacts on the chip to connection pads 44 connected to the traces. The microelectronic element 10 may comprise one or more semiconductor chips, circuit panels, microelectronic components, substrates, microelectronic assemblies, stacked assemblies, passive elements, wafers, or combinations thereof. The microelectronic element 10 is preferably attached to the substrate 20 and may be attached utilizing an adhesive applied in at least the central portion 22. The substrate 20 preferably carries on its interior surface 26 an adhesive layer laminated onto the substrate 20. The adhesive layer 45 includes apertures 47 aligned with the connection pads 44 so that the contacts 12 may be bonded to the connection pads 44. The microelectronic element on the substrate may also include a layer of compliant material, or the adhesive material may itself comprise a layer of compliant material. The microelectronic element 10 is desirably protected by overmolding 48. Essentially any material commonly used as a protective overmolding material in electronic packaging can be employed. The overmolding 48 forms a top surface 50 for the microelectronic element 10, as shown in FIG. 1. [0045] Although FIGS. 1-5 show a single microelectronic element 10, it should be appreciated that these processing steps can be performed while substrate 20 is a part of a larger sheet or tape. For example, substrate 20 can be formed as part of a continuous or semi-continuous tape. Furthermore, the resulting package may include more than one microelectronic element 10. [0046] In the next stage of the process, the substrate 20 is folded over upon itself by bending generally around a first axis 82 between the central portion 22 and the first end 23 and around a second axis 83 between the central portion 22 and the second end 24 of the substrate. In this condition, the first end 23 and second end 24 of the substrate overlies the central portion, with the interior surface 26 facing downwardly toward the microelectronic element 10. As shown in FIG. 3, the folding is performed by engaging the substrate 20 with at least one die 60. The die shown in FIG. 3 comprises a first part 62 and a second part 64. The microelectronic element 10 and the substrate 20 are arranged so that the first end 23 extends away from the microelectronic element 10 on one side of the microelectronic element, and the second end 24 extends away from the microelectronic element 10 on the other side. First part 62 has a recess 66 a formed in an end surface 68 a. End surface 68 a lies in a vertically oriented plane and is perpendicular to a preferably planar bottom side 72 a. The recess 66 a preferably comprises a generally U-shaped recess in the cross-section shown in FIG. 3. The recess 66 a includes a lower surface 74 a lying in a generally horizontal plane. The lower surface 74 a leads into a curved surface 76 a that extends from the lower surface 74 a to the upper surface 78 a, also lying in a generally horizontal plane. The second part 64 has corresponding features, including a recess 66 b formed in the end surface 68 b. The second part 64 also has a generally planar bottom side 72 b. The recess 66 b includes a lower surface 74 b leading into a curved surface 76 b, which extends to an upper surface 78 b, forming a generally u-shaped recess in the cross-section shown in FIG. 3. [0047] The microelectronic element 10 and substrate 20 are arranged with respect to the first part 62 and second part 64 so that the first part 62 is adjacent first end 23 and second part 64 is adjacent second end 24. The first part 62 of the die 60 is advanced toward the first end 23. The first part desirably slides along a planar, horizontal surface, so as to be guided thereby. As the first part 62 advances towards the microelectronic element 10, an engagement surface engages the first end 23 so that the first end 23 pivots with respect to the central portion 22. First, the lower surface 74 a engages the first end 23 of the substrate 20. The lower surface 74 a guides the first end 23 to the curved surface 76 a and, as the first part 62 advances toward the microelectronic element 10, the first end 23 is directed upwardly and around the curved surface 76 a. The first end 23 curves around the first axis 82 and meets the upper surface 78 a. The first end 23 follows upper surface 78 a and is directed over the top surface 50. Second part 64 is also directed towards the microelectronic element 10 so that an engagement surface engages the second end, pivoting the second end with respect to the central portion 22. The substrate 20 is folded in a similar manner, around second axis 83 so that the second end 24 overlies the top surface 50. The first part 62 and second part 64 may be advanced at the same time, or separately, or the substrate 10 and microelectronic element may be moved in relation to the first part 62 and second part 64. The microelectronic element 10 and substrate 20 may be supported in a machine for advancing the die, as known in the die-forming and progressive die forming art. The substrate is desirably formed with holes used for aligning and registering the substrate during processing operations, such as the sprocket holes commonly provided on tape-like substrates. For example, the substrate may have an alignment element projecting from a part of the substrate remote from a set of socket holes, which engage one another when the substrate is folded. [0048] After folding, a microelectronic package 70 is produced, as shown in FIGS. 4 and 5. The interior surface 26 at the first end 23 and second end 24 of the substrate 20 is adhered to the top surface 50 utilizing pressure and/or heat. The size and shape of the recesses 66 a and 66 b may be sufficient to press the first end 23 and second end 24 against the top surface 50 and adhere the first end 23 and the second end 24 to the top surface 50. Preferably, the recess 66 a and recess 66 b are sized and shaped to produce a microelectronic package 70 having a predetermined size and shape. The microelectronic package 70 has a first arcuate side 72 and a second arcuate side 74. The connection terminals 34 are located on a top side 76 of the package and generally overlie the microelectronic element 10. The traces 38 interconnect the connection terminals 34, mounting terminals 30 and connection pads 44, as discussed above. The mounting terminals 30 are located at a bottom side 78 of the package. The first end 23 and second end 24 desirably meet at the top end of the package. An additional die may be used to readjust the positions of the first end 23 and second end 24 in the event that the first end 23 and second end 24 are displaced with respect to one another after folding. For example, the first end 23 has a first lateral side 84 and a second lateral side 86, whereas the second end 24 has a first lateral side 88 and a second lateral side 90. If the first sides 84 and 88 are not aligned with one another, or if the second sides 86 and 90 are not aligned with one another, a further element or part placed on top of the package 70 may not be accurately bonded to the connection terminals 34. For example, a further element 92, shown in phantom lines in FIG. 5, typically has an area array of pads or other terminal structures for interconnection with the connection terminals 34. If the first end 23 and second end 24 are displaced with respect to one another, some of the connection terminals 34 might not meet up with the terminal structures on the additional element 92, or inferior connections may be formed. [0049] The package 70 discussed above with reference to FIG. 4 has a first set of traces 38 a extending along the substrate from the central part 22 of the substrate to the first end 23 and has a second set of traces 38 b extending from the central part 22 to the second end 24. At least some of the connection terminals 34 in the second end 24 of the substrate 20 are connected to at least some of the mounting terminals 30 in the central part 22 of the substrate or to the microelectronic device 10 on the central part 22 of the substrate by the traces 38 b of the second set, whereas at least some of the connection terminals 34 on the first end 23 of the substrate 20 are connected to the mounting terminals 30 or first microelectronic device 10 in the central part 32 by the first set of traces 38 a. Thus, in the folded package 70, the combined array of connection terminals 34 in the first end 23 and second end 24 at the top 76 of the package 70 is connected to mounting terminals 30 and device 10 at the bottom 78 of the package 70 in part by the first set of traces 38 a extending across one arcuate side 72 and in part by the second set of traces 38 b extending across the other arcuate side 74, on the other side of the package 70. This arrangement significantly simplifies routing of the traces within the substrate. The number of traces in each set can be one-half the number which would be required to connect all of the terminals using a single set of traces extending across a single fold. This simplified routing can reduce the number of metallic layers required in the substrate. In many cases, all of the traces can be formed in a single layer. [0050] Numerous variations and combinations of the features discussed above can be utilized without departing from the present invention. In one such variant, the roles of the mounting terminals and connection terminals discussed above are reversed. For example, the package of FIG. 4 can be mounted to the circuit board by connection terminals 34 and additional microelectronic devices or packages can be connected to mounting terminals 30. Similarly, the combined array of connection terminals at the top end 76 can be used to mount the package 70 to the circuit panel, so that the mounting terminals 30 face upwardly, away from the circuit panel. The mounting terminals can be used to connect an additional package or other device. Also, terminals other than the solder-bondable pads shown in the drawings, such as pins projecting from the substrate and adapted to be received in a socket, can be employed. [0051] In certain preferred embodiments, the connection terminals 34 comprise elongated pads, as shown in FIG. 6. Alternatively, the connection terminal 34 may be slightly larger to provide additional play in forming connections. In embodiments in which a first further element 94 is connected to the connection terminals 34 at the first end 23 and a second element 96 is connected to the connection terminal 34 at the second end 24, slight misalignment of the first end 23 and second end 24 may be inconsequential. [0052] The mounting terminals 30 are used to form connections with further elements, which may comprise any microelectronic elements, devices, components, etc. Typically, the mounting terminals are utilized to connect to terminals of a circuit panel, as shown in FIG. 7. Although the connections with the connection terminals 34 and mounting terminals 30 are shown utilizing bonding material, such as solder, these connections can be formed utilizing any conventional technique. [0053] In certain preferred embodiments, the substrate has a first alignment element 54 and a second alignment element 58 that engage one another upon folding of the substrate (See FIG. 7). The first alignment element 54 desirably comprises a feature of the overmolding 48. The engaged elements limit relative movement of the two ends 23 and 24 in at least some directions parallel to the planes of these parts of the substrate. As the parts are engaged with one another during the folding operation, the engagement of the first and second alignment elements 54 and 58 brings the two ends parts 23 and 24 of the substrate to the desired relative positions with respect to the central portion 22. The alignment elements desirably include inter-fitting parts that assure that the connection terminals 34 at the top end 76 of the assembly will lie in the desired positions in the horizontal directions relative to the mounting terminals 30. Consequently, if a further element is mounted on connection terminals 34, that further element also can be precisely registered with the mounting terminals 30 in the horizontal directions. The first alignment element 54 and second alignment element 58 may be formed as disclosed in certain embodiments of U.S. provisional application entitled Microelectronic Packages with Self-Aligning Features, filed Aug. 16, 2002, by inventors Bang, et al., the disclosure of which is hereby incorporated by reference herein. [0054] A further method in accordance with embodiments of the present invention is shown in FIGS. 8A through 8D. A microelectronic device 140 on a substrate 120 is provided, as shown in FIG. 8A. A die 160 having a first part 162 and a second part 164 defining an opening 163 is arranged with respect to the microelectronic device 140 and substrate 120 so that the microelectronic device 140 is aligned with the opening 163. As shown in FIG. 8B, the opening 163 has a pre-determined width W1, slightly larger than the width W of the microelectronic device 140. The device and substrate are moved downwardly into the opening to a recess 166 a formed in the first part 162 and recess 166 b in the second part 164. The recesses comprise a portion of the opening 163 that has a somewhat larger, predetermined width w2. This portion of the opening is defined by curved surfaces in the first part and second part of the die. As shown in FIG. 8B, as the substrate 120 and device 140 are advanced downwardly, the substrate 120 is folded by the edges 177 a and 177 b of the die, and pivot around axes 82 and 83. [0055] As shown in FIG. 8C, the first end 123 and the second end 124 of the substrate are folded inwardly towards the device 140 as the curved surfaces in recesses 166 engage the substrate 120. The folding of the substrate is completed by the introduction of a third part 165 into the opening 163. The third part 165 is advanced downwardly to engage the first end 123 and second end 124 with the top surface 150 of the device (FIG. 8D). The inner surface 126 of the substrate 120 carries an adhesive, at least on the first end 123 and second end 124, so that when the first end 123 and second end 124 are engaged with the top surface 150, the first end 123 and second end 124 are adhered thereto. In other preferred embodiments, the first part 162 and second part 164 of the die 160 may be moved inwardly toward the device 140, to achieve further, progressive folding of the substrate 120 over the device 140. [0056] In a further embodiment of the present invention, a device 240 on a substrate 220 is provided, as shown in FIG. 9A. As shown in FIG. 9B, a die 260 having a first part 262 and a second part 264 is provided so that an opening 263 in the die 260 is arranged with the device 240 and substrate 220. The first part 262 has a recess 266 a and second part 264 has a recess 266 b forming curved surfaces. The device 240 and substrate 220 are advanced into the opening so that the curved surfaces defined on the first part and second part partially fold the first end 223 and second end 224 of the substrate toward the device, pivoting the ends of the substrate around their respective axes 82 and 83. (FIG. 9B) After the device and substrate reaches the bottom 269 of the opening 263, a first plate 267 and second plate 270 are advanced over the opening (FIGS. 9C and 9D). For example, the first plate 267 and second plate 270 may slide upon upper surfaces of the first part 262 and second part 264 so that the first plate 267 and second plate 270 are advanced toward the opening 263 and engage the first end 223 and second end 224 of the substrate 220. As the first plate 267 and second plate 270 approach one another, the first end and second end of the substrate are progressively folded downwardly toward the top surface 250 of the device 240, as shown in FIG. 9D. Adhesive is disposed on the inner surface of the substrate, at least at the first end 223 and second end 224 so that the first end 223 and second end 224 are adhered to the top surface 250 of the device during or after engagement with the first plate 267 and second plate 270. In further embodiments, dies having one or more parts with surfaces for engaging the substrate are utilized to fold the substrate in a progressive manner, or in a single engagement with a single die. Although figures discussed above show dies with curved recesses, any other shape may be used. [0057] As shown in FIG. 10, a die having a single part 362 may be used to fold a substrate 320 in a method for forming a package 370. In the embodiment shown, the die part 362 includes a U-shaped recess 366. A device 340 on a substrate 320 is provided so that a second end 324 of the substrate 320 extends outwardly away from the device, substantially horizontally. The device 340 is disposed at the first end 323 of the substrate 320. The die part 362 is advanced toward the device so that the substrate's second end 324 engages the recess 366. The recess 366 of the die includes a curved surface 376. As the die part 362 advances towards the device 340, the second end 324 engages the curved surface 376, is oriented upwardly, and then travels back over the device 340, pivoting around axis 382. The substrate 320 has an adhesive disposed on the inner surface, at least in the second end 324, so that during or after engagement with the die part 362, the substrate 320 is adhered to the top 350 of the device 340. The die is generally as discussed above, except that the dimensions of the recess 366 determine the desired size and dimensions for the entire package, whereas the recesses in parts 62 and 64 cooperatively determine those dimensions. [0058] The packages formed may be mounted to a circuit panel by attaching mounting terminals 30 to contact pads 98 of a circuit panel 97. Before or after the package is mounted to the circuit panel, one or more additional parts 99 such as additional packaged or unpackaged microelectronic parts can be mounted to the top of the package, as by connecting such additional devices to the connection terminals 34, as shown in FIGS. 11 and 12. The additional package may be a package identical to the package of FIG. 4 and two or more such packages can be connected in a stack. [0059] Several microelectronic devices may be included all enclosed in a common mass of overmolding and incorporated in a folded package. The substrate preferably includes alignment elements that inter-engage with one another, as discussed above, to assure that the overlapping portions of the substrate are in precise registration with one another. In further embodiments, a plurality of devices 440 may be disposed on a single substrate 420 in the form of a strip, sheet or tape, and folded as shown in FIGS. 13 and 14. After the adhesive has set and formed a bond, the component may be severed, as by cutting along one or more of the lines 441, so as to separate portions of the folded component from one another and form individual units, each including one or more of the microelectronic devices 440 and the associated portions of the folded substrate 420. The devices may or may not be incorporated in the same overmolding 448. At the same time, the substrate can be severed along further lines so as to trim off undesired portions of the substrate, or fewer lines so as to include more than one element or device in the package with the folded substrate. [0060] Methods according to embodiments of the present invention can be used in more complex folded structures. For example, as disclosed in commonly-assigned, co-pending U.S. patent application Ser. No. 10/077,388, filed Feb. 15, 2002, the disclosure of which is hereby incorporated by reference herein. A substrate in a generally cruciform shape having multiple arms extending from a central region can be folded utilizing one or more die parts, in one or more steps so that the various arms all overlie the central region, and so that microelectronic devices positioned on all of the arms are stacked one above the other. In addition, one or more die parts may be used to form the serpentine structure disclosed in certain embodiments of U.S. Pat. No. 6,225,688, the disclosure of which is hereby incorporated by reference herein. [0061] In further embodiments of the invention, folding elements are used to engage and/or guide the substrate. As shown in FIG. 15, for example, the step of folding includes engaging substrate 520 with folding elements 565 a, 565 b, 565 c, and 565 d. Folding element 565 a is arranged on an upper side of the substrate 520 and folding element 565 c is arranged on a lower side of the substrate so as to grip the substrate between the folding elements 565 a and 565 c. Folding elements 565 b and 565 d are similarly arranged on either side of the substrate, except that these elements are disposed on the opposite side of the microelectronic element 510 from the folding elements 565 a and 565 c. The substrate is gripped by the pairs of folding elements while engaged by an engagement surface of first die part 562 and second die part 564. In other embodiments, folding elements 565 c and 565 d are eliminated and folding elements 565 a and 565 b are used to guide the folding of the substrate. [0062] In further embodiments, as shown in FIG. 16, the microelectronic element 610 is engaged by holding elements 657 a and 657 b during the folding step. Folding elements 656 a and 656 b may also be used to engage and/or guide the substrate 620 during folding. [0063] As these and other variations and combinations of the features discussed above can be utilized without departing from the present invention, the foregoing description of the preferred embodiment should be taken by way of illustration rather than by way of limitation of the invention as defined by the claims. Referenced byCiting PatentFiling datePublication dateApplicantTitleUS6841855 *Apr 28, 2003Jan 11, 2005Intel CorporationElectronic package having a flexible substrate with ends connected to one anotherUS6956288 *Jan 12, 2004Oct 18, 2005Matsushita Electric Industrial Co., Ltd.Semiconductor device with folded film substrate and display device using the sameUS6992376 *Jul 17, 2003Jan 31, 2006Intel CorporationElectronic package having a folded package substrateUS7129576Sep 24, 2004Oct 31, 2006Tessera, Inc.Structure and method of making capped chips including vertical interconnects having stud bumps engaged to surfaces of said capsUS7157309Sep 27, 2004Jan 2, 2007Tessera, Inc.Manufacture of microelectronic fold packagesUS7214563 *Dec 29, 2005May 8, 2007Fujitsu LimitedIC chip mounting methodUS7298030Sep 24, 2004Nov 20, 2007Tessera, Inc.Structure and method of making sealed capped chipsUS7425758Aug 28, 2006Sep 16, 2008Micron Technology, Inc.Metal core foldover package structuresUS7485951 *May 9, 2003Feb 3, 2009Entorian Technologies, LpModularized die stacking system and methodUS7563645 *Nov 10, 2005Jul 21, 2009Intel CorporationElectronic package having a folded package substrateUS7915077Jul 28, 2008Mar 29, 2011Micron Technology, Inc.Methods of making metal core foldover package structuresUS8115112Aug 29, 2008Feb 14, 2012Micron Technology, Inc.Interposer substrates and semiconductor device assemblies and electronic systems including such interposer substratesUS8164180 *Mar 17, 2008Apr 24, 2012Ricoh Company, Ltd.Functional element package and fabrication method thereforUS20100072562 *Mar 17, 2008Mar 25, 2010Ricoh Company, Ltd.Functional element package and fabrication method thereforWO2008027746A2 *Aug 20, 2007Mar 6, 2008Micron Technology IncMetal core foldover packages structures, systems including the same and methods of fabrication* Cited by examinerClassifications U.S. Classification438/125, 29/832, 257/E23.177, 257/E25.023International ClassificationH01L23/31, H01L23/498, H01L25/065, H01L25/10, H01L23/538Cooperative ClassificationH01L24/48, H01L2224/48227, H01L2225/1058, H01L2225/1023, H01L2225/1041, H01L2924/01078, H01L2225/06517, H01L2924/01013, H01L23/5387, H01L2225/06579, H01L2224/48091, H01L2224/97, H01L2225/0651, H01L2924/01082, H01L23/4985, H01L2924/01033, H01L24/97, H01L2924/3011, H01L2224/48471, H01L2924/01079, H01L2924/01074, H01L23/3121, H01L2224/16, H01L2224/48228, H01L2924/15311, H01L25/0657, H01L2924/01027, H01L2225/06586, H01L25/105, H01L2924/01005, H01L2924/01029European ClassificationH01L24/97, H01L25/065S, H01L23/498J, H01L23/31H2, H01L23/538J, H01L25/10JLegal EventsDateCodeEventDescriptionJan 20, 2011FPAYFee paymentYear of fee payment: 4Oct 9, 2003ASAssignmentOwner name: TESSERA, INC., CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BANG, KYONG-MO;KANG, TECK-GYU;REEL/FRAME:014570/0906Effective date: 20031003RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services