Source: http://www.google.com/patents/US20030033462?dq=6377161
Timestamp: 2016-09-29 07:41:25
Document Index: 502623814

Matched Legal Cases: ['ART) 120', 'ART) 120', 'ART 120', 'ART 120', 'ART 120', 'ART 120']

Patent US20030033462 - GPS card reader - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA global positioning system (GPS) card reader comprises a bus connection interface, a GPS module, a universal asynchronous receiver transmitter (UART) coupled with the GPS module and a complex programmable logic circuit comprising a complex programmable logic device. The complex programmable logic circuit...http://www.google.com/patents/US20030033462?utm_source=gb-gplus-sharePatent US20030033462 - GPS card readerAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS20030033462 A1Publication typeApplicationApplication numberUS 09/924,994Publication dateFeb 13, 2003Filing dateAug 8, 2001Priority dateAug 8, 2001Also published asUS6754756Publication number09924994, 924994, US 2003/0033462 A1, US 2003/033462 A1, US 20030033462 A1, US 20030033462A1, US 2003033462 A1, US 2003033462A1, US-A1-20030033462, US-A1-2003033462, US2003/0033462A1, US2003/033462A1, US20030033462 A1, US20030033462A1, US2003033462 A1, US2003033462A1InventorsCheng-Chih Chien, Bing-Fei Wu, Jou-Wei Fu, Lung-Yi Kuo, Chung-Chi TienOriginal AssigneeCheng-Chih Chien, Bing-Fei Wu, Jou-Wei Fu, Lung-Yi Kuo, Chung-Chi TienExport CitationBiBTeX, EndNote, RefManPatent Citations (8), Classifications (4), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetGPS card reader
US 20030033462 A1Abstract
A global positioning system (GPS) card reader comprises a bus connection interface, a GPS module, a universal asynchronous receiver transmitter (UART) coupled with the GPS module and a complex programmable logic circuit comprising a complex programmable logic device. The complex programmable logic circuit connects with the bus connection interface and comprises at least: a card information structural (CIS) memory, am address decoder, a power control register, and a storage card coupling for connecting a storage card. Images(4) Claims(11)
What is claimed is: 1. A global positioning system (GPS) card reader, comprising: a bus connection interface; a global positioning system (GPS) module; a universal asynchronous receiver transmitter (UART) in connection with the GPS module and a complex programmable logic circuit; the complex programmable logic circuit, which is composed of a complex programmable logic device (CPLD) and coupled to the bus connection interface, further comprising at least a card information structural (CIS) memory, an address decoder, and a power control register; and a storage card coupling for connecting with a storage card. 2. The GPS card reader according to claim 1, further comprising: a clock generator connected with the UART and the complex programmable logic circuit respectively; and a power regulator. 3. The GPS card reader according to claim 1, further comprising: a semiconductor memory in connection with at least the bus connection interface for storing program codes. 4. The GPS card reader according to claim 3, wherein the semiconductor memory is a read only memory (ROM). 5. The GPS card reader according to claim 1, wherein the storage card is implemented for storing e-map data. 6. The GPS card reader according to claim 1, wherein the bus connection interface is a compact flash (CF) bus connection interface. 7. The GPS card reader according to claim 1, wherein the bus connection interface is a connection interface of the springboard expansion slot of the Handspring. 8. The GPS card reader according to claim 1, wherein the storage card coupling is a compact flash (CF) connection interface. 9. The GPS card reader according to claim 1, wherein the storage card coupling is a secure digital (SD) memory card coupling. 10. The GPS card reader according to claim 1, wherein the storage card coupling is a Multimedia coupling. 11. The GPS card reader according to claim 1, wherein the storage card coupling is a Smartmedia coupling.
FIELD OF THE INVENTION [0001] This invention relates generally to an expansion or extension device for hand held communication equipments, such as a personal digital assistant (PDA) or the like, particularly to a global positioning system (GPS) card reader. BACKGROUND OF THE INVENTION [0002] After debut of the personal digital assistant (PDA) not long ago, a lot of associative expansion or extension devices for flash memory or digital camera for example have been developed and commercialized continuously one after another, and meanwhile, on the other hand, a global positioning system (GPS) which is already implemented in aviation or navigation is mushroomed recently for application in vehicles. Consequently, a very important issue is—“How can the GPS work efficiently together with a hand held communication machine?”
SUMMARY OF THE INVENTION [0003] The primary object of this invention is to provide an expansion device capable of dealing with GPS data for a hand held communication equipment. [0004] In order to realize abovesaid object, a GPS card reader of this invention comprises: a bus connection interface; a GPS module; a universal asynchronous receiver transmitter (UART) coupled respectively with the GPS module and a complex programmable logic circuit composed of a complex programmable logic device (CPLD) and coupled to the bus connection interface, wherein the complex programmable logic circuit further. comprises a card information structural (CIS) memory, an address decoder, as well as a power control register; and a storage card coupling for connection with a storage card. [0005] The GPS card reader of this invention further comprises: a clock generator coupled respectively with the UART and the complex programmable logic circuit; a power regulator; and a semiconductor memory connected at least with the bus connection interface for storing program codes. [0006] For more detailed information regarding advantages or features of this invention, at least an example of preferred embodiment will be elucidated below with reference to the annexed drawings.
BRIEF DESCRIPTION OF THE DRAWINGS [0007] [0007]FIG. 1 shows a circuitry framework of this invention. [0008] [0008]FIG. 2 shows a schematic structure of a complex programmable logic circuit of this invention. [0009] [0009]FIG. 3 is a schematic view showing that this invention is applied in a PDA.
DETAILED DESCRIPTION OF THE INVENTION [0010] As indicated in a circuitry framework of this invention shown in FIG. 1, a global positioning system (GPS) card reader 10 comprises: a bus connection interface 100; a GPS module 110; a universal asynchronous receiver transmitter (UART) 120 coupled respectively with the GPS module 110 and a complex programmable logic circuit 130 composed of a complex programmable logic device (CPLD) and coupled to the bus connection interface 100, wherein the complex programmable logic circuit further comprises a card information structural (CIS) memory 130 a, an address decoder 130 b, as well as a power control register 130 c; and a storage card coupling 140 for connection with a storage card 20. [0011] The bus connection interface 100 may be a compact flash (CF) bus connection interface or a connection interface of springboard expansion slot of the Handspring. The GPS module 110 is the same with the conventional for receiving global geographical positional wireless signals and transmitting the same to the universal asynchronous receiver transmitter (UART) 120 via a UART interface of RS232 or the like. The storage card coupling 140 is used to connect the storage card 20, such as a CF memory card, a Secure digital (SD) memory card, a Multimedia card, a Smartmedia card, and embodied substantially as a CF card coupling, a SD memory card coupling, a Multimedia card coupling, or a Smartmedia card coupling. In application, the storage card 20 should be capable of storing at least the e-map data of a district. [0012] [0012]FIG. 2 shows a schematic structure of a complex programmable logic circuit of this invention. The CIS memory 130 a is implemented for storing various values defined under CF regulations or interface regulations of springboard expansion slot of the Handspring. The address decoder 130 b is arranged to decode signals from the bus connection interface 100 to map individual components of the GPS card reader 10. For example, the address decoder 130 b decodes the offset signals of the storage card coupling 140 as of 0˜15, the UART 120 as of 16˜31, and the power control register 130 c as of 32˜48. [0013] Moreover, the bits of the power control register 130 c are assigned for different functions, such as: bit 0 for controlling power “enable” of the storage card coupling 140; bit 1 for controlling power “enable” of the UART 120; bit 2 for controlling power “enable” of the GPS module 110; bit 3 for resetting the storage card coupling 140; bit 4 for resetting the UART 120; bit 5 for resetting the GPS module 110; and bit 6 for controlling “enable” of a clock generator 160. [0014] [0014]FIG. 3 is a schematic view showing that this invention is applied in a personal digital assistant (PDA). A PDA 30 is provided with a connection interface resembling the CF bus connection interface or a connection interface of the springboard expansion slot of the Handspring for connecting the PDA 30 to the GPS card reader 10 which is also in connection with the storage card 20 having deposited at least the e-map data of a district. [0015] The GPS card reader 10 further comprises a semiconductor memory 150, which may be a read only memory (ROM), connected at least to the bus connection interface 100 for storing program codes. As the codes deposited semiconductor memory 150 has already an I.D. code and program codes conforming to the interface regulations of the Handspring, hence it can work in cooperation with the Handspring's PDA without needing of performing setup formalities to the PDA. [0016] In the GPS card reader 10, the clock generator 160 is coupled separately to the UART 120 and the complex programmable logic circuit 130, and a power regulator 170 is used for providing an optimum working voltage. [0017] In the above described, at least one preferred embodiment has been described in detail with reference to the drawings annexed, and it is apparent that numerous variations or modifications may be made without departing from the true spirit and scope thereof, as set forth in the claims below. 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