Source: http://www.google.com/patents/US6403460?dq=6985872
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Matched Legal Cases: ['application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09']

Patent US6403460 - Method of making a semiconductor chip assembly - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA method of manufacturing a semiconductor chip assembly includes providing a semiconductor chip that includes a conductive pad, and providing a support circuit that includes an insulative base and a conductive trace. One embodiment includes mechanically attaching the chip to the support circuit using...http://www.google.com/patents/US6403460?utm_source=gb-gplus-sharePatent US6403460 - Method of making a semiconductor chip assemblyAdvanced Patent SearchPublication numberUS6403460 B1Publication typeGrantApplication numberUS 09/878,522Publication dateJun 11, 2002Filing dateJun 11, 2001Priority dateAug 22, 2000Fee statusLapsedPublication number09878522, 878522, US 6403460 B1, US 6403460B1, US-B1-6403460, US6403460 B1, US6403460B1InventorsCharles W. C. LinOriginal AssigneeCharles W. C. LinExport CitationBiBTeX, EndNote, RefManPatent Citations (103), Non-Patent Citations (16), Referenced by (9), Classifications (43), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetMethod of making a semiconductor chip assembly
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C. LinSemiconductor chip assembly with hardened connection jointUS6551861 *Aug 22, 2000Apr 22, 2003Charles W. C. LinMethod of making a semiconductor chip assembly by joining the chip to a support circuit with an adhesiveUS6562657 *Aug 22, 2000May 13, 2003Charles W. C. LinSemiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection jointUS6562709 *May 24, 2001May 13, 2003Charles W. C. LinSemiconductor chip assembly with simultaneously electroplated contact terminal and connection jointUS6583040 *May 28, 2002Jun 24, 2003Bridge Semiconductor CorporationMethod of making a pillar in a laminated structure for a semiconductor chip assemblyUS6622905 *Dec 29, 2000Sep 23, 2003Intel CorporationDesign and assembly methodology for reducing bridging in bonding electronic components to pads connected to viasUS6777314 *Aug 2, 2002Aug 17, 2004Lsi Logic CorporationMethod of forming electrolytic contact pads including layers of copper, nickel, and goldUS6808962 *Jul 31, 2001Oct 26, 2004Dai Nippon Printing Co., Ltd.Semiconductor device and method for fabricating the semiconductor deviceUS7354797 *May 1, 2006Apr 8, 2008Infineon Technologies AgMethod for producing a plurality of electronic devices* Cited by examinerClassifications U.S. Classification438/618, 438/637, 257/693, 257/E21.508, 438/622, 438/666, 257/778, 257/E21.175, 257/E23.021, 438/108International ClassificationH01L23/485, H01L21/288, H01L23/31, H01L21/60Cooperative ClassificationH01L2224/13099, H01L2924/01027, H01L24/12, H01L2924/01046, H01L2924/01079, H01L2924/01013, H01L2924/09701, H01L2924/01082, H01L2924/01015, H01L2924/01074, H01L21/2885, H01L23/3114, H01L2924/3025, H01L2924/01029, H01L2924/01047, H01L2924/01012, H01L2224/0231, H01L2924/01002, H01L24/11, H01L2924/01078, H01L2924/0104, H01L2924/01033, H01L2924/014, H01L2924/01005, H01L2924/01006European ClassificationH01L24/11, H01L24/12, H01L23/31H1, H01L21/288ELegal EventsDateCodeEventDescriptionJul 29, 2014FPExpired due to failure to pay maintenance feeEffective date: 20140611Jun 11, 2014LAPSLapse for failure to pay maintenance feesJan 17, 2014REMIMaintenance fee reminder mailedDec 1, 2009FPAYFee paymentYear of fee payment: 8Sep 8, 2005FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services