Source: http://www.google.com/patents/US20050225250?dq=7,173,247
Timestamp: 2017-04-29 04:30:00
Document Index: 617389495

Matched Legal Cases: ['art 1002', 'art 1003', 'art 1003', 'art 1022', 'art 1023', 'art 1023', 'art 1013', 'art 1032', 'art 1032', 'art 1042', 'art 1043', 'art 1044', 'art 1044', 'art 1044']

Patent US20050225250 - Light emitting device and drive method thereof - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsThe reliability of an EL element is enhanced while the increase of the electric power consumption is suppressed. It becomes possible that in a SES drive, the reverse bias is applied to the EL element driven at a constant electric current. Moreover, the application of the reverse bias is performed by...http://www.google.com/patents/US20050225250?utm_source=gb-gplus-sharePatent US20050225250 - Light emitting device and drive method thereofAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS20050225250 A1Publication typeApplicationApplication numberUS 11/147,527Publication dateOct 13, 2005Filing dateJun 8, 2005Priority dateMar 1, 2002Also published asUS7023141, US7276856, US7542018, US7592991, US20030209989, US20060108936, US20080036709Publication number11147527, 147527, US 2005/0225250 A1, US 2005/225250 A1, US 20050225250 A1, US 20050225250A1, US 2005225250 A1, US 2005225250A1, US-A1-20050225250, US-A1-2005225250, US2005/0225250A1, US2005/225250A1, US20050225250 A1, US20050225250A1, US2005225250 A1, US2005225250A1InventorsAya Anzai, Mitsuaki Osame, Yoshifumi Tanada, Keisuke Miyagawa, Satoshi Seo, Shunpei YamazakiOriginal AssigneeSemiconductor Energy Laboratory Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (21), Referenced by (12), Classifications (24), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetLight emitting device and drive method thereof
DESCRIPTION OF THE PREFERRED EMBODIMENTS [0000] Embodiment 1 [0062] A pixel configuration and its driving method for the purpose of solving the problem will be described with reference to FIG. 1D below. [0063] The respective pixels have a source signal line 111, a gate signal line for writing 112, a gate signal line for blanking 113, a TFT for switching 115, a TFT for blanking 116, a TFT for driving 117, an EL element 118 and an electric current supplying line 114, respectively, one side of the EL element is connected to a source electrode of the TFT for driving 117 or a drain electrode (pixel electrode), the other side has been connected to the counter electrode 119. Moreover, a switch 120 is connected to the counter electrode 119, at the time when the forward bias is applied, it can be switched to the potential of Vc1 and at the time when the reverse bias is applied, it can be switched to the potential of Vc2. [0064] Here, the TFT for switching 115, the TFT for blanking 116 are N-channel type TFTs, the TFT for driving 117 is a P-channel type TFT, and in the EL element 118, the side connected to the TFT for driving 117 is made as an anode, the side connected to the counter electrode 119 is made as a cathode. Moreover, for the purpose of making the description clearer, examples of voltage values are shown within the parenthesis ( ). However, these potentials are solely examples, when it is driven by the following methods, it may be appropriately set at the desired potential. [0065] According to the picture signal, in the period in which the forward bias is applied to the light emitting EL element 118, the potential of the counter electrode 119 becomes the potential of Vc1 (−10 V) by the switch 120. First, a pulse is inputted into the gate signal line for writing 112, it becomes H level (8V), the TFT for switching 115 is turned ON, the picture signal outputted to the source signal line 111 is applied to the gate electrode of the TFT for driving 117. Here, since the TFT for driving 117 is a P-channel type TFT, at the time when the picture signal is at H level (6 V), it is turned OFF, and at the time when it is at L level (0 V), it is turned ON. [0066] Subsequently, by turning the TFT for driving 117 ON, the electric current flows through the EL element 118 from the electric current supplying line 114 (5 V) towards the counter electrode 119 whose potential is at Vc1 (−1.0 V), and the light emits. The TFT for driving 117 operates in the saturation region. Moreover, when the TFT for driving 117 is turned OFF, the electric current does not flow into the EL element 118, it becomes in a non-light emitting state. [0067] Subsequently, a pulse is inputted into the gate signal line for blanking 113, it becomes H level (8 V), and the TFT for blanking 116 is turned ON. The potential of the electric current supplying line 114 (5V) is inputted to the gate electrode of the TFT for driving 117 by turning ON the TFT for blanking 116, the voltage between the gate and the source of the TFT for driving 117 becomes 0, the TFT for driving 117 is turned OFF. Hence, the EL element 118 becomes in a non-light emitting state. [0068] In the case where the reverse bias period is applied to the EL element 118, the potential of the counter electrode 119 is switched to the potential of Vc2 (10 V) by the switch 120. This potential may be made in common with the potential of the source signal line drive circuit or the gate signal line drive circuit. Here, it is made in common with the electric source of the gate signal line drive circuit. The capacitance between the counter electrode 119 (cathode) and the pixel electrode (anode) is large, the potential of the pixel electrode is raised to the direction of plus by the change (20 V) at the time when the potential of the counter electrode 119 is switched from Vc1 to Vc2. At this time, since the potential of the gate electrode of the TFT for driving 117 is maintained at the voltage (5 V) at the time of blanking, the potential of the pixel electrode becomes a value (about 7 V) that the threshold voltage (about 2 V) of the TFT for driving 117 has been added to the potential (5V) of the gate electrode of the TFT for driving 117, whereby the reverse bias voltage (about 3 V) is applied to the EL element 118. [0069] By the above-described operation, the reverse bias voltage is applied to the EL element, thereby being capable of suppressing the initial deterioration of the EL element which has been considered as a problem. Furthermore, at the time when the reverse bias voltage is applied, only the counter electrode is changed, in the TFT for driving and the TFT for blanking connected to the electric current supplying line, the voltage between the gate and the source is not influenced at all. Hence, this does not increase significantly the consumption of electric power of the gate signal line drive circuit. [0070] Embodiment 2 [0071] A pixel configuration and its driving method for the purpose of solving the problem will be described with reference to FIG. 1E below. [0072] The respective gate signal lines for writing have a switch 121, at the time when the forward bias is applied, Vc3 is selected and at the time when the reverse bias is applied, Vc4 is selected. At the time when Vc3 was selected, an output pulse from a shift register of the gate driver is outputted to the gate signal line for writing, and at the time when Vc4 was selected, the potential at which the TFT for switching becomes in an ON state is outputted to the gate signal line for writing of all lines at the same time. [0073] The operation at the time when the forward bias is applied is the same with that of Embodiment 1. At the time when the reverse bias is applied, the potential of the counter electrode is switched to Vc2 (8 V). The electric source of Vc2 may be made in common with the electric source of the source signal line drive circuit or the gate signal line drive circuit. Here, it is made in common with the electric source of the source signal line drive circuit [0074] Next, the source signal line drive circuit is operated so that all of the potentials of the source signal line become L level (0 V). [0075] Moreover, the potentials of the gate signal lines for writing of all lines are made Vc4 (10 V) by the switch 121, whereby the TFTs for switching are all turned ON at the same time, the potential of the gate electrode of the TFT for driving is the same with the potential of the source signal line, that is, L level (0 V). Hence, the TFT for driving it turned ON, the potential of the pixel electrode becomes the potential of the electric current supplying line (5 V) and the reverse bias voltage (3 V) is applied. [0076] According to the present Embodiment, compared to Embodiment 1, the potential of the pixel electrode at the time when the reverse bias is applied is lowered by the portion of the threshold voltage of the TFT for driving, whereby in the case where the same reverse bias voltage is applied, the potential of the counter electrode at the time when the reverse bias is applied can be lowered by the portion of the threshold voltage of the TFT for driving, and the consumption of electric power can be reduced. EXAMPLES [0077] Hereinafter, Examples of the present invention will be described. Example 1 [0078] As shown in FIG. 9, in the case where the light emitting device is used as a display part of an electronic apparatus of a cellular phone or the like, it is self-contained in a form of a light emitting device 901. Here, the light emitting device 901 indicates the form in which a panel and a substrate on which a LSI for processing a signal for driving the light emitting device, a memory and the like have been mounted are connected with each other. [0079] FIG. 4A shows a block diagram of the light emitting device 901. The light emitting device 901 has a panel 450 and a drive circuit 460. [0080] The drive circuit 460 has a signal generation section 411 and an electric source section 412. The electric source section 412 generates electric sources having a plurality of the desired voltage values, respectively, from the electric source supplied by the external battery and supplies to the source signal line drive circuit, the gate signal line drive circuit, a light emitting element, the signal generation section 411 and the like, respectively. An electric source, a picture signal and a synchronization signal are inputted into the signal generation section 411, a clock signal and the like for driving the source signal line drive circuit and the gate signal line drive circuit are generated as well as the conversions of a variety of signals are performed so as to be capable of processing in the display device 450. Moreover, a selection section 413 for switching the input electric source between the drive circuit 460 and the panel 450 is provided. [0081] Moreover, the panel 450 is configured with a pixel section 401, a source signal line drive circuit 402, a gate signal line drive circuit for writing 403, a gate signal line drive circuit for blanking 404, an electric current supplying line 405, a counter electrode contact 406, a FPC 407 and the like on the substrate. At the center section of the substrate, the pixel section 401 is arranged, and in the peripheral section, the source signal line drive circuit 402, the gate signal line drive circuit for writing 403, the gate signal line drive circuit for blanking 404 and the like are arranged. The supply of the signal and electric source for driving the source signal line drive circuit 402, the gate signal line drive circuit for writing 403, the gate signal line drive circuit for blanking 404 is performed through the FPC 407 by the drive circuit 460. The counter electrode of the EL element is formed on the whole surface of the pixel section 401, the potential is given through the FPC 407. The potential of this counter electrode can be switched by the selection section 413 in order to apply the reverse bias. [0082] FIG. 4B is an example in which the selection section 413 is integrally formed on the panel 450. [0083] Moreover, the panel 450, the selection section 413, the signal generation section 411 and the electric source section 412 may be also integrally formed on the substrate. Example 2 [0084] A schematic diagram of a source signal line drive circuit is shown in FIG. 5 and a schematic diagram of a gate signal line drive circuit is shown in FIG. 6 in the case where the display of the picture image is performed using a digital picture signal. [0085] The source signal line drive circuit has a shift register 502 using a plurality of D-flip flops 501, a first latch circuit 503 a, a second latch circuit 503 b, a level shifter 504, a buffer 505 and the like. Signals inputted from the external are a clock signal (S-CK), an inversed clock signal (S-CKb), a start pulse (S-SP) and a digital picture signal (Digital Video Data). In the case of the configuration like FIG. 5, digital picture signals are inputted, for example, in such a way as “in the first bit, first line→second line→ . . . →final line; in the second bit, first line→second line→ . . . →final line; in the third bit, first line→second line . . . ” in series. [0086] First, according to the timings of a clock signal, a clock inverted signal and a start pulse, the sampling pulses are in turn outputted from the shift register 502. Subsequently, the sampling pulse is inputted into the first latch circuit 503 a, takes in and maintains the digital picture signals of the respective rows at the timing that the sampling pulses have been inputted. [0087] When the maintaining of the digital picture signal is completed in the first latch circuit 503 a at the final stage, a latch pulse is inputted during the horizontal fly-back period, and in this timing, the digital picture signals maintained in the first latch circuit 503 a are transmitted to the second latch circuit 503 b at the same time. Then, in the level shifter, these are subjected to the conversion of the amplitude of the pulses, subsequently after the picture signal waveform has been shaped in the buffer, these are outputted to source signal lines S1-Sx. [0088] On the other hand, the gate signal line drive circuit has a shift register 602 composed of a plurality of D-flip flops 601, a level shifter 603, a buffer 604 and the like. Signals inputted from the external are a clock signal (G-CK), an inversed clock signal (G-CKb) and a start pulse (G-SP). [0089] First, according to the timings of a clock signal, a clock inversed signal, and a start pulse, pulses are in turn outputted from the shift register 602. Subsequently, these are subjected to the conversion of the amplitude of the pulse in the level shifter 603, and subsequently, after the pulse waveform has been shaped in the buffer, these are outputted to the respective gates signal lines as pulses for in turn selecting gate signal lines G1-Gy. When the selection on the final line Gy is terminated, after passing through the vertical fly-back period, again, the pulses are outputted from the shift register 602, and the selections of the gate signal lines are in turn performed. Example 3 [0090] The actual driving timing in the case where the pixel configuration listed in Embodiment 1 is SES driven and the reverse bias is applied will be described below with reference to FIG. 1. FIGS. 1A and 1B show timing charts, FIG. 1 C shows potential of the counter electrode, and FIG. 1 D shows the pixel configuration. [0091] As shown in FIG. 1 A, one frame period is divided into four subframe periods SF1-SF4. The respective subframes have an address (writing) period Ta and a sustain (light emitting) period Ts. Moreover, in a subframe in which an address (writing) period Ta is longer than a sustain (light emitting) period Ts (where SF3 and SF4 are relevant), a blanking period Tr, a non-light emitting period Te and a reverse bias period Tb as well as the address (writing) period Ta and the sustain (light emitting) period Ts are provided. [0092] The address (writing) period Ta is a period in which a digital picture signal is written in the pixel, the sustain (light emitting) period Ts is a period in which the display is performed by making the EL element in a light emitting state or in a non-light emitting state based on the digital picture signal written in the address (writing) period Ta. The light emitting time of each pixel per one frame period is determined depending upon the fact that in which subframe the EL element emits the light, and the gradation display is performed using the difference between these light emitting times. [0093] The blanking period Tr is a period in which a signal for forcibly making the EL element into a non-light emitting state is inputted, the non-light emitting period Te is a period in which the EL element becomes in a non-light emitting state based on the signal inputted in the blanking period Tr. Moreover, the reverse bias period Tb is a period in which the reverse bias is applied to the EL element. [0094] As for an operation, first, in an address (writing) period Ta1 of SF1, the pulses are in turn inputted into the gate signal line for writing 112 from the first line, a digital picture signal for the purpose of turning the TFT for switching 115 ON, turning the TFT for driving 117 ON and OFF is written in each pixel. On a line where the digital picture signal is written, it is immediately transferred to the sustain (light emitting) period Ts1. When the writing work is completed from the first line to the final line, the address (writing) period Ta1 is terminated. After the sustain (light emitting) period Ta1 has been terminated, again, the pulses are in turn inputted into the gate signal line for writing 112 from the first line, the address (writing) period Ta2 of SF2 is initiated, and transferred to the sustain (light emitting) period Ts2. [0095] Subsequently, the address (writing) period Ta3 of SF3 is initiated. Here, since the sustain (light emitting) period Ts3 is shorter than the address (writing) period Ta3, immediately after the sustain (light emitting) period Ts3 has been terminated, it cannot transfer to the next address (writing) period Ta4. Therefore, when the sustain (light emitting) period Ts3 of the respective lines is terminated, the blanking period Tr3 is initiated. In the blanking period Tr3, the pulses are in turn inputted from the first line to the gate signal line for blanking 113, the TFT for blanking 116 is turned ON, the light emitting of the EL element 118 is forcibly stopped, and thereinafter, it becomes a non-light emitting period Te3. [0096] At this time, in the usual SES drive method, the length of a non-light emitting period is a period from the time when the sustain (light emitting) period of the first line is terminated to the time when the address (writing) period of the final line is terminated. In a non-light emitting period Te, since the potential of the gate electrode of the TFT for driving 117 is maintained, the TFT for driving 117 continues to be in an OFF state. [0097] After the non-display period Te3 has been terminated, it is transmitted to the reverse bias period Tb3. Since in the reverse bias period Tb3, the potential of the counter electrode is changed as shown in FIG. 1 C, after the blanking period Tr3 is terminated, the non-light emitting period Te3 is extended more than that at the time when the usual SES drive is performed, which is necessary to provide it during the foregoing non-light emitting period. [0098] In the reverse bias period Tb3, the potential of the counter electrode is heightened more than the potential of the pixel electrode and the reverse bias is applied to the EL element 118 by switching the switch 120 from the Vc1 to Vc2. [0099] At the time when the desired reverse bias period Tb3 has been terminated, the potential of the counter electrode is switched from Vc1 to Vc2. At the same time, the next address (writing) period Ta4 is initiated. Hereinafter, the similar operation as SF3 is repeated, when the SF4 is terminated, one frame is terminated, and transferred to the next frame. [0100] Moreover, in FIG. 1D, a condenser is not shown between the gate electrode of the TFT for driving 117 and the electric current supplying line 114, but a condenser which maintains the potential of the gate electrode of the TFT for driving 117 for a certain time may be provided. Moreover, if the channel capacitance of the TFT for driving 117 is sufficient, it is not necessary to provide the condenser. Moreover, the configuration of the gate signal line drive circuit for blanking is changed, and in a non-light emitting period, it may be made as a voltage between the gate and the source so that the TFT for driving 117 is securely turned OFF. [0101] Moreover, here, although only in the subframe in which the address (writing) period Ta is longer than the sustain (light emitting) period Ts, a blanking period Tr, a non-light emitting period Te and a reverse bias period Tb are provided, also in the subframe in which the address (writing) period Ta is shorter than or equal to the sustain (light emitting) period Ts, the respective periods are provided, the reverse bias may be applied to the EL element. [0102] Moreover, in FIG. 1A, after the blanking period Tr has been completely terminated until the final line, the reverse bias period Tb was initiated, but as shown in FIG. 1 B, the final line of the blanking period Te and the initiation of the reverse bias application period Tb3 are overlapped with each other, and a better duty rate can also be obtained. Example 4 [0103] The gate signal line drive circuit for writing will be described with reference to FIG. 8A and the pixel configuration will be described with reference to FIG. 8B in the case where the pixel configuration listed in Embodiment 2 is SES driven and the reverse bias is applied. [0104] The gate signal line drive circuit of FIG. 8A has a shift register 802 composed of a plurality of stages of D-flip flops 801, a level shifter 803, a buffer 804, a selection circuit 805 and the like. Signals inputted from the external are a clock signal (G-CK), an inversed clock signal (G-CKb), a start pulse (G-SP), and a select signal (G-SEL). A switch 821 shown in FIG. 8A corresponds to the selection circuit 805 in FIG. 8B. [0105] First, in the forward bias period, according to the timings of a clock signal, a clock inversed signal and a start pulse, the pulses are in turn outputted from the shift register 802. Subsequently, it is subjected to the conversion of amplitude of the pulse by the level shifter 803, subsequently, after a pulse waveform has been shaped in the buffer, it is inputted into the selection circuit 805. In the selection circuit 805, the output pulses from the buffer 804, which have been selected by a select signal are in turn outputted to the gate signal lines for writing G1-Gy. When the selection is terminated on the final line Gy, after these have passed through the vertical fly back period, pulses are again outputted from the shift register 802, and the gate signal lines are in turn selected. [0106] Moreover, in the reverse bias period, a select signal is switched, and regardless of the buffer output, the potential at which the TFT for switching 815 is turned ON is outputted to the gate signal lines for writing G1-Gy at the same time. At this time, the potential of L level has been inputted into all of the rows of source signal lines 811. Hence, the TFT for switching 815 of all the pixels are turned ON at the same time, the potential of L level is inputted to the gate electrode of the TFT for driving 817, and the TFT for driving 817 is turned ON. By turning the TFT for driving 817 ON, the potential of the electric current supplying line 814 is inputted to the pixel electrode. [0107] In the reverse bias period, since the potential of the counter electrode 819 is switched from Vc1 to Vc2, the potential of the counter electrode 819 becomes higher than the potential of the pixel electrode and the reverse bias is applied to the EL element. Example 5 [0108] FIG. 7A shows that an example of element layout in the case that pixels having structures of FIGS. 1D, 8B shown in Embodiments 1, 2 are actually formed. Further, FIG. 7B shows a cross-sectional view of FIG. 7A taken along the line X-X′. [0109] In FIG. 7A, reference numeral 700 is a substrate having an insulating surface. A driving TFT 707 is formed on a substrate 700. Then, source and drain electrodes made from wiring materials are formed to connect with impurity regions, which form source and drain regions of the driving TFT 707. Either is formed to connect with a pixel electrode 708 on the overlapping portions. An organic conductive film 712 is formed on the pixel electrode 708, and an organic thin film (light emitting layer) 713 is formed thereon. An opposite electrode 714 is formed on the organic thin film (light emitting layer) 713. The opposite electrode 714 is formed all over the surface so as to connect uniformly with all pixels. [0110] In this specification, reference as “EL element” means a laminated layer including the pixel electrode 708, the organic conductive film 712, the organic thin film (light emitting layer) 713, and the opposite electrode 714 in FIG. 7B. Either the pixel electrode 708 and the opposite electrode 714 is an anode, or the other is a cathode. [0111] Light generated at the light thin film (light emitting layer) 713 radiates through either the pixel electrode 708 or the opposite electrode 714. In FIG. 7B, when light is emitted downward through the pixel electrode side or the side having TFT and the like, it is referred to as a bottom emission structure. When light is emitted upward through the opposite electrode side, it is referred to as a top emission structure. [0112] In the case of the bottom emission structure, the pixel electrode 708 is made from a transparent conductive film. In the case of the top emission structure, the opposite electrode 714 is made from a transparent film. [0113] The structure shown in this example is illustrative only. A lamination order of a pixel layout, a cross-sectional structure, and the electrode of EL elements are not to be considered limited to this structure. [0114] In the light emitting element for color display, EL elements for R, G, B color may be deposited separately. Otherwise, monochromatic EL elements may be formed so that the structure achieves R, G, B color by color filters. Example 6 [0115] In the present Example, a macromolecular compound is applied as a light emitting layer, and further, in a light emitting element in which a buffer layer consisting of an electrically conductive macromolecular compound is provided between the anode and the light emitting layer, the results that the measurement on the brightness deterioration at the time when the direct current drive (forward bias is always applied) and the alternate current drive (forward bias and reverse bias are alternately applied in a certain cycle) will be described below. [0116] FIGS. 3A and 3B show the results of the reliability test when the alternate drive has been carried out at the forward bias; 3.7 V, the reverse bias; 1.7 V, duty ratio; 50% and alternate current frequency; 60 Hz. FIG. 3A is a graphical representation using a linear scale, and FIG. 3B is a graphical representation using a LOG scale. The initial brightness has been about 400 cd/cm2. For the purpose of comparing, the results of the reliability test at the time when the direct current drive (forward bias; 3.65 V) has been carried out are also shown at the same time. As a result, in the direct current drive, the brightness has been reduced by half at about 400 hours, in contrast to this, in the alternate current drive, even after about 700 hours have passed, the initial brightness have not been reduced by half. [0117] FIGS. 3C and 3D show the results of the reliability test at the time when the alternate current drive has been carried out at the forward bias; 3.8 V, the reverse bias; 1.7 V, duty ratio; 50% and alternate current frequency; 600 Hz. FIG. 3C is a graphical representation using a linear scale, and FIG. 3D is a graphical representation using a LOG scale. The initial brightness has been about 300 cd/cm2. For the purpose of comparing, the results of the reliability test at the time when the direct current drive (forward bias; 3.65 V) has been carried out are also shown at the same time. As a result, in the direct current drive, the brightness has been reduced by half at about 500 hours, in contrast to this, in the alternate current drive, about 60% of the initial brightness was maintained even after about 700 hours have passed. Example 7 [0118] Since the light emitting device using a light emitting element is a self-luminous type light emitting device, when comparing to a liquid display, the visibility is more excellent at the bright place, and the visual field is wider. Therefore, it can be used for the display part of a variety of electronic apparatuses. [0119] As an electronic apparatus in which a light emitting device of the present invention is used, a television, a video camera, a digital camera, a goggle type display head mount display), a navigation system, an audio system (car audio, audio component and the like), a notebook sized personal computer, a game machine, a handheld terminal (mobile computer, cellular phone, portable type game machine, electronic book or the like), an image reproduction device equipped with a recording medium (device equipped with a display capable of reproducing the recording medium, concretely, such as an image Digital Versatile Disc (DVD)) and the like are listed. Particularly, in the case of handheld terminals in which the occasions of seeing the screen from the slanting angle are frequent, since the width of the visual field is considered to be important, it is desirable to use a light emitting device. Concrete examples of these electric devices are shown in FIG. 10. [0120] FIG. 10A is an EL display, including a case 1001, an audio output part 1002, a display part 1003 and the like. A light emitting device of the present invention can be used in the display part 1003. Since the light emitting device is a self-luminous type light emitting device, the back light is not required, whose display part can be made thinner than a liquid display. It should be noted that the light emitting element display device includes all kinds of display devices for information display such as a display for personal computer, a display for receiving TV broadcast, a display for advertising and the like. [0121] Moreover, FIG. 10C shows a large EL display, and includes a case 1021, an audio output part 1022 and a display part 1023, as similar to FIG. 1A. A light emitting device of the present invention can be used in the display part 1023. [0122] FIG. 10B shows a mobile computer, including a main body 1011, a stylus 1012, a display part 1013, an operation bottom 1014, an external interface 1015 and the like. A light emitting device of the present invention can be used in the display 1013. [0123] FIG. 10D shows a game machine, including a main body 1031, a display part 1032, an operation bottom 1033 and the like. A light emitting device of the present invention can be used in the display part 1032. [0124] FIG. 10E shows a cellular phone, including a main body 1041, an audio output part 1042, an audio input part 1043, a display part 1044, an operation switch 1045, an antenna 1046 and the like. A light emitting device of the present invention can be used in the display part 1044. It should be noted that the display part 1044 could suppress the consumption of electric current of the cellular phone by displaying a white letter on the black background. [0125] It should be noted that when the luminous brightness of an organic light emitting material will be enhanced in the future, the light containing outputted image information is enlarged and projected using a lens or the like and is capable of being used for a projector of front type or rear type. [0126] Moreover, the above-described electronic apparatuses frequently have displayed information delivered through an electronic communication line such as the internet, CATV (cable TV) and the like, particularly, the occasions for displaying a dynamic picture information has been increased. Since response rate of an organic luminescent material is very high, it is preferable to use a light emitting device for dynamic display. [0127] Moreover, since the colors are brilliant, it is also suitable for a realistic large screen television. [0128] Moreover, since as for a light emitting device, the portion where the light emits consumes the electric power, it is desirable to display information in the way that the light emitting portion is reduced to the small portion. Therefore, in the case where a light emitting device is used in the display part in which information using characters is mainly used such as a handheld terminal, particularly, a cellular phone, an audio system, it is desirable to drive so that information using characters is formed by the light emitting portion using the non-light emitting portion as its background. [0129] As described above, the application range of the present invention is extremely wide, the present invention is capable of being used for electronic apparatuses in any field. Moreover, as for an electronic apparatus of the present Example, light emitting devices of any configuration shown in Examples 1-5 may be used. [0130] According to a light emitting device of the present invention, in a SES drive method, the reliability can be enhanced by applying the reverse bias to an EL element driven at the constant electric current. Moreover, the application of the reverse bias is performed by changing only the counter electrode, and withstand voltage of TFT and the increase of the consumption electric power due to the increase of voltage of the gate signal line drive circuit which is to be a problem at the time when the electric current supplying line is greatly changed, can be suppressed. Furthermore, the reduction of the electric power consumption is performed while the enhancement of the reliability is secured by making the reverse bias smaller than the forward bias. Moreover, the increase of the number of electric sources can also be suppressed by making the potential at the time when the reverse bias is applied be in common with the potential of the electric source of the source signal line drive circuit or the gate signal line drive circuit. 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