Source: http://www.google.com/patents/US7187384?dq=7,682,496
Timestamp: 2016-12-11 01:17:02
Document Index: 33319370

Matched Legal Cases: ['art/9612', 'art4', 'art/9606', 'art4', 'art/9606', 'art7', 'art/9606', 'art5', 'art/9606', 'art6', 'art/9606', 'art8', 'art 2']

Patent US7187384 - Systems and methods for downloading custom or prefabricated processing ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA method and system for controlling the algorithmic elements in 3D graphics systems via an improved 3D graphics API is provided. In one aspect, in a 3D graphics system having privatized formats with privatized drivers used to increase the efficiency of display, existing problems are eliminated that are...http://www.google.com/patents/US7187384?utm_source=gb-gplus-sharePatent US7187384 - Systems and methods for downloading custom or prefabricated processing routines to programmable graphics chipsAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS7187384 B2Publication typeGrantApplication numberUS 10/973,330Publication dateMar 6, 2007Filing dateOct 25, 2004Priority dateMar 1, 2001Fee statusPaidAlso published asUS6828975, US6954205, US7466317, US7570268, US7646388, US8432407, US20020122040, US20050001845, US20050083327, US20050083334, US20050083335, US20050093870, US20100020071Publication number10973330, 973330, US 7187384 B2, US 7187384B2, US-B2-7187384, US7187384 B2, US7187384B2InventorsJeff M. J. NoyleOriginal AssigneeMicrosoft CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (18), Non-Patent Citations (62), Referenced by (14), Classifications (11), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetSystems and methods for downloading custom or prefabricated processing routines to programmable graphics chips
US 7187384 B2Abstract
This application is a continuation of U.S. patent application Ser. No. 09/796,787, filed Mar. 1, 2001, now U.S. Pat. No. 6,828,975, which is hereby incorporated by reference in its entirety.
In an exemplary embodiment, a developer adheres to a specific format for packing up an algorithmic element, or set of instructions, for implementation by a 3D graphics chip. The developer packs the instruction set into an array of numbers, by referring to a list of ‘tokens’ understood by the 3D graphics chip. This array of numbers in turn is mapped correctly to the 3D graphics chip for implementation of the algorithmic element by the 3D graphics chip. Further background, hereby incorporated by reference in its entirety, may be found in U.S. Patent Appln. entitled “API Communications For Vertex And Pixel Shaders” having inventors Boyd and Toelle.
D3DVSD_TOKEN_NOP=0, // NOP or extension D3DVSD_TOKEN_STREAM, // stream selector D3DVSD_TOKEN_STREAMDATA, // stream data definition (map to vertex input memory) D3DVSD_TOKEN_TESSELLATOR, // vertex input memory from tessellator D3DVSD_TOKEN_CONSTMEM, // constant memory from shader D3DVSD_TOKEN_EXT, // extension D3DVSD_TOKEN_END=7, // end-of-array (requires all DWORD bits to be 1) D3DVSD_FORCE_DWORD=0x7fffffff,// force32-bit size enum } D3DVSD_TOKENTYPE; #define D3DVSD_TOKENTYPESHIFT 29 #define D3DVSD_TOKENTYPEMASK (7<<DVSD_TOKENTYPESHIFT) #define D3DVSD_STREAMNUMBERSHIFT 0 #define D3DVSD_STREAMNUMBERMASK (0xF<<D3DVSD_STREAMNUMBERSHIFT) #define D3DVSD_DATALOADTYPESHIFT 28 #define D3DVSD_DATALOADTYPEMASK (0X1<<D3DVSD_DATALOADTYPESHIFT) #define D3DVSD_DATATYPESHIFT 16 #define D3DVSD_DATATYPEMASK (0xF<<D3DVSD_DATATYPESHIFT) #DEFINE D3DVSD_SKIPCOUNTSHIFT 16 #define D3DVSD_SKIPCOUNTMASK (0XF<<D3DVSD_SKIPCOUNTSHIFT) #define D3DVSD_VERTEXREGSHIFT 0 #define D3DVSD_VERTEXREGMASK (0X1f<<D3DVSD_VERTEXREGSHIFT) #define D3DVSD_VERTEXREGINSHIFT 20 #define D3DVSD_VERTEXREGINMASK (0xF<<D3DVSD_VERTEXGINSHIFT) #define D3DVSD_CONSTCOUNTSHIFT 25 #define D3DVSD_CONSTCOUNTMASK (0xF<<D3DVSD_CONSTCOUNTSHIFT) #define D3DVSD_CONSTADDRESSSHIFT 0 #define D3DVSD_CONSTADDRESSMASK (0x7F<<D3DVSD_CONSTADDRESSSHIFT) #define D3DVSD_CONSTRSSHIFT 16 #define D3DVSD_CONSTRSMASK (0x1FFF<<D3DVSD_CONSTRSSHIFT) #define D3DVSD_EXTCOUNTSHIFT 24 #define D3DVSD_EXTCOUNTMASK (0x1F<<D3DVSD_EXTCOUNTSHIFT) #define D3DVSD_EXTINFOSHIFT 0 #define D3DVSD_EXTINFOMASK (0xFFFFFF<<D3DVSD_EXTINFOSHIFT) #define D3DVSD_MAKETOKENTYPE(tokenType) ((tokenType<<D3DVSD_TOKENTYPESHIFT) & D3DVSD_TOKENTYPEMASK) // macros for generation of CreateVertexShader Declaration token array // Set current stream // _StreamNumber 0..(MaxStreams-1) stream to get data from // #define D3DVSD_STREAM(_StreamNumber)\(D3DVSD_MAKETOKENTYPE(D3DVSD_TOKEN_STREAM)|(_StreamNumber)) // Set tessellator stream // #define D3DVSD_STREAMTESSSHIFT 28 #define D3DVSD_STREAMTESSMASK (1<<D3DVSD_STREAMTESSSHIFT) #define D3DVSD_STREAM TESS( )\(D3DVSD_MAKETOKENTYPE(D3DVSD_TOKEN_STREAM)|(D3DVSD_STREAMTESSMASK)) // bind single vertex register to vertex element from vertex stream // // _VertexRegister [0..15] address of the vertex register // _Type [D3DVSDT_*] dimensionality and arithmetic data type #define D3DVSD_REG(_VertexRegister, _Type )\(D3DVSD_MAKETOKENTYPE(D3DVSD_TOKEN_STREAMDATA)|((_Type)<<D3DVSD_DATATYPESHIFT)|(_VertexRegister)) // Skip _DWORDCount DWORDs in vertex // #define D3DVSD_SKIP(_DWORDCount )\(D3DVSD_MAKETOKENTYPE(D3DVSD_TOKEN_STREAMDATA)|0x10000000|\((_DWORDCount)<<D3DVSD_SKIPCOUNTSHIFT)) // load data into vertex shader constant memory // // _ConstantAddress [0..95]—address of constant array to begin filling data // _Count [0..15]—number of constant vectors to load (4 DWORDs each) // followed by 4′_Count DWORDS of data // #define D3DVSD_CONST(_ConstantAddress, _Count )\(D3DVSD_MAKETOKENTYPE(D3DVSD_TOKEN_CONSTMEM)|\((_Count)<<D3DVSD_CONSTCOUNTSHIFT)|(_ConstantAddress)) // enable tessellator generated normals // // _VertexRegisterIn [0..15] address of vertex register whose input stream // will be used in normal computation // _VertexRegisterOut [0..15] address of vertex register to output the normal to // #define D3DVSD_TESSNORMAL(_VertexRegisterIn, _VertexRegisterOut)\(D3DVSD_MAKETOKENTYPE(D3DVSD_TOKEN_TESSELLATOR)|\((_VertexRegisterIn)<<D3DVSD_VERTEXREGINSHIFT)|\((0x02)<<D3DVSD_DATATYPESHIFT)|(_VertexRegisterOut)) // enable tessellator generated surface parameters // // _VertexRegister [0..15] address of vertex register to output parameters // #define D3DVSD_TESSUV(_VertexRegister)\(D3DVSD_MAKETOKENTYPE(D3DVSD_TOKEN_TESSELLATOR)|10x10000000|\((0x01)<<D3DVSD_DATATYPESHIFT)|(_VertexRegister)) // Generates END token // #define D3DVSD_END( ) 0xFFFFFFFF // Generates NOP token #define D3DVSD_NOP( ) 0x00000000 // bit declarations for _Type fields #define D3DVSDT_FLOAT1 0x00 // 1D float expanded to (value, 0., 0:, 1.) #define D3DVSDT_FLOAT2 0x01 // 2D float expanded to (value, value, 0., 1.) #define D3DVSDT_FLOAT3 0x02 // 3D float expanded to (value, value, value, 1.) #define D3DVSDT_FLOAT4 0x03 // 4D float #define D3DVSDT_D3DCOLOR 0x04 // 4D packed unsigned bytes mapped to 0. to 1. range // Input is in D3DCOLOR format (ARGB) expanded to (R, G, B, A) #define D3DVSDT_UBYTE4 0x05 // 4D unsigned byte #define D3DVSDT_SHORT2 0x06 // 2D signed short expanded to (value, value, 0., 1.) #define D3DVSDT_SHORT4 0x07 // 4D signed short // assignments of vertex input registers for fixed function vertex shader // #define D3DVSDE_POSITION 0 #define D3DVSDE_BLENDWEIGHT 1 #define D3DVSDE_BLENDINDICES 2 #define D3DVSDE_NORMAL 3 #define D3DVSDE_PSIZE 4 #define D3DVSDE_DIFFUSE 5 #define D3DVSDE_SPECULAR 6 #define D3DVSDE_TEXCOORD0 7 #define D3DVSDE_TEXCOORD1 8 #define D3DVSDE_TEXCOORD2 9 #define D3DVSDE_TEXCOORD3 10 #define D3DVSDE_TEXOORD4 11 #define D3DVSDE_TEXCOORD5 12 #define D3DVSDE_TEXCOORD6 13 #define D3DVSDE_TEXCOORD7 14 #define D3DVSDE_POSITION2 15 #define D3DVSDE_NORMAL2 16 // Maximum supported number of texture coordinate sets #define D3DDP_MAXTEXCOORD 8 ;begin_internal // ______ // // Pixel Shader (PS) & Vertex Shader (VS) Instruction Token Definition // // **** Version Token **** // [07:00] minor version number // [15:08] major version number // [31:16] // PS 0xFFFF // VS 0xFFFE // // **** End Token **** // [31:00] 0x0000FFFF // // **** Comment Token **** // [15:00] 0xFFFE // [30:16] DWORD Length (up to 2^15 DWORDS=128 KB) // [31] 0x0 // // **** Instruction Token **** // [15:00] Opcode (D3DSIO_*) // [23:16] Opcode-Specific Controls // [29:24] Reserved 0x0 // 30Co-Issue—if set then execute this instruction with the previous instruction(s) // [31] 0x0 // // **** Destination Parameter Token **** // [07:00] Register Number (offset it register file) // [15:08] Reserved 0x0 // [19:16] Write Mask // [16] Component 0 (X;Red) // [17] Component 1 (Y;Green) // [18] Component 2 (Z;Blue) // [19] Component 3 (W;Alpha) // [23:20] // PS Result Modifier // VS Reserved 0x0 // [27:24] // PS Result Shift Scale (signed shift) // VS Reserved 0x0 // [30:28] Register Type // [0x0] Temporary Register File // [0x1] Reserved // [0x2] Reserved // [0x3] // VS Address Register (reg num must be zero) PS Reserved // [0x4] // VS Rasterizer Output Register File // PS Reserved // [0x5] // VS Attribute Output Register File // PS Reserved [0x6] // VS Texture Coordinate Register File // PS Reserved // [0x7] Reserved // [31] 0x1 // // **** Source Parameter Token ***** // [12:00] Register Number (offset in register file) // [13] // VS Relative Address // PS Reserved 0x0 // [14:15] // VS Relative Address Register Component // PS Reserved 0x0 // [23:16] Source Component Swizzle // [17:16] Component 0 Swizzle // [19:18] Component 1 Swizzle // [21:20] Component 2 Swizzle // [23:22] Component 3 Swizzle // [27:24] Source Modifier // [0x0] None // [0x1] Negate // [0x2] Bias // [0x3] Bias and Negate // [0x4] Sign // [0x5] Sign and Negate // [0x6] Complement // [0x7–0x7] Reserved // [30:28] Register Type // [0x0] Temporary Register File // [0x1] Input Register File // [0x2] Constant Register File // [0x3–0x7] Reserved // [31] 0x1 // // The exception for source parameter tokens is with the instruction:
D3DSIO_COMMENT=0xFFFE, D3DSIO_END=0xFFFF, D3DSIO_FORCE_DWORD=0x7fffffff, // force 32-bit size enum } D3DSHADER_INSTRUCTION_OPCODE TYPE; // // Co-Issue Instruction Modifier—if set then this instruction is to be // issued in parallel with the previous instruction(s) for which this bit // is not set. // #define D3DSI_COISSUE 0x40000000 // // Parameter Token Bit Definitions // #define D3DSP_REGNUM MASK 0x00000FFF // destination parameter write mask #define D3DSP_WRITEMASK13 0 0x00010000 // Component 0 (X;Red) #define D3DSP_WRITEMASK—1 0x00020000 // Component 1 (Y;Green) #define D3DSP_WRITEMASK—2 0x00040000 // Component 2 (Z;Blue) #define D3DSP_WRITEMASK—3 0x00080000 // Component 3 (W;Alpha) #define D3DSP_WRITEMASK_ALL 0x000F0000 // All Components // destination parameter modifiers #define D3DSP_DSTMOD_SHIFT 20 #define D3DSP_DSTMOD_MASK 0x00F00000 typedef enum_D3DSHADER_PARAM_DSTMOD_TYPE {
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