Source: http://www.google.com/patents/US8214626?dq=7,339,580
Timestamp: 2016-08-24 07:47:36
Document Index: 394691549

Matched Legal Cases: ['Application No. 200480018443', 'Application No. 200480018443', 'Application No. 04756204', 'Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 93118830']

Patent US8214626 - Method and apparatus for shuffling data - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsMethod, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual...http://www.google.com/patents/US8214626?utm_source=gb-gplus-sharePatent US8214626 - Method and apparatus for shuffling dataAdvanced Patent SearchPublication numberUS8214626 B2Publication typeGrantApplication numberUS 12/387,958Publication dateJul 3, 2012Priority dateOct 29, 2001Fee statusPaidAlso published asCN1813241A, CN100492278C, CN101620525A, CN101620525B, DE602004023081D1, EP1639452A2, EP1639452B1, US8225075, US8688959, US9229718, US9229719, US20040054877, US20090265523, US20110029759, US20120272047, US20130007416, US20150121039, US20150154023, WO2005006183A2, WO2005006183A3Publication number12387958, 387958, US 8214626 B2, US 8214626B2, US-B2-8214626, US8214626 B2, US8214626B2InventorsWilliam W. Macy, Jr., Eric L. Debes, Patrice L. Roussel, Huy V. NguyenOriginal AssigneeIntel CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (83), Non-Patent Citations (132), Referenced by (1), Classifications (36), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetMethod and apparatus for shuffling data
US 8214626 B2Abstract
1. A processor unit for shuffling data comprising:
an execution unit operative to receive from the register file a set of source data elements and a set of L control elements being in the form of L shuffle masks, wherein each of said L control elements is associated with a data element position in a resultant and is divided into a plurality of portions:
a first portion being a flush field operative to indicate a flush to zero indication,
a second portion being a position selection field operative to indicate a position of one of said source data elements, and
a third portion being a source select field to indicate from which of a plurality of source data registers a set of source data elements are to be provided;
said execution unit is also operative to:
determine whether the flush to zero indication is set for each individual control element, and place a zero into an associated resultant data element position if true, otherwise
shuffle data from a data element of the set of source data elements designated by said individual control element to said associated resultant data element position.
2. The processor unit of claim 1, wherein said processor unit comprises a single-instruction-multiple-data (SIMD) processor unit to perform SIMD operations including shuffling 8-bit byte data.
3. The processor unit of claim 2, wherein said register file is coupled with said SIMD processor unit and includes a plurality of registers, each to store 128 bits of data.
4. The processor unit of claim 2, wherein said SIMD processor unit receives data in a digital stream which may be processed by said SIMD processor unit instructions to generate digital audio samples representative of voice communications.
5. The processor unit of claim 2, wherein said SIMD processor unit receives data in a digital stream which may be processed by said SIMD processor unit instructions to generate digital motion video frames.
a main processor to control data processing operations of a general type;
a single-instruction multiple data (SIMD) processor unit coupled with said main processor, said SIMD processor unit having:
a register file including a plurality of registers, each to store 128 bits of data;
an execution unit operative to receive from the register file a set of 8-bit byte source data elements and a set of L control elements being in the form of L shuffle masks, wherein each of said L control elements is associated with a 8-bit byte data element position in a resultant and is divided into a plurality of portions:
a second portion being a position selection field operative to indicate a position of one of said 8-bit byte source data elements, and
a third portion being a source select field to indicate which of the plurality of registers are to provide the set of 8-bit byte source data elements;
determine whether the flush to zero indication is set for each individual control element, and to place a zero into an associated resultant 8-bit byte data element position if true, otherwise shuffle data from a data element of the set of 8-bit byte source data elements designated by said individual control element to said associated resultant 8-bit byte data element position.
7. The data processing system of claim 6, wherein said SIMD processor unit receives data in a digital stream which may be processed by said SIMD processor unit instructions to generate digital audio samples representative of voice communications.
8. The data processing system of claim 6, wherein said SIMD processor unit receives data in a digital stream which may be processed by said SIMD processor unit instructions to generate digital motion video frames.
a cache memory operatively coupled to interact with said main processor under the control of said main processor; and
an input/output (I/O) system.
10. The data processing system of claim 6, wherein said main processor and said SIMD processor unit are integrated into a single processing core. Description
This patent application is a divisional of U.S. patent application Ser. No. 10/611,344 filed Jun. 30, 2003 now abandoned, which is a Continuation In Part application of U.S. patent application Ser. No. 09/952,891 filed Oct. 29, 2001, now U.S. Pat. No. 7,085,795.
FIG. 15B illustrates the blocks of data to be interleaved: DATA A 1512, DATA B 1514, and DATA C 1516. For this embodiment, each set of data has an data entry with color information for sixteen pixel positions. Here, the subscript notion accompanying each color letter in a data element represents that pixel number. For instance, RO is the red data for pixel 0 and G15 is the green data for pixel 15. The hex values at each data element illustrated is the number of that data element position. The color data (DATA A 1512, DATA B 1514, DATA C 1516) may be copied into other registers so that the data is not overwritten by the shuffle operation and can be reused without another load operation. In the example of this embodiment, three passes with the three masks 1502, 1504, 1506, are needed to complete the pixel data interleaving. For alternate implementations and other amounts of data, the number of passes and shuffling operations can vary as needed.
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