Source: http://www.google.com.tw/patents/US6482676
Timestamp: 2013-05-25 07:50:54
Document Index: 328063800

Matched Legal Cases: ['art 1', 'art 1', 'art 1', 'art 1', 'art 1', 'art 1']

�M�Q US6482676 - Method of mounting semiconductor chip part on substrate - Google �M�Q�j�M �Ϥ� �a�� Play YouTube �s�D Gmail ���ݵw�� ��h »�i���M�Q�j�M | �������� | �n�J�i���M�Q�j�M�M�QA method of mounting a semiconductor chip part on a substrate, which is capable of realizing high efficiency and high reliability of the mounting works. A leading end of a conductive wire is contact-bonded onto each pad of a semiconductor chip part, followed by tearing of the wire, to form a two-step...http://www.google.com.tw/patents/US6482676?utm_source=gb-gplus-share�M�Q US6482676 - Method of mounting semiconductor chip part on substrate���}��US6482676 B2�X���������v�ӽЮѽs��08/886,557�o�G���2002�~11��19���ӽФ��1997�~7��1�� �u���v���1997�~1��9����L���}�M�Q��US20020048847�o��HKazuhisa TsunoiAkira FujiiShunji BabaYoshikazu Hirano��M�Q�v�HFujitsu Limited ���M�Q������438/108257/E23.21257/E23.68228/180.22257/E21.508257/E21.503438/613��ڱM�Q������H01L21/56H01L21/60H01L23/485H01L23/498 �X�@����H01L2924/01004H01L2224/1134H01L2924/01047H01L2224/13099H01L2224/83192H01L21/563H01L2924/01082H01L2224/11003H01L2224/73203H01L23/49811H01L2224/13144H01L24/16H01L2224/73204H01L24/12H01L2924/01079H01L2924/01013H01L24/11H01L2924/01075H01L2224/16225H01L2924/01029H01L2924/01033H01L2924/01006H01L2924/01005H01L24/29 �ڬw������H01L24/12H01L24/11H01L24/16H01L24/28H01L21/56FH01L23/498C�ѦҤ��m�M�Q�ޥ� (41)�Q�H�U�M�Q�ޥ� (5)�~���s�����M�Q�ӼЧ� ���M�Q�ӼЧ��M�Q����T�� �ڬw�M�Q��Method of mounting semiconductor chip part on substrateUS 6482676 B2�K�n A method of mounting a semiconductor chip part on a substrate, which is capable of realizing high efficiency and high reliability of the mounting works. A leading end of a conductive wire is contact-bonded onto each pad of a semiconductor chip part, followed by tearing of the wire, to form a two-step bump having an upper step portion and a lower step portion larger in volume than the upper step portion. Only the upper step portions of the bumps are then brought in press-contact with a single flattening tool member having a flat surface in such a manner that heights of all of the bumps are made nearly equal to each other. A conductive paste is stuck on the bumps, and the substrate is coated with an adhesive. Thus, the semiconductor chip part is heated and pressurized onto the substrate by a mounting tool in such a state in which the pads are aligned with the corresponding lands of the substrate, to plastically deform the whole of the upper step portions and the lower step portions of the bumps.
8. A method of mounting a semiconductor chip part on a substrate according to claim 2, wherein a heating temperature and an applied pressure for heating and pressurizing said semiconductor chip part upon mounting said semiconductor chip part on said substrate are controlled in such a manner that a height of each of said bumps after mounting said semiconductor chip part on said substrate is 60 �gm or less.
16. A method of mounting a semiconductor chip part on a substrate according to claim 10, wherein a heating temperature and an applied pressure for heating and pressurizing said semiconductor chip part upon mounting said semiconductor chip part on said substrate are controlled in such a manner that a height of each of said bumps after mounting said semiconductor chip part on said substrate is 60 �gm or less.
In the case of using a multilayered printed wiring board composed of an epoxy resin as the substrate 3, the above pressurizing force applied between the semiconductor chip part 1 and the substrate 3 by the mounting tool 10 must be set in such a manner that a press-in amount of lands (wiring pattern) on the printed wiring board is within a range of 7 �gm to 30 �gm in consideration of an effect exerted on inner layers (inner wiring layers of the multilayered printed wiring board). In the case of using, for example, a ceramic board as the substrate 3, there is no limitation of the press-in amount of the lands.
The pressurizing force against the substrate 3 and the heating temperature of the semiconductor chip part 1 by the mounting tool 10 are controlled in such a manner that heights of the bumps 6 become 60 �gm or less after mounting of the semiconductor chip part 1 and thereby the adhesive force of the adhesive 9 is balanced against the shrinkage force thereof. In the first embodiment, the wiring pattern (lands 4) on the substrate 3 is formed by stacking an aluminum layer, barrier metal layer, nickel layer, and gold layer in this order, and the total thickness of the wiring pattern is set to be 40 �gm or less.
In the case of using a multilayered printed wiring board composed of epoxy resin as the substrate 3, the above pressurizing force applied between the semiconductor chip part 1 and the substrate 3 by the mounting tool 10 must be set in such a manner that a press-in amount of lands (wiring pattern) on the printed wiring board is within a range of 7 �gm to 30 �gm in consideration of an effect exerted on inner layers (inner wiring layers of the multilayered printed wiring board). In the case of using, for example, a ceramic board as the substrate 3, there is no limitation of the press-in amount of the lands.
The pressurizing force against the substrate 3 and the heating temperature of the semiconductor chip part 1 by the mounting tool 10 are controlled in such a manner that heights of the bumps 15 become 60 �gm or less after mounting of the semiconductor chip part 1 and thereby the adhesive force of the adhesive 9 is balanced against the shrinkage force thereof. In the second embodiment, the wiring pattern (lands 4) on the substrate 3 is formed by stacking an aluminum layer, barrier metal layer, nickel layer, and gold layer in this order, and the total thickness of the wiring pattern is set to be 40 �gm or less.
�M�Q�ޥ� �ޥΪ��M�Q�ӽФ���o�G��� �ӽЪ��M�Q�W��US33734811965�~6��22��1968�~3��19��Sperry Rand CorporationMethod of electrically interconnecting conductorsUS49125451987�~9��16��1990�~3��27��Irvine Sensors CorporationBonding of aligned conductive bumps on adjacent surfacesUS50562161990�~1��26��1991�~10��15��Sri InternationalMethod of forming a plurality of solder connectionsUS50886391991�~1��25��1992�~2��18��Motorola, Inc.Soldering processUS51180271991�~4��24��1992�~6��2��International Business Machines CorporationMethod of aligning and mounting solder balls to a substrateUS51952371991�~12��24��1993�~3��23��Cray Computer CorporationFlying leads for integrated circuitsUS53066641992�~5��15��1994�~4��26��Seiko Epson Corp.Semiconductor device, method of forming bump electrode of a semiconductor device, method of packaging a semiconductor device, chip carrier tape, display device and electronic printing device incorporating the semiconductor deviceUS54037761993�~11��16��1995�~4��4��Fujitsu LimitedProcess of using a jig to align and mount terminal conductors to a semiconductor plastic packageUS55085611994�~11��14��1996�~4��16��Nec CorporationApparatus for forming a double-bump structure used for flip-chip mountingUS56012291995�~11��27��1997�~2��11��Matsushita Electric Industrial Co., Ltd.Conductive metal ball attaching apparatus and method, and bump forming methodUS56209271995�~5��25��1997�~4��15��National Semiconductor CorporationSolder ball attachment machine for semiconductor packagesUS56400511994�~12��9��1997�~6��17��Matsushita Electric Industrial Co., Ltd.Chip package, a chip carrier, a terminal electrode for a circuit substrate and a chip package-mounted complexUS56419961996�~1��29��1997�~6��24��Matsushita Electric Industrial Co., Ltd.Semiconductor unit package, semiconductor unit packaging method, and encapsulant for use in semiconductor unit packagingUS57958181996�~12��6��1998�~8��18��Amkor Technology, Inc.Integrated circuit chip to substrate interconnection and methodUS58443161997�~6��11��1998�~12��1��Intel CorporationFixture for handling and attaching conductive spheres to a substrateUS58747801996�~7��26��1999�~2��23��Nec CorporationMethod of mounting a semiconductor device to a substrate and a mounted structureUS58893261997�~2��27��1999�~3��30��Nec CorporationStructure for bonding semiconductor device to substrateUS59406791995�~12��22��1999�~8��17��Matsushita Electric Industrial Co., Ltd.Method of checking electric circuits of semiconductor device and conductive adhesive for checking usageUS59414491998�~2��9��1999�~8��24��International Business Machines CorporationMethod of making an electronic package having spacer elementsUS61777301998�~2��10��2001�~1��23��Fujitsu LimitedSemiconductor bare chip, method of manufacturing semiconductor bare chip and mounting structure of semiconductor bare chipUS62912691999�~10��1��2001�~9��18��Fujitsu LimitedSemiconductor bare chip, method of manufacturing semiconductor bare chip and mounting structure of semiconductor bare chipJP1226162A �W�٤���JP2226610A �W�٤���JP2270327A �W�٤���JP3273637A �W�٤���JP4091444A �W�٤���JP4091445A �W�٤���JP4127548A �W�٤���JP4266038A �W�٤���JP4359442A �W�٤���JP5036697A �W�٤���JP5047770A �W�٤���JP5067648A �W�٤���JP5136201A �W�٤���JP5315337A �W�٤���JP6188289A �W�٤���JP7099202A �W�٤���JP7193101A �W�٤���JP7297227A �W�٤���JP57143838A �W�٤���JP62169433A �W�٤����Q�H�U�M�Q�ޥ� �ޥΥ��M�Q�ӽФ���o�G��� �ӽЪ��M�Q�W��US68802442001�~1��5��2005�~4��19��Matsushita Electric Industrial Co., Ltd.Circuit board having simultaneously and unitarily formed wiring patterns and protrusionsUS72714972003�~3��10��2007�~9��18��Fairchild Semiconductor CorporationDual metal stud bumping for flip chip applicationsUS73482152002�~5��17��2008�~3��25��Micron Technology, Inc.Methods for assembly and packaging of flip chip configured dice with interposerUS75013372006�~4��14��2009�~3��10��Fairchild Semiconductor CorporationDual metal stud bumping for flip chip applicationsUS79321712009�~1��22��2011�~4��26��Fairchild Semiconductor CorporationDual metal stud bumping for flip chip applications������l�Ϥ�Google ���� - Sitemap - USPTO �j�q�U�� - ���p�v�F�� - �A�ȱ�� - ���� Google �M�Q - �N���^�X��ƬO�Ѭ��ӷ~�M�Q��Ʈw (IFI CLAIMS Patent Services) ����©2012 Google