Source: https://insight.rpxcorp.com/pat/US20130325303A1
Timestamp: 2019-09-19 14:41:19
Document Index: 390160143

Matched Legal Cases: ['Application No. 2012', 'art 20', 'art 20', 'art 20', 'art 20', 'art 20', 'art 54', 'art 54', 'art 54', 'art 54']

Patent US 20130325303A1
US 20130325303A1
Est. Priority Date: 05/31/2012
a first and a second external terminals coupled to power supply wiring that couples one end of a current detecting resistance and a power supply terminal of a battery;
A semiconductor device has a first and a second external terminals coupled to power supply wiring that couples one end of a current detecting resistance and a power supply terminal of a battery, a third external terminal coupled to an other end of the current detecting resistance, and a control circuit for controlling an output of a second measurement current destined to the third external terminal, and measures a voltage difference between the first external terminal and the second external terminal.
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2. The semiconductor device according to claim 1, wherein the control circuit makes the second measurement current smaller than the first measurement current in a first period when a first short-circuit test operation is performed, and makes a magnitude of the second measurement current larger than that of the first period in a second period when a second short-circuit test operation is performed.
3. The semiconductor device according to claim 2, wherein the control circuit intercepts outputs of the first and the second measurement currents by the first and the second current sources in a current monitoring operation of measuring a current monitor voltage value that varies according to a current flowing through the current detecting resistance, and measures a voltage difference between the second external terminal and the third external terminal in the current monitoring operation.
4. The semiconductor device according to claim 3, comprising:
first internal wiring coupled to the first external terminal;
second internal wiring coupled to the second external terminal;
third internal wiring coupled to the third external terminal;
fourth and fifth internal wiring coupled to the measurement part;
a first switching circuit that couples the first internal wiring and the fourth internal wiring in the first and the second short-circuit test operations, and couples the second internal wiring and the fourth internal wiring in the current monitoring operation; and
a second switching circuit that couples the second internal wiring and the fifth internal wiring in the first and the second short-circuit test operations, and couples the third internal wiring and the fifth internal wiring in the current monitoring operation.
5. The semiconductor device according to claim 3, wherein the control circuit has an operating state setting register for storing a setup value that specifies an operating state of the semiconductor device, and switches the short-circuit test operation including the first and the second short-circuit test operations and the current monitoring operation based on the setup value.
6. The semiconductor device according to claim 1, wherein the first current source outputs the first measurement current to a first resistance coupled between the second external terminal and the power supply wiring, and wherein the second current source outputs the second measurement current to a second resistance coupled between the third external terminal and an other end of the current detecting resistance.
7. The semiconductor device according to claim 1, wherein the control circuit has a measured value register for storing a measured value outputted by the measurement part for every operating state, and outputs the measured value stored in the measured value register at a request from a high-order system.
8. The semiconductor device according to claim 4, wherein the measurement part comprises a variable gain amplifier for amplifying a voltage difference inputted through the fourth and the fifth internal wiring and an analog-digital converter for converting an output value of the variable gain amplifier into a digital value and outputting the measured value, and wherein the control circuit outputs a gain control signal for controlling an amplification factor of the variable gain amplifier.
9. The semiconductor device according to claim 1, wherein the current detecting resistance is a shunt resistance.
10. The semiconductor device according to claim 1, wherein the battery is a lead battery.
11. A battery state monitoring module, comprising:
a battery state monitoring device including a current monitor voltage measurement circuit for measuring a current monitor voltage value that varies according to a current value flowing through a current detecting resistance coupled to a power supply terminal of a battery; and
an arithmetic circuit that determines a state of the battery based on the current monitor voltage value measured by the battery state monitoring device, and transmits the determination result at a request from a high-order system, wherein the current monitor voltage measurement circuit includes;
12. The battery state monitoring module according to claim 11, wherein the control circuit makes the second measurement current smaller than the first measurement current in a first period when the first short-circuit test operation is performed, and makes a magnitude of the second measurement current larger than that of the first period in a second period when the second short-circuit test operation is performed.
13. The battery state monitoring module according to claim 11, comprising:
a filter circuit including;
a first resistance coupled between one end of the current detecting resistance and the second external terminal; and
a second resistance coupled between an other end of the current detecting resistance and the third external terminal.
14. The battery state monitoring module according to claim 11, wherein the battery state monitoring device further comprises a monitor circuit for outputting at least a battery voltage value that varies according to a voltage of the battery and a battery environmental temperature value corresponding to a temperature of the battery, and wherein the arithmetic circuit determines a state of the battery based on the current monitor voltage value, the battery voltage value, and the battery environmental temperature value.
15. The battery state monitoring module according to claim 11, wherein the control circuit stops outputs of the first and the second measurement currents by the first and the second current sources, respectively, in a current monitoring operation of measuring the current monitor voltage value, and wherein the measurement part measures a voltage difference between the second external terminal and the third external terminal in the current monitoring operation.
16. The battery state monitoring module according to claim 11, wherein the battery state monitoring module includes the current detecting resistance, and wherein the current detecting resistance is a shunt resistance.
a central control unit for outputting an internal ignition signal that directs start and stop of a engine to an electronic load circuit for controlling the engine and a starter, wherein the battery state monitoring device carries out a short-circuit test operation for testing a short circuit state between two external terminals coupled to two ends of the current detecting resistance, and a current monitoring operation of measuring a current monitor voltage value that occurs between the two ends of the current detecting resistance, and wherein the central processing unit makes the engine move to a stop state by the internal ignition signal in response to a vehicle becoming in a stop state, also directs a diagnosis processing of the battery including the short-circuit test operation and the current monitoring operation to the battery state monitoring device, and when making the vehicle move from the stop state to a run state, makes the starter and the engine start by the internal ignition signal and also receives a result of the diagnosis processing of the battery.
18. The vehicle system according to claim 17, wherein the battery state monitoring device includes:
19. The vehicle system according to claim 17, wherein the battery state monitoring device further includes a monitor circuit for outputting at least a battery voltage value that varies according to the voltage of the battery and a battery environmental temperature value corresponding to a temperature of the battery, and wherein the arithmetic circuit determines the state of the battery based on the current monitor voltage value, the battery voltage value, and the battery environmental temperature value.
20. The vehicle system according to claim 17, wherein when the result of the diagnosis processing indicates that an ability of the battery is insufficient for engine restart, the central control unit maintains the engine in an operating state regardless of a state of the vehicle during a period until an external ignition signal inputted from the outside indicates that the vehicle moves to the stop state.
The disclosure of Japanese Patent Application No. 2012-125211 filed on May 31, 2012 including the specification, drawings and abstract is incorporated herein by reference in its entirety.
FIG. 6 is a block diagram for explaining an operation of the first short-circuit test operation of the battery state monitoring device according to the first aspect of the present invention in case where the short circuit between the terminals is occurring by 0 Ω;
FIG. 7 is a block diagram for explaining an operation of the second short-circuit test operation of the battery state monitoring device according to the first aspect of the present invention in case where the short circuit between the terminals is occurring by 0 Ω;
FIG. 8 is a block diagram for explaining an operation of the first short-circuit test operation of the battery state monitoring device according to the first aspect of the present invention in case where the short circuit between the terminals is occurring by 100 Ω;
FIG. 9 is a block diagram for explaining an operation of the second short-circuit test operation of the battery state monitoring device according to the first aspect of the present invention in case where the short circuit between the terminals is occurring by 100 Ω;
The analog-digital converter 22 converts, an output value of the variable gain amplifier 21 into a digital value. This digital value is outputted as a measured value DOUT, and is stored in a measured value register 32 of the control circuit 30.
The control circuit 30 controls an output of the second measurement current destined to the third external terminal T3. The control circuit 30 has an operating state setting register and the measured value register 32. A setup value that specifies the operating state of the semiconductor device 1 is stored in the operating state setting register 31. The measured value outputted by the measurement part 20 is stored in the measured value register 32 for every operating state. Then, the control circuit 30 switches the short-circuit test operation and the current monitoring operation based on the setup value stored in the operating state setting register 31. Moreover, the semiconductor device 1 performs the first short-circuit test operation in a first period and performs the second short-circuit test operation in a second period in the short-circuit test operation, and the control circuit 30 switches the first short-circuit test operation and the second short-circuit test operation, for example, by a built-in sequencer. Moreover, the control circuit 30 outputs the measured value stored in the measured value register 32 at a request from the high-order system.
The control circuit 30 controls the first current source and the second current source 12 so that a current difference of the first measurement current and the second measurement current may be different between in the first short-circuit test operation and in the second short-circuit test operation. In the first embodiment, during the first period when the first short-circuit test operation is performed, the control circuit 30 makes the second measurement current smaller than the first measurement current; during the second period when the second short-circuit test operation is performed, it makes a magnitude of the second measurement current smaller than that of the first period. More specifically, the control circuit 30 makes the first current source output the first measurement current and stops the output of the second measurement current by the second current source in the first short-circuit test operation of the short-circuit test operation, and makes the first and the second current sources output the first and the second measurement currents, respectively, in the second short-circuit test operation. Moreover, in the short-circuit test operation, the control circuit 30 makes the first switching circuit SW1 couple the first internal wiring ND1 and the fourth internal wiring ND4, and makes the second switching circuit SW2 couple the second internal wiring ND2 and the fifth internal wiring ND5.
In the example shown in FIG. 2, the current monitoring operation in the normal state where the short circuit did not occur between the second external terminal T2 and the third external terminal T3 that were coupled through the shunt resistance RS was explained. However, if the short circuit is occurring between the second external terminal T2 and the third external terminal T3, the measurement result will become small and an erroneous measurement will occur. Then, FIG. 3 shows a block diagram of the semiconductor device 1 for explaining the current monitoring operation in case where short circuit between the terminals is occurring in the semiconductor device 1 according to the first embodiment. The example shown in FIG. 3 shows an example where the second external terminal T2 and the third external terminal T3 are short circuited by a resistance component of 100 Ω.
FIG. 4 is a block diagram for explaining an operation of the first short-circuit test operation of the semiconductor device 1 according to the first embodiment. As shown in FIG. 4, in the short-circuit test operation, the semiconductor device makes the first switching circuit SW1 couple the first internal wiring ND1 and the fourth internal wiring ND4. Moreover, the semiconductor device 1 makes the second switching circuit SW2 couple the second internal wiring ND2 and the fifth internal wiring ND5.
Then, the high-order system can acquire the measurement result acquired by the first short-circuit test operation and the measurement result acquired by the second short-circuit test operation from the control circuit 30, and can judge existence/absence of the short circuit between the terminals based on a difference of the two measurement results.
Incidentally, in the case of the example shown in FIG. 8 and FIG. 9, the high-order system determines that the short circuit between the terminals is occurring because there is a difference of 48.8 mV between the two measurement results.
Incidentally, various modifications are conceivable about a circuit configuration of the semiconductor device 1. Then, FIG. 10 shows a block diagram of a semiconductor device 1a that is a first modification of the semiconductor device 1. The semiconductor device 1a shown in FIG. 10 shows the modification of the first switching circuit SW1 and the second switching circuit SW2 of the semiconductor device 1. A battery state monitoring state 1a forms the first switching circuit SW1 with two switching circuits of switching circuits SWa, SWb. Moreover, the battery state monitoring state 1a forms the second switching circuit SW2 with two switching circuits of switching circuits SWc, SWd. Then, the battery state monitoring state 1a controls exclusively a group of the switching circuits SWa, SWc and a group of the switching circuits SWb, SWd exclusively by CNTsa to CNTsd included in the control signal CNT1. Thereby, the battery state monitoring state 1a can perform the same operation as that of the semiconductor device 1. Incidentally, in FIG. 10, a reference symbol of 10a is given to the input control circuit that has the first switching circuit SW1 and the second switching circuit SW2 each of which is comprised of two switching circuits, respectively, and a reference symbol of 13a is given to the route switching circuit.
Next, FIG. 11 shows a block diagram of a semiconductor device 1b that is a second modification of the semiconductor device 1 according to the first embodiment. As shown in FIG. 11, a battery state monitoring state 1b has a measurement part 20a that is a modification example of the measurement part 20. The measurement part 20 is a variable gain amplifier with chopping circuits 23, 24 provided to an input side route and an output side route thereof, respectively. Each of the chopping circuits 23, 24 is one that switches routes of two inputs and two outputs of the variable gain amplifier 21. The chopping circuits 23, 24 are controlled by chopping control signals CNTc1, CNTc2 included in the control signal CNT2.
The battery state monitoring device 40 according to the second embodiment has a current monitor voltage measurement circuit 2 and a control circuit 30a as circuits equivalent to the semiconductor device 1 according to the first embodiment. The control circuit 30a is a control circuit including a function of the control circuit 30 according to the first embodiment shown in FIG. 1. Moreover, the current monitor voltage measurement circuit 2 has the input control circuit 10 and the measurement part 20 of the semiconductor device 1 according to the first embodiment shown in FIG. 1. Incidentally, in an explanation of the battery state monitoring module BSM according to the second embodiment, parts already explained in the explanation of the semiconductor device 1 according to the first embodiment are given the same reference symbols as those of the first embodiment, and their explanations are omitted.
The selector 53 selects any one of the battery voltage Vbat, the module power voltage VDDe, and the temperature sensing voltage in response to a control signal CNT3 outputted from the control circuit 30a, and gives it to the state monitor part 54. The state monitor part 54 is a circuit block that has, for example, a variable gain amplifier and an analog-digital converter. A gain is set up in the variable gain amplifier according to a control signal CNT4 outputted from the control circuit 30a. Then, the state monitor part 54 outputs the measured value corresponding to the voltage value outputted from the selector 53. The measured value outputted by the state monitor part 54 is stored in a measured value register 32a of the control circuit 30a.
The control circuit 30a has an operating state setting register 31a, and makes measured value decision circuits, such as a sequencer, operate according to the setup value of the operating state setting register 31a. Then, the control circuit 30a outputs the control signal CNT3 for specifying the voltage of the measuring object decided by the measured value decision circuit and the control signal CNT4 for specifying a gain corresponding to the voltage of the measuring object.
The communication interface 55 performs a communication processing between the control circuit 30a and the arithmetic circuit 41 according to a communication protocol specified in the arithmetic circuit 41.
SOC=Remaining capacity (Ah)/initial full-charging capacity (Ah)×100 (1)
SOH=full-charging capacity at the time of deterioration/initial full-charging capacity (Ah)×100 (2)
in response to the external ignition signal IGNe becoming an enable signal. The internal ignition signal IGNi is given to the load circuit LDb through a CAN bus CB. Thereby, the starter starts starting. Moreover, the internal ignition signal IGNi is also given to the load circuit. LDa through the CAN bus CB. The load circuit LDc performs a control of the amount of fuel supplied to the engine, a control of opening and closing of a throttle, etc. according to the internal ignition signal IGNi.
KIUCHI, Hideki
US 9,494,654 B2
F02N11/0825 : related to prevention of en...
G01R31/3624 : based on combined voltage a...
Current Assignee: Kiuchi, Hideki
Sponsoring Entity: Kiuchi, Hideki