Source: http://www.google.es/patents/US5019905?dq=flatulence
Timestamp: 2014-03-10 17:01:04
Document Index: 350214065

Matched Legal Cases: ['art 74', 'art 74', 'art 74', 'art 74', 'art 74', 'art 74', 'art 74', 'arts 74', 'art 2716']

Patente US5019905 - Encoding and decoding of multiple video sources - Google PatentesB�squeda Im�genes Maps Play YouTube Noticias Gmail Drive M�s »Iniciar sesi�n B�squeda avanzada de patentesPatentesA system for encoding selected signal position information from a plurality of video signal sources onto the video signals and for selecting a predetermined one of the signals for display by decoding the encoded information. The encoding portion encodes input signal position information in serial pulse...http://www.google.es/patents/US5019905?utm_source=gb-gplus-sharePatente US5019905 - Encoding and decoding of multiple video sources B�squeda avanzada de patentes N�mero de publicaci�nUS5019905 ATipo de publicaci�nConcesi�n N�mero de solicitudUS 07/099,148 Fecha de publicaci�n28 May 1991 Fecha de presentaci�n18 Sep 1987 Fecha de prioridad18 Sep 1987TarifaCaducada N�mero de publicaci�n07099148, 099148, US 5019905 A, US 5019905A, US-A-5019905, US5019905 A, US5019905A InventoresShiyang Gao, Yacov Pshtissky Cesionario originalVicon Industries, Inc.Exportar citaBiBTeX, EndNote, RefManCitas de patentes (11), Otras citas (2), Citada por (21), Clasificaciones (10), Eventos legales (4) Enlaces externos: USPTO, Cesi�n de USPTO, EspacenetEncoding and decoding of multiple video sourcesUS 5019905 A Resumen A system for encoding selected signal position information from a plurality of video signal sources onto the video signals and for selecting a predetermined one of the signals for display by decoding the encoded information. The encoding portion encodes input signal position information in serial pulse form on the back porch of the respective video signal. An alphanumeric character may also be mixed into the encoded signal. A single output line provides, in sequence, the encoded video signal of each input position. The encoding portion also changes each input video signal to a zero blanking level. The encoded output signal may either be supplied directly to the decoding portion or may be recorded and played back into the decoder. The decoding portion selects a particular signal for display by decoding the encoded information and comparing it to a preset number. When this comparison indicates equality, a gating signal is provided which releases digitally stored video information related to that position to an output digital to analog converter. The output of the converter is supplied to a video monitor.
17. The system of claim 16 wherein, in said decoder, said digital memory is a 64K
Referring now to the encoder detailed schematic, FIG. 4, U.sub.1 and U.sub.2 are analog multiplexers, e.g., RCA part CD405-1. They are controlled by 4 bit data from U.sub.3, a position counter, typically part 74C00 made by Motorola. The outputs of U.sub.1 and U.sub.2 at pin 3 are applied to Q.sub.1, an emitter follower, then to Q.sub.3 and Q.sub.4, a video amplifier. Typical part types for these transistors are: e Q.sub.1 =2N 3904, Q.sub.4 =2N3906, and Q.sub.3 =J309. The input to the video amplifier is clamped to a d.c. level set by R10, a potentiometer, by horizontal sync pulses. If the sync is missing because of incoming video level variations, a dummy sync will be generated by U4 (LM555 timer) to assist clamping.
Q.sub.5, Q.sub.6 and U.sub.3 form a sync separator which is connected to the output of the video amplifier since the level variation will be limited at that point.
Q.sub.5 and Q.sub.6 are typically 2N3906 transistors while U.sub.3 is part of a Motorola 74C00. Q.sub.7 (typically transistor 2N3904) is turned on by the sync and it pulls down the output to compensate the sync amplitude loss while clamping which is caused by load impedance variation to Q.sub.1 when Q.sub.2 conducts Q.sub.2 is used in the arrangement shown to avoid a high loop gain which may result in oscillation.
The 4 bit position data are decoded to 16 outputs by U.sub.12 (typically Motorola part 74HC154). If positions of S2 and S3 are set to by-pass, the corresponding outputs of U.sub.12 will be switched to U.sub.13 and U.sub.14 (typically Motorola part 74LS30). A 2MHZ bypass pulse generator, 1/4 U.sub.6, will then be enabled (U.sub.6 is typically a Motorola HC.sub.132). Position counter U.sub.2 8 will advance to a position which is not by-passed in a negligible time. If a position is scheduled but video is missing for some reason, U.sub.5 (National LM555) will generate an Auto Bypass pulse after 2.2 horizontal cycles. No disturbance will be noticed on the decoder side if there is one position missing video.
Normal sequence of the encoder is accomplished by counting pulses from three sources--internal or head switching from the VCR or video switching pulse from the VCR. The real counting pulse is a 1.2 ms pulse generated by U.sub.22 (typically Motorola part 74HC221) which will be disabled by U.sub.23 (typically RCA part 74C74) if the pause button is pressed. U.sub.23 will be reset by an R-C delay (e.g., 1 minute time constant) or by pressing again.
The other half of U.sub.22 is a non-triggerable, monostable multivibrator for generating a clean (one-shot) vertical pulse at pin 5, which is used as an internal counting source. For internal and head switching mode, the time lapse function is fulfilled by counting up U.sub.17 and U.sub.18 (typically Motorola part 74HC390). These counters are reset when position counter U.sub.28 advances or increments to the next position. The outputs of U and U.sub.18 are compared with BCD coded switch setting by U.sub.15 and U.sub.16 so that, if there is a data match, the output of U.sub.15 will, through logic multiplexers U.sub.19 and U.sub.220 (typically 74HC157 and 74HC-1-53 respectively) be applied to pin 15 of U.sub.21 (typically Motorola part 74 HC112), to reset half of U.sub.21. It will be triggered by the next vertical sync pulse applied to pin 1 of U.sub.21. A falling edge at pin 6/U.sub.221 will then trigger U.sub.22 to generate a 1.2 ms counting pulse. R-C network (e.g., 10k the switch-over to a second vertical pulse.
If the video switching pulse from the VCR is used, it will take over and control the switch directly through U.sub.20. If an internal pulse source or head switching pulse is used, the time lapse mode will be switched to real time mode (2 hour mode) for 1 to 5 minutes when an alarm occurs.
U.sub.8 to U.sub.11 encodes video position data onto the back porch of the output video. These are typically parts 74HCTLS04, CD4051, 74HC221 and 74HC161, respectively. U.sub.8 inverts 4 bit position data since complement code is preferably utilized throughout. U.sub.10 generates the required modulated pulse in the back porch period. U.sub.11 is a line counter which is enabled by one-shot vertical sync. It will stop counting after it counts to 8 so three bits of the output of U.sub.11 corresponding to 8 lines, will drive U.sub.9 to select correct start pulse and position data to pin 3 of U.sub.9. U.sub.9 is enabled by the output of U.sub.10, therefore the signal modulated onto the video will be pulses. The pulses are then applied to the video through emitter follower Q.sub.10 (typically 2N3904). U.sub.25 and U.sub.26 (typically Intel part 2716 and National MM58146, respectively) form a character generator for superimposing a position alpha-numeric onto the output video. U.sub.25 is a PROM for encoding 4 bit binary position data to two digit BCD code data. U.sub.26 accepts the BCD data and generates the required character image signal. Transistors Q.sub.11, Q.sub.12 and Q.sub.13 (all 2N3904 transistors) function as part of the character generator to supply the required signal to the Video Out.
In FIG. 5, the block arrangement of the decoder 15 is presented, which provides a freeze video display from one of 16 sources at the VCR output. The video signal from a VCR or the encoder is stored in a memory bank (64K 40 and Video AmplifierA/D converter 45. The digitized video signal is arranged in the memory by address counter and memory control 44. The memory retains the video information corresponding successively to each of the different camera sources. The output of the memory is applied to data latch and select 47, which either applies the stored information from the memory to the output D/A 48 or applies a signal representing one field of incoming video from video amplifier 45 while the memory 46 is being updated.
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OF NEW YORK,NEW YOFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:PSHTISSKY, YACOV;GAO, SHIYANG;REEL/FRAME:004779/0751GirarImagen originalP�gina principal de Google - Sitemap - Descargas masivas de USPTO - Pol�tica de privacidad - Condiciones de servicio - Acerca de Google Patentes - Danos tu opini�nDatos proporcionados por IFI CLAIMS Patent Services©2012 Google