Source: http://www.google.com/patents/US6187614?dq=6317900
Timestamp: 2017-09-25 13:00:37
Document Index: 625348099

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Patent US6187614 - Electronic component, method for making the same, and lead frame and mold ... - Google Patents
A lead has a thick part having a thickness of 0.2 mm and a thin part having a thickness of 0.1 mm. The thin part is formed having a greater width than the thick part for preventing the lead from slipping from a resin. A semiconductor chip is fixed on the thin part using a conductive adhesive. A lateral...http://www.google.com/patents/US6187614?utm_source=gb-gplus-sharePatent US6187614 - Electronic component, method for making the same, and lead frame and mold assembly for use therein
Publication number US6187614 B1
Application number US 09/379,623
Also published as CN1155083C, CN1163478A, EP0794572A2, EP0794572A3, EP1517371A2, EP1517371A3, EP1517372A2, US5977613
Publication number 09379623, 379623, US 6187614 B1, US 6187614B1, US-B1-6187614, US6187614 B1, US6187614B1
Inventors Hirofumi Takata, Tadashi Tanida
Patent Citations (8), Referenced by (40), Classifications (46), Legal Events (7)
Electronic component, method for making the same, and lead frame and mold assembly for use therein
US 6187614 B1
1. A method of fabricating a plurality of electronic components of a resin molded package type, said method comprising:
(a) over a plate-like lead frame comprising a plurality of bridge parts which are formed into a lattice and a plurality of sets of lead parts which extend towards a plurality of lattice open spaces which are horizontally and perpendicularly, and two-dimensionally defined by said plurality of bridge parts, a step of fixing each of a plurality of electronic elements in a corresponding lattice open space of said plurality of lattice open spaces;
(b) a step of electrically connecting each said electronic element with a corresponding set of lead parts of said plurality of sets of lead parts;
(c) a step of encapsulating said plurality of electronic elements and said plurality of sets of lead parts with a resin so that said plurality of electronic elements and said plurality of sets of lead parts are continuous with one another through common gates at least in one direction;
(d) a step of cutting said lead frame together with said resin such that said plurality of sets of lead parts of said lead frame are separated from said plurality of bridge parts respectively and resin cut surfaces and lead cut surfaces are formed at the same time on individual package lateral surfaces of said plurality of electronic components; and
(e) a step of forming a plurality of grooves for guiding a cutting blade to be used in said cutting step in a top surface of said resin along said bridge parts of said lead frame,
wherein each said groove is formed at least between two adjacent electronic elements of said plurality of electronic elements, and
wherein each said groove has a bottom width and a top width, said top width being greater than said bottom width.
2. The electronic component fabrication method of claim 1, wherein said plurality of grooves are formed at least where said resin cut surfaces and lead cut surfaces of said plurality of electronic components are formed at the same time.
3. The electronic component fabrication method of claim 1, wherein said plurality of grooves are formed horizontally and perpendicularly along said bridge parts of said lead frame.
4. The electronic component fabrication method of claim 1, wherein each said groove is formed of a pair of elongated grooves running parallel with each other.
5. The electronic component fabrication method of claim 1 further comprising a step of forming a plurality of ridges for use in locating a cutting blade to be used in said cutting step in a top surface of said resin along said bridge parts of said lead frame.
6. The electronic component fabrication method of claim 5, wherein said plurality of ridges are formed horizontally and perpendicularly along said bridge parts of said lead frame.
7. The electronic component fabrication method of claim 5, wherein the maximum width of each said ridge is greater than the width of said bridge part.
This is a divisional of application Ser. No. 08/811,606, filed Mar. 4, 1997 now U.S. Pat. No. 5,977,613.
The fabrication of electronic component 70, that is, the assembly process thereof, comprises a die bonding process, a wire bonding process, a molding process, a deburring process, a lead finishing process, a trimming process, and a forming process. In the die bonding process, semiconductor chips are fixed on the corresponding leading ends of first lead parts 71 of lead frame 80 of FIG. 23 using a conductive adhesive. In the wire bonding process, two electrodes on each semiconductor chip are electrically connected with the leading ends of second and third lead parts 72 and 73 by fine wires of Au (gold). In the molding process, a mold assembly for transfer mold is used for integral encapsulation of the individual semiconductor chips, the Au wires, the leading ends of lead parts 71-73 with resin 74. In this molding process; a plurality of cavities, defined between an upper mold element and a lower mold element, are one-dimensionally arranged, running in the lengthwise direction of lead frame 80 and being isolated from one another. In other words, a resin is injected, from a common runner through respective gates, into each cavity. FIG. 24 shows lead frame 80 that has undergone a molding process. In the deburring process, burrs, formed by resin escaped from fine gaps defined between the mold assembly and the lead frame 80 onto lead parts 71-73, are removed. In the lead finishing process, lead parts 71-73 extending from each resin 74 are solderplated. Deburring is an indispensable process to smooth solderplating. In the trimming process, lead parts 71-73 are cut such that individual electronic components 70 are separated. In the forming process, bending is performed so that each lead part 71-73 has a bent, as shown in FIG. 22.
(b) a lead which is electrically connected within the electronic element; and
More specifically, in a method of efficiently fabricating a plurality of electronic components of a resin molded package type of this invention, a plate-like lead frame is employed which comprises a plurality of bridge parts which are formed into a lattice and a plurality of sets of lead parts which extend towards a plurality of lattice open spaces which are horizontally and perpendicularly, and two-dimensionally defined, by the plurality of bridge parts. This fabrication method comprises the steps of:
FIG. 3 is a cross sectional view of the electronic component taken along the line III—III of FIG. 1.
FIG. 4 is a cross sectional view of the electronic component taken along the line IV—IV of FIG. 1.
FIG. 7 is a cross sectional view of the lead formation part taken along the line VII—VII of FIG. 6.
FIG. 8 is a cross sectional view of the lead formation part taken along the line VIII—VIII of FIG. 6.
FIG. 11 is a cross sectional view of the mold part taken along the line XI—XI of FIG. 10.
FIG. 12 is a cross sectional view of the mold part taken along the line XII—XII of FIG. 10.
FIG. 18 is a cross sectional view of the electronic component taken along the line XVIII—XVIII of FIG. 17.
FIG. 19 is a cross sectional view of the electronic component taken along the line XIX—XIX of FIG. 17.
FIGS. 1-4 show the appearance and internal structure of an electronic component of a surface mount type in accordance with the present invention. FIG. 1 is a plan view of an electronic component in accordance with the present invention. FIG. 2 is a front view of the electronic component of FIG. 1. FIG. 3 is a cross sectional view of the electronic component taken along the line III—III of FIG. 1. FIG. 4 is a cross sectional view of the electronic component taken along the line IV—IV of FIG. 1. 10 is an electronic component of this invention. This electronic component 10 has a first lead 11, a second lead 12, a third lead 13, a semiconductor chip (an electronic element) 15, and a resin 18. The bottom dimensions of resin 18 having the form of a rectangular parallelepiped are 1.6 mm×0.8 mm. Each of leads 11-13 has the same length, 0.65 mm.
First lead 11 has a thick part 11a whose length, width, and thickness are 0.15 mm, 0.2 mm, and 0.2 mm and a thin part 11 b whose length, width, and thickness are 0.5 mm, 0. 5 mm, and 0.1 mm. A step of 0.1 mm is provided on the bottom surface side of first lead 11. First lead 11 has a flat top surface. To prevent first lead 11 from slipping from resin 18, thin part 11 b has a top surface (0.5 mm×0.5 mm ) which is greater in width than thick part's 11 a top surface and which is great in area than semiconductor chip 15. Semiconductor chip 15 is fixed on thin part 11 b using a conductive adhesive 14. As a result of such arrangement, semiconductor chip 15 is electrically connected, at its bottom surface, with first lead 11. A lateral surface (0.2 mm×0.2 mm ) of thick part 11 a and a lateral surface of resin 18 are formed at the same time by a single cut such that the lateral surface of thick part 11 a is located at a lower end area of the lateral surface of resin 18 and the lateral surfaces of thick part 11 a and resin 18 are exposed forming the same plane, in other words these lateral surfaces are flush with each other.
Second lead 12 has a thick part 12 a (length: 0.15 mm; width: 0.2 mm, thickness: 0.2 mm ) and a thin part 12 b (length: 0.5 mm; width: 0.3 mm, thickness: 0.1 mm ). Likewise, third lead 13 has a thick part 13 a (length: 0.15 mm; width: 0.2 mm, thickness: 0.2 mm ) and a thin part 13 b (length: 0.5 mm; width: 0.3 mm, thickness: 0.1 mm). A step of 0.1 mm is provided on the bottom sides of second and third leads 12 and 13, and second and third leads 12 and 13 each have a flat top surface. To prevent second and third leads 12 and 13 from slipping from resin 18, thin parts 12 b and 13 b have top surfaces wider than those of thick parts 12 a and 13 a. Thin parts 12 b and 13 b are further provided with notches 12 c and 13 c which function as means for preventing the leads 12 and 13 from slipping from resin 18. Each notch 12 c and 13 c has a dimension of 0.08 mm as a depth. Lateral surfaces (0.2 mm×0.2 mm ) of thick parts 12 a and 13 a, and another lateral surface of resin 18 are formed at the same time by a single cut such that the lateral surfaces of thick parts 12 a and 13 a are located at lower end areas of the lateral surface of resin 18 and the lateral surfaces of thick parts 12 a and 13 a and resin 18 are exposed forming the same plane, in other words these lateral surfaces are flush with each other. Two electrodes on semiconductor chip 15 are electrically connected with thin parts 12 b and 13 b of second and third leads 12 and 13 by Au wires 16 and 17. First to third leads 11-13 are formed of soft material that cuts easily such as FeNi alloy, Cu, and Al.
Resin 18 encapsulates most of first to third leads 11-13, semiconductor chip 15, Au wire 16, and Au wire 17. 18 a is a peripheral part of the resin top surface.
Peripheral part 18 a is chamfered. Formed at one corner of the resin top surface is a recess part having a diameter of from 0.2 mm to 0.3 mm. This recess part serves as polarity mark 18 b. Each of bottom surfaces (0.15 mm×0.2 mm ) of thick parts 11 a-13 a of first to third leads 11-13 is exposed at resin bottom surface 18 c and projects by from 0.03 mm to 0.05 mm so as to meet lead stand-off specifications. Because such a projection length is less than the difference in thickness between thick parts 11 a-13 a and thin parts 11 b-13 b (i.e., 0.1 mm ), the bottom surfaces of thin parts 11 b-13 b of first to third leads 11-13 are completely covered with resin 18. The exposed surfaces of first to third leads 11-13 are solderplated such that each of the exposed surfaces is covered with a film of solder the adequate thickness of which is 4-15 μm.
In accordance with electronic component 10 described above, at the time of performing a mounting process on a printed board, a corner part, which is defined between a lateral surface and a bottom surface of each of thick parts 11 a-13 a, is used for establishing connection with the outside. The corner parts are solderplated therefore providing good solderability during the mounting process. A space, taken up by electronic component 10 on the printed board, is equal to the area of resin bottom surface 18 c, which makes it possible to provide higher mounting density on the printed board. Additionally, lead deformation is unlikely to occur.
FIGS. 5-8 respectively illustrate a lead frame for use in the fabrication of electronic component 10 in a plan view, in an enlarged view, in a cross sectional view taken along the line VII—VII, and in another cross sectional view taken along the line VIII—VIII. Lead frame 30 is formed by a metal plate having the form of a rectangle and is comprised of lead formation part 31 and exterior frame 32 for enclosing lead formation part 31. Exterior frame 32 is 20 mm×50 mm and is 0.2 mm thick. Referring to FIG. 5, exterior frame 32 has, at its corner parts, four portions defining respective holes 33 having a diameter of 1 mm for locating the lead frame 30. In addition to the provision of location holes 33, exterior frame 32 has seven portions along one of the long sides thereof, these seven portions defining seven feed holes 34 having a diameter of 2 mm.
As shown in detail in FIGS. 6-8, lead formation part 31 includes a vertical bridge part 35 and a lateral bridge part 36. Vertical bridge part 35 bridges opposite two long sides of exterior frame 32. Lateral bridge part 36 bridges the remaining opposite two short sides of exterior frame 32. Vertical and lateral bridge parts 35 and 36 each have a width of 0.2 mm and a thickness of 0.2 mm. These vertical and lateral bridge parts 35 and 36 define 220 lattice open spaces (11 columns×20 rows). The vertical pitch of the lattice spaces is 1.3 mm and the lateral pitch thereof is 2.1 mm. First to third lead parts 11-13 extend towards the lattice open spaces, in other words 220 sets of first to third lead parts 11-13 are two-dimensionally arranged at the foregoing pitches. These pitches are ½ to ⅓ of the conventional ones. First lead part 11 downwardly extends from exterior frame 32 and lateral bridge part 36 by 0.8 mm, while second and third lead parts 12 and 13 upwardly extend from exterior frame 32 and lateral bridge part 36 by 0.8 mm.
Each first lead part 11 has a base end 11 a (length: 0.3 mm; width: 0.2 mm; thickness: 0.2 mm ) and a leading end 11 b (length: 0.5 mm; width: 0.5 mm; thickness: 0.1 mm ). A step of 0.1 mm is provided on the bottom surface side of first lead part 11. Leading end 11 b has a top surface (0.5 mm×0.5 mm ) that is greater in width than base end's 11 a top surface.
Each second lead part 12 has a base end 12 a (length: 0.3 mm; width: 0.2 mm; thickness: 0.2 mm ) and a leading end 12 b (length: 0.5 mm; width: 0.3 mm; thickness: 0.1 mm ). Likewise, each third lead 13 has a base end 13 a (length: 0.3 mm; width: 0.2 mm; thickness: 0.2 mm ) and a leading end 13 b (length: 0.5 mm; width: 0.3 mm; thickness: 0.1 mm ). A step of 0.1 mm is provided on the bottom surface side of second lead part 12, and a step of 0.1 mm is provided on the bottom surface side of third lead part 13. Leading end 12 b has a wider top surface than base end 12 a, and leading end 13 b has a wider top surface than base end 13 a. Leading ends 12 b and 13 b of second and third lead parts 12 and 13 have notches 12 c and 13 c having a depth of 0.08 mm.
The fabrication of the above-described electronic component 10, that is, the assembly process, comprises a die bonding process, a wire bonding process, a molding process, a dicing (cutting) process, and a lead finishing process. In the die bonding process, semiconductor chip 15 is fixed to leading end 11 b of first lead part 11 of lead frame 30 using conductive adhesive 14. In the wire bonding process, two electrodes on semiconductor chip 15 are electrically connected with leading ends 12 b and 13 b of second and third lead parts 12 and 13 by fine Au wires 16 and 17. Both in the die bonding process and in the wire bonding process, feed holes 34, formed in exterior frame 32 of the lead frame, are used for mounting, on a single lead frame 30, 220 semiconductor chips 15. In the molding process, a mold assembly for transfer mold is used for integral encapsulation of most of first to third lead parts 11-13, semiconductor chips 15, and Au wires 16 and 17.
FIGS. 9-12 are views of lead frame 30 after molding is completed. FIG. 9 is a plan view of the post-molding lead frame 30. FIG. 10 is an enlarged view of the post-molding lead frame 30. FIG. 11 is a cross sectional view of the post-molding lead frame 30 taken along the line XI—XI. FIG. 12 is another cross sectional view of the post-molding lead frame 30 taken along the line XII—XII. Referring first to FIG. 9, therein shown are ten common gates 41 for resin introduction, and a mold part 42 defined by an upper mold element and a lower mold element. These ten common gates 41 are provided at positions corresponding to the first, third, fifth, seventh, ninth, twelfth, fourteenth, sixteenth, eighteenth and twentieth columns from the left-hand side of the foregoing lattice structure of lead frame 30 (11 columns×20 rows).
As shown in detail in FIGS. 10-12, at the same time that a resin 18, which has encapsulated most of lead parts 11-13, semiconductor chips 15, and Au wires 16-17, is formed in each of the lattice open spaces, additional resins 43-45 are formed overlying vertical bridge part 35 and lateral bridge part 36. Additional resins 43-45 have the same height as resin 18. Each resin 18 is horizontally and perpendicularly coupled one another via additional resins 43-45. Peripheral part 18 a is chamfered and polarity mark 18 b is formed at one corner of the top surface, having a diameter of from 0.2 mm to 0.3 mm. Additional resin 43, which is formed as a ridge on vertical bridge part 35, is chamfered at its periphery, and the width of additional resin's 43 top surface is equal to the width of vertical bridge part 35 (i.e., 0.2 mm ). In other words, two grooves, which are greater in width at top than at bottom, are formed between two adjacent molding resins 18 facing each other across additional resin 43, along vertical bridge part 35. Likewise, additional resin 44, which is formed as a ridge on lateral bridge part 36, is chamfered at its periphery, and the width of additional resin's 44 top surface is equal to the width of lateral bridge part 36 (0.2 mm ). In other words, two grooves, which are greater in width at top than at bottom, are formed between two adjacent molding resins 18 facing each other across additional resin 44, along lateral bridge part 36. Additional resin 45, which is formed overlying a point where vertical bridge part 35 and lateral bridge part 36 cross, is chamfered at its periphery and has a top surface of 0.2 mm×0.2 mm. FIGS. 10-12 show examples in which a series of additional resins 43-45 is formed also on exterior frame 32 of the lead frame.
FIGS. 11 and 12 show upper mold element 51 and lower mol d element 52 for use in a molding process. Lead frame 30 having thereon 220 semiconductor chips 15 which are horizontally and perpendicularly, and two-dimensionally arranged, is placed on lower mold element 52. Lower mold element 52 has a forming surface that is provided with a great number of recess parts, thereby allowing the bottom surfaces (0.3 mm×0.2 mm ) of base ends 11 a-13 a of first to third lead parts 11-13, exterior frame 32, vertical bridge part 35, and lateral bridge part 36 to project from resin bottom surface 18 c by 0.03 mm to 0.05 mm. Defined between upper mold element 51 and lower mold element 52 are 220 cavities for the formation of molding resin 18 which are arranged horizontally and perpendicularly, and two-dimensionally, and open spaces for the formation of additional resins 43-45 which have the same height as the cavities. These 220 cavities are horizontally and perpendicularly coupled one another through the open spaces. Upper mold element 51 has a forming surface in which many recess parts having a depth capable of defining most of the cavities and most of the communication open spaces for the cavities are formed. The cavities and the communication open spaces of the cavities are easily filled with a resin that is injected from a common runner through the foregoing ten common gates 41. The angle and dimensions of each common gate 41 are 30 degrees and 0.4mm×0.2 mm. Additionally, at least one of upper and lower mold elements 51 and 52 is provided with pins (not shown in the figure) which are inserted into location holes 33 formed in exterior frame 32 of the lead frame. Such an arrangement prevents lead frame 30 from making a displacement with respect to the mold assembly.
In the dicing process, lead frame 30 is cut together with resins 18, 43, 44, and 45 with a single cutting blade having a width of 0.5 mm in order that resin cut surfaces and lead cut surfaces are formed at the same time at package lateral surfaces of two electronic components 10 corresponding to two adjacent semiconductor chips 15. The cutting blade width is greater, by 0.3 mm, than the width of vertical and lateral bridge parts 35 and 36 of the lead frame (0.2 mm ). W1 and W2 of FIGS. 10-12 each indicate a cutting width of 0.5 mm. Location hole 33, formed in exterior frame 32 of the lead frame, is used for identification of a cutting position. The top surfaces of additional resins 43-45 having a width of 0.2 mm are located at the centers of W1 and W2, and grooves, horizontally and perpendicularly formed by chamfer, guide a blade for dicing in a travelling direction. As a result, individual electronic components 10, each of which having a rectangular parallelepiped-like resin 18 whose bottom surface dimensions are 1. 6 mm×0.8 mm and first to third leads 11-13 having a length of 0.65 mm, are separated. At this time, in lead frame 30, base portions having a length of 0.15 mm of base ends 11 a-13 a of each lead part, are discarded. As a result, a cut surface of first lead 11, which has dimensions of 0.2 mm×0.2 mm, is exposed at a lower end area of one lateral surface of resin 18, being flush with the lateral surface of resin 18. In addition, cut surfaces of second and third leads 12 and 13 (0.2 mm×0.2 mm ) are exposed at lower end areas of opposite lateral surface of resin 18, being flush with the opposite lateral surface of resin 18. Further, formed on a package bottom surface are projecting surfaces (0.15 mm×0.2 mm ) of first to third leads 11—13. As described above, use of a soft material which cuts easily for forming lead frame 30 including first to third lead parts 11-13 reduces wear of a cutting blade for dicing, as a result of which variations in cutting width and reductions in cutting rate are suppressed.
In the lead finishing process, the exposed surfaces of first to third leads 11-13 are solderplated such that the exposed surfaces are covered with a film of solder having a thickness of 4-15 μm. As a result, solder in the form of film is applied onto each cut surface (0.2 mm×0.2 mm ) of first to third leads 11-13 formed on the package lateral surface and onto each projecting surface (0.15 mm×0.20 mm ) of first to third leads 11-13 formed on the package bottom surface. Other plating may be employed instead of solderplating. In addition, solderplating may be eliminated depending on the material of lead frame 30.
FIGS. 13 and 14 illustrate the appearances of other surface mount type electronic components in accordance with the present invention. Referring to FIG. 13, an electronic component 20 is shown in which, instead of a chamfer, a step is provided at peripheral part 18 a of the resin top surface. As in the above-described case, the appearance of resin 18 can be changed freely by replacement of upper mold element 51. Referring now to FIG. 14, an electronic component 21 is illustrated in which resin 18 has the form of a perfect rectangular parallelepiped and the bottom surfaces of thick parts 11 a-13 a and resin bottom surface 18 c are exposed forming the same plane. In this case, lower mold element 52 may have a flat forming surface. Even with the FIG. 14 structure, lead stand-off specifications can be met by subjecting the exposed surfaces of first to third leads 11-13 to solderplating for formation of solder films thereon having a thickness of 4-15 μm. In accordance with electronic component 10 of FIGS. 1-4 or in accordance with electronic component 20 of FIG. 13, a chamfer or a step is provided at peripheral part 18 a of the resin top surface, which provides the advantage that, when cutting resin 18, the thickness of resin to be cut is thin in comparison with the case of electronic component 21 of FIG. 14.
In electronic component 21 of FIG. 14, lead thick parts 11 a-13 a have bottom surfaces which are exposed being flush with resin bottom surface 18 c. In such a case, there is the possibility that resin, which has been injected in the molding process, enter between the flat forming surface of the lower mold element and the bottom surfaces of lead thick parts 11 a-13 a, particularly at the center of the lead frame. FIGS. 15 and 16 show solutions to this problem. FIG. 15 shows electronic component 22 in which T-shaped groove 18 d is formed in resin bottom surface 18 c. FIG. 16 shows electronic component 23 in which three U-shaped grooves 18 e-g are formed in resin bottom surface 18 c. These three U-shaped grooves 18 e-g are formed in such a way as to enclose lead thick parts 11 a-13 a, respectively. As a result of such arrangement, the foregoing entering of resin can be prevented because ridges of the lower mold element corresponding to grooves 18 d-g achieve a reduction in resin pressure.
With reference to FIGS. 17-19, the appearance and internal structure of another surface mount type electronic component in accordance with the present invention is shown. FIG. 17 is a plan view of the electronic component. FIG. 18 is a cross sectional view of the electronic component taken along the line XVIII—XVIII of FIG. 17. FIG. 19 is a cross sectional view of the electronic component taken along the line XIX—XIX of FIG. 17. In electronic component 24 of FIGS. 17-19, peripheral part 18 a of the resin top surface is chamfered and lead thick parts 11 a-13 a have bottom surfaces which are exposed being flush with resin bottom surface 18 c. Electric component 24 has a resin lateral surface which is composed of a cut surface 18 x that is formed at a lower end area of the resin lateral surface simultaneously with a lead cut surface by dicing, and a non-cut surface 18 y formed by molding. Cut surface 18 x of the resin lateral surface is perpendicular to resin bottom surface 18 c, and a part of cut surface 18 x forms common gate cut surface 18 z. This common gate cut surface 18 z is located between the cut lateral surfaces of second and third lead thick parts 12 a and 13 a. Non-cut surface 18 y of the resin lateral surface is inclined by an angle of three degrees with respect to resin bottom surface 18 c so that molding resin 18 can be withdrawn easily from the mold assembly. The exposed surfaces of first to third leads 11-13 are solderplated. Lead frame 30, shown in FIGS. 5-8, may be used in the fabrication of electronic component 24.
FIGS. 20 and 21, which correspond to FIGS. 11 and 12, shows situations after molding for electronic component 24 is completed. In FIGS. 20 and 21, 51 is an upper mold element. 52 is a lower mold element. 41 is a common gate for resin injection. Defined between upper mold element 51 and lower mold element 52 are 220 cavities which are horizontally and perpendicularly, and two-dimensionally arranged for the formation of molding resins 18. Note that these cavities are communicated with one another through common gates 41 only in the column direction. Common gates 41 are located at positions corresponding to each column of the 11×22 cavities. Lower mold element 52 has a flat forming surface, and, accordingly, elastic sheet 53 is inserted between lower mold element 52 and the lead frame, to prevent the entering of injected resin and to protect the lead bottom surface. In such a case, base ends 12 a and 13 a of second and third lead parts 12 and 13 of each electronic component are pressed by upper mold element 51 at positions away from the common gate 41. It is possible to prevent the entering of injected resin without elastic sheet 53, depending on the resin pressure.
In accordance with electronic component 24, a cut surface of first lead 11 is exposed at a lower end area of a lateral surface of resin 18, being flush with resin cut surface 18 x, and cut surfaces of second and third leads 12 and 13 are exposed at lower end areas of opposite lateral surface of resin 18, being flush with resin cut surface 18 x. In addition, molding is performed such that each of the bottom surfaces of first to third leads 11-13 is exposed being flush with resin bottom surface 18 c. Further, the exposed cut surfaces and exposed bottom surfaces of first to third leads 11-13 are continuous, and here are formed lead corner parts for connections with the outside. Accordingly, electronic component 24 is a super small component most suitable for surface mount technology.
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U.S. Classification 438/112, 438/127, 257/E21.504, 438/124, 257/E23.044, 257/E23.124
International Classification H05K3/34, H01L21/56, H01L23/495, H01L23/31
Cooperative Classification H01L2924/10161, H01L2224/8592, H01L2224/05554, H01L24/73, H01L2924/181, H01L24/49, H01L24/48, H01L24/45, H01L21/565, H01L2224/97, H01L2224/48247, H05K3/3426, H01L23/49562, H01L2224/45144, H01L23/49548, H01L2924/01033, H01L24/97, H01L2924/01013, H01L2924/01006, H01L2224/32245, H01L2924/01079, H01L2224/48465, H01L2924/01029, H01L2924/01005, H01L2224/48091, H01L2224/49175, H01L2924/01082, H01L2924/01078, H01L23/3107, H01L2224/73265, H01L2924/12041
European Classification H01L24/97, H01L23/495G4, H01L21/56M, H01L23/495G8, H01L23/31H