Source: http://www.google.com/patents/US20070007644?dq=7,546,338
Timestamp: 2016-07-28 13:06:18
Document Index: 245673684

Matched Legal Cases: ['art 1400', 'art 1400', 'art 1400', 'art 1400', 'art 1500', 'art 1500', 'art 1500', 'art 1500', 'art 1500', 'art 1500', 'art 1600', 'art 1600', 'art 1600', 'art 1600', 'art 1700', 'art 1700', 'art 1700', 'art 1800', 'art 1800', 'art 1800', 'art 1800', 'art 1900', 'art 1900', 'art 1900', 'art 1900', 'art 2600', 'art 2600', 'art 2600', 'art 2600', 'art 2600', 'art 2600', 'art 2600', 'art 2600', 'art 2600', 'art 2600', 'art 2600', 'art 4600', 'art 4600', 'art 4600', 'art 4600', 'art 4600', 'art 4600', 'art 4700', 'art 4700', 'art 4700', 'art 4700', 'art 4700', 'art 4700', 'art 4800', 'art 4800', 'art 4800', 'art 4900', 'art 4900', 'art 4900']

Patent US20070007644 - Ball grid array package enhanced with a thermal and electrical connector - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsElectrically, mechanically, and thermally enhanced ball grid array (BGA) packages are described. A substrate has a surface, wherein the surface has an opening therein. A stiffener has a surface coupled to the surface of the substrate. An area of the surface of the stiffener can be greater than, equal...http://www.google.com/patents/US20070007644?utm_source=gb-gplus-sharePatent US20070007644 - Ball grid array package enhanced with a thermal and electrical connectorAdvanced Patent SearchPublication numberUS20070007644 A1Publication typeApplicationApplication numberUS 11/475,118Publication dateJan 11, 2007Filing dateJun 27, 2006Priority dateDec 22, 2000Also published asEP1333491A2, EP1333491A3, US7161239, US7462933, US7893546, US8310067, US20030057550, US20090057871, US20110140272Publication number11475118, 475118, US 2007/0007644 A1, US 2007/007644 A1, US 20070007644 A1, US 20070007644A1, US 2007007644 A1, US 2007007644A1, US-A1-20070007644, US-A1-2007007644, US2007/0007644A1, US2007/007644A1, US20070007644 A1, US20070007644A1, US2007007644 A1, US2007007644A1InventorsSam Zhao, Reza-ur KhanOriginal AssigneeBroadcom CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (44), Referenced by (39), Classifications (77), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetBall grid array package enhanced with a thermal and electrical connector
[0089] The present invention will now be described with reference to the accompanying drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Additionally, the left-most digit(s) of a reference number identifies the drawing in which the reference number first appears. DETAILED DESCRIPTION OF THE INVENTION [0000] Overview [0090] The present invention is directed to a method and system for improving the mechanical, thermal, and electrical performance of BGA packages. The present invention is applicable to all types of BGA substrates, including ceramic, plastic, and tape (flex) BGA packages. Furthermore the present invention is applicable to die-up (cavity-up) and die-down (cavity-down) orientations. [0091] Numerous embodiments of the present invention are presented herein. In a first embodiment, BGA package thermal stress at the IC die/stiffener interface is released or altered with the introduction of a heat spreader on the top surface of the IC die, enabling large size dies with high input and output (I/O) counts to be packaged using BGA technology. In a second embodiment, BGA package thermal resistance and the length of the current return path are reduced by introducing thermal/ground balls underneath or within close proximity of the IC die. In a third embodiment, the package thermal resistance and ground inductance are reduced by removing center solder balls, and enabling the attachment of a die pad to the PCB. The die pad is attached to the PCB with novel patternings of the metal stiffener, or by positioning a thermal/ground connector in between the IC die pad and the PCB. In a fourth embodiment, the package thermal resistance is reduced by attaching a metal ring to the top surface of a stiffener. In a fifth embodiment, the package thermal resistance is reduced by bridging the die pad to the outer regions of the stiffener with metal studs. [0092] In further embodiments according to the present invention, the electrical performance of the BGA package is improved. In a sixth embodiment, electrical performance is improved by connecting ground bonds from the IC die to the stiffener. In such a configuration, the stiffener operates as a package ground plane. The package ground plane may be connected to PCB ground through either thermal/ground balls or thermal/ground connectors mentioned in embodiments above, and further described herein. In a seventh embodiment, package power distribution is enhanced by using a layer in a tape substrate as a power or ground plane. [0093] In still further embodiments according to the present invention, plastic ball grid array (PBGA) package thermal and electrical performances are improved. In an eighth embodiment, replacing the center solder balls with a solid conductor reduces the package junction-to-board thermal resistance and package ground inductance of a PBGA package. [0094] Ball grid array package types are described below. Further detail on the above described embodiments, and additional embodiments according to the present invention, are presented below. The embodiments described herein may be combined as required by a particular application. [0000] Ball Grid Array (BGA) Package [0095] A ball grid array (BGA) package is used to package and interface an IC die with a printed circuit board (PCB). BGA packages may be used with any type of IC die, and are particularly useful for high speed ICs. In a BGA package, solder pads do not just surround the package periphery, as in chip carrier type packages, but cover the entire bottom package surface in an array configuration. BGA packages are also referred to as pad array carrier (PAC), pad array, land grid array, and pad-grid array packages. BGA packages types are further described in the following paragraphs. For additional description on BGA packages, refer to Lau, J. H., Ball Grid Array Technology, McGraw-Hill, New York, (1995), which is herein incorporated by reference in its entirety. [0096] Die-up and die-down BGA package configurations exist. In die-up BGA packages, the IC die is mounted on a top surface of the substrate or stiffener, in a direction away from the PCB. In die-down BGA packages, the IC die is mounted on a bottom surface of the substrate or stiffener, in a direction towards the PCB. [0097] A number of BGA package substrate types exist, including ceramic, plastic (PBGA), and tape (also known as “flex”) (for example, refer to Hayden, T. F., et al., Thermal & Electrical Performance and Reliability Results for Cavity-Up Enhanced BGAs, Electronic Components and Technology Conference, IEEE, pp. 638-644 (1999), which is incorporated herein by reference). FIG. 1A illustrates a conventional flex BGA package 100. Flex BGA package 100 includes an IC die 102, a tape substrate 104, a plurality of solder balls 106, and one or more wire bonds 108. Tape or flex BGA packages are particularly appropriate for large IC dies with large numbers of inputs and outputs, such as application specific integrated circuits (ASIC) and microprocessors. [0098] Tape substrate 104 is generally made from one or more conductive layers bonded with a dielectric material. For instance, the dielectric material may be made from various substances, such as polyimide tape. The conductive layers are typically made from a metal, or combination of metals, such as copper and aluminum. Trace or routing patterns are made in the conductive layer material. Substrate 104 may be a single-layer tape, a two-layer tape, or additional layer tape substrate type. In a two-layer tape, the metal layers sandwich the dielectric layer, such as in a copper-Upilex-copper arrangement. [0099] IC die 102 is attached directly to substrate 104, for example, by an epoxy. IC die 102 is any type of semiconductor integrated circuit. [0100] One or more wire bonds 108 connect corresponding bond pads 118 on IC die 102 to contact points 120 on substrate 104. [0101] An encapsulate, mold compound, or epoxy 116 covers IC die 102 and wire bonds 108 for mechanical and environmental protection. [0102] As shown in FIG. 1A, flex BGA package 100 does not include a stiffener. In some BGA package types, particularly in flex BGA packages, a stiffener can be attached to the substrate to add planarity and rigidity to the package. FIG. 1B illustrates a flex BGA package 110, similar to flex BGA package 100, that incorporates a stiffener 112. Stiffener 112 may be laminated to substrate 104. Stiffener 112 is typically made from a metal, or combination of metals, such as copper, tin, and aluminum, or may be made from a polymer, for example. Stiffener 112 also may act as a heat sink, and allow for greater heat spreading in BGA package 110. One or more openings 114 in stiffener 112 may be used to allow for wire bonds 108 to connect IC die 102 to substrate 104. Stiffener 112 may be configured in other ways, and have different opening arrangements than shown in FIG. 1B. [0103] The use of a stiffener in a flex BGA package requires additional considerations when attempting to manage heat spreading. FIG. 2A shows a top view of a stiffener 112. Stiffener 112 includes an opening 114 adjacent to all four sides of an IC die mounting position 202 in the center of stiffener 112. FIG. 2B shows a temperature distribution 204 of a stiffener, such as stiffener 112, during operation of an IC die in a flex BGA package. Temperature distribution 204 shows that heat transfer from IC die mounting position 202 to the edges of stiffener 112 is substantially limited by openings 114. Openings 114 act as thermal barriers to heat spreading in stiffener 112. [0104] FIG. 2C shows a top view of an alternative configuration for stiffener 112, according to an embodiment of the present invention. Stiffener 112 includes an opening 206 adjacent to all four sides of an IC die mounting position 202 in the center of stiffener 112. Openings 206 are similar to openings 114 of FIG. 2A, but have a different shape. Further alternatively shaped openings in stiffener 112 are applicable to the present invention. [0105] FIG. 3 shows a cross-sectional view of a conventional die-up PBGA package 300. PBGA package 300 includes a plastic substrate 302, an IC die 304, a plurality of solder balls 306, a plurality of wire bonds 308, a die pad 310, one or more vias 314, and one or more thermal/ground vias 316. [0106] Plastic substrate 302 includes one or more metal layers formed on an organic substrate. For example, plastic or organic substrates may include materials such as “BT”, which includes a resin called bis-maleimide triazine, and/or “FR-4,” which is a fire-retardant epoxy resin-glass cloth laminate material, and/or other similar materials. IC die 304 is mounted to die pad 310. IC die 304 may be attached to die pad 310 with an epoxy, such as a silver-filled epoxy. Wire bonds 308 connect signals of IC die 304 to substrate 302. For instance, gold bonding wire is bonded from aluminum bond pads on IC die 304 to gold-plated contact pads on substrate 302. The contact pads on substrate 302 connect to solder balls 306 attached to the bottom surface of substrate 302, through vias 314 and routing within substrate 302 using copper conductors 312. Thermal/ground vias 316 connect die pad 310 to one or more thermal/ground balls 322 on the center bottom surface of substrate 302. An encapsulate, mold compound, or epoxy 320 covers IC die 304 and wire bonds 308 for mechanical and environmental protection. [0107] As described above, a BGA package includes an array of solder balls located on a bottom external surface of the package substrate. FIG. 12A illustrates a cross-sectional view of a die-up BGA package 1200. FIGS. 12B and 12C illustrate exemplary solder ball arrangements for die-up BGA package 1200. As shown in FIG. 12A, BGA package 1200 includes an IC die 1208 mounted on a substrate 1212. IC die 1208 is electrically connected to substrate 1212 by one or more wire bonds 1210. Wire bonds 1210 are electrically connected to solder balls 1206 underneath substrate 1212 through corresponding vias and routing in substrate 1212. The vias in substrate 1212 can be filled with a conductive material, such as solder, to allow for these connections. Solder balls 1206 are attached to substrate 1212, and are used to attach the BGA package to a PCB. [0108] Note that although wire bonds, such as wire bonds 1210, are shown and described herein, IC dies may be mounted and coupled to a substrate with solder balls located on the bottom surface of the IC die, by a process commonly referred to as “C4” or “flip chip” packaging. [0109] As shown in FIG. 12B, solder balls 1206 may be arranged in an array. FIG. 12B shows a 14 by 14 array of solder balls on the bottom surface of BGA package 1200. Other sized arrays of solder balls are also applicable to the present invention. Solder balls 1206 are reflowed to attach BGA package 1200 to a PCB. The PCB may include contact pads to which solder balls 1206 are bonded. PCB contact pads are generally made from a metal or combination of metals, such as copper, nickel, tin, and gold. [0110] FIG. 12C shows a bottom view of BGA package 1200, with an alternative solder ball array arrangement. BGA package 1200 attaches an array of solder balls 1206 on a bottom surface of substrate 1212. As shown in FIG. 12C, solder balls 1206 are located in a peripheral area of the bottom surface of substrate 1212, away from a substrate center 1224. For example, solder balls 1206 on the bottom surface of substrate 1212 may be located outside an outer profile area of an IC die mounted on the opposite surface of substrate 1212. The solder ball array may be organized in any number of ways, according to the requirements of the particular BGA package application. [0111] The solder ball arrangement shown in FIG. 12C is particularly applicable to embodiments of the present invention described below, such as for attaching a heat spreader or ground/thermal connector to a bottom surface of a BGA package. The heat spreader or ground/thermal connector may be connected in substrate center 1224. [0112] As described above, the BGA package substrate provides vias and routing on one or more layers to connect contact pads for wire bonds on its upper surface to solder balls attached to the bottom substrate surface. For illustrative purposes, FIG. 13 shows solder ball pads and routing 1304 in an example bottom substrate layer 1302. [0113] The present invention is applicable to improving thermal and electrical performance in the BGA package types described herein, and further BGA package types. BGA Embodiments According to the Present Invention [0114] Further details of structural and operational implementations of ball grid array packages of the present invention are described in the following sections. These structural and operational implementations are described herein for illustrative purposes, and are not limiting. For instance, the present invention as described herein may be implemented in both die-up and die-down BGA package types, as well as other IC package types. Furthermore, each of the embodiments presented below are applicable to tape substrate BGA packages, plastic substrate BGA packages, and ceramic substrate BGA packages. The description below is adaptable to these and other package types, as would be understood to persons skilled in the relevant art(s) from the teachings herein. For instance, in plastic substrate BGA packages, and some tape BGA packages, a stiffener may not be required in the BGA package. [0115] Features of each of the embodiments presented below may be incorporated into BGA packages independently, or may be combined in any manner, as would be apparent to persons skilled in the relevant art(s) from the teachings herein. Drop-In Heat Spreader Embodiments [0116] According to an embodiment of the present invention, a heat spreader may be used in a BGA package to provide for thermal stress relief and heat dissipation. In a preferred embodiment, a drop-in heat spreader is attached to the top surface of an IC die in a flex BGA package to provide for thermal stress relief and heat dissipation. [0117] FIG. 4 illustrates a cross-sectional view of a die-up flex BGA package 400, according to an embodiment of the present invention. BGA package 400 includes IC die 102, substrate 104, plurality of solder balls 106, one or more wire bonds 108, stiffener 112, epoxy 116, a drop-in heat spreader 402, and an adhesive 404. Refer to the discussion above related to FIGS. 1A-1B for additional detail on the structure and operation of some of these elements. [0118] Substrate 104 has a top surface to which a bottom surface of stiffener 112 is mounted. A bottom surface of substrate 104 attaches the plurality of solder balls 106. The plurality of solder balls 106 connect to vias and/or points on the bottom surface of substrate 104 to which signals internal to substrate 104 are routed and exposed. [0119] Stiffener 112 has a top surface to which IC die 102 is mounted. In alternate embodiments, BGA package 400 does not require a stiffener, and does not include a stiffener 112. In such an alternate embodiment, IC die 102 is mounted to substrate 104. [0120] One or more wire bonds 108 connect corresponding bond pads 118 on IC die 102 to contact points 120 on substrate 104. When a stiffener 112 is present, as shown in FIG. 4, wire bonds 108 extend through one or more openings 114 in stiffener 112 to form connections with substrate 104. [0121] Heat spreader 402 is attached to the top surface (active surface) of IC die 102 using adhesive 404. Adhesive 404 may be an epoxy, an adhesive tape, or may be a different substance. Silver filled epoxies or thermally conductive tapes may be used for adhesive 404 to enhance heat extraction from IC die 102. [0122] As shown in FIG. 4, heat spreader 402 is smaller in area than the upper surface of IC die 102. Alternative sizes for heat spreader 402 are also applicable to the present invention, including sizes equal to the area of IC die 102, or larger areas. Heat spreader 402 is shaped and configured to spread heat from IC die 102, as is required by the application. [0123] As shown in FIG. 4, the top surface of heat spreader 402 forms a portion of a top surface of BGA package 400. Heat dissipation to the environment can be improved by exposing the top surface of heat spreader 402. Furthermore, in such a configuration, additional heat sinks may be attached to heat spreader 402. FIG. 5 show a cross-sectional view of an alternative BGA package 500, according to embodiments of the present invention, where a heat spreader 502 is internal to BGA package 500. Heat spreader 502 is completely encapsulated by epoxy 116. [0124] By attaching heat spreader 402 to the top surface of IC die 102, the mechanical structure of BGA package 400 becomes more symmetrical in its center region, particularly when ground/thermal solder balls do not exist on the bottom surface of substrate 104 underneath the outer profile of IC die 102. Thermal stress at the interface of IC die 102 and stiffener 112 is substantially released or altered by heat spreader 402. Deformation caused by thermal stress in stiffener 112 and substrate 104 is substantially reduced through the use of heat spreader 402. Drop-in heat spreader 402 allows for even larger sizes for IC die 102 and greater I/O counts by providing for greater heat spreading capacity in BGA package 400. [0125] FIG. 14 shows a flowchart 1400 providing operational steps for assembling one or more embodiments of the present invention. The steps of FIG. 14 do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0126] Flowchart 1400 begins with step 1402. In step 1402, a substrate that has a first surface and a second surface is provided. For example, the substrate is flex substrate 104, or another substrate type suitable for a BGA package. For example, an IC die mounting position and/or contact points are provided on a first, upper surface, and solder ball pads are provided on a second, bottom surface. [0127] In step 1404, a first surface of a stiffener is attached to the first substrate surface. For example, the stiffener is stiffener 112, which is attached to substrate 104. In alternative embodiments, a stiffener is not required. [0128] In step 1406, an IC die is mounted to the second stiffener surface. For example, the IC die is IC die 102, which is mounted to stiffener 112. In alternative embodiments, when a stiffener is not used, IC die 102 is mounted directly to the substrate. [0129] In step 1408, a heat spreader is mounted to the IC die, wherein the heat spreader dissipates heat from the IC die. For example, the heat spreader is heat spreader 402 or 502, which is mounted with adhesive 404 or other attachment means to the upper surface of IC die 102. Heat spreader 402 or 502 typically is mounted to the center of the upper surface of IC die 102, and covers less than the entire upper surface of IC die 102. For instance, the smaller area of heat spreader 402 or 502 allows for bond pads 118 to be exposed on the upper surface of IC die 102 for wire bond connections. In alternative embodiments, heat spreader 402 or 502 is of the same size, or comprises a larger area than the upper surface of IC die 102. [0130] In step 1410, a plurality of solder balls are attached to the second substrate surface. For example, the plurality of solder balls are plurality of solder balls 106, which connect to vias and/or solder ball pads on the bottom surface of substrate 104. The solder balls may be arranged on the bottom surface of substrate 104 as shown in FIGS. 12B and 12C, or in alternative arrangements. The solder balls are used to attach a BGA package to a PCB. [0131] A benefit of performing the steps of flowchart 1400 is that the heat spreader relieves thermal stress at an interface of the IC die and the first stiffener surface. [0132] Flowchart 1400 may include the additional step where the second stiffener surface is encapsulated. For instance, the second stiffener surface may be encapsulated by a resin or molding compound, that also encapsulates the IC die, heat spreader, and wire bonding. Stiffener Ground Plane Embodiments [0133] According to an embodiment of the present invention, electrical performance of an IC die, and thermal performance of a corresponding BGA package may be improved by allowing a stiffener to act as a ground plane. In a preferred embodiment, a stiffener in a die-up tape BGA (Flex BGA) package is coupled to PCB ground through one or more vias to ground solder balls. Ground contact pads of the IC die are connected to the stiffener by ground wire bonds. In a further aspect, one or more metal layers of a flex tape substrate may be coupled to a ground or power potential, to operate as a ground or power plane. [0134] FIG. 6 illustrates a cross-sectional view of a die-up flex BGA package 600, according to an embodiment of the present invention. BGA package 600 includes IC die 102, substrate 104, plurality of solder balls 106, one or more wire bonds 108, stiffener 112, epoxy 116, one or more ground bonds to stiffener 602, one or more ground/thermal vias 604, one or more ground/thermal balls 606, one or more ground contact pads 608, one or more power contact pads 610, and one or more power vias 612. [0135] Substrate 104 has a top surface to which a bottom surface of stiffener 112 is mounted. A bottom surface of substrate 104 attaches the plurality of solder balls 106. The plurality of solder balls 106 connect to vias and/or points on the bottom surface of substrate 104 to which signals internal to substrate 104 are routed and exposed. [0136] Stiffener 112 has a top surface to which IC die 102 is mounted. [0137] One or more wire bonds 108 connect corresponding bond pads 118 on IC die 102 to contact points 120 on substrate 104. Wire bonds 108 extend through one or more openings 114 in stiffener 112 to form connections with substrate 104. [0138] IC die 102 has a top surface that includes at least one ground pad 608. Ground pad 608 is coupled to a ground potential signal in IC die 102. A ground wire bond 602 connects ground pad 608 to stiffener 112. The bottom surface of stiffener 112 is coupled to a ground potential signal in the PCB to which BGA package 600 is attached, to cause stiffener 112 to operate as a ground plane. Stiffener 112 is coupled to PCB ground through one or more of ground/thermal via 604 that extend through substrate 104. The one or more of ground/thermal vias 604 are located in substrate 104, underneath IC die 102, and can be filled with a conductive material, such as solder. A ground/thermal solder ball 606 is attached to each ground/thermal via 604 on the bottom surface of substrate 104. Ground/thermal solder ball 606 forms the connection to PCB ground, when reflowed to attach to the PCB. Each ground/thermal via 604 connects the respective ground/thermal solder ball 606 to stiffener 112 both electrically and thermally. [0139] In a further embodiment, a tape substrate is configured such that a metal layer is used as a package power or ground plane. For instance, with a two-layer tape substrate, the bottom metal layer may be used as a power or ground plane. [0140] In FIG. 6, PCB package 600 includes a bottom metal layer 614 of a two-layer tape substrate 104 that is coupled to a potential to operate as a power plane, according to an embodiment of the present invention. One or more power contact pads 610 on IC die 102 are coupled to a power potential signal in IC die 102. Power contact pad 610 on IC die 102 is connected to a corresponding power via 612 by a power wire bond 616. When a stiffener 112 is present, power wire bond 616 extends through opening 114. Power via 612 extends through substrate 104. Power via 612 can be filled with a conductive material, such as solder. Each power via 612 is coupled to the bottom metal layer 614 of substrate 104. Furthermore, one or more power vias 612 may be connected to corresponding solder balls on the bottom of substrate 104, to connect bottom metal layer 614 to PCB power pads when the solder balls are reflowed. [0141] The introduction of a stiffener ground plane, and/or a power/ground plane using a metal layer of a tape substrate allows for very short power and ground connections. Current return path lengths are shortened, voltage drop across planes is reduced, and power/ground inductance is reduced. The shorter power and ground paths are also significant in reducing a power/ground path resistance, which advantageously reduces required IC device power levels. [0142] For further description of the use of a thermal vias in a flex tape substrate, and of the use of a thermal ball coupled to a heat spreader in a die-down TBGA package, refer to U.S. Pat. No. 6,020,637, which is incorporated by reference in its entirety herein. For further description of the use of a thermal via and a thermal ball in a plastic substrate BGA package, refer to U.S. Pat. No. 5,894,410, which is incorporated by reference in its entirety. [0143] FIG. 15 shows a flowchart 1500 providing operational steps for assembling one or more embodiments of the present invention. The steps of FIG. 15 do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0144] Flowchart 1500 begins with step 1502. In step 1502, a substrate that has a first surface and a second surface is provided. For example, the substrate is flex substrate 104, or another substrate type suitable for a BGA package. For example, an IC die mounting position and/or contact points are provided on a first, upper surface, and solder ball pads are provided on a second, bottom surface. [0145] In step 1504, at least one opening in a stiffener from a first surface of the stiffener to a second surface of the stiffener is provided. For example, the at least one opening includes openings 114 in stiffener 112. In a preferred embodiment, an opening 114 is located on each of the four edges of IC die 102. [0146] In step 1506, the first stiffener surface is attached to the first substrate surface. For example, the stiffener is stiffener 112, which is attached to substrate 104. In alternative embodiments, a stiffener is not required, and is not attached to the substrate. [0147] In step 1508, an integrated circuit (IC) die is mounted to the second stiffener surface, wherein a first surface of the IC die includes a contact pad. For example, the IC die is IC die 102, which is mounted to stiffener 112. In alternative embodiments, when a stiffener is not used, IC die 102 is mounted directly to the substrate. For example, the contact pad is ground contact pad 608. [0148] In step 1510, the contact pad is coupled to the second stiffener surface. For instance, contact pad is ground contact pad 608, which is connected to stiffener 112 by ground wire bond 602. Ground wire bond 602 may be soldered, or otherwise attached to stiffener 112. [0149] In step 1512, a plurality of solder balls is attached to the second substrate surface, inside an outer dimensional profile of the IC die. For example, the plurality of solder balls include one or more ground/thermal balls 606, which are arranged on the bottom surface of substrate 104 in the region of substrate center 1224, shown in FIG. 12C. The outer dimensional profile of the IC die is the area bounded by the edges of IC die 102. [0150] In step 1514, the plurality of solder balls are coupled through corresponding vias in the substrate to the first stiffener surface. For example, the vias include ground/thermal via 604. The vias can be filled with a conductive material, such as solder, to allow the electrical connection of the solder balls to stiffener 112. [0151] In a further embodiment according to flowchart 1500, the substrate includes a metal layer, wherein the metal layer is coupled to a second potential. The stiffener has at least one opening extending from the first stiffener surface to the second stiffener surface. The second IC die surface includes a second contact pad. The second contact pad is coupled to the metal layer through one of the openings in the stiffener and through a corresponding via that extends through the substrate. The second contact pad may be coupled to a power or ground potential in the IC die. For example, the second contact pad is power contact pad 610, the metal layer is metal layer 614, and the corresponding via is power via 612. [0152] In an embodiment, flowchart 1500 may include an additional step, where the contact pad is coupled to a ground potential in the IC die. For example, the contact pad may be connected to a ground plane or ground signal in IC die that is routed to the contact pad. [0153] Flowchart 1500 may include the additional step where the second stiffener surface is encapsulated. For instance, the second stiffener surface may be encapsulated by a resin or molding compound, that also encapsulates the IC die and wire bonding. [0154] Flowchart 1500 may include the additional step where a second plurality of solder balls is attached to the second substrate surface, outside an outer dimensional profile of the IC die. For example, the second plurality of solder balls are plurality of solder balls 106, which connect to vias and/or solder ball pads on the bottom surface of substrate 104. The solder balls are arranged on the bottom surface of substrate 104 as shown in FIG. 12B, outside of substrate center 1224. The solder balls are used to attach a BGA package to a PCB. Embodiments With Stiffener Coupled to a PCB [0155] According to an embodiment of the present invention, electrical performance of the IC device, and thermal performance of a BGA package is improved by enabling an IC die pad to attach to a PCB. In an embodiment, the IC die pad is attached to the PCB by a novel patterning of the metal stiffener in a die-up tape BGA package. In an alternate embodiment, the IC die pad is attached to the PCB by placing a thermal/ground connector between the IC die pad and PCB in a die-up tape BGA package. [0156] A BGA package junction-to-board thermal resistance can be substantially reduced by the attachment of a metal die-attach pad directly to a PCB. Metal die-attach pads are coupled to a PCB for package junction-to-board thermal resistance minimization in an exposed pad quad flat pack (QFP), a QFP with exposed heat sink at bottom, and a leadless plastic chip carrier (i.e. LPCC, QFN, SON, QLP) package, for instance. All existing such designs that involve an exposed die pad or an exposed heat sink at package bottom are “lead frame” packages. The present invention provides for an exposed die-attach pad or heat sink at the bottom of flex BGA packages. [0157] FIG. 7 illustrates a cross-sectional view of a die-up flex BGA package 700, according to an embodiment of the present invention. BGA package 700 includes IC die 102, substrate 104, plurality of solder balls 106, one or more wire bonds 108, stiffener 112, epoxy 116, ground wire bond to stiffener 602, ground contact pad 608, and a stiffener cavity 702. [0158] Substrate 104 has a top surface to which a bottom surface of stiffener 112 is mounted. A bottom surface of substrate 104 attaches the plurality of solder balls 106. The plurality of solder balls 106 connect to vias and/or points on the bottom surface of substrate 104 to which signals internal to substrate 104 are routed and exposed. Substrate 104 in FIG. 7 has a central window-shaped opening 704, under which solder balls are preferably not connected. FIG. 20 illustrates a bottom view of a substrate 104 that has a central window opening 704, according to an embodiment of the present invention. [0159] Stiffener 112 has a top surface to which IC die 102 is mounted. Stiffener 112 in FIG. 7 is patterned with a cavity 702, which protrudes downward for attachment of IC die 102. As described above, a central window-shaped opening 704 exists in substrate 104. This opening 704 exists to allow stiffener 112 to protrude through, and make contact with soldering pads on a PCB to which BGA package 700 is to be mounted. The bottom exposed surface of cavity 702 can be plated with solder to facilitate surface mount to solder plated metal pads on a PCB to which BGA package 700 is mounted. Hence, stiffener 112 may act as a conduit for heat to be transferred from IC die 102 to the PCB. [0160] Stiffener 112 may optionally be configured to operate as a ground plane. One or more ground pads 608 may be coupled to a ground potential signal in IC die 102. A ground wire bond 602 connects each ground pad 608 to stiffener 112. With one or more ground wire bonds 602 coupled to stiffener 602, the bottom exposed surface of cavity 702 may function both as an exposed ground pad of BGA package 700, and as an exposed heat spreader. As described above, the bottom exposed surface of cavity 702 may be plated with solder to allows stiffener 112 to be surface mounted to one or more soldering pads on the PCB. The pads on the PCB can be connected to a PCB ground plane to shorten the length of electrical current return paths, as well as to form a conductive heat dissipation path from BGA package 700 to the PCB. [0161] Direct electrical and thermal connection from BGA package ground to a PCB ground plane is also possible by attaching a heat spreader between the stiffener and PCB. FIG. 8 illustrates a cross-sectional view of a die-up flex BGA package 700, according to an embodiment of the present invention. Substrate 104 in FIG. 8 has a central window-shaped opening, under which no solder balls are connected. A portion of the bottom surface of stiffener 112 is exposed through the central window-shaped opening 704 of substrate 104. A heat spreader (for example, manufactured from copper or aluminum), shown as ground/thermal connector 802, is coupled to the exposed portion of stiffener 112. Ground/thermal connector 802 can be made from the same material as stiffener 112. Material different from stiffener 112 may be used for ground/thermal connector 802 to compensate for the mismatch of thermal expansion coefficient between the die 102 and stiffener 112. Ground/thermal connector 802 may be laminated to the exposed portion of stiffener 112 using conductive epoxy or solder. The bottom surface of ground/thermal connector 802 may be plated with solder to facilitate its surface mount to soldering pads on the PCB. Metal pads on the PCB may be connected to a PCB ground plane to shorten the length of electrical current return paths, as well as enhance the conductive heat dissipation path from IC die 102 to the PCB. An advantage of this design is a high efficiency in the metal connector lamination process. [0162] In a further embodiment, stiffener 112 and ground/thermal connector 802 may be manufactured from a single piece of metal, and hence consist of a single metal piece. FIG. 21 illustrates a side view of stiffener 112 that has a downward protruding portion 2102, according to an embodiment of the present invention. When stiffener 112 shown in FIG. 21 is attached to substrate 104, portion 2102 extends partially or entirely through window-shaped opening 704. Portion 2102 may be directly connected to the PCB, or may be connected to a ground/thermal connector 802 that is connected to the PCB. Because of the thermal and electrical improvement enabled by the coupling of stiffener 112 to a PCB, length of wire bonds can be reduced by moving opening 114 closer to the proximity of die 102 without compromising thermal performance significantly. [0163] FIG. 16A shows a flowchart 1600 providing operational steps for assembling one or more embodiments of the present invention. FIGS. 16B-D provide operational steps according to further embodiments. The steps of FIGS. 16A-D do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0164] Flowchart 1600 begins with step 1602. In step 1602, a substrate that has a first surface and a second surface is provided. For example, the substrate is flex substrate 104, or another substrate type suitable for a BGA package. For example, an IC die mounting position and/or contact points are provided on a first, upper surface, and solder ball pads are provided on a second, bottom surface. [0165] In step 1604, a first surface of a stiffener is attached to the first substrate surface. For example, the stiffener is stiffener 112, which is attached to substrate 104. [0166] In step 1606, a portion of the first stiffener surface is exposed through a window opening in the substrate. For example, substrate 104 has a window opening 704 in its center. A portion of the bottom surface of stiffener 112 is exposed through window opening 704. [0167] In step 1608, an IC die is mounted to a second surface of the stiffener, wherein a surface of the IC die includes at least one contact pad. For example, the IC die is IC die 102, which is mounted to stiffener 112. [0168] In step 1610, a plurality of solder balls are attached to the second substrate surface. For example, the plurality of solder balls are plurality of solder balls 106, which connect to vias and/or solder ball pads on the bottom surface of substrate 104. The solder balls are arranged on the bottom surface of substrate 104 as shown in FIG. 12B, exclusive of the area of window opening 704. The solder balls are used to attach a BGA package to a PCB. [0169] In step 1612, the exposed portion of the first stiffener surface is configured to be coupled to a printed circuit board (PCB), whereby electrical and thermal performance of the BGA package is improved. [0170] FIG. 16B provides exemplary steps for performing step 1612: [0171] In step 1614, a heat spreader is coupled to the exposed portion of the first stiffener surface. For example, the heat spreader is ground/thermal connector 802, which is coupled to stiffener 112 through window opening 702. [0172] In step 1616, a surface of the heat spreader is configured to be coupled to the PCB. In an embodiment, step 1612 further includes the step where the heat spreader surface is plated with solder to allow the heat spreader surface to be surface mounted to soldering pads on the PCB. [0173] In an alternate embodiment, step 1612 comprises the step where the stiffener is shaped to have a centrally-located cavity shaped portion that protrudes through the window opening. In an embodiment, step 1612 further includes the step where a surface of the cavity shaped portion is plated with solder to allow the stiffener to be surface mounted to soldering pads on the PCB. For example, stiffener 112 is patterned with a cavity 702, which protrudes downward in window opening 704. The bottom surface of cavity 702 is plated with solder. [0174] FIG. 16C provides additional exemplary steps for flowchart 1600 of FIG. 16A: [0175] In step 1618, the stiffener is coupled to a potential. For example, the stiffener may be coupled to ground or power on the PCB. The bottom surface of cavity 702 may be coupled to the ground or power potential on the PCB, or ground/thermal connector 802 may make the connection to the PCB. [0176] In step 1620, each of the at least one contact pads are coupled to the second stiffener surface with corresponding wire bonds. [0177] FIG. 16D provides exemplary steps for performing step 1618: [0178] In step 1622, the stiffener is coupled to a ground potential. [0179] In step 1624, the stiffener allowed to serve as a ground plane. [0180] Flowchart 1600 may include the additional step where the second stiffener surface is encapsulated. For instance, the second stiffener surface may be encapsulated by an epoxy, that also encapsulates the IC die and wire bonding. Metal Ring Embodiments [0181] According to an embodiment of the present invention, the mechanical and thermal performance of a BGA package is enhanced by attaching a metal ring to the top surface of the stiffener. In a preferred embodiment, a metal ring is attached to the top surface of the stiffener in a die-up tape BGA package. [0182] FIG. 9A illustrates a cross-sectional view of a die-up tape BGA package 900, according to an embodiment of the present invention. BGA package 900 includes IC die 102, substrate 104, plurality of solder balls 106, one or more wire bonds 108, stiffener 112, epoxy 116, and a ring 902. FIG. 9B illustrates a top view of die-up tape BGA package 900, with ring 902. [0183] Substrate 104 has a top surface to which a bottom surface of stiffener 112 is mounted. A bottom surface of substrate 104 attaches the plurality of solder balls 106. The plurality of solder balls 106 connect to vias and/or points on the bottom surface of substrate 104 to which signals internal to substrate 104 are routed and exposed. [0184] One or more wire bonds 108 connect corresponding bond pads 118 on IC die 102 to contact points 120 on substrate 104. Wire bonds 108 extend through one or more openings 114 in stiffener 112 to form connections with substrate 104. Stiffener 112 has a top surface to which IC die 102 is mounted. Furthermore, ring 902 is attached to the top surface of stiffener 112. Ring 902 may be laminated to stiffener 112, after wire bonding is completed. Epoxy 116 is filled in and flushed to ring 902 after the attachment of ring 902. Ring 902 is preferably made of a metal, such as copper or aluminum, or a combination thereof, but may be constructed from other applicable materials. Preferably, ring 902 is made from the same material as stiffener 112, to minimize the mismatch of the thermal expansion coefficient. Ring 902 is preferably flush with the outer edges of stiffener 112 to form an outer edge of BGA package 900, but may also reside entirely within an outer profile of stiffener 112. [0185] A primary benefit of attaching ring 902 to stiffener 112 is an increase in stiffness of BGA package 900. Ring 902 also aids in reducing the amount of warp of BGA package 900. Furthermore, ring 902 promotes heat dissipation from stiffener 112, reduces junction-to-case thermal resistance, and facilitates the attachment of an external heat spreader to BGA package 900. [0186] Furthermore, ring 902 enhances the process of encapsulation of the BGA package. Ring 902, with stiffener 112, creates a cavity that may be filled with a dispensed glob top or encapsulating material, that locks IC die 102 and surrounding elements in place. [0187] FIG. 17 shows a flowchart 1700 providing operational steps for assembling one or more embodiments of the present invention. The steps of FIG. 17 do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0188] Flowchart 1700 begins with step 1702. In step 1702, a substrate that has a first surface and a second surface is provided. For example, the substrate is flex substrate 104, or another substrate type suitable for a BGA package. For example, an IC die mounting position and/or contact points are provided on a first, upper surface, and solder ball pads are provided on a second, bottom surface. [0189] In step 1704, a first surface of a stiffener is attached to the first substrate surface. For example, the stiffener is stiffener 112, which is attached to substrate 104. In alternative embodiments, a stiffener is not required, and is not attached to the substrate. [0190] In step 1706, an IC die is mounted to the first stiffener surface. For example, the IC die is IC die 102, which is mounted to stiffener 112. In alternative embodiments, when a stiffener is not used, IC die 102 is mounted directly to the substrate. [0191] In step 1708, a plurality of solder balls are attached to the second substrate surface. For example, the plurality of solder balls are plurality of solder balls 106, which connect to vias and/or solder ball pads on the bottom surface of substrate 104. The solder balls may be arranged on the bottom surface of substrate 104 as shown in FIGS. 12B and 12C, or in alternative arrangements. The solder balls are used to attach a BGA package to a PCB. [0192] In step 1710, a metal ring is attached to the first stiffener surface. Attaching the metal ring enhances heat dissipation from the stiffener. For example, the metal ring is ring 902. In alternative embodiments, when a stiffener is not used, ring 902 is attached directly to the substrate. [0193] Flowchart 1700 may include the additional step where the second stiffener surface within the volume encompassed by the ring is encapsulated. For example, such a filled upper surface may be called a “glob top”. For instance, this volume may be encapsulated by a resin or molding compound, that also encapsulates the IC die and wire bonding. Embodiments Using Metal Studs to Bridge Stiffener Openings [0194] According to an embodiment of the present invention, the thermal performance of a BGA package is improved by bridging an IC die pad to which the IC die is mounted to the outer regions of the stiffener. In a preferred embodiment, one or more metal studs are used as thermal bridges, to bridge the openings in the stiffener that surround the IC die, in a die-up tape BGA package. [0195] The openings on a stiffener surface allow for wire bond connections between, an IC die and a substrate. These openings have the additional effect of reducing the amount of heat that can spread to the outer surface regions of the stiffener, hampering the ability of the stiffener to act as a heat spreader. This effect is illustrated in FIG. 2B, which is further described above. To promote heat spreading according to the present invention, the stiffener is patterned such that one or more short studs run across each wire bond opening. More than one stud may be used to bridge each wire bond opening to promote heat spreading. The manufacturing process used for lead frame patterning may be adapted to pattern a stiffener with studs across the wire bond openings. The use of the studs, however, may reduce space for wire bonds, and may reduce BGA package I/O capability, in some situations. [0196] FIG. 10A illustrates a stiffener 1000, that includes one or more studs 1002, according to an embodiment of the present invention. Stiffener 1000, having one or more studs 1002, may be incorporated into a BGA package in the same manner as is described elsewhere herein for stiffener 112. As shown in FIG. 10A, a stud 1002 bridges each opening 114 in stiffener 1000. In alternative embodiments, more than one stud 1002 per opening 114 may be used. Furthermore, each opening 114 may be bridged by a different number of studs 1002. Some of openings 114 may be bridged by one or more studs 1002, while other openings 114 may not be bridged at all. [0197] FIG. 10B provides an illustration where IC die 102 is wire bound to substrate 104 through stiffener 1000, according to an embodiment of the present invention. One or more wire bonds 108 connect corresponding bond pads 118 on IC die 102 to contact points 120 on substrate 104. Wire bonds 108 avoid studs 1002 when making connections to substrate 104. [0198] FIG. 18 shows a flowchart 1800 providing operational steps for assembling one or more embodiments of the present invention. The steps of FIG. 18 do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0199] Flowchart 1800 begins with step 1802. In step 1802, a substrate that has a first surface and a second surface is provided. For example, the substrate is flex substrate 104, or another substrate type suitable for a BGA package. For example, an IC die mounting position and/or contact points are provided on a first, upper surface, and solder ball pads are provided on a second, bottom surface. [0200] In step 1804, a wire bond opening is created along each edge of an IC die mount position on a stiffener, wherein each wire bond opening extends through the stiffener. For example, the wire bond openings are wire bond openings 114 in stiffener 1000. The IC die mount position is IC die mounting position 202, shown in FIG. 10A. [0201] In step 1806, a first surface of the stiffener is attached to the first substrate surface. For example, the stiffener is stiffener 1000, which is attached to substrate 104. [0202] In step 1808, an IC die is mounted to a second surface of the stiffener. For example, the IC die is IC die 102, which is mounted to stiffener 1000, in IC die mounting position 202. [0203] In step 1810, at least one of the wire bond openings are bridged with at least one stud. For example, one or more of wire bond openings 114 are bridged with one or more studs 1002. Studs 1002 allow for increased heat spreading across corresponding wire bond openings 114 to the outer edges of stiffener 1000. [0204] In step 1812, a plurality of solder balls are attached to the second substrate surface. For example, the plurality of solder balls are plurality of solder balls 106, which connect to vias and/or solder ball pads on the bottom surface of substrate 104. The solder balls may be arranged on the bottom surface of substrate 104 as shown in FIGS. 12B and 12C, or in alternative arrangements. The solder balls are used to attach a BGA package to a PCB. [0205] The flowchart 1800 may include the further step where a contact pad on the IC die is coupled to the substrate with a wire bond, wherein the wire bond passes through one of the wire bond openings in the stiffener. [0206] Flowchart 1800 may include the additional step where the second stiffener surface is encapsulated. For instance, the second stiffener surface may be encapsulated by a resin or molding compound, that also encapsulates the IC die and wire bonding. PBGA Thermal/Ground Connector Embodiments [0207] According to an embodiment of the present invention, the electrical and thermal performance of a plastic BGA (PBGA) package is improved by attaching a thermal/ground connector to the bottom surface of a PBGA package. The thermal/ground connector couples the bottom center of a plastic substrate of a die-up PBGA to the PCB. Heat from an IC die is more easily spread to the PCB through the thermal/ground connector, which is attached to the plastic substrate underneath the IC die. [0208] In the discussion above regarding FIG. 8, embodiments were described that used a ground/thermal connector to couple a flex BGA package to a PCB, to reduce package junction-to-board thermal resistance. Aspects of this discussion above are adaptable to other die-up BGA package types. These include BGA packages having an organic substrate, such as PBGA and fine pitch ball grid array (FBGA) packages. Further detailed description is provided in the following discussion that is applicable to BGA packages with organic substrates. [0209] FIG. 11 illustrates a cross-sectional view of a die-up PBGA package 1100, according to an embodiment of the present invention. PBGA package 1100 includes plastic substrate 302, IC die 304, plurality of solder balls 306, plurality of wire bonds 308, die pad 310, one or more vias 314, one or more thermal/ground vias 316, epoxy 320, a ground/thermal connector 1102, adhesive material 1104, a plurality of ground bonds 1106, and a plurality of ground bond pads 1108. [0210] IC die 304 is mounted to die pad 310. Wire bonds 308 connect signals of IC die 304 to contact pads on substrate 302. The contact pads on substrate 302 connect to solder balls 306 attached to the bottom surface of substrate 302, through vias 314 and routing within substrate 302. [0211] Thermal/ground vias 316 connect die pad 310 to an exposed metal plane 1110 at the bottom center of substrate 302. For instance, die pad 310 and metal plane 1110 may be exposed copper pads of plastic substrate 302. [0212] Solder balls are not attached to the bottom region of substrate 302 covered by metal plane 1110. Ground/thermal connector 1102 is attached to metal plane 1110. For instance, ground/thermal connector 1102 may be a metal piece (copper or aluminum, for example) that is laminated to metal plane 1110 at the bottom center of substrate 302 using a conductive adhesive material 1104, such as a conductive epoxy, solder, or other adhesive material. A bottom surface 1112 of ground/thermal connector 1102 may be plated with solder for surface mount to soldering pads on the PCB. [0213] BGA package 1100 provides a thermal path of IC die 304, to die pad 310, to thermal/ground vias 316, to metal plane 1110, to adhesive material 1104, to ground thermal connector 1102 (and bottom surface 1112) to the PCB soldering pads. Heat spreading is improved by a direct thermal path from IC die 304 to the PCB. [0214] Metal pads on the PCB can be connected to a PCB ground plane to advantageously shorten the length of electrical current return paths, as well shorten the conductive heat dissipation path from device junctions of IC die to the PCB. [0215] Ground bonds 1106 may be used to couple ground bond pads 1108 on IC die 304 to die pad 310, when die pad 310 is coupled to ground. This provides for very short ground connections for signals in IC die 304. [0216] FIG. 19A shows a flowchart 1900 providing operational steps for assembling one or more embodiments of the present invention. FIGS. 19B-C provide operational steps according to further embodiments. The steps of FIGS. 19A-C do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0217] Flowchart 1900 begins with step 1902. In step 1902, a substrate that has a first surface and a second surface is provided. For example, the substrate is plastic substrate 302, or another substrate type suitable for a BGA package. For example, an IC die mounting position and contact points are provided on a first, upper surface, and solder ball pads are provided on a second, bottom surface. [0218] In step 1904, an IC die is mounted to the first substrate surface. For example, the IC die is IC die 304, which is mounted to substrate 302. IC die 304 may be mounted to a die pad 310 attached to substrate 302. [0219] In step 1906, a plurality of solder balls are attached to the second substrate surface. For example, the plurality of solder balls are plurality of solder balls 306, which connect to vias and/or solder ball pads on the bottom surface of substrate 302. The solder balls may be arranged on the bottom surface of substrate 302 as shown in FIG. 12B, or in other arrangements. The solder balls are used to attach a BGA package to a PCB. [0220] In step 1908, a first surface of a heat spreader is coupled to the second substrate surface. For example, the heat spreader is ground/thermal connector 1102, which is coupled to substrate 302 with adhesive material 1104. Ground/thermal connector 1102 may be mounted to metal plane 1110 on substrate 302 by adhesive material 1104. [0221] In step 1910, a second surface of the heat spreader is configured to be coupled to a printed circuit board (PCB). Second heat spreader surface is bottom surface 1112. In an embodiment, step 1910 may include the step where the second surface of the heat spreader is plated with solder. [0222] Flowchart 1900 may comprise the additional step where the first substrate surface is coupled to the heat spreader through at least one via that extends through the substrate. For example, the first substrate surface may be coupled to the heat spreader by one or more ground/thermal vias 316. [0223] FIG. 19B provides exemplary steps for performing step 1904: [0224] In step 1912, a copper plated die-attach pad is exposed in the center of the first substrate surface. The copper plated die-attach pad, die pad 310, may be an exposed portion of a metal layer of plastic substrate 302. [0225] In step 1914, the IC die is mounted to the copper plated die-attach pad. For example, the IC die may be mounted with an epoxy. [0226] FIG. 19C provides exemplary steps for performing step 1908: [0227] In step 1916, a copper plated plane is exposed in the center of the second substrate surface. The copper plated plane, metal plane 1110, is an exposed portion of a metal layer of plastic substrate 302. [0228] In step 1918, the die-attach pad is coupled to the copper plated plane with at least one via. [0229] Flowchart 1900 may include the additional step where the first substrate surface is encapsulated. For instance, the first substrate surface may be encapsulated by a resin or molding compound, that also encapsulates the IC die and wire bonding. Example PBGA Thermal/Ground Connector Embodiments [0230] Additional description for exemplary embodiments of die-up PBGA package 1100 are described in this section. FIG. 22 illustrates a cross-sectional view of a portion of die-up PBGA package 1100, according to an embodiment of the present invention. PBGA package 1100 includes plastic substrate 302, IC die 304, plurality of solder balls 306, one of the plurality of wire bonds 308, epoxy 320, ground/thermal connector 1102, adhesive material 1104, metal plane 1110, a connector plating 2202, and plurality of solder ball contact pads 2224 (vias 314 and 316, ground bonds 1106, and pads 310 and 1108 are not shown in FIG. 22). PBGA package 1100 is substantially configured as described above, and as further described below. Also shown in FIG. 22 is a cross-sectional view of a portion of an exemplary printed circuit board (PCB) 2222, according to an embodiment of the present invention. PCB 2222 includes a PCB substrate 2212, a PCB metal pad plating 2214, a PCB metal pad 2216, and plurality of solder ball contact pads 2226. Under normal operating conditions, PBGA package 1100 is attached to PCB 2222 in order for IC die 304 to be interfaced with an electronic circuit system. [0231] In the configuration of package 1100 shown in FIG. 22, IC die 304 is mounted to substrate 302. Wire bond 308 connects one or more signals of IC die 304 to contact pads (not shown) on the top surface of substrate 302. These contact pads connect through substrate 302 to solder ball contact pads 2224 exposed through the solder mask on the bottom surface of substrate 302. Solder balls 306 attach to solder ball contact pads 2224. [0232] Ground/thermal connector 1102 is attached to metal plane 1110. Metal plane 1110 is a portion of a metal layer of substrate 302 exposed though the solder mask on the bottom surface of substrate 302. As described above, ground/thermal connector 1102 may be a metal piece or slug (copper or aluminum, for example) similar to the heat spreaders described elsewhere herein, that is laminated to metal plane 1110 at the bottom center of substrate 302 using a conductive adhesive material 1104, such as a conductive epoxy, solder, or other adhesive material. A bottom surface 1112 of ground/thermal connector 1102 may be plated with a metal (including a metal alloy), such as a solder, which may include palladium, nickel, tin, gold, silver, lead and/or further related substance(s), to form connector plating 2202. Connector plating 2202 enhances the surface mounting of connector 1102 to PCB 2222. [0233] The top surface of PCB substrate 2212 includes solder ball contact pads 2226 for surface mount of solder balls 306 to PCB 2222, and includes PCB metal pad 2216 for surface mount of connector 1102 to PCB 2222. PCB metal pad plating 2214 may be attached to PCB metal pad 2216 to enhance the surface mounting of connector 1102 to PCB metal pad 2216. For example, PCB metal pad 2216 may be screen printed with a solder paste to form PCB metal pad plating 2214. PCB metal pad plating 2214 also may be formed in other known manners from processes and substances described herein or elsewhere. [0234] Heat spreading is improved in package 1100 by a direct thermal path from IC die 304 through connector 1102 to PCB 2222. Furthermore, PCB metal pad 2216 on PCB 2222 can be connected to a PCB ground plane to advantageously shorten the length of electrical current return paths, as well shorten the conductive heat dissipation path from device junctions of IC die 304 to PCB 2222. As described above, vias may be created in substrate 302, and filled with a conductive material, to enhance thermal and electrical performance by coupling IC die 304 to connector 1102 more directly. [0235] Example implementations for package 1100 and PCB 2222 according to the present invention will now be described. These implementations are provided for purposes of illustration, and are not intended to limit the scope of the invention. Alternate implementations, differing slightly or substantially from those described herein, will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein. Such alternate implementations fall within the scope and spirit of the present invention. [0236] FIG. 22 illustrates various dimensions of package 1100 and PCB 2222. For package 1100, the following dimensions are shown: an adhesive material height 2204, a connector height 2206, a connector plating height 2208, a solder ball height 2218, and a ball pitch 2220. For PCB 2222, a PCB metal pad plating height 2210 is shown. These dimensions of package 1100 and PCB 2222 may have a variety of values, according to the present invention. [0237] In an example implementation, ground/thermal connector 1102 may be attached to metal plane 1110 on substrate 302 by adhesive material 1104 that has an adhesive material height 2204 in the range of 1 to 1.5 mil (0.025 to 0.0375 mm). Connector 1102 has a connector height 2206 equal to 0.38 mm. Connector plating 2202 has a connector plating height 2208 equal to 1 mil (0.025 mm). According to these example height values, the sum of adhesive material height 2204 (using a value of 0.025 mm), connector height 2206, and connector plating height 2208 is 0.43 mm. [0238] Furthermore, prior to attachment to substrate 302, solder balls 306 may have a height of 0.6 mm, for example. Ball pitch 2220, which represents the distance from the center of a solder ball mounted to substrate 302 to the center of an adjacent solder ball, is equal to 1 mm, for example. When attached to substrate 302, the height of solder balls 306 may decrease slightly, to have a solder ball height 2218 equal to 0.5 mm, for example. This decrease in height is due to the spreading of solder of the solder ball onto a solder ball pad 2224 to which it is attaching. In this example configuration, therefore, the difference in height between the solder ball height 2218 (0.5 mm) and the sum of adhesive material height 2204, connector height 2206, and connector plating height 2208 (0.43 mm) is equal to 0.07 mm, which is the value of a gap distance. When package 1100 is attached to PCB 2222, this gap distance appears between connector plating 2202 and PCB 2222. In this example implementation, the gap distance may vary between 2.0 to 4.0 mils (0.05 to 0.1 mm), or even outside of this range, due to variations in the actual height values recited above that occur during the manufacturing process. [0239] As described above, the dimensions shown in FIG. 22 and described above may have values that are different from those presented above. In an embodiment, solder ball height 2218 is greater than the height of the attached connector 1102 (including connector height 2206, adhesive material height 2204, and connector plating height 2208, when present), although in alternative embodiments, the attached connector 1102 may have an equal height. [0240] As described above, PCB metal pad plating 2210 may be formed on PCB metal pad 2216. PCB metal pad plating 2210 substantially bridges the above described gap distance, and enhances the connection of connector 1102 to PCB 2222. For example, PCB metal pad plating 2214 may be formed such that PCB metal pad plating height 2210 is in the range of 4 to 6 mil (0.1 to 0.15 mm) to substantially fill the gap distance. [0241] In another example configuration, ball pitch 2220 may be equal to 1.27 mm and solder ball height 2218 may be equal to 0.75 or 0.76 mm. In further implementations, these dimensions may have other values. As described above, the dimension values provided in the section are examples, and are not limiting to the present invention. [0242] Furthermore, ground/thermal connector 1102 may be shaped in additional ways, to enhance the operation and manufacturability of package 1100. FIG. 23 shows ground/thermal connector 1102 attached to a bottom surface of substrate 302, according to an exemplary embodiment of the present invention. Connector 1102 is attached to metal plane 1110, and is plated with connector plating 2202. As shown in FIG. 23, connector 1102 may be rectangular in shape. Ground/thermal connector 1102 may be formed in other shapes, such as an ellipse, polygon, star-shaped, and irregular. [0243] Furthermore, in the example embodiment shown in FIG. 23, connector 1102 is smaller in area than metal plane 1110. In alternative embodiments, connector 1102 may have the same area, or a greater area than metal plane 1110. [0244] Ground/thermal connector 1102 may also include two or more separate sub-sections that are attached to package 1100. FIG. 24 shows first and second ground/thermal connectors 2402 and 2404 attached to a bottom surface of substrate 302, according to an exemplary embodiment of the present invention. Connector plating, which may be present on first and second ground/thermal connectors 2402 and 2404, is not shown in FIG. 24. First ground/thermal connector 2402 is attached to first metal plane 2406 on substrate 302. Second ground/thermal connector 2404 is attached to second metal plane 2408 on substrate 302. In alternative embodiments, first and second metal planes 2406 and 2408 may be combined into a single metal plane, or may be each divided into any number of metal planes, for attachment of first and second ground/thermal connectors 2402 and 2404 to substrate 302. Furthermore, one or more PCB metal pads may be present on PCB substrate 2212 (shown in FIG. 22) to attach first and second ground/thermal connectors 2402 and 2404 to PCB 2222. [0245] The use of more than one ground/thermal connector, as shown in FIG. 24, may enhance the functionality, thermal performance, electrical performance, mechanical performance, and the manufacturability of package 1100. For example, electrical performance may be enhanced by electrically isolating first and second connectors 2402 and 2404, and coupling them to separate potentials (i.e., ground or other potentials) of IC die 304 (through vias in substrate 302). First and second connectors 2402 and 2404 may then be coupled to the separate potential signals in PCB 2222. [0246] Any number of additional ground/thermal connectors may be used, according to the present invention. FIG. 25 shows first, second, third, and fourth ground/thermal connectors 2502, 2504, 2506, and 2508 attached to a bottom surface of substrate 302, according to a further exemplary embodiment of the present invention. Connector plating, which may be present on first, second, third, and fourth ground/thermal connectors 2502, 2504, 2506, and 2508, is not shown in FIG. 25. First, second, third, and fourth ground/thermal connectors 2502, 2504, 2506, and 2508 are attached to first, second, third, and fourth metal planes 2510, 2512, 2514, and 2516, respectively, on substrate 302. [0247] According to the present invention, ground/thermal connectors may be shaped and arranged in a variety of configurations. For example, one or more ground/thermal connectors may be formed around a portion of, or all of one or more other ground/thermal connectors. FIG. 27 shows first and second ground/thermal connectors 2702 and 2704 attached to a bottom surface of substrate 302, according to a further exemplary embodiment of the present invention. First and second ground/thermal connectors 2702 and 2704 are attached to first and second metal planes 2706 and 2708. As shown in FIG. 27, first ground/thermal connector 2702 is formed in a substantially rectangular shape, and second ground/thermal connector 2704 is formed in a substantially rectangular ring shape that surrounds first ground/thermal connector 2702 on the bottom surface of substrate 302. First metal plane 2706 is correspondingly formed in a rectangular-shaped metal plane, and second metal plane 2708 is formed in a rectangular ring-shaped metal plane. As shown in FIG. 27, a portion of the bottom surface of substrate 302 is present between first and second metal planes 2706 and 2708. [0248] Vias through a package substrate may be located in a variety of places in a substrate. One example pattern for locating vias in a substrate is shown in FIG. 28. FIG. 28 shows a bottom view of a corner portion of substrate 302 with potential via locations. Substrate 302 of FIG. 28 is divided into a peripheral region 2804 and a central region 2806. The central region 2806 corresponds to the portion of the substrate adjacent to a mounted IC die 102 (and corresponding metal pad) and/or a mounted ground/thermal connector. The peripheral region 2804 corresponds to the portion of the substrate that is not adjacent to the mounted IC die 102. As shown in FIG. 28, a plurality of potential vias 2802 may be located in substrate 302 in an array configuration. In the peripheral region 2804 of substrate 302, the plurality of solder balls 306 are arranged in an array. In this region, each via of the plurality of potential vias 2802 is located between surrounding solder balls 306. In the central region 2806 of substrate 302, solder balls are not attached. In the central region 2806, potential vias 2802 continue to be arranged in the array configuration as they are in the peripheral region 2804. [0249] The present invention is applicable to the via configuration shown in FIG. 28, and to other via configurations. According to an embodiment of the present invention, the potential vias located in the central region may be located relatively closer to each other than in the peripheral region, allowing for the use of a greater number of vias in a given area in the central region. The resulting increased density of vias allows for more connections by vias between IC die 102 and a ground/thermal connector attached to the bottom surface of substrate 302. This will allow for a greater heat transfer from IC die 102 to the PCB through the vias and ground/thermal connector. Furthermore, if the ground/thermal connector is used as a ground potential (or other potential), additional vias will enhance the ground connection, reduce ground bounce and other types of unwanted circuit noises. [0250] FIG. 29 shows an example bottom view of a corner portion of substrate 302, according to an embodiment of the present invention. As shown in FIG. 29, the spacing of potential vias 2904 in central region 2806 is denser than the spacing of potential vias 2902 in peripheral region 2804. A variety of possible via arrangements are applicable to the present invention. FIG. 30 shows another example of a bottom view of a corner portion of substrate 302, according to an embodiment of the present invention. As shown in FIG. 30, the spacing of potential vias 3004 in central region 2806 is denser than the spacing of potential vias 3002 in peripheral region 2804. However, central region vias 3004 are not located adjacent to solder balls 306 as they are in FIG. 29. Furthermore, although central region vias 2904 and 3004 are arranged in columns and rows, central region vias may be arranged in any other applicable arrangement. [0251] Referring to the example shown in FIG. 29, an example via 2902 may have a via diameter of 0.2 mm. The invention is applicable to alternative via diameters. In peripheral region 2804, a solder ball pitch (i.e., spacing between solder ball centers) 2906 may be equal to 1.0 mm. In peripheral region 2804, a peripheral region via pitch 2908 may be equal to 1.0 mm. In central region 2806, a central region via pitch 2910 is smaller than peripheral region via pitch 2908. For example, central region via pitch 2910 may be equal to 0.4 mm, 0.45 mm, 0.5 mm, or any other value in this range, or less than peripheral region via pitch 2908. These solder ball/via pitch values are provided for exemplary purposes, and are not limiting to the present invention. [0252] Note that in FIGS. 29 and 30, the distances between adjacent vias in central region 2806 and peripheral region 2804 are shown to be uniform. These distances are not required to be uniform in a particular region. In an alternative embodiment, in either the central or peripheral region, a distance between a first pair of adjacent vias may differ from a distance between a second pair of adjacent vias. However, taken as a whole, the distances between adjacent vias in central region 2806 may still on average be less than the distances between adjacent vias in peripheral region 2804. In other words, in such an embodiment, a via density in central region 2806 will be greater than a via density in peripheral region 2804, even if the distances between via pairs differ. [0253] FIG. 26 shows a flowchart 2600 providing operational steps for assembling one or more embodiments of the present invention. The steps of FIG. 26 do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0254] Flowchart 2600 begins with step 2602. In step 2602, a substrate that has a first surface is provided. For example, the substrate is plastic substrate 302, or another substrate type suitable for a BGA package. The first surface is the bottom surface of substrate 302 shown in FIG. 22, for example. [0255] In step 2604, an array of contact pads and a metal plane on the first surface of the substrate are exposed. For example, the contact pads are solder ball contact pads 2224, and the metal plane is metal plane 1110. The contact pads and metal plane are portions of a metal layer of substrate 302 that are completely or partially exposed through a solder mask on the bottom surface of substrate 302. [0256] In step 2606, a solder ball is attached to each of the exposed contact pads on the first surface of the substrate. For example, the solder balls attached to each contact pad are plurality of solder balls 306, which attach to solder ball contact pads 2224. [0257] In step 2608, a first surface of a thermal connector is coupled to the exposed metal plane. For example, the thermal connector is ground/thermal connector 1102, which is coupled to metal plane 1110. [0258] In an embodiment, step 2608 may include a step wherein the first surface of the thermal connector is coupled to the exposed metal plane, wherein the thermal connector has a height that is less than a height of a solder ball attached to one of the exposed contact pads. For example, as shown in FIG. 22, ground/thermal connector height 2206 is less than solder ball height 2218. In alternative embodiments, ground/thermal connector height 2206 may be equal to or greater than solder ball height 2218. Step 2608 may include a further step wherein the first surface of the thermal connector is coupled to the exposed metal plane by a conductive adhesive material. For example, the conductive epoxy is adhesive material 1104, which may be a silver-filled epoxy, solder, or other similar substance. [0259] Flowchart 2600 may include the additional step wherein the second surface of the thermal connector is plated with a metal. For example, as shown in FIG. 22, a bottom surface 1112 of ground/thermal connector 1102 is plated with connector plating 2202. The second surface of the thermal connector 1102 may be plated with a metal, wherein a combined height of the thermal connector, the conductive adhesive material, and the metal plating is less than a height of a solder ball attached to one of the exposed contact pads. As shown in FIG. 22, connector height 2206, adhesive material height 2204, and connector plating height 2208 are less than solder ball height 2218. In alternative embodiments, this combined height may be equal to or greater than solder ball height 2218. [0260] Flowchart 2600 may include the additional step wherein the second surface of the thermal connector is configured to be coupled to a second metal plating formed on a metal plane on the PCB. As shown in FIG. 22, PCB 2222 has a PCB metal pad 2216, with a PCB metal pad plating 2214 formed thereon. Ground/thermal connector 1102 is configured to be coupled to PCB metal pad plating 2214 during surface mount of package 1100 to PCB 2222. For example, connector 1102 may be shaped and sized to conform to being surface mounted to PCB 2222. The second surface of the thermal connector 1102 may be configured to be coupled to the second metal plating, wherein the second metal plating has a height. For example, PCB metal pad plating 2214 has a PCB metal pad plating height 2210. The second surface of the thermal connector 1102 may be coupled to the PCB metal pad 2216 through PCB metal pad plating 2214. This may occur during the surface mount process, where package 1100 is attached to PCB 2222. Connector 2206 may be configured such that when package 1100 is attached to PCB 2222, a combined height of the thermal connector (e.g., connector height 2206), the conductive adhesive material (e.g., adhesive material height 2204), the first metal plating (e.g., connector plating height 2208), and the second metal plating (e.g., PCB metal pad plating height 2210) may be substantially equal to a height of a solder ball (e.g., solder ball height 2218) attached to one of the exposed contact pads (e.g., solder ball contact pad 2224) and attached to a contact pad (e.g., PCB contact pad 2226) on PCB 2222. [0261] In an embodiment, the thermal connector of step 2608 may include a plurality of separate thermal connectors. For example, as shown in FIG. 24, a first and second ground/thermal connector 2402 and 2404. Step 2608 may include a step wherein a first surface of the plurality of separate thermal connectors is coupled to the exposed metal plane. The exposed metal plane of step 2604 may include a plurality of separate exposed metal planes. For example, FIG. 24 shows first and second metal planes 2406 and 2408. Step 2608 may further include the step wherein the first surface of each one of the plurality of separate thermal connectors is coupled to a corresponding one of the plurality of separate exposed metal planes. FIG. 24 shows first and second ground/thermal connectors 2402 and 2404 attached to first and second metal planes 2406 and 2408, respectively, on the bottom surface of substrate 302. Alternatively, the plurality of thermal connectors may include first and second ground/thermal connectors 2702 and 2704, and the exposed metal planes may include first and second metal planes 2706 and 2708, for example. [0262] In an embodiment, step 2602 may include the step wherein an organic substrate that has a first surface is provided. For example, the organic substrate may be plastic substrate 302, which includes one or more metal layers formed on an organic substrate (for example, BT resin or FR4 epoxy/glass). [0263] In an embodiment, flowchart 2600 may include the additional step wherein an IC die is mounted to a second surface of the substrate. For example, the IC die may be IC die 304. IC die 304 may be mounted to a die pad 310 attached to substrate 302, as shown in FIG. 3. Furthermore, flowchart 2600 may include the additional step wherein the IC die is coupled to the exposed metal plane by at least one via that extends through the substrate. For example, IC die 304 may be coupled to metal plane 1110 by one or more ground/thermal vias 316, as shown in FIG. 11. This step may include the step wherein the at least one via is filled with a conductive material, such as a solder. [0264] In an example embodiment, substrate 302 has a central portion that is defined by the metal plane to which an IC die may be mounted. In an embodiment, flowchart 2600 may include the additional steps where a plurality of vias are located in the substrate in the central region, and a plurality of vias are located in the substrate outside of the central region. For example, the central region may be central region 2806, and an area outside of the central region may be peripheral region 2804. In an embodiment, a first via density for the plurality of vias in the central portion is greater than a second via density for the plurality of vias outside of the central portion. Embodiments Allowing Attachment of Additional Electronic Devices [0265] According to an embodiment of the present invention, the electrical performance of a BGA package is improved by configuring the BGA package to allow the attachment of electronic devices to the bottom surface of a BGA package. In an example BGA package, a thermal/ground connector couples the bottom center of the package substrate to a PCB. According to the present invention, electronic devices are attached to the bottom surface of the BGA package, in a region between the thermal/ground connector and the array of solder balls. This configuration allows for enhanced electrical performance, by allowing additional electronic devices to be present in the BGA package. Furthermore, the electronic devices are mounted closely to the thermal/ground connector, and hence may have shorter ground current paths. Further benefits may be realized, as would be understood by persons skilled in the relevant art(s) from the teachings herein. [0266] Embodiments allowing the attachment of electronic devices to the bottom surface of the BGA package are adaptable to any BGA package types, including any of those described elsewhere herein. These BGA package types include tape and organic substrate BGA packages, and include die-up and die-down BGA package configurations. For exemplary purposes, the present invention is described below in relation to a die-up BGA package similar to BGA package 800 shown in FIG. 8, but the present invention is also applicable to other BGA package configurations, as would be understood by persons skilled in the relevant art(s) from the teachings herein. [0267] FIG. 31 shows a bottom view of an example BGA package 3100, according to an embodiment of the present invention. BGA package 3100 is configured similarly to BGA package 800 described above. Attached to substrate 104 on the bottom of BGA package 3100 are plurality of solder balls 106 and ground/thermal connector 802. Additional or fewer solder balls 106 may be present. Ground/thermal connector 802 may be attached directly to the bottom surface of substrate 104, or may be attached to a stiffener in BGA package 3100 through a central opening formed in substrate 104. Ground/thermal connector 802 may be relatively larger or smaller, or differently shaped than as shown in FIG. 31, and may be centrally located, or located off-center of the bottom surface of substrate 104. [0268] As shown in FIG. 31, a substrate region 3102 exists on the bottom surface of substrate 104, bounded on an outer edge 3104 by solder balls 106, and on an inner edge 3106 by thermal connector 802. According to the present invention, electronic devices may be attached/mounted to the bottom surface of substrate 104 in substrate region 3102. [0269] FIG. 32 shows a bottom view of BGA package 3100, with first and second electronic devices 3202 and 3204 attached to the bottom surface of substrate 104, according to an embodiment of the present invention. First and second electronic devices 3202 and 3204 may be any applicable type of electronic device that would be useful to include in an integrated circuit package, that meet applicable size constraints. For example, first and second electronic devices 3202 and 3204 may be passive or active components. For instance, first and second electronic devices 3202 and 3204 may be any passive component type, including resistors, capacitors, and/or inductors. Furthermore, first and second electronic devices 3202 and 3204 may be leaded and/or leadless devices. Any number of one or more electronic devices may be attached/mounted to the bottom surface of substrate 104 in substrate region 3102. [0270] Electronic devices may be attached to the bottom surface of substrate 104 adjacent to ground/thermal connector 802. In some configurations, electronic devices may be attached more closely to ground/thermal connector 802 than in others. For example, as described above, ground/thermal connector 802 may be coupled to a stiffener in BGA package 3100 through a central opening in substrate 104. When ground/thermal connector 802 is directly coupled to the bottom surface of substrate 104, no central opening in substrate 104 is required. The structural integrity of substrate 104 near ground/thermal connector 802 when a central opening is present may be less than when a central opening is not present. Hence, in some embodiments, electronic devices may be attached in substrate region 3102 more closely to ground/thermal connector 802 when a central opening is not present in substrate 104, than when a central opening is present. [0271] FIG. 33 shows a PCB portion 3300 for mounting a BGA package such as BGA package 3100, according to an exemplary embodiment of the present invention. PCB portion 3300 includes PCB contact pads 3302 and a PCB metal pad 3304. When BGA package 3100 is attached to PCB portion 3300, solder balls 106 attach to PCB contact pads 3302, and ground/thermal connector 802 attaches to PCB metal pad 3304. For example, solder balls 106 may be reflowed to attach to PCB contact pads 3302, and ground/thermal connector 802 may be attached by solder to PCB metal pad 3304. The present invention is applicable to additional ways of attaching BGA package 3100 to PCB portion 3300. [0272] As shown in FIG. 33, a PCB region 3306 exists on PCB portion 3300, bounded on an outer edge 3308 by PCB contact pads 3302, and on an inner edge 3310 by PCB metal pad 3304. According to the present invention, electronic devices attached/mounted to the bottom surface of substrate 104 in substrate region 3102, as shown in FIG. 32, will be present above PCB region 3306 when BGA package 3100 is attached to PCB portion 3300. Furthermore, according to additional embodiments of the present invention, electronic devices may be attached/mounted to PCB portion 3300 in PCB region 3306. [0273] FIG. 34 shows PCB portion 3306 with third and fourth electronic devices 3402 and 3404 attached, according to an embodiment of the present invention. Third and fourth electronic devices 3402 and 3404 may be any applicable type of electronic device that would be useful to attach to a PCB, that meet applicable size constraints. For example, third and fourth electronic devices 3402 and 3404 may be passive or active components. For instance, third and fourth electronic devices 3402 and 3404 may be any passive component type, including resistors, capacitors, and/or inductors. Furthermore, third and fourth electronic devices 3402 and 3404 may be leaded and/or leadless devices. Any number of one or more electronic devices may be attached/mounted to PCB portion 3300 in PCB region 3306. [0274] When BGA package 3100 is mounted on PCB portion 3306, either or both of substrate region 3102 and PCB region 3306 may have electronic devices attached/mounted on them. For example, FIG. 35 shows an cross-sectional views of a portion of BGA package 3100 mounted to PCB portion 3300, according to an embodiment of the present invention. The portion of BGA package 3100 shown in FIG. 35 includes substrate 104, respective bottom substrate surface contact pads, solder balls 106 a-c, and ground/thermal connector 802. Solder balls 106-c, which are attached to solder ball contact pads 3502 on substrate 104, are attached to PCB contact pads 3302. Ground/thermal connector 802 attaches to a metal plane 3506 on the bottom surface of substrate 104 by an epoxy or other adhesive material (not shown). Ground/thermal connector 802 attaches to PCB metal pad 3304 by solder or other attachment material (not shown). [0275] As shown in FIG. 35, first electronic device 3202 is attached to the bottom surface of substrate 104 between ground/thermal connector 802 and solder ball 106 b. First electronic device 3202 attaches to one or more substrate contact pads 3504 by solder or other attachment material (not shown). Furthermore, third electronic device 3402 is attached to PCB portion 3306, between ground/thermal connector 802 and solder ball 106 c. Third electronic device 3402 attaches to one or more PCB contact pads 3508 by solder or other attachment material (not shown). The present invention is applicable to any number of electronic devices attached to BGA package 3100 and/or PCB 3300. [0276] As described above, FIG. 26 shows a flowchart 2600 providing operational steps for assembling one or more embodiments of the present invention. FIGS. 36A and 36B show additional steps for flowchart 2600, according to embodiments of the present invention. These steps do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0277] In an embodiment, step 2604 includes the step where the array of contact pads are arranged in at least one ring to surround the metal plane on the first surface of the substrate. For example, as shown in FIG. 31, solder balls 106, which are attached to an array of contact pads such as solder ball contact pads 3502 shown in FIG. 35, are arranged in three rectangular rings around ground/thermal connector 802. Ground/thermal connector 802 is attached to metal plane 3506. The invention is applicable to any number of such solder ball rings. [0278] As shown in FIG. 36A, flowchart 2600 may include step 3602. In step 3602, at least one passive electronic device is attached to the first surface of the substrate in a region bounded on a first edge by the metal plane and on a second edge by the array of contact pads. For example, as shown in FIG. 32, first and second electronic devices 3202 and 3204 are attached to the bottom surface of substrate 104 in substrate region 3102. Substrate region 3102 is bounded on an inner edge 3106 by ground/thermal connector 802, and on an outer edge 3104 by solder balls 106. Ground/thermal connector 802 is attached to metal plane 3506. [0279] As shown in FIG. 36B, flowchart 2600 may include additional steps. In step 3604, a second metal plane is exposed on a first surface of a PCB that corresponds to the first metal plane. For example, as shown in FIG. 33, PCB metal pad 3304 is exposed on PCB portion 3300. PCB metal pad 3304 corresponds to metal plane 3506 on the bottom surface of substrate 104. Ground/thermal connector 802 attaches to PCB metal pad 3304 when BGA package 3100 is mounted to PCB portion 3300. [0280] In step 3606, a second array of contact pads are exposed arranged in at least one ring that corresponds to the first array of contact pads. For example, as shown in FIG. 33, array of PCB contact pads 3302 are exposed on PCB portion 3300. Solder balls 106 are attached to PCB contact pads 3302 when BGA package 3100 is mounted on 3300. PCB contact pads 3302 are arranged in three rectangular rings, that correspond to the three rectangular rings formed by solder balls 106 and their respective contact pads on substrate 104, as shown in FIG. 31. [0281] In step 3608, at least one passive electronic device is attached to the first surface of the PCB in a region bounded on a first edge by the second metal plane and on a second edge by the second array of contact pads. For example, as shown in FIG. 34, third and fourth electronic devices 3402 and 3404 are attached to PCB portion 3300 in PCB region 3306. PCB region 3306 is bounded on an inner edge 3310 by PCB metal pad 3304, and on an outer edge 3308 by PCB contact pads 3302. Additional Embodiments of a BGA Package with Thermal Connector [0282] Further description of exemplary embodiments of BGA packages with stiffeners and thermal connectors, similar to tape BGA package 800 shown in FIG. 8 and PBGA package 1100 shown in FIG. 11, are described in this section. Features of the embodiments described below may be combined in any manner with each other, and with features of BGA packages described elsewhere herein. Features of the present invention are applicable to any substrate type, including tape and organic substrate BGA packages, and include die-up and die-down BGA package configurations. The embodiments provided herein enhance BGA package thermal, electrical and mechanical performances, and improve BGA package manufacturing yields and mechanical reliability. For illustrative purposes, the present invention is described below in relation to die-up BGA packages similar to BGA package 800 shown in FIG. 8. [0283] Note that the thermal connectors referred to herein may also be referred to as heat spreaders, heat sinks, heat slugs, and by other labels. [0284] FIG. 37A illustrates a cross-sectional view of a die-up BGA package 3700, according to an example embodiment of the present invention. BGA package 3700 includes IC die 102, substrate 3701, plurality of solder balls 106, a stiffener 3702 (which may also be referred to as an “interposer”), thermal connector 802, an encapsulate material 3704, and a dam 3706. [0285] As shown in FIG. 37A, substrate 3701 has a top surface 3738. Top surface 3738 has opening 704 formed therein. Stiffener 3702 has a bottom surface 3740 that is coupled to top surface 3738 of substrate 3701. Thermal connector 802 is coupled to bottom surface 3740 of stiffener 3702 through opening 704. IC die 102 is mounted to a top surface 3742 of stiffener 3702. A plurality of solder balls 106 are attached to metal pads exposed on a bottom surface 3744 of substrate 3701. Note that in the description herein, while various surfaces may be referred to as “top” or “bottom.” It should be understood that spatial descriptions (e.g., “above”, “below”, “up”, “down”, “top”, “bottom”, etc.) made herein are for purposes of illustration only, and that elements of the BGA package embodiments described herein can be spatially arranged in any orientation or manner. [0286] Substrate 3701 is a substrate applicable to BGA packages, substantially similar to the other BGA package substrates described elsewhere herein, and to BGA package substrates otherwise known to persons skilled in the relevant art(s). Substrate 3701 is shown in FIG. 37A having four electrical routing layers formed in a dielectric material for illustrative purposes. In embodiments, substrate 3701 may include any number of routing layers, including two, three, four, five, and more. The electrical routing layers may be formed through a variety of processes, including lamination, build-up, and other processes. The dielectric portion of substrate 3701 can be manufactured from a variety of materials, such as those described elsewhere herein, including organic (e.g., BT, FR4, etc.), ceramic, glass, tape (e.g., polyimide), and other dielectric materials. [0287] As shown in FIG. 37A, opening 704 is a central rectangular or window-shaped opening formed in substrate 3701. In embodiments, opening 704 may be shaped as needed to allow access to the bottom surface of stiffener 3702 by thermal connector 802 through substrate 3701. For example, opening 704 may be rectangular, elliptical or rounded, and other shapes. [0288] As shown in FIG. 37A and described above, IC die 102 can be encapsulated in encapsulate material 3704. For example, encapsulate material 3704 may be an encapsulate, mold compound, epoxy, or other encapsulate material. In FIG. 37A, encapsulate material 3704 forms a “glob top” for BGA package 3700, and hence can be formed according to a glob top encapsulation process. For example, dam 3706 may be formed around IC die 102, on top surface 3742 of stiffener 3702 and/or on top surface 3738 of substrate 3701, to contain encapsulate material 3704. As shown in FIG. 37A, encapsulate material 3704 is applied to the top of BGA package 3700 within a boundary of dam 3706. [0289] In the embodiment of FIG. 37A, thermal connector 802 is attached to bottom side 3740 of stiffener 3702 through opening 704 using adhesive 804. For example, adhesive 804 may be an electrically and thermally conductive adhesive, such as a solder, an epoxy filled with silver particles or flakes, or other conductive material described elsewhere herein or otherwise known. For example, adhesive 804 may be a tin-lead or silver solder material, which can be applied through processes such as solder plating and reflow, or screen printing of paste and reflow. A bottom surface 3736 of thermal connector 802 is capable of attachment to a PCB when BGA package 3700 is mounted to the PCB. [0290] In the embodiment shown in FIG. 37A, stiffener 3702 does not cover the entire surface area of top surface 3738 of substrate 3701. This is also shown in FIG. 37F, where stiffener 3702 is shown attached to top surface 3738 of substrate 3701. As shown in FIG. 37F, stiffener 3702 is large enough to substantially cover opening 704 in substrate 3701. However, stiffener 3702 is not large enough in area to cover top surface 3738 to all of the edges of substrate 3701. In an embodiment, an area of bottom surface 3740 of stiffener 3702 is less than an area of top surface 3738 of substrate 3701. For example, stiffener 3702 may not extend to at least one edge of substrate 3701. However, stiffener 3702 is thick enough, and has enough overlap with top surface 3738 of substrate 3701 to support IC die 102 over opening 704, and allow thermal connector 802 to be attached to the bottom surface of stiffener 3702, while maintaining BGA package structural integrity. Furthermore, stiffener 3702 allows efficient heat transfer from IC die 102 to thermal connector 802, and can act as a ground or power plane for the BGA package. Note that the present invention is applicable to a stiffener having a bottom surface of substantially the same or greater area than top surface 3738 of substrate 3701 (including the area of opening 704), as is described elsewhere herein. [0291] As shown in FIGS. 37B-37E, stiffener 3702 can be patterned according to various shapes and forms to improve mechanical, thermal, and electrical performances of BGA package 3700, and to improve BGA package reliability. FIG. 37B shows top surface 3742 of an example stiffener 3702. FIG. 37C shows bottom surface 3740 of the example stiffener 3702 of FIG. 37B. FIGS. 37D and 37E show top and bottom views of another example stiffener 3702. [0292] For example, as shown in FIGS. 37B and 37C, stiffener 3702 may be substantially rectangular in shape. As described above, stiffener 3702 can also be patterned. For example, as shown in FIGS. 37D and 37E, one or more notches, cutouts, and/or steps can be patterned into one or more edges of stiffener 3702. The pattern may allow for reduced wire bond lengths between IC die 102 and substrate 3701, improve the routability of substrate 3701, and improve the overall manufacturing process for the BGA package. For example, as shown in FIGS. 37D and 37E, stiffener 3702 has a first, a second, a third, and a fourth edge 3716, 3718, 3720, and 3722. First, second, third, and fourth edges 3716, 3718, 3720, and 3722 are each patterned with a cutout portion 3724, 3726, 3728, and 3730, respectively. Cutout portions such as these allow wire bonds to be coupled from pads on IC die 102 to bond pads on top surface 3738 of substrate 3701 that would otherwise be covered by stiffener 3702, or would have to be located further away on substrate 3701. [0293] As shown in FIG. 37D, stiffener 3702 also has a stepped portion 3732. Stepped portion 3732 is a portion of stiffener 3702 that is formed to be thinner than the non-stepped portions of stiffener 3702. For example, stepped portion 3732 may be formed or cut into stiffener 3702 on top surface 3742 of stiffener 3702. Stepped portion 3732 may allow a wire bond 108 to be coupled from IC die 102 to bond pads on top surface 3738 of substrate 3701, without the wire bond contacting the respective edge of stiffener 3702, because stepped portion 3732 has less height than the non-stepped portions of stiffener 3702, allowing for additional space for the wire bond. One or more edges of stiffener 3702 may be patterned in further ways, as would be understood by persons skilled in the relevant art(s) from the teachings herein. [0294] Stiffener 3702 and thermal connector 802, and other stiffeners described elsewhere herein, may be manufactured from copper, copper-based alloys, aluminum, aluminum-based alloys, as well as other types of electrically conductive metals and alloys, ceramic materials, thermally conductive dielectric materials, organic materials, plastics, and combinations of these materials, as would be understood by persons skilled in the relevant art(s) from the teachings herein. [0295] Surfaces of stiffener 3702 are not required to be finished. However, the surfaces of stiffener 3702 may be finished using processes such as micro-etch and oxidation to enhance adhesion of encapsulate material 3704 and/or thermal connector 802. In embodiments, one or more plated areas of silver, solder, nickel, gold, and further metals and alloys may also be applied to the top and/or bottom surfaces 3742 and 3740 of stiffener 3702. For example, one or more plated areas may be created in spot, strip, bar, ring, and other shapes on top surface 3742 of stiffener 3702 to enhance wire bond connections, and/or mounting of IC die 102. For example, as shown in FIG. 37D, a plated area 3734 is present on the top surface of stiffener 3702 to enhance attachment of IC die 102. In another example, one or more plated areas may also be applied to the bottom surface of stiffener 3702 to enhance attachment of the thermal connector 802. For example, as shown in FIGS. 37C and 37E, a plated area 3726 is present on the bottom surface of stiffener 3702 to enhance attachment of thermal connector 802. [0296] Furthermore, surfaces of thermal connector 802 are not required to be finished. However, surfaces of thermal connector 802 may be finished using processes such as micro-etch and oxidation to enhance attachment to stiffener 3702. Selective plating or screen printing of silver, solder, nickel, gold, and further metals and alloys may be applied to top and/or bottom surfaces of thermal connector 802. For example, one or more plated areas may be applied to the top surface of thermal connector 802 to enhance attachment to bottom surface 3740 of stiffener 3702. One or more plated areas may also be applied to bottom surface 3736 of thermal connector 802 to promote attachment to a PCB when attached thereto by surface mounting or other process. [0297] FIG. 37A shows the following dimensions related to BGA package 3700: [0298] h1 (3708)=height of solder ball 106/standoff height of the bottom surface of substrate 3701 to the sitting plane of the BGA package. [0299] h2 (3710)=distance from bottom surface 3744 of substrate 3701 to bottom surface 3736 of thermal connector 3702. [0300] h3 (3712)=h1−h2=distance between bottom surface 3736 of thermal connector 3702 and sitting plane of the BGA package (also, change in height of solder ball 106 prior to and after attachment to PCB). [0000] Where h3 is typically in the range of: 0<h3<h1 For example, in an exemplary embodiment, h1=0.5 mm and h2=0.4 mm. Hence, h3=0.5 mm−0.4 mm=0.1 mm. For example, these dimension values may be used in a BGA package with 1 mm ball pitch and 0.6 mm ball diameter. Note that these dimension values are provided for illustrative purposes, and the present invention is applicable to other dimension values related to BGA packages. [0301] FIG. 38 illustrates a BGA package 3800, according to a further embodiment of the present invention. BGA package 3800 is similar to BGA package 3700 shown in FIG. 37A, except that stiffener 3702 and thermal connector 802 are integrated into a single structure, stiffener 3802. Stiffener 3802 may be manufactured from the same materials as stiffener 3702, as described above. [0302] Stiffener 3802 has a bottom surface 3808 and a protruding portion 3804, similarly to stiffener 112 shown in FIG. 21, which has a protruding portion 2102. Protruding portion 3804 is located on bottom surface 3808 of stiffener 3802. In BGA package 3800, bottom surface 3808 of stiffener 3802 is coupled to top surface 3738 of substrate 3701. Protruding portion 3804 extends through opening 704 in substrate 3701. As shown in the embodiment of FIG. 38, an area of bottom surface 3808 of stiffener 3802 (including the area covered by protruding portion 3804) is less than an area of substrate 3701, similarly to the embodiment shown in FIG. 37A. A bottom surface 3806 of protruding portion 3804 is capable of attachment to a PCB when BGA package 3800 is mounted to the PCB. [0303] BGA package 3800 has improved thermal and electrical properties. A single-piece stiffener better conducts heat and/or electricity than the two-piece stiffener/thermal connector structure shown in FIG. 37A. Furthermore, the overall number of parts is reduced, improving the physical stability of the BGA package. [0304] FIG. 39 illustrates a BGA package 3900, according to a further embodiment of the present invention. BGA package 3900 is similar to BGA package 3700 shown in FIG. 37A, except that encapsulate material 3704 is applied according to an over-mold process. [0305] Note that as shown in the embodiment of FIG. 39, a portion of top surface 3738 of substrate 3701 is not covered by encapsulate material 3704, although in alternative embodiments, the entire top surface 3738 of substrate 3701 may be encapsulated by encapsulate material 3704 using an over-mold process. [0306] FIG. 40 illustrates a BGA package 4000, according to a further embodiment of the present invention. BGA package 4000 is similar to BGA package 3700 shown in FIG. 37A, except that IC die 102 is encapsulated together with the entire top surface of substrate 3701, according to a saw singulation encapsulation process. For example, a plurality of BGA packages 4000 may be formed together in a panel strip during manufacturing. The entire panel strip may be encapsulated simultaneously by encapsulate material 3704. Subsequently, each BGA package 4000 in the panel strip may be separated from the panel strip using saw singulation. Each BGA package 4000 is cut from the panel strip, which forms the outer edges of substrate 3701 and encapsulate material 3704. In this manner, the top surface of substrate 3701 is not exposed. [0307] FIG. 41A illustrates a BGA package 4100, according to a further embodiment of the present invention. BGA package 4100 is similar to BGA package 3700 shown in FIG. 37A, except that stiffener 112 is present (which may also be referred to as an “interposer”), similarly to BGA package 800 shown in FIG. 8. Stiffener 112 is attached to top surface 3738 of substrate 3701, and extends to the edges of substrate 3701. One or more wire bond openings 114 are patterned or formed into stiffener 112 to allow one or more wire bonds 108 to be coupled between pads on IC die 102 and bond pads on substrate 3701. For example, stiffener 112 may have wire bond openings such as wire bond openings 114 shown in FIG. 2A, wire bond openings 206 as shown in FIG. 2C, and wire bond openings 114 with studs 1002 as shown in FIG. 10A. [0308] Furthermore, as shown in FIG. 41B, notches/cutouts and “steps” can be patterned on the edges of openings 114 and 206 to reduce wire bond lengths between IC die 102 and substrate 104, to improve routability of substrate 3701, to improve the overall manufacturing process, and to improve BGA package mechanical, thermal, and electrical performances, as well as to enhance BGA package reliability. For example, FIG. 41B shows first and second notches 4102 and 4104 formed in respective wire bond openings 114. Furthermore, a stud 1002 is formed across an opening 114. The present invention includes any combination of such patterning of openings in stiffener 112. [0309] FIG. 42 illustrates a BGA package 4200, according to an embodiment of the present invention. BGA package 4200 is similar to BGA package 4100 shown in FIG. 41A, except that stiffener 112 and thermal connector 802 are integrated into a single structure, stiffener 4202. Stiffener 4202 includes a protruding portion 2102, similarly to stiffener 112 shown in FIG. 21. Protruding portion 2102 is located on bottom surface 4204 of stiffener 112. In BGA package 4200, bottom surface 4204 of stiffener 112 is coupled to top surface 3738 of substrate 3701. Protruding portion 2102 extends through opening 704 in substrate 3701. Bottom surface 4206 of protruding portion 2102 is capable of attachment to a PCB when BGA package 4200 is mounted to the PCB. [0310] BGA package 4200 has improved thermal and electrical properties. A single-piece stiffener better conducts heat and/or electricity than the two-piece stiffener/thermal connector structure shown in FIG. 41A. Furthermore, the overall number of parts is reduced for package assembly, reducing process steps in manufacturing and improving reliability in application of the BGA package. [0311] FIG. 43 illustrates a BGA package 4300, according to an embodiment of the present invention. BGA package 4300 is similar to BGA package 4100 shown in FIG. 41A, except that encapsulate material 3704 is applied according to an over-mold process. [0312] Note that as shown in the embodiment of FIG. 43, a portion of top surface 3738 of substrate 3701 is not covered by encapsulate material 3704, although in alternative embodiments, the entire top surface 3738 of substrate 3701 may be encapsulated by encapsulate material 3704 using an over-mold process. [0313] FIG. 44 illustrates a BGA package 4400, according to an embodiment of the present invention. BGA package 4400 is similar to BGA package 4100 shown in FIG. 41A, except that IC die 102 is encapsulated together with the entire top surface of substrate 3701, according to a saw singulation encapsulation process. For example, a plurality of BGA packages 4400 may be formed together in a panel strip during manufacturing. The entire panel strip may be encapsulated simultaneously by encapsulate material 3704. Subsequently, each BGA package 4400 in the panel strip may be separated from the panel strip according to saw singulation. Each BGA package 4400 is cut from the panel strip, which forms the outer edges of substrate 3701 and encapsulate material 3704. In this manner, the top surface of substrate 3701 is not exposed. [0314] FIG. 45 illustrates a BGA package 4500, according to an embodiment of the present invention. BGA package 4500 is similar to BGA package 3700 shown in FIG. 37A, except that thermal connector 802 has a height 4508 such that h3 (3712)<0. In the embodiment shown in FIG. 45, thermal connector 802 extends beyond the sitting plane of BGA package 4500. An advantage of this configuration is that BGA package 4500 can be more firmly attached to a PCB, via a specialized socket or opening in the PCB. Another advantage of this configuration is that mechanical and thermal stresses on solder balls 106 are alleviated by the use of thermal connector 802, which serves as an anchor for BGA package 4500 to the PCB. [0315] As shown in the example of FIG. 45, a cavity 4504 exists in a PCB 4502 to accommodate thermal connector 802. Cavity 4504 may be a socket that extends partially through PCB 4502, or may be an opening that extends entirely through PCB 4502. Hence, BGA package 4500 can be mounted on a PCB where thermal connector 802 extends partially or entirely through the PCB. Bottom surface 3736 of thermal connector 802 may be exposed on the opposite side of the PCB from the PCB surface to which BGA package 4500 is mounted. Hence, for example, heat sinking devices may be coupled to the exposed bottom surface 3736 of thermal connector 802 on the opposite side of the PCB from BGA package 4500. [0316] In an embodiment, cavity 4504 is the same size as, or larger size than a footprint size of thermal connector 802. The thermal connector 802 may be attached to PCB 4502 using an adhesive 4506, which may be an electrically connective or non-conductive adhesive, epoxy, solder, metal-filled paste, or other joining agent. This configuration may be used to enhance thermal coupling of IC die 102 inside BGA package 4500 to external heat sinking and transportation devices. Such devices may include, but are not limited to heat sinks, heat pipes, radiators, a chassis and a box, and enclosure walls of electronic systems. Embodiments for Assembling BGA Packages with Thermal Connectors [0317] FIGS. 46A-46F, 47A-47F, 48, and 49 show flowcharts providing operational steps for assembling one or more embodiments of the present invention. The steps of the respective flowcharts do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below. [0318] FIG. 46A provides a flowchart 4600. Flowchart 4600 provides steps for assembling a ball grid array (BGA) package. Flowchart 4600 begins with step 4602. In step 4602, an opening is formed through a surface of a substrate. For example, the opening is central window-shaped opening 704, formed in substrate 3701 of BGA package 3700 shown in FIG. 37A. Opening 704 may have any shape, and is not required to be exactly centered in substrate 3701. [0319] In step 4604, the surface of the substrate is coupled to a surface of a stiffener, wherein an area of the surface of the stiffener is less than an area of the surface of the substrate. For example, the surface of the substrate is top surface 3738 of substrate 3701, and the surface of the stiffener is bottom surface 3740 of stiffener 3702, as shown in FIG. 37A. Bottom surface 3740 and top surface 3738 may be coupled together by a variety of means, including lamination, adhesives, epoxies, and other ways described herein or otherwise known. As shown in FIG. 37F, stiffener 3740 is smaller in area than top surface 3738 of substrate 3701. [0320] In step 4606, a thermal connector is coupled to the surface of the stiffener through the opening, wherein a surface of the thermal connector is capable of attachment to a printed circuit board (PCB) when the BGA package is mounted to the PCB. For example, the thermal connector is thermal connector 802, which is coupled to bottom surface 3740 of stiffener 3702 through opening 704, as shown in FIG. 37A. As described above, bottom surface 3736 of thermal connector 802 is capable of attachment to a PCB when BGA package 3700 is mounted to the PCB. [0321] FIG. 46B provides additional exemplary steps for flowchart 4600 of FIG. 46A: [0322] In step 4608, an IC die is mounted to a second surface of the stiffener. For example, as shown in FIG. 37A, the IC die is IC die 102, which is mounted to top surface 3742 of stiffener 3702. [0323] In step 4610, the IC die is encapsulated on the second surface of the stiffener. For example, as shown in FIGS. 37A, 39, and 40, IC die 102 is encapsulated on top surface 3742 of stiffener 3702 by an encapsulate material 3704. [0324] FIG. 46C provides exemplary steps for performing step 4610 shown in FIG. 46B: [0325] In step 4612, a dam is formed on the surface of the substrate around the IC die. For example, the dam is dam 3706, which is formed on top surface 3738 of substrate 3701 around IC die 102. [0326] In step 4614, an encapsulate material is applied within a boundary of the dam. For example, as shown in FIG. 37A, encapsulate material 3704 is applied within the boundary of dam 3706, according to a glob top encapsulation process. [0327] In an alternative embodiment, step 4610 may include the step where an encapsulate material is applied according to an over-mold encapsulation process. For example, as shown in FIG. 39, encapsulate material 3704 was applied to encapsulate IC die 102 according to an over-mold encapsulation process. [0328] FIG. 46D provides exemplary steps for performing step 4610 shown in FIG. 46C, in still another alternative embodiment: [0329] In step 4616, an encapsulate material is applied. For example, as shown, in FIG. 40, encapsulate material 3704 is applied to encapsulate IC die 102. Encapsulate material 3704 may be applied to a plurality of BGA packages that have been manufactured in a panel strip. [0330] In step 4618, an edge of the encapsulate material is formed according to a saw-singulation process. As described above, a saw-singulation process may be used to separate the BGA packages that were manufactured in a panel strip, thereby forming relatively straight edges for encapsulate material 3704, as shown in FIG. 40. [0331] FIG. 46E provides an additional exemplary step for flowchart 4600 of FIG. 46A: [0332] In step 4620, a pattern is formed in at least a portion of an edge of the stiffener. For example, as shown in FIGS. 37D and 37E, one or more cutout patterns may be formed in edges of stiffener 3702, including cutout portion 3724 formed in first edge 3716. Notch, hole, step, and other patterns may also be formed in an edge of stiffener 3702, as described above. [0333] FIG. 46F provides an additional exemplary step for flowchart 4600 of FIG. 46A: [0334] In step 4622, the thermal connector is configured to have a height such that the thermal connector extends into a cavity formed in a surface of the PCB when the BGA package is mounted to the PCB. For example, as shown in FIG. 45, thermal connector 802 has a height 4508 such that thermal connector 802 is long enough to extend into cavity 4504 in PCB 4502, when BGA package 4500 is mounted to PCB 4502. [0335] FIG. 47 provides a flowchart 4700. Flowchart 4700 provides steps for assembling a ball grid array (BGA) package according to an additional embodiment. Flowchart 4700 begins with step 4702. In step 4702, a stiffener is provided that has a surface and a protruding portion, wherein the protruding portion is located on the surface of the stiffener. For example, the stiffener is stiffener 3802, as shown in FIG. 38. Stiffener 3802 has bottom surface 3808 and protruding portion 3804. Protruding portion 3804 is located on, and extends from bottom surface 3808. [0336] In step 4704, an opening is formed through a surface of a substrate. For example, the opening is central window-shaped opening 704, formed in substrate 3701 of BGA package 3800 shown in FIG. 38. Opening 704 may have any shape, and is not required to be exactly centered in substrate 3701. [0337] In step 4706, the surface of the substrate is coupled to the surface of the stiffener such that the protruding portion extends through the opening, wherein an area of the surface of the stiffener is less than an area of the surface of the substrate, wherein a surface of the protruding portion is capable of attachment to a printed circuit board (PCB) when the BGA package is mounted to the PCB. For example, as shown in FIG. 38, top surface 3738 of substrate 3701 is coupled to bottom surface 3808 of stiffener 3802, such that protruding portion 3804 extends through opening 704. As shown in FIG. 38, bottom surface 3808 of stiffener 3804 is smaller in area than top surface 3738 of substrate 3701. As described above, bottom surface 3806 of protruding portion 3804 is capable of attachment to a PCB when BGA package 3800 is mounted to the PCB. [0338] FIG. 47B provides additional exemplary steps for flowchart 4700 of FIG. 47A: [0339] In step 4708, an IC die is mounted to a second surface of the stiffener. For example, as shown in FIG. 38, the IC die is IC die 102, which is mounted to top surface 3810 of stiffener 3802. [0340] In step 4710, the IC die is encapsulated on the second surface of the stiffener. For example, as shown in FIGS. 38, 39, and 40, IC die 102 is encapsulated on the top surface of a stiffener by an encapsulate material 3704. [0341] FIG. 47C provides exemplary steps for performing step 4710 shown in FIG. 47B: [0342] In step 4712, a dam is formed on the surface of the substrate around the IC die. For example, the dam is dam 3706, which is formed on top surface 3738 of substrate 3701 around IC die 102. [0343] In step 4714, an encapsulate material is applied within a boundary of the dam. For example, as shown in FIG. 38, encapsulate material 3704 is applied within the boundary of dam 3706, in a glob top encapsulation process. [0344] In an alternative embodiment, step 4710 may include the step where an encapsulate material is applied according to an over-mold encapsulation process. For example, BGA package 3800 with a single piece stiffener/thermal connector is applicable to an over-mold encapsulation process, as shown in FIG. 39 for BGA package 3900. [0345] FIG. 47D provides exemplary steps for performing step 4710 shown in FIG. 47C, in still another alternative embodiment: [0346] In step 4716, an encapsulate material is applied. For example, as shown in FIG. 40, encapsulate material 3704 is applied to encapsulate IC die 102. Encapsulate material 3704 may be applied to a plurality of BGA packages that have been manufactured in a panel strip. [0347] In step 4718, an edge of the encapsulate material is formed according to a saw-singulation process. As described above, a saw-singulation process may be used to separate the BGA packages that were manufactured in a panel strip, thereby forming relatively straight edges for encapsulate material 3704, as shown in FIG. 40. BGA package 3800 with a single piece stiffener/thermal connector is applicable to this saw-singulation process. [0348] FIG. 47E provides an additional exemplary step for flowchart 4700 of FIG. 47A: [0349] In step 4720, a pattern is formed in at least a portion of an edge of the stiffener. For example, FIGS. 37D and 37E show cutout portion 3724 formed in first edge 3716 of stiffener 3702. Stiffener 3802 is also applicable to such patterning. Hence, notch, hole, step, and other patterns as described above may also be formed in one or more edges of stiffener 3802. [0350] FIG. 47F provides an additional exemplary step for flowchart 4700 of FIG. 47A: [0351] In step 4722, the protruding portion is configured to have a height such that the protruding portion extends into a cavity formed in a surface of the PCB when the BGA package is mounted to the PCB. For example, similarly to the embodiment shown in FIG. 45, protruding portion 3804 may have a height such that protruding portion 3804 is long enough to extend into cavity 4504 in PCB 4502, when BGA package 3800 is mounted to PCB 4502. [0352] FIG. 48 provides a flowchart 4800. Flowchart 4800 provides steps for assembling a ball grid array (BGA) package according to an additional embodiment. Flowchart 4800 begins with step 4802. In step 4802, an opening is formed through a surface of a substrate. For example, the opening is central window-shaped opening 704, formed in substrate 3701 of BGA package 4100 shown in FIG. 41A. Opening 704 may have any shape, and is not required to be exactly centered in substrate 3701. [0353] In step 4804, the surface of the substrate is coupled to a surface of a stiffener. For example, the surface of the substrate is top surface 3738 of substrate 3701, and the surface of the stiffener is bottom surface 4102 of stiffener 112, as shown in FIG. 41A. Bottom surface 4102 and top surface 3738 may be coupled together by a variety of means, including lamination, adhesives, epoxies, and other ways described herein or otherwise known. [0354] In step 4806, a thermal connector is coupled to the surface of the stiffener through the opening, wherein the thermal connector is capable of attachment to a printed circuit board (PCB) when the BGA package is mounted to the PCB. For example, the thermal connector is thermal connector 802, which is coupled to bottom surface 4102 of stiffener 112 through opening 704, as shown in FIG. 41A. As described above, bottom surface 3736 of thermal connector 802 is capable of attachment to a PCB when BGA package 4100 is mounted to the PCB. [0355] In step 4808, the thermal connector is configured to have a height such that the thermal connector extends into a cavity formed in a surface of the PCB when the BGA package is mounted to the PCB. For example, as shown in FIG. 45, thermal connector 802 has a height 4508 such that thermal connector 802 is long enough to extend into cavity 4504 in PCB 4502, when BGA package 4500 is mounted to PCB 4502. Similarly to BGA package 4500, BGA package 4100 may include a thermal connector 802 with a height long enough to extend into cavity 4504. [0356] FIG. 49 provides a flowchart 4900. Flowchart 4900 provides steps for assembling a ball grid array (BGA) package according to an additional embodiment. Flowchart 4900 begins with step 4902. In step 4902, an opening is formed through a surface of a substrate. For example, the opening is central window-shaped opening 704, formed in substrate 3701 of BGA package 4200 shown in FIG. 42. Opening 704 may have any shape, and is not required to be exactly centered in substrate 3701. [0357] In step 4904, a stiffener that has a surface and a protruding portion is provided, wherein the protruding portion is located on the surface of the stiffener. For example, the stiffener is stiffener 4202, as shown in FIG. 42. Stiffener 4202 includes bottom surface 4204 and protruding portion 2102. Protruding portion 2102 is located on, and extends from bottom surface 4204. [0358] In step 4906, the surface of the substrate is coupled to the surface of the stiffener such that the protruding portion extends through the opening, wherein the protruding portion is capable of attachment to a printed circuit board (PCB) when the BGA package is mounted to the PCB. For example, as shown in FIG. 42, top surface 3738 of substrate 3701 is coupled to bottom surface 4204 of stiffener 4202, such that protruding portion 2102 extends through opening 704. As described above, bottom surface 4206 of protruding portion 2102 is capable of attachment to a PCB when BGA package 4200 is mounted to the PCB. [0359] In step 4908, the protruding portion is configured to have a height such that the protruding portion extends into a cavity formed in a surface of the PCB when the BGA package is mounted to the PCB. For example, similarly to the embodiment shown in FIG. 45, protruding portion 2102 may have a height such that protruding portion 2102 is long enough to extend into cavity 4504 in PCB 4502, when BGA package 4200 is mounted to PCB 4502. [0000] PCB Land Patterns for Connection of Thermal Connector to the PCB [0360] This section describes PCB land patterns and configurations for attaching a thermal connector portion of a BGA package to a PCB, according to embodiments of the present invention. The PCB land patterns and configurations are applicable to mounting all types of thermal connectors. For example, applicable thermal connectors include cavity 702 shown in FIG. 7, thermal connector 802 first shown in FIG. 8, thermal connector 1102 first shown in FIG. 11, protruding portion 2102 first shown in FIG. 21, first and second thermal connectors 2402 and 2404 shown in FIG. 24, first, second, third, and fourth thermal connectors 2502, 2504, 2506, and 2508 shown in FIG. 25, first and second thermal connectors 2702 and 2704 shown in FIG. 27, and protruding portion 3804 shown in FIG. 38. [0361] FIG. 50A shows a cross-sectional view of a portion of a PCB 5000 that has a land pattern 5002 thereon, according to an embodiment of the present invention. FIG. 50B shows a top view of a portion of PCB 5000. As shown in FIG. 50B, land pattern 5002 is substantially rectangular shaped, and is adapted to allowing a rectangular thermal connector of a BGA package to be mounted to PCB 5000, such as thermal connector 802 of BGA package 3700, as shown in FIG. 37A. Thermal connectors with shapes other than rectangular may also be mounted to PCB 5000 via land pattern 5002. [0362] As shown in FIG. 50A, land pattern 5002 is an opening that allows access to a portion of a conductive land 5004 through a solder mask 5006 on the top surface of PCB 5000. FIG. 50B shows an outline of conductive land 5004 under solder mask 5006. A thermal connector may be attached to conductive land 5004 through land pattern 5002 by solder or other adhesive material. Conductive land 5004 may be rectangular, as shown in FIG. 50B, or may be formed in another shape, including round, elliptical, irregular, and other polygons. Conductive land 5004 may be electrically and/or thermally conductive. Conductive land 5004 may be electrically conductive in order to couple a thermal connector to a ground, power, or other signal in PCB 5000. Conductive land 5004 may be thermally conductive in order to enhance transfer of heat from the thermal connector attached to land pattern 5002. For example, conductive land 5004 may be made from copper, copper-based alloys, aluminum, aluminum-based alloys, other metals, or alloys/combinations thereof. [0363] FIG. 51A shows a cross-sectional view of a portion of a PCB 5100 that has a land pattern 5102 thereon, according to an embodiment of the present invention. FIG. 51B shows a top view of a portion of PCB 5100. Land pattern 5102 of PCB 5100 is similar to land pattern 5002 of PCB 5000 shown in FIGS. 50A and 50B, subject to at least the following discussion. [0364] As shown in FIG. 51B, land pattern 5102 includes an array or matrix of substantially rectangular shaped openings 5104. Openings 5104 allow access to a portion of conductive land 5004 through solder mask 5006 on the top surface of PCB 5100. Land pattern 5102 may include any number of openings 5104 arranged in an array or matrix. Land pattern 5102 is adapted to mounting a single thermal connector of a BGA package, such as thermal connector 802 of BGA package 3700, shown in FIG. 37A. Land pattern 5102 is also adapted to mounting multiple thermal connectors. For example, an array of thermal connectors similar to first, second, third, and fourth thermal connectors 2502, 2504, 2506, and 2508, shown in FIG. 25, may be attached to conductive land 5004 through openings 5104. An array of thermal connectors, having a thermal connector that corresponds to each of openings 5104, may be mounted to conductive land 5004 through openings 5104. In a multiple thermal connector embodiment, conductive land 5004 may be separated into multiple electrically isolated segments. The multiple electrically isolated segments can accommodate multiple electrical power, ground, and other signals that corresponding to the multiple thermal connectors. [0365] Note that for illustrative purposes, the present description illustrates “solder mask defined land openings,” (SMDs) such as land pattern 5102. For SMDs, a portion of the conductive land that is exposed through openings in the solder mask has a smaller area than the entire conductive land. The present invention, however, is also applicable to “non-solder mask defined land openings” (NSMDs). For NSMDs, the entire conductive land is exposed. For example, in an NSMD embodiment for PCB 5100, conductive land 5004 may be formed as a plurality of rectangular conductive lands arranged in an array or matrix, so that solder mask 5006 is not required to define the array or matrix, and/or is not required to define the rectangular shapes of openings 5104. Any of the land patterns described herein may be formed as SMDs or NSMDs. [0366] FIG. 52A shows a cross-sectional view of a portion of a PCB 5200 that has a land pattern 5202 thereon, according to an embodiment of the present invention. FIG. 52B shows a top view of a portion of PCB 5200. Land pattern 5202 of PCB 5200 is similar to land pattern 5102 of PCB 5100 shown in FIGS. 51A and 51B, except that land pattern 5202 of PCB 5200 has an array or matrix of substantially round or elliptical shaped openings 5204, rather than rectangular shaped openings. [0367] FIG. 53A shows a cross-sectional view of a portion of a PCB 5300 that has a land pattern 5302 thereon, according to an embodiment of the present invention. FIG. 53B shows a top view of a portion of PCB 5300. Land pattern 5302 of PCB 5300 is similar to land pattern 5202 of PCB 5200 shown in FIGS. 52A and 52B, except that land pattern 5302 of PCB 5300 has a staggered array or matrix of substantially round or elliptical shaped openings 5204, rather than a regular, or non-staggered array or matrix, as in land pattern 5202. [0368] FIGS. 54A and 54B provide additional internal detail for example PCBs, according to embodiments of the present invention. The description related to FIGS. 54A and 54B is provided below for illustrative purposes, and is applicable to all PCBs described herein, including PCBs having any number of layers. [0369] FIG. 54A shows a cross-sectional view of PCB 5100 of FIGS. 51A and 51B. As shown in the example of FIG. 54A, PCB 5100 is a multi-layer (five conductive layers shown) PCB. In embodiments, conductive land 5004 may be coupled to any number of conductive planes, layers, and/or traces in a PCB. For example, in FIG. 54A, a first electrical potential plane 5404 and a second electrical potential plane 5406 in PCB 5100 are coupled to conductive land 5004 by a plurality of vias 5402. Plurality of vias 5402 may be electrically conductive in order to electrically couple conductive land 5004 to first electrical potential plane 5404 and second electrical potential plane 5406. Plurality of vias 5404 may be thermally conductive in order to enhance heat transfer from conductive land 5004 to first electrical potential plane 5404 and second electrical potential plane 5406. In embodiments, any number of one or more vias 5402 may be present. [0370] FIG. 54B shows a cross-sectional view of PCB 5000 of FIGS. 50A and 50B. As shown in the example of FIG. 54B, PCB 5000 is a two-layer PCB, and conductive land 5004 is coupled to electrical potential plane 5410 by plurality of vias 5402. [0371] FIG. 55A shows a cross-sectional view of a PCB 5500 that has an opening 5502 through PCB 5500. Opening 5502 is open at a top surface 5506 and a bottom surface 5508 of PCB 5500. Opening 5502 accommodates a thermal connector in a similar fashion as does opening 4504 shown in FIG. 45, which accommodates thermal connector 802. A thermal connector may extend or protrude into/through opening 5502, to be coupled to a conductive land 5504 on an inner surface around opening 5502. For example, the thermal connector may be attached to conductive land 5504 by a solder or other adhesive material. As shown in FIG. 55A, conductive land 5504 is electrically and/or thermally coupled to one or more electrical potential planes 5506 in PCB 5500. As shown in the example of FIG. 55, PCB 5500 is a multi-layer (five conductive layers shown) PCB. FIG. 55B shows a PCB 5510 with opening 5502 therethrough for accommodating a thermal connector, similar to PCB 5500. PCB 5510 is shown as a two-layer PCB, for illustrative purposes. Seal Ring Embodiments [0372] This section describes a seal ring for a thermal connector portion of a BGA package, according to embodiments of the present invention. The seal ring as described herein is applicable to all configurations of BGA packages with thermal connectors. For example, the applicable thermal connectors include cavity 702 shown in FIG. 7, thermal connector 802 first shown in FIG. 8, thermal connector 1102 first shown in FIG. 11, protruding portion 2102 first shown in FIG. 21, first and second thermal connectors 2402 and 2404 shown in FIG. 24, first, second, third, and fourth thermal connectors 2502, 2504, 2506, and 2508 shown in FIG. 25, first and second thermal connectors 2702 and 2704 shown in FIG. 27, and protruding portion 3804 shown in FIG. 38. The description provided below relates to thermal connector 802, for illustrative purposes, but is applicable to all thermal connectors and BGA package configurations. [0373] FIG. 56 shows a cross-sectional view of BGA package 5600, according to an embodiment of the present invention. BGA package 5600 is substantially similar to BGA package 4000 shown in FIG. 40, subject to the following discussion. As shown in FIG. 56, a sealant material 5602 fills a gap between thermal connector 802 and substrate 3701 in opening 704. Sealant material 5602 is formed in a ring around thermal connector 802, and therefore is also referred to as a seal ring. In an embodiment, sealant material 5602 is a dielectric sealant, an epoxy, or other electrically non-conductive sealing material. The seal ring formed by sealant material 5602 improves a BGA package resistance to moisture, BGA package manufacturing yields, stability of thermal connector 802 in opening 704, BGA package reliability, as well as additional BGA package thermal and mechanical performances. [0374] In an alternative embodiment, sealant material 5602 is an electrically conductive material that can electrically couple thermal connector 802 to one or more electrically conductive traces, rings, and/or planes of substrate 3701, that are coupled to an electrical potential. Such an embodiment provides additional flexibility for routing of substrate 3701, and an improvement in BGA package electrical performance. [0000] Summary of Some Features of the Present Invention [0375] (1) A window opening is patterned in the package substrate to facilitate thermal and electrical connection from the IC die to the PCB. [0376] (2) A thermal/electrical connector is exposed at the bottom of the BGA package. [0377] (3) BGA package designs can use conventional types of substrate (such as organic, tape, and ceramic, etc.) as well as advanced types of substrate (high density substrate, build-up substrate, Teflon substrate, etc.); a single routing layer substrate, as well as two or more routing layer substrate can be used. [0378] (4) Glob-top, over-mold, saw-singulation and other IC die encapsulation processes can be used. [0379] (5) Stiffener/interposer can be patterned in different forms (openings, cutouts, steps, etc.) or shapes (square, rectangular, circular, spoke-like, cutouts or notches and steps on one or more edges, etc.) for enhanced wire bond connection, enhanced BGA package mechanical, thermal, and electrical performance, enhanced reliability, improved substrate design, and manufacturing process enhancement. [0380] (6) One or more of stiffener/interposers and thermal/electrical connector surfaces may be finished using a variety of processes, materials, and methodologies at various surfaces, spots, locations. [0381] (7) The stiffener/interposer and thermal/electrical connector may be constructed in a single piece. [0382] (8) A cavity may be formed in a thermal/electrical connector for die attachment. [0383] (9) Two or more stiffeners/interposers may be integrated into a BGA package. [0384] (10) A seal ring design may be incorporated in a substrate window opening. [0385] (11) A thermal/electrical connector may be formed to extend under the sitting plane of the BGA package. [0386] (12) A cavity may be formed in a surface of the PCB to allow the extended thermal/electrical connector to be more easily mounted on the PCB, and/or exposed to the backside of the PCB, and/or connected to heat sinking devices at the backside of the PCB [0387] (13) A split stiffener/interposer design may be used to provide different electrical potential planes for the BGA package. [0388] (14) Rigid support is provided for the IC die during the BGA package assembly processes. [0000] Summary of Some Advantages of the Present Invention [0389] (1) A thermal/electrical connector provides a low impedance path for heat and/or electrical current flow between an IC die and a PCB. [0390] (2) A window opening formed in a substrate facilitates thermal and electrical connection between an IC die and PCB. [0391] (3) BGA package designs can use conventional types of substrate (such as organic, tape, and ceramic, etc.) as well as advanced types of substrate (high-density substrate, build-up substrate, Teflon substrate, etc.). [0392] (4) A substrate with a single routing layer, as well as two or more layers may be used. [0393] (5) Various processes may be used for IC die encapsulation, including glob-top, over-mold, saw-singulated, and others to meet requirements of various applications and provide the BGA package with various forms and appearances. [0394] (6) Different patterns (openings, cutouts, steps, etc.) or shapes (square, rectangular, circular, spoke-like, cutouts or notches and steps on one or more edges, etc.) may be formed in a stiffener/interposer to reduce wire bond lengths for critical nets, reduce risks of wire bonds shorting during the BGA package assembly processes, provide flexibility for substrate routing/design, and enhance BGA package mechanical, thermal, electrical, and reliability performances. [0395] (7) A black-oxidized surface treatment may be applied on a top surface of a stiffener/interposer. This promotes adhesion between a molding compound used for IC die encapsulation and the stiffener/interposer. A surface coating or plating on one or more stiffener/interposer surfaces and/or thermal/electrical connector surfaces at an interface of silver, solder, or other metals and alloys promotes adhesion between elements. A surface coating or plating on a bottom surface of a thermal/electrical connector of silver, solder, or other metal(s) and/or alloy(s) promotes adhesion between the thermal connector of the BGA package and a PCB during a surface mount process. [0396] (8) A single-piece construction for stiffener/interposer and thermal/electrical connector reduces an electrical and thermal interface impedance. [0397] (9) A cavity formed in a thermal/electrical connector for attachment of the IC die reduces wire bond length and improves package electrical performances. [0398] (10) A two-stiffener/interposer integration into a BGA package provides additional electrical potential planes for the BGA package. [0399] (11) A split stiffener/interposer design provides additional electrical potential planes for the BGA package. [0400] (12) A seal ring design in a substrate window opening improves BGA package moisture resistance as well as mechanical and thermal performances. [0401] (13) A rigid IC die support is provided by the present invention, which reduces IC die cracking and de-lamination, and improves assembly yields during a BGA package assembly process. [0402] (14) Extension or protrusion of the thermal/electrical connector under the sitting plane of the BGA package allows connection of heat sinking devices from the backside of an PCB to the BGA package. [0000] Conclusion [0403] While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant art that various changes in form and detail can be made therein without departing from the spirit and scope of the invention. Thus, the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents. Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS5543662 *Sep 20, 1994Aug 6, 1996Sun Microsystems, Inc.Low heat loss and secure chip carrier for cryogenic coolingUS5650662 *Aug 19, 1994Jul 22, 1997Edwards; Steven F.Direct bonded heat spreaderUS5744863 *Jun 7, 1995Apr 28, 1998International Business Machines CorporationChip carrier modules with heat sinks attached by flexible-epoxyUS5834848 *Dec 2, 1997Nov 10, 1998Kabushiki Kaisha ToshibaElectronic device and semiconductor packageUS5889321 *Jun 17, 1997Mar 30, 1999International Business Machines CorporationStiffeners with improved adhesion to flexible substratesUS5895967 *Jul 1, 1998Apr 20, 1999Texas Instruments IncorporatedBall grid array package having a deformable metal layer and methodUS5907189 *May 29, 1997May 25, 1999Lsi Logic CorporationConformal diamond coating for thermal improvement of electronic packagesUS5976912 *Mar 17, 1995Nov 2, 1999Hitachi Chemical Company, Ltd.Fabrication process of semiconductor package and semiconductor packageUS5977633 *May 29, 1998Nov 2, 1999Nec CorporationSemiconductor device with metal base substrate having hollowsUS5982621 *Nov 23, 1998Nov 9, 1999Caesar Technology Inc.Electronic device cooling arrangementUS6034427 *Jan 28, 1998Mar 7, 2000Prolinx Labs CorporationBall grid array structure and method for packaging an integrated circuit chipUS6040984 *Feb 26, 1997Mar 21, 2000Fuji Machinery Mfg. & Electronics Co., Ltd.Printed circuit board with opposed bonding shelves for semiconductor chip wire bonding at different levelsUS6145365 *Sep 28, 1998Nov 14, 2000Nakamura Seisakusho KabushikigaishaMethod for forming a recess portion on a metal plateUS6207467 *Nov 10, 1999Mar 27, 2001Micron Technology, Inc.Multi-chip module with stacked diceUS6278613 *Sep 27, 2000Aug 21, 2001St Assembly Test Services Pte LtdCopper pads for heat spreader attachUS6313525 *Jul 9, 1998Nov 6, 2001Sony CorporationHollow package and method for fabricating the same and solid-state image apparatus provided therewithUS6365980 *Feb 25, 2000Apr 2, 2002Texas Instruments IncorporatedThermally enhanced semiconductor ball grid array device and method of fabricationUS6528869 *Apr 6, 2001Mar 4, 2003Amkor Technology, Inc.Semiconductor package with molded substrate and recessed input/output terminalsUS6602732 *Apr 11, 2002Aug 5, 2003Computech International Ventures LimitedMethod for mounting a semiconductor chip on a substrate and semiconductor device adapted for mounting on a substrateUS6614660 *Apr 30, 2002Sep 2, 2003Ultratera CorporationThermally enhanced IC chip packageUS6617193 *Oct 5, 2000Sep 9, 2003Hitachi Chemical Company, Ltd.Semiconductor device, semiconductor device substrate, and methods of fabricating the sameUS6657870 *Oct 1, 2001Dec 2, 2003Lsi Logic CorporationDie power distribution systemUS6664617 *Dec 17, 2001Dec 16, 2003Convergence Technologies, Ltd.Semiconductor packageUS6724071 *Oct 11, 2002Apr 20, 2004Asat, LimitedMolded plastic package with heat sink and enhanced electrical performanceUS6724080 *Dec 20, 2002Apr 20, 2004Altera CorporationHeat sink with elevated heat spreader lidUS7102225 *Jul 23, 2002Sep 5, 2006Broadcom CorporationDie-up ball grid array package with printed circuit board attachable heat spreaderUS7132744 *Oct 29, 2001Nov 7, 2006Broadcom CorporationEnhanced die-up ball grid array packages and method for making the sameUS7161239 *Oct 31, 2002Jan 9, 2007Broadcom CorporationBall grid array package enhanced with a thermal and electrical connectorUS7227256 *Jul 25, 2002Jun 5, 2007Broadcom CorporationDie-up ball grid array package with printed circuit board attachable heat spreaderUS7245500 *Oct 31, 2002Jul 17, 2007Broadcom CorporationBall grid array package with stepped stiffener layerUS7259448 *May 7, 2001Aug 21, 2007Broadcom CorporationDie-up ball grid array package with a heat spreader and method for making the sameUS20010001505 *Jan 4, 2001May 24, 20013M Innovative Properties CompanyTape ball grid array with interconnected ground planeUS20010040279 *May 8, 2001Nov 15, 2001Mess Leonard E.Apparatus and methods of packaging and testing dieUS20010045644 *Jan 13, 2000Nov 29, 2001Chien-Ping HuangSemiconductor package having heat sink at the outer surfaceUS20020053731 *Jun 15, 2001May 9, 2002Shin-Hua ChaoStructure and package of a heat spreader substrateUS20020072214 *Nov 13, 2001Jun 13, 2002Seiko Epson CorporationSemiconductor device and method of fabrication thereof, circuit board, and electronic equipmentUS20020079572 *Dec 22, 2000Jun 27, 2002Khan Reza-Ur RahmanEnhanced die-up ball grid array and method for making the sameUS20020096750 *Mar 22, 2002Jul 25, 2002Katsunobu SuzukiPackage for semiconductor chip having thin recess portion and thick plane portionUS20020098617 *Sep 18, 2001Jul 25, 2002Ming-Xun LeeCD BGA package and a fabrication method thereofUS20020180040 *May 30, 2001Dec 5, 2002St Assembly Test Services Pte LtdSuper thin/super thermal ball grid array packageUS20020185717 *Jun 11, 2001Dec 12, 2002Xilinx, Inc.High performance flipchip package that incorporates heat removal with minimal thermal mismatchUS20040072456 *Oct 10, 2003Apr 15, 2004Formfactor, Inc.Methods of removably mounting electronic components to a circuit board, and sockets formed by the methodsUS20050280127 *Jun 21, 2004Dec 22, 2005Broadcom CorporationApparatus and method for thermal and electromagnetic interference (EMI) shielding enhancement in die-up array packagesUS20060065972 *Sep 29, 2004Mar 30, 2006Broadcom CorporationDie down ball grid array packages and method for making same* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS7432591 *Feb 28, 2008Oct 7, 2008International Business Machines CorporationThermal enhanced plastic ball grid array with heat sink attachment optionUS7582951Oct 20, 2005Sep 1, 2009Broadcom CorporationMethods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packagesUS7714453Jan 11, 2007May 11, 2010Broadcom CorporationInterconnect structure and formation for package stacking of molded plastic area array packageUS7719110Sep 18, 2007May 18, 2010Broadcom CorporationFlip chip package including a non-planar heat spreader and method of making the sameUS7808087Sep 27, 2006Oct 5, 2010Broadcom CorporationLeadframe IC packages having top and bottom integrated heat spreadersUS7872335Nov 30, 2007Jan 18, 2011Broadcom CorporationLead frame-BGA package with enhanced thermal performance and I/O countsUS7893546Oct 29, 2008Feb 22, 2011Broadcom CorporationBall grid array package enhanced with a thermal and electrical connectorUS8169067May 1, 2012Broadcom CorporationLow profile ball grid array (BGA) package with exposed die and method of making sameUS8183680May 22, 2012Broadcom CorporationNo-lead IC packages having integrated heat spreader for electromagnetic interference (EMI) shielding and thermal enhancementUS8183687May 22, 2012Broadcom CorporationInterposer for die stacking in semiconductor packages and the method of making the sameUS8310067Nov 13, 2012Broadcom CorporationBall grid array package enhanced with a thermal and electrical connectorUS8581381Oct 30, 2006Nov 12, 2013Broadcom CorporationIntegrated circuit (IC) package stacking and IC packages formed by sameUS8686554 *Mar 13, 2008Apr 1, 2014International Rectifier CorporationVertically mountable semiconductor device packageUS8692363 *Nov 14, 2011Apr 8, 2014Shinko Electric Industries Co., Ltd.Electric part package and manufacturing method thereofUS8802502Oct 11, 2013Aug 12, 2014Tessera, Inc.TSOP with impedance controlUS8853708Sep 16, 2010Oct 7, 2014Tessera, Inc.Stacked multi-die packages with impedance controlUS8981579Jun 17, 2014Mar 17, 2015Tessera, Inc.Impedance controlled packages with metal sheet or 2-layer rdlUS8994195Nov 4, 2013Mar 31, 2015Tessera, Inc.Microelectronic assembly with impedance controlled wirebond and conductive reference elementUS9013035Sep 5, 2006Apr 21, 2015Broadcom CorporationThermal improvement for hotspots on dies in integrated circuit packagesUS9030031Jan 6, 2014May 12, 2015Tessera, Inc.Microelectronic assembly with impedance controlled wirebond and reference wirebondUS9136197 *May 15, 2012Sep 15, 2015Tessera, Inc.Impedence controlled packages with metal sheet or 2-layer RDLUS9299634Sep 5, 2006Mar 29, 2016Broadcom CorporationMethod and apparatus for cooling semiconductor device hot blocks and large scale integrated circuit (IC) using integrated interposer for IC packagesUS20030146509 *Oct 31, 2002Aug 7, 2003Broadcom CorporationBall grid array package with separated stiffener layerUS20070090502 *Oct 20, 2005Apr 26, 2007Broadcom CorporationMethods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packagesUS20070267740 *Sep 5, 2006Nov 22, 2007Broadcom CorporationMethod and apparatus for cooling semiconductor device hot blocks and large scale integrated circuit (IC) using integrated interposer for IC packagesUS20070273023 *Oct 20, 2006Nov 29, 2007Broadcom CorporationIntegrated circuit package having exposed thermally conducting bodyUS20070273049 *Jan 11, 2007Nov 29, 2007Broadcom CorporationInterconnect structure and formation for package stacking of molded plastic area array packageUS20070290322 *Sep 5, 2006Dec 20, 2007Broadcom CorporationThermal improvement for hotspots on dies in integrated circuit packagesUS20080006934 *Sep 18, 2007Jan 10, 2008Broadcom CorporationFlip Chip Package Including a Non-Planar Heat Spreader and Method of Making the SameUS20080083981 *Jun 7, 2006Apr 10, 2008Romig Matthew DThermally Enhanced BGA Packages and MethodsUS20080096312 *Oct 20, 2006Apr 24, 2008Broadcom CorporationLow profile ball grid array (BGA) package with exposed die and method of making sameUS20080211089 *Feb 16, 2007Sep 4, 2008Broadcom CorporationInterposer for die stacking in semiconductor packages and the method of making the sameUS20080224286 *Mar 13, 2008Sep 18, 2008Martin StandingVertically mountable semiconductor device packageUS20080303124 *Nov 30, 2007Dec 11, 2008Broadcom CorporationLead frame-BGA package with enhanced thermal performance and I/O countsUS20090057871 *Oct 29, 2008Mar 5, 2009Broadcom CorporationBall Grid Array Package Enhanced With a Thermal and Electrical ConnectorUS20110140272 *Jun 16, 2011Broadcom CorporationBall Grid Array Package Enhanced With a Thermal and Electrical ConnectorUS20110182042 *Jul 28, 2011Occam Portfolio LlcElectronic Assemblies without Solder and Methods for their ManufactureUS20120119379 *Nov 14, 2011May 17, 2012Shinko Electric Industries Co., Ltd.Electric part package and manufacturing method thereofUS20120313228 *Dec 13, 2012Tessera, Inc.Impedence controlled packages with metal sheet or 2-layer rdl* Cited by examinerClassifications U.S. Classification257/707, 257/E23.14, 257/E23.101, 257/E23.105, 257/E23.092International ClassificationH01L23/367, H01L23/36, H01L23/373, H01L23/498, H01L23/433, H01L23/34Cooperative ClassificationH01L24/73, H01L2924/181, H01L2924/15787, H01L2924/351, H01L2924/07802, H01L24/48, H01L2224/32225, H01L2224/73265, H01L2224/48237, H01L2924/09701, H01L2924/01047, H01L23/3128, H01L2924/01005, H01L2924/01028, H01L23/49833, H01L2924/01006, H01L2224/05624, H01L2924/15173, H01L2924/01087, H01L2924/30107, H01L2924/19043, H01L23/3677, H01L2924/014, H05K1/0204, H01L23/24, H01L2224/48624, H01L2924/19041, H05K1/182, H01L2224/48091, H01L2224/48228, H01L23/4334, H01L23/3735, H01L2924/01029, H01L2924/01078, H01L2924/01082, H01L2224/49171, H01L2924/01033, H01L24/45, H01L2924/0105, H01L2224/32188, H01L2924/3011, H01L2924/15311, H01L2224/0401, H01L2924/01013, H01L2924/14, H01L2924/19042, H01L2224/49109, H01L24/49, H01L2224/83385, H01L2924/19105, H01L2924/1433, H01L2924/01079, H01L2224/48465, H01L2924/01046, H01L23/36, H01L2224/45144, H01L2224/48227, H01L2924/1815European ClassificationH01L24/49, H01L23/373L, H01L23/498F, H01L23/36, H01L23/31H2B, H01L23/433E, H01L23/367W, H01L23/24Legal EventsDateCodeEventDescriptionJun 27, 2006ASAssignmentOwner name: BROADCOM CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ZHAO, SAM ZIQUN;KHAN, REZAUR RAHMAN;REEL/FRAME:018040/0531Effective date: 20021024Mar 3, 2009CCCertificate of correctionDec 27, 2011FPAYFee paymentYear of fee payment: 4Feb 11, 2016ASAssignmentOwner name: BANK OF AMERICA, N.A., AS COLLATERAL AGENT, NORTHFree format text: PATENT SECURITY AGREEMENT;ASSIGNOR:BROADCOM CORPORATION;REEL/FRAME:037806/0001Effective date: 20160201Jun 9, 2016FPAYFee paymentYear of fee payment: 8RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services