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Timestamp: 2015-05-07 02:17:50
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Matched Legal Cases: ['Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 2004', 'Application No. 2006', 'Application No. 2006', 'Application No. 200780049295', 'Application No. 200780049394']

Patent US8193594 - Two-terminal switching devices and their methods of fabrication - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsTwo-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices...http://www.google.com/patents/US8193594?utm_source=gb-gplus-sharePatent US8193594 - Two-terminal switching devices and their methods of fabricationAdvanced Patent SearchPublication numberUS8193594 B2Publication typeGrantApplication numberUS 13/015,013Publication dateJun 5, 2012Filing dateJan 27, 2011Priority dateNov 7, 2006Also published asCN102176466A, CN102176466B, CN103199117A, EP2080227A2, EP2089906A2, US7898042, US20080105870, US20110147761, WO2008057553A2, WO2008057553A3, WO2008057560A2, WO2008057560A3Publication number015013, 13015013, US 8193594 B2, US 8193594B2, US-B2-8193594, US8193594 B2, US8193594B2InventorsGang Yu, Chan-Long Shieh, Hsing-Chung LeeOriginal AssigneeCbrite Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (89), Non-Patent Citations (41), Referenced by (1), Classifications (23) External Links: USPTO, USPTO Assignment, EspacenetTwo-terminal switching devices and their methods of fabrication
US 8193594 B2Abstract
Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
a layer of a broad band semiconducting material physically separate from the layers of semiconducting material on other of the two-terminal switching devices, wherein the band gap of the broad band semiconductor is at least about 2.5 eV and the carrier concentration in the broad band semiconductor is less than about 1018 cm−3; and
at least a portion of the semiconductor layer resides between the first and second conductive materials, wherein the second work function magnitude is greater than the first work function magnitude.
2. The electronic device of claim 1, wherein the energy difference between a Fermi level of the first conductive material and the lowest energy level of a conduction band of the broad band semiconducting material is not greater than about 0.3 eV.
3. The electronic device of claim 1, wherein the carrier concentration in the second conducting material is at least about 1018 cm−3.
4. The electronic device of claim 1, wherein the work function magnitude of the second conductive material is at least about 0.6 eV greater than the work function magnitude of the first conductive material.
5. The electronic device of claim 1, wherein the energy barrier between the lowest energy level of the conduction band of the p+ or p++ conducting material and the lowest energy level of the conduction band of the broad-band semiconductor material is about 0.3 eV or less.
6. The electronic device of claim 1, wherein the substrate is flexible.
7. The electronic device of claim 1, wherein at least some of the two-terminal switching devices of the array are electrically connected to one another by conductive lines.
8. The electronic device of claim 1, wherein the electronic device is a backplane for a display.
9. The electronic device of claim 8, wherein the two-terminal switching devices are configured to regulate light from a pixel of the display, wherein the display comprises a plurality of pixel control circuits, and wherein each pixel control circuit of the plurality comprises at least one of said two-terminal switching devices.
10. The electronic device of claim 9, wherein the switching device is configured to regulate light from a pixel of an electrophoretic or a rotating element display.
11. The electronic device of claim 9, wherein the switching device is configured to regulate light from a pixel of a liquid crystal display.
12. The electronic device of claim 1, wherein the broad band semiconducting material is a 2-6 valence compound.
13. The electronic device of claim 1, wherein the first conductive material comprises a metal selected from the group consisting of Mg, Ca, Sr, Ba, Ti, Ta, Al, In, Nb, Hf, Zn, Zr, Cu, Sn, V, Cr, Mn, Ga, Mo, Ni and Y and wherein the broad band semiconducting material comprises a metal oxide or an inorganic ceramic nanocomposite selected from the group consisting of MgxOy, CaxOy, SrxOy, BaxOy, TixOy, TaxOy, AlxOy, InxOy, NbxOy, HfxOy, SnxOy, ZnxOy, ZrxOy, CuxOy, YxOy, YxBayOz, and SmxSnyOz.
14. The electronic device of claim 1, wherein the first conductive material comprises a metal selected from the group consisting of Mg, Ca, Sr, Ba, Ti, Ta, Al, In, Nb, Hf, Zn, Zr, Cu, Sn, V, Cr, Mn, Ga, Mo, Ni and Y and wherein the broad band semiconducting material comprises a metal chalcogenide.
15. The electronic device of claim 1, wherein the first conductive material comprises a metal selected from the group consisting of Mg, Ca, Sr, Ba, Ti, Ta, Al, In, Nb, Hf, Zn, Zr, Cu, Sn, V, Cr, Mn, Ga, Mo, Ni and Y; wherein the broad band semiconducting material comprises a metal oxide, an inorganic ceramic nanocomposite, or a metal chalcogenide, and wherein the second conductive material comprises one or more conductive polymers selected from the group consisting of polythiophenes, polypyrroles, polyanilines, polythienothiophenes, and copolymers thereof, wherein each of the conductive polymers is substituted or unsubstituted.
16. The electronic device of claim 1, wherein the layers of two-terminal switching devices are formed as stacks on the substrate, with the first electrodes located proximate the substrate within the stacks and the second electrodes located distal with respect to the substrate in of the stacks.
17. The electronic device of claim 1, wherein the electronic device comprises a column-row addressable electric switch matrix.
18. The electronic device of claim 1, wherein for the two-terminal switching devices Ion(Von)/Ioff(Voff) is at least about 1,000, wherein the forward bias (Von) is about 2 V, and the reverse bias (Voff) is about −15 V.
19. The electronic device of claim 1, wherein each two-terminal switching device further comprises a layer of an organic semiconductor between a layer of an inorganic broad-band semiconductor, and the layer of the second conductive material.
20. The electronic device of claim 1, wherein the electronic device is selected from the group consisting of a Microelectromechanical System (MEMS) device, a field emission device, an electrochromic device, an electroluminescent device, a photodetector, and a biosensor.
21. The electronic device of claim 1, wherein the electronic device is an electroluminescent device.
22. The electronic device of claim 1, wherein the electronic device is a photodetector.
23. The electronic device of claim 1, wherein the electronic device is a biosensor.
24. A method of forming a two-dimensional switching device comprising:
(a) forming a first electrode of the two-terminal switching device on a substrate, wherein the first electrode comprises a layer of a first conductive material, the first conductive material being characterized by a first work functionmagnitude;
(b) forming a layer of broad band semicinductor over at least a portion of the first electrode, wherein the band gap of the broad band semiconductor is at least about 205 eV and the carrier concentration in the broad band semiconductor is less thatn about 1013 cm−3; and
(c) forming a second electrode by forming a layer of a second conductive material having a second work function value, wherein the second conductive material comprises a material having a p+ or p++ type conductivity,
wherein the second wirk function magnitude is greater than the first work functin magnitude.
This application is a Continuation of U.S. patent application Ser. No. 11/801,735, filed May 9, 2007, naming Yu et al. as inventors, which claims benefit of prior U.S. Provisional Application No. 60/857,750 filed Nov. 7, 2006, titled �Metal-insulator-metal (MIM) devices and their methods of fabrication� naming Gong et al. as inventors, which are herein incorporated by reference for all purposes. This application is related to the following US patent applications, each of which is incorporated herein by reference in its entirety and for all purposes: (1) U.S. Provisional Application No. 60/440,709 filed Jan. 17, 2003; (2) U.S. patent application Ser. No. 10/759,807 filed Jan. 16, 2004, published Sep. 16, 2004 with a U.S. Patent Application Publication No. 2004/0179146 titled �Display Employing Organic Material� naming Boo Jorgen Lars Nilsson as an inventor, which claims benefit of prior U.S. Provisional Application No. 60/440,709 filed Jan. 17, 2003, and to (3) U.S. patent application Ser. No. 11/298,098 filed Dec. 8, 2005, published May 4, 2006 with a U.S. Patent Application Publication No. 2006/0092343, which is a divisional of U.S. patent application Ser. No. 10/759,807.
The invention relates to two-terminal switching devices, such as thin film diodes, and methods of their fabrication.
Active matrix displays employ a switch at each picture element in a matrix display so that the voltage across each pixel can be controlled independently. Active matrices are especially suitable for high information content Liquid Crystal Displays (LCDs) such as LCDs used in multi-media players, cell phones, monitors and television screens.
Other types of displays that typically require a switching device at each picture element include Electrophoretic Displays (EPDs) and Rotating Element Displays. Electrophoretic displays, including displays available from companies such as E-Ink and Sipix, produce an image relying on translational movement of charged colored particles suspended in a liquid of a different color. Rotating element displays use rotational movement of optically and electrically anisotropic elements, such as bichromal spheres having a non-uniform charge distribution. Pixel performance of electrophoretic and rotating element displays can be controlled with a switching device that provides on- and off- voltages to each of the picture elements in the display matrix.
Two-terminal switching devices, such as thin film diodes, compare favorably to TFTs, in many aspects. First, fabrication of TFDs consumes fewer resources than TFT fabrication. The channel between the source and the drain in a TFT requires rigorous alignment with the gate electrode underneath or above in order to achieve the necessary performance. Hence, expensive precise patterning is essential in TFT fabrication. In contrast, TFD architecture does not impose such strict requirements on the patterning process. Since the diode current is determined by the overlaid area of the two contact electrodes, and this area is insensitive to shifts in the position of contact stripes, the TFD fabrication process typically requires less precision patterning.
The broad band semiconductor layer preferably contains a semiconductor material having a band gap of at least about 2.5 eV, more preferably at least about 3 eV. Some materials that are sometimes viewed as insulators, such as titanium oxide, tantalum oxide, may be employed as broad band semiconductors, and are within the scope of the described embodiments. In some embodiments, an n-type semiconductor is used. As mentioned, the semiconductor may have a substantial ionic bonding component (as opposed to covalent or molecular bonding). In certain embodiments, the semiconductor material has a carrier concentration of less than about 1018 cm−3, e.g., less than about 1017 cm−3. Examples of suitable semiconductors include metal oxides, metal sulfides, other metal chalcogenides (e.g., metal selenides and metal tellurides), and inorganic ceramic nanocomposites. Examples of suitable materials for use in the semiconductor layer include MgxOy, CaxOy, SrxOy, BaxOy, TixOy, TaxOy, AlxOy, InxOy, NbxOy, HfxOy, SnxOy, ZnxOy, ZrxOy, CuxOy, YxOy, YxBayOz and SmxSnyOz. In some embodiments, the inorganic semiconductor layer, e.g., a layer containing a metal oxide is formed by transforming a portion of a previously deposited conductive material, e.g., by anodizing the metal. This approach is particularly convenient when the first electrode material is deposited and an upper portion is then converted by chemical or physical transformation to directly create the semiconductor layer. In other embodiments, the semiconductor layer is independently deposited by, e.g., using a sputtering technique, thermal deposition, or chemical bath deposition (CBD). These embodiments may be particularly preferred, for fabricating devices in which the inorganic semiconductor layer contains a metal oxide or chalcogenide of a different metal, than the one used in the cathode.
In another aspect, a method of forming a backplane for a display is provided.
The method includes forming a plurality of pixel control circuits on a substrate, such as a flexible substrate. The circuits are formed such that each pixel control circuit comprises at least one two-terminal switching device being configured to regulate light from a pixel. The method may form the plurality of circuits in an array as for a display back plane. The provided two-terminal switching devices can be formed according to a method as described above.
FIG. 9B presents a 1/C2 vs. voltage plot for Ta/Ta2O5-δ (30 nm) /MoOx device.
FIG. 11 illustrates stability of Ta/Ta2O5−δ/PEDOT:PSS devices. The stability of current in a forward bias is illustrated by curve 1101. The stability of current in a reverse bias is illustrated by curve 1103.
Several embodiments of two-terminal devices having high ratios of on/off current and high breakdown voltage are provided. Further, in some embodiments, the provided devices are formed without making use of high-temperature processing on polymeric substrates having a low melting point, glass transition point or decomposition temperature (e.g., less than 150� C.). Provided devices can be used in, for example, the driving circuits of electrophoretic displays, rotating element displays and liquid crystal displays. Examples of suitable driving circuits are described in, e.g., the commonly owned U.S. patent application Ser. No. 10/759,807 previously incorporated by reference.
The devices described herein operate as switches by allowing current pass in one direction when a first, forward bias, voltage is applied to the device electrode, while allowing very little current pass in the reverse direction when a second, reverse bias, voltage is applied to the electrodes. For example, when forward bias is applied to the electrodes of the switching device, the current flows between the electrodes, and the switch is in the �on� position. When no bias or a reverse bias is applied, the reverse current is minimal, and the switch is in the �off� position. Thus, the device switching ratio is defined as I1(V1)/I2(V2), wherein I1 and I2 are current values measured respectively at an �on� bias V1 and at an �off� bias V2. Significantly, various devices of this invention can operate over large bias ranges. For example, the magnitude of Von−Voff can be at least about 10V, e.g., at least about 15V for a single device. Even higher voltage applications such as plasma displays (approximately 80 volts) and MEM devices (approximately 100 volts) may be suitable for use with switching devices of this invention. In one particular illustration, the Von bias is about 2 V, while the Vff bias is about −15 V. Thus, the magnitude of Von−Voff is about 17 V. The switching ratio in this case is measured as the ratio of currents at 2V and at −15V. Provided devices may achieve switching ratios of at least about 1000, preferably at least about 10,000, even more preferably at least about 105, for the bias ranges described above. Such characteristic makes them particularly suitable for those applications where relatively large driving voltages are needed, e.g., in the backplanes of electrophoretic and rotating element displays, in the driving circuits of MEMS devices, field emission devices, electrochromic devices, electroluminescent devices, photodetectors, biosensors, etc. It is understood, that the provided devices, in some embodiments, may also serve in applications employing smaller ranges of Von and Voff biases, e.g., the magnitude of Von−Voff may be less than 10 V, for example about 5 V in some cases such as in driving twisted-nematic liquid crystal displays.
Similarly, with a large energy barrier Δ2, it is more difficult to achieve current carrier injection from the second electrode into the semiconductor layer, resulting in smaller reverse current. Therefore, in order to achieve high Ion/Ioff ratios, device materials should preferably be selected such that Δ1 is minimized, while Δ2 is maximized. Since these values are tied to work functions of the electrode materials, the difference between the electrode work functions should to some degree be maximized. In some embodiments, the magnitude of WF2−WF1 should be at least about 0.6 eV, preferably larger than 0.8 eV. In some embodiments, the cathode comprises a material having a work function with a magnitude of less than about 4.5 eV, preferably less than about 4.2 eV. In some embodiments, the anode comprises a material having a work function with a magnitude of at least about 4.8, preferably at least about 5 eV, e.g. at least about 5.2 eV.
According to a different embodiment, a cathode can include an n++ doped semiconductor material, while an anode can comprise a p++ doped material. The carrier concentration in the n++ layer is preferably at least about 1018 cm−3. An energy level diagram for such p-i-n device is shown in FIG. 1C. The n++ cathode 113 has a band gap, characterized by a highest energy level in the valence band VB1 and the lowest energy level in the conduction band CB1. The broad-band semiconductor 115 and the p++ anode 117 energy levels are similar to those shown in FIG. 1B. Metal layers 119 and 121 may be optionally present adjacent the cathode 113 and the anode 121 respectively. These layers typically reside opposite the semiconductor layer 115. It is understood, however, that in some embodiments these layers may not be needed. The energetic considerations described above for energy diagrams depicted in FIG. 1A and 1B, equally apply to the device shown in FIG. 1C.
In an alternative embodiment, the higher work function electrode may be formed directly on a substrate, followed by formation of a semiconductor layer, and subsequent formation of a lower work function electrode. In this embodiment, layer 205 residing on a substrate 203, will comprise an anode material, e.g., a high work function organic or inorganic material with a p++ level of doping, while the top electrode 209, will comprise a cathode material, such as a low work function metal or a material having an n++ level of doping. In one embodiment, solution processing or other liquid phase processing can be used for cathode deposition. For example certain indium alloys with melting temperatures of between about 90� C. to 230� C. can be deposited using liquid-phase processing. In another example, a ZnO cathode is deposited using a sol-gel process.
The devices described herein can be fabricated in a variety of sizes. For example, switching diodes having a surface area of about 100 square microns and larger were prepared and were found suitable for active matrix display application. In addition, 10 by 40 μ, 150 by 150 μ and 1000 by 1000 μ devices were tested. The I-V characteristics of provided devices do not significantly change upon scaling, and constant Ion/Ioff ratios were obtained for devices of various sizes. Device area can be further minimized when lateral MIM devices are fabricated as described in the commonly owned U.S. Provisional Application No. 60/857,750 previously incorporated by reference.
In some embodiments, the broad band semiconductor layer comprises an inorganic material. In some examples, the semiconductor layer is entirely inorganic, and does not contain any organic material. In other examples, it may contain organometallic materials, hybrid organic-inorganic materials, metal complexes with organic ligands, etc. The semiconductor layer can be undoped or n-doped. N-type semiconductors are typically used in M/n-type/p++ and n++/n-type/p++ switching devices described herein. Examples of suitable semiconductors include stoichiometric and non-stoichiometric metal oxides, metal nitrides, and metal chalcogenides (e.g., metal sulfides, metal tellurides, and metal selenides), which can be used, e.g., in polycrystalline or amorphous form. For example, oxides, nitrides, or chalcogenides of Mg, Ca, Sr, Ba, Ti, Ta, Al, In, Nb, Hf, Sn, Zn, Zr, Cu, Fe, Ni, Mn, Cr, Au, Ag, Co, and Y metals can be used. The semiconductor layer can also include oxides, nitrides and chalcogenides of lanthanide metals, such as Nd, and Sm. In some embodiments, the inorganic semiconductor material is a metal oxide, selected from the group consisting of MgxOy, CaxOy, SrxOy, BaxOy, TixOy, TaxOy, AlxOy, InxOy, NbxOy, HfxOy, SnxOy, ZnxOy, ZrxOy, CuxOy, YxOy, YxBayOz, and SmxSnyOz. In some embodiments, mixed oxides or inorganic nanocomposites are used in the broad band semiconductor layer. In some embodiments, blends and composites of the oxides, nitrides, and chalcogenides with each other or with other materials may be used. In some embodiments, the semiconductor layer includes doped insulating or semiconducting materials. The dopants may include small amounts of materials with a different number of valence electrons from the number of electrons in the bulk material, such as commonly used in semiconductor industry. Composite oxides, wherein one of the oxides in the composite serves as a dopant may also be used. In some embodiments, the carrier concentration in the semiconductor layer is lower than about 1017 cm−3.
In certain embodiments inorganic material of the semiconductor layer may be blended with organic insulators or semiconductors to form a composite material. In other embodiments, a distinct layer of organic semiconductor material may be optionally added to the three-layer structure of the switch, such as layers described in the U.S. Provisional Application No. 60/857,750, previously incorporated by reference. For example, layers containing poly(3-hexylthiophene) (P3HT), poly(2-methoxy,5-(2′-ethylhexyloxy)-1,4-phenylene vinylene) (MEH-PPV), or organic molecules of carrier transport properties known in organic electronic device field (e.g., materials described in Zhigang Li and Hong Meng ed, �Organic Light-Emitting Materials and Devices�, Taylor and Francis August 2006.) may be included as additional sublayers in the device structure.
In some embodiments, the second electrode contains a doped or undoped organic conductive material, such as conductive polymers and oligomers. Conductive substituted or unsubstituted polythiophenes (PT), such as poly(3,4-ethylenedioxythiophene) (PEDOT), polypyrroles (PPY), polyanilines (PANI), polythienothiophenes (PTT) and co-polymers thereof can be used. A variety of derivatives of these polymers can be employed. In some embodiments blends of neutral conjugated PFs, PPVs and PTs and conducting polythiophenes (doped polythiophenes), polyanilines and polypyrroles can be used in the second electrode. Examples of such blends are described in the U.S. Patent Application Publication No.: 2005/0154119, published Jul. 14, 2005, naming Robeson et al. as inventors, which is herein incorporated by reference in its entirety and for all purposes.
Organic conductive materials often include dopants that increase their conductivity. These dopants may be organic or inorganic. Preferred organic dopants include charged polymers, such as sulphonates and there protonated forms (e.g., PSS, DBSA, NAFION�) Commonly used conductive polymers include PEDOT:PSS and PANI:PSS combinations. PEDOT:PSS and PANI:PSS materials are commercially available from H. C. Starck, GmbH (Leverkusen, Germany). Other suitable dopants include certain metal oxides (e.g., TiO2,), dimethylsulfoxide (DMSO), and carbon black, which are commonly used in, for example, PPY:TiO2, PPY:Carbon black and PEDOT:DMSO combinations. For a given dopant material, the carrier density on the conducting polymer chains can be tailored with liquid additives such as ethanol, or ethylene glycol. Advantageously, the work function of organic molecules can be tailored by modifying the dopant nature and concentration. For example, PEDOT, PANI and PPY based conducting polymers can be tailored using methods similar to those described in U.S. Patent Application Publication No. 2005/0224788, published Oct. 13, 2005, naming Hsu et al. as inventors; U.S. Patent Application Publication No 2005/0227081, published Oct. 13, 2005 naming Hsu et al. as inventors and in WO application publication No. 2005/090434, published Sep. 29, 2005, naming Hsu et al. as inventors, all of which are herein incorporated by reference. The work functions of such films, in some embodiments can be as high as about 5.2-5.8 eV.
In some embodiments, organic polymers, such as PTT, are provided as aqueous dispersions with colloid-forming polymeric acids. For example, aqueous dispersions of poly(thieno[3,4-b]thiophenes) and partially fluorinated ion exchange polymers, can be used for forming the anode conductive layers. Such materials are described in detail in the U.S. Patent Application Publication No. 2006/0076557, published Apr. 13, 2006, naming Waller et al. as inventors, which is herein incorporated by reference in its entirety and for all purposes. In some embodiments, the pH of these compositions can be adjusted as desired, e.g., through blending with neutral polymers such as poly(methyl methacrylate), PMMA, or poly(vinyl alcohol), PVA. In some embodiments, slightly acidic compositions (e.g., with pH ranging from about 3 to about 7) are preferred for surface cleaning of a metal oxide semiconductor layer.
An alternative embodiment for a device fabrication process is illustrated in the process flow diagram of FIG. 3C. In this case, the device comprises an anode residing on a substrate, a top cathode layer, and a layer of broad band semiconducting material residing between the electrodes. The process starts by depositing a layer of conductive material having a p+ or p++ type conductivity to form an anode, as shown in operation 313. Organic or inorganic p-type conductors, described above can be used. As described previously, organic conducting materials can be deposited by liquid processing methods, while inorganic p-type conductors can be deposited by methods, such as PVD, CVD, PECVD, and, in some cases, by liquid processing methods, such as spin coating. The anode material is deposited in a pattern (e.g., by printing), or is patterned after the deposition to define the individual devices. The process follows by forming a layer of broad band semiconductor in an operation 315. For example, a metal oxide semiconductor material can be sputtered over a layer of an inorganic p-type conductor, such as doped copper aluminum sulfide. The semiconductor layer is preferably patterned, and the process is completed by depositing a layer of cathode material in an operation 317. The cathode material is typically a low work function metal or alloy, which can be deposited by, e.g., evaporation or sputtering, and , in some cases by liquid processing methods, e.g., by liquid-phase deposition of low-melting indium alloy cathode, or by a sol-gel deposition of a ZnO cathode. The formed anode will then need to be patterned, in order to form the individual devices.
Integration of switching devices into pixel control circuits has been described in detail in U.S. Published Patent Application No. 2004/0179146, filed Jan. 16, 2004, naming Nilsson as inventor, previously incorporated by reference, and will not be further discussed herein. Examples of pixel electrode designs and corresponding driving scheme were disclosed in U.S. application Ser. No. 11/430,075, filed May 8, 2006 naming H. -C. Lee et al. as inventors and in U.S. application Ser. No. 11/650,148, filed Jan. 5, 2007 naming C. -L. Shieh et al. as inventors which are both herein incorporated by reference for all purposes.
Several examples of device compositions are herein illustrated in a cathode/semiconductor layer/anode format:
3.9/7.9;
4.3/7.4;
4.3/7.3;
4.1/7.6;
A number of two-terminal switching devices have been prepared. Experimental methods used in device fabrication will now be illustrated. Methods used for determining electronic properties of various device materials will also be presented.
Organic p++ Materials Suitable for Anode Fabrication
Carrier concentrations were measured for several p++ materials. One example material for which carrier concentrations were determined was PEDOT:PSS, which was purchased from H. C. Starck Chemical (available as BAYTRON P�). The electronic properties of aqueous colloid suspensions of PEDOT having different levels of PSS doping were determined. PEDOT/PSS ratios ranged from between 1:1 to 1:20. Table 3 lists materials used in this study, conductivity of these materials and their carrier densities. It can be seen that conductivity of these materials ranged from about 10−2 S/cm to about 6�102 S/cm .
1-3 � 1020 In one example, 100 nm thick PEDOT:PSS (product ID: BAYTRON P PH500�) films were spin-cast onto glass substrates coated with indium-tin-oxide. Electrochemical reduction-oxidation experiments were carried out by varying the bias voltage, and then allowing sufficient time for the current to diminish (corresponding to each redox (doping) level). At different reduction and oxidation levels, the tested films were peeled off the carrier glass and transferred to a quartz substrate for optical transmission measurement. For a voltage below −1.5 V bias, the absorption spectra revealed an intrinsic semiconductor with absorption maximum at �2.1 eV and an onset of absorption at 1.7 eV (corresponding to the energy gap in PEDOT). No residual absorption was traceable in the optical gap. The �open-circuit� voltage in fresh PEDOT:PSS was �+0.4 V, which confirmed that the Fermi-energy of the doped PEDOT:PSS was �5.0 eV. The absorption in doped PEDOT:PSS revealed that the density of states above LUMO (�3.5 eV) and below HOMO (�5.0eV) were shifted into p-type polaron states in between the energy gap.
Ta/TaO/PEDOT:PSS Two-terminal Switching Device
Ta metal was sputtered using a DC sputtering apparatus either on a glass or on a plastic substrate at room temperature. The thicknesses of Ta films ranged from about 170 to about 500 nm. Upon deposition, the tantalum film was anodized to convert the top portion of tantalum to tantalum oxide. Anodization was conducted using 0.01 M aqueous citric acid solution as an electrolyte component. A stainless steel plate served as the anode counter electrode. The space between the two plates was 4 cm. The anodization procedure was carried out at 25� C. and comprised the following steps. The anodization was started in a constant current mode, with the current density of about 0.2 mA/cm2. After a voltage of 17.5 V was reached (corresponding to formation of �30 nm film), anodization was switched to a constant-potential regime. Anodization was stopped after current dropped below 10 μA/cm2. The anodized partially fabricated device was cleaned in an ultrasonic bath in acetone for 5 minutes, followed by a 5 minute ultrasonic bath treatment in isopropanol. The device was then heated at about 120� C. for 20 minutes to anneal the formed oxide. Tantalum oxide serves as a broad band semiconductor layer in this device.
After the tantalum oxide has been formed, the anode deposition followed. Then anode electrode was formed by dispensing 3 wt % solution of PEDOT:PSS (H. C. Starck, BAYTRON P PH500�) with a needle nozzle onto the top portion of Ta2O5-δ. The sample was then baked at 80-120� C. for 20-40 minutes. The sizes of the test devices were varied in the range of 10−4-10−1 cm2. The device current was scaleable to the device area and a universal current density was observed. A rectifier type I-V relationship was observed, as shown in FIG. 4, which presents a plot of current density versus voltage for the formed device. The forward current (obtained when applying high voltage to PEDOT electrode) increases exponentially at a voltage of �1 V. The forward current increase rate slows down for J>1 mA/cm2, reaches 10 mA/cm2 at �2.2 V and 100 mA/cm2 at �4V. When reverse bias is applied, current saturation is quickly reached. It can be seen that reverse current having a density of about 0.5-1�10 −3 mA/cm2 is achieved at −15 V bias. The rectification ratio at 4V (defined as forward current divided by the reverse current at a given voltage bias) is �106, which meets the need of driving a liquid-crystal display panel [in pp. 281-287, �Liquid Crystal Displays: Addressing Schemes and Electro-Optical Effects�, by Ernst Lueder, Wiley (2001) which is herein incorporated by reference in its entirety for all purposes]. The current switch ratio R=I(4V)/I(−15V) is typically in the 104-105 range, which meets the requirement to drive a display panel made with a EPD film.
This example demonstrates that a solid state switch device with a switch ratio I(4V)/I(−15V) larger than 104 can be fabricated using low-temperature processing.
Device Reproducibility and Uniformity
The experiment of Example 2 was repeated with an array of devices on a 3″�3″ substrate. The area of each test device was 4�10−cm2. 16 devices in 1.5″�1.0″ area were picked for this test. The I-V profile and the switch ratio were consistent with mean variation of less than about a few percents. The reproducibility of I-V characteristics for a large number of devices confirmed the reliability and uniformity of anodization process over large area.
Energy Barrier Determination Between TaO and PEDOT:PSS
Impedance analysis was carried out with a Ta/TaO/PEDOT:PSS device similar to the device used in Example 2. The capacitance as function of biasing voltage is plotted in the form of 1/C2 vs V in FIG. 5 for a device having a 40 nm thick TaO film (curve 501), 30 nm thick TaO film (curve 503) and 20 nm thick TaO film (curve 505). A built-in potential of �1 eV was extrapolated from the plot based on Schottky diode model (S. M. Sze, in �Physics of Semiconductor Devices�, 2nd Edition, p. 249, John Wiley and Sons, 1981). The obtained value is close to the energy difference between Ec of TaO (�3.9 eV) and the work function of the PEDOT film (5.0 eV, see example 1). This barrier is in fact consistent with the onset of exponential current turn-on observed in forward bias (as seen in FIG. 4).
Self-surface Cleaning Effected with Doped Conducting Polymer
Surface traps present a prominent problem in inorganic semiconductors. When a metal layer is connected to a metal-oxide, the I-V characteristic is frequently determined by the trap energy level rather than the work function of the contact metal. This effect is called �Fermi-energy pinning to defect energy� in device field. Surface defects and their influence on I-V characteristics in two-terminal devices were observed in TaO/metal interface. FIG. 6 compares the I-V characteristic of a Ta/TaO(30 nm)/Au(100 nm) device (curve 603) with the IV characteristic of Ta/TaO(30 nm)/PEDOT:PSS (BAYTRON P PH500�) device (curve 601). The fabrication process for the Ta/TaO(30 nm)/PEDOT:PSS device was as described in Example 2. The fabrication process for the Ta/TaO(30 nm)/Au(100 nm) device differs from the process described in the Example 2 only at the point of anode fabrication. For the device with the gold anode, the gold was thermally deposited after TaO was formed by anodization. Gold was deposited in an evaporator under a base pressure of <2�10−6 torr.
Ti/TiOx/PEDOT:PSS Two-terminal Switching Device
A similar device to the device of Example 2 was fabricated using titanium as the cathode layer. A 300 nm thick titanium film was formed by DC sputtering similarly to the method used in Example 2. Similar anodization process to the one described in Example 2 was used (using same anodization agent, same current and the same rate) to form a layer of TiOx. PEDOT:PSS was deposited on the TiOx layer using an analogous process to the process described in Example 2. The work function of Ti is about 4.2 eV, and is very closely matched with Ec of TiOx (about 4.2 eV). Therefore, a good ohmic contact is formed at Ti/TiOx interface.
FIG. 7 shows the I-V characteristics for two devices having a 30 nm TiOx layer (curve 701) and 60 nm TiOx layer (curve 703). In a device having a 30 nm thick TiOx layer, the exponential current turn-on dominates 10−6-1 mA/cm2 current density range, over six orders of magnitude. Fitting with Schottky diode model, a perfect factor n�2 was obtained. The current reaches 1 mA/cm2 at 1 V, and 100 mA/cm2 at �3V. The rectification ratio at 3V was �2�105. The switch ratio I(+4V)/I(−15V) was �2�103. In the device having 60 nm thick TiOx layer, the forward voltage corresponding to current of 10 mA/cm2 was �2.5V. The switch ratio at I(4V)/I(−15V) was at 2�103 level.
Devices with Printed PANI Anode
Ta/TaO portion of the device was prepared as described in the Example 2. Two different conducting polyaniline inks were then evaluated as anode materials. One ink was a conducting polymer PANI:DBSA in xylene solution. The conductivity of PANI:DBSA in cast film was measured to be about 100 S/cm. Another conductive ink was a water dispersion of PANI:Phosphonate with bulk conductivity of about 5�10 S/cm in printed films. The anode electrodes were formed with an inkjet machine (Microfab Jetlab 4) with a 35 pl nozzle. The printed line width was in the range of about 80-120 μm. The device size was defined by the widths of the cathode and anode lines arranged in orthogonal directions, and was about 3�10−4 cm2. In this experiment, the TaO thickness was 40 nm, which was achieved by anodization in 0.1 M citric acid at room temperature.
The current switching characteristics are shown in FIG. 8. Curve 801 presents the I-V plot for the device having a PANI:Phosphonate anode. Curve 803 presents the I-V plot for the device having a PANI:DBSA anode. Very similar I-V characteristics were obtained for these devices. The forward current reached 10 mA/cm2 at a voltage of 3-3.5 V. The reverse current saturated at �10−4 mA/cm2 at −15V. For PANI:Phosphonate, the rectification ratio at 4V was �8�104. The current switch ratio at I(+4V)/I(−15V) was �4�104. The performance was as good as the performance of the device having the PEDOT:PSS anode (see Example 2).
Two-terminal Switching Device with an Inorganic P-type Anode (Ta/TaO/MoO)
Ta/TaO(30 nm) partially fabricated device was prepared according to the process shown in Example 2. After anodization, the sample was placed in an evaporator and 150 nm thick layer of MoO was deposited thermally onto the TaO top surface. No other surface treatment was performed on TaO. The thermally deposited MoO is a p-type semiconductor with the top of valence band at �5.3 eV.
FIG. 9( a) shows the I-V characteristic of this device. Forward bias is defined as the higher potential applied to MoO electrode. In this test, no other contact layer was placed on top of the MoO. The test probe was placed approximately 1 mm away from the diode area. The rectification ratio at 4V was 2�104 and the current switch ratio I(4V)/I(−15V) was �1.3�103.
Two-terminal Switching Device with a Printed Inorganic P-type Anode (Ta/TaO/MoO)
Example 8 was repeated with the top MoO anode being deposited from a soluble organometallic precursor. Molibdenum (V) isopropoxide (Mo(OC(CH3)2)5 (available from Alfa Aesar, Ward Hill, Mass.) was used as a precursor in the form of a solution (5% wt.). The anode film was deposited using a solution dispensor applying the solution to the targeted dimension. After the precursor was applied, the substrate was kept at 200� C. for 10 minutes to form the MoO. The resulting MoO was less conductive than the MoO formed by thermal deposition in Example 8. A gold top electrode was thus used to connect the top of MoO to the probing area. The I-V characteristics for this device are shown in FIG. 10. The profile was quite similar to that shown in FIG. 9( a). The rectification ratio at 5V was �5�104. The current switch ratio I(4V)/I(−15V) was �103.
Stability of Two-terminal Switching Devices Having a PEDOT:PSS Anode
Measurements of shelf-stability of two-terminal switching devices were conducted. FIG. 11 shows shelf-stability plot for a device with a structure of Ta/Ta2O5-δ/PEDOT:PSS in a non-encapsulated form. Current at a forward bias of 4V is shown by curve 1101. Current at a reverse bias of −5 V is shown by curve 1103. It is shown clearly that both forward and reverse currents only drop 10% after 180 days. However, the switch ratio (I(4V)/I(−5V)) remains without noticeable change after testing for 4320 hours.
Two-terminal Switching Devices Configured to Drive a Display
Ta/Ta2O5-δ/PEDOT devices were used to construct pixel drivers for a display. The display comprised 24 columns and 24 rows. The pitch size of each display element was 2 mm�2 mm (12.5 dot-per-inch format). Electrophoretic display (EPD) film purchased from Sipix Image Inc., Fremont, Calif. was used for display elements. The reflectivity of such EPD films can be changed by application of a certain level of external voltage to its front and back electrode. The reflectivity, when changed, can hold after the external bias is withdrawn. By applying a forward 15 V bias for 0.5-1.5 seconds, the EPD film turns to white color with a reflection of �30%. Under bias of −15 V applied for �1-4 seconds, the EPD films turns to deep green color with light reflection of less than 3%. At voltage bias of less than 2 V bias, the EPD film retains the color previous recorded. Asymmetric switching devices described herein were used to drive the EPD front plane. The circuit for driving each EPD pixel comprised a selection line, a data line, a switch diode and a resistor in serial to form a voltage divider. The pixel electrode and the corresponding driving scheme were disclosed in U.S. application Ser. No. 11/430,075 by H. -C. Lee et al. previously incorporated by reference. The EPD pixel was connected to the anode of the switch diode and to one side of the resistor. The switch device structural parameters, process conditions and performance parameters were similar to those disclosed in the Example 2. The thicknesses of Ta and Ta2O5-δ were 300 nm and 30 nm respectively. The anode was printed with a solution dispenser (Asymtek 402), and the ink was PEDOT:PSS purchased from Bayer, product code 4083 and was re-formulated to proper viscosity for the printing tool. After the active-matrix backplane (the plane comprising a matrix of the pixel drivers in the same format of 24�24 matrix) was made with the top most layer in the form of 24�24 pixel electrode to contact the EPD front panel, the EPD film was laminated with the free-surface side in contact with the pixel electrodes on the backplane, and with proper pressure (�2 lb/cm2) at 80-100� C. Such diode based Active matrix EPD display can be operated at a voltage range of 10-18 V. Commercial CMOS drivers can be used as peripheral row drivers and column drivers outside the display area.
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No. 12/009,386 mailed Jul. 8, 2008.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS20130119396 *May 9, 2012May 16, 2013Cbrite Inc.Two-terminal switching devices and their methods of fabrication* Cited by examinerClassifications U.S. Classification257/412, 257/5, 257/76, 257/43, 257/49, 257/104, 257/E47.001International ClassificationH01L47/00, H01L21/00, H01L29/04Cooperative ClassificationH01L29/417, H01L29/861, H01L29/786, H01L45/00, H01L51/0579, H01L51/0587, H01L29/22, H01L51/0035, G02F1/167, G02F1/1365European ClassificationH01L29/861, H01L29/417, H01L29/22RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services