Source: https://patents.google.com/patent/US9774884B2/en
Timestamp: 2019-08-19 01:57:33
Document Index: 283240165

Matched Legal Cases: ['art 2', 'art 2', 'art 2', 'art 2', 'art 2', 'art 2', 'application No. 03100485', 'application No. 08151870', 'application No. 08151870', 'application No. 10185001', 'application No. 10', 'application No. 03100485', 'application No. 03100485', 'application No. 03100485', 'application No. 03100485', 'application No. 03100485', '§ 311', '§ 1']

US9774884B2 - System and method for using pattern vectors for video and image coding and decoding - Google Patents
System and method for using pattern vectors for video and image coding and decoding Download PDF
US9774884B2
US9774884B2 US14/708,691 US201514708691A US9774884B2 US 9774884 B2 US9774884 B2 US 9774884B2 US 201514708691 A US201514708691 A US 201514708691A US 9774884 B2 US9774884 B2 US 9774884B2
US14/708,691
US20150245067A1 (en
Paul Glor Howard
2002-02-28 Priority to US10/086,102 priority Critical patent/US7206448B2/en
2007-03-12 Priority to US11/684,841 priority patent/US7454071B2/en
2008-04-18 First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=27733406&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=US9774884(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
2008-10-16 Priority to US12/252,767 priority patent/US8472729B2/en
2013-06-24 Priority to US13/925,272 priority patent/US8755616B2/en
2014-05-27 Priority to US14/288,280 priority patent/US9049421B2/en
2015-05-11 Assigned to AT&T CORP. reassignment AT&T CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HOWARD, PAUL GLOR
2015-05-11 Priority to US14/708,691 priority patent/US9774884B2/en
2015-08-27 Publication of US20150245067A1 publication Critical patent/US20150245067A1/en
2016-12-15 Assigned to AT&T PROPERTIES, LLC reassignment AT&T PROPERTIES, LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: AT&T CORP.
2016-12-15 Assigned to AT&T INTELLECTUAL PROPERTY II, L.P. reassignment AT&T INTELLECTUAL PROPERTY II, L.P. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: AT&T PROPERTIES, LLC
2017-09-26 Publication of US9774884B2 publication Critical patent/US9774884B2/en
This application is a continuation of U.S. patent application Ser. No. 14/288,280, filed May 27, 2014, (now U.S. Pat. No. 9,049,421), which is a continuation of Ser. No. 13/925,272, filed Jun. 24, 2013, now U.S. Pat. No. 8,755,616, which is a continuation of U.S. patent application Ser. No. 12/252,767, filed Oct. 16, 2008, now U.S. Pat. No. 8,472,729, which is a continuation of U.S. patent application Ser. No. 11/684,841, filed Mar. 12, 2007, now U.S. Pat. No. 7,454,071, which is a continuation of U.S. patent Ser. No. 10/086,102, filed Feb. 28, 2002, now U.S. Pat. No. 7,206,448, all of the above cited applications are incorporated herein by reference in their entirety.
Another embodiment of the invention relates to a method of decoding a bitstream coded according to the above-mentioned method. This embodiment comprises a method of decoding coded data comprising: decoding a bit vector coded as an integer using an arithmetic decoder wherein the values of the transform coefficients are decoded in any fixed order, deconstructing the bit vector to determine which coefficients are non-zero, dequantizing the non-zero transform coefficients, and converting the dequantized transform coefficients into block image data.
A bit vector 706 has the same number of bits as the number of coefficients in the transform coefficient list, and there is a one-to-one correspondence between coefficients in the coefficient list and bits in the single entity or bit vector. The bit vector thus represents a significance map for the one-dimensional list 704 of transform coefficients. Setting each bit in the bit vector where the corresponding coefficient in the coefficient list is zero fills the bit vector. The bit vector is then reinterpreted as an integer 708. An arithmetic coder 710 encodes the integer 708, with the context being identified as the “bit vector” context 712. The arithmetic coder outputs bits to a bitstream 714. The arithmetic coder 710 is as described above and illustrated in FIG. 5.
The computer device codes the values of the nonzero coefficients in any fixed order, using any coder. The coder may be an adaptive, semi-adaptive or non-adaptive arithmetic coder, or it may be any other coder. Most arithmetic coders consist of both a probability estimation part and an entropy coding part. The probability distribution estimates for all events may be fixed ahead of time for all users of the coder; an arithmetic coder with this property is called “non-adaptive.” The probability distribution estimates for all events may be computed before a use of the coder, and transmitted to the decoder before coding commences; this distribution is then used for the entire use of the coder. An arithmetic coder with this property is called “semi-adaptive.” The probability distribution estimates that the coder uses may change for some or all events during the use of the coder in such a way that the decoder can make the same changes to the probability distribution estimates. An arithmetic coder with this property is called “adaptive.” In an adaptive arithmetic coder, it is possible to initialize one or more of the probability distribution estimates to some predetermined values. This often leads to faster adaptation. A typical use of an adaptive arithmetic coder is to always initialize all probability distributions to values that are typical for the type of data being coded, then during a given use of the coder to adapt the appropriate distributions after each event is coded. If the coefficients are coded using an arithmetic coder, each coefficient is coded according to its own context, possibly based on which coefficient it is and possibly based on other factors. All coefficients are coded except the zero coefficients indicated by the bit vector described above. FIG. 8 illustrates the coding of nonzero coefficients. The nonzero coefficients from a list of transform coefficients 802 are coded using any coder 804. The coder outputs bits to the bitstream 806.
Other embodiments of the invention include a computer device for practicing the method, a computer-readable medium for instructing a computer device to practice the method of the invention, a bitstream created according to a method of the present invention, and a decoder and decoder process for decoding a bitstream generated according to an embodiment of the present invention. FIG. 9 illustrates an example method for decoding a bitstream. The bitstream in this example was generated according to the embodiments of the invention described herein for generating a bitstream. The decoding method comprises decoding a single entity, such as the bit vector, wherein the values of transform coefficients are decoded in any fixed order (902), deconstructing the single entity to determine which coefficients are non-zero (904), dequantizing the non-zero transform coefficients (906), and converting the dequantized transform coefficients into block image data (908).
Although the above description contains specific details, they should not be construed as limiting the claims in any way. Other configurations of the described embodiments of the invention are part of the scope of this invention. For example, the principles of the present invention may be applied to allow coding of any related data, not just image data. There are many uses of arithmetic coding beyond image and video coding to which the fundamental principles of the present invention do apply. Accordingly, only the appended claims and their legal equivalents should define the invention, rather than any specific examples given.
1. A non-transitory computer-readable storage medium storing a plurality of instructions which, when executed by a processor, cause the processor to perform operations, the operations comprising:
receiving a bit vector that represents a mapping of an entire block of transform coefficients into a one-dimensioned list of transform coefficients in a fixed order, wherein the entire block of transform coefficients represents a block of image data;
decoding the bit vector to identify which transform coefficients in the entire block are non-zero; and
converting the transform coefficients into the block of image data.
2. The non-transitory computer-readable storage medium of claim 1, wherein the decoding the bit vector is based at least in part on a context of the bit vector.
3. The non-transitory computer-readable storage medium of claim 1, the operations further comprising:
decoding the non-zero transform coefficient that is identified.
presenting an image based at least in part on the block of image data.
5. The non-transitory computer-readable storage medium of claim 1, wherein the decoding the bit vector is accomplished using one of: an adaptive arithmetic decoder and a non-adaptive arithmetic decoder.
6. The non-transitory computer-readable storage medium of claim 1, wherein the bit vector comprises a single entity.
a non-transitory computer-readable storage medium storing a plurality of instructions which, when executed by the processor, cause the processor to perform operations, the operations comprising:
8. The apparatus of claim 7, wherein the decoding the bit vector is based at least in part on a context of the bit vector.
11. The apparatus of claim 7, wherein the decoding the bit vector is accomplished using one of: an adaptive arithmetic decoder and a non-adaptive arithmetic decoder.
12. The apparatus of claim 7, wherein the bit vector comprises a single entity.
13. A non-transitory computer-readable storage medium storing a plurality of instructions which, when executed by a processor, cause the processor to perform operations, the operations comprising:
decoding the bit vector to identify which transform coefficients in the entire block are non-zero;
dequantizing the identified non-zero transform coefficients; and
converting the dequantized transform coefficients into the block of image data.
14. The non-transitory computer-readable storage medium of claim 13, wherein the decoding the bit vector is based at least in part on a context of the bit vector.
decoding the identified non-zero transform coefficients.
17. The non-transitory computer-readable storage medium of claim 13, wherein the decoding the bit vector is accomplished using one of: an adaptive arithmetic decoder and a non-adaptive arithmetic decoder.
18. The non-transitory computer-readable storage medium of claim 13, wherein the bit vector comprises a single entity.
20. The apparatus of claim 19, wherein the decoding the bit vector is based at least in part on a context of the bit vector.
21. The apparatus of claim 19, the operations further comprising:
22. The apparatus of claim 19, the operations further comprising:
23. The apparatus of claim 19, wherein the decoding the bit vector is accomplished using one of: an adaptive arithmetic decoder and a non-adaptive arithmetic decoder.
24. The apparatus of claim 19, wherein the bit vector comprises a single entity.
25. A non-transitory computer-readable storage medium storing a plurality of instructions which, when executed by a processor, cause the processor to perform operations, the operations comprising:
decoding the bit vector for determining which transform coefficients in the entire block are non-zero;
dequantizing the non-zero transform coefficients after determining which transform coefficients in the entire block are non-zero; and
26. The non-transitory computer-readable storage medium of claim 25, wherein the decoding the bit vector is based at least in part on a context of the bit vector.
27. The non-transitory computer-readable storage medium of claim 25, the operations further comprising:
decoding the non-zero transform coefficients that are identified.
28. The non-transitory computer-readable storage medium of claim 25, the operations further comprising:
29. The non-transitory computer-readable storage medium of claim 25, wherein the decoding the bit vector is accomplished using one of: an adaptive arithmetic decoder and a non-adaptive arithmetic decoder.
30. The non-transitory computer-readable storage medium of claim 25, wherein the bit vector comprises a single entity.
32. The apparatus of claim 31, wherein the decoding the bit vector is based at least in part on a context of the bit vector.
35. The apparatus of claim 31, wherein the decoding the bit vector is accomplished using one of: an adaptive arithmetic decoder and a non-adaptive arithmetic decoder.
36. The apparatus of claim 31, wherein the bit vector comprises a single entity.
US14/708,691 2002-02-28 2015-05-11 System and method for using pattern vectors for video and image coding and decoding Active 2022-05-05 US9774884B2 (en)
US10/086,102 US7206448B2 (en) 2002-02-28 2002-02-28 System and method for using pattern vectors for video and image coding and decoding
US11/684,841 US7454071B2 (en) 2002-02-28 2007-03-12 System and method for using pattern vectors for video and image coding and decoding
US12/252,767 US8472729B2 (en) 2002-02-28 2008-10-16 System and method for using pattern vectors for video and image coding and decoding
US13/925,272 US8755616B2 (en) 2002-02-28 2013-06-24 System and method for using pattern vectors for video and image coding and decoding
US14/288,280 US9049421B2 (en) 2002-02-28 2014-05-27 System and method for using pattern vectors for video and image coding and decoding
US14/708,691 US9774884B2 (en) 2002-02-28 2015-05-11 System and method for using pattern vectors for video and image coding and decoding
US15/668,539 US10045034B2 (en) 2002-02-28 2017-08-03 System and method for using pattern vectors for video and image coding and decoding
US16/054,284 US20180343456A1 (en) 2002-02-28 2018-08-03 System and method for using pattern vectors for video and image coding and decoding
US14/288,280 Continuation US9049421B2 (en) 2002-02-28 2014-05-27 System and method for using pattern vectors for video and image coding and decoding
US15/668,539 Continuation US10045034B2 (en) 2002-02-28 2017-08-03 System and method for using pattern vectors for video and image coding and decoding
US20150245067A1 US20150245067A1 (en) 2015-08-27
US9774884B2 true US9774884B2 (en) 2017-09-26
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US11/684,841 Active US7454071B2 (en) 2002-02-28 2007-03-12 System and method for using pattern vectors for video and image coding and decoding
US12/252,767 Active 2025-07-08 US8472729B2 (en) 2002-02-28 2008-10-16 System and method for using pattern vectors for video and image coding and decoding
US13/925,272 Active US8755616B2 (en) 2002-02-28 2013-06-24 System and method for using pattern vectors for video and image coding and decoding
US14/288,280 Active US9049421B2 (en) 2002-02-28 2014-05-27 System and method for using pattern vectors for video and image coding and decoding
US14/708,691 Active 2022-05-05 US9774884B2 (en) 2002-02-28 2015-05-11 System and method for using pattern vectors for video and image coding and decoding
US15/668,539 Active US10045034B2 (en) 2002-02-28 2017-08-03 System and method for using pattern vectors for video and image coding and decoding
US16/054,284 Abandoned US20180343456A1 (en) 2002-02-28 2018-08-03 System and method for using pattern vectors for video and image coding and decoding
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EP (5) EP1916847A1 (en)
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2002-02-28 US US10/086,102 patent/US7206448B2/en active Active
2003-02-21 CA CA002419521A patent/CA2419521C/en active Active
2003-02-27 EP EP08151870A patent/EP1916847A1/en not_active Ceased
2003-02-27 EP EP15182982.7A patent/EP3021492A1/en not_active Ceased
2003-02-27 EP EP03100485A patent/EP1341385A1/en not_active Ceased
2003-02-27 EP EP10185001A patent/EP2306731A1/en not_active Ceased
2003-02-27 EP EP10185005A patent/EP2299719A1/en not_active Ceased
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2008-10-16 US US12/252,767 patent/US8472729B2/en active Active
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2014-05-27 US US14/288,280 patent/US9049421B2/en active Active
2015-05-11 US US14/708,691 patent/US9774884B2/en active Active
2017-08-03 US US15/668,539 patent/US10045034B2/en active Active
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