Source: https://patents.google.com/patent/US20020109074A1/en
Timestamp: 2018-08-16 05:33:49
Document Index: 486502813

Matched Legal Cases: ['art; 5206', 'art; 5207', 'art 5206', 'art; 1202', 'art 1201', 'art 1208', 'art 1010', 'art 1780', 'art 1201', 'art 1208']

US20020109074A1 - Semiconductor device, optoelectronic board, and production methods therefor - Google Patents
Semiconductor device, optoelectronic board, and production methods therefor Download PDF
US20020109074A1
US20020109074A1 US10025928 US2592801A US2002109074A1 US 20020109074 A1 US20020109074 A1 US 20020109074A1 US 10025928 US10025928 US 10025928 US 2592801 A US2592801 A US 2592801A US 2002109074 A1 US2002109074 A1 US 2002109074A1
US10025928
US6897430B2 (en )
The present invention relates to a semiconductor device in which an optical transmission medium and a light-receiving element carrying out photoelectric conversion are mixed and mounted, and more particularly, to an optoelectronic device comprising a two-dimensional optical waveguide as an optical transmission medium. The present invention further relates to an optoelectronic wiring substrate comprising an electric wiring layer and an optical transmission layer. Furthermore, the present invention relates to a spherical device. [0002]
For cellular phones and personal digital assistants (PDA) which are spreading at a remarkable pace in recent years, there are demands that these devices be smaller, lighter and provided with transistors capable of extremely high-speed processing. [0004]
It has been pointed out that as the processing speed of transistors increases, or as the clock frequency of the CPU increases, the influence of transmission delay in the electronic circuit substrate also increases. Since the transmission delay is proportional to a product of a wiring resistance by a wiring capacitance, it is necessary to reduce the wiring resistance or the wiring capacitance. The simplest way to prevent the transmission delay is to minimize a wiring distance within each chip or between chips. [0005]
On the other hand, the processing speed is expected to improve as the wiring distance becomes shorter, but another problem becomes apparent. That is the problem of EMI (ElectroMagnetic Interference). Since electronic parts are placed closer to each other, a wiring distance becomes shorter but a wiring density becomes higher. As a result, when high-speed signals flow through adjacent signal lines, mutual electromagnetic induction causes electromagnetic waves to interfere with each other and generate noise, making it impossible to transmit signals correctly. [0006]
There are an increasing number of cases where in particular mobile terminals are driven with a larger current than conventional ones under the influence of proceeding devices operation at a lower voltage, thereby raising concern that influences of EMI becomes larger. [0007]
A method of using an optical wiring having an inherent advantage of causing no electromagnetic induction is proposed to solve the EMI problem. [0008]
For example, Japanese Patent Application Laid-Open No. 2000-235127 discloses a circuit substrate integrating an electronic element and an optical element as shown in FIG. 35. In FIG. 35, reference numeral [0009] 5201 denotes an electronic integrated circuit substrate; 5204, a light emitting part; 5206, a light receiving part; 5207, an optical path change section; 5210, a contact electrode. Reference numeral 5211 denotes polyimide to bond the circuit substrate 5201 and the light emitting part or light receiving part. Reference numeral 5212 denotes an electric wiring; 5213, plane light emitting laser; 5214, a photodiode; 5215, a low reflection film; 5216, a polymer layer; 5217, a first clad layer; 5218, a core layer; 5219, a second clad layer; 5220, a high reflection film.
The light emitted from the light emitting part [0010] 5213 is reflected by the optical path change section, propagates through the core layer 5218 in the direction indicated by an arrow 5221 in FIG. 35, the light path is changed again and the light is received by the light receiving part 5206. When the propagation direction of the incident light is predetermined, it is possible to replace a part of the electric signal wiring in the configuration shown in the above-described FIG. 35 with an optical wiring.
However, when the incident light that propagates through the core layer [0011] 5218 is the light from the direction 5222 indicated by the arrow in FIG. 35, it is impossible for the configuration shown in FIG. 35 to receive the light.
Therefore, it is an object of the present invention to provide a semiconductor device with reduced direction dependency when light propagating through the optical transmission region is received. It is another object of the present invention to provide a light emitting device or light receiving device capable of contributing to reduction of direction dependency (directivity). [0012]
The optoelectronic device according to the present invention is an optoelectronic device comprising an optical transmission region and a light receiving part that converts the light propagating through the light receiving part to an electric signal, wherein the optical transmission region includes a two-dimensional optical waveguide layer, and wherein at least a portion of the light receiving part is embedded in the optical transmission region. [0013]
The present invention can reduce direction dependency of light receiving sensitivity when the light propagating through the optical transmission region is received. [0014]
The present invention also allows the electric wiring layer to be stacked on the optical transmission layer region. The electric wiring layer can also be stacked on the entire surface of the optical transmission region. Of course, a semiconductor chip including electric wiring can also be stacked. In that case, the above-described light receiving part is interposed between the semiconductor chip and optical transmission region. In the case where the light receiving part has a pn junction region in pn strcture or a pi or in junction region in pin strcture, at least a part of the junction region is preferably embedded in the optical transmission region. Of course, substantially all of the junction region may be embedded in the optical transmission region. [0015]
The above-described light receiving part may also be embedded in the above-described optical transmission region so that the light propagating through the two-dimensional optical waveguide layer can be received directly. [0016]
The above-described light receiving part may also be embedded so that the light propagating through the two-dimensional optical waveguide layer can be substantially received without directivity. [0017]
It is preferred that the portion of the above-described receiving part embedded in the above-described optical transmission region have a spherical surface. [0018]
The above-described light receiving part may also include a spherical device. A portion of the light emitting part for transmitting light to the above-described optical transmission region may also be embedded in the above-described optical transmission region. [0019]
It is also preferred that the above-described optical transmission region is interposed between the electric wiring layer located on the above-described optical transmission region and another electric wiring layer located under the above-described optical transmission region, and at least portions of both electric wiring layers be electrically connected through a via hole that penetrates the above-described optical transmission region. [0020]
It is also possible to perform at least one of O/E conversion and E/O conversion between the electronic device provided on the above-described electric wiring layer and the above-described optical transmission region by using the spherical device. [0021]
Furthermore, the optoelectronic board according to the present invention is a substrate in which an electronic device and an optical device are arranged, comprising at least two layers consisting of the first layer and the second layer, wherein the above-described electronic device, the above-described optical device and an electric wiring that couples these two devices formed in the first layer of the substrate, and a two-dimensional optical waveguide is formed in the second layer of the substrate, wherein the above-described optical device includes a light receiving part that receives optical waveguided through the above-described two-dimensional optical waveguide, and wherein at least a portion of the above-described light receiving part is embedded in the above-described two-dimensional optical waveguide. [0022]
The above-described two-dimensional optical waveguide can also have a sheet form. The above-described light receiving part may have a spherical structure, be mounted from the surface of the above-described substrate so that the light receiving part is embedded in the above-described optical waveguide and coupled with the above-described electric wiring on the surface of the above-described substrate. [0023]
The above-described optical device may also include a light receiving part and an electric circuit that drives the optical device or amplifies an electric signal obtained. [0024]
The light source of the above-described optical device may have a spherical shape, be mounted from the surface of the above-described substrate so that the light source is embedded in the above-described optical waveguide of the above-described substrate and coupled with the above-described electric wiring on the surface of the above-described substrate. [0025]
The above-described substrate may also include a spherical-structured transmission device for transmission and a parallel signal line, the output terminal of the parallel signal line may be coupled with the above-described spherical transmission device, and parallel/serial conversion may be conducted by the above-described transmission device and a serial optical signal can be sent to the above-described two-dimensional optical waveguide. [0026]
The optoelectronic board according to the present invention can also be characterized in that the above-described serial optical signal is received by the above-described light receiving part embedded in the above-described optical waveguide, converted to an electric signal, serial/parallel-converted by an electronic circuit simultaneously formed on the light receiving part and transmitted to the above-described parallel signal line. [0027]
The above-described optoelectronic board may also be constructed with a flexible substrate material (flexible sheet). [0028]
The optoelectronic integrated circuit according to the present invention is an optoelectronic integrated circuit which integrates an electronic device and an optical device on the surface of a spherical semiconductor substrate, characterized in that the above-described optical device is a light receiving element including a multi-layered film containing a pn junction in the radial direction of the spherical semiconductor substrate, and the above-described electronic device has at least a bias circuit that applies a reverse bias to the above-described light receiving element and an amplifier that amplifies light received and converted to an electric signal. [0029]
The optoelectronic integrated circuit according to the present invention integrates an electronic device and an optical device on the surface of a spherical semiconductor substrate and is characterized in that the above-described optical device is a light receiving element including a multi-layered film containing a pn junction in the radial direction of the spherical semiconductor substrate, and the above-described electronic device includes a bias circuit that applies a forward bias to the above-described light emitting element. [0030]
The optoelectronic integrated circuit according to the present invention integrates an electronic device and an optical device on the surface of a spherical semiconductor substrate and is characterized in that the above-described optical device is formed by flatting a portion of the surface of the above-described spherical semiconductor, exposing a plurality of small planes and then stacking a multi-layered film containing a pn junction in the radial direction of the spherical semiconductor substrate on the above-described small planes, and the above-described electronic device has at least a bias circuit that applies a reverse bias or a forward bias thereto. [0031]
In the steps of flattening a portion of the surface of the above-described spherical semiconductor substrate, exposing a plurality of small planes and stacking a multi-layered film containing a pn junction in the radial direction of the spherical semiconductor substrate on the above-described small planes, it is also possible to cover a region other than small planes of the surface of the spherical semiconductor substrate with a dielectric film, etc. and selectively stack the multi-layer film containing the pn junction only on the small planes by organic metal epitaxial growth or gas source molecular beam vapor deposition. [0032]
The small planes that constitute the flattened portion of the above-described spherical semiconductor surface may also consist of crystalline planes, which are equivalent to one another in terms of crystal engineerings or chemically similar to one another.[0033]
FIG. 1 is a schematic perspective view illustrating an embodiment of the present invention; [0034]
FIG. 2 is a schematic sectional view illustrating an embodiment of the present invention; [0035]
FIG. 3 is a perspective view illustrating the present invention; [0036]
FIG. 4 is a schematic sectional view illustrating the present invention; [0037]
FIG. 5 is a schematic sectional view illustrating a spherical optical device; [0038]
FIG. 6 is a schematic sectional view illustrating the present invention; [0039]
FIG. 7 is a schematic perspective view illustrating the present invention; [0040]
FIG. 8 is a schematic perspective view illustrating the present invention; [0041]
FIG. 9 is a schematic perspective view illustrating the present invention; [0042]
FIG. 10 is a schematic sectional view illustrating the present invention; [0043]
FIG. 11 is a schematic sectional view illustrating the present invention; [0044]
FIG. 12 is a schematic sectional view illustrating the present invention; [0045]
FIG. 13 is a schematic sectional view illustrating the present invention; [0046]
FIG. 14 is a schematic top view illustrating the present invention; [0047]
FIG. 15 is a schematic sectional view illustrating the present invention; [0048]
FIG. 16 is a schematic view illustrating the present invention; [0049]
FIG. 17 is a schematic view illustrating the present invention; [0050]
FIG. 18 is a schematic perspective view illustrating the present invention; [0051]
FIG. 19 is a schematic view illustrating the present invention; [0052]
FIG. 20 is a schematic view illustrating the present invention; [0053]
FIG. 21 is a schematic view illustrating the present invention; [0054]
FIG. 22 is a schematic view illustrating the present invention; [0055]
FIG. 23 is a schematic sectional view illustrating the present invention; [0056]
FIG. 24 is a schematic sectional view illustrating the present invention; [0057]
FIG. 25 is a schematic view illustrating the present invention; [0058]
FIG. 26 is a schematic sectional view illustrating the present invention; [0059]
FIG. 27 is a schematic sectional view illustrating the present invention; [0060]
FIG. 28 is a schematic view illustrating the present invention; [0061]
FIG. 29 is a schematic view illustrating the present invention; [0062]
FIG. 30 is a schematic view illustrating the present invention; [0063]
FIG. 31 is a schematic top view illustrating the present invention; [0064]
FIG. 32 is a schematic sectional view illustrating the present invention; [0065]
FIG. 33 is a schematic sectional view illustrating the present invention; [0066]
FIG. 34 is a schematic sectional view illustrating the present invention; and [0067]
FIG. 35 is a schematic sectional view illustrates a conventional example.[0068]
An embodiment of the present invention will be explained using FIG. 1 below. [0069]
In FIG. 1, reference numeral [0070] 1000 denotes an optical transmission region including a two-dimensional optical waveguide layer, and 1010 denotes a light receiving part that receives light propagating through the optical transmission region. A sectional view taken in the line 2-2 of FIG. 1 is shown in FIG. 2.
As shown in FIG. 2, by embedding at least a portion of the light receiving part [0071] 1010 in the optical transmission region 1000, it is possible to provide a semiconductor device having reduced direction dependency of light propagating through the optical transmission region that can be received by the light receiving part.
The optical transmission region is formed of, for example, a core layer inserted between clad layers of a refraction factor lower than that of the core layer. As the material of the core layer, optical resin such as PMMA, polymethyl methacrylate, silica-based glass and plastic material such as polystyrene and polycarbonate, etc. The material of the clad layer is not particularly limited if it has at least a refraction factor lower than that of the core layer. For example, a polymer containing fluorine, PCZ and Arton (manufactured by JSR Company) can be used. [0072]
Unlike a linear optical waveguide which presets the direction of light propagation to a single direction, the two-dimensional optical waveguide layer means a planar optical waveguide capable of propagating light in a plurality of directions within the plane. In the present invention, the two-dimensional optical waveguide layer is also sometimes referred to as “optical sheet”. The light receiving part is a photoelectric conversion device capable of performing O/E conversion. A pn type or pin type photodiode can be used. The pn junction plane can be either parallel to the optical sheet or almost perpendicular to the optical sheet. It is particularly preferred that the shape of the part embedded in the optical transmission region of the light receiving part be polyhedral or spherical. [0073]
When the light receiving part is embedded in the optical transmission region, either a portion or substantially the whole of the light receiving part can be embedded. It is preferred that the pn junction section be embedded at least in the core layer. [0074]
When the optical transmission region includes the core layer and clad layer, it is preferred that the light receiving part be embedded to such a depth that it reaches the core layer. [0075]
It is also possible to form an electrical wiring region on the two-dimensional optical waveguide layer which is the optical transmission region. Its example is shown in FIG. 3. [0076]
In FIG. 3, reference numeral [0077] 1101 denotes an optoelectronic board; 1102, a two-dimensional optical waveguide layer (hereinafter referred to as “optical sheet”) formed therein. Reference numerals 1103 and 1106 denote electronic devices formed on an electric wiring region 1108 (e.g., CPU, RAM, RF oscillator); 1104, electric wiring formed on the surface; 1105 indicated by an arrow in FIG. 3, optical wiring formed by light that propagates through the above-described optical sheet. Reference numeral 1109 denotes a support substrate. The support substrate, of course, can be provided as required. Or the support substrate itself can function as a clad layer.
FIG. 3 shows a state that a signal is transmitted from the electronic device [0078] 1106 to another electronic device 1107, etc. by using the optical sheet.
For example, when wiring from the electronic device [0079] 1106 to 1107 is performed by means of optical wiring, an electric signal from the electronic device 1106 is converted to an optical signal by an E/O conversion section (not shown) and this optical signal is spread over the optical sheet 1102. The optical signal propagates in a radial pattern and in all directions, but it is also possible to allow the optical sheet to have a function so that the optical signal mainly propagates in a specific direction.
The optical signal that propagates through the optical sheet is received by the electronic device [0080] 1107 via an O/E conversion section (not shown). Optical wiring is realized in this way.
Furthermore, since the two-dimensional optical waveguide layer is used, even if the electronic device [0081] 1107 does not exist in an initial circuit pattern, the electronic device 1107 can be placed at any position of the electric wiring region 1108 (e.g., FIG. 1). Though it can be placed at any position, of course, an empty region is necessary to place the electronic device 1107. Use of optical wiring can reduce influences of EMI and since at least a portion of the light receiving part is embedded in the optical waveguide, it is possible to receive signal lights from various directions.
Furthermore, it is further preferred that at least a portion of the light emitting part which sends signal light to the optical sheet be embedded in the optical sheet. Its example is shown in FIG. 4. FIG. 4 describes a case where an electronic device is mounted as a flip chip. Reference numeral [0082] 1103 denotes the electronic device; 1104, a metal wiring region; 1201, a light receiving part; 1202, a metal bump; 1205, an upper clad layer; 1206, a core layer; 1207, a lower clad layer; 1208, a light emitting part. Reference numeral 1210 shows a state that propagating light is received by the light receiving part 1201. Reference numeral 1203 shows a state that an electric signal obtained by O/E-converting the light received by the light receiving part is transmitted to the electronic device. Reference numeral 1211 shows a state that light propagating from the light emitting part 1208 through the core layer 1206 is transmitted.
In FIG. 4, since a portion of the light emitting part [0083] 1208 is embedded in the core layer 1206 and a spherical device (will be described in detail later) is used, light propagates in such a way that it spreads in directions within the plane in the core layer.
A ball IC is produced, for example, as follows: [0084]
(1) First, an Si sphere is made. Granular polycrystalline Si is melted inside a pipe with a diameter of 2 mm to form a quasi-spherical single crystal. After this, surface polishing is applied in a procedure similar to that for producing a ball bearing to make a complete sphere of 1 mmφ. [0085]
(2) Then, the sphere is passed through an IC process pipe and subjected to oxidation and diffusion processes. Pattern printing can be provided using a method disclosed, for example, in Japanese Patent Application Laid-Open No. 10-294254 and Japanese Patent Application Laid-Open No. 11-54406. According to the former, a circuit pattern corresponding to the spherical surface of the Si sphere material is provided, the circuit pattern is exposed over a region more than half of the total spherical surface all at once. In the latter, an axis passing through the center of the spherical IC is determined arbitrarily, the spherical IC is rotated around the axis intermittently, the exposure region of the surface of the spherical IC corresponding to this rotation angle is exposed using a mask corresponding thereto. An Si ball IC is completed in these steps. When light is emitted from or entered into the two-dimensional optical waveguide effectively, it is also possible to additionally use a mirror, prism, grating or hologram, etc. [0086]
The spherical semiconductor material used for the present invention can include Si, GaAs, InP, GaN, SiGe, GaAsN, Ge, AlN, etc. Of course, it is preferred that these materials be single crystals, but if these materials serve as the light receiving part or light emitting part sufficiently, these materials may be polycrystalline or amorphous. The multi-layer film for forming the above-described light receiving element or light emitting element can be composed of, for example, p-Si/i-Si/n-Si, p-GaAs/GaAsN/n-GaAs or p-(Al, Ga) (As, P, N)/i-(Al, Ga)(As, P, N)/n-(Al, Ga)(As, P, N) layers. Here, with respect to an expression “(A, B)(C, D, E)”, A and B means elements belonging to the Group III of the Periodic Table, and C, D and E means elements belonging to the Group V of the Periodic Table. Accordingly, the expression “(A, B)(C, D, E)” means “A[0087] xB1−xCyDzE1−y−z”.
(Embodiment 1: Optical Sheet+Spherical Light Receiving Device) [0088]
A first embodiment will be explained using FIG. 1, FIG. 2, FIG. 5 and FIG. 6. As the core layer of the optical transmission medium [0089] 1000, optical resin PMMA was used. As the clad layers between which the core layer is inserted, polyimide was used. The thickness of the entire optical transmission medium was approximately 0.8 mm (the core layer: 0.2 mm; the clad layer: 0.3 mm×2), the size is 30×30 mm. The specific method of manufacturing the optical transmission medium will be described later.
As the light receiving part [0090] 1010, a spherical device can be used. FIG. 5 shows a schematic sectional view of the spherical device. In FIG. 5, reference numeral 1501 denotes a spherical p-type Si member. The Si sphere itself is obtained, for example, by melting granular polycrystalline Si, transforming it into a quasi-spherical single crystal, applying surface polishing to make a complete sphere using a procedure for making a ball bearing. On the spherical Si member 1501, p-type AlGaAsN is allowed to grow as a first clad layer 1502, undoped GaAsN as an active layer 1503, and n-type AlGaAsN as a second clad layer 1504. A GaAsN-based compound semiconductor is used here because its band gap is smaller than that of GaAs and it has an excellent temperature characteristic and facilitates lattice matching.
Of course, instead of allowing a compound semiconductor thin film to grow on the spherical Si, it is also possible to allow an n-type silicon thin film to grow on the surface of p-type spherical silicon and form a pn junction to produce a light receiving part (photodiode). Moreover, it is also possible to use an ion implantation method or diffusion method (thermo-diffusion or solid phase diffusion) instead of producing a pn junction by means of growth of a thin film. [0091]
At an electrode section of this ball IC, a cathode [0092] 1504 and an anode 1505 are formed, the anode being electrically connected to the cathode via a via hole 1506. The via hole 1506 can be formed by etching or laser beam machining.
The light receiving part [0093] 1010 is then embedded in the optical transmission medium. More specifically, it is embedded to such an extent that it reaches the clad layer 1605 and core layer 1606 as shown in FIG. 6. Reference numeral 1607 denotes a clad layer.
To embed the light receiving part, a cavity corresponding to the embedding region needs to be made in the optical transmission medium. The cavity corresponding to the light receiving part is formed by heating a metal die for boring and pressing it against the optical transmission medium. The semiconductor device of the present invention is completed by embedding the light receiving part [0094] 1010 in the cavity formed. By applying a reverse bias between the cathode 1504 and anode 1505, the light incident upon the light receiving part 1010 is absorbed by the pn junction and obtained as an electric signal.
As explained above, a semiconductor device with significantly reduced direction dependency (directivity) of light propagating through the optical transmission medium is produced in this way. Moreover, the light receiving part can directly receive light that has propagated through the optical transmission region. [0095]
A spherical device has been used as the light receiving part, but the light receiving part is not limited to a spherical device and can have any shape if it can at least be embedded in the optical transmission medium, for example, a normal photodiode having a pn junction. [0096]
It is also possible to form not only the light receiving part but also light emitting part by using the spherical device and embed portion thereof in the optical transmission medium. It is further possible to form an electric wiring layer over the entire optical sheet. It is also preferred to provide the above-described optical sheet under the electric wiring printed substrate and form an optical wiring in place of a portion of the wiring as required. [0097]
(Embodiment 2: Method of Adding Electronic Device) [0098]
In view that the present invention reduces direction dependency of the light receiving part, the following method of adding electronic device can be used. [0099]
This embodiment will be explained referring to FIG. 7 to FIG. 9. In FIG. 7, reference numeral [0100] 1750 denotes an optoelectronic board. Reference numeral 1700 denotes an optical transmission medium; 1707 and 1705, electronic devices. The electronic device 1705 is provided with a light emitting part (not shown) capable of propagating signal light to the optical transmission medium 1700. Reference numeral 1720 denotes an electric wiring layer (e.g., a printed substrate).
When a new electronic device [0101] 1706 is added to an empty region 1730 of the optoelectronic board 1750, if no optical transmission medium is provided, it is only possible to merely add the electronic device 1706 and carry out electric wiring between the individual devices. However, in the case of the optoelectronic board 1750, it is possible to use optical wiring, for example, between the electronic devices 1705 and 1706. In FIG. 7, reference numeral 1780 denotes the light receiving part made according to the above-described method.
The optical transmission medium [0102] 1700 is provided beforehand with cavities for embedding as shown in FIG. 8. The number of cavities for embedding can be one or plural. It is preferred that a plurality of cavities be made beforehand from the standpoint of the degree of freedom of layout. For example, it is possible to form an array of cavities. In FIG. 8, reference numeral 1741 denotes a cavity for embedding the light emitting part of the electronic device 1705. An unused cavity 1744 can be filled with resin, etc. This is effective when light propagating through the optical transmission medium is scattered unnecessarily by unused cavities. It is also preferred to provide a difference in the etching characteristic between the resin that fills a cavity and its periphery to make it easier to remove the filler of the cavity.
This embodiment uses a cavity [0103] 1740 to add the electronic device 1706.
As shown in FIG. 9, a region where the electronic device [0104] 1706 is added is removed and the cavity 1740 is exposed. Of course, such a process can be omitted if the electric wiring layer 1720 is not formed in the region 1730 shown in FIG. 7. Then, if the cavity 1740 is filled with some filler, this is removed by etching, etc. Then, the device is added in such a way that the light receiving part 1780 of the electronic device 1706 is embedded in the cavity 1740. Since the electronic device 1705 has the light emitting part, it is possible to connect between portions of the electronic devices 1705 and 1706 by optical wiring using the optical transmission medium 1700 which is not used until the electronic device 1706 is added.
When a new device is added to an extremely small printed substrate such as built in a cellular phone, this embodiment allows optical wiring to be used and makes it possible to reduce influences of EMI caused by the addition of the electronic device. [0105]
When a new electronic device is added assuming that the existing wiring pattern is used, the existing circuit group may be affected by EMI caused by the merely added electronic device. In such a case, optical wiring can be used as in the case of this embodiment. [0106]
When a linear waveguide is formed beforehand according to the position of the newly added electronic device, optical wiring in the configuration shown in FIG. 35 can also be used. But this significantly reduces the degree of freedom of layout. This is because the location where the new device is added is dependent on the location of the linear waveguide formed beforehand. Use of a two-dimensional optical waveguide as in this embodiment allows optical wiring with high degree of freedom of the device layout. [0107]
(Embodiment 3: Photoelectric Two-Layer Substrate+Spherical Light I/O Device) [0108]
FIG. 3 is a schematic perspective view for illustrating this embodiment of the present invention. [0109]
In FIG. 3, reference numeral [0110] 1101 denotes an optoelectronic board; 1102, a two-dimensional optical waveguide layer (hereinafter referred to as “optical sheet”) formed inside the optoelectronic board; 1103, 1106 and 1107, electronic devices formed on the surface of the optoelectronic board (e.g., CPU, RAM, RF oscillator); 1104, electric wiring formed on the surface; 1105, optical wiring formed by light that propagates through the above-described optical sheet.
First, the method of producing the optical sheet will be explained. [0111]
The structure of the optical sheet is not limited to a particular structure if it can transmit light for at least a predetermined distance, and it is preferred that the structure satisfies the following conditions. [0112]
(1) The optical sheet can have a two-dimensional slab type optical waveguide for guiding light. [0113]
It is preferred that the propagation loss of the optical sheet is as small as possible but the propagation loss depends on the transmission distance. For example, for transmission loss of 0.1 dB/cm, a substrate of several cm per side can be used. [0114]
(2) Electric wiring can be formed on the surface of the optical sheet. [0115]
This is intended to exploit a conventional electric wiring pattern as such. [0116]
A structure of the optical sheet satisfying the above-mentioned (1) and (2) can be obtained by using PMMA for the support substrate and the clad layer and by using an organic resin such as polyimide for the optical waveguide layer. It is preferred that the optical transmission layer be provided over the entire surface under the electric wiring layer. [0117]
FIG. 4 is a schematic sectional view for showing the portion [0118] 4 of FIG. 3. The following is an explanation of a case where the electronic device 1103 makes an optical interconnection using the optical sheet 1102. FIG. 4 illustrates a case where the light receiving part 1201 and the light emitting part 1208 are separated from the electronic device 1103. Of course, the light receiving part and the light emitting part may also be built in the electronic device 1103 itself.
Reference numeral [0119] 1207 denotes a resin substrate (also serves as a clad layer); 1205, a clad layer; 1206, a core layer of higher refraction factor than the members 1205 and 1207. The substrate was 0.5 mm thick, the core layer was 0.1 mm and the clad layer was 0.3 mm, but each thickness is not limited to these sizes.
The optical sheet is obtained by integrating these three layers. It is possible to make a flexible substrate with high bending strength by using a flexible PMMA substrate as the substrate, and polyimide resin which can be used for coating of the core layer and clad layer. [0120]
This embodiment uses an optical I/O device (spherical optical device) formed of a compound semiconductor on a spherical Si substrate. [0121]
This spherical optical Si substrate will be explained in brief. (Items related to the spherical device are described, for example, in Japanese Patent Application Laid-Open No. 12-31190). [0122]
FIG. 5 shows a schematic view of the spherical optical device. In FIG. 5, reference numeral [0123] 1501 is a spherical p-type Si substrate; 1502, a P-type AlGaAsN clad layer; 1503, an undoped GaAsN active layer; 1504, an n-type AlGaAsN clad layer. A GaAsN-based compound semiconductor is used here because (1) its band gap is small and it has an excellent temperature characteristic and (2) it facilitates lattice matching with Si. It is also possible to use other materials including the substrate.
At an electrode section of this ball IC, an anode [0124] 1505 and cathode 1504 electrically connected to a via hole 1506 are formed. This embodiment uses the light emitting element and light receiving element of the same structure, but they may have different structures. It is preferred that the cathode 1504 have a windowed structure or mesh structure to allow light to be input/output.
When the ball IC is operated as the light emitting element, carriers are injected into a pn junction by applying a forward bias between the cathode [0125] 1504 and anode 1505, thereby generating light emission. The light generated is radiated from the light emitting window in a wide range of angles.
On the other hand, when the ball IC is operated as the light receiving element, the light incident upon the incident light window from a wide range of angles is absorbed as an electric signal by the pn junction and taken in by the adjacent electronic device by applying a reverse bias between the cathode [0126] 1504 and anode 1505.
Both the light emitting device and light receiving device have a spherical surface, and therefore the ability to input/output light with a wide range of angles constitute an outstanding feature of this embodiment. [0127]
The ball IC of this embodiment can be produced not only for the optical I/O section but also for other ICs simultaneously. The method of producing ICs and their exposure method are disclosed in Japanese Patent Application Laid-Open No. 10-294254 (U.S. Pat. No. 6,097,472) “Spherical Device Exposure Apparatus and Fabrication Method”, etc. [0128]
This embodiment uses a preamp operating on 3.3 V in a CMOS configuration to be used for the light receiving element. [0129]
The method of mounting this spherical optical device will be explained using FIGS. [0130] 10 to 12.
First, a hemispherical cavity is made in the above-described optical sheet substrate which can allow the above-described ball IC to be embedded. The boring method can be selected arbitrarily. The cavity may be formed at a predetermined location using photolithography and etching or the cavity may be formed individually at an arbitrary location using laser, etc. This embodiment uses thermal fusion process. [0131]
As shown in FIG. 10, metal balls are used as a die [0132] 2000, heated and pressed against the above-described resin substrate 1207 (FIG. 11) and hemispherical cavities 2100 are produced (FIG. 12). The depth of the cavities is set such that it reaches the vicinity of the core layer of the optical wiring substrate. Of course, it is also possible to dent to an extent that the cavity reaches the lower part of the core layer.
After this process, electric wiring [0133] 1104 is printed on the optical sheet as shown in FIG. 4 and then an electronic device represented by an LSI is mounted. Any method can be used for mounting, and in this embodiment, a flip chip mounting method is used.
The optical I/O section is mounted in the cavity of the optical sheet in such a way that the optical I/O section is arranged on the bottom of the cavity. The optical I/O section is positioned and fixed so that the optical I/O section is brought into contact with the bottom of the cavity to allow light to be taken in or out (see FIG. 13). Since the optical I/O section in this embodiment is spherical, strict positioning accuracy is not required. After the cavity [0134] 2100 and spherical device are positioned, they are fixed by UV hardening resin, etc.
Finally, the spherical optical I/O device and the surface-mounted electronic device are connected by means of printed electrical wiring. For this, it is preferred to use bump or plating. [0135]
FIG. 13 shows an example where a print wiring [0136] 1104 and an electrode 1504 are connected via a bump 2302.
This embodiment shows an example where a spherical IC is used as the E/O and O/E conversion section but this embodiment is not limited to this example. [0137]
(Principle of Operation) [0138]
The principle of operation will be explained below. [0139]
First, the transmission function will be explained. [0140]
FIG. 4 is an enlarged view of the portion [0141] 4 of FIG. 3. In FIG. 4, an output electric signal (CMOS logic) of the I/O section of an LSI 1103 can be transmitted to an adjacent electronic device via electric wiring 1104.
However, it is also possible to generate an output optical signal [0142] 1211 by directly driving an adjacent optical I/O device (e.g., a spherical optical device) and use it as optical wiring via the optical waveguide layer (optical sheet) 1206. Either method can be selected as required.
A case where an adjacent spherical optical device is driven will be considered. [0143]
An LSI logic signal (e.g., 3.3 V in the case of CMOS) is a voltage enough to drive the above-described spherical optical device. By applying a logic signal as a forward bias to the spherical optical device, the electric signal is converted to an optical signal. [0144]
At this time, since light is radiated over the entire spherical surface, light spreads and propagates over the entire surface of the optical sheet without a special optical system. As a result, it is possible to secure 80% or more as the efficiency of coupling with the optical waveguide. [0145]
Then, the reception function will be explained. [0146]
When an input optical signal [0147] 1210 propagating from an arbitrary direction of the optical sheet 1206 reaches the surface of the spherical light receiving element 1201, it is taken in, absorbed near a reverse-biased pn junction and converted to an electronic signal. The converted electric signal is taken in by the adjacent LSI 1103 and processed as the input electric signal 1203. In this case, if a preamp for amplifying the electric signal is integrated on the surface of the spherical optical device, the electric signal can be restored to a CMOS compatible voltage.
Thus, using the present invention can reduce direction dependency of the light receiving part. [0148]
When a plurality of metal wires is placed close to each other, if a high-speed data communication is performed (e.g., 1 Gbps), the strength of nearby electromagnetic noise is expressed by “strength of the noise source (frequency, waveform, drive current)”×“transfer constant (resonance with power line, coupling with adjacent line)”×“antenna factors (connector, electrode)”. [0149]
That is, the longer the wiring length or the greater the current value or the greater the signal speed or the closer the signal pulse to a square wave, the higher the noise level becomes. [0150]
Therefore, when metal wires are used near the CPU, etc. which requires high-speed processing, it is impossible to completely eliminate EMI. [0151]
On the other hand, using optical wiring as in the case of this embodiment can solve this problem. This is because optical wiring is free of electromagnetic induction and the transfer constant becomes zero. [0152]
Above all, as in the case of this embodiment, by separating and placing the electric wiring layer and optical transmission layer as two layers and using a two-dimensional optical waveguide (optical sheet) as the optical transmission layer, it is possible to provide an optoelectronic wiring substrate which prevents influences of EMI caused by a specific device and also facilitates the production process. [0153]
On the other hand, the physical dimensions required for wiring per optical wire when the optical waveguide (so-called one-dimensional waveguide) is used are greater than electric wiring by one or more orders of magnitude. Therefore, changing all electric wiring to optical wiring increases demerits such as increasing the size and increasing loss by bending, etc. [0154]
Furthermore, there is also a demerit that introducing optical wiring makes it unavoidable to change conventional electric wiring patterns. [0155]
This embodiment solves the above-described two demerits by using a two-dimensional optical waveguide (optical sheet) as the optical transmission layer. Applying a two-dimensional optical waveguide (sheet-shaped optical waveguide) to the optical waveguide which provides optical wiring increases the degree of freedom of layout. Furthermore, when light is transmitted from the light emitting part to the optical sheet, it is possible to two-dimensionally transmit optical data from the light emitting device in all directions. [0156]
Furthermore, it is desirable that the light emitting device connectable to the two-dimensional optical waveguide can emit light in all two-dimensional directions and that the light receiving device can receive light from all two-dimensional directions. Examples of the above-described devices include optical devices formed on a spherical surface. [0157]
When the light receiving element with a spherical surface is used, it is possible to design the device so that it can receive light from all directions. This appears as an effect of drastically relaxing the mounting accuracy when light from a waveguide whose propagation direction is fixed is taken in. [0158]
By building an amplifier circuit into the bias circuit in the spherical optical device, it is possible to operate this single spherical optical device as the optical I/O element. This makes it possible to reduce influences on the conventional design of electronic circuits and realize optical interconnection. [0159]
(Embodiment 4: Clock Distribution) [0160]
An application example of the present invention will be explained below. [0161]
FIG. 3 shows a case where a plurality of electronic parts (CPU and memory, etc.) [0162] 1103 are mounted on one substrate 1101 and a portion of the wiring is coupled with the substrate through the spherical optical device 1201 as in the case of Embodiment 3.
In FIG. 3, the LSI [0163] 1106 is a clock generator. At this time, a clock signal is sent to the optical waveguide of the optoelectronic board via the spherical optical device 1208 (FIG. 4). The signal for which optical wiring is selected is output to the spherical optical device and is driven by the signal sent by the CMOS itself. No special driver is required. For this reason, a GaAsN-based semiconductor laser which operates on a low voltage is used as the optical device.
The spherical optical device [0164] 1208 converts the clock signal to light and distributes the clock signal converted to the optical signal to all devices on the substrate. Since any electronic device (e.g., MPU 1103) on the substrate is provided with the spherical optical device 1201, it receives the optical signal from the clock generator 1106. Since the spherical optical device 1201 has a spherical shape, it can receive light from any direction with high light receiving efficiency.
The light received is separated into pairs of electrons and holes, with the electric signal being amplified by a preamp formed on the spherical optical device of an adjacent LSI and taken in by the MPU. Other devices (e.g., RAM) can also receive the clock signal using a similar method and therefore these devices can also be operated with a common clock. [0165]
Conventionally, when a clock signal is distributed to individual devices, wiring patterns cannot be selected freely or wiring distances cannot be equalized, and therefore it is not possible to ignore influences of EMI caused by transmission delay and high-speed, large current operation. However, according to this embodiment, optical wiring with the shortest distance and with no electromagnetic induction can be carried out to solve these problems all at once. [0166]
(Embodiment [0167] 5: MPU→Memory (Serial Transmission))
Then, another application example will be explained. [0168]
FIG. 14 is a schematic view for illustrating another embodiment of the present invention. In FIG. 14, reference numerals [0169] 2407 and 2408 denote two CPUs. Reference numeral 2409 denotes a RAM shared by these two CPUs (2407, 2408). In FIG. 14, reference numeral 2401 denotes electric wiring for parallel transmission, and 2402 denotes optical wiring for serial transmission.
Normal electric wiring requires, for example, 64-bit data wires [0170] 2401 with 6 transmission paths.
In applications (moving images) of sending large-volume data at high speed, data may not be correctly sent using conventional wiring for the above-described reasons (transmission delay and EMI). In such cases, optical wiring can be used. Specifically, a part or all of signal transmission between CPUs ([0171] 2407, 2408) and RAM 2409 is carried out using the optical wiring 2402.
Further, in FIG. 14, in order to send data from the MPU to the memory using 64 bits, 6 electric wires are necessary, but performing parallel/serial conversion at the final stage of the MPU and connecting one optical I/O element allows the electric signal to be transmitted as an optical signal through the optical waveguide of the optoelectronic board, received by the optical I/O element on the receiving side and converted from serial to parallel, resulting in a 64-bit parallel signal. [0172]
When the optical signal is converted from parallel to serial, the clock becomes higher, but since the signal propagates through the optical waveguide, there is no problem of EMI. [0173]
This embodiment selects optical wiring from the beginning, but it is not always necessary to use only optical wiring. That is, by allowing electric wiring paths to also be selected, it is possible to sometimes connect electric wiring and sometimes connect optical wiring. This flexibility is one of the features of the present invention. [0174]
In the case of electric wiring, wiring may be performed in such a way as to bypass other devices to avoid EMI, resulting in an increase of the wiring length, causing transmission delay and distortion of waveforms. Selecting optical wiring at this time makes it possible to provide shortest EMI-free connections, which in turn prevents transmission delay and distortion of waveforms. [0175]
The final decision as to which signal should be applied to electric wiring or optical wiring is made by the device that controls the bus. [0176]
The converted light spreads and propagates through a two-dimensional optical waveguide and reaches an IC located in another place. Near this IC, a ball IC for O/E conversion is also placed. This embodiment places the same ball IC. Since it has a spherical surface, light directly hits the pn junction surface without using any prism or mirror, etc., which provides an extremely easy way of mounting. [0177]
(Embodiment 6: Integrating Pin-PD and Amp on Ball Si) [0178]
FIG. 15 is a schematic view for illustrating another embodiment of the present invention. In FIG. 15, reference numeral [0179] 2508 denotes a spherical Si substrate and its northern (upper) hemisphere shows the surface and its southern (lower) hemisphere shows a sectional view. Reference numeral 2509 denotes a light receiving element formed on the southern hemisphere; 2503, an IC such as a bias circuit that drives the light receiving element or a preamp that amplifies an electric signal. Reference numeral 2510 denotes a optical waveguide substrate; 2506, a core layer; 2505, a clad layer; 2506, an electrode; 2512, printed wiring; 2504, a bump; 2511, output light; 2507, input light.
The method of producing the semiconductor device shown in FIG. 15 will be explained below. [0180]
First, as shown in FIG. 16, a p-Si layer [0181] 2521, i-Si layer 2509 and n-Si layer 2520 are formed on almost half (southern hemisphere) of an undoped spherical Si substrate 2601 (diameter: about 1 mmφ) by ion implantation to form a light receiving element region. The depth is around 0.3 μm. Crystal recovery is performed through annealing processing as required.
Then, as shown in FIG. 17 (the upper half of the sphere expresses the spherical surface and the lower half expresses a section of the sphere), a bias circuit [0182] 2701 for applying a reverse bias to this light receiving element, a preamp circuit 2702 for amplifying the electric signal converted from the optical signal to a desired voltage level, and a waveform shaping circuit 2703, etc. are formed on the remaining spherical surface region (northern hemisphere). Reference numeral 2704 denotes electric wiring, 2705; a light receiving element electrode; 2506, an electronic circuit electrode. Since the electrodes 2705 and 2706 are the electrodes for applying voltage to the p-Si layer 2521 and n-Si layer 2520 respectively, the potential of the electrode 2705 is prevented from being applied to the n-Si layer 2520.
Here, all electronic circuits use a 3.3 V CMOS logic circuit. At the same time, all electronic circuits form a positive electrode [0183] 2705 and negative electrode 2706 of the light receiving element and a wiring pattern 2704. Furthermore, reference numeral 2506 denotes an external electrode for input/output of the electronic circuit.
An example of the mounting method will be shown below. In FIG. 15, for example, reference numeral [0184] 2510 denotes a clad layer made of PMMA which also serves as a substrate; 2506, a (sheet-shaped) core layer which serves as a optical waveguide; 2505, a clad layer.
Photosensitive polyimide, etc. is applied to form the core layer [0185] 2506 and clad layer 2505, and a cavity for fitting therein is made to allow the spherical optoelectronic device of the present invention is formed by using a photolithography technology, etc. After a desired wiring pattern is printed thereon, the optoelectronic device of the present invention is fixed with UV-hardened resin (not shown).
After this, as shown in FIG. 18, contact is made between the wiring pattern [0186] 2803 and the electrode 2506 on the device using an Au bump 2804, etc. In this process, plating may also be used instead of the bump.
The principle of operation will be explained below. [0187]
In FIG. 15 or FIG. 17, a reverse bias (e.g., 3.3 V) is applied to the pn junction of the optoelectronic device through the bias circuit [0188] 2701. At this time, this optoelectronic device can receive the optical signal propagating through the two-dimensional optical core layer 2506 from an arbitrary direction. This is because at least a portion of the light receiving part is embedded in the optical transmission medium.
The input optical signal is taken in, absorbed near the reverse-biased pn junction and converted to an electronic signal. The converted electric signal is amplified as the input electric signal by the adjacent preamp [0189] 2702 to a CMOS logic level, processed by a waveform shaping circuit 2701, etc. and sent to the printed wiring contacted via a bump.
From the above-described embodiments, it is possible to (1) receive light from any two-dimensional direction, (2) amplify or shape the waveform using an integrated electronic circuit, and (3) facilitate mounting. Furthermore, it is possible to (4) reduce influences on existing electronic circuits and allow a single device to serve as an optical interconnection I/O. [0190]
(Embodiment 7: III-VN on Ball GaAs) [0191]
This embodiment uses a spherical GaAs substrate instead of a spherical Si substrate. [0192]
The production method of this embodiment will be explained using FIG. 19. [0193]
From the surface of a high-purity undoped spherical GaAs substrate [0194] 2901, a p-type GaAs layer 2902, a GaAsN light-absorbing layer 2903 and an n-type GaAs layer 2904 are formed by means of ion implantation.
The concentration of p-type impurities is about 1E19 cm[0195] −3 and the concentration of n-type impurities is about 1E18 cm−3 (ion type can be determined arbitrarily). The undoped GaAsN is obtained by applying ion implantation of high concentration N to GaAs (e.g., 1E21 cm−3). RTA (Rapid Thermal Annealing) is effective to eliminate damage during ion implantation.
With regard to the implantation depth, the ion implantation condition of other layers is set in such a way that the thickness of the GaAsN layer is 0.2 μm. [0196]
The subsequent processes and mounting process are in conformance with Embodiment 6. With regard to the electronic circuit section, using a bipolar process makes it possible to make an electronic circuit having a function equivalent to or higher than Embodiment 6. For the electrode, a mesh structure can also be used instead of a complete window structure. [0197]
This embodiment will be explained focused on differences from Embodiment 6. The operation as a light receiving device of this embodiment is the same as in the case of Embodiment 6. That is, by applying a reverse bias to the p-GaAs layer [0198] 2902 and n-GaAs 2904 in FIG. 19, the light incident upon the incident light window from a wide range of angles is absorbed by the pn junction and taken in as an electric signal by an adjacent electronic device. Since GaAsN has a smaller band gap than GaAs, GaAsN operates on a lower voltage than GaAs.
Furthermore, GaAsN has a greater mobility than Si, and can therefore respond fast. Reference numeral [0199] 2903 denotes an i-GaAsN layer.
Since GaAsN is a direct transition type compound semiconductor, it can also be used as a light emitting element. When GaAsN is operated as a light emitting element, by applying a forward bias to the electrode [0200] 2705 and 2706 in FIG. 15 or FIG. 17, the light emitted at the pn junction is radiated from the light emitting window in a wide range of angles. This may be driven by the logic data itself or driven through a driver circuit.
Since the surface of both the light emitting device and light receiving device is spherical, this embodiment has a major feature of being capable of letting in and out light in a wide range of angles. [0201]
(Embodiment 8: GaAsN Films on Facets of Ball Si) [0202]
FIG. 20 is a schematic view for illustrating another embodiment. [0203]
In this embodiment, GaAsN/AlGaAsN is stacked on a ball Si substrate to be used as a light emitting element or light receiving element. Reference numeral [0204] 3101 denotes a spherical semiconductor substrate; 3102, an IC; 3103, an optical device; 3104, a bump; 3105, a optical waveguide substrate; 3106, a core layer; 3107, a clad layer; 3108, printed wiring; 3109, output light; 3110, input light. The production method will be explained below.
(Production of Ball IC) [0205]
As shown in FIG. 21, the IC [0206] 3102 is formed on the hemispheric surface (here, northern hemisphere) of an undoped spherical Si substrate (1 mmφ) 3101. This IC may be a drive IC or parallel-serial conversion circuit in the case where this IC is a light emitting element. This IC is a bias circuit, preamp, waveform shaping circuit or serial-parallel conversion circuit in the case where this IC is a light receiving element. Of course, when the IC is used for both functions, appropriate electronic circuits need to be added. These circuits can be made through a normal CMOS process and its logic voltage is 3.3 V. Reference numeral 3111 denotes electric wiring.
(Production of Optical Device) [0207]
After the Si ball IC process is almost completed, an optical device is produced. First, the entire sphere is covered with a nitride film (SiN), etc. and the region where the optical device is made is ground and polished to form a smooth surface. The sphere is covered with the nitride film to protect the electronic device during the optical device process and to be used as a selective growth mask. It is desirable to form a film with small stress (here, Si[0208] 3N4 (200 nm thick) is used) to cover the spherical surface.
As the region for producing the optical device, this embodiment uses plane (111) and planes associated therewith (four planes in total; (100), (010), (−100), (0-10)) [0209] 3301 (triangular plane approximately 20 μm per side) in the southern hemisphere. FIG. 22 is a plan view of FIG. 21 viewed from the S-pole of the sphere and reference numeral 3101 denotes the spherical substrate and 3301 denotes the (111) equivalent plane.
FIG. 23 is a sectional view of one of these planes. The entire surface may be covered with a nitride film, etc. again if necessary and a window is made only in the region for producing the device. Since selective growth takes place according to the shape of the opening, this embodiment controls the opening so that it becomes cylindrical. Reference numeral [0210] 3101 denotes the spherical semiconductor substrate; 3301, the plane (111); 3401, the SiN film. Here, the (111) equivalent plane is selected for the following reasons.
(1) Because they are chemically equivalent to each other, it is possible to make a uniform structure in the subsequent crystal growth. (If another crystalline plane is included, anisotropy occurs in aspects of composition, film thickness and direction of crystal growth.) [0211]
(2) In the plane contacting S-pole (in the light propagation direction), light is emitted in at least four directions or light is received from at least four directions. (This is not limited to the (111) equivalent plane provided that other planes have an equivalent function or higher function.) [0212]
(Crystal Growth) [0213]
The structure of the device will be explained using FIG. 24. First, GaN[0214] xAs1−x is stacked as a buffer layer 3501 on only a selected region (opening part) using a gas source MBE (molecular beam epitaxy) method or MOCVD (metal-organic chemical vapor deposition) method. The grating constant at this time can be selected as appropriate according to the conditions of the clad layer and active layer.
Here, after the nitrogen composition X is changed gradually from 0.2 to 0 so that it provides lattice matching with In[0215] 0.1Ga0.9As, InGaAs is further stacked while changing the In composition gradually. After this, the n-InAlGaAs clad layer 3502, GaInNAs/InAlGaAsMQW (Multiple Quantum Well) active layer (light emitting wavelength: 1.3 μm) 3503, p-InAlGaAs clad layer 3504 and p-InGaAs contact layer 3505 are stacked one after another. A positive electrode 3506 is formed after a light input/output window 3507 is attached. Then, a negative electrode is formed from inside the sphere at a desired position, unnecessary nitride films are removed, wires are connected to the IC electrodes, and in this way this embodiment is completed. Reference numeral 3101 denotes the spherical semiconductor substrate and 3401 denotes the selection mask.
(Mounting) [0216]
A mounting example is shown in FIG. 25. In FIG. 25, reference numeral [0217] 3601 denotes a substrate of PMMA, etc., and 3602 denotes the optical waveguide core layer made of polyimide, etc. formed thereon. The clad layer such as of PMMA is further formed thereon. A cavity is formed on the clad layer 3603 and core layer 3602 using photolithography, etc. so that the above-described spherical optoelectronic device can fit therein. After this, the device is fixed with UV-hardened resin, etc. (not shown). Then, contact with the printed wiring 3501 is made using the Au bump 3502.
(Principle of Operation) [0218]
Then, the principle of operation will be explained. [0219]
(In Case of Light Emitting Element) [0220]
In FIG. 20 or FIG. 21, the electric signal supplied from the driver IC [0221] 3102 causes the light emitting element 3103 to generate an optical signal. This optical signal is emitted as output light to the mounted core layer. Since the element is directly optically coupled with the core layer, the light emitting element can efficiently guide light to the optical waveguide.
When the light signal is desirably emitted in all two-dimensional directions, it is possible to simultaneously modulate the same signals and output an optical signal. In the actual case, four directions are used, but since this light emitting element is an LED and its directivity is weak, light propagates with a substantially uniform strength distribution in all directions. To obtain a more uniform strength distribution, it is possible to form the light emitting element in higher-degree planar directions than the (111) equivalent plane. Then, the emitted light propagates through the two-dimensional optical waveguide and thereby transmits its optical signal to this optoelectronic device. [0222]
(In Case of Light Receiving Element) [0223]
This embodiment can also be used as a light receiving element. In FIG. 20 or FIG. 22, a reverse bias (e.g., 3.3 V) is applied to the pn junction of the optoelectronic device by the bias circuit [0224] 3301. At this time, this optoelectronic device can receive an optical signal propagating through the two-dimensional optical core layer 3106 in an arbitrary direction. This is because the light receiving surface is spherical. The input signal is taken in, absorbed near a reverse-biased pn junction and converted to an electronic signal. The converted electric signal is amplified (or attenuated) by an adjacent preamp 3102 to the CMOS logic level, further processed by the waveform shaping circuit 3102, etc. and transmitted to the printed wiring contacted by a bump.
(Effects) [0225]
This embodiment has the following effects: [0226]
(1) It is possible to receive light from arbitrary two-dimensional direction. [0227]
(2) It is possible to carry out amplifying or waveform-shaping by an integrated electronic circuit. [0228]
(3) It is possible to easily carry out mounting. [0229]
(4) The influence on existing electronic circuits can be reduced, and a single device can be used as an optical interconnection I/O. [0230]
(Embodiment [0231] 9: III-VN on Ball GaAs)
This embodiment uses a spherical GaAs substrate instead of a spherical Si substrate. GaInNAs provides lattice matching with GaAs and therefore this embodiment has a feature of allowing easier band gap control than in the case of using an Si substrate. The method of producing it will be explained using FIG. 24. [0232]
(Production of Ball IC) [0233]
As shown in FIG. 21, an IC [0234] 3102 is produced on a part of the undoped spherical Si substrate (1 mmφ) 3101, for example, the hemispherical surface (here, northern hemisphere). This IC may be a drive IC or parallel-serial conversion circuit in the case of a light emitting element, and it may be a bias circuit, preamp, waveform shaping circuit or serial-parallel conversion circuit in the case of a light receiving element. Of course, when the IC is used for both functions, appropriate electronic circuits need to be added. These circuits can be made through a normal FET or Bipolar process. In FIG. 24, reference numeral 3101 denotes a spherical semiconductor substrate; 3501, a buffer layer; 3502, a clad layer; 3505, a contact layer; 3506, an electrode; 3507, a window; 3401, a selection mask.
(Production of Optical Device) [0235]
After the GaAs ball IC process is almost completed, an optical device is produced. First, the entire sphere is covered with a nitride film, etc. and the region where the optical device is made is ground or polished to form a smooth surface. The sphere is covered with the nitride film to protect the electronic device during the optical device process and to be used as a selective growth mask. It is desirable to form a film with small stress to cover the spherical surface. As the region for producing the optical device, this embodiment uses plane (111) in the southern hemisphere and planes associated therewith (four planes in total; (100), (010), (−100), (0-10)) [0236] 3301 (triangular plane of approximately 20 μm per side). FIG. 22 is a plan view of FIG. 21 viewed from the S-pole of the sphere. FIG. 23 is a sectional view of one of these planes. The entire surface may be covered with a nitride film, etc. again if necessary, and a window is made only in the region for producing the device. Since selective growth takes place according to the shape of the opening, this embodiment controls the opening so that it becomes cylindrical. Here, the (111) equivalent plane is selected for the following reasons.
(1) Because they are chemically equivalent to each other, it is possible to make a uniform structure in the subsequent crystal growth. (If another crystalline plane is included, anisotropy occurs in aspects of composition, film thickness and direction of crystal growth. [0237]
(2) In the plane contacting S-pole (in the light propagation direction), light is emitted in at least four directions or light is received from at least four directions. This is not limited to the (111) equivalent plane provided that other planes have an equivalent function or higher function.) [0238]
(Crystal growth) [0239]
The structure of the device will be explained using FIG. 24. First, GaAs is stacked as a buffer layer [0240] 3501 on only a selected region (opening part) using a gas source MBE (molecular beam epitaxy) method or MOCVD (metal-organic chemical vapor deposition) method. Then, InGaAs is further stacked while changing gradually the In composition so that it provides lattice matching with In0.1Ga0.9As. After this, the n-InAlGaAs clad layer 3502, GaInNAs/InAlGaAsMQW (Multiple Quantum Well) active layer (light emitting wavelength: 1.3 μm) 3503, p-InAlGaAs clad layer 3504 and p-InGaAs contact layer 3505 are stacked one after another. Since in this crystal growth process the elements belonging to the III-V groups of the periodic table are stacked on each other, it is characterized in that it is easier than the staking the elements belonging to the III-V groups on Si in Embodiment 8. Then, a positive electrode 3506 is formed after a light input/output window 3507 is attached. Then, a negative electrode is formed from inside the sphere at a desired position, unnecessary nitride films are removed, wires are connected to the IC electrodes, and in this way this embodiment is completed.
(Mounting) [0241]
A mounting example is shown in FIG. 25. In FIG. 25, reference numeral [0242] 3601 denotes a substrate made of PMMA, etc., and 3602 denotes the optical waveguide core layer made of polyimide, etc. formed thereon. On top of this, a clad layer 3603 such as of PMMA is further formed. A cavity is formed on this clad layer 3603 and core layer 3602 using photolithography, etc. so that the above-described spherical optoelectronic device can fit therein. After this, the device is fixed with UV-hardened resin, etc. (not shown). Then, contact with the printed wiring 3501 is made using the Au bump 3502.
(Principle of Operation) [0243]
An operation of this embodiment as a light receiving device is the same as the case with the above-described embodiment. That is, by applying a reverse bias to the optical device, the light incident upon the incident light window from a wide range of angles is absorbed by the pn junction and taken in as an electric signal by an adjacent electronic device. Since Ga(In)NAs has a smaller band gap than GaAs, Ga(In)NAs operates on a lower voltage than GaAs. Furthermore, Ga(In)NAs has a greater mobility than Si, and can therefore respond fast. [0244]
Since Ga(In)NAs is a direct transition type compound semiconductor, it can also be used as a light emitting element. When Ga(In)NAs is operated as a light emitting element, by applying a forward bias to the drive electrode of the light emitting element in FIG. 20 or FIG. 22, the light emitted from the pn junction is emitted from the light emitting window in a wide range of angles. This may be driven by the logic data itself or driven through a driver circuit. Since the surface of both the light emitting device and light receiving device is spherical, this embodiment has a major feature of being capable of emitting and receiving light in a wide range of angles. [0245]
(Effects) [0246]
This embodiment has the following effects. [0247]
(1) It is possible to receive light with a longer wavelength than GaAs. [0248]
When a light source with a 0.85 μm band is used, Si-pin PD of Embodiment 1 may not have sufficient light receiving sensitivity. This embodiment has no such a possibility. This also reduces burden on the electric circuit. [0249]
(2) CMOS cannot be used, but an FET or GaAs bipolar circuit can be used instead, and is therefore advantageous in high-speed processing. [0250]
(3) By using high-speed processing capability, it is possible to convert parallel data to serial data and then transfer. [0251]
(4) In this structure, GaAsN is a direct transition type, and therefore can also be used as a light emitting element. [0252]
This embodiment uses a spherical GaAs substrate, but this embodiment is not limited to this substrate. [0253]
(Embodiment [0254] 10: III-VN on Spherical InP Substrate)
Using a spherical InP substrate for the substrate makes it possible to obtain other effects. [0255]
This embodiment will be explained using FIG. 24 again. [0256]
(Production of Ball IC) [0257]
As shown in FIG. 21, an IC [0258] 3102 is produced on the hemispherical surface (here, northern hemisphere) of the undoped spherical InP substrate (1 mmφ) 3101. This IC may be a drive IC or parallel-serial conversion circuit in the case of a light emitting element, and the IC may be a bias circuit, preamp, waveform shaping circuit or serial-parallel conversion circuit in the case of a light receiving element. Of course, when the IC is used for both functions, appropriate electronic circuits need to be added. These circuits can be made through a normal FET or Bipolar process. Since it has a smaller band gap and a higher mobility compared with GaAs, it is possible to use a high-speed driver circuit.
(Production of Optical Device) [0259]
After the InP ball IC process is almost completed, an optical device is produced. First, the entire sphere is covered with a nitride film, etc. and the region where the optical device is made is ground and polished to form a smooth surface. The sphere is covered with the nitride film in order to protect the electronic device during the optical device process and to be used as a selective growth mask. It is desirable to form a film with small stress to cover the spherical surface. As the region for producing the optical device, this embodiment uses plane (111) in the southern hemisphere and planes associated therewith (four planes in total; (100), (010), (−100), (0-10)) [0260] 3301 (triangular plane of approximately 20 μm per side). FIG. 22 is a plan view of FIG. 21 viewed from the S-pole direction. FIG. 23 is a sectional view of one of these planes. The entire surface may be covered with a nitride film, etc. again if necessary and a window is made only in the region for producing the device. Since selective growth takes place according to the shape of the opening, this embodiment controls the opening so that it becomes cylindrical. Here, the (111) equivalent plane is selected for the following reasons.
(1) Because they are chemically equivalent to each other, it is possible to make a uniform structure in the subsequent crystal growth. (If another crystalline plane is included, anisotropy occurs in aspects of composition, film thickness and direction of crystal growth.) [0261]
(2) In the plane contacting S-pole (in the light propagation direction), it is possible to emit light in at least four directions or receive light from at least four directions. This is not limited to the (111) equivalent plane provided that other planes have an equivalent function or higher function.) [0262]
(Crystal Growth) [0263]
The structure of the device will be explained using FIG. 24. First, InP is stacked as a buffer layer [0264] 3501 on only a selected region (opening part) using a gas source MBE (molecular beam epitaxy) method or MOCVD (metal-organic chemical vapor deposition) method. Then, InGaP is further stacked thereon while changing gradually the In composition so that it provides lattice matching with In0.9Ga0.1P. After this, the n-InAlGaP clad layer 3502, GaInNP/InAlGaPMQW (Multiple Quantum Well) active layer (light emitting wavelength: 1.5 μm) 3503, p-InAlGaP clad layer 3504 and p-InGaP contact layer 3505 are stacked one after another. After the light input/output window 3507 is attached, a positive electrode 3506 is formed. Then, a negative electrode is formed from inside the sphere at a desired position, unnecessary nitride films are removed, wires are connected to the IC electrodes, and in this way this embodiment is completed.
(Mounting) [0265]
A mounting example is shown in FIG. 25. In FIG. 25, reference numeral [0266] 3601 denotes a substrate made of PMMA, etc., and 3602 denotes the optical waveguide core layer made of polyimide, etc. formed thereon. On top of this, a clad layer 3603 such as of PMMA is further formed. A cavity is formed on this clad layer 3603 and core layer 3602 using photolithography, etc. so that the above-described spherical optoelectronic device can fit therein. After this, the device is fixed with UV-hardened resin, etc. (not shown). Then, contact with the printed wiring substrate 3605 is made using the Au bump 3606.
(Principle of Operation) [0267]
In the case of an operation as a light receiving device, by applying a reverse bias to the optical device, the light incident upon the incident light window from a wide range of angles is absorbed by the pn junction and taken in as an electric signal by an adjacent electronic device. Since InGaPN has a smaller band gap than InP, InGaPN operates on a lower voltage than InP. Furthermore, InGaPN has a greater mobility speed than Si, and can therefore respond fast. Since InGaPN is a direct transition type compound semiconductor, it can also be used as a light emitting element. When InGaPN is operated as a light emitting element, by applying a forward bias to the optical device in FIG. 20 or FIG. 22, the light emitted from the pn junction is emitted from the light emitting window in a wide range of angles. This may be driven by the logic data itself or driven through a driver circuit. The surfaces of both the light emitting device and light receiving device are spherical, this embodiment has a major feature of being capable of emitting and receiving light in a wide range of angles. [0268]
(Effects) [0269]
This embodiment has the following effects. [0270]
(1) Use of a small band gap has smaller burden on the electric circuit. [0271]
(2) It is possible to produce a faster circuit than Si or GaAs. [0272]
(3) Because 1.5 μm band light can be used, it is possible to directly couple with a low loss fiber without any relay circuit and carry out long-distance high-speed transmission. [0273]
(Embodiment [0274] 11: III-VN on GaN Substrate)
Using a spherical GaN substrate for the substrate makes it possible to obtain other effects. [0275]
This embodiment will be explained using FIG. 24 and others again. [0276]
(Production of Ball IC) [0277]
As shown in FIG. 21, an IC [0278] 3102 is formed on the hemispherical surface (here, northern hemisphere) of the undoped spherical GaN substrate (1 mmφ) 3101. This IC may be a drive IC or parallel-serial conversion circuit in the case of a light emitting element, and the IC may be a bias circuit, preamp, waveform shaping circuit or serial-parallel conversion circuit in the case of a light receiving element. Of course, when the IC is used for both functions, appropriate electronic circuits need to be added. These circuits can be made by combining a normal FET or Bipolar process (e.g., S.C. Binari, K. Doverspike, G. Kelner H. B. Dietrich, and A. E. Wickenden; Solid State Electronics, 41 (1997), p. 97 or S. Yoshida and J. Suzuki; Journal of Applied Physics Letters, 85 (1999), p. 7931, etc.) and spherical Si process (see Embodiment 8). Since its band gap is by far larger than Si, and has therefore performance indices different from Si and other III-V materials such as capability of high temperature, high voltage and high frequency operations.
(Production of Optical Device) [0279]
After the GaN ball IC process is almost completed, an optical device is produced. First, the entire sphere is covered with a nitride film (SiN, etc.) and the region where the optical device is made is ground and polished to form a smooth surface. The sphere is covered with the nitride film in order to protect the electronic device during the optical device process and to be used as a selective growth mask. It is desirable to form a film with small stress to cover the spherical surface. As the region for producing the optical device, this embodiment uses plane (111) in the southern hemisphere and planes associated therewith (four planes in total; (100), (010), (−100), (0-10)) [0280] 3301 (triangular plane of approximately 20 μm per side). FIG. 22 is a plan view of FIG. 21 viewed from the S-pole direction. FIG. 23 is a sectional view of one of these planes. The entire surface may be covered with a nitride film, etc. again if necessary and a window is made only in the region for producing the device. Since selective growth takes place according to the shape of the opening, this embodiment controls the opening so that it becomes cylindrical. Here, the (111) equivalent plane is selected for the following reasons.
(1) Because they are chemically equivalent to each other, it is possible to make a uniform structure in the subsequent crystal growth. (If another crystalline plane is included, anisotropy occurs in aspects of composition, film thickness and direction of crystal growth.) [0281]
(2) In the plane contacting S-pole (in the light propagation direction), it is possible to emit light in at least four directions or receive light from at least four directions. This is not limited to the (111) equivalent plane provided that other planes have an equivalent function or higher function.) [0282]
(Crystal Growth) [0283]
The structure of the device will be explained using FIG. 24. First, GaN is stacked as a buffer layer [0284] 3501 on only a selected region (opening part) using a gas source MBE (molecular beam epitaxy) method or MOCVD (metal-organic chemical vapor deposition) method. Then, the n-AlGaN clad layer 3502, GaInN/AlGaNMQW (Multiple Quantum Well) active layer (light emitting wavelength: 0.4 μm) 3503, p-AlGaN clad layer 3504 and p-GaN contact layer 3505 are stacked one after another. After the light input/output window 3507 is attached, a positive electrode 3506 is formed. Then, a negative electrode is formed from inside the sphere at a desired position, unnecessary nitride films are removed, wires are connected to the IC electrodes, and in this way this embodiment is completed.
(Mounting) [0285]
A mounting example is shown in FIG. 25. In FIG. 25, reference numeral [0286] 3601 denotes a substrate such as of PMMA and 3602 denotes the optical waveguide core layer made of polyimide, etc. formed thereon. On top of this, a clad layer 3603 such as of PMMA is further formed. A cavity is formed on this clad layer 3603 and core layer 3602 using photolithography, etc. so that the above-described spherical optoelectronic device can fit therein. After this, the device is fixed with UV-hardened resin, etc. (not shown). Then, contact with the printed wiring 3605 is made using the Au bump 3606.
(Principle of Operation) [0287]
In the case of an operation as a light receiving device, it is completely carried out in the same manner as in the case of Embodiment 8. That is, by applying a reverse bias to the optical device, the light incident upon the incident light window from a wide range of angles is absorbed by the pn junction and taken in as an electric signal by an adjacent electronic device. Since GaN has a much smaller band gap than Si, GaAs or InP, GaN requires a high voltage. On the other hand, it has an advantage that it is capable of high temperature operation for both the electronic device and optical device. When GaN is operated as a light emitting element, by applying a forward bias to the optical device in FIG. 20 or FIG. 22, the light emitted from the pn junction is emitted from the light emitting window in a wide range of angles. This may be driven by the logic data itself or driven through a driver circuit. [0288]
Since the surfaces of both the light emitting device and light receiving device are spherical, this embodiment has a major feature of being capable of emitting and receiving light in a wide range of angles. [0289]
This embodiment has the following effects. [0290]
(1) Because of a large band gap, it is possible to operate at a high temperature. [0291]
(2) High voltage operation can be carried out compared with Si and GaAs. [0292]
(3) Because 0.4 μm band light can be used, ON/OFF can be confirmed by naked eyes. [0293]
(Embodiment 12: Single Layer Electric Wiring Layer+Optical Wiring Layer+Photonic Ball IC) [0294]
FIG. 26 is a schematic view for illustrating another embodiment of the present invention. [0295]
In FIG. 26, reference numeral [0296] 4101 denotes a support substrate; 4107 and 4108, an optical wiring layer and electric wiring layer formed thereupon. Reference numeral 4102 denotes an IC chip mounted on an electric wiring layer 4107.
FIG. 27 is an enlarged view of the portion [0297] 27 of FIG. 26 and reference numeral 4103 denotes a bump for mounting the IC 4102 (e.g., ball solder); 4104 a photonic ball; 4105, an electrode pad for electrically connecting these components. 4106 and 4109 denote a two-dimensional optical waveguide (hereinafter referred to as “optical film”) and clad layer that make up an optical wiring layer 4108. This configuration is referred to as a “optoelectronic substrate”.
In this embodiment, when the IC chip [0298] 4102 is connected to an electric wiring layer 4107, a plurality of metal bumps are used (FIG. 26). A part of the metal bumps is replaced with photonic ball ICs 4104 of almost the same size. A part of photonic ball ICs 4104 are embedded in the optical wiring layer 4108.
Whem the optical wiring layer [0299] 4108 is formed, it is set that the substrate 4111 is 0.5 mm thick, the core layer 4106 is 0.1 mm thick and the clad layer 4109 is 0.3 mm thick, but they are not limited to these sizes. The clad layer may be omitted.
For the electric wiring layer [0300] 4107, it is possible to use a thermal fusion type resin material (0.3 mm thick) with a built-in single-layer Cu micro strip line 4110.
(Photonic Ball IC) [0301]
One of the features of the present invention is that the IC chip is mounted on the optoelectronic board through an EO or OE device. [0302]
Then, the photonic ball IC, which is an example of this EO or OE device, will be explained in short below (its production method is described, for example, in Japanese Patent Application Laid-Open No. 2001-284635). [0303]
In FIG. 28, reference numeral [0304] 4201 denotes an undoped spherical Si substrate (e.g., 1 mmφ); 4202, an IC formed on the hemispherical surface (here, northern hemispherical surface). Reference numeral 4203 denotes an optical device such as a light emitting element or light receiving element formed on the southern hemispherical surface (here, it is possible to use a GaInNAs/AlGaAs-based planar light emitting laser or planar photodiode formed or the four planes equivalent to (111)).
When integrated with the light emitting element [0305] 4203, the IC 4202 may be a drive IC or parallel-serial conversion circuit. When integrated with the light receiving element 4203, the IC 4202 may be a bias circuit, preamp, waveform shaping circuit or serial-parallel conversion circuit. Of course, when the IC is used for both functions, appropriate electronic circuits need to be added. These circuits can be made through a normal CMOS process and its logic voltage is 3.3 V.
FIG. 29 shows another mode of the photonic ball IC. In FIG. 29, the electronic circuit is the same as above, but the optical device is very different. Reference numeral [0306] 4305 is a hemispherical active layer and in the case of a light emitting device, carriers injected from the optical device electrode 4307 re-couple and emit light. In the case of a light receiving device, a reverse bias is applied to the active layer 4305 and the received light forms an electron-hole pair. The active layer 4305 is spherical in both cases, and therefore it is possible to perform EO or OE conversion with high efficiency without preparing any special optical system.
(Mounting Photonic IC on Optoelectronic Board) [0307]
Then, the method of mounting this spherical optical device will be explained. First, a hemispherical cavity is made on the surface of the optoelectronic board (the electric wiring layer [0308] 4107 in this embodiment) to allow the above-described photonic ball IC to fit therein.
The method of making the cavity is the same as that described above. [0309]
Then, the optical device is mounted in the cavity of the optical sheet in such a way that the optical device comes to the bottom side. To allow light to be taken in or out, the optical device is positioned and fixed in such a way that the optical I/O section touches the bottom of the cavity (see FIG. 30). After the positioning, the optical device can be fixed with UV-hardened resin, etc. [0310]
Then, electrical connections are made using a flip chip mounting method. In FIG. 30, reference numeral [0311] 4103 denotes a bump and 4105 denotes an electrode pad. The bump is placed on the electrode pad 4105 on the IC side, the above-described photonic ball IC 4104 is positioned with the substrate, the bump is melted by reflow and then cooled down, thus making it possible to obtain an electrical contact all at once.
Thus, performing flip chip mounting and photonic ball IC mounting simultaneously not only simplifies processes but also increases mechanical strength of the photonic ball IC. [0312]
Here, the bump is assumed to be rectangular but it is not necessary to stick to this form. Finally, the gap between the IC chip and optoelectronic board is filled with a refilling material, etc. (not shown), which creates a more stable mounting condition. Of course, it is also possible to mount BGA (Ball Grid Array) on the bump using ball solder. [0313]
(Principle of Operation) [0314]
Then, the principle of operation will be explained. [0315]
(Transmission Function) [0316]
In FIG. 30, the electrode pad [0317] 4105 of the LSI 4102 can send or receive a signal to or from adjacent electronic devices via the bump 4104. The LSI logic signal (e.g., 3.3 V in the case of CMOS) is a voltage enough to directly drive the above-described spherical optical device.
Applying a logic signal, which constitutes a forward bias, to a light emitting device (e.g., LED) on the photonic ball IC [0318] 4104 causes the electric signal to convert to an optical signal (when power is required or when a predetermined bias voltage should be applied, a driver circuit or bias may be built in on the photonic ball IC). The emitted light is output to the core layer 4106 and spreads and propagates over the entire optical sheet as the output light 4109 without any special optical system. If the size of the substrate is about 30 mm per side and propagation loss is 0.3 dB/cm or less, light output of about 1 mW is enough to obtain reception input necessary for minimum reception sensitivity.
(Reception Function) [0319]
On the contrary, when the input optical signal [0320] 4110 that propagates through the optical wiring layer (optical film) 4108 in an arbitrary direction reaches the surface of the light receiving element 4102 of the photonic ball IC, it is taken in, absorbed near a reverse-biased pn junction and converted to an electronic signal. The converted electric signal is taken in the adjacent LSI 4102 as an input electronic signal and processed by the adjacent LSI 4102. (Electric parallel/optical serial transmission) Electric parallel/optical serial transmission will be explained using FIG. 31. In FIG. 31, reference numeral 4601 denotes an optoelectronic board; 4602 and 4608, CPUs; 4603, a RAM shared by these two CPUs; 4604, other devices; 4605, electric wiring; 4606, optical wiring.
Normal electric wiring requires, for example, 64-bit data lines with 6 transmission paths. There is no problem with low-speed data processing, whereas an application involving large-volume and high-speed data transfer (moving images, etc.) is susceptible to influences from operations of other devices mounted on the substrate or influences of EMI. It is extremely difficult for conventional wiring to constantly send stable data. Optical wiring is used only for such an application. [0321]
For example, in FIG. 31, 6 electric wires are necessary to send 64-bit data from the CPU [0322] 4602 to RAM 4603, but if parallel-serial conversion is performed at the final stage of the CPU and one optical I/O element is connected, an electric signal is sent as an optical signal through the optical waveguide section of the optoelectronic board, received by the optical I/O element on the receiving side and serial-parallel converted into a 64-bit parallel signal. The parallel-serial conversion increases the clock but there is no problem of EMI because the signal propagates through the optical waveguide.
Use of a flip chip mounting or BGA method as the mounting method provides an easy way of mounting without applying an additional mounting method for optical wiring. The BGA (Ball Grid Array) method is a method of connecting an IC electrode pad and substrate electrode pad in array form using solder called “bump” and has excellent characteristics such as faster operation, smaller area occupied and lower resistance compared to conventional wire bonding. [0323]
Typical sizes of BGA pitch and ball solder are about 1 mm and 0.50 mmφ respectively. That is, if the above-described photonic ball IC is 1 mmφ or below, it is possible to use a normal BGA process. [0324]
The photonic ball IC consists of an electronic device and optical device integrated on a spherical semiconductor substrate (usually spherical Si substrate), and this photonic ball IC alone can perform OE/EO conversions. Using a photonic ball IC that can be directly driven with the voltage of a logic signal from an LSI on the optoelectronic board requires no special additional circuit. Because it is spherical, the photonic ball IC can also be optically coupled with the optical film section of the above-described optoelectronic board without requiring any special optical system. [0325]
(Embodiment 13: Changing Sequence of Electric Wiring Layer and Optical Wiring Layer) [0326]
FIG. 32 is a schematic view for illustrating another embodiment of the present invention. This embodiment differs from Embodiment 12 in that the electric wiring layer consists of multiple layers and the optical wiring layer is stacked thereon. [0327]
In FIG. 32, reference numeral [0328] 4107 denotes an electric wiring layer containing multi-layer internal wiring 110, and reference numeral 4108 denotes an optical wiring layer (optical film) composed of the core layer 4106 and clad layers 4109 and 4111.
On the outermost surface of the optical wiring layer, an electrode pad [0329] 4105 and wiring pattern (not shown) are arranged, and the electric wiring layer 4107 is coupled through a via hole 4110. This via hole penetrates the optical wiring layer and since light propagates two-dimensionally, there is little influence unless the via is densely formed.
An effect specific to this embodiment is that the optical wiring layer can be placed independently of the thickness of the electric wiring layer. [0330]
(Embodiment 14: Inserting Two Optical Sheets in a Multi-Layer PCB Substrate) [0331]
FIG. 33 is a schematic view for illustrating another embodiment of the present invention. This embodiment differs from Embodiment 12 in that not only an electric wiring layer but also an optical film are formed on both sides. [0332]
In FIG. 33, reference numeral [0333] 4101 is a support substrate and the structure in Embodiment 13 is formed on both sides of the support substrate. Furthermore, forming a via hole 4111 that penetrates the support substrate 4101 allows both sides to be electrically connected. Other processes are the same as those in Embodiment 12 or Embodiment 13.
As a special case, the support substrate [0334] 4101 may be removed.
FIG. 34 is a schematic view illustrating this embodiment. [0335]
The optoelectronic board consists of a pair of optical wiring layers ([0336] 4108) and one multi-layer wiring layer (4107). Use of flexible materials for both the multi-layer wiring layer and optical wiring layer provides an optoelectronic flexible board.
Features of this configuration are not only that the mounting area can be increased but also that it is possible to provide EMI-free optical wiring using an optical film in such a situation that wires in the multi-layer wiring layer are close to each other and EMI is not negligible, and that removing the support substrate provides a more flexible substrate. For example, it is also possible to bend the substrate itself 90 degrees and mount it. [0337]
As described above, the present invention can provide a semiconductor device having reduced direction dependency when light propagating through the optical transmission region (optical sheet) is received. [0338]
an optical transmission region; and
a light receiving part for converting light propagating through the optical transmission region to an electrical signal,
wherein the optical transmission region comprises a two-dimensional optical waveguide layer, and wherein at least a portion of the light receiving part is embedded in the optical transmission region.
2. The semiconductor device according to claim 1, wherein an electric wiring layer is stacked on the optical transmission region.
3. The semiconductor device according to claim 1, wherein the light receiving part is embedded in the optical transmission region such that the light receiving part can directly receive light propagating through the two-dimensional optical waveguide layer.
4. The semiconductor device according to claim 1, wherein the light receiving part is embedded such that the light receiving part can receive light propagating within a plane of the two-dimensional optical waveguide layer without directivity.
5. The semiconductor device according to claim 1, wherein the at least a portion of the light receiving part embedded in the optical transmission region has a spherical surface.
6. The semiconductor device according to claim 1, wherein the light receiving part includes a spherical device.
7. The semiconductor device according to claim 1, wherein a portion of a light emitting part for transmitting light to the optical transmission region is embedded in the optical transmission region.
8. The semiconductor device according to claim 2, wherein the optical transmission region is interposed between the electric wiring layer located on the optical transmission region and another electric wiring layer located under the optical transmission region, and wherein at least a portion of the electric wiring layer is electrically connected to at least a portion of the another electric wiring layer by a via hole for penetrating the optical transmission region.
9. The semiconductor device according to claim 2, wherein at least one of O/E conversion or E/O conversion between an electronic device provided on the electric wiring layer and the optical transmission region is performed using a spherical device.
10. An optoelectronic board comprising at least two layers consisting of a first layer and a second layer, the first layer including the electronic device, the optical device and an electric wiring for coupling the electric and optical devices, and the second layer including a two-dimensional optical waveguide, wherein the optical device comprises a light receiving part for receiving optical waveguided through the two-dimensional optical waveguide, and wherein at least a portion of the light receiving part is embedded in the two-dimensional optical waveguide.
11. The optoelectonic board according to claim 10, wherein the two-dimensional optical waveguide has a sheet-shaped form.
12. The optoelectronic board according to claim 10, wherein the light receiving part has a spherical structure, the light receiving part is mounted from a surface of the substrate such that the light receiving part is embedded in the optical waveguide, and the light receiving part is coupled with the electric wiring on the surface of the substrate.
13. The optoelectronic board according to claim 10, wherein the optical device is provided with a light receiving part and an electric circuit for driving the light receiving part or amplifying an electric signal obtained.
14. The optoelectronic board according to claim 10, wherein a light source of the optical device has a spherical shape, is mounted on the substrate from a surface thereof such that the light source embedded in the optical waveguide of the substrate, and coupled with the electric wiring on the surface of the substrate.
15. The optoelectronic board according to claim 10, the substrate further comprising: a transmission device for transmission having a spherical structure; and a parallel signal line, wherein an output terminal of the parallel signal line is coupled with the transmission device for transmission, and wherein the transmission device for transmission conducts parallel/serial conversion and sends a serial optical signal to the two-dimensional optical waveguide.
16. The optoelectronic board according to claim 15, wherein the serial optical signal is received by the light receiving part embedded in the two-dimensional optical waveguide, converted to an electric signal, subjected to serial/parallel conversion by an electronic circuit simultaneously formed on the light receiving part and transmitted to the parallel signal line.
17. The optoelectronic board according to claim 10, wherein the optoelectronic board is made of a flexible substrate material.
18. An optoelectronic integrated circuit comprising an electronic device and optical device integrated on a surface of a spherical semiconductor substrate, wherein the optical device is a light receiving element includes a multi-layer film containing a pn junction, the electronic device includes at least a bias circuit for applying a reverse bias to the light receiving element, and an amplifier for amplifying a signal obtained by converting a received light to an electric signal.
19. The optoelectronic integrated circuit according to claim 18, wherein at least a portion of the light receiving element is embedded in an optical transmission medium.
20. The optoelectronic integrated circuit according to claim 18, wherein the spherical semiconductor substrate is made of an Si single crystal.
21. The optoelectronic integrated circuit according to claim 18, wherein the spherical semiconductor substrate is made of a GaAs single crystal.
22. The optoelectronic integrated circuit according to claim 18, wherein the multi-layer film of the light receiving element is made of p-Si, i-Si and n-Si.
23. The optoelectronic integrated circuit according to claim 18, wherein the multi-layer film of the light receiving element is made of p-GaAs, GaAsN and n-GaAs.
24. A method of producing the optoelectronic integrated circuit according to claim 18, which comprises forming the multi-layer film of the light receiving element by ion implantation.
25. An optoelectronic integrated circuit comprising an electronic device and optical device integrated on a surface of a spherical semiconductor substrate, wherein the optical device is a light emitting element includes a multi-layer film containing a pn junction in a radial direction of the spherical semiconductor substrate, and the electronic device comprises a bias circuit that applies a forward bias to said light emitting element.
26. The optoelectronic integrated circuit according to claim 25, wherein at least a portion of the light emitting element is embedded in an optical transmission medium.
27. An optoelectronic integrated circuit comprising an electronic device and optical device integrated on a surface of a spherical semiconductor substrate, wherein the optical device is formed by flatting a portion of the surface of the spherical semiconductor substrate and thereby exposing a plurality of small planes, and stacking a multi-layer film containing a pn junction on the small planes, and the electronic device includes at least a bias circuit for applying a reverse bias or a forward bias thereto.
28. The optoelectronic integrated circuit according to claim 27, wherein the optical device is embedded in an optical transmission medium.
29. The optoelectronic integrated circuit according to claim 27, wherein the spherical semiconductor substrate is made of an Si single crystal.
30. The optoelectronic integrated circuit according to claim 27, wherein the spherical semiconductor substrate is made of a GaAs single crystal.
31. The optoelectronic integrated circuit according to claim 27, wherein the spherical semiconductor substrate is made of an InP single crystal.
32. The optoelectronic integrated circuit according to claim 27, wherein the spherical semiconductor substrate is made of a GaN single crystal.
33. The optoelectronic integrated circuit according to claim 27, wherein the multi-layer film containing the pn junction is composed of p-(Al, Ga)(As, P, N), i-(Al, Ga)(As, P, N), n-(Al, Ga)(As, P, N).
34. A method of producing the optoelectronic integrated circuit according to claim 27, comprising the steps of flattening a portion of a surface of the spherical semiconductor substrate, exposing a plurality of small planes, and stacking a multi-layer film containing a pn junction on the small planes in the radial direction, a region other than the small planes on the surface of the spherical semiconductor substrate is covered with a dielectric film, and the multi-layer film containing the pn junction is selectively stacked only on the small planes by organic metal epitaxial growth or gas source molecular beam vapor deposition.
35. A method of producing the optoelectronic integrated circuit according to claim 34, wherein the small planes obtained by flattening a portion of the surface of the spherical semiconductor comprises crystal planes equivalent to one another in terms of crystal engineering or chemically similar to one another.
US10025928 2000-12-28 2001-12-26 Semiconductor device, optoelectronic board, and production methods therefor Expired - Fee Related US6897430B2 (en)
JP400966/2000 2000-12-28
JP2000400966 2000-12-28
JP379831/2001 2001-12-13
JP2001379831A JP2002286959A (en) 2000-12-28 2001-12-13 Semiconductor device, photoelectric fusion substrate and manufacturing method for the same
US11076991 US6936808B2 (en) 2000-12-28 2005-03-11 Semiconductor device, optoelectronic board, and production methods therefor
US11188748 US7141778B2 (en) 2000-12-28 2005-07-26 Semiconductor device, optoelectronic board, and production methods therefor
US20020109074A1 true true US20020109074A1 (en) 2002-08-15
US6897430B2 US6897430B2 (en) 2005-05-24
ID=26607076
US10025928 Expired - Fee Related US6897430B2 (en) 2000-12-28 2001-12-26 Semiconductor device, optoelectronic board, and production methods therefor
US11076991 Expired - Fee Related US6936808B2 (en) 2000-12-28 2005-03-11 Semiconductor device, optoelectronic board, and production methods therefor
US (2) US6897430B2 (en)
EP (1) EP1219994B1 (en)
JP (1) JP2002286959A (en)
DE (1) DE60144137D1 (en)
US20110235965A1 (en) * 2008-10-03 2011-09-29 Sony Corporation Semiconductor device
JP2004031508A (en) * 2002-06-24 2004-01-29 Nec Corp Optoelectric composite module and light inputting/outputting device with its module as configuring element
JP2004317717A (en) 2003-04-15 2004-11-11 Canon Inc Reconfigurable photoelectric fusion circuit
JP4510532B2 (en) * 2003-07-01 2010-07-28 パナソニック株式会社 Mount assembly, an optical transmission line and optical electrical circuit board
EP1679749A1 (en) * 2005-01-11 2006-07-12 Ecole Polytechnique Federale De Lausanne Epfl - Sti - Imm - Lmis3 Semiconductor photodiode and method of making
JP2009283801A (en) * 2008-05-26 2009-12-03 Nippon Telegr & Teleph Corp <Ntt> Optical semiconductor device
CN104977086A (en) * 2014-04-01 2015-10-14 热映光电股份有限公司 External temperature sensing module, temperature sensing method and temperature sensing system thereof
JPS6128240B2 (en) 1978-06-23 1986-06-28 Toshiba Electric Equip
JPS58225746A (en) 1982-06-24 1983-12-27 Ricoh Co Ltd Optical path for control
JPH0517712B2 (en) 1982-10-25 1993-03-09 Kogyo Gijutsuin
JPH0642527B2 (en) 1989-10-10 1994-06-01 日本電気株式会社 The information processing apparatus using the optical waveguide
JPH08220357A (en) 1995-02-15 1996-08-30 Gijutsu Kenkyu Kumiai Shinjoho Shiyori Kaihatsu Kiko Optical connecting device and its production
JPH0996746A (en) 1995-09-29 1997-04-08 Fujitsu Ltd Active optical circuit sheet or active optical circuit board
JPH10294254A (en) 1997-04-17 1998-11-04 Canon Inc Aligner for spherical device and manufacture thereof
JPH1172750A (en) 1997-08-29 1999-03-16 Gijutsu Kenkyu Kumiai Shinjoho Shiyori Kaihatsu Kiko Free space light wiring optical device
JPH11111609A (en) 1997-10-02 1999-04-23 Ball Semiconductor Kk Illuminator for spherical semiconductor
DE69841305D1 (en) 1997-12-10 2010-01-07 Seiko Epson Corp Entzifferungs / Verzifferungssystem
JP3955394B2 (en) 1998-07-09 2007-08-08 ボールセミコンダクター株式会社 Method of manufacturing a spherical semiconductor device
JP2000031189A (en) 1998-07-09 2000-01-28 Ball Semiconductor Kk Spherical semiconductor device
JP4270647B2 (en) 1999-05-31 2009-06-03 ボールセミコンダクター株式会社 Inclinometer
JP3689615B2 (en) 2000-03-29 2005-08-31 キヤノン株式会社 Optoelectronic devices having three-dimensional shape
JP2001280973A (en) * 2000-03-31 2001-10-10 Canon Inc Three-dimensional ring laser device and gyrocompass using the same
US7869671B2 (en) 2002-02-28 2011-01-11 Pansonic Corporation Three-dimensional optical waveguide, method of manufacturing same, optical module, and optical transmission system
US7580605B2 (en) * 2002-02-28 2009-08-25 Matsushita Electric Industrial Co., Ltd. Three-dimensional optical waveguide, method of manufacturing same, optical module, and optical transmission system
US7386200B2 (en) 2002-12-11 2008-06-10 Canon Kabushiki Kaisha Photonic circuit board
US9035411B2 (en) * 2008-10-03 2015-05-19 Sony Corporation Semiconductor device
US9240527B2 (en) 2009-06-05 2016-01-19 Advanced Photonics, Inc. Submount, optical module provided with submount, and submount manufacturing method
EP1219994A3 (en) 2004-11-10 application
US20050151062A1 (en) 2005-07-14 application
US6936808B2 (en) 2005-08-30 grant
DE60144137D1 (en) 2011-04-14 grant
US6897430B2 (en) 2005-05-24 grant
EP1219994B1 (en) 2011-03-02 grant
JP2002286959A (en) 2002-10-03 application
EP1219994A2 (en) 2002-07-03 application
US4862231A (en) 1989-08-29 Non-contact I/O signal transmission in integrated circuit packaging
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:UCHIDA, MAMORU;REEL/FRAME:012747/0549