Source: http://www.google.com/patents/US7409158?ie=ISO-8859-1
Timestamp: 2016-02-09 16:00:26
Document Index: 582463908

Matched Legal Cases: ['art 100', 'art 100', 'art 100', 'art 100', 'art 100', 'art 100', 'art 100', 'art 100']

Patent US7409158 - Large-capacity optical router using electric buffer - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA large-capacity optical router is disclosed that exchanges data traffic such as IP packets, Ethernet frames, etc., at high speed in units of optical frames. The large-capacity optical router uses an electric buffer including input ports, output ports, an add port for inputting data received from a lower...http://www.google.com/patents/US7409158?utm_source=gb-gplus-sharePatent US7409158 - Large-capacity optical router using electric bufferAdvanced Patent SearchPublication numberUS7409158 B2Publication typeGrantApplication numberUS 10/638,983Publication dateAug 5, 2008Filing dateAug 12, 2003Priority dateFeb 4, 2003Fee statusPaidAlso published asCN1520196A, CN100420309C, EP1445975A2, EP1445975A3, EP1445975B1, US20040151171Publication number10638983, 638983, US 7409158 B2, US 7409158B2, US-B2-7409158, US7409158 B2, US7409158B2InventorsKi-Cheol Lee, Yun-Je Oh, Sang-Hyun Doh, Jong-Kwon KimOriginal AssigneeSamsung Electronics Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (16), Classifications (23), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetLarge-capacity optical router using electric buffer
US 7409158 B2Abstract
an add port configured to input data received from a lower Internet protocol (IP) router;
a drop port configured to output data to the IP router;
a wavelength division demultiplexing section arranged to wavelength-division-demultiplex wavelength signals input through the input ports and the add port;
an input interface arranged to convert optical frames input from the wavelength division demultiplexing section into electrical signals, to separate a header from the electric signal, and to convert the electrical signals to optical frames;
an optical switch configured to perform a high-speed switching of the optical frames output from the input interface;
a drop interface arranged to process the optical frames transmitted to the IP router via the wavelength division multiplexing section;
a header processor arranged to recognize header information and to control the optical router, and to read an address of a destination by using the header received from the input interface;
an optical switch controller arranged to control a connection state of the optical switch and to switch the optical frames;
a header reinserter arranged to reinsert headers into outputs of the optical router, said headers being inserted at a rate such that the data frame rate is an integer number of the header rate; and
an edge traffic aggregator including an ingress part and an egress part, the ingress part configured to convert IP packets input from the IP router into optical frames, and the egress part configured to convert the optical frames into IP packets and to transmit the converted packets to the lower IP router,
the input interface comprises a buffer being arranged to store the electrical signals and being configured to perform synchronization, and the output interface converting optical frames input from the optical switch into electric signals and recovering optical signals and reinserting headers received from the header inserter.
2. The optical router as claimed in claim 1, wherein the wavelength division demultiplexing section includes a plurality of wavelength division demultiplexers.
an optical receiver arranged to convert an optical frame input from the wavelength division demultiplexing section into an electrical signal;
a header length detector being coupled to the optical receiver and the buffer and being arranged to extract a header length in order to separate a header from the electrical signal;
an optical transmitter being coupled to the queue, being arranged to restore the electrical signal to the optical frame in order to transmit the data to the optical switch;
a header reinserting section arranged to insert a new header output from the header processor,
wherein the buffer is coupled to the optical receiver.
an optical receiver arranged to convert optical frames input from the wavelength division demultiplexing section into electrical signals;
a header reinserting section arranged to insert new headers output from the header processor,
a first electric switch coupled to the plurality of packet processors;
a second electric switch arranged to transmit the optical data of which the output order and the wavelength are determined;
12. The optical router as claimed in claim 11, wherein the data frame assembler divides and stores the switched packets by destinations in the buffers, and when a predetermined amount of data is accumulated, it processes the data by buffers; and
14. The optical router as claimed in claim 1, wherein the edge traffic aggregator converts the packets input from the IP router into the optical frames of a predetermined length according to addresses of destinations, the input interface processes the optical francs through an optical/electric/optical conversion, the optical switch performs a switching of the optical frames, and the output interface processes the optical frames through the optical/electric/optical conversion again and ten transmits the optical frames to a next optical router node or the edge traffic aggregator.
15. The optical router as claimed in claim 1, wherein the ingress part is configured to convert the packets input from the IP router into the data frames of a predetermined length according to addresses of destinations, and to combine the headers with the data frames to transmit the combined optical frames.
18. The optical router as claimed in claim 1, wherein the output interface section includes a header reinserting section arranged to insert a new header into the data frame switched by the optical switch. Description
This application claims priority to an application entitled “Large-capacity optical router using electric buffer,” filed in the Korean Intellectual Property Office on Feb. 4, 2003 and assigned Ser. No. 2003-6871, the contents of which are hereby incorporated by reference.
FIG. 1 is a diagram illustrating the construction of a conventional all optical router, which will be used to discuss the first method for constructing the large-capacity router.
As illustrated in FIG. 1, optical data is exchanged through a space switch 14 composed of on-off gate switches 14-3. Any collision occurring in the optical data is prevented using a variable wavelength converter and an optical-fiber delay-line buffer 16. In addition, the optical data is switched using a variable wavelength converter and a wavelength router such as an N�N arrayed waveguide grating (AWG). Data collision is prevented through use of an optical-fiber delay line.
FIG. 1 is a diagram illustrating the construction of a conventional all optical router.
FIG. 2 is a diagram illustrating the construction of a large-capacity optical router according to an embodiment of the present invention.
FIG. 3 is a block diagram of an input interface section of FIG. 2.
FIG. 4 is a block diagram of a queue included in the input interface section of FIG. 3.
FIG. 5 is a block diagram of an output interface section of FIG. 2.
FIG. 6 is a diagram illustrating the construction of an optical frame that is separated into a header and a data frame by a switch illustrated in FIG. 3.
FIG. 7 is a block diagram of an ingress part of an edge traffic aggregator of FIG. 2.
FIG. 8 is a block diagram of an egress part of an edge traffic aggregator of FIG. 2.
FIG. 9 is a block diagram of another embodiment of the input interface section of FIG. 3.
FIG. 10 is a block diagram of another embodiment of the output interface section of FIG. 5.
A wavelength division demultiplexing section 20 wavelength-division-demultiplexes wavelength signals λ1 to λN input through the input ports INPUT 1 to INPUT N and the add port Add. The wavelength division demultiplexing section 20 includes N+1 wavelength division demultiplexers (WDMs). An input interface section 30 converts optical frames input from the wavelength division demultiplexers into electric signals for processing and then converts the electric signals back to optical signals. To the output terminals of one wavelength division demultiplexer, N input interfaces, corresponding to the wavelength signals λ1 to λN, are connected. An optical switch, i.e., an on-off gate switch 40 performs high-speed switching of the optical frames output from the input interface section 30. An output interface section 50 processes the optical frames switched by and output from the optical switch 40. A wavelength division multiplexing section 70 wavelength-division-multiplexes the outputs of the output interface section 50 and transmits the multiplexed outputs to another large-capacity optical router. A drop interface section 60 processes the optical frames to be output from the wavelength division multiplexing section 70 and transmitted to the lower IP router. A header processing section 75 recognizes header information for controlling the optical router. An optical switch control section 80 controls the connection state of the optical switch for switching the optical frames. A header reinserting section 90 reinserts headers into the outputs of the optical router. An edge traffic aggregator 100 includes an ingress part 100-1 and an egress part 100-2. The ingress part 100-1 converts IP packets input from the IP router into optical frames, and the egress part 100-2 converts the optical frames into IP packets and transmits the converted packets to the IP router.
FIG. 3 is a block diagram of the input interface section 30 of FIG. 2.
FIG. 4 is a block diagram of the queue 125 of the input interface section 30 of FIG. 3.
The queue 125 includes a 1�N electric switch 128, N buffers 129, and a combiner 130. The switch 128 switches the input data by destinations, and transmits the data to the N buffers 129. The number of buffers 129 should at least equal the number of destinations and receive and store the data according to destination. If the stored data are accumulated for a predetermined amount of time, the accumulated data are transmitted to the optical transmitter 126 through the combiner 125. The input interface section 30 is connected to the header processing section 75 for processing the separated header. The header processing section 75 detects the destination of the data from the header, and controls to determine an output time of the data.
FIG. 5 is a block diagram of the output interface section 50 of FIG. 2.
FIG. 6 is a diagram illustrating an optical frame that is separated into a header and a data frame by the switch 124 illustrated in FIG. 3.
FIG. 7 is a block diagram of the ingress part 100-1 of the edge traffic aggregator 100 of FIG. 2.
FIG. 8 is a block diagram of the egress part 100-2 of the edge traffic aggregator 100 of FIG. 2.
FIG. 9 is a block diagram of another embodiment of the input interface section 30 of FIG. 3. This embodiment provides additional switching efficiency for the optical router.
FIG. 10 is a block diagram of another embodiment of the output interface section 50 of FIG. 5.
First, the operation of the ingress part 100-1 of the edge traffic aggregator 100 of FIG. 7 will be explained. IP packets transmitted from the IP router generally have wavelengths of 1.3 mm, and are converted into electric signals by the optical receiver 150 of the ingress part 100-1. Each converted packet is input to the packet processing section 151, which determines the destination port and the output order with reference to the address table 152. In the data frame assembler 154, as many buffers as the number of destination addresses (for example, K) exist. Thus, a packet, of which the destination port and the output order have been determined by the packet processing section 151, is switched by the M�K electric switch 153 to a buffer of the data frame assembler 154 that matches the destination address. If the data frame for a predetermined time period is formed in the buffer of the data frame assembler 154, an output request signal is transferred to the controller and scheduler 155. The controller and scheduler 155 that received the output request signal confirms if an available channel exists by checking the state of the output wavelength channel. If there is no available wavelength channel, the data frame waits in the buffer until the available wavelength channel is produced. If there is an available channel, the data frame filled in the buffer is switched to the optical transmitting section 158 having the wavelength channel selected by the K�n electric switch 156. A header is then reinserted into the data frame by the header inserting section 157.
In reinserting the header, the controller and scheduler 155 generates a header signal that indicates the destination address of the data frame and so on. This header signal and the switched data frames are combined by the header inserting section 157, and then switched to the optical transmitter 158. The combined frame structure is illustrated in FIG. 6. The header precedes the data frame by as much as the guard time. The header and the data frame have the fixed lengths of TH and TDF, respectively. Also, the header and the data frame have different data speeds of RH[b/s] and RDF[b/s], respectively, and the speed of the data frame is the integer-number times the header frame speed (i.e., RDF=n�RH).
The input optical signal is wavelength-division-demultiplexed by the wavelength division demultiplexer 160, and then converted into an electric signal by the optical receiving section 161. The converted data frame is separated into the original IP packet unit by the data frame disassembler 162. The separated IP packets are provided with output orders through the scheduler 163, processed by the packet processing section 164 with reference to the address table 165 to be transmitted to the destination IP router, and then switched by the n�M electric switch 166. The switched packets are transmitted to the destination IP router by the optical transmitting section 167.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS6417944 *May 28, 1998Jul 9, 20023Com CorporationAsynchronous transfer mode switch utilizing optical wave division multiplexingUS6678474 *Mar 23, 2000Jan 13, 2004Nec CorporationLightwave network data communications systemUS6701088 *Aug 14, 2000Mar 2, 2004Nippon Telegraph And Telephone CorporationIP packet transmission equipmentUS6786827 *May 13, 2003Sep 7, 2004Phillips Screw CompanyPunch and manufacturing method for recessed head fastenerUS7142787 *Jun 19, 2001Nov 28, 2006Kddi CorporationOptical data transmission method and its system, optical transmitter and its method, and optical switcherUS20020018468 *Aug 10, 2001Feb 14, 2002Nec CorporationDevice, method and system for transferring frameUS20020109878 *Mar 26, 2001Aug 15, 2002Chunming QiaoLabeled optical burst switching for IP-over-WDM integrationUS20020118241 *Feb 8, 2002Aug 29, 2002Yasuo FujiiPrinthead, printing apparatus using printhead, printhead cartridge, and printing element substrateUS20020145786 *Jan 30, 2001Oct 10, 2002Gee-Kung ChangOptical layer multicasting using a multicast switch to effect survivablity and securityUS20040105675 *Nov 29, 2002Jun 3, 2004Beacken Marc J.Optical packet tray routerCN1360414ADec 21, 2001Jul 24, 2002阿尔卡塔尔公司Channel dispatch in optical routerEP1076468A2Aug 11, 2000Feb 14, 2001Nippon Telegraph and Telephone CorporationIP packet transmission equipmentJP2002057738A Title not availableJP2002165238A Title not availableJP2003018626A Title not availableJPH0865314A Title not available* Cited by examinerClassifications U.S. Classification398/51, 398/54International ClassificationH04B10/29, H04B10/27, H04Q3/52, H04J14/02, G02B6/293, H04J14/00, H04Q11/00Cooperative ClassificationH04Q11/0066, H04J14/0209, H04J14/0227, H04Q2011/0015, H04Q2011/0039, H04Q2011/0024, H04Q2011/0016, H04Q11/0005, H04J14/0212, H04Q2011/002European ClassificationH04J14/02A1R2, H04J14/02M, H04J14/02A1M, H04Q11/00P2Legal EventsDateCodeEventDescriptionAug 12, 2003ASAssignmentOwner name: SAMSUNG ELECTRONICS CO., LTD., KOREA, REPUBLIC OFFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LEE, KI-CHEOL;OH, YUN-LE;DOH, SANG-HYUN;AND OTHERS;REEL/FRAME:014393/0491Effective date: 20030805Mar 18, 2004ASAssignmentOwner name: SAMSUNG ELECTRONICS CO., LTD., KOREA, REPUBLIC OFFree format text: CORRECTIVE COVERSHEET TO CORRECT THE NAME OF THE ASSIGNOR THAT WAS PREVIOUSLY RECORDED ON REEL 014393, FRAME 0491.;ASSIGNORS:LEE, KI-CHEOL;OH, YUN-JE;DOH, SANG-HYUN;AND OTHERS;REEL/FRAME:015096/0102Effective date: 20030805Jan 23, 2012FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services