Source: http://www.google.com/patents/US20010038905?dq=6,249,7726,249,772
Timestamp: 2016-05-07 01:08:55
Document Index: 223241899

Matched Legal Cases: ['art 307', 'art 370', 'art 307', 'art 307', 'art 307', 'art 307', 'art 60']

Patent US20010038905 - Printed wiring board and method of manufacturing the same - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating...http://www.google.com/patents/US20010038905?utm_source=gb-gplus-sharePatent US20010038905 - Printed wiring board and method of manufacturing the sameAdvanced Patent SearchPublication numberUS20010038905 A1Publication typeApplicationApplication numberUS 09/891,819Publication dateNov 8, 2001Filing dateJun 26, 2001Priority dateJan 10, 1997Also published asUS6284353, US6555208, US6986917, US7594320, US7765692, US20030203170, US20060042824, US20090019693, WO1998031204A1Publication number09891819, 891819, US 2001/0038905 A1, US 2001/038905 A1, US 20010038905 A1, US 20010038905A1, US 2001038905 A1, US 2001038905A1, US-A1-20010038905, US-A1-2001038905, US2001/0038905A1, US2001/038905A1, US20010038905 A1, US20010038905A1, US2001038905 A1, US2001038905A1InventorsMasaru Takada, Hiroyuki Kobaryashi, Kenji Chihara, Hisashi Minoura, Kiyotaka Tsukada, Mitsuhiro KondoOriginal AssigneeMasaru Takada, Hiroyuki Kobaryashi, Kenji Chihara, Hisashi Minoura, Kiyotaka Tsukada, Mitsuhiro KondoExport CitationBiBTeX, EndNote, RefManReferenced by (8), Classifications (90), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetPrinted wiring board and method of manufacturing the same
BRIEF DESCRIPTION OF THE DRAWINGS [0094] [0094]FIG. 1(a) is a cross-sectional view of an insulating substrate covered with an insulating film in an embodiment mode example 1, and FIG. 1(b) is a cross-sectional view of the insulating substrate showing a method for forming an opening portion in the insulating film. [0095] [0095]FIG. 2 is a cross-sectional view of the insulating substrate in which a plating film is formed on the surface of a conductor circuit in the embodiment mode example 1. [0096] [0096]FIG. 3(a) is a cross-sectional view of the insulating substrate for showing an opening portion opened in the same shape approximately as the conductor circuit in the embodiment mode example 1, and FIG. 3(b) is a cross-sectional view of the insulating substrate for showing an opening portion opened until a peripheral edge of the conductor circuit. [0097] [0097]FIG. 4 is a cross-sectional view of a printed wiring board in an embodiment mode example 2. [0098] [0098]FIG. 5 is an explanatory view showing a peripheral portion of an upper end of a hole for conductivity in the embodiment mode example 2. [0099] [0099]FIG. 6 is an explanatory view showing a forming method of the hole for conductivity in the embodiment mode example 2. [0100] [0100]FIG. 7 is an explanatory view of the insulating substrate forming the hole for conductivity therein in the embodiment mode example 2. [0101] [0101]FIG. 8 is a cross-sectional view of a printed wiring board in an embodiment mode example 4. [0102] [0102]FIG. 9 is a cross-sectional view of a main portion of the printed wiring board in the embodiment mode example 4. [0103] [0103]FIG. 10 is an explanatory view for showing a manufacturing method of the printed wiring board in the embodiment mode example 4 and an insulating layer sticking a copper foil thereto. [0104] [0104]FIG. 11 is an explanatory view of the insulating layer continued from FIG. 10 and showing a forming method of a hole for conductivity. [0105] [0105]FIG. 12 is an explanatory view continued from FIG. 11 and showing the insulating layer forming the hole for conductivity therein. [0106] [0106]FIG. 13 is an explanatory view continued from FIG. 12 and showing the insulating layer in which a metallic plating film is formed within the hole for conductivity. [0107] [0107]FIG. 14 is an explanatory view continued from FIG. 13 showing the insulating layer in which a conductor pattern and a pad for external connection are formed. [0108] [0108]FIG. 15 is a rear explanatory view of the insulating substrate showing an arranging position of the pad for external connection in the embodiment mode example 4. [0109] [0109]FIG. 16 is a cross-sectional view of the printed wiring board used as a chip size package in the embodiment mode example 4. [0110] [0110]FIG. 17 is a cross-sectional view of a printed wiring board in an embodiment mode example 5. [0111] [0111]FIG. 18 is a cross-sectional view of a printed wiring board in an embodiment mode example 6. [0112] [0112]FIG. 19 is a plan view of the printed wiring board in the embodiment mode example 6. [0113] [0113]FIG. 20 is a rear view of the printed wiring board in the embodiment mode example 6. [0114] [0114]FIG. 21 is a sectional explanatory view of an insulating substrate sticking a copper foil thereto in a manufacturing method of the printed wiring board in the embodiment mode example 6. [0115] [0115]FIG. 22 is a sectional explanatory view continued from FIG. 21 showing the insulating substrate in which a conductor pattern and a plating lead are formed. [0116] [0116]FIG. 23 is a sectional explanatory view continued from FIG. 22 showing the insulating substrate in which a through hole and a chemical plating film are formed. [0117] [0117]FIG. 24 is a sectional explanatory view continued from FIG. 23 showing the insulating substrate forming an electric plating film therein. [0118] [0118]FIG. 25 is a plan explanatory view continued from FIG. 23 showing the insulating substrate forming the electric plating film therein. [0119] [0119]FIG. 26 is a sectional explanatory view continued from FIG. 25 showing a melting and cutting method of the plating lead. [0120] [0120]FIG. 27 is a sectional explanatory view continued from FIG. 26 showing the insulating substrate removing the plating lead therefrom. [0121] [0121]FIG. 28 is a cross-sectional view of a printed wiring board in a conventional example. [0122] [0122]FIG. 29 is a partial plan view of the printed wiring board in the conventional example. [0123] [0123]FIG. 30 is a cross-sectional view of an insulating substrate forming a conductor circuit therein in the conventional example. [0124] [0124]FIG. 31 is a cross-sectional view of the insulating substrate in which a solder resist is printed in the conventional example. [0125] [0125]FIG. 32 is a cross-sectional view of an insulating substrate showing a method for forming an opening portion in an insulating film in another conventional example. [0126] [0126]FIG. 33 is a cross-sectional view of the insulating substrate forming the opening portion in the insulating film in another conventional example. [0127] Explanation of reference numerals [0128] [0128]101—insulating film, [0129] [0129]110—opening portion, [0130] [0130]102—laser beam, [0131] [0131]106—conductor circuit, [0132] [0132]107—insulating substrate, [0133] [0133]201—upper face pattern, [0134] [0134]202—lower face pattern, [0135] [0135]203—hole for conductivity, [0136] [0136]205—metallic filling material, [0137] [0137]261, 262—resist film, [0138] [0138]207—insulating substrate, [0139] [0139]208—printed wiring board, [0140] [0140]301—pad for external connection, [0141] [0141]310—external connecting terminal, [0142] [0142]321—upper face copper foil, [0143] [0143]322—lower face copper foil, [0144] [0144]323—metallic plating film, [0145] [0145]325, 326—conductor pattern, [0146] [0146]327—bonding pad, [0147] [0147]331, 332—hole for conductivity, [0148] [0148]341, 342—printed wiring board, [0149] [0149]305—insulating substrate, [0150] [0150]351, 352—insulating layer, [0151] [0151]306—solder resist, [0152] [0152]307—electronic part, [0153] [0153]370—mounting portion, [0154] [0154]308—partner member, [0155] [0155]401—conductor pattern, [0156] [0156]402—plating lead, [0157] [0157]403—printed wiring board, [0158] [0158]404—electric current, [0159] [0159]405—through hole, [0160] [0160]406—mounting portion, [0161] [0161]407—insulating substrate, [0162] [0162]408—laser beam. [0163] Best modes for embodying the invention
[0164] Embodiment mode example 1 [0165] A manufacturing method of a printed wiring board in an embodiment mode example of a first invention will be explained by using FIGS. 1 to 3. [0166] A summary of this manufacturing method will first be explained. That is, a solder resist constructed by thermosetting resin is printed on the surface of an insulating substrate 107 having a conductor circuit 106 and including a surface of this conductor circuit 106. The solder resist is thermally cured so that an insulating film 101 having a low coefficient of thermal expansion is formed (FIG. 1(a)). Next, a laser beam 102 is irradiated to an opening portion forming portion in the insulating film 101 and this opening portion forming portion is burnt out, and an opening portion 110 is formed and one portion of the conductor circuit 106 is exposed (FIG. 1(b)). [0167] A manufacturing method of the above printed wiring board will next be explained in detail. [0168] First, a copper foil having 18 μm in thickness is stuck to an insulating substrate constructed by resin including glass epoxy. Next, a hole for mounting electronic parts (see FIG. 28) is bored into the insulating substrate 107. Next, as shown in FIG. 1(a), the copper foil is etched and a conductor circuit 106 is formed on a surface of the insulating substrate 107. [0169] Next, a solder resist constructed by thermosetting resin is printed on the entire surface of the insulating substrate 107. Epoxy-including resin impregnated with a filler is used as the thermosetting resin. The printed solder resist has 40 μm in thickness. [0170] Next, the insulating substrate 107 is put into a heating furnace and the solder resist is thermally cured and set to an insulating film 101 (FIG. 1(a)). This insulating film 101 has a low coefficient thermal expansion of 50 ppm/� C. [0171] Next, a laser beam 102 is irradiated to an opening portion forming portion in the insulating film 101 and this opening portion forming portion is burnt out. As shown in FIG. 1(b), an opening portion 110 is thus formed in the insulating film 101. The laser is constructed by using a general CO2 laser. [0172] Thus, a conductor circuit 106 is exposed from the opening portion 110. [0173] Next, desmear processing is performed with respect to the conductor circuit 106 by using a drug in which permanganate or bichromate is dissolved into a strong acid such as concentrated sulfuric acid, etc. [0174] Next, as shown in FIG. 2, a Ni—Au plating film 131 is formed by an electric plating method on a surface of the exposed conductor circuit 106. Next, an Au plating film 132 is formed on a surface of the Ni—Au plating film 131 by the electric plating method. [0175] Thereafter, a heat radiating plate is adhered to a surface of the insulating substrate 107 by using an adhesive so that a printed wiring board is obtained (see FIG. 28). [0176] As shown in FIG. 1(b), the opening portion 110 formed by irradiating the laser beam may be constructed such that only one portion of an upper face of the conductor circuit 106 is exposed. However, as shown in FIG. 3, the opening portion 110 may also be constructed such that one portion (FIG. 3(a)) of the upper face and a side face of the conductor circuit 106, or the conductor circuit 106 and the insulating substrate 107 at a peripheral edge of this conductor circuit 106 are exposed. [0177] An operation and effects of this example will next be explained. [0178] In this example, as shown in FIG. 1(b), the entire surface of the insulating substrate 107 is covered with the insulating film 101 and the laser beam 102 is irradiated to a portion for forming the opening portion. High energy is given by the laser beam 102 to the irradiating portion of the laser beam 102 so that the irradiating portion has a very high temperature and is burnt out. Therefore, a very small opening portion 110 can be formed in the insulating film 101. [0179] Further, no light is scattered since the irradiated laser beam is parallel light. Therefore, a very small opening portion having about 0.05 to 0.60 mm in size can be formed in a desirable position and size. [0180] Accordingly, many opening portions can be formed in a small space and high density mounting can be obtained. [0181] The insulating film 101 is constructed by thermosetting epoxy resin. Therefore, as shown in FIG. 1(b), no insulating film 101 is separated from the insulating substrate 107 at a peripheral edge 108 of the opening portion 110 by the desmear processing. [0182] Embodiment mode example 2 [0183] A printed wiring board in an embodiment mode example of a second invention will be explained by using FIGS. 4 to 7. [0184] As shown in FIG. 4, the printed wiring board 208 in this example has an upper face pattern 201 formed on an upper face of an insulating substrate 207, a lower face pattern 202 formed on a lower face of the insulating substrate 207, and a hole 203 for conductivity extending through the insulating substrate 207 and reaching an upper face 228 of the lower face pattern 202. A metallic filling material 205 is arranged within the hole 203 for conductivity and is filled with solder for electrically conducting the upper face pattern 201 and the lower face pattern 202. The upper face pattern 201 is covered with a resist film 261 except for a peripheral portion of the hole 203 for conductivity. [0185] The insulating substrate is set to have 0.1 mm in thickness. As shown in FIG. 5, the hole 203 for conductivity has a diameter A of 0.3 mm. An upper end portion 231 of the hole 203 for conductivity is surrounded by the upper face pattern 201 having 0.025 mm in width B. In contrast to this, a lower end portion 232 of the hole 203 for conductivity is covered with the lower face pattern 202 so as to cover a bottom portion of the lower end portion 232. [0186] A mounting portion for mounting electronic parts is formed in a central portion of the printed wiring board 208 (omitted in the drawings). [0187] A manufacturing method of the above printed wiring board will next be explained. [0188] First, an insulating substrate constructed by glass epoxy resin is prepared. A copper foil is stuck to upper and lower faces of the insulating substrate. Next, an unnecessary portion of the copper foil is etched and removed from the copper foil. Thus, as shown in FIG. 6, an upper face pattern 201 and a lower face pattern 202 are formed. The upper face pattern 201 is formed around a forming portion 230 of a hole for conductivity on an upper face of the insulating substrate 207. The lower face pattern 202 is formed on a lower face of the insulating substrate 207 in order to cover the forming portion 230 of the hole for conductivity. [0189] Next, the upper face of the insulating substrate 207 is covered with a resist film 261. The resist film 261 formed on this upper face forms an opening hole 263 for opening the insulating substrate 207 in the forming portion 230 of the hole for conductivity, [0190] Further, the lower face of the insulating substrate 207 is covered with a resist film 262. The resist film 262 formed on this lower face covers the lower face of the insulating substrate 207 including the forming portion 230 of the hole for conductivity. [0191] Next, a laser beam 204 is irradiated to the forming portion 230 of the hole for conductivity. A carbon dioxide gas laser is used as a laser of the laser beam 204. Thus, as shown in FIG. 7, a hole 203 for conductivity extending through the insulating substrate 207 in the forming portion 230 of the hole for conductivity and reaching an upper face of the lower face pattern 202 is formed in a state in which the lower face pattern 202 is left. [0192] Next, an electric plating method of flowing electricity to the lower face pattern 202 is executed in a state in which the insulating substrate 207 is dipped into a solder plating reservoir. Thus, as shown in FIG. 4, solder is deposited from the upper face of the lower face pattern 202 within the hole 203 for conductivity, and fills the entire interior of the hole 203 for conductivity so that a metallic filling material 205 is formed. [0193] Thus, the above printed wiring board 208 is obtained. [0194] An operation and effects of this example will next be explained. [0195] As shown in FIG. 4, the hole 203 for conductivity is formed so as to extend through the insulating substrate 207 and the metallic filling material 205 is formed within the hole 203 for conductivity. A lower end portion 232 of the hole 203 for conductivity is covered with the lower face pattern 202. In contrast to this, the upper face pattern 201 is formed around an upper end portion 31 of the hole 203 for conductivity. Therefore, the upper face pattern 201 and the lower face pattern 202 can be electrically conducted to each other through the metallic filling material 205 within the hole 203 for conductivity. [0196] Further, the metallic filling material 205 formed within the hole 203 for conductivity is joined to the upper face pattern 201 on a side face of an upper end portion 231 of this metallic filling material 205. Therefore, the upper face pattern 201 can be joined to the metallic filling material 205 irrespective of the large or small value width of the upper face pattern 201 so that the upper face pattern 201 and the metallic filling material 205 can reliably be electrically conducted to each other. Accordingly, as in the conventional case it is not necessary that the width of a plating attaching area for forming a plating film in the hole 203 for conductivity is formed in the upper face pattern 201. [0197] In accordance with this example, the width of the upper face pattern 201 formed around the hole 203 for conductivity can be narrowed in comparison with the conventional case. Further, a surplus area is formed on a surface of the insulating substrate 207 by a narrowed amount of the width of the upper face pattern 201. Accordingly, another upper face pattern, an electronic part mounting portion, etc. can be further formed in this surplus area so that high density mounting can be achieved. [0198] Embodiment mode example 3 [0199] This example is an embodiment mode example of the second invention. This example differs from the embodiment mode example 2 in that the interior of the hole for conductivity is filled with a metal by a printing method. [0200] Specifically, similar to the above embodiment mode example 2, after the hole for conductivity is formed, a mask for printing having an opening hole in a portion corresponding to the hole for conductivity is arranged on an upper face side of the insulating substrate. Next, soldering paste is arranged on the mask and is pressed by a roller. Thus, the soldering paste is moved from the opening hole of the mask into the hole for conductivity. Accordingly, the interior of the hole for conductivity is filled with the solder so that a metallic filling material is formed. [0201] The others are similar to those in the embodiment mode example 2. [0202] In this example, effects similar to those in the embodiment mode example 2 can be also obtained. [0203] Embodiment mode example 4 [0204] A printed wiring board in accordance with an embodiment mode example of a third invention will next be explained by using FIGS. 8 to 16. [0205] As shown in FIG. 8, the printed wiring board 341 in this example has an insulating substrate 305 constructed by two insulating layers 351, 352, a pad 301 for external connection arranged in an outermost layer of the insulating substrate 305, conductor patterns 325, 326 arranged in another layer different from the outermost layer, and holes 331, 332 for conductivity, electrically connecting the pad 301 for external connection and the conductor patterns 325, 326. [0206] As shown in FIG. 9, the pad 301 for external connection closes an opening portion 339 on an outermost layer side of the hole 331 for conductivity and forms a bottom portion of the hole 331 for conductivity. An inner wall and the bottom portion of the hole 331 for conductivity are covered with a metallic plating film 323. [0207] As shown in FIG. 15, an external connecting terminal 310 is joined to a surface of the pad 301 for external connection in a central position of the hole 331 for conductivity. The external connecting terminal 310 is a soldering ball for joining the printed wiring board 341 to a partner member 308 such as a mother board, etc. [0208] The pad 301 for external connection has a diameter A from 0.2 to 0.4 mm. An opening diameter B of the hole 331 for conductivity is approximately equal to a diameter from 0.1 to 0.3 mm. [0209] In the insulating substrate 305, a mounting portion 370 for mounting an electronic part 307 is formed in an outermost layer on a side opposed to an arranging side of the pad 301 for external connection. The mounting portion 370 is arranged approximately on the entire surface of a lower portion of the electronic part 370. The electronic part 307 is adhered to the mounting portion 370 by an adhesive 372 such as silver paste, etc. Many bonding pads 327 for joining the bonding wire 371 are arranged around the mounting portion 370. [0210] Surfaces of the respective insulating layers 351, 352 are covered with a solder resist 306. Inner walls and bottom portions of the holes 331, 332 for conductivity are covered with the metallic plating film 323. One portion of the solder resist 306 enters the interiors of the holes 331, 332 for conductivity. [0211] A manufacturing method of the above printed wiring board will next be explained. [0212] First, an insulating layer constructed by a glass epoxy substrate is prepared. Next, as shown in FIG. 10, an upper face copper foil 321 and a lower face copper foil 322 are respectively stuck to upper and lower faces of the insulating layer 351. [0213] Next, as shown in FIG. 11, a portion of the upper face copper foil 321 corresponding to a forming portion 338 of a hole for conductivity is removed from the upper face copper foil 321 by etching so that an opening hole 328 is formed. [0214] Next, a laser beam 388 is irradiated to the forming portion 338 of the hole for conductivity from above the upper face copper foil 321. Thus, as shown in FIG. 12, the hole 331 for conductivity is formed in the insulating layer 351 exposed from the opening hole 328 of the upper face copper foil 321, and a bottom portion of the hole 331 for conductivity is set to reach the lower face copper foil 322. [0215] Next, as shown in FIG. 13, a metallic plating film 323 is formed in an inner wall and the bottom portion of the hole 331 for conductivity by a chemical plating method and an electric plating method. [0216] As shown in FIG. 9, this metallic plating film 323 is also formed on a surface of the lower face copper foil 322. [0217] Next, the upper face copper foil 321 and the lower face copper foil 322 are etched and a conductor pattern 325 electrically connected to the hole 331 for conductivity is formed from the upper face copper foil 321 as shown in FIG. 14. Further, a pad 301 for external connection for closing an opening portion of the hole 331 for conductivity is formed from the lower face copper foil 322. [0218] Next, as shown in FIG. 9, a surface of the insulating layer 351 is covered with a solder resist 306 and one portion of the solder resist 306 enters the interior of the hole 331 for conductivity and fills this interior. [0219] Next, as shown in FIG. 8, another insulating layer 352 is laminated with an upper face of the insulating layer 351 so that an insulating substrate 305 is obtained. Specifically, a prepreg and a copper foil are laminated and press-attached to the upper face of the insulating layer 351. Next, the copper foil is etched so that a conductor pattern 326, a bonding pad 327 and a mounting portion 370 are formed. Next, a laser beam is irradiated to the insulating layer 352 so that a hole 332 for conductivity is formed. At this time, a bottom portion of the hole 332 for conductivity is set to reach the internal conductor pattern 325. Next, a metallic plating film 323 is formed in an inner wall and the bottom portion of the hole 332 for conductivity by the chemical plating method and the electric plating method. [0220] Next, a surface of the insulating layer 352 is covered with a solder resist 306, and one portion of the solder resist 306 enters the interior of the hole 332 for conductivity and fills this hole. At this time, the bonding pad 327 is exposed as it is. [0221] Thus, a printed wiring board 341 is obtained. [0222] An operation and effects of the printed wiring board in this example will next be explained. [0223] As shown in FIG. 8, the pad 301 for external connection is arranged so as to form a bottom portion of the hole 331 for conductivity. Therefore, it is unnecessary to form a conductor pattern for connecting the hole 331 for conductivity and the pad 301 for external connection. Accordingly, a surplus area is formed on a surface of the insulating substrate 305 and another conductor pattern, etc. can be arranged in this surplus area so that high density surface mounting can be realized. Further, as shown in FIG. 15, the distance between the respective holes 331 for conductivity can be reduced so that the holes 331 for conductivity can be arranged at high density in comparison with the conventional holes for conductivity. [0224] As shown in FIG. 9, the pad 301 for external connection closes an opening portion of the hole 331 for conductivity on its outermost layer side and forms the bottom portion of the hole 331 for conductivity. Therefore, the pad 301 for external connection has at least an area of the opening portion of the hole 331 for conductivity. Hence, the pad 301 for external connection can secure a sufficient joining area for joining an external connecting terminal 310 and has an excellent joining strength to the external connecting terminal 310. [0225] Further, a metallic plating film 323 for continuously covering an inner wall and a bottom portion of the hole 331 for conductivity is formed within the hole 331 for conductivity. Therefore, the pad 301 as the bottom portion for external connection is strongly joined to the metallic plating film 323 so that joining strength to the hole 331 for conductivity is improved. Hence, the pad 301 for external connection can be reduced to a size close to that of the opening portion of the hole 331 for conductivity. Accordingly, it is possible to obtain high density mounting of the pad 301 for external connection and increase density of surface mounting of the insulating substrate 305. [0226] In the manufacturing method of the above printed wiring board, as shown in FIGS. 13 and 14, after the metallic plating film 323 is formed in the inner wall and the bottom portion of the hole 331 for conductivity, the pad 301 for external connection is formed by etching the lower face copper foil 322. [0227] Therefore, the lower face copper foil 322 is closely attached strongly to the metallic plating film 323 in the bottom portion of the hole 331 for conductivity. Accordingly, the pad 301 for external connection can be reduced to a size approximately equal to that of the hole 331 for conductivity so that high density mounting can be obtained. [0228] As shown in FIG. 11, a laser beam 388 is irradiated to a forming portion 338 of the hole for conductivity in an insulating layer 351. At this time, the laser beam 388 gives high energy to the insulating layer 351 so that a hole is sequentially bored within the insulating layer 351. When an end tip of the laser beam 388 reaches the lower face copper foil 322, the laser beam 388 is reflected on the lower face copper foil 322. Therefore, when the irradiation of the laser beam 388 is stopped here, a non-through hole 331 for conductivity is formed as shown in FIG. 12. In this non-through hole 331 for conductivity, one opening portion 339 is covered with the lower face copper foil 322 and no hole 331 extends through the lower face copper foil 322. [0229] It is here noticeable that the non-through hole can be formed by irradiating the laser beam 388. It is conventionally necessary that a hole is bored by a drill in the insulating layer and an opening portion of this hole is then covered with a copper foil to form such a non-through hole. However, the non-through hole reaching the lower face copper foil 322 can be formed by irradiating the laser beam so that no covering work of the opening portion is required after the boring. Therefore, the number of manufacturing processes is reduced and manufacturing cost can be reduced. [0230] The laser beam is also used when the hole 332 for conductivity is formed in another insulating layer 352. Therefore, it is possible to easily form the hole 332 for conductivity in which the bottom portion of the hole 332 for conductivity reaches the internal conductor pattern 325. [0231] The conductor pattern 325 formed on an upper face of the insulating layer 351 and the pad 301 for external connection formed on a lower face of the insulating layer 351 can be simultaneously formed by etching the upper face copper foil 321 and the lower face copper foil 322. Therefore, the printed wiring board 341 can be manufactured easily and efficiently. [0232] As mentioned above, it is possible to cope with the high density mounting of the hole 331 for conductivity and the pad 301 for external connection. Therefore, as shown in FIG. 16, the conductor pattern 326 connected to the bonding pad 327 is led around the interior of the mounting portion 370 so that a chip size package having approximately the same size as the electronic part 307 can be obtained. In this case, it is necessary to secure an insulating property with respect to the mounting portion 370 in the conductor pattern 326 led into the mounting portion 370. The mounting portion 370 is arranged approximately on the entire face of a lower portion of the electronic part 307 in a leading-in state of the conductor pattern 326. [0233] Embodiment mode example 5 [0234] This example is an embodiment mode example of the third invention. In a printed wiring board 342 in this example, the insulating substrate 305 is constructed by a single insulating layer 351 as shown in FIG. 17. [0235] A surface of the insulating layer 351 forms an outermost layer of the insulating substrate 305. An electronic part 307 is mounted onto one side of the insulating layer 351 and a soldering ball 310 is joined to the other side of the insulating layer 351. [0236] The other constructions are similar to those in the embodiment mode example 4. [0237] Effects similar to those in the embodiment mode example 4 can be also obtained in this example. [0238] Embodiment mode example 6 [0239] A manufacturing method of a printed wiring board in an embodiment mode example of a fourth invention will be explained by using FIGS. 18 to 27. [0240] As shown in FIGS. 18 to 20, the printed wiring board 403 manufactured in this example has a mounting portion 406 for mounting electronic parts and a conductor pattern 401 on the surface of an insulating substrate 407. Further, a through hole 405 for performing electric conduction between upper and lower portions of the printed wiring board is formed. [0241] The conductor pattern 401 is constructed by a land 411 of the through hole 405, a terminal 413 for joining a bonding wire 461 connected to an electronic part 60, a wiring circuit 412 for electrically connecting the land 411 and the terminal 413 to each other, and a pad 414 for joining a soldering ball 4. [0242] Many through holes 405 are formed in a peripheral portion of the insulating substrate 407. [0243] The manufacturing method of the printed wiring board in this example will be explained next. [0244] First, as shown in FIG. 21, an insulating substrate 407 constructed by a glass epoxy substrate is prepared, and a copper foil 415 is stuck to both faces of the insulating substrate 407. Next, as shown in FIG. 22, an unnecessary portion of the copper foil 415 is removed therefrom by etching and a conductor pattern 401 is formed. Further, a plating lead 402 for electrically connecting each conductor pattern 401 is formed. A minimum clearance of the conductor patterns 401 interposing the plating lead 402 is set to 0.3 mm therebetween. [0245] Next, as shown in FIG. 23, a through hole forming portion 450 of the insulating substrate 407 is bored by using a drill, a router, etc. so that a through hole 405 is bored. [0246] Next, a chemical plating film 416 is formed on a surface of the conductor pattern 401 and is also formed in an inner wall of the through hole 405. The chemical plating film 461 is made of copper and has 2 μm in thickness. Next, as shown in FIGS. 24 and 25, an electric current 404 flows to the conductor pattern 401 and the chemical plating film 416 through the plating lead 402 in a state in which the insulating substrate 407 is dipped into an electric plating reservoir. Thus, surfaces of the conductor pattern 401 and the chemical plating film 416 are covered with an electric plating film 417. The electric plating film 417 is made of copper and has 10 μm in thickness. [0247] Next, as shown in FIG. 26, a laser beam 408 is irradiated to the plating lead 402 so that the plating lead 402 is melted and cut. The laser beam 408 is irradiated by using an excimer laser having 248 nm in wavelength and 50 W in output. Thus, as shown in FIG. 27, the conductor patterns 401 are insulated from each other. [0248] Thus, a printed wiring board 403 shown in FIGS. 18 to 20 is obtained. [0249] An operation and effects of this example will next be explained. [0250] The laser beam is coherent light having aligned phases in order that directivity is high. Accordingly, as shown in FIG. 26, high energy can be given to a very small portion by irradiating the laser beam 408. Therefore, only the plating lead 402 can be melted and cut without damaging the conductor pattern 401 even when the plating lead 402 is finely constructed. Accordingly, the plating lead 402 can be formed in a very small pattern so that the distance between conductor patterns 401 and the distance between through holes 405 can be reduced. Accordingly, high density mounting of the conductor patterns 401 can be realized in accordance with this example. [0251] Industrial applicability [0252] As mentioned above, in accordance with the present invention, it is possible to provide a printed wiring board capable of forming an insulating film having a very small opening portion and a manufacturing method of the printed wiring board. Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7453141Feb 15, 2006Nov 18, 2008Shinko Electric Industries Co., Ltd.Semiconductor device package, method of manufacturing the same, and semiconductor deviceUS8633583 *Jul 16, 2007Jan 21, 2014Stmicroelectrics S.R.L.Semiconductor package substrate and methods for forming same, in particular for MEMS devicesUS8698309 *Feb 16, 2012Apr 15, 2014Panasonic CorporationSemiconductor deviceUS20060189178 *Feb 15, 2006Aug 24, 2006Shinko Electric Industries Co., Ltd.Semiconductor device package, method of manufacturing the same, and semiconductor deviceUS20080128891 *Jul 16, 2007Jun 5, 2008Stmicroelectronics S.R.L. Stmicroelectronics (Malta) Ltd.Semiconductor package substrate and methods for forming same, In particular for mems devicesUS20120146244 *Jun 14, 2012Panasonic CorporationSemiconductor deviceUS20140140030 *Jan 24, 2014May 22, 2014Fujitsu LimitedConductive material, conductive paste, circuit board, and semiconductor deviceEP1696482A2 *Feb 20, 2006Aug 30, 2006Shinko Electric Industries Co., Ltd.Semiconductor device package and method of manufacturing the same* Cited by examinerClassifications U.S. Classification428/209, 257/E23.069, 257/E23.067International ClassificationH05K3/46, H05K3/28, H05K3/40, H05K3/22, H05K3/26, H05K3/42, H05K1/11, H01L23/498, H05K3/00, H05K3/24, H05K3/34, H05K3/02Cooperative ClassificationH01L2224/85399, H01L2224/45099, H01L2224/05599, H01L24/45, H01L2924/00014, H01L24/73, H01L2924/12042, H01L2924/181, Y10T428/24917, Y10T29/49165, Y10T29/49117, Y10T29/49155, H01L24/48, Y10S428/901, H01L2924/01011, H05K3/0035, H01L2224/48228, H01L2924/01082, H05K1/116, H01L2924/15153, H01L2224/73265, H05K3/3457, H01L2224/32057, H05K2201/09509, H01L2224/48091, H05K2201/0394, H01L2924/01006, H05K3/28, H01L2924/01033, H05K3/027, H05K3/4038, H05K3/4602, H05K3/4611, H05K2203/107, H01L2924/01019, H01L2924/15165, H01L2224/32225, H05K2203/0571, H05K3/421, H05K3/242, H01L2924/15173, H05K2203/175, H05K3/0008, H01L2924/01074, H01L2924/01029, H01L2924/01005, H05K2201/0305, H05K3/243, H01L2924/01078, H05K2201/0959, H01L23/49827, H05K3/3452, H05K2201/09781, H01L2924/01047, H05K2201/09381, H05K3/428, H05K2203/0554, H01L23/49816, H01L2224/83385, H01L2924/01079, H01L2924/15311, H01L24/32, H05K1/112, H05K2201/09527, H01L2224/48227, H01L2924/12041European ClassificationH01L24/32, H05K3/40D, H05K3/34E, H05K3/24B2, H01L23/498C4, H05K1/11C2, H05K1/11D2, H01L23/498E, H05K3/00K3L4BLegal EventsDateCodeEventDescriptionOct 6, 2006FPAYFee paymentYear of fee payment: 4Sep 30, 2010FPAYFee paymentYear of fee payment: 8Oct 2, 2014FPAYFee paymentYear of fee payment: 12RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services