Source: http://www.google.com/patents/US7485478?dq=6004266
Timestamp: 2014-03-08 06:27:08
Document Index: 84139091

Matched Legal Cases: ['Application No. 200307843', 'Application No. 200307843', 'Application No. 200210004596', 'Application No. 200307842', 'Application No. 200307885', 'Application No. 200307883', 'Application No. 200202665']

Patent US7485478 - Light emitting device and method of manufacturing the same - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode...http://www.google.com/patents/US7485478?utm_source=gb-gplus-sharePatent US7485478 - Light emitting device and method of manufacturing the sameAdvanced Patent SearchPublication numberUS7485478 B2Publication typeGrantApplication numberUS 11/890,494Publication dateFeb 3, 2009Filing dateAug 7, 2007Priority dateFeb 19, 2001Fee statusPaidAlso published asCN1372325A, CN100375288C, CN101232027A, CN101232027B, US7264979, US7825419, US8497525, US20020113248, US20070290219, US20090128026, US20110024787, US20130280841Publication number11890494, 890494, US 7485478 B2, US 7485478B2, US-B2-7485478, US7485478 B2, US7485478B2InventorsHirokazu Yamagata, Shunpei Yamazaki, Toru TakayamaOriginal AssigneeSemiconductor Energy Laboratory Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (93), Non-Patent Citations (10), Referenced by (7), Classifications (16), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetLight emitting device and method of manufacturing the sameUS 7485478 B2Abstract A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.
forming a thin film transistor on an insulator;
forming an interlayer insulating film on the thin film transistor;
forming a first insulating film on the interlayer insulating film by plasma treatment;
forming an anode on the first insulating film;
forming a wiring for electrically connecting the thin film transistor to the anode;
forming a bank over the first insulating film, edge portions of the anode, and the wiring;
forming a second insulating film on the anode and the bank;
forming an organic compound layer over the anode with the second insulating film interposed therebetween; and
forming a cathode on the organic compound layer,
wherein the first insulating film is a cured film and comprises one or more kinds of gas elements selected from the group consisting of hydrogen, nitrogen, halogenated carbon, hydrogen fluoride, and rare gas.
2. The method of manufacturing a light emitting device according to claim 1, wherein the average surface roughness (Ra) of a surface of the anode is 0.9 nm or lower.
3. The method of manufacturing a light emitting device according to claim 1, wherein the bank has on its surface a cured film formed by plasma treatment and comprising one or more kinds of gas elements selected from the group consisting of hydrogen, nitrogen, halogenated carbon, hydrogen fluoride, and rare gas.
4. The method of manufacturing a light emitting device according to claim 1, wherein a thickness of the organic compound layer is maximum in a concave portion formed from the anode and the bank.
5. The method of manufacturing a light emitting device according to claim 1, wherein a thickness of the organic compound layer over the anode is thicker than a thickness of the organic compound layer over the bank.
forming a first insulating film on the interlayer insulating film;
wherein the first insulating film is a diamond-like carbon film.
7. The method of manufacturing a light emitting device according to claim 6, wherein the average surface roughness (Ra) of a surface of the anode is 0.9 nm or lower.
8. The method of manufacturing a light emitting device according to claim 6, wherein the bank has on its surface a cured film formed by plasma treatment and comprising one or more kinds of gas elements selected from the group consisting of hydrogen, nitrogen, halogenated carbon, hydrogen fluoride, and rare gas.
9. The method of manufacturing a light emitting device according to claim 6, wherein a thickness of the organic compound layer is maximum in a concave portion formed from the anode and the bank.
10. The method of manufacturing a light emitting device according to claim 6, wherein a thickness of the organic compound layer over the anode is thicker than a thickness of the organic compound layer over the bank.
wherein the first insulating film is a silicon nitride film.
12. The method of manufacturing a light emitting device according to claim 11, wherein the average surface roughness (Ra) of a surface of the anode is 0.9 nm or lower.
13. The method of manufacturing a light emitting device according to claim 11, wherein the bank has on its surface a cured film formed by plasma treatment and comprising one or more kinds of gas elements selected from the group consisting of hydrogen, nitrogen, halogenated carbon, hydrogen fluoride, and rare gas.
14. The method of manufacturing a light emitting device according to claim 11, wherein a thickness of the organic compound layer is maximum in a concave portion formed from the anode and the bank.
15. The method of manufacturing a light emitting device according to claim 11, wherein a thickness of the organic compound layer over the anode is thicker than a thickness of the organic compound layer over the bank.
forming an organic compound layer above the over with the second insulating film interposed therebetween; and
wherein the first insulating film comprises a cured film formed by plasma treatment and a diamond-like carbon film.
17. The method of manufacturing a light emitting device according to claim 16, wherein the average surface roughness (Ra) of a surface of the anode is 0.9 nm or lower.
18. The method of manufacturing a light emitting device according to claim 16, wherein the bank has on its surface a cured film formed by plasma treatment and comprising one or more kinds of gas elements selected from the group consisting of hydrogen, nitrogen, halogenated carbon, hydrogen fluoride, and rare gas.
19. The method of manufacturing a light emitting device according to claim 16, wherein a thickness of the organic compound layer is maximum in a concave portion formed from the anode and the bank.
20. The method of manufacturing a light emitting device according to claim 16, wherein a thickness of the organic compound layer over the anode is thicker than a thickness of the organic compound layer over the bank.
21. A method of manufacturing a light emitting device comprising:
wherein the first insulating film comprises a cured film formed by plasma treatment and a silicon nitride film.
22. The method of manufacturing a light emitting device according to claim 21, wherein the average surface roughness (Ra) of a surface of the anode is 0.9 nm or lower.
23. The method of manufacturing a light emitting device according to claim 21, wherein the bank has on its surface a cured film formed by plasma treatment and comprising one or more kinds of gas elements selected from the group consisting of hydrogen, nitrogen, halogenated carbon, hydrogen fluoride, and rare gas.
24. The method of manufacturing a light emitting device according to claim 21, wherein a thickness of the organic compound layer is maximum in a concave portion formed from the anode and the bank.
25. The method of manufacturing a light emitting device according to claim 21, wherein a thickness of the organic compound layer over the anode is thicker than a thickness of the organic compound layer over the bank.
forming an organic compound layer on the anode and the bank; and
27. The method of manufacturing a light emitting device according to claim 26, wherein the average surface roughness (Ra) of a surface of the anode is 0.9 nm or lower.
28. The method of manufacturing a light emitting device according to claim 26, wherein the bank has on its surface a cured film formed by plasma treatment and comprising one or more kinds of gas elements selected from the group consisting of hydrogen, nitrogen, halogenated carbon, hydrogen fluoride, and rare gas.
29. The method of manufacturing a light emitting device according to claim 26, wherein a thickness of the organic compound layer is maximum in a concave portion formed from the anode and the bank.
30. The method of manufacturing a light emitting device according to claim 26, wherein a thickness of the organic compound layer over the anode is thicker than a thickness of the organic compound layer over the bank. Description
This application is a Divisional of application Ser. No. 10/073,284, filed Feb. 13, 2002, now U.S. Pat. No. 7,264,979.
The anti-electrostatic film is formed from a material which-does not affect the resin insulating film for forming the bank, the anode, and the wiring and can be removed by water washing or like other simple methods. As such the material, a material having conductivity necessary for conducting the anti-electrostatic treatment is suitable (for example, 10−8[S/m] or more). An conductive organic material is generally used, for example, the anti-electrostatic film comprising conductive polymer is formed by spin coating, and the anti-electrostatic film comprising conductive low molecular is formed by evaporation. Concretely, polyethylene dioxythiophene (PEDOT), polyaniline (PAni), glycerin fatty acid ester, polyoxyethylene alkyl ether, polyoxyethylene alkylphenyl ether, N,N-Bis(2-hydroxyethyl)alkylamine [alkyl diethanolamine], N-2-Hydroxyethyl-N-2-hydroxyalkylamine [hydroxyalkyl monoethanolamine], polyoxyethylene alkylamine, polyoxyethylene alkylamine fatty acid ester, alkyl diethanolamide, alkyl sulfonate, alkylbenzenesulfonate, alkyl phosphate, tetraalkylammonium salt, trialkylbenzylam monium salt, alkyl betaine, alkyl imidazolium betaine, or the like are used. These can be easily removed by water or an organic solvent. In addition, an organic insulating material, such as polyimide, acrylic, polyamide, polyimideamide, or BCB (benzocyclobutene) can be used as the anti-electrostatic film. The anti-electrostatic film formed from the material mentioned above can be applied to all embodiments.
On the base insulating film 901, semiconductor layers 902 to 905 are formed. The semiconductor layers 902 to 905 are formed by patterning into a desired shape a crystalline semiconductor film that is obtained by forming a semiconductor film with an amorphous structure through a known method (sputtering, LPCVD, plasma CVD, or the like) and then subjecting the film to known crystallization treatment (e.g., laser crystallization, thermal crystallization, or thermal crystallization using nickel or other catalysts). The semiconductor layers 902 to 905 are each 25 to 80 nm in thickness (preferably 30 to 60 nm). The material of the crystalline semiconductor film is not limited, but silicon or a silicon germanium (SixGe1−x(X=0.0001 to 0.02)) alloy is preferable. In this embodiment, an amorphous silicon film with a thickness of 55 nm is formed by plasma CVD and then a solution containing nickel is held to the top face of the amorphous silicon film. The amorphous silicon film is next subjected to dehydrogenation (at 500� C., for an hour), then to thermal crystallization (at 550� C., for four hours), and then to laser annealing treatment for improvement of crystallinity to obtain a crystalline silicon film. Patterning treatment using photolithography is conducted on this crystalline silicon film to form the semiconductor layers 902 to 905.
Sputtering can also be used to form a Ta film for the heat-resistant conductive layer 907. The Ta film is formed by using Ar as sputtering gas. If an appropriate amount of Xe or Kr is added to the sputtering gas, the internal stress of the obtained Ta film is eased to prevent the Ta film from peeling off. The resistivity of a Ta film in a phase is about 20 μΩcm and is usable as a gate electrode. On the other hand, the resistivity of a Ta film in β phase is about 180 μΩcm and is not suitable for a gate electrode. A Ta film in a phase can readily be obtained by forming, as a base of a Ta film, a TaN film that has a crystal structure approximate to that of the a phase. Though not shown in the drawings, it is effective to form a silicon film doped with phosphorus (P) to a thickness of about 2 to 20 nm under the heat-resistant conductive layer 907. This improves adherence to the conductive film to be formed thereon and prevents oxidization. At the same time, the silicon film prevents a minute amount of alkaline metal element contained in the heat-resistant conductive layer 907 and 908 from diffusing into the first shape gate insulating film 906. Whatever material is used, a preferable resistivity range for the heat-resistant conductive layer 907 is 10 to 50 μΩcm.
Then first doping treatment is performed to dope the semiconductor layers with an impurity element of one conductivity type. An impurity element for giving the n type conductivity is used in this doping step without removing the resist masks 909. The semiconductor layers 902 to 905 are partially doped with the impurity element using the first taper shape conductive layers 910 and 913 as masks, whereby first n type impurity regions 914 to 917 are formed in a self-aligning manner. Used as the impurity element for imparting the n type conductivity is a Group 15 element in the periodic table, typically phosphorus (P) or arsenic (As). The doping here uses phosphorus and ion doping. The concentration of the impurity element for imparting the n type conductivity is 1�1020 to 1�1021 atoms/cm3 in the first n type impurity regions 914 to 917 (FIG. 3B)
Then an activation step is conducted to activate the impurity elements that are used to dope the semiconductor layers in different concentrations and give them the n type or p type conductivity. The activation step is achieved by thermal annealing using an annealing furnace. Laser annealing or rapid thermal annealing (RTA) may be employed instead. Thermal annealing is conducted in a nitrogen atmosphere with the oxygen concentration being 1 ppm or less, preferably 0.1 ppm or less, at a temperature of 400 to 700� C. typically 500 to 600� C., and heat treatment in this embodiment is conducted at 550� C. for four hours. If a plastic substrate that has low heat-resistance is used as the substrate 900, laser annealing is preferred.
A second interlayer insulating film 935 is formed to an average thickness of 1.0 to 2.0 μm from an organic insulating material. The second interlayer insulating film may be formed of an organic resin material such as polyimide, acrylic, polyamide, polyimideamide, or BCB (benzocyclobutene). For instance, when polyimide of the type that is thermally polymerized after applied to a substrate is used, the film is formed by baking in a clean oven at 300� C. If the second interlayer insulating film is formed of acrylic, two-pack type is employed. The main material is mixed with the curing agent, the mixture is applied to the entire surface of the substrate using a spinner, the substrate is pre-heated on a hot plate at 80� C. for 60 seconds, and then the substrate is baked in a clean oven at 250� C. for 60 minutes to form the film.
A light emitting layer that emits red light is formed from Alq3 doped with DCM. Instead, N,N′-disalicylidene-1,6-hexanediaminate)zinc (II) (Zn(salhn)) doped with (1,10-phenanthroline)-tris(1,3-diphenyl-propane-1,3-dionato)europium (III) (Eu(DBM)3(Phen)) that is an Eu complex may be used. Other known materials may also be used.
A light emitting layer that emits green light can be formed from CBP and Ir(ppy)3 by coevaporation. It is preferable to form a hole blocking layer from BCP in this case. An aluminum quinolilate complex (Alq3) and a benzoquinolinolate beryllium complex. (BeBq) may be used instead. The layer may be formed from a quinolilate aluminum complex (Alq3) using as dopant Coumarin 6, quinacridon, or the like. Other known materials may also be used.
A light emitting layer that emits blue light can be formed from DPVBi that is a distylyl derivative, N,N′-disalicyliden-1,6-hexanediaminate)zinc (II) (Zn(salhn)) that is a zinc complex having an azomethine compound as its ligand, or 4,4′-bis(2,2-diphenyl-vinyl)-biphenyl (DPVBi) doped with perylene. Other known materials may also be used.
Formed next are first masks 3913 and 3915 that completely cover the semiconductor layers 902 and 905, respectively, and a second mask 3914 that covers the second taper shape conductive layer 3907 on the semiconductor layer.904 and covers a part of the semiconductor layer 904. Then, second doping treatment is conducted. In the second doping treatment, the semiconductor layer 903 is doped through the second taper shape conductive layer 3906 a to have an n type impurity region 3917 that contains an n type impurity element in a second concentration and n type impurity regions 3916 and 3918 that contain an n type impurity element in a third concentration each. The n type impurity region 3917 formed through this doping, which contains an n type impurity element in a second concentration, contain phosphorus in a concentration of 1�1017 to 1�1019 atoms/cm3. The n type impurity regions 3916 and 3918 formed through this doping, which contain an n type impurity element in a third concentration each, contain phosphorus in a concentration of 1�1020 to 1�1021 atoms/cm3 (FIG. 20D).
The cured film 935B is formed by performing plasma treatment on the surface of the second interlayer insulating film (935 or 3926) that is formed of an organic insulating material in one or more kinds of gas selected from the group consisting of hydrogen, nitrogen, hydrocarbon, halogenated carbon, hydrogen fluoride, and rare gas (such as Al; He, or Ne). Accordingly, the cured film 935B contains one of the gas elements out of hydrogen, nitrogen, hydrocarbon, halogenated carbon, hydrogen fluoride, and rare gas (such as Ar, He, or Ne).
If furnace annealing is chosen instead, heat treatment at 500� C. is conducted for an hour to release hydrogen contained in the amorphous silicon film 1103 prior to the heat treatment for crystallization. Then, the substrate receives heat treatment in an electric furnace in a nitrogen atmosphere at 550 to 600� C., preferably at 580� C, for four hours to crystallize the amorphous silicon film 1103. The crystalline silicon film 1105 shown in FIG. 17C is thus formed.
On the barrier layer 1106, a second semiconductor film (typically, an amorphous silicon film) is formed as a gettering site 1107 to have a thickness of 20 to 250 nm. The second semiconductor film contains a rare gas element in a concentration of 1�120 atoms/cm3 or higher. The gettering site 1107, which is to be removed later, is preferably a low density film in order to increase the selective ratio to the crystalline silicon film 1105 in etching.
This heat treatment does not crystallize the semiconductor film 1107 that contains a rare gas element in a concentration of 1�1019 to 1�1021 atoms/cm3, preferably 1�1020 to 1�1021 atoms/cm3, more desirably 5�20 atoms/cm3. This is supposedly because the rare gas element is not re-discharged in the above range of the process temperature and the remaining elements hinder crystallization of the semiconductor film.
Embodiment 12 FIG. 10A more specifically illustrates the top face structure of the pixel section of the light emitting device produced using the present invention and described as FIG. 10A, and FIG. 10B. illustrates a circuit diagram thereof Referring to FIGS. 10A to 10B, a switching TFT 704 is composed of the switching (n-channel) TFT 1002 as illustrated in FIG. 6. Accordingly, about the structure thereof, the description on the switching (n-channel) TFT 1002 should be referred to. A wiring 703 is a gate wiring for connecting gate electrodes 704 a and 704 b of the switching TFT 704 electrically with each other.
FIG. 11E shows a portable image reproducing device equipped with a recording medium (a DVD player, to be specific). The device is composed of a main body 2401, a casing 2402 a display unit A 2403, a display unit B 2404, a recording medium (DVD) reading unit 2405, operation keys 2406, speaker units 2407, etc. The display unit A 2403 mainly displays image information whereas the display unit B 2404 mainly displays text information. The portable image reproducing device is formed by using the light emitting device of the present invention to the display units A 2403 and B 2404. The term image reproducing device equipped with a recording medium includes video game machines.
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2012Semiconductor Energy Laboratory Co., Ltd.Method of manufacturing a liquid crystal display device with a semiconductor film including zinc oxideUS8164099Apr 16, 2010Apr 24, 2012Semiconductor Energy Laboratory Co., Ltd.Display device and manufacturing method thereofUS8368079Oct 27, 2009Feb 5, 2013Semicondutor Energy Laboratory Co., Ltd.Semiconductor device including common potential lineUS8421061Mar 5, 2007Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Memory element and semiconductor device including the memory elementUS8525165Apr 3, 2009Sep 3, 2013Semiconductor Energy Laboratory Co., Ltd.Active matrix display device with bottom gate zinc oxide thin film transistorUS20130280841 *Jun 20, 2013Oct 24, 2013Semiconductor Energy Laboratory Co., Ltd.Light emitting device and method of manufacturing the same* Cited by examinerClassifications U.S. Classification438/22, 438/26, 257/E33.063, 438/115International ClassificationH01L27/32, H01L29/43, G09G3/30Cooperative ClassificationY10S438/976, H01L51/5206, H01L51/5253, H01L27/3246, H01L27/3258, H01L51/56European ClassificationH01L27/32M2I, H01L51/52B2, H01L27/32M2BLegal EventsDateCodeEventDescriptionJul 5, 2012FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google