Source: http://www.google.com/patents/US7065130?dq=6,250,774
Timestamp: 2014-07-13 17:45:24
Document Index: 632732037

Matched Legal Cases: ['art 235', 'art 235', 'art 410', 'arts 455', 'arts 515', 'art 515', 'art 570', 'arts 515', 'arts 515', 'arts 515']

Patent US7065130 - Searching for signals in a communications system - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsA method and system enables matched filters of a CDMA system to be simplified using a two stage search. A course stage and a fine stage jointly produce the location(s) of received signal path-rays. In a first stage, an oversampled digital signal is decimated, and the decimated signal is applied to a...http://www.google.com/patents/US7065130?utm_source=gb-gplus-sharePatent US7065130 - Searching for signals in a communications systemAdvanced Patent SearchPublication numberUS7065130 B1Publication typeGrantApplication numberUS 09/678,165Publication dateJun 20, 2006Filing dateOct 2, 2000Priority dateOct 2, 2000Fee statusPaidAlso published asCN1230990C, CN1468471A, DE60133657D1, DE60133657T2, EP1323242A2, EP1323242B1, WO2002029994A2, WO2002029994A3, WO2002029994A8Publication number09678165, 678165, US 7065130 B1, US 7065130B1, US-B1-7065130, US7065130 B1, US7065130B1InventorsRoozbeh Atarius, H�kan Eriksson, Torgny Palenius, Christer �stberg, Torsten Carlsson, Kjell GustafssonOriginal AssigneeTelefonaktiebolaget Lm Ericsson (Publ)Export CitationBiBTeX, EndNote, RefManPatent Citations (15), Non-Patent Citations (1), Referenced by (2), Classifications (13), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetSearching for signals in a communications systemUS 7065130 B1Abstract A method and system enables matched filters of a CDMA system to be simplified using a two stage search. A course stage and a fine stage jointly produce the location(s) of received signal path-rays. In a first stage, an oversampled digital signal is decimated, and the decimated signal is applied to a matched filter to eventually produce an approximate location. In a second stage, the oversampled signal is shifted based on the determined approximate location and then correlated to a generated code, and a more-exact location is selected from the outputs of the correlations. Alternatively, a shifted version of the generated code is correlated to the oversampled signal, and the more-exact location is selected from the outputs of those correlations.
For example, CDMA, Wideband-CDMA (W-CDMA), etc. are being implemented to improve spectral efficiency and introduce new features. In CDMA or W-CDMA (jointly referred to as �CDMA� hereafter), signal fading is combated by combining multiple received diverse signal path-rays in a RAKE receiver. Locations (in time) of the signal path-rays are first found by using a searcher. Subsequently, these path-rays are combined by using a maximum ratio combiner (MRC). Searchers are conventionally implemented as one or more matched filters and a peak detector. The signal path-rays are matched to a certain pilot sequence, which results in peaks that indicate the locations of the various path-rays. The peak detector detects these resulting peaks.
SUMMARY OF THE INVENTION The needs of the prior art are met by the method and system of the present invention. For example, as heretofore unrecognized, it would be beneficial to reduce the total number of delay candidates that must be considered by a searcher of a receiver when locating diverse signal path-rays. In fact, it would be beneficial if a searcher divided the matching process into coarse signal matching and fine signal matching to reduce the number of delay elements involved in computing the location of signal path-rays.
DETAILED DESCRIPTION OF THE DRAWINGS In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular circuits, logic modules implemented in, for example, software, hardware, firmware, etc.), techniques, etc. in order to provide a thorough understanding of the invention. However, it will be apparent to one of ordinary skill in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known methods, devices, logical code (hardware, software, firmware, etc.), etc. are omitted so as not to obscure the description of the present invention with unnecessary detail.
As noted above, in order to increase the resolution for the detection of the path-rays' arrival times in a CDMA system, the received data is preferably oversampled several (e.g., at least more than one) times per chip. The oversampling rate may be defined as the number of times per chip that a received signal is sampled. This oversampling causes a need for increased complexity of the matched filter(s) because more delay elements are required for the implementation. In accordance with the principles of the present invention, however, this increased complexity is circumvented (e.g., reduced) by dividing the matching process/device into two (2) stages: coarse signal matching (denoted �Stage 1�) and fine signal matching (denoted �Stage 2�).
Continuing now with the searchers 250A and 250B of FIGS. 4A and 4B, respectively, the coarse signal matching (�Stage 1�) is described. One purpose of the coarse signal matching is to locate the signal path-rays approximately. First, however, the incoming signal transmission(s) 225 (of FIG. 2) are converted from analog-to-digital using an A/D converter 405 by oversampling several times per chip. This A/D converter 405 may, for example, be part of the RF part 235, the rake receiver 245, or some other part (not shown). (Therefore, signal 240 may be always digital (e.g., if the A/D converter 405 is part of the RF part 235 (of FIG. 2)) or may be analog at one point and digital at a later point (e.g., if the A/D converter 405 is part of the rake receiver 245).) The (now digital) signal 240 is decimated at a decimation part 410 in order to produce a decimated signal 415, which has fewer elements as compared to the number of elements of which the signal 240 is composed. The decimated signal 415 is then applied to the matched filters 420. The matched filters 420 may be matched to the pilot signal of the signal transmissions) 225.
Continuing now with the searchers 250A and 250B of FIGS. 4A and 4B, respectively, the fine signal matching (�Stage 2�) is described. The fine signal matching is performed using the approximate location(s) of the signal path-rays detected by the coarse signal matching The approximate location(s) is (are) provided as one or more delay candidates (as represented by �D�) from the coarse signal matching. A code generator generates a pattern of the expected data at these approximate location(s), and this generated code pattern is correlated to the undecimated received data having the (over)sampled resolution. In one exemplary embodiment (e.g., as illustrated in the searcher 250A of FIG. 4A), the exact location(s) of the signal path-rays are detectable by shifting the undecimated received data having the (over)sampled resolution and then correlating to the generated code pattern. The exact location of the signal path-rays is determinable by comparing the resulting correlation values. In another exemplary embodiment (e.g., as illustrated in the searcher 250B of FIG. 4B), the exact location(s) of the signal path-rays are detectable by shifting the generated code pattern and then correlating to the undecimated received data having the (over)sampled resolution. The exact location of the signal path-rays is determinable by comparing the resulting correlation values, the selected one(s) of which may be forwarded as output(s).
Continuing now with FIGS. 4A and 4B, the fine signal matching (�Stage 2�) is performed using the detected approximate location(s) 460 (e.g., the delay candidate(s) �D�) of the signal path-rays received from the coarse signal matching (�Stage 1�). A code generator 435 generates a pattern of the expected data as generated code data 440. With reference now only to FIG. 4A, the detected approximate location(s) 460 (�D�) and the (over)sampled signal 240 are applied to shifters 430(D−M/C) . . . 430(D) . . . 430(D+M/C), which delay (e.g., by shifting) the (over)sampled signal 240 from �−M/C� to �+M/C� units. The unit �C�, as explained further hereinbelow with reference to Tables 1-3, relates to the (sub)chip resolution. More specifically, in certain embodiment(s), �C� is proportional to the inverse of the (sub)chip resolution. For example, if a particular embodiment operates on quarter chip resolution, then �C� is equal to four (4) in that particular embodiment. The shifters 430(D−M/C) . . . 430(D) . . . 430(D+M/C) produce as output the shifted (over)sampled signals 400(D−M/C) . . . 400(D . . . 400(D+M/C). The shifted (over)sampled signals 400(D−M/C) . . . 400(D) . . . 400 (D+M/C) and the generated code data 440 are correlated in the correlation elements 445. With reference now only to FIG. 4B, the detected approximate location(s) 460 (�D�) and the generated code data 440 are applied to shifters 430(D−M/C) . . . 430(D) . . . 430 (D+M/C), which delay (e.g., by shifting) the generated code data 440 from �−M/C� to �+M/C� units. The shifters 430(D−M/C) . . . 430(D) . . . 430(D+M/C) produce as output the shifted generated code data 460(D−M/C) . . . 460(D) . . . 460(D+M/C). The shifted generated code data 460(D−M/C) . . . 460(D) . . . 460(D+M/C) and the (over)sampled signal 240 are correlated in the correlation elements 445.
Referring now to FIG. 5A, an exemplary higher-level diagram of signal path-ray detection for the exemplary embodiments of FIGS. 4A and 4B in accordance with the present invention is illustrated generally at 500. The searcher 500 operates in parallel. Referring now to FIG. 5B, another exemplary higher-level diagram of signal path-ray detection for the exemplary embodiments of FIGS. 4A and 4B in accordance with the present invention is illustrated generally at 550. The searcher 550 operates in series. Each of the searchers 500 and 550 begin with �Stage 1� (as identified above with reference to FIGS. 4A and 4B) blocks 505 and 555, respectively. Each of the searchers 500 and 550 include one or more �Stage 2�s. It should be noted that �Stage 2� for the searchers 500 and 550 need not include the comparison parts 455 of the searchers 250A and 250B (of FIGS. 4A and 4B, respectively) because their function may be accomplished by the comparison parts 515 and 570 of the searchers 500 and 550, respectively.
�Stage 1� blocks 505 and 555 produce a number of delay candidates D1 . . . Dk. The value of �k� may be, for example, five (5) or six (6). In the searcher 500, the delay candidates D1 . . . Dk are produced by the �Stage 1� block 505 approximately simultaneously and sent as a vector to the �Stage 2� (as identified above with reference to FIGS. 4A and 4B) blocks 510. The �Stage 2� blocks 510(1) . . . 510(k) each produce an output for a total of �k� outputs that are subsequently compared in the comparison part 515, which also receives as input the delay candidates D1 . . . Dk. In the searcher 550, the delay candidates D1 . . . Dk are produced by the �Stage 1� block 555 approximately simultaneously and sent as a vector to the �Stage 2� block 560. The �Stage 2� block 560 is operated repeatedly (e.g., in serial) �k� times. The serially-produced �k� outputs of the �Stage 2� block 560 are placed in a memory 565 in locations 1 . . . k, respectively. Because each of these �k� outputs actually include �2M+1� (sub)outputs, each memory location 1 . . . k of the memory 565 may contain �2M+1� memory slots. These �k� outputs (or, more precisely, these �k*(2M+1)� outputs) are then passed in parallel to the comparison part 570, which also receives as input the delay candidates D1 . . . Dk.
With respect to both searchers 500 and 550, these �k� (or �k*(2M+1)�) outputs from either the multiple �Stage 2� blocks 510(1) . . . 510(k) or the single �Stage 2�, block 560 (e.g., via the memory 565) are compared in comparison parts 515 and 570, respectively. The comparison parts 515 and 570 may, for example, select the �L� largest of the �k� (or �k*(2M+1)�) outputs that correspond to delay candidates that are the most significant path-rays by, e.g., studying their amplitudes, especially those that are more than one-half chip apart, as is explained hereinbelow in greater detail with reference to Table 3. These selected �L� outputs may be employed in a rake receiver (e.g., the rake receiver 245 of FIG. 2) in order to combine the corresponding signal-path rays using, for example, MRC.
An exemplary comparison for the comparison parts 515 and 570 is now described with reference to Tables 1-3 for explanatory, but not limiting, purposes. Assume that the intention is to locate two peaks (e.g., �L=2�) using two (2) �Stage 2� blocks (e.g., two �Stage 2� blocks 510(1) and 510(2) or the single �Stage 2� block 560 operated twice) with each �Stage 2� block functioning at a quarter chip resolution (e.g., �C=4�). Considering the case when �M=2�; (and therefore each �Stage 2� has �2M+1� outputs), the number of correlators and thus outputs per stage is equal to five (5). In the Table 1 below, the output of a preceding �Stage 1� block 505 or 555 is given as [1, 2]. The consequential outputs of the two �Stage 2� blocks are therefore:
In another example, consider that the output of the �j�th correlator of the �i�th �Stage 2� block is denoted as OUT(i,j) as in Table 2 below:
(OUT (�i�th �Stage 2� block, �j�th correlator)).
From the values in Table 3, the next largest output value is selected, which is the OUT(1,5) and OUT(2,1) delay candidates, where the delay is equal to 1.5 chips. This process may be repeated if more delay candidates are to be determined. In this example, the two �Stage 2� stages overlap at delays of 1.5 chips. It should be noted that this overlap may possibly be avoided by carefully adjusting the delays when they are provided to the �Stage 2� stages.
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