Source: https://patents.google.com/patent/JP4416376B2/en
Timestamp: 2019-12-10 16:58:26
Document Index: 102548313

Matched Legal Cases: ['art 1', 'art 2', 'art 3', 'art 1', 'art 2', 'art 3', 'art 2', 'art 3', 'art 3', 'art 2', 'art 3']

JP4416376B2 - Semiconductor device and manufacturing method thereof - Google Patents
JP4416376B2
JP4416376B2 JP2002136708A JP2002136708A JP4416376B2 JP 4416376 B2 JP4416376 B2 JP 4416376B2 JP 2002136708 A JP2002136708 A JP 2002136708A JP 2002136708 A JP2002136708 A JP 2002136708A JP 4416376 B2 JP4416376 B2 JP 4416376B2
JP2002136708A
JP2003332504A (en
祐二 粟野
2002-05-13 Application filed by 富士通株式会社 filed Critical 富士通株式会社
2002-05-13 Priority to JP2002136708A priority Critical patent/JP4416376B2/en
2003-11-21 Publication of JP2003332504A publication Critical patent/JP2003332504A/en
2010-02-17 Publication of JP4416376B2 publication Critical patent/JP4416376B2/en
The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having good heat dissipation characteristics and a manufacturing method thereof.
The degree of integration of semiconductor integrated circuits such as LSI continues to increase year by year according to Moore's Law, and the amount of heat generated per unit volume is also increasing due to the demand for higher calculation speed. For this reason, countermeasures against heat generation in semiconductor integrated circuits are an important issue.
Heat generation in a semiconductor integrated circuit becomes a more serious problem when an SOI substrate is used as the substrate. This is because in an SOI substrate, an insulating film is formed between the substrate and the semiconductor layer, so that it is difficult to dissipate heat generated from the semiconductor element formed on the semiconductor layer from the substrate side.
In addition, countermeasures against heat generation are an important issue in a single high-power transistor used in a mobile phone base station or the like. This is because the performance deteriorates and the reliability decreases with the generation of heat.
Conventionally, heat radiation has been performed for semiconductor integrated circuits and high-power transistors that generate a large amount of heat by adding a heat sink or adding a forced cooling mechanism such as fin-type air cooling or water cooling.
However, in a semiconductor integrated circuit, heat dissipation is hindered by an interlayer insulating film having a low thermal conductivity stacked on a semiconductor substrate. Further, in a high-power transistor using a compound semiconductor, heat dissipation is hindered by a protective film having low thermal conductivity. For this reason, even if a heat sink or a forced cooling mechanism is added, it has been difficult to achieve sufficient heat dissipation efficiency.
Although a technique for providing a large opening on the back side of the semiconductor substrate and dissipating heat through the opening has been proposed, it is not always easy to provide a large opening on the back side of the semiconductor substrate, and the manufacturing process Increase in cost and increase costs.
An object of the present invention is to provide a semiconductor device and a method for manufacturing the same that can realize good heat dissipation characteristics without causing a significant cost increase.
The object is to provide an element region formed in a semiconductor substrate, a semiconductor element formed in the element region, an insulating film formed on the semiconductor substrate and covering the semiconductor element, embedded in the insulating film, A heat conductor formed directly on the element region or via a catalyst layer on the element region, and the heat conductor is made of carbon nanotubes, and the heat conductor Directly on top of Connected , With irregularities on the surface This is achieved by a semiconductor device further comprising a heat sink.
Further, the object is to provide an element region formed in a semiconductor substrate, a semiconductor element formed in the element region, an insulating film formed on the semiconductor substrate and covering the semiconductor element, and embedded in the insulating film. A heat conductor formed directly on the element region, or formed on the element region via a catalyst layer; A heat sink thermally connected to the heat conductor and having irregularities on the surface; The thermal conductor is made of carbon nanotubes, and further has another thermal conductor thermally connected to the thermal conductor, and the other thermal conductor is made of carbon nanotubes. A relay heat conductor that thermally connects the heat conductor and the other heat conductor, at least between the heat conductor and the relay heat conductor, or the other heat conductor It further has an insulating film formed between the heat conductor and the relay heat conductor, the relay heat conductor also serves as an electrical wiring, and the heat conductor and the relay heat conductor are partly The other heat conductor and the relay heat conductor are partly close to each other, and the insulating film is close to the heat conductor and the relay heat conductor. The other heat conductor and the relay heat between the heat conductor and the relay heat conductor at a position where the other heat conductor and the relay heat conductor are close to each other. Provided between conductors This is achieved by a semiconductor device.
Further, the object is to form a semiconductor element in the element region, to form an insulating film covering the semiconductor element on the semiconductor substrate, and to form an opening reaching the element region in the insulating film. A step of growing a thermal conductor made of carbon nanotubes in the opening, and the thermal conductor Directly on top of Connected , With irregularities on the surface And a step of forming a heat sink. This is achieved by a method for manufacturing a semiconductor device.
1 to FIG. 1 show a semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention. 7 Will be described. FIG. 1 is a sectional view of the semiconductor device according to the present embodiment.
First, the semiconductor device according to the present embodiment will be explained with reference to FIG.
As shown in FIG. 1, an element isolation region 14 for defining an element region 12 is formed on the surface of a semiconductor substrate 10 made of, for example, silicon.
An n-type well 16 a and a p-type well 1 b are formed in the element region 12 defined by the element isolation region 14.
A p-channel transistor 24a having a gate electrode 20a and source / drain diffusion layers 22a is formed in the n-type well 16a. The n-type well 16 a A contact layer 26a into which a p-type dopant impurity is introduced at a high concentration is formed.
In the p-type well 16b, an n-channel transistor 24b having a gate electrode 20b and a source / drain diffusion layer 22b is formed. In the p-type well 16b, a contact layer 26b into which an n-type dopant impurity is introduced at a high concentration is formed.
An electrode 28 is formed on the element isolation region 14. The electrode 28 is connected to, for example, a semiconductor element (not shown) that generates a large amount of heat.
On the semiconductor substrate 10 on which the transistors 24a, 24b and the like are formed, for example, SiO 2 2 Interlayer insulating films 30a to 30f are sequentially stacked.
A wiring 32 made of, for example, Cu is appropriately formed on each of the interlayer insulating films 30a to 30f.
The wiring 32 is appropriately connected to the other wiring 32, the source / drain diffusion layers 22a and 22b, the contact layers 26a and 26b, and the like through vias 34 embedded in the interlayer insulating films 30a to 30f.
On the interlayer insulating film 30f, for example, SiO 2 A protective film 36 is formed.
Openings 38a and 38b are formed in the protective film 36 and the interlayer insulating films 30a to 30f. The opening 38a is formed so as to reach the electrode 28, for example. The opening 38b is formed to reach the surface of the semiconductor substrate 10 in the vicinity of the transistor 24a. The diameters of the openings 38a and 38b are, for example, 0.1 μm.
A columnar heat conductor 42 made of a bundle of carbon nanotubes is embedded in the openings 38a and 38b.
FIG. 1B is a perspective view showing the heat conductor 42 embedded in the openings 38a and 38b.
As shown in FIG. 1B, the heat conductor 42 is constituted by a bundle of a plurality of carbon nanotubes 40. The diameter of the carbon nanotube 40 is, for example, about 1 nm. The heat conductor 42 is constituted by bundles of hundreds to thousands of carbon nanotubes 40.
Here, the carbon nanotube will be described.
A carbon nanotube is a nanostructure formed in a self-organized manner, and is a linear structure composed of carbon elements. The carbon nanotube is cylindrical. Carbon nanotubes are a new carbon-based material that has attracted attention because of its unique physical properties. The carbon nanotube has a structure in which a graphene sheet in which carbon atoms are assembled into a six-membered ring with sp2 bonds having the strongest bonding force is formed into a cylindrical shape. It is known that the diameter of the carbon nanotube is about 0.4 nm at the minimum, and the length of the carbon nanotube is about several hundred μm. Another characteristic of carbon nanotubes is that the dimensional variation is extremely small. Carbon nanotubes vary widely in electrical conductivity from semiconducting to metallic depending on the chirality.
The thermal conductivity of the carbon nanotube is as extremely high as 30 W / (cm · K) or more.
FIG. 2 is a graph showing the thermal conductivity of iron, silver, and diamond.
As you can see from Fig. 2, it is pure diamond 12 The thermal conductivity of C is about 30 W / (cm · K). Carbon nanotubes are pure diamond 12 It has an extremely high thermal conductivity comparable to C.
FIG. 3 is a graph showing the relationship between the diameter of the carbon nanotube and the thermal conductivity. The horizontal axis in FIG. 3 indicates the diameter of the carbon nanotube, and the vertical axis in FIG. 3 indicates the thermal conductivity of the carbon nanotube.
Figure 3 is taken from Thermal Conductivity of Carbon Nanotubes, Jianwei Che, Tahir Cagin, and William A. Goddard III, http://www.foresight.org/Conferences/MNT7/Papers/Che/index.html. It is.
Thus, by using the carbon nanotube, which is a material having extremely high thermal conductivity, as the material of the thermal conductor 42, it is possible to effectively dissipate heat generated in the semiconductor elements such as the transistors 24a and 24b. .
Here, the heat conductor 42 on the left side in FIG. 1A is connected to the electrode 28, and the heat conductor 42 on the right side in FIG. 1A is connected to the surface of the semiconductor substrate 10 in the vicinity of the transistor 24a. Although it connected, the location which connects the heat conductor 42 is not limited to these. What is necessary is just to connect the heat conductor 42 to an appropriate location so that desired heat dissipation may be implement | achieved.
On the protective film 36 and the heat conductor 42, a heat radiating plate 44 made of, for example, aluminum is formed. The heat radiating plate 44 is provided with irregularities 45 to ensure a large surface area.
The radiator plate 44 is in contact with a heat bath 46 such as air or water.
The semiconductor device according to the present embodiment is mainly characterized in that a heat conductor 42 composed of a bundle of carbon nanotubes 40 is embedded in the interlayer insulating films 30a to 30f.
In a conventional semiconductor device, heat generated in a semiconductor element such as a transistor cannot always be effectively dissipated.
On the other hand, according to the present embodiment, since the thermal conductor 42 composed of a bundle of carbon nanotubes 40, which is a material having extremely high thermal conductivity, is embedded in the interlayer insulating films 30a to 30f, the transistors 24a, 24b, etc. It is possible to effectively dissipate heat generated in the semiconductor element. Therefore, according to the present embodiment, a semiconductor device with good heat dissipation characteristics can be provided.
(Method for manufacturing semiconductor device)
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS. FIG. To FIG. These are cross-sectional views showing the method of manufacturing the semiconductor device according to the present embodiment.
First, as shown in FIG. 4A, an element isolation region 14 that defines an element region 12 is formed on the surface of a semiconductor substrate 10 made of, for example, silicon.
Next, the n-type well 16 a and the p-type well 1 are formed in the element region 12 defined by the element isolation region 14. 6 b is formed.
Next, a p-channel transistor 24a having a gate electrode 20a and source / drain diffusion layers 22a is formed in the n-type well 16a. The n-type well 16 a Then, a contact layer 26a into which a p-type dopant impurity is introduced at a high concentration is formed.
Further, an n-channel transistor 24b having a gate electrode 20b and a source / drain diffusion layer 22b is formed in the p-type well 16b. Further, the contact layer 26b into which the n-type dopant impurity is introduced at a high concentration is formed in the p-type well 16b.
Further, the electrode 28 and the like are appropriately formed. Thereby, for example, an electrode 28 connected to a semiconductor element (not shown) having a large calorific value is formed on the element isolation region 14, for example.
Next, on the semiconductor substrate 10 on which the transistors 24a and 24b and the like are formed, for example, SiO 2 2 Interlayer insulating films 30a to 30f made of, wiring 32 made of Cu, for example, and the like are appropriately formed. The wiring 32 is appropriately connected to the other wiring 32, the source / drain diffusion layers 22a and 22b, the contact layers 26a and 26b, and the like through vias 34 embedded in the interlayer insulating films 30a to 30f.
Next, on the entire surface, for example, by CVD, SiO 2 2 A protective film 36 is formed.
Next, as shown in FIG. 4B, a photoresist film 48 is formed on the entire surface by, eg, spin coating. Thereafter, the photoresist film 48 is patterned by using a photolithography technique. As a result, an opening 50 reaching the protective film is formed in the photoresist film 48. The opening 50 is for forming openings 38 a and 38 b in the protective film 36 and the interlayer insulating films 30 a to 30 f for embedding the heat conductor 42 made of the carbon nanotubes 40.
Next, as shown in FIG. 5A, the protective film 36 and the interlayer insulating films 30a to 30f are etched by, for example, plasma etching using the photoresist film 48 as a mask. Thereby, for example, an opening 38a reaching the electrode 28 and an opening 38b reaching the surface of the semiconductor substrate 10 in the vicinity of the transistor 24a, for example, are formed. As an etching gas, for example, SF 6 Can be used.
Next, the catalyst layer 52 is formed on the entire surface by, eg, vapor deposition. The catalyst layer 52 is for growing carbon nanotubes. In addition, as a material of the catalyst layer 52, transition metals, such as Ni, Fe, Co, or these compound alloys can be used suitably, for example. The thickness of the catalyst layer 52 may be, for example, several atomic layers.
Next, the unnecessary catalyst layer 52 is removed by lifting off the photoresist film 48. Thus, the catalyst layer 52 is formed only on the bottom surfaces of the openings 38a and 38b.
Next, as shown in FIG. 5B, a thermal conductor 42 made of carbon nanotubes 40 is grown on the catalyst layer 52 by, for example, thermal CVD. For example, the thermal conductor 42 grows above the upper surface of the protective film 36. As the source gas, for example, acetylene gas can be used. The growth temperature may be about 400 to 600 ° C., for example. Thus, the heat conductor 42 made of the carbon nanotubes 40 is formed in the openings 38a and 38b. The catalyst layer 52 remains at the root of the carbon nanotube 40, that is, the bottom surface of the openings 38a and 38b.
Although the case where the carbon nanotubes 40 are formed by the thermal CVD method has been described here as an example, the carbon nanotubes 40 can be formed not only by the thermal CVD method but also by other growth methods. For example, the carbon nanotubes 40 can be formed by plasma CVD. In this case, for example, methane gas can be used as the source gas. The growth temperature may be about 400 to 600 ° C., for example. When the carbon nanotube 40 is formed by the plasma CVD method, the catalyst layer 52 remains at the tip of the carbon nanotube 40, that is, the upper end of the heat conductor 42.
Next, as shown in FIG. 6A, the thermal conductor 42 protruding on the protective film 36 is partially etched away by an argon ion milling method. In order to partially etch away the thermal conductor 42 protruding on the protective film 36, Ar ions may be incident from an oblique direction with respect to the substrate surface.
Next, a metal layer 54 made of aluminum having a thickness of about 1 μm is formed on the entire surface by, eg, vacuum evaporation.
Next, a photoresist film 56 is formed on the entire surface by spin coating. Thereafter, using a photolithography technique, the photoresist film 56 is patterned in a stripe shape, for example.
Next, using the photoresist film 56 as a mask, the metal layer 54 is etched to a certain depth. Thereby, the unevenness | corrugation 45 is formed in the surface of the metal layer 54, and the surface area of the metal layer 54 becomes large.
Thus, as shown in FIG. 7, a heat radiating plate 44 made of the metal layer 54 is formed.
A semiconductor device and a manufacturing method thereof according to the second embodiment of the present invention will be described with reference to FIGS. FIG. 8 is a sectional view of the semiconductor device according to the present embodiment. 9 to 12 are process cross-sectional views illustrating the method for fabricating the semiconductor device according to the present embodiment. The same components as those of the semiconductor device and the manufacturing method thereof according to the first embodiment shown in FIGS. 1 to 7 are denoted by the same reference numerals, and description thereof is omitted or simplified.
The semiconductor device according to the present embodiment is mainly characterized in that the plurality of heat conductors 42a and 42b are connected in series via the wiring 32a extending in the horizontal direction with respect to the substrate.
As shown in FIG. 8, an opening 38c reaching the surface of the semiconductor substrate 10 in the vicinity of the transistor 24a, for example, is formed in the interlayer insulating film 30a. A thermal conductor 42a made of a bundle of carbon nanotubes 40 is embedded in the opening 38c.
A wiring 32a made of Cu, for example, is formed on the interlayer insulating film 30e. The wiring 32a is connected to the heat conductor 42a.
In the interlayer insulating films 30e and 30f and the protective film 36, an opening 38d reaching the wiring 32a is formed. A thermal conductor 42b made of a bundle of carbon nanotubes 40 is embedded in the opening 38d. The heat conductor 42b is connected in series to the heat conductor 42a via the wiring 32a. The wiring 32a functions as a normal electrical wiring, and also functions as a relay heat conductor that thermally connects the heat conductor 42a and the heat conductor 42b.
As described above, the semiconductor device according to the present embodiment is mainly characterized in that the plurality of heat conductors 42a and 42b are connected in series via the wiring 32a.
In the semiconductor device according to the first embodiment, since one thermal conductor 42 is formed so as to reach the surface of the semiconductor substrate 10 from the surface of the protective film 36, it is not always easy to secure a region in which the thermal conductor 42 is embedded. It wasn't. In particular, the larger the number of wiring layers, the more difficult it is to secure a region for embedding the heat conductor 42.
In contrast, according to the present embodiment, the heat conductor 42a and the heat conductor 42b are connected in series via the wiring 32a extending in the horizontal direction with respect to the substrate. It becomes easy to ensure. Therefore, according to the present embodiment, the degree of freedom in layout can be improved.
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS.
First, the process up to the step of forming the interlayer insulating film 30e is almost the same as the method for manufacturing the semiconductor device described above with reference to FIG.
Next, as shown in FIG. 9A, a photoresist film 58 is formed on the entire surface by spin coating. Thereafter, the photoresist film 58 is patterned by using a photolithography technique. Thereby, an opening 60 reaching the interlayer insulating film 30e is formed in the photoresist film. The opening 60 is for forming an opening 38 c in the interlayer insulating films 30 a to 30 e for embedding the heat conductor 42 a made of a bundle of carbon nanotubes 40.
Next, using the photoresist film 58 as a mask, the interlayer insulating films 30a to 30e are etched by, eg, plasma etching. Thereby, for example, an opening 38c reaching the surface of the semiconductor substrate 10 is formed. As the etching gas, for example, SF can be used as described above. 6 Can be used.
Next, as shown in FIG. 9B, a catalyst layer 62 is formed on the entire surface by, eg, vapor deposition.
Next, the unnecessary catalyst layer 62 is removed by lifting off the photoresist film 58.
Next, as shown in FIG. 9C, a thermal conductor 42a made of carbon nanotubes 40 is grown in the opening 38c by, for example, plasma CVD. As a result, the heat conductor 42a made of a bundle of carbon nanotubes 40 is embedded in the opening 38c. 9C to 12, the catalyst layer 62 is omitted.
Next, as shown in FIG. 10A, for example, SiO film having a thickness of 500 nm. 2 An insulating film 64 is formed.
Next, a photoresist film 66 is formed on the entire surface by, eg, spin coating. Thereafter, the photoresist film 66 is patterned using a photolithography technique. As a result, an opening 68 is formed in the photoresist film 68.
Next, the insulating film 64 is etched using the photoresist film 66 as a mask. As a result, a groove 70 for embedding the wirings 32 and 32 a is formed in the insulating film 64.
Next, as shown in FIG. 10B, a photoresist film 72 is formed on the entire surface by, eg, spin coating. Thereafter, the photoresist film 72 is patterned using a photolithography technique. Thus, openings 76 for forming contact holes 74a and 74b in the interlayer insulating film 30e are formed in the photoresist film 72.
Next, the interlayer insulating film 30e is etched using the photoresist film 72 as a mask. As a result, a contact hole 74a reaching the wiring 32 and a contact hole 74b reaching the via 34 are formed in the interlayer insulating film 30e.
Next, as shown in FIG. 10C, wirings 32 and 32a and vias 34 are embedded in the trench 70 and the contact holes 74a and 74b by a dual damascene method. Specifically, first, a seed layer (not shown) made of Ti, for example, is formed on the entire surface by, eg, sputtering. Thereafter, a Cu layer having a thickness of 1 μm, for example, is formed by plating. Thereafter, the Cu layer is polished by CMP (Chemical Mechanical Polishing) until the surface of the insulating film 64 is exposed. In this way, the wirings 32 and 32a and the via 34 are embedded in the groove 70 and the contact holes 74a and 74b.
Next, as shown in FIG. 11A, an interlayer insulating film 30f, a wiring 32, a via 34, and a protective film 36 are appropriately formed.
Next, a photoresist film 78 is formed on the entire surface by spin coating. Thereafter, the photoresist film 78 is patterned using a photolithography technique. As a result, an opening 80 reaching the protective film 36 is formed in the photoresist film 78. The opening 80 is for forming an opening 38d for embedding the heat conductor 42b made of the carbon nanotube 40 in the protective film 36 and the interlayer insulating films 30e and 30f.
Next, using the photoresist film 78 as a mask, the protective film 36 and the interlayer insulating films 30e and 30f are etched by, eg, plasma etching. Thereby, for example, the opening 38 reaching the wiring 32a. d is It is formed. As the etching gas, for example, SF can be used as described above. 6 Can be used.
Next, the catalyst layer 82 is formed on the entire surface by, eg, vapor deposition. As a result, the catalyst layer 82 is formed on the bottom surface of the opening 38d.
Next, the unnecessary catalyst layer 82 is removed by lifting off the photoresist film 78.
Next, as shown in FIG. 11B, a thermal conductor 42b made of a bundle of carbon nanotubes 40 is formed in the opening 38d by, for example, plasma CVD. In FIG. 11B to FIG. 12, the catalyst layer 82 is omitted.
Next, the heat conductor 42b is removed by protruding onto the protective film 36 by an argon ion milling method.
Next, the heat radiating plate 44 is formed in the same manner as the semiconductor device manufacturing method described above with reference to FIGS. 6B and 7 (see FIG. 12).
(Modification (Part 1))
Next, a modification (No. 1) of the semiconductor device according to the present embodiment will be explained with reference to FIG. FIG. 13 is a cross-sectional view showing a semiconductor device according to this modification.
The semiconductor device according to this modification is mainly characterized in that thin insulating films 84a and 84b are formed between the wiring 32a functioning as a relay heat conductor and the heat conductors 42a and 42b, respectively.
As shown in FIG. 13, between the heat conductor 42a and the wiring 32a, for example, SiO 2 2 An insulating film 84a having a thickness of 5 nm is formed. In addition, the arrow in a figure has shown the heat transfer path | route.
Further, between the wiring 32a and the heat conductor 42b, for example, SiO 2 2 An insulating film 84b having a thickness of 5 nm is formed.
Thus, according to this modification, the heat conductor 42 a, 42 Insulating films 84a and 84b are formed between the wiring b and the wiring 32a, respectively. 42 a, 42 b and the wiring 32a can be electrically insulated. In addition, since the insulating film 84a and the insulating film 84b are thin, the thermal connection between the thermal conductor 42a and the wiring 32a and the thermal connection between the wiring 32a and the thermal conductor 42b are largely hindered. Absent. Therefore, according to the present modification, the thermal conductor 42a and the thermal conductor 42b can be thermally connected while ensuring electrical insulation between the thermal conductors 42a and 42b and the wiring 32a.
(Modification (Part 2))
Next, a modification (No. 2) of the semiconductor device according to the present embodiment will be explained with reference to FIG. FIG. 14 is a cross-sectional view showing a semiconductor device according to this modification.
The semiconductor device according to the present modification is mainly characterized in that the heat conductor 42a and the heat conductor 42b are thermally connected using the wiring 32b made of a bundle of carbon nanotubes.
As shown in FIG. 14, a wiring 32a made of a bundle of carbon nanotubes is formed on the interlayer insulating film 30e. The carbon nanotubes constituting the wiring 32a are grown in the horizontal direction with respect to the substrate surface. In order to grow the carbon nanotubes in the horizontal direction with respect to the substrate surface, the carbon nanotubes may be grown by, for example, a plasma CVD method or a thermal CVD method while applying an electric field in a direction horizontal to the substrate surface.
The wiring 32b made of a bundle of carbon nanotubes is thermally connected to the heat conductors 42a and 42b via the insulating films 84a and 84b, respectively.
In the semiconductor device shown in FIG. 8 or FIG. 13, the thermal conductor 42a and the thermal conductor 42b are thermally connected via the wiring 32a made of Cu, for example. For example, Cu, which is used as the material of the wiring 32a, has a lower thermal conductivity than that of the carbon nanotubes, and thus may not always have good thermal conductivity.
On the other hand, in the present modification, the carbon nanotube, which is a material having extremely high thermal conductivity, is used as the material of the wiring 32b. Therefore, the thermal conductor 42a and the thermal conductor 42b are thermally connected via the wiring 32b. Even in the case of connection, good thermal conductivity can be obtained.
Therefore, according to this modification, a semiconductor device having better heat dissipation characteristics can be provided.
(Modification (Part 3))
Next, a modification (No. 3) of the semiconductor device according to the present embodiment will be explained with reference to FIG. FIG. 15 is a cross-sectional view showing a semiconductor device according to this modification.
The semiconductor device according to this modification is mainly characterized in that a relay heat conductor 42c that thermally connects the heat conductor 42a and the heat conductor 42b is formed integrally with the heat conductors 42a and 42b. is there.
As shown in FIG. 15, a relay heat conductor 42c made of a bundle of carbon nanotubes grown in a direction horizontal to the substrate is formed on the interlayer insulating film 30e. The relay heat conductor 42c is formed integrally with the heat conductor 42a. The relay heat conductor 42 c is formed separately from the wiring 32.
In order to grow carbon nanotubes in a direction horizontal to the substrate and integrally with the heat conductor 42a, an electric field is applied in a direction horizontal to the substrate surface after forming the heat conductor 42a, For example, the carbon nanotubes may be grown by plasma CVD or thermal CVD. When carbon nanotubes are grown in this way, the relay heat conductor 42c is formed integrally with the heat conductor 42a.
A heat conductor 42b grown in a direction perpendicular to the substrate is formed at the end of the relay heat conductor 42c. The heat conductor 42b is formed integrally with the relay heat conductor 42c.
In order to form the heat conductor 42b integrally with the relay heat conductor 42c, an electric field is applied in a direction perpendicular to the substrate surface after the heat conductor 42c is formed, for example, by plasma CVD or thermal CVD. Carbon nanotubes may be grown by the method.
In this manner, the heat conductor 42a, the relay heat conductor 42b, and the heat conductor 42c may be integrally formed.
A semiconductor device and a manufacturing method thereof according to the third embodiment of the present invention will be described with reference to FIGS. FIG. 16 is a cross-sectional view of the semiconductor device according to the present embodiment. 17 to 19 are process cross-sectional views illustrating the method for fabricating the semiconductor device according to the present embodiment. The same components as those of the semiconductor device and the manufacturing method thereof according to the first or second embodiment shown in FIG. 1 to FIG.
The semiconductor device according to the present embodiment is mainly characterized in that the heat conductor 42d is embedded in the semiconductor substrate 10 and can radiate heat from the lower surface side of the semiconductor substrate 10.
As shown in FIG. 16, a heat conductor 42 d made of a bundle of carbon nanotubes is embedded in the semiconductor substrate 10.
A heat sink 44a is formed on the lower surface of the semiconductor substrate 10 in which the heat conductor 42d is embedded.
The heat sink 44 is in contact with a heat bath 46 such as air or water.
In the present embodiment, since the thermal conductor 42d is embedded in the semiconductor substrate 10, the degree of freedom of the location where the thermal conductor 42a is embedded is extremely high. Therefore, according to the present embodiment, the layout in the design can be facilitated.
First, as shown in FIG. 17A, transistors 24a, 24b and the like are formed on the semiconductor substrate 10. Thereafter, an interlayer insulating film 30a is formed on the entire surface.
Next, as shown in FIG. 17B, the semiconductor substrate 10 is turned upside down.
Next, a photoresist film 86 is formed on the entire surface by spin coating.
Thereafter, the photoresist film 86 is patterned by using a photolithography technique. Thereby, an opening 88 reaching the semiconductor substrate 10 is formed in the photoresist film 86. The opening 88 is for forming an opening 90 in the semiconductor substrate 10 for embedding the carbon nanotube 42d.
Next, using the photoresist film 86 as a mask, the semiconductor substrate 10 is etched by, eg, plasma etching. As a result, openings 90a and 90b reaching the interlayer insulating film 30a and openings 90c and 90d reaching the element isolation region 14 are formed.
Next, as shown in FIG. 17C, a catalyst layer 92 is formed on the entire surface by, eg, vapor deposition.
Next, the unnecessary catalyst layer 92 is removed by lifting off the photoresist film 86.
Next, as shown in FIG. 17D, a thermal conductor 42d made of a bundle of carbon nanotubes is formed in the openings 90a to 90d by, for example, plasma CVD. Since the carbon nanotubes are grown by the plasma CVD method, the catalyst layer 92 remains on the upper end of the heat conductor 42d.
Next, as shown in FIG. 18A, the thermal conductor 42d and the catalyst layer 92 protruding from the semiconductor substrate 10 are removed by an argon ion milling method.
Next, as shown in FIG. 18B, a metal layer made of aluminum having a thickness of 1 μm is formed on the entire surface by, eg, vacuum evaporation. Thus, the heat radiating plate 44a made of the metal layer is formed.
Thereafter, the semiconductor substrate 10 is turned upside down.
Thereafter, interlayer insulating films 30b to 30f, wirings 32, vias 34, protective films 36, and the like are appropriately formed in the same manner as in the semiconductor device manufacturing method described above with reference to FIG. 4A (see FIG. 19).
A semiconductor device according to the fourth embodiment of the present invention will be explained with reference to FIG. FIG. 20 is a sectional view of the semiconductor device according to the present embodiment. The same components as those of the semiconductor device and the manufacturing method thereof according to the first to third embodiments shown in FIGS. 1 to 19 are denoted by the same reference numerals, and description thereof is omitted or simplified.
The semiconductor device according to the present embodiment is mainly characterized in that the upper end of the heat conductor 42 is connected to the Peltier element 94 which is a thermoelectric cooling element.
The Peltier element 94 is a structure in which p-type and n-type semiconductors are arranged in parallel, electrically connected in series, and when a current flows, heat absorption (cooling) and heat dissipation (heating) are generated by the Peltier effect. It is an element.
As shown in FIG. 20, an interlayer insulating film 30g is formed on the interlayer insulating film 30f.
A Peltier element 94 is embedded in the interlayer insulating film 30g. The lower surface side of the Peltier element 94 is the low temperature side, and the upper surface side of the Peltier element 94 is the high temperature side.
The upper surface of the heat conductor 42 is connected to the lower surface of the Peltier element 94, that is, the low temperature side.
Wirings 96 a and 96 b are formed on the interlayer insulating film 30 g and the Peltier element 94. The wirings 96 a and 96 b are for supplying power to the Peltier element 94.
A heat radiating plate 44 is formed on the wirings 96a and 96b. The heat radiating plate 44 is thermally connected to the upper surface of the Peltier element 94, that is, the high temperature side, via the wirings 96a and 96b.
According to the present embodiment, a Peltier element that is a heat transfer cooling element between the heat radiating plate 44 and the heat conductor 42. 94 Is provided, the temperature of the heat conductor 42 can be lowered. For this reason, according to this embodiment, semiconductor elements, such as transistors 24a and 24b, can be cooled more.
[Modified Embodiment]
For example, although the heat radiating plate is provided in the above embodiment, the heat radiating plate is not necessarily provided. For example, the heat conductor may be in direct contact with the heat bath. However, heat can be radiated more effectively when the heat sink is provided.
Moreover, in the said embodiment, although the heat conductor consisting of the bundle of carbon nanotubes was formed, the heat conductor does not necessarily need to be the bundle of carbon nanotubes. The thermal conductor may be constituted by a single carbon nanotube.
In the third embodiment, the unevenness is not formed on the surface of the heat dissipation plate 44a. However, the unevenness may be formed on the surface of the heat dissipation plate 44a. Thereby, it is possible to further improve the heat dissipation characteristics.
(Appendix 1) An insulating film formed on a semiconductor substrate;
A thermal conductor embedded in the insulating film,
The heat conductor is composed of a linear structure composed of carbon elements.
(Appendix 2) In the semiconductor device according to Appendix 1,
Further comprising another thermal conductor thermally connected to the thermal conductor;
The other heat conductor is composed of a linear structure composed of carbon elements.
(Appendix 3) In the semiconductor device described in Appendix 2,
It further has a relay heat conductor that thermally connects the heat conductor and the other heat conductor.
(Appendix 4) In the semiconductor device described in Appendix 3,
At least an insulating film formed between the heat conductor and the relay heat conductor or between the other heat conductor and the relay heat conductor is further included.
(Appendix 5) In the semiconductor device according to Appendix 3 or 4,
The relay heat conductor also serves as electrical wiring
(Appendix 6) In the semiconductor device described in Appendix 3,
The relay heat conductor is formed integrally with at least the heat conductor or the other heat conductor.
(Supplementary note 7) In the semiconductor device according to any one of supplementary notes 3 to 6,
The relay heat conductor is composed of a linear structure composed of carbon elements.
(Appendix 8) Having a thermal conductor embedded in a semiconductor substrate,
(Supplementary note 9) In the semiconductor device according to any one of supplementary notes 1 to 8,
A heat sink thermally connected to the heat conductor;
(Supplementary Note 10) In the semiconductor device according to Supplementary Note 9,
The heat sink is made of metal.
(Supplementary note 11) In the semiconductor device according to any one of supplementary notes 1 to 9,
A thermoelectric cooling element connected to the heat conductor;
(Additional remark 12) The process of forming an insulating film on a semiconductor substrate,
Growing a thermal conductor made of a linear structure composed of carbon element in the opening;
(Additional remark 13) The process of forming an opening part in a semiconductor substrate,
As described above, according to the present invention, heat is dissipated using a heat conductor made of carbon nanotubes, which is a material with extremely high thermal conductivity, and therefore heat generated in semiconductor elements such as transistors can be effectively dissipated. Can do. Therefore, according to the present invention, a semiconductor device with good heat dissipation characteristics can be provided.
FIG. 1 is a cross-sectional view showing a semiconductor device according to a first embodiment of the present invention.
FIG. 3 is a graph showing the relationship between the diameter of a carbon nanotube and the thermal conductivity.
FIG. 4 is a process cross-sectional view (part 1) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention;
FIG. 5 is a process cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention;
FIG. 6 is a process cross-sectional view (part 3) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention;
7 is a process cross-sectional view (No. 4) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention; FIG.
FIG. 8 is a cross-sectional view showing a semiconductor device according to a second embodiment of the present invention.
FIG. 9 is a process cross-sectional view (No. 1) illustrating the method for manufacturing the semiconductor device according to the second embodiment of the invention;
FIG. 10 is a process cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the second embodiment of the invention;
FIG. 11 is a process cross-sectional view (part 3) illustrating the method for manufacturing the semiconductor device according to the second embodiment of the present invention;
FIG. 12 is a process cross-sectional view (No. 4) illustrating the method for manufacturing the semiconductor device according to the second embodiment of the invention;
FIG. 13 is a cross-sectional view showing a semiconductor device according to a first modification of the second embodiment of the present invention.
FIG. 14 is a cross-sectional view showing a semiconductor device according to a second modification of the second embodiment of the present invention.
FIG. 15 is a sectional view showing a semiconductor device according to a modification (Part 3) of the second embodiment of the present invention;
FIG. 16 is a cross-sectional view showing a semiconductor device according to a third embodiment of the present invention.
FIG. 17 is a process cross-sectional view (No. 1) illustrating the method for manufacturing the semiconductor device according to the third embodiment of the invention;
FIG. 18 is a process cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the third embodiment of the present invention;
FIG. 19 is a process cross-sectional view (part 3) illustrating the method for manufacturing the semiconductor device according to the third embodiment of the present invention;
FIG. 20 is a cross-sectional view showing a semiconductor device according to a fourth embodiment of the present invention.
10 ... Semiconductor substrate
12 ... Element region
14: Element isolation region
16a ... n-type well
16b ... p-type well
20a, 20b ... gate electrodes
22a, 22b ... Source / drain diffusion layers
24a, 24b ... transistors
26a, 26b ... contact layer
28 ... Electrodes
30a-30g ... interlayer insulation film
32, 32a ... wiring
34 ... via
36 ... Protective film
38a-38c ... opening
40 ... carbon nanotube
42, 42a, 42b, 42d ... thermal conductor
42c ... Relay heat conductor
44, 44a ... Heat sink
45 ... uneven
46 ... Hot bath
48 ... Photoresist film
50 ... opening
52 ... Catalyst layer
54 ... Metal layer
56. Photoresist film
58. Photoresist film
60 ... Opening
62 ... Catalyst layer
64. Insulating film
66. Photoresist film
68 ... opening
70 ... groove
72. Photoresist film
74a, 74b ... contact holes
76 ... opening
78 ... Photoresist film
80 ... opening
82 ... Catalyst layer
84a, 84b ... insulating film
86 ... Photoresist film
88 ... opening
90a-90d ... opening
92 ... Catalyst layer
94 ... Peltier element
96a, 96b ... wiring
An element region formed in a semiconductor substrate;
A semiconductor element formed in the element region;
An insulating film formed on the semiconductor substrate and covering the semiconductor element;
A thermal conductor embedded in the insulating film, directly formed on the element region, or formed on the element region via a catalyst layer;
The thermal conductor is made of carbon nanotubes,
A semiconductor device, further comprising a heat radiating plate connected directly to an upper portion of the heat conductor and having irregularities on the surface .
A thermal conductor embedded in the insulating film, directly formed on the element region, or formed on the element region via a catalyst layer ;
A heat sink thermally connected to the heat conductor and having irregularities on the surface ;
The other thermal conductor, Ri formed from carbon nanotubes,
A relay heat conductor that thermally connects the heat conductor and the other heat conductor;
At least an insulating film formed between the heat conductor and the relay heat conductor or between the other heat conductor and the relay heat conductor;
The relay heat conductor also serves as electrical wiring,
The thermal conductor and the relay thermal conductor are close to each other in part,
The other heat conductor and the relay heat conductor are close to each other in part,
The insulating film is formed between the heat conductor and the relay heat conductor at a location where the heat conductor and the relay heat conductor are close to each other, and between the other heat conductor and the relay heat. A semiconductor device, wherein the semiconductor device is provided between the other thermal conductor and the relay thermal conductor at locations where the conductors are close to each other .
The semiconductor device according to claim 1 or 2 ,
A semiconductor device further comprising a thermoelectric cooling element connected to the heat conductor.
Forming an element region on a semiconductor substrate;
Forming a semiconductor element in the element region;
Forming an insulating film covering the semiconductor element on the semiconductor substrate;
Forming an opening reaching the element region in the insulating film;
Growing a thermal conductor made of carbon nanotubes in the opening;
And a step of forming a heat radiating plate that is directly connected to an upper portion of the heat conductor and has irregularities on the surface thereof.
A semiconductor device, further comprising a second thermal conductor embedded in the insulating film, formed on an element isolation region that defines the element region, and thermally connected to the heat sink.
In the manufacturing method of the semiconductor device according to claim 4 ,
The step of growing the thermal conductor includes a step of forming a catalyst layer in the opening; a step of growing carbon nanotubes by a plasma CVD method; and a step of removing the catalyst layer on the carbon nanotubes. A method of manufacturing a semiconductor device.
JP2002136708A 2002-05-13 2002-05-13 Semiconductor device and manufacturing method thereof Expired - Fee Related JP4416376B2 (en)
JP2002136708A JP4416376B2 (en) 2002-05-13 2002-05-13 Semiconductor device and manufacturing method thereof
US10/435,471 US6800886B2 (en) 2002-05-13 2003-05-12 Semiconductor device and method for fabricating the same
JP2003332504A JP2003332504A (en) 2003-11-21
JP4416376B2 true JP4416376B2 (en) 2010-02-17
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JP2002136708A Expired - Fee Related JP4416376B2 (en) 2002-05-13 2002-05-13 Semiconductor device and manufacturing method thereof
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