Source: http://www.google.com/patents/US8156343?dq=7751826
Timestamp: 2017-03-26 00:43:14
Document Index: 356953063

Matched Legal Cases: ['Application No. 200480035019', 'Application No. 200480035019', 'Application No. 11', 'Application No. 11', 'Application No. 11', 'Application No. 11', 'Application No. 2006', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10']

Patent US8156343 - Accessing private data about the state of a data processing machine from ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsAccording to an embodiment of the invention, a method for operating a data processing machine is described in which data about a state of the machine is written to a location in storage. The location is one that is accessible to software that may be written for the machine. The state data as written...http://www.google.com/patents/US8156343?utm_source=gb-gplus-sharePatent US8156343 - Accessing private data about the state of a data processing machine from storage that is publicly accessibleAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS8156343 B2Publication typeGrantApplication numberUS 10/724,321Publication dateApr 10, 2012Filing dateNov 26, 2003Priority dateNov 26, 2003Fee statusPaidAlso published asCN1886711A, CN1886711B, DE112004002259B4, DE112004002259T5, US9087000, US9348767, US20050114610, US20130067184, US20130275772, WO2005055024A1Publication number10724321, 724321, US 8156343 B2, US 8156343B2, US-B2-8156343, US8156343 B2, US8156343B2InventorsScott H. Robinson, Gustavo P. Espinosa, Steven M. BennettOriginal AssigneeIntel CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (236), Non-Patent Citations (58), Referenced by (4), Classifications (12), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetAccessing private data about the state of a data processing machine from storage that is publicly accessible
US 8156343 B2Abstract
According to an embodiment of the invention, a method for operating a data processing machine is described in which data about a state of the machine is written to a location in storage. The location is one that is accessible to software that may be written for the machine. The state data as written is encoded. This state data may be recovered from the storage according to a decoding process. Other embodiments are also described and claimed.
1. A method for operating a data processing machine, comprising:
Some of the embodiments of the invention relate to how processors read and write state data from and to a storage of a computer system. Other embodiments are also described.
Due to various design considerations, some processors may write private-state data to regions in publicly-accessible storage. The format, semantics and location of this private-state may vary between design implementations. In literature describing the processor, such storage regions are often marked as “RESERVED” indicating that their contents should not be read or modified because they contain private-state. Unfortunately, because this data is written to publicly-accessible storage, software applications, operating systems or external agents (e.g., input-output devices) may access the storage region and use the private-state stored therein inappropriately. Access and use of this private-state by such non-approved entities may lead to erroneous and/or undesirable effects for processor and platform manufacturers and end users.
Processor state, as written to a storage, such as memory, during operation of a processor may include two types of information or data. One type is referred to herein as architectural data, while the other is called implementation-specific data (also herein referred to as “private data” or “private-state data”).
For example, consider processors that have the ISA of the Intel® Pentium® processor as manufactured by Intel Corporation, herein referred to as the IA-32 ISA. The processor may utilize regions in storage during certain operations. For example, when an IA-32 ISA processor enters system management mode, it stores various values to a region of storage called the system management (SMM) state save area. A variety of architectural data is stored (e.g., various machine registers such as ESI, EBP, etc.) in locations and formats which are specified in documentation for the ISA. Additionally, a variety of private data is stored to the system management state save area. In documentation for the ISA, these private-state areas are labeled “Reserved”; the contents, format and semantics of this private data are not specified in the ISA documentation. These “reserved” regions of storage are referred to herein as “private-state regions”.
Different processors may be designed to have different private-state data, also herein called “private data”. This may be done, for example, to improve performance or reduce manufacturing cost. For example, new internal registers may be added, some of the old ones may be used differently, and the format or location of their content that is to be written to storage may be changed for greater efficiency. As a result, the private data for these more recent processors will be different, in content, format, semantics or location, from those of the older versions.
The above-mentioned ability to run old software on a newer machine assumes that the old software did not improperly access a machine's private data (which can change with newer versions of the machine). However, it has been found that software developers are writing application and operating system programs that do the opposite, namely accessing and relying upon private data, as it is stored in, for example, main memory. This creates a problem because older software may not run properly on a newer machine, even though the newer machine has the same architectural data as the older machine and can still “understand” older mechanisms for accessing stored state data (e.g., load and store instructions as defined in the ISA). That is because some or all of the private data may have changed in the newer machine, causing software to function incorrectly. In addition, the manufacturer may be reluctant to add improvements to future versions of its processor because doing so would risk incompatibility problems with older software.
Herein the term “encoding” includes concepts such as encrypting, ciphering, formatting, or the assignment or interpretation of specific bit patterns. Encodings by embodiments of this invention are said herein to “obfuscate” the private data.
Data about a state of the machine 112, such as the contents of certain internal registers 114, is written to a private-state region 132 in storage 130, where the state data as written is “encoded” or “obfuscated.” Thus, although the location where the state data is written is public in that it may be accessed by I/O devices 140 or software 120 (e.g., operating system 122, application software 124) running on the platform hardware 102, the encoding makes it difficult for the state data to be reverse engineered (i.e., decoded) in a timely manner. When the state data is to be recovered from the storage 130, a specified decode process, e.g. a processor-initiated decode process defined by the manufacturer of the processor, is applied. Control over the decode process may be linked to specific processor functions, such as specific instructions and control signals, as discussed below. Non-prescribed methods (alternate software instructions and algorithms) for accessing the state data would not activate these controls and accordingly may be more costly.
The recovered state data may then be placed into the local state 112, which may or may not be accessible to software 120 or I/O devices 140. The local state 112 may be, for example, a region in an internal cache or registers which are not available for ungoverned access through the instruction set architecture (ISA). In some cases local state is not accessible by software or other external agents (e.g., I/O devices). In some cases, some or all of the local state is accessible to software or other external agents. In other cases local state may be indirectly accessible through specific interfaces (e.g., instructions). Because it is internal to the processor and not in “public” storage, the processor can strictly dictate access to the local state.
In an embodiment of the invention, a multi-byte (e.g., 32-bit “long” integer) value of state data is split into several parts which are then stored in non-contiguous locations, rather than all in sequence. Thus, a 4-byte value may be split into four 1-byte values that are stored in non-contiguous locations within a private-state region. The locations at which the four 1-byte values are stored may change dynamically and in a random way while the machine is operating. Of course, the embodiment should be able to locate and decode such data. Note that the ISA may impose certain requirements regarding atomicity of the accesses in cases where single data values are stored or loaded using multiple memory accesses.
Another type of address encoding maps a set of K unique addresses to another set of K unique addresses; that is, mathematically the mapping is bijective (both injective (one-to-one) and surjective (onto)). Here, the upper address bits may remain unchanged, while the lower-order address bits are modified. In such cases it is possible to construct mappings that map a given memory range back onto itself. That is, the base address offset of the memory range is the same and the memory region size is the same. This is an attractive solution because only the data within the memory range is “obfuscated”. That is, only the address bits within the range are mixed. FIG. 4 and FIG. 6 provide examples of one such mapping and associated address-mixing mechanism.
As described above, the obfuscation of data stored in the encoded private-state region 418 may be achieved in a variety of ways. FIG. 4 shows an example of one such mechanism whereby both the data values are encoded and the data layout is encoded/obfuscated. First data values in table 470 are encoded using a Vigenère cipher yielding the data values shown in table 480 (described below). Then a special mapping from logical address values of the private-state data to physical address values is applied where the mapping results illustrated in table 490. The physical addresses dictate where the private-state data is actually stored in memory. The physical addresses are thus said to result from an encoding of the logical addresses.
The table 470 in FIG. 4 entitled “deciphered addr/data” has a list of example logical addresses and their associated private-state data values which are stored in un-encoded form in the cache 416. Here all zero data values were chosen to demonstrate the resulting encoding. Note that an ‘X’ represents the unencoded upper bits of the virtual and physical address of the state data. The table 490 entitled “Private State Memory Address Map” shows an example of the mapping between unencoded and encoded addresses. Here, only the low-order 4 bits are encoded.
S i(t+1)=S i-1(t)+I i+(P i ·S w-1(t)), 1≦i≦w−1
S 0(t+1)=I 0+(P 0 ·S w-1(t))
Here the operator “+” represents modulo 2 addition (XOR) and “·” represents modulo 2 multiplication (AND). Parameter “t” represents time (clock ticks), Si the state of the i'th flip-flop, Ii the i'th input vector bit, and Pi the i'th polynomial coefficient. The Pw coefficient is implicitly 1. To achieve the address mixing embodiment of FIG. 4, replace all Si(t) with the corresponding address Ai values and Si(t+1) with output Oi. Other embodiments are possible.
Primitive polynomials of order w are useful in that they can generate a “maximal sequence”; that is, they can generate all w-bit wide binary combinations or patterns. Primitive polynomials of up to degree 300 (300 bits wide) and even higher orders may be used.
An address generation unit (AGU) 504 receives a special micro-operation and, in this embodiment, computes a logical address having a high component and a low component. In an embodiment, the logical address is a virtual address. In another embodiment, as shown in FIG. 5, the logical address is a linear address as found in Intel® Pentium® processors. In yet another embodiment, the logical address is a physical address and no translation of the high address bits need be done. In FIG. 5, the high component of the address is fed to a linear-to-physical address translation block (also referred to as a translation look-aside buffer or TLB) 508 which translates this high component of the linear address (that may be a virtual page number) into part of a physical address 509.
The encoding of the content values of the private-state data may be accomplished in a way similar to those described above for address obfuscation. One approach is to XOR-in the logical address offsets (for aligned regions of private-state data), or XOR-in some constant seed value, with the contents of a given element of private-state to be encoded. A more sophisticated encoding mechanism may be used on a stream of private-state data values. A variant of a feedback shift register technique (linear, non-linear, multi-input, etc.) may be used with an initial seed. The initial seed is defined to be the initial state loaded into the feedback shift register. For each data value in succession, the shift register may be advanced and its contents bit-wise XOR-ed to the contents of the internal register. This is referred to as a Vigenère cipher and an example of this is shown in tables 470, 480 of FIG. 4 above, where each unencoded content (data) value in 470 is zero (e.g., entry 471) but does not appear as such when stored in encoded form in 480 (e.g., entry 481) in memory 408. With this cipher, the shift register is used to generate a pseudo-random sequence of bit-wise XOR masks. In this case as each pseudo-random byte-wide mask is produced by an MISR (see 480), it is bit-wise XOR'ed with the next data value in the address sequence. Only the polynomial and initial shift register seed value is needed to regenerate the exact same sequence again. In an embodiment, the encode and/or decode unit's configuration information (e.g., polynomial and initial seed) could be stored along with the encoded state region in memory 408. To decode the private-state, the configuration information (e.g., polynomial and initial seed) would be retrieved (and possibly decoded using another fixed encoding technique), and then used. As long as each mask in the sequence is applied to the corresponding data in the same order (e.g., one mask applied per addressable data unit), the bit-wise XOR masking will produce (decode) the original data. As discussed previously, the polynomial and initial MISR seed values may be changed (e.g., boot time, run time, etc) using various methods or change constraints. To recover the original data, the decode method(s) appropriate for the encoding method(s) originally used should be applied, i.e. to undo the encoding. Vigenère ciphers are just one example of a private-state data value encoding mechanism, which is efficient and permits programmability with simple binary coefficient lists, seeds, etc., and a modest amount of hardware with only a few gate delays. Other embodiments are also possible.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS3699532Apr 27, 1970Oct 17, 1972Singer CoMultiprogramming control for a data handling systemUS3996449Aug 25, 1975Dec 7, 1976International Business Machines CorporationOperating system authenticatorUS4037214Apr 30, 1976Jul 19, 1977International Business Machines CorporationKey register controlled accessing systemUS4162536Jan 30, 1978Jul 24, 1979Gould Inc., Modicon Div.Digital input/output system and methodUS4207609May 8, 1978Jun 10, 1980International Business Machines CorporationMethod and means for path independent device reservation and reconnection in a multi-CPU and shared device access systemUS4247905Aug 26, 1977Jan 27, 1981Sharp Kabushiki KaishaMemory clear systemUS4276594Jun 16, 1978Jun 30, 1981Gould Inc. Modicon DivisionDigital computer with multi-processor capability utilizing intelligent composite memory and input/output modules and method for performing the sameUS4278837Jun 4, 1979Jul 14, 1981Best Robert MCrypto microprocessor for executing enciphered programsUS4307447Jun 19, 1979Dec 22, 1981Gould Inc.Programmable controllerUS4319233Nov 28, 1979Mar 9, 1982Kokusan Denki Co., Ltd.Device for electrically detecting a liquid levelUS4319323Apr 4, 1980Mar 9, 1982Digital Equipment CorporationCommunications device for data processing systemUS4347565Nov 30, 1979Aug 31, 1982Fujitsu LimitedAddress control system for software simulationUS4366537May 23, 1980Dec 28, 1982International Business Machines Corp.Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keysUS4403283Jul 28, 1980Sep 6, 1983Ncr CorporationExtended memory system and methodUS4419724Apr 14, 1980Dec 6, 1983Sperry CorporationMain bus interface packageUS4430709Jul 7, 1981Feb 7, 1984Robert Bosch GmbhApparatus for safeguarding data entered into a microprocessorUS4521852Jun 30, 1982Jun 4, 1985Texas Instruments IncorporatedData processing device formed on a single semiconductor substrate having secure memoryUS4558176Sep 20, 1982Dec 10, 1985Arnold Mark GComputer systems to inhibit unauthorized copying, unauthorized usage, and automated cracking of protected softwareUS4571672Dec 19, 1983Feb 18, 1986Hitachi, Ltd.Access control method for multiprocessor systemsUS4630269 *May 16, 1983Dec 16, 1986Data General CorporationMethods for diagnosing malfunctions in a disk driveUS4759064Oct 7, 1985Jul 19, 1988Chaum David LBlind unanticipated signature systemsUS4795893Jul 10, 1987Jan 3, 1989Bull, Cp8Security device prohibiting the function of an electronic data processing unit after a first cutoff of its electrical powerUS4802084Feb 10, 1986Jan 31, 1989Hitachi, Ltd.Address translatorUS4825052Dec 30, 1986Apr 25, 1989Bull Cp8Method and apparatus for certifying services obtained using a portable carrier such as a memory cardUS4907270Jul 9, 1987Mar 6, 1990Bull Cp8Method for certifying the authenticity of a datum exchanged between two devices connected locally or remotely by a transmission lineUS4907272Jul 9, 1987Mar 6, 1990Bull Cp8Method for authenticating an external authorizing datum by a portable object, such as a memory cardUS4910774Jul 8, 1988Mar 20, 1990Schlumberger IndustriesMethod and system for suthenticating electronic memory cardsUS4975836Dec 16, 1985Dec 4, 1990Hitachi, Ltd.Virtual computer systemUS5007082Feb 26, 1990Apr 9, 1991Kelly Services, Inc.Computer software encryption apparatusUS5022077Aug 25, 1989Jun 4, 1991International Business Machines Corp.Apparatus and method for preventing unauthorized access to BIOS in a personal computer systemUS5075842Dec 22, 1989Dec 24, 1991Intel CorporationDisabling tag bit recognition and allowing privileged operations to occur in an object-oriented memory protection mechanismUS5079737Oct 25, 1988Jan 7, 1992United Technologies CorporationMemory management unit for the MIL-STD 1750 busUS5091846 *Oct 30, 1989Feb 25, 1992Intergraph CorporationCache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherencyUS5187802Dec 18, 1989Feb 16, 1993Hitachi, Ltd.Virtual machine system with vitual machine resetting store indicating that virtual machine processed interrupt without virtual machine control program interventionUS5230069Oct 2, 1990Jul 20, 1993International Business Machines CorporationApparatus and method for providing private and shared access to host address and data spaces by guest programs in a virtual machine computer systemUS5237616Sep 21, 1992Aug 17, 1993International Business Machines CorporationSecure computer system having privileged and unprivileged memoriesUS5255379Dec 28, 1990Oct 19, 1993Sun Microsystems, Inc.Method for automatically transitioning from V86 mode to protected mode in a computer system using an Intel 80386 or 80486 processorUS5287363Jul 1, 1991Feb 15, 1994Disk Technician CorporationSystem for locating and anticipating data storage media failuresUS5293424Oct 14, 1992Mar 8, 1994Bull Hn Information Systems Inc.Secure memory cardUS5295251Sep 21, 1990Mar 15, 1994Hitachi, Ltd.Method of accessing multiple virtual address spaces and computer systemUS5317705Aug 26, 1993May 31, 1994International Business Machines CorporationApparatus and method for TLB purge reduction in a multi-level machine systemUS5319760Jun 28, 1991Jun 7, 1994Digital Equipment CorporationTranslation buffer for virtual machines with address space matchUS5361375May 24, 1993Nov 1, 1994Fujitsu LimitedVirtual computer system having input/output interrupt control of virtual machinesUS5386552Jul 18, 1994Jan 31, 1995Intel CorporationPreservation of a computer system processing state in a mass storage deviceUS5421006Apr 20, 1994May 30, 1995Compaq Computer Corp.Method and apparatus for assessing integrity of computer system softwareUS5434999Apr 8, 1993Jul 18, 1995Bull Cp8Safeguarded remote loading of service programs by authorizing loading in protected memory zones in a terminalUS5437033Nov 4, 1991Jul 25, 1995Hitachi, Ltd.System for recovery from a virtual machine monitor failure with a continuous guest dispatched to a nonguest modeUS5442645Oct 24, 1994Aug 15, 1995Bull Cp8Method for checking the integrity of a program or data, and apparatus for implementing this methodUS5455909Apr 22, 1992Oct 3, 1995Chips And Technologies Inc.Microprocessor with operation capture facilityUS5459867Sep 30, 1993Oct 17, 1995Iomega CorporationKernels, description tables, and device driversUS5459869Feb 17, 1994Oct 17, 1995Spilo; Michael L.Method for providing protected mode services for device drivers and other resident softwareUS5469557Mar 5, 1993Nov 21, 1995Microchip Technology IncorporatedCode protection in microcontroller with EEPROM fusesUS5473692Sep 7, 1994Dec 5, 1995Intel CorporationRoving software license for a hardware agentUS5479509Apr 6, 1994Dec 26, 1995Bull Cp8Method for signature of an information processing file, and apparatus for implementing itUS5504922Sep 6, 1994Apr 2, 1996Hitachi, Ltd.Virtual machine with hardware display controllers for base and target machinesUS5506975Dec 14, 1993Apr 9, 1996Hitachi, Ltd.Virtual machine I/O interrupt control method compares number of pending I/O interrupt conditions for non-running virtual machines with predetermined numberUS5511217Nov 30, 1993Apr 23, 1996Hitachi, Ltd.Computer system of virtual machines sharing a vector processorUS5522075Mar 22, 1994May 28, 1996Digital Equipment CorporationProtection ring extension for computers having distinct virtual machine monitor and virtual machine address spacesUS5528231Jun 7, 1994Jun 18, 1996Bull Cp8Method for the authentication of a portable object by an offline terminal, and apparatus for implementing the processUS5533126Apr 21, 1994Jul 2, 1996Bull Cp8Key protection device for smart cardsUS5555385Oct 27, 1993Sep 10, 1996International Business Machines CorporationAllocation of address spaces within virtual machine compute systemUS5555414Dec 14, 1994Sep 10, 1996International Business Machines CorporationMultiprocessing system including gating of host I/O and external enablement to guest enablement at polling intervalsUS5560013Dec 6, 1994Sep 24, 1996International Business Machines CorporationMethod of using a target processor to execute programs of a source architecture that uses multiple address spacesUS5564040Nov 8, 1994Oct 8, 1996International Business Machines CorporationMethod and apparatus for providing a server function in a logically partitioned hardware machineUS5566323Oct 24, 1994Oct 15, 1996Bull Cp8Data processing system including programming voltage inhibitor for an electrically erasable reprogrammable nonvolatile memoryUS5568552Jun 7, 1995Oct 22, 1996Intel CorporationMethod for providing a roving software license from one node to another nodeUS5574936Jan 25, 1995Nov 12, 1996Amdahl CorporationAccess control mechanism controlling access to and logical purging of access register translation lookaside buffer (ALB) in a computer systemUS5582717Sep 11, 1991Dec 10, 1996Di Santo; Dennis E.Water dispenser with side by side filling-stationsUS5604805Feb 9, 1996Feb 18, 1997Brands; Stefanus A.Privacy-protected transfer of electronic informationUS5606617Oct 14, 1994Feb 25, 1997Brands; Stefanus A.Secret-key certificatesUS5615263Jan 6, 1995Mar 25, 1997Vlsi Technology, Inc.Dual purpose security architecture with protected internal operating systemUS5628022Jun 1, 1994May 6, 1997Hitachi, Ltd.Microcomputer with programmable ROMUS5633929Sep 15, 1995May 27, 1997Rsa Data Security, IncCryptographic key escrow system having reduced vulnerability to harvesting attacksUS5655125Nov 1, 1995Aug 5, 1997Intel CorporationRegister for identifying processor characteristicsUS5657445Jan 26, 1996Aug 12, 1997Dell Usa, L.P.Apparatus and method for limiting access to mass storage devices in a computer systemUS5668971Feb 27, 1996Sep 16, 1997Compaq Computer CorporationPosted disk read operations performed by signalling a disk read complete to the system prior to completion of data transferUS5684948Sep 1, 1995Nov 4, 1997National Semiconductor CorporationMemory management circuit which provides simulated privilege levelsUS5706469Sep 11, 1995Jan 6, 1998Mitsubishi Denki Kabushiki KaishaData processing system controlling bus access to an arbitrary sized memory areaUS5717903May 15, 1995Feb 10, 1998Compaq Computer CorporationMethod and appartus for emulating a peripheral device to allow device driver development before availability of the peripheral deviceUS5720609Dec 11, 1996Feb 24, 1998Pfefferle; William CharlesCatalytic methodUS5721222Aug 25, 1995Feb 24, 1998Zeneca LimitedHeterocyclic ketonesUS5729760Jun 21, 1996Mar 17, 1998Intel CorporationSystem for providing first type access to register if processor in first mode and second type access to register if processor not in first modeUS5737604Sep 30, 1996Apr 7, 1998Compaq Computer CorporationMethod and apparatus for independently resetting processors and cache controllers in multiple processor systemsUS5737760Oct 6, 1995Apr 7, 1998Motorola Inc.Microcontroller with security logic circuit which prevents reading of internal memory by external programUS5740178Aug 29, 1996Apr 14, 1998Lucent Technologies Inc.Software for controlling a reliable backup memoryUS5752046Dec 18, 1996May 12, 1998Apple Computer, Inc.Power management system for computer device interconnection busUS5757919Dec 12, 1996May 26, 1998Intel CorporationCryptographically protected paging subsystemUS5764969Feb 10, 1995Jun 9, 1998International Business Machines CorporationMethod and system for enhanced management operation utilizing intermixed user level and supervisory level instructions with partial concept synchronizationUS5796835May 7, 1997Aug 18, 1998Bull Cp8Method and system for writing information in a data carrier making it possible to later certify the originality of this informationUS5796845Jun 26, 1997Aug 18, 1998Matsushita Electric Industrial Co., Ltd.Sound field and sound image control apparatus and methodUS5805712Dec 29, 1995Sep 8, 1998Intel CorporationApparatus and method for providing secured communicationsUS5809546May 23, 1996Sep 15, 1998International Business Machines CorporationMethod for managing I/O buffers in shared storage by structuring buffer table having entries including storage keys for controlling accesses to the buffersUS5825875Oct 11, 1995Oct 20, 1998Cp8 TransacProcess for loading a protected storage zone of an information processing device, and associated deviceUS5825880Jun 4, 1997Oct 20, 1998Sudia; Frank W.Multi-step digital signature method and systemUS5835594Feb 9, 1996Nov 10, 1998Intel CorporationMethods and apparatus for preventing unauthorized write access to a protected non-volatile storageUS5844986Sep 30, 1996Dec 1, 1998Intel CorporationSecure BIOSUS5852717Nov 20, 1996Dec 22, 1998Shiva CorporationPerformance optimizations for computer networks utilizing HTTPUS5854913Jun 10, 1997Dec 29, 1998International Business Machines CorporationMicroprocessor with an architecture mode control capable of supporting extensions of two distinct instruction-set architecturesUS5867577Mar 9, 1995Feb 2, 1999Bull Cp8Method and apparatus for authenticating a data carrier intended to enable a transaction or access to a service or a location, and corresponding carrierUS5872994Nov 12, 1996Feb 16, 1999Nec CorporationFlash memory incorporating microcomputer having on-board writing functionUS5890189Dec 3, 1996Mar 30, 1999Kabushiki Kaisha ToshibaMemory management and protection system for virtual memory in computer systemUS5900606Mar 8, 1996May 4, 1999Schlumberger Industries, S.A.Method of writing information securely in a portable mediumUS5901225Dec 5, 1996May 4, 1999Advanced Micro Devices, Inc.System and method for performing software patches in embedded systemsUS5903752Oct 17, 1996May 11, 1999Intel CorporationMethod and apparatus for embedding a real-time multi-tasking kernel in a non-real-time operating systemUS5919257Aug 8, 1997Jul 6, 1999Novell, Inc.Networked workstation intrusion detection systemUS5935242Oct 28, 1996Aug 10, 1999Sun Microsystems, Inc.Method and apparatus for initializing a deviceUS5935247Sep 18, 1997Aug 10, 1999Geneticware Co., Ltd.Computer system having a genetic code that cannot be directly accessed and a method of maintaining the sameUS5937063Sep 30, 1996Aug 10, 1999Intel CorporationSecure bootUS5953502Feb 13, 1997Sep 14, 1999Helbig, Sr.; Walter AMethod and apparatus for enhancing computer system securityUS5956408Feb 12, 1998Sep 21, 1999International Business Machines CorporationApparatus and method for secure distribution of dataUS5970147Sep 30, 1997Oct 19, 1999Intel CorporationSystem and method for configuring and registering a cryptographic deviceUS5978475Jul 18, 1997Nov 2, 1999Counterpane Internet Security, Inc.Event auditing systemUS5978481Apr 22, 1997Nov 2, 1999Intel CorporationModem compatible method and apparatus for encrypting data that is transparent to software applicationsUS5987557Jun 19, 1997Nov 16, 1999Sun Microsystems, Inc.Method and apparatus for implementing hardware protection domains in a system with no memory management unit (MMU)US5987572 *Sep 29, 1997Nov 16, 1999Intel CorporationMethod and apparatus employing a dynamic encryption interface between a processor and a memoryUS6014745Jul 17, 1997Jan 11, 2000Silicon Systems Design Ltd.Protection for customer programs (EPROM)US6035374Jun 25, 1997Mar 7, 2000Sun Microsystems, Inc.Method of executing coded instructions in a multiprocessor having shared execution resources including active, nap, and sleep states in accordance with cache miss latencyUS6044478May 30, 1997Mar 28, 2000National Semiconductor CorporationCache with finely granular locked-down regionsUS6055637Sep 27, 1996Apr 25, 2000Electronic Data Systems CorporationSystem and method for accessing enterprise-wide resources by presenting to the resource a temporary credentialUS6058478Apr 28, 1997May 2, 2000Intel CorporationApparatus and method for a vetted field upgradeUS6061794Sep 30, 1997May 9, 2000Compaq Computer Corp.System and method for performing secure device communications in a peer-to-peer bus architectureUS6075938Jun 10, 1998Jun 13, 2000The Board Of Trustees Of The Leland Stanford Junior UniversityVirtual machine monitors for scalable multiprocessorsUS6085296Nov 12, 1997Jul 4, 2000Digital Equipment CorporationSharing memory pages and page tables among computer processesUS6088262Feb 24, 1998Jul 11, 2000Seiko Epson CorporationSemiconductor device and electronic equipment having a non-volatile memory with a security functionUS6092095Dec 30, 1996Jul 18, 2000Smart Link Ltd.Real-time task manager for a personal computerUS6093213May 16, 1996Jul 25, 2000Advanced Micro Devices, Inc.Flexible implementation of a system management mode (SMM) in a processorUS6101584May 2, 1997Aug 8, 2000Mitsubishi Denki Kabushiki KaishaComputer system and semiconductor device on one chip including a memory and central processing unit for making interlock access to the memoryUS6108644Feb 19, 1998Aug 22, 2000At&T Corp.System and method for electronic transactionsUS6115816May 18, 1998Sep 5, 2000Intel CorporationOptimized security functionality in an electronic systemUS6125430Oct 30, 1998Sep 26, 2000Compaq Computer CorporationVirtual memory allocation in a virtual address space having an inaccessible gapUS6131166Feb 24, 1999Oct 10, 2000Sun Microsystems, Inc.System and method for cross-platform application level power managementUS6148379Sep 19, 1997Nov 14, 2000Silicon Graphics, Inc.System, method and computer program product for page sharing between fault-isolated cells in a distributed shared memory systemUS6158546Jun 25, 1999Dec 12, 2000Tenneco Automotive Inc.Straight through muffler with conically-ended output passageUS6173417Apr 30, 1998Jan 9, 2001Intel CorporationInitializing and restarting operating systemsUS6175924Jun 20, 1997Jan 16, 2001International Business Machines Corp.Method and apparatus for protecting application data in secure storage areasUS6175925Sep 5, 1997Jan 16, 2001Intel CorporationTamper resistant player for scrambled contentsUS6178509Sep 5, 1997Jan 23, 2001Intel CorporationTamper resistant methods and apparatusUS6182089Sep 23, 1997Jan 30, 2001Silicon Graphics, Inc.Method, system and computer program product for dynamically allocating large memory pages of different sizesUS6188257Feb 1, 1999Feb 13, 2001Vlsi Technology, Inc.Power-on-reset logic with secure power down capabilityUS6192455Mar 30, 1998Feb 20, 2001Intel CorporationApparatus and method for preventing access to SMRAM space through AGP addressingUS6199152Aug 22, 1996Mar 6, 2001Transmeta CorporationTranslated memory protection apparatus for an advanced microprocessorUS6205550Sep 5, 1997Mar 20, 2001Intel CorporationTamper resistant methods and apparatusUS6212635Jul 14, 1998Apr 3, 2001David C. ReardonNetwork security system allowing access and modification to a security subsystem after initial installation when a master token is in placeUS6222923Dec 15, 1997Apr 24, 2001Deutsche Telekom AgMethod for securing system protected by a key hierarchyUS6249872Jan 5, 1998Jun 19, 2001Intel CorporationMethod and apparatus for increasing security against unauthorized write access to a protected memoryUS6252650Aug 28, 2000Jun 26, 2001Nikon CorporationExposure apparatus, output control method for energy source, laser device using the control method, and method of producing microdeviceUS6269392Jun 9, 1997Jul 31, 2001Christian CotichiniMethod and apparatus to monitor and locate an electronic device using a secured intelligent agentUS6272533Feb 16, 1999Aug 7, 2001Hendrik A. BrowneSecure computer system and method of providing secure access to a computer system including a stand alone switch operable to inhibit data corruption on a storage deviceUS6272637Apr 14, 1997Aug 7, 2001Dallas Semiconductor CorporationSystems and methods for protecting access to encrypted informationUS6275933Apr 30, 1999Aug 14, 20013Com CorporationSecurity system for a computerized apparatusUS6282650Jan 25, 1999Aug 28, 2001Intel CorporationSecure public digital watermarkUS6282651Oct 7, 1999Aug 28, 2001Vincent AsheSecurity system protecting data with an encryption keyUS6282657Sep 16, 1998Aug 28, 2001Safenet, Inc.Kernel mode protectionUS6292874Oct 19, 1999Sep 18, 2001Advanced Technology Materials, Inc.Memory management method and apparatus for partitioning homogeneous memory and restricting access of installed applications to predetermined memory rangesUS6301646Jul 30, 1999Oct 9, 2001Curl CorporationPointer verification system and methodUS6308270Feb 13, 1998Oct 23, 2001Schlumberger Technologies, Inc.Validating and certifying execution of a software program with a smart cardUS6314409Oct 26, 1998Nov 6, 2001Veridian Information SolutionsSystem for controlling access and distribution of digital propertyUS6321314Jun 9, 1999Nov 20, 2001Ati International S.R.L.Method and apparatus for restricting memory accessUS6327652Jan 8, 1999Dec 4, 2001Microsoft CorporationLoading and identifying a digital rights management operating systemUS6330670Jan 8, 1999Dec 11, 2001Microsoft CorporationDigital rights management operating systemUS6339815Aug 14, 1998Jan 15, 2002Silicon Storage Technology, Inc.Microcontroller system having allocation circuitry to selectively allocate and/or hide portions of a program memory address spaceUS6339816Aug 7, 1998Jan 15, 2002Siemens Noxdorf Informationssysteme AktiengesellschaftMethod for improving controllability in data processing system with address translationUS6357004Sep 30, 1997Mar 12, 2002Intel CorporationSystem and method for ensuring integrity throughout post-processingUS6363485Sep 9, 1998Mar 26, 2002Entrust Technologies LimitedMulti-factor biometric authenticating device and methodUS6374286Apr 6, 1998Apr 16, 2002Rockwell Collins, Inc.Real time processor capable of concurrently running multiple independent JAVA machinesUS6374317Oct 7, 1999Apr 16, 2002Intel CorporationMethod and apparatus for initializing a computer interfaceUS6378068Jun 1, 1995Apr 23, 2002Nec CorporationSuspend/resume capability for a protected mode microprocesserUS6378072Feb 3, 1998Apr 23, 2002Compaq Computer CorporationCryptographic systemUS6389537Apr 23, 1999May 14, 2002Intel CorporationPlatform and method for assuring integrity of trusted agent communicationsUS6397242Oct 26, 1998May 28, 2002Vmware, Inc.Virtualization system including a virtual machine monitor for a computer with a segmented architectureUS6397379Oct 28, 1999May 28, 2002Ati International SrlRecording in a program execution profile references to a memory-mapped active deviceUS6412035Jan 29, 1998Jun 25, 2002Real Time, Inc.Apparatus and method for decreasing the response times of interrupt service routinesUS6421702Jun 9, 1998Jul 16, 2002Advanced Micro Devices, Inc.Interrupt driven isochronous task scheduler systemUS6435416Nov 20, 2000Aug 20, 2002Schlumberger SystémesMethod of authenticating a personal code of a user of an integrated circuit cardUS6445797Dec 16, 1998Sep 3, 2002Secure Choice LlcMethod and system for performing secure electronic digital streamingUS6463535Oct 5, 1998Oct 8, 2002Intel CorporationSystem and method for verifying the integrity and authorization of software before execution in a local platformUS6463537Jan 4, 1999Oct 8, 2002Codex Technologies, Inc.Modified computer motherboard security and identification systemUS6499123Apr 12, 2000Dec 24, 2002Advanced Micro Devices, Inc.Method and apparatus for debugging an integrated circuitUS6505279Aug 14, 1998Jan 7, 2003Silicon Storage Technology, Inc.Microcontroller system having security circuitry to selectively lock portions of a program memory address spaceUS6507904Mar 31, 2000Jan 14, 2003Intel CorporationExecuting isolated mode instructions in a secure system running in privilege ringsUS6529909Aug 31, 1999Mar 4, 2003Accenture LlpMethod for translating an object attribute converter in an information services patterns environmentUS6535988Sep 29, 1999Mar 18, 2003Intel CorporationSystem for detecting over-clocking uses a reference signal thereafter preventing over-clocking by reducing clock rateUS6557104 *May 2, 1997Apr 29, 2003Phoenix Technologies Ltd.Method and apparatus for secure processing of cryptographic keysUS6560627Jan 28, 1999May 6, 2003Cisco Technology, Inc.Mutual exclusion at the record level with priority inheritance for embedded systems using one semaphoreUS6609199Apr 6, 1999Aug 19, 2003Microsoft CorporationMethod and apparatus for authenticating an open system application to a portable IC deviceUS6615278Mar 29, 1999Sep 2, 2003International Business Machines CorporationCross-platform program, system, and method having a global registry object for mapping registry equivalent functions in an OS/2 operating system environmentUS6633963Jul 18, 2000Oct 14, 2003Intel CorporationControlling access to multiple memory zones in an isolated execution environmentUS6633981Jun 18, 1999Oct 14, 2003Intel CorporationElectronic system and method for controlling access through user authenticationUS6651171Apr 6, 1999Nov 18, 2003Microsoft CorporationSecure execution of program codeUS6678825Jul 18, 2000Jan 13, 2004Intel CorporationControlling access to multiple isolated memories in an isolated execution environmentUS6684326Mar 31, 1999Jan 27, 2004International Business Machines CorporationMethod and system for authenticated boot operations in a computer system of a networked computing environmentUS6779114 *Aug 19, 1999Aug 17, 2004Cloakware CorporationTamper resistant software-control flow encodingUS6996725 *Aug 16, 2001Feb 7, 2006Dallas Semiconductor CorporationEncryption-based security protection for processorsUS7149878 *Oct 30, 2000Dec 12, 2006Mips Technologies, Inc.Changing instruction set architecture mode by comparison of current instruction execution address with boundary address register valuesUS7302516 *Dec 3, 2002Nov 27, 2007Matsushita Electric Industrial Co., Ltd.Apparatus and method of moving picture encoding employing a plurality of processorsUS20010018736Feb 13, 2001Aug 30, 2001Kabushiki Kaisha ToshibaTamper resistant microprocessorUS20010021969May 7, 2001Sep 13, 2001Burger Stephen G.Method and apparatus for pre-validating regions in a virtual addressing schemeUS20010027511Mar 14, 2001Oct 4, 2001Masaki Wakabayashi1-chop microcomputer and IC card using sameUS20010027527Feb 23, 2001Oct 4, 2001Yuri KhidekelSecure transaction systemUS20010037450Mar 1, 2001Nov 1, 2001Metlitski Evgueny A.System and method for process protectionUS20020007456Jun 27, 2001Jan 17, 2002Marcus PeinadoSecure processor architecture for use with a digital rights management (DRM) system on a computing deviceUS20020023032Aug 17, 2001Feb 21, 2002Hewlett-Packard CompanyTrusted systemUS20020147916Apr 4, 2001Oct 10, 2002Strongin Geoffrey S.Method and apparatus for securing portions of memoryUS20020166061May 7, 2001Nov 7, 2002Ohad FalikFlash memory protection scheme for secured shared BIOS implementation in personal computers with an embedded controllerUS20020169717May 9, 2001Nov 14, 2002International Business Machines CorporationSystem and method for installing a remote credit card authorization on a system with a TCPA complaint chipsetUS20030018892Jul 19, 2001Jan 23, 2003Jose TelloComputer with a modified north bridge, security engine and smart card having a secure boot capability and method for secure booting a computerUS20030055928Aug 30, 2002Mar 20, 2003Nec CorporationAutomatic computer configuration system, method and program making use of portable terminalUS20030061385 *May 31, 2001Mar 27, 2003Lucas GonzeComputer network interpretation and translation format for simple and complex machinesUS20030074548Oct 16, 2001Apr 17, 2003International Business Machines CorporationMethod and system for tracking a secure boot in a trusted computing environmentUS20030097551Nov 16, 2001May 22, 2003Fuller David W.System and method for a deploying a hardware configuration with a computer programUS20030115453Dec 17, 2001Jun 19, 2003Grawrock David W.Connecting a virtual token to a physical tokenUS20030126442Dec 31, 2001Jul 3, 2003Glew Andrew F.Authenticated code moduleUS20030126453Dec 31, 2001Jul 3, 2003Glew Andrew F.Processor supporting execution of an authenticated code instructionUS20030159056Feb 15, 2002Aug 21, 2003International Business Machines CorporationMethod and system for securing enablement access to a data security deviceUS20030163718Apr 12, 2001Aug 28, 2003Johnson Harold J.Tamper resistant software-mass data encodingUS20030188179Mar 28, 2002Oct 2, 2003International Business Machines CorporationEncrypted file system using TCPAUS20030196085May 7, 2003Oct 16, 2003Lampson Butler W.System and method for authenticating an operating systemUS20040117539Dec 17, 2002Jun 17, 2004Intel CorporationMethods and systems to control virtual machinesCN1309351AFeb 14, 2001Aug 22, 2001株式会社东芝Interference-free microprocessorDE4217444A1May 26, 1992Dec 3, 1992Hitachi LtdVerfahren und einrichtung zur dynamischen verlagerung von virtuellen maschinen in einem hauptspeicherEP0473913A2Jul 17, 1991Mar 11, 1992International Business Machines CorporationMethod and apparatus for providing a service pool of virtual machines for a plurality of VM usersEP0600112A1Nov 30, 1992Jun 8, 1994Siemens Nixdorf Informationssysteme AktiengesellschaftData processing system with virtual memory addressing and memory access controlled by keysEP0700002A1Aug 25, 1995Mar 6, 1996Motorola, Inc.Modular chip select control circuit and related circuit and methodsEP0892521B1Jul 15, 1998Jan 2, 2003Hewlett-Packard Company, A Delaware CorporationMethod and apparatus for long term verification of digital signaturesEP0930567B1Dec 22, 1998Nov 22, 2006Texas Instruments Inc.Method and apparatus for extending security model to native codeEP0961193B1May 28, 1999Sep 1, 2010Texas Instruments IncorporatedSecure computing deviceEP0965902A2May 5, 1995Dec 22, 1999National Semiconductor CorporationSecure data processor with cryptography and tamper detectionEP1030237A1Feb 15, 1999Aug 23, 2000Hewlett-Packard CompanyTrusted hardware device in a computerEP1055989A1May 28, 1999Nov 29, 2000Hewlett-Packard CompanySystem for digitally signing a documentEP1056014A1May 28, 1999Nov 29, 2000Hewlett-Packard CompanySystem for providing a trustworthy user interfaceEP1085396A1Sep 17, 1999Mar 21, 2001Hewlett-Packard CompanyOperation of trusted state in computing platformEP1126356A2 *Feb 14, 2001Aug 22, 2001Kabushiki Kaisha ToshibaTamper resistant microprocessorEP1146715A1Mar 26, 2001Oct 17, 2001ContentGuard Holdings, Inc.System and method for protection of digital worksEP1271277A2Jul 9, 2001Jan 2, 2003Redstrike B.V.Security system and software to prevent unauthorized use of a computing deviceJP2000076139A Title not availableJP2001318787A Title not available* Cited by examinerNon-Patent CitationsReference1"IA-32 Intel® Architecture Software Developer's Manual, vol. 3: System Programming Guide", Intel Corporation-2003 (pp. 13-1 through 13-24).2"IA-32 Intel® Architecture Software Developer's Manual, vol. 3: System Programming Guide", Intel Corporation—2003 (pp. 13-1 through 13-24).3Berg, Cliff , "How Do I Create a Signed Applet?", Dr. Dobb's Journal, (Aug. 1997),1-9.4Brands, Stefan , "Restrictive Blinding of Secret-Key Certificates", Springer-Verlag XP002201306, (1995),Chapter 3.5Chien, Andrew A., et al., "Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor", 7th Annual IEEE Symposium, FCCM '99.6Compaq Computer Corporation, et al., "Trusted Computing Platform Alliance (TCPA) Main Specification Version 1.1a", (Dec. 2001),1-321.7Coulouris, George , et al., "Distributed Systems, Concepts and Designs", 2nd Edition, (1994),422-424.8Crawford, John , "Architecture of the Intel 80386", Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD '86), (Oct. 6, 1986),155-160.9Davida, George I., et al., "Defending Systems Against Viruses through Cryptographic Authentication", Proceedings of the Symposium on Security and Privacy, IEEE Comp. Soc. Press, ISBN 0-8186-1939-2,(May 1989).10European Patent Office, International Search Report and Written Opinion for International Application No. PCT/US2004/038734, 11 pages, May 25, 2005.11Fabry, R.S. , "Capability-Based Addressing", Fabry, R.S., "Capability-Based Addressing," Communications of the ACM, vol. 17. No. 7, (Jul. 1974),403-412.12Frieder, Gideon , "The Architecture and Operational Characteristics of the VMX Host Machine", The Architecture and Operational Characteristics of the VMX Host Machine, IEEE, (1982),9-16.13Goldberg, Robert P., "Survey of Virtual Machine Research", Computer Magazine, (Jun. 1974),34-35.14Gong, Li , et al., "Going Behond the Sandbox: An Overview of the New Security Architecture in the Java Development Kit 1.2", Proceedings of the USENIX Symposium on Internet Technologies and Systems, Monterey, CA,(Dec. 1997).15Gum, P. H., "System/370 Extended Architecture: Facilities for Virtual Machines", IBM J. Research Development, vol. 27, No. 6, (Nov. 1983),530-544.16Heinrich, Joe , "MIPS R4000 Microprocessor User's Manual, Second Edition", Chapter 4 "Memory Management", (Jun. 11, 1993),61-97.17HP Mobile Security Overview, "HP Mobile Security Overview", (Sep. 2002),1-10.18IBM Corporation, "IBM ThinkPad T30 Notebooks", IBM Product Specification, located at www-1.ibm.com/services/files/cisco-t30-spec-sheet-070202.pdf, last visited Jun. 23, 2004,(Jul. 2, 2002),1-6.19IBM Corporation, "IBM ThinkPad T30 Notebooks", IBM Product Specification, located at www-1.ibm.com/services/files/cisco—t30—spec—sheet—070202.pdf, last visited Jun. 23, 2004,(Jul. 2, 2002),1-6.20IBM, "Information Display Technique for a Terminate Stay Resident Program IBM Technical Disclosure Bulletin", TDB-ACC-No. NA9112156, vol. 34, Issue 7A (Dec. 1, 1991),156-158.21Intel Corporation, "IA-64 System Abstraction Layer Specification", Intel Product Specification, Order No. 245359-001, (Jan. 2000),1-112.22Intel Corporation, "Intel 82802AB/82802AC Firmware Hub (FWH)", Intel Product Datasheet, Document No. 290658-004,(Nov. 2000),1-6, 17-28.23Intel Corporation, "Intel IA-64 Architecture Software Developer's Manual", vol. 2: IA-64 System Architecture, Order No. 245318-001, (Jan. 2000),i, ii, 5.1-5.3, 11.1-11.8,11.23-11.26.24Intel, "Inte1386 DX Microprocessor 32-Bit CHMOS Microprocessor With Integrated Memory Management", (1995),5-56.25International Preliminary Report on Patentability received for PCT Patent Application No. PCT/US2004/038734, mailed on Jun. 8, 2006, 7 pages.26Karger, Paul A., et al., "A VMM Security Kernal for the VAX Architecture", Proceedings of the Symposium on Research in Security and Privacy, XP010020182, ISBN 0-8186-2060-9, Boxborough, MA, (May 7, 1990),2-19.27Kashiwagi, Kazuhiko , et al., "Design and Implementation of Dynamically Reconstructing System Software", Software Engineering Conference, Proceedings 1996 Asia-Pacific Seoul, South Korea Dec. 4-7, 1996, Los Alamitos, CA USA, IEEE Comput. Soc, US, ISBN 0-8186-7638-8,(1996).28Lawton, Kevin , et al., "Running Multiple Operating Systems Concurrently on an IA32 PC Using Virtualization Techniques", http://www.plex86.org/research/paper.txt, (Nov. 29, 1999),1-31.29Luke, Jahn , et al., "Replacement Strategy for Aging Avionics Computers", IEEE AES Systems Magazine, XP002190614,(Mar. 1999).30Menezes, Alfred J., et al., "Handbook of Applied Cryptography", CRC Press Series on Discrete Mathematices and its Applications, Boca Raton, FL, XP002165287, ISBN 0849385237,(Oct. 1996),403-405, 506-515,570.31Menezes, Oorschot , "Handbook of Applied Cryptography", CRC Press LLC, USA XP002201307, (1997),475.32Motorola, "M68040 User's Manual", (1993),1-1 to 8-32.33Nanba, S. , et al., "VM/4: ACOS-4 Virtual Machine Architecture", VM/4; ACOS-4 Virtual Machine Architecture, IEEE, (1985), 171-178.34Office Action Received for Chinese Patent Application No. 200480035019.4, mailed on Jan. 8, 2010, 6 pages of Chinese Office Action, and 8 pages of English Translation.35Office Action Received for Chinese Patent Application No. 200480035019.4, mailed on May 8, 2009, 11 pages of Chinese Office Action, and 5 pages of English Translation.36Office Action Received for German Patent Application No. 11 2004 002 259.2, mailed on Feb. 9, 2007, 2 pages of German Office Action, and 2 pages of English Translation.37Office Action Received for German Patent Application No. 11 2004 002 259.2, mailed on Jul. 20, 2009, 3 pages of German Office Action, and 3 pages of English Translation.38Office Action Received for German Patent Application No. 11 2004 002 259.2, mailed on Nov. 30, 2010, 1 page of German Office Action.39Office Action Received for German Patent Application No. 11 2004 002 259.2, mailed on Sep. 8, 2008, 3 pages of German Office Action, and 3 pages of English Translation.40Office Action Received for Japenese Patent Application No. 2006-541379, mailed on Sep. 29, 2009, 6 pages of Japenese Office Action, and 6 pages of English Translation.41Office Action Received for Korean Patent Application No. 10-2006-7010203, mailed on Apr. 10, 2008, 3 pages of Korean Office Action, and 2 pages of English Translation.42Office Action Received for Korean Patent Application No. 10-2006-7010203, mailed on Dec. 19, 2008, 2 pages of Korean Office Action, and 2 pages of English Translation.43Office Action Received for Korean Patent Application No. 10-2006-7010203, mailed on May 11, 2009, 4 pages of Korean Office Action, and 3 pages of English Translation.44Office Action Received for Korean Patent Application No. 10-2006-7010203, mailed on Oct. 8, 2007, 3 pages of Korean Office Action, and 2 pages of English Translation.45Proceedings, XP010359180, ISBN 0-7695-0375-6, Los Alamitos, CA, (Apr. 21, 1999),209-221.46Richt, Stefan , et al., "In-Circuit-Emulator Wird Echtzeittauglich", Elektronic, Franzis Verlag GMBH, Munchen, DE, vol. 40, No. 16, XP000259620,(100-103),Aug. 6, 1991.47Robin, John S., et al., "Analysis of the Pentium's Ability to Support a Secure Virtual Machine Monitor", Proceedings of the 9th USENIX Security Symposium, XP002247347, Denver, Colorado, (Aug. 14, 2000),1-17.48Rosenblum, M. , "Virtual Platform: A Virtual Machine Monitor for Commodity PC", Proceedings of the 11th Hotchips Conference, (Aug. 17, 1999),185-196.49RSA Security, "Hardware Authenticators", www.rsasecurity.com/node.asp?id=1158, 1-2.50RSA Security, "RSA SecurID Authenticators", www.rsasecurity.com/products/securid/datasheets/SID-DS-0103.pdf, 1-2.51RSA Security, "RSA SecurID Authenticators", www.rsasecurity.com/products/securid/datasheets/SID—DS—0103.pdf, 1-2.52RSA Security, "Software Authenticators", www.srasecurity.com/node.asp?id=1313, 1-2.53Saez, Sergio , et al., "A Hardware Scheduler for Complex Real-Time Systems", Proceedings of the IEEE International Symposium on Industrial Electronics, XP002190615,(Jul. 1999),43-48.54Schneier, Bruce , "Applied Cryptography: Protocols, Algorithm, and Source Code in C", Wiley, John & Sons, Inc., XP002138607; ISBN 0471117099,(Oct. 1995),56-65.55Schneier, Bruce , "Applied Cryptography: Protocols, Algorithm, and Source Code in C", Wiley, John & Sons, Inc., XP002939871; ISBN 0471117099,(Oct.1995),47-52.56Schneier, Bruce , "Applied Cryptography: Protocols, Algorithms, and Source Code C", Wiley, John & Sons, Inc., XP0021111449; ISBN 0471117099,(Oct. 1995),169-187.57Schneier, Bruce , "Applied Cryptography: Protocols, Algorithms, and Source Code in C", 2nd Edition; Wiley, John & Sons. Inc., XP002251738; ISBN 0471128457,(Nov. 1995),28-33; 176-177; 216-217; 461-473; 518-522.58Sherwood, Timothy , et al., "Patchable Instruction ROM Architecture", Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA, (Nov. 2001).Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8983068 *Mar 6, 2013Mar 17, 2015Infineon Technologies AgMasked nonlinear feedback shift registerUS9251090 *Jun 3, 2014Feb 2, 2016Amazon Technologies, Inc.Hypervisor assisted virtual memory obfuscationUS9558081 *Feb 1, 2016Jan 31, 2017Amazon Technologies, Inc.Hypervisor assisted virtual memory obfuscationUS20140254792 *Mar 6, 2013Sep 11, 2014Infineon Technologies AgMasked Nonlinear Feedback Shift Register* Cited by examinerClassifications U.S. Classification713/189, 713/193, 711/203, 713/190, 711/152International ClassificationG06F11/30, G06F21/00Cooperative ClassificationG06F21/78, G06F21/71, G06F12/1408European ClassificationG06F21/78, G06F21/71Legal EventsDateCodeEventDescriptionNov 26, 2003ASAssignmentOwner name: INTEL CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ROBINSON, SCOTT H.;ESPINOSA, GUSTAVO P.;BENNETT, STEVEN M.;REEL/FRAME:014757/0531;SIGNING DATES FROM 20031120 TO 20031121Owner name: INTEL CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ROBINSON, SCOTT H.;ESPINOSA, GUSTAVO P.;BENNETT, STEVEN M.;SIGNING DATES FROM 20031120 TO 20031121;REEL/FRAME:014757/0531Sep 23, 2015FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services