Source: http://www.google.com/patents/US7895377?dq=6721967
Timestamp: 2014-07-14 14:31:59
Document Index: 635640487

Matched Legal Cases: ['Application No. 01', 'Application No. 07024071', 'Application No. 2003', 'art 1', 'art 1', 'art 1', 'art 1', 'application No. 01815580']

Patent US7895377 - Multiple removable non-volatile memory cards serially communicating with a host - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsTwo or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are normally communicated between the...http://www.google.com/patents/US7895377?utm_source=gb-gplus-sharePatent US7895377 - Multiple removable non-volatile memory cards serially communicating with a hostAdvanced Patent SearchPublication numberUS7895377 B2Publication typeGrantApplication numberUS 12/477,341Publication dateFeb 22, 2011Filing dateJun 3, 2009Priority dateAug 17, 2000Also published asCN1208735C, CN1455897A, DE1309919T1, DE60132780D1, DE60132780T2, EP1309919A2, EP1309919B1, EP1903448A2, EP1903448A3, EP1903448B1, EP2278475A2, EP2278475A3, EP2278475B1, EP2278476A2, EP2278476A3, EP2278476B1, EP2278477A2, EP2278477A3, EP2278478A2, EP2278478A3, EP2278479A2, EP2278479A3, EP2278479B1, EP2278480A2, EP2278480A3, EP2278480B1, EP2278481A2, EP2278481A3, EP2278481B1, EP2278482A2, EP2278482A3, EP2278482B1, EP2278483A2, EP2278483A3, EP2306326A1, EP2312449A1, EP2312449B1, US6820148, US6941403, US6948016, US7177964, US7305505, US7590782, US8015340, US8386678, US8700833, US20040215862, US20040215863, US20060026324, US20070130405, US20080077719, US20090240854, US20100199032, US20110113158, US20130138846, WO2002015020A2, WO2002015020A3Publication number12477341, 477341, US 7895377 B2, US 7895377B2, US-B2-7895377, US7895377 B2, US7895377B2InventorsYoram Cedar, Michael Holtzman, Yosi PintoOriginal AssigneeSandisk CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (43), Non-Patent Citations (33), Referenced by (3), Classifications (26), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetMultiple removable non-volatile memory cards serially communicating with a hostUS 7895377 B2Abstract Two or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are normally communicated between the host and the cards by a single circuit commonly connected between the host and all of the sockets but during initialization of the system a unique relative card address is confirmed to have been written into each card inserted into the sockets by connecting the command and status circuit to each socket one at a time in sequence. This is a fast and relatively simple way of setting card addresses upon initialization of such a system. According to a second aspect of the disclosure, the host adapts to transferring data between it and different cards of the system over at least two different number of the data lines commonly connected between the host and all of one or more sockets, each card permanently storing a host readable indication of the number of parallel data lines the card is capable of using. This allows increasing the rate of data transfer when the need justifies an increased card circuit complexity. According to a third aspect of the disclosure, a serial stream of data is sent over a number of data lines from one to many by alternately connecting bits of the stream to a particular number of individual lines.
1. A method of operating a host system, comprising:
utilizing a plurality of command lines to which a plurality of electronic circuit cards external to the host are individually connectable,
separately sending commands through individual ones of the plurality of command lines for causing unique addresses to be stored in individual ones of the plurality of electronic circuit cards when connected with the plurality of command lines, and
thereafter concurrently sending one of the unique addresses through the plurality of command lines in order to address a selected one of the plurality of electronic circuit cards in which said one of the unique addresses is stored when connected with one of the plurality of command lines.
2. A method of operating a host system, comprising:
utilizing a plurality of command lines adapted to individually connect with a different one of a plurality of electronic circuit cards separate from the host system,
sending a command through individual ones of the plurality of command lines, one at a time, that causes unique addresses to be stored in individual ones of the plurality of electronic circuit cards,
addressing a selected one of the plurality of electronic circuit cards by concurrently sending the unique address of the selected one electronic circuit card through the plurality of command lines, and
transferring data with the addressed one of the plurality of electronic circuit cards.
3. A method of operating a host system to communicate with a plurality of electronic circuit cards, comprising:
sending a command through separate command lines to a plurality of sockets for the electronic circuit cards, one at a time, that causes unique addresses to be stored in individual ones of the plurality of electronic circuit cards that are positioned in the sockets, and
thereafter transferring data with a selected one of the plurality of electronic circuit cards positioned in the sockets by concurrently sending the unique address of the selected one electronic circuit card through the separate command lines, wherein the selected one circuit card responds to the transfer of data.
4. A method of operating a system including a plurality of circuit cards that are removeably connected with a host, comprising:
initializing the system by the host sending a command through separate command lines to individual ones of the plurality of circuit cards, one at a time, which causes unique circuit card addresses to be stored in the individual circuit cards, and
thereafter transferring data between the host and one of the plurality of circuit cards by the host concurrently sending the unique address of the one circuit card through the separate command lines to all of the individual ones of the plurality of circuit cards, wherein the one circuit card responds to the transfer of data with the host.
5. The method of claim 4, wherein the unique circuit card addresses are caused to be stored in the individual circuit cards in response to the command from the host by initiating a number generator within the circuit card to generate the unique circuit card address that is stored in the circuit card.
6. The method of claim 4, wherein the unique circuit card addresses are caused to be stored in the individual circuit cards by the host generating the circuit card addresses and writing them into registers within the individual circuit cards.
7. The method of claim 4, wherein the unique circuit card addresses are stored in the individual circuit cards in a manner to be readable by the host.
8. The method of claim 4, wherein, as part of initializing the system, the host reads registers in the individual circuit cards that identify a number of one or more lines through which data may be transferred in parallel with the individual circuit cards, and further wherein, during transferring data, data are transferred between the host and the individual circuit cards over the number of lines read from the registers in the individual circuit cards.
9. The method of claim 4, wherein the data transferred between the host and the individual circuit cards are stored in re-programmable, non-volatile semiconductor memory within the individual circuit cards.
10. A method of operating an electronic circuit card when connected to a host system, comprising:
in a particular electronic circuit card connected to a host system via a particular one of a plurality of command lines to which a plurality of electronic circuit cards external to the host are individually connectable, receiving via the particular command line one of a plurality of commands, each of the plurality of commands being separately sent through individual ones of the plurality of command lines for causing unique addresses to be stored in individual ones of the plurality of electronic circuit cards when connected with individual ones of the plurality of command lines,
in response to receiving the one of the plurality of commands, storing a unique card address in the particular electronic circuit card, and
in response to the particular electronic circuit card receiving the unique card address stored in the particular electronic circuit card, which unique card address is concurrently sent via the plurality of command lines, identifying the unique card address as being directed at the particular electronic circuit card.
11. The method of claim 10, further comprising receiving the unique card address from the host.
12. The method of claim 10, wherein storing the unique card address in the particular electronic circuit includes generating the unique card address from a number generator contained in the particular electronic circuit card.
13. A method of operation of a system having a plurality of electronic devices connected with a host, wherein the devices individually include a memory, comprising:
initializing the system, wherein
the host causes an initialization command to be received by the plurality of devices, one at a time in sequence, without addresses of the devices being used, and
in response to the plurality of devices receiving the initialization command, a unique device address is stored in said one of the plurality of devices at a time, and
thereafter transferring data between the host and a non-volatile memory of a selected one of the plurality of devices, wherein:
the host sends a data command and the unique address of the selected one device so that the data command and the unique address are received by the plurality of devices,
the plurality of devices individually compares the received address with the unique address stored in the device, thereby to cause said one of the plurality of devices to be selected, and
the selected one device executes the data command, thereby to transfer data between its memory and the host, while others of the plurality of devices do not respond to the data command.
14. The method of claim 13, wherein the unique device address is stored in the individual devices as a result of the device designating the unique address that is stored.
15. The method of claim 14, wherein the unique device address is designated within the individual devices by use of number generator within the device.
16. The method of claim 13, wherein the unique device address is stored in the individual devices by the host designating the unique device address and transmitting the designated unique address to the device.
17. The method of claim 13, wherein the unique device addresses are stored in the individual devices in a manner to be readable by the host.
18. The method of claim 13, wherein, as part of initializing the system, the host reads a storage field in the individual devices that indicates a number of data paths through which data may be transferred in parallel with the individual devices, and further wherein, while transferring data between the host and the non-volatile memory of the selected one of the plurality of devices, data are transferred between the host and the selected device over the number of data paths corresponding to the indication read from the storage field of the selected device.
19. The method of any one of claims 13-18, wherein the memory included in the electronic devices includes non-volatile memory.
20. The method of claim 19, wherein the non-volatile memory in the electronic devices includes reprogrammable memory.
21. A method of operating an electronic device, comprising:
utilizing one or more data paths through external electrical contacts of the device, the data paths being operably connected to allow data to be transferred through the contacts into and out of the device,
storing within the device an indication of a number of the one or more data paths, and
providing access for reading the stored indication through one of the one or more data paths.
22. The method of claim 21, wherein the number of the one or more data paths is selected from the group of one, two or four.
23. The method of claim 21, wherein, when the data paths of the device are connected to a host, the host operates by a method comprising:
the host reads the stored data path indication through said one of the one or more data paths, and
the host thereafter communicates data to and from the device through the one or more data paths.
24. The method of claim 21, wherein the method of operating the device additionally comprises:
storing within the device an indication of a unique address of the device in a manner that the address indication may be read through one of the one or more data paths, and
upon initialization of the device, generating and storing the unique address within the device.
25. The method of any one of claims 21-24, wherein the device includes a memory with which data are transferred through the one or more data paths.
26. The method of claim 25, wherein the memory includes re-programmable non-volatile memory.
27. A method of operating a device having external electronic contacts connected with electronic circuits of the device, comprising:
in response to receiving an initialization signal through the contacts, generating a unique address within the device,
storing the generated address in a manner that it is accessible through the contacts, and
thereafter responding to receipt of the unique address through the contacts by enabling a designated operation to be carried out by the device.
28. The method of claim 27, wherein generating the unique address comprises generating the unique address by a number generator provided within the device.
29. The method of claim 28, wherein generating the unique address by a number generator comprises generating the unique address by a random number generator.
30. The method of claim 27, wherein the device additionally includes a number of one or more data paths through external electrical contacts, the data paths being operably connected with the electronic circuits of the device to allow data to be transferred therethrough into and out of the device, the method additionally comprising:
storing within the device an indication of the number of data paths, and
providing for the stored indication to be read through one of the number of data paths.
31. A method of operating an electronic device having external electrical contacts operably connected with electronic circuits of the device, the method comprising:
in response to receipt of a unique address through the contacts of the device, performing an operation within the electronic circuits, and
in response to receipt through the contacts of an initialization command without any device address, storing the unique address within the device.
32. The method of claim 31, wherein storing the unique address includes generating the unique address within the device in response to the receipt of the initialization command.
33. The method of claim 32, wherein generating the unique address includes use of a random number generator within the device.
34. The method of claim 31, wherein the device additionally includes a given number of data paths for transferring data through the contacts, the method additionally comprising:
storing within the device an indication of the given number of data paths, and
providing for the stored indication to be read through one of the given number of data paths.
35. The method of any one of claims 21-24 and 27-34, wherein the device is enclosed within a package.
36. The method of any one of claims 27-34, wherein the electronic circuits of the device include non-volatile memory.
37. The method of claim 36, wherein the non-volatile memory includes re-programmable memory. Description
CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of application Ser. No. 11/947,131, filed Nov. 29, 2007, which in turn is a continuation of application Ser. No. 11/673,958, filed Feb. 12, 2007, now U.S. Pat. No. 7,305,505, which in turn is a continuation of application Ser. No. 11/205,342, filed Aug. 16, 2005, now U.S. Pat. No. 7,177,964, which in turn is a continuation of application Ser. No. 10/849,748, filed May 19, 2004, now U.S. Pat. No. 6,948,016, which in turn is a continuation of application Ser. No. 09/641,023, filed Aug. 17, 2000, now U.S. Pat. No. 6,820,148, which applications are incorporated herein in their entirety by this reference.
A card that is especially adapted for these and other applications is the MultiMediaCard (�MMC�) that is only 32 millimeters long, 24 millimeters wide and 1.4 millimeters thick. The physical and electrical specifications for the MMC are given in �The MultiMediaCard System Specification� that is updated and published from time-to-time by the MultiMediaCard Association (�MMCA�) of Cupertino, Calif. Versions 2.11 and 2.2 of that Specification, dated June 1999 and January 2000, respectively, are expressly incorporated herein by this reference. MMC products having varying storage capacity up to 64 megabytes in a single card are currently available from SanDisk Corporation of Sunnyvale, Calif., assignee of the present application. These products are described in a �MultiMediaCard Product Manual,� Revision 2, dated April 2000, published by SanDisk corporation, which Manual is expressly incorporated herein by this reference. Certain aspects of the electrical operation of the MMC products are also described in co-pending patent applications of Thomas N. Toombs and Micky Holtzman, Ser. Nos. 09/185,649, now U.S. Pat. No. 6,279,114, and 09/186,064, now U.S. Pat. No. 6,901,457, both filed Nov. 4, 1998, and assigned to SanDisk Corporation. The physical card structure and a method of manufacturing it are described in U.S. Pat. No. 6,040,622, assigned to SanDisk Corporation. Both of these applications and patent are also expressly incorporated herein by this reference.
DESCRIPTION OF THE MMC PRODUCT AND SYSTEM With reference to FIG. 1, an existing MMC card 10 of the type described in the Background above is insertable into a slot 19 of a socket 20. The card 10 includes a row of seven electrical contacts 11-17 in a surface of the card and extending along one of its short edges. The socket 20 includes seven mating contact pins 1-7 connected to respective lines 21-27. The card contact 12 serially receives command signals from a host and serially sends a response (status signals) to a host. Mating socket pin 2 is thus connected with a command/response (�CMD�) line 22. Serial data is received through the card contact 17 for storage in its non-volatile memory, and serial data is sent through the contact 17 when read from the memory. The line 27, connected to the socket pin 7 that mates with the card contact 17, is the socket's serial data (�DAT�) line. These two lines 22 and 27, along with a clock signal input line 25, which is connected with the card contact 15 through the socket pin 5, provide an interface with a host computer or other device for operating the memory system within the card 10. Three card contacts 13, 14 and 16 receive an operating voltage from a host system or device, connected through respective socket pins 3, 4 and 6 to external lines 23 (�Vss�), 24 (�Vdd�) and 26 (�Vss2�) Card contact 11, and thus the socket pin 1 and line 21, are not used but were included for possible future use.
Pertinent portions of the memory and controller system within each MMC card 10 are illustrated in FIG. 2. An array 31 of flash EEPROM cells provides non-volatile storage of digital data. A controller 33 manages operation of the array 31 and interfaces with a host system through the card contacts 12-17. Data serially received through the contact 17 are written to a register 35, transferred in parallel into a data storage buffer memory 36, from the buffer 36 to the controller 33 and then to the memory cell array 31 for storage therein. Conversely, data read from the memory cell array 31 are transferred in parallel by the controller 33 into the buffer 36 and from the buffer 36 in parallel into the register 35. The read data are then serially transferred out of the register 35 through the card contact 17.
Several other registers are provided in the MMC card 10, three of them being shown in FIG. 2. A memory card identification CID register 41 is not re-writeable by the user but rather is read-only to provide the host with an identification that is unique for each card. A relative card address register RCA 42 is written by the host in a multi-card system during initialization, and when the card is added or replaced in a system, with an address that is thereafter used by each card to determine whether a command on the common CMD line 22 is intended for that card or not. The relative address only needs to be a few bits in length, depending upon the number of cards within a system that need to have unique addresses. This is much shorter than the manufacturer's unique identification that is stored in the CID register 41, and thus its use speeds up addressing the card. Each command from the host is accompanied by or includes the relative address previously written into the RCA register 42 of one card in the system, and that card then responds to carry out the command while the other cards of the system, having other relative addresses written into their RCA registers 42, do not respond.
A first step 77 in the initialization process is to cause the switching logic 65 to connect one of the command/response lines 71, 73 or 75 to the line 67. In a next step 79, the host 51 then reads the CID register 41 of any card that is inserted into the socket to which the selected command/response line is connected. Although the purpose in this process is to determine whether a card exists in that socket, which occurs in a step 81, the CID is read by the host and stored since it typically contains information about the card that the host can utilize to communicate with it. If no card is detected in that socket, as indicated by a step 83, the logic 65 is switched to select a different one of the command/response lines 71, 73 or 75, and the steps 79 and 81 are repeated to determine whether a card exists in the socket to which the newly selected command/response line is connected.
In order to accommodate the multiple data lines, the data register 35 of FIG. 2 and its operation, are modified in the SD Card, in a specific example, in a manner shown in FIGS. 9 and 10A-E. During writing, the host controller 52′ (FIG. 8) generates a single stream of data in the line 107. Such a stream is illustrated in FIG. 10A, where the letters A, B, C etc. each represent one data bit. The multiplexer 105 connects the logic circuits 110-113 one at a time to the line 107 in sequence for the transfer of only one bit. This is indicated in FIG. 10B for the case of a memory card having four data contacts, and thus when all four of the data lines DAT 0, DAT 1, DAT 2 AND DAT 3 are being used. The multiplexer 105 sends the first bit A over data line DAT 0, the second bit B over data line DAT 1, the third bit C over data line DAT 2, the fourth bit D over DAT 3, and then starts over by sending the bit E to the data line DAT 0, and so forth. These four streams of data are received by the data register 35′ and reassembled into the data sequence of FIG. 10A, which is then transferred in parallel through circuits 38′ to a data buffer like the buffer 36 of FIG. 2. Each individual serial stream of data is preferably sent over its respective data line by accumulating its bits into blocks that each also include cyclic redundancy check (�CCRC�) bits calculated from the block's data. Each block includes a start bit, then the data, followed by the CRC and then a stop bit, in a specific example.
Conversely, when data are being read from the memory, the data are loaded in parallel into the register 35′ and sent over the data lines with one of the formats indicated in FIG. 10B, 10D or 10E, depending upon the number of data lines being used. If the data are being sent over more than one of the data lines, the multiplexer 105 switches back and forth among the data lines being used, in order to result in a stream of data in the line 107 that corresponds to that of one of FIG. 10A, 10C or 10E, depending upon the number of data lines that are being used.
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No. 09/641,023 mailed Mar. 6, 2003, 4 pages.26SanDisk MultiMedia Card Product Manual, Rev. 2, 2000, SanDisk Corporation, pp. 1-86.27SD Group, "SD Memory Card Simplified Specifications, Part 1 Physical Layer Specification", Version 0.96, Jan. 2000, pp. 1-28.28SD Group, "SD Memory Card Specifications, Part 1, Physical Layer Specification, Version 1.0", dated Mar. 22, 2000, 117 pages, Sections 4.3.5, 4.3.6, 4.3.7, 6.5 and 7 redacted.29SD Group, "Supplementary Notes for: SD Memory Card Specifications, Part 1, Physical Layer Specification, Version 1.0, Mar. 2000" dated Jun. 2000, 5 pages, Items 3, 4 and 6 redacted.30SD Memory Card Specifications Part 1 Physical Layer Specification Version 1.0, SD Group, pp. 1-5, 10, 20, 27, 35 and 40, Mar. 22, 2000.31Summary of The MultiMediaCard, Based on System Specification Version 2.2, MMCA Technical Committee, pp. 2-27, Jan. 2000.32The Patent Office of the People's Republic of China, "Notification of the First Office Action", mailed in related Chinese application No. 01815580.4 on Apr. 16, 2004, 10 pages (including translation).33Toshiba SD Card Specification ver. 2.11, Toshiba Corporation, 2001.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8015340Apr 16, 2010Sep 6, 2011Sandisk CorporationEnhanced data communication by a non-volatile memory cardUS8386678 *Jan 18, 2011Feb 26, 2013Sandisk CorporationEnhanced data storage deviceUS8700833Jan 16, 2013Apr 15, 2014Sandisk CorporationData storage device with host-accessible indicator* Cited by examinerClassifications U.S. Classification710/104, 711/115, 710/9International ClassificationG06F13/00, G06F13/14, G06F13/38, G06F12/06, G06F3/08, G06F3/06, G06F12/00, G06K19/07, G06K17/00, G06F13/16Cooperative ClassificationG06F13/1694, G06F2212/2022, G06F12/0661, G06F12/0653, G06F13/385, G06F13/4239, G06F13/387, G06F2213/0052European ClassificationG06F13/38A2, G06F12/06K2, G06F13/38A4, G06F13/42C3A, G06F12/06K2DLegal EventsDateCodeEventDescriptionOct 23, 2013ASAssignmentEffective date: 20001004Owner name: SANDISK CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CEDAR, YORAM;HOLTZMAN, MICKY;PINTO, YOSI;REEL/FRAME:031462/0231RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google