Source: http://www.google.es/patents/US8061913?dq=flatulence
Timestamp: 2013-05-18 22:21:48
Document Index: 396735123

Matched Legal Cases: ['Application No. 04', 'Application No. 2006202695', 'Application No. 2006202695', 'Application No. 04', 'Application No. 04', 'Application No. 04', 'Application No. 2', 'Application No. 04', 'Application No. 04']

Patente US8061913 - Machine having a card processing assembly - Google PatentesB�squeda Im�genes Maps Play YouTube Noticias Gmail Drive M�s » B�squeda avanzada de patentes | Historial web | Iniciar sesi�n B�squeda avanzada de patentesPatentesA machine having a card processing assembly. The card processing assembly has a card drive and a heating device. The heating device is operable to cause a human-readable symbol to be viewable on a data card....http://www.google.es/patents/US8061913?utm_source=gb-gplus-sharePatente US8061913 - Machine having a card processing assembly N�mero de publicaci�nUS8061913 B2Tipo de publicaci�nConcesi�n N�mero de solicitud11/678,837 Fecha de publicaci�n22 Nov 2011 Fecha de presentaci�n26 Feb 2007 Fecha de prioridad2 Sep 2003Tambi�n publicado comoUS7192208US8210759US20050058482US20070134042US20110233273US20110243631US20120302325WO2005021275A2WO2005021275A3 InventoresFranco CrivelliJoseph R. HedrickEric MeyerhoferWilliam R. Wells Cesionario originalIgt Clasificaci�n de EE.UU.400/521235/381235/375 Clasificaci�n internacionalG06K7/08G06F7/08B41J11/58B41J11/44G07F17/42B41J2/32B41M5/00B41J13/12B41LB41J2/01 Clasificaci�n cooperativaG07F17/42B41J2202/35B41J2/32B41J13/12 Clasificaci�n europeaB41J 13/12B41J 2/32G07F 17/42ReferenciasCitas de patentes (110)Otras citas (15)Enlaces externosUSPTO Cesi�n de USPTO EspacenetMachine having a card processing assemblyUS 8061913 B2 Resumen A machine having a card processing assembly. The card processing assembly has a card drive and a heating device. The heating device is operable to cause a human-readable symbol to be viewable on a data card.
68. The machine of claim 60, which includes a card cleaning device operatively coupled to the at least one processor. Descripci�n
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