Source: http://www.google.com/patents/US8067769?dq=6,957,233
Timestamp: 2017-04-28 08:16:09
Document Index: 394801356

Matched Legal Cases: ['Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 10', 'Application No. 095143570', 'Application No. 2005', 'Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 2006', 'Application No. 06', 'Application No. 095143554']

Patent US8067769 - Wafer level package structure, and sensor device obtained from the same ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA wafer level package structure with a plurality of compact sensors such as acceleration sensors and gyro sensors is provided. This package structure is composed of a semiconductor wafer with plural sensor units, and a pair of package wafers bonded to both surfaces of the semiconductor wafer. Each of...http://www.google.com/patents/US8067769?utm_source=gb-gplus-sharePatent US8067769 - Wafer level package structure, and sensor device obtained from the same package structureAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS8067769 B2Publication typeGrantApplication numberUS 12/094,674PCT numberPCT/JP2006/323453Publication dateNov 29, 2011Filing dateNov 24, 2006Priority dateNov 25, 2005Fee statusLapsedAlso published asEP1953815A1, EP1953815A4, EP1953815B1, US20090267165, WO2007061054A1, WO2007061062A1Publication number094674, 12094674, PCT/2006/323453, PCT/JP/2006/323453, PCT/JP/6/323453, PCT/JP2006/323453, PCT/JP2006323453, PCT/JP6/323453, PCT/JP6323453, US 8067769 B2, US 8067769B2, US-B2-8067769, US8067769 B2, US8067769B2InventorsTakafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi SaijoOriginal AssigneePanasonic Electric Works Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (98), Non-Patent Citations (29), Referenced by (1), Classifications (27), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetWafer level package structure, and sensor device obtained from the same package structure
US 8067769 B2Abstract
a semiconductor wafer having a plurality of sensor units, each of which comprises a frame having an opening, a movable portion held in said opening to be movable relative to said frame, and a detecting portion configured to output an electric signal according to a positional displacement of said movable portion;
a first package wafer bonded to one of opposite surfaces of said semiconductor wafer; and
a second package wafer bonded to the other surface of said semiconductor wafer;
the bonding between said semiconductor wafer and the second package wafer is a solid-phase direct bonding without diffusion between said second surface-activated region and a surface-activated region formed on the second package wafer,
wherein at least one of said first surface-activated region and said second surface-activated region comprises a ring-like outer surface-activated region formed over the entire circumference of said frame so as to surround said movable portion, and a ring-like inner surface-activated region formed at an inner side of said outer surface-activated region over the entire circumference of said frame so as to surround said movable portion, and
wherein said wafer level package structure further comprises an auxiliary sealing portion for connecting between said outer surface-activated region and said inner surface-activated region, and wherein said auxiliary sealing portion is formed at plural locations spaced from each other by a predetermined distance in the circumferential direction of said frame.
4. The wafer level package structure as set forth in claim 1, wherein at least one of the bonding between said first surface-activated region and the surface-activated region on the first package wafer and the bonding between said second surface-activated region and the surface-activated region on the second package wafer is any one of the solid-phase direct bonding between Au and Au, the solid-phase direct bonding between Cu and Cu, and the solid-phase direct bonding between Al and Al.
5. The wafer level package structure as set forth in claim 1, wherein each of said sensor units has an integrated circuit operable in collaboration with said detecting portion, and said integrated circuit is disposed adjacent to said opening of said frame, and electrically connected to a through-hole wiring formed in the first package wafer.
6. The wafer level package structure as set forth in claim 5, wherein said integrated circuit is disposed so as to surround said opening of said frame.
7. The wafer level package structure as set forth in claim 5, wherein said through-hole wiring is formed in a tapered shape in the first package wafer such that an end portion facing said sensor unit has a larger area than the other end portion.
8. The wafer level package structure as set forth in claim 1, wherein each of said sensor units is an acceleration sensor unit,
said movable portion comprises a weight and a beam portion extending between said frame and said weight, and
said detecting portion comprises at least one piezoresistive element provided on said beam portion.
9. The wafer level package structure as set forth in claim 1, wherein each of said sensor units is a gyro sensor unit,
said movable portion comprises a first mass body vibrated by a vibrating means, and a second mass body coupled to the first mass body, and
said detecting portion is configured to convert a positional displacement of the second mass body caused when a rotational force is added during the vibration of the first mass body into an electrical signal.
10. The wafer level package structure as set forth in claim 1, wherein each of said sensor units has a conductive layer formed at a position closer to said movable portion than said first surface-activated region, and electrically connected to said detecting portion,
the first package wafer has a through-hole wiring, and a wiring layer electrically connected to said through-hole wiring with respect to each of said sensor units, and
the bonding between the first package wafer and said semiconductor wafer further comprises a solid-phase direct bonding without diffusion between an activated surface of said conductive layer and an activated surface of said wiring layer.
11. A sensor device obtained by cutting the wafer level package structure as set forth in claim 1 into a size of said sensor unit.
12. A wafer level package structure comprising:
the bonding between said semiconductor wafer and the second package wafer is a solid-phase direct bonding without diffusion between said second surface-activated region and a surface-activated region formed on the second package wafer, and
wherein each of said sensor units has an integrated circuit operable in collaboration with said detecting portion, and said integrated circuit is disposed adjacent to said opening of said frame, and electrically connected to a through-hole wiring formed in the first package wafer.
13. The wafer level package structure as set forth in claim 12, wherein said first surface-activated region, said second surface-activated region, the surface-activated region of the first package wafer, and the surface-activated region of the second package wafer are any one of a plasma-treated surface, an ion-beam irradiated surface, and an atomic-beam irradiated surface.
14. The wafer level package structure as set forth in claim 12, wherein at least one of the bonding between said first surface-activated region and the surface-activated region on the first package wafer and the bonding between said second surface-activated region and the surface-activated region on the second package wafer is any one of the solid-phase direct bonding between Si and Si, the solid-phase direct bonding between Si and SiO2, and the solid-phase direct bonding between SiO2 and SiO2.
15. The wafer level package structure as set forth in claim 12, wherein at least one of the bonding between said first surface-activated region and the surface-activated region on the first package wafer and the bonding between said second surface-activated region and the surface-activated region on the second package wafer is any one of the solid-phase direct bonding between Au and Au, the solid-phase direct bonding between Cu and Cu, and the solid-phase direct bonding between Al and Al.
16. The wafer level package structure as set forth in claim 12, wherein at least one of said first surface-activated region and said second surface-activated region comprises a ring-like outer surface-activated region formed over the entire circumference of said frame so as to surround said movable portion, and a ring-like inner surface-activated region formed at an inner side of said outer surface-activated region over the entire circumference of said frame so as to surround said movable portion.
17. The wafer level package structure as set forth in claim 12, wherein said integrated circuit is disposed so as to surround said opening of said frame.
18. The wafer level package structure as set forth in claim 12, wherein said through-hole wiring is formed in a tapered shape in the first package wafer such that an end portion facing said sensor unit has a larger area than the other end portion.
19. The wafer level package structure as set forth in claim 12, wherein each of said sensor units is an acceleration sensor unit,
20. The wafer level package structure as set forth in claim 12, wherein each of said sensor units is a gyro sensor unit,
21. The wafer level package structure as set forth in claim 12, wherein each of said sensor units has a conductive layer formed at a position closer to said movable portion than said first surface-activated region, and electrically connected to said detecting portion,
22. A sensor device obtained by cutting the wafer level package structure as set forth in claim 12 into a size of said sensor unit.
a semiconductor wafer having a plurality of sensor units, each of which comprises a frame having an opening, a movable portion held in the opening to be movable relative to the frame, and a detecting portion configured to output an electric signal according to a positional displacement of the movable portion; a first package wafer bonded to one of opposite surfaces of the semiconductor wafer; and a second package wafer bonded to the other surface of the semiconductor wafer; wherein the frame of each of the sensor units has a first surface-activated region formed on a surface facing the first package wafer over an entire circumference thereof so as to surround the movable portion, and a second surface-activated region formed on a surface facing the second package wafer over an entire circumference thereof so as to surround the movable portion,
the bonding between the semiconductor wafer and the first package wafer is a solid-phase direct bonding without diffusion between the first surface-activated region and a surface-activated region formed on the first package wafer, and
the bonding between the semiconductor wafer and the second package wafer is a solid-phase direct bonding without diffusion between the second surface-activated region and a surface-activated region formed on the second package wafer.
According to the present invention, since one surface of the semiconductor wafer is bonded over the entire circumference of the frame of each of the sensor units with the first package wafer, and the other surface of the semiconductor wafer is bonded over the entire circumference of the frame of each of the sensor units with the second package wafer, it is possible to seal an interior of each of the sensor units from the outside in an airtight manner. As a result, a desired atmosphere can be maintained in the interior of the sensor unit. For example, when the sensor unit is an acceleration sensor unit, an inert-gas atmosphere can be maintained in the interior of the sensor unit. Alternatively, when the sensor unit is a gyro sensor unit, a reduced atmosphere of high degree of vacuum can be maintained in the interior of the sensor unit. In addition, since each of the first and second package wafers is bonded to the semiconductor wafer by the solid-phase direct bonding without diffusion, it is possible to avoid a problem that variations in sensor characteristics occur due to residual stress at the bonding interface in the case of using a heat treatment such as reflow soldering as the bonding method. As a result, compact sensor devices each having small variations in sensor characteristics and good airtightness therein can be integrally formed in the wafer level package structure.
As shown in FIGS. 6A, 6B and 7, the first package substrate 2 is formed at a surface facing the sensor substrate 1 with a concave portion 21 for providing a space for positional displacement of the movable portion comprised of the weight portion 12 and the flexible portions 13 of the sensor substrate 1, and a plurality of through holes 22 (e.g., eight through holes) formed in the thickness direction around the concave portion 21. The outer peripheral shape of each of the sensor substrate 1 and the first package substrate 2 is a rectangular shape, and the first package substrate 2 is formed to have the same outside dimension as the sensor substrate 1.
Referring to FIGS. 13A to 13C, the bonding step between the sensor substrate 1 and each of the first package substrate 2 and the second package substrate 3 is concretely explained below. First, as shown in FIG. 13A, the sensor substrate 1, the first package substrate 2 and the second package substrate 3 are placed in a chamber CH, and the air in the chamber is exhausted to be not greater than a predetermined degree of vacuum (e.g., 1×10−5 Pa). Subsequently, under a reduced atmosphere, surfaces of the sensor substrate 1, the first package substrate 2 and the second package substrate 3 are cleaned up by means of sputter etching, and then a surface activation treatment is performed. That is, the surface activation treatment is performed to the surfaces of the first and second metal layers (18, 19) of the sensor substrate 1, the surface of the frame portion 11 to be bonded to the second package substrate 3, the metal layers (28, 29) of the first package substrate 2, and the surface of the second package substrate 3 to be bonded to the sensor substrate. With this treatment, the first and second metal layers (18, 19) of the sensor substrate I are formed with first surface-activated regions 50 in their treated surfaces, respectively. As well, the sensor substrate 1 is formed with second surface-activated regions 60 in its treated surface. As the surface activation treatment, an argon ion beam is irradiated to the surfaces to be treated for a predetermined time period (e.g., 300 seconds). During the surface activation treatment, the internal pressure of the chamber is maintained at a lower degree of vacuum (e.g., approximately 1×10−2 Pa) than the above-described degree of vacuum. In place of the argon ion beam, an atomic beam or plasma of argon may be used. The gas used for the surface activation treatment is not limited to argon. Alternatively, an inert gas such as nitrogen and helium may be used.
As shown in FIGS. 15A and 15B, the sensor substrate 1 of the present embodiment is formed with a sensor region E1 comprising a part of the frame portion 11 explained in the first embodiment, the with portion 12, the flexible portions 13, and the piezoresistive elements (Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4), the IC region E2 having the integrated circuit described above, and a bonding region E3 hag the first meta layer 18 explained in the first embodiment. In a plan view, a layout of those regions (E1, E2, E3) is designed such that the sensor region E1 is positioned at a substantially center portion of the sensor substrate 1, the IC region E2 is formed around the sensor region E1, and the bonding region E3 is formed around the IC region E2. The frame portion 11 of the sensor substrate 1 of the present embodiment has a larger outside dimension than that of the first embodiment. In other words, since the sensor substrate 1 has an increased width dimension of the frame portion 11, the integrate circuit can be mounted on the frame portion 11.
In the present embodiment, the sensor substrate 101 is formed by use of a silicon substrate having a resistivity of 0.2 Ω·cm. Each of the first and second pack substrates (102, 103) is formed by use of a silicon substrate having a resistivity of 20 Ω·cm. These resistivity values are illustrative only, and therefore the present invention is not limited to them.
After micromachining is appropriately performed to the sensor substrate 101, and the sensor substrate 102 is bonded to the second package substrate 103 at room temperature, an etching step for separating a portion used as the movable portion of the sensor substrate 101 from the other portion and a metal layer formation step for forming the first and second metal layers (126, 128) are performed. In the present embodiment, the sensor substrate 101 is bonded to the second page substrate 103 by the room-temperature bonding between Si and SiO2. Subsequently, the sensor substrate 101 integrated with the second package substrate 103 and the first package substrate 102 are placed in the chamber, and the chamber is vacuum exhausted to a predetermined degree of vacuum (e.g., 1×10−5 Pa). Then, a surface activation treatment is performed. That is, the surfaces to be bonded to each other of the sensor substrate 101 and the first package substrate 102 are cleaned up and activated by means of sputter etching in vacuum. The degree of vacuum in the chamber during the surface activation treatment is approximately 1×10−2 Pa, which is a lower degree of vacuum, as compared with the predetermined degree of vacuum in the chamber before the surface activation treatment.
After the surface activation treatment, an atmosphere adjusting step is performed to adjust the interior atmosphere of the chamber, in which the sensor substrate 101 and the second package substrate 103 are placed, to a designed atmosphere determined according to gyro sensor characteristics. In this regard, the gyro sensor of the present embodiment is designed in a predetermined degree of vacuum (a high vacuum of 1×10−4 Pa or less), in order to increase a mechanical Q value (mechanical quality coefficient Qm) indicative of a mechanical vibration level in the of the resonance frequency, and achieve an improvement in sensitivity. In the atmosphere adjustment step of the present embodiment, after the surface activation treatment is finished, the interior atmosphere of the chamber is adjusted to the designed atmosphere by performing vacuum pumping until the degree of vacuum in the chamber reaches a predetermined degree of vacuum.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4988035Sep 5, 1989Jan 29, 1991Nippon Kokan Kabushiki KaishaMethod of liquid phase diffusion bonding of metal bodiesUS5392650 *Apr 22, 1993Feb 28, 1995Northrop Grumman CorporationMicromachined accelerometer gyroscopeUS5448014 *Jan 27, 1993Sep 5, 1995Trw Inc.Mass simultaneous sealing and electrical connection of electronic devicesUS5525549 *Apr 21, 1993Jun 11, 1996Nippondenso Co., Ltd.Method for producing an acceleration sensorUS5654244 *Apr 26, 1995Aug 5, 1997Nippondenso Co., Ltd.Process for producing semiconductor strain-sensitive sensorUS5869876 *Jan 24, 1997Feb 9, 1999Denso CorporationSemiconductor strain sensorUS5948982 *Feb 23, 1998Sep 7, 1999Alliedsignal Inc.Vibrating beam accelerometers and methods of forming vibrating beam accelerometersUS6222868Sep 16, 1998Apr 24, 2001Canon Kabushiki KaishaSurface-type optical device, fabrication method therefor and display deviceUS6228675Jul 23, 1999May 8, 2001Agilent Technologies, Inc.Microcap wafer-level package with viasUS6257060 *Nov 2, 1999Jul 10, 2001Alliedsignal Inc.Combined enhanced shock load capability and stress isolation structure for an improved performance silicon micro-machined accelerometerUS6465892Apr 13, 2000Oct 15, 2002Oki Electric Industry Co., Ltd.Interconnect structure for stacked semiconductor deviceUS6555901Oct 3, 1997Apr 29, 2003Denso CorporationSemiconductor device including eutectic bonding portion and method for manufacturing the sameUS6596117 *Apr 17, 2001Jul 22, 2003Drs Sensors & Targeting Systems, Inc.Method for fabricating a sealed-cavity microstructureUS6683358 *Nov 11, 1997Jan 27, 2004Asahi Kasei Kabushiki KaishaSilicon integrated accelerometerUS6701786 *Apr 29, 2002Mar 9, 2004L-3 Communications CorporationClosed loop analog gyro rate sensorUS6892578 *Nov 21, 2003May 17, 2005Hitachi Metals Ltd.Acceleration sensorUS7019231 *Mar 29, 2005Mar 28, 2006Fujitsu Media Devices LimitedInertial sensorUS7089792 *Aug 22, 2003Aug 15, 2006Analod Devices, Inc.Micromachined apparatus utilizing box suspensionsUS7243542 *Nov 3, 2003Jul 17, 2007L-3 Communications CorporationClosed loop analog gyro rate sensorUS7406870 *Dec 14, 2005Aug 5, 2008Ricoh Company, Ltd.Semiconductor sensorUS7617728 *May 17, 2006Nov 17, 2009Donato CardarelliTuning fork gyroscopeUS7674638 *Nov 24, 2006Mar 9, 2010Panasonic Electric Works Co., Ltd.Sensor device and production method thereforUS7968958 *Jun 24, 2008Jun 28, 2011Denso CorporationSemiconductor device and manufacturing method of the sameUS20020008444 *Aug 26, 1997Jan 24, 2002Minoru SakataMicro-relay and method for manufacturing the sameUS20020180031Apr 23, 2002Dec 5, 2002Mitsubishi Denki Kabushiki KaishaSemiconductor deviceUS20030003684 *Oct 1, 2001Jan 2, 2003Silicon Genesis CorporationMethod and apparatus for multi-frequency bondingUS20030038328 *Aug 16, 2002Feb 27, 2003Seiichiro Ishiosemiconductor device and a method of producing the sameUS20030183921 *Jun 6, 2002Oct 2, 2003Hiroyoshi KomobuchiElectronic device and method for manufacturing the sameUS20040016942 *Apr 17, 2003Jan 29, 2004Seiko Epson CorporationSemiconductor device and a method of manufacturing the same, a circuit board and an electronic apparatusUS20040016981 *Jun 5, 2003Jan 29, 2004Matsushita Electric Works, Ltd.Semiconductor acceleration sensor using doped semiconductor layer as wiringUS20040053435Jun 23, 2003Mar 18, 2004Matsushita Electric Industrial Co., Ltd.Electronic device and method for fabricating the electronic deviceUS20040065638 *Oct 7, 2002Apr 8, 2004Bishnu GogoiMethod of forming a sensor for detecting motionUS20040207485Mar 26, 2004Oct 21, 2004Osamu KawachiSurface acoustic wave device and method of fabricating the sameUS20040238943Oct 30, 2003Dec 2, 2004Tetsuo FujiiDynamic quantity sensorUS20040245891 *Jun 4, 2004Dec 9, 2004Fujitsu Media Devices LimitedSurface acoustic wave device and method of producing the sameUS20050167795 *Nov 14, 2003Aug 4, 2005Shinko Electric Industries Co., Ltd.Electronic devices and its production methodsUS20050217373 *Mar 29, 2005Oct 6, 2005Hiroshi IshikawaInertial sensorUS20060022325 *Jul 27, 2005Feb 2, 2006Samsung Electronics Co., Ltd.Cap wafer, semiconductor package, and fabricating method thereofUS20070111471 *Dec 2, 2004May 17, 2007Bondtech, Inc.Bonding method, device produced by this method, and bonding deviceUS20070158822Feb 22, 2007Jul 12, 2007Denso CorporationDynamic quantity sensorUS20080302185 *Sep 9, 2005Dec 11, 2008Masami YakabeMicrostructure Inspecting Apparatus and Microstructure Inspecting MethodUS20090267165 *Nov 24, 2006Oct 29, 2009Takafumi OkudoWafer level package structure, and sensor device obtained from the same package structureDE10351761A1Nov 6, 2003May 27, 2004Denso Corp., KariyaDynamic value sensor, e.g. semiconductor acceleration sensor, has a switching circuit board that is arranged over the sensor moving element and is sealed to the sensor circuit board, thus also acting as a protection capEP0278030A1Feb 10, 1987Aug 17, 1988Nippon Kokan Kabushiki KaishaInsert for liquid phase diffusion bondingEP0905838A1Sep 21, 1998Mar 31, 1999Canon Kabushiki KaishaSurface-type optical device, fabrication method therefor and display deviceJP2791429B2 Title not availableJP3532788B2 Title not availableJP2001060635A Title not availableJP2001068616A Title not availableJP2001183389A * Title not availableJP2003069044A * Title not availableJP2003100919A Title not availableJP2003179085A Title not availableJP2003318178A * Title not availableJP2003329704A Title not availableJP2004057507A Title not availableJP2004085547A Title not availableJP2004109114A Title not availableJP2004200547A Title not availableJP2004209585A Title not availableJP2004233072A Title not availableJP2004304622A Title not availableJP2004364041A * Title not availableJP2005091166A Title not availableJP2005127750A Title not availableJP2005129888A Title not availableJP2005166909A Title not availableJP2005181644A * Title not availableJP2005191556A * Title not availableJP2005251898A Title not availableJP2005292117A Title not availableJP2006202974A * Title not availableJPH0212663U Title not availableJPH0263173A Title not availableJPH0279044U Title not availableJPH0367177A * Title not availableJPH0595122A Title not availableJPH0645618A * Title not availableJPH0815300A Title not availableJPH0818068A * Title not availableJPH0832090A Title not availableJPH02218172A * Title not availableJPH05175247A Title not availableJPH05281251A * Title not availableJPH05288771A Title not availableJPH06318625A * Title not availableJPH07283334A Title not availableJPH09203747A * Title not availableJPH09266266A Title not availableJPH09292049A * Title not availableJPH10177034A * Title not availableJPS6053054A Title not availableKR19980086900A Title not availableKR20030017428A Title not availableTWI249507B Title not availableWO2005086597A2Mar 14, 2005Sep 22, 2005Matsushita Electric Works, Ltd.Gyro sensor and sensor apparatus using sameWO2005104228A1Mar 29, 2005Nov 3, 2005Matsushita Electric Works, Ltd.Sensor device, sensor system and methods for manufacturing themWO2006030716A1 *Sep 9, 2005Mar 23, 2006Octec Inc.Microstructure inspecting apparatus and microstructure inspecting method* Cited by examinerNon-Patent CitationsReference1Akaike, Hirotake et al., "Technology Tendency of Bonding for MEMS Device by Japanese Patent Research", Japan Institute of Electronics Packaging, 2003, vol. 6, No. 7, pp. 602-609.2Decision of Refusal for the Application No. 2006-089558 from Japan Patent Office mailed Sep. 25, 2007.3Decision of Refusal for the Application No. 2006-089589 from Japan Patent Office mailed Sep. 25, 2007.4Decision of Refusal for the Application No. 2006-089633 from Japan Patent Office mailed Sep. 25, 2007.5Esashi, Masayoshi, "MEMS and Its Application", Journal of Japan Institute of Electronics Packaging, 2002, vol. 5, No. 6, pp. 537-541.6International Search Report for Application No. PCT/JP2006/323455 mailed Feb. 6, 2007.7International Search Report for Application No. PCT/JP2006/323459 mailed Feb. 6, 2007.8International Search Report for the Application No. PCT/JP2006/323453 mailed Feb. 6, 2007.9Itoh, Toshihiro et al., "Problems in MEMS Packaging and Application of Surface Activated Bonding (SAB) Method", Electronics Mounting Society Paper, 2001, vol. 4, No. 1, pp. 25-27.10Korean Office Action for the Application No. 10-2008-7012313 from Korean Intellectual Property Office dated Nov. 30, 2010.11Notice of Official Action for the Application No. 095143570 from Taiwan Intellectual Property Office dated Dec. 14, 2009.12Notification of Reasons for Refusal for Application No. 2005-371042 from Japan Patent Office mailed Dec. 26, 2006.13Notification of Reasons for Refusal for Application No. 2006-089555 from Japan Patent Office mailed Dec. 5, 2006.14Notification of Reasons for Refusal for Application No. 2006-089556 from Japan Patent Office mailed Dec. 5, 2006.15Notification of Reasons for Refusal for Application No. 2006-089579 from Japan Patent Office mailed Dec. 5, 2006.16Notification of Reasons for Refusal for Application No. 2006-089580 from Japan Patent Office mailed Dec. 5, 2006.17Notification of Reasons for Refusal for Application No. 2006-089586 from Japan Patent Office mailed Dec. 26, 2006.18Notification of Reasons for Refusal for Application No. 2006-089588 from Japan Patent Office mailed Mar. 6, 2007.19Notification of Reasons for Refusal for the Application No. 2006-089558 from Japan Patent Office mailed Mar. 6, 2007.20Notification of Reasons for Refusal for the Application No. 2006-089633 from Japan Patent Office mailed Mar. 6, 2007.21Notification of Reasons for Refusal for the Application No. 2006-089634 from Japan Patent Office mailed Dec. 26, 2006.22Suga, Tadatomo, "Bonding Technology for Micro-Machines", Plastic Processing Symposium, 2002, 211th, pp. 15-20.23Supplementary European Search Report for the Application No. 06 83 3259 dated Jun. 24, 2011.24Taiwanese Office Action for the Application No. 095143554 from Taiwanese Patent Office dated Sep. 17, 2009.25Takagi, Hideki et al., "Low Temperature, Pressure Less Bonding of Si and SiO2 by the Surface Activation Method", Japan Welding Society Paper, 1997, vol. 61, pp. 224-225.26U.S. Non-Final Office Action for the U.S. Appl. No. 12/094,600 from U.S. Patent and Trademark Office mailed Mar. 1, 2011.27U.S. Non-Final Office Action for the U.S. Appl. No. 12/094,772 from U.S. Patent and Trademark Office mailed Sep. 28, 2010.28U.S. Restriction Requirement for the U.S. Appl. No. 12/094,600 from U.S. Patent and Trademark Office mailed Jan. 5, 2011.29U.S. Restriction Requirement for the U.S. Appl. No. 12/094,772 from U.S. Patent and Trademark Office mailed Jun. 8, 2010.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS20160122177 *Jun 2, 2014May 5, 2016Robert Bosch GmbhTrapped membrane* Cited by examinerClassifications U.S. Classification257/48, 257/254, 257/415, 438/17, 257/419, 257/417International ClassificationH01L21/66, G01C19/56, G01P15/18Cooperative ClassificationG01C19/56, B81C2203/0109, B81B2201/0235, G01P15/18, B81C2203/038, G01P15/0802, G01P1/023, B81C1/00269, B81C2203/019, B81B2201/0242, G01P15/123, G01P2015/0842European ClassificationG01P15/08A, G01P15/18, G01C19/56, G01P15/12D, B81C1/00C14B, G01P1/02BLegal EventsDateCodeEventDescriptionJun 12, 2008ASAssignmentOwner name: MATSUSHITA ELECTRIC WORKS, LTD., JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:OKUDO, TAKAFUMI;SUZUKI, YUJI;TAKEGAWA, YOSHIYUKI;AND OTHERS;REEL/FRAME:021089/0212Effective date: 20080527Jan 28, 2009ASAssignmentOwner name: PANASONIC ELECTRIC WORKS CO., LTD.,JAPANFree format text: CHANGE OF NAME;ASSIGNOR:MATSUSHITA ELECTRIC WORKS, LTD.;REEL/FRAME:022206/0574Effective date: 20081001Owner name: PANASONIC ELECTRIC WORKS CO., LTD., JAPANFree format text: CHANGE OF NAME;ASSIGNOR:MATSUSHITA ELECTRIC WORKS, LTD.;REEL/FRAME:022206/0574Effective date: 20081001Jul 10, 2015REMIMaintenance fee reminder mailedNov 29, 2015LAPSLapse for failure to pay maintenance feesJan 19, 2016FPExpired due to failure to pay maintenance feeEffective date: 20151129RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services