Source: http://www.google.com/patents/US7855448?ie=ISO-8859-1&dq=7181427
Timestamp: 2014-10-20 10:14:41
Document Index: 745491142

Matched Legal Cases: ['Application No. 60', 'art 800', 'art 3400', 'art 3500', 'art 3500', 'Application No. 04002178']

Patent US7855448 - Optimization of routing layers and board space requirements for ball grid ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA method and apparatus for improved contact pad arrays and land patterns for integrated circuit packages are presented. A plurality of conductive pads are arranged in an array of rows and columns. At least one edge of a perimeter of the array is not fully populated with conductive pads. Spaces created...http://www.google.com/patents/US7855448?utm_source=gb-gplus-sharePatent US7855448 - Optimization of routing layers and board space requirements for ball grid array package implementations including array corner considerationsAdvanced Patent SearchPublication numberUS7855448 B2Publication typeGrantApplication numberUS 10/951,914Publication dateDec 21, 2010Filing dateSep 29, 2004Priority dateFeb 25, 2003Also published asUS7816247, US20040164427, US20050044517Publication number10951914, 951914, US 7855448 B2, US 7855448B2, US-B2-7855448, US7855448 B2, US7855448B2InventorsKevin L. Seaman, Vernon M. WnekOriginal AssigneeBroadcom CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (19), Non-Patent Citations (53), Referenced by (1), Classifications (26), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetOptimization of routing layers and board space requirements for ball grid array package implementations including array corner considerationsUS 7855448 B2Abstract A method and apparatus for improved contact pad arrays and land patterns for integrated circuit packages are presented. A plurality of conductive pads are arranged in an array of rows and columns. At least one edge of a perimeter of the array is not fully populated with conductive pads. Spaces created in the edge by missing conductive pads create additional routing channels for signals from conductive pads within the array to be routed external to the array through the edge. A land pattern may have routing channels on one or more layers of a printed circuit board. In such a multi-layer land pattern, spaces can be created in edges on any number of the layers. Furthermore, corner pad arrangements having known routing channel characteristics can be used in any number of corners of a land pattern that incorporates spaces in an edge.
a plurality of conductive pads arranged in an array of rows and columns,
wherein an edge of a perimeter of said array is not fully populated with conductive pads outside of a corner pad arrangement,
whereby spaces created in said edge by absence of respective conductive pads create additional routing channels to increase a total number of routing channels for signals from conductive pads within said array to be routed external to said array through said edge,
wherein said edge includes an outermost row including a first pattern having a first pad, a space, and a second pad arranged in series that repeats at least once, wherein each repeat of the first pattern in said outermost row is immediately adjacent to a prior instance of the first pattern in said outermost row without an intervening space between said each repeat, and
wherein a second row of said array immediately adjacent and parallel to said outermost row includes a second pattern having a third pad immediately adjacent to said first pad, a fourth pad immediately adjacent to said space, and a fifth pad immediately adjacent to said second pad, said second pattern repeating with said first pattern.
2. The land pattern of claim 1, wherein said corner pad arrangement includes an unusable routing channel to decrease said total number of routing channels for signals from conductive pads within said array to be routed external to said array through said edge.
3. The land pattern of claim 1, wherein said outermost row includes a plurality of serially aligned conductive pads having a number of S spaces therebetween, wherein said number of S spaces is calculated according to
S=INT((E−(M+N))/3),
E=a number of pads in said outermost row, if fully populated;
M=a number of pads along said outermost row in a selected pad arrangement for a corner at a first end of said edge;
N=a number of pads along said outermost row in a selected pad arrangement for a corner at a second end of said edge; and
4. The land pattern of claim 1, wherein a ratio of conductive pads in said outermost row to a number of said spaces in said outermost row is at least two to one (2:1).
5. The land pattern of claim 4, wherein one out of every three pad positions in said outermost row outside of the corner pad arrangement is a space.
6. The land pattern of claim 1, wherein a first corner portion of the land pattern has a first pad arrangement, a second corner portion of the land pattern has a second pad arrangement, a third corner portion of the land pattern has a third pad arrangement, and a fourth corner portion of the land pattern has a fourth pad arrangement.
7. A ball grid array land pattern comprising:
wherein an edge includes an outermost row including a first pattern having a first pad, a space created by absence of a corresponding conductive pad, and a second pad arranged in series that repeats at least once, wherein each repeat of the first pattern in said outermost row is immediately adjacent to a prior instance of the first pattern in said outermost row without an intervening space between said each repeat,
8. The land pattern of claim 7, wherein said array includes a corner pad arrangement having an unusable routing channel to reduce a number of routing channels for signals from conductive pads in said array to be routed external to said array through said edge.
9. The land pattern of claim 7, wherein said outermost row includes a plurality of serially aligned conductive pads having a number of S spaces therebetween, wherein said number of S spaces is calculated according to
10. The land pattern of claim 7, wherein a ratio of conductive pads in said outermost row to a number of spaces in said outermost row is at least two to one (2:1).
11. The land pattern of claim 10, wherein one out of every three pad positions in said outermost row outside of corner portions of the land pattern is a space.
12. The land pattern of claim 7, wherein a first corner portion of the land pattern has a first pad arrangement, a second corner portion of the land pattern has a second pad arrangement, a third corner portion of the land pattern has a third pad arrangement, and a fourth corner portion of the land pattern has a fourth pad arrangement.
13. A ball grid array land pattern comprising:
a plurality of conductive pads arranged in an array of rows and columns, said array including an array portion between a first corner pad arrangement and a second corner pad arrangement, said array portion having an edge including an outermost row and a second row immediately adjacent and parallel to said outermost row,
wherein said outermost row includes a first pattern having a first pad, a space created by absence of a corresponding conductive pad, and a second pad arranged in series that repeats at least once, wherein each repeat of the first pattern in said outermost row is immediately adjacent to a prior instance of the first pattern in said outermost row without an intervening space between said each repeat,
wherein said second row includes a second pattern having a third pad immediately adjacent to said first pad, a fourth pad immediately adjacent to said space, and a fifth pad immediately adjacent to said second pad, said second pattern repeating with said first pattern.
14. The land pattern of claim 13, wherein at least one of the first and second corner pad arrangements includes an unusable routing channel to decrease a number of routing channels for signals from conductive pads in said array to be routed external to said array through said edge.
15. The land pattern of claim 13, wherein said outermost row includes a plurality of serially aligned conductive pads having a number of S spaces therebetween, wherein said number of S spaces is calculated according to
S=INT(E/3),
E=a number of pads in said outermost row, if fully populated; and
16. The land pattern of claim 13, wherein a ratio of conductive pads in said outermost row to a number of spaces in said outermost row is at least two to one (2:1).
17. The land pattern of claim 16, wherein one out of every three pad positions in said outermost row is a space.
18. The land pattern of claim 13, wherein a first corner portion of the land pattern has said first corner pad arrangement, a second corner portion of the land pattern has said second corner pad arrangement, a third corner portion of the land pattern has a third corner pad arrangement, and a fourth corner portion of the land pattern has a fourth corner pad arrangement.
CROSS-REFERENCE TO RELATED APPLICATIONS This application is a divisional of U.S. patent application Ser. No. 10/650,975, filed on Aug. 29, 2003, which claims the benefit of U.S. Provisional Application No. 60/449,562, filed on Feb. 25, 2003, which are each herein incorporated by reference in their entirety.
�Optimization Of Routing Layers And Board Space Requirements For Ball Grid Array Package Implementations Including Single And Multi-Layer Routing.�Ser. No. 10/651,164.
BRIEF SUMMARY OF THE INVENTION The present invention provides a method and apparatus for improving signal routing of integrated circuit (IC) packages and printed circuit boards (PCBs). The present invention further provides improved contact pad arrays for IC packages, and improved land patterns for attaching the IC packages. The land patterns and arrays are formed with edge rows that are not fully populated with contact pads. Spaces in the non-fully populated edge rows allow for additional signal routing channels, which eases IC package and PCB design and manufacturing and improves performance.
FIGS. 10-15 show various layers in an example multi-layer embodiment of the present invention.
FIG. 16 shows a pad/pin layout for the example multi-layer embodiment of FIGS. 10-15, according to an embodiment of the present invention.
FIGS. 18-32 show example corner pad arrangements for land patterns, according to embodiments of the present invention.
FIG. 33 shows a table providing data related to the corner pad arrangements of FIGS. 18-32, according to an example embodiment of the present invention.
FIGS. 38-42 show portions of land patterns that incorporate corner pad arrangements, according to example embodiments of the present invention.
FIGS. 44A-44C show layers of a printed circuit board having routing channels on multiple layers, according to an embodiment of the present invention.
DETAILED DESCRIPTION OF THE INVENTION Overview The present invention is directed to the optimization of routing layers and board space requirements in integrated circuit (IC) packages and printed circuit boards (PCBs). For example, the present invention is applicable in land grid array (LGA), pin grid array (PGA), chip scale package (CSP), ball grid array (BGA), and other integrated circuit package types, and their respective PCB land patterns. The present invention is applicable to all types of package substrates, including ceramic, plastic, and tape (flex) substrates. Furthermore the present invention is applicable to die-up (cavity-up) and die-down (cavity-down) IC die orientations. For illustrative purposes, the present invention is described herein as being implemented in a BGA package. However, the present invention is applicable to the other integrated circuit package types mentioned herein, and to additional integrated circuit package types.
Ball Grid Array (BGA) Package A ball grid array (BGA) package is used to package and interface an IC die with a printed circuit board (PCB). BGA packages may be used with any type of IC die, and are particularly useful for high speed ICs. In a BGA package, solder pads do not just surround the package periphery, as in chip carrier type packages, but may cover the entire bottom package surface in an array configuration. BGA packages are also referred to as pad array carrier (PAC), pad array, land grid array, and pad-grid array packages. BGA package types are further described in the following paragraphs. For additional description on BGA packages, refer to Lau, J. H., Ball Grid Array Technology, McGraw-Hill, New York, (1995), which is herein incorporated by reference in its entirety.
Land pattern 200 includes first, second, third, and fourth edge portions 220 a, 220 b, 220 c, and 220 d, which are each indicated by a respective rectangle in FIG. 2. As shown in FIG. 2, each edge portion 220 includes the number of conductive pads 202 serially aligned along an entire edge of land pattern 200, minus one corner conductive pad 202. Thus, the four edges of land pattern 200 include twelve conductive pads 202, while first, second, third, and fourth edge portions 220 a-220 d each include eleven conductive pads 202 (i.e., 12−1=11).
FIG. 2 also shows portions of first and second electrically conductive routing channels 204 a and 204 b on surface 210 (for illustrative purposes, other routing channels on surface 210 are not shown). First and second routing channels 204 a and 204 b are routed through a space between first and second conductive pads 202 a and 202 b. Due to the spacing of solder balls 202 in land pattern 200, and due to a particular routing channel width, only two routing channels can be routed through a gap between any two conductive pads 202, such as first and second conductive pads 202 a and 202 b. Such an arrangement reduces costs and optimizes manufacturing constraints relative to other spacing and routing channel arrangements. However, this arrangement causes difficulties in routing a sufficient number of signals from conductive pads 202 within land pattern 200 to points on surface 210 outside of land pattern 200.
For example, FIG. 3 shows an example land pattern portion 300 having a conventional arrangement of conductive pads 202. Land pattern portion 300 includes nine conductive pads 202 a-202 i. For illustrative purposes, conductive pad 202 f is shown as square-shaped. For the purposes of the example of FIG. 3, it is desired to route signals from each of conductive pads 202 a-202 i to destinations to the right of land pattern portion 300, through land pattern portion 300. As described above, only two routing channels 204 are possible in a space between any two adjacent conductive pads 202. Thus, as shown in FIG. 3, routing channels are possible only for seven of the nine conductive pads 202 a-202 i. Routing channels 204 a-204 g correspond to conductive pads 202 b-202 f, 202 h, and 202 i. Due to spacing constraints of land pattern portion 300, conductive pads 202 a and 202 g are not able to be routed externally from land pattern portion 300. As described below, the present invention allows for a greater number of routing channels 204 than conventional land pattern portion 300.
Embodiments of The Present Invention for Improved Routing Example embodiments for improving IC package-related signal routing are provided below. These embodiments are provided for illustrative purposes, and are not limiting. Alternative embodiments will be apparent to persons skilled in the relevant art(s) based on the discussion contained herein. As will be appreciated by persons skilled in the relevant art(s), other array and land pattern configurations are within the scope and spirit of the present invention.
For example, FIG. 4 shows an example land pattern portion 400 having conductive pads 202 arranged according to an embodiment of the present invention. As shown in FIG. 4, as compared to land pattern portion 300 shown in FIG. 3, conductive pad 202 f has been replaced with an opening or space 402. A conductive pad 202 j has been added to the left side of land pattern portion 400 for illustrative purposes. By forming space 402 in the peripheral edge of land pattern portion 400, additional signal routing channels are available. For example, in contrast to FIG. 3, as shown in FIG. 4, two additional routing channels 204 h and 204 i are present due to space 402. Thus, all nine conductive pads 202 a-202 e and 202 g-202 j are able to be routed externally from land pattern portion 400.
Embodiments Improving Routing Capacity by Removing Pads As described above, routing capacity may be increased by removing one or more pins/pads from a peripheral edge of a land pattern or array. In embodiments of the present invention, any number of pins/pads may be removed from any number of edges of the land pattern or array. Furthermore, the pins/pads may be removed from any pin/pad location of an edge.
An example application of Equation 1 is described with respect to an example land pattern 500, shown in FIG. 5A. As shown in FIG. 5A, land pattern 500 is a 19�19 array of conductive pad positions 502. Edge portions of land pattern 500 are designated as first, second, third, and fourth edge portions 220 a-220 d. Each of the four edges of land pattern 500 includes 19 conductive pad positions 502. Thus, each of edge portions 220 a-220 d includes 18 conductive pad positions 502 (e.g., 19−1=18). A number of spaces 402 for an edge portion 220 may be determined using Equation 1. For example, the number of spaces 402 to be located in edge portion 220 a may be calculated as follows:
Thus, according to Equation 1, the number of spaces 402 to be located in edge portion 220 a is four. Accordingly, FIG. 5B shows land pattern 500, revised to include four spaces 402 in each of edge portions 220 a-d, as calculated by Equation 1, according to an embodiment of the present invention. Land pattern 500 of FIG. 5B resultingly has a greater routing channel capacity than the land pattern of FIG. 5A.
Column 614 shows, for each row of Table 600, a percentage of pads or pins that are internal or orphaned for the entire land pattern or array (without operation of the present invention). Thus, for each row, a value in column 614 may be calculated as follows:
value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 614 = value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 612 value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 610 � 100 Column 616 shows, for each edge row of the particular land pattern or array, a number of pads present (not counting one of the corner pads), after removal of peripheral pads or pins according to the present invention.
Column 626 shows a percentage of pads or pins that are internal or orphaned for the entire land pattern or array after removal of pads or pins according to the present invention. Thus, for each row, a value in column 626 may be calculated as follows:
value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 626 = value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 624 value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 622 � 100 Columns 628-650 show a total number of externally available pads or pins for the entire land pattern or array after removal of pads or pins for additional routing channels, that is further reduced due to a selected number of externally accessible power channels. In the present example, for every external power channel selected, the number of externally available pins is reduced by two. Thus, the values in columns 628-650 may be calculated as follows:
each ⁢ ⁢ value in ⁢ ⁢ columns 628 ⁢ - ⁢ 650 = value ⁢ ⁢ in column ⁢ ⁢ 622 - 2 � number ⁢ ⁢ of ⁢ ⁢ external power ⁢ ⁢ channels ⁢ ⁢ selected ( value ⁢ ⁢ in ⁢ ⁢ row ⁢ ⁢ 652 ) Note that in alternative embodiments, the number of externally available pins may be reduced by amounts greater or less than two. FIG. 5D shows several example power channels 590, according to the present invention.
Thus, information in Table 600 shown in FIGS. 6A and 6B can be consulted to determine a number of spaces 402 to be positioned in one or more edges of a land pattern or array. For example, a row 660 of Table 600, shown in FIG. 6A, can be consulted for land pattern 500 of FIG. 5A. As shown in columns 604 and 606 of Table 600, row 660 applies to a 19�19 array of pad positions, such as land pattern 500. Columns 616 and 618 indicate that edge portions (i.e., not counting one of the corner pad positions of the edge) can be modified to include 14 solder ball pads. This is shown in FIG. 5B, where four spaces 402 are positioned in each of edge portions 220 a-220 d of land pattern 500. Thus, Table 600 provides a result similar to that for Equations 1 and 1A described above. Information present in Table 600 may be referred to for any land pattern or array of sizes 11�11 through 31�31. Furthermore, the information of Table 600 may be extended to larger and smaller land pattern and array sizes, as would be understood by persons skilled in the relevant art(s) from the teachings herein. The present invention can be applied to array and land patterns of any size, even sizes much greater than 31�31.
Embodiments Improving Routing Capacity by Adding Pads As described above, in an embodiment, routing capacity is improved for a land pattern or array by adding a non-fully populated perimeter edge or side of pads or pins to the land pattern or array. Additional routing channels are provided by spaces or openings formed by missing pins in the added non-fully populated perimeter side. Any number of one or more non-fully populated edges may be added to the land pattern or array. The additional perimeter of conductive pads can have spaces 402 formed therein for additional routing channels, according to the present invention. The number and location of spaces 402 can be selected manually and/or automatically, or as described elsewhere herein.
For example, routing for land pattern 500 shown in FIG. 5 may be improved in this manner. Each of edge portions 220 a-220 d of land pattern 500 include 18 solder ball pad positions 502 (e.g., 19−1=18). FIG. 7A shows a land pattern 700, which is similar to land pattern 500, with an additional perimeter of conductive pads entirely surrounding land pattern 500. Land pattern 700 is a 21�21 array of conductive pad positions. The additional perimeter of conductive pads are shown included in edge portions 720 a-720 d. The number of spaces 402 to be located in an edge portion 720 may be calculated according to Equation 2 as follows:
Thus, the number of spaces 402 to be located in an edge portion of the additional periphery of solder ball pads, according to Equation 2, is five. FIG. 7B shows an example land pattern 750, similar to land pattern 500, with an additional non-fully populated perimeter of solder ball pads, according to an embodiment of the present invention. Each of edge portions 720 a-720 d include five spaces 402, as calculated by Equation 2.
S=INT(((E−1)−2)/3)
E=a number of conductive pads in an edge of the land pattern, prior to addition of the surrounding perimeter of conductive pads, if fully populated (i.e., E includes both corner pads and pads between them for an edge). Example Embodiments for Designing Land Patterns and Arrays The present invention may be used to design IC package arrays and/or land patterns for interfacing with an IC package. FIG. 8 shows an example flowchart 800 providing steps for designing one or more embodiments of the present invention. The steps of FIG. 8 do not necessarily have to occur in the order shown, as will be apparent to persons skilled in the relevant art(s) based on the teachings herein. Other structural embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. These steps are described in detail below.
Example Applications of the Present Invention For illustrative purposes, Table 600 described above relates to land patterns and arrays having the sizes indicated in column 602. However, the present invention is not limited to these sizes, but instead is applicable to land patterns and arrays of any size. For example, Table 900 shown in FIG. 9 provides additional sizes to which the present invention is applicable. Table 900 is described as follows:
Row 936 indicates a pitch, or distance center to center for adjacent pads, for the various trace/pad technologies of columns 908, 910, 912, 914, 916,918, and 920.
Table 900 provides relevant data for a variety of IC package sizes. Columns 610-650 of Table 600 can be referred to for additional information regarding the various technologies of Table 900. For example, as indicated by rows 930-936, of Table 900, column 912 relates to a trace/pad technology having a channel routing width of 0.006 inches, a routing channel spacing of 0.006, a pad width/length of 0.029 inches, and a pad pitch of 0.060 inches. A row 940 of Table 900 provides information regarding a 19�19 land pattern or array, similar to land pattern 500 shown in FIG. 5A. For row 940, columns 908-920 show land pattern or array sizes ranging from 0.90 to 2.31 square inches. Columns 610-650 of row 660 of Table 600 (shown in FIG. 6A) can be referred to for a 19�19 array of any of the sizes provided in row 940. In a similar fashion, the information provided in Table 600 can be related to any other of the trace/pad technologies shown in Table 900.
Multi-Layer Embodiments of the Present Invention Embodiments of the present invention are applicable to circuit boards/substrates having any number of layers. In such embodiments, different portions of the pads/pins of a solder ball array/land pattern can be coupled to externally accessible routing channels on different layers.
For example, FIGS. 10-15 show various layers in an example multi-layer circuit board embodiment of the present invention. FIG. 10 shows an example top assembly view 1010 of a circuit board 1000. For example, a ball grid array package can be attached to the land pattern centrally located on circuit board 1000 in view 1010. The land pattern shown in FIG. 10 includes various conductive features, including an array of conductive pads and routing channels. The array is a 32�32 pad/pin array, having 1024 pads/pins (prior to operation of the present invention). A first portion of the pads/pins of the 32�32 pad/pin array are shown on a top layer in FIG. 10 coupled to externally available routing channels. In the example of FIG. 10, the first portion of pads/pins that are externally routed are located in the peripheral five rows/columns of the land pattern.
To provide additional routing channels, spaces are located in the peripheral edges of the 32�32 pad/pin array shown in FIG. 10. Furthermore, additional routing channels are provided by locating spaces in the peripheral edges of the 25�25 pad/pin array shown in FIG. 15. Some conductive pads shown routed in view 1010 are replaced with spaces in the peripheral edges of the 25�25 pad/pin array shown in view 1500 to provide additional routing channels for the 25�25 pad/pin array. It would be understood to persons skilled in the relevant art(s) from the teachings herein how to remove pads/pins from and/or add pads/pins for each layer of the multi-layer embodiment example of FIGS. 10-15 to enhance signal routing.
FIG. 16 shows a Table 1600 showing a pad/pin layout for the example multi-layer land pattern embodiment of FIGS. 10-15, according to an embodiment of the present invention. In FIG. 16, a �T� represents a pad/pin that is routed on the layer shown in FIG. 10 (e.g., top layer), and a �B� represents a pad/pin that is routed on the layer shown in FIG. 15 (e.g., bottom layer). A �N� represents a position where there is no pad/pin. �AG� represents analog ground, �AP1� and �AP2� represent analog power, �DG� represents digital ground, and �DP1� and �DP2� represent digital power.
The multi-layer land pattern embodiment shown in FIGS. 10-16 is provided for illustrative purposes, and is not limiting. The present invention is applicable to any land pattern/array size, on any number of layers, as would be understood by persons skilled in the relevant art(s) from the teachings herein. Thus, from the teachings herein, it will be apparent to persons skilled in the relevant art(s) how to improve signal routing by adding or removing pins/pads for land patterns and arrays of any size, on any number of layers.
Embodiments for Land Patterns with Selected Corner Pad Arrangements The description above relates to the positioning of spaces in edges of solder ball arrays/land patterns. This subsection describes embodiments for arrangements of pads/spaces in and near corners of solder ball arrays/land patterns. More specifically, this subsection provides embodiments relating the proximity of spaces to corners of solder ball arrays/land patterns. The description below is applicable to both single-layer and multi-layer embodiments of the present invention.
As described above with respect to FIG. 4, a space 402 in an edge of a land pattern portion 400 allows for additional routing channels 204, as compared to land patterns that do not include a space 402. For example, FIG. 17A shows an example land pattern portion 1700 having a conventional arrangement of conductive pads 202. FIG. 17B shows an example land pattern portion 1750 having conductive pads 202 and a space 402 configured according to an embodiment of the present invention. As shown in FIG. 17A, nine conductive pads 202 b-d, 202 f-h, and 202 j-l can be routed out of portion 1700 by nine respective routing channels 204 a-i. As shown in FIG. 17B, conductive pad 202 h has been replaced with an opening or space 402. Thus, eleven conductive pads 202 a-g and 202 i-l can be routed out of land pattern portion 1750 by eleven routing channels 204 a-204 k. In FIG. 17A, all conductive pads 202 that are three columns (or rows) deep from the edge of land pattern portion 1700 can be externally routed. In FIG. 17B, all conductive pads 202 present that are four columns (or rows) deep from the edge of land pattern portion 1750 can be routed, when a single space 402 is present.
FIG. 17B shows an example set 1710 similar to set 530, but also showing example routing, according to an example embodiment of the present invention. As shown in FIG. 17B, set 1710 includes a first pad 202 d, a space 402, and a second pad 2021 arranged in series along an edge. Furthermore, as described above, set 1710 allows for eleven routing channels 204 a-k. The pads and routing of set 1710, or routing similar thereto, can be repeated (e.g., copied from a library) on an edge any number of times to provide known or predetermined routing of signals on edges. Set 1710 can be used adjacent to particular corner pad arrangements to provide predictable routability. For example, FIG. 17C shows an edge portion 1770 of a land pattern/array with a conventional edge pad arrangement, and routing. FIG. 17D shows an edge portion 1780 of a land pattern/array that incorporates a series arrangement of sets 1710 a-f to provide additional routing channels, in a predictable manner. As compared to edge portion 1770, edge portion 1780 has six fewer edge pads 202, but is capacity for routing twelve more pads 202 externally.
Various unique corner pad arrangements are described below. FIGS. 18-32 show fifteen corner arrangements, according to example embodiments of the present invention. The corner pad arrangements can be used to aid in determining an overall number of routing channels for an array/land pattern, and can also be used to aid in positioning spaces in edges. For illustrative purposes, only two outer rows and columns of the corner pad positions are shown in FIGS. 18-32.
FIGS. 21-32 show corner arrangements that are even less desirable than those shown in FIGS. 18-20 due to loss of further routing channels. However, the corner arrangements shown in FIGS. 21-32 may be appropriate for use in some land pattern/arrays.
In an embodiment, a layout designer or automated system may use a library that includes the corner pad arrangements described above to assist in creating ball layouts. For example, any one or more of corner arrangements 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, 2600, 2700, 2800, 2900, 3000, 3100, and 3200 may be included in such a library. Therefore, a land pattern could be at least partially designed by selecting one or more corner arrangements from the library for corners of the land pattern. FIG. 33 shows a Table 3300 that includes data related to the corner arrangements shown in FIGS. 18-32, according to an embodiment of the present invention. The data of Table 3300 could be used to determine total routing channel capacity when incorporating corner pad arrangements into land patterns. The information present in Table 3300 is described, column by column, in the following paragraphs:
Flowchart 3400 begins with a step 3402. In step 3402, a number of required pads is determined. For example, the number of required pads is typically a number of pads of an integrated circuit package to be mounted.
For example, the number of required pads can be any combination of power pads, test pads, and signal pads that will interface an integrated circuit package with the land pattern. Power pads include any power and ground pads that will interface with power and ground of the integrated circuit device. Test pads include any pads that will interface with test signals of the integrated circuit device. Test signals tend to be used temporarily during test of a particular integrated circuit package, and are not always made externally available in a final production version of the integrated circuit package, although in some instances they can remain externally available. Signal pads include any pads for other signals of the integrated circuit package. Signal pads tend to be pads that must be routed external to the land pattern on the PCB using routing channels.
In step 3502, a potential land pattern is selected that at least yields the required pads. A land pattern is selected having an array of pads with enough pads for all required signals. For instance, the potential land pattern can be selected by referring to a table that shows array sizes and corresponding numbers of pads therein. A number of pads in an array can alternatively be calculated. For example, a 13�13 array of conductive pads can be selected as a land pattern. The number of pads of a 13�13 array/land pattern can be determined from a table, or can be calculated as follows:
Number ⁢ ⁢ of ⁢ ⁢ pads = ⁢ X ⁢ ⁢ pads ⁢ ⁢ per ⁢ ⁢ row ⁢ � ⁢ Y ⁢ ⁢ pads ⁢ ⁢ per ⁢ ⁢ column = ⁢ 13 � 13 = ⁢ 169 ⁢ ⁢ pads Equation ⁢ ⁢ 3 The number of routing channels for a 13�13 array/land pattern can be determined from a table, or be calculated as follows (First a number of perimeter pads is determined, followed by a determination of the number of routing channels):
Number ⁢ ⁢ of perimeter ⁢ ⁢ pads = ( 2 � X ⁢ ⁢ pads ⁢ ⁢ per ⁢ ⁢ row - 2 ⁢ ⁢ pads ) + Equation ⁢ ⁢ 4 ⁢ ( 2 � Y ⁢ ⁢ pads ⁢ ⁢ per ⁢ ⁢ col . ⁢ - ⁢ 2 ⁢ ⁢ pads ) ⁢ = 2 � X + 2 � Y - 4 ⁢ = ( X + Y - 2 ) � 2 Number ⁢ ⁢ of routing ⁢ ⁢ channels = Number ⁢ ⁢ of ⁢ ⁢ perimeter ⁢ ⁢ pads � 3 Equation ⁢ ⁢ 5 ⁢ = ( ( X + Y - 2 ) � 2 ) � 3 ⁢ = ( X + Y - 2 ) � 6 For a 13�13 array, the number of routing channels
=(X+Y−2)�6=(13+13−2)�6=144 routing channels
However, if we assume for illustrative purposes that 159 routing channels are actually required for the example 13�13 array/land pattern, additional routing channels are needed. Thus, the 13�13 array/land pattern can be optimized according to the present invention to provide additional routing channels, according to the following steps of flowchart 3500.
In step 3504, a pad arrangement is selected for at least one corner portion of the selected potential land pattern. For example, in an embodiment, any one of the corner pad arrangements described above with respect to FIGS. 18-32 can be selected as the pad arrangement. A corner pad arrangement can be selected for any number of corners of the selected potential land pattern, including for all four corners. In the example of the 13�13 array/land pattern, for illustrative purposes, assume that a 2�3 or 3�2 corner arrangement, as shown in FIG. 18, is selected for all four corners. As described above with respect to FIG. 18, a 2�3 or 3�2 corner arrangement has no lost or unusable routing channels. Thus, if the example 13�13 array/land pattern has four 2�3 or 3�2 corner pad arrangements selected, no routing channels are lost due to the corner pad arrangements. Other selected corner pad arrangements may have lost or unusable routing channels. Note that in an example embodiment, a lookup key may be used to aid in selecting a corner pad arrangement. Such an embodiment is described more fully below with respect to FIG. 37.
In step 3508, it is determined whether the selected potential land pattern yields at least the determined number of required perimeter routing channels. For example, in an embodiment, the number of perimeter routing channels present in the selected land pattern is calculated, and then compared with the required number. For example, the number of perimeter routing channels present in the example 13�13 array/land pattern, as shown in FIG. 36, can be calculated.
Number ⁢ ⁢ of ⁢ ⁢ routing ⁢ ⁢ channels ⁢ ⁢ present ⁢ ⁢ Equation ⁢ ⁢ 6 = number ⁢ ⁢ of + number ⁢ ⁢ of ⁢ ⁢ added - number ⁢ ⁢ of ⁢ ⁢ routing routing ⁢ ⁢ channels routing ⁢ ⁢ channels channels ⁢ ⁢ lost ⁢ ⁢ due previously due ⁢ ⁢ to ⁢ ⁢ spaces ⁢ ⁢ ( S ) to ⁢ ⁢ corner ⁢ ⁢ pad present ⁢ ⁢ ( e . g . , see ⁢ ( 2 ⁢ ⁢ channels / arrangements Eq . ⁢ 5 ) space ) ( e . g . , Table ⁢ ⁢ 3300 ) = ( X + Y - 2 ) � 6 + S � 2 - ( lost ⁢ ⁢ channels ) � # ⁢ ⁢ corners = 144 + 8 ⁢ ⁢ spaces � 2 - ( 0 ) � 4 ⁢ ⁢ corners = 160 ⁢ ⁢ routing ⁢ ⁢ channels ⁢ ⁢ present Thus, in the example 13�13 array/land pattern, as modified by the present invention, 160 routing channels are present. Thus, assuming that 159 routing channels were desired, by comparing the 160 routing channels present to the requirement for 159 routing channels, enough routing channels are present (i.e., one extra routing channel exists).
Note that in an embodiment, if enough routing channels are not present in the selected potential land pattern after step 3508, steps 3502-3508 of flowchart 3500 can be repeated for a subsequently selected array/land pattern size. These steps can be repeated until enough pads and routing channels are provided by the selected array/land pattern.
Alternatively, steps 3504-3508 can be repeated for the same selected potential land pattern, using different corner pad arrangements and/or different numbers of spaces in one or more edges, to determine whether enough routing channels can be generated.
Column 3744 refers to figures that show example land patterns reflecting the corner pad arrangements and any routing channels lost as shown in the corresponding row. For example, row 3758 corresponds to 13�13 array/land pattern, such as land pattern 3600 shown in FIG. 36. Land pattern 3600 includes a 3�2 corner pad arrangement 1800 in each corner, which suffer no lost routing channels. Example arrays/land patterns corresponding to the remaining rows of column 3744 are described as follows with regard to FIGS. 38-42 as follows. For illustrative purposes, only the outer two perimeter rows/columns of the arrays/land patterns of FIGS. 38-42 are shown. As will be described below, the configuration of land patterns of FIGS. 36 and 38-42 can be extended to land patterns of any size.
The configurations of the land patterns of FIGS. 36 and 38-42 can be extended to configure land patterns of any size that have similar characteristics. For example, by changing a length of a row and/or a column of a land pattern of one of FIGS. 36 and 38-42, another size land pattern can be created, having similar routing channel characteristics to the original land pattern. Adding a multiple of three rows and/or three columns to one of the land patterns of FIGS. 36 and 38-42 can create any size land pattern. The land pattern thus created will have the same corner pad arrangements as the original land pattern of FIGS. 36 and 38-42. Furthermore, by adding in multiples of three, the lengthened row/column will have a/an additional set(s) 1710 positioned therein, each having a space 402 that adds a known number of routing channels.
For example, assume that a 22�23 array/pattern is desired. The 22�23 array/land pattern can be created by enlarging one of the land patterns of FIGS. 36 and 38-42. A land pattern of FIGS. 36 and 38-42 is enlarged by multiples of three of rows and columns. The 13 by 14 array/land pattern of FIG. 38 is suitable for creating the 22�23 array/land pattern. This is because:
22 ⁢ ⁢ rows = 13 ⁢ ⁢ rows + 3 � ( 3 ⁢ ⁢ rows ) 23 ⁢ ⁢ columns = 14 ⁢ ⁢ columns + 3 � ( 3 ⁢ ⁢ columns ) As shown above, a 22�23 array/land pattern is based upon a 13�14 array/land pattern, after adding multiples of 3 rows and 3 columns thereto.
Thus, row 3760 of Table 3700 shown in FIG. 37 can be referred to when creating a 22�23 array/land pattern. Corner pad arrangements for the 22�23 array/land pattern can be obtained (i.e., see columns 3714, 3716, 3718, and 3720), and lost routing channel information can be obtained (i.e., see column 3742). Furthermore, three sets 1710 are added to each edge to create additional routing channels.
Another way to determine the particular array/land pattern in Table 3700 on which to base a desired land pattern size upon is to generate a lookup key, which can be used to reference column 3702. The lookup key can be generated from a land pattern by concatenating a remainder of the number of rows divided by 3, to a remainder of the number of columns divided by three, as shown in Equation 7 below:
⁢ ⁢ Equation ⁢ ⁢ 7 Lookup ⁢ ⁢ key = remainder ⁢ ⁢ of concatenate remainder ⁢ ⁢ of ( ( # ⁢ ⁢ of ( ( # ⁢ ⁢ of rows ) / 3 ) columns ) / 3 ) Thus, using the 22�23 array/land pattern example, the lookup key would be:
Look ⁢ ⁢ up ⁢ ⁢ key = ⁢ remainder ⁢ ⁢ of ⁢ ⁢ ( 22 / 3 ) ⁢ ⁢ concatenate ⁢ remainder ⁢ ⁢ of ⁢ ⁢ ( 23 / 3 ) = ⁢ 1 ⁢ ⁢ concatenate ⁢ ⁢ 2 = ⁢ 12 Column 3702 can then be referred to for the lookup key of �12,� which appears in row 3760. Thus, again, the 22�23 array/land pattern can be based on the 13�14 array/land pattern of column 3760, an example of which is shown in FIG. 38. Other corner pad arrangements may be appropriate in some situations, although, in some embodiments, the corner pad arrangements shown are optimum.
Thus, in the manner described above, any size array/land pattern can be created from the array/land patterns of FIGS. 36 and 38-42. A Table 4300 is shown in FIGS. 43A and 43B, that is similar to Table 600 shown in FIGS. 6A and 6B, according to an embodiment of the present invention. Table 4300 contains information directed to numerous sizes of IC packages and land patterns that incorporate the corner pad arrangements shown in Table 3700 of FIG. 37. Thus, Table 4300 can be referred to when selecting/designing an array/land pattern that incorporates these corner pad arrangements. Table 4300 can be referred to by a user, manually, or can be incorporated in an automatic system. The columns of Table 4300 that are not included in Table 600 of FIGS. 6A and 6B are described in the following paragraphs:
Column 4302 shows a lookup key for each row that can be used to determine corner pad arrangements for the array/land pattern of that row. For example, the lookup key can be used to refer to column 3702 of Table 3700, shown in FIG. 37. The lookup key corresponds to the particular row of Table 3700 that contains the corner pad arrangements (i.e., columns 3714, 3716, 3718, and 3720) used for the array/land pattern. For example, row 4360 in Table 4300 corresponds to row 660 of Table 600 shown in FIG. 6A (i.e., corresponds to a 19�19 array/land pattern). As shown in FIG. 43A, column 4302 indicates a lookup value of 11 for row 4360. Referring to column 3702 of Table 3700, the lookup value of 11 is in row 3758, which corresponds to a 13�13 array/land pattern, an example of which is shown in FIG. 36.
Column 4308 shows, for each row of Table 4300, a resulting total number of pads or pins remaining for the entire array/land pattern, after removal of peripheral pads or pins according to the present invention. For example, for row 4360, a number of 345 remaining pads is entered in column 4306. A value in column 4306 may be calculated as follows:
Value ⁢ ⁢ in column ⁢ ⁢ 4308 = ⁢ value ⁢ ⁢ in column ⁢ ⁢ 608 - 2 � ( # ⁢ ⁢ of ⁢ ⁢ spaces in ⁢ ⁢ NS ⁢ ⁢ rows + # ⁢ ⁢ of ⁢ ⁢ spaces ) in ⁢ ⁢ EW ⁢ ⁢ rows ) = ⁢ 361 - 2 � ( 4 + 4 ) = ⁢ 345 Note that the number of spaces in NS and EW rows can be calculated as follows:
# ⁢ ⁢ of ⁢ ⁢ spaces = value ⁢ ⁢ in - value ⁢ ⁢ in in ⁢ ⁢ NS ⁢ ⁢ rows column ⁢ ⁢ 604 column ⁢ ⁢ 4304 # ⁢ ⁢ of ⁢ ⁢ spaces = value ⁢ ⁢ in - value ⁢ ⁢ in in ⁢ ⁢ EW ⁢ ⁢ rows column ⁢ ⁢ 606 column ⁢ ⁢ 4306 Column 4310 shows a total number of externally available pads or pins for the entire land pattern or array after removal of pads or pins according to the present invention, and using the particular corner pad arrangements indicated in Table 3700 for the particular array/land pattern. For example, the value for column 4310 for a particular row can be calculated using Equation 6 described above. For example, for row 4360, the value in column 4306 (i.e., 248) can be calculated as follows:
= number ⁢ ⁢ of ⁢ ⁢ routing channels ⁢ ⁢ previously present ⁢ ⁢ ( e . g . , value in ⁢ ⁢ column ⁢ ⁢ 610 ) + number ⁢ ⁢ of ⁢ ⁢ added routing ⁢ ⁢ channels due ⁢ ⁢ to ⁢ ⁢ spaces ( 2 � # ⁢ ⁢ of ⁢ ⁢ spaces ) - number ⁢ ⁢ of ⁢ ⁢ routing channels ⁢ ⁢ lost ⁢ ⁢ due to ⁢ ⁢ corner ⁢ ⁢ pad arrangements ( e . g . , Table ⁢ ⁢ 3700 ) = 216 + 2 � 2 � ( 4 + 4 ) - 0 = 248 Column 4312 shows a total number of internal or �orphaned�, unavailable pads or pins for the entire land pattern or array after removal of pads or pins according to the present invention, and using the particular corner pad arrangements indicated in Table 3700 for the particular array/land pattern. For example, the value for column 4312 for a particular row can be calculated as:
Value in column 4312=value in column 4308−value in column 4310 For row 4360, the value for column 4312 is calculated as:
Column 4314 shows a percentage of pads or pins that are internal or orphaned for the entire land pattern or array after removal of pads or pins according to the present invention, and using the particular corner pad arrangements indicated in Table 3700 for the particular array/land pattern. Thus, for each row, a value in column 4314 may be calculated as follows:
value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 4314 = value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 4312 value ⁢ ⁢ in ⁢ ⁢ column ⁢ ⁢ 4310 � 100 For row 4360, the value for column 4314 is calculated as:
97 248 � 100 = 28 ⁢ % Thus, note that as compared to row 660 of FIG. 6A, column 626 of Table 600, row 4360, column 4314 indicates an equal percentage. Table 600 of FIGS. 6A and 6B does not take into account corner pad arrangements, thus providing an approximation. If corner arrangements are used that have lost or unused routing channels, a value in column 4360 may have a higher percentage of internal or orphaned pads or pins when compared to a corresponding value in column 660 (i.e., where corner arrangements are considered to lose no routing channels).
In an embodiment, Table 4500 can be used to select a set of corner pad arrangements from the array/land patterns of FIGS. 36 and 38-42 for a particular land pattern/array having a particular configuration of power/ground channels. For example, for illustrative purposes, assume a 15�15 land pattern/array is desired, having two power channels in each of the North and South edges, and one power channel in each of the East and West edges. Column 4516 is thus referred to, as it corresponds to the two NS power/ground channels and one EW power/ground channel, as shown in row 4520. Row 4532 of column 4516 indicates �15� for NS edges and �15� for EW edges, and thus corresponds to the example, desired 15�15 land pattern/array. As shown for row 4532, in column 3702, a lookup key value of �12� is appropriate for the 15�15 land pattern/array, having the example power constraints. Furthermore, as indicated in column 3744 for row 4532, an appropriate set of corner pad arrangements for the example 15�15 land pattern/array is provided in FIG. 38, which shows 13�14 array/land pattern 3800. Thus, in the present example, the corner pad arrangements for 13�14 pad/pin land pattern/array 3800 of FIG. 38 can used for a 15�15 land pattern/array that requires two power channels in each of the North and South edges, and one power in each of the East and West edges. As shown in FIG. 38, two corners of 13�14 pad/pin land pattern/array 3800 use 2�3 corner pad arrangement 1800, and two corners use 3�3 corner pad arrangement 2000. These arrangement can be selected to design the corners of the example 15�15 land pattern/array. This process can be used for any sized land pattern/array, having any number of required power(s) and/or ground(s).
Although the largest number of powers/grounds shown in row 4520 for a particular NS or EW column is two, the information in column pairs 4502, 4504, 4506, 4508, 4510, 4512, 4514, 4516, and 4518 can be extended to numbers greater than two. Each entry in these columns extends to the value located therein, plus three multiplied by any integer:
An ⁢ ⁢ entry ⁢ ⁢ in ⁢ ⁢ a NS ⁢ ⁢ or ⁢ ⁢ EW column ⁢ ⁢ covers a ⁢ ⁢ number ⁢ ⁢ of powers = value ⁢ ⁢ of ⁢ ⁢ entry in ⁢ ⁢ respective NS ⁢ ⁢ or ⁢ ⁢ EW column + 3 � N where N=any integer greater than or equal to zero
For example, column pair 4506 has an entry of 0 in the NS column, and an entry of 2 in the EW column (i.e., 0, 2). Thus, according to the above equation, the NS and EW entries of column pair 4506 also cover power/ground numbers of: 0, 5 (0+3�0, 2+3�1); 3, 2 (0+3�1, 2+3�0); and 6, 8 (0+3�2, 2+3�2), for example. Thus, column pair 4506 can be consulted when designing land pattern/arrays having these required number of power/ground traces.
For example, FIGS. 44A-44C illustrate a multi-layer embodiment of the present invention, present in a printed circuit board. FIG. 44A shows a first layer of a PCB that has conductive features including a 25�25 land pattern 4400 and associated routing. FIG. 44B shows a second layer of the PCB that has conductive features including an 18�18 array 4450 of conductive vias/pads and associated routing. FIG. 44C shows the views of land pattern 4400 and array 4450 overlaid on each other. Although specific ball pitch, pad size, via size, trace width, and other size related data is shown in FIGS. 44A-44C, this data is provided for illustrative purposes, and is not limiting.
Conclusion Thus, a user and/or computer system can use the above described processes, equations, and/or tables to design arrays/land patterns and via arrangements, according to the various embodiments of present invention. Thus, the present invention is applicable to any type of apparatus or system, manual or automatic, including being stored on a computer program product such as a computer storage device (e.g., hard drive, hard disc, floppy disc, CDROM, etc.). The present invention can be implemented in hardware, software, firmware, and any combination thereof.
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San Jose, CA, (Date unknown), 22 pages.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7923847 *Dec 12, 2008Apr 12, 2011Fairchild Semiconductor CorporationSemiconductor system-in-a-package containing micro-layered lead frame* Cited by examinerClassifications U.S. Classification257/692, 257/780, 257/698, 257/690, 257/738International ClassificationH01L23/50, H01L23/48, H01L23/498, H05K3/00, H05K1/11Cooperative ClassificationH01L24/48, H01L2924/01019, H01L2924/15173, H05K3/0005, H01L23/49838, H01L2924/15311, H05K2201/10734, H05K1/112, H05K2201/09227, H01L2224/48227, H01L23/49816, H01L23/50European ClassificationH01L23/498C4, H01L23/498G, H05K1/11C2, H01L23/50Legal EventsDateCodeEventDescriptionSep 29, 2004ASAssignmentOwner name: BROADCOM CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SEAMAN, KEVIN L.;WNEK, VERNON M.;REEL/FRAME:015858/0323Effective date: 20030829RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google