Source: http://www.google.com/patents/US7902014?dq=7,634,557
Timestamp: 2014-08-28 04:29:12
Document Index: 280103222

Matched Legal Cases: ['Application No. 03788707', 'Application No. 11', 'Application No. 094136197', 'Application No. 10', 'Application No. 200680023301', 'Application No. 03817699', 'Application No. 200580007279', 'Application No. 95122087', 'Application No. 95122087', 'Application No. 95123858', 'Application No. 95123858', 'Application No. 95123858', 'Application No. 95135820', 'Application No. 95135820', 'Application No. 200580032314', 'Application No. 2005070131', 'Application No. 200604766']

Patent US7902014 - CMOS devices with a single work function gate electrode and method of ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsDescribed herein are a device utilizing a gate electrode material with a single work function for both the pMOS and nMOS transistors where the magnitude of the transistor threshold voltages is modified by semiconductor band engineering and article made thereby. Further described herein are methods of...http://www.google.com/patents/US7902014?utm_source=gb-gplus-sharePatent US7902014 - CMOS devices with a single work function gate electrode and method of fabricationAdvanced Patent SearchPublication numberUS7902014 B2Publication typeGrantApplication numberUS 11/649,545Publication dateMar 8, 2011Filing dateJan 3, 2007Priority dateSep 28, 2005Also published asUS8294180, US20070090416, US20070111419, US20110180851Publication number11649545, 649545, US 7902014 B2, US 7902014B2, US-B2-7902014, US7902014 B2, US7902014B2InventorsBrian S. Doyle, Been-Yih Jin, Jack T. Kavalieros, Suman Datta, Justin K. Brask, Robert S. ChauOriginal AssigneeIntel CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (100), Non-Patent Citations (136), Referenced by (3), Classifications (16) External Links: USPTO, USPTO Assignment, EspacenetCMOS devices with a single work function gate electrode and method of fabricationUS 7902014 B2Abstract Described herein are a device utilizing a gate electrode material with a single work function for both the pMOS and nMOS transistors where the magnitude of the transistor threshold voltages is modified by semiconductor band engineering and article made thereby. Further described herein are methods of fabricating a device formed of complementary (pMOS and nMOS) transistors having semiconductor channel regions which have been band gap engineered to achieve a low threshold voltage.
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Ltd.FinfetWO2013101007A1 *Dec 28, 2011Jul 4, 2013Intel CorporationMethods of integrating multiple gate dielectric transistors on a tri-gate (finfet) process* Cited by examinerClassifications U.S. Classification438/197International ClassificationH01L21/8234Cooperative ClassificationH01L21/823878, H01L21/823821, H01L21/845, H01L27/1211, H01L21/823807, H01L29/66795, H01L29/785European ClassificationH01L21/8238F, H01L29/78S, H01L21/8238U, H01L21/8238C, H01L21/84F, H01L27/12B4, H01L29/66M6T6F16FRotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google