Source: http://www.google.com/patents/US6130571?ie=ISO-8859-1&dq=6985872
Timestamp: 2014-03-10 17:23:21
Document Index: 305313164

Matched Legal Cases: ['art 49', 'art 49', 'art 59', 'art 59', 'art 59', 'art 69', 'art 69', 'art 69', 'arts 49']

Patent US6130571 - Semiconductor device with fine-adjustable resistance - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA semiconductor device includes a plurality of resistors connected in series, each resistor associated with a fuse and a switching device such that the fuse can be selectively connected in parallel with it or to a line through which a current can be supplied to the fuse so as to break it. After the resistance...http://www.google.com/patents/US6130571?utm_source=gb-gplus-sharePatent US6130571 - Semiconductor device with fine-adjustable resistanceAdvanced Patent SearchPublication numberUS6130571 APublication typeGrantApplication numberUS 09/188,855Publication dateOct 10, 2000Filing dateNov 9, 1998Priority dateJan 10, 1998Fee statusPaidPublication number09188855, 188855, US 6130571 A, US 6130571A, US-A-6130571, US6130571 A, US6130571AInventorsIsao YamamotoOriginal AssigneeRohm Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (6), Referenced by (11), Classifications (15), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetSemiconductor device with fine-adjustable resistanceUS 6130571 AAbstract A semiconductor device includes a plurality of resistors connected in series, each resistor associated with a fuse and a switching device such that the fuse can be selectively connected in parallel with it or to a line through which a current can be supplied to the fuse so as to break it. After the resistance of the device is measured and is found to require a fine adjustment by breaking a selected one or more of the fuses, this selection is communicated from outside in an encoded signal. A decoder serves to decode this encoded signal and causes a fusing current to break the selected fuse (or fuses). Thus, only a reduced number of pads are required to access the fuses from outside. A source of the fusing current may be also contained as a part of the semiconductor device and serve to attenuate a surge current, which may invade from outside, before it reaches the fuse. The decoder may further serve to control the fusing current, or its source, such that no current is allowed to pass through except when it is intended to break a specified fuse or fuses.
What is claimed is: 1. A semiconductor device comprising:a resistor; a fusing current supply line; and a trimming means for fine-adjusting resistance of said semiconductor device, said trimming means including a fuse and switching means for selectively connecting said fuse in parallel with said resistor or to said fusing current supply line, said fusing current supply line serving to break said fuse by passing a fusing current therethrough. 2. The semiconductor device of claim 1 wherein said resistor is one of a plurality of resistors connected in series, said trimming means is one of a plurality of trimming means each associated with a corresponding one of said resistors, and said semiconductor device further comprises a decoder for causing said fusing current to pass through a selected one or more of the fuses.
DETAILED DESCRIPTION OF THE INVENTION The invention is described next by way of several examples with reference to the drawings.
FIG. 2 shows another IC 20 according to a second embodiment of this invention, which is different from the IC 10 of the first embodiment only in that there is a constant current source 22 contained therein and a decoder 23 adapted to receive trimming data in parallel. The constant current source 22 is similar to the one in the first embodiment of the invention (shown at 18a in FIG. 1) but is provided within the IC 20 instead of inside the trimming jig 18 and is connected to a power line V.sub.CC in common with other internal circuits and to the fusing current supply line C. The decoder 23 is also similar to the decoder 13 shown in FIG. 1 but not only has input lines connected to pads 23a and 23b but also is adapted to make a decode output only when an enabling pulse is received through a third pad 23c such that trimming data can be received directly in parallel and not through the likes of the register 14 or the S/P converter 14a of FIG. 1. Numeral 28 indicates a trimming jig for use with this IC 20, containing a register 28c adapted not only to receive a trimming data signal (say, from a microprocessor 28b) and to store it but also to output it in parallel.
If a surge current passes through the power line V.sub.CC inside the IC 20 during this process, it is weakened by the constant current source 22 before reaching the fusing current supply line C. Since there is no other current that may directly reach the fusing current supply line C, the fuses 5, 6 and 7 are well protected in this example, too.
The constant current source 32 in this example is characterized as being adapted to output a current only while an enabling pulse is being received. The decoder 33 in this example is characterized as being adapted to transmit the enabling pulse to the constant current source 32 only after the output to the decode line has been stabilized. The width of the enabling pulse is selected to be large enough for breaking a fuse but otherwise as short as possible such that the operating time of the constant current source 32 can be minimized by the decoder 33. The decoder 33 is therefore also referred to as "the current limiting means". In this manner, the current from the power line V.sub.CC to the fusing current supply line C is shut off by the constant current source 32 except when a fusing current is being passed to the fusing current supply line C. Thus, the fuses 5, 6 and 7 are again well protected from a surge current which may flow through the power line V.sub.CC.
One of the pair of resistor networks 11 ("the first network") has its terminal A connected to a line leading to a pad 47 for outputting a current I.sub.O to an external load and its terminal B connected to the terminal A of the other resistor network 11 ("the second network"). The terminal B of the second resistor network 11 is grounded. Thus, this combination is an equivalent of a series connection of a resistor with resistance R.sub.1 (the resistance of the first network) and another resistor with resistance R.sub.2 (the resistance of the second network) such that, if V.sub.0 is the voltage at the pad 47, a divided voltage V.sub.d =V.sub.0 R.sub.2 /(R.sub.1 +R.sub.2) appears at a junction between the two resistor networks 11. Thus, this pair of resistor networks 11 may be considered as forming a voltage divider of a sort.
The decoder 43 has six output (decode) lines and is adapted to receive 3-bit digital data signals in order to serve both of the pair of resistor networks 11, and both the register 44 and the S/P converter 44a serve to handle 3-bit data. As a trimming data signal is received through a pad 44b, one (or more) of the fuses of either (or both) of the resistor networks 11 is (or are) thereby selected and broken selectively so as to fine-adjust either (or both) of the resistance values R.sub.1 and R.sub.2.
The constant voltage regulator part 49 further includes an operational amplifier 45 for receiving a reference voltage V.sub.ref through its non-inversion terminal and the divided voltage V.sub.d through its inversion terminal to thereby amplify and output their difference and a power transistor 46 for controlling the current flowing from the power line V.sub.CC to the pad 47 according to the output from this operational amplifier 45. Thus structured, the constant voltage regulator part 49 serves as a voltage detector for carrying out a differential amplification on the basis of the divided voltage V.sub.d detected by a voltage divider and a common reference voltage V.sub.ref. The power transistor 46 may comprise a MOS transistor or a bipolar transistor of either PNP or NPN type.
The output voltage V.sub.O to the load is kept at a constant value given by V.sub.ref (1+R.sub.1 /R.sub.2). Since this is uniquely determined by the ratio of the resistance values R.sub.1 and R.sub.2, the trimming is carried out such that their ratio will satisfy a required condition. When this constant voltage regulator 40 is used for stabilizing the power source of an MPU of which the load current I.sub.O fluctuates within a range of about 30 mA-200 mA, for example, the trimming will be carried out on the resistor network 11 with resistance R.sub.1 if the value (1+R.sub.1 /R.sub.2) must be increased. If the fine adjustment must be carried out so as to decrease the value of (1+R.sub.1 /R.sub.2), on the other hand, the trimming is carried out on the resistor network 11 with resistance R.sub.2 so as to increase the value of R.sub.2. Under certain circumstances, the trimming may be carried out on both such that the variation in the ratio R.sub.1 /R.sub.2 will come to be less than 1.5%-2%. In the case of variations caused during the production of ICs, it is more common that both the resistance values R.sub.1 and R.sub.2 of the resistor networks within a same IC are too large or too small. In such a situation, it is easier to adjust the ratio of these two resistance values than the individual resistance values.
This constant voltage regulator part 59 also has a pair of resistor networks 11 (with resistance values again indicated by symbols R.sub.1 and R.sub.2) but this pair is between an input voltage line V.sub.in and the ground. The divided voltage V.sub.d which is generated between this pair of resistor networks 11 is given by V.sub.in R.sub.2 /(R.sub.1 +R.sub.2). The constant voltage regulator part 59 further includes a comparator 55 (or "the comparing means") for receiving a reference voltage V.sub.ref through one of its input terminals and the divided voltage V.sub.d through the other of its input terminals and a switching transistor 56 which is inserted between a pad 57 and a grounding line and serves to switch on and off according to the output from the comparator 55. Thus structured, the constant voltage regulator part 59 serves as a voltage detector for carrying out a comparison on the basis of the divided voltage V.sub.d detected by a voltage divider and a common reference voltage V.sub.ref.
With this embodiment, too, the ratio of the resistance values R.sub.1 and R.sub.2 is adjusted by trimming the pair of resistor networks 11, and the output through the pad 57 is switched when the input voltage V.sub.in crosses a specified value.
This DC-DC converter part 69 also has a pair of resistor networks 11 (with resistance values again indicated by symbols R.sub.1 and R.sub.2) but this pair is between a line to a pad 68b serving as an output terminal for voltage V.sub.O and the ground. The divided voltage V.sub.d which is generated between this pair of resistor networks 11 is given by V.sub.0 R.sub.2 /(R.sub.1 +R.sub.2). The DC-DC converter part 69 further includes a comparator 65 (or "the comparing means") for receiving a reference voltage V.sub.ref through one of its input terminals and the divided voltage V.sub.d through the other of its input terminals, an oscillator which oscillates intermittently according to the output from the comparator 65, an amplifier 66a for amplifying this oscillation signal to output it to the exterior through a pad 67 and a diode 68 with its anode and cathode respectively connected to pads 68a and 68b. Thus structured, this DC-DC converter part 69 also serves as a voltage detector for carrying out a comparison on the basis of the divided voltage V.sub.d detected by a voltage divider and a common reference voltage V.sub.ref. In this application, a power source and a coil for transmitting an inertial current to the diode 68 through the pad 68a, a switching transistor for shunting this inertial current according to the oscillation output from the oscillator 66 and a capacitor for smoothing the output from the pad 68a rectified by the diode 68 may be attached externally. The ratio of R.sub.1 to R.sub.2 is adjusted as before by trimming the pair of resistor networks 11 such that the output voltage V.sub.O through the pad 68a will be reliably within a specified range.
FIG. 7 shows a system (IC) 70 as an example of semiconductor device according to a seventh embodiment of this invention. This system IC 70 contains within itself six constant voltage regulator parts (Reg1-Reg6) as indicated by numeral 49 and described above, as well as a voltage detecting part and a DC-DC converter part as indicated by numerals 59 and 69 respectively above. It also includes a voltage generating circuit 71 such as a band-gap constant voltage source for generating a reference voltage V.sub.ref and applying to all these parts 49, 59 and 69. In other words, this system 70 includes a plurality of voltage detection circuits for carrying out operations on the basis of a voltage detected by a voltage divider and a common reference voltage.
BACKGROUND OF THE INVENTION This invention relates to a semiconductor device containing a network of resistors such that its resistance can be fine-adjusted and more particularly to such a semiconductor device comprising an improved trimming means for carrying out a fine adjustment of its resistance.
SUMMARY OF THE INVENTION It is therefore an object of this invention to overcome such problems by providing an improved semiconductor device of which the fuses for fine adjustment of its resistance are not easily damaged.
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