Source: http://www.google.com/patents/US20050276144?dq=6,332,126
Timestamp: 2014-12-26 08:03:58
Document Index: 258585397

Matched Legal Cases: ['art 410', 'art 410', 'art 420', 'art 420', 'art 410', 'art 420', 'art 410', 'art 420', 'art 410', 'art 420', 'art 410', 'art 410', 'art 410', 'art 410', 'art 410', 'art 410', 'art 410', 'art 410', 'art 420', 'art 420', 'art 420', 'art 420', 'art 420', 'art 420', 'art 420', 'art 420', 'art 410', 'art 420', 'art 410', 'art 420', 'art 410', 'art 420']

Patent US20050276144 - Temperature detector providing multiple detected temperature points using ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA temperature detector and method of detecting a shifted temperature provides multiple detected temperature points using a single branch. The temperature detector generates multiple detected temperature points in response to temperature control signals sequentially generated in a single branch. Since...http://www.google.com/patents/US20050276144?utm_source=gb-gplus-sharePatent US20050276144 - Temperature detector providing multiple detected temperature points using single branch and method of detecting shifted temperatureAdvanced Patent SearchPublication numberUS20050276144 A1Publication typeApplicationApplication numberUS 11/151,448Publication dateDec 15, 2005Filing dateJun 14, 2005Priority dateJun 14, 2004Also published asUS7315792Publication number11151448, 151448, US 2005/0276144 A1, US 2005/276144 A1, US 20050276144 A1, US 20050276144A1, US 2005276144 A1, US 2005276144A1, US-A1-20050276144, US-A1-2005276144, US2005/0276144A1, US2005/276144A1, US20050276144 A1, US20050276144A1, US2005276144 A1, US2005276144A1InventorsYoung-Sun Min, Nam-jong KimOriginal AssigneeYoung-Sun Min, Kim Nam-JongExport CitationBiBTeX, EndNote, RefManReferenced by (15), Classifications (19), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetTemperature detector providing multiple detected temperature points using single branch and method of detecting shifted temperatureUS 20050276144 A1Abstract A temperature detector and method of detecting a shifted temperature provides multiple detected temperature points using a single branch. The temperature detector generates multiple detected temperature points in response to temperature control signals sequentially generated in a single branch. Since a shifted temperature for the single branch is found and a trimming operation in response to the shifted temperature is carried out, the test time is reduced. Various refresh periods can be set in response to various trip point temperatures and thus power consumption of a DRAM can be decreased. Images(7) Claims(22)
Here, as the temperature increases, the reverse saturation current Is1 increases much more than the temperature voltage VT. Thus, the voltage of the node NC decreases as the temperature is increased. Accordingly, the current I1 decreases as the temperature increases. Therefore, the temperature detector 400 sets a specific temperature T1 at which the current Ir and the current I1 cross each other, shown in FIG. 5, as a trip point. In this embodiment, a single trip point is set to 45� C. The trip temperature increasing part 410 includes first short-circuiting switching transistors 411 through 416, which selectively short-circuit a plurality of first binary weighted resistors RU0 through RU5 serially connected between nodes N410 and N420 in response to first test input signals AU0 through AU5, respectively. When the first test input signals AU0 through AU5 are in a normal state, AU5, AU4, AU3, AU2, AU1, AU0=0, 0, 0, 0, 0, 0 are input to the short-circuiting switching transistors 411 through 416 and thus the short-circuiting switching transistors 411 through 416 are turned off. Accordingly, all the binary weighted resistors RU0 through RU5 of the trip temperature increasing part 410 function as resistors. Subsequently, the first test input signals AU0 through AU5 are selectively changed to a logic high level to search for and set a trip point temperature. The trip temperature decreasing part 420 includes second short-circuiting switching transistors 421 through 426, which selectively short-circuit a plurality of second binary weighted resistors RD0 through RD5 serially connected between the node N420 and a node N430 in response to second test input signals AD0 through AD5, respectively. When the second test input signals AD0 through AD5 are in a normal state, AD5, AD4, AD3, AD2, AD1, AD0=1, 1, 1, 1, 1, 1 are input to the short-circuiting switching transistors 421 through 426 and thus the short-circuiting switching transistors 421 through 426 are turned on. Accordingly, all the binary weighted resistors RD0 through RD5 of the trip temperature decreasing part 420 are short-circuited and do not function as resistors. Subsequently, the second test input signals AD0 through AD5 are selectively changed to a logic low level to search for and set a trip point temperature. Beneficially, the binary weighted resistors RU0 through RU5 of the trip temperature increasing part 410 can have resistance values Ra, 2Ra, 4Ra, 8Ra, 16Ra and 32Ra, respectively, while the binary weighted resistors RD0 through RD5 of the trip temperature decreasing part 420 can also have resistance values Ra, 2Ra, 4Ra, 8Ra, 16Ra and 32Ra, respectively. The temperature detection controller 430 includes switching transistors 431, 432 and 433, which selectively short-circuit a plurality of resistors R1 through Rn serially connected between the node N430 and ground voltage VSS in response to temperature control signals C1 through Cn. The temperature control signals C1 through Cn are sequentially generated by the automatic pulse generator 500 of FIG. 4B as explained below. The temperature control signals C1 through Cn are initially at a logic low level and then changed to a logic high level, or initially at a logic high level and then changed to a logic low level. The resistors R1 through Rn function as resistors when the respective temperature control signals C1 through Cn are at a logic low level, and the resistors R1 through Rn do not function as resistors when the respective temperature control signals C1 through Cn are at a logic high level. The resistors R1 through Rn can have resistance values Ra, 2Ra, 4Ra, 8Ra, . . . , nRa, respectively. The temperature detection unit 400 is connected to the comparator 600 of FIG. 4C, which compares a temperature OT1 detected by the trip temperature increasing part 410, trip temperature decreasing part 420 and temperature detection controller 430, with the reference temperature ORef. The comparator 600 compares the detected temperature OT1 with the reference temperature ORef selectively in response to the temperature control signals C1 through Cn and outputs the comparison result OUTi (I=1, 2, . . . , n). The output signals OUTi of the comparator 600 are respectively stored in the registers 710, 720 and 730 of FIG. 4D. The operation of the temperature detector of FIGS. 4A-D will now be explained. The temperature detection controller 430 is operated after the trip temperature increasing part 410 and trip temperature decreasing part 420 are operated. Here, the comparator 600 of FIG. 4C is enabled. The operation of the trip temperature increasing part 410 will now be described on the assumption that a test temperature is set to a fixed temperature 85� C. (ORef), a target trip point of the temperature detector is 45� C. and the trip point is shifted to 50� C. due to an error of 5� C. generated caused by a variation in manufacturing processes. The comparator 600 compares the detected temperature OT1, 50� C., with the reference temperature ORef, 85� C., in response to AU5, AU4, AU3, AU2, AU1, AU0=0,0,0,0,0,0, which are input to the trip temperature increasing part 410 in the normal state, and outputs a logic high level signal. When the signal AU5 is changed such that AU5, AU4, AU3, AU2, AU1, AU0=1,0,0,0,0,0 are input to the trip temperature increasing part 410, the comparator 600 compares a detected temperature OR1 of 82� C. with the reference temperature ORef of 85� C. and outputs a logic high level signal. When the signal AU4 is additionally changed such that AU5, AU4, AU3, AU2, AU1, AU0=1,1,0,0,0,0 are input to the trip temperature increasing part 410, the comparator 600 compares a detected temperature OR1 of 98� C. with the reference temperature ORef of 85� C. and outputs a logic low level signal. Then, AU5, AU4, AU3, AU2, AU1, AU0=1,0,1,0,0,0 are input to the trip temperature increasing part 410, the comparator 600 compares a detected temperature OR1 of 90� C. with the reference temperature ORef of 85� C. and outputs a logic low level signal. When AU5, AU4, AU3, AU2, AU1, AU0=1,0,0,1,0,0 are input to the trip temperature increasing part 410, the comparator 600 compares a detected temperature OR1 of 86� C. with the reference temperature ORef of 85� C. and outputs a logic low level signal. When AU5, AU4, AU3, AU2, AU1, AU0=1,0,0,0,1,0 are input to the trip temperature increasing part 410, the comparator 600 compares a detected temperature OR1 of 84� C. with the reference temperature ORef of 85� C. and outputs a logic high level signal. When AU5, AU4, AU3, AU2, AU1, AU0=1,0,0,0,1,1 are input to the trip temperature increasing part 410, the comparator 600 compares a detected temperature OR1 of 85� C. with the reference temperature ORef of 85� C. and outputs a signal vibrating between a logic high level and a logic low level. The finally changed values AU5, AU4, AU3, AU2, AU1, AU0=1,0,0,0,1,1 are stored in registers (not shown) included in a test apparatus. The values 1,0,0,0,1,1 stored in the registers correspond to the decimal number 35. When 35� C. is subtracted from 85� C., 50� C. is obtained. Consequently, the shifted temperature of the temperature detector becomes 85� C.−35� C.=50� C. because the test temperature is 85� C. and the first test input signals AU0 through AU5, which are input to the trip temperature increasing part when the output signal of the comparator 600 vibrates, correspond to 35. Next, the operation of the trip temperature decreasing part 420 to find the shifted temperature of 50� C. when the test temperature is set to a fixed temperature −5� C. will now be explained. The comparator 600 compares a detected temperature OT1 of 50� C. with the reference temperature ORef of −5� C. in response to the second test input signals AD5, AD4, AD3, AD2, AD1, AD0=1,1,1,1,1,1, which are input to the trip temperature decreasing part 420 in the normal state, and outputs a logic low level signal. When the signal AD5 is changed to 0 such that AD5, AD4, AD3, AD2, AD1, AD0=0,1,1,1,1,1 are input to the trip temperature decreasing part 420, the comparator 600 compares a detected temperature OT1 of 18� C. with the reference temperature ORef of −5� C. and outputs a logic low level signal. When AD5, AD4, AD3, AD2, AD1, AD0=0,0,1,1,1,1 are input to the trip temperature decreasing part 420, the comparator 600 compares a detected temperature OT1 of 2� C. (=18−16) with the reference temperature ORef of −5� C. and outputs a logic low level signal. When AD5, AD4, AD3, AD2, AD1, AD0=0,0,0,1,1,1 are input to the trip temperature decreasing part 420, the comparator 600 compares a detected temperature OT1 of −6� C. (=2−8) with the reference temperature ORef of −5� C. and outputs a logic high level signal. When AD5, AD4, AD3, AD2, AD1, AD0=0,0,1,0,1,1 are input to the trip temperature decreasing part 420, the comparator 600 compares a detected temperature OT1 of −2� C. (=2−4) with the reference temperature ORef of −5� C. and outputs a logic low level signal. When AD5, AD4, AD3, AD2, AD1, AD0=0,0,1,0,0,1 are input to the trip temperature decreasing part 420, the comparator 600 compares a detected temperature OT1 of −4� C. (=−2−2) with the reference temperature ORef of −5� C. and outputs a logic low level signal. When AD5, AD4, AD3, AD2, AD1, AD0=0,0,1,0,0,0 are input to the trip temperature decreasing part 420, the comparator 600 compares a detected temperature OT1 of −5� C. (=−4−1) with the reference temperature ORef of −5� C. and outputs a signal vibrating between a logic low level and a logic low high signal. The finally changed values AD5, AD4, AD3, AD2, AD1, AD0=0,0,1,0,0,0 are inverted and the inverted values 1,1,0,1,1,1 are stored in registers (not shown) included in the test apparatus. The values 1,1,0,1,1,1 stored in the registers correspond to the decimal number 55. Thus, 55� C. is added to −5� C. to obtain 50� C. Consequently, the shifted temperature of the temperature detector is −5� C.+55� C.=50� C. because the test temperature is −5� C. and the second test input signal AD0 through AD5, which are input to the trip temperature decreasing part when the output signal of the comparator 600 vibrates, correspond to 55. The shifted temperature detected by the trip temperature increasing part 410 or trip temperature decreasing part 420 allows a temperature trimming part (not shown) to selectively short-circuit the first binary weighted resistors RU0 through RU5 and the second binary weighted resistors RD0 through RD5. Accordingly, the temperature detector is operated at the originally designed trip point temperature, 45� C., in the normal state. As described above, the temperature detector is basically operated at the set trip point temperature of 45� C. according to the operations of the trip temperature increasing part 410 and trip temperature decreasing part 420. A temperature detection signal TEMP_DET is periodically activated to enable the automatic pulse generator 500 as shown in FIG. 4B. In response to the temperature detection signal TEMP_DET, the automatic pulse generator 500 sequentially generates the temperature control signals C1 through Cn. The temperature detection controller 430 provides detected temperature OT1 in response to the temperature control signals C1 through Cn. The comparator 600 generates trip point temperatures T1 through Tn by comparing the detected temperature OT1 and the reference temperature ORef in response to the temperature control signals C1 through Cn, and stores the trip point temperatures in the registers 710, 720, . . . through 730. The multiple trip point temperatures T1 through Tn provided in response to the temperature control signals C1 through Cn are more useful when the originally set temperature is not found due to various reasons, even when a temperature detection test is finished. That is, even if the temperature detector is initially set to 45� C./85� C., for example, the trip temperature of the devices has a Gaussian distribution with 45� C./85� C. in the center when the trip temperature is measured after packaging the devices, because characteristics of resistors and transistors are changed due to various tests or the power supply voltage is varied. In this case, the conventional temperature detector has the problem that the refresh period is varied by a ratio of more than 6:1, from three times the set refresh period to half of the set refresh period across the range from 50� C. through 70� C., as shown in FIG. 3. In the temperature detector of FIGS. 4A-D, however, the refresh period is changed from three times the set refresh period to half of the set refresh period across the range from 45� C. through 85� C., because temperatures are shifted in the same direction such that 85� C. is shifted to 90� C. when 45� C. is shifted to 50� C. This is because the temperature detector of FIGS. 4A-D uses a single branch. Accordingly, a stable refresh period is maintained even if the temperature is shifted. Therefore, the temperature detector provides the multiple trip point temperatures T1 through Tn using the trip temperature increasing part 410, trip temperature decreasing part 420 and temperature detection controller 430, which are connected in a single branch. While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims. Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7639548Feb 24, 2009Dec 29, 2009Walker Darryl GSemiconductor device having variable parameter selection based on temperature and test methodUS7654736 *Dec 4, 2008Feb 2, 2010Darryl WalkerSemiconductor device having variable parameter selection based on temperature and test methodUS7720627Apr 24, 2008May 18, 2010Darryl WalkerSemiconductor device having variable parameter selection based on temperature and test methodUS7760570Feb 21, 2007Jul 20, 2010Darryl WalkerSemiconductor device having variable parameter selection based on temperature and test methodUS7953573Apr 2, 2010May 31, 2011Agersonn Rall Group, L.L.C.Semiconductor device having variable parameter selection based on temperature and test methodUS8005641Aug 13, 2009Aug 23, 2011Agersonn Rall Group, L.L.C.Temperature sensing circuit with hysteresis and time delayUS8040742Dec 10, 2009Oct 18, 2011Agersonn Rall Group, L.L.C.Semiconductor device having variable parameter selection based on temperature and test methodUS8049145Feb 20, 2007Nov 1, 2011Agerson Rall Group, L.L.C.Semiconductor device having variable parameter selection based on temperature and test methodUS8081532Jun 4, 2010Dec 20, 2011Intellectual Ventures Holding 83 LLCSemiconductor device having variable parameter selection based on temperature and test methodUS8130024 *Apr 15, 2011Mar 6, 2012Micron Technology, Inc.Temperature compensation via power supply modification to produce a temperature-independent delay in an integrated circuitUS8308359Jan 15, 2010Nov 13, 2012Intellectual Ventures Holding 83 LLCSemiconductor device having variable parameter selection based on temperature and test methodUS8395436 *Feb 8, 2012Mar 12, 2013Micron Technology, Inc.Temperature compensation via power supply modification to produce a temperature-independent delay in an integrated circuitUS8497453Sep 19, 2011Jul 30, 2013Intellectual Ventures Holding 83 LLCSemiconductor device having variable parameter selection based on temperatureUS20110187441 *Apr 15, 2011Aug 4, 2011Micron Technology,Inc.Temperature Compensation Via Power Supply Modification to Produce a Temperature-Independent Delay in an Integrated CircuitUS20120146695 *Feb 8, 2012Jun 14, 2012Micron Technology, Inc.Temperature Compensation Via Power Supply Modification to Produce a Temperature-Independent Delay in an Integrated Circuit* Cited by examinerClassifications U.S. Classification365/222International ClassificationG11C7/04, G11C11/406, G11C7/00, G11C29/02Cooperative ClassificationG11C7/04, G11C11/401, G11C11/406, G11C11/40626, G11C29/028, G11C2029/5002, G11C29/02, G11C29/50016European ClassificationG11C11/406T, G11C29/50D, G11C29/02H, G11C11/406, G11C29/02, G11C7/04Legal EventsDateCodeEventDescriptionJun 27, 2011FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google