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Timestamp: 2014-09-03 05:22:26
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Matched Legal Cases: ['art 121', 'art 121', 'art 121', 'art 110', 'art 110', 'art 110', 'art 221', 'art 221', 'art 221', 'art 210', 'art 211', 'art 210', 'art 221', 'art 221', 'art 231', 'arts 301', 'arts 301']

Patent US6969629 - Method for manufacturing micro-structural unit - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsA method for manufacturing a micro-structural unit is provided. By the method, micro-machining is performed on a material substrate including first through third conductive layers and two insulating layers, one of which is interposed between the first and the second conductive layers, and the other between...http://www.google.com/patents/US6969629?utm_source=gb-gplus-sharePatent US6969629 - Method for manufacturing micro-structural unitAdvanced Patent SearchPublication numberUS6969629 B2Publication typeGrantApplication numberUS 10/791,903Publication dateNov 29, 2005Filing dateMar 4, 2004Priority dateAug 12, 2003Fee statusPaidAlso published asUS7192879, US20050037531, US20050277217Publication number10791903, 791903, US 6969629 B2, US 6969629B2, US-B2-6969629, US6969629 B2, US6969629B2InventorsNorinao Kouma, Osamu Tsuboi, Hisao Okuda, Hiromitsu Soneda, Mi Xiaoyu, Satoshi Ueda, Ippei Sawaki, Yoshitaka NakamuraOriginal AssigneeFujitsu Limited, Fujitsu Media Devices LimitedExport CitationBiBTeX, EndNote, RefManPatent Citations (5), Referenced by (3), Classifications (14), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetMethod for manufacturing micro-structural unitUS 6969629 B2Abstract A method for manufacturing a micro-structural unit is provided. By the method, micro-machining is performed on a material substrate including first through third conductive layers and two insulating layers, one of which is interposed between the first and the second conductive layers, and the other between the second and the third conductive layers. The method includes several etching steps performed on the layers of the material substrate that are different in thickness.
1. A method for manufacturing a micro-structural unit by performing machining on a material substrate which has a laminated structure comprising a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer interposed between the first conductive layer and the second conductive layer, and a second insulating layer interposed between the second conductive layer and the third conductive layer, the method comprising:
a first etching step for performing an etching treatment on the first conductive layer to an intermediate point in a direction of thickness of the first conductive layer via a first mask pattern and a second mask pattern formed on the first conductive layer;
a second etching step for performing an etching treatment on the first conductive layer via the first mask pattern until the first insulating layer is reached, so that residual mask parts that contact the first insulating layer are left;
a third etching step for performing an etching treatment via the residual mask parts on portions of the first insulating layer that are exposed in the second etching step until the second conductive layer is reached; and
a fourth etching step for removing the residual mask parts by etching, and for performing an etching treatment on portions of the second conductive layer that are exposed in the third etching step.
2. The method according to claim 1, wherein in the fourth etching step, the etching treatment performed on the exposed portions of the second conductive layer is continued until the second insulating layer is reached.
3. The method according to claim 1, further comprising a fifth etching step for performing an etching treatment on the third conductive layer via a third mask pattern formed on the third conductive layer, the etching treatment on the third conductive layer being continued until the second insulating layer is reached.
4. The method according to claim 2, wherein: the first mask pattern comprises mask parts for a comb tooth-shaped electrode;
first conductive parts of the comb tooth-shaped electrode are formed in the first conductive layer in the second etching step;
insulating parts of the comb tooth-shaped electrode are formed in the first insulating layer in the third etching step; and
second conductive parts of the comb tooth-shaped electrode are formed in the second conductive layer in the fourth etching step.
first conductive parts of the comb tooth-shaped electrode are formed in the third conductive layer in the fifth etching step;
residual mask parts for the comb tooth-shaped electrode are formed in the first conductive layer in the second etching step; and
second conductive parts of the comb tooth-shaped electrode are formed in the second conductive layer, and the residual mask parts are removed by etching, in the fourth etching step;
the method further comprising a sixth etching step for forming insulating parts of the comb tooth-shaped electrode in the second insulating layer, the insulating parts being interposed between the first conductive parts and the second conductive parts.
first conductive parts of the first comb tooth-shaped electrode are formed in the third conductive layer in the fifth etching step;
residual mask parts for the first comb tooth-shaped electrode and first conductive parts of the second comb tooth-shaped electrode are formed in the first conductive layer in the second etching step;
insulating parts of the second comb tooth-shaped electrode are formed in the first insulating layer in the third etching step; and
second conductive parts of the first comb tooth-shaped electrode and second conductive parts of the second comb tooth-shaped electrode are formed in the second conductive layer, and the residual mask parts for the first comb tooth-shaped electrode are removed by etching, in the fourth etching step;
the method further comprising a sixth etching step for forming insulating parts of the first comb tooth-shaped electrode in the second insulating layer, the insulating parts being interposed between the first and second conductive parts of the first comb tooth-shaped electrode.
7. The method according to claim 1, further comprising a step for forming a first conductive connecting part that passes through the first insulating layer and electrically connect the first conductive layer and the second conductive layer, and/or a step for forming a second conductive connecting part that passes through the second insulating layer and electrically connect the third conductive layer and the second conductive layer.
8. The method according to claim 4, further comprising a step for forming a first conductive connecting part that passes through the first insulating layer and electrically connect respective conductive parts in each comb tooth-shaped electrode, and/or a step for forming a second conductive connecting part that passes through the second insulating layer and electrically connect respective conductive parts in each comb tooth-shaped electrode.
Meanwhile, in the micro-mirror element manufacturing process described above, it is desirable from the standpoint of preventing damage to the wafer S5 that this wafer S5 be thick. However, in the above-described manufacturing method of the micro-mirror element X5, since the thickness of the wafer S5 is directly reflected in the total thickness of one set of comb tooth-shaped electrodes (e.g., the set of comb tooth-shaped electrodes 511 and 521), a wafer S5 with a thickness that is substantially the same as the total thickness of one set of comb tooth-shaped electrodes in the micro-mirror element X5 that is the object of manufacture must be used. For example, in a case where the total thickness of one set of comb tooth-shaped electrodes that is to be formed is 200 μm, a wafer S5 with a thickness of 200 μm must be used in order to form a micro-mirror element X5 that has such a pair of comb tooth-shaped electrodes. In cases where the total thickness of the wafer S5 is less than about 200 μm, damage to the wafer S5 tends to occur in the element manufacturing process; accordingly, the mass production of such elements is difficult.
The first mask pattern in the first aspect of the present invention covers specified regions on the outer surface of the first conductive layer (i.e., the surface that is on the opposite side from the surface that contacts the first insulating layer). In the solid region (first region) which extends in the direction of thickness of the material substrate from the first conductive layer to the third conductive layer of the substrate, and in which the outer surface of the first conductive layer is covered by the first mask pattern, the respective layers (first through third conductive layers and first and second insulating layers) are not deliberately etched in the first through fourth etching steps. Accordingly, in cases where the respective layers in the first region are not etched by etching treatments other than the etching treatments performed in the first through fourth etching steps, a structural part which has the total thickness of the first through third conductive layers and first and second insulating layers is formed in the first region. Furthermore, a structural part that has a different thickness can be formed in the first region by performing a specified etching treatment other than the etching treatments performed in the first through fourth etching steps. For example, in a case where the third conductive layer, third conductive layer and second insulating layer, region extending from the third conductive layer to the second conductive layer or region extending from the third conductive layer to the first insulating layer within the first region is removed by performing a specified etching treatment from the side of the third conductive layer at some point up to the fourth etching step or following the fourth etching step, a structural part which has some thickness dimension that is set from the beginning within the material substrate (e.g., the total thickness of the first conductive layer, first insulating layer and second conductive layer in a case where the third conductive layer and second insulating layer are removed) is formed in the first region.
Preferably, the method of the second aspect of the present invention further comprises a fifth etching step for performing an etching treatment on the portions of the second insulating layer that were exposed in the fourth etching step until the second conductive layer is reached, and a sixth etching step for performing an etching treatment on the portions of the second conductive layer that were exposed in the fifth etching step until the first insulating layer is reached. Such a construction is suitable for separately realizing desired thicknesses with a high degree of freedom for each of a plurality of structural parts that are formed in the above-mentioned first through third regions, and for forming specified partial shapes as required for specified structural parts.
The inner frame 120 has a main body part 121, a pair of comb tooth-shaped electrodes 122 and 123, and a pair of comb tooth-shaped electrodes 124 and 125. Each of the comb tooth-shaped electrodes 122-125 comprises a plurality of electrode teeth; the comb tooth-shaped electrodes 122 and 123 extend inward from the main body part 121, and the comb tooth-shaped electrodes 124 and 125 extend outward from the main body part 121. The comb tooth-shaped electrodes 122 an 123 are respectively disposed in positions corresponding to the comb tooth-shaped electrodes 112 and 113 of the mirror part 110. As is shown most clearly in FIG. 4, the comb tooth-shaped electrodes 112 and 122 are disposed so that these comb tooth-shaped electrodes do not contact each other even when the mirror part 110 is rotationally driven (as described later), and these comb tooth-shaped electrodes 112 and 122 partially overlap with each other in the thickness direction Y. Similarly, the comb tooth-shaped electrodes 113 and 123 are also disposed so that these comb tooth-shaped electrodes do not contact each other even when the mirror part 110 is rotationally driven, and these comb tooth-shaped electrodes 113 and 123 also partially overlap with each other in the thickness direction Y.
Next, as shown in FIG. 6B, oxide films 11 and 12 are respectively formed on the surfaces of the silicon layers 101 and 103. The oxide films 11 and 12 can be formed by forming films of silicon dioxide on the surfaces of the silicon layers 101 and 103 by a CVD method. Alternatively, the oxide films 11 and 12 can be formed by oxidizing the surfaces of the silicon films 101 and 103 using a thermal oxidation method (heating temperature: e.g., 900� C.). The thicknesses of the oxide films are (for example) 0.5 to 2 μm. In this step, nitride films may also be formed on the surfaces of the silicon layers 101 and 103 instead of the oxide films 11 and 12. For example, nitride films can be formed by a CVD method using NH3 or N2 as a nitrogen source.
Next, as shown in FIG. 6C, resist patterns 13 and 14 that have specified opening parts are respectively formed on the silicon layers 101 and 103. In the formation of the resist patterns 13 and 14, a liquid-form photoresist is first formed into a film on the surfaces of the oxide films 11 and 12 by spin coating. Next, this photoresist film is hardened by an exposure treatment and subsequent developing treatment. For example, AZP 4210 (manufactured by Clariant Japan) or AZ 1500 (manufactured by Clariant Japan) can be used as the photoresist. Resist patterns described later can also be formed using such photoresist film formation and subsequent exposure and developing treatments.
Next, as shown in FIG. 8A, the surfaces of the silicon layer 101 and 103 are exposed. Specifically, the conductive material P′ outside the holes H1 and H2 is removed by etching, and the oxide films 11 and 12 are then removed by etching. In cases where wet etching is used as the method of removal of a conductive material P′ that consists of poly-silicon, an aqueous solution of potassium hydroxide or an aqueous solution of a so-called �hydrofluoricnitric acid� (containing hydrofluoric acid and nitric acid) can be used as the etching liquid. In this step, it would also be possible to use a method in which the conductive material P′ outside the holes H1 and H2 and the oxide films 11 and 12 are removed by polishing using a CMP process instead of the method described above. In this step, plugs P1 and P2 that are embedded in the material substrate S1 are formed. The plugs P1 electrically connect the silicon layer 101 and silicon layer 102, and the plugs P2 electrically connect the silicon layer 103 and silicon layer 102.
Next, as shown in FIG. 8B, a mirror surface 114 is formed on the silicon layer 103, and electrode pads 15 (not shown in FIGS. 1�5) used for external connections are formed on the silicon layer 101. In the formation of the mirror surface 114, for example, Cr (50 nm) and then Au (200 nm) are first formed as films on the silicon layer 103 by a sputtering method. Next, the mirror surface 114 is patterned and formed by successively performing etching treatments on these metal films via a specified mask. For example, an aqueous solution of potassium iodide�iodine can be used as the etching liquid for the Au film. Furthermore, for example, an aqueous solution of ceric ammoniun nitrate can be used as the etching liquid for the Cr film. The method used to form the electrode pads 15 with specified pattern shapes is that same as the formation method of the mirror surface 114.
Next, as shown in FIG. 8C, an oxide film pattern 16 is formed on the silicon layer 101, and an oxide film pattern 17 is formed on the silicon layer 103. The oxide film pattern 16 has pattern shapes corresponding to the inner frame F2, comb tooth-shaped electrode E2 and outer frames F3 and F4, and the oxide film pattern 17 has pattern shapes corresponding to the mirror part M1, inner frames F1 and F2, comb tooth-shaped electrode E1 and outer frames F3 and F4. In the formation of the oxide film pattern 16, for example, silicon dioxide is first formed as a film with a thickness of (e.g.) 1 μm on the surface of the silicon layer 101 by a CVD method. Next, this oxide film on the silicon layer 101 is patterned by etching using a specified resist pattern as a mask. The oxide film pattern 17 and other oxide film patterns described below are also formed by the formation of an oxide material into a film, the formation of a resist pattern on the oxide film, and subsequent etching treatment.
In this substitute method, notching tends to occur in the silicon layer 102 in the step described above with reference to FIG. 11C in cases where the difference between the thicknesses of the silicon layer 101 and silicon layer 102 is extremely large. Specifically, notches tend to be formed in the 1 a 102. The reason for this is that in cases where the difference in the thicknesses of the two silicon layers 101 and 102 is extremely large, the time extending from the etching of the silicon layer 102 until the insulating layer 105 is reached to the etching of the silicon layer 101 until the insulating layer 104 is reached is excessively long, and the silicon layer 102 is exposed to the etching environment during this long period of time. Accordingly, in cases where the difference in the thicknesses of the two silicon layers 101 and 102 is extremely large, it is more desirable to use the method described above with reference to FIGS. 9B�10B than to use this substitute method.
The inner frame 220 has a main body part 221, a pair of comb tooth-shaped electrodes 222 and 223, and a pair of comb tooth-shaped electrodes 224 and 225. The comb tooth-shaped electrodes 222-225 each comprise a plurality of electrode teeth; the comb tooth-shaped electrodes 222 and 223 extend inward from the main body part 221, and the comb tooth-shaped electrodes 224 and 225 extend outward from the main body part 221. The comb tooth-shaped electrodes 222 and 223 are respectively disposed in positions corresponding to the comb tooth-shaped electrodes 212 and 213 of the mirror part 210. As is shown most clearly in FIGS. 14 and 15, the comb tooth-shaped electrodes 212 and 222 overlap with each other in the thickness direction Y. Similarly, the comb tooth-shaped electrodes 213 and 223 also overlap with each other in the thickness direction Y. The electrode teeth of the comb tooth-shaped electrodes 222 and 223 are shorter in the thickness direction Y than the electrode teeth of the comb tooth-shaped electrodes 212 and 213.
The pair of torsion bars 240 are each connected to the main body part 211 of the mirror part 210 and the main body part 221 of the inner frame 220. The pair of torsion bars 250 are each connected to the main body part 221 of the inner frame 220 and the main body part 231 of the outer frame 230.
FIGS. 21�24 show a micro-mirror element X3 which is one example of a micro-structural unit that can be manufactured by the micro-structural unit manufacturing method of the present invention. FIG. 21 is a plan view of the micro-mirror element X3, and FIGS. 22�24 are respective sectional views along line XXII�XXII, line XXIII�XXIII and line XXIV�XXIV in FIG. 21.
Next, as shown in FIG. 30B, a resist pattern 38 is formed on the silicon layer 301. The resist pattern 38 has a pattern shape that corresponds to the inner frames F8 and F9 and comb tooth-shaped electrode E6. Next, as shown in FIG. 30C, an etching treatment is performed on the silicon layer 301 using the resist pattern 38 as a mask until the insulating layer 304 is reached. As a result of this etching treatment, residual mask parts 301 a failover the comb tooth-shaped electrode E6, residual mask parts 301 b for the inner frame, and a portion of the outer frame F11, are formed.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS6423563May 22, 2001Jul 23, 2002Denso CorporationMethod for manufacturing semiconductor dynamic quantity sensorJP2000031502A Title not availableJP2003136497A Title not availableJPH10190007A Title not availableJPH10270714A Title not availableReferenced byCiting PatentFiling datePublication dateApplicantTitleUS7190507 *Mar 18, 2005Mar 13, 2007Ricoh Company, Ltd.Deflection mirror, a deflection mirror manufacturing method, an optical writing apparatus, and an image formation apparatusUS7777285 *Mar 8, 2007Aug 17, 2010Stmicroelectronics S.R.L.Semiconductor device having a suspended micro-systemUS8142670 *Nov 20, 2008Mar 27, 2012Fujitsu LimitedMicro-oscillating element and method of making the same* Cited by examinerClassifications U.S. Classification438/50, 438/706, 438/52, 438/53International ClassificationH01L21/00, B81C1/00, B81B3/00, H01L29/84Cooperative ClassificationB81C1/00626, B81B2201/0235, B81B2203/0136, B81B2201/042, B81B2203/04European ClassificationB81C1/00F8ZLegal EventsDateCodeEventDescriptionMar 8, 2013FPAYFee paymentYear of fee payment: 8Apr 29, 2009FPAYFee paymentYear of fee payment: 4Oct 25, 2006ASAssignmentOwner name: FUJITSU LIMITED, JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:FUJITSU MEDIA DEVICES LIMITED;REEL/FRAME:018433/0132Effective date: 20061003Mar 4, 2004ASAssignmentOwner name: FUJITSU LIMITED, JAPANOwner name: FUJITSU MEDIA DEVICES LIMITED, JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KOUMA, NORINAO;TSUBOI, OSAMU;OKUDA, HISAO;AND OTHERS;REEL/FRAME:015047/0993Effective date: 20040226Owner name: FUJITSU LIMITED 1-1, KAMIKODANAKA 4-CHOME NAKAHARAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KOUMA, NORINAO /AR;REEL/FRAME:015047/0993RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google