Source: http://www.google.com/patents/US7392414?ie=ISO-8859-1&dq=U.S.+Patent+No.+4,528,643
Timestamp: 2015-05-06 08:39:32
Document Index: 686218994

Matched Legal Cases: ['Application No. 10', 'Application No. 10', 'Application No. 93120990', 'Application No. 200410070913', 'Application No. 200410070913', 'Application No. 200410070913']

Patent US7392414 - Method, system, and apparatus for improving multi-core processor performance - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA system, apparatus, and method for a core rationing logic to enable cores of a multi-core processor to adhere to various power and thermal constraints....http://www.google.com/patents/US7392414?utm_source=gb-gplus-sharePatent US7392414 - Method, system, and apparatus for improving multi-core processor performanceAdvanced Patent SearchPublication numberUS7392414 B2Publication typeGrantApplication numberUS 11/336,015Publication dateJun 24, 2008Filing dateJan 20, 2006Priority dateJul 15, 2003Fee statusPaidAlso published asCN1577280A, CN100555227C, CN101320289A, CN101320289B, DE112004001320B3, US7389440, US7788519, US20050050310, US20060117199, US20060117200, US20060123263, US20060123264, US20070198872, WO2005010737A2Publication number11336015, 336015, US 7392414 B2, US 7392414B2, US-B2-7392414, US7392414 B2, US7392414B2InventorsDaniel W. Bailey, Todd Dutton, Tryggve FossumOriginal AssigneeIntel CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (23), Non-Patent Citations (15), Referenced by (7), Classifications (20), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetMethod, system, and apparatus for improving multi-core processor performance
US 7392414 B2Abstract
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This application is a division of U.S. patent application Ser. No. 10/621,228 filed Jul. 15, 2003 now abandoned and entitled �A Method, System, and Apparatus for Improving Multi-Core Processor Performance,� and is related to three concurrently filed U.S. patent application Ser. Nos. 11/336,302, 11/336,303 and 11/335,681, also entitled �A Method, System, and Apparatus for Improving Multi-Core Processor Performance.�
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS5168554 *Oct 13, 1989Dec 1, 1992International Business Machines CorporationConverting trace data from processors executing in parallel into graphical formUS5737615Apr 12, 1995Apr 7, 1998Intel CorporationMicroprocessor power control in a multiprocessor computer systemUS5913069Dec 10, 1997Jun 15, 1999Cray Research, Inc.Interleaving memory in distributed vector architecture multiprocessor systemUS5968167Apr 3, 1997Oct 19, 1999Videologic LimitedMulti-threaded data processing management systemUS6357016Dec 9, 1999Mar 12, 2002Intel CorporationMethod and apparatus for disabling a clock signal within a multithreaded processorUS6549954 *Aug 23, 1999Apr 15, 2003Advanced Micro Devices, Inc.Object oriented on-chip messagingUS6550020 *Jan 10, 2000Apr 15, 2003International Business Machines CorporationMethod and system for dynamically configuring a central processing unit with multiple processing coresUS6574739 *Apr 14, 2000Jun 3, 2003Compal Electronics, Inc.Dynamic power saving by monitoring CPU utilizationUS6640282 *Jan 25, 2001Oct 28, 2003Hewlett-Packard Development Company, L.P.Hot replace power control sequence logicUS6804632 *Dec 6, 2001Oct 12, 2004Intel CorporationDistribution of processing activity across processing hardware based on power consumption considerationsUS6883107Mar 8, 2002Apr 19, 2005Intel CorporationMethod and apparatus for disabling a clock signal within a multithreaded processorUS6889319Dec 9, 1999May 3, 2005Intel CorporationMethod and apparatus for entering and exiting multiple threads within a multithreaded processorUS6920572Nov 8, 2001Jul 19, 2005Texas Instruments IncorporatedUnanimous voting for disabling of shared component clocking in a multicore DSP deviceUS6931506Feb 20, 2003Aug 16, 2005Stmicroelectronics SaElectronic device for data processing, such as an audio processor for an audio/video decoderUS6934727 *Jan 2, 2003Aug 23, 2005Microsoft CorporationDynamic synchronization of tablesUS6971034Jan 9, 2003Nov 29, 2005Intel CorporationPower/performance optimized memory controller considering processor power statesUS7093147Apr 25, 2003Aug 15, 2006Hewlett-Packard Development Company, L.P.Dynamically selecting processor cores for overall power efficiencyUS20020018877Jul 27, 2001Feb 14, 2002Woodall Calvin L.Reduced motion and anti slip padUS20030079151Oct 18, 2001Apr 24, 2003International Business Machines CorporationEnergy-aware workload distributionUS20030084154Oct 31, 2001May 1, 2003International Business Machines CorporationEnergy-induced process migrationUS20030115495Dec 13, 2001Jun 19, 2003International Business Machines CorporationConserving energy in a data processing system by selectively powering down processorsUS20040128663Dec 31, 2002Jul 1, 2004Efraim RotemMethod and apparatus for thermally managed resource allocationWO2002039242A1Oct 31, 2001May 16, 2002Millennial Net IncNetworked processing system with optimized power efficiency* Cited by examinerNon-Patent CitationsReference1Foreign Office Action from Counterpart Great Britain Patent Application No. GB062753.6, dated May 23, 2007.2Foreign Office Action from Counterpart Great Britain Patent Application No. GB062753.6, dated Nov. 1, 2007.3Foreign Office Action from Counterpart Korean Patent Application No. 10-2006-70000942, mailed Feb. 26, 2007.4Foreign Office Action from Counterpart Korean Patent Application No. 10-2006-7000942, mailed Mar. 19, 2008, 5 Pages.5Foreign Office Action from Counterpart Tawain Patent Application No. 93120990, dated Jul. 26, 2006.6IEEE, IEEE 100, The Authoritative Dictionary of IEEE Standards Terms, 2000, Standards Information Network, 7th edition, pp. 904.7Office Action from U.S. Appl. No. 11/336,302, mailed Apr. 16, 2007.8Office Action from U.S. Appl. No. 11/336,302, mailed Nov. 6, 2006, 7 pgs.9Office Action from U.S. Appl. No. 11/336,303, mailed Jun. 13, 2007, 5 pgs.10Office Action from U.S. Appl. No. 11/336,303, mailed Nov. 22, 2006, 8 pgs.11Office Action from U.S. Appl. No. 11/336,681, mailed Jun. 21, 2007, 7 pgs.12Second Foreign Office Action from Counterpart Chinese Patent Application No. 200410070913.7, mailed Feb. 16, 2007.13Sholander, P., et al., "The Effect of Algorithm-Agile Encryption on ATM Quality of Service", IEEE, 1997, pp. 470-474.14The First Office Action issued in Chinese Patent Application No. 200410070913.7, mailed Jun. 23, 2006, 9 pgs (includes English translation).15Third Foreign Office Action from Counterpart Chinese Patent Application No. 200410070913.7, mailed Jun. 8, 2007.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8495395Sep 14, 2010Jul 23, 2013Advanced Micro DevicesMechanism for controlling power consumption in a processing nodeUS8533503 *Sep 29, 2006Sep 10, 2013Synopsys, Inc.Managing power consumption in a multicore processorUS8726055Sep 20, 2010May 13, 2014Apple Inc.Multi-core power managementUS8732439Sep 29, 2006May 20, 2014Synopsys, Inc.Scheduling in a multicore processorUS8751773Aug 12, 2013Jun 10, 2014Synopsys, Inc.Scheduling in a multicore architectureUS8769323 *Mar 7, 2013Jul 1, 2014Intel CorporationMethod, apparatus, and system for optimizing frequency and performance in a multidie microprocessorUS8806248Sep 30, 2013Aug 12, 2014Intel CorporationMethod, apparatus, and system for optimizing frequency and performance in a multidie microprocessor* Cited by examinerClassifications U.S. Classification713/322, 713/320, 713/300International ClassificationG06F1/26, G06F1/32, G06F1/00Cooperative ClassificationY02B60/1217, G06F1/3287, G06F1/3228, G06F1/329, Y02B60/144, Y02B60/1282, Y02B60/1285, G06F1/3296, G06F1/324European ClassificationG06F1/32P5F, G06F1/32P5S, G06F1/32P1D, G06F1/32P5V, G06F1/32P5TLegal EventsDateCodeEventDescriptionSep 21, 2011FPAYFee paymentYear of fee payment: 4Jan 20, 2006ASAssignmentOwner name: INTEL CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BAILEY, DANIEL W.;DUTTON, TODD;FOSSUM, TRYGGVE;REEL/FRAME:017500/0141;SIGNING DATES FROM 20030918 TO 20040127RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services