Source: http://www.google.com/patents/US7859240?dq=7,177,838
Timestamp: 2017-05-28 14:05:02
Document Index: 473051694

Matched Legal Cases: ['Application No. 09', 'Application No. 08', 'Application No. 08', 'Application No. 09', 'Application No. 09', 'Application No. 09', 'Application No. 08', 'Application No. 08', 'Application No. 09', 'Application No. 09', 'Application No. 09']

Patent US7859240 - Circuit and method for preventing reverse current flow into a voltage ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA circuit and method are provided for interrupting current flow into a voltage regulator from an output thereof when a voltage source (Vpwr) drops below an output voltage (Vout). In one embodiment, the circuit comprises: (i) a comparator supplied by Vout including an output and inputs coupled to Vpwr...http://www.google.com/patents/US7859240?utm_source=gb-gplus-sharePatent US7859240 - Circuit and method for preventing reverse current flow into a voltage regulator from an output thereofAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS7859240 B1Publication typeGrantApplication numberUS 12/009,877Publication dateDec 28, 2010Filing dateJan 22, 2008Priority dateMay 22, 2007Fee statusPaidAlso published asUS8080984Publication number009877, 12009877, US 7859240 B1, US 7859240B1, US-B1-7859240, US7859240 B1, US7859240B1InventorsLionel Geynet, Eugene O'SullivanOriginal AssigneeCypress Semiconductor CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (77), Non-Patent Citations (21), Referenced by (1), Classifications (7), Legal Events (6) External Links: USPTO, USPTO Assignment, EspacenetCircuit and method for preventing reverse current flow into a voltage regulator from an output thereof
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4158804Aug 10, 1977Jun 19, 1979General Electric CompanyMOSFET Reference voltage circuitUS4477737Jul 14, 1982Oct 16, 1984Motorola, Inc.Voltage generator circuit having compensation for process and temperature variationUS4689733Jun 25, 1986Aug 25, 1987Bbc Brown, Boveri & Company, LimitedMethod for reducing dynamic overvoltages in an alternating-current system to which a direct-current system is connectedUS4829203Apr 20, 1988May 9, 1989Texas Instruments IncorporatedIntegrated programmable bit circuit with minimal power requirementUS4851759May 26, 1988Jul 25, 1989North American Philips Corporation, Signetics DivisionUnity-gain current-limiting circuitUS4866606Jun 24, 1987Sep 12, 1989Austria Miktosystem International GmbhLoosely coupled distributed computer system with node synchronization for precision in real time applicationsUS4884161Mar 10, 1986Nov 28, 1989Honeywell, Inc.Integrated circuit voltage regulator with transient protectionUS4885719Aug 19, 1987Dec 5, 1989Ict International Cmos Technology, Inc.Improved logic cell array using CMOS E2 PROM cellsUS4890222Jun 24, 1987Dec 26, 1989Honeywell Inc.Apparatus for substantially syncronizing the timing subsystems of the physical modules of a local area networkUS4893030Aug 16, 1988Jan 9, 1990Western Digital CorporationBiasing circuit for generating precise currents in an integrated circuitUS4897774Nov 14, 1988Jan 30, 1990Maxim Integrated ProductsIntegrated dual charge pump power supply and RS-232 transmitter/receiverUS4935644Aug 4, 1988Jun 19, 1990Kabushiki Kaisha ToshibaCharge pump circuit having a boosted output signalUS5059815Apr 5, 1990Oct 22, 1991Advanced Micro Devices, Inc.High voltage charge pumps with series capacitorsUS5087834Mar 12, 1990Feb 11, 1992Texas Instruments IncorporatedBuffer circuit including comparison of voltage-shifted referencesUS5276646Dec 24, 1990Jan 4, 1994Samsung Electronics Co., Ltd.High voltage generating circuit for a semiconductor memory circuitUS5280233Feb 26, 1992Jan 18, 1994Sgs-Thomson Microelectronics, S.R.L.Low-drop voltage regulatorUS5311480Dec 16, 1992May 10, 1994Texas Instruments IncorporatedMethod and apparatus for EEPROM negative voltage wordline decodingUS5319604May 8, 1991Jun 7, 1994Texas Instruments IncorporatedCircuitry and method for selectively switching negative voltages in CMOS integrated circuitsUS5371705May 24, 1993Dec 6, 1994Mitsubishi Denki Kabushiki KaishaInternal voltage generator for a non-volatile semiconductor memory deviceUS5388249Apr 22, 1992Feb 7, 1995Hitachi, Ltd.Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devicesUS5392421Apr 20, 1990Feb 21, 1995Lennartsson; KentSystem for synchronizing clocks between communication units by using data from a synchronization message which competes with other messages for transfers over a common communication channelUS5402394Dec 4, 1992Mar 28, 1995Turski; KlausProcess for generating a common time base for a system with distributed computing unitsUS5438542Oct 31, 1994Aug 1, 1995Kabushiki Kaisha ToshibaNonvolatile semiconductor memory deviceUS5461557Sep 2, 1993Oct 24, 1995Nec CorporationVoltage converting circuit and multiphase clock generating circuit used for driving the sameUS5461723Oct 8, 1993Oct 24, 1995Mit Technology Corp.Dual channel data block transfer busUS5570043Jan 31, 1995Oct 29, 1996Cypress Semiconductor CorporationOvervoltage tolerant intergrated circuit output bufferUS5587603Jan 6, 1995Dec 24, 1996Actel CorporationTwo-transistor zero-power electrically-alterable non-volatile latchUS5592430Oct 31, 1995Jan 7, 1997Nec CorporationSemiconductor device equipped with simple stable switching circuit for selectively supplying different power voltagesUS5600551Aug 2, 1995Feb 4, 1997Schenck-Accurate, Inc.Isolated power/voltage multiplier apparatus and methodUS5621902Nov 30, 1994Apr 15, 1997International Business Machines CorporationComputer system having a bridge between two buses with a direct memory access controller and an alternative memory access controllerUS5628001Sep 18, 1995May 6, 1997Motorola, Inc.Power saving method and apparatus for changing the frequency of a clock in response to a start signalUS5630147Feb 15, 1996May 13, 1997Intel CorporationSystem management shadow portUS5635872Nov 16, 1995Jun 3, 1997Maven Peal Instruments, Inc.Variable control of electronic power suppliesUS5637992May 31, 1995Jun 10, 1997Sgs-Thomson Microelectronics, Inc.Voltage regulator with load pole stabilizationUS5642489Dec 19, 1994Jun 24, 1997International Business Machines CorporationBridge between two buses of a computer system with a direct memory access controller with accessible registers to support power managementUS5666069Dec 22, 1995Sep 9, 1997Cypress Semiconductor Corp.Data output stage incorporating an inverting operational amplifierUS5675813Oct 26, 1995Oct 7, 1997Microsoft CorporationSystem and method for power control in a universal serial busUS5691654Dec 14, 1995Nov 25, 1997Cypress Semiconductor Corp.Voltage level translator circuitUS5701272Sep 30, 1996Dec 23, 1997Intel CorporationNegative voltage switching circuitUS5740106Apr 9, 1997Apr 14, 1998Cypress Semiconductor Corp.Apparatus and method for nonvolatile configuration circuitUS5748911Jul 19, 1996May 5, 1998Compaq Computer CorporationSerial bus system for shadowing registersUS5748923Feb 28, 1995May 5, 1998Robert Bosch GmbhMethod for the cyclic transmission of data between at least two control devices with distributed operationUS5754799Feb 28, 1996May 19, 1998Paradyne CorporationSystem and method for bus contention resolutionUS5757228Jan 31, 1997May 26, 1998Mitsubishi Denki Kabushiki KaishaOutput driver circuit for suppressing noise generation and integrated circuit device for burn-in testUS5761058Jul 19, 1996Jun 2, 1998Matsushita Electric Works, Ltd.Power converter apparatus for a discharge lampUS5767735Oct 3, 1996Jun 16, 1998Intel CorporationVariable stage charge pumpUS5767844Feb 29, 1996Jun 16, 1998Sun Microsystems IncModified universal serial bus interface implementing remote power up while permitting normal remote power downUS5774744Apr 8, 1996Jun 30, 1998Vlsi Technology, Inc.System using DMA and descriptor for implementing peripheral device bus mastering via a universal serial bus controller or an infrared data association controllerUS5778218Dec 19, 1996Jul 7, 1998Advanced Micro Devices, Inc.Method and apparatus for clock synchronization across an isochronous bus by adjustment of frame clock ratesUS5781028Jun 21, 1996Jul 14, 1998Microsoft CorporationSystem and method for a switched data bus terminationUS5796656Feb 22, 1997Aug 18, 1998Programmable Microelectronics CorporationRow decoder circuit for PMOS non-volatile memory cell which uses electron tunneling for programming and erasingUS5812459Feb 26, 1997Sep 22, 1998Kabushiki Kaisha ToshibaNonvolatile semiconductor memory device having row decoder supplying a negative potential to wordlines during erase modeUS5841696Mar 5, 1997Nov 24, 1998Advanced Micro Devices, Inc.Non-volatile memory enabling simultaneous reading and writing by time multiplexing a decode pathUS5847993Jun 23, 1997Dec 8, 1998Xilinx, Inc.Non-volatile programmable CMOS logic cell and method of operating sameUS5852370Oct 9, 1996Dec 22, 1998Texas Instruments IncorporatedIntegrated circuits for low power dissipation in signaling between different-voltage on chip regionsUS5867013Nov 20, 1997Feb 2, 1999Cypress Semiconductor CorporationStartup circuit for band-gap reference circuitUS5871368Nov 19, 1996Feb 16, 1999Intel CorporationBus connectorUS5884086Apr 15, 1997Mar 16, 1999International Business Machines CorporationSystem and method for voltage switching to supply various voltages and power levels to a peripheral deviceUS5889664Aug 20, 1997Mar 30, 1999Hyundai Electronics Industries Co., Ltd.Multiple level voltage generator for semiconductor memory deviceUS5929692Jul 11, 1997Jul 27, 1999Computer Products Inc.Ripple cancellation circuit with fast load response for switch mode voltage regulators with synchronous rectificationUS5938770Jul 21, 1997Aug 17, 1999Samsung Electronics Co., Ltd.Display apparatus for computer systemUS5982158Apr 19, 1999Nov 9, 1999Delco Electronics CorporaitonSmart IC power controlUS6025701Nov 10, 1997Feb 15, 2000Siemens AktiengesellschaftStatic and dynamic mains voltage support by a static power factor correction device having a self-commutated converterUS6094095Jun 29, 1998Jul 25, 2000Cypress Semiconductor Corp.Efficient pump for generating voltages above and/or below operating voltagesUS6105097Oct 14, 1998Aug 15, 2000Cypress Semiconductor Corp.Device and method for interconnecting universal serial buses including power managementUS6118676Nov 4, 1999Sep 12, 2000Soft Switching Technologies Corp.Dynamic voltage sag correctionUS6144580Dec 8, 1999Nov 7, 2000Cypress Semiconductor Corp.Non-volatile inverter latchUS6157176Jul 13, 1998Dec 5, 2000Stmicroelectronics S.R.L.Low power consumption linear voltage regulator having a fast response with respect to the load transientsUS6157178Mar 25, 1999Dec 5, 2000Cypress Semiconductor Corp.Voltage conversion/regulator circuit and methodUS6222353May 31, 2000Apr 24, 2001Philips Semiconductors, Inc.Voltage regulator circuitUS6232757Aug 10, 2000May 15, 2001Intel CorporationMethod for voltage regulation with supply noise rejectionUS6373231Dec 5, 2000Apr 16, 2002Cypress Semiconductor Corp.Voltage regulatorUS6522111Aug 28, 2001Feb 18, 2003Linfinity MicroelectronicsLinear voltage regulator using adaptive biasingUS6566851Aug 10, 2000May 20, 2003Applied Micro Circuits, CorporationOutput conductance correction circuit for high compliance short-channel MOS switched current mirrorUS6661214Sep 28, 2001Dec 9, 2003Itt Manufacturing Enterprises, Inc.Droop compensation circuitryUS6879142Aug 20, 2003Apr 12, 2005Broadcom CorporationPower management unit for use in portable applicationsUS7026802Oct 14, 2004Apr 11, 2006Cypress Semiconductor CorporationReplica biased voltage regulatorNon-Patent CitationsReference1USPTO Final Rejection for Application No. 09/106,808 dated Dec. 3, 1999; 10 pages.2USPTO Non-Final Rejection for Application No. 08/577,258 dated Aug. 30, 1996; 11 pages.3USPTO Non-Final Rejection for Application No. 08/974,436 dated Apr. 30, 1998; 4 pages.4USPTO Non-Final Rejection for Application No. 09/106,808 dated Jun. 24, 1999; 8 pages.5USPTO Non-Final Rejection for Application No. 09/172,956 dated Dec. 20, 1999; 6 pages.6USPTO Non-Final Rejection for Application No. 09/276,321 dated Feb. 4, 2000; 3 pages.7USPTO Non-Final Rejection for U.S. Appl. No. 08/381,125 dated Jul. 11, 1995; 4 pages.8USPTO Non-Final Rejection for U.S. Appl. No. 08/381,125 dated Nov. 2, 1995; 5 pages.9USPTO Non-Final Rejection for U.S. Appl. No. 08/572,618 dated Sep. 18, 1996; 3 pages.10USPTO Non-Final Rejection for U.S. Appl. No. 09/730,315 dated May 23, 2001; 4 pages.11USPTO Non-Final Rejection for U.S. Appl. No. 10/965,445 dated May 3, 2005; 5 pages.12USPTO Notice of Allowance for Application No. 08/577,258 dated Apr. 24, 1997; 2 pages.13USPTO Notice of Allowance for Application No. 08/974,436 dated Aug. 3, 1998; 2 pages.14USPTO Notice of Allowance for Application No. 09/172,956 dated Apr. 6, 2000; 3 pages.15USPTO Notice of Allowance for Application No. 09/276,321 dated Jun. 12, 2000; 1 page.16USPTO Notice of Allowance for Application No. 09/456,801 dated Jun. 6, 2000; 3 pages.17USPTO Notice of Allowance for U.S. Appl. No. 08/381,125 dated May 1, 1996; 1 page.18USPTO Notice of Allowance for U.S. Appl. No. 08/572,618 dated Apr. 25, 1997; 1 page.19USPTO Notice of Allowance for U.S. Appl. No. 09/106,808 dated Mar. 21, 2000; 5 pages.20USPTO Notice of Allowance for U.S. Appl. No. 09/730,315 dated Nov. 20, 2001; 4 pages.21USPTO Notice of Allowance for U.S. Appl. No. 10/965,445 dated Oct. 26, 2005; 4 pages.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS9582017Jul 1, 2014Feb 28, 2017Stmicroelectronics Design And Application S.R.O.Method of preventing inversion of output current flow in a voltage regulator and related voltage regulatorClassifications U.S. Classification323/285, 323/280, 307/56International ClassificationG05F1/40Cooperative ClassificationG05F1/56, Y10T307/571European ClassificationG05F1/56Legal EventsDateCodeEventDescriptionJan 22, 2008ASAssignmentOwner name: SILICON LIGHT MACHINES CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GEYNET, LIONEL;O'SULLIVAN, EUGENE;REEL/FRAME:020477/0436Effective date: 20080121May 6, 2008ASAssignmentOwner name: CYPRESS SEMICONDUCTOR CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SILICON LIGHT MACHINES CORPORATION;REEL/FRAME:020908/0068Effective date: 20080417Jun 24, 2014FPAYFee paymentYear of fee payment: 4Mar 21, 2015ASAssignmentOwner name: MORGAN STANLEY SENIOR FUNDING, INC., NEW YORKFree format text: SECURITY INTEREST;ASSIGNORS:CYPRESS SEMICONDUCTOR CORPORATION;SPANSION LLC;REEL/FRAME:035240/0429Effective date: 20150312Aug 11, 2016ASAssignmentOwner name: CYPRESS SEMICONDUCTOR CORPORATION, CALIFORNIAFree format text: PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS;ASSIGNOR:MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT;REEL/FRAME:039708/0001Effective date: 20160811Owner name: SPANSION LLC, CALIFORNIAFree format text: PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS;ASSIGNOR:MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT;REEL/FRAME:039708/0001Effective date: 20160811Dec 14, 2016ASAssignmentOwner name: MONTEREY RESEARCH, LLC, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CYPRESS SEMICONDUCTOR CORPORATION;REEL/FRAME:040911/0238Effective date: 20160811RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services