Source: http://www.google.com/patents/US20040071138?dq=6,587,403
Timestamp: 2016-05-29 04:12:33
Document Index: 140793967

Matched Legal Cases: ['art 11', 'art 18', 'art 18', 'art 18', 'art 52', 'art 18', 'art 24', 'art 24', 'art 23', 'art 24', 'art 24', 'art 11', 'art 24', 'art 11', 'art 24', 'art 52', 'art 52', 'art 18', 'art 52', 'art 11', 'art 24', 'art 24', 'art 24', 'art 18', 'art 24', 'art 22', 'art 24', 'art 22', 'art 24', 'art 11', 'art 24', 'art 24', 'art 24', 'art 11', 'art 53', 'art 53', 'art 11', 'arts 30', 'art 30', 'art 30', 'art 30', 'art 30', 'art 3203', 'art 3203', 'art 2305', 'art 2304', 'art 2305', 'art 2312', 'art 2305', 'art 2309', 'art 23', 'arts 2307', 'art 2308', 'art 2309', 'art 23', 'art 2310', 'art 2413', 'art 2412', 'art 2416', 'art 2415', 'art 23', 'art 23', 'art 11', 'art 2417', 'arts 2419', 'art 2421', 'art 2305', 'art 23', 'art 11', 'art 11', 'art 2305', 'art 23', 'art 23', 'art 11', 'art 11', 'art 23', 'art 11', 'art 11', 'art 11']

Patent US20040071138 - Cell multiplexing apparatus handling multiple items of information - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA cell multiplexing apparatus comprising call monitors and multiplexers. The call monitors monitor a plurality of channels for their call setting status and select at least two channels for which the same cell may be assembled, i.e., for which the destination of the calls is the same. The multiplexers...http://www.google.com/patents/US20040071138?utm_source=gb-gplus-sharePatent US20040071138 - Cell multiplexing apparatus handling multiple items of informationAdvanced Patent SearchPublication numberUS20040071138 A1Publication typeApplicationApplication numberUS 10/680,178Publication dateApr 15, 2004Filing dateOct 8, 2003Priority dateJan 16, 1992Also published asUS5509007, US6584070, US6661796, US20030117957Publication number10680178, 680178, US 2004/0071138 A1, US 2004/071138 A1, US 20040071138 A1, US 20040071138A1, US 2004071138 A1, US 2004071138A1, US-A1-20040071138, US-A1-2004071138, US2004/0071138A1, US2004/071138A1, US20040071138 A1, US20040071138A1, US2004071138 A1, US2004071138A1InventorsTomonobu Takashima, Takeshi Tanaka, Reiko Norizuki, Hidetoshi Toyofuku, Hideki Mase, Masanori Kajiwara, Kosuke Nobuyasu, Kenji TanakaOriginal AssigneeFujitsu LimitedExport CitationBiBTeX, EndNote, RefManPatent Citations (40), Referenced by (9), Classifications (16) External Links: USPTO, USPTO Assignment, EspacenetCell multiplexing apparatus handling multiple items of information
US 20040071138 A1Abstract
A cell multiplexing apparatus comprising call monitors and multiplexers. The call monitors monitor a plurality of channels for their call setting status and select at least two channels for which the same cell may be assembled, i.e., for which the destination of the calls is the same. The multiplexers receive audio information or information already assembled in asynchronous transfer mode (ATM) cells from the channels selected by the call monitors, and disassemble and multiplex the received information for assembly into the payload of a new ATM cell. Images(29) Claims(16)
BRIEF DESCRIPTION OF THE DRAWINGS [0029] [0029]FIG. 1 is a view illustrating the operating principle of the present invention; [0030] [0030]FIG. 2 is a block diagram of a typical prior art ATM transmission apparatus; [0031] [0031]FIG. 3 is a view showing the constitution of an ATM cell used by the conventional apparatus of FIG. 2; [0032] [0032]FIG. 4 is a block diagram depicting the overall system configuration of a first embodiment of the invention; [0033] [0033]FIG. 5 is a block diagram of an ATM transmission apparatus in the first embodiment; [0034] [0034]FIG. 6 is a view showing the format of an ATM cell used by the first embodiment; [0035] [0035]FIG. 7 is a conceptual view indicating how data items are multiplexed by the first embodiment; [0036] [0036]FIG. 8 is a detailed view showing how call monitors are illustratively structured in the first embodiment; [0037] [0037]FIG. 9 is a view depicting typical sequences of control operations in effect when a call is connected by the first embodiment; [0038] [0038]FIG. 10 is a view portraying the sequence of operations between a code buffer controller and a code buffer on the calling side where a call is connected by the first embodiment; [0039] [0039]FIG. 11 is a view showing the sequence of operations between a code buffer controller and an ATM multiplexer on the called part where a call is connected by the first embodiment; [0040] [0040]FIG. 12 is a view depicting the sequence of operations between a code buffer controller and a code buffer on the called side where a call is connected by the first embodiment; [0041] [0041]FIG. 13 is a view illustrating the overall system configuration of a second embodiment of the invention; [0042] [0042]FIG. 14 is a function block diagram of a cell mapping part in the second embodiment; [0043] [0043]FIG. 15 is a conceptual view showing how ATM cells are multiplexed by the second embodiment; [0044] [0044]FIG. 16 is a view depicting the format of a channel identifier in a new ATM cell produced by the second embodiment; [0045] [0045]FIG. 17 is a block diagram portraying the overall system configuration of a third embodiment of the invention; [0046] [0046]FIG. 18 is a view illustrating the format of a channel ID part in a new ATM cell produced by the third embodiment; [0047] [0047]FIG. 19 is a block diagram depicting the overall system configuration of a fourth embodiment of the invention; [0048] [0048]FIG. 20 is a conceptual view showing how ATM cells are multiplexed by the fourth embodiment; [0049] [0049]FIG. 21 is a block diagram sketching the overall system configuration of a fifth embodiment of the invention; [0050] [0050]FIG. 22 is a block diagram of an interface part that handles the transmission and reception of ATM cells in the fifth embodiment; [0051] [0051]FIG. 23 is a function block diagram showing how a buffer controller and an ATM multiplexer operate on the transmitting side of the fifth embodiment; [0052] [0052]FIG. 24 is a function block diagram depicting how a buffer controller and an ATM multiplexer operate on the receiving side of the fifth embodiment; [0053] [0053]FIG. 25 is a conceptual view illustrating how ATM cells are multiplexed by the fifth embodiment; [0054] [0054]FIG. 26 is a view showing typical contents of payload control information parts in ATM cells in connection with the fifth embodiment; [0055] [0055]FIG. 27 is a view describing how the ATM cells multiplexed by the fifth embodiment as shown in FIG. 25 are restored back to the original information; [0056] [0056]FIG. 28 is a view showing a detailed format of an ATM cell in connection with the fifth embodiment; [0057] [0057]FIG. 29 is a view indicating what is typically meant by a DB header stored in a payload control information part in connection with the fifth embodiment; [0058] [0058]FIG. 30 is a view depicting typical contents of a DC header stored in a payload control information part in connection with the fifth embodiment; and [0059] [0059]FIG. 31 is a view showing the format of an ATM cell that actually contains information in connection with the fifth embodiment.
DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment [0060] The first embodiment of the invention is arranged to divide audio information from a plurality of channels into ATM cells 10 of a fixed length each for multiplexing. FIG. 4 depicts the overall system configuration of the first embodiment, FIG. 5 is a block diagram of an ATM transmission apparatus in the first embodiment, and FIG. 6 shows the format of an ATM cell used by the first embodiment. [0061] [0061]FIG. 7 is a conceptual view indicating how data items are multiplexed by the first embodiment. FIG. 7 shows how audio information from a plurality of channels 5 (data A, data B, data C, . . . ) is multiplexed into ATM cells 10. [0062] In FIG. 4, an exchange 1 accommodating subscriber lines from subscriber terminals 2 is connected to an ATM transmission apparatus 4. The ATM transmission apparatus 4 on the calling side is in turn connected via an ATM transmission line 3 to another ATM transmission apparatus 4 on the called side. [0063] In FIG. 5, call monitors 46 constituting call monitoring means 10 are provided in the ATM transmission apparatus 4. The call monitors 46 are connected to ATM processors 44. Each ATM processor 44 comprises a code buffer 42, a data multiplexer 36 and an ATM multiplexer 13, the latter two constituting multiplexing means 200. [0064] Referring again to FIG. 4, suppose that a subscriber (calling subscriber) wishes to make a call to another subscriber (called subscriber). In that case, the exchange 1 connects the calling subscriber's terminal 2 to the ATM transmission apparatus 4 via a given channel 5. In FIG. 5, the calling subscriber sends to the ATM transmission apparatus 4 call setting information for setting up the call. [0065] In the ATM transmission apparatus 4, the call monitors 46 monitor the call setting information coming from calling subscribers over the channels (data A-n). From the call setting information, each call monitor 46 obtains the settings needed to determine a virtual path identifier VPT and a virtual channel identifier VCI for the relevant ATM processor 44. The settings are transferred along with identification information of each channel 5 to the data multiplexer 36. The transfer is made to a buffer controller 12 (buffer control means 12) in the data multiplexer 36 via a control line 37 provided independently of data communication lines. [0066] How each call monitor is typically structured will now be described with reference to FIG. 8. As shown in FIG. 8, each call monitor comprises call monitor units 38 provided for the respective channels, a control signal transmitter-receiver 15 for recognizing a channel control signal received over the channels 5, and a transmission path selector 16 for obtaining path information from the channel control signal. [0067] The control information including the channel control information may be obtained on an in-slot basis (i.e., the information is contained in the audio signal from the channels 5), or on an out-slot basis (the information is received over a separate control line 37 independent of the audio information). [0068] In the data multiplexer 36 of FIG. 5, the buffer controller 12 analyzes the information sent from the call monitor 46, determines the virtual path identifier VPI and virtual channel identifier VCI for identifying the call, selects up to six channels 5 that determined the identifiers VPI and VCI, and forms a group of communication data accordingly. This group of communication data is a group which comprises communication information received over different channels 5 and which complies with the virtual path identifier VPI and virtual channel identifier VCI of the next stage. [0069] When the calling subscriber starts transmitting communication information (audio signal in this example), the coder-decoder 41 provided for each channel 5 converts to coded information the audio signal transmitted over the channels 5 and through the exchange 1. The conversion is carried out on the basis of the LD-CELP method. The coded information is accumulated in the code buffer 42 of the data multiplexer 36. [0070] The buffer controller 12 monitors the amount of coded information being accumulated in each code buffer 42. A point is eventually reached where the buffer controller 12 finds that the code buffers 42 corresponding to the six channels 5 forming the same group have each accumulated five sets of coded information (a total of 50 bits). At that point, the buffer controller 12 obtains the accumulated five sets of coded information from the buffers and stores them into a user information part 11 of each channel 5 in the payload 8 of the cell shown in FIG. 6. [0071] In addition, the buffer controller 12 collects through the call monitors 46 the control information on the connection status of six subscribers forming the same group (e.g., on-hook/off-hook information) as well as alarm information in connection therewith. The collected information is stored in a 10-bit control/alarm information area assigned to the six channels 5 in the payload 8. [0072] Five sets of coded information (a total of 50 bits) and control/alarm information (10 bits) are allocated to the six channels 5. These sets of coded information constitute part of the 360-bit payload 8. [0073] In the setup of FIG. 6, each coded information area of the payload 8 is formed to a fixed length (50 bits). Alternatively, these information areas may be formed to a variable length each. How this can be achieved will be described later in connection with the fifth embodiment (FIG. 25). [0074] The payload 8 is assembled under control of the buffer controller 12. The payload data are then output to the ATM multiplexer 13 in accordance with the virtual path identifier VPI and virtual channel identifier VCI determined commonly for those channels 5 constituting the same group. [0075] The ATM multiplexer 13 assembles a cell by supplementing the payload 8 from the upstream multiplexing part with an ATM header 7 containing the virtual path identifier VPI and virtual channel identifier VCI. The assembled cell is transmitted to a cross connection multiplexer 45. The cross connection multiplexer 45 places in a queue (i.e., buffer) the cells coming from various ATM multiplexers 13. These cells are then output over the ATM transmission line 3 in the order in which they arrived. [0076] Described below with reference to FIGS. 9 through 12 are the sequences of control operations in effect when a call is made by the first embodiment. In FIG. 9, the upper half shows the sequence of control operations on the calling side of the ATM transmission apparatus 4, and the lower half indicates the sequence of control operations on the called side of the ATM transmission apparatus 4. [0077] On the calling side of the ATM transmission apparatus 4, as shown in the upper part of FIG. 9, the control signal transmitter-receiver 15 in the call monitor 46 receives call information, i.e., a start signal and a selection signal, from a calling subscriber's terminal 2 belonging to the same exchange 1. At that point, the control signal transmitter-receiver 15 extracts a channel control signal from the received information and sends the signal to the transmission path selector 16. [0078] Based on the channel control signal received, the transmission path selector 16 selects an appropriate transmission path, generates channel path information, and sends the information to the code buffer controller 12. In turn, the code buffer controller 12 determines the path of an ATM cell to be generated on the basis of the channel path information. With the cell path determined, the code buffer controller 12 sends cell transmission path information to the ATM multiplexer 13. [0079] Concurrently, the code buffer controller 12 reads coded information from the code buffer 42. If ant of the channels involved is busy with a call, the code buffer controller 12 notifies the ATM multiplexer 13 with only the control signal such as cell transmission path information until an acknowledge signal is received from the opposite exchange. It is only after the opposite exchange 1 acknowledges receipt and completion of the call and its connection that the coded information is transmitted to the ATM multiplexer 13. [0080] [0080]FIG. 10 portrays the sequence of operations performed between the code buffer controller 12 and the code buffer 42 in the above setup. As described, upon receipt of the channel path information from the transmission path selector 16, the code buffer controller 12 determines the cell path and makes a read request to the code buffer 42 by designating an appropriate address thereto. The coded information is read from the code buffer 42 in response to the read request and is transferred to the code buffer controller 12. When one cell of coded information has been read out by the code buffer controller 12, the controller 12 outputs a cell generation complete notice to the ATM multiplexer 13. The cell generation complete notice prompts the ATM multiplexer 13 to make a read request. In turn, the code buffer controller 12 supplies the ATM multiplexer 13 with payload information made of the channel control signal and of the coded information. [0081] When the ATM, multiplexer 13 prefixes the header 7 to the payload information, the result is an ATM cell 10 that is transferred through the cross connection multiplexer 45 of FIG. 5 and on to the ATM transmission line 3. [0082] [0082]FIG. 11 shows the sequence of operations in effect when call information sent from the ATM transmission apparatus 4 on the calling side is received as the ATM cell 10 by the ATM transmission apparatus 4 on the receiving side. Upon receipt of the ATM cell 10, the ATM multiplexer 13 sends a cell receipt acknowledge signal to the code buffer controller 12 within the receiving-side ATM transmission apparatus 4. In turn, the code buffer controller 12 makes a read request to the ATM multiplexer 13. The read request prompts the ATM multiplexer 13 to read the payload information (coded and control information) from the ATM cell 10 and to decode the channel path. The decoded channel path information is sent by the code buffer controller 12 to the control signal transmitter-receiver 15. The channel path information received by the control signal transmitter-receiver 15 is sent both to the call, monitors 38 (FIG. 8) and to the transmission path selector 16. [0083] In parallel with the above process, the code buffer controller 12 writes the coded information to the code buffer 42. The sequence of the write operation is shown in FIG. 12. Specifically, upon receipt of the path information from the transmission path selector 16, the code buffer controller 12 decodes the channel path and makes a write request to the code buffer 42. When the code buffer 42 grants permission to write, the code buffer controller 12 writes to the code buffer 42 the coded information obtained from the payload 8 in the ATM cell 10. Subsequent operations, not shown in FIG. 12, include outputting the coded information that came from the code buffer 42 onto the ATM transmission line 3 and transmitting the information to the called subscriber's terminal. [0084] The lower half of FIG. 9 depicts the sequence of operations performed by the ATM transmission apparatus 4 on the called side when the call is acknowledged by the called subscriber. Specifically, when the called-side ATM transmission apparatus 4 receives acknowledge information (acknowledge signal) from the called subscriber, a call connection signal is extracted by the control signal transmitter-receiver 15 from the received information and is sent to the code buffer controller 12 via the transmission path selector16. Then in the same sequence as shown in FIG. 10, the coded information is read from the code buffer 42 for cell generation. The payload information is forwarded to the ATM multiplexer 13. [0085] The ATM multiplexer 13 prefixes the header 7 to the payload information. The payload information prefixed with the header 7 is sent to the cross connection multiplexer 45. In turn, the cross connection multiplexer 45 transmits the acknowledge information as an ATM 10 to the ATM transmission apparatus 4 on the calling side. [0086] As described, the first embodiment works roughly as follows: when the code buffers 42 corresponding to the six calls that share a virtual path identifier VPI and a virtual channel identifier VCI have each accumulated five sets of coded information, the data multiplexer 36 (buffer controller 12) in the ATM transmission apparatus 4 starts assembling one set of payload information using separately collected control and alarm information. At this point, it takes 3,125 ms (i.e., 625�5) for each of the code buffers 42 to accumulate five sets of coded information. That is, the coded information accumulation time with the code buffers 42 is reduced to {fraction (5/36)} of the time normally calculated with the prior art ATM transmission apparatus 4 (22,500 ms). Second Embodiment [0087] The second embodiment is arranged to further multiplex ATM cells 10 into a new ATM cell 10 through remapping in an ATM node (i.e., ATM transmission apparatus 4), the new ATM cell being output onto the ATM transmission line 3. Among the plurality of ATM cells 10 to be multiplexed, the VCI value of a given ATM cell 10 is taken as the VCI value of the header 7 for the new ATM cell 10. The VCI values of the old ATM cells 10 are stored as channel identification information in the payload 8 of the new ATM cell 10. [0088] As depicted in FIG. 13, the system configuration of the ATM transmission apparatus 4 in the second embodiment includes ATM converters (AAL's) and a path distributor 50. The path distributor 50 contains a path identifier 17 and a cell mapping part 18, the path identifier operating as the call monitoring means 100. FIG. 14 is a function block diagram of the cell mapping part 18. The cell mapping part 18 comprises a cell mapping controller 22, a timer 20 controlled by the cell mapping controller 22, a mapping buffer 32, a VCI detector 21 and a cell output part 52. [0089] What characterizes the second embodiment is that the signals from subscriber terminals 2 are converted by the ATM converters (AAL's) into ATM cells which are then remapped by the path distributor 50 into a newly multiplexed ATM cell 10 for output. [0090] In FIG. 13, the path identifier 17 acts as a kind of selector. While receiving information in the form of ATM cells 10 from the ATM converters (AAL's), the path identifier 17 detects VPI values from these cells. If ATM cells 10 found destined to the same path based on VPI detection are received within a predetermined period of time, the path identifier 17 inputs these ATM cells into the cell mapping part 18. In FIG. 14, cells #1 and #2 have the same VIP value. [0091] When a first ATM cell 10 (i.e., first cell #1 given after timer reset) arrives from an ATM converter (AAL), the timer 20 is activated and the VCI detector 21 is fed with a pulse signal indicating the input of the first ATM cell 10 (cell #1). The VCI detector 21 detects the VCI value from the cell, and notifies the cell mapping controller 22 of the VCI value of the first ATM cell 10 (cell #1). [0092] The cell mapping controller 22 then assembles a new ATM cell 10 (cell #A) with its VCI value taken from the first ATM cell 10 (cell #1). That VCI value is also stored in a channel ID part 24 of the payload 8. [0093] When the path identifier 17 detects the arrival of an ATM cell (cell #2) having the same VPI value as that of the first cell before time is up on the timer 20, the VCI detector 21, reads the VCI value from the header 7 of the ATM cell 10 (cell #2). The cell mapping controller 22 writes the VCI value of the ATM cell (cell #2) only to the channel ID part 24 in a payload control information part 23 of the payload 8. Thereafter, whenever an ATM cell 10 is input of which the VPI value is the same as the above, the VCI value is stored successively into the channel ID part 24 of the payload 8. The successive storage of VCI values into the channel ID part 24 continues until a time-out is reached on the timer 20. [0094] Concurrently with the storage of the VCI values, the information on the ATM cells 10 (cells #1, #2, etc.) is stored consecutively into a user information part 11 of the payload 8. [0095] [0095]FIG. 15 illustrates how ATM cells (cells #1, #2, etc.) are related in format to the new ATM cell (cell #A) in connection with the second embodiment. As shown, the VPI and VCI values of the first ATM cell (cell #1) are adopted as those of the new ATM cell 10 (cell #A); the VCI information of the second and subsequent ATM cells is stored successively into the channel ID part 24. The control information and user information of the ATM cells 10 are placed for each channel into areas of a fixed length each within the user information part 11 of the payload 8 in the new ATM cell 10 (cell #A). [0096] The channel ID part 24 accommodates, in addition to the VCI values of the ATM cells 10 (cells #1, #2, etc.), data length information indicating the amount of information (significant bit count or byte length) of each old ATM cell 10. If the control information is the same or common to the channels 5, the information may alternatively be written to an appropriate address of the new ATM cell 10 (cell #A). Where one sampled data item is fixed to a data length of eight bits, as with 64-kbps PCM audio information, the data length information may be stored as a single item or may be omitted altogether. [0097] When a predetermined period of time has elapsed on the timer 20 (i.e., upon time-out), the timer 20 outputs a trigger signal to the cell output part 52 through the cell mapping controller 22. With the trigger signal output, the VIP value is written to the header 7 of the new ATM cell 10 (cell #A) via the cell output part 52. The ATM cell 10 (cell #A) is then output onto the transmission line. [0098] Even before the time-out of the timer 20, the cell mapping part 18 outputs the trigger signal to the cell output part 52 if the user information part 11 of the ATM cell 10 (cell #A) has been filled to capacity with information. This prompts the output of the ATM cell 10 (cell #A). At this point, the timer 20 is reset regardless of the time-out that may or may not be reached on the timer. [0099] In the receiving side ATM node, the old VCI values of the old ATM cells (cells #1. #2, etc.) are extracted from the channel ID part 24 in the payload 8 of the new ATM cell 10 (cell #A). At the same time, the data length information is read out to determine the allocation of the information for the respective old cells. The operations combine to reassemble the old ATM cells 10 (cells #1, #2, etc.). [0100] Although the above setup involves storing the VCI value of the first ATM cell (cell #1) in the channel ID part 24 of the payload 8, the channel ID part 24 may alternatively accommodate the VCI values of the second and subsequent ATM cells 10 (from cell #2 on). In the latter case, the VCI value in the header 7 of the ATM cell 10 (cell #A) that has arrived may be used unchanged as the first user information on the receiving side. [0101] Although the above setup uses the VCI value of the first ATM cell 10 (cell #1) as the VCI value of the new ATM cell 10 (cell #A), an alternative arrangement may be employed. Specifically, the maximum or minimum VCI value of the old ATM cells 10 (cells #1, #2, etc.) may be detected by the VCI detector 21. Then the cell mapping part 18 may write the maximum or minimum VCI value to the header 7 of the new ATM cell 10 (cell #A). In this case, the writing of the VCI value to the header 7 of the new ATM cell 10 (cell #A) is accomplished after mapping. [0102] As described, the second embodiment assembles old ATM cells 10 (#1, #2, etc.) regardless of their many dummy patterns (see FIG. 15) into a new ATM cell (#A) with no dummy pattern. In this manner, the payload 8 of the new ATM cell 10 is utilized efficiently. Because the assembly of the new ATM cell 10 is monitored by the timer 20, there is no delay in the output of that cell. [0103] [0103]FIG. 16 depicts the format of a channel ID part in a new ATM cell (#A) produced by a variation of the second embodiment. One way to apportion VPI and VCI values of ATM cells in the channel ID format is to set low-order n bits as per the number of paths or channels needed by the user while the high-order bits are fixed (e.g., all bits fixed to zero). In the example of FIG. 16, the channel ID part 24 of the new ATM cell 10 (#A) accommodates only the low-order n bits and VCI significant bit count of the VCI values from the old ATM cells 10 (#1, #2., etc.). [0104] According to the preceding method, three bits are enough when it comes to expressing, say, five channels for use by a single path (VPI). Even if the use of “000” is prohibited by the user, a three-bit format provides expressions of up to seven channels (001-111). [0105] Where the above method is employed, the cell mapping part 22 takes the significant bit count n (n=7 in the above example) of the VCI values from the input ATM cells 10 (#1, #2, etc.) and stores the count into a significant bit count storage part of the channel ID part 24 in the payload 8. Following the bit count storage part, the cell mapping part 22 stores consecutively the low-order n bits of the VCI values from the input ATM cells 10. [0106] The value n may be determined in one of two ways: either it is set when entered initially through the network, or it is determined as needed based on the information obtained from the VCI detector 21. In any case, the format of FIG. 16 allows the channel ID part 24 to be used efficiently so that an extensive user information part 11 will be secured in the payload 8. Third Embodiment [0107] In the third embodiment, an ATM node (i.e., ATM transmission apparatus 4) further multiplexes the information in the form of ATM cells 10 into a new ATM cell 10 through remapping, and outputs the new ATM cell to another ATM node. Among the plurality of ATM cells 10 to be multiplexed, the VCI value of a given ATM cell 10 is taken as the VCI value of the header 7 for the new ATM cell 10. The VCI values of the old ATM cells 10 are converted to channel numbers through a management table 25 for storage into the channel ID part 24 of the new ATM cell 10. [0108] [0108]FIG. 17 portrays the system configuration of the third embodiment. In FIG. 17, the cell mapping controller 22 is basically the same in composition as that of the second embodiment except for the management table 25 shown in the figure. The other components that are functionally identical to those described in connection with the second embodiment are designated by the same reference numerals, and any repetitive description thereof is omitted. As depicted in FIG. 17, the management table 25 is made of conversion tables each converting the VCI numbers under a given VPI into channel numbers. [0109] When notified of the VCI values of the old ATM cells 10 (#1. #2, etc.) by the VCI detector 21, the cell mapping controller 22 references the conversion table of the applicable VPI in the VCI management table 25, and reads the corresponding channel numbers therefrom. The channel numbers thus read out are written consecutively, together with data length information, to the channel ID part 24 of the new ATM cell 10 (#A). [0110] [0110]FIG. 18 illustrates the format of the channel ID part 24 in a new ATM cell produced by the third embodiment. As with the second embodiment, if the data length is the same throughout the payload user information part 11 of this format, only one data length may be stored, or the storage of data lengths may be omitted altogether. Fourth Embodiment [0111] In the fourth embodiment, an ATM node (i.e., ATM transmission apparatus 4) further multiplexes the information in the form of ATM cells 10 into a new ATM cell 10 through remapping, and outputs the new ATM cell to another ATM node. What characterizes the fourth embodiment is that a representative VCI indicating a plurality of multiplexed cells is stored as the VCI value of the new ATM cell 10. [0112] [0112]FIG. 19 depicts the system configuration of the fourth embodiment which includes a representative VCI prefixing part 53. The other components that are functionally identical to those described in connection with the second embodiment are designated by the same reference numerals, and any repetitive description thereof is omitted. [0113] With the fourth embodiment, the cell mapping controller 22 sends a trigger signal to the representative VCI prefixing part 53 immediately after reset or time-out of the timer 20 or when the user information part 11 of the payload 8 has been filled with information. This causes the representative VCI value to be written to the header 7 of the new ATM cell 10 (#A). The representative VCI stands for a plurality of cells being multiplexed and is preferably reserved as a special number. FIG. 20 shows how old ATM cells 10 (#1, #2, etc.) compare in format with the new ATM cell 10 (#A) in connection with the fourth embodiment. [0114] Upon receipt of the multiplexed ATM cell 10 (#A) prefixed with the representative VCI, the ATM node on the receiving side disassembles the ATM cell 10 (#A) into the original plurality of ATM cells 10 (#1, #2, etc.). The disassembled ATM cells 10 are transferred to the terminals corresponding thereto. If an ATM cell 10 (#B) has no representative VCI prefixed thereto, the cell is transferred intact to the corresponding terminal or ATM transmission apparatus 4. [0115] The prefixing of the representative VCI may be implemented by combining the methods of the second and third embodiments. Fifth Embodiment [0116] The fifth embodiment involves dividing into variable lengths a plurality of items of information generated by terminals (i.e., terminal equipment; TE) in an in-house setup and multiplexing these items in the payload 8 of an ATM cell 10. [0117] [0117]FIG. 21 sketches the overall system configuration of the fifth embodiment. In the in-house setup of FIG. 21, terminals (TE) connected to in-house bus means 28 coming from network transit switching equipment 26 are illustratively multimedia terminals. Each of these terminals incorporates a pair of interface parts 30 that transmit and receive image information, audio information, text data and other data in the form of ATM cells 10. FIG. 22 illustrates an interface part 30 in more detail. As depicted, the interface part 30 comprises an ATM multiplexer 13, a buffer controller 12 and a buffer 54. In each terminal (TE), one interface part 30 is located on the upward-bound bus side and the other interface part 30 on the downward-bound bus side. [0118] [0118]FIG. 23 is a function block diagram showing how the buffer controller 12 and the ATM multiplexer 13 operate on the transmitting side of the fifth embodiment, and FIG. 24 is a function block diagram depicting how the same components operate on the receiving side. [0119] What takes place on the transmitting side of the fifth embodiment in FIG. 23 is as follows: data items (A, B, C, . . . , N) from terminals are first written to the buffer 54. When a buffer input counter 2302 has counted the data items up to a predetermined value, the counter notifies an input transmission rate calculation part 3203 that the predetermined count value is reached. Based on that input count value, the input transmission rate calculation part 3203 calculates the transmission rate of the input data and notifies a payload assembly ratio calculation part 2305 of that rate. At the same time, a desired transmission rate request processing part 2304 receives desired transmission rate requests from the terminals (TE) and notifies the payload assembly ratio calculation part 2305 of these requests. [0120] Based on the received information and on the data from a bus monitoring and processing part 2312, the payload assembly ratio calculation part 2305 determines how the different data items are to be allocated in the payload 8. The data allocation thus determined is sent to a sub-header assembly part 2309 and to a read order and amount controller 2306 of the payload control information part 23. [0121] In turn, the read order and amount controller 2306 activates individual input buffer reading parts 2307 which read necessary amounts of data from the buffer 54 in a predetermined order. The read-out data are handed over to a payload data assembly part 2308 of the ATM multiplexer 13. [0122] After the sub-header assembly part 2309 prefixes the payload control information part 23 as a sub-header 7 to the payload 8, an ATM header prefixing part 2310 prefixes the other items of the header 7 (e.g., VPI, VCI) to the ATM cell 10. The completed ATM cell 10 is then sent to a transmission buffer 2311 (first-in first-out memory) in the ATM multiplexer 13. From the buffer 2311, the ATM cell 10 is output onto the in-house bus means 28. [0123] What takes place on the receiving side of the fifth embodiment in FIG. 24 is as follows: when an ATM cell 10 is received through the in-house bus means 28, cell receipt information is sent from an ATM header identification part 2413 to a bus monitoring and processing part 2412 within the ATM multiplexer 13. This causes necessary processing to take place according to the protocol (e.g., DQDB protocol) of the in-house bus means 28. [0124] The ATM cell thus received is accumulated in a reception buffer 2414 (first-in first-out memory) in the ATM multiplexer 13. Thereafter, the ATM cell is sent both to a sub-header removal part 2416 and to a sub-header analysis part 2415, the latter analyzing the sub-header 7 held in the payload control information part 23. In accordance with the result of the analysis on the sub-header 7, the payload control information part 23 is removed and the user information part 11 of the payload 8 is disassembled by a payload data disassembly part 2417. Following disassembly, image information, audio information, text data and other data are transferred to individual data transmission buffer writing parts 2419 via individual data buffers 2418 (first-in first-out memory). These kinds of information are read from the buffers according to the transmission rate determined by a desired transmission rate request processing part 2421. [0125] What characterizes the fifth embodiment is that, as discussed with reference to FIG. 23, the relative ratio at which to assemble different data into the payload 8 is varied (by the payload assembly ratio calculation part 2305) in accordance with the desired transmission rates requested and with the actually input transmission rate. While the first through the fourth embodiment allocate data in a fixed length format within the payload 8 upon multiplexing of information in the ATM cell 10, the fifth embodiment allocates data in a variable length format within the payload 8. [0126] [0126]FIG. 25 is a conceptual view illustrating how ATM cells are multiplexed by the fifth embodiment. In FIG. 25, transmitted information composed of four data types (data A through data D; in the upper part of the figure) is shown multiplexed in variable lengths (in the lower part of the figure) within the payload 8 of an ATM cell 10. These four kinds of data (data A-D) may be data for a different channel each (e.g., data A representing image, data B sound, data C text data). The fifth embodiment is particularly effect when used with an in-house setup wherein multimedia terminals connected to an in-house LAN are often required to transmit and receive information of different channels in synchronism. [0127] Generally, the ATM cell 10 comprises the ATM header 7, payload control information part 23 and payload user information part 11. The ratio of assembling each of different types of information into the payload user information part 11 is calculated by the payload assembly ratio calculation part 2305. The ratio is determined after consideration of such factors as whether or not the information to be transmitted needs to be processed at high speed and whether or not the information is to be handled on a burst basis. [0128] [0128]FIG. 26 shows typical contents of payload control information parts in ATM cells (i.e., lower half of what is depicted in FIG. 25) in connection with the fifth embodiment, and FIG. 28 gives a detailed format of one of such ATM cells. As illustrated in FIG. 28, the payload control information part 23 contains a DB header (first control area 34) and a DC header (second control area 35). The DB header comprises identifiers each indicating the beginning, an intermediate portion or the end of the information in question. The DC header includes identifiers indicating the data length of each item of information held in this ATM cell 10. [0129] Take, for example, the first ATM cell 10 (cell 1) shown in the lower half of FIG. 25. This ATM cell contains the beginning of each of data A through data C, while data D is not stored. Thus the DB header contains an identifier (e.g., “01”) indicating the beginning of each of data A through data C, and includes another identifier (e.g., “00”) indicating the absence of data D (see FIG. 29, to be discussed later). The DC header stores the data length of each of the different data (A1, B1, C1; see FIG. 30, to be discussed later). [0130] On the receiving side, the DB and DC headers are read out of the payload control information part 23. The information contained in the headers allows the receiving-side ATM transmission apparatus to recognize what kinds of information are held and how they are allocated in the payload user information part 11 of the ATM cell 10 in question. With the necessary information thus revealed, the original data A through D are restored precisely. FIG. 27 describes how the ATM cells multiplexed by the fifth embodiment as shown in the lower half of FIG. 25 are restored back to the original data (data A through D). [0131] In the ATM cell format shown in FIG. 28, what characterizes the fifth embodiment is that, as mentioned above, the payload user information part 11 is headed by the payload control information part 23 which comprises the first control area 34 and second control area 35. The first and the second control areas 34 and 35 accommodate the DB header and DC header, respectively, as identifiers. The DB header may store up to four identifiers two bits in length each. The meanings of these identifiers (DCF's) are listed in FIG. 29. [0132] In FIG. 29, a bit string “00” held in a DCF means that no data is stored in the corresponding payload user information part 11; a bit string “01” means that the beginning of transmitted data is stored; a bit string “10” means that an intermediate portion of the transmitted data is stored; and a bit string “11” means that the end of the transmitted data is stored. [0133] The DC header may contain up to four pairs of identifiers, each pair indicating a data length (DL) and a data sequence (DSN, or data sequence number). The DL identifier denotes the length of the corresponding data accommodated in the payload user information part 11 (to be described below), and the DSN identifier designates the data sequence number of the applicable data as counted from the first data. [0134] The payload user information part 11 ranges from the eleventh octet to the fifty-second octet. Actual data are allocated in this part according to the ratio determined for the respective data. FIG. 31 shows the format of an ATM cell that contains actual data in connection with the fifth embodiment. [0135] As described and according to the fifth embodiment. numerous kinds of data are multiplexed in each ATM cell 10 in which the payload 8 is apportioned in variable lengths. This feature boosts the efficiency of data transmission and makes effective use of the available traffic capacity thanks to the high concentration of transmitted data. [0136] Because there is no need to classify data types on a network 27 (in FIG. 21), the structure of the network can be simplified. [0137] With no need to change transmission and reception protocols on any terminal (TE) for each different type of data to be transmitted in an in-house setup, the terminal may be made smaller in size and simpler in structure than before. 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