Source: http://www.google.com/patents/US7768360?dq=6106459
Timestamp: 2014-12-22 05:41:45
Document Index: 480994547

Matched Legal Cases: ['Application No. 04020779', 'Application No. 04020779', 'Application No. 03', 'Application No. 03', 'Application No. 03', 'Application No. 03', 'Application No. 200610126947', 'Application No. 200610126949', 'Application No. 200605916', 'Application No. 200605918', 'Application No. 04', 'Application No. 04', 'Application No. 200610126947']

Patent US7768360 - Crystal oscillator emulator - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA crystal oscillator emulator integrated circuit, comprises a first temperature sensor that senses a first temperature of the integrated circuit; memory that stores calibration parameters and that selects at least one of the calibration parameters based on the first temperature; a semiconductor oscillator...http://www.google.com/patents/US7768360?utm_source=gb-gplus-sharePatent US7768360 - Crystal oscillator emulatorAdvanced Patent SearchPublication numberUS7768360 B2Publication typeGrantApplication numberUS 11/649,433Publication dateAug 3, 2010Filing dateJan 4, 2007Priority dateOct 15, 2002Fee statusPaidAlso published asUS7760036, US7768361, US7786817, US20070176690, US20070182500, US20070188253, US20080042767Publication number11649433, 649433, US 7768360 B2, US 7768360B2, US-B2-7768360, US7768360 B2, US7768360B2InventorsSehat SutardjaOriginal AssigneeMarvell World Trade Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (100), Non-Patent Citations (26), Referenced by (4), Classifications (51), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetCrystal oscillator emulatorUS 7768360 B2Abstract A crystal oscillator emulator integrated circuit, comprises a first temperature sensor that senses a first temperature of the integrated circuit; memory that stores calibration parameters and that selects at least one of the calibration parameters based on the first temperature; a semiconductor oscillator that generates an output signal having a frequency that is based on the calibration parameters; and an adaptive calibration circuit that adaptively adjusts a calibration approach for generating the calibration parameters based on a number of temperature test points input thereto.
1. A crystal oscillator emulator integrated circuit, comprising:
a first temperature sensor that senses a first temperature of said integrated circuit;
memory that stores calibration parameters and that selects at least one of said calibration parameters based on said first temperature;
a semiconductor oscillator that generates an output signal having a frequency that is based on said calibration parameters; and
an adaptive calibration circuit that adaptively adjusts a calibration approach for generating said calibration parameters based on a number of temperature test points input thereto.
2. The crystal oscillator emulator integrated circuit of claim 1 further comprising a select input that selects said frequency of said output signal frequency as a function of an external passive component.
3. The crystal oscillator emulator integrated circuit of claim 1 wherein said first temperature is a die temperature adjacent to said semiconductor oscillator.
4. The crystal oscillator emulator integrated circuit of claim 1 further comprising:
a heater that adjusts said first temperature; and
a disabling circuit that disables said heater after said calibration parameters are stored.
5. The crystal oscillator emulator integrated circuit of claim 4 wherein said heater operates in response to said first temperature sensor.
6. The crystal oscillator emulator integrated circuit of claim 1 wherein when test data consists of a single temperature test point, said adaptive calibration circuit employs at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
7. The crystal oscillator emulator integrated circuit of claim 1 wherein when test data consists of two temperature test points, said adaptive calibration circuit employs at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
8. The crystal oscillator emulator integrated circuit of claim 1 wherein when test data consists of two temperature test points, said adaptive calibration circuit adjusts at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
9. The crystal oscillator emulator integrated circuit of claim 1 wherein when test data comprises three temperature test points, said adaptive calibration circuit adjusts at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
10. The crystal oscillator emulator integrated circuit of claim 1 wherein said memory includes one time programmable memory.
11. A crystal oscillator emulator integrated circuit, comprising:
first temperature sensing means for sensing a first temperature of said integrated circuit;
storing means for storing calibration parameters and for selecting at least one of said calibration parameters based on said first temperature;
semiconductor oscillating means for generating an output signal having a frequency that is based on said calibration parameters; and
adaptive calibration means for adaptively adjusting a calibration approach for generating said calibration parameters based on a number of temperature test points input thereto.
12. The crystal oscillator emulator integrated circuit of claim 11 further comprising a select input that selects said frequency of said output signal frequency as a function of an external passive component.
13. The crystal oscillator emulator integrated circuit of claim 11 wherein said first temperature is a die temperature adjacent to said semiconductor oscillating means.
14. The crystal oscillator emulator integrated circuit of claim 11 further comprising:
heating means for adjusting said first temperature; and
disabling means for disabling said heating means after said calibration parameters are stored.
15. The crystal oscillator emulator integrated circuit of claim 14 wherein said heating means operates in response to said first temperature sensing means.
16. The crystal oscillator emulator integrated circuit of claim 11 wherein when test data consists of a single temperature test point, said adaptive calibration means employs at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
17. The crystal oscillator emulator integrated circuit of claim 11 wherein when test data consists of two temperature test points, said adaptive calibration means employs at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
18. The crystal oscillator emulator integrated circuit of claim 11 wherein when test data consists of two temperature test points, said adaptive calibration means adjusts at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
19. The crystal oscillator emulator integrated circuit of claim 11 wherein when test data comprises three temperature test points, said adaptive calibration means adjusts at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
20. The crystal oscillator emulator integrated circuit of claim 11 wherein said storing means includes one time programmable memory.
sensing a first temperature of an integrated circuit;
selecting at least one of said calibration parameters based on said first temperature;
providing a semiconductor oscillator that generates an output signal having a frequency that is based on said calibration parameters; and
adaptively adjusting a calibration approach for generating said calibration parameters based on a number of temperature test points input thereto.
22. The method of claim 21 further comprising selecting said frequency of said output signal frequency as a function of an external passive component.
23. The method of claim 21 wherein said first temperature is a die temperature adjacent to said semiconductor oscillator.
selectively adjusting said first temperature using a heater; and
disabling said heater after said calibration parameters are stored.
25. The method of claim 24 wherein said heater operates in response to a first temperature sensor.
26. The method of claim 21 wherein when test data consists of a single temperature test point, further comprising:
employing at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve; and
adjusting a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on said test data.
27. The method of claim 21 wherein when test data consists of two temperature test points, further comprising:
28. The method of claim 21 wherein when test data consists of two temperature test points, further comprising:
adjusting at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve; and
29. The method of claim 21 wherein when test data comprises three temperature test points, further comprising:
30. The method of claim 21 wherein said memory includes one time programmable memory.
a crystal oscillator emulator that comprises:
memory that stores calibration parameters that are addressed based on said first temperature; and
a semiconductor oscillator that generates an output signal having a frequency that is based on said calibration parameters,
wherein said integrated circuit does not include other circuits unrelated to operation of said crystal oscillator emulator.
32. The integrated circuit of claim 31 wherein said crystal oscillator emulator further comprises a select input that selects said frequency of said output signal as a function of an external passive component.
33. The integrated circuit of claim 31 wherein said crystal oscillator emulator further comprises a heater that selectively adjusts said first temperature.
34. The integrated circuit of claim 33 wherein said heater operates in response to said first temperature sensor.
35. The integrated circuit of claim 33 wherein said heater is selected from a group consisting of transistor heaters and resistive heaters.
36. The integrated circuit of claim 31 further comprising a calibration circuit that communicates with said memory and generates said calibration parameters.
37. The integrated circuit of claim 36 wherein said calibration circuit employs at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on test data, and wherein said test data consists of a single temperature test point.
38. The integrated circuit of claim 36 wherein said calibration circuit employs at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on test data, and wherein said test data consists of two temperature test points.
39. The integrated circuit of claim 36 wherein said calibration circuit adjusts at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on test data, and wherein said test data consists of two temperature test points.
40. The integrated circuit of claim 36 wherein said calibration circuit adjusts at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve, and adjusts a location of said at least one of said predetermined temperature characteristic line and said predetermined temperature characteristic curve based on test data, and wherein said test data comprises three temperature test points.
41. The integrated circuit of claim 31 wherein said semiconductor oscillator comprises an inductance that includes one of Gold or Copper.
42. The crystal oscillator emulator integrated circuit of claim 1 wherein said semiconductor oscillator comprises an inductance that includes one of Gold or Copper.
43. The crystal oscillator emulator integrated circuit of claim 11 wherein said semiconductor oscillating means comprises inductance means for providing inductance that includes one of Gold or Copper.
44. The method of claim 21 wherein said semiconductor oscillator comprises an inductance that includes one of Gold or Copper.
CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of U.S. Provisional Application Nos. 60/869,807, filed on Dec. 13, 2006, 60/868,807, filed on Dec. 6, 2006, and 60/829,710, filed Oct. 17, 2006, and is a continuation in part of U.S. Application Ser. No. 11/328,979, filed on Jan. 10, 2006, which claims the benefit of the U.S. Provisional Application Nos. 60/714,454, filed on Sep. 6, 2005, 60/730,568, filed on Oct. 27, 2005, and 60/756,828, filed Jan. 6, 2006, and is a continuation-in-part of U.S. patent application Ser. No. 10/892,709, filed on Jul. 16, 2004 (now U.S. Pat. No. 7,148,763 issued Dec. 12, 2006), which is a continuation in part of U.S. patent application Ser. No. 10/272,247 (now U.S. Pat. No. 7,042,301 issued May 9, 2006), filed on Oct. 15, 2002, the contents of which are hereby incorporated by reference in their entirety.
TECHNICAL FIELD This invention relates to integrated circuits, and more particularly to integrated circuits with crystal oscillator emulators.
SUMMARY OF THE INVENTION A crystal oscillator emulator integrated circuit, comprises a first temperature sensor that senses a first temperature of the integrated circuit; memory that stores calibration parameters and that selects at least one of the calibration parameters based on the first temperature; a semiconductor oscillator that generates an output signal having a frequency that is based on the calibration parameters; and an adaptive calibration circuit that adaptively adjusts a calibration approach for generating the calibration parameters based on a number of temperature test points input thereto.
In other features, the first and second scaling factors are divisors equal to N and N+1, respectively, and wherein N is an integer greater than zero. The phase locked loop means comprises a Delta Sigma fractional phase locked loop and the feedback loop parameter includes modulation of a scaling divisor. The Delta Sigma fractional phase locked loop comprises: phase frequency detector means that communicates with the MEMS or FBAR resonator means for receiving the reference frequency; charge pump means for communicating with the phase frequency detector means; voltage controlled oscillating means that communicates with the charge pump means for generating an output frequency, scaling means that communicates with the voltage controlled oscillating means and the phase frequency detector means for selectively dividing the output frequency by first and second scaling factors; and Sigma Delta modulating means for adjusting modulation of the scaling means between the first and second scaling factors based on the at least one of the calibration parameters.
An integrated circuit comprises microelectromechanical (MEMS) or film bulk acoustic resonator (FBAR) means for generating a reference frequency and that includes: semiconductor oscillating means for generating a resonator drive signal having a drive frequency; and: MEMS or FBAR resonator means for receiving the resonator drive signal and for resonating. Temperature sensing means senses a temperature of the integrated circuit. Storing means stores calibration parameters and selects at least one of the calibration parameters as a function of the sensed temperature, wherein the drive frequency is based on the calibration parameters.
In other features, when test data consists of a single temperature test point, te method further comprises employing at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve; and adjusting a location of the at least one of the predetermined temperature characteristic line and the predetermined temperature characteristic curve based on the test data. When test data consists of two temperature test points, the method further comprises employing at least one of a slope of a predetermined temperature characteristic line and a curvature of predetermined temperature characteristic curve; and adjusting a location of the at least one of the predetermined temperature characteristic line and the predetermined temperature characteristic curve based on the test data. When test data consists of two temperature test points, the method further comprises adjusting at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve; and adjusting a location of the at least one of the predetermined temperature characteristic line and the predetermined temperature characteristic curve based on the test data. When test data comprises three temperature test points, the method further comprises adjusting at least one of a slope of a predetermined temperature characteristic line and a curvature of a predetermined temperature characteristic curve; and adjusting a location of the at least one of the predetermined temperature characteristic line and the predetermined temperature characteristic curve based on the test data. The memory includes one time programmable memory.
FIG. 16 is a functional block of an integrated: circuit including one or more circuits, a crystal oscillator emulator and a clock divider that generates clock signals at one or more other clock frequencies.
FIG. 52, 53A and 53B are functional block diagrams of exemplary semiconductor oscillators according to the present disclosure;
Exemplary device-level testing may include testing each device to determine correction factors to be applied to the semiconductor oscillator to maintain a constant output frequency with changes in temperature. In one scheme, a baseline value for the semiconductor oscillator control input is determined for a predetermined frequency and at a predetermined temperature of the semiconductor die of the device such as the lowest operating temperature. The baseline value may be measured directly or interpolated from: measurement of another device characteristic. Baseline values may also be measured for each potential output frequency. Also, baseline values for each potential output frequency may be extrapolated from the baseline value for the predetermined frequency such as by using a known circuit relationship. The baseline values for each potential output frequency may be stored as absolute values or as a ratio, a frequency factor, to compute the baseline values from a single baseline value.
The crystal oscillator emulator 100 may determine a predetermined select value corresponding to the measured value of the impedance connected to a select pin. Preferably, the impedance is selected to have a standard value such as nominal resistance values corresponding to resistors having a 10% tolerance (e.g. 470, 560, 680, . . . ) to reduce device and inventory costs. To account for measurement tolerances and the tolerance of the external impedance; a range of impedance values may correspond to a single select value. The select value is preferably a digital value, but may also be an analog value. For example, values of measured resistance from 2400 ohms to 3000 ohms may be associated with a digital value corresponding to 2. While values of measured resistance from 3001 ohms to 4700 ohms are associated with a digital value corresponding to 3. The measured resistance includes variations due to tolerances of the external impedance and the internal measurement circuit. The impedance measured at each select pin is used to determine a corresponding digital value. The range of digital values may include 3 or more digital values and preferably range from 10 to 16 digital values per select pin. The digital values corresponding to each select pin may be used in combination to describe memory addresses. For example, a device having three select pins each to interface to impedance values that are mapped into one of 10 digital values, may describe 1000 memory addresses or lookup table values. The contents of the storage locations corresponding to the memory addresses are used to set a value for an output or internal characteristic of the device. Another exemplary device may include two select pins, each configured to interface to external impedances that are mapped to a digital value within a range of 10 values. The digital values in combination may describe 100 memory addresses or lookup table values that may each contain data for setting a characteristic of the crystal oscillator emulator 100.
FIG. 6 shows a block diagram of an aspect of a crystal oscillator emulator 120. The crystal oscillator emulator 120 includes a select pin 122 to interface to an external impedance 124 that is used for selecting a configuration of the crystal: oscillator emulator 120. The external impedance 124 is similar in function and scope to the external impedances 116 and 118.
A measurement circuit 126 connected to the select pin 122 measures an electrical characteristic that is a function of the external impedance 124. For example, a current may be supplied to the external impedance and the voltage that is developed across the external impedance 124 then measured. Also, a voltage may be impressed across the external impedance 124 and then measure the current. Any measurement technique for measuring passive components may be used to measure the electrical characteristic including dynamic as well as static techniques. Exemplary measurement techniques include timing circuits, analog to digital converters (ADCs), and digital to analog converters (DACs). Preferably, the measurement circuit has a high dynamic range. The measurement circuit 126 may generate an output having a value corresponding to the value of the external impedance 124. The output may be either digital or analog. The same output value preferably represents a range of external impedance values to compensate for value variations such as tolerances in the external impedance value, interconnect losses, and measurement circuit tolerances due to factors including process, temperature, and power. For example, all measured external impedance values ranging from greater than 22 up to 32 ohms may correlate to a digital output value of �0100�. While measured external impedance values ranging from greater than 32 up to 54 ohms may correlate to a digital output value of �0101�. The actual external impedance values are a subset of the measured external impedance value to account for the value variations. For example, in the above cases the actual external impedance values might be from 24 to 30 ohms and from 36 to 50 ohms. In each case an inexpensive low precision resistor may be selected to have a value centered within the range, such as 27 ohms and 43 ohms. In this way, inexpensive low precision components may be used to select amongst a range of high precision outputs. The select value may be used directly as a variable value to control a device characteristic of the crystal oscillator emulator 120. The variable value may also be determined indirectly from the select value.
The powertrain control system 1032 may communicate with mass data storage 1046 that stores data in a nonvolatile manner. The mass data storage 1046 may include optical: and/or magnetic storage devices for example hard disk drives HDD and/or DVDs. At least one HDD may have the configuration shown in FIG. 31A and/or at least one DVD may have the configuration shown in FIG. 31B. The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. The powertrain control system 1032 may be connected to memory 1047 such as RAM, ROM, low latency nonvolatile memory such as flash memory and/or other suitable electronic data storage. The powertrain control system 1032 also may support connections with a WLAN via a WLAN network interface 1048. The control system 1040 may also include mass data storage, memory and/or a WLAN interface (all not shown).
Referring now to FIG. 39, a crystal oscillator emulator integrated circuit (IC) 1550 is shown. The crystal oscillator emulator IC 1550 may be a stand alone integrated circuit in that it is not integrated with other circuit functions. In other words, the crystal oscillator emulator does not include other circuits that are unrelated to the operation of the crystal oscillator emulator. As used herein, the term �unrelated� means that the integrated circuit does not include circuits other than those circuits that power the crystal oscillator emulator, output circuits that condition an output of the crystal oscillator emulator, and/or other circuits that generally support the operation of the crystal oscillator emulator. By providing the crystal oscillator emulator as a stand alone circuit, the crystal oscillator emulator can provide a reference frequency for any other circuit without requiring integration. The crystal oscillator emulator IC 1550 generates a stable reference frequency, as described further above and below.
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No. 11/732,465, filed Apr. 4, 2007, Sutardja, Sehat.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8004322 *Jun 26, 2006Aug 23, 2011St-Ericsson SaSynchronization scheme with adaptive reference frequency correctionUS8201995 *Feb 2, 2009Jun 19, 2012Broadcom CorporationMethod and system for a temperature sensing crystal integrated circuit with digital temperature outputUS8400195Jun 17, 2011Mar 19, 2013St-Ericsson SaSynchronization scheme with adaptive reference frequency correctionUS20090196322 *Feb 2, 2009Aug 6, 2009Mccarthy EvanMethod and System for a Temperature Sensing Crystal Integrated Circuit with Digital Temperature Output* Cited by examinerClassifications U.S. Classification331/176, 331/116.0FE, 331/158, 331/116.00R, 331/57, 331/74International ClassificationH03L1/00Cooperative ClassificationH01L2224/48247, G11C7/04, H03L7/08, H01L2924/19041, H03L7/1976, G11C7/22, H01L2924/3011, H01L2924/166, H01L2924/16235, B82Y10/00, H03L5/00, H01L23/315, H03L7/1974, H01L2924/30107, G11C7/222, H03L7/197, G11C29/028, H03L7/0891, H03L7/0802, H01L23/34, H03L1/027, H03B5/04, G11C2207/2254, H01L2224/49175, H03L1/026, H03B5/30, H01L2924/01046, G11C2029/5002European ClassificationH03B5/04, H01L23/31H8, H03L7/197D, G11C7/22, H03B5/30, G11C7/04, B82Y10/00, G11C29/02H, G11C7/22A, H03L7/197, H03L7/197D1, H03L5/00, H03L1/02B3, H03L7/08, H03L7/08C, H03L1/02B2Legal EventsDateCodeEventDescriptionFeb 3, 2014FPAYFee paymentYear of fee payment: 4Sep 17, 2007ASAssignmentOwner name: MARVELL WORLD TRADE LTD., BARBADOSFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MARVELL INTERNATIONAL LTD.;REEL/FRAME:019831/0083Effective date: 20070720Jan 4, 2007ASAssignmentOwner name: MARVELL INTERNATIONAL LTD., BERMUDAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MARVELL SEMICONDUCTOR, INC.;REEL/FRAME:018775/0113Effective date: 20060110Owner name: MARVELL SEMICONDUCTOR, INC., CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SUTARDJA, SEHAT;REEL/FRAME:018763/0609Effective date: 20070103RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google