Source: http://www.google.com/patents/US6617644?dq=6,260,087
Timestamp: 2014-10-24 13:10:12
Document Index: 551733342

Matched Legal Cases: ['application No. 10', 'application No. 10', 'application No. 10', 'application No. 10', 'application No. 7', 'application No. 8', 'application No. 09', 'application No. 09']

Patent US6617644 - Semiconductor device and method of manufacturing the same - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsThe present invention relates to a semiconductor device including a circuit composed of thin film transistors having a novel GOLD (Gate-Overlapped LDD (Lightly Doped Drain)) structure. The thin film transistor comprises a first gate electrode and a second electrode being in contact with the first gate...http://www.google.com/patents/US6617644?utm_source=gb-gplus-sharePatent US6617644 - Semiconductor device and method of manufacturing the sameAdvanced Patent SearchPublication numberUS6617644 B1Publication typeGrantApplication numberUS 09/432,662Publication dateSep 9, 2003Filing dateNov 3, 1999Priority dateNov 9, 1998Fee statusPaidAlso published asEP1001467A2, EP1001467A3, US7259427, US7279711, US7923779, US8653595, US20040051142, US20060081931, US20080048189, US20110241012Publication number09432662, 432662, US 6617644 B1, US 6617644B1, US-B1-6617644, US6617644 B1, US6617644B1InventorsShunpei Yamazaki, Hiroki AdachiOriginal AssigneeSemiconductor Energy Laboratory Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (24), Non-Patent Citations (16), Referenced by (73), Classifications (32), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetSemiconductor device and method of manufacturing the sameUS 6617644 B1Abstract The present invention relates to a semiconductor device including a circuit composed of thin film transistors having a novel GOLD (Gate-Overlapped LDD (Lightly Doped Drain)) structure. The thin film transistor comprises a first gate electrode and a second electrode being in contact with the first gate electrode and a gate insulating film. Further, the LDD is formed by using the first gate electrode as a mask, and source and drain regions are formed by using the second gate electrode as the mask. Then, the LDD overlapping with the second gate electrode is formed. This structure provides the thin film transistor with high reliability.
SUMMARY OF THE INVENTION A first object of the present invention is to provide a technique to overcome those problems, and specifically to provide, through a simpler method than in the prior art, a technique of manufacturing a crystalline TFT with the structure in which a gate electrode overlaps with an LDD-region.
Embodiment 19 This Embodiment is to demonstrate modifications of the pixel with the circuit pattern of FIG. 36B. The modifications are as in FIG. 38A to FIG. 38C. In this Embodiment illustrated in those FIG. 38A to FIG. 38C, 3801 indicates the source-wire for the switching TFT 3802; 3803 indicates the gate wire for the switching TFT 3802; 3804 indicates a current-control TFT; 3805 indicates a capacitor; 3806 and 3808 indicate current supply lines; and 3807 indicates an EL device.
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system and driving method thereofUS8659520Jul 12, 2010Feb 25, 2014Semiconductor Energy Laboratory Co., Ltd.Driving method of display deviceUS8664644Apr 19, 2011Mar 4, 2014Ignis Innovation Inc.Pixel driver circuit and pixel circuit having the pixel driver circuitUS8735889Nov 1, 2011May 27, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8748898Dec 30, 2011Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8772766Apr 22, 2013Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Organic electroluminescent display device* Cited by examinerClassifications U.S. Classification257/347, 257/E29.151, 438/479, 257/344, 257/E21.413, 257/408, 257/349, 438/517, 257/E29.278, 257/E29.137, 257/350, 438/149, 257/351International ClassificationH01L21/336, H01L29/423, H01L21/84, H01L29/786, H01L21/77Cooperative ClassificationH01L29/42384, H01L29/6675, H01L29/78627, H01L27/1214, H01L29/78621, H01L29/66757, H01L29/4908European ClassificationH01L29/66M6T6F15A2, H01L29/786B4B4, H01L27/12T, H01L29/66M6T6F15A, H01L29/786B4B, H01L29/423D2B8, H01L29/49BLegal EventsDateCodeEventDescriptionFeb 10, 2011FPAYFee paymentYear of fee payment: 8Feb 9, 2007FPAYFee paymentYear of fee payment: 4Feb 1, 2000ASAssignmentOwner name: SEMICONDUCTOR ENERGY LABORATORY CO., LTD., JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YAMAZAKI, SHUNPEI;ADACHI, HIROKI;REEL/FRAME:010532/0265;SIGNING DATES FROM 20000121 TO 20000123RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google