Source: http://www.google.com/patents/US7392431?dq=5179747
Timestamp: 2017-06-24 14:03:36
Document Index: 634986122

Matched Legal Cases: ['§119', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60']

Patent US7392431 - Emulation system with peripherals recording emulation frame when stop generated - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsIn-circuit-emulation of an integrated circuit includes a digital data processor capable of executing program instructions. A first debug event is detected during normal program execution. The causes the in-circuit-emulation to suspend program execution except for real time interrupts. A debug frame counter...http://www.google.com/patents/US7392431?utm_source=gb-gplus-sharePatent US7392431 - Emulation system with peripherals recording emulation frame when stop generatedAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS7392431 B2Publication typeGrantApplication numberUS 11/064,242Publication dateJun 24, 2008Filing dateFeb 22, 2005Priority dateFeb 19, 1999Fee statusPaidAlso published asUS20050166092Publication number064242, 11064242, US 7392431 B2, US 7392431B2, US-B2-7392431, US7392431 B2, US7392431B2InventorsGary L. SwobodaOriginal AssigneeTexas Instruments IncorporatedExport CitationBiBTeX, EndNote, RefManPatent Citations (8), Referenced by (26), Classifications (10), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetEmulation system with peripherals recording emulation frame when stop generated
US 7392431 B2Abstract
In-circuit-emulation of an integrated circuit includes a digital data processor capable of executing program instructions. A first debug event is detected during normal program execution. The causes the in-circuit-emulation to suspend program execution except for real time interrupts. A debug frame counter increments on each interrupt and decrements on each return from interrupt. If a debug event is detected during an interrupt service routine, that interrupt service routine is suspended and the count of the debug frame counter is stored. Execution of other interrupt service routines in response to corresponding interrupts is still permitted. The integrated circuit includes plural debug event detectors and the debug frame count is stored at the detector detecting a debug event during an interrupt service routine. This permits a determination of the order of interrupts triggering debug events by reading the stored debug frame count from each debug event detector.
This application is a continuation-in-part of U.S. patent application Ser. No. 09/481,853 filed Jan. 14, 2000 now abandoned, which claims priority under 35 USC §119(e)(1) of Provisional Application No. 60/120,810, filed Feb. 19, 1999.
CITATION OF RELATED APPLICATIONS
This application is related to co-assigned applications:
Ser. No. 09/154,385 entitled “METHOD OF INITIALIZING A CPU CORE FOR EMULATION” filed Sep. 16, 1998, now U.S. Pat. No. 6,167,385 issued Dec. 26, 2000; and
Ser. No. 09/483,367, entitled “EMULATION SUSPEND MODE WITH DIFFERING RESPONSE TO DIFFERING CLASSES OF INTERRUPTS” claiming priority from U.S. Provisional Application No. 60/120,809 filed Feb. 19, 1999, now U.S. Pat. No. 6,553,513;
Ser. No. 09/481,852, entitled “EMULATION SUSPENSION MODE WITH STOP MODE EXTENSION” claiming priority from U.S. Provisional Application No. 60/120,809 filed Feb. 19, 1999, now U.S. Pat. No. 6,567,933;
Ser. No. 09/483,568, entitled “EMULATION SUSPEND MODE HANDLING MULTIPLE STOPS AND STARTS” claiming priority from U.S. Provisional Application No. 60/120,809 filed Feb. 19, 1999, now U.S. Pat. No. 6,564,339;
Ser. No. 09/483,697, entitled “EMULATION SUSPEND MODE WITH FRAME CONTROLLED RESOURCE ACCESS” claiming priority from U.S. Provisional Application No. 60/120,809 filed Feb. 19, 1999, now U.S. Pat. No. 6,557,116;
Ser. No. 09/482,902, entitled “EMULATION SUSPEND MODE WITH INSTRUCTION JAMMING” claiming priority from U.S. Provisional Application No. 60/120,809 filed Feb. 19, 1999, now U.S. Pat. No. 6,643,803;
Ser. No. 09/483,570, entitled “SOFTWARE EMULATION MONITOR EMPLOYED WITH HARDWARE SUSPEND MODE” claiming priority from U.S. Provisional Application No. 60/120,683 filed Feb. 19, 1999, now U.S. Pat. No. 6,820,051;
Ser. No. 09/483,237, entitled “EMULATION SYSTEM WITH SEARCH AND IDENTIFICATION OF OPTIONAL EMULATION PERIPHERALS” claiming priority from U.S. Provisional Application No. 60/120,960 filed Feb. 19, 1999, now U.S. Pat. No. 6,671,665;
Ser. No. 09/483,783, entitled “EMULATION SYSTEM WITH ADDRESS COMPARISON UNIT AND DATA COMPARISON UNIT OWNERSHIP ARBITRATION” claiming priority from U.S. Provisional Application No. 60/120,791 filed Feb. 19, 1999, now U.S. Pat. No. 6,606,590; and
Ser. No. 09/483,321 entitled “EMULATION SYSTEM EMPLOYING SERIAL TEST PORT AND ALTERNATIVE DATA TRANSFER PROTOCOL” claiming priority from U.S. Provisional Application No. 60/120,667 filed Feb. 19, 1999, now U.S. Pat. No. 6,836,757.
This invention is in-circuit-emulation of an integrated circuit including a digital data processor capable of executing program instructions. A first debug event is detected during normal program execution. The causes the in-circuit-emulation to suspend program execution except for real time interrupts. A debug frame counter increments on each interrupt and decrements on each return from interrupt. If a debug event is detected during an interrupt service routine, that interrupt service routine is suspended and the count of the debug frame counter is stored. Execution of other interrupt service routines in response to corresponding interrupts is still permitted. The integrated circuit includes plural debug event detectors and the debug frame count is stored at the detector detecting a debug event during an interrupt service routine. This permits a determination of the order of interrupts triggering debug events by reading the stored debug frame count from each debug event detector.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4031517 *Apr 24, 1974Jun 21, 1977Honeywell Information Systems, Inc.Emulation of target system interrupts through the use of countersUS5708814 *Nov 21, 1995Jan 13, 1998Microsoft CorporationMethod and apparatus for reducing the rate of interrupts by generating a single interrupt for a group of eventsUS5896538 *Nov 26, 1996Apr 20, 1999International Business Machines CorporationSystem and method for multi-phased performance profiling of single-processor and multi-processor systemsUS6002872 *Mar 31, 1998Dec 14, 1999International Machines CorporationMethod and apparatus for structured profiling of data processing systems and applicationsUS6249881 *Jul 1, 1997Jun 19, 2001National Semiconductor CorporationMethod for enabling and servicing critical interrupts while running an interrupt based debug monitorUS6308316 *Jan 8, 1998Oct 23, 2001Fujitsu LimitedApparatus for analyzing operations of parallel processing systemUS6311325 *Oct 22, 1998Oct 30, 2001International Business Machines CorporationMethod and apparatus for profiling processes in a data processing system background of the inventionUS6324684 *Mar 19, 1999Nov 27, 2001Texas Instruments IncorporatedProcessor having real-time execution control for debug functions without a debug monitor* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS7581139 *Aug 28, 2006Aug 25, 2009Texas Instruments IncorporatedDistinguishing between two classes of trace informationUS8103496 *Nov 1, 2001Jan 24, 2012Cypress Semicondutor CorporationBreakpoint control in an in-circuit emulation systemUS8248084Mar 14, 2011Aug 21, 2012Cypress Semiconductor CorporationTouch detection techniques for capacitive touch sense systemsUS8321174Sep 26, 2008Nov 27, 2012Cypress Semiconductor CorporationSystem and method to measure capacitance of capacitive sensor arrayUS8358142Feb 27, 2009Jan 22, 2013Cypress Semiconductor CorporationMethods and circuits for measuring mutual and self capacitanceUS8402315 *Aug 28, 2008Mar 19, 2013Airbus Operations SasElectronic card able to execute a command originating from a simulation system and a command originating from a diagnostic module and associated simulation methodUS8464203 *Oct 29, 2008Jun 11, 2013Denso CorporationSystem and program product for executing program to thereby test the programUS8525798Feb 29, 2008Sep 3, 2013Cypress Semiconductor CorporationTouch sensingUS8536902Nov 21, 2011Sep 17, 2013Cypress Semiconductor CorporationCapacitance to frequency converterUS8547114Nov 14, 2006Oct 1, 2013Cypress Semiconductor CorporationCapacitance to code converter with sigma-delta modulatorUS8570052Oct 31, 2012Oct 29, 2013Cypress Semiconductor CorporationMethods and circuits for measuring mutual and self capacitanceUS8570053Feb 23, 2009Oct 29, 2013Cypress Semiconductor CorporationCapacitive field sensor with sigma-delta modulatorUS8601445 *Jun 13, 2007Dec 3, 2013Microsoft CorporationDetaching profilersUS8692563Dec 19, 2012Apr 8, 2014Cypress Semiconductor CorporationMethods and circuits for measuring mutual and self capacitanceUS9104273Mar 2, 2009Aug 11, 2015Cypress Semiconductor CorporationMulti-touch sensing methodUS9154160Mar 16, 2011Oct 6, 2015Cypress Semiconductor CorporationCapacitance to code converter with sigma-delta modulatorUS9166621Jun 13, 2013Oct 20, 2015Cypress Semiconductor CorporationCapacitance to code converter with sigma-delta modulatorUS9423427Mar 10, 2014Aug 23, 2016Parade Technologies, Ltd.Methods and circuits for measuring mutual and self capacitanceUS9494627Aug 21, 2012Nov 15, 2016Monterey Research, LlcTouch detection techniques for capacitive touch sense systemsUS9494628Sep 25, 2013Nov 15, 2016Parade Technologies, Ltd.Methods and circuits for measuring mutual and self capacitanceUS9500686Jul 27, 2011Nov 22, 2016Cypress Semiconductor CorporationCapacitance measurement system and methodsUS20070011663 *Aug 28, 2006Jan 11, 2007Manisha AgarwalaDistinguishing Between Two Classes of Trace InformationUS20080313618 *Jun 13, 2007Dec 18, 2008Microsoft CorporationDetaching ProfilersUS20090031179 *Jul 28, 2007Jan 29, 2009Sam MichaelJtag test code and data compiler and methodUS20090125889 *Oct 29, 2008May 14, 2009Denso CorporationSystem and program product for executing program to thereby test the programUS20100257407 *Aug 28, 2008Oct 7, 2010Airbus OperationsElectronic card able to execute a command originating from a simulation system and a command originating from a diagnostic module and associated simulation method* Cited by examinerClassifications U.S. Classification714/28, 717/128, 714/E11.207, 714/33, 717/127, 714/38.13International ClassificationG06F11/00, G06F11/36Cooperative ClassificationG06F11/3656European ClassificationG06F11/36B7HLegal EventsDateCodeEventDescriptionSep 23, 2011FPAYFee paymentYear of fee payment: 4Nov 24, 2015FPAYFee paymentYear of fee payment: 8RotateOriginal ImageGoogle Home - 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