Source: http://www.google.ca/patents/US9565106
Timestamp: 2017-11-23 20:45:27
Document Index: 453162012

Matched Legal Cases: ['application No. 60', 'Application No. 10', 'Application No. 02816581', 'Application No. 02816581', 'Application No. 02816581', 'Application No. 10', 'Application No. 02816581', 'Application No. 02761480', 'Application No. 02761480', 'Application No. 02761480']

Patent US9565106 - General input/output architecture, protocol and related methods to implement ... - Google Patents
A storage device is provided to maintain a value of flow control credits allocated for a device on a channel and flow control logic is provided to receive a flow control signal over a link of an interconnect, the flow control signal indicating flow control credits allocated for the device on the channel....http://www.google.ca/patents/US9565106?utm_source=gb-gplus-sharePatent US9565106 - General input/output architecture, protocol and related methods to implement flow control
Publication number US9565106 B2
Application number US 14/145,384
Also published as CN1547704A, CN1547705A, CN1547823A, CN100357922C, CN100367254C, CN100409606C, DE60213616D1, DE60213616T2, DE60222782D1, DE60226627D1, EP1419446A1, EP1419446B1, EP1421501A1, EP1421501B1, EP1442548A2, EP1442548B1, US7152128, US7231486, US7353313, US7536473, US8566473, US8819306, US9049125, US9071528, US9088495, US9602408, US9736071, US20030115380, US20030145134, US20030158992, US20070038793, US20090193164, US20130117474, US20130254451, US20130254452, US20130268712, US20140129747, US20140185436, US20140189174, US20150178241, WO2003019391A2, WO2003019391A3, WO2003019393A1, WO2003019394A1
Publication number 14145384, 145384, US 9565106 B2, US 9565106B2, US-B2-9565106, US9565106 B2, US9565106B2
Inventors Jasmin Ajanovic, David Harriman, Blaise Fanning, David M. Lee
Patent Citations (187), Non-Patent Citations (65), Classifications (24)
US 9565106 B2
A storage device is provided to maintain a value of flow control credits allocated for a device on a channel and flow control logic is provided to receive a flow control signal over a link of an interconnect, the flow control signal indicating flow control credits allocated for the device on the channel. The flow control logic is further to update the value of flow control credits based on activity of the device on the channel.
a storage device to:
maintain a value of flow control credits allocated for a device on a particular one of a plurality of virtual channels, wherein each of the plurality of virtual channels has a corresponding virtual channel type and the virtual channel types comprise a request-type virtual channel and a response-type virtual channel; and
flow control logic to:
receive a flow control signal over a link of an interconnect, wherein the flow control signal indicates flow control credits allocated for the device on the particular virtual channels, wherein respective flow control credits are to be allocated for each of the plurality of virtual channels, and the interconnect comprises a cache coherent interconnect; and
update the value of flow control credits based on activity of the device on the particular virtual channel.
2. The apparatus of claim 1, wherein the interconnect comprises a coherent interconnect.
3. The apparatus of claim 1, wherein the flow control signal is received in association with a reset of the link.
4. The apparatus of claim 3, wherein the reset of the link comprises an initialization of the particular virtual channel.
5. The apparatus of claim 4, wherein the logic is to maintain a value of flow control credits consumed since initialization of the particular virtual channel.
6. The apparatus of claim 5, wherein the activity is to comprise sending data on the particular virtual channel to another device.
7. The apparatus of claim 6, wherein the logic is further to determine whether to send data on the particular virtual channel based at least in part on the value of consumed flow control credits.
8. The apparatus of claim 1, wherein the activity is to comprise sending data on the particular virtual channel to another device.
9. The apparatus of claim 8, wherein the data is to be delayed when insufficient flow control credits exist for the particular virtual channel.
10. The apparatus of claim 9, wherein the sending of the data is to be blocked when insufficient flow control credits exist for the particular virtual channel and the logic is to retry the sending of the data following the data being blocked.
11. The apparatus of claim 1, wherein the plurality of virtual channels includes at least four virtual channels.
a storage medium to maintain a value to indicate a count of allocated flow control credits that remain for a device on a particular one of a plurality of virtual channels, wherein the value is to be updated based on activity of the device on the particular virtual channel, the activity includes data sent on the particular virtual channel by the device, each of the plurality of virtual channels has a corresponding virtual channel type, and the virtual channel types comprise a request-type virtual channel and a response-type virtual channel; and
receive a flow control signal over a link of a cache coherent interconnect, wherein the flow control signal is to indicate the flow control credits allocated for the device on the particular virtual channel, the flow control credits are to be allocated following a reset of the link, and respective flow control credits are to be allocated for each of the plurality of virtual channels, and
cause data sent on the virtual channel to be retried based on an indication that insufficient flow control credits are allocated for the device on the virtual channel.
receiving a flow control signal over a link of a cache coherent interconnect, wherein the flow control signal indicates flow control credits allocated for a device on a particular one of a plurality of virtual channels, wherein each of the plurality of virtual channels has a corresponding virtual channel type and the virtual channel types comprise a request-type virtual channel and a response-type virtual channel;
maintaining a value of flow control credits allocated for the device on the particular virtual channel, wherein respective flow control credits are to be allocated for each of the plurality of virtual channels;
identifying data transmitted on the particular virtual channel by the device; and
updating the value of flow control credits based on the data transmitted on the particular virtual channel.
14. The method of claim 13, further comprising attempting to send particular data on the particular virtual channel.
15. The method of claim 14, further comprising identifying that the attempt to send the particular data is blocked based on insufficient flow control credits on the particular virtual channel.
16. The method of claim 15, further comprising retrying the sending of the particular data.
a second device communicatively coupled to the first device using the interconnect, the second device comprising logic to:
receive a flow control signal over a link of a cache coherent interconnect, wherein the flow control signal indicates flow control credits allocated for a device on a particular one of a plurality of virtual channels, wherein each of the plurality of virtual channels has a corresponding virtual channel type and the virtual channel types comprise a request-type virtual channel and a response-type virtual channel;
maintain a value of flow control credits allocated for the device on the particular virtual channel, wherein respective flow control credits are to be allocated for each of the plurality of virtual channels; and
18. The system of claim 17, wherein the interconnect comprises a coherent interconnect fabric.
19. The system of claim 17, wherein the device comprises an endpoint.
20. The system of claim 17, wherein the second device comprises a switch.
21. The system of claim 17, wherein the second device comprises a root complex.
This application is a continuation of U.S. application Ser. No. 13/730,024, filed Dec. 28, 2012, which is a continuation of U.S. application Ser. No. 12/395,497, filed Feb. 27, 2009, which is a continuation of U.S. application Ser. No. 10/227,601 filed Aug. 23, 2002, now U.S. Pat. No. 7,536,473, issued on May 19, 2009, which claims the benefit of provisional application No. 60/314,708 filed on Aug. 24, 2001.
BWmax Y/t. [3]
Assigning isochronous bandwidth BWlink to a communication link 112 is akin to assigning Mlink virtual timeslots per isochronous period (T), were Mlink is given by:
To maintain regulated access to the link, a port of the switch serving as an egress port for isochronous traffic establishes a data structure (e.g., the port arbitration table, introduced above) populated with up to Nmax entries, where Nmax is the maximum number of isochronous sessions permissible given the link bandwidth, granularity and latency requirements. An entry in the table represents one virtual timeslot in the isochronous time period (T). When a table entry is given a value of a port number (PN) it means that the timeslot is assigned to an ingress port designated by the port number. Therefore, Mlink virtual timeslots are assigned to the ingress port when there are Mlink entries in the port arbitration table given the value of PN. The egress port may admit one isochronous request transaction from the ingress port for further service only when the table entry reached by the Egress Port's isochronous time counter (that increments by one (1) every t time and wraps around when reaching T) is set to PN. Even if there are outstanding isochronous requests ready in the ingress port, they will not be served until a next round of arbitration (e.g., time-based, weighted round-robin (WRR) arbitration). In this manner, the time-based port arbitration data structure serves for both isochronous bandwidth assignment and traffic regulation.
The length field provides an indication of the length of the payload, again in DW increments of: □0000 0000=1 DW
□0000 0001=2 DW
□ . . .
□1111 1111=256 DW
Memory Write Request: 1 PH+nPD units (where n is associated with the size of the data payload, e.g., the length of the data divided by the flow control unit size (e.g., 16 Bytes)
IO/Configuration Write Request: 1 NPH+1 NPD
Message Requests: Depending on the message at least 1 PH and/or 1 NPH unit(s)
Switch devices—CPLH: 1 FCU;
C_A=(Credit unit number of the most recently received transmission)+(receive buffer space available) [7]
Link retraining is required, OR if Physical Layer reports that a retrain is
The Link Control State Machine moves from LinkActive to
LinkActDefer
□Indicate the occurrence of a maj
According to one example implementation, the EGIO architecture employs an 8b/10b transmission code. Using this scheme, eight-bit characters are treated as three-bits and five-bits mapped onto a four-bit code group and a six-bit code group, respectively. These code groups are concatenated to form a ten-bit Symbol. The 8b/10b encoding scheme used by EGIO architecture provides. Special Symbols which are distinct from the Data Symbols used to represent Characters. These Special Symbols are used for various Link Management mechanisms below. Special Symbols are also used to frame DLLPs and TLPs, using distinct Special Symbols to allow these two types of Packets to be quickly and easily distinguished.
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International Classification G06F15/173, H04L1/18, G06F3/00, G06F13/42, G06F13/14, G06F5/06, G06F13/38, G06F13/40, G06F13/00, G06F13/12, H04L12/801, G06F13/24
Cooperative Classification H04L47/30, G06F13/4059, G06F13/385, G06F13/4252, G06F13/4269, G06F13/4221, G06F13/124, G06F5/06, G06F13/4265, G06F13/4282, G06F13/42, H04L47/10