Source: http://www.google.com/patents/US8138498?dq=7,129,317
Timestamp: 2014-07-30 10:08:38
Document Index: 366945458

Matched Legal Cases: ['Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 2008']

Patent US8138498 - Apparatus and methods for determining overlay of structures having ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsDisclosed are overlay targets having flexible symmetry characteristics and metrology techniques for measuring the overlay error between two or more successive layers of such targets. Techniques for imaging targets with flexible symmetry characteristics and analyzing the acquired images to determine overlay...http://www.google.com/patents/US8138498?utm_source=gb-gplus-sharePatent US8138498 - Apparatus and methods for determining overlay of structures having rotational or mirror symmetryAdvanced Patent SearchPublication numberUS8138498 B2Publication typeGrantApplication numberUS 12/410,317Publication dateMar 20, 2012Filing dateMar 24, 2009Priority dateAug 30, 2000Also published asUS7541201, US20070008533, US20090051917, US20090224413, US20120153281, WO2007008473A2, WO2007008473A3Publication number12410317, 410317, US 8138498 B2, US 8138498B2, US-B2-8138498, US8138498 B2, US8138498B2InventorsMark GhinovkerOriginal AssigneeKla-Tencor Technologies CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (100), Non-Patent Citations (37), Referenced by (5), Classifications (8), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetApparatus and methods for determining overlay of structures having rotational or mirror symmetryUS 8138498 B2Abstract Disclosed are overlay targets having flexible symmetry characteristics and metrology techniques for measuring the overlay error between two or more successive layers of such targets. Techniques for imaging targets with flexible symmetry characteristics and analyzing the acquired images to determine overlay or alignment error are disclosed.
What is claimed is: 1. A semiconductor target for determining a relative shift between two or more successive layers of a substrate, the target comprising:
CROSS REFERENCE TO RELATED PATENT APPLICATION This application claims priority and is a Divisional application of copending application Ser. No. 11/227,764, entitled �APPARATUS AND METHODS FOR DETERMINING OVERLAY OF STRUCTURES HAVING ROTATIONAL OR MIRROR SYMMETRY�, filed 14 Sep. 2005 by Mark Ghinovker, which application claims priority of (a) and is a Continuation-in-part application of application Ser. No. 09/894,987, filed on Jun. 27, 2001, now U.S. Pat. No. 7,068,833, issued on 27 Jun. 2006, which claims priority of Application No. 60/229,256, filed 30 Aug. 2000 and (b) U.S. Provisional Patent Application No. 60/698,535, entitled �APPARATUS AND METHODS FOR DETERMINING OVERLAY STRUCTURES HAVING ROTATIONAL OR MIRROR SYMMETRY�, filed 11 Jul. 2005 by Mark Ghinovker, and (c) is a Continuation-in-part application of application Ser. No. 10/729,838, filed on Dec. 5, 2003, now U.S. Pat. No. 7,317,531, issued on 8 Jan. 2008, which application claims priority of (i) Application No. 60/440,970, filed 17 Jan. 2003, (ii) Application No. 60/449,496, filed 22 Feb. 2003, (iii) Application No. 60/431,314, filed 5 Dec. 2002, (iv) Application No. 60/504,093, filed 19 Sep. 2003, and (v) Application No. 60/498,524, filed 27 Aug. 2003. These applications and patents are incorporated herein by reference in their entirety for all purposes.
A combination target and dummy structure can be achieved in a number of different ways. In one example of a combination dummy and overlay structure, the structures can be designed on two masks such that they form interlaced periodic structures. Any suitable types of overlay structures may be altered to have flexible COS's or LOS's as described herein. Suitably modifiable overlay targets and techniques for determining overlay with same are described in the following U.S. patents and applications: (1) U.S. Pat. No. 6,462,818, issued 8 Oct. 2002, entitled �OVERLAY ALIGNMENT MARK DESIGN�, by Bareket, (2) U.S. Pat. No. 6,023,338, issued 8 Feb. 2000, entitled �OVERLAY ALIGNMENT MEASUREMENT OF WAFER�, by Bareket, (3) application Ser. No. 09/894,987, filed 27 Jun. 2001, entitled �OVERLAY MARKS, METHODS OF OVERLAY MARK DESIGN AND METHODS OF OVERLAY MEASUREMENTS�, by Ghinovker et al., (4) U.S. Pat. No. 6,486,954, issued 26 Nov. 2002, entitled �OVERLAY ALIGNMENT MEASUREMENT MARK� by Levy et al., (5) application Ser. No. 10/367,124, filed 13 Feb. 2004, entitled OVERLAY METROLOGY AND CONTROL METHOD, by Mike Adel et al, (6) application Ser. No. 10/785,396 filed 23 Feb. 2004, entitled APPARATUS AND METHODS FOR DETECTING OVERLAY ERRORS USING SCATTEROMETRY, by Walter D. Mieher, et al., (7) application Ser. No. 10/729,838 filed 5 Dec. 2003, entitled APPARATUS AND METHODS FOR DETECTING OVERLAY ERRORS USING SCATTEROMETRY, by Walter D. Mieher, et al., and (8) application Ser. No. 10/858,836 filed 1 Jun. 2004, entitled APPARATUS AND METHODS FOR PROVIDING IN-CHIP MICROTARGETS FOR METROLOGY OR INSPECTION, by Avi Cohen et al. These patents and applications are all incorporated herein by reference in their entirety.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4251160Jul 13, 1978Feb 17, 1981U.S. Philips CorporationMethod and arrangement for aligning a mask pattern relative to a semiconductor substrateUS4475811Apr 28, 1983Oct 9, 1984The Perkin-Elmer CorporationOverlay test measurement systemsUS4538105Apr 28, 1983Aug 27, 1985The Perkin-Elmer CorporationOverlay test waferUS4703434Apr 24, 1984Oct 27, 1987The Perkin-Elmer CorporationApparatus for measuring overlay errorUS4714874Nov 12, 1985Dec 22, 1987Miles Inc.Test strip identification and instrument calibrationUS4757207Mar 3, 1987Jul 12, 1988International Business Machines CorporationMeasurement of registration of overlaid test patterns by the use of reflected lightUS4757707Mar 17, 1987Jul 19, 1988British Steel CorporationMolten metal gas analysisUS4778275Sep 24, 1986Oct 18, 1988U.S. Philips Corp.Method of aligning a mask and a substrate relative to each other and arrangement for carrying out the methodUS4782288Dec 24, 1986Nov 1, 1988Sgs Microelettronica S.P.A.Method for evaluating processing parameters in the manufacture of semiconductor devicesUS4820055Aug 25, 1986Apr 11, 1989Siemens AktiengesellschaftApparatus for adjusting a mask with at least one adjustment mark relative to a semi-conductor wafer provided with at least one lattice structureUS4855253Jan 29, 1988Aug 8, 1989Hewlett-PackardTest method for random defects in electronic microstructuresUS4929083Mar 20, 1989May 29, 1990Xerox CorporationFocus and overlay characterization and optimization for photolithographic exposureUS5017514Nov 27, 1989May 21, 1991Nec CorporationMethod of manufacturing a semiconductor device using a main vernier pattern formed at a right angle to a subsidiary vernier patternUS5100237May 25, 1990Mar 31, 1992Asm LithographyApparatus for projecting a mask pattern on a substrateUS5112129Mar 2, 1990May 12, 1992Kla Instruments CorporationMethod of image enhancement for the coherence probe microscope with applications to integrated circuit metrologyUS5148214Sep 17, 1991Sep 15, 1992Canon Kabushiki KaishaMark detecting deviceUS5156982Jan 3, 1992Oct 20, 1992Shin-Etsu Handotai Co., Ltd.Pattern shift measuring methodUS5172190Jan 11, 1991Dec 15, 1992Karl Suss Kg Prazisionsgerate Fur Wissenschaft Und Industrie - Gmbh & Co.Alignment patterns for two objects to be aligned relative to each otherUS5216257Jul 9, 1990Jun 1, 1993Brueck Steven R JMethod and apparatus for alignment and overlay of submicron lithographic featuresUS5262258Jun 12, 1991Nov 16, 1993Nec CorporationProcess of manufacturing semiconductor devicesUS5296917Jan 21, 1992Mar 22, 1994Mitsubishi Denki Kabushiki KaishaMethod of monitoring accuracy with which patterns are writtenUS5383136Mar 13, 1992Jan 17, 1995The United States Of America As Represented By The Secretary Of CommerceElectrical test structure and method for measuring the relative locations of conducting features on an insulating substrateUS5414514Jun 1, 1993May 9, 1995Massachusetts Institute Of TechnologyOn-axis interferometric alignment of plates using the spatial phase of interference patternsUS5436097Mar 12, 1993Jul 25, 1995Kabushiki Kaisha ToshibaMask for evaluation of aligner and method of evaluating aligner using the sameUS5438413Mar 3, 1993Aug 1, 1995Kla Instruments CorporationProcess for measuring overlay misregistration during semiconductor wafer fabricationUS5477057Aug 17, 1994Dec 19, 1995Svg Lithography Systems, Inc.Off axis alignment system for scanning photolithographyUS5479270May 19, 1992Dec 26, 1995Eastman Kodak CompanyMethod and apparatus for aligning depth imagesUS5481362May 6, 1993Jan 2, 1996Asm LithographyApparatus for projecting a mask pattern on a substrateUS5498501Apr 4, 1995Mar 12, 1996Canon Kabushiki KaishaManufacturing semiconductorsUS5596413Aug 17, 1995Jan 21, 1997Lucent Technologies Inc.Sub-micron through-the-lens positioning utilizing out of phase segmented gratingsUS5617340Feb 3, 1995Apr 1, 1997The United States Of America As Represented By The Secretary Of CommerceMethod and reference standards for measuring overlay in multilayer structures, and for calibrating imaging equipment as used in semiconductor manufacturingUS5627083May 12, 1995May 6, 1997Nec CorporationMethod of fabricating semiconductor device including step of forming superposition error measuring patternsUS5665495Mar 7, 1995Sep 9, 1997Hyundai Electronics Industries Co., Ltd.Method for fabricating a semiconductor with a photomaskUS5674650Aug 1, 1995Oct 7, 1997U.S. Philips CorporationMethod of repetitively imaging a mask pattern on a substrate, and apparatus for performing the methodUS5699282Jul 8, 1996Dec 16, 1997The United States Of America As Represented By The Secretary Of CommerceMethods and test structures for measuring overlay in multilayer devicesUS5701013Jun 7, 1996Dec 23, 1997Mosel Viltelic, Inc.Wafer metrology pattern integrating both overlay and critical dimension features for SEM or AFM measurementsUS5702567Jun 1, 1995Dec 30, 1997Kabushiki Kaisha ToshibaPlurality of photolithographic alignment marks with shape, size and spacing based on circuit pattern featuresUS5703685Jul 20, 1995Dec 30, 1997Kabushiki Kaisha ToshibaFor controlling an exposure position of a waferUS5712707Nov 20, 1995Jan 27, 1998International Business Machines CorporationEdge overlay measurement target for sub-0.5 micron ground rulesUS5757507Nov 20, 1995May 26, 1998International Business Machines CorporationMethod of measuring bias and edge overlay error for sub-0.5 micron ground rulesUS5766809Sep 24, 1996Jun 16, 1998Hyundai Electromics Industries Co., Ltd.Method for testing overlay in a semiconductor device utilizing inclined measuring markUS5783342Dec 27, 1995Jul 21, 1998Matsushita Electric Industrial Co., Ltd.Method and system for measurement of resist patternUS5805290May 2, 1996Sep 8, 1998International Business Machines CorporationMethod of optical metrology of unresolved pattern arraysUS5835196Jan 5, 1995Nov 10, 1998Texas Instruments IncorporatedSystem and method for alignment of integrated circuits multiple layersUS5857258May 12, 1994Jan 12, 1999The United States Of America As Represented By The Secretary Of CommerceElectrical test structure and method for measuring the relative locations of conductive features on an insulating substrateUS5872042Aug 22, 1996Feb 16, 1999Taiwan Semiconductor Manufacturing Company, Ltd.Method for alignment mark regenerationUS5877036Feb 26, 1997Mar 2, 1999Nec CorporationOverlay measuring method using correlation functionUS5877861Nov 14, 1997Mar 2, 1999International Business Machines CorporationMethod for overlay control systemUS5882980Jul 21, 1997Mar 16, 1999Hyundai Electronics Industries Co., Ltd.Process of forming bipolar alignment mark for semiconductorUS5902703Mar 27, 1997May 11, 1999Vlsi Technology, Inc.Forming a calibration patterns of box configuration, using the narrow lines between boxes to maintain the production accuracyUS5912983Jul 25, 1997Jun 15, 1999Oki Electric Industry Co., LtdOverlay accuracy measuring methodUS5923041Apr 25, 1995Jul 13, 1999Us CommerceOverlay target and measurement procedure to enable self-correction for wafer-induced tool-induced shift by imaging sensor meansUS5939226Jan 8, 1997Aug 17, 1999Mitsubishi Denki Kabushiki KaishaMultilayer element with patternsUS5949145Feb 27, 1997Sep 7, 1999Nec CorporationSemiconductor device including alignment marksUS5968693Feb 9, 1999Oct 19, 1999Lucent Technologies Inc.Lithography tool adjustment utilizing latent imageryUS6020966Sep 23, 1998Feb 1, 2000International Business Machines CorporationEnhanced optical detection of minimum features using depolarizationUS6023338Jul 12, 1996Feb 8, 2000Bareket; NoahOverlay alignment measurement of wafersUS6037671Nov 3, 1998Mar 14, 2000Advanced Micro Devices, Inc.Stepper alignment mark structure for maintaining alignment integrityUS6077756Apr 24, 1998Jun 20, 2000Vanguard International SemiconductorOverlay target pattern and algorithm for layer-to-layer overlay metrology for semiconductor processingUS6079256Dec 7, 1998Jun 27, 2000Kla Instruments CorporationOverlay alignment measurement of wafersUS6084679Apr 2, 1999Jul 4, 2000Advanced Micro Devices, Inc.Universal alignment marks for semiconductor defect capture and analysisUS6118185Mar 4, 1999Sep 12, 2000Taiwan Semiconductor Manufacturing CompanySegmented box-in-box for improving back end overlay measurementUS6128089Jul 28, 1998Oct 3, 2000International Business Machines CorporationCombined segmented and nonsegmented bar-in-bar targetsUS6130750Aug 28, 1997Oct 10, 2000International Business Machines CorporationOptical metrology tool and method of using sameUS6137578Jul 28, 1998Oct 24, 2000International Business Machines CorporationSegmented bar-in-bar targetUS6140217Jul 16, 1998Oct 31, 2000International Business Machines CorporationTechnique for extending the limits of photolithographyUS6146910Feb 2, 1999Nov 14, 2000The United States Of America, As Represented By The Secretary Of CommerceTarget configuration and method for extraction of overlay vectors from targets having concealed featuresUS6160622Jun 18, 1998Dec 12, 2000Asm Lithography, B.V.Alignment device and lithographic apparatus comprising such a deviceUS6165656Apr 20, 1999Dec 26, 2000Mitsubishi Denki Kabushiki KaishaOverlay error determination mark considering influence of aberrationUS6177330Mar 26, 1998Jan 23, 2001Mitsubishi Denki Kabushiki KaishaMethod for correcting alignment, method for manufacturing a semiconductor device and a semiconductor deviceUS6278957Feb 1, 1999Aug 21, 2001Nikon CorporationAlignment method and apparatus thereforUS6384899Feb 2, 2000May 7, 2002Asm Lithography B.V.Lithographic projection apparatusUS6462818Jun 22, 2000Oct 8, 2002Kla-Tencor CorporationOverlay alignment mark designUS6580505 *Aug 1, 2002Jun 17, 2003Kla-Tencor CorporationOverlay alignment mark designUS6617080May 2, 2000Sep 9, 2003Mitsubishi Denki Kabushiki KaishaPhotomask, semiconductor device, and method for exposing through photomaskUS6638671Oct 15, 2001Oct 28, 2003International Business Machines CorporationDetermiantion adjustment defects in integrated circuits; lithography calibrationUS6921916Jun 26, 2002Jul 26, 2005Kla -Tenocor Technologies CorporationOverlay marks, methods of overlay mark design and methods of overlay measurementsUS6937337Nov 19, 2003Aug 30, 2005International Business Machines CorporationOverlay target and measurement method using reference and sub-gridsUS6985618Jun 26, 2002Jan 10, 2006Kla-Tencor Technologies CorporationOverlay marks, methods of overlay mark design and methods of overlay measurementsUS6992764Sep 30, 2002Jan 31, 2006Nanometrics Incorporatedcomprises measuring two periodic patterns (diffraction gratings) with an incident beam and detecting the intensity of the resulting polarized lightUS7068833Jun 27, 2001Jun 27, 2006Kla-Tencor CorporationOverlay marks, methods of overlay mark design and methods of overlay measurementsUS7177457Jun 26, 2002Feb 13, 2007Kla-Tencor CorporationOverlay marks, methods of overlay mark design and methods of overlay measurementsUS7181057Jun 26, 2002Feb 20, 2007Kla-Tencor Technologies CorporationOverlay marks, methods of overlay mark design and methods of overlay measurementsUS7274814May 12, 2006Sep 25, 2007Kla-Tencor CorporationOverlay marks, methods of overlay mark design and methods of overlay measurementsUS7289213Feb 23, 2004Oct 30, 2007Kla-Tencor Technologies CorporationApparatus and methods for detecting overlay errors using scatterometryUS7301634Feb 23, 2004Nov 27, 2007Kla-Tencor Technologies CorporationApparatus and methods for detecting overlay errors using scatterometryUS7317531Dec 5, 2003Jan 8, 2008Kla-Tencor Technologies CorporationApparatus and methods for detecting overlay errors using scatterometryUS7317824Mar 30, 2006Jan 8, 2008Kla-Tencor Technologies CorporationOverlay marks, methods of overlay mark design and methods of overlay measurementsUS7355291Jul 11, 2005Apr 8, 2008Kla-Tencor Technologies CorporationOverlay marks, methods of overlay mark design and methods of overlay measurementsUS7473502Aug 3, 2007Jan 6, 2009International Business Machines CorporationImaging tool calibration artifact and methodUS7474401Sep 13, 2005Jan 6, 2009International Business Machines CorporationMulti-layer alignment and overlay target and measurement methodUS7541201Sep 14, 2005Jun 2, 2009Kla-Tencor Technologies CorporationApparatus and methods for determining overlay of structures having rotational or mirror symmetryUS7700247Dec 19, 2003Apr 20, 2010International Business Machines CorporationDifferential critical dimension and overlay metrology apparatus and measurement methodUS20020080364Aug 28, 2001Jun 27, 2002Koninklijke Philips Electronics N.V.Method of measuring overlayUS20040233442Feb 23, 2004Nov 25, 2004Kla-Tencor Technologies CorporationApparatus and methods for detecting overlay errors using scatterometryUS20060197950Feb 22, 2006Sep 7, 2006Smith Nigel PMethods and systems for determining overlay error based on target image symmetryUS20090224413Mar 24, 2009Sep 10, 2009Kla-Tencor Technologies CorporationApparatus and methods for determining overlay of structures having rotational or mirror symmetryEP0818814A2Jul 9, 1997Jan 14, 1998Kla Instruments Corp.Overlay alignment measurement of semiconductor wafersEP0947828A2Mar 31, 1999Oct 6, 1999International Business Machines CorporationMethod and apparatus for improved inspection measurementsJPH1187213A Title not available* Cited by examinerNon-Patent CitationsReference1Bishop, et al, "The OMAG3 Reticle Set," Jul. 31, 2003, International SEMATECH, Technology Transfer #3074417A-ENG, pp. 1-26.2Final Office Action dated Dec. 14, 2009 issued in U.S. Appl. No. 11/830,782.3Final Office Action dated Oct. 6, 2010 for U.S. Appl. No. 11/830,782.4Final Office Action dated Oct. 7, 2010 for U.S. Appl. No. 12/533,295.5Final Office Action of U.S. Appl. No. 10/185,737 mailed Dec. 3, 2003. (6,921,916).6Final Office Action of U.S. Appl. No. 10/186,324 mailed Sep. 6, 2005. (7,181,057).7Hsu et al., "Characterizing lens distortion to overlay accuracy by using fine measurement pattern", Mar. 1999, SPIE vol. 3677.8International Search Report dated Jan. 24, 2002 issued in PCT/US01/41932.9International Search Report dated Jan. 5, 2007 issued in PCT/US06/25836.10Levinson, "Lithography Process Control", Tutorial Texts in Optical Engineering, Mar. 1999, vol. TT28, Chapter 5, pp. 94-107.11Notice of Allowance dated Aug. 16, 2007 for U.S. Appl. No. 11/394,938 7,317,824.12Notice of Allowance dated Dec. 15, 2008 issued in 11/227,764.13Notice of Allowance dated May 18, 2007 for U.S. Appl. No. 11/432,947 7,274,814.14Notice of Allowance Mailed Nov. 19, 2007 from U.S. Appl. No. 11/179,819 7,355,291.15Notice of Allowance of U.S. Appl. No. 09/894,987 mailed Feb. 1, 2006. (7,068,833).16Notice of Allowance of U.S. Appl. No. 10/184,013 mailed Aug. 31, 2005. (6,985,618).17Notice of Allowance of U.S. Appl. No. 10/184,026 mailed Jan. 4, 2006. (7,177,457).18Notice of Allowance of U.S. Appl. No. 10/185,737 mailed Mar. 29, 2005. (6,921,916).19Notice of Allowance of U.S. Appl. No. 10/186,324 dated Nov. 21, 2005. (7,181,057).20Notice of Reason for Refusal, Japanese Patent Application No. 2008-521428, dated May 31, 2011.21Office Action dated Apr. 2, 2010 for U.S. Appl. No. 11/830,782.22Office Action dated Jun. 25, 2010 for U.S. Appl. No. 12/533,295.23Office Action dated Mar. 27, 2009 for U.S. Appl. No. 11/830,782.24Office Action Mailed Aug. 21, 2007 from U.S. Appl. No. 11/179,819 7,355,291.25Office Action Mailed May 5, 2006 from U.S. Appl. No. 11/179,819 7,355,291.26Office Action of U.S. Appl. No. 09/894,987 mailed Jul. 2, 2004. (7,068,833).27Office Action of U.S. Appl. No. 09/894,987 mailed Jun. 22, 2005. (7,068,833).28Office Action of U.S. Appl. No. 10/184,013 mailed Aug. 25, 2004. (6,985,618).29Office Action of U.S. Appl. No. 10/184,026 mailed Aug. 25, 2004. (7,177,457).30Office Action of U.S. Appl. No. 10/185,737 mailed Jun. 30, 2004. (6,921,916).31Office Action of U.S. Appl. No. 10/185,737 mailed Jun. 5, 2003. (6,921,916).32Office Action of U.S. Appl. No. 10/186,324 mailed Aug. 25, 2004. (7,181,057).33Rivera et al., "Overlay Performance on Tungsten CMP Layers Using the ATHENA Alignment System", 2000, Proceeding of SPIE vol. 3998.34US 5,841,144, 11/1998, Cresswell (withdrawn)35US Office Action dated Apr. 9, 2008 issued in U.S. Appl. No. 11/227,764.36Written Opinion of the International Searching Authority dated Jan. 5, 2007 issued in PCT/US04/05419.37Written Opinion of the International Searching Authority dated Mar. 11, 2002 issued in PCT/US01/41932.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8369605 *Nov 20, 2007Feb 5, 2013Carl Zeiss Sms GmbhMethod and apparatus for determining the position of a structure on a carrier relative to a reference point of the carrierUS8666532 *Jul 22, 2008Mar 4, 2014Camtek Ltd.Method and system for controlling a manufacturing processUS20100104128 *Nov 20, 2007Apr 29, 2010Michael ArnzMethod and apparatus for determining the position of a structure on a carrier relative to a reference point of the carrierUS20100252102 *Mar 31, 2010Oct 7, 2010Armand BettinelliMethod for printing a conductor in two superimposed layers by screen-printingUS20110029121 *Jul 22, 2008Feb 3, 2011Camtek Ltd.Method and system for controlling a manufacturing process* Cited by examinerClassifications U.S. Classification257/48, 257/797, 257/E23.179International ClassificationH01L23/58, H01L29/10Cooperative ClassificationG03F7/70633, Y10S438/975European ClassificationG03F7/70L10DLegal EventsDateCodeEventDescriptionJul 2, 2013RFReissue application filedEffective date: 20130501Apr 26, 2013ASAssignmentFree format text: MERGER;ASSIGNOR:KLA-TENCOR TECHNOLOGIES CORPORATION;REEL/FRAME:030297/0750Owner name: KLA-TENCOR CORPORATION, CALIFORNIAEffective date: 20090630Mar 27, 2009ASAssignmentOwner name: KLA-TENCOR TECHNOLOGIES CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:GHINOVKER, MARK;REEL/FRAME:022462/0007Effective date: 20050908RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google