Source: http://www.google.com/patents/US7790515?dq=6,957,233
Timestamp: 2017-08-24 11:55:45
Document Index: 691267966

Matched Legal Cases: ['art.\n2', 'art.\n11', 'art.\n14', 'art.\n16', 'art.\n17', 'Application No. 200710192879', 'Application No. 10', 'Application No. 10']

Patent US7790515 - Semiconductor device with no base member and method of manufacturing the same - Google Patents
A semiconductor device includes a semiconductor component which has a semiconductor substrate provided with an integrated circuit on an under side of the semiconductor substrate and a plurality of external connection electrodes provided on the underside of the semiconductor substrate, and a plurality...http://www.google.com/patents/US7790515?utm_source=gb-gplus-sharePatent US7790515 - Semiconductor device with no base member and method of manufacturing the same
Publication number US7790515 B2
Application number US 11/986,698
Also published as CN101192587A, CN101192587B, US20080122087
Publication number 11986698, 986698, US 7790515 B2, US 7790515B2, US-B2-7790515, US7790515 B2, US7790515B2
Patent Citations (15), Non-Patent Citations (4), Referenced by (4), Classifications (60), Legal Events (4)
Semiconductor device with no base member and method of manufacturing the same
US 7790515 B2
preparing an interconnection forming assembly which includes an interconnection forming metal foil, a base plate, and a peel layer provided between the interconnection forming metal foil and base plate;
wherein covering at least the part of the semiconductor component and the interconnections with the sealing medium includes:
providing a first sealing medium forming sheet on the interconnections and peel layer, the first sealing medium forming sheet including an opening in which the semiconductor component is held;
providing a second sealing medium forming sheet on the first sealing medium forming sheet, the second sealing medium forming sheet including an opening in which the semiconductor component is held and a lower vertical conducting part;
providing a third sealing medium forming sheet on the second sealing medium forming sheet;
providing an upper layer interconnection forming metal foil on the third sealing medium forming sheet, the upper layer interconnection forming metal foil including upper vertical conducting parts on an undersurface thereof; and
heating and pressing the first, second, and third sealing medium forming sheets and the upper layer interconnection forming metal foil from above and below, thereby forming the sealing medium from the first, second, and third sealing medium forming sheets;
wherein at least one of the first sealing medium forming sheet and the third sealing medium forming sheet is penetrated by at least one projection electrode; and
wherein said at least one projection electrode projects from a surface of one of the first sealing medium forming sheet and the third sealing medium forming sheet before the heating and pressing, and changes shape in the heating and pressing by contact with the lower vertical conducting part.
2. The semiconductor device manufacturing method according to claim 1, wherein removing the base plate includes removing the base plate by wet etching.
3. The semiconductor device manufacturing method according to claim 1, further comprising forming an under fill medium between the semiconductor component and the peel layer before covering at least the part of the semiconductor component and the interconnections with the sealing medium.
4. The semiconductor device manufacturing method according to claim 1, wherein removing the base plate includes removing the peel layer.
5. The semiconductor device manufacturing method according to claim 3, further comprising:
forming a solder resist layer on undersurfaces of the interconnections exposed after the removal of the base plate and peel layer and on undersurfaces of the under fill medium and the sealing medium;
wherein each of the interconnections includes a connection pad positioned at the undersurface thereof; and
wherein the solder resist layer includes a plurality of openings formed in parts corresponding to the connection pads of the interconnections.
6. The semiconductor device manufacturing method according to claim 5, further comprising:
after the formation of the solder resist layer, providing a plurality of solder balls in the openings of the solder resist layer so that the solder balls are electrically connected to the connection pads of the interconnections.
7. The semiconductor device manufacturing method according to claim 1, further comprising forming a plurality of upper layer interconnections by patterning the upper layer interconnection forming metal foil attached on the sealing medium.
8. The semiconductor device manufacturing method according to claim 7, further comprising forming an overcoat film on upper surfaces of the upper layer interconnections and the sealing medium.
9. The semiconductor device manufacturing method according to claim 1, wherein said at least one projection electrode is cone-shaped.
10. The semiconductor device manufacturing method according to claim 1, wherein the second sealing medium forming sheet is penetrated by the lower vertical conducting part.
11. The semiconductor device manufacturing method according to claim 1, wherein said at least one projection electrode comprises a plurality of projection electrodes formed by the upper vertical conducting parts on the undersurface of the upper layer interconnection forming metal foil.
preparing an interconnection forming member which includes an interconnection forming metal foil, a base plate, and a peel layer positioned between the interconnection forming metal foil and the base plate;
electrically connecting a semiconductor component which has a semiconductor substrate and a plurality of electrode terminals provided on an underside of the semiconductor substrate, by mounting the electrode terminals on the interconnections;
forming an under fill medium between the semiconductor substrate and at least a part of the peel layer and interconnections;
covering the semiconductor component, a part of the under fill medium exposed from the semiconductor component, and a part of the interconnections exposed from the under fill medium with a sealing medium;
forming a solder resist on undersurfaces of the under fill medium and the sealing medium, the solder resist including a plurality of openings in parts corresponding to the connection pads of the interconnections;
wherein covering the semiconductor component, the part of the under fill medium exposed from the semiconductor component, and the part of the interconnections exposed from the under fill medium with the sealing medium includes:
13. The semiconductor device manufacturing method according to claim 9, wherein said at least one cone-shaped projection electrode penetrates the third sealing medium forming sheet, an apex of said at least one cone-shaped projection electrode projects from the surface of the third sealing medium forming sheet and faces the lower vertical conducting part before the heating and pressing, and the apex of said at least one cone-shaped projection electrode changes shape in the heating and pressing by contact with the lower vertical conducting part.
14. The semiconductor device manufacturing method according to claim 12, wherein said at least one projection electrode is cone-shaped.
15. The semiconductor device manufacturing method according to claim 14, wherein said at least one cone-shaped projection electrode penetrates the third sealing medium forming sheet, an apex of said at least one cone-shaped projection electrode projects from the surface of the third sealing medium forming sheet and faces the lower vertical conducting part before the heating and pressing, and the apex of said at least one cone-shaped projection electrode changes shape in the heating and pressing by contact with the lower vertical conducting part.
16. The semiconductor device manufacturing method according to claim 12, wherein the second sealing medium forming sheet is penetrated by the lower vertical conducting part.
17. The semiconductor device manufacturing method according to claim 12, wherein said at least one projection electrode comprises a plurality of projection electrodes formed by the upper vertical conducting parts on the undersurface of the upper layer interconnection forming metal foil.
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1 Chinese Office Action dated Dec. 5, 2008 (7 pages), and English translation thereof (6 pages), issued in a counterpart Chinese Application No. 200710192879.4.
2 Japanese Office Action (and English translation thereof) dated Oct. 7, 2008, issued in a counterpart Japanese Application.
3 Korean Office Action dated Jun. 29, 2009 and English translation thereof issued in a counterpart-Application No. 10-2007-0121487.
4 Korean Office Action dated Jun. 29, 2009 and English translation thereof issued in a counterpart—Application No. 10-2007-0121487.
US8895359 Nov 6, 2009 Nov 25, 2014 Panasonic Corporation Semiconductor device, flip-chip mounting method and flip-chip mounting apparatus
U.S. Classification 438/127, 438/640, 257/E23.169
Cooperative Classification H01L2924/181, H01L2224/05124, H01L2224/05671, H01L2224/05647, H01L2224/05572, H01L2224/05022, H01L2224/05001, H01L2224/32225, H01L2924/0132, H01L2224/29111, H01L2924/01013, H01L21/565, H01L2924/01079, H01L2224/81203, H01L2924/01033, H01L2224/73204, H01L24/31, H01L2224/85411, H01L24/97, H01L2224/97, H01L2224/81193, H01L21/563, H01L2924/14, H01L2924/09701, H01L2924/01078, H01L2924/01006, H01L2924/19041, H01L2924/01024, H01L2924/0105, H01L2924/19043, H01L2224/13099, H01L2924/01322, H01L24/13, H01L2924/014, H01L2224/13144, H01L2224/81801, H01L2224/73203, H01L2924/15311, H01L23/3128, H01L2924/01029, H01L24/81, H01L2224/16225, H01L2224/13147, H01L23/5389, H01L24/16, H01L2224/2919, H01L2224/13111
European Classification H01L24/31, H01L24/10, H01L24/97, H01L24/16, H01L24/81, H01L23/31H2B, H01L21/56F, H01L21/56M, H01L23/538V