Source: http://www.google.com/patents/US7721118?dq=7,181,690
Timestamp: 2016-07-27 20:13:45
Document Index: 224905191

Matched Legal Cases: ['art-655', 'art-655', 'Application No. 094140479', 'art-655', 'art-655', 'art-655', 'art-655']

Patent US7721118 - Optimizing power and performance for multi-processor graphics processing - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA system and method for optimizing power usage and performance during data processing. A multi-processor graphics processing system includes a low power graphics processor and a high performance graphics processor. When a low power condition exists only the low power graphics processor is used to process...http://www.google.com/patents/US7721118?utm_source=gb-gplus-sharePatent US7721118 - Optimizing power and performance for multi-processor graphics processingAdvanced Patent SearchPublication numberUS7721118 B1Publication typeGrantApplication numberUS 10/950,609Publication dateMay 18, 2010Filing dateSep 27, 2004Priority dateSep 27, 2004Fee statusPaidPublication number10950609, 950609, US 7721118 B1, US 7721118B1, US-B1-7721118, US7721118 B1, US7721118B1InventorsAnthony M. Tamasi, Philip B. Johnson, Franck R. Diard, Brian M. KelleherOriginal AssigneeNvidia CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (51), Non-Patent Citations (35), Referenced by (62), Classifications (9), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetOptimizing power and performance for multi-processor graphics processing
US 7721118 B1Abstract
processing the graphics data to produce the processed graphics data for display on the display device using the low power graphics processor and the high performance graphics processor, when the battery power level is at or above the predetermined level. Description
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS3492538Sep 7, 1967Jan 27, 1970Thomas & Betts CorpRemovable stack interconnection systemUS4647123Feb 7, 1983Mar 3, 1987Gulf & Western Manufacturing CompanyBus networks for digital data processing systems and modules usable therewithUS5448655May 7, 1993Sep 5, 1995Dainippon Screen Mfg. Co., Ltd.Image data processor and image data processing methodUS5502808Oct 7, 1994Mar 26, 1996Texas Instruments IncorporatedVideo graphics display system with adapter for display management based upon plural memory sourcesUS5522027Apr 6, 1995May 28, 1996Toshiba America Information SystemsExternal interface for a high performance graphics adapter allowing for graphics compatibilityUS5784628 *Mar 12, 1996Jul 21, 1998Microsoft CorporationMethod and system for controlling power consumption in a computer systemUS5794016Dec 11, 1995Aug 11, 1998Dynamic Pictures, Inc.Parallel-processor graphics architectureUS5936640Sep 30, 1997Aug 10, 1999Compaq Computer CorporationAccelerated graphics port memory mapped status and control registersUS5999198Sep 9, 1997Dec 7, 1999Compaq Computer CorporationGraphics address remapping table entry feature flags for customizing the operation of memory pages associated with an accelerated graphics port deviceUS6023281Mar 2, 1998Feb 8, 2000Ati Technologies, Inc.Method and apparatus for memory allocationUS6111757Jan 16, 1998Aug 29, 2000International Business Machines Corp.SIMM/DIMM memory moduleUS6191800Aug 11, 1998Feb 20, 2001International Business Machines CorporationDynamic balancing of graphics workloads using a tiling strategyUS6195734Jul 2, 1997Feb 27, 2001Micron Technology, Inc.System for implementing a graphic address remapping table as a virtual register file in system memoryUS6296493Sep 8, 2000Oct 2, 2001Shin-Etsu Polymer Co., Ltd.Method for electrically connecting two sets of electrode terminals in array on electronic board unitsUS6326973Dec 7, 1998Dec 4, 2001Compaq Computer CorporationMethod and system for allocating AGP/GART memory from the local AGP memory controller in a highly parallel system architecture (HPSA)US6329996Jan 8, 1999Dec 11, 2001Silicon Graphics, Inc.Method and apparatus for synchronizing graphics pipelinesUS6473086Dec 9, 1999Oct 29, 2002Ati International SrlMethod and apparatus for graphics processing using parallel graphics processorsUS6501999 *Dec 22, 1999Dec 31, 2002Intel CorporationMulti-processor mobile computer system having one processor integrated with a chipsetUS6535939 *Nov 9, 1999Mar 18, 2003International Business Machines CorporationDynamically configurable memory bus and scalability ports via hardware monitored bus utilizationsUS6631474 *Dec 31, 1999Oct 7, 2003Intel CorporationSystem to coordinate switching between first and second processors and to coordinate cache coherency between first and second processors during switchingUS6633296May 26, 2000Oct 14, 2003Ati International SrlApparatus for providing data to a plurality of graphics processors and method thereofUS6683614Dec 21, 2001Jan 27, 2004Hewlett-Packard Development Company, L.P.System and method for automatically configuring graphics pipelines by tracking a region of interest in a computer graphical display systemUS6711638Feb 7, 2002Mar 23, 2004Hsing Chau Industrial Co., Ltd.Video graphics accelerator card connector adapterUS6750870Dec 6, 2000Jun 15, 2004Hewlett-Packard Development Company, L.P.Multi-mode graphics address remapping table for an accelerated graphics port deviceUS6760031Dec 31, 1999Jul 6, 2004Intel CorporationUpgrading an integrated graphics subsystemUS6882346Nov 17, 2000Apr 19, 2005Hewlett-Packard Development Company, L.P.System and method for efficiently rendering graphical dataUS6902419Oct 9, 2002Jun 7, 2005Hewlett-Packard Development Company, L.P.Bus slot connector retention systemUS6919896 *Mar 11, 2002Jul 19, 2005Sony Computer Entertainment Inc.System and method of optimizing graphics processingUS7030837 *Apr 24, 2000Apr 18, 2006Microsoft CorporationAuxiliary display unit for a computer systemUS7176847 *Jun 7, 2002Feb 13, 2007Hewlett-Packard Development Company, L.P.Electronic interface deviceUS7184003 *Jan 13, 2003Feb 27, 2007Dualcor Technologies, Inc.Personal electronics device with display switchingUS20020047851Oct 16, 2001Apr 25, 2002Sanyo Electric Co., Ltd.Image data output device and receiving deviceUS20020105523Sep 24, 2001Aug 8, 2002Behrbaum Todd S.Method and system for allocating memory from the local memory controller in a highly parallel system architecture (HPSA)US20020118201Nov 27, 2001Aug 29, 2002Shrijeet MukherjeeSynchronized image display and buffer swapping in a multiple display environmentUS20030128216Dec 21, 2001Jul 10, 2003Walls Jeffrey J.System and method for automatically configuring graphics pipelines by tracking a region of interest in a computer graphical display systemUS20030137483Oct 17, 2001Jul 24, 2003Callway Edward G.Method and apparatus for rendering videoUS20040072460Oct 9, 2002Apr 15, 2004Conway Ralph W.Bus slot connector retention systemUS20040104913Nov 10, 2003Jun 3, 2004Walls Jeffrey J.System and method for automatically configuring graphics pipelines by tracking a region of interest in a computer graphical display systemUS20050017980Jun 18, 2004Jan 27, 2005Nai-Shung Chang[graphics display architecture and control chip set thereof]US20050088445Oct 22, 2003Apr 28, 2005Alienware Labs CorporationMotherboard for supporting multiple graphics cardsUS20050134588Dec 22, 2003Jun 23, 2005Hybrid Graphics, Ltd.Method and apparatus for image processingUS20050160212Jan 15, 2004Jul 21, 2005Ati Technologies, Inc.Method and device for transmitting dataUS20050278559 *Jun 10, 2004Dec 15, 2005Marvell World Trade Ltd.Low power computer with main and auxiliary processorsEP0428277A2Oct 19, 1990May 22, 1991Stonel CorporationShaft position indicating and display means with adjustable mounting adapterEP0571969A2May 26, 1993Dec 1, 1993Dainippon Screen Mfg. Co., Ltd.Image data processor and image data processing methodFR2834097A1 Title not availableFR2839563A1 Title not availableJPH05324583A Title not availableTW328392U Title not availableTW570243U Title not availableWO2003083636A1Mar 3, 2003Oct 9, 2003International Business Machines CorporationAdapter, converted data storage device and method of operation of a converted data storage device* Cited by examinerNon-Patent CitationsReference1"Alienware Announces Video Array and X2: An Exclusive Advancement in PC Graphics Technology", Alienware, May 12, 2004, <http://www.alienware.com/press-release-pages/press-release-template.aspx?FileName=press051204.esp>.2"Alienware Promises Fastest Graphics Solution", Alienware, Jun. 28, 2004. <http://www.alienware.com/press-release-pages/press-release-template.aspx?FlleName=press062804.asp>.3"Frequently Asked Questions", Alienware, Oct. 22, 2004, .4"Alienware Announces Video Array and X2: An Exclusive Advancement in PC Graphics Technology", Alienware, May 12, 2004, <http://www.alienware.com/press—release—pages/press—release—template.aspx?FileName=press051204.esp>.5"Alienware Promises Fastest Graphics Solution", Alienware, Jun. 28, 2004. <http://www.alienware.com/press—release—pages/press—release—template.aspx?FlleName=press062804.asp>.6"Frequently Asked Questions", Alienware, Oct. 22, 2004, <http://www.alienware.com/alx—pages/main—content.aspx>.7Angelly, Clay. "NVIDIA GeForce 6600 Series Preview," nvnews, published on Aug. 12, 2004 (available at URL:http://www.nvnews.net/previews/geforce-6600-series/).8Angelly, Clay. "NVIDIA GeForce 6600 Series Preview," nvnews, published on Aug. 12, 2004 (available at URL:http://www.nvnews.net/previews/geforce—6600—series/).9Edward Brown, Andy Thorne, "FireWire Audio Application utilizing high quality 96kHz 24bit I/O", Copyright Oxford Semiconductor 2004 � External-Free Release, Jul. 2004.10Edward Brown, Andy Thorne, "FireWire Audio Application utilizing high quality 96kHz 24bit I/O", Copyright Oxford Semiconductor 2004 � External—Free Release, Jul. 2004.11English translation of: Gotoh, Hirosige, "Weekly Overseas News: NVIDIA Dual-GPU Solutions," PCWatch home page, published on Jun. 29, 2004 (available at URL:http://pc.watch.impress.co.jp/docs/2004/0629/kaigai099.htm).12English translation of: Gotoh, Hirosige, "Weekly Overseas News: Questions Many of NVIDIA's SLI," PC Watch home page, published on Aug. 30, 2004 (available at URL:http://pc.watch.impress.co.jp/docs/2004/0830/kaigai113.htm).13English translation of: Marc Prieur, "NVIDIA GeForce 6600 GT-HardWare.fr," Sep. 7, 2004, retrieved from http://www.hardware.fd/art/imprimer/514. pp.1-24.14English translation of: Marc Prieur, "NVIDIA GeForce 6600 GT—HardWare.fr," Sep. 7, 2004, retrieved from http://www.hardware.fd/art/imprimer/514. pp.1-24.15English Translation of: Weinand, Lars. "NVIDIA lance le SLI: une technologie multi-GPU." Jun. 29, 2004, retrieved on Apr. 16, 2008 from: http://www.erenumerique.fr/nvidia-lance-le-sli-une-technologie-multi-gpu-art-655-1.html. pp. 1- 12.16English Translation of: Weinand, Lars. "NVIDIA lance le SLI: une technologie multi-GPU." Jun. 29, 2004, retrieved on Apr. 16, 2008 from: http://www.erenumerique.fr/nvidia—lance—le—sli—une—technologie—multi—gpu-art-655-1.html. pp. 1- 12.17Excepts from letter received from foreign associate re. JP Patent App. No. 2007-543190, dated Feb. 1, 2010, provided as explanation of relevance of foreign language references.18Final Office Action, U.S. Appl. No. 11/012,394 dtd. Nov. 6, 2009.19Gotoh, Hirosige, "Weekly Overseas News: NVIDIA Dual-GPU Solutions," PCWatch home page, published on Jun. 29, 2004 (available at URL: http://pc.watch.impress.co.jp/docs/2004/0629/kaigai099.htm).20Gotoh, Hirosige, "Weekly Overseas News: Questions Many of NVIDIA's SLI," PC Watch home page, published on Aug. 30, 2004 (available at URL: http://pc.watch.impress.co.jp/docs/2004/0830/kaigai113.htm).21Henry Fuchs, Distributing a visible surface algorithm over multiple processors, Proceedings of the 1977 annual conference, p. 449-451. Jan. 1977.22Marc Prieur, "NVIDIA GeForce 6600 GT-HardWare.fr," Sep. 7, 2004, retrieved from http://www.hardware.fr/art/Imprimer/514. pp. 1-23.23Marc Prieur, "NVIDIA GeForce 6600 GT—HardWare.fr," Sep. 7, 2004, retrieved from http://www.hardware.fr/art/Imprimer/514. pp. 1-23.24Office Action. U.S. Appl. No. 10/991,169. Dated Apr. 14, 2009.25Office Action. U.S. Appl. No. 11/012,394. Dated Apr. 28, 2009.26PCT Search Report Oct. 12, 2007.27Scott Wasson, "NVIDIA's SLI Resurrects GPU Teaming: Kickin' It Old School-With 32 Pipes", Jun. 28, 2004, retrieved from http://techreport.com/articles.x/6931. 5 pgs.28Scott Wasson, "NVIDIA's SLI Resurrects GPU Teaming: Kickin' It Old School—With 32 Pipes", Jun. 28, 2004, retrieved from http://techreport.com/articles.x/6931. 5 pgs.29Translated Search Report for ROC (Taiwan) Patent Application No. 094140479, provided as concise explanation of relevance of TW 570243 and TW 328392, date of completion Feb. 15, 2009.30Wasson, "NVIDIA's SLI resurrects DPU teaming Kickin' it old school-with 32 pipes", www.techreport.com, Jun. 28, 2004. pp. 1-3, http://techreport.com/etc/2004q2/nvdia-sli/.31Weinand, "NVIDIA lance le SLI: une technologie multi-GDU", www.erenumerigue.fr, Jun. 29, 2004. pp. 1-7 http://www.erenumerique.fr/nvidia-lance-le-sli-une-technologie-multi-gpu-art-655-7.html.32Weinand, "NVIDIA lance le SLI: une technologie multi-GDU", www.erenumerigue.fr, Jun. 29, 2004. pp. 1-7 http://www.erenumerique.fr/nvidia—lance—le—sli—une—technologie—multi—gpu-art-655-7.html.33Weinand, Lars. "NVIDIA lance le SLI: une technologie multi-GPU." Jun. 29, 2004, retrieved on Apr. 16, 2008 from: http://www.erenumerique.fr/nvidia-lance-le-sli-une-technologie-multi-gpu-art-655-1.html. pp. 1-12.34Weinand, Lars. "NVIDIA lance le SLI: une technologie multi-GPU." Jun. 29, 2004, retrieved on Apr. 16, 2008 from: http://www.erenumerique.fr/nvidia—lance—le—sli—une—technologie—multi—gpu-art-655-1.html. pp. 1-12.35Whitman, Scott, "Dynamic Load Balancing for Parallel Polygon Rendering," IEEE Computer Graphics and Applications, IEEE Inc., New York, vol. 14, No. 4, Jul. 1, 1994.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7940274Sep 25, 2007May 10, 2011Lucid Information Technology, LtdComputing system having a multiple graphics processing pipeline (GPPL) architecture supported on multiple external graphics cards connected to an integrated graphics device (IGD) embodied within a bridge circuitUS7944450Sep 26, 2007May 17, 2011Lucid Information Technology, Ltd.Computing system having a hybrid CPU/GPU fusion-type graphics processing pipeline (GPPL) architectureUS8051305 *Nov 1, 2011Micro-Star International Co., Ltd.Motherboard device and computing apparatus capable of selectively controlling electric power supplied to one of two graphics cardsUS8072459 *Dec 6, 2011Lg Electronics Inc.Data processing unit with multi-graphic controller and method for processing data using the sameUS8125487Sep 26, 2007Feb 28, 2012Lucid Information Technology, LtdGame console system capable of paralleling the operation of multiple graphic processing units (GPUS) employing a graphics hub device supported on a game console boardUS8199159 *Jun 12, 2012Lg Electronics Inc.Data processing unit with multi-graphic controller and method for processing data using the sameUS8233000 *Nov 8, 2007Jul 31, 2012Nvidia CorporationSystem and method for switching between graphical processing unitsUS8259119Nov 8, 2007Sep 4, 2012Nvidia CorporationSystem and method for switching between graphical processing unitsUS8330762 *Dec 11, 2012Advanced Micro Devices, Inc.Efficient video decoding migration for multiple graphics processor systemsUS8334874Dec 18, 2012Lg Electronics Inc.Apparatus and method for processing dataUS8373709 *Dec 19, 2008Feb 12, 2013Ati Technologies UlcMulti-processor architecture and methodUS8384700 *Feb 26, 2013Microsoft CorporationLinked shellUS8386672 *Feb 26, 2013Dell Products L.P.Systems, methods and media for disabling graphic processing unitsUS8537146 *Dec 4, 2006Sep 17, 2013Nvidia CorporationMethods and apparatus for toggling between graphics processing unit video scanoutsUS8555099 *May 30, 2007Oct 8, 2013Ati Technologies UlcDevice having multiple graphics subsystems and reduced power consumption mode, software and methodsUS8582448 *Oct 22, 2007Nov 12, 2013Dell Products L.P.Method and apparatus for power throttling of highspeed multi-lane serial linksUS8612652Jan 28, 2013Dec 17, 2013Dell Products L.P.Systems, methods, and media for disabling graphic processing unitsUS8624905May 21, 2012Jan 7, 2014Lg Electronics Inc.Data processing unit with multi-graphic controller and method for processing data using the sameUS8629877Oct 23, 2007Jan 14, 2014Lucid Information Technology, Ltd.Method of and system for time-division based parallelization of graphics processing units (GPUs) employing a hardware hub with router interfaced between the CPU and the GPUs for the transfer of geometric data and graphics commands and rendered pixel data within the systemUS8659607Nov 13, 2012Feb 25, 2014Advanced Micro Devices, Inc.Efficient video decoding migration for multiple graphics processor systemsUS8754894Nov 8, 2010Jun 17, 2014Lucidlogix Software Solutions, Ltd.Internet-based graphics application profile management system for updating graphic application profiles stored within the multi-GPU graphics rendering subsystems of client machines running graphics-based applicationsUS8799685 *Aug 25, 2010Aug 5, 2014Advanced Micro Devices, Inc.Circuits and methods for providing adjustable power consumptionUS8810584 *Sep 13, 2011Aug 19, 2014Nvidia CorporationSmart power management in graphics processing unit (GPU) based cluster computing during predictably occurring idle timeUS8839012 *Sep 8, 2009Sep 16, 2014Advanced Micro Devices, Inc.Power management in multi-GPU systemsUS8868945 *Apr 19, 2010Oct 21, 2014Ati Technologies UlcDevice having multiple graphics subsystems and reduced power consumption mode, software and methodsUS8892804Oct 3, 2008Nov 18, 2014Advanced Micro Devices, Inc.Internal BUS bridge architecture and method in multi-processor systemsUS9003208 *Mar 3, 2011Apr 7, 2015Microsoft Technology Licensing, LlcI/O co-processor coupled hybrid computing deviceUS9013464Feb 9, 2013Apr 21, 2015Microsoft Technology Licensing, LlcLinked shellUS9110664 *Apr 20, 2012Aug 18, 2015Dell Products L.P.Secondary graphics processor control systemUS9116695 *Feb 7, 2013Aug 25, 2015Brother Kogyo Kabushiki KaishaStorage medium storing input/output setting program, storage medium storing output setting program, and data processing apparatusUS9275430 *Jan 6, 2011Mar 1, 2016Lucidlogix Technologies, Ltd.Computing system employing a multi-GPU graphics processing and display subsystem supporting single-GPU non-parallel (multi-threading) and multi-GPU application-division parallel modes of graphics processing operationUS9280948 *Jul 12, 2013Mar 8, 2016Samsung Electronics Co., Ltd.System on chip and electronic system including the sameUS9361248Mar 10, 2015Jun 7, 2016Microsoft Technology Licensing, LlcI/O co-processor coupled hybrid computing deviceUS20080100629 *Sep 26, 2007May 1, 2008Reuven BakalashComputing system capable of parallelizing the operation of multiple graphics processing units (GPUS) supported on a CPU/GPU fusion-type chip and/or multiple GPUS supported on an external graphics cardUS20080143731 *Nov 30, 2007Jun 19, 2008Jeffrey ChengVideo rendering across a high speed peripheral interconnect busUS20080165196 *Oct 23, 2007Jul 10, 2008Reuven BakalashMethod of dynamic load-balancing within a PC-based computing system employing a multiple GPU-based graphics pipeline architecture supporting multiple modes of GPU parallelizationUS20080182630 *Jan 26, 2007Jul 31, 2008Microsoft CorporationLinked shellUS20080204460 *May 30, 2007Aug 28, 2008Ati Technologies UlcDevice having multiple graphics subsystems and reduced power consumption mode, software and methodsUS20090103444 *Oct 22, 2007Apr 23, 2009Dell Products L.P.Method and Apparatus for Power Throttling of Highspeed Multi-Lane Serial LinksUS20090153572 *May 22, 2008Jun 18, 2009Nam Kyong UkApparatus and method for processing dataUS20090160865 *Dec 19, 2007Jun 25, 2009Advance Micro Devices, Inc.Efficient Video Decoding Migration For Multiple Graphics Processor SystemsUS20090164687 *Jun 4, 2008Jun 25, 2009Micro-Star International Co., Ltd.Motherboard device and computing apparatus capable of selectively controlling electric power supplied to one of two graphics cardsUS20090179903 *Jun 19, 2008Jul 16, 2009Jin-Suk LeeData processing unit with multi-graphic controller and method for processing data using the sameUS20090276556 *Jul 15, 2009Nov 5, 2009Mediatek Inc.Memory controller and method for writing a data packet to or reading a data packet from a memoryUS20100005235 *Jan 7, 2010Hon Hai Precision Industry Co., Ltd.Computer systemUS20100007646 *Jul 8, 2008Jan 14, 2010Dell Products L.P.Systems, Methods and Media for Disabling Graphic Processing UnitsUS20100088452 *Oct 3, 2008Apr 8, 2010Advanced Micro Devices, Inc.Internal BUS Bridge Architecture and Method in Multi-Processor SystemsUS20100088453 *Dec 19, 2008Apr 8, 2010Ati Technologies UlcMulti-Processor Architecture and MethodUS20100293402 *Nov 18, 2010Ati Technologies UlcDevice having multiple graphics subsystems and reduced power consumption mode, software and methodsUS20110060924 *Sep 8, 2009Mar 10, 2011Ati Technologies, Ulc.Power Management in Multi-GPU SystemsUS20110072056 *Nov 8, 2010Mar 24, 2011Reuven BakalashInternet-based graphics application profile management system for updating graphic application profiles stored within the multi-gpu graphics rendering subsystems of client machines running graphics-based applicationsUS20110154082 *Jun 23, 2011Microsoft CorporationI/o co-processor coupled hybrid computing deviceUS20110169840 *Jul 14, 2011Lucid Information Technology, LtdComputing system employing a multi-gpu graphics processing and display subsystem supporting single-gpu non-parallel (multi-threading) and multi-gpu application-division parallel modes of graphics processing operationUS20120032957 *Feb 9, 2012Jin-Suk LeeData processing unit with multi-graphic controller and method for processing data using the sameUS20120054518 *Aug 25, 2010Mar 1, 2012Greg SadowskiCircuits and Methods for Providing Adjustable Power ConsumptionUS20120274641 *Apr 27, 2011Nov 1, 2012Nvidia CorporationTechniques for degrading rendering quality to increase operating time of a computing platformUS20130063450 *Mar 14, 2013Bhavesh Narendra KabawalaSmart power management in graphics processing unit (gpu) based cluster computing during predictably occurring idle timeUS20130227192 *Feb 7, 2013Aug 29, 2013Brother Kogyo Kabushiki KaishaStorage medium storing input/output setting program, storage medium storing output setting program, and data processing apparatusUS20130278613 *Apr 20, 2012Oct 24, 2013Dell Products L.P.Secondary graphics processor control systemUS20140028692 *Jul 12, 2013Jan 30, 2014Samsung Electronics Co., Ltd.System on chip and electronic system including the sameUS20140040646 *Oct 11, 2013Feb 6, 2014Mukund KhatriMethod and apparatus for power throttling of highspeed multi-lane serial linksWO2013119226A1 *Feb 8, 2012Aug 15, 2013Intel CorporationDynamic cpu gpu load balancing using power* Cited by examinerClassifications U.S. Classification713/300, 345/502, 345/546International ClassificationG06F1/00Cooperative ClassificationG06F1/3203, G06F1/3293, Y02B60/121European ClassificationG06F1/32P, G06F1/32P5ULegal EventsDateCodeEventDescriptionSep 27, 2004ASAssignmentOwner name: NVIDIA CORPORATION,CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:TAMASHI, ANTHONY M.;JOHNSON, PHILIP B.;DIARD, FRANCK R.;AND OTHERS;SIGNING DATES FROM 20040923 TO 20040924;REEL/FRAME:015839/0606Oct 23, 2013FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services