Source: https://patents.google.com/patent/US8543871B2/en
Timestamp: 2018-08-17 15:39:42
Document Index: 135183510

Matched Legal Cases: ['Application No. 200780042949', 'Application No. 200780042958', 'Application No. 200780042960', 'Application No. 2000780042960', 'Application No. 200780042958', 'Application No. 200780042958', 'Application No. 200780042960', 'Application No. 200780042960', 'Application No. 07864653', 'Application No. 70080042960', 'Application No. 200780042958', 'Application No. 200780042958', 'Application No. 200780042960', 'Application No. 200780042958', 'Application No. 200780042960', 'Application No. 200780042960']

US8543871B2 - Correlating hardware devices between local operating system and global management entity - Google Patents
Correlating hardware devices between local operating system and global management entity Download PDF
US8543871B2
US8543871B2 US13289776 US201113289776A US8543871B2 US 8543871 B2 US8543871 B2 US 8543871B2 US 13289776 US13289776 US 13289776 US 201113289776 A US201113289776 A US 201113289776A US 8543871 B2 US8543871 B2 US 8543871B2
US13289776
US20120054538A1 (en )
Santosh S. Jodh
Ellsworth D. Walker
Michael G. Tricker
A method and apparatus for correlating the identities of hardware devices, such as processors or memory controllers, between a local operating system and a global management entity is described. In an embodiment a fault message including a local identifier of a faulting device is received from an operating system. A global identifier of the faulting device is determined that is different from the local identifier. An appropriate replacement device is then selected based on the global identifier of the faulting device, and the selected replacement device is mapped to the faulting device.
This application is a continuation of, and claims priority to, U.S. patent application Ser. No. 11/675,261, filed Feb. 15, 2007, which is incorporated herein by reference. This application is also related to U.S. patent application Ser. No. 11/675,272, filed on Feb. 15, 2007, U.S. patent application Ser. No. 11/675,290, filed on Feb. 15, 2007, and U.S. patent application Ser. No. 11/675,243, filed on Feb. 15, 2007, which are incorporated herein by reference.
A microprocessor is an electronic device capable of performing the processing and control functions for computing devices such as desktop computers, laptop computers, server computers, cell phones, laser printers, and so on. Conventionally, a microprocessor comprises a small plastic or ceramic package that contains and protects a small piece of semiconductor material that includes a complex integrated circuit. Leads connected to the integrated circuit are attached to pins that protrude from the package allowing the integrated circuit to be connected to other electronic devices and circuits. Microprocessors are usually plugged into or otherwise attached to a circuit board containing other electronic devices.
While a microprocessor integrated circuit may include only one computing unit, i.e., one processor, it is possible to include multiple processors in a microprocessor integrated circuit. The multiple processors, which are often referred to as “cores,” are included in the same piece of semiconductor material and connected to the microprocessor package pins. Having multiple cores increases the computing capability of the microprocessor. For example, a microprocessor with four cores can provide almost the same amount of computing capability as four single-core microprocessors.
There has been an increase in the use of multiple microprocessors and multiple-core microprocessors in traditional computing devices. Traditional computing devices are capable of running only one instance of an operating system. Even traditional computing devices that contain multiple-core microprocessors, multiple microprocessors, or multiple multiple-core microprocessors are only capable of running one instance of an operating system. Still, harnessing the increased computing capability that multiple-core microprocessors provide allows computing functions, which were previously executed by multiple computing devices, to be executed with fewer computing devices.
For example, a server is a computing device connected to a network that provides a service or set of services to other entities connected to the network. A server comprising 32 traditional computing devices, i.e., a 32 way server, may be comprised of eight microprocessors, each having four cores. Taking the concept one step further, if each individual core is eight times more capable than one of the 32 computing devices, the 32-way server's capabilities can be provided by the four core microprocessor. A clear advantage of such a four core server is that computing resource redundancy is more affordable than that provided by traditional servers. In addition, reducing the number of microprocessors reduces the cost of the server, the amount of energy used to power the server, and the amount of maintenance the server requires.
The advantages of using multiple-core microprocessors is driving a trend toward “server consolidation.” Server consolidation is the process of replacing multiple servers, for example in a server cluster, with fewer servers, e.g., one server. A server that replaces multiple servers may contain computing capability that equals or exceeds the capabilities of the multiple servers. While reducing costs, energy, and maintenance, server consolidation has the effect of putting all of one's eggs into one basket. Server consolidation may increase the impact of a server failure. For example, if multiple applications, which used to run on multiple servers, are all run on the same server, and that server fails, the impact is likely to affect all of the applications. In the worst case, this means application downtime. To guard against such an impact, many high end servers, i.e., servers with a large amount of computing capability, apply a portion of their capabilities to reliability features.
FIG. 1 is a block diagram of an example of a computing device capable of supporting partition unit replacement in accordance with one or more embodiments.
FIG. 2 is a block diagram of an example partition containing a plurality of partition units, one of which is unassociated, in accordance with one or more embodiments.
FIG. 3 is a block diagram of the example partition illustrated in FIG. 2 reconfigured to include the previously unassociated partition unit in accordance with one or more embodiments.
FIG. 4 is a functional flow diagram illustrating an example process for replacing a processor in accordance with one or more embodiments.
FIG. 5 is a functional flow diagram illustrating an example process for replacing a memory unit, i.e., memory controller and memory blocks, in accordance with one or more embodiments.
As with many types of computing devices, the operation of a server is controlled by a software program called an operating system. Traditional computing devices are capable of running only one instance of an operating system. Hence a traditional server, i.e., a server based on a traditional computing device or traditional computing devices, executes the instructions contained in a copy of the operating system, i.e., an instance of the operating system. For example, a server comprising 32 traditional computing devices, i.e., a 32 way server, may be comprised of eight microprocessors, each having four cores and yet run one operating system. Reducing the number of microprocessors reduces the cost of the server, the amount of energy u to power the server, and the amount of maintenance the server requires.
Server consolidation is the process of replacing multiple servers with fewer servers or perhaps even only one server. An exemplary server that is the result of a server consolidation may contain computing capability that equals or exceeds the capabilities of the multiple servers that the server replaces. Server consolidation may increase the impact of a server failure. For example, imagine multiple applications that used to run on the multiple servers are all run on the one server. If the server fails, the impact is likely to affect all of the applications and even cause application downtime.
It is impractical to make partitionable servers more reliable by notifying each of the high-level software applications when a failover is implemented. To enable high-level software applications to respond to such a notification would require that the computer code for each application be modified to adapt to the failover. Even notifying applications would probably not be enough to provide failover without a mechanism to replace a portion of a running server. Instead, it is more practical and advantageous to involve only the lowest level software in the failover and allow the upper level software, e.g., applications, to behave as though no hardware change has happened.
A local operating system is an instance of an operating system that runs on one partition. Partition units are assigned to a specific partition to ensure that the devices in the partition unit cannot be shared with devices in other partitions, ensuring that a failure will be isolated to a single partition. Such a partition unit may indicate which physical addresses are serviced by a given memory controller and, thereby, map the physical memory addresses to the memory controller and to the physical partition unit containing the memory controller. More than one partition unit may be used to boot and operate a partition. Unused or failing partition units may be electrically isolated. Electrically isolating partition units is similar to removing a server from a group of traditional servers with the advantage that partition units may be dynamically reassigned to different partitions.
At block 504 the operating system transmits the fault message to the SP, such as the SP 102 shown in FIG. 1. At block 506 the SP uses the fault message to determine the identity of the physical memory unit. At block 508 the SP uses rules to select an appropriate replacement memory unit. A replacement memory unit may be selected according to size, speed, etc. Another selection criteria may be the memory replacement unit's accessibility. It is possible to access one processor's memory unit by going through one or more other processors, called “hops.” For example, processor A 202 may access the memory unit 212, for processor C 210, in one hop via processor C 210; or may access the memory unit 212 in two hops, one hop to processor B 206 and another hop to processor C 210. It is desirable to minimize the number of hops incurred for memory access. Hence, an appropriate replacement memory unit may be selected according to size, speed, and accessibility as determined by the number of hops.
While various embodiments have been illustrated and described, it will be appreciated that various changes can be made therein without departing from the spirit and scope of the invention. For example, in the processes described above, information about the faulting hardware devices primarily originates in the local operating systems and the decision to replace a faulting hardware device originates with the local operating systems. It is possible for the faulting information to be transmitted to the global management entity and have the global management entity make the decision to replace the faulting hardware device. Also, while the various embodiments described above deal with physical processors, it is also possible to apply similar processes to virtual processors.
receiving, from an instance of a local operating system, a fault message including a local identifier of a faulting device of a partition of a server;
determining, based on the fault message, a global identifier of the faulting device, the global identifier different from the local identifier;
searching, based on the global identifier, an information table for information associated with the faulting device;
searching, based on the information associated with the faulting device, the information table for one or more available devices of the server;
selecting, from the one or more available devices of the server, a replacement device for the faulting device of the partition of the server; and
mapping the selected replacement device to the faulting device by updating a routing table effective to allow services of the instance of the local operating system to operate on the replacement device.
2. The computer-implemented method of claim 1, wherein the faulting device is a memory unit of the partition of the server.
3. The computer-implemented method of claim 2, wherein the replacement device is a replacement memory unit and selecting the replacement memory unit device is based on a size, speed, or accessibility of the replacement memory unit.
4. The computer-implemented method of claim 1, wherein the faulting device is a processor or processor core of the partition of the server.
5. The computer-implemented method of claim 4, wherein the global identifier indicates at least one of a processing capability or processing configuration of the faulting processor or processor core.
6. The computer-implemented method of claim 1, further comprising selecting, from the one or more available devices of the server, another replacement device for the faulting device in response to another fault message from the instance of the local operating system that indicates the selected replacement device is inappropriate.
7. The computer-implemented method of claim 1, wherein the replacement device includes an idle processor or an idle processor core of the server not included in the partition of the server.
8. The computer-implemented method of claim 1, wherein the local identifier of the faulting device includes at least one of an Advanced Programmable Interrupt Controller identifier (APIC ID) or a physical address of the faulting device.
9. The computer-implemented method of claim 1, wherein one or more acts of the method are implemented by a baseboard management controller or a service processor communicably coupled with the partition of the server.
10. One or more computer-readable memory devices embodying instructions, that when executed by a processor, implement a failover manager configured to:
receive, from an instance of a local operating system, a fault message including a local identifier of a faulting device of a partition of a server;
determine, based on the fault message, a global identifier of the faulting device, the global identifier different from the local identifier;
search, based on the global identifier, an information table for information associated with the faulting device;
search, based on the information associated with the faulting device, the information table for one or more available devices of the server;
select, from the one or more available devices of the server, a replacement device for the faulting device of the partition of the server; and
map the selected replacement device to the faulting device by updating a routing table effective to allow services of the instance of the local operating system to operate on the replacement device.
11. The one or more computer-readable memory devices 10, wherein the faulting device is a memory unit of the partition of the server.
12. The one or more computer-readable memory devices 11, wherein the replacement device is a replacement memory unit and selecting the replacement memory unit device is based on a size, speed, or accessibility of the replacement memory unit.
13. The one or more computer-readable memory devices 10, wherein the faulting device is a processor or processor core of the partition of the server.
14. The one or more computer-readable memory devices 13, wherein the global identifier indicates at least one of a processing capability or processing configuration of the faulting processor or processor core.
a mass storage device storing an operating system;
one or more logical partitions of devices, each logical partition of devices configured to execute a respective instance of the operating system; and
one or more computer-readable memory storage devices storing an information table and a routing table; and
a service processor configured to:
receive, from one of the logical partitions executing a respective instance of the operating system, a fault message including a local identifier of a faulting device of the logical partition;
determine, based on the fault message, a global identifier of the faulting device of the logical partition, the global identifier different from the local identifier;
search, based on the global identifier, the information table for information associated with the faulting device of the logical partition;
search, based on the information associated with the faulting device, the information table for one or more available devices of the computing device;
select, from the one or more available devices, a replacement device for the faulting device for the logical partition; and
map the selected replacement device to the faulting device by updating a routing table effective to allow services of the respective instance of the operating system to be executed by the logical partition of the computing device.
16. The computer device of claim 15, wherein the faulting device is a memory unit of the logical partition of the computing device.
17. The computer device of claim 16, wherein the replacement device is a replacement memory unit and the selection of the replacement memory unit device is based on a size, speed, or accessibility of the replacement memory unit.
18. The computer device of claim 15, wherein the faulting device is a processor or processor core of the logical partition of the computing device.
19. The computer device of claim 18, wherein the global identifier indicates at least one of a processing capability or processing configuration of the faulting processor or processor core.
20. The computer device of claim 15, wherein the computing device is configured to select, from the one or more available devices of the computing device, another replacement device for the faulting device in response to another fault message from the respective instance of the operating system that indicates the selected replacement device is inappropriate.
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