Source: https://patents.google.com/patent/KR101000455B1/en
Timestamp: 2020-01-23 19:49:55
Document Index: 370402243

Matched Legal Cases: ['art 700', 'art 700', 'art 700', 'art 700', 'art 812', 'art 700']

KR101000455B1 - Driving chip and display apparatus having the same - Google Patents
Driving chip and display apparatus having the same Download PDF
KR101000455B1
KR101000455B1 KR1020040002965A KR20040002965A KR101000455B1 KR 101000455 B1 KR101000455 B1 KR 101000455B1 KR 1020040002965 A KR1020040002965 A KR 1020040002965A KR 20040002965 A KR20040002965 A KR 20040002965A KR 101000455 B1 KR101000455 B1 KR 101000455B1
KR1020040002965A
KR20050075476A (en
2004-01-15 Priority to KR1020040002965A priority Critical patent/KR101000455B1/en
2005-07-21 Publication of KR20050075476A publication Critical patent/KR20050075476A/en
2010-12-13 Publication of KR101000455B1 publication Critical patent/KR101000455B1/en
Disclosed are a driving chip capable of improving coupling reliability and a display device having the same. The driving chip is formed in the base body including a drive circuit formed therein, four or more rows on one surface of the base body, each row is formed on one surface of the base body, the conductive bumps arranged along the longitudinal direction of the base body, the driving circuit And conductive wires for electrically connecting the conductive bumps with each other. The conductive bumps are formed in the cell region corresponding to the driving circuit through the conductive wirings. Therefore, the separation distance between the conductive bumps and the size of each conductive bump may be increased, thereby improving coupling reliability with the display panel.
DRIVING CHIP AND DISPLAY APPARATUS HAVING THE SAME}
1 is a perspective view illustrating a driving chip according to an exemplary embodiment of the present invention.
FIG. 2 is a plan view illustrating one surface of the driving chip illustrated in FIG. 1.
3 is a cross-sectional view of the driving chip illustrated in FIG. 1 in parallel with one surface of a base body.
FIG. 5 is a plan view specifically illustrating a connection relationship between the output bump and the conductive wiring illustrated in FIG. 2.
6 is a graph showing a bump area according to the number of arrangement of output bumps.
7 is a plan view illustrating a driving chip according to another exemplary embodiment of the present invention.
8 is a plan view illustrating a driving chip according to another exemplary embodiment of the present invention.
9 is a perspective view illustrating a display device according to an exemplary embodiment of the present invention.
FIG. 10 is an enlarged view illustrating a portion of the pad of the first substrate illustrated in FIG. 9.
FIG. 11 is a cross-sectional view taken along the line BB ′ of FIG. 9.
100: driving chip 110: base body
112: drive circuit 113: conductive terminal
120: challenge bump 122: input bump
124: output bump 130: conductive wiring
140: shock absorbing layer 500: display device
600: display panel 700: pad portion
710: input pad 720: output pad
800: anisotropic conductive film 810: adhesive resin
820: Conductive Particles
The present invention relates to a driving chip and a display device having the same, and more particularly, to a driving chip and a display device having the same that can increase the total area of the bump connected to the display panel.
In general, various electronic devices such as mobile communication terminals, digital cameras, notebook computers, and monitors include an image display device for displaying an image. Various types may be used as the image display device. However, a display device having a flat plate shape is mainly used in view of the characteristics of the electronic device, and in particular, a liquid crystal display device is widely used among flat display devices.
Such a liquid crystal display is a flat panel display that displays an image using liquid crystal, and is thinner and lighter than other display devices, and has a low power consumption and a low driving voltage. It is widely used throughout the industry.
Conventional liquid crystal display devices include a liquid crystal display panel for displaying an image and a driving chip for driving the liquid crystal display panel.
The driving chip converts the image data applied from the outside into a driving signal suitable for driving the liquid crystal display panel and applies the same to the liquid crystal display panel at an appropriate timing. The driving chip is connected to the liquid crystal display panel through a chip on glass (COG) mounting method in consideration of cost reduction and mountability. According to the COG method, an anisotropic conductive film (ACF) is interposed between the driving chip and the liquid crystal display panel, and then compressed at a high temperature to electrically connect the driving chip and the liquid crystal display panel.
On the other hand, the driving chip includes a conductive bump for electrical connection with the liquid crystal display panel. The conductive bumps are formed to have the same number as the number of data lines and gate lines formed in the liquid crystal display panel. In recent years, as the liquid crystal display panel is gradually increased in resolution, the number of data lines and gate lines has increased, and as a result, the number of conductive bumps required by the driving chip has also increased.
However, since the positions at which conductive bumps can be formed are limited, as the number of conductive bumps increases, the separation distance between the conductive bumps and the conductive bumps decreases, and the size of each conductive bump becomes smaller. Therefore, in the COG mounting method using the ACF, contact failure such as a short circuit or a disconnection may occur.
Accordingly, an object of the present invention is to provide a driving chip that can improve the coupling reliability between the driving chip and the display panel.
Another object of the present invention is to provide a display device having the above-described driving chip.
The driving chip for achieving the above technical problem of the present invention includes a base body, a conductive bump and a conductive wiring.
The base body includes a driving circuit formed therein.
The conductive bumps are formed in four or more rows on one surface of the base body, and each row is arranged along a first direction parallel to the longitudinal direction of the base body.
The conductive wiring is formed on one surface of the base body and electrically connects the driving circuit and the conductive bump.
In addition, the driving chip for achieving the technical problem of the present invention includes a base body, a conductive terminal, a conductive wiring and a conductive bump.
The base body includes a driving circuit therein, and includes a cell region corresponding to the driving circuit and a peripheral region adjacent to the cell region.
The conductive terminal is connected to the driving circuit and is formed in the peripheral region.
The conductive wire is connected to the conductive terminal and extends to the cell region, and is formed on one surface of the base body.
The conductive bumps are formed in the cell region to be connected to the conductive wires and protrude from one surface of the base body.
According to another aspect of the present invention, there is provided a display device including a driving chip and a display panel.
The driving chip may include a base body having a driving circuit therein, conductive bumps arranged in four or more rows along a first direction parallel to a length direction of the base body on one surface of the base body, and on one surface of the base body. And conductive wires formed to electrically connect the driving circuit and the conductive bumps.
The display panel includes a pad part connected to the driving chip and a plurality of signal lines connected to the pad part.
According to such a driving chip and a display device having the same, by arranging the conductive bumps in four or more rows, the separation distance between the conductive bumps and the size of each conductive bump can be increased, thus improving the coupling reliability with the display panel. have.
1 is a perspective view illustrating a driving chip according to an exemplary embodiment of the present invention, and FIG. 2 is a plan view illustrating one surface of the driving chip illustrated in FIG. 1.
1 and 2, a driving chip 100 according to an embodiment of the present invention includes a base body 110, a conductive bump 120, and a conductive wiring 130.
The base body 110 is made of an insulating material and is formed in a rectangular parallelepiped shape having a first direction in a longitudinal direction. Inside the base body 110, a driving circuit (not shown) for processing an image signal input from the outside into a driving signal for driving is provided. The drive circuit is formed by a semiconductor process.
The conductive bumps 120 are formed in at least four rows on one surface of the base body 110, and each row is arranged along a first direction parallel to the longitudinal direction of the base body 110. The conductive bump 120 has a quadrangular cross section cut parallel to one surface of the base body 110.
The conductive bump 120 is composed of an input bump 122 and an output bump 124. The input bumps 122 are arranged in one row along the first direction. The output bumps 124 are arranged in three rows along the first direction. When the number of conductive bumps 120 required increases, the input bumps 122 may be formed in one or more rows, and the output bumps 124 may be formed in three or more rows. The input bump 122 and the output bump 124 may be formed in the same shape and size, but when the number of the required input bumps 122 is small, the input bump 122 is formed larger than the output bump 124. Can be.
The conductive wiring 130 is formed on one surface of the base body 110 to electrically connect the driving circuit formed in the base body 110 and the conductive bumps 120. The conductive wire 130 is connected to the driving circuit in an edge area parallel to the first direction of one surface of the base body 110, and extends to a central area of one surface of the base body 110 to extend each conductive bump ( 120).
As such, by forming the conductive wiring 130 on one surface of the base body 110, the formation position of the conductive bumps 120 can be shifted to the central region of one surface of the base body 110, and the arrangement of four or more rows It becomes possible.
3 is a cross-sectional view of the driving chip illustrated in FIG. 1 in parallel with one surface of the base body, and FIG. 4 is a cross-sectional view taken along the line AA ′ of FIG. 1.
3 and 4, a driving circuit 112 formed by a semiconductor process is provided in the base body 110. The driving circuit 112 converts an image signal input from the outside into a driving signal for driving a display panel (not shown) and applies it to the display panel.
The base body 110 is divided into a cell region 110a corresponding to the driving circuit 112 and a peripheral region 110b surrounding the cell region 110a adjacent to the cell region 110a.
The base body 110 is provided with a conductive terminal 113 connected to the driving circuit 112 and extending from the driving circuit 112 to be formed in the peripheral region 110b. The conductive terminal 113 includes an input terminal 114 for receiving an image signal input from the outside and an output terminal 115 for outputting a driving signal output from the driving circuit 112. The input terminals 114 extend from one side of the driving circuit 112 and are formed in a line along the length direction of the base body 110. The output terminals 115 extend from the other side, which is the opposite side of one side of the driving circuit 112, and are formed in a line along the length direction of the base body 110. Although not shown, when the number of output terminals 115 required is large, the output terminals 115 may be arranged in two or more rows along the longitudinal direction of the base body 110. In addition, the output terminals 115 may be formed in one or more lines along the direction perpendicular to the longitudinal direction of the base body 110 on both sides perpendicular to one side of the driving circuit 112.
The input terminal 114 and the output terminal 115 are electrically connected to the input bump 122 and the output bump 124 through conductive wires 130 formed on one surface of the base body 110, respectively.
Referring to FIG. 4, which illustrates a connection relationship between the conductive terminal 113 and the conductive bumps 120, the conductive terminal 113 is formed in the peripheral region 110b inside the base body 110 and the base body 113. Is exposed to the outside. The conductive bumps 120 are formed on one surface of the base body 110 to correspond to the cell regions 110a. One end of the conductive wiring 130 is connected to the conductive terminal 113 in the peripheral region 110b, and the other end of the conductive wiring 130 extends to the cell region 110a to be connected to the conductive bump 120. The conductive wire 130 is made of a metal material having a low electrical resistance for stable connection between the conductive terminal 113 and the conductive bumps 120.
In this way, the conductive bumps 120 are not formed in the peripheral region 110b in which the conductive terminals 113 are formed, but are formed in the cell region 110a using the conductive wiring 130, thereby forming the size of the peripheral region 110b. By reducing the overall size of the base body 110 can be reduced.
The driving chip 100 may further include a shock absorbing layer 140 formed between the base body 110 and the conductive wiring 130. The shock absorbing layer 140 serves to reduce the influence of the external shock applied through the conductive bumps 120 on the driving circuit 112. That is, the driving chip 100 is coupled to an external display panel (not shown) through a thermocompression bonding process. In this case, an external impact by compression is applied to the conductive bumps 120 directly connected to the display panel. Since the conductive bumps 120 are disposed in the cell region 110a corresponding to the driving circuits 112, external shocks applied to the conductive bumps 120 may be transmitted to the driving circuits 112 to cause malfunction of the driving circuits 112. Can be. Accordingly, by forming the shock absorbing layer 140 between the conductive bumps 120 and the driving circuit 112, external shocks transmitted from the conductive bumps 120 to the driving circuit 112 can be reduced. The shock absorbing layer 140 is made of an insulating material for insulation between the conductive wires 130.
Referring to FIG. 5, each output bump 124 is formed in a quadrangular shape having the same bump width BW and the same bump length BL, and arranged in three rows on one surface of the base body 110. Each column of the output bumps 124 is arranged along a first direction parallel to the longitudinal direction of the base body 110, and each column is spaced apart from each other by a first distance d1. The output bumps 124 arranged in each column are spaced apart from each other by a second distance d2, and are arranged side by side in a second direction perpendicular to the first direction with the output bumps 124 in other adjacent columns.
The conductive wires 130 extend from the edge regions of the base body 110 and are connected to the output bumps 124, respectively. Each conductive wiring 130 has the same wiring width LW and is formed to be spaced apart from each other by a third distance d3.
In this way, by arranging the output bumps 124 in three rows, the bump area of the output bumps 124 actually contacting the external display panel can be increased.
For example, the driving chip 100 used in the display panel having a resolution of 240 * 320 includes 1040 output bumps 124 and has a size of 20 mm and 3 mm. Depending on how the 1040 output bumps 124 are arranged, the bump area of the output bumps 124 may be changed.
(Μm) Wiring / wiring spacing (μm) Wiring / Bump spacing (μm) Bump / Bump Spacing (μm) Pitch (μm) Bump width
(Μm) 2-column array 10 - 5 20 40 20 3-column array 10 5 5 35 60 25 4-column array 10 5 5 50 80 30 5-column array 10 5 5 65 100 35 6-column array 10 5 5 80 120 40
Table 1 shows the bump widths BW according to the number of arrangements of the output bumps 124. In Table 1, the wiring width, wiring / wiring spacing, and wiring / bump spacing are determined according to the design rule of the display panel. In this example, the wiring width LW of the conductive wiring 130 is 10 μm, the third distance d3 between the conductive wiring 130 is 5 μm, and the gap between the conductive wiring 130 and the output bump 124. Is 5 µm. The bump / bump spacing is the second distance d2 between the output bump 124 and the output bump 124 and is determined by the wiring width, wiring / wiring spacing and wiring / bumping spacing. The pitch pitdh is a distance from the center of the output bump 124 to the center of the adjacent output bump 124 and is determined by the area of one surface of the base body 110 and the number of output bumps 124. The bump width represents the bump width BW of the output bump 124, which is obtained by subtracting the bump / bump spacing from the pitch.
As shown in Table 1, it can be seen that the bump width BW of the output bump 124 increases as the number of arrays increases. Therefore, when the bump lengths BL of the output bumps 124 are the same, the size of each output bump 124 increases as the number of arrays increases, and the bump area in which the sizes of all the output bumps 124 are combined also increases.
6 is a graph showing a bump area according to the number of arrangement of output bumps. In this graph, the bump length BL of the output bump 124 is 80 mu m.
Referring to FIG. 6, it can be seen that the bump area increases as the number of arrangements of the output bumps 124 increases. Specifically, when the output bumps 124 are arranged in two rows, the bump area is 1,664 탆 2 when the bump width BW, the bump length BL, and the number of the output bumps 124 are all multiplied. On the other hand, when the output bumps 124 are arranged in three rows, the bump area is 2,080 μm 2 .
In order to achieve stable coupling between the driving chip 100 and the display panel, the bump area may be formed to have a thickness of 2,000 μm 2 or more. Therefore, as shown in Fig. 6, by arranging the number of arrangements of the output bumps 124 in three or more columns, the coupling reliability can be improved.
Referring to FIG. 7, the driving chip 200 according to another embodiment includes a base body 210, an input bump 220, an output bump 230, and a conductive wire 240.
The input bumps 220 are arranged in one row along the first direction, which is the longitudinal direction of the base body 210.
The output bumps 230 are arranged in three rows along the first direction. The output bumps 230 arranged in each column are shifted by a fourth distance d4 based on the output bumps 230 arranged in other adjacent columns and a second direction line perpendicular to the first direction. The fourth distance d4 is determined in consideration of the wiring width of the conductive wire 240 and the separation distance between the output bump 230 and the conductive wire 240.
In addition, the output bumps 230 are arranged to be symmetrical with respect to the virtual center line CL that bisects the length of the base body 210. An anisotropic conductive film (ACF) is used to connect the driving chip 200 to an external display panel. The adhesive resin included in the anisotropic conductive film flows through the output bumps 230 when the driving chip 200 is coupled to the display panel. Therefore, by forming the output bump 230 in a symmetrical structure as described above, the adhesive resin can be uniformly spread over the entire area of the driving chip 200.
The conductive wire 240 extends in a straight line from the edge area of the base body 210 and is connected to each output bump 230.
Although not shown, the conductive wire 240 may be formed in a shape other than a straight line. That is, the output bumps 230 and the conductive wires 240 are formed at positions corresponding to the output bumps 230 of the other row while the conductive wires 240 extend from the edge region of the base body 210 to the respective output bumps 230. It is possible to form a larger separation distance between the). As such, by forming a large separation distance between the output bump 230 and the conductive line 240, a signal distortion that may occur between the adjacent output bump 230 and the conductive line 240 may be reduced.
In the present embodiment, the output bumps 230 are arranged in three rows, but may be arranged in four or more rows according to the increase in the number of output bumps 230.
Referring to FIG. 8, the driving chip 300 according to another embodiment includes a base body 310, an input bump 320, first to third output bumps 330, 340, and 350, and conductive wirings. . In the present embodiment, since the configuration of the input bump 320 and the first output bump 330 has the same structure as the input bump 122 and the output bump 124 shown in FIG. 2, the overlapping description thereof will be omitted. Let's do it.
The second and third output bumps 340 and 350 are formed at both sides of the input bump 320 and the first output bump 330. The second and third output bumps 340 and 350 are arranged in one or more rows along a second direction perpendicular to the longitudinal direction of the base body 310. In FIG. 8, the second and third output bumps 340 and 350 are arranged in two rows, but are preferably formed in the same array number as the first output bump 330.
For example, when the display panel to which the driving chip 300 is coupled is a liquid crystal display panel, the first output bump 330 is connected to data lines formed on the liquid crystal display panel, respectively, and the second and third output bumps 340 and 350 are connected to gate lines formed in the liquid crystal display panel in a direction perpendicular to the data lines.
In the above, various embodiments of the driving chip according to the present invention have been described. Hereinafter, a display device having the above described driving chip will be described.
9 is a perspective view illustrating a display device according to an exemplary embodiment of the present invention, and FIG. 10 is an enlarged view illustrating a pad part of the first substrate illustrated in FIG. 9. In the present embodiment, since the driving chip is the same as the driving chip 100 shown in FIGS. 1 and 2, the overlapping description is omitted and the same name and the same reference numeral will be used.
9 and 10, the display device 500 according to an exemplary embodiment of the present invention includes a driving chip 100 and a display panel 600.
The display panel 600 includes a first substrate 610, a second substrate 620 coupled to the first substrate 610, and a liquid crystal interposed between the first substrate 610 and the second substrate 620. (Not shown).
The first substrate 610 is a transparent glass substrate in which a thin film transistor (hereinafter, referred to as TFT) (not shown) as a switching element is formed in a matrix form. A data line is connected to a source terminal of the TFTs, and a gate line is connected to a gate terminal. In addition, a pixel electrode made of a transparent conductive material is connected to the drain terminal.
The first substrate 610 includes a pad part 700 connected to the driving chip 100 and a plurality of signal lines 730 and 740 connected to the pad part 700.
The pad unit 700 includes an input pad 710 and an output pad 720.
The input pads 710 are formed in one row on the first substrate 610. The input pad 710 is connected to a signal applying unit (not shown) connected to the first substrate 610 from the outside to apply an image signal to the first substrate 610 among the plurality of signal lines 730 and 740. Is connected to the input line 730. The input pad 710 is formed to correspond one-to-one with the input bump 122 in order to apply the image signal applied through the signal applying means and the input line 730 to the driving chip 100.
The output pads 720 are formed in three rows on the first substrate 610 by being spaced apart from the input pads 710 by a predetermined distance. The output pad 720 is formed to have a one-to-one correspondence with the output bump 124 formed on the driving chip 100. The output pad 720 is connected to an output line 740 for applying a driving signal output from the driving chip 100 to the first substrate 610 among the plurality of signal lines 730 and 740. The output line 740 is connected to the data line extending in one direction on the first substrate 610 and the gate line extending in another direction perpendicular to the one direction and insulated from and intersecting the gate line.
Meanwhile, the pad part 700 may be variously modified according to the bump arrangement of the driving chip 100. That is, since the input pad 710 and the output pad 720 of the pad part 700 correspond to the input bump 122 and the output bump 124 of the driving chip 100 in one-to-one correspondence, the driving chip 100 According to the arrangement of the input bump 122 and the output bump 124, the arrangement of the input pad 710 and the output pad 720 may also be changed.
The second substrate 620 is a substrate in which RGB pixels, which are color pixels that are expressed in a predetermined color when light passes, are formed by a thin film process. A common electrode made of a transparent conductive material is formed on the front surface of the second substrate 620.
In the display panel 600 having such a configuration, when power is applied to the gate terminal and the source terminal of the TFT, when the TFT is turned on, an electric field is formed between the pixel electrode and the common electrode. The arrangement angle of the liquid crystal injected between the first substrate 610 and the second substrate 620 is changed by the electric field, and the light transmittance is changed according to the changed arrangement angle to obtain an image having a desired gray scale.
Meanwhile, the driving chip 100 is connected to the pad part 812 of the first substrate 810.
Referring to FIG. 11, the driving chip 100 is mounted on the pad part 700 of the first substrate 610 by a COG process. That is, the driving chip 100 is interposed between the first substrate 610 and the first substrate 610, and then coupled to the first substrate 610 by an appropriate temperature and pressure applied from the outside.
The anisotropic conductive film 800 is composed of an adhesive resin 810 and a plurality of conductive particles 820 irregularly distributed in the adhesive resin 810.
The conductive particles 820 have a small spherical shape. The conductive particles 820 positioned between the input bump 122 and the input pad 710 and between the output bump 124 and the output pad 720 are deformed by a pressure applied from the outside, and thus the input bump 122 And electrically connect the input pad 710, the output bump 124, and the output pad 720, respectively.
The adhesive resin 810 is made of a thermosetting resin and is cured by heat applied from the outside to fix the driving chip 100 to the first substrate 610.
In the present exemplary embodiment, the display panel 600 has been described using the liquid crystal display panel as an example, but the display panel 600 may also display various displays such as a plasma display panel (PDP) and an organic electroluminescence (EL). It may include a panel.
According to such a driving chip and a display device having the same, the number of conductive bumps can be arranged in four or more rows by disposing the conductive bumps connected to the display panel to the center region of the driving chip using conductive wiring.
In addition, by forming the array number of the conductive bumps in four or more rows, the separation distance between the conductive bumps and the size of each conductive bump can be increased, thereby improving the coupling reliability with the display panel.
A base body including a driving circuit formed therein, the one surface including a cell region corresponding to the driving circuit and a peripheral region surrounding the cell region;
A plurality of conductive bumps arranged in the cell region of the one surface along a first direction parallel to a length direction of the base body;
A plurality of conductive terminals formed in the peripheral region of the one surface and electrically connected to the driving circuit;
And a plurality of conductive wires formed on the one surface and electrically connecting the conductive terminals and the conductive bumps.
The method of claim 1, wherein the conductive bumps
An input bump formed in at least one row; And
And a first output bump formed in at least three rows.
3. The driving chip of claim 2, wherein each column of the first output bumps is arranged spaced apart from each other by a first distance.
4. The method of claim 3, wherein the first output bumps arranged in the respective columns are spaced apart from each other by a second distance, and are arranged side by side in a second direction perpendicular to the first direction with the first output bumps in other adjacent columns. Drive chip characterized by the above-mentioned.
The method of claim 3, wherein the first output bumps arranged in the respective columns are moved by a third distance based on a second direction perpendicular to the first direction and the first output bumps in another adjacent column. Driving chip.
The driving chip of claim 5, wherein the first output bumps have a symmetrical structure.
The method of claim 2, wherein the conductive bumps
And second and third output bumps respectively formed on both sides of the input bump and the first output bump and arranged in one or more rows along a second direction perpendicular to the first direction. Driving chip.
A base body having a driving circuit therein, the one surface including a cell region corresponding to the driving circuit and a peripheral region adjacent to the cell region;
A plurality of conductive terminals connected to the driving circuit and formed in the peripheral region;
A plurality of conductive wires connected to the conductive terminals and extending to the cell region and formed on one surface of the base body; And
And a plurality of conductive bumps formed in the cell area and connected to the conductive wires and protruding from one surface of the base body.
The driving chip of claim 9, wherein the conductive bumps are arranged in four or more rows, and the conductive bumps arranged in each row are arranged in a first direction parallel to a length direction of the base body.
The method of claim 10, wherein the conductive terminals
An input terminal for receiving an input signal input from the outside to drive the driving circuit; And
And an output terminal for outputting an output signal output from the driving circuit to the outside.
The method of claim 11, wherein the conductive bumps
An input bump connected to the input terminal through a conductive wire and arranged in one or more rows along the first direction; And
And an output bump connected to the output terminal through the conductive wiring and arranged in at least three rows along the first direction.
The driving chip of claim 9, wherein the conductive wirings have the same wiring width and the separation distances between the conductive wirings adjacent to each other are the same.
The driving chip of claim 9, further comprising a shock absorbing layer interposed between the base body and the conductive lines.
It includes a drive circuit therein, one side is a base body consisting of a cell region corresponding to the drive circuit and a peripheral region surrounding the cell region, formed in the cell region of the one surface and parallel to the longitudinal direction of the base body A plurality of conductive bumps arranged along a first direction, a plurality of conductive terminals formed in the peripheral region of the one surface and electrically connected to the driving circuit, and formed in the peripheral region of the one surface of the conductive terminals A driving chip including a plurality of conductive wires electrically connecting the conductive bumps to the conductive bumps; And
And a display panel having a pad portion connected to the driving chip and a plurality of signal lines connected to the pad portion.
The method of claim 15, wherein the conductive bumps
And an output bump formed in at least three rows.
The method of claim 16, wherein the pad portion
An input pad connected to the input bump to input an input signal applied from the outside to the driving chip to drive the driving chip; And
And an output pad connected to the output bump to output an output signal output from the driving chip to the display panel.
The display device of claim 17, wherein the input pad and the output pad are symmetrically arranged with the input bump and the output bump.
The display device of claim 15, wherein the driving chip is electrically connected to the display panel via an anisotropic conductive film.
The display device of claim 15, wherein the display panel comprises a liquid crystal display panel which displays an image by changing an arrangement of liquid crystals.
KR1020040002965A 2004-01-15 2004-01-15 Driving chip and display apparatus having the same KR101000455B1 (en)
KR1020040002965A KR101000455B1 (en) 2004-01-15 2004-01-15 Driving chip and display apparatus having the same
PCT/KR2004/001394 WO2005067398A2 (en) 2004-01-15 2004-06-11 Driver chip and display apparatus
CNB2004800404512A CN100479139C (en) 2004-01-15 2004-06-11 Driver chip and display apparatus
TW093117653A TWI364574B (en) 2004-01-15 2004-06-18 Driver chip and display apparatus including the same
US10/881,156 US7450393B2 (en) 2004-01-15 2004-06-30 Driver chip and display apparatus including the same
JP2004334187A JP2005203745A (en) 2004-01-15 2004-11-18 Drive chip and display device comprising it
KR20050075476A KR20050075476A (en) 2005-07-21
KR101000455B1 true KR101000455B1 (en) 2010-12-13
ID=34747819
US (1) US7450393B2 (en)
JP (1) JP2005203745A (en)
KR (1) KR101000455B1 (en)
CN (1) CN100479139C (en)
TW (1) TWI364574B (en)
WO (1) WO2005067398A2 (en)
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2004-01-15 KR KR1020040002965A patent/KR101000455B1/en active IP Right Grant
2004-06-11 CN CNB2004800404512A patent/CN100479139C/en active IP Right Grant
2004-06-11 WO PCT/KR2004/001394 patent/WO2005067398A2/en active Application Filing
2004-06-18 TW TW093117653A patent/TWI364574B/en active
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CN100479139C (en) 2009-04-15
WO2005067398A2 (en) 2005-07-28
TWI364574B (en) 2012-05-21
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JP2005203745A (en) 2005-07-28
CN1906761A (en) 2007-01-31
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