Source: https://patents.google.com/patent/US7507999B2/en
Timestamp: 2019-08-25 21:11:17
Document Index: 450647103

Matched Legal Cases: ['Application No. 2001', 'Application No. 2001', 'Application No. 2002', 'Application No. 2001', 'Application No 2002', 'Application No 2002']

US7507999B2 - Semiconductor device and method for manufacturing same - Google Patents
US7507999B2
US7507999B2 US10/494,705 US49470504A US7507999B2 US 7507999 B2 US7507999 B2 US 7507999B2 US 49470504 A US49470504 A US 49470504A US 7507999 B2 US7507999 B2 US 7507999B2
US10/494,705
US20050173739A1 (en
2002-07-11 Priority to JP2002202527 priority Critical
2002-07-11 Priority to JP2002-202527 priority
2003-01-30 Priority to JP2003021692A priority patent/JP4463482B2/en
2003-01-30 Priority to JP2003-021692 priority
2003-07-09 Priority to PCT/JP2003/008736 priority patent/WO2004008512A1/en
2003-07-09 Application filed by Panasonic Corp filed Critical Panasonic Corp
2004-05-06 Assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD reassignment MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KITABATAKE, MAKOTO, KUSUMOTO, OSAMU, MIYANAGA, RYOKO, TAKAHASHI, KUNIMASA, UCHIDA, MASAO, YAMASHITA, KENYA
2005-08-11 Publication of US20050173739A1 publication Critical patent/US20050173739A1/en
2009-03-24 Publication of US7507999B2 publication Critical patent/US7507999B2/en
As shown in the lower part of FIG. 1 under magnification, the accumulation channel layer 104 has a structure in which two undoped layers 104 b (first semiconductor layers) of about 40 nm thickness composed of undoped SiC single crystals and two δ-doped layers 104 a (second semiconductor layers) of about 10 nm thickness having a peak concentration of an n-type impurity of 5×1017 cm−3, are alternately stacked, and an undoped layer 104 b of about 40 nm thickness is further stacked thereon. The δ-doped layer 104 a is formed sufficiently thin to allow spreading movement of carriers to the undoped layer 104 b under a quantum effect. The δ-doped layer 104 a is obtained using a crystal growing device and a crystal growing method both disclosed in the specifications and drawings of Japanese Patent Applications No. 2000-58964 and 2000-06210. Effects and benefits brought by the provision of this multiple δ-doped layer are as disclosed in Japanese Patent Applications No. 2002-500456 and 2001-566193.
Subsequently, in the step shown in FIG. 3C, a multiple δ-doped layer 104 x serving as a channel of a MISFET is formed on the surfaces of the high-resistance SiC layer 102, the well region 103 and the contact region 105. The multiple δ-doped layer 104 x has a structure in which two 40 nm-thick undoped layers 104 b (first semiconductor layers) and two 10 nm-thick δ-doped layers 104 a (second semiconductor layers) having a peak concentration of an n-type dopant of 1×1018 cm−3, are alternately stacked, and a 40 nm-thick undoped layer 104 b is further stacked thereon.
A crystal growing device and a crystal growing method both disclosed in Japanese Patent Application No. 2001-566193 are used to fabricate such a structure. More particularly, a SiC substrate is placed in a growth furnace for thermal CVD, hydrogen and argon are allowed to flow therethrough as diluent gases, and propane gas and silane gas are introduced into the growth furnace as source gases. The inside of the growth furnace is kept at a pressure of 0.0933 MPa, and the substrate temperature is adjusted at 1600° C. In this state, 40 nm-thick undoped layers are epitaxially grown. In order to form a doped layer, not only the above-mentioned diluent gases and source gases are supplied into the growth furnace, but also nitrogen is pulsatingly supplied as a doping gas thereinto. In such a state, 10 nm-thick δ-doped layers 104 a are epitaxially grown. The dopant concentration is controlled by adjusting the on/off time width or duty ratio of each pulse of a pulse valve. With this method, a multiple δ-doped layer 104 x is formed by alternately depositing three undoped layers 104 b and two δ-doped layers 104 a.
Next, the surface of the multiple δ-doped layer 104 x (undoped layer 104 b) is thermally oxidized, thereby forming a silicon oxide film 108 x. At this time, for example, the SiC substrate is placed in a quartz tube, bubbled oxygen is introduced into the quartz tube at a flow rate of 2.5 (1/min), and thermal oxidation is carried out for three hours with the substrate temperature kept at 1100° C. As a result, a thermal oxide film is formed to have a thickness of approximately 40 nm.
Next, in the step shown in FIG. 3E, the Ni film 111 x is subjected to annealing, for example, in the atmosphere of an inert gas, such as nitrogen, at a temperature of 1000° C. for two minutes. During this annealing, interdiffusion and reaction are caused between nickel (Ni) and silicon carbide (SiC), thereby forming a source electrode 111 principally composed of nickel silicide. Then, a part of the multiple δ-doped layer 104 x which is not integrated into the source electrode 111 forms an accumulation channel layer 104.
As shown in the upper left of FIG. 4 under magnification, the channel layer 204 has a structure in which two undoped layers (lightly-doped layers) 204 b of about 40 nm thickness composed of undoped SiC single crystals and two δ-doped layers (heavily-doped layers) 204 a of about 10 nm thickness having a peak concentration of n-type impurity of 1×1018 cm−3, are alternately stacked, and an undoped layer 204 b of about 40 nm thickness is stacked thereon. The n-type doped layers 204 a are formed sufficiently thin to allow spreading movement of carriers to the undoped layers 204 b under a quantum effect. Such a δ-doped layer is obtained using a crystal growing device and a crystal growing method both disclosed in the specification and drawing of Japanese Patent Application No. 2001-566193. Effects and benefits brought by the provision of this multiple δ-doped layer are as disclosed in Japanese Patent Application No. 2002-500456.
Next, a multiple δ-doped layer 204 x serving as a channel of a MISFET is formed along the wall surface of the trench 206, i.e., on the surfaces of the high-resistance SiC layer 202, the base layer 203 and the contact region 205. The multiple δ-doped layer 204 x has a structure in which two 40 nm-thick undoped layers 204 b and two 10 nm-thick δ-doped layers 204 a each having a peak concentration of an n-type dopant of 1×1018 cm−3, are alternately stacked, and a 40 nm-thick undoped layer 204 b is further stacked thereon.
A crystal growing device and a crystal growing method both disclosed in the specification and drawings of Japanese Patent Application No. 2001-566193 are used to fabricate such a structure. More particularly, the SiC substrate is placed in a growth furnace for the thermal CVD, hydrogen and argon are allowed to flow therethrough as diluent gases, and propane gas and silane gas are introduced into the growth furnace as source gases. The inside of the growth furnace is kept at a pressure of 0.0933 MPa, and the substrate temperature is adjusted at 1600° C. In this state, 40 nm-thick undoped layers 204 b are epitaxially grown. In order to form a doped layer, not only the above-mentioned diluent gases and source gases are supplied into the growth furnace, but also nitrogen is pulsatingly supplied as a doping gas thereinto. In such a state, 10 nm-thick δ-doped layers 204 a are epitaxially grown. The dopant concentration is controlled by adjusting the on/off time width or the duty ratio of each pulse of a pulse valve. With this method, a multiple δ-doped layer 204 x is formed by alternately depositing three undoped layers 204 band two δ-doped layers 204 a.
Next, in the step shown in FIG. 5D, the surface of the multiple δ-doped layer 204 x(undoped layer 204 b) is thermally oxidized, thereby forming a silicon oxide film 208 x. At that time, for example, the SiC substrate is placed in a quartz tube, bubbled oxygen is introduced into the quartz tube at a flow rate of 2.5 (1/min), and thermal oxidation is carried out for three hours with the substrate temperature kept at 1100° C. As a result, a thermal oxide film is formed to have a thickness of approximately 40 nm.
Next, in the step shown in FIG. 5F, the Ni film 211 x is subjected to annealing, for example, in the atmosphere of an inert gas, such as nitrogen, at a temperature of 1000° C. for two minutes. During this annealing, interdiffusion and reaction are caused between nickel (Ni) and silicon carbide (SiC), thereby forming a source electrode 211 principally composed of nickel silicide. Then, a part of the multiple δ-doped layer 204 x which is not integrated into the source electrode 211 forms a channel layer 204. At this time, the nickel film located on the back surface of the SiC substrate 201 also forms nickel silicide, thereby forming a drain electrode 212.
FIG. 6 is a cross sectional view showing a schematic structure of a lateral p-channel MISFET according to a third embodiment. As shown in this figure, on an n-type SiC substrate 301 doped with nitrogen (n-type impurity) at a concentration of 1×1018 atoms·cm−3, there are provided an n-type base region 302 doped with nitrogen at a mean concentration of about 1×1017 atoms—cm−3, a multiple δ-doped layer 304 (active region) formed in the base region 302, a gate insulating film 308 of SiO2 formed on the multiple δ-doped layer 304, a gate electrode 310 composed of a Ni alloy film formed on the gate insulating film 308, source and drain electrodes 311 a and 311 b composed of a Ni alloy film contacting the multiple δ-doped layer 304 and the base region 302, and a back-surface electrode 312 composed of a Ni alloy film in ohmic contact with the back surface of the SiC substrate 301.
As shown in the right part of FIG. 6 under magnification, the multiple δ-doped layer 304 is composed of three δ-doped layers 304 a of about 10 nm thickness containing aluminum at a high concentration (e.g., 1×1018 atoms·cm−3) and serving as a p-type doped layer and four undoped layers 304 b of about 40 nm thickness composed of undoped SiC single crystals, which are alternately stacked. The p-type doped layer 304 a is formed sufficiently thin to allow spreading movement of carriers to the undoped layer 304 b under a quantum effect. Thus, the effects as disclosed in Japanese Patent Application No 2002-500456 can be achieved.
FIG. 7 is a cross sectional view showing the structure of an ACCUFET according to a fourth embodiment of the present invention. As shown in this figure, on a p-type SiC substrate 401 doped with aluminum (p-type impurity) at a concentration of 1×1018 atoms·cm−3, there are provided a p-type lower region 402 doped with aluminum at a mean concentration of about 1×1017 atoms·cm−3, an n-type multiple δ-doped layer 404 (active region) formed on the lower region 402 and doped with nitrogen at a mean concentration of about 1×1017 atoms·cm−3, a gate insulating film 408 of SiO2 formed on the multiple δ-doped layer 404, a gate electrode 410 of a Ni alloy film formed on the gate insulating film 408, source and drain electrodes 411 a and 411 b of a Ni alloy film contacting the multiple δ-doped layer 404 and the lower region 402, and a back-surface electrode 412 of an Al/Ni layered film in ohmic contact with the back surface of the SiC substrate 401.
As shown in the right part of FIG. 7 under magnification, the multiple δ-doped layer 404 is composed of three δ-doped layers 404 a of about 10 nm thickness containing nitrogen at a high concentration (e.g., 1×1018 atoms·cm−3) and four undoped layers 404 b of about 40 nm thickness composed of undoped SiC single crystals, which are alternately stacked. The δ-doped layer 404 a is formed sufficiently thin to allow spreading movement of carriers to the undoped layer 404 b under a quantum effect. Thus, the effects as disclosed in Japanese Patent Application No 2002-500456 can be achieved. More particularly, during operation, quantum levels resulting from a quantum effect occur in the δ-doped layer 404 a, and the wave function of electrons localized in the δ-doped layer 404 a expands to a certain degree. What results is a state of distribution in which electrons are present not only in the δ-doped layer 404 a but also in the undoped layer 404 b. If the potential of the multiple δ-doped layer 404 is increased in this state so that electrons have spread out from the δ-doped layer 404 a to the undoped layer 404 b due to a quantum effect, electrons are constantly supplied to the δ-doped layer 404 a and the undoped layer 404 b. Since the electrons flow in the undoped layer 404 b of low impurity concentration, carrier scattering by impurity ions is reduced, thereby providing a high channel mobility. On the other hand, when the device is in the off state, the whole multiple δ-doped layer 404 is depleted and electrons are not present in the multiple δ-doped layer 404. Therefore, the breakdown voltage is defined by the undoped layer 404 b of low impurity concentration, so that a high breakdown voltage can be obtained in the entire multiple δ-doped layer 404. Accordingly, in the ACCUFET having a structure in which the multiple δ-doped layer 404 is utilized to pass a large current between the source and drain, a high channel mobility and a high breakdown voltage can be achieved at the same time.
As shown in this figure, a multiple δ-doped layer 504 (active region) formed basically by the same method as described in the first embodiment is provided on the principal surface of an n-type SiC substrate 501 which is the (0001) off plane. The multiple δ-doped layer 504 is formed such that three 40 nm-thick undoped layers 504 b (lightly-doped layers) each having a nitrogen concentration of about 5×1015 atoms·cm−3 and three 10 nm-thick δ-doped layers 504 a (heavily-doped layers) each having a peak concentration of nitrogen of 1×1018 atoms·cm−3 are alternately stacked. The thickness of the SiC substrate 501 is about 100 μm. The SiC substrate 501 is not doped with impurities to substantially become a semi-insulating state.
As shown in this figure, a multiple δ-doped layer 604 (active region) formed basically by the same method as described in the first embodiment is provided on the principal surface of an n-type SiC substrate 601 which is the (0001) off plane. The multiple δ-doped layer 604 is formed such that three 40 nm-thick undoped layers 604 b(lightly-doped layers) each having a nitrogen concentration of about 5×1015 atoms·cm−3 and three 10 nm-thick δ-doped layers 604 a (heavily-doped layers) each having a peak concentration of nitrogen of 1×1018 atoms·cm−3 are alternately stacked. The thickness of the SiC substrate 601 is about 100 μm. The SiC substrate 601 is not doped with impurities to substantially become a semi-insulating state.
As shown in the lower part of FIG. 10 under magnification, the first multiple δ-doped layer 712 is composed of two δ-doped layers 712 a of about 10 nm thickness containing nitrogen at a high concentration (e.g., 1×1018 atoms·cm−3) and two undoped layers 712 b of about 40 nm thickness composed of undoped 4H—SiC single crystals, which are alternately stacked. On the other hand, the second multiple δ-doped layer 713 is composed of two δ-doped layers 713 a that are p-type doped layers of about 10 nm thickness containing aluminum at a high concentration (e.g., 1×1018 atoms·cm−3) and two undoped layers 713 b of about 40 nm thickness composed of undoped 4H—SiC single crystals, which are alternately stacked. Each of the δ-doped layers 712 a and the p-type doped layers 713 a is formed sufficiently thin to allow spreading movement of carriers to the undoped layer 712 b or 713 b under a quantum effect.
Next, a δ-doped layer 712 a (heavily-doped layer) of about 10 nm thickness is formed on the first lightly-doped layer 715 by epitaxial growth. A level difference in impurity concentration can be produced easily by reducing the period (pulse width) during which the pulse valve is opened during the formation of the lightly-doped layer 715 and increasing the period (pulse width) during the formation of the δ-doped layer 712 a.
When the epitaxial growth of the δ-doped layer 712 a is completed, the propane gas and the silane gas are supplied to the space above the SiC substrate 701 while the supply of the doping gas is halted, i.e., with the pulse valve closed completely. As a result, an undoped layer 712 b (lightly-doped layer) of about 40 nm thickness composed of undoped SiC single crystals is grown epitaxially over the principal surface of the SiC substrate 701.
The two following steps as described just above are repeated three times: (i) the step of forming a δ-doped layer 712 a by introducing the doping gas through the opening and closing of the pulse valve while simultaneously supplying the source gases; and (ii) the step of forming an undoped layer 712 b by supplying only the source gases without supplying the doping gas. Thereby, a first multiple δ-doped layer 712 is formed in which three δ-doped layers 712 a and three undoped layers 712 b are alternately stacked. At this time, one undoped layer 712 b is formed as the uppermost layer, and the thickness of the uppermost undoped layer 712 b is adjusted to be about 10 nm larger than those of the other undoped layers 712 b. A mean concentration of nitrogen in the first multiple δ-doped layer 712 is about 1×1017 atoms-cm−3, and the total thickness of the first multiple δ-doped layer 712 is about 190 nm.
Then, similarly to the foregoing procedure for forming the first multiple δ-doped layer 712, the two following steps are repeated three times: (i) the step of forming a p-type doped layer 713 a (heavily-doped layer) of about 10 nm thickness by introducing the doping gas (hydrogen gas containing trimethyl aluminum gas) through the opening and closing of the pulse valve while simultaneously supplying the source gases, and (ii) the step of forming an undoped layer 713 b of about 40 nm thickness by supplying only the source gases, while keeping the pulse valve closed so as not to supply the doping gas. Thereby, a second multiple δ-doped layer 713 is formed in which three p-type doped layers 713 aand three undoped layers 713 b are alternately stacked. At that time, one undoped layer 713 b is formed as the uppermost layer, and the thickness of the uppermost undoped layer 713 b is adjusted to be about 10 nm larger than those of the other undoped layers 713 b. A mean concentration of aluminum in the second multiple δ-doped layer 713 is about 1×1017 atoms·cm−3, and the total thickness of the second multiple δ-doped layer 713 after the completion of thermal oxidation is about 190 nm.
Next, in the step shown in FIG. 12B, in the region where a MISFET is to be formed, a surface portion (corresponding to a thickness of about 10 nm) of the uppermost undoped layer 713 b of the second multiple δ-doped layer 713 is thermally oxidized at a temperature of about 1100° C. As a result, a gate insulating film 741 composed of a thermal oxide film is formed to have a thickness of about 20 nm. Then, openings are formed by removing the portions of the gate insulating film 741 in which source and drain electrodes are to be formed, and a Ni film serving as source and drain electrodes 744 and 745 is deposited therein by vacuum vapor deposition. Thereafter, the deposited Ni film is patterned in the form of electrodes. At the same time, a Ni film serving as an ohmic electrode 723, a source electrode 734, and a drain electrode 735 is deposited on the first multiple δ-doped layer 712 of the Schottky diode 720, and the deposited Ni film is patterned in the form of electrodes. Furthermore, annealing is performed on the same conditions as in the first and second embodiments to diffuse Ni of the Ni film into the multiple δ-doped layers. As a result, source electrodes 734 and 744, drain electrodes 735 and 745, and an ohmic electrode 723 are formed, each to make an ohmic contact with the heavily-doped layers of the corresponding multiple δ-doped layer. Subsequently, a nickel (Ni) alloy film is vapor-deposited on the gate insulating film 741 to form a gate electrode 742 composed of the nickel alloy film and having a gate length of about 1 μm. On the other hand, nickel (Ni) is vapor-deposited on the regions of the first multiple δ-doped layer 712 on which a Schottky diode 720 and a MESFET 730 are to be formed so that Schottky electrodes 721 and a Schottky gate electrode 732 each composed of nickel are formed. Further, platinum (Pt) is vapor-deposited on the underlying insulating film 751 of the capacitor 750 to form a lower electrode 752 composed of platinum.
US10/494,705 2002-07-11 2003-07-09 Semiconductor device and method for manufacturing same Active 2023-10-05 US7507999B2 (en)
JP2002202527 2002-07-11
JP2002-202527 2002-07-11
JP2003-021692 2003-01-30
JP2003021692A JP4463482B2 (en) 2002-07-11 2003-01-30 Misfet and a method of manufacturing the same
PCT/JP2003/008736 WO2004008512A1 (en) 2002-07-11 2003-07-09 Semiconductor device and method for manufacturing same
US20050173739A1 US20050173739A1 (en) 2005-08-11
US7507999B2 true US7507999B2 (en) 2009-03-24
ID=30117432
US10/494,705 Active 2023-10-05 US7507999B2 (en) 2002-07-11 2003-07-09 Semiconductor device and method for manufacturing same
US (1) US7507999B2 (en)
EP (2) EP1968104A3 (en)
JP (1) JP4463482B2 (en)
CN (1) CN100353498C (en)
DE (1) DE60325690D1 (en)
WO (1) WO2004008512A1 (en)
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2003-01-30 JP JP2003021692A patent/JP4463482B2/en active Active
2003-07-09 US US10/494,705 patent/US7507999B2/en active Active
2003-07-09 EP EP08011174A patent/EP1968104A3/en not_active Withdrawn
2003-07-09 WO PCT/JP2003/008736 patent/WO2004008512A1/en active Application Filing
2003-07-09 EP EP03764156A patent/EP1450394B1/en not_active Expired - Fee Related
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CN1592950A (en) 2005-03-09
JP2004096061A (en) 2004-03-25
JP4463482B2 (en) 2010-05-19
CN100353498C (en) 2007-12-05
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EP1968104A3 (en) 2008-11-05
DE60325690D1 (en) 2009-02-26
EP1450394B1 (en) 2009-01-07
EP1450394A1 (en) 2004-08-25
US20050173739A1 (en) 2005-08-11
EP1968104A2 (en) 2008-09-10
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Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KUSUMOTO, OSAMU;KITABATAKE, MAKOTO;TAKAHASHI, KUNIMASA;AND OTHERS;REEL/FRAME:016548/0068