Source: http://www.google.com/patents/US4906595?dq=6,108,703
Timestamp: 2016-07-27 06:35:59
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Matched Legal Cases: ['art 10', 'art 11', 'art 10', 'art 10', 'art 10', 'art 11']

Patent US4906595 - Method of manufacturing a semiconductor device, in which a silicon wafer is ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA method of manufacturing a semiconductor device, in which a surface (1) of a silicon wafer (2) is locally provided with an oxidation mask (3), whereupon the wafer is subjected to an oxidation treatment by heating it in an oxidizing gas mixture. According to the invention, the wafer is heated during...http://www.google.com/patents/US4906595?utm_source=gb-gplus-sharePatent US4906595 - Method of manufacturing a semiconductor device, in which a silicon wafer is provided at its surface with field oxide regionsAdvanced Patent SearchPublication numberUS4906595 APublication typeGrantApplication numberUS 07/388,294Publication dateMar 6, 1990Filing dateJul 21, 1989Priority dateDec 8, 1986Fee statusPaidAlso published asCA1330195C, DE3777603D1, EP0274779A1, EP0274779B1Publication number07388294, 388294, US 4906595 A, US 4906595A, US-A-4906595, US4906595 A, US4906595AInventorsPaulus A. van der Plas, Wilhelmina C. E. SnelsOriginal AssigneeU.S. Philips CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (15), Non-Patent Citations (22), Referenced by (41), Classifications (25), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetMethod of manufacturing a semiconductor device, in which a silicon wafer is provided at its surface with field oxide regions
US 4906595 AAbstract
A method of manufacturing a semiconductor device, in which a surface (1) of a silicon wafer (2) is locally provided with an oxidation mask (3), whereupon the wafer is subjected to an oxidation treatment by heating it in an oxidizing gas mixture. According to the invention, the wafer is heated during the treatment in the oxidizing gas mixture to a temperature of 950� to 1050� C. Water is then added to the oxidizing gas mixture. The quantity of added water is initially less than 30% by volume and later larger. Thus, in a comparatively short time a comparatively thick layer of oxide can be formed without defects being formed in silicon lying under the oxide.
1. A method of manufacturing semiconductor devices having defect free areas below field oxide layers comprising the steps offorming an oxidation preventing mask locally on a surface of a silicon wafer, and oxidizing unmasked portions of said silicon wafer by carrying out in sequence the steps of heating said silicon wafer to a temperature range of 950� C. to 1050� C., initially passing a wet oxidizing gas mixture over said silicon wafer in said temperature range to initially oxidize said unmasked portions of said silicon wafer to a thickness of up to at least 50 nm, said wet oxidizing gas mixture having a water content of at most 30% by volume to prevent defects from forming in the underlying silicon wafer, then adding additional water to said oxidizing gas mixture in said temperature range to bring said water content to an amount of more than 30% by volume, and continuing passing said oxidizing gas mixture with the added water over said silicon wafer until a desired thickness of oxide is formed on said silicon wafer. 2. A method according to claim 1, wherein said step of passing said oxidizing gas mixture is carried out to initially oxidize said silicon wafer to a thickness of 50 to 200 nm.
U.S. Pat. No. 4,551,910 discloses a method of the kind mentioned in the opening paragraph, in which the oxidation treatment is carried out initially under dry conditions and then under wet conditions. During the dry oxidation in a dry gas mixture containing hydrochloric acid, the wafer is heated to a temperature of 1000� C., while during the wet oxidation in steam it is heated to a temperature of 920� C. The dry oxidation is carried out until a layer of silicon oxide has formed having a thickness of about 50 nm, while the subsequent wet oxidation is carried out until the layer of silicon oxide has reached a desired thickness. As an oxidation mask a layer of silicon nitride is used, which is formed in part by thermal nitridation of the silicon and which is provided for the remaining part at a low pressure by deposition from the gaseous phase by means of an LPCVD process.
When, as described, the oxidation is initially carried out under dry conditions, the formation of defects in the silicon during the subsequent wet oxidation is counteracted. However, the known method has the disadvantage that it takes a comparatively long time to form a layer of oxide. In the manufacture of integrated circuits, this means either that the rate of passage of the wafers to be treated is low or that additional furnaces have to be arranged. For the formation of, for example, a layer of oxide having a thickness of 800 nm, a wafer would be treated for about 9 hours, about 1 hour of this treatment being a dry oxidation at 1000� C. and about 8 hours being a wet oxidation at 920� C. The time required to reduce the temperature in a furnace from 1000� C. to 920� C. then has not yet been taken into consideration.
According to the invention, the method mentioned in the opening paragraph is for this purpose characterized in that during the heat treatment in the oxidizing gas mixture the wafer is heated to a temperature of 950 to 1050� C. and in that water is then added to the oxidizing gas mixture in a quantity which is increased during the oxidation treatment from less than 30% by volume to more than 30% by volume. Thus, in a comparatively short time a layer of field oxide can be formed without defects being formed in the underlying silicon.
The invention is based on the recognition of the fact that, in order to avoid the formation of defects in the silicon during the oxidation, this oxidation must be carried out at a rate which does not exceed a critical value. Since the oxidation is effected in a gas mixture of a fixed composition and at a fixed temperature at a rate which becomes lower as the quantity of oxide formed increases, in other words at a rate which is a maximum at the beginning of the oxidation, it is of major importance that both the composition of the oxidizing gas mixture and the temperature at which the oxidation is carried out are determined carefully at the beginning of the oxidation. Experiments have shown that, when the oxidation temperature is not higher than 1050� C. and the gas mixture does not contain more than 30% by volume of water, the oxidation is initially effected at such a low rate that no defects are formed in the silicon. When the gas mixture then contains more than 30% by volume of water, defects are formed in the silicon during the oxidation, however. When the quantity of water in the gas mixture is increased to more than 30% by volume practically immediately after the beginning of the oxidation when, for example, about 100 nm oxide has formed, no defects are formed in the silicon. Under the given conditions, the critical rate is apparently not exceeded, while the oxidation process can nevertheless be carried out at a comparatively high rate.
Experiments have further shown that, if the oxidation is carried out at a temperature of less than 950� C. a lateral oxidation occurs under the edges of the oxidation mask, which is much larger than that occurring at 1000� C. If the oxidation is carried out at a temperature higher than 1050� C., an extreme lateral oxidation is also found to occur, which moreover has an undesired form.
During the oxidation treatment, the composition of the oxidizing gas mixture is modified. According to the invention, the oxidation treatment is carried out in such a manner that during the heat treatment in the oxidizing gas mixture the wafer is heated to a temperature of 950� to 1050� C. and that water is then added to the oxidizing gas mixture in a quantity which is increased during the oxidation treatment from less than 30% by volume to more that 30% by volume. Besides after the gas mixture comprises, for example, oxygen and nitrogen. For the method according to the invention, the quantity of water is important because this is determinative of the rate at which the oxidation will be effected.
By means of the method according to the invention a layer of field oxide can be formed in a comparatively short time without defects being formed in the underlying silicon. In order to avoid that defects are formed in the silicon during oxidation, the oxidation should be carried out at a rate which does not exceed a critical value. Since the oxidation is effected at a fixed temperature and in a gas mixture of a fixed composition at a rate which is a maximum at the beginning of the oxidation and then decreases, special attention should be paid to the rate at the beginning of the oxidation. The oxidation rate is higher as the quantity of water in the gas mixture is larger. It has been found that, if at the beginning of the oxidation the oxidizing gas mixture contains at 1000� C. more than 30% by volume of water, defects are formed in the silicon; but if the oxidizing gas mixture contains less than 30% by volume this is not the case. Practically immediately after the beginning of the oxidation when, for example, only 100 nm of oxide has formed, the quantity of water in the oxidizing gas mixture can be increased to more than 30% by volume without the formation of defects in the silicon being promoted. The critical rate is then apparently not exceeded. Preferably, the quantity of water in the oxidizing gas mixture is increased to more than 80% by volume. Also in this case, no defects are formed in the silicon, while the oxidation is effected at a very high rate.
During the oxidation treatment, a part of the silicon located below the oxidation mask 3 is also oxidized. The oxide formed by this lateral oxidation can be distinguished by a comparatively thin part 10 and a comparatively thick part 11. It has been found that, if the oxidation is carried out at a temperature of less than 950� C., the comparatively thin part 10 of the oxide becomes very long. If, when the field oxide 8 having a thickness of 800 nm has formed at a temperature of 1000� C., this part 10 still has a length of 300 nm, but this part 10 has a length of more than 600 nm if the oxidation treatment is carried out at 900� C. This is of course undesirable, more particularly in the manufacture of MOS transistors of dimensions in the submicron range. If the oxidation treatment is carried out at a temperature which is higher than 1050� C., the thick part 11 of the oxide obtains undesired dimensions. The oxide then assumes the profile indicated diagrammatically by a dotted line 12. As will appear from the following, this has also great disadvantages for the formation of MOS transistors having dimensions in the submicron range.
The oxidation treatment is then carried out, for example, in such a manner that the wafer is slipped into a furnace of 850� C., whereupon, while nitrogen is passed to the furnace, the silicon wafer is heated in about 20 minutes from 850� C. to a temperature of 1000� C. Subsequently, at 1000� C. a gas mixture is passed to the furnace with 6000 scc of nitrogen, 1125 scc of hydrogen and 1050 scc of oxygen per minute. In the furnace 1125 scc of water vapour is then formed in this gas mixture by combustion of the whole quantity of hydrogen, which means that the gas mixture contains about 15% by volume of water. This first processing step of the actual oxidation treatment is carried out for 20 minutes, after which also at a temperature of 1000� C. a gas mixture is passed to the oxydation furnace with 6600 scc of hydrogen and 4200 scc of oxygen per minute. In the furnace 6600 scc of water vapour is formed in this gas mixture, which means that the gas mixture contains about 88% by volume of water. This second processing step of the oxidation treatment is carried out for 3 hours and 40 minutes. After termination of the oxidation treatment, while nitrogen is passed to the furnace, the temperature of this furnace is decreased again in about 30 minutes to 850� C., after which the wafer is removed from the furnace. During the first processing step, about 50 nm of oxide is formed, while during the second processing step about 750 nm of oxide is formed. About 800 nm of oxide in all is consequently formed in 4 hours. Defects could not be found in the underlying oxide after the oxide was removed and a conventional etching treatment was carried out for indicating defects.
After a thin gate oxide layer 26 having a thickness of about 20 nm has been provided - by heating the wafer for 30 minutes in dry oxygen - , gate electrodes 28 and 29 covered with an oxide layer 27 are provided in a usual manner. Subsequently, an implantation with phosphorous ions is carried out at an energy of 50 keV and a dose of 1013 ions per cm2, in which lightly doped zones 30 are formed. Although they are indicated only in the p retrograde well 20, they are also provided in the n retrograde well, but in the latter case they are overdoped after having been provided with the aid of a photoresist mask 31 with boron ions by an implantation with BF ions having an energy of 55 keV and a dose of 2�1015 ions per cm2. Thus, the source zone 32 and the drain zone 33 are formed in the n retrograde well 17.
For forming the gate oxide 26, for annealing implanted zones for a getter treatment, and for carrying out a few oxidations not described further (to obtain a clean silicon surface, this surface is sometimes oxidized, after which the oxide is etched away, the wafer is heated during the whole process for not longer than 1 hour in all at about 950� C. It clearly appears from the foregoing that the formation of the field oxide 8 - which in connection with the formation of the retrograde wells 17 and 20 must be extra thick - provides the most important contribution to a temperature budget, which in this embodiment comprises a heat treatment for 4 hours in all at 1000� C. This temperature budget should be kept as low as possible because during the heat treatment of the wafer at about 1000� C. doping atoms diffuse from the base layer 4 into the epitaxial top layer 5 of the silicon wafer 2, as a result of which not only the usable - lightly doped - part of the top layer becomes smaller, but also the transition between the two layers 4 and 5 becomes less abrupt. For a satisfactory operation of MOS transistors having dimensions in the submicron range, it is of major importance that the transistion between the base layer 4 and the epitaxial top layer 5 is as abrupt as possible and that it lies as close as possible below the retrograde wells 17 and 20. With the aforementioned temperature budget comprising a heat treatment for 4 hours at 1000� C., the layer 4 diffuses less than 1 um into the epitaxial top layer 5.
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257/E21.558, 148/DIG.117, 257/E21.285, 148/DIG.118, 427/255.26, 257/E21.258, 438/773International ClassificationH01L21/76, H01L21/316, H01L21/32, H01L21/31, H01L21/762Cooperative ClassificationY10S148/118, Y10S148/117, H01L21/02255, H01L21/31662, H01L21/76218, H01L21/32, H01L21/02238European ClassificationH01L21/02K2E2B2B2, H01L21/02K2E2J, H01L21/316C2B2, H01L21/762B4B2, H01L21/32Legal EventsDateCodeEventDescriptionAug 26, 1993FPAYFee paymentYear of fee payment: 4Sep 2, 1997FPAYFee paymentYear of fee payment: 8Sep 4, 2001FPAYFee paymentYear of fee payment: 12RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services