Source: http://www.patentsencyclopedia.com/app/20140139685
Timestamp: 2020-02-24 17:56:23
Document Index: 427772356

Matched Legal Cases: ['Application No. 61', 'Application No. 61', 'Application No. 61', 'Application No. 61', 'Application No. 61', 'Application No. 61']

LOW POWER AND SMALL FORM FACTOR INFRARED IMAGING - Patent application
Patent application title: LOW POWER AND SMALL FORM FACTOR INFRARED IMAGING
Inventors: Mark Nussmeier (Goleta, CA, US) Eric A. Kurth (Santa Barbara, CA, US) Eric A. Kurth (Santa Barbara, CA, US) Nicholas Hogasten (Santa Barbara, CA, US) Theodore R. Hoelter (Goleta, CA, US) Theodore R. Hoelter (Goleta, CA, US) Katrin Strandemar (Rimbo, SE) Katrin Strandemar (Rimbo, SE) Pierre Boulanger (Goleta, CA, US) Pierre Boulanger (Goleta, CA, US) Barbara Sharp (Santa Barbara, CA, US) Barbara Sharp (Santa Barbara, CA, US)
Patent application number: 20140139685
1. A system comprising: a focal plane array (FPA) comprising: an array of infrared sensors adapted to image a scene; a bias circuit adapted to provide a bias voltage to the infrared sensors, wherein the bias voltage is selected from a range of approximately 0.2 volts to approximately 0.7 volts; and a read out integrated circuit (ROIC) adapted to provide signals from the infrared sensors corresponding to captured image frames.
5. The system of claim 4, wherein: the frame rate is a first frame rate; and the system further comprises a processor adapted to combine at least a subset of the captured image frames to provide processed image frames at a second frame rate selected from a range of approximately 30 Hz to approximately 60 Hz with reduced noise in comparison with the captured image frames.
10. The system of claim 1, further comprising a processor adapted to process an intentionally blurred image frame, wherein the blurred image frame comprises blurred thermal image data associated with the scene and noise introduced by the system, wherein the processor is adapted to: use the blurred image frame to determine a plurality of non-uniformity correction (NUC) terms to reduce at least a portion of the noise; and apply the NUC terms to the captured image frames.
11. A method comprising: providing a bias voltage from a bias circuit of a focal plane array (FPA) to an array of infrared sensors of the FPA, wherein the bias voltage is selected from a range of approximately 0.2 volts to approximately 0.7 volts; imaging the scene using the infrared sensors; and providing signals from the infrared sensors corresponding to captured image frames of the scene using a read out integrated circuit (ROIC) of the FPA.
15. The method of claim 14, wherein: the frame rate is a first frame rate; and the method further comprises combining at least a subset of the captured image frames to provide processed image frames at a second frame rate selected from a range of approximately 30 Hz to approximately 60 Hz with reduced noise in comparison with the captured image frames.
20. The method of claim 11, further comprising: receiving an intentionally blurred one of the captured image frames, wherein the blurred image frame comprises blurred thermal image data associated with the scene and noise introduced by an infrared imaging system; processing the blurred image frame to determine a plurality of non-uniformity correction (NUC) terms to reduce at least a portion of the noise; and applying the NUC terms to the captured image frames.
[0001] This application is a continuation of International Patent Application No. PCT/US2012/41744 filed Jun. 8, 2012 which claims priority to U.S. Provisional Patent Application No. 61/656,889 filed Jun. 7, 2012 and entitled "LOW POWER AND SMALL FORM FACTOR INFRARED IMAGING" which are both hereby incorporated by reference in their entirety.
[0002] International Patent Application No. PCT/US2012/41744 claims the benefit of U.S. Provisional Patent Application No. 61/545,056 filed Oct. 7, 2011 and entitled "NON-UNIFORMITY CORRECTION TECHNIQUES FOR INFRARED IMAGING DEVICES" which is hereby incorporated by reference in its entirety.
[0003] International Patent Application No. PCT/US2012/41744 claims the benefit of U.S. Provisional Patent Application No. 61/495,873 filed Jun. 10, 2011 and entitled "INFRARED CAMERA PACKAGING SYSTEMS AND METHODS" which is hereby incorporated by reference in its entirety.
[0004] International Patent Application No. PCT/US2012/41744 claims the benefit of U.S. Provisional Patent Application No. 61/495,879 filed Jun. 10, 2011 and entitled "INFRARED CAMERA SYSTEM ARCHITECTURES" which is hereby incorporated by reference in its entirety.
[0005] International Patent Application No. PCT/US2012/41744 claims the benefit of U.S. Provisional Patent Application No. 61/495,888 filed Jun. 10, 2011 and entitled "INFRARED CAMERA CALIBRATION TECHNIQUES" which is hereby incorporated by reference in its entirety.
[0006] One or more embodiments of the invention relate generally to thermal imaging devices and more particularly, for example, to the implementation and operation of such devices in a manner appropriate for low power and small form factor applications.
[0007] Infrared imaging devices, such as infrared cameras or other devices, are typically implemented with an array of infrared sensors. However, existing infrared sensors and related circuitry are typically sensitive to noise and other phenomena. Because of such sensitivity, infrared sensors and related circuitry are often implemented with power supply arrangements wherein multiple voltage supply paths provide different voltages to various circuit components. However, such implementations are typically complex and may be relatively inefficient.
[0008] In addition, during operation at conventional voltages and currents, infrared imaging devices may experience significant self-heating which may cause various undesirable thermal effects. Nevertheless, conventional techniques to reduce such effects are also less than ideal and may rely on active cooling or other measures that increase the cost and complexity of infrared imaging devices.
[0009] Various techniques are provided for implementing and operating infrared imaging devices, especially for low power and small form factor applications. In one embodiment, a system includes a focal plane array (FPA) comprising: an array of infrared sensors adapted to image a scene; a bias circuit adapted to provide a bias voltage to the infrared sensors, wherein the bias voltage is selected from a range of approximately 0.2 volts to approximately 0.7 volts; and a read out integrated circuit (ROIC) adapted to provide signals from the infrared sensors corresponding to captured image frames.
[0010] In another embodiment, a system includes a focal plane array (FPA) comprising: an array of infrared sensors adapted to image a scene, wherein a size of the array of infrared sensors is less than approximately 160 by 120; and a read out integrated circuit (ROIC) adapted to provide signals from the infrared sensors corresponding to captured image frames, wherein the ROIC is adapted to provide the captured image frames at a frame rate selected from a range of approximately 120 Hz to approximately 480 Hz.
[0011] In another embodiment, a method includes providing a bias voltage from a bias circuit of a focal plane array (FPA) to an array of infrared sensors of the FPA, wherein the bias voltage is selected from a range of approximately 0.2 volts to approximately 0.7 volts; imaging the scene using the infrared sensors; and providing signals from the infrared sensors corresponding to captured image frames of the scene using a read out integrated circuit (ROIC) of the FPA.
[0012] In another embodiment, a method includes imaging a scene using an array of infrared sensors of a focal plane array (FPA), wherein a size of the array of infrared sensors is less than approximately 160 by 120; and providing signals from the infrared sensors corresponding to captured image frames using a read out integrated circuit (ROIC) of the FPA, wherein the ROIC provides the captured image frames at a frame rate selected from a range of approximately 120 Hz to approximately 480 Hz.
[0013] In another embodiment, a system includes a focal plane array (FPA) comprising: a low-dropout regulator (LDO) integrated with the FPA and adapted to provide a regulated voltage in response to an external supply voltage; an array of infrared sensors adapted to image a scene; a bias circuit adapted to provide a bias voltage to the infrared sensors in response to the regulated voltage; and a read out integrated circuit (ROIC) adapted to provide signals from the infrared sensors corresponding to captured image frames.
[0014] In another embodiment, a method includes receiving an external supply voltage at a focal plane array (FPA); providing a regulated voltage in response to the external supply voltage using a low-dropout regulator (LDO) integrated with the FPA; providing a bias voltage to an array infrared sensors of the FPA in response to the regulated voltage using the bias circuit of the FPA; imaging a scene using the infrared sensors; and providing signals from the infrared sensors corresponding to captured image frames using a read out integrated circuit (ROIC) of the FPA.
[0016] FIG. 1 illustrates an infrared imaging module configured to be implemented in a host device in accordance with an embodiment of the disclosure.
[0017] FIG. 2 illustrates an assembled infrared imaging module in accordance with an embodiment of the disclosure.
[0018] FIG. 3 illustrates an exploded view of an infrared imaging module juxtaposed over a socket in accordance with an embodiment of the disclosure.
[0019] FIG. 4 illustrates a block diagram of an infrared sensor assembly including an array of infrared sensors in accordance with an embodiment of the disclosure.
[0020] FIG. 5 illustrates a flow diagram of various operations to determine NUC terms in accordance with an embodiment of the disclosure.
[0021] FIG. 6 illustrates differences between neighboring pixels in accordance with an embodiment of the disclosure.
[0022] FIG. 7 illustrates a flat field correction technique in accordance with an embodiment of the disclosure.
[0023] FIG. 8 illustrates various image processing techniques of FIG. 5 and other operations applied in an image processing pipeline in accordance with an embodiment of the disclosure.
[0024] FIG. 9 illustrates a temporal noise reduction process in accordance with an embodiment of the disclosure.
[0025] FIG. 10 illustrates particular implementation details of several processes of the image processing pipeline of FIG. 6 in accordance with an embodiment of the disclosure.
[0026] FIG. 11 illustrates spatially correlated FPN in a neighborhood of pixels in accordance with an embodiment of the disclosure.
[0027] FIG. 12 illustrates a block diagram of another implementation of an infrared sensor assembly including an array of infrared sensors and a low-dropout regulator in accordance with an embodiment of the disclosure.
[0028] FIG. 13 illustrates a circuit diagram of a portion of the infrared sensor assembly of FIG. 12 in accordance with an embodiment of the disclosure.
[0043] FIG. 4 illustrates a block diagram of infrared sensor assembly 128 including an array of infrared sensors 132 in accordance with an embodiment of the disclosure. In the illustrated embodiment, infrared sensors 132 are provided as part of a unit cell array of a ROIC 402. ROIC 402 includes bias generation and timing control circuitry 404, column amplifiers 405, a column multiplexer 406, a row multiplexer 408, and an output amplifier 410. Image frames (e.g., thermal images) captured by infrared sensors 132 may be provided by output amplifier 410 to processing module 160, processor 195, and/or any other appropriate components to perform various processing techniques described herein. Although an 8 by 8 array is shown in FIG. 4, any desired array configuration may be used in other embodiments. Further descriptions of ROICs and infrared sensors (e.g., microbolometer circuits) may be found in U.S. Pat. No. 6,028,309 issued Feb. 22, 2000, which is incorporated herein by reference in its entirety.
[0044] Infrared sensor assembly 128 may capture images (e.g., image frames) and provide such images from its ROIC at various rates. Processing module 160 may be used to perform appropriate processing of captured infrared images and may be implemented in accordance with any appropriate architecture. In one embodiment, processing module 160 may be implemented as an ASIC. In this regard, such an ASIC may be configured to perform image processing with high performance and/or high efficiency. In another embodiment, processing module 160 may be implemented with a general purpose central processing unit (CPU) which may be configured to execute appropriate software instructions to perform image processing, coordinate and perform image processing with various image processing blocks, coordinate interfacing between processing module 160 and host device 102, and/or other operations. In yet another embodiment, processing module 160 may be implemented with a field programmable gate array (FPGA). Processing module 160 may be implemented with other types of processing and/or logic circuits in other embodiments as would be understood by one skilled in the art.
[0045] In these and other embodiments, processing module 160 may also be implemented with other components where appropriate, such as, volatile memory, non-volatile memory, and/or one or more interfaces (e.g., infrared detector interfaces, inter-integrated circuit (I2C) interfaces, mobile industry processor interfaces (MIPI), joint test action group (JTAG) interfaces (e.g., IEEE 1149.1 standard test access port and boundary-scan architecture), and/or other interfaces).
[0065] FIG. 5 illustrates a flow diagram of various operations to determine NUC terms in accordance with an embodiment of the disclosure. In some embodiments, the operations of FIG. 5 may be performed by processing module 160 or processor 195 (both also generally referred to as a processor) operating on image frames captured by infrared sensors 132. In block 505, infrared sensors 132 begin capturing image frames of a scene.
[0066] Typically, the scene will be the real world environment in which host device 102 is currently located. In this regard, shutter 105 (if optionally provided) may be opened to permit infrared imaging module to receive infrared radiation from the scene. Infrared sensors 132 may continue capturing image frames during all operations shown in FIG. 5. In this regard, the continuously captured image frames may be used for various operations as further discussed. In one embodiment, the captured image frames may be temporally filtered (e.g., in accordance with the process of block 826 further described herein with regard to FIG. 8) and be processed by other terms (e.g., factory gain terms 812, factory offset terms 816, previously determined NUC terms 817, column FPN terms 820, and row FPN terms 824 as further described herein with regard to FIG. 8) before they are used in the operations shown in FIG. 5.
[0087] In one embodiment, block 550 includes determining a spatial FPN correction term for each row of the blurred image frame (e.g., each row may have its own spatial FPN correction term), and also determining a spatial FPN correction term for each column of the blurred image frame (e.g., each column may have its own spatial FPN correction term). Such processing may be used to reduce the spatial and slowly varying (1/f) row and column FPN inherent in thermal imagers caused by, for example, 1/f noise characteristics of amplifiers in ROIC 402 which may manifest as vertical and horizontal stripes in image frames.
[0094] For example, local contrast values in the blurred image frame may be calculated, or any other desired type of edge detection process may be applied to identify certain pixels in the blurred image as being part of an area of local contrast. Pixels that are marked in this manner may be considered as containing excessive high spatial frequency scene information that would be interpreted as FPN (e.g., such regions may correspond to portions of the scene that have not been sufficiently blurred). As such, these pixels may be excluded from being used in the further determination of NUC terms. In one embodiment, such contrast detection processing may rely on a threshold that is higher than the expected contrast value associated with FPN (e.g., pixels exhibiting a contrast value higher than the threshold may be considered to be scene information, and those lower than the threshold may be considered to be exhibiting FPN).
[0102] Although the determination of NUC terms has been described with regard to gradients, local contrast values may be used instead where appropriate. Other techniques may also be used such as, for example, standard deviation calculations. Other types flat field correction processes may be performed to determine NUC terms including, for example, various processes identified in U.S. Pat. No. 6,028,309 issued Feb. 22, 2000, U.S. Pat. No. 6,812,465 issued Nov. 2, 2004, and U.S. patent application Ser. No. 12/114,865 filed May 5, 2008, which are incorporated herein by reference in their entirety.
[0108] In one embodiment, for computational efficiency, a sparse kernel may be used such that only a small number of neighboring pixels inside an N by N neighborhood are used. For any given high pass filter operation using distant neighbors (e.g., a large kernel), there is a risk of modeling actual (potentially blurred) scene information as spatially correlated FPN. Accordingly, in one embodiment, the temporal damping factor 2 may be set close to 1 for updated NUC terms determined in block 573.
[0139] As discussed, in various embodiments, infrared imaging module 100 may be configured to operate at low voltage levels. In particular, infrared imaging module 100 may be implemented with circuitry configured to operate at low power and/or in accordance with other parameters that permit infrared imaging module 100 to be conveniently and effectively implemented in various types of host devices 102, such as mobile devices and other devices.
[0140] For example, FIG. 12 illustrates a block diagram of another implementation of infrared sensor assembly 128 including infrared sensors 132 and an LDO 1220 in accordance with an embodiment of the disclosure. As shown, FIG. 12 also illustrates various components 1202, 1204, 1205, 1206, 1208, and 1210 which may implemented in the same or similar manner as corresponding components previously described with regard to FIG. 4. FIG. 12 also illustrates bias correction circuitry 1212 which may be used to adjust one or more bias voltages provided to infrared sensors 132 (e.g., to compensate for temperature changes, self-heating, and/or other factors).
[0141] In some embodiments, LDO 1220 may be provided as part of infrared sensor assembly 128 (e.g., on the same chip and/or wafer level package as the ROIC). For example, LDO 1220 may be provided as part of an FPA with infrared sensor assembly 128. As discussed, such implementations may reduce power supply noise introduced to infrared sensor assembly 128 and thus provide an improved PSRR. In addition, by implementing the LDO with the ROIC, less die area may be consumed and fewer discrete die (or chips) are needed.
[0142] LDO 1220 receives an input voltage provided by a power source 1230 over a supply line 1232. LDO 1220 provides an output voltage to various components of infrared sensor assembly 128 over supply lines 1222. In this regard, LDO 1220 may provide substantially identical regulated output voltages to various components of infrared sensor assembly 128 in response to a single input voltage received from power source 1230.
[0143] For example, in some embodiments, power source 1230 may provide an input voltage in a range of approximately 2.8 volts to approximately 11 volts (e.g., approximately 2.8 volts in one embodiment), and LDO 1220 may provide an output voltage in a range of approximately 1.5 volts to approximately 2.8 volts (e.g., approximately 2.5 volts in one embodiment). In this regard, LDO 1220 may be used to provide a consistent regulated output voltage, regardless of whether power source 1230 is implemented with a conventional voltage range of approximately 9 volts to approximately 11 volts, or a low voltage such as approximately 2.8 volts. As such, although various voltage ranges are provided for the input and output voltages, it is contemplated that the output voltage of LDO 1220 will remain fixed despite changes in the input voltage.
[0144] The implementation of LDO 1220 as part of infrared sensor assembly 128 provides various advantages over conventional power implementations for FPAs. For example, conventional FPAs typically rely on multiple power sources, each of which may be provided separately to the FPA, and separately distributed to the various components of the FPA. By regulating a single power source 1230 by LDO 1220, appropriate voltages may be separately provided (e.g., to reduce possible noise) to all components of infrared sensor assembly 128 with reduced complexity. The use of LDO 1220 also allows infrared sensor assembly 128 to operate in a consistent manner, even if the input voltage from power source 1230 changes (e.g., if the input voltage increases or decreases as a result of charging or discharging a battery or other type of device used for power source 1230).
[0145] The various components of infrared sensor assembly 128 shown in FIG. 12 may also be implemented to operate at lower voltages than conventional devices. For example, as discussed, LDO 1220 may be implemented to provide a low voltage (e.g., approximately 2.5 volts). This contrasts with the multiple higher voltages typically used to power conventional FPAs, such as: approximately 3.3 volts to approximately 5 volts used to power digital circuitry; approximately 3.3 volts used to power analog circuitry; and approximately 9 volts to approximately 11 volts used to power loads. Also, in some embodiments, the use of LDO 1220 may reduce or eliminate the need for a separate negative reference voltage to be provided to infrared sensor assembly 128.
[0146] Additional aspects of the low voltage operation of infrared sensor assembly 128 may be further understood with reference to FIG. 13. FIG. 13 illustrates a circuit diagram of a portion of infrared sensor assembly 128 of FIG. 12 in accordance with an embodiment of the disclosure. In particular, FIG. 13 illustrates additional components of bias correction circuitry 1212 (e.g., components 1326, 1330, 1332, 1334, 1336, 1338, and 1341) connected to LDO 1220 and infrared sensors 132. For example, bias correction circuitry 1212 may be used to compensate for temperature-dependent changes in bias voltages in accordance with an embodiment of the present disclosure. The operation of such additional components may be further understood with reference to similar components identified in U.S. Pat. No. 7,679,048 issued Mar. 16, 2010 which is hereby incorporated by reference in its entirety. Infrared sensor assembly 128 may also be implemented in accordance with the various components identified in U.S. Pat. No. 6,812,465 issued Nov. 2, 2004 which is hereby incorporated by reference in its entirety.
[0147] In various embodiments, some or all of the bias correction circuitry 1212 may be implemented on a global array basis as shown in FIG. 13 (e.g., used for all infrared sensors 132 collectively in an array). In other embodiments, some or all of the bias correction circuitry 1212 may be implemented an individual sensor basis (e.g., entirely or partially duplicated for each infrared sensor 132). In some embodiments, bias correction circuitry 1212 and other components of FIG. 13 may be implemented as part of ROIC 1202.
[0148] As shown in FIG. 13, LDO 1220 provides a load voltage Vload to bias correction circuitry 1212 along one of supply lines 1222. As discussed, in some embodiments, Vload may be approximately 2.5 volts which contrasts with larger voltages of approximately 9 volts to approximately 11 volts that may be used as load voltages in conventional infrared imaging devices.
[0149] Based on Vload, bias correction circuitry 1212 provides a sensor bias voltage Vbolo at a node 1360. Vbolo may be distributed to one or more infrared sensors 132 through appropriate switching circuitry 1370 (e.g., represented by broken lines in FIG. 13). In some examples, switching circuitry 1370 may be implemented in accordance with appropriate components identified in U.S. Pat. Nos. 6,812,465 and 7,679,048 previously referenced herein.
[0150] Each infrared sensor 132 includes a node 1350 which receives Vbolo through switching circuitry 1370, and another node 1352 which may be connected to ground, a substrate, and/or a negative reference voltage. In some embodiments, the voltage at node 1360 may be substantially the same as Vbolo provided at nodes 1350. In other embodiments, the voltage at node 1360 may be adjusted to compensate for possible voltage drops associated with switching circuitry 1370 and/or other factors.
[0151] Vbolo may be implemented with lower voltages than are typically used for conventional infrared sensor biasing. In one embodiment, Vbolo may be in a range of approximately 0.2 volts to approximately 0.7 volts. In another embodiment, Vbolo may be in a range of approximately 0.4 volts to approximately 0.6 volts. In another embodiment, Vbolo may be approximately 0.5 volts. In contrast, conventional infrared sensors typically use bias voltages of approximately 1 volt.
[0152] The use of a lower bias voltage for infrared sensors 132 in accordance with the present disclosure permits infrared sensor assembly 128 to exhibit significantly reduced power consumption in comparison with conventional infrared imaging devices. In particular, the power consumption of each infrared sensor 132 is reduced by the square of the bias voltage. As a result, a reduction from, for example, 1.0 volt to 0.5 volts provides a significant reduction in power, especially when applied to many infrared sensors 132 in an infrared sensor array. This reduction in power may also result in reduced self-heating of infrared sensor assembly 128.
[0153] In accordance with additional embodiments of the present disclosure, various techniques are provided for reducing the effects of noise in image frames provided by infrared imaging devices operating at low voltages. In this regard, when infrared sensor assembly 128 is operated with low voltages as described, noise, self-heating, and/or other phenomena may, if uncorrected, become more pronounced in image frames provided by infrared sensor assembly 128.
[0154] For example, referring to FIG. 13, when LDO 1220 maintains Vload at a low voltage in the manner described herein, Vbolo will also be maintained at its corresponding low voltage and the relative size of its output signals may be reduced. As a result, noise, self-heating, and/or other phenomena may have a greater effect on the smaller output signals read out from infrared sensors 132, resulting in variations (e.g., errors) in the output signals. If uncorrected, these variations may be exhibited as noise in the image frames. Moreover, although low voltage operation may reduce the overall amount of certain phenomena (e.g., self-heating), the smaller output signals may permit the remaining error sources (e.g., residual self-heating) to have a disproportionate effect on the output signals during low voltage operation.
[0155] To compensate for such phenomena, infrared sensor assembly 128, infrared imaging module 100, and/or host device 102 may be implemented with various array sizes, frame rates, and/or frame averaging techniques. For example, as discussed, a variety of different array sizes are contemplated for infrared sensors 132. In some embodiments, infrared sensors 132 may be implemented with array sizes ranging from 32 by 32 to 160 by 120 infrared sensors 132. Other example array sizes include 80 by 64, 80 by 60, 64 by 64, and 64 by 32. Any desired array size may be used.
[0156] Advantageously, when implemented with such relatively small array sizes, infrared sensor assembly 128 may provide image frames at relatively high frame rates without requiring significant changes to ROIC and related circuitry. For example, in some embodiments, frame rates may range from approximately 120 Hz to approximately 480 Hz.
[0157] In some embodiments, the array size and the frame rate may be scaled relative to each other (e.g., in an inversely proportional manner or otherwise) such that larger arrays are implemented with lower frame rates, and smaller arrays are implemented with higher frame rates. For example, in one embodiment, an array of 160 by 120 may provide a frame rate of approximately 120 Hz. In another embodiment, an array of 80 by 60 may provide a correspondingly higher frame rate of approximately 240 Hz. Other frame rates are also contemplated.
[0158] By scaling the array size and the frame rate relative to each other, the particular readout timing of rows and/or columns of the FPA array may remain consistent, regardless of the actual FPA array size or frame rate. In one embodiment, the readout timing may be approximately 63 microseconds per row or column.
[0159] As previously discussed with regard to FIG. 8, the image frames captured by infrared sensors 132 may be provided to a frame averager 804 that integrates multiple image frames to provide image frames 802 (e.g., processed image frames) with a lower frame rate (e.g., approximately 30 Hz, approximately 60 Hz, or other frame rates) and with an improved signal to noise ratio. In particular, by averaging the high frame rate image frames provided by a relatively small FPA array, image noise attributable to low voltage operation may be effectively averaged out and/or substantially reduced in image frames 802. Accordingly, infrared sensor assembly 128 may be operated at relatively low voltages provided by LDO 1220 as discussed without experiencing additional noise and related side effects in the resulting image frames 802 after processing by frame averager 804.
[0160] Other embodiments are also contemplated. For example, although a single array of infrared sensors 132 is illustrated, it is contemplated that multiple such arrays may be used together to provide higher resolution image frames (e.g., a scene may be imaged across multiple such arrays). Such arrays may be provided in multiple infrared sensor assemblies 128 and/or provided in the same infrared sensor assembly 128. Each such array may be operated at low voltages as described, and also may be provided with associated ROIC circuitry such that each array may still be operated at a relatively high frame rate. The high frame rate image frames provided by such arrays may be averaged by shared or dedicated frame averagers 804 to reduce and/or eliminate noise associated with low voltage operation. As a result, high resolution infrared images may be obtained while still operating at low voltages.
[0161] In various embodiments, infrared sensor assembly 128 may be implemented with appropriate dimensions to permit infrared imaging module 100 to be used with a small form factor socket 104, such as a socket used for mobile devices. For example, in some embodiments, infrared sensor assembly 128 may be implemented with a chip size in a range of approximately 4.0 mm by approximately 4.0 mm to approximately 5.5 mm by approximately 5.5 mm (e.g., approximately 4.0 mm by approximately 5.5 mm in one example). Infrared sensor assembly 128 may be implemented with such sizes or other appropriate sizes to permit use with socket 104 implemented with various sizes such as: 8.5 mm by 8.5 mm, 8.5 mm by 5.9 mm, 6.0 mm by 6.0 mm, 5.5 mm by 5.5 mm, 4.5 mm by 4.5 mm, and/or other socket sizes such as, for example, those identified in Table 1 of U.S. Provisional Patent Application No. 61/495,873 previously referenced herein.
[0162] Where applicable, various embodiments provided by the present disclosure can be implemented using hardware, software, or combinations of hardware and software. Also where applicable, the various hardware components and/or software components set forth herein can be combined into composite components comprising software, hardware, and/or both without departing from the spirit of the present disclosure. Where applicable, the various hardware components and/or software components set forth herein can be separated into sub-components comprising software, hardware, or both without departing from the spirit of the present disclosure. In addition, where applicable, it is contemplated that software components can be implemented as hardware components, and vice-versa.
[0163] Software in accordance with the present disclosure, such as non-transitory instructions, program code, and/or data, can be stored on one or more non-transitory machine readable mediums. It is also contemplated that software identified herein can be implemented using one or more general purpose or specific purpose computers and/or computer systems, networked and/or otherwise. Where applicable, the ordering of various steps described herein can be changed, combined into composite steps, and/or separated into sub-steps to provide features described herein.
[0164] Embodiments described above illustrate but do not limit the invention. It should also be understood that numerous modifications and variations are possible in accordance with the principles of the invention. Accordingly, the scope of the invention is defined only by the following claims.
20140151666 AMINE DERIVATIVE, AND ORGANIC ELECTROLUMINESCENCE MATERIAL AND ORGANIC ELECTROLUMINESCENCE DEVICE USING THE SAME
20140151665 CARBAZOLE DERIVATIVE AND ORGANIC ELECTROLUMINESCENCE DEVICE USING THE SAME
20140151664 BENZOIMIDAZOLE DERIVATIVE, ORGANIC ELECTROLUMINESCENCE MATERIAL AND ORGANIC ELECTROLUMINSCENCE DEVICE
20140151663 ORGANIC ELECTROLUMINESCENCE DEVICE
20140151662 Light-Emitting Element, Light-Emitting Device, Electronic Appliance, and Lighting Device
2010-11-04 Body surface imaging