Source: http://www.freepatentsonline.com/6293385.html
Timestamp: 2019-12-12 06:24:49
Document Index: 764515189

Matched Legal Cases: ['art 26', 'art 27', 'art 28', 'art 26', 'art 26', 'art 26']

Coin sorting device using data related to false coins themselves - Sanden Corp.
Coin sorting device using data related to false coins themselves
United States Patent 6293385
Hayashi, Makoto (Isesaki, JP)
Ito, Hironori (Maebashi, JP)
09/447791
Sanden Corp. (JP)
G07D5/08; G07D5/00; (IPC1-7): G07D5/08
194/317, 194/318, 194/319
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5931277 Money validation system using acceptance criteria 1999-08-03 Allan et al. 194/317
5730272 Method for improved coin, bill and other currency acceptance and slug or counterfeit rejection 1998-03-24 Dobbins et al.
5085309 Electronic coin detector 1992-02-04 Adamson et al. 194/317
4108296 Coin receiving apparatus for a vending machine 1978-08-22 Hayashi et al. 194/318
3682286 METHOD FOR ELECTRONICALLY CHECKING COINS 1972-08-08 Prumm 194/317
DE4204056C1 1993-07-22
EP0480736 1992-04-15 194/317 Method and apparatus for improved coin, bill and other currency acceptance and slug or counterfeit rejection.
JP2217987 August, 1990 194/317
WO1996036022A2 1996-11-14 VALIDATION
JPH02217987A 1990-08-30
The coin sorting device 10 allows coin A to be deposited or input from a coin slot 11 and pass through a coin passage 12. The coin is sensed by coin sensors 13a, 13b and 13c arranged along the coin passage 12. A microcomputer 14, as will be described later, determines the denomination and genuineness of input coins based on detected signals. Then, a coin distributor 15 distributes true coins to respective coin tubes 16a, 16b, 16c and 16d according to the kind, and false coins to a return slot 18 through an exhaust passage 17.
The microcomputer 14 includes a central processing unit (CPU) 24, a memory 25, and a counter 29. The CPU 24 controls the coin distributor 15 through a coin distributor driving circuit 19 in the manner known in the art. The CPU 24 also serves to store the maximum and minimum values of voltage detected by the coin sensors 13a to 13c and other data in a zeroth memorizing part 26 of the memory 25 in response to input of signals from the coin sensors 13a to 13c, a startup switch 20, a registration starting switch (hereinafter, called the start switch) 21 for false-coin data, a registration ending switch (hereinafter, called the end switch) 22 for false-coin data, and a clear switch (hereinafter, called the clear switch) 23 for registered false-coin data. The memory 25 further includes a first memorizing part 27 for memorizing first coin data representative of true coin kinds and a second memorizing part 28 for memorizing second coin data representative of false coin kinds. The counter 29 is for counting the number of deposition or input of a predetermined false coin to produce a counted signal representative of the number of the deposition.
Upon turning on the startup switch 20, if the maximum and minimum voltage values for various kinds of false-coin data, and the number of times the false-coin data are input (hereinafter, referred to as the number of inputs) have been already stored, all the data are erased (S1-S3). Then, the predetermined false coin is deposited or input from the coin slot 11 on the condition that the start switch 21 is turned on but the end switch 22 is not on (S4 and S5). If the kind of coin is deposited for the first time (the number of inputs=1), data on the deposited false coin are stored in the zeroth memorizing part 26 of the memory 25 as the maximum and minimum values (S6-S8) and "1" is added to the number of inputs n to prepare for the next input of the false coin (S9).
Under this condition, input of a false coin is sensed in the coin passage 12 by means of the coin sensors 13a through 13c to detect voltage data of the false coin. Responsive to each of the voltage data, the CPU 24 produces a current one of the false-coin data and compares the current one with each of the maximum value and the minimum value. When the current one is greater than the maximum value, the CPU 24 overwrites the current one on the maximum data in the zeroth memorizing part 26. When the current one is smaller than the minimum value, the CPU 24 overwrites the current one on the minimum value in the zeroth memorizing part 26. In this event, the CPU 24 will be operable as each of a local judging arrangement and a local changing arrangement.
Referring to FIG. 5A, the false-coin data are shown in a table. The false-coin data are represented by numerals taken by converting the voltage data in the manner known in the art. In other words, the CPU 24 converts the voltage data into the false-coin data. In this event, a combination of the CPU 24 and each of the coin sensors 13a, 13b and 13c will be operable as a local generating arrangement.
If the number of inputs is "0", the control procedure goes to a standby mode (S14). If the number of inputs n is so large that the maximum and minimum values obtained are proper enough for the false-coin data, the correction value will be small. If the number of inputs is small and reliability of the false-coin data is somewhat low, the correction values will be made larger. In other words, the CPU 24 determines each of the correction values to be inversely proportional to the number of the deposition.
Referring to FIG. 5B, relation between the number of input coin and the correction values is determined by a CPU 24 and shown in a table. Taking the coin sensor 13a as an example, the correction values are described in the following, when the number of inputs n is between 1 to 9, a range from the upper limit to the lower limit is made wider by adding a correction value (+3) to the maximum value and a correction value (-4) to the minimum value. This control is carried out such that the correction values become smaller as the number of inputs is increased to 10-19 (correction value (+2); correction value (-3)), and to 20-29 (correction value (+1); correction value (-2)). If the number of inputs reaches 30 or more, the maximum and minimum values are set as they are to the upper and lower limits (S15-S25). The same setting principle is applied to each of the coin sensor 13b and the coin sensor 13c. On determining the correction values, the CPU 24 is operable as a local determining arrangement determining the correction values in response to the counted signal. On carrying out the steps (S15-S25), the CPU 24 will be referred to as a range determining arrangement for determining a range of the false coin kind in accordance with the first and the second limiting data.
The upper and lower limits thus obtained are stored in upper-limit and lower limit memories of rejection specifying directory number "Gn", respectively (S26-S28). Then, it is determined whether the number Gn is the last group (S29). If not the last group, the next rejection specifying directory number Gn is set as Gn+1 and storage areas of the upper and lower limits obtained here are shifted. In the embodiment, upper and lower limits for subsequent false-coin data are thus stored successively. When successively storing the upper and lower limits for various kinds of false-coin data brings the number Gn into the last group, the next rejection specifying directory number Gn is set to "1" (S31). Therefore, false-coin data to be processed next is written over the oldest false-coin data.
As discussed, coin A, deposited from the coin slot 11, passes through the coin passage 12, and its voltage values are detected by means of the coin sensors 13a through 13c. Responsive to the voltage values, the CPU 24 generates third coin data. In this event, a combination of the CPU24 and each of the coin sensors 13a, 13b and 13c is operable as a data generating arrangement.
If coin A is determined as a true coin, the control procedure goes to a second or particular mode. In the second mode, "1" is first selected for the rejection specifying directory number Gn, that is, the upper and lower limits of Gn=1 are set as "upper-limit reference value" and "lower-limit reference value" (S3-S5). The maximum and minimum voltage values of coin A are compared with the upper-limit reference value and lower-limit reference value, respectively. If data for coin A are within a range from the upper-limit reference value to the lower-limit reference value, coin A is regarded as matching with the registered false-coin data and hence as being rejected (S6-S9). As a result of this determination, the coin distributor 15 distributes coin A to the exhaust passage 17 to return the same from the return slot 18. If they are beyond the range, coin A is regarded as mismatching with the registered false-coin data. Then, the next rejection specifying directory number Gn+1 is read out, and the above steps S4 through S7 are repeated until the determination is made for the last group (S10-S12). If determined as not being a false coin after compared with all the registered false-coin data, coin A is accepted (S13). As a result of this determination, the coin distributor 15 distributes coin A to corresponding one of the coin tubes 16a through 16d according to the denomination. On carrying out the second mode, the CPU 24 is referred to as a second judging arrangement which is responsive to the second and the third coin data and is for judging whether or not the deposited coin is included in the false coin kind.
The coin sorting device 10 also carries out batched clear control shown in FIG. 7 so that it can recover from errors in registering false-coin data. Upon turning on the clear switch 23, "1" is first selected for the rejection specifying directory number Gn, that is, the upper and lower limits of Gn=1 are cleared (S1-S4). The same control operations are repeated up to the last group, so that the upper and lower limits of all the rejection specifying directory numbers Gn are erased (S5 and S6). In other words, the CPU 24 erase all the false-coin data in a batch. In this event, the CPU 24 will be referred to as an erasing arrangement.
After completion of the erase processing, the rejection specifying directory number Gn is set to "1" and the control procedure goes to the standby mode (S7) to prepare for reentering false-coin data in the same way as shown in FIGS. 3 through 5.
While the present invention has thus far been described in connection with a single embodiment thereof, it will readily be possible for those skilled in the art to put this invention into practice in various other manners. For example, although a "voltage change" is used as a characteristic change of false-coin data in the embodiment, any other kind of factor such as a "frequency change" or "phase change" may be used.
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