Source: https://patents.google.com/patent/US6885708?oq=5%2C889%2C522
Timestamp: 2018-06-19 18:49:53
Document Index: 209880598

Matched Legal Cases: ['art 40', 'art 40', 'art 40', 'art 40', 'art 70', 'art 40', 'art 90', 'art 70', 'art 70', 'art 70', 'art 70', 'art 70', 'art 70', 'art 70', 'art 70', 'art 70', 'art 40', 'art 90', 'art 90', 'art 90', 'art 90', 'art 90', 'art 90', 'art 90', 'art 130']

US6885708B2 - Training prefix modulation method and receiver - Google Patents
Training prefix modulation method and receiver Download PDF
US6885708B2
US6885708B2 US10198487 US19848702A US6885708B2 US 6885708 B2 US6885708 B2 US 6885708B2 US 10198487 US10198487 US 10198487 US 19848702 A US19848702 A US 19848702A US 6885708 B2 US6885708 B2 US 6885708B2
US10198487
US20040013084A1 (en )
A receiver for implementing a training prefix modulation method in response to a reception of a signal propagating through a channel is disclosed. The signal as received includes training blocks with each training block having a data inter-block-interference therein, and data blocks with each data block having a training inter-block-interference therein. The signal is selectively reconstructed to provide a circular appearance of the channel over the data blocks. Specifically, an estimate of the training inter-block-interferences is generated and subtracted from the data blocks. And, an estimate of the data inter-block interferences is generated and added to the data blocks.
The present invention generally relates to the field of communication systems. More specifically, the invention relates to communication systems implementing frequency-domain-oriented modulation methods (“FDMM”) (e.g., orthogonal frequency division multiplexing (“OFDM”), spread OFDM (“SOFDM”) or multi-carrier code division multiple access (“MC-CDMA”), single carrier with cyclic prefix (“CP-SC”), cyclic prefix code division multiple access (“CP-CDMA”), and interleaved frequency division multiple access (“IFDMA”)).
Single carrier with cyclic prefix (“CP-SC”) insertion is a signal format known in the art for facilitating frequency-domain equalization. This is due to the cyclic prefix insertion causing the convolution of the CP-SC signal with a multipath channel to appear circular at the receiver (this can also be said to restore orthogonality between the frequency domain bins or subcarriers of a frequency domain representation of the signal). This circular appearance of the channel (also known as a circular channel) enables the use of low complexity frequency-domain equalization of the single carrier signal. However, a disadvantage of conventional CP-SC is that the receiver discards the received cyclic prefix prior to detection, resulting in a waste of the energy relating to the cyclic prefixes.
Training prefix single carrier is a means to recover the lost energy relating to the cyclic prefixes. Training prefix single carrier replaces the traditional cyclic prefixes with a block of known symbols known as the training prefix (i.e., each block of data symbols has a training prefix sent before and after it, where the one after it is actually a prefix for a following data block). Also, the training prefix is the same for each block of data symbols. These training symbols may be used to estimate the channel or improve the tracking in time of the channel. However, prior art methods for recovering the data symbols may be inefficient due to the need of taking a larger fast fourier transform (“FFT”) that encompasses the training prefixes. Finally, prior art methods will not work when the training prefix before a block of data symbols is different than the training prefix after the block of data symbols.
One form of the invention is a method for reconstructing a signal including a data block having a first inter-block-interference and a training block having a second inter-block-interference. The data block is reconstructed to exclude the first inter-block-interference and to include the second inter-block-interference.
FIG. 1 illustrates a timing diagram of a single-carrier transmitted signal having cyclic prefixes as known in the art;
The invention relates to communication systems implementing frequency-domain-oriented modulation methods (“FDMM”) (e.g., orthogonal frequency division multiplexing (“OFDM”), spread OFDM (“SOFDM”) or multi-carrier code division multiple access (“MC-CDMA”) or code division multiplexed OFDM (CDOFDM), single carrier with cyclic prefix (“CP-SC”), cyclic prefix code division multiple access (“CP-CDMA”), and interleaved frequency division multiple access (“IFDMA”)).
In the description of the invention, the term “data block” is not intended to imply a limitation on the contents of a data block (such as 23 a in FIG. 2) to a particular type of information. For example, a data block may include one or more types of information such as user data, pilot symbols, control information, signaling, link maintenance information, broadcast information, and so forth, and such information may be coded or uncoded.
FIG. 5 illustrates one embodiment of a receiver 30 in the accordance with the present invention. The receiver 30 includes an antenna 31, a signal buffer 32, a signal demodulation and detection (“SDD”) module 33, a channel decoder 34, a switch 35 a, a signal remodulator 36, a channel estimator 37, a signal resynthesizer 38, and a switch 35 b. An operational description of the receiver 30 will now be provided herein in the context of a processing of the signal 20 b which propagated through a channel in communication with the antenna 31. From the operational description of the receiver 30, those having ordinary skill in the art will appreciate a processing by the receiver 30 in accordance with the present invention of a signal having training blocks in the form of either a training prefix or a training postfix or a combination of a training prefix and a training postfix.
FIG. 6 illustrates the flowchart 40. During a stage S42 of the flowchart 40, the channel estimator module 37 either computes or retrieves a previously determined estimate of a channel pulse response (“CPR”) pl through which the data block 23 a of signal 20 a (FIG. 2) propagates resulting in the received data block 23 a′ of signal 20 b (FIG. 2). In one embodiment, the training prefixes (tk, k=0 . . . v−1) of the signal 20 a have a length of v samples. Time can be indexed within the baud 21 a from −v to N−1, where N is the number of samples in the data blocks (dk, k=0 . . . N−1) of the signal 20 a. The samples xl of baud 21 a and training prefix 22 b of signal 20 a can be modeled in accordance with the following equations [1]:
This equation is presented for the case where the training prefixes 22 a and 22 b are identical, but this equation can be reformulated for the case where these training prefixes are different. The (CPR) pl is a combined response of transmit filters, the channel and receiver filters and is assumed to be of length M+1, where the training prefix length v is preferably chosen such that M≦v. The baseband received samples, yl, of baud 21 a and training prefix 22 b of FIG. 2, after propagating through the multipath channel and being corrupted by additive noise and/or interference nl, can be modeled in accordance with the following equation [2]: y l = ∑ m = 0 M ⁢ ⁢ x l - m · p m + n l ⁢ ⁢ l = - v ⁢ ... ⁢ ⁢ ( N + v - 1 ) [ 2 ]
During a stage S44 of the flowchart 40, the SDD module 33 ascertains whether to execute a signal reconstruction of the data block 23 a′ based on the characteristics of the transmitted signal and the available receiver processing power. If the SDD module 33 determines that an execution of a signal reconstruction of the data block 23 a′ is not warranted, the SDD module 33 proceeds to a stage S46 of the flowchart 40 to implement a flowchart 70 representative of a first embodiment of an information detection method of the present invention. If the SDD module 33 determines that an execution of a signal reconstruction of the data block 23 a′ is warranted, the SDD module 33 proceeds to a stage S48 of the flowchart 40 to implement a flowchart 90 representative of one embodiment of a signal reconstruction method of the present invention.
FIG. 7 illustrates a flowchart 70 for detecting channel symbols (e.g., hard symbols, hard bits, soft symbols and/or soft bits) within data block 23 a′. During a stage S72 of the flowchart 70, the SDD module 33 conventionally transforms a portion of signal 20 b containing data block 23 a′ and training prefix 22 b′ into the frequency domain, preferably with a fast Fourier transform (“FFT”) of a size=N+v. During a stage S74 of the flowchart 70, the SDD module 33 conventionally equalizes the signal within the frequency domain. During a stage S76 of the flowchart 70, the SDD module 33 conventionally transforms the equalized signal 20 b from the frequency domain to the time domain, preferably with an inverse FFT (“IFFT”) of a size=N+v. Stages S72-S76 represent a linear frequency domain equalization of the signal. In alternative embodiments of the flowchart 70, stages S72-S76 can be replaced by stages representative of a linear transversal time-domain equalization, or another appropriate form of equalization.
During a stage S78 of the flowchart 70, the SDD module 33 conventionally removes the training prefix (i.e., a guard period) of the equalized signal. During a stage S80 of the flowchart 70, the SDD module 33 conventionally transforms the equalized signal without the training prefix into the frequency domain, preferably with a FFT of a size=N. In one embodiment, stage S80 is performed only for OFDM and any variations thereof (e.g. MC-CDMA/SOFDM), and is omitted for single carrier signals. During a stage S82 of the flowchart 70, the SDD module 33 conventionally detects the channel symbols (e.g., by outputting one or more of: soft or un-sliced symbols, hard or sliced symbols, soft bits, hard bits). The flowchart 70 is terminated upon a completion of stage S82 with the result being a detection of the channel symbols within data block 23 a′. Referring again to FIG. 6, upon completion of stage S46, the receiver 30 proceeds to stage S54 of the flowchart 40 to ascertain whether to improve upon the performance of the receiver 30 by using iteration. FIG. 8 illustrates the flowchart 90. During a stage S92 of the flowchart 90, the SDD module 33 generates or receives an estimate of the training IBI 24 a. In one embodiment, the SDD module 33 generates the estimate of the training IBI 24 a as a weighted sum of training prefix samples 22 a where the weights are proportional to an estimate of the channel pulse response, {circumflex over (p)}l a (where {circumflex over (p)}l a is the current (or previous) iteration estimate of the CPR), in accordance with the following equation [3]: t l ⁢ ibi = ∑ m = 0 M ⁢ t l + v - m · p ^ l a ⁢ ⁢ l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) [ 3 ]
Upon completion of the stage S92, the SDD module 33 proceeds to a stage S94 of the flowchart 90 to subtract the estimate of the training IBI 24 a from the data block 23 a′ to yield the data block 23 a′ of signal 20 c (FIG. 3), which is illustrated over multiple bauds for the purpose of illustration, in accordance with the following equation [4]: z l = y l - t l ⁢ ibi ⁢ ⁢ l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) [ 4 ]
Upon completion of the stage S94, the SDD module 33 proceeds to a stage S96 of the flowchart 90 to generate an estimate of the data IBI 25 a. In one embodiment, the SDD module 33 generates an estimate of the data IBI 25 a based on the received signal samples, training prefix samples, estimates of the CPR {circumflex over (p)}l b {circumflex over (p)}l c and a remodulated signal {circumflex over (x)}l in accordance with the following equation [4]: d l ⁢ ibi = ( 1 - a ) · ( y N + 1 - ∑ m = 0 M ⁢ t l - m · p ^ m b ) + a ⁢ ∑ m = 0 M ⁢ x ^ l + N - m · p ^ m c ⁢ ⁢ l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) [ 5 ]
In this equation, the remodulated signal {circumflex over (x)}l (as elaborated later) is an estimate of the data transmitted within data block 23 a. The estimates of the CPR, {circumflex over (p)}l a, {circumflex over (p)}l b, {circumflex over (p)}l c can be the current iteration CPR estimate, or any one of the previous iteration CPR estimates. The feedback gain factor, α, on the remodulated signal (0<α<=1) determines the percentage of data portion IBI being updated in the current iteration relative to first iteration estimate, previous iteration estimates, or a combination thereof. In one embodiment, the feedback gain α is set to 0 on the first iteration. When α=0, the data IBI estimate is affected by channel noise. As a result, when the data IBI estimate is added to the data block, the total noise power is increased. In order to counter the increased noise power, an iterative, decision aided IBI estimation method may be used. During the initial iterations, small values of alpha can be used thereby introducing less error due to incorrect symbol/bit decisions, while improving the receiver performance as the estimator noise is reduced. On subsequent iterations, as the confidence in the decoded/detected symbol/bit decisions improve, the value of alpha can be increased (preferred) making it closer to one, further reducing the estimator noise and improving receiver performance. In an alternate embodiment, an initial signal detection based on conventional methods can be performed to estimate the remodulated signal {circumflex over (x)}l prior to the first iteration, thus enabling the option of setting α>0 for the first iteration. This alternate embodiment is anticipated to be useful when the channel pulse response is much smaller than the cyclic prefix length.
Upon completion of the stage S96, the SDD module 33 proceeds to a stage S98 of the flowchart 90 ascertain whether to implement a null prefix reconstruction. When the SDD module 33 determines a null prefix reconstruction is not warranted, the SDD module 33 proceeds to a stage S100 of the flowchart 90 to add the estimate of the data IBI 25 a to the data block 23 a″ to thereby yield data block 23 a′″ of the signal 20 d (FIG. 3), which is illustrated over multiple bauds for the purpose of illustration, in accordance with the following equation [6]: y l ⁢ cir = { z l + d l ⁢ ibi l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) y l l = M ⁢ ⁢ … ⁢ ⁢ ( N - 1 ) [ 6 ]
Upon completion of the stage S100, the N samples of the data block 23 a′″ of signal 20 replace the training prefix 22 b with a null prefix 26 b, to thereby yield a corresponding portion of the signal 20 e (FIG. 4). Thereafter, the SDD module 33 proceeds to a stage S104 of the flowchart 90 to add the estimate of the data IBI 25 a to the null prefix 26 b, to thereby yield a corresponding portion of the signal 20 f (FIG. 4). Upon completion of the stage S102 and S104, the N+v samples corresponding to the combined data block 23 a′″ and prefix block 26 b′ of signal 20 f channel appear to have been received over a circular channel and are in accordance with the following equation [7]: y l ⁢ null = { z l l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) ⁢ y l l = M ⁢ ⁢ … ⁢ ⁢ ( N - 1 ) ⁢ d l - N ⁢ ibi ⁢ l = N ⁢ ⁢ … ⁢ ⁢ ( N + M - 1 ) ⁢ 0 l = ( N + M ) ⁢ ⁢ … ⁢ ⁢ ( N + v - 1 ) [ 7 ]
In another embodiment of the invention, the null prefix 26 b′ with the data IBI 25 a is obtained by subtracting out an estimate of the training prefix block 22 b′.
Referring again to FIG. 6, upon completion of stage S48, the receiver 30 proceeds to a stage S50 to ascertain whether a null prefix reconstruction was implemented during stage S48. When a null prefix reconstruction was implemented during stage S48, the receiver 30 proceeds to stage S46 to detect information within data block 23 a′″ of signal 20 f (FIG. 4) in a manner analogous to the detection of information within data block 23 a′ of signal 20 b as described in connection with FIG. 7. Thereafter, the receiver 30 proceeds to stage S54 to ascertain whether to improve upon the performance of the receiver 30 by using iteration.
The flowchart 130 is terminated upon completion of stage S138. Upon completion of the stage S58, the stages S44-S54 are selectively executed as previously described herein in connection with FIGS. 5-9. These subsequent iterations of the stages S44-S54 facilitate a circular appearance of the channel in accordance with either the following equations [10] or [11]: y l ⁢ cir = { z l + d l ⁢ ibi l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) y l l = M ⁢ ⁢ … ⁢ ⁢ ( N - 1 ) [ 10 ] y l ⁢ null = { z l l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) ⁢ y l l = M ⁢ ⁢ … ⁢ ⁢ ( N - 1 ) ⁢ d l - N ⁢ ibi ⁢ l = N ⁢ ⁢ … ⁢ ⁢ ( N + M - 1 ) ⁢ 0 l = ( N + M ) ⁢ ⁢ … ⁢ ⁢ ( N + v - 1 ) [ 11 ]
For the present invention, the choice of waveforms for the training prefix can be any signal such as a reduced symbol duration OFDM training symbol (short OFDM symbol) or a single carrier training sequence. A signal with a close to flat amplitude spectrum and low peak-to-average power ratio is desirable as it enables the channel estimate errors to be frequency independent and may allow the training prefix to be transmitted at a higher power level than the data block while maintaining the same power amplifier backoff requirement. The present invention also enables the training prefix waveform to be different for different data blocks, except for the case of OFDM-type signals where signal reconstruction is not used (i.e., “no” is selected in S44 of FIG. 6). For this latter case, it is preferred that the training prefixes be identical for adjacent data blocks, so that the equalizer performance will be improved. Since the present invention can enable the use of different training prefixes for different data blocks, it can be applied to CDMA systems where the training prefix is a pilot block multiplied by a long code or scrambling code or PN sequence. In this case, the long code/scrambling code/PN sequence causes the transmitted training prefixes to be different even if they were the same prior to applying the long code/scrambling code/PN sequence. The proposed methods can also be used when a data slot is preceded and/or followed by an idle slot. In this case, the idle slot is treated as a training prefix/postfix containing zeros (null prefix or postfix), as appropriate.
reconstructing the data block to exclude the first inter-block-interference; and
reconstructing the data block to include the second inter-block-interference.
transforming the reconstructed data block into a frequency domain data block; and
detecting symbols based on at least the frequency domain data block.
wherein the reconstruction provides a reconstructed data block having a characteristic of circular convolution with a channel pulse response; and
further comprising processing the reconstructed data block based on the circular convolution property and an estimate of the channel pulse response to facilitate data detection.
4. The method of claim 1, wherein the estimate of the channel pulse response is represented in the frequency domain.
a buffer operable to store a signal including a data block having a first inter-block-interference and a training block having a second inter-block-interference; and
one or more modules operable to reconstruct the data block to exclude the first inter-block-interference and to include the second inter-block-interference.
6. A method for reconstructing a signal including a data block having a first inter-block-interference and a training block having a second inter-block-interference, said method comprising:
replacing the training block with a null block; and
constructing the null block to include the second inter-block-interference.
7. The method of claim 6, wherein the step of constructing the null block to include the second inter-block-interference includes:
generating an estimate of the second inter-block-interference; and
adding the estimate of the second inter-block-interference to the null block.
8. The method of claim 6, further comprising reconstructing the data block to exclude the first inter-block-interference.
generating an estimate of the first inter-block-interference; and
subtracting the estimate of the first inter-block-interference from the data block.
one or more modules operable to replace the training block with a null block and to construct the null block to include the second inter-block-interference.
11. The receiver of claim 10, wherein said one or more modules are further operable to generate an estimate of the second inter-block-interference, and to add the estimate of the second inter-block-interference to the null block to construct the null block to include the second inter-block-interference.
selectively executing one or more reconstructions of the data block to exclude the first inter-block-interference and to include the second inter-block-interference; and
demodulating the signal as received or reconstructed whereby the information is detected.
15. A receiver for receiving a signal propagating through a channel, the signal including a data block and a training block, the data block including information and a first inter-block-interference, the training block including a second inter-block-interference, said receiver comprising:
a buffer operable to store the signal; and
one or more modules operable to executing one or more reconstructions of the data block to exclude the first inter-block-interference and to include the second inter-block-interference, said one or more modules further operable to demodulate the signal as received or as reconstructed whereby the information is detected.
16. A method for reconstructing a signal including a data block having a first inter-block-interference and a training block having a second inter-block-interference, said method comprising:
generating an estimate of the first inter-block interference;
subtracting the estimate of the first inter-block interference from the data block; and
17. The method of claim 16, wherein the estimate of the first inter-block interference is generated according to: t l ⁢ ibi = ∑ m = 0 M ⁢ t l + v - m · p ^ l a ⁢ ⁢ l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) .
18. A method for reconstructing a signal including a data block having a first inter-block-interference and a training block having a second inter-block-interference, said method comprising:
reconstructing the data block to exclude the first inter-block-interference;
generating an estimate of the second inter-block interference; and
adding the estimate of the second inter-block interference to the data block.
19. The method of claim 18, wherein the estimate of the second inter-block interference is generated according to: d l ⁢ ibi = ( 1 - α ) · ( y N + 1 - ∑ m = 0 M ⁢ t l - m · p ^ m b ) + α ⁢ ∑ m = 0 M ⁢ x ^ l + N - m · p ^ m c ⁢ ⁢ l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) .
a buffer operable to a store a signal including a data block having a first inter-block-interference and a training block having a second inter-block-interference; and
one or more modules operable to generate an estimate of the first inter-block-interference, to subtract the estimate of the first inter-block-interference from the data block, and to reconstruct the data block to include the second inter-block-interference.
21. The receiver of claim 20, wherein said one or more modules generate an estimation of the first inter-block-interference according to: t l ⁢ ibi = ∑ m = 0 M ⁢ t l + v - m · p ^ l a ⁢ ⁢ l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) .
one or more modules operable to reconstruct the data block to exclude the first inter-block-interference, to generate an estimate of the second inter-block-interference, and to add the estimate of the second inter-block-interference to the data block.
23. The receiver of claim 22, wherein said one or more modules generate an estimation of the second inter-block interference according to: d l ibi = ( 1 - α ) · ( y N + l - ∑ m = 0 M ⁢ ⁢ t l - m · p ^ m b ) + α ⁢ ∑ m = 0 M ⁢ x ^ l + N - m · p ^ m c ⁢ ⁢ l = 0 ⁢ ⁢ … ⁢ ⁢ ( M - 1 ) .
24. A method for facilitating a detection of data symbols within a received signal block, said method comprising:
applying frequency-domain equalization to the received signal;
transforming the equalized frequency-domain signal from the frequency domain to an equalized time domain signal;
removing a guard period from the equalized time-domain signal; and
transforming the equalized time-domain signal without the guard period from the time domain to the frequency domain.
a buffer operable to store a signal including a data block and a guard period; and
one or more modules operable to apply frequency-domain equalization to the signal, to transform the equalized signal from the frequency domain to an equalized time-domain signal, to remove the guard period from the equalized time-domain signal, and to transform the equalized time-domain signal without the guard period from the time domain to the frequency domain.
26. A method for processing a signal including a data block having a first inter-block-interference and a training block having a second inter-block-interference, said method comprising:
generating an estimate of the first inter-block interference and the second inter-block interference;
detecting a plurality of symbols within the data block based upon the estimate of the first inter-block interference and the estimate of the second inter-block interference;
remodulating the detected symbols; and
resynthesizing the estimate of the first inter-block interference and the estimate of the second inter-block interference based upon the remodulation of the detected symbols.
27. The method of claim 26, wherein the detecting a plurality of symbols within the data block is further based on the output of a channel decoder.
one or more modules operable to generate an estimate of the first inter-block interference and the second inter-block interference, to detect a plurality of symbols within the data block based upon the estimate of the first inter-block interference and the estimate of the second inter-block interference, to remodulate the detected symbols; and to resynthesize the estimate of the first inter-block interference and the estimate of the second inter-block interference based upon the remodulation of the detected symbols.
29. A method for creating a multicarrier signal having no cyclic extensions, the method comprising the steps of:
generating a plurality of multicarrier data blocks, each multicarrier data block having no cyclic extension;
generating a plurality of training sequences that are not copies of portions of the plurality of multicarrier data blocks;
extending each of the plurality of multicarrier data blocks by adding one of the plurality of training sequences to create the multicarrier signal.
30. The method of claim 29 wherein the step of extending each of the multicarrier data blocks comprises the step of extending the multicarrier data blocks by adding one of the plurality of training sequences as either a prefix, a postfix, or a combination of a prefix and a postfix.
generating a plurality of multicarrier data blocks;
generating a training sequence, that is not a copy of a portion of the multicarrier data blocks;
extending a multicarrier data block by adding the training sequence to create the multicarrier signal, wherein there exists no cyclic extension between the data block and the training sequence.
34. The method of claim 33 wherein the step of extending the multicarrier data block comprises the stop of extending the multicarrier data block by adding the training sequence as either a prefix, a postfix, or a combination of a prefix and a postfix.
US10198487 2002-07-18 2002-07-18 Training prefix modulation method and receiver Active 2022-10-31 US6885708B2 (en)
US10198487 US6885708B2 (en) 2002-07-18 2002-07-18 Training prefix modulation method and receiver
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KR20057000972A KR100693778B1 (en) 2002-07-18 2003-06-26 Training prefix modulation method and receiver
US20040013084A1 true US20040013084A1 (en) 2004-01-22
US6885708B2 true US6885708B2 (en) 2005-04-26
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US10198487 Active 2022-10-31 US6885708B2 (en) 2002-07-18 2002-07-18 Training prefix modulation method and receiver
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KR (1) KR100693778B1 (en)
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WO (1) WO2004010628A1 (en)
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Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:THOAMS, TIMOTHY A.;NANGIA, VIJAY;BAUM, KEVIN L.;AND OTHERS;REEL/FRAME:013141/0336