Source: http://www.google.com/patents/US20060067059?dq=inventor:%22Arthur+R.+Hair%22
Timestamp: 2016-07-31 04:07:09
Document Index: 644260428

Matched Legal Cases: ['art 61', 'art 62', 'art 61', 'art 62', 'art 61', 'art 62', 'arts 61', 'arts 62', 'arts 61', 'arts 61']

Patent US20060067059 - Semiconductor device and method of manufacture thereof - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA transfer mold type power module (“TPM”) is provided with a projection at each of the four corners on its front main surface. The TPM is also provided a first screw hole at its center. A shielding plate is provided with a second crew hole in a position that corresponds to the first screw hole. A...http://www.google.com/patents/US20060067059?utm_source=gb-gplus-sharePatent US20060067059 - Semiconductor device and method of manufacture thereofAdvanced Patent SearchPublication numberUS20060067059 A1Publication typeApplicationApplication numberUS 11/109,788Publication dateMar 30, 2006Filing dateApr 20, 2005Priority dateSep 28, 2004Also published asUS7436672Publication number109788, 11109788, US 2006/0067059 A1, US 2006/067059 A1, US 20060067059 A1, US 20060067059A1, US 2006067059 A1, US 2006067059A1, US-A1-20060067059, US-A1-2006067059, US2006/0067059A1, US2006/067059A1, US20060067059 A1, US20060067059A1, US2006067059 A1, US2006067059A1InventorsKoichi Ushijima, Hussein Hassan, Noboru MiyamotoOriginal AssigneeMitsubishi Denki Kabushiki Kaisha, Renesas Device Design Corp.Export CitationBiBTeX, EndNote, RefManPatent Citations (18), Referenced by (5), Classifications (8), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetSemiconductor device and method of manufacture thereof
US 20060067059 A1Abstract
A transfer mold type power module (“TPM”) is provided with a projection at each of the four corners on its front main surface. The TPM is also provided a first screw hole at its center. A shielding plate is provided with a second crew hole in a position that corresponds to the first screw hole. A control substrate is provided with third screw holes in positions that correspond to the projections. The shielding plate and the TPM are joined by putting a first screw through the first and second screw holes and temporarily fastening the tip of the first screw by a temporary fastening member at the rear main surface of the TPM. The control substrate and the TPM are joined by second screws via the third screw holes. Images(12) Claims(13)
1. A semiconductor device comprising: a power module in which a power semiconductor element is sealed with resin by the transfer molding method; a control substrate for controlling said power module; and a shielding plate provided on a front main surface of said power module, wherein said power module includes a structure for mounting said control substrate, said control substrate being mounted over said shielding plate via said structure. 2. The semiconductor device according to claim 1, wherein said power module includes projections formed on said front main surface thereof, said control substrate is joined to said projections, and said shielding plate and said power module include holes communicating therethrough, said shielding plate being joined to said power module by a screw fit in said holes. 3. The semiconductor device according to claim 2, further comprising a temporary fastening member for temporarily fastening said screw at a rear main surface of said power module. 4. The semiconductor device according to claim 3, wherein said power module includes engagement parts on its side surfaces, so that side surfaces of a plurality of said power modules can be engaged via said engagement parts. 5. The semiconductor device according to claim 4, further comprising a plurality of said power modules, said plurality of said power modules being continuously engaged by said engagement parts. 6. The semiconductor device according to claim 5, further comprising a bus bar electrode for connection to electrode terminals of said power module, wherein said bus bar electrode includes external electrode terminals for connection to peripheral components and module side electrode terminals for connection to said electrode terminals, and said module said electrode terminals are located in symmetry with respect to said external electrode terminals. 7. The semiconductor device according to claim 6, wherein said bus bar electrode includes a plurality of partial bus bar electrodes, and said partial bus bar electrodes are joined to insulating films interposed therebetween. 8. The semiconductor device according to claim 1, wherein said power module further includes a bus bar electrode connected to said power semiconductor element, and said power semiconductor element and said bus bar electrode are sealed together with resin. 9. The semiconductor device according to claim 8, wherein said power module further includes peripheral components connected to said bus bar electrode, and said power semiconductor element, said bus bar electrode, and said peripheral components are sealed together with resin. 10. The semiconductor device according to claim 1, further comprising a cooling fin provided on said rear main surface of said power module. 11. A method of manufacturing the semiconductor device recited in claim 1, comprising the steps of: (a) mounting said shielding plate on said power module; (b) mounting said control substrate on said power module; and (c) conducting a function test on said power module with said shielding plate and said control substrate being mounted thereon. 12. The method of manufacturing the semiconductor device according to claim 11, further comprising the step of mounting said cooling fin after said step (c). 13. A method of manufacturing the semiconductor device recited in claim 3, comprising the steps of: removing said temporary fastening member; and mounting a cooling fin by said screw fit in said holes. Description
BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to semiconductor devices and methods of manufacture thereof and, more particularly, to semiconductor devices using a transfer mold type power module and methods of manufacture thereof. [0003] 2. Description of the Background Art [0004] Conventionally, a package type power module includes many fabrication process steps due to the need to seal a power semiconductor element with gel, resulting in the problem of an increase in component costs. [0005] Because of this, there has been developed a transfer mold type power module in which a power semiconductor element is molded by the transfer molding method. [0006] The transfer mold type power modules is combined with a shielding plate, a control substrate, and a cooling fin, to complete a semiconductor device. [0007] Prior art pertinent to the present invention is disclosed in Japanese Patent Application Laid-Open No. 2001-250890. [0008] The use of the transfer mold type power module when fabricating a semiconductor device, however, requires a cooling fin or a temporary fastening member in order to fasten the transfer mold type power module, shielding plate, control substrate, and the like. And a semiconductor device is usually fabricated on the user side that prepares a cooling fin in most cases. [0009] Therefore, when fabricating a semiconductor device, the use of the transfer mold type power module presents such problem as an increase in the number of fabrication process steps on the user side, when compared to the use of the package type power module on which only a cooling fin needs to be mounted. SUMMARY OF THE INVENTION [0010] It is an object of the present invention to provide a semiconductor device that does not involve an increase in the number of fabrication process steps on the user side even when a transfer mold type power module is used. [0011] In an aspect of the present invention, a semiconductor device includes: a power module in which a power semiconductor element is sealed with resin by the transfer molding method; a control substrate for controlling the power module; and a shielding plate provided on a front main surface of the power module. [0012] The power module includes a structure for mounting the control substrate, the control substrate being mounted over the shielding plate via the structure. [0013] The control substrate and the shielding plate can be mounted on the power module without having to use a cooling fin or a temporary fastening member. Because the power module can be provided to users with the control substrate and the shielding plate being mounted thereon, a step of mounting a cooling fin is all that is needed by the users to complete a semiconductor device. Therefore, the problem of an increase in the number of fabrication process steps on the user side is solved. [0014] These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS [0015] FIG. 1 shows the structure of a semiconductor device according to a first preferred embodiment of the present invention: [0016] FIG. 2 shows an exploded view of the semiconductor device according to the first preferred embodiment; [0017] FIG. 3 shows a circuit diagram of the semiconductor device according to the first preferred embodiment; [0018] FIG. 4 shows the structure of a transfer mold type power module according to a second preferred embodiment of the present invention; [0019] FIG. 5 shows four transfer mold type power modules according to the second preferred embodiment as joined; [0020] FIG. 6 shows a final drawing of a semiconductor device according to the second preferred embodiment; [0021] FIG. 7 shows an exploded view of the semiconductor device according to the second preferred embodiment; [0022] FIG. 8 shows an exploded view of a bus bar electrode used in the semiconductor device according to the second preferred embodiment; [0023] FIG. 9 shows a circuit diagram of the semiconductor device according to the second preferred embodiment; [0024] FIG. 10 shows a connection diagram by transfer mold type power modules and a bus bar electrode that corresponds to the circuit diagram of the semiconductor device according to the second preferred embodiment; [0025] FIG. 11 shows a transfer mold type power module according to a third preferred embodiment of the present invention; [0026] FIG. 12 shows a transfer mold type power module according to a fourth preferred embodiment of the present invention; [0027] FIG. 13 shows a final drawing of a semiconductor device according to the fourth preferred embodiment; [0028] FIG. 14 shows an exploded view of the semiconductor device according to the fourth preferred embodiment; and [0029] FIG. 15 shows the semiconductor device according to the fourth preferred embodiment with a cooling fin mounted thereon.
DESCRIPTION OF THE PREFERRED EMBODIMENTS First Preferred Embodiment [0030] FIG. 1 shows the structure of a semiconductor device according to a first preferred embodiment of the present invention. FIG. 2 shows an exploded view of the semiconductor device according to this embodiment, and FIG. 3 shows a circuit diagram of the semiconductor device according to this embodiment. As shown in FIG. 3, the semiconductor device according to this embodiment includes a freewheeling diode 11 connected in anti-parallel between the collector and emitter of an IGBT (Insulated Gate Bipolar Transistor) 10, a P-pole electrode 12 connected to the collector electrode, and an N-pole electrode 13 connected to the emitter electrode. [0031] A transfer mold type power module (henceforth sometimes referred to as the “TPM”) 36 has a structure in which a power semiconductor element such as an IGBT is sealed with resin by the transfer molding method. [0032] The structure of the semiconductor device according to the this embodiment will be described with reference to FIGS. 1 and 2. Electrodes 33 and 34 that are collected to the collector electrode and emitter electrode of the power semiconductor element inside the molding resin are drawn out from a side surface of the TPM 36. Each of the electrodes 33 and 34 is provided with a screw hole 37 for connection to a bus bar electrode (not shown). The electrodes 33 and 34 correspond to the P-pole electrode 12 and the N-pole electrode 13 shown in FIG. 3, respectively. In addition, in order to control the power semiconductor element, control pins 32 for inputting a gate signal and the like to the power semiconductor element are drawn out from a side surface opposed to the electrodes 33 and 34. [0033] The TPM 36 is provided with a projection 35 at each of the four corners on its front main surface for fastening a control substrate 50. Each of the projections 35 is provided with a screw hole (not shown) at its top end. The TPM 36 is also provided with a screw hole 31 at its center for mounting a shielding plate 40. The shielding plate 40 prevents radiation noise due to switching of semiconductor elements from affecting the control substrate 50, and further enhances the shielding effect by being connected to the ground line of the control substrate 50 via electric wires and the like. The shielding plate 40 also functions as a pressure plate for bringing the whole rear surface of the TPM 36 into complete contact with a cooling fin. [0034] The projections 35 are formed of the molding resin at the same time the power semiconductor element is molded. Alternatively, the projections 35 may be formed separately and then screwed or joined onto the front main surface of the TPM 36 after the power semiconductor element is molded. [0035] The shielding plate 40 is provided with a screw hole 42 in a position that corresponds to the screw hole 31 of the TPM 36, and is mounted on the upper surface of the TPM 36 by a screw 41. That is, the shielding plate 40 and the TPM 36 have holes communicating therethrough. And the shielding plate 40 is joined on the TPM 36 by the screw 41 fit in those holes. [0036] The screw 41 cuts through the screw holes 31 and 42, to be fastened temporarily by a temporary fastening member 43 at the rear surface of the TPM 36. The temporary fastening member 43 is formed of a nut made of resin or a vinyl tube and the like. The shielding plate 40 presses the TPM 36 against a cooling fin (not shown) to establish complete contact between them when the cooling fin is mounted on the rear main surface of the TPM 36 as will be described later. [0037] The control substrate 50 is provided with an I/F connector 54 on its front main surface, and a through hole 53 in a position that corresponds to the screw hole 31 of the TPM 36. With this structure, when mounting the cooling fin as will be described later, the screw 41 can be tightened via the through hole 53 by a screw-tightening tool without removing the control substrate 50. The control substrate 50 is also provided with a plurality of holes not shown for connection to the control pins 32. [0038] In addition, the control substrate 50 is provided with screw holes 52 in positions that correspond to the projections 35 at its four corners, so that the control substrate 50 can be fastened on the TPM 36 by screws 51. [0039] Subsequently, the fabrication method of the semiconductor device according to this embodiment will be described. First, the shielding plate 40 is fastened on the TPM 36 by the screw 41. The screw 41 cuts through the screw hole 42 provided in the shielding plate 40 and the screw hole 31 provided in the TPM 36, to be fastened temporarily by the temporary fastening member 43 at the rear surface of the TPM 36. [0040] Next, the control substrate 50 is fastened on the TPM 36. The control substrate 50 is fastened by the screws 51 via the screw holes 52 provided at its four corners, and the screw holes provided in the projections 35. [0041] The ends of the control pins 32 cut through the holes provided in the control substrate 50 and project onto the upper surface of the control substrate 50, to be soldered to the control substrate 50. [0042] The transfer mold type power module used in the semiconductor device according to this embodiment includes the projections 35 at its four corners, and further includes the screw hole 31 for fastening the shielding plate 40. Thus, a structure is obtained which is capable of mounting the control substrate 50 and the shielding plate 40 on the transfer mold type power module. [0043] That is, the TPM 36 according to this embodiment has a structure (projections 35) capable of mounting the control substrate 50 thereon, and the control substrate 50 is mounted over the shielding plate 40 via this structure. [0044] Because the power module can be provided to users with the control substrate 50 and the shielding plate 40 being mounted thereon, a step of mounting a cooling fin is all that is needed by the users to complete a semiconductor device. Therefore, the problem of an increase in the number of fabrication process steps on the user side is solved through the use of the TPM 36. [0045] Further, a function test on the semiconductor device with the shielding plate 40 and the control substrate 50 being mounted thereon can be conducted without mounting a cooling fin on the manufacturer side, thus reducing the burdens on the user side. [0046] Furthermore, the provision of the temporary fastening member 43 for fastening the shielding plate 40 prevents the possibility of breakage of the control substrate 50 and the TPM 36, which can be caused by the shielding plate 40 moving freely in the space sandwiched between the control substrate 50 and TPM 36 until after the semiconductor device is fastened on the cooling fin. [0047] Although being mounted by the projections 35 in this embodiment, the control substrate 50 may be mounted by whatever is capable of doing so. For example, the number of the projections 35 may be increased, or the projection 35 may be formed in rectangular ring shape on the upper surface of the TPM 36. With such formation, the joint between the projections 35 and the TPM 36 can be increased in strength. Second Preferred Embodiment [0048] FIG. 4 shows the structure of a transfer mold type power module 60 forming a semiconductor device according to a second preferred embodiment of the present invention. The TPM 60 is provided with a first engagement part 61 and a second engagement part 62 respectively on its opposed side surfaces on which the electrodes 33 and 34 are not formed. [0049] With this structure, a plurality of TPMs 60 can be engaged by engaging the first engagement part 61 of one TPM 60 and the second engagement part 62 of another TPM 60 with each other. That is, the TPM 60 includes the engagement parts (first engagement part 61 and second engagement part 62) on its side surfaces, so that the side surfaces of a plurality of TPMs 60 can be engaged via the engagement parts. [0050] The remaining elements are the same as those in the first preferred embodiment, the elements being denoted by the same reference numerals to omit a redundant description. [0051] FIG. 5 shows a structure in which a plurality of (four in this example) TPMs 60 according to this embodiment are continuously engaged by the engagement parts. FIG. 6 shows a semiconductor device in which the four TPMs 60 are engaged, and then the shielding plate 40, the control substrate 50 and a bus bar electrode 120 are mounted thereon. FIG. 7 shows an exploded view of the FIG. 6 semiconductor device. [0052] The shielding plate 40 is provided with four screw holes 42 correspondingly to the screw hole 31 provided in each of the TPMs 60, and is joined on the TPMs 60 by screws 41. The screws 41 cut through the screw holes 31 and 42, to be fastened temporarily by temporary fastening members 43 at rear surfaces of the TPMs 60. [0053] The control substrate 50 is provided with the I/F connector 54 on its front main surface, and the plurality of screw holes 52 in positions that correspond to the projections 35 provided on the TPMs 60. And the control substrate 50 is joined at the projections 35 of the TPMs 60 by the screws 51. [0054] The control substrate 50 is also provided with four through holes 53 correspondingly to the screw holes 31 of the TPMs 60, and holes not shown in positions that correspond to the control pins 32 provided on the TPMs 60. With this structure, the control pins 32 project onto the control substrate 50 when the control substrate 50 is mounted. [0055] In addition, the bus bar electrode 120 is connected to the TPMs 60. The bus bar electrode 120 includes a plurality of module side electrode terminals for connection to the electrodes 33 and 34 on the TPMs 60 side, and external electrode terminals for connection to peripheral components. [0056] The bus bar electrode 120 is connected by screws 121 and fastening members 122 via screw holes provided in the module side electrode terminals and the screw holes 37 provided in the electrodes 33 and 34 on the TPMs 60 side. [0057] Subsequently, the structure of the bus bar electrode 120 will be described with reference to FIG. 8. As shown, the bus bar electrode 120 consists of a plurality of partial bus bar electrodes including an N-pole connection bus bar electrode 123, a P-pole connection bus bar electrode 124, and a U-pole connection bus bar electrode 125, and insulating sheets (insulating films) 126. [0058] The P-pole connection bus bar electrode 124 is joined on the U-pole connection bus bar electrode 125 via the insulating sheet 126. The N-pole connection bus bar electrode 123 is joined on the P-pole connection bus bar electrode 124 via the insulating sheet 126. The insulating sheets 126 are also joined on an upper surface of the N-pole connection bus bar electrode 123 and a rear surface of the U-pole connection bus bar electrode 125. [0059] The N-pole connection bus bar electrode 123 includes module side electrode terminals 81 and 82 to be connected to the N-pole electrodes of two TPMs 60, and an N-pole external electrode terminal 103. The N-pole external electrode terminal 103 is located such that distances N1 and N2 between the module side electrode terminals 81, 82 and a line running through the center of the N-pole external electrode terminal 103 become equal to each other. Stated another way, the module side electrode terminals 81 and 82 are located in symmetry with respect to the line running through the center of the N-pole external electrode terminal 103. [0060] Likewise, each of the P-pole connection bus bar electrode 124 and the U-pole connection bus bar electrode 125 has module side electrode terminals located in symmetry with respect to an external electrode terminal. [0061] The fabrication method of the semiconductor device having such structure as described above will be described. First, four TPMs 60 are joined by engaging their first engagement parts 61 and second engagement parts 62 with each other. The shielding plate 40 is then joined on upper surfaces of the TPMs 60 by putting the screws 41 through the screw holes 42 and 31 and temporarily fastening the screws 41 by the temporary fastening members 43 at the rear surfaces of the TPMs 60. [0062] Next, the control substrate 50 is mounted on the projections 35 of the TPMs 60 by the screws 51, and then the bus bar electrode 120 is mounted. [0063] Subsequently, the effects of using the TPM 60 according to this embodiment will be described. FIG. 9 shows a circuit diagram of two 2 in 1 type power modules connected in parallel. The collector terminal of an IGBT 91 is connected to P-pole electrode, and the emitter terminal thereof is connected to the collector terminal of an IGBT92 and U-pole electrode. The emitter terminal of the IGBT 92 is connected to N-pole electrode. [0064] The collector terminal of an IGBT 93 is connected to P-pole electrode, and the emitter terminal thereof is connected to the collector terminal of an IGBT94 and U-pole electrode. The emitter terminal of the IGBT 94 is connected to N-pole electrode. [0065] The IGBTs 91 and 92 form one 2 in 1 type power module, and the IGBTs 93 and 94 form the other 2 in 1 type power module. In addition, a freewheeling diode 11 is connected in anti-parallel between the emitter terminal and collector terminal of each of the IGBTs 91 to 94. [0066] When forming a semiconductor device that corresponds to the FIG. 9 circuit diagram by the TPM 36 according to the first preferred embodiment, it is required that the TPMs 36 be disposed as shown in FIG. 10. FIG. 10 shows the semiconductor device formed by four TPMs 36, which corresponds to the FIG. 9 circuit diagram. [0067] First to fourth TPMs 36 are disposed adjacently. The TPMs 36 each include the two electrodes 33 and 34, each of which corresponds to P-pole electrode, or N-pole electrode, or U-pole electrode. [0068] The electrodes 33 and 34 of the first TPM 36 correspond to P-pole electrode and U-pole electrode respectively, and the second TPM 36 is disposed adjacently to the first TPM 36. The electrodes 33 and 34 of the second TPM 36 also correspond to P-pole electrode and U-pole electrode respectively. [0069] The electrodes 33 and 34 of the third TPM 36 which is disposed adjacently to the second TPM 36 correspond to U-pole electrode and N-pole electrode respectively. The electrodes 33 and 34 of the fourth TPM 36 which is disposed adjacently to the third TPM 36 also correspond to U-pole electrode and N-pole electrode respectively. [0070] The P-pole electrodes of the first and second TPMs 36 are connected to each other, to be connected to a P-pole external electrode terminal 101. The U-pole electrodes of the first to fourth TPMs 36 are connected to each other, to be connected to a U-pole external electrode terminal 102. The N-pole electrodes of the third and fourth TPMs 36 are connected to each other, to be connected to an N-pole external electrode terminal 103. [0071] The respective electrodes drawn out from the TPMs 36 are connected by the bus bar electrode 120, on which are formed the P-pole external electrode terminal 101, the U-pole external electrode terminal 102, and the N-pole external electrode terminal 103. [0072] Note that the P-pole external electrode terminal 101 corresponds to the P-pole electrode 14 shown in FIG. 9, and the U-pole external electrode terminal 102 corresponds to the U-pole electrode 15. The N-pole external electrode terminal 103 corresponds to the N-pole electrode 16. [0073] In order to obtain the semiconductor device that corresponds to the FIG. 9 circuit by using the TPM 36, it is required that the TPMs 36 be disposed as shown in FIG. 10, which will make it difficult for the respective TPMs 36 to be fabricated without being fastened on a cooling fin. [0074] In this embodiment, the respective TPMs 60 include the first and second engagement parts 61 and 62, as shown in FIG. 5, so four TPMs 60 can be engaged to be lumped together. It is easy to mount the control substrate 50 and the shielding plate 40 on the four TPMs 60 being engaged and lumped together without fastening the TPMs 60 on a cooling fin and the like, which will make it easy for the semiconductor device to be fabricated. [0075] In addition, in the semiconductor device according to this embodiment in which the respective TPMs 60 are joined by the first and second engagement parts 61 and 62, the joints between the TPMs 60 can be increased in strength. [0076] Further, the bus bar electrode 120 used in this embodiment is provided with the module side electrode terminals in symmetry with respect to the external electrode terminal. Thus, the wiring lengths from the external electrode terminal to the module side electrode terminals become equal to each other. This prevents thermal stress that is produced in semiconductor elements when current flowing into or out of each TPM 60 loses its balance. [0077] Furthermore, the N-pole connection bus bar electrode 123 and the P-pole connection bus bar electrode 124, for example, are superimposed with the insulating sheet 126 interposed therebetween. A parasitic capacitor is formed in the superimposed portion of the electrodes 123 and 124. The N-pole connection bus bar electrode 123 and the P-pole connection bus bar electrode 124, which become connected via the parasitic capacitor, reduce parasitic inductance equivalently thus suppressing the occurrence of a switching surge. [0078] Although a 2 in 1 type parallel-connected circuit is formed by using four TPMs 60 in this embodiment, 6 in 1 type, 12 in 1 type and the like circuits can also be formed by using more TPMs 60. Third Preferred Embodiment [0079] FIG. 11 shows the structure of a transfer mold type power module 90 forming a semiconductor device according to a third preferred embodiment of the present invention. As shown, in this embodiment, all semiconductor elements that correspond to the 2 in 1 type circuit structure shown in FIG. 9, for example, are sealed with resin by the transfer molding method. [0080] The TPM 90 is provided with the projection 35 at each of the four corners on its front main surface, and screws holes 31 for connection to a shielding plate (not shown). The screw holes 31 are disposed in three places at regular internals in the longitudinal direction as viewed from top view. [0081] A plurality of electrodes 111 are drawn out from a side surface of the TPM 90 along the longitudinal direction. The control pins 32 are drawn out from a side surface of the TPM 90 opposed to the electrodes 111. [0082] The TPM 90 according to this embodiment, which does not need the first and second engagement parts formed thereon, requires a smaller footprint than the TPM 60 according to the second preferred embodiment does. In addition, the number of components such as the projections 35 and the like can be reduced. Fourth Preferred Embodiment [0083] FIG. 12 shows the structure of a transfer mold type power module 200 forming a semiconductor device according to a fourth preferred embodiment of the present invention. The TPM 200 is a power module in which the bus bar electrode 120 is joined to a power semiconductor element (not shown) inside the TPM 200 by wire bonding, and then the bus bar electrode 120 and the power semiconductor element inside the TPM 200 are sealed together with resin by the transfer molding method. [0084] FIG. 13 shows a final drawing of the semiconductor device using the TPM 200 according to this embodiment. The shielding plate 40 is mounted on the TPM 200. The shielding plate 40 is fastened on the TPM 200 by the screws 41 and the temporary fastening members 43. [0085] FIG. 14 shows an exploded view of the semiconductor device using the TPM 200 according to this embodiment. [0086] Subsequently, a method of manufacturing the semiconductor device according to this embodiment will be described. First, the shielding plate 40 is mounted on a front main surface of the TPM 200. The shielding plate 40 is joined on the TPM 200 by the screws 41 via the screw holes 42 provided in the shielding plate 40 and the screw holes 31 provided in the TPM 200. Next, the control substrate 50 is mounted on the projections 35 of the TPM 200 by the screws 51, to complete the semiconductor device shown in FIG. 13. [0087] With the control substrate 50 being mounted, a function test on the power module can be conducted at this stage. After conducting the function test, a cooling fin 500 is mounted as shown in FIG. 15. The cooling fin 500 is provided with screw holes not shown in positions that correspond to the screw holes 31 provided in the TPM 200. [0088] When mounting the TPM 200 on the cooling fin 500, the temporary fastening members 43 are removed, and then the TPM 200 is placed such that the screws 41 are put through the screw holes of the cooling fin 500. The TPM 200 is then mounted on the cooling fin 500 by tightening the screws 41 by an appropriate tool via the through holes 53 provided in the control substrate 50. At this time, being pressed by the shielding plate 40, the TPM 200 is brought into complete contact with the cooling fin 500. [0089] With such structure as described above, the semiconductor device according to this embodiment eliminates the addition of the module side electrode terminals by molding the bus bar electrode 120 and the power semiconductor element inside the TPM 200 together, allowing a reduction in the number of components. Moreover, because the joints between the TPM side electrodes and the module side electrode terminals of the bus bar electrode 120 are no longer needed, the wiring length of the bus bar electrode 120 is reduced correspondingly, allowing a reduction in parasitic inductance. Fifth Preferred Embodiment [0090] Power semiconductor devices usually have peripheral components connected, such as smoothing capacitor, discharge resistor, snubber capacitor between electrodes, reactor and the like. In a fifth preferred embodiment of the present invention, those peripheral components are also sealed with resin by the transfer molding method. [0091] The resin sealing including the peripheral components allows a reduction in the number of components to be fabricated, a reduction in the number of process steps, and also miniaturization of the semiconductor device. [0092] While the invention has been shown and described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous modifications and variations can be devised without departing from the scope of the invention. Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS5134546 *Aug 26, 1991Jul 28, 1992Mazda Motor CorporationVehicle control unit structureUS5606919 *Jun 7, 1995Mar 4, 1997Haworth, Inc.Space-dividing fence for power and/or communication distributionUS5793106 *Feb 28, 1996Aug 11, 1998Hitachi, Ltd.Semiconductor deviceUS6181590 *Nov 8, 1999Jan 30, 2001Mitsubishi Denki Kabushiki KaishaPower inverterUS6215679 *May 23, 2000Apr 10, 2001Mitsubishi Denki Kabushiki KaishaAlternator power converterUS6501167 *May 16, 2001Dec 31, 2002Nissan Motor Co., Ltd.Low inductance power wiring structure and semiconductor deviceUS6509629 *Jan 16, 2001Jan 21, 2003Mitsubishi Denki Kabushiki KaishaPower moduleUS6646884 *May 30, 2000Nov 11, 2003Tyco Electronics Logistics AgSandwich-structured intelligent power moduleUS6700191 *Mar 22, 2002Mar 2, 2004Continental Isad Electronic Systems Gmbh & Co. OhgElectronic power circuit of several power modulesUS6703699 *Aug 7, 2002Mar 9, 2004Mitsubishi Denki Kabushiki KaishaSemiconductor deviceUS6762937 *Dec 10, 2002Jul 13, 2004Mitsubishi Denki Kabushiki KaishaPower moduleUS6822850 *Jun 5, 2003Nov 23, 2004Rockwell Automation Technologies, Inc.Laminated bus bar for use with a power conversion configurationUS6822865 *Jun 18, 2003Nov 23, 2004Robert Bosch GmbhCooling device for semiconductor modulesUS6900986 *Mar 29, 2004May 31, 2005Mitsubishi Denki Kabushiki KaishaPower moduleUS6903457 *Mar 18, 2003Jun 7, 2005Mitsubishi Denki Kabushiki KaishaPower semiconductor deviceUS6956742 *Jun 5, 2003Oct 18, 2005Rockwell Automation Technologies, Inc.Compact liquid converter assemblyUS7190070 *Apr 9, 2004Mar 13, 2007Semikron Elektronik Gmbh & Co. KgModular power semiconductor moduleUS20050051874 *Mar 3, 2004Mar 10, 2005Mitsubishi Denki Kabushiki KaishaPower semiconductor device* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS8698287Jun 9, 2010Apr 15, 2014Fuji Electric Co., Ltd.Semiconductor deviceUS8791662Jul 1, 2010Jul 29, 2014Mitsubishi Electric CorporationPower semiconductor module, electric-power conversion apparatus, and railway vehicleUS9190397Feb 14, 2012Nov 17, 2015Mitsubishi Electric CorporationSemiconductor deviceUS9324630Feb 14, 2012Apr 26, 2016Mitsubishi Electric CorporationSemiconductor deviceUS20140355219 *May 28, 2014Dec 4, 2014Fuji Electric Co., Ltd.Semiconductor device* Cited by examinerClassifications U.S. Classification361/715, 257/E25.03International ClassificationH05K7/20Cooperative ClassificationH01L2924/0002, H05K7/1432, H01L25/162European ClassificationH05K7/14F7D, H01L25/16FLegal EventsDateCodeEventDescriptionApr 20, 2005ASAssignmentOwner name: RENESAS DEVICE DESIGN CORP., JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:USHIJIMA, KOICHI;HASSAN, HUSSEIN KHALID;MIYAMOTO, NOBORU;REEL/FRAME:016497/0824Effective date: 20050412Owner name: MITSUBISHI DENKI KABUSHIKI KAISHA, JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:USHIJIMA, KOICHI;HASSAN, HUSSEIN KHALID;MIYAMOTO, NOBORU;REEL/FRAME:016497/0824Effective date: 20050412Oct 5, 2005ASAssignmentOwner name: MITSUBISHI DENKI KABUSHIK KAISHA, JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KAISHA, MITSUBISHI DENKI KABUSHIKI;RENESAS DEVICE DESIGNCORP.;REEL/FRAME:017061/0261Effective date: 20050331Mar 14, 2012FPAYFee paymentYear of fee payment: 4Mar 30, 2016FPAYFee paymentYear of fee payment: 8RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services