Source: https://patents.google.com/patent/US7776717
Timestamp: 2018-02-24 13:06:37
Document Index: 183024418

Matched Legal Cases: ['Application No. 98924756', 'Application No. 10', 'Application No. 07016247', 'Application No. 08153348', 'art 2', 'art 1']

US7776717B2 - Controlled process and resulting device - Google Patents
US7776717B2
US7776717B2 US11841970 US84197007A US7776717B2 US 7776717 B2 US7776717 B2 US 7776717B2 US 11841970 US11841970 US 11841970 US 84197007 A US84197007 A US 84197007A US 7776717 B2 US7776717 B2 US 7776717B2
US11841970
US20080038901A1 (en )
The above sequence of steps provides a step of initiating a controlled cleaving action using an energy applied to a selected region(s) of a multi-layered substrate structure to form a cleave front(s) according to the present invention. This initiation step begins a cleaving process in a controlled manner by limiting the amount of energy applied to the substrate. Further propagation of the cleaving action can occur by providing additional energy to selected regions of the substrate to sustain the cleaving action, or using the energy from the initiation step to provide for further propagation of the cleaving action. This sequence of steps is merely an example and should not limit the scope of the claims defined herein. Further details with regard to the above sequence of steps described in below in references to the Figs.
21. The method of claim 19 wherein the impulse of thermal energy from the thermal source is applied in conjunction with a photon beam, a fluid jet, a liquid jet, a gas jet, an electromagnetic field, an electron beam, a thermoelectric heating, or furnace heating.
US11841970 1997-05-12 2007-08-20 Controlled process and resulting device Active US7776717B2 (en)
US4627697 true 1997-05-12 1997-05-12
US09025967 US6159824A (en) 1997-05-12 1998-02-19 Silicon-on-silicon wafer bonding process using a thin film blister-separation method
US09026034 US6013563A (en) 1997-05-12 1998-02-19 Controlled cleaning process
US09483393 US6632724B2 (en) 1997-05-12 2000-01-13 Controlled cleaving process
US10644644 US7160790B2 (en) 1997-05-12 2003-08-19 Controlled cleaving process
US11281042 US7371660B2 (en) 1997-05-12 2005-11-16 Controlled cleaving process
US11627925 US20070122997A1 (en) 1998-02-19 2007-01-26 Controlled process and resulting device
US11841970 US7776717B2 (en) 1997-05-12 2007-08-20 Controlled process and resulting device
US20080038901A1 true US20080038901A1 (en) 2008-02-14
US7776717B2 true US7776717B2 (en) 2010-08-17
US11627925 Abandoned US20070122997A1 (en) 1997-05-12 2007-01-26 Controlled process and resulting device
US11841970 Active US7776717B2 (en) 1997-05-12 2007-08-20 Controlled process and resulting device
US3117002A (en) 1960-02-16 1964-01-07 Ampco Metal Inc Aluminum bronze alloy having improved wear resistance by the addition of cobalt, chromium, and manganese
US3392069A (en) 1963-07-17 1968-07-09 Siemens Ag Method for producing pure polished surfaces on semiconductor bodies
FR2235474A1 (en) 1973-06-28 1975-01-24 Ibm
FR2261802A1 (en) 1974-02-21 1975-09-19 Devienne Fernand
FR2298880A1 (en) 1975-01-22 1976-08-20 Commissariat Energie Atomique Method and ion implantation device
US4139858A (en) 1977-12-12 1979-02-13 Rca Corporation Solar cell with a gallium nitride electrode
FR2519437A1 (en) 1982-01-04 1983-07-08 Commissariat Energie Atomique The limiting device and control the temperature of a target based on a holder in a vacuum chamber and receiving an energy beam and its application to thermal measurements
FR2529383A1 (en) 1982-06-24 1983-12-30 Commissariat Energie Atomique target holder has mechanical scanning used in particular for the implementation of Ioris
FR2537777A1 (en) 1982-12-10 1984-06-15 Commissariat Energie Atomique Method and particle implantation device in a solid
FR2537768A1 (en) 1982-12-08 1984-06-15 Commissariat Energie Atomique Method and density of particle beam obtaining device spatially modulated, application to the etching and the ion implanting
FR2563377A1 (en) 1984-04-19 1985-10-25 Commissariat Energie Atomique Process for manufacturing an insulating layer buried in a semiconductor substrate by ion implantation
FR2575601A1 (en) 1984-12-27 1986-07-04 Commissariat Energie Atomique Method and device for determining electrical parameters of a semiconductor layer as a function of depth
GB2211991A (en) 1987-10-30 1989-07-12 Atomic Energy Authority Uk Electrical isolation of regions within semiconductor bodies
WO1995010718A1 (en) 1993-10-13 1995-04-20 Zexel Torsen Inc. Differential with friction-enhancing wedge
US5424269A (en) * 1993-02-09 1995-06-13 Minnesota Mining And Manufacturing Company Thermal transfer systems having delaminating coatings
FR2714524A1 (en) 1993-12-23 1995-06-30 Commissariat Energie Atomique Process for producing a relief structure on a substrate of semiconductor material.
FR2715502A1 (en) 1994-01-26 1995-07-28 Commissariat Energie Atomique Structure having cavities and method of making such a structure.
FR2715501A1 (en) 1994-01-26 1995-07-28 Commissariat Energie Atomique A process for depositing semiconductor blades on a support.
WO1995031825A1 (en) 1994-05-18 1995-11-23 Commissariat A L'energie Atomique Method for production of a structure with a low level of dislocations and having an oxide layer buried in a semiconductor substrate
FR2725074A1 (en) 1994-09-22 1996-03-29 Commissariat Energie Atomique Process for manufacturing a structure comprising a thin semiconductor layer on a substrate
US5514235A (en) 1993-06-29 1996-05-07 Shin-Etsu Handotai Co., Ltd. Method of making bonded wafers
US5785039A (en) * 1995-11-29 1998-07-28 Sumitomo Electric Industries, Ltd. Single-crystalline diamond tip for dresser and dresser employing the same
US5796140A (en) 1994-08-23 1998-08-18 Nippon Steel Corporation Nonvolatile semiconductor memory device and a method of making the same
US5897743A (en) 1996-01-22 1999-04-27 Komatsu Electronic Metals Co., Ltd. Jig for peeling a bonded wafer
US6066915A (en) 1997-03-28 2000-05-23 Pixtech Sa Spacer arrangement in a flat display screen
US6177322B1 (en) 1998-10-23 2001-01-23 Advanced Mictro Devices, Inc. High voltage transistor with high gated diode breakdown voltage
US6335269B1 (en) 1998-09-04 2002-01-01 Canon Kabushiki Kaisha Semiconductor substrate and method for producing the same
US20020174828A1 (en) 2001-03-30 2002-11-28 Memc Electronic Materials, Inc. Thermal annealing process for producing silicon wafers with improved surface characteristics
US20030096098A1 (en) 2001-10-05 2003-05-22 Ovshinsky Stanford R. Semiconductor with coordinatively irregular structures
US20030186493A1 (en) 2000-04-03 2003-10-02 Atsushi Iwasaki Method and device for making substrates
EP1085562A3 (en) 1999-09-17 2004-06-09 Applied Materials, Inc. Apparatus and method for surface finishing a silicon film
US20040253794A1 (en) 2001-05-18 2004-12-16 Faris Sadeg M. MEMS and method of manufacturing MEMS
US6858107B2 (en) 2002-07-17 2005-02-22 S.O.I. Tec Silicon On Insulator Technologies S.A. Method of fabricating substrates, in particular for optics, electronics or optoelectronics
US20010019371A1 (en) 1990-12-31 2001-09-06 Kopin Corporation Method of transferring semiconductors
EP0665588A1 (en) 1994-01-26 1995-08-02 Commissariat A L'energie Atomique Deposition process of semiconductor layers on a support
FR2720189A1 (en) 1994-05-18 1995-11-24 Commissariat Energie Atomique A method of making a low dislocation density structure comprising a buried oxide layer in a semiconductor substrate.
EP0807970B1 (en) 1996-05-15 2008-04-02 Commissariat A L'energie Atomique Method of manufacturing a thin semiconductor layer
EP0843344B1 (en) 1996-11-15 2002-01-23 Canon Kabushiki Kaisha Process for transferring a semiconductor layer using silicon on insulator (SOI) technology
Adan et al., SOL as a mainstream IC technology Proceedings 1998 IEEE International SOL conference, Oct. 1998, pp. 9-12.
Alles et al., Thin Film Silicon on Insulator: An Enabling Technology, Semiconductor International, pp. 67-72 (1997).
Auberton-Herve, "SOI: Materials to Systems", International Electron Devices Meeting, 1996, San Francisco, CA, USA, Dec. 8-11, 1996, New York, NY, USA, IEEE, US, Dec. 8, 1996, pp. 3-10.
Basta, Ion-Beam Implantation, High Technology (1985).
Belford et al., Performance-Augmented CMOS using Back-end Uni axial Strain 2002 Device Research Conference, Santa Barbara, CA.
Brendel, A Novel Process for Ultrathin Monocrystalline Silicon Solar Cells on Glass, 14th European Photovoltaic Solar Energy Conference Barcelona, Spain, Jun. 30-Jul. 4, 1997.
Burggraff, Advanced Plasma Source: What's Working?, Semiconductor International. pp. 56-59 (May 1994).
Carter et al., "The Collection of Ions Implanted in Semiconductors II. Range distributions Derived from Collection and Sputter-Etch Curves, " Radiation Effects, vol. 16, pp. 107-114 (1972).
Cassidy, Ion Implantation Process Toughens Metalworking Tools, Modern Metals, pp. 65-67.
Cheung, Plasma Immersion Ion Implantation for Semiconductor Processing, Material Chemistry and Physics, 46(2-3): 132-139 (1996).
Cho et al., "Vapor Etching of Silicon Substrates with HCI Gas" Journal of the Korean Institute of Electronic Engineering, Apr. 25, 1984, pp. 41-45, vol. 21, No. 5.
Choyke et al., A Comparative Study of Near-Surface Effects Due to Very High Fluence H+ Implantation in Single Crystal FZ, CZ, and Web SI, Mat. Res. Soc. Symp. Proc., 27:359-364 (1984).
Choyke et al., Implanted Hydrogen Effects at High Concentrations in Model Low Z Shielding Materials, J. Nuc. Mtrls., 122-23:1585-86 (1984).
Choyke et al., Mechanical Response of Single Crystal Si to Very High Fluence H+ Implantation, Nuc. Instr. Meth., 209-210:407-412 (1983).
Chu et al., Plasma Immersion Ion Implantation-A Fledgling Technique for Semiconductor Processing, Materials Science and Engineering Reports: A Review Journal, R17(6-7): 207-280 (1996).
Chu et al., Plasma Immersion Ion Implantation—A Fledgling Technique for Semiconductor Processing, Materials Science and Engineering Reports: A Review Journal, R17(6-7): 207-280 (1996).
Chu et al., Recent Applications of Plasma Immersion Ion Implantation, Semiconductor International, pp. 165-172 (1996).
Chu, Synthesis of SOI Materials Using Plasma Immersion Ion Implantation, 1997 Mat. Res. Soc. Symp. Proc., 438:333-343 (1997).
Chuang et al., Design Considerations of SOI Digital CMOS VLSI, Proceedings 1998 IEEE International SOI Conference, Oct. 1998, pp. 5-8.
Comita et al., Low Temperature SI and SIGe Epitaxy for sub 01.mum Technology, AMAT Conference Paper, Mar. 10, 2003.
Comita et al., Low Temperature SI and SIGe Epitaxy for sub 01.μm Technology, AMAT Conference Paper, Mar. 10, 2003.
Communication pursuant to Article 96(2) EPC of EP Application No. 98924756.4-1528, date of mailing Sep. 21, 2007, 7 pages total.
Corbett et al., Embrittlement of Materials: Si(H) as a Model System, J. Nuc. Mtrls., 169: 179-184 (1989).
Deegan et al., Wavy and rough cracks in silicon. Center for Nonlinear Dynamics and Department of Physics, The University of Texas at Austin, Austin, Texas 78712, USA, Phys. Rev. E 67, 066209 (2003) [7 pages].
English Translation of Japanese Office Action for Application No. 10-549371, date of mailing Apr. 22, 2009, 3 pages total.
EPI Centura, Systems Specifications Brochure, Applied Materials, Oct. 1996.
European Patent Search Report for European Application No. 07016247.4, dated Apr. 24, 2008, 8 pages total.
European Patent Search Report for European Application No. 08153348.1, dated Jun. 3, 2008, 8 pages total.
Feijo et al., Pre stressing of Bonded Wafers, Proceedings of the First International Symposium on Semiconductor Wafer Bonding Science, Technology and Applications (Electrochemical Society, New York, 1992, v. 92.7, pp. 230-238.
Ge et al., Process-Strained Si (PSS) CMOS Technology Featuring 3D Strain Engineering, IEEE International Electron Devices Meeting, Washington, DC, Dec. 2003.
Grovernor, C.R.M., Microelectric Materials (1989), pp. 73-75.
Habuka et al., Change in Microroughness of a Silicon Surface during in Situ Cleaning Using HF and HCL Gases, Journal of the Electrochemical Society, Electrochemical Society, Manchester, NY, v. 145, No. 12, Dec. 1998, pp. 4264-4271.
Hobart et al., "Fabrication of SOI Substrates with Ultra-Thin Si Layers" Electronics Letters, IEE Stevenage, GB, vol. 34, No. 12, Jun. 11, 1998, pp. 1265-1267.
Hobart et al., "Ultra-Cut: A Simple Technique for the Fabrication of SOI Substrates with Ultra-Thin (>5 nm) Silicon Films," IEEE International SOI Conference, 1998. Proceedings, Stuart, FL, USA, Oct. 5-8, 1998, New York, NY, USA, IEEE, US, Oct. 5, 1998, pp. 145-146.
Hulett et al., Ion Nitriding and Ion Implantation: A Comparison, Metal Progress, pp. 18-21 (1985).
I.B.M., Technical Disclosure Bulletin, vol. 29: No. 3, p. 1416 (Aug. 1986).
International Search Report and Written Opinion of PCT Application No. PCT/US07/78023, date of mailing Jul. 25, 2008, 13 pages total.
International Search Report of PCT Application No. PCT/US98/09567, date of mailing Sep. 29, 1998, 4 pages total.
IQE'S Smooth Approach Increases Carrier Mobilities, News, www.compoundsemiconductor.net, Dec. 2004.
Johnson et al., Hydrogen-Induced Platelets in Silicon: Separation of Nucleation and Growth, Mtrls. Sci. Forum, 83-87:33-38 (1992).
Krivokapic et al., "Strain Relaxation in Narrow Width Strained Silicon Devices with Poly and Metal Gates", Electrochemical Society Proceedings vol. 2004-07, pp. 459-469, Pennington, New Jersey USA (2004).
Lee et al., A Novel Pattern Transfer Process for Bonded SOI Giga-bit DRAMS, 1996 IEEE Int'l. SOI Conference Proceedings, IEEE Electron Devices Society, (1996.).
Lee et al., Strained Silicon Thin-Film Transistors Fabricated on Glass, Appl. Phys. Lett 86, 103504 (2005).
Ll, Novel Semiconductor Substrate Formed by Hydrogen Ion Implantation into Silicon, Appl. Phys. Lett., 55(21):2223-2224 (1989).
Lu et al., SOI Material Technology Using Plasma Immersion Ion Implantation, Proceedings 1996 IEEE International SOI Conference (Oct. 1996).
Mahajan et al., Principles of Growth and Processing Semiconductors, WCB McGraw-Hill, chapter 6, pp. 262-269. (1999).
Mantl et al. Enhanced Strain Relaxation of Epitaxial SiGe-Layers on Si(100) Improved by Hydrogen Implantation, Nuclear Instruments and Methods in Physics Research Section B, Jan. 1999, v. 147, Issue 1-4, p. 29-34.
Matsuda et al., Large Diameter Ion Beam Implantation System, Nuclear Instruments and Methods, B21:314-316 (1987).
Milnes et al., Peeled Film Technology for Solar Cells, pp. 338-341. (1975).
Moreau, Semiconductor Lithography, Principles, Practices, and Materials, Plenum Press (1988).
Moriceau et al., Hydrogen Annealing Treatment Used to Obtain High Quality SOI Surfaces, Proceedings of 1998 IEEE Int. SOI Conference, pp. 37-38 from conference held Oct. 5-8, 1998.
Morrison et al., Deposition of Micro-Crystalline Silicon using a Graphite Filament in the Hot Wire CVD Technique, J. Vac. Sci. Technol A19 (6), Nov./Dec. 2001, p. 2817.
Mukashev et al., Hydrogen Implantation into Silicon: Infra-Red Absorption Spectra and Electrical Properties, Institute of High Energy Physics, Academy of Sciences of the Kazakh SSR, Alma-Ata 1; 91, 509 (1985).
Notice of Allowance for U.S. Appl. No. 09/025,967 dated Jul. 17, 2000.
Notice of Allowance for U.S. Appl. No. 09/026,034, dated Jul. 27, 1999.
Notice of Allowance for U.S. Appl. No. 09/483,393, dated Mar. 7, 2003.
Notice of Allowance for U.S. Appl. No. 09/483,393, dated Nov. 27, 2001.
Notice of Allowance for U.S. Appl. No. 10/644,644, dated Sep. 27, 2006.
Notice of Allowance for U.S. Appl. No. 11/281,042, dated Dec. 31, 2007.
Notification of Transmittal of International Preliminary Examination Report of PCT Application No. PCT/US98/09567, date of mailing Mar. 16, 1999, 4 pages total.
Office Action for U.S. Appl. No. 09/025,967 dated Aug. 5, 1999.
Office Action for U.S. Appl. No. 09/025,967 dated Jan. 19, 2000.
Office Action for U.S. Appl. No. 09/025,967 dated Jan. 21, 1999.
Office Action for U.S. Appl. No. 09/483,393, dated Apr. 25, 2001.
Office Action for U.S. Appl. No. 09/483,393, dated Feb. 12, 2002.
Office Action for U.S. Appl. No. 09/483,393, dated May 2, 2002.
Office Action for U.S. Appl. No. 09/483,393, dated Nov. 21, 2000.
Office Action for U.S. Appl. No. 10/644,644, dated Jan. 18, 2006.
Office Action for U.S. Appl. No. 10/644,644, dated Jun. 13, 2006.
Office Action for U.S. Appl. No. 10/644,644, dated Jun. 24, 2005.
Office Action for U.S. Appl. No. 11/281,042, dated Aug. 28, 2007.
Office Action for U.S. Appl. No. 11/281,042, dated Jan. 17, 2007.
Office Action for U.S. Appl. No. 11/627,925, dated Apr. 24, 2009.
Office Action for U.S. Appl. No. 11/627,925, dated Jan. 8, 2009.
Office Action for U.S. Appl. No. 11/627,925, dated Jun. 17, 2008.
Office Communication and Notice of Allowability for U.S. Appl. No. 09/026,034, dated Sep. 20, 1999.
Onojima et al., Lattice Relaxation Process of A1N Growth on Atomically Flat 6H-SIC Substrate in Molecular Beam Epitaxy, Journal of Crystal Growth, North-Holland Publishing Co., Amsterdam, NL, v. 2370239, Apr. 2002, pp. 1012-1016.
Oshima et al., Defects in Si Irradiated with D-T neutrons, D and He Ions, J. Nuc. Mtrls., 179-181:947-950 (1991).
Picraux et al., Ion Implantation of Surfaces, Scientific American, 252(3):102-113 (1985).
Renier et al., A New Low-Energy Ion Implanter for Bombardment of Cylindrical Surfaces, Vacuum, 35(12):577-578 (1985).
Saenger et al., Amorphization/templated recrystallization Method for Changing the Orientation of Single-Crystal Silicon: An Alternative Approach to Hybrid Orientation Substrates, Appl. Phys. Lett. 87, 221911, 2005.
Sato et al., Suppression of Si Etching During Hydrogen Annealing of Silicon-on-Insulator, Proceedings of 1998 IEEE Int. SOI Conference, pp. 17-18 from conference held Oct. 5-8, 1998.
Sherman et al., Energy Considerations in Crack Deflection Phenomenon in Single Crystal Silicon, International Journal of Fracture, vol. 140, No. 1-4, 2006, pp. 125-140(16).
Sioshansi, Ion Beam Modification of Materials for Industry, Thin Solid Film, 118:61-71 (1984).
Smith, Thin Film Deposition, McGraw-Hill Inc., pp. 185-196, 278-293. (1995).
Sze, VLSI Technology, 2nd Edition, pp. 9-101, (1988).
Tate et al., Defect Reduction of Bonded SOI Wafers by Post Anneal Process in H/sub 2/Ambient, Proceedings of 1998 IEEE Int. SOI Conference, pp. 141-142 from conference held Oct. 5-8, 1998.
Thompson, Strained Silicon MOSFETs: The Next Material Change to Extend Moore's Law, University of Florida, Spring MRS 2004.
Tong et al., A Smarter-cut approach to low temperature silicon layer transfer, Appl. Phys. Lett., 72(1): 49-51 (1998).
Tong et al., Semiconductor Wafer Bonding: Science and Technology, John Wiley & Sons, Inc., pp. 152-171 (1999).
U.S. Dept. of Energy, The Fusion Connection, Plasma Coating. (1985).
Weldon et al., On the Mechanism of the Hydrogen-Induced Exfoliation of Silicon, J. Vac. Science Tech. B, 15(4), Jul./Aug. 1997.
Wolf et al., Silicon Processing for the VLSI Era vol. 1-Process Technology, p. 139, 1986 by Lattice Press, Sunset Beach, California, ISBN 0-961672-3-7, Reprinted with corrections Jun. 1987.
Wolf et al., Silicon Processing for the VLSI Era vol. 1-Process Technology, pp. 547-549, 1986 by Lattice Press, Sunset Beach, California, ISBN 0-961672-3-7, Reprinted with corrections Jun. 1987.
Wolf, Silicon Processing for the VLSI Era vol. 2, pp. 66-79, Lattice Press (1990).
Wu et al., From Incident Laser Pulse to Residual Stress: A Complete and Self-closed Model for Laser Shock Peening, Feb. 2007. ,Journal of Manufacturing Science & Engineering, vol. 129, pp. 117-125.
Wu et al., Two dimensional hydrodynamic simulation of high pressures induced by high power nanosecond laser-matter interactions under water, Journal of Applied Physics, vol. 101, Issue 10, pp. 103514-103514-8 (2007).
Yaguchi et al., Strain Relaxation in MBE-Grown SI1-SGEX/SU (100) Heterostructures by Annealing, Japanese Journal of Applied Physics, Tokyo, JP, v. 30, No. 8B Part 2, Aug. 1991, pp. L1450-L1453.
Yamada et al., Thermal Damage of Silicon Wafer in Thermal Cleaving Process With Pulsed Laser and CW Laser, Laser-based Micropackaging, edited by Friedrich G. Bachmann, Willem Hoving, Yongfeng Lu, Kunihiko Washio, Proc. of SPIE vol. 6107, 61070H, (2006).
Yang et al., High Performance CMOS Fabricated on Hybrid Substrate with Different Crystal Orientations, IEDM Tech. Dig., 2003, pp. 453-456.
Yang et al., On the Integration of CMOS with Hybrid Crystal Orientations, 2004 Symposium on VLSI Technology Digest of Technical Papers, 2004.
Yun et al., Study on the Etching Reaction of Silicon with Carbon Tetrafluoride in Electron Cyclotron Resonance Plasma Etching System, Journal of the Korean Institute of Chemical Engineers, Jun. 1993, pp. 255-262, Hwahak Konghak vol. 32, No. 3.
Zhang et al., Microscale Laser Shock Peening of Thin Films, Part 1: Experiment, Modeling and Simulation, vol. 126, No. 1, Feb. 2004, pp. 10-17.
Zheng et al., Orientation dependence of blistering in H-implanted Si, Department of Electrical and Computer Engineering, University of California, San Diego, La Jolla, California 92093-0407 , J. Appl. Phys. 89, 2972 (2001).
US20080038901A1 (en) 2008-02-14 application
US20070122997A1 (en) 2007-05-31 application