Source: http://www.google.com/patents/US5776827?ie=ISO-8859-1
Timestamp: 2015-05-27 08:42:06
Document Index: 476885924

Matched Legal Cases: ['art 13', 'art 13', 'art 13', 'art 13', 'art 13', 'art 13']

Patent US5776827 - Wiring-forming method - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsAn insulating layer 6 is formed covering a lower level wiring layer 5. Contact hole 11 registered with the lower level wiring 5 is then formed in the insulating layer 6. An adhesion layer 12 is sputtered on the lower level wiring layer 5 and a whole surface of the third level insulating layer 6. Then,...http://www.google.com/patents/US5776827?utm_source=gb-gplus-sharePatent US5776827 - Wiring-forming methodAdvanced Patent SearchPublication numberUS5776827 APublication typeGrantApplication numberUS 08/643,044Publication dateJul 7, 1998Filing dateMay 2, 1996Priority dateAug 27, 1993Fee statusPaidPublication number08643044, 643044, US 5776827 A, US 5776827A, US-A-5776827, US5776827 A, US5776827AInventorsSatoshi Hibino, Tetsuya KuwajimaOriginal AssigneeYamaha CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (17), Non-Patent Citations (8), Referenced by (5), Classifications (22), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetWiring-forming method
US 5776827 AAbstract
An insulating layer 6 is formed covering a lower level wiring layer 5. Contact hole 11 registered with the lower level wiring 5 is then formed in the insulating layer 6. An adhesion layer 12 is sputtered on the lower level wiring layer 5 and a whole surface of the third level insulating layer 6. Then, a blanket tungsten layer 13 is deposited on the adhesion layer 12. The whole surface of the blanket tungsten layer 13 is etched back until a small hollow gap is formed at the upper end portion of the contact hole 11, to leave the blanket tungsten layer 13 only in the inside of the contact hole 11. Thereafter, an Al alloy layer is reflow-sputtered on the whole surface of the insulating layer 6 and the inside of the contact holes at a comparatively low temperature to form an upper level wiring layer 15. The surface unevenness produced in etch-back process can be planarized. A wiring having a good coverage, a good quality of layer, and a flat surface can be formed.
1. A wiring-forming method comprising:forming an insulating layer covering an underlying layer including a contact portion exposed to an upper surface; forming a contact hole in said insulating layer at a position registered with said contact portion; sputtering at least one adhesion layer on the surface of said contact portion exposed in said contact hole and said insulating layer; depositing a blanket tungsten layer on said adhesion layer by CVD; etching the whole surface of said blanket tungsten layer until a small gap is formed at an upper end portion of the contact hole, to leave a tungsten film only in the inside of said contact hole; and forming a wiring layer on the whole surface of said insulating layer and the inside of the contact hole filled with said tungsten film by reflow-sputtering said wiring layer. 2. The wiring-forming method of claim 1, wherein said reflow-sputtering is performed in a temperature range of 350� to 500� C.
3. The wiring-forming method of claim 2, wherein said temperature range is 400� to 450� C.
9. The wiring-forming method of claim 8, wherein the blanket tungsten layer is formed by using hydrogen reduction of WF6.
15. The method of claim 10, wherein the step (i) is performed at a temperature in a range of 350�-500� C.
16. The method of claim 15, wherein the temperature is in a range of 400�-450� C.
18. The method of claim 17, wherein the blanket tungsten layer is formed by chemical vapor deposition using hydrogen reduction of WF6.
This application is a continuation-in-part application of U.S. patent application Ser. No. 08/296,022 filed on Aug. 25, 1994, now U.S. Pat. No. 5,529,955.
First, according to method (1), as shown in FIG. 3A, it has been the case that unnecessary tungsten 13a could remain at a step-like portion of adhesion layer 12 even though etching was performed to the extent that a tungsten layer 13 within a contact hole 11 reached the same level as the adhesion layer 12. An excessive etching or an over-etching exceeding the optimum level has to be performed to remove the unnecessary tungsten 13a. Thus, as shown in FIG. 3B, the surface of the tungsten layer 13 has recessed to a depth of about D1 =0.3 to 0.5 μm from an upper end portion of the contact hole 11. When a wiring layer 14 as of Al alloy was then formed by the usual sputtering, the wiring layer 14 is also recessed approximately the same amount as the depth D1 of the surface of the tungsten layer 13 within the contact hole 11, as shown in FIG. 3C.
Next, according to method (2), as shown in FIG. 4, when contact holes 11a and 11b each having a different depth were formed, a tungsten layer 13 having a thickness corresponding to the shallower contact hole 11b fills the holes. Accordingly, a gap with a depth from an upper end portion of the hole 11a to the surface of the tungsten layer 13 of about D2 =0.3 to 0.5 μm results in the contact hole 11a which is deeper than the contact hole 11b. Thus, when a wiring layer 14 is deposited, a surface of the wiring layer 14 is recessed at a part corresponding to the contact hole 11a.
An object of the present invention is to provide a wiring-forming method for forming a wiring layer having good coverage, good quality, and a flat surface.
The reflow sputtering mentioned above is preferably performed at a temperature range from 350� C. to 500� C.
FIGS. 1A to 1K are longitudinal sectional views of a semiconductor device for illustrating steps of a wiring-forming method according to a first embodiment of the present invention.
The present inventor has achieved various experiments and discussions and has found that there is a novel problem in the aforementioned method (1). A tungsten layer 13 formed by CVD using the hydrogen reduction of WF6 on an adhesion layer 12, as shown in FIG. 6A, includes large grown crystal grains and forms an unevenness on the surface of the tungsten layer 13 which results in surface asperity. For example, a difference of height D3 between the top of a convex part 13b and the bottom of a concave part 13c of the tungsten layer 13 is approximately 300 nm.
For leaving tungsten only at contact holes, the tungsten layer 13 is etched back. As shown in FIG. 6B, tungsten at the concave part 13c is etched off firstly to expose the adhesion layer 12. At this stage, tungsten at the convex part 13b still remains. It is thus necessary to further continue etching. By further continuing etching, an exposed part of the adhesion layer 12 is also etched even if the etching rate is low. When over-etching is finished, as shown in FIG. 6C, the surface of the adhesion layer 12 is provided with an unevenness resulting from depressions generated through the overetching. Such unevenness is smaller than that of the surface of the tungsten layer 13 before etching. For example, when the difference of height D3, between the top of a convex part 13b and the bottom of a concave part 13c of the tungsten layer is approximately 300 nm, a difference of height between the top of a convex part and the bottom of a concave part of the adhesion layer 12 is approximately 30 nm. When a wiring layer, as of Al alloy, is formed on the surface of the uneven adhesion layer 12, by usual sputtering, the wiring layer will have the same unevenness as is provided on the surface of the adhesion layer 12. At the time of exposure of a photo-resist in the step of patterning a wiring, such unevenness formed on the surface of the wiring layer will result in an irregular reflection of the exposing light on the surface of the wiring layer, and will disable formation of desired mask, meaning that it is difficult to form a desired wiring pattern.
In the first embodiment, a first level insulating layer 2 formed of an insulating film as of SiO2 is formed on a semiconductor substrate or wafer 1, as shown in FIG. 1A. A polycrystalline Si wiring 3 is formed on the first level insulating layer 2. Further, on the polycrystalline Si wiring 3 and the first level insulating layer 2, a second level insulating layer 4 of an insulating material as of SiO2 is formed. The second level insulating layer 4 has an undulated surface.
Thereafter, as shown in FIG. 1C, a third level insulating layer 6 formed of an insulating material as of SiO2 is formed on the second level insulating layer 4 and on the lower level wiring 5. Through the third level insulating layer 6, contact holes 11 are formed by etching. The Al alloy layer 5 also has an undulated surface. When plural contact holes above a convex portion of the Al alloy layer 5 and a concave portion of the Al alloy layer 5 are to be formed through the third level insulating layer 6, the depths of the contact holes differ because of the undulation.
Further, as shown in FIG. 1D, on a surface of the contact holes 11 and a whole surface of the third level insulating layer 6, an adhesion layer 12 formed of one or more materials selected from a group of Ti, TiN, TiW, TiON and WSi is formed by using sputtering or a CVD method. The adhesion layer 12 firmly adheres to a tungsten layer to be successively formed thereon. To accomplish this purpose, the adhesion layer 12 may be formed by laminating plural layers, each comprising a material selected from a group of Ti, TiN, TiW, TiON and WSi (for example, laminating a Ti layer and a TiN layer). When the adhesion layer 12 of Ti is formed by sputtering, the sputtering conditions, for example, are as follows. The substrate heated to approximately 200� C. is located in an argon gas atmosphere at a pressure of 4 mTorr, and a flow rate of 20 sccm, approximately. Raw material of an adhesion layer 12 is deposited on the substrate 1 with a growth rate of approximately 100 nm/min until the layer has a thickness of approximately 20 nm. When the adhesion layer 12 of TiN is formed by sputtering, the sputtering conditions, for example, are as follows. The substrate heated to approximately 200� C. is placed in an Ar/N2 mixture gas atmosphere at a pressure of 4 mTorr, and an approximate flow rate of 8/20 sccm, respectively. Raw material of an adhesion layer 12 is deposited on the substrate 1 with a growth rate of approximately 100 nm/min until the layer has a thickness of approximately 100 nm. When the adhesion layer 12 of WSi is formed by sputtering, the sputtering conditions, for example,are as follows. The substrate heated to approximately 200� C. is located in an argon gas atmosphere at a pressure of 8 mTorr, and a flow rate of 20 sccm, approximately. Raw material of an adhesion layer 12 is deposited on the substrate 1 with a growth rate of approximately 200 nm/min until the layer has a thickness of approximately 50 nm.
The adhesion layer 12 may also be formed of other materials such as tungsten (W), and molybdenum silicide (MoSi). These adhesion layers may be formed by sputtering using a target formed of W or MoSi. An example of sputtering conditions is: the sputtering gas being Ar, the pressure of the sputtering gas being 4 mTorr, DC power of sputtering being 5 kW, substrate temperature being about 200� C. and thickness of a sputtered film being about 100 nm.
Next, as shown in FIG. 1E, a blanket tungsten layer 13 is formed on the adhesion layer 12 by a method such as CVD. The contact holes 11 are filled with the blanket tungsten layer 13. The CVD conditions for forming the tungsten layer by a CVD method, for example, are as follows. The substrate heated to approximately 450� C. is located in a WF6 gas atmosphere at a pressure of 50 Torr, and a flow rate of 80 sccm, approximately. Raw material of the blanket tungsten layer 13 is deposited on the substrate 1 with a growth rate of approximately 300 to 500 nm/min until the tungsten layer 13 has a thickness of approximately 600 nm.
Conditions for forming a blanket tungsten layer by CVD may be: source gas being a mixture of WF6 +2 +Ar+N2, flow rates being 50-100 sccm for WF6, 500-2000 sccm for H2, 1000-2000 sccm for Ar, and 100-300 sccm for N2, respectively, pressure of the source gas being 50-100 Torr, and substrate temperature being 400�-500� C.
Next, the tungsten layer 13 is dry-etched with an etching gas, e.g. SF6, which has an etching selectivity ratio of the adhesion layer 12 and the tungsten layer 13 at 1:10 to 30, to leave the tungsten layer 13 only in the inside of the contact holes 11. In this step, when etching is insufficient, unnecessary tungsten is left at cavities other than contact holes on the surface of the adhesion layer 12. For example, when there is a step on the third level insulating layer 6, the adhesion layer 12 formed thereon will have a step. Thus unnecessary tungsten will be left at a lower part of the step of the adhesion layer 12. Therefore, an etching to be performed here, as shown in FIG. 1F, should be an over-etching on the whole surface of the tungsten layer except the contact holes. Thus, a gap is formed at the upper end portion of the contact holes 11 so that the surface of the tungsten layer 13 is positioned a little depth lower from the top end portion of the contact holes 11. At the maximum, the gap will be half the depth of the contact hole. As a result, the contact holes 11 are partially filled with tungsten.
Thereafter, as shown in FIG. 1G, an upper level wiring layer 15, formed of an Al alloy film, and the like is formed on a whole surface of the insulating layer 6 and the inside of the contact hole 11 filled with the tungsten layer 13, by reflow-sputtering a conductive wiring material such as AlSiCu (with 1 wt % of Si, 0.5 wt % of Cu, and remainder of Al) or the like at 500� C. or a lower temperature.
When a reflow-type sputtering is performed over 500� C. durability against migration is reduced, and grain size of conductive wiring material becomes too large. This results in a deterioration of surface shape of the upper wiring layer 15. And, moreover, when AlSiCu is employed as a conductive wiring material, silicon and copper may be crystallized because of the high temperature and will be left as residua when removing unnecessary portions in the step of patterning the upper level wiring. The residua may short-circuit the wirings.
Further, reflow sputtering is preferably performed at a temperature range of 400� to 500� C., and more preferably at a temperature range of 400� to 450� C. In these temperature ranges, the unevenness of a surface of the adhesion layer 12 can be compensated while keeping a flatness of the upper level wiring layer 15. This is because reflowed conductive material of the upper level wiring layer 15 fills depressions generated through the overetching process and further the conductive material is fluidized through the reflow-sputtering process so that the surface of the conductive material is smoothed.
When the temperature of the reflow-type sputtering is lower than 400� C., fluidization of the conductive material of the upper level wiring layer 15 is insufficient, thus, flatness of the upper level wiring layer 15 deteriorates.
The conditions of forming an upper level wiring layer 15 by a reflow-type sputtering method, for example, are as follows. The substrate 1 heated to approximately 150� C. is placed in an argon gas atmosphere at a pressure of 2 mTorr, and a flow rate of 20 sccm, approximately. AlSiCu is deposited on the substrate 1 with a growth rate of approximately 1 μm/min until the deposited layer has a thickness of approximately 500 nm, and the substrate 1 provided with AlSiCu wiring is heated at 450� C. for 120 sec.
In the wiring forming method according to the first embodiment, a third level insulating layer 6 is formed covering a lower level wiring layer 5 and contact holes 11 exposing the lower level wiring 5 are formed in the third level insulating layer 6. And an adhesion layer 12 is formed on the exposed surface of the lower level wiring layer 5 and the surface of the third level insulating layer 6. Further, after forming a tungsten layer 13 on the adhesion layer 12, the whole surface of the tungsten layer 13 is etched back until a small gap is formed at the upper end portions of the contact holes 11 to leave the tungsten layer 13 only at the inside of the contact holes 11. The inside of each of the contact holes 11 is over-etched at this stage. Thereafter, an Al alloy layer is reflow-sputtered on the surface of the remaining adhesion layer 12 on the third level insulating layer 6 and the inside of the contact hole 11 at 500� C. or a lower temperature to form an upper level wiring layer 15. Thereby, the inside of the contact holes are filled with the upper level wiring layer 15 and the surface of the upper level wiring layer becomes flat. The aspect ratio before reflow-sputtering is also reduced, because the tungsten layer 13 is etched to such a degree that a small step is formed at the upper end of each of the contact holes 11 and hence the contact holes 11 become shallow. The reflow-type sputtering can be performed at a comparatively low temperature. Thus, a deterioration of the quality of the layer can be prevented.
The formation of the upper level wiring layer by reflow-type sputtering of conductive material at 500� C. or a lower temperature enables the filling of uneven (concave) portions even when unevenness has been produced with different depths such as steps formed at the upper end portions of the contact holes 11, and step-like portions have been produced on the adhesion layers 12, and unevenness has been produced on the surface of the adhesion layer 12 formed by the over-etching of the tungsten layer 13. It also enables the achievement of a flat surface of the upper level wiring layer.
In the second embodiment, as shown in FIG. 2A, a first level insulating layer 2 formed of an insulating material of SiO2 or the like is formed on a semiconductor substrate 1 formed with an impurity diffusion region 17. Contact hole 11 is formed through the first level insulating layer 2 by etching using a photo-lithography method.
Then, the tungsten layer 13 is dry-etched using an etching gas similar to the gas used for the first embodiment to leave the tungsten layer 13 only in the inside of the contact hole 11. Further, as shown in FIG. 2E, the whole surface of the tungsten layer is over-etched until a small step or hollow is formed at the upper end portion of the contact hole 11. In other words, the upper surface of the tungsten layer 13 is positioned at a level slightly below the top end of the contact hole 11. Thereafter, as shown in FIG. 2F, an Al alloy layer is reflow-sputtered on the whole exposed surface of the adhesion layer 12 and the inside of the contact hole 11 filled with the tungsten layer 13, to form a wiring layer 18 formed of Al alloy layer at a temperature range of 400� to 500� C. The Al alloy may be similar to the conductive wiring material used in the first embodiment.
As shown in FIG. 2H, the resist film 22 is developed to form a resist pattern 22a. Using the resist pattern 22a as a mask, the wiring layer 18 is etched selectively. After the etching, the resist pattern 22a is removed by a method such as ashing or the like to leave a wiring 19 as shown in FIG. 2I. A second insulating layer 4 formed of an insulating material of SiO2 or the like is formed on the wiring 19 and on the whole surface of the first insulating layer 2 as shown in FIG. 2J.
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