Source: http://www.google.fr/patents/US8734583
Timestamp: 2018-01-23 08:19:49
Document Index: 153307089

Matched Legal Cases: ['Application No. 200780011164', 'Application No. 200780012174', 'Application No. 200780011084', 'Art. 94', 'Art. 94', 'Art. 94', 'Art. 94', 'Art. 94']

Brevet US8734583 - Grown nanofin transistors - Google Brevets
One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment, a fin of amorphous semiconductor material is formed on a crystalline substrate, and a solid phase epitaxy (SPE) process is performed to crystallize the amorphous semiconductor material using...http://www.google.fr/patents/US8734583?utm_source=gb-gplus-shareBrevet US8734583 - Grown nanofin transistors
Numéro de publication US8734583 B2
Autre référence de publication US20070231985, US20140246651
Numéro de publication 11397430, 397430, US 8734583 B2, US 8734583B2, US-B2-8734583, US8734583 B2, US8734583B2
Citations de brevets (128), Citations hors brevets (85), Classifications (25), Événements juridiques (5)
US 8734583 B2
CN101410961A 3 avr. 2007 15 avr. 2009 美光科技公司 Grown nanofin transistors
JP05198817A Titre non disponible
JPH0653513A Titre non disponible
1 "China Application No. 200780011164.2, Office Action mailed on Oct. 23, 2009".
2 "China Application No. 200780012174.8 Office Action mailed on Mar. 1, 2010".
3 "Chinese Application No. 200780011084.7, Amendment filed Jan. 16, 2011", (with English translation of amended claims), 13 pgs.
4 "Chinese Application Serial No. 200780011084.7, Office Action mailed Sep. 15, 2011", 10 pgs.
5 "Chinese Application Serial No. 200780011084.7, Office Action mailed Sep. 26, 2010", 3 Pgs.
6 "Chinese Application Serial No. 200780011084.7, Response filed Nov. 30, 2011 to Office Action mailed Sep. 15, 2011", 8 pgs.
7 "Chinese Application Serial No. 200780011164.2, Amendment filed Jan. 17, 2010", (with English translation of amended claims), 16 pgs.
9 "Chinese Application Serial No. 200780012174.8, Office Action mailed Dec. 3, 2010", 5 pgs.
10 "Chinese Application Serial No. 200780012174.8, Office Action mailed Mar. 30, 2011", 4 pgs.
11 "Chinese Application Serial No. 200780012174.8, Office Action mailed Mar. 30, 2011", Notification letter, 4 pgs.
12 "Chinese Application Serial No. 200780012174.8, Office Action response filed Jan. 28, 2011", (with English translation of amended claims), 12 pgs.
13 "Chinese Application Serial No. 200780012174.8, Response filed Feb. 10, 2011", (with English translation of amended claims), 13 pgs.
14 "European Application Serial No. 07754621.6, Examination Notification Art. 94(3) mailed Feb. 4, 2011", 5 Pgs.
15 "European Application Serial No. 07754621.6, Response filed May 16, 2011 to Examination Notification Art. 94(3) mailed Feb. 4, 2011", 7 pgs.
16 "European Application Serial No. 07754850.1, Office Action mailed Jun. 9, 2011", 5 pgs.
17 "European Application Serial No. 07754850.1, Office Action Mailed May 25, 2010", 6 pgs.
18 "European Application Serial No. 07754850.1, Office Action Response mailed Nov. 17, 2010", 19 pgs.
19 "European Application Serial No. 07809002.4, Examination Notification Art. 94(3) mailed Feb. 4, 2011", 5 pgs.
20 "European Application Serial No. 07809002.4, Response filed May 23, 2011 to Examination Notification Art. 94(3) mailed Feb. 4, 2011", 11 pgs.
21 "http://web.archive.org/web/20020211230307/http://britneyspears.aclphysics/fabrication/photolithography.htm", (Feb. 11, 2002).
22 "International Application No. PCT/US2007/008084 Search Report dated Jul. 11, 2007",4 pgs.
23 "International Application No. PCT/US2007/008084 Written Opinion dated Jul. 11, 2007",5 pgs.
24 "Japanese Application Serial No. 2009-504232, Amendment filed Mar. 31, 2010", (with English translation of amended claims), 16 pgs.
25 "Japanese Application Serial No. 2009-504232, Office Action mailed Oct. 9, 2012", With English Translation, 14 pgs.
26 "Japanese Application Serial No. 2009-504238, Voluntary Amendment filed Mar. 24, 2010", (with English translation of amended claims), 17 pgs.
27 "Japanese Application Serial No. 2009-504280, Amendment filed Mar. 31, 2010", with English translation, 15 pgs.
28 "Korean Application Serial No. 10-2008-7027077, Voluntary Amendment filed Apr. 2, 2012", 14 pgs.
29 "Taiwan Application Serial No. 096112121, Office Action mailed Apr. 7, 2011", Notification letter, 2 pgs.
30 "Taiwan Application Serial No. 096112121, Office Action mailed Dec. 24, 2010", 7 pgs.
31 "Taiwan Application Serial No. 96112122, Notice of Allowance Mar. 8, 2011", 2 pgs.
32 "Taiwan Application Serial No. 96112122, Notice of Allowance Mar. 8, 2011", Notification letter, 2 pgs.
33 "Taiwan Application Serial No. 96112122, Office Action mailed Sep. 17, 2010", 53 pgs.
34 "Taiwan Application Serial No. 96112122, Office Action Response filed Jan. 6, 2011", 36 pgs.
35 "Taiwan Application Serial No. 96112124, Notice of Allowance mailed Jul. 13, 2011", 2.
36 "Taiwan Application Serial No. 96112125, Office Action mailed Dec. 2, 2010", 15 pgs.
37 "U.S. Appl. No. 11/397,358, Final Office Action mailed Nov. 10, 2010", 11 pgs.
38 "U.S. Appl. No. 11/397,358, Non-Final Office Action mailed May 24, 2010", 14 pgs.
39 "U.S. Appl. No. 11/397,358, Response filed Aug. 24, 2010 to Non Final Office Action mailed Jun. 24, 2010", 13 pgs.
40 "U.S. Appl. No. 11/397,413, Response filed May 12, 2008 to Non Final Office Action mailed Feb. 11, 2008", 11 pgs.
41 "U.S. Appl. No. 12/192,618, Notice of Allowance mailed Jun. 24, 2010", 9 pgs.
42 "U.S. Appl. No. 12/192,618, Response filed May 10, 2010 to Final Office Action mailed Mar. 8, 2010", 13 pgs.
43 "U.S. Appl. No. 12/353,592, Final Office Action mailed Oct. 18, 2010", 14 pgs.
44 "U.S. Appl. No. 12/353,592, Non-Final Office Action mailed Apr. 29, 2010", 14 pgs.
45 "U.S. Appl. No. 12/353,592, Response filed Jul. 27, 2010 to Non Final Office Action mailed Apr. 29, 2010", 10 pgs.
46 Adler, E., et al., "The Evolution of IBM CMOS DRAM Technology", IBM Journal of Resesarch & Development, 39(1-2), (Jan.-Mar. 1995),167-188.
47 Bryllert, Tomas, et al., "Vertical high mobility wrap-gated InAs nanowire transistor", IEEE Device Research Conference, Santa Barbara, CA, (Jun. 2005),157-158.
48 Chinese Application Serial No. 200780011084.7, Office Action mailed Aug. 14, 2009, 8 pgs.
49 Cho, Hyun-Jin, et al., "A Novel Pillar DRAM Cell for 4Gbit and Beyond", 1998 Symposium on VLSI Technology Digest of Technical Papers, Jun. 9-11, 1998,(Jun. 1998),38-39.
50 Denton, Jack P., et al., "Fully depleted dual-gated thin-film SOI P-MOSFETs fabricated in SOI islands with an isolated buried polysilicon backgate", IEEE Electron Device Letters, 17(11), (Nov. 1996),509-511.
51 Doyle, B. S., et al., "High performance fully-depleted tri-gate CMOS transistors", IEEE Electron Device Letters, vol. 24, No. 4, (Apr. 2003),263-265.
52 Doyle, B. S., et al., "Tri-Gate fully-depleted CMIS transistors: fabrication, design and layou", 2003 Symposium on VLSI Technology Digest of Technical Papers, Kyoto, Japan, Jun. 10-12, 2003,(2003),133-134.
53 European Application Serial No. 07809002.4, Office Action mailed Feb. 20, 2013, 7 pgs.
54 European Application Serial No. 07809002.4, Response filed Jul. 1, 2013 to Examination Notification Art. 94(3) mailed Feb. 20, 2013, 14 pgs.
55 Forbes Leonard "DRAM Tunneling Access Transistor", U.S. Appl. No. 11/219,085, filed Aug. 29, 2005 (Client Ref. No. 05-0676), 31 pgs.
56 Forbes, Leonard, "DRAM Arrays, Vertical Transistor Structures, and Methods of Forming Transistor Structures and DRAM Arrays", U.S. Appl. No. 11/051,119, filed Feb. 3, 2005 (Client Ref. No. 04-0915), 52 pgs.
57 Forbes, Leonard, "Memory Array with Surrounding Gate Access Transistors and Capacitors with Global and Staggered Local Bit Lines", U.S. Appl. No. 11/128,585, filed May 13, 2005 (Client Ref. No. 04-1029), 42 pgs.
58 Forbes, Leonard, "Memory Array With Ultra-Thin Etched Pillar Surround Gate Access Transistors and Buried Data/Bit Lines", U.S. Appl. No. 11/129,502, filed May 13, 2005 (Client Ref. No. 04-1007), 33 pgs.
59 Forbes, Leonard, "Surround Gate Access Transistors With Grown Ultra-Thin Bodies", U.S. Appl. No. 11/175,677, filed Jul. 6, 2005 Client Ref. No. 04-0962), 28 pgs.
60 Forbes, Leonard, "Ultra-Thin Body Vertical Tunneling Transistor", U.S. Appl. No. 11/215,468, filed Aug. 29, 2005 (Client Ref. No. 05-0664), 27 pgs.
61 Forbes, Leonard, "Vertical Transistor, Memory Cell, Device, System and Method of Forming Same", U.S. Appl. No. 11/151,219, filed Jun. 13, 2005 (Client Ref. No. 04-0853), 39 pgs.
62 Forbes, Leonard, "Vertical Tunneling Nano-Wire Transistor", U.S. Appl. No. 11/210,374, filed Aug. 24, 2005 (Client Ref. No. 05-0654), 26 pgs.
63 Huang, Xuejue, et al., "Sub-50 nm P-Channel finFET", IEEE Transactions on Electron Devices, vol. 48, No. 5, (May 2001),880-886.
64 Japanese Application Serial No. 2009-504232, Response filed Jan. 9, 2031 to Office Action mailed Oct. 19, 2012, 16 pgs.
65 Kalavade, Pranav, et al., "A novel sub-10 nm transistor", 58th DRC. Device Research Conference. Conference Digest, (Jun. 19-21, 2000),71-72.
66 Kedzierski, Jakub, et al., "Threshold voltage control in NiSi-gated MOSFETs through silicidation induced impurity segregation (SIIS)", IEDM Tech. Dig., (2003),315-318.
67 Kim, Keunwoo, et al., "Nanoscale CMOS Circuit Leakage Power Reduction by Double-Gate Device", International Symposium on Low Power Electronics and Design, Newport, CA, Aug. 9-11, 2004; http://www.islped.org,(2004),102-107.
68 Korean Application Serial No. 10-2008-7026973, Preliminary Rejection mailed Jun. 25, 2013, 7 pgs.
69 Korean Application Serial No. 10-2008-7026973, Response filed Aug. 26, 2013 to Office Action mailed Jun. 25, 2013, 29 pgs.
70 Korean Application Serial No. 10-2008-7027075, Response filed Jul. 31, 2013 to Office Action mailed May 16, 2013, 20 pgs.
71 Korean Application Serial No. 10-2008-7027077, Notice of Preliminary Rejection mailed Jun. 7, 2013, 12 pgs.
72 Korean Application Serial No. 10-2008-7027077, Response filed Aug. 7, 2013 to Office Action mailed Jun. 7, 2013, 17 pgs.
73 Lee, Choonsup, et al., "A Nanochannel Fabrication Technique without Nanolithography", Nano Letters, vol. 3, No. 10, (2003),1339-1340.
74 Mitsutoshi, et al., "Excimer laser annealing of amorphous and solid-phase-crystallized silicon films.", Journal of Applied Physics, vol. 86, No. 10, (Nov. 15, 1999).
75 Miyano, Shinji, et al., "Numerical Analysis of a Cylindrical Thin-Pillar Transistor (CYNTHIA)", IEEE Transactions on Electron Devices, vol. 39, No. 8, (Aug. 1992), 1876-1881.
76 Nirschl, TH., et al., "The Tunneling Field Effect Transistor (TFET) as an Add-on for Ultra-Low-Voltage Analog and Digital Processes", IEEE International Electron Devices Meeting, 2004; IEDM Technical Digest, (Dec. 13-15, 2004), 195-198.
77 Rahman, Anisur, et al., "Theory of Ballistic Nanotransistor", IEEE Transactions on Electron Devices, vol. 50, No. 9, (Sep. 2003),1853-1864.
78 Samuelson, L., et al., "Semiconductor nanowires for 0D and 1D physics and applications", Physica E 25, (Jul. 27, 2004),313-318.
79 Samuelson, Lars, "Semiconductor Nanowires as a Novel Electronic Materials Technology for Future Electronic Devices", IEEE Device Research Conference, Santa Barbara, CA,(Jun. 2005),245.
80 Shimomura, K., et al., "A 1V 46ns 16Mb SOI-DRAM with Body Control Technique", 1997 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, (Feb. 6, 1997),68-69.
81 Shimomura, K., et al., "A 1-V 46-ns 16-Mb SOI-DRAM with body control technique", IEEE Journal of Solid-State Circuits, 32 (11) (Nov. 1997),1712-1720.
82 Takato, H., et al., "High Performance CMOS Surrounding Gate Transistor (SGT) for Ultra High Technical Density LSIs", IEEE International Electron Devices Meeting, Technical Digest, (1988),222-225.
83 Wong, Hon-Sum P., et al., "Self-Aligned (Top and Bottom) Double-Gate MOSFET with a 25 nm Thick Silicon Channel", IEEE Int. Electron Device Meeting, (1997),427-430.
84 Xuan, Peiqi, et al., "60nm Planarized Ultra-thin Body Solid Phase Epitaxy MOSFETs", IEEE Device Research Conference, Conference Digest. 58th DRC, (Jun. 19-21, 2000),67-68.
85 Ziegler, James F., et al., "Cosmic Ray Soft Error Rates of 16-Mb DRAM Memory Chips", IEEE Journal of Solid-State Circuits, vol. 33, No. 2, (Feb. 1998),246-252.
Classification aux États-Unis 117/9, 257/270, 257/618, 117/4, 438/301, 257/302, 438/482, 257/67, 438/365, 117/7, 117/930, 438/96, 117/8
Classification internationale C30B1/00
Classification coopérative H01L29/42392, H01L29/0673, H01L29/78642, H01L29/66666, H01L27/1052, H01L27/10876, H01L27/105, H01L29/0665, H01L27/0886, H01L29/7827, H01L21/823431