Source: http://www.google.com/patents/US7898047?dq=5083039
Timestamp: 2015-03-29 17:28:13
Document Index: 470558858

Matched Legal Cases: ['Application No. 04716159', 'Application No. 10', 'Application No. 04716', 'Application No. 200480005682', 'Application No. 10', 'Application No. 2006', 'Application No. 2006']

Patent US7898047 - Integrated nitride and silicon carbide-based devices and methods of ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsMonolithic electronic device including a common nitride epitaxial layer are provided. A first type of nitride device is provided on the common nitride epitaxial layer including a first at least one implanted n-type region on the common nitride epitaxial layer. The first at least one implanted n-type...http://www.google.com/patents/US7898047?utm_source=gb-gplus-sharePatent US7898047 - Integrated nitride and silicon carbide-based devices and methods of fabricating integrated nitride-based devicesAdvanced Patent SearchPublication numberUS7898047 B2Publication typeGrantApplication numberUS 12/051,303Publication dateMar 1, 2011Filing dateMar 19, 2008Priority dateMar 3, 2003Fee statusPaidAlso published asCN101978489A, CN101978489B, EP2255387A1, EP2255387B1, EP2495759A1, EP2495759B1, US8035111, US20080169474, US20110147762, WO2009117045A1Publication number051303, 12051303, US 7898047 B2, US 7898047B2, US-B2-7898047, US7898047 B2, US7898047B2InventorsScott T. SheppardOriginal AssigneeSamsung Electronics Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (78), Non-Patent Citations (30), Referenced by (5), Classifications (33), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetIntegrated nitride and silicon carbide-based devices and methods of fabricating integrated nitride-based devices
US 7898047 B2Abstract
Monolithic electronic device including a common nitride epitaxial layer are provided. A first type of nitride device is provided on the common nitride epitaxial layer including a first at least one implanted n-type region on the common nitride epitaxial layer. The first at least one implanted n-type region has a first doping concentration greater than a doping concentration of the common nitride epitaxial layer. A second type of nitride device, different from the first, including a second at least one implanted n-type region is provided on the common nitride epitaxial layer. The second at least one implanted n-type region is different from the first at least one implanted n-type region and has a second doping concentration that is greater than the doping concentration of the common nitride epitaxial layer. First and second pluralities of contacts respectively define first and second electronic devices on the common nitride epitaxial layer.
a common nitride epitaxial layer;
a first type of nitride device on the common nitride epitaxial layer including a first at least one implanted n-type region on the common nitride epitaxial layer, the first at least one implanted n-type region having a first doping concentration greater than a doping concentration of the common nitride epitaxial layer;
a second type of nitride device, different from the first type of nitride device, including a second at least one implanted n-type region on the common nitride epitaxial layer, the second at least one implanted n-type region being different from the first at least one implanted n-type region and having a second doping concentration that is greater than the doping concentration of the common nitride epitaxial layer;
a first plurality of electrical contacts on the first at least one implanted n-type region, the first plurality of contacts defining a first electronic device of the first type of nitride device; and
a second plurality of electrical contacts on the second at least one n-type implanted region, the second plurality of contacts defining a second electronic device of the second type of electronic device, wherein the second at least one implanted n-type region on the common nitride epitaxial layer extends beneath all of the second plurality of electrical contacts.
2. The monolithic electronic device of claim 1, wherein the first at least one implanted n-type region comprises source and drain regions for the first electronic device and wherein the first plurality of electrical contacts comprise a source contact on the source region, a drain contact on the drain region and a gate contact between the source and the drain contacts.
3. The monolithic electronic device of claim 2, wherein the second at least one implanted n-type region comprises a highly conductive n-type region and wherein the second plurality of electrical contact comprises source and drain contacts and gate contact between the source and drain contacts on the highly conductive n-type region.
4. A monolithic electronic device, comprising:
a second type of nitride device, different from the first type of nitride device, including a second at least one implanted n-type region on the common nitride epitaxial layer, the second at least one implanted n-type being different from the first at least one implanted n-type region and having a second doping concentration that is greater than the doping concentration of the common nitride epitaxial layer;
a second plurality of electrical contacts on the second at least one n-type implanted region, the second plurality of contacts defining a second electronic device of the second type of electronic device,
wherein the first at least one implanted n-type region comprises source and drain regions for the first electronic device and wherein the first plurality of electrical contacts comprise a source contact on the source region, a drain contact on the drain region and a gate contact between the source and the drain contacts;
wherein the second at least one implanted n-type region comprises a highly conductive n-type region and wherein the second plurality of electrical contact comprises source and drain contacts and gate contact between the source and drain contacts on the highly conductive n-type region; and
wherein the highly conductive n-type region has a doping concentration of from about 5.0�1018 to about 6.0�1018 cm−3 and a depth of from about 0.1 to about 1.0 μm.
5. The monolithic device of claim 3, wherein the gate and drain contacts of the second electronic device are electrically coupled to form an anode.
6. The monolithic electronic device of claim 3, wherein the common nitride epitaxial structure comprises:
a nitride channel layer;
a nitride barrier layer on the nitride channel layer, the nitride barrier layer having a higher bandgap than the nitride channel layer, wherein the nitride barrier layer and the nitride channel cooperatively induce a two-dimensional electron gas at an interface between the nitride channel layer and the nitride barrier layer.
7. The monolithic electronic device of claim 6, further comprising a high bandgap layer on the barrier layer and a silicon nitride layer on the high bandgap layer.
8. The monolithic electronic device of claim 7, wherein the highly conductive n-type region comprises an implanted region of n-type AlXGa1-XN (0≦x≦1) in the high bandgap layer, the second electronic device comprising a layer of n-type AlXGa1-XN (0≦x≦1) on the highly conductive n-type region having a doping concentration of less than about 1�1016 cm−3.
9. The monolithic electronic device of claim 1, wherein the first electronic device comprises a high electron mobility transistor.
10. The monolithic electronic device of claim 9, wherein the second electronic device comprises a surface acoustic wave device.
11. The monolithic electronic device of claim 9, wherein the second electronic device comprises a diode.
12. The monolithic electronic device of claim 9, wherein the second electronic device comprises a field effect transistor.
13. The monolithic electronic device of claim 9, wherein the second electronic device comprises a MISHFET.
14. A method of forming a monolithic electronic device, comprising:
forming a common nitride epitaxial layer;
forming a first type of nitride device on the common nitride epitaxial layer including a first at least one implanted n-type region on the common nitride epitaxial layer, the first at least one implanted n-type region having a first doping concentration greater than a doping concentration of the common nitride epitaxial layer;
forming a second type of nitride device, different from the first type of nitride device, including a second at least one implanted n-type region on the common nitride epitaxial layer, the second at least one implanted n-type region being different from the first at least one implanted n-type region and having a second doping concentration that is greater than the doping concentration of the common nitride epitaxial layer;
forming a first plurality of electrical contacts on the first at least one implanted n-type region, the first plurality of contacts defining a first electronic device of the first type of nitride device; and
forming a second plurality of electrical contacts on the second at least one n-type implanted region, the second plurality of contacts defining a second electronic device of the second type of electronic device, wherein forming the second plurality of electrical contacts comprises forming the second plurality of electrical contacts on the second at least one implanted n-type region such that the second at least one implanted n-type region extends beneath all of the second plurality of electrical contacts.
15. The method of claim 14, wherein forming the first at least one implanted n-type regions comprises implanting source and drain regions for the first electronic device and wherein forming the first plurality of electrical contacts comprises forming a source contact on the source region, a drain contact on the drain region and a gate contact between the source and the drain contacts.
16. The method of claim 15, wherein forming the second at least one implanted n-type region comprises implanting a highly conductive n-type region and wherein forming the second plurality of electrical contact comprises forming source and drain contacts and gate contact between the source and drain contacts on the highly conductive n-type region.
17. A method of forming a monolithic electronic device, comprising:
forming a second plurality of electrical contacts on the second at least one n-type implanted region, the second plurality of contacts defining a second electronic device of the second type of electronic device,
wherein forming the first at least one implanted n-type regions comprises implanting source and drain regions for the first electronic device and wherein forming the first plurality of electrical contacts comprises forming a source contact on the source region, a drain contact on the drain region and a gate contact between the source and the drain contacts;
wherein forming the second at least one implanted n-type region comprises implanting a highly conductive n-type region and wherein forming the second plurality of electrical contact comprises forming source and drain contacts and gate contact between the source and drain contacts on the highly conductive n-type region; and
wherein forming the highly conductive n-type region comprises forming the highly conductive n-type region having a doping concentration of from about 5.0�1018 to about 6.0�1018 cm−3 and a depth of from about 0.1 to about 1.0 μm.
18. The method of claim 15, wherein forming the gate and drain contacts of the second electronic device comprises forming the gate and drain contacts such that the gate and drain contacts are electrically coupled to form an anode.
19. The method of claim 18 wherein forming the common nitride epitaxial structure comprises:
forming a nitride channel layer;
forming a nitride barrier layer on the nitride channel layer, the nitride barrier layer having a higher bandgap than the nitride channel layer, wherein the nitride barrier layer and the nitride channel cooperatively induce a two-dimensional electron gas at an interface between the nitride channel layer and the nitride barrier layer.
20. The method of claim 19, further comprising forming a high bandgap layer on the barrier layer and a silicon nitride layer on the high bandgap layer.
21. The method of claim 20, wherein forming the highly conductive s-type region comprises implanting a region of n-type AlXGa1-XN (0≦x≦1) in the high bandgap layer, the method further comprising forming a layer of n-type AlXGa1-XN (0≦x≦1) on the highly conductive n-type region having a doping concentration of less than about 1�1016 cm−3. Description
This application claims priority under 35 U.S.C. �120 as a continuation-in-part application of U.S. patent application Ser. No. 10/378,331, filed on Mar. 3, 2003 now U.S. Pat. No. 7,112,860, and U.S. patent application Ser. No. 11/410,768, filed Apr. 25, 2006, the disclosures of which are hereby incorporated by reference herein as if set forth in its entirety.
The present invention relates to nitride-based devices. In particular, the present invention relates to the monolithic integration of different types of nitride-based devices on a common substrate, and resulting devices.
Wide bandgap semiconductor materials, including Group III-nitrides, such as gallium nitride, aluminum gallium nitride, indium nitride and alloys thereof, and silicon carbide, are desirable materials for the fabrication of high power, high temperature and/or high frequency devices. These wide bandgap materials have high electric field breakdown strengths and high electron saturation velocities as compared to other semiconductor materials such as gallium arsenide and silicon.
where v is the SAW velocity and λ is the wavelength. As discussed above, the wavelength of the device is determined by the finger period of the IDT. The width and spacing of IDT fingers (and thus the finger period) is limited by the resolution of photolithographic techniques. Thus, for a given finger period, increasing the SAW velocity increases the fundamental operating frequency of the device. Stated differently, having a higher SAW velocity permits a device to process higher-frequency signals for a given device geometry. Accordingly, the Group III-nitrides and SiC may be desirable piezoelectric materials for the fabrication of SAW devices.
Some embodiments of the invention provide a monolithic electronic device including a common nitride epitaxial layer, a first type of nitride device including a first epitaxial nitride structure on the common nitride epitaxial layer, and a second type of nitride device, different from the first type of nitride device, including a second epitaxial nitride structure on the common nitride epitaxial layer. A first plurality of electrical contacts is on the first epitaxial nitride structure and defines a first electronic device of the first type of nitride device, and a second plurality of electrical contacts is on the second epitaxial nitride structure and defines a second electronic device of the second type of electronic device.
FIGS. 1A-1C are schematic drawings illustrating embodiments of the present invention along with device precursors that may be an intermediate step in the fabrication of a device as illustrated.
The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout. Furthermore, the various layers and regions illustrated in the figures are illustrated schematically. Accordingly, the present invention is not limited to the relative size and spacing illustrated in the accompanying figures. As will also be appreciated by those of skill in the art, references herein to a layer formed �on� a substrate or other layer may refer to the layer formed directly on the substrate or other layer or on an intervening layer or layers formed on the substrate or other layer. Moreover, it will be understood that when a first element or layer is described as �in electrical contact� with a second element or layer, the first and second elements or layers need not be in direct physical contact with one another, but may be connected by intervening conductive elements or layers which permit current flow between the first and second elements or layers.
As used herein, the term �Group III nitride� refers to those semiconducting compounds formed between nitrogen and the elements in Group III of the periodic table, usually aluminum (Al), gallium (Ga), and/or indium (In). The term also refers to ternary and quaternary compounds such as AlGaN and AlInGaN. As is well understood by those in this art, the Group III elements can combine with nitrogen to form binary (e.g., GaN), ternary (e.g., AlGaN, AlInN), and quaternary (e.g., AlInGaN) compounds. These compounds all have empirical formulas in which one mole of nitrogen is combined with a total of one mole of the Group III elements. Accordingly, formulas such as AlXGa1-XN where 0≦x≦1 or InyAlxGa1-x-yN where 0≦x≦1, 0≦y≦1 and x+y≦1 are often used to describe them.
The barrier and channel layers 16, 18 are then etched away to reveal a portion of the AlN buffer layer 14 on which the IDTs 26, 28 may be formed. The etch mask 32 is then removed and metallization steps are performed to form the contacts 22, 23, 24 and the IDTs 26, 28.
The barrier 16 and the channel 18 layers may be etched using a dry etch process such as reactive ion etching (RIE). Suitable conditions for dry etching the mesa may include dry etching in an Ar environment using BCl3 etchant. For example, a typical process may include flowing Ar at 20-100 sccm and BCl3 at 10-20 sccm in an RIE reactor at a pressure of 5-50 mTorr and an RF power at 50-300 W. Actual parameters will depend on the system used and may be determined by those skilled in the art. The etch should be highly selective to etch GaN but not AlN.
In certain embodiments, nitrogen atoms are implanted into the exposed region at an energy of 10-400 keV and a dosage of 1013-1014 ions per square centimeter (cm−2). Such a dose may be sufficient to neutralize the region 42 or otherwise make the region 42 sufficiently non-conductive such that the transistor structure 30A is electrically isolated from the SAW device 30B such that the electrical performance of either the transistor structure 30A or the SAW device 30B are not substantially impaired by the other device.
A first transistor Q1 is defined by a gate 120 positioned between adjacent source/drain contacts 122, 124. The first transistor Q1 may be, for example, a high power or low-noise transistor. Thus, in the first transistor Q1, the gate contact 120 is recessed through both the high purity silicon nitride layer 110 and the additional epitaxial layer 112, as shown in FIG. 13A.
Accordingly, for the first transistor Q1, the gate etch is used to remove a portion, or all, of the additional epitaxial layer 112 underneath the high purity silicon nitride layer 110. A low channel or access resistance may be maintained in the non-gated regions of the first transistor Q1 due to the presence of the additional epitaxial layer 112, which, as explained above, may be a relatively thick GaN cap and/or graded/doped AlGaN as described in Journal of Electronic Materials, Vol. 33, No. 5, 2004, or IEEE Electron Device Letters, Vol. 25, No. 1, January 2004 or Journal Of Applied Physics Volume 94, Number 8, 15 October 2003.
A schematic diagram of a possible circuit formed by the first and second transistors Q1 and Q2 is illustrated in FIG. 13B. As shown therein, the first and second transistors may share a common source/drain contact 124.
Following regrowth of the epitaxial layer 125, a plurality of devices may be defined in the epitaxial structure by forming one or more electrical contacts on the structure. For example, as shown in FIG. 15, a first transistor Q3, which may be a low noise amplifier and/or a high power amplifier, may be defined by forming source/drain contacts 132, 134 on the high bandgap layer 108. The source/drain contacts 132, 134 may be partially and/or fully recessed through the high bandgap layer 108. A gate contact 130 for the first transistor Q3 is recessed through the high purity silicon nitride layer 110. In some embodiments, the transistor Q3 may have an insulating gate structure (e.g. a metal-insulator-semiconductor heterojunction field effect transistor, or MISHFET) as shown in any of U.S. Pre-grant Publication No. 2003/0020092 entitled �Insulating Gate AlGaN/GaN HEMT�, U.S. Pre-grant Publication No. 2005/0170574 entitled �Nitride-based Transistors with a Protective Layer and Low-damage Recess and Method of Fabrication Thereof,� U.S. patent application Ser. No. 11/185,398, filed Jul. 20, 2005 and entitled �Nitride-Based Transistors and Fabrication Methods With an Etch Stop Layer� and/or U.S. patent application Ser. No. 11/187,171, filed Jul. 21, 2005 and entitled �Switch Mode Power Amplifier using MIS-HEMT with Field Plate Extension,� the disclosures of which are incorporated herein by reference as if fully set forth herein.
As discussed above, some embodiments of the present invention provide monolithic integration of two or more semiconductor device types when a highly conductive, buried layer is required for one of the device types. Li other words, a first device having a first epitaxial structure (Type I), for example, a low noise and/or high power amplifier (LNA) can be integrated with a second device having a second epitaxial structure (Type U), for example, a limiter diode, according to some embodiments of the present invention discussed above. In particular, if the Type II structure including a full n+/n− GaN epitaxial structure as discussed above can be selectively grown on top of the Type I epitaxial structure, it may be possible to screen areas of the wafer to maintain the Type I structure while growing the extra layers in the regions of the wafer that require Type II as discussed in detail above.
As further illustrated in FIG. 18, an implanted highly conductive region 805 in accordance with some embodiments of the present invention is provided in the high bandgap layer 108 on the Type II side of the integrated device. The highly conductive region 805 may be an implanted n+ region having a peak doping concentration of about 5.0�1020 cm−1.
Referring first to FIG. 20A, a mask 1000, for example, SiO2 may be deposited and patterned on the high bandgap layer 108. Tons are implanted into the portion of the high bandgap layer exposed through the mask 1000 to implant the n+ source and drain regions drain regions 801 and 802, respectively.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS3955160Apr 30, 1975May 4, 1976Rca CorporationSurface acoustic wave deviceUS4742315Apr 28, 1987May 3, 1988Siemens AktiengesellschaftIntegrated NMOS circuitUS4912063Oct 26, 1987Mar 27, 1990North Carolina State UniversityGrowth of beta-sic thin films and semiconductor devices fabricated thereonUS4912064Oct 26, 1987Mar 27, 1990North Carolina State UniversityHomoepitaxial growth of alpha-SiC thin films and semiconductor devices fabricated thereonUS4946547Oct 13, 1989Aug 7, 1990Cree Research, Inc.Method of preparing silicon carbide surfaces for crystal growthUS5011549Oct 16, 1989Apr 30, 1991North Carolina State UniversityVapor deposition, smoothnessUS5155062Dec 20, 1990Oct 13, 1992Cree Research, Inc.Method for silicon carbide chemical vapor deposition using levitated wafer systemUS5200022Oct 3, 1990Apr 6, 1993Cree Research, Inc.Method of improving mechanically prepared substrate surfaces of alpha silicon carbide for deposition of beta silicon carbide thereon and resulting productUS5210051Jun 5, 1991May 11, 1993Cree Research, Inc.P-n junctionsUS5265267Aug 29, 1991Nov 23, 1993Motorola, Inc.Integrated circuit including a surface acoustic wave transformer and a balanced mixerUS5270554Jun 14, 1991Dec 14, 1993Cree Research, Inc.High power high frequency metal-semiconductor field-effect transistor formed in silicon carbideUS5292501Apr 26, 1993Mar 8, 1994Degenhardt Charles RUse of a carboxy-substituted polymer to inhibit plaque formation without tooth stainingUS5393993Dec 13, 1993Feb 28, 1995Cree Research, Inc.Buffer structure between silicon carbide and gallium nitride and resulting semiconductor devicesUS5405797Mar 30, 1994Apr 11, 1995Daimler-Benz AgMethod of producing a monolithically integrated millimeter wave circuitUS5523589Sep 20, 1994Jun 4, 1996Cree Research, Inc.Conductive silicon carbide substrate; ohmic contact; conductive buffer layerUS5576589Oct 13, 1994Nov 19, 1996Kobe Steel Usa, Inc.Diamond surface acoustic wave devicesUS5592501Sep 20, 1994Jan 7, 1997Cree Research, Inc.Low-strain laser structures with group III nitride active layersUS5739554May 8, 1995Apr 14, 1998Cree Research, Inc.Double heterojunction light emitting diode with gallium nitride active layerUS6063186Dec 17, 1997May 16, 2000Cree, Inc.Growth of very uniform silicon carbide epitaxial layersUS6217662Mar 24, 1997Apr 17, 2001Cree, Inc.Susceptor designs for silicon carbide thin filmsUS6218680May 18, 1999Apr 17, 2001Cree, Inc.Semi-insulating silicon carbide without vanadium dominationUS6265727Jun 9, 1999Jul 24, 2001Cree Lighting CompanySolar blind photodiode having an active region with a larger bandgap than one or both if its surrounding doped regionsUS6285866Jun 21, 1999Sep 4, 2001Korea Advanced Institute Of Science & TechnologySingle-chip radio structure with piezoelectric crystal device integrated on monolithic integrated circuit and method of fabricating the sameUS6297522Feb 11, 2000Oct 2, 2001Cree, Inc.Highly uniform silicon carbide epitaxial layersUS6300706Jul 14, 1999Oct 9, 2001The United States Of America As Represented By The Secretary Of The ArmyCompound semiconductor monolithic frequency sources and actuatorsUS6316793Jun 12, 1998Nov 13, 2001Cree, Inc.Nitride based transistors on semi-insulating silicon carbide substratesUS6377138Jul 28, 1998Apr 23, 2002Kabushiki Kaisha ToshibaSurface acoustic wave device with a layered conductive film and method of producing the sameUS6396080May 25, 2001May 28, 2002Cree, IncSingle crystals containing dopesUS6403982Jan 10, 2001Jun 11, 2002Cree, Inc.Semi-insulating silicon carbide without vanadium dominationUS6495852Jun 19, 2000Dec 17, 2002Sharp Kabushiki KaishaGallium nitride group compound semiconductor photodetectorUS6518637Apr 7, 2000Feb 11, 2003Wayne State UniversityCubic (zinc-blende) aluminum nitrideUS6530990Feb 21, 2001Mar 11, 2003Cree, Inc.Susceptor designs for silicon carbide thin filmsUS6548333Jul 12, 2001Apr 15, 2003Cree, Inc.Aluminum gallium nitride/gallium nitride high electron mobility transistors having a gate contact on a gallium nitride based cap segmentUS6555946Jul 24, 2000Apr 29, 2003Motorola, Inc.Acoustic wave device and process for forming the sameUS6596079Mar 13, 2000Jul 22, 2003Advanced Technology Materials, Inc.III-V nitride substrate boule and method of making and using the sameUS6686616May 10, 2000Feb 3, 2004Cree, Inc.Silicon carbide metal-semiconductor field effect transistorsUS6797069Apr 8, 2002Sep 28, 2004Cree, Inc.Gas driven planetary rotation apparatus and methods for forming silicon carbide layersUS6849882Mar 19, 2002Feb 1, 2005Cree Inc.Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layerUS7045404Jan 16, 2004May 16, 2006Cree, Inc.Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereofUS7112860Mar 3, 2003Sep 26, 2006Cree, Inc.Integrated nitride-based acoustic wave devices and methods of fabricating integrated nitride-based acoustic wave devicesUS7230284 *Jul 23, 2002Jun 12, 2007Cree, Inc.Insulating gate AlGaN/GaN HEMTUS7294540Mar 31, 2005Nov 13, 2007Samsung Electro-Mechanics Co., Ltd.Method for manufacturing a nitride based semiconductor deviceUS20010035695Apr 24, 2001Nov 1, 2001Murata Manufacturing Co., Ltd.Surface acoustic wave device, shear bulk wave transducer, and longitudinal bulk wave transducerUS20020090454Jan 8, 2001Jul 11, 2002Michael PaisleyContacting resist with cleaning composition comprising a homogeneous solution of propylene glycol alkyl ether acetate and at least one alcohol having an alkyl group of 2 to 3 carbon atomsUS20020113668Feb 14, 2002Aug 22, 2002Sanyo Electric Co., Ltd.Longitudinal coupled multiple mode surface acoustic wave filterUS20020158707Mar 26, 2002Oct 31, 2002Kazushige NoguchiSurface-acoustic-wave duplexer with improved isolationUS20020167023Mar 19, 2002Nov 14, 2002Cree Lighting Company And Regents Of The University Of CaliforniaGroup-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layerUS20020170491May 21, 2001Nov 21, 2002Stephan MuellerSeed crystal holders and seed crystals for fabricating silicon carbide crystals and methods of fabricating silicon carbide crystalsUS20030022412Jul 25, 2001Jan 30, 2003Motorola, Inc.Monolithic semiconductor-piezoelectric device structures and electroacoustic charge transport devicesUS20030030119Aug 13, 2001Feb 13, 2003Motorola, Inc.Structure and method for improved piezo electric coupled component integrated devicesUS20030205721Mar 21, 2001Nov 6, 2003Katsunori NishiiInsulating oxide film formed in a peripheral portion of said active region on said substrate by oxidizing the nitrideUS20040007715Jul 9, 2002Jan 15, 2004Webb Douglas A.Reducing threading defect density by reducing germanium content in Silicon germanium relaxed buffer layer on which strained silicon channel layer is formed by forming channel layer of silicon-carbon alloy containing 1.5% carbonUS20050051793Aug 6, 2004Mar 10, 2005Hidetoshi IshidaSwitching semiconductor device and switching circuitUS20060065929Mar 31, 2005Mar 30, 2006Samsung Electro-Mechanics Co., Ltd.Nitride based semiconductor device and method for manufacturing the sameUS20060081897 *Sep 6, 2005Apr 20, 2006The Furukawa Electric Co., Ltd.GaN-based semiconductor integrated circuitUS20060108660Nov 15, 2005May 25, 2006Eudyna Devices Inc.Amplifier circuit, control method of the same, and amplifier circuit moduleUS20070018199Jul 20, 2005Jan 25, 2007Cree, Inc.Nitride-based transistors and fabrication methods with an etch stop layerUS20070018210Jul 21, 2005Jan 25, 2007Cree, Inc.Switch mode power amplifier using MIS-HEMT with field plate extensionUS20070158683Dec 13, 2005Jul 12, 2007Sheppard Scott TSemiconductor devices including implanted regions and protective layers and methods of forming the sameUS20080169474Mar 19, 2008Jul 17, 2008Cree, Inc.Integrated Nitride and Silicon Carbide-Based Devices and Methods of Fabricating Integrated Nitride-Based DevicesUSRE34861Oct 9, 1990Feb 14, 1995North Carolina State UniversitySublimation of silicon carbide to produce large, device quality single crystals of silicon carbideCN1309816AJun 2, 1999Aug 22, 2001克里公司Nitride based transistors on semi-insulating silicon carbide substratesEP0373606A1Dec 12, 1989Jun 20, 1990United TechnologiesA monolithic electro-acoustic device having an acoustic charge transport device integrated with a transistorEP0810726B1Feb 16, 1996Jul 20, 2005Asahi Kasei Kabushiki KaishaElastic surface wave functional device and electronic circuit using the elementEP1643561A2Sep 23, 2005Apr 5, 2006The Furukawa Electric Co., Ltd.GaN-based semiconductor integrated circuitEP1734647A1Aug 26, 2005Dec 20, 2006Matsushita Electric Industrial Co., Ltd.Semiconductor device and module using the sameEP1798762A2Dec 13, 2006Jun 20, 2007Cree Inc.Semiconductor devices including implanted regions and protective layers and methods of forming the sameGB2338107A Title not availableJP2000150417A Title not availableJPH02214321A Title not availableJPH05183381A Title not availableJPH06303088A Title not availableJPS58197910A Title not availableKR19980702240A Title not availableKR20000005908A Title not availableKR20000068639A Title not availableKR20020087414A Title not availableWO2004079904A2Mar 1, 2004Sep 16, 2004Cree IncIntegrated nitride-based acoustic wave devices and methods of fabricating integrated nitride-based acoustic wave devices* Cited by examinerNon-Patent CitationsReference1Communication pursuant to Article 94(3) EPC, European Application No. 04716159.1, Nov. 24, 2008.2Eickhoff et al., "Novel Sensor Applications of group-III Nitrides," GaN and Related Alloys, Boston, MA USA Jan. 26-30, 2001, Materials Research Society Symposium Proceedings, vol. 693, 2002, pp. 781-792.3English Translation of Office Action corresponding to Korean Patent Application No. 10-2005-7016258, 4 pages.4European Office Action for European Patent Application No. 04716 59.1; Oct. 24, 2007.5First Office Action, Chinese Application No. 200480005682.X, Issued Jul. 11, 2008.6Hagon et al Integrated programmable analog matched filters for spread spectrum applications IEEE Ultrasonics Symposium, Monterey, CA, USA 333-335 (1983).7Hagon et al. "Integrated Programmable Analog Matched Filters for Spread Spectrum Applications," IEEE Ultrasonics Symposium, 1973, pp. 333-335.8Hagon et al., "Integrated Programmable Analog Matched Filters for Spread Spectrum Applications," 1973 Ultrasonics Symposium Proceedings, IEEE, pp. 333-335, USA, 1973.9Hagon et al., "Integrated programmable analog method filters for spread spectrum applications," IEEE Ultrasonics Symposium, Monterey, CA USA, 1973, pp. 333-335.10International Search Report and Written Opinion (15 pages) corresponding to International Application No. PCT/US2009/000802; Mailing Date: Jun. 3, 2009.11International Search Report and Written Opinion for PCT US2004/006232; date of mailing Nov. 11, 2004.12Invitation to Pay Additional Fees issued Aug. 31, 2004 for corresponding PCT application No. PCT/US2004/006232.13Ng, K.N., "Interdigital Transducer", Complete Guide to Semiconductor Devices, Ch. 66 (2000) pp. 511-516.14Office Action corresponding to Korean Patent Application No. 10-2005-7016258 dated Oct. 8, 2010; 4 pages.15Office Notice of Rejection, Mar. 2, 2010, Japanese Patent Application No. 2006-508961, 9 pages.16Official Notice of Rejection, mailed on Aug. 6, 2010, JP Patent Application No. 2006-508961, 8 pages.17Sheppard et al., "High Power Demonstration at 10 GHz with GaN/A1GaN HEMT Hybrid Amplifiers", Presented at the 58th DRC, Denver, CO (Jun. 2000) 20 pages.18Sheppard et al., "Improved 10-GHz Operation of GaN/AIGaN HEMTs on Silicon Carbide", Materials Science Forum, vols. 338-342 (2000) pp. 1643-1646.19Stutzmann et al. "GaN-based heterostructures for sensor applications" Diamond and Related Materials 11(3-6):886-891 (2002).20Stutzmann et al. "GaN-based heterostructures for sensor applications," Diamond and Related Materials, vol. 11, No. 3-6, Mar. 2002, pp. 886-891.21Takagaki et al. "Superhigh-frequency surface-acoustic-wave transducers using AIN layers grown on SiC substrates" Applied Physics Letters 81(14):2538-2540 (2002).22Takagaki et al. "Superhigh-frequency surface-acoustic-wave transducers using AIN layers grown on SiC substrates," Applied Physics Letters, vol. 81, No. 14, Sep. 30, 2002, pp. 2538-2540.23Tsubouchi et al. "Zero Temperature Coefficient Saw Delay Line on A1N Epitaxial Films", Research Institute of Electrical Communication, Tohoku Univ., Katahira 2-1-1, Sendai 980, Japan; 1983 Ultrasonics Symposium; pp. 299-310.24Tsubouchi et al. "Zero Temperature Coefficient Saw Delay Line on AIN Epitaxial Films," IEEE Ultrasonics Symposium, Atlanta, GA, 1983, pp. 299-310.25Tsubouchi et al. Zero temperature coefficient SAW delay line on AIN epitaxial films: IEEE Ultrasonics Symposium, Atlanta, GA, USA 299-310 (1983).26Tsubouchi et al., "Zero Temperature Coefficient Saw Delay Line on AIN Epitaxial Films," 1983 Ultrasonics Symposium Proceedings, IEEE, pp. 299-310, USA, 1983.27U.S. Appl. No. 11/286,805, filed Nov. 23, 2005, Saxler et al.28U.S. Patent Application for Gas Driven Planetary Rotation Apparatus and Methods for Forming Silicon Carbide Layer, U.S. Appl. No. 10/117,858, filed Apr. 8, 2002.29U.S. Patent Application for Induction Heating Devices and Methods for Controllably Heating an Article, U.S. Appl. No. 10/017,492, filed Oct. 30, 2001.30U.S. Patent Application for Susceptor Designs for Silicon Carbide Thin Films, U.S. Appl. No. 09/715,576, filed Mar. 3, 2003.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS5306266 *Dec 21, 1992Apr 26, 1994The Procter & Gamble CompanyFlexible spacers for use in disposable absorbent articlesUS8853743Nov 16, 2012Oct 7, 2014Avago Technologies General Ip (Singapore) Pte. Ltd.Pseudomorphic high electron mobility transistor comprising doped low temperature buffer layerUS8901606Apr 30, 2012Dec 2, 2014Avago Technologies General Ip (Singapore) Pte. Ltd.Pseudomorphic high electron mobility transistor (pHEMT) comprising low temperature buffer layerUS20120313111 *Jun 7, 2011Dec 13, 2012Raytheon CompanyDIE ALIGNMENT WITH CRYSTALLOGRAPHIC AXES IN GaN-ON-SiC AND OTHER NON-CUBIC MATERIAL SUBSTRATESUS20140117411 *May 31, 2013May 1, 2014Mitsubishi Electric CorporationMonolithic integrated circuit* Cited by examinerClassifications U.S. Classification257/416, 257/6, 257/256, 438/478, 438/172, 257/E27.014, 257/E21.615, 438/483, 438/169International ClassificationH01L29/84Cooperative ClassificationH01L27/20, H01L21/8258, H01L21/8252, H03H9/02574, H03H9/02976, H01L29/2003, H01L21/8213, H03H9/02228, H03H9/0542, H01L29/7787, H01L27/0605, H03H3/08European ClassificationH03H3/08, H01L21/8258, H01L27/06C, H03H9/02S2E, H03H9/02S10C, H01L21/82H, H01L21/8252, H01L29/778E2, H01L27/20, H03H9/05B1, H03H9/02GLegal EventsDateCodeEventDescriptionAug 6, 2014FPAYFee paymentYear of fee payment: 4Aug 16, 2011CCCertificate of correctionMar 19, 2008ASAssignmentOwner name: CREE, INC., NORTH CAROLINAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SHEPPARD, SCOTT T.;REEL/FRAME:020673/0612Effective date: 20080317RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services