Source: http://www.google.com/patents/US7590251?dq=6,332,126
Timestamp: 2014-07-23 23:30:02
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Matched Legal Cases: ['Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 200480009689', 'Application No. 2006']

Patent US7590251 - Clip detection in PWM amplifier - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsSystems and methods for detecting clipping conditions in an audio signal and processing the signal to reduce the clipping conditions. In one embodiment, a system comprises a noise shaper, a modulator, an output stage and other components. A detector detects clipping in the noise shaper and a signal processor...http://www.google.com/patents/US7590251?utm_source=gb-gplus-sharePatent US7590251 - Clip detection in PWM amplifierAdvanced Patent SearchPublication numberUS7590251 B2Publication typeGrantApplication numberUS 10/805,588Publication dateSep 15, 2009Filing dateMar 19, 2004Priority dateMar 21, 2003Fee statusPaidAlso published asUS20040184621Publication number10805588, 805588, US 7590251 B2, US 7590251B2, US-B2-7590251, US7590251 B2, US7590251B2InventorsJack B. Andersen, Larry E. Hand, Wilson E. TaylorOriginal AssigneeD2Audio CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (16), Non-Patent Citations (5), Referenced by (3), Classifications (25), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetClip detection in PWM amplifierUS 7590251 B2Abstract Systems and methods for detecting clipping conditions in an audio signal and processing the signal to reduce the clipping conditions. In one embodiment, a system comprises a noise shaper, a modulator, an output stage and other components. A detector detects clipping in the noise shaper and a signal processor processes the audio signal input to the noise shaper based on feedback received from the detector. The signal processor may function to modify the input audio signal in different ways in response to different conditions that are detected by the detector. A filter may be included to filter the output of the detector before being provided to the signal processor. A flag circuit may be coupled between the filter and the signal processor to assert an output signal until the signal processor resets the flag circuit.
RELATED APPLICATIONS This application claims priority to U.S. Provisional Patent Application No. 60/469,770, entitled �Clip Detection in PWM Amplifier�, by Andersen, et al., filed May 12, 2003; U.S. Provisional Patent Application No. 60/456,414, entitled �Adaptive Anti-Clipping Protection,� by Taylor, et al., filed Mar. 21, 2003; U.S. Provisional Patent Application No. 60/456,430, entitled �Frequency Response Correction,� by Taylor, et al., filed Mar. 21, 2003; U.S. Provisional Patent Application No. 60/456,429, entitled �High-Efficiency, High-Performance Sample Rate Converter,� by Andersen, et al., filed Mar. 21, 2003; U.S. Provisional Patent Application No. 60/456,421, entitled �Output Device Switch Timing Correction,� by Taylor, et al., filed Mar. 21, 2003; U.S. Provisional Patent Application No. 60/456,422, entitled �Output Filter, Phase/Timing Correction,� by Taylor, et al., filed Mar. 21, 2003; U.S. Provisional Patent Application No. 60/456,428, entitled �Output Filter Speaker/Load Compensation,� by Taylor, et al., filed Mar. 21, 2003; U.S. Provisional Patent Application No. 60/456,420, entitled �Output Stage Channel Timing Calibration,� by Taylor, et al., filed Mar. 21, 2003; U.S. Provisional Patent Application No. 60/456,427, entitled �Intelligent Over-Current, Over-Load Protection,� by Hand, et al., filed Mar. 21, 2003; each of which is fully incorporated by reference as if set forth herein in its entirety.
BACKGROUND OF THE INVENTION Pulse Width Modulation (PWM) or Class D signal amplification technology has existed for a number of years, but has become more popular with the proliferation of Switched Mode Power Supplies (SMPS). Since this technology emerged, there has been an increased interest in applying PWM techniques in signal amplification applications. This is, at least in part, a result of the significant efficiency improvement that can be realized through the use of Class D power output topology instead of the legacy (linear Class AB) power output topology.
SUMMARY OF THE INVENTION One or more of the problems outlined above may be solved by the various embodiments of the invention. Broadly speaking, the invention comprises systems and methods for detecting clipping conditions in an audio signal and processing the signal to reduce the clipping conditions.
As used here, �in� is the input audio signal, �out� is the output audio signal, �max� is the maximum output level of the signal produced by quantizer 321, �min� is the minimum output level of the quantizer signal, �delta� is the step size of the quantization and �round� is a function that returns its input rounded to the nearest integer value. �Max� and �min� are multiples of �delta�. After quantization, �out� can assume any of (max-min)/delta+1 possible values in the range [min;max]. The maximum values that define the range of quantizer 321 (the values of �min� and �max�) determine the minimum and maximum pulse widths that will be generated by modulator 330. Normally, these values are set to match the minimum and maximum pulse widths that can be handled by a driver and the FETs in output stage 340 in a given implementation.
As used here, �in� is the input to the quantizer, �maxclip� and �minclip� are the threshold levels at which clipping begins to occur, and the signal �clip� which is output by clip detector 411 is set to �true� when the input (�in�) is outside the allowed range [minclip;maxclip] and �false� otherwise.
In general �maxclip� and �minclip� can be set arbitrarily. In a preferred embodiment, minclip is set to the minimum clipping threshold of the quantizer (�min,� as used in the algorithmic description of the quantizer set forth above) and maxclip is set to the maximum clipping threshold of the quantizer (�max,� as used in the algorithmic description of the quantizer). This allows an efficient implementation where the quantizer and clip detection are combined:
The output signal (�clip�) generated by clip detector 411 is provided as feedback to signal processor 412 which is positioned in front of noise shaper 420. The purpose of signal processor 412 is to limit the range of the audio signal that is input to noise shaper 420, but to do so in a more �intelligent� fashion than simply clipping the signal at a fixed level. In one embodiment, signal processor 412 is configured to act as a compressor-limiter. In this embodiment, signal processor 412 is configured to compress at least a portion of the audio signal in order to avoid or minimize the clipping that would otherwise occur in noise shaper 420. This may, in many instances, be easy to implement because the amplifier in which the invention is implemented may already have a compressor-limiter circuit that can be used by signal processor 412 to achieve this function.
At high input levels, quantizer 621 in noise shaper 620 may clip the audio signal only occasionally. This may be due, for example, to the noise shaping of the signal or due to short, high input spikes. Depending on its design, noise shaper 620 may be able to handle clipping of a few of these spikes without becoming unstable. Consequently, compressing the input in these cases would unnecessarily limit the output signal. Clip filter 613 can therefore be employed to filter out single occurrences or short bursts of �clip detections� and prevent them from triggering the modification of the input audio signal by signal processor 612.
As used here, �clip� here is the output from clip detector 611. The internal state variable �clipcnt� counts the number of continuous active �clip� inputs. �clipcnt� is initialized to 0 before processing begins. When �clipcnt� reaches the value �clipmax,� the counter stops counting and sets the �clipfiltered� output to true. �clipfiltered� remains active until the input �clip� becomes inactive. This will also reset �clipcnt� to 0.
It will be appreciated by one skilled in the art that the clip filter can be implemented in various ways. The various possible implementations can based on hardware, software, or combinations thereof. These implementations can use various different types of algorithms, such as IIR, FIR, majority vote, up/down count, and so on. It should be noted that, when clip filter 613 is implemented in fixed hardware, it may be advantageous to make the limit �clipmax� programmable, so that this value can be adjusted for individual applications of the circuit.
The use of a clip flag circuit may be advantageous in some embodiments, particularly those based on software. Clip flag circuit 714 may be inserted between clip filter 713 (or clip detector 711) and signal processor 712, or it may be incorporated into one of these components. The purpose of clip flag circuit 714 is to store the information that the input audio signal was clipped either once or long enough to trigger the clip filter. Once signal processor 712 has acted on (in response to) the assertion of flag circuit 714, it activates a �clear� signal to flag circuit 714 to clear the flag. When implemented in software on a digital signal processor, the output of clip flag circuit 714 can be polled or handled using interrupts.
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PESC. 2001 IEEE 32nd Annual, vol. 2 (2001), pp. 1245-1250.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8223991 *Mar 11, 2009Jul 17, 2012Stmicroelectronics S.R.L.Amplification circuit for driving a diffuserUS20100198377 *Sep 25, 2007Aug 5, 2010Alan Jeffrey SeefeldtAudio Dynamics Processing Using A ResetUS20100254546 *Feb 5, 2010Oct 7, 2010Sony CorporationSignal processing device, signal processing method, and computer program* Cited by examinerClassifications U.S. Classification381/106, 700/94, 381/94.8International ClassificationH03M3/00, G06F17/00, H03F3/217, H03G3/00, H04L7/02, H04B15/00, H03G7/00, H03F1/52Cooperative ClassificationH04L7/02, H03F2200/66, H03G3/002, H03G7/007, H03M3/48, H03F1/523, H03F2200/331, H03F3/2171European ClassificationH03M3/48, H03G7/00N, H03F1/52B, H04L7/02, H03F3/217B, H03G3/00NLegal EventsDateCodeEventDescriptionMar 18, 2014ASAssignmentOwner name: D2AUDIO LLC, DELAWAREEffective date: 20111223Free format text: CHANGE OF NAME;ASSIGNOR:D2AUDIO CORPORATION;REEL/FRAME:032463/0767Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:D2AUDIO LLC;REEL/FRAME:032463/0447Effective date: 20130329Owner name: INTERSIL AMERICAS LLC, CALIFORNIAMar 15, 2013FPAYFee paymentYear of fee payment: 4Sep 21, 2010CCCertificate of correctionMay 5, 2010ASAssignmentOwner name: MORGAN STANLEY & CO. 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