Source: http://www.google.com/patents/US6493866?dq=7,669,134
Timestamp: 2016-05-28 16:30:09
Document Index: 728287498

Matched Legal Cases: ['art 1', 'art 1', 'art 1', 'art 1', 'art 1', 'art 1', 'art 1']

Patent US6493866 - Phase-shift lithography mapping and apparatus - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsFor phase-shifting microlithography, a method of assigning phase to a set of shifter polygons in a mask layer separated by a set of target features includes assigning a first phase to a first shifter polygon, identifying a set of target features that touch the first shifter polygon, and assigning a second...http://www.google.com/patents/US6493866?utm_source=gb-gplus-sharePatent US6493866 - Phase-shift lithography mapping and apparatusAdvanced Patent SearchPublication numberUS6493866 B1Publication typeGrantApplication numberUS 09/608,498Publication dateDec 10, 2002Filing dateJun 30, 2000Priority dateJun 30, 2000Fee statusPaidAlso published asUS6918105, US7415694, US20030159126, US20050257189, WO2002003139A2, WO2002003139A3, WO2002003139A9Publication number09608498, 608498, US 6493866 B1, US 6493866B1, US-B1-6493866, US6493866 B1, US6493866B1InventorsJeffrey P. MayhewOriginal AssigneeSynopsys, Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (15), Non-Patent Citations (29), Referenced by (22), Classifications (8), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetPhase-shift lithography mapping and apparatus
US 6493866 B1Abstract
What is claimed is: 1. A computer-implemented method for assigning phases to a plurality P1 of light shifter polygons of a photolithographic mask through which light is to be transmitted to photolithographically pattern an area on a substrate, wherein the mask has a plurality P2 of target features which are less transmissive to the light than the shifter polygons, wherein each of said target features has a portion whose width is less than a predetermined value, and the portion has edges adjacent to the shifter polygons, wherein any two shifter polygons adjacent to respective two edges of any one of said portions and separated by the portion are to be assigned different phases. the method comprising the acts of:
selecting a set SP1 comprising at least one shifter polygon from said plurality P1; assigning a phase PH1 to the at least one shifter polygon in set SP1; identifying a set TF1 comprising at least one target feature of said plurality P2 such that each target feature in set TF1 has a portion having an edge adjacent to one of the at least one shifter polygons in set SP1; determining a set SP2 comprising at least one shifter polygon in the plurality P1 such that for each shifter polygon L1 in set SP2, at least one of the following conditions C1 and C2 holds: C1. shifter polygon L1 touches at least one target feature in set TF1; C2. shifter polygon L1 is one of a sequence of shifter polygons in the set SP2 such that the first shifter polygon in the sequence satisfies the condition C1 and each subsequent shifter polygon in the sequence touches the preceding shifter polygon in the sequence; and assigning a phase PH2, different from the phase PHI, to each shifter polygon in set SP2. 2. The method of claim 1 further comprising the acts of:
removing the shifter polygons in set SP1 from said plurality P1; removing the target features in set TF1 from plurality P2; after said removing the target features and said removing the shifter polygons, identifying a set TF2 of at least one target feature of said plurality P2 such that each target feature in set TF2 has a portion having an edge adjacent to at least one of shifter polygons in set SP2; and adding to set SP1 at least one polygon L2, such that for each polygon L2 added to set SP1, at least one of the following conditions C3 and C4 holds: C3. shifter polygon L2 touches at least one target feature in set TF2; C4. shifter polygon L2 is one of a sequence of shifter polygons in the set SP1 such that the first shifter polygon in the sequence satisfies the condition C3 and each subsequent shifter polygon in the sequence touches the preceding shifter polygon in the sequence; and assigning phase PH1 to the at least one shifter polygon in set SP1. 3. The method of claim 1 wherein the shifter polygons assigned phase PH1 correspond to polygons on the area which transmit light of a first phase and wherein the shifter polygons assigned phase PH2 correspond to polygons on the area which transmit light of the first phase plus 180 degrees.
marking an edge of a target feature in plurality P2 comprising an angle between 225 degrees and 315. 5. The method of claim 4 further comprising the act of:
deleting a portion of a target feature from plurality P2, the portion comprising a first mark, a second mark, and a portion of the target feature between the first and second marks, wherein the first and second mark are closer together than said predetermined value. 6. The method of claim 1 wherein said selecting a set SP1 further comprises:
merging plurality P1 and plurality P2 into a shape; marking a vertex of the shape; checking that the marked vertex touches a single shifter polygon in plurality P1; adding the shifter polygon touching the vertex to set SP1, provided that the shifter polygon touching the marked vertex is the only shifter polygon touching the marked vertex. 7. The method of claim 1 wherein the identifying is accomplished whether or not the set TF1 includes target features whose said portions are not parallel to each other.
adding plurality P1 to a group of unassigned shifter polygons; adding plurality P2 to a group of unused target features; initializing a first output layer for shifter polygons of a first phase; initializing a second output layer for shifter polygons of a second phase; initializing a first derived layer for a current set of shifter polygons; initializing a second derived layer for a current set of target features; initializing a third derived layer for a next set of shifter polygons; adding at least one shifter polygon from the group of unassigned shifter polygons to the first derived layer; adding at least one target feature from the group of unused target features to the second derived layer, wherein the at least one target feature touches a shifter polygon in the first derived layer; removing the shifter polygon in the first derived layer from the group of unused shifter polygons; adding at least one shifter polygon from the group of unused shifter polygons to the third derived layer, wherein the at least one shifter polygon added to the third derived layer touches the at least one target feature in the second derived layer; removing the at least one target feature in the second derived layer from the group of unused target features; adding the at least one shifter polygon in the first derived layer to the first output layer; and adding the at least one shifter polygon in the third derived layer to the second output layer. 9. A computer program for assigning phases to a plurality P1 of light shifter polygons of a photolithographic mask through which light is to be transmitted to photolithographically pattern an area on a substrate, wherein the mask has a plurality P2 of target features which are less transmissive to the light than the shifter polygons, wherein each of said target features has a portion whose width is less than a predetermined value, and the portion has edges adjacent to the shifter polygons, wherein any two shifter polygons adjacent to respective two edges of any one of said portions and separated by the portion are to be assigned different phases, the computer program comprising:
a mapper module, the mapper module comprising: a first element which selects a set SP1 comprising at least one shifter polygon from said plurality P1; a second element coupled to the first element and which assigns a phase PH1 to the at least one shifter polygon in set SP1; a third element coupled to the second element and which identifies a set TF1 comprising at least one target feature of said plurality P2 such that each target feature in set TF1 has a portion having an edge adjacent to one of the at least one shifter polygon in set SP1; a fourth element coupled to the third element and which determines a set SP2 comprising at least one shifter polygon in the plurality P1 such that for each shifter polygon L1 in set SP2, at least one of the following conditions C1 and C2 holds: C1. shifter polygon L1 touches at least one target feature in set TF1; C2. shifter polygon L1 is one of a sequence of shifter polygons in the set SP2 such that the first shifter polygon in the sequence satisfies the condition C1 and each subsequent shifter polygon in the sequence touches the preceding shifter polygon in the sequence; and a fifth element coupled to the fourth element and which assigns a phase PH2, different from the phase PH1, to each shifter polygon in set Sp2. 10. The computer program of claim 9, the mapper module further comprising:
a sixth element coupled to the fifth element and which removes the shifter polygons in set SP1 from said plurality P1; a seventh element coupled to the sixth element and which removes the target features in set TF1 from plurality P2; an eighth element coupled to the seventh element and which identifies a set TF2 of at least one target feature of said plurality P2 such that each target feature in set TF2 has a portion having an edge adjacent to at least one of shifter polygons in set SP2; and a ninth element coupled to the eighth element and which ad set SP1 at least one polygon L2, such that for each polygon L2 added to set SP1, at least one of the following conditions C3 and C4 holds: C3. shifter polygon L2 touches at least one target feature in set TF2; C4. shifter polygon L2 is one of a sequence of shifter polygons in the set SP1 such that the first shifter polygon in the sequence satisfies the condition C3 and each subsequent shifter polygon in the sequence touches the preceding shifter polygon in the sequence; and a tenth element coupled to the ninth element and which assigns phase PH1 to the at least one shifter polygon in set SP1. 11. The computer program of claim 9 wherein the shifter polygons assigned phase PH1 correspond to polygons on the area which transmit light of a first phase and wherein the shifter polygons assigned phase PH2 correspond to polygons on the area which transmit light of the first phase plus 180 degrees.
a decomposition module comprising: a first element which marks an edge of a target feature in plurality P2 comprising an angle between 225 degrees and 315. 13. The computer program of claim 12, the decomposition module further comprising:
a second element coupled to the first element and which deletes a portion of a target feature from plurality P2, the portion comprising a first mark, a second mark, and a portion of the target feature between the first and second marks, wherein the first and second mark are closer together than said predetermined value. 14. The method of claim 9 wherein said first element further comprises:
a first command which merges plurality P1 and plurality P2 into a shape; a second command which marks a vertex of the shape; a third command which checks that the marked vertex touches a single shifter polygon in plurality P1; a fourth command which adds the shifter polygon touching the vertex to set SP1, provided that the shifter polygon touching the marked vertex is the only shifter polygon touching the marked vertex.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS5308741Jul 31, 1992May 3, 1994Motorola, Inc.Lithographic method using double exposure techniques, mask position shifting and light phase shiftingUS5342713Jun 19, 1991Aug 30, 1994Oki Electric Industry Co., Ltd.Phase shifting maskUS5523186Dec 16, 1994Jun 4, 1996International Business Machines CorporationSplit and cover technique for phase shifting photolithographyUS5537648Aug 15, 1994Jul 16, 1996International Business Machines CorporationGeometric autogeneration of "hard" phase-shift designs for VLSIUS5538833Aug 3, 1994Jul 23, 1996International Business Machines CorporationHigh resolution phase edge lithography without the need for a trim maskUS5573890Jul 18, 1994Nov 12, 1996Advanced Micro Devices, Inc.Method of optical lithography using phase shift maskingUS5636131May 12, 1995Jun 3, 1997International Business Machines CorporationGeometric autogeneration of"hard"phase-shift designs for VLSIUS5672450Jan 23, 1996Sep 30, 1997Micron Technology, Inc.Method of phase shift mask fabrication comprising a tapered edge and phase conflict resolutionUS5686208Dec 4, 1995Nov 11, 1997Micron Technology, Inc.Process for generating a phase level of an alternating aperture phase shifting maskUS5858580Sep 17, 1997Jan 12, 1999Numerical Technologies, Inc.Phase shifting circuit manufacture method and apparatusUS5883813Mar 4, 1997Mar 16, 1999International Business Machines CorporationAutomatic generation of phase shift masks using net coloringUS5923562Oct 18, 1996Jul 13, 1999International Business Machines CorporationMethod for automatically eliminating three way intersection design conflicts in phase edge, phase shift designsUS5923566Mar 25, 1997Jul 13, 1999International Business Machines CorporationPhase shifted design verification routineUS6057063 *Apr 14, 1997May 2, 2000International Business Machines CorporationPhase shifted mask design system, phase shifted mask and VLSI circuit devices manufactured therewithUS6185727 *Dec 12, 1995Feb 6, 2001International Business Machines CorporationDesign verification for asymmetric phase shift mask layouts* Cited by examinerNon-Patent CitationsReference1Akemi Moniwa et al., "Heuristic Method for Phase-Conflict Minimization in Automatic Phase-Shift Mask Design", Japanese Journal of Applied Physics,Part 1, vol. 34, No. 12B, pp. 6584-6589. no date.2David M. Newmark et al., "Phase-shifting mask design tool", SPIE vol. 1604 11th Annual BACUS Symposium on Photomask Technology (1991), pp. 226-235.3Dong-Ho Cha et al., "Evaluation of phase-edge phase-shifting mask for sub-0.18mum gate patterns in logic devices", SPIE The International Society for Optical Engineering, vol. 3334, pp. 46-54. no date.4Dong-Ho Cha et al., "Evaluation of phase-edge phase-shifting mask for sub-0.18μm gate patterns in logic devices", SPIE The International Society for Optical Engineering, vol. 3334, pp. 46-54. no date.5F. M. Schellenberg et al., "Real and Imaginary Phase-Shifting Masks", BACUS News, vol. 8, Issue 12, Dec. 1992, pp. 1, 4-11.6Gerald Galan et al., "Application of Alternating-Type Phase Shift Mask to Polysilicon Level for Random Logic Circuits", Japanese Journal of Appied Physics vol. 33 (Dec. 1994), Part 1, No. 12B, pp. 6779-6784.7Hideyuki et al., "Improvement of Phase-Shifter Edge Line Mask Method", Japanese Journal of applied Physics, Part 1, vol. 30, No. 11B, Nov., 1991, pp. 2998-3003.8Hideyuki Jinbo et al., "0.2mum Or Less-i-Line Lithography By Phase-Shifting-Mask Technology", 1990 IEEE, pp. 825-828.9Hideyuki Jinbo et al., "0.2μm Or Less-i-Line Lithography By Phase-Shifting-Mask Technology", 1990 IEEE, pp. 825-828.10Hisashi Watanabe et al., "2x2 Phase Mask for Arbitrary Pattern Formation", Japanese Journal of Applied Physics, vol. 33 (Dec. 1994), Part 1, No. 12B, pp. 6790-6795.11Hisashi Watanabe et al., "2�2 Phase Mask for Arbitrary Pattern Formation", Japanese Journal of Applied Physics, vol. 33 (Dec. 1994), Part 1, No. 12B, pp. 6790-6795.12Hua-Yu Liu et al., "Fabrication of 0.1 mum T-shaped gates by phase-shifting optical lithography", SPIE vol. 1927 Optical/Laser Microlithography VI (1993), pp. 42-52.13Hua-Yu Liu et al., "Fabrication of 0.1 μm T-shaped gates by phase-shifting optical lithography", SPIE vol. 1927 Optical/Laser Microlithography VI (1993), pp. 42-52.14Kazuko Ooi et al., "Method of Designing Phase-Shifting Masks Utilizing a Compactor", Japanese Journal of Applied Physics, vol. 33 (Dec. 1994), Part 1, No. 12B, pp. 6774-6778.15Kazuyuki Inokuchi et al, "Sub-Quarter Micron Gate Fabrication Process Using Phase-Shifting Mask for Microwave GaAs Devices", Extended Abstracts of the 1991 International Conference on Solid State Devices and Materials, Yokohama, 1991, pp. 92-94.16Kurt Ronse et al., "Comparison of various phase shift strategies and application to 0.35 mum ASIC designs", SPIE-The International Society for Optical Engineering, vol. 1927, pt. 1 Optical/Laser Microlithography VI (1993), pp. 2-16 vol. 1.17Kurt Ronse et al., "Comparison of various phase shift strategies and application to 0.35 μm ASIC designs", SPIE—The International Society for Optical Engineering, vol. 1927, pt. 1 Optical/Laser Microlithography VI (1993), pp. 2-16 vol. 1.18Lars W. Liebmann et al., "A Comprehensive Evaluation of Major Phase Shift Mask Technologies for Isolated Gate Structures in Logic Designs", SPIE vol. 2197, pp. 612-623. no date.19Levenson et al., "Improving Resolution in Photolithography with a Phase-Shifting Mask", IEEE Transactions on Electron Devices, vol. ED-29, No. 12, Dec. 1982, pp. 1828-1836.20Marc D. Levinson, "Improving Resolution in Photolithography with a Phase-Shifting Mask", IEEE Transactions On Electron Devices, vol. ED-29, No. 12, Dec. 1982, pp. 1828-1982.21Masato Shibuya et al., "Performance of Resolution Enhancement Technique Using Both Multiple Exposure and Nonlinear Resist", Japanese Journal of Applied Physics vol. 33 (Dec.1994), Part 1, No. 12B, pp. 6874-6877.22T. A. Brunner, Session 2, Phase-Shift and Oblique-Illumination Methods, "Rim phase-shift mask combined with off-axis illumination: a path to 0.5lambd/NA geometries", SPIE vol. 1927 Optical/Laser Microlithography VI (1993), pp. 54-62.23T. A. Brunner, Session 2, Phase-Shift and Oblique-Illumination Methods, "Rim phase-shift mask combined with off-axis illumination: a path to 0.5λ/NA geometries", SPIE vol. 1927 Optical/Laser Microlithography VI (1993), pp. 54-62.24T. Brunner et al., "170 nm gates fabricated by phase-shift mask and top anti-reflector process", SPIE vol. 1927 Optical/Laser Microlithography VI (1993), pp. 182-189.25T. Waas et al., "Automatic Generation of Phase Shift Mask Layouts", Elsevier Science B.V., Microelectronic Engineering 23 (1994), pp. 139-142.26Tamae Haruki et al., "Algorithm for shifter placement with flexible order prioritizing", J. Vac. Sci. Technol. B 15(6), Nov./Dec. 1997, pp. 2394-2398.27Y. C. Pati et al., "Phase-shifting masks for microlithography: automated design and mask requirements", J. Opt. Soc. Am. A, vol. 11, No. 9, Sep. 1994, pp. 2438-2452.28Y. C. Pati et al., "Phase-Shifting Masks: Automated Design and Mask Requirements", SPIE-The International Society for Optical Engineering, vol. 2197, pp. 314-327. no date.29Y. C. Pati et al., "Phase-Shifting Masks: Automated Design and Mask Requirements", SPIE—The International Society for Optical Engineering, vol. 2197, pp. 314-327. no date.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS6609245 *Nov 29, 2001Aug 19, 2003International Business Machines CorporationPriority coloring for VLSI designsUS6622288 *Mar 29, 2001Sep 16, 2003Numerical Technologies, Inc.Conflict sensitive compaction for resolving phase-shift conflicts in layouts for phase-shifted featuresUS6728946 *Oct 31, 2000Apr 27, 2004Franklin M. SchellenbergMethod and apparatus for creating photolithographic masksUS6797438Dec 11, 2001Sep 28, 2004Advanced Micro Devices, Inc.Method and enhancing clear field phase shift masks with border around edges of phase regionsUS6818358 *Dec 11, 2001Nov 16, 2004Advanced Micro Devices, Inc.Method of extending the areas of clear field phase shift generationUS6901575Dec 5, 2001May 31, 2005Numerical Technologies, Inc.Resolving phase-shift conflicts in layouts using weighted links between phase shiftersUS6957414 *Jan 27, 2003Oct 18, 2005Infineon Technologies AgMethod for determining the ability to project images of integrated semiconductor circuits onto alternating phase masksUS6993741 *Jul 15, 2003Jan 31, 2006International Business Machines CorporationGenerating mask patterns for alternating phase-shift mask lithographyUS7174531 *Mar 26, 2004Feb 6, 2007Schellenberg Franklin MCreating photolithographic masksUS7216331Nov 3, 2004May 8, 2007Synopsys, Inc.Resolving phase-shift conflicts in layouts using weighted links between phase shiftersUS7281226Feb 27, 2003Oct 9, 2007Synopsys, Inc.Incrementally resolved phase-shift conflicts in layouts for phase-shifted featuresUS7475380Dec 27, 2005Jan 6, 2009International Business Machines CorporationGenerating mask patterns for alternating phase-shift mask lithographyUS7827518Jun 20, 2007Nov 2, 2010Synopsys, Inc.Incrementally resolved phase-shift conflicts in layouts for phase-shifted featuresUS8341559 *Nov 8, 2011Dec 25, 2012Synopsys, Inc.Incremental concurrent processing for efficient computation of high-volume layout dataUS8667429Nov 26, 2012Mar 4, 2014Synopsys, Inc.Incremental concurrent processing for efficient computation of high-volume layout dataUS8893061 *Mar 3, 2014Nov 18, 2014Synopsys, Inc.Incremental concurrent processing for efficient computation of high-volume layout dataUS20020144230 *May 31, 2002Oct 3, 2002Dupont Photomasks, Inc.System and method for correcting design rule violations in a mask layout fileUS20030140331 *Jan 27, 2003Jul 24, 2003Burkhard LudwigMethod for determining the ability to project images of integrated semiconductor circuits onto alternating phase masksUS20040230937 *Mar 26, 2004Nov 18, 2004Mentor Graphics CorporationCreating photolithographic masksUS20050014074 *Jul 15, 2003Jan 20, 2005International Business Machines CorporationGenerating mask patterns for alternating phase-shift mask lithographyUS20060107248 *Dec 27, 2005May 18, 2006Liebmann Lars WGenerating mask patterns for alternating phase-shift mask lithographyUS20120054693 *Nov 8, 2011Mar 1, 2012Synopsys, Inc.Incremental concurrent processing for efficient computation of high-volume layout data* Cited by examinerClassifications U.S. Classification716/52, 430/396, 430/5, 716/55International ClassificationG03F1/30, G06F17/50Cooperative ClassificationG03F1/30European ClassificationG03F1/30Legal EventsDateCodeEventDescriptionNov 9, 2000ASAssignmentOwner name: AVANT! CORPORATION, CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MAYHEW, JEFFREY P.;REEL/FRAME:011247/0427Effective date: 20001027Feb 6, 2003ASAssignmentOwner name: SYNOPSYS, INC., CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:AVANT! CORPORATION LLC;REEL/FRAME:013735/0789Effective date: 20020203May 19, 2006FPAYFee paymentYear of fee payment: 4Jun 1, 2010FPAYFee paymentYear of fee payment: 8May 14, 2014FPAYFee paymentYear of fee payment: 12RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services