Source: http://www.google.com/patents/US7372074?dq=7,453,150
Timestamp: 2017-01-19 19:32:42
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Matched Legal Cases: ['arts 107', 'arts 107', 'arts 107', 'arts 107', 'arts 107', 'arts 107', 'arts 107', 'arts 107', 'arts 107', 'art 107']

Patent US7372074 - Surface preparation for selective silicon fusion bonding - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsAn apparatus and method for a silicon-based Micro-Electro Mechanical System (MEMS) device, including a pair of silicon cover structures each having a substantially smooth and planar contact surface formed thereon; a silicon mechanism structure having a part thereof that is movably suspended relative...http://www.google.com/patents/US7372074?utm_source=gb-gplus-sharePatent US7372074 - Surface preparation for selective silicon fusion bondingAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS7372074 B2Publication typeGrantApplication numberUS 11/247,700Publication dateMay 13, 2008Filing dateOct 11, 2005Priority dateOct 11, 2005Fee statusLapsedAlso published asEP1772426A2, EP1772426A3, US20070082420Publication number11247700, 247700, US 7372074 B2, US 7372074B2, US-B2-7372074, US7372074 B2, US7372074B2InventorsJames C. Milne, Leonard J. McNallyOriginal AssigneeHoneywell International, Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (5), Non-Patent Citations (1), Referenced by (55), Classifications (13), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetSurface preparation for selective silicon fusion bonding
a relatively rough surface disposed between the contact surfaces of the covers and corresponding surfaces of the movable part of the mechanism structure, the relatively rough surface having a RMS surface roughness of greater than about 100 Ångströms; and
Silicon fusion bonding uses temperature and pressure to join atomically flat silicon wafers, one or more of which may be oxidized. General requirements for direct wafer fusion bonding include cleanliness and surface chemistry. General requirements for direct wafer fusion bonding also include microscopic smoothness with, and macroscopic flatness with RMS roughness of at most a few Ångströms and significantly less than 1.0 nanometer.
However, surface roughness is a limiting factor in silicon fusion bonding. Surface roughness requirements for silicon fusion bonding is significantly less than 1.0 nanometer, being on the order of only few Ångströms. Fusion bonding of silicon or silicon dioxide requires that both surfaces be highly polished and smooth. If an oxide is deposited on the wafers, surface roughness may be too great to permit effective bonding. Thermal oxidation of the wafers typically results in lower surface roughness.
Silicon fusion bond joints B are often formed between one or both of the substrates 3, 4 and respective opposing surfaces 10, 11 of the mechanism structure 2 to form the covers 5, 6 of the MEMS device 1. Accordingly, respective surfaces 12, 13 of the substrates 3, 4 to be silicon fusion bonded are machined flat and highly polished to a mirror smooth finish of only few Ångströms that is suitable for silicon fusion bonding, as is known in the art.
According to state-of-the-art fabrication methods known in the prior art, the one or more depressions 14, 15 are typically formed by a slow and well-controlled etch process that permits precise control of the depression depths D. Such precise depth control is obtained by either isotropically or anistropically etching in a suitable etchant, such as potassium hydroxide (KOH) for anistropically etching. Wet etching in KOH is a slow and well-controlled process that permits very precise control of the depth D of the depressions 14, 15. The slow and well-controlled KOH etch process also results in a mirror smooth finish of only few Ångströms on respective floor surfaces 16, 17 of the depressions 14, 15.
FIG. 9 illustrates recovery of the mirror smooth finish of only few Ångströms on surfaces of the respective silicon substrates; and
Alternatively, as illustrated here, the one or more movable parts 107 are structured for in-plane motion with respect to the mechanism 102, i.e., either left-right across the page or into-out of the page (shown). Accordingly, respective contact surfaces 112, 113 of the silicon substrates 103, 104 to be silicon fusion bonded are machined substantially planar and highly polished to a mirror smooth finish of only a few Ångstroms that is suitable for silicon fusion bonding with the opposing substantially planar and mirror smooth contact surfaces 110, 111 of the silicon mechanism 102, as is known in the art. According to the present invention, the respective substrate surfaces 112, 113 are selectively roughened in one or more selected surface areas 114, 115 corresponding to one or more of the movable parts 107. The one or more selectively roughened surface areas 114, 115 include sufficient amounts of the respective substrate surfaces 112, 113 to accommodate assembly tolerances and motion of the movable parts 107 during operation of the MEMS device 100. The selectively roughened surface areas 114, 115 of the invention use one well-known limiting factor of silicon fusion bonding to overcome another well-known limiting factor of silicon fusion bonding. Surface roughness is used in the selected areas 114, 115 to overcome the tendency of mirror smooth movable parts 107 bonding with one or the other of the opposing mirror smooth surfaces 112, 113 of the respective substrates 103, 104 when the device 100 is assembled using otherwise conventional silicon fusion bonding technology. Surface roughness in the selectively roughened surface areas 114, 115 is in excess of the maximum surface roughness of only a few Ångstroms that permits effective silicon fusion bonding according to state-of-the-art conventional silicon fusion bonding technology. For example, surface roughness in the selectively roughened surface areas 114, 115 is in excess of the RMS roughness of only a few Ångströms and significantly more than 1.0 nanometer that is known in the prior art to be a general requirement for direct wafer fusion bonding. Fusion bonding is thereby obstructed in the selectively roughened surface areas 114, 115. The selectively roughened surface areas 114, 115 of the present invention thus teach away from the use of mirror smooth finishes of only a few Ångstroms that is taught by conventional wisdom and state-of-the-art silicon fusion bonding practices for fabricating MEMS devices by bonding together two or more different silicon wafers as disclosed in the prior art. As a result, the selectively roughened surface areas 114, 115 of the present invention prevent formation of the silicon fusion bond joint F between the mechanism moving parts 107 and one or the other of the opposing mirror smooth surfaces 112, 113 of the respective substrates 103, 104 during assembly of the device 100.
Surface roughness is used in the selected areas 114, 115 on respective floor surfaces 118, 119 of the depressions 116, 117 to overcome the tendency of mirror smooth movable parts 107 bonding to one or the other of the respective floor surfaces 118, 119 when the device 100 is assembled using otherwise conventional silicon fusion bonding technology. In contrast to the mirror smooth finish of the respective floor surfaces 16, 17 (shown in FIGS. 1 and 2) as known and practiced in the prior art, surface roughness in the selectively roughened surface areas 114, 115 of the respective floor surfaces 118, 119 is in excess of the maximum surface roughness of only few Ångströms that permits effective silicon fusion bonding according to state-of-the-art conventional silicon fusion bonding technology. Fusion bonding is thereby obstructed in the selectively roughened surface areas 114, 115.
FIG. 6 illustrates one of the silicon cover substrates 103 having the contact surface 112 machined flat and highly polished to a mirror smooth finish of only few Ångströms that is suitable for silicon fusion bonding, as is known in the art. The polished contact surface 112 is formed with a layer of a sacrificial film 122, such as a silicon oxide or nitride, that is patterned with a positive or negative photoresist mask 124 that exposes one or more portions 126 of the sacrificial film layer 122 corresponding to respective locations of the movable parts 107.
FIG. 7 illustrates selective roughening of the substrate surface 112 in the selected areas 114. The photoresist mask 124 (shown dashed) is removed. The one or more portions 126 of the sacrificial film layer 122 corresponding to the location of the movable parts 107 are selectively removed down to the substrate surface 112. The mirror smooth finish of the substrate surface 112 is wet or dry etched to forms the selectively roughened surface 114 in areas exposed by the selectively removed portions 126 of the sacrificial film layer 122. By example and without limitation, the substrate surface 112 is selectively roughened in the selected areas 114 by Reactive Ion Etching (RIE) or Deep Reactive Ion Etching (DRIE). Both RIE and DRIE are plasma etch techniques that etch faster than the slow and well-controlled KOH etch process utilized in state-of-the-art fabrication methods that permits precise control of the etch. Both RIE and DRIE permit less precise depth control. RIE and DRIE are believed to result in finishes on the etched surface 114 that are at least several Ångströms and range to as much as several hundred Ångströms. Thus, RIE and DRIE also result in finishes on the etched surfaces 114 that are at least rougher than the maximum surface roughness of only few Ångströms that permits effective silicon fusion bonding. Fusion bonding is thereby obstructed in the selectively roughened surface areas 114.
FIG. 9 illustrates removal of the remaining portions of the sacrificial film 122 (shown dashed) using a conventional etch technology that recovers the mirror smooth finish of only few Ångströms on respective surfaces 112, 113 of the respective silicon substrates 103, 104.
According to one embodiment of the present invention, the surfaces 112, 113 are recovered by isotropically or anistropically etching in a suitable etchant, such as potassium hydroxide (KOH) for anistropically etching. As is well-known in the art and discussed herein, wet etching in KOH is a slow and well-controlled process that results in a mirror smooth finish of only few Ångströms on the substrate surfaces 112, 113. Thus, the recovered substrate surfaces 112, 113 are sufficiently smooth for effective fusion bonding with the silicon mechanism 102.
FIG. 10 illustrates another alternative embodiment of the MEMS device 100 of the present invention wherein the one or more movable parts 107 of the silicon mechanism 102 are formed with the roughened surfaces 114 and 115 of the invention. Meanwhile, the mirror smooth finish of only few Ångströms remains substantially entire and intact on respective surfaces 112, 113 of the respective silicon substrates 103, 104. Rather, the opposing surfaces 120, 121 of the silicon movable part 107 are etched using the RIE, DRIE or other etch process that forms the roughened surfaces 114 and 115 of the invention. However, the opposing surfaces 110, 111 of the stationary frame 109 portion of the silicon mechanism 102 retains the mirror smooth finish of only few Ångströms for effective formation of the silicon fusion bond joints B as known in the prior art with respective surfaces 112, 113 of the respective silicon substrates 103, 104 that form the covers 105, 106 of the MEMS device 100.
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MEMSMEMS-based optical image stabilizationUS8869625Sep 28, 2011Oct 28, 2014DigitalOptics Corporation MEMSMEMS actuator/sensorUS8873174Dec 9, 2013Oct 28, 2014DigitalOptics Corporation MEMSMounting flexure contactsUS8884381Nov 15, 2010Nov 11, 2014DigitalOptics Corporation MEMSGuard trenchUS8922870Sep 30, 2013Dec 30, 2014DigitalOptics Corporation MEMSElectrical routingUS8925793Oct 30, 2012Jan 6, 2015Dunan Microstaq, Inc.Method for making a solder jointUS8941192Sep 28, 2011Jan 27, 2015DigitalOptics Corporation MEMSMEMS actuator device deploymentUS8953934Aug 23, 2013Feb 10, 2015DigitalOptics Corporation MEMSMEMS actuator alignmentUS8956884Jan 26, 2011Feb 17, 2015Dunan Microstaq, Inc.Process for reconditioning semiconductor surface to facilitate bondingUS8996141Aug 26, 2011Mar 31, 2015Dunan Microstaq, Inc.Adaptive predictive functional controllerUS8998514Dec 16, 2013Apr 7, 2015DigitalOptics Corporation MEMSCapillary actuator deploymentUS9004787 *Dec 9, 2013Apr 14, 2015DigitalOptics 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structure for high temperature selective fusion bondingWO2011094300A3 *Jan 26, 2011Nov 17, 2011Microstaq, Inc.Process and structure for high temperature selective fusion bonding* Cited by examinerClassifications U.S. Classification257/50, 257/678, 257/684, 257/704International ClassificationH01L23/12, H01L23/06, H01L29/04, H01L23/02, H01L31/036Cooperative ClassificationB81B3/001, B81C2203/036, B81C2201/115European ClassificationB81B3/00F10Legal EventsDateCodeEventDescriptionOct 11, 2005ASAssignmentOwner name: HONEYWELL INTERNATIONAL, INC., NEW JERSEYFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MILNE, JAMES C.;MCNALLY, LEONARD J.;REEL/FRAME:017093/0510Effective date: 20050913Sep 23, 2011FPAYFee paymentYear of fee payment: 4Dec 24, 2015REMIMaintenance fee reminder mailedMay 13, 2016LAPSLapse for failure to pay maintenance feesJul 5, 2016FPExpired due to failure to pay maintenance feeEffective date: 20160513RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - 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