Source: https://patents.google.com/patent/CN101729046B/en
Timestamp: 2020-08-06 02:38:07
Document Index: 371243209

Matched Legal Cases: ['art 403', 'art 403', 'art 103', 'art 203', 'art 403', 'art 103', 'arts\n104']

CN101729046B - Circuit, method for operating circuit and application thereof - Google Patents
Circuit, method for operating circuit and application thereof Download PDF
CN101729046B
CN101729046B CN2009101670419A CN200910167041A CN101729046B CN 101729046 B CN101729046 B CN 101729046B CN 2009101670419 A CN2009101670419 A CN 2009101670419A CN 200910167041 A CN200910167041 A CN 200910167041A CN 101729046 B CN101729046 B CN 101729046B
CN2009101670419A
CN101729046A (en
L·达特
T·哈努施
H·德雷舍尔
2008-10-30 Priority to DE102008053900.7 priority Critical
2008-10-30 Priority to DE200810053900 priority patent/DE102008053900A1/en
2009-08-17 Application filed by Atmel德国有限公司 filed Critical Atmel德国有限公司
2010-06-09 Publication of CN101729046A publication Critical patent/CN101729046A/en
2013-05-08 Publication of CN101729046B publication Critical patent/CN101729046B/en
The present invention relates to a circuit, a method for operating the circuit and an application thereof. The circuit is provided with a voltage regulator (400) which is provided with a regulator output end (402) used for providing a power supply voltage (VDD). The regulator output end is connected with a first digital sub-circuit (1) through at least a first switch (100) and is connected with a second digital sub-circuit (2) through a second switch (200) for power supplying, wherein, the voltage regulator (400) is constructed to output a first state signal (OK1) related with the power supply voltage (VDD) and is connected with a first control input end (101) of the first switch device (100) for connecting with the first switch (100) by means of the first state signal (OK1), wherein, the first switch device (100) is constructed to output a second state signal (OK2) related with the switching state and is connected with a second control input end (201) of the second switch (200) for switching on the second switch (200) by means of the second state signal (OK2).
Circuit, be used for method and the application of operation circuit
The present invention relates to a kind of circuit with voltage regulator, this voltage regulator is used at least one first digital sub-circuit and second digital sub-circuit that supply power voltage is provided, and relate to a kind of method of moving circuit, also relate to a kind of application of voltage regulator, the first switching device and second switch device of circuit.
Radio system, particularly can be by powered battery according to the circuit of industrial standard Zigbee.In the zone that Zigbee is provided for being difficult to being applied in battery powered, non-maintaining radio switch and RTTY sensor or seldom approaches.For the cell voltage by battery produces the required supply power voltage of digital sub-circuit (for example memory or signal processing apparatus), can use voltage regulator.
By US 2004/0263237A1 known a kind ofly have a transistorized integrated semiconductor circuit, this transistor has for sleep pattern (English: continual switching characteristic sleep).Switching mechanism has reduced the amplitude of voltage fluctuation on the feed line of power supply circuits and has shortened the time interval that is used for stable power-supplying voltage.
By US 2005/0068059A1 known a kind of integrated semiconductor circuit with switching device, this switching device is between logical circuit and voltage source.Voltage regulator is connected by PMOS transistor AND gate logical circuit, with the output supply power voltage.Voltage regulator is connected with the supervisory circuit that is used for this voltage regulator of control, and wherein, this supervisory circuit is connected to export control signal with the transistorized grid of PMOS.
At US 7,098, a kind of circuit with voltage source is disclosed in 689B1, this voltage source is connected by PMOS transistor AND gate first programmed logical module, and is connected by the 2nd PMOS transistor AND gate the second programmed logical module.
Task of the present invention is, improves as much as possible circuit.
Described task is by solving according to circuit of the present invention.Favourable expansion scheme is included in specification.according to the present invention proposes a kind of circuit, this circuit has the first digital sub-circuit, the second digital sub-circuit, the first switching device, second switch device and voltage regulator, this voltage regulator apparatus is useful on the conditioner outlet end that supply power voltage is provided, this conditioner outlet end to be connected with described the first digital sub-circuit and to be connected with the second digital sub-circuit by described second switch device by described the first switching device at least in order to power, wherein, described voltage regulator is constructed to export first status signal relevant with described supply power voltage and is connected to connect described the first switching device by described the first status signal with the first control input end of described the first switching device, wherein, described the first switching device is constructed to export second status signal relevant with its on off state and is connected to connect described second switch device by described the second status signal with the second control input end of described second switch device.
Circuit has voltage regulator, and this voltage regulator apparatus is useful on the conditioner outlet end that supply power voltage is provided.In order to power, this conditioner outlet end can be connected with first digital sub-circuit and second electronic circuit at least.This conditioner outlet end consisted of with being connected by the first switching device of the first digital sub-circuit, and this conditioner outlet end consisted of with being connected by the second switch device of the second digital sub-circuit.Preferably, for switch, switching device has semiconductor switch, for example field-effect transistor.
Voltage regulator is constructed to output first status signal relevant with supply power voltage on the signal output part of voltage regulator.This status signal is digital signal advantageously, and wherein, value is corresponding to an operation standby condition of voltage regulator.Advantageously, the value of the first status signal is relevant and/or relevant with the amplitude of adjusting deviation over threshold voltage with supply power voltage.In order to connect the first switching device by the first status signal, the signal output part of voltage regulator is connected with the first control input end of the first switching device.
The first switching device is constructed to output second status signal relevant with its on off state on the signal output part of the first switching device.The first switching device preferably is configured to determine on off state by the switching current on the first switching device or voltage drop.Circuit is constructed to connect the second switch device by the second status signal.For this reason, the signal output part of the first switching device is connected with the second control input end of second switch device.
Advantageously, it is mainly capacity load that the first electronic circuit plays a part, thereby the first switching device is mainly the load current of the main capacity load of low-power ground switch the first electronic circuit.Advantageously, the second electronic circuit plays main capacity load, thus the load current of the main capacity load of the main low-power of second switch device ground switch the second electronic circuit.Preferably, the first electronic circuit and/or the second electronic circuit are constructed to storing digital information, and wherein, the first electronic circuit and/or the second electronic circuit are configured or are connected in the situation that the off voltage adjuster is not lost digital information yet.For example, the first electronic circuit and/or the second electronic circuit are constructed to cmos circuit.
Preferably, irrespectively carry out switch with system clock asynchronously and therefore by the first switching device and/or second switch device.Preferably, voltage regulator, the first switching device and second switch device consist of Quality Initiative.At this, this Quality Initiative does not preferably consist of closed regulating loop.
Preferably, circuit by monolithic be integrated on semiconductor chip.Preferably, circuit has different patterns, wherein preferably, compares with operational mode, and the functional minimizing due to circuit in sleep pattern has reduced current drain.Preferably, in deep sleep mode, current drain is minimized, and its mode is to disconnect by a part and the cell voltage of semiconductor switch with circuit.
In addition, task of the present invention is, the method that provide improved as far as possible, is used for the operation circuit.
This task is by solving according to method of the present invention.Favourable expansion scheme is included in specification.
Therefore, provide a kind of method that has the circuit of voltage regulator, the first digital sub-circuit and the second digital sub-circuit for operation.
In the method, turn-on voltage adjuster at first.Preferably, carry out described connection according to request signal.Request signal is for example for from sleep pattern (English: the wake-up signal that sleep mode) wakes up or reset signal (English: reset).
Voltage regulator is exported the first status signal according to providing of supply power voltage.At this, for example by supply power voltage and threshold value are compared to produce the first status signal.Status signal is for example that the edge of digital signal changes.
According to the first status signal, by the supply power voltage on first switching device switch the first digital sub-circuit.At this, the first status signal causes the connection of the first switching device, thereby supply power voltage is applied on the first digital sub-circuit after the switch stage of the first switching device.According on off state, first switching device output the second status signal.On off state is preferably tried to achieve by switching current or switching voltage.
According to the second status signal, by the supply power voltage on second switch device switch the second digital sub-circuit.At this, the second status signal causes the switch of second switch device, thereby supply power voltage is applied on the second digital sub-circuit after the switch stage of second switch device.
In addition, task of the present invention also is to provide a kind of application.
This task is by solving according to application of the present invention.Favourable expansion scheme is included in specification.
Therefore, provide voltage regulator, the first switching device and the second switch device of circuit as electric control chain (English: the application of the link control chain).In Quality Initiative, each link is controlled the next link in described chain.This has realized the control that is relative to each other of voltage regulator, the first switching device and second switch device.
Voltage regulator as the link in Quality Initiative is constructed to export the first status signal, to control the switch of the first switching device.Be constructed to export the second status signal as subsequently the first switching device of link in Quality Initiative, to control the switch of second switch device.Second control device as next link in Quality Initiative is constructed to export third state signal.
Circuit is constructed to according to third state signal enabling interrupt routine.At this, third state signal directly or indirectly cause the startup of interrupt routine by other links of Quality Initiative especially.Interrupt routine is for example realized in the program operation process in computing unit (such as microcontroller).
The expansion scheme of the following stated had both related to circuit, also related to the method for using and being used for the operation circuit.At this, the functional character of circuit is drawn by method characteristic.Method characteristic can be derived by the function of circuit.
According to a kind of preferred design, voltage regulator apparatus is useful on the control input end of turn-on voltage adjuster.Preferably, the control input end is connected with supervisory circuit, in order to control voltage regulator by supervisory circuit.Preferably, supervisory circuit is constructed to export on its control output end according to request signal a control signal.This control signal arrives the control input end of voltage regulator, with the turn-on voltage adjuster.Advantageously, request signal is reset signal (English: reset) or by reset signal consist of.
In a kind of favourable design, supervisory circuit directly is connected with the control input end of voltage regulator and/or the first switching device and/or second switch device, in order to turn-off.Preferably, supervisory circuit is constructed to shutoff voltage adjuster side by side and comes being connected between off voltage adjuster and electronic circuit by the first switching device and/or second switch device.
The design regulation favourable according to another kind, supervisory circuit is constructed to control a plurality of clock switchs (English: clock gate) for the first electronic circuit and/or the second electronic circuit.Alternatively, computing unit is constructed to control the clock switch for the first electronic circuit and/or the second electronic circuit.At this, supervisory circuit and/or computing unit preferably are constructed to control clock switch according to the on off state of the first switching device and second switch device.
According to a kind of particularly advantageous expansion scheme, circuit has the 3rd electronic circuit of simulation and/or numeral.The 3rd electronic circuit can by the 3rd switching device be used for providing the conditioner outlet end of supply power voltage to be connected.Preferably, the second switch device is constructed to the output third state signal relevant with its on off state on the second status signal output of second switch device.Preferably, the second status signal output is connected with the 3rd control input end of the 3rd switching device, to connect the 3rd switching device by third state signal.
According to a kind of preferred expansion scheme modification, in Quality Initiative, the input of supervisory circuit is connected to the signal output part back second switch device, that be used for the output third state signal relevant with the on off state of second switch device.Preferably, the signal output part of the input of supervisory circuit and second switch device or be connected with the signal output part of the switching device of the 3rd switching device or back.
Preferably, supervisory circuit be constructed to output that computing unit is connected on output end-state signal.Advantageously, computing unit is constructed to extend reset signal until the end-state signal.Preferably, computing unit is constructed to according to end-state signal activation clock (English: clock).For example, the end-state signal is the release signal for the program operation process that discharges computing unit.Alternatively, the end-state signal can affect reset signal, for example extends reset signal.
Advantageously stipulate in the design modification, supervisory circuit and/or computing unit are constructed to extend reset signal according to the end-state signal.Advantageously, circuit has memory element, for example has the trigger for storage reset signal, wherein, and preferably by end-state signal deletion storage.
Fixing in the first favourable expansion scheme modification, the sub-circuits in these electronic circuits has a plurality of volatile memory cells (SRAM).Stipulate in the second favourable expansion scheme modification, the sub-circuits in these electronic circuits has the signal processor of numeral.Stipulate in the 3rd favourable expansion scheme modification, the sub-circuits in these electronic circuits has a plurality of non-volatile memory cells (Flash).
According to a kind of preferred expansion scheme regulation, request signal is by the reset signal derivation or corresponding to reset signal.Stipulate in another kind of expansion scheme, reset signal is extended at least to the on off state that reaches the second switch device.Preferably, just connect the clock signal that is used for the first electronic circuit and/or the second electronic circuit after the on off state that reaches the second switch device, so that the output of voltage regulator is connected with electronic circuit.
Above-described expansion scheme modification is used separately or Combination application is all particularly advantageous.At this, all expansion scheme modification can make up mutually.In the explanation of the embodiment of accompanying drawing, some possible combinations are described.But the combinatory possibility of the expansion scheme modification that illustrates there is not exhaustive.
Below describe the present invention by embodiment by accompanying drawing.
Fig. 1: the schematic block circuit diagram of the first embodiment of circuit,
Fig. 2: the schematic block circuit diagram of the second embodiment of circuit,
Fig. 3: schematic chart.
Schematically show a kind of circuit by circuit block diagram in Fig. 1.Voltage regulator 400 has and is used to the first digital sub-circuit 1 and the second digital sub-circuit 2 that the conditioner outlet end 402 of supply power voltage VDD is provided.For conditioner outlet end 402 is connected or disconnects with the first electronic circuit 1 or the second electronic circuit 2, be provided with the first switching device 100 and second switch device 200, its input 102 is connected with conditioner outlet end 402 with 202 for this reason.
Voltage regulator 400 has control input end 401, wherein, and can turn-on voltage adjuster 400 by control signal St.In addition, voltage regulator 400 has the signal output part 403 for output the first status signal OK1.At this, the first status signal OK1 is relevant with the supply power voltage VDD that provides.
In the embodiment in figure 1, the signal output part 403 of voltage regulator 400 is connected with the first control input end 101 of the first switching device 100.The first switching device 100 has the first status signal output 103.The first switching device 100 is connected with the first electronic circuit 1 by its output 104, with the supply power voltage VDD on switch the first electronic circuit 1.
The first switching device 100 is constructed to the output second status signal OK2 relevant with its on off state on signal output part 103.The first switching device 100 is connected with the second control input end 201 of second switch device 200, to connect second switch device 200 by the second status signal OK2.Second switch device 200 is constructed to the output third state signal OK3 relevant with its on off state on signal output part 203.The 3rd switching signal OK3 can be used for control example such as other switching device or program be carried out initialization.
Second switch device 200 is connected with the second electronic circuit 2 by its output 204, with the supply power voltage VDD on switch the second electronic circuit 2.At this, control the switch of second control device 200 by the second status signal OK2 on control input end 201.
Schematically show another embodiment of circuit with the form of circuit block diagram in Fig. 2.Voltage regulator 400 (V REG) have control input end 401 and 406 and the signal output part 403 that is used for output the first status signal OK1.Voltage regulator 400 provides supply power voltage VDD on conditioner outlet end 402, this supply power voltage by voltage regulator by cell voltage U BProduce.For this reason, voltage regulator 400 is connected to cell voltage U by terminal 404 BUpper and by terminal 405 ground connection.
The circuit of the embodiment of Fig. 2 has the first switching device 100, second switch device 200 and the 3rd switching device 300.It is switching transistor that these switching devices 100,200,300 preferably have form, for example the circuit of the switch element of MOSFET or DMOS.Each switching device 100,200,300 have control input end 101,106,201,206,301,306, the input 102,202,302 that is connected with controller output end 402, signal output part 103,203,303 with the output 104 that is connected with electronic circuit 1,2,3,204 and 304.At this, voltage U 1, U2 and U3 drop on respectively on electronic circuit 1,2,3.Each switching device 100,200,300 is constructed to export status signal OK2, OK3 or the OK4 relevant with its on off state.
In addition, the circuit of the embodiment of Fig. 2 has supervisory circuit 500, and this supervisory circuit is by input 507 and output 508 and computing unit 600, and for example microcontroller (μ C) connects.Computing unit 600 has input or the circuit region for signal, for example reset signal R or interrupt signal IRQ.For this reason, computing unit 600 for example has and wakes up-Sleep-Monitoring circuit 610 (English: sleepcontroller).
In the off state of voltage regulator 400, computing unit 600 can send request signal AN to the input 507 of supervisory circuit 500.At this, request signal AN represents electronic circuit 1,2, one or more requests that conduct interviews of 3.Response request signal AN, supervisory circuit 500 is controlled voltage regulator 400 and turn-on voltage adjuster 400 by control signal St.After supply power voltage VDD was conditioned, voltage regulator generated the first status signal OK1.As the next link in Quality Initiative, the first switching device 100 is controlled by the first status signal OK1 and conditioner outlet end 402 is connected with nonvolatile memory (Flash) as the first digital sub-circuit 100.
The first switching device 100 produces the second status signal OK2 according on off state, and this second status signal is controlled second switch device 200 and conditioner outlet end 402 is connected with static memory module (SRAM) as the second electronic circuit 200.Replace second switch device 200, can also be provided for connecting respectively memory module 2.1,2.2,2.3, four output (not shown) of 2.4 at the unique output 204 shown in the embodiment of Fig. 2, wherein, the second switch device is connected each memory module 2.1,2.2,2.3,2.4 in this (unshowned) embodiment successively with conditioner outlet end 402.
In the embodiment of Fig. 2, second switch device 200 generates third state signal OK3 according on off state, thereby control the 3rd switching device 300, make the 3rd switching device 300 with conditioner outlet end 402 be connected DSP with digital signal processor as the analog/digital transceiver (TRX) of the 3rd electronic circuit 3) be connected.The 3rd switching device 300 produces the four status signal OK4 relevant with on off state, and the 4th status signal arrives the input 505 of supervisory circuit 500 (PowCon).So supervisory circuit 500 produces operation signal Ex, this operation signal transmits back computing unit 600 by output 508, and wherein, computing unit 600 starts the program of accessing subsequently at least one electronic circuit in these electronic circuits 1,2,3 according to operation signal Ex.
Supervisory circuit 500 is configured to be connected with being connected with control input end 106,206,306 with being connected by output 501,502,503, with the shutoff of controlling voltage regulator 400 with control by switching device 100,200 and 300 disconnection, thereby circuit is placed in the sleep pattern with less current drain.
Embodiment by Fig. 2 obtains a plurality of advantages.Avoided insecure signal edge overlapping by voltage regulator 400, the first switching device 100, second switch device 200 and the 3rd switching device 300 being arranged to Quality Initiative.This overlapping deletion that may cause electronic circuit 1,2,3 malfunction and for example cause the information of storing when voltage interruption.So, advantageously avoided the uncertain (English: RACE-Condition) of temporal signal by the embodiment of Fig. 2.Quality Initiative by the embodiment of Fig. 2 has been eliminated the making current spike, these making current spikes may be for example because switching device 100,200, pure time of 300 are controlled and therefore in the situation that overlapping generation of electric current possible, in time.Because control switch device asynchronously, thus clock when not required, so clock needs not be available and advantageously just is access in by clock switch (Tore) subsequently in the connection process.For example come switch clock signal (English: clock) according to operation signal Ex.
Schematically show a width chart in Fig. 3, explain for operation according to the embodiment of Fig. 1 or according to the method step of the method for the circuit of the embodiment of Fig. 2 by this chart.
In Fig. 3, reset signal R is expressed as request signal.According to request signal R, by control signal St turn-on voltage adjuster.The supply power voltage VDD that provides on the output of voltage regulator raises along with the connection of voltage regulator.
If the actual value of supply power voltage VDD is enough consistent with the rated value of supply power voltage, voltage regulator is according to the described first status signal OK1 that unanimously exports so.
According to the first status signal OK1, the first switching device will be received on the first digital sub-circuit at the supply power voltage VDD that provides on the conditioner outlet end of voltage regulator.At this, be applied to the value that voltage U 1 on the first digital sub-circuit rises to supply power voltage VDD.According to for example comparing with supply power voltage the on off state that defines by the voltage U 1 that will apply, first switching device output the second status signal OK2.
According to the second status signal OK2, the second switch device will be received on the second digital sub-circuit at the supply power voltage VDD that provides on the conditioner outlet end of voltage regulator.At this, be applied to the value that voltage U 2 on the second digital sub-circuit rises to supply power voltage VDD.According to for example comparing with supply power voltage the on off state that defines by the voltage U 2 that will apply, second switch device output third state signal OK3.
According to third state signal OK3, the 3rd switching device will be received on the 3rd electronic circuit of simulation and/or numeral at the supply power voltage VDD that provides on the conditioner outlet end of voltage regulator.At this, be applied to the value that voltage U 3 on the 3rd electronic circuit rises to supply power voltage VDD.According to for example comparing with supply power voltage the on off state that defines by the voltage U 3 that will apply, the 3rd switching device output the 4th status signal OK4.
In the embodiments of figure 3, the 4th status signal OK4 is relevant by the function of the 3rd switching device to third state signal OK3.Third state signal OK3 is relevant by the function of second switch device to the second status signal OK2.The second status signal OK2 is relevant by the function of the first switching device to the first status signal OK1.Produce signal Ex according to the 4th status signal OK4, this signal Ex is corresponding to the complete treatment state of the Quality Initiative that is comprised of voltage regulator and switching device.
Reset signal R is lengthened to signal Ex, and its mode is that reset signal R is stored until t0 and again resetting by signal Ex constantly.Show equally the waveform of stored reset signal R '.
Also can realize the shutoff of voltage regulator and disconnect by conditioner outlet end and the electronic circuit of switching device with voltage regulator.For this reason, generate signal AUS, disconnect when this signal is realized switching device.Voltage regulator is turn-offed simultaneously for this reason.According to the resistance that exists in circuit, discharge curve also can than shown in more flatly the decay.
The invention is not restricted to the design modification shown in Fig. 1 to 3.For example also can be provided for more switching devices of analog more and/or digital sub-circuit in Quality Initiative.The beginning that SRAM 2.1,2.2,2.3,2.4 is arranged on Quality Initiative is also favourable, thereby directly connects SRAM (not shown in Fig. 2) after voltage regulator.Alternatively, also SRAM can be arranged on the end of Quality Initiative, thus after all other electronic circuits with the output voltage of voltage regulator to SRAM power supply (not shown in Fig. 2).Be particularly advantageous for general radio system according to the circuit of Fig. 2 functional, in particular for the radio system according to industrial standard IEEE 802.15.4.
1,2 digital sub-circuit
2.1,2.2,2.3,2.4 memory modules (SRAM)
3 analog/digital electronic circuits
100,200,300 switching devices
101,106,201,206,301,306, control input end
102,202,302 inputs
103,203,303,403 signal output parts
104,204,304 outputs
402 conditioner outlet ends
404 input voltage terminals
405 earth terminals
500 supervisory circuits
501,502,503,504,506,508 control output ends
505,507 inputs
600 computing units, microcontroller
610 wake up-Sleep-Monitoring circuit (English: sleep
The AN request signal
The AUS cut-off signals
The Ex settling signal
The IRQ interrupt signal
OK1, OK2, OK3, OK4 status signal
R, R ' reset signal (reset)
The St control signal
T, t0 time, constantly
U BCell voltage
The VDD supply power voltage
1. circuit, this circuit has
The first digital sub-circuit (1),
The second digital sub-circuit (2),
The first switching device (100),
Second switch device (200) and
Voltage regulator (400), this voltage regulator apparatus is useful on the conditioner outlet end (402) that supply power voltage (VDD) is provided, this conditioner outlet end (402) to be connected with described the first digital sub-circuit (1) and to be connected with the second digital sub-circuit (2) by described second switch device (200) by described the first switching device (100) at least in order to power
Wherein, described voltage regulator (400) is constructed to output first status signal (OK1) relevant with described supply power voltage (VDD) and is connected to connect described the first switching device (100) by described the first status signal (OK1) with first control input end (101) of described the first switching device (100)
Wherein, described the first switching device (100) is constructed to export second status signal (OK2) relevant with its on off state and is connected to connect described second switch device (200) by described the second status signal (OK2) with second control input end (201) of described second switch device (200).
2. circuit according to claim 1, wherein,
Described voltage regulator (400) has for the control input end (401) of connecting this voltage regulator (400), and this control input end (401) are connected with supervisory circuit (500), and
Described supervisory circuit (500) is constructed to will output to for the control signal (St) of connecting the control input end (401) of described voltage regulator (400) according to request signal (AN).
3. circuit according to claim 2, wherein,
Described supervisory circuit (500) in order to turn-off with the first switching device described voltage regulator (400) and/or described (100) and/or control input end (106 second switch device (200), 206,406) directly connect.
4. circuit according to claim 2, wherein,
Described supervisory circuit (500) is constructed to control for described the first digital sub-circuit (1) and/or a plurality of clock switchs described the second digital sub-circuit (2).
5. circuit according to claim 2,
This circuit has the 3rd electronic circuit (3) of simulation and/or numeral, and it can be connected with the described conditioner outlet end (402) that is used for power supply by the 3rd switching device (300),
Wherein, described second switch device (200) is constructed to export the third state signal (OK3) relevant with the on off state of this second switch device and is connected to connect described the 3rd switching device (300) by described third state signal (OK3) with the 3rd control input end (301) of described the 3rd switching device (300).
6. circuit according to claim 5, wherein,
The input (505) that connects afterwards described supervisory circuit (500) at the signal output part (203) that is used for the output third state signal (OK3) relevant with the on off state of this second switch device (200) of described second switch device (200).
7. circuit according to claim 2, wherein,
Described supervisory circuit (500) is constructed at the upper output of the output (508) that is connected with computing unit (600) end-state signal (Ex).
8. circuit according to claim 7, wherein,
Described supervisory circuit (500) and/or described computing unit (600) are constructed to extend reset signal (R) according to described end-state signal (Ex).
9. circuit according to claim 1, wherein,
A digital sub-circuit in described the first digital sub-circuit (1) and described the second digital sub-circuit (2) has a plurality of volatile memory cells, and/or
A digital sub-circuit in described the first digital sub-circuit (1) and the second digital sub-circuit (2) has digital signal processor, and/or
A digital sub-circuit in described the first digital sub-circuit (1) and the second digital sub-circuit (2) has a plurality of non-volatile memory cells.
10. circuit according to claim 6, wherein, the signal output part (203) of the input (505) of described supervisory circuit (500) and described second switch device (200) or be connected with the signal output part (303) of the 3rd switching device (300) or with the signal output part of the switching device of back.
11. one kind is used for the method that operation has the circuit of voltage regulator (400), the first digital sub-circuit (1) and the second digital sub-circuit (2), wherein,
Connect described voltage regulator (400) according to request signal (AN),
Described voltage regulator (400) is exported the first status signal (OK1) according to providing of supply power voltage (VDD),
The first switching device (100) is received described the first digital sub-circuit (1) according to described the first status signal (OK1) with supply power voltage (VDD) and upward and according on off state is exported the second status signal (OK2), and
Second switch device (200) is received described supply power voltage (VDD) on described the second digital sub-circuit (2) according to described the second status signal (OK2).
Described request signal (AN) is derived by reset signal (R) or corresponding to described reset signal (R), and
Described reset signal (R) is extended at least an on off state that reaches described second switch device (200).
13. the method for any one according to claim 11 or 12, wherein,
Connect the clock signal that is used for described the first digital sub-circuit (1) and/or the second digital sub-circuit (2) after the on off state that reaches described second switch device (200).
14. the application of the Quality Initiative mode of the voltage regulator of circuit (40), the first switching device (100) and second switch device (200), in order to control related to each other described voltage regulator (400), described the first switching device (100) and described second switch device (200), wherein
Described voltage regulator (400) is constructed to output for first status signal (OK1) of the switch of controlling described the first switching device (100), and
Described the first switching device (100) is constructed to output for second status signal (OK2) of the switch of controlling described second switch device (200),
Described second switch device (200) is constructed to export third state signal (OK3), and
Described circuit is constructed to start interrupt routine according to described third state signal (OK3).
CN2009101670419A 2008-10-30 2009-08-17 Circuit, method for operating circuit and application thereof CN101729046B (en)
CN101729046A CN101729046A (en) 2010-06-09
CN101729046B true CN101729046B (en) 2013-05-08
CN2009101670419A CN101729046B (en) 2008-10-30 2009-08-17 Circuit, method for operating circuit and application thereof
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