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Patent US7991815 - Methods, systems, and computer program products for parallel correlation and ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA fast correlator transform (FCT) algorithm and methods and systems for implementing same, correlate an encoded data word (X0-XM-1) with encoding coefficients (C0-CM-1), wherein each of (X0-XM-1) is represented by one or more bits and each said coefficient is represented by one or more bits, wherein...http://www.google.com/patents/US7991815?utm_source=gb-gplus-sharePatent US7991815 - Methods, systems, and computer program products for parallel correlation and applications thereofAdvanced Patent SearchPublication numberUS7991815 B2Publication typeGrantApplication numberUS 12/010,425Publication dateAug 2, 2011Filing dateJan 24, 2008Priority dateNov 14, 2000Also published asUS7454453, US20040230628, US20080294708Publication number010425, 12010425, US 7991815 B2, US 7991815B2, US-B2-7991815, US7991815 B2, US7991815B2InventorsGregory S. Rawlins, Ray KasselOriginal AssigneeParkervision, Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (102), Non-Patent Citations (330), Referenced by (1), Classifications (9), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetMethods, systems, and computer program products for parallel correlation and applications thereof
US 7991815 B2Abstract
A fast correlator transform (FCT) algorithm and methods and systems for implementing same, correlate an encoded data word (X0-XM-1) with encoding coefficients (C0-CM-1), wherein each of (X0-XM-1) is represented by one or more bits and each said coefficient is represented by one or more bits, wherein each coefficient has k possible states, and wherein M is greater than 1. Substantially the same hardware can be utilized for processing in-phase and quadrature phase components of the data word (X0-XM-1). The coefficients (C0-CM-1) can represent real numbers and/or complex numbers. The coefficients (C0-CM-1) can be represented with a single bit or with multiple bits (e.g., magnitude). The coefficients (C0-CM-1) represent, for example, a cyclic code keying (�CCK�) code set substantially in accordance with IEEE 802.11 WLAN standard.
1. A method for decoding, comprising:
(a) receiving a transmitted encoded data word;
(b) generating in-phase (I) and quadrature-phase (Q) components of the transmitted encoded data word based on the transmitted encoded data word;
(c) determining whether a phase shift occurred in the transmitted encoded data word;
(d) independently applying a fast correlator transform (FCT) to each of the I and Q components of the transmitted encoded data word to generate I and Q correlation outputs;
(e) combining the I and Q correlation outputs to generate a decoded data word.
2. The method of claim 1, wherein the transmitted encoded data word is encoded according to a Cyclic Code Keying (CCK) scheme.
3. The method of claim 1, wherein the transmitted encoded data word is encoded according to the IEEE 802.11 signaling scheme.
4. The method of claim 1, wherein step (b) comprises generating the I and Q components of the transmitted encoded data word based on a mapping of encoded input to I and Q encoded outputs according to an encoding scheme.
5. The method of claim 1, wherein the phase shift in the transmitted encoded data word is due to a differential encoding of the encoded data word.
determining whether the I component of the transmitted encoded data word is inverted, thereby corresponding to a π/2 phase shift in the transmitted encoded data word; and
determining whether the Q component of the transmitted encoded data word is inverted, thereby corresponding to a 3π/2 phase shift in the transmitted encoded data word.
swapping the I and Q components when a π/2 phase shift or a 3π/2 phase shift is determined in the transmitted encoded data word.
generating a respective plurality of correlation outputs for each of the I and Q components;
selecting for each of the I and Q components a respective maximum correlation output value from its respective plurality of correlation outputs.
9. The method of claim 8, wherein the maximum correlation output value has an absolute value of 8.
10. The method of claim 8, wherein step (e) further comprises:
combining the respective I and Q maximum correlation output values to generate the decoded data word.
11. A decoder, comprising:
input circuitry to receive a transmitted encoded data word;
mapping circuitry to map the transmitted encoded data word to corresponding in-phase (I) and quadrature (Q) components of the transmitted encoded data word;
phase shift detection circuitry to determine whether a phase shift occurred in the transmitted encoded data word;
I and Q fast correlator transform (FCT) circuitry to independently perform FCT correlation on each of the I and Q components of the transmitted encoded data word and to generate I and Q correlation outputs;
adder circuitry to combine the I and Q correlation outputs and generate a decoded data word.
12. The decoder of claim 11, wherein the transmitted encoded data word is encoded according to a Cyclic Code Keying (CCK) scheme.
13. The decoder of claim 11, wherein the transmitted encoded data word is encoded according to the IEEE 802.11 signaling scheme.
14. The decoder of claim 11, wherein the mapping circuitry comprises a mapping of encoded input to I and Q encoded outputs according to an encoding scheme.
15. The decoder of claim 11, wherein the phase shift in the transmitted encoded data word is due to a differential encoding of the encoded data word.
16. The decoder of claim 11, wherein the phase detection circuitry further comprises:
inverted channel detection circuitry to determine whether the I component of the transmitted encoded data word is inverted, thereby corresponding to a π/2 phase shift in the transmitted encoded data word; and to determine whether the Q component of the transmitted encoded data word is inverted, thereby corresponding to a 3π/2 phase shift in the transmitted encoded data word.
circuitry to swap the I and Q components when a π/2 phase shift or a 3π/2 phase shift is determined in the transmitted encoded data word.
18. The decoder of claim 11, wherein the I and Q FCT circuitry:
circuitry to generate a respective plurality of correlation outputs for each of the I and Q components;
circuitry to select for each of the I and Q components a respective maximum correlation output value from its respective plurality of correlation outputs.
19. The decoder of claim 18, wherein the maximum correlation output value has an absolute value of 8.
20. The decoder of claim 18, wherein the adder circuitry combines the respective I and Q maximum correlation output values to generate the decoded data word.
(a) means for receiving a transmitted encoded data word;
(b) means for generating in-phase (I) and quadrature-phase (Q) components of the transmitted encoded data word based on the transmitted encoded data word;
(c) means for determining whether a phase shift occurred in the transmitted encoded data word;
(d) means for independently applying a fast correlator transform (FCT) to each of the I and Q components of the transmitted encoded data word to generate I and Q correlation outputs;
(e) means for combining the I and Q correlation outputs to generate a decoded data word.
22. The apparatus of claim 21, wherein the transmitted encoded data word is encoded according to a Cyclic Code Keying (CCK) scheme.
23. The apparatus of claim 21, wherein the transmitted encoded data word is encoded according to the IEEE 802.11 signaling scheme.
24. The apparatus of claim 21, wherein said generating means comprises means for generating the I and Q components of the transmitted encoded data word based on a mapping of encoded input to I and Q encoded outputs of an encoding scheme.
25. The apparatus of claim 21, wherein the phase shift in the transmitted encoded data word is due to a differential encoding of the encoded data word.
26. The apparatus of claim 21, wherein said determining means further comprises:
means for determining whether the I component of the transmitted encoded data word is inverted, thereby corresponding to a π/2 phase shift in the transmitted encoded data word; and
means for determining whether the Q component of the transmitted encoded data word is inverted, thereby corresponding to a 3π/2 phase shift in the transmitted encoded data word.
means for swapping the I and Q components when a π/2 phase shift or a 3π/2 phase shift is determined in the transmitted encoded data word.
28. The apparatus of claim 21, wherein said independently applying means further comprises:
means for generating a respective plurality of correlation outputs for each of the I and Q components;
means for selecting for each of the I and Q components a respective maximum correlation output value from its respective plurality of correlation outputs.
29. The apparatus of claim 28, wherein the maximum correlation output value has an absolute value of 8.
30. The apparatus of claim 28, wherein said combining means further comprises:
means for combining the respective I and Q maximum correlation output values to generate the decoded data word.
This patent application is a divisional of U.S. non-provisional application Ser. No. 10/719,058, filed Nov. 24, 2003, which is a continuation-in-part of U.S. non-provisional application Ser. No. 09/987,193, filed Nov. 13, 2001, now U.S. Pat. No. 7,010,559, which claims priority to U.S. provisional application No. 60/248,001, filed Nov. 14, 2000, all of which are incorporated herein by reference in their entireties.
The following application of common assignee is related to the present application, and is herein incorporated by reference in its entirety: U.S. non-provisional application Ser. No. 09/550,644, titled �Method and System for Down-Converting an Electromagnetic Signal, Transforms for Same, and Aperture Relationships,� filed Apr. 14, 2000.
In accordance with the invention, X0 is multiplied by each state (C0(0) through C0(k-1)) of the coefficient C0, thereby generating results X0C0(0) through X0C0(k-1). This is repeated for data bits (X1-XM-1) and corresponding coefficients (C1-CM-1), respectively. The results are grouped into N groups. Combinations within each of said N groups are added to one another, thereby generating a first layer of correlation results.
The first layer of results is grouped and the members of each group are summed with one another to generate a second layer of results. This process is repeated as necessary until a final layer of results is generated. The final layer of results includes a separate correlation output for each possible state of the complete set of coefficients (C0-CM-1). The results in the final layer are compared with one another to identify the most likely encoded data word.
In an embodiment, the summations are pruned to exclude summations that would result in invalid combinations of the encoding coefficients (C0-CM-1). In an embodiment, substantially the same hardware is utilized for processing in-phase and quadrature phase components of the data word (X0-XM-1). In an embodiment, the coefficients (C0-CM-1) represent real numbers. In an alternative embodiment, the coefficients (C0-CM-1) represent complex numbers. In an embodiment, the coefficients (C0-CM-1) are represented with a single bit. Alternatively, the coefficients (C0-CM-1) are represented with multiple bits (e.g., magnitude). In an embodiment, the coefficients (C0-CM-1) represent a cyclic code keying (�CCK�) code set substantially in accordance with IEEE 802.11 WLAN standard.
II. Example Environment 802.11
The present invention is described herein as implemented in an example environment of an IEEE 802.11b 11 MBPS physical layer signaling scheme. IEEE 802.11 is a well-known communications standard and is described in, for example, �Medium Access Control (MAC) and Physical (PHY) Specifications,� ANS/IEE Std 802.11, published by IEEE, (1999 Ed.), and incorporated herein by reference in its entirety.
A distinction is made herein between a basic correlator kernel and a full demodulator. A general form of a demodulator for IEEE 802.11 typically requires four correlator banks operating essentially in parallel. A fast correlator transform (�FCT�) kernel, in accordance with the invention, typically includes similar structure, plus complex additions and subtractions from two in-phase and two quadrature-phase banks to accomplish the demodulation for IEEE 802.11. The Walsh transform, as a comparison, accounts for these additional adds and subtracts by having them built into its algorithm.
FIG. 2A is an expanded view of the final accumulate: or summation function 102 in FIG. 1, part of the FIR filter 100. Notice that only 7 adders are required for the example implementation. Nevertheless, 448 complex additions represent a significant number of operations. Lucent, Harris/Intersil, and Alantro apply the Fast Walsh Transform (�FWT�) to the CCK code set to reduce the correlation operation down to 112 complex multiplies due to the restriction placed on the code set.
16(first hierarchical layer)+32(second layer)+64(third layer)=112
The coefficients, Ck, are considered constant for the nominal case of an AWGN channel. �n� is the FIR filter or correlator depth. For a case of m correlators operating on Xi in parallel, Eq. 6 becomes Eq. 7:
In an embodiment, the magnitude compare operation illustrated in FIG. 6 utilizes a flag at each level of compare to indicate the winning local score at that level. The winning local score can be traced from the output back to one of the 64 original input correlation scores to decide which 6-bit word is most likely. In an embodiment, outcomes of the scores at one or more levels are arbitrarily determined. In an embodiment, magnitude compare operations are performed with an adder/subtractor to create the result C=A−B, where A and B are inputs.
In an embodiment, steps 806 and 808 include the step of omitting summations that would result in invalid combinations of the encoding coefficients (C0-CM-1). This is illustrated in steps 806A and 808A. This also is illustrated, for example, in FIG. 7, wherein the second level of results 310 omits the following combinations:
In this example, the omissions eliminate performing summations for combinations that are invalid in light of the CCK code or that result in null operation. In other embodiments, different combinations may or may not be omitted based on particular codes.
In an embodiment, the coefficients (C0-CM-1) represent real numbers. In an alternative embodiment, the coefficients (C0-CM-1) represent complex numbers.
In an embodiment, the coefficients (C0-CM-1) represent a cyclic code keying (�CCK�) code set substantially in accordance with IEEE 802.11 WLAN standard, illustrated in the tables below.
Logical zeros become weighted by an arithmetic value, −1. In this manner the optimum correlator trajectory for a particular chip sequence is projected through the correlator trellis. The example above corresponds to the in-phase correlator waiting for an originally transmitted data sequence d0 . . . d7 of 0, 0, 1, 0, 1, 0, 1, 0. For this example, that particular branch represents a correlation provided in Eq. 11;
y 42 =x 0(−1)+x 1(1)+x 2(1)+x 3(−1)+x 4(1)+x 5(1)+x 6(−1)+x 7(−1) (Eq. 11)
TABLE 2 d0 d1 d2 d3 4-tuple 4-tuple d4 d5 d6 d7 In phase Combination Quadrature Combination Complex D0 00000000 11101101 B2 + B20 11101101 B2 + B20 111−111−11 D1 00000001 00011101 B13 + B20 11101101 B2 + B20 jjj−j11−11 D2 00000010 00011101 B13 + B20 00011101 B13 + B20 −1−1−1111−11 D3 00000011 11101101 B2 + B20 00011101 B13 + B20 −j−j−jj11−11 D4 00000100 00100001 B14 + B23 11101101 B2 + B20 jj1−1jj−11 D5 00000101 00010001 B13 + B23 00101101 B14 + B20 −1−1j−jjj−11 D6 00000110 11010001 B1 + B23 00011101 B13 + B20 −j−j−11jj−11 D7 00000111 11100001 B2 + B23 11011101 B1 + B20 11−jjjj−11 D8 00001000 00100001 B14 + B23 00100001 B14 + B23 −1−11−1−1−1−11 D9 00001001 11010001 B1 + B23 00100001 B14 + B23 −j−jj−j−1−1−11 D10 00001010 11010001 B1 + B23 11010001 B1 + B23 11−11−1−1−11 D11 00001011 00100001 B14 + B23 11010001 B1 + B23 jj−jj−1−1−11 D12 00001100 11101101 B2 + B20 00100001 B14 + B23 −j−j1−1−j−j−11 D13 00001101 11011101 B1 + B20 11100001 B2 + B23 11j−j−j−j−11 D14 00001110 00011101 B13 + B20 11010001 B1 + B23 jj−11−j−j−11 D15 00001111 00101101 B14 + B20 00010001 B13 + B23 −1−1−jj−j−j−11 D16 00010000 01000111 B7 + B17 11101101 B2 + B20 j1j−1j1−j1 D17 00010001 00010111 B13 + B17 01001101 B7 + B20 −1j−1−jj1−j1 D18 00010010 10110111 B8 + B17 00011101 B13 + B20 −j−1−j1j1−j1 D19 00010011 11100111 B2 + B17 10111101 B8 + B20 1−j1jj1−j1 D20 00010100 00000011 B15 + B19 01100101 B6 + B21 −1jj−1−1j−j1 D21 00010101 10010011 B9 + B19 00000101 B15 + B21 −j−1−1−j−1j−j1 D22 00010110 11110011 B0 + B19 10010101 B9 + B21 1−j−j1−1j−j1 D23 00010111 01100011 B6 + B19 11110101 B0 + B21 j11j−1j−j1 D24 00011000 10001011 B11 + B18 00100001 B14 + B23 −j−1j−1−j−1−j1 D25 00011001 11011011 B1 + B18 10000001 B11 + B23 1−j−1−j−j−1−j1 D26 00011010 01111011 B4 + B18 11010001 B1 + B23 j1−j1−j−1−j1 D27 00011011 00101011 B14 + B18 01110001 B4 + B23 −1j1j−j−1−j1 D28 00011100 11001111 B3 + B16 10101001 B10 + B22 1−jj−11−j−j1 D29 00011101 01011111 B5 + B16 11001001 B3 + B22 j1−1−j1−j−j1 D30 00011110 00111111 B12 + B16 01011001 B5 + B22 −1j−j11−j−j1 D31 00011111 10101111 B10 + B16 00111001 B12 + B22 −j−11j1−j−j1 D32 00100000 01000111 B7 + B17 01000111 B7 + B17 −11−1−1−1111 D33 00100001 10110111 B8 + B17 01000111 B7 + B17 −jj−j−j−1111 D34 00100010 10110111 B8 + B17 10110111 B8 + B17 1−111−1111 D35 00100011 01000111 B7 + B17 10110111 B8 + B17 j−jjj−1111 D36 00100100 10001011 B11 + B18 01000111 B7 + B17 −jj−1−1−jj11 D37 00100101 10111011 B8 + B18 10000111 B11 + B17 1−1−j−j−jj11 D38 00100110 01111011 B4 + B18 10110111 B8 + B17 j−j11−jj11 D39 00100111 01001011 B7 + B18 01110111 B4 + B17 −11jj−jj11 D40 00101000 10001011 B11 + B18 10001011 B11 + B18 1−1−1−11−111 D41 00101001 01111011 B4 + B18 10001011 B11 + B18 j−j−j−j1−111 D42 00101010 01111011 B4 + B18 01111011 B4 + B18 −11111−111 D43 00101011 10001011 B11 + B18 01111011 B4 + B18 −jjjj1−111 D44 00101100 01000111 B7 + B17 10001011 B11 + B18 j−j−1−1j−j11 D45 00101101 01110111 B4 + B17 01001011 B7 + B18 −11−j−jj−j11 D46 00101110 10110111 B8 + B17 01111011 B4 + B18 −jj11j−j11 D47 00101111 10000111 B11 + B17 10111011 B8 + B18 1−1jjj−j11 D48 00110000 11101101 B2 + B20 01000111 B7 + B17 −j1−j−1−j1j1 D49 00110001 10111101 B8 + B20 11100111 B2 + B17 1j1−j−j−j1 D50 00110010 00011101 B3 + B20 10110111 B8 + B17 j−1j1−j1j1 D51 00110011 01001101 B7 + B20 00010111 B3 + B17 −1−j−1j−j1j1 D52 00110100 10101001 B10 + B22 11001111 B3 + B16 1j−j−11jj1 D53 00110101 00111001 B12 + B22 10101111 B10 + B16 j−11−j1jj1 D54 00110110 01011001 B5 + B22 00111111 B12 + B16 −1−jj11jj1 D55 00110111 11001001 B3 + B22 01011111 B5 + B16 −j1−1j1jj1 D56 00111000 00100001 B14 + B23 10001011 B11 + B18 j−1−j−1j−1j1 D57 00111001 01110001 B4 + B23 00101011 B14 + B18 −1−j1−jj−1j1 D58 00111010 11010001 B1 + B23 01111011 B4 + B18 −j1j1j−1j1 D59 00111011 10000001 B11 + B23 11011011 B1 + B18 1j−1jj−1j1 D60 00111100 01100101 B6 + B21 00000011 B15 + B19 −1−j−j−1−1−jj1 D61 00111101 11110101 B0 + B21 01100011 B6 + B19 −j11−j−1−jj1 D62 00111110 10010101 B9 + B21 11110011 B0 + B19 1jj1−1−jj1 D63 00111111 00000101 B15 + B21 10010011 B9 + B19 j−1−1j−1−jj1 IX CCK Decoder
A fast correlator transform (FCT) kernel in accordance with the invention, can be used as a building block for a CCK decoder. For example, a FCT kernel can be applied and used to decode data using the IEEE 802.11b 11 Mbps signaling scheme. For the design, two correlators are preferably used. Since the signaling scheme is complex one correlator is used for the in-phase (I) channel, and another correlator is used for the quadrature phase (Q) channel. The input to each channel is the designated codeword for the transmitted data. Table 3 illustrates example input data and corresponding coded output.
00011101 (B13+B20)
(B2+B20)
11101101 (B2+B20)
00100001 (B14+B23)
The codewords for the two data symbols given in Table 4 are similar, but are on different channels. So if there is a π/2 or a 3π/2 phase shift from differentially encoding the transmitted data, then the I and Q channels will be swapped. This is illustrated in FIG. 9, which is a signal path diagram for an example CCK decoder output trellis, including an I signal path 902 and a Q signal path 904.
Table 6 lists 64 complex codewords that have coefficients with four possible values of +1, −1, +j, and −j. This means that either the real part or imaginary part of each coefficient is 0, but not both. Table 6 also lists corresponding codewords rotated by 45� to get the I, Q representation. Note that each coefficient in the I, Q representation has a magnitude of √{square root over (2)} since the four possible coefficients are now +1+j, +1−j, −1+j, and −1−j. Rotation of the coefficients is the key to simplification of the FCT.
A Fast Correlator Transform (FCT) can be used to reduce the computation by assuming the use of 45� rotated I, Q codewords shown in Table 6, below. To derive the 64 parallel correlates for all of the codewords, two substantially similar FCTs are preferred. One is for the real part of the input. The other is for the imaginary part of the input. FIG. 12 is a block diagram of an example FCT 1200. For a CCK with codeword size of 64 the FCT 1200 can be divided into several stages. For example, FIG. 13 illustrates a FCT 1300 that includes stages 1 a (1302), 1 b (1304), 2 a (1306), 2 b (1308), and 3 (1310), which are described below.
D 8 =x 4 +x 5 , D 9 =−x 4 +x 5 , D 10 =x 4 −x 5 , D 11 =−x 4 −x 5 D 12 =x 6 +x 7 , D 13 =−x 6 +x 7 , D 14 =x 6 −x 7 , D 5 =−x 6 −x 7.
B 0 =D 0 +D 4 , B 1 =D 0 +D 5 , B 2 =D 0 +D 6 , B 3 =D 0 +D 7 B 4 =D 1 +D 4 , B 5 =D 1 +D 5 , B 6 =D 1 +D 6 , B 7 =D 1 +D 7 B 8 =D 2 +D 4 , B 9 =D 2 +D 5 , B 10 =D 2 +D 6 , B 11 =D 2 +D 7 B 12 =D 3 +D 4 , B 13 =D 3 +D 5 , B 14 =D 3 +D 6 , B 15 =D 3 +D 7.
Stage 3 of the FCT 1300 includes 64 additions for the I values and 64 additions for the Q values, as follows:
I 0 =B 2 +B 20 , I 1 =B 13 +B 20 , I 2 =B 13 +B 20 , I 3 =B 2 +B 20 Q 0 =B 2 +B 20 , Q 1 =B 2 +B 20 , Q 2 =B 13 +B 20 , Q 3 =B 13 +B 20 I 4 =B 14 +B 23 , I 5 =B 13 +B 23 , I 6 =B 1 +B 23 , I 7 =B 2 +B 23 I 4 =B 14 +B 23 , I 5 =B 13 +B 23 , I 6 =B 1 +B 23 , I 7 =B 2 +B 23 Q 4 =B 2 +B 20 , Q 5 =B 14 +B 20 , Q 6 =B 13 +B 20 , Q 7 =B 1 +B 20 I 8 =B 14 +B 23 , I 9 =B 1 +B 23 , I 10 =B 1 +B 23 , I 11 =B 14 +B 23 Q 8 =B 14 +B 23 , Q 9 =B 14 +B 23 , Q 10 =B 1 +B 23 , Q 11 =B 1 +B 23 I 12 =B 2 +B 20 , I 13 =B 1 +B 20 , I 14 =B 13 +B 20 , I 15 =B 14 +B 20 Q 12 =B 14 +B 23 , Q 13 =B 2 +B 23 , Q 14 =B 1 +B 23 , Q 15 =B 13 +B 23 I 16 =B 7 +B 17 , I 17 =B 13 +B 17 , I 18 =B 8 +B 17 , I 19 =B 2 +B 17 Q 16 =B 2 +B 20 , Q 17 =B 7 +B 20 , Q 18 =B 13 +B 20 , Q 19 =B 8 +B 20 I 20 =B 15 +B 19 , I 21 =B 9 +B 19 , I 22 =B 0 +B 19 , I 23 =B 6 +B 19 Q 20 =B 6 +B 21 , Q 21 =B 15 +B 21 , Q 22 =B 9 +B 21 , Q 23 =B 0 +B 21 I 24 =B 11 +B 18 , I 25 =B 1 +B 18 , I 26 =B 4 +B 18 , I 27 =B 14 +B 18 Q 24 =B 14 +B 23 , Q 25 =B 11 +B 23 , Q 26 =B 1 +B 23 , Q 27 =B 4 +B 23 I 28 =B 3 +B 16 , I 29 =B 5 +B 16 , I 30 =B 12 +B 16 , I 31 =B 10 +B 16 Q 28 =B 10 +B 22 , Q 29 =B 3 +B 22 , Q 30 =B 5 +B 22 , Q 31 =B 12 +B 22 I 32 =B 7 +B 17 , I 33 =B 8 +B 17 , I 34 =B 8 +B 17 , I 35 =B 7 +B 17 Q 32 =B 7 +B 17 , Q 33 =B 7 +B 17 , Q 34 =B 8 +B 17 , Q 35 =B 8 +B 17 I 36 =B 11 +B 18 , I 37 =B 8 +B 18 , I 38 =B 4 +B 18 , I 39 =B 7 +B 18 Q 36 =B 7 +B 17 , Q 37 =B 11 +B 17 , Q 38 =B 8 +B 17 , Q 39 =B 4 +B 17 I 40 =B 11 +B 18 , I 41 =B 4 +B 18 , I 42 =B 4 +B 18 , I 43 =B 11 +B 18 Q 40 =B 11 +B 18 , Q 41 =B 11 +B 18 , Q 42 =B 4 +B 18 , Q 43 =B 4 +B 18 I 44 =B 7 +B 17 , I 45 =B 4 +B 17 , I 46 =B 11 +B 17 , I 47 =B 11 +B 17 Q 44 =B 11 +B 18 , Q 45 =B 7 +B 18 , Q 46 =B 4 +B 18 , Q 47 =B 8 +B 18 I 48 =B 2 +B 20 , I 49 =B 8 +B 20 , I 50 =B 13 +B 20 , I 51 =B 7 +B 20 Q 48 =B 7 +B 17 , Q 49 =B 2 +B 17 , Q 50 =B 2 +B 17 , Q 51 =B 13 +B 17 I 52 =B 10 +B 22 , I 53 =B 12 +B 22 , I 54 =B 5 +B 22 , I 55 =B 3 +B 22 Q 52 =B 3 +B 16 , Q 53 =B 10 +B 16 , Q 54 =B 12 +B 16 , Q 55 =B 5 +B 16 I 56 =B 14 +B 23 , I 57 =B 4 +B 23 , I 58 =B 1 +B 22 , I 59 =B 11 +B 23 Q 56 =B 11 +B 18 , Q 57 =B 14 +B 18 , Q 58 =B 4 +B 18 , Q 59 =B 1 +B 18 I 60 =B 6 +B 21 , I 61 =B 0 +B 21 , I 62 =B 9 +B 21 , I 63 =B 15 +B 21 Q 60 =B 15 +B 19 , Q 61 =B 6 +B 19 , Q 62 =B 0 +B 19 , Q 63 =B 9 +B 19 Stage 3 can be optimized by noting that there are 40 distinct values for I and Q which are
A 0 =B 2 +B 20 , A 1 =B 13 +B 20 , A 2 =B 14 +B 23 , A 3 =B 13 +B 23 A 4 =B 14 +B 20 , A 5 =B 1 +B 23 , A 6 =B 2 +B 23 , A 7 =B 1 +B 20 A 8 =B 7 +B 17 , A 9 =B 13 +B 17 , A 10 =B 7 +B 20 , A 11 =B 8 +B 17 A 12 =B 2 +B 17 , A 13 =B 8 +B 20 , A 14 =B 15 +B 19 , A 15 =B 6 +B 21 A 16 =B 9 +B 19 , A 17 =B 15 +B 19 , A 18 =B 0 +B 19 , A 19 =B 9 +B 21 A 20 =B 6 +B 19 , A 21 =B 0 +B 21 , A 22 =B 11 +B 18 , A 23 =B 1 +B 18 A 24 =B 11 +B 23 , A 25 =B 4 +B 18 , A 26 =B 14 +B 18 , A 27 =B 4 +B 23 A 28 =B 3 +B 16 , A 29 =B 10 +B 22 , A 30 =B 5 +B 16 , A 31 =B 3 +B 22 A 32 =B 12 +B 16 , A 33 =B 5 +B 22 , A 34 =B 10 +B 16 , A 35 =B 12 +B 22 A 36 =B 8 +B 18 , A 37 =B 11 +B 17 , A 38 =B 7 +B 18 , A 39 =B 4 +B 17.
B n =−B 15-n, 8≦n≦15 (Eq. 14)
B 24 = D 8 + D 14 , B 25 = D 9 + D 14 , B 26 = D 10 + D 14 , B 27 = D 11 + D 14 B 28 = D 8 + D 15 , B 29 = D 9 + D 15 , B 30 = D 10 + D 15 , B 31 = D 11 + D 15 and, consequently, the following two additions:
D 14 =x 6 −x 7 , D 15 =−x 6 −x 7,
D 0 =x 0 +x 1 , D 1 =−x 0 +x 1 D 4 =x 2 +x 3 , D 5 =−x 2 +x 3 FIG. 21 is an example block diagram of the stage 1 b of the FCT 1900. In the example of FIG. 21, stage 1 b includes 4 additions or subtractions, which implement the following:
FIGS. 24A and 24B illustrate an example block diagram of stage 3 of the FCT 1900. In the example of FIGS. 24A and 24B, stage 3 includes 40 additions or subtractions, which implement the following:
Final outputs are calculated using 128 additions or subtractions.
The number of adders in the final stage can be reduced by almost half from 128 to 72 by sharing adders. The adders are shared between codewords that are complex conjugates pairs as listed in Table 5. There are a total of 36 complex conjugate pairs where 8 of the codewords are complex conjugates of themselves (real coefficients). Consider, as an example, the pair of codeword 1 and codeword 3, from Table 5, with the following output equations:
Y I1 =A I1 +A Q0 , Y Q1 =A Q1 −A I0 (Eq. 15)
Y I3 =A I0 +A Q1 , Y Q3 =A Q0 −A I1 (Eq. 16)
Stage #1=8 Stage #2=16 Stage #3=40+36=76 ---------------------------- TOTAL=100 TABLE 5
d=c 7 x 7 +c 6 x 6 +c 5 x 5 +c 4 x 4 +c 3 x 3 +c 2 x 2 +c 1 x 1 +c 0 x 0 (Eq. 16)
where c7, c6, c5, c4, c3, c2, c1, c0 are the complex coefficients and x7, x6, x5, x4, x3, x2, x1, x0 are the complex input buffer samples. The codewords can be uniquely defined by the three coefficients, c6, c5, c3, with the other coefficients defined by
c0=c6c5c3 c1=c5c3 c2=c6c3 c4=c6c5 c7=1
D 0 =x 0 +x 1 , D 1 =−x 0 +x 1, D2=x2, D3=x3 D 4 =x 4 +x 5 , D 5 =−x 4 +x 5, D6=x6, D7=x7 Stage 2 consists of 8 additions or subtractions.
Stage 4 consists of 40 additions or subtractions.
TABLE 6 Complex Index Bits Codeword I, Q Codeword I, Q Combo 0 000000 +1+1+1−1+1+1−1+1 +1+1+1−1+1+1−1+1 B2+B20 +1+1+1−1+1+1−1+1 B2+B20 1 000001 +j+j+j−j+1+1−1+1 −1−1−1+1+1+1−1+1 −B2+B20 +1+1+1−1+1+1−1+1 B2+B20 2 000010 −1−1−1+1+1+1−1+1 −1−1−1+1+1+1−1+1 −B2+B20 −1−1−1+1+1+1−1+1 −B2+B20 3 000011 −j−j−j+j+1+1−1+1 +1+1+1−1+1+1−1+1 B2+B20 −1−1−1+1+1+1−1+1 −B2+B20 4 000100 +j+j+1−1+j+j−1+1 −1−1+1−1−1−1−1+1 −B1+B23 +1+1+1−1+1+1−1+1 B2+B20 5 000101 −1−1+j−j+j+j−1+1 −1−1−1+1−1−1−1+1 −B2+B23 −1−1+1−1+1+1−1+1 −B1+B20 6 000110 −j−j−1+1+j+j−1+1 +1+1−1+1−1−1−1+1 B1+B23 −1−1−1+1+1+1−1+1 −B2+B20 7 000111 +1+1−j+j+j+j−1+1 +1+1+1−1−1−1−1+1 B2+B23 +1+1−1+1+1+1−1+1 B1+B20 8 001000 −1−1+1−1−1−1−1+1 −1−1+1−1−1−1−1+1 −B1+B23 −1−1+1−1−1−1−1+1 −B1+B23 9 001001 −j−j+j−j−1−1−1+1 +1+1−1+1−1−1−1+1 B1+B23 −1−1+1−1−1−1−1+1 −B1+B23 10 001010 +1+1−1+1−1−1−1+1 +1+1−1+1−1−1−1+1 B1+B23 +1+1−1+1−1−1−1+1 B1+B23 11 001011 +j+j−j+j−1−1−1+1 −1−1+1−1−1−1−1+1 −B1+B23 +1+1−1+1−1−1−1+1 B1+B23 12 001100 −j−j+1−1−j−j−1+1 +1+1+1−1+1+1−1+1 B2+B20 −1−1+1−1−1−1−1+1 −B1+B23 13 001101 +1+1+j−j−j−j−1+1 +1+1−1+1+1+1−1+1 B1+B20 +1+1+1−1−1−1−1+1 B2+B23 14 001110 +j+j−1+1−j−j−1+1 −1−1−1+1+1+1−1+1 −B2+B20 +1+1−1+1−1−1−1+1 B1+B23 15 001111 −1−1−j+j−j−j−1+1 −1−1+1−1+1+1−1+1 −B1+B20 −1−1−1+1−1−1−1+1 −B2+B23 16 010000 +j+1+j−1+j+1−j+1 −1+1−1−1−1+1+1+1 B7+B17 +1+1+1−1+1+1−1+1 B2+B20 17 010001 −1+j−1−j+j+1−j+1 −1−1−1+1−1+1+1+1 −B2+B17 −1+1−1−1+1+1−1+1 B7+B20 18 010010 −j−1−j+1+j+1−j+1 +1−1+1+1−1+1+1+1 −B7+B17 −1−1−1+1+1+1−1+1 −B2+B20 19 010011 +1−j+1+j+j+1−j+1 +1+1+1−1−1+1+1+1 B2+B17 +1−1+1+1+1+1−1+1 −B7+B20 20 010100 −1+j+j−1−1+j−j+1 −1−1−1−1−1−1+1+1 −B0+B19 −1+1+1−1−1+1−1+1 B6+B21 21 010101 −j−1−1−j−1+j−j+1 +1−1−1+1−1−1+1+1 −B6+B19 −1−1−1−1−1+1−1+1 −B0+B21 22 010110 +1−j−j+1−1+j−j+1 +1+1+1+1−1−1+1+1 B0+B19 +1−1−1+1−1+1−1+1 −B6+B21 23 010111 +j+1+1+j−1+j−j+1 −1+1+1−1−1−1+1+1 B6+B19 +1+1+1+1−1+1−1+1 B0+B21 24 011000 −j−1+j−1−j−1−j+1 +1−1−1−1+1−1+1+1 −B4+B18 −1−1+1−1−1−1−1+1 −B1+B23 25 011001 +1−j−1−j−j−1−j+1 +1+1−1+1+1−1+1+1 B1+B18 +1−1−1−1−1−1−1+1 −B4+B23 26 011010 +j+1−j+1−j−1−j+1 −1+1+1+1+1−1+1+1 B4+B18 +1+1−1+1−1−1−1+1 B1+B23 27 011011 −1+j+1+j−j−1−j+1 −1−1+1−1+1−1+1+1 −B1+B18 −1+1+1+1−1−1−1+1 B4+B23 28 011100 +1−j+j−1+1−j−j+1 +1+1−1−1+1+1+1+1 B3+B16 +1−1+1−1+1−1−1+1 −B5+B22 29 011101 +j+1−1−j+1−j−j+1 −1+1−1+1+1+1+1+1 B5+B16 +1+1−1−1+1−1−1+1 B3+B22 30 011110 −1+j−j+1+1−j−j+1 −1−1+1+1+1+1+1+1 −B3+B16 −1+1−1+1+1−1−1+1 B5+B22 31 011111 −j−1+1+j+1−j−j+1 +1−1+1−1+1+1+1+1 −B5+B16 −1−1+1+1+1−1−1+1 −B3+B22 32 100000 −1+1−1−1−1+1+1+1 −1+1−1−1−1+1+1+1 B7+B17 −1+1−1−1−1+1+1+1 B7+B17 33 100001 −j+j−j−j−1+1+1+1 +1−1+1+1−1+1+1+1 −B7+B17 −1+1−1−1−1+1+1+1 B7+B17 34 100010 +1−1+1+1−1+1+1+1 +1−1+1+1−1+1+1+1 −B7+B17 +1−1+1+1−1+1+1+1 −B7+B17 35 100011 +j−j+j+j−1+1+1+1 −1+1−1−1−1+1+1+1 B7+B17 +1−1+1+1−1+1+1+1 −B7+B17 36 100100 −j+j−1−1−j+j+1+1 +1−1−1−1+1−1+1+1 −B4+B18 −1+1−1−1−1+1+1+1 B7+B17 37 100101 +1−1−j−j−j+j+1+1 +1−1+1+1+1−1+1+1 −B7+B18 +1−1−1−1−1+1+1+1 −B4+B17 38 100110 +j−j+1+1−j+j+1+1 −1+1+1+1+1−1+1+1 B4+B18 +1−1+1+1−1+1+1+1 −B7+B17 39 100111 −1+1+j+j−j+j+1+1 −1+1−1−1+1−1+1+1 B7+B18 −1+1+1+1−1+1+1+1 B4+B17 40 101000 +1−1−1−1+1−1+1+1 +1−1−1−1+1−1+1+1 −B4+B18 +1−1−1−1+1−1+1+1 −B4+B18 41 101001 +j−j−j−j+1−1+1+1 −1+1+1+1+1−1+1+1 B4+B18 +1−1−1−1+1−1+1+1 −B4+B18 42 101010 −1+1+1+1+1−1+1+1 −1+1+1+1+1−1+1+1 B4+B18 −1+1+1+1+1−1+1+1 B4+B18 43 101011 −j+j+j+j+1−1+1+1 +1−1−1−1+1−1+1+1 −B4+B18 −1+1+1+1+1−1+1+1 B4+B18 44 101100 +j−j−1−1+j−j+1+1 −1+1−1−1−1+1+1+1 B7+B17 +1−1−1−1+1−1+1+1 −B4+B18 45 101101 −1+1−j−j+j−j+1+1 −1+1+1+1−1+1+1+1 B4+B17 −1+1−1−1+1−1+1+1 B7+B18 46 101110 −j+j+1+1+j−j+1+1 +1−1+1+1−1+1+1+1 −B7+B17 −1+1+1+1+1−1+1+1 B4+B18 47 101111 +1−1+j+j+j−j+1+1 +1−1−1−1−1+1+1+1 −B4+B17 +1−1+1+1+1−1+1+1 −B7+B18 48 110000 −j+1−j−1−j+1+j+1 +1+1+1−1+1+1−1+1 B2+B20 −1+1−1−1−1+1+1+1 B7+B17 49 110001 +1+j+1−j−j+1+j+1 +1−1+1+1+1+1−1+1 −B7+B20 +1+1+1−1−1+1+1+1 B2+B17 50 110010 +j−1+j+1−j+1+j+1 −1−1−1+1+1+1−1+1 −B2+B20 +1−1+1+1−1+1+1+1 −B7+B17 51 110011 −1−j−1+j−j+1+j+1 −1+1−1−1+1+1−1+1 B7+B20 −1−1−1+1−1+1+1+1 −B2+B17 52 110100 +1+j−j−1+1+j+j+1 +1−1+1−1+1−1−1+1 −B5+B22 +1+1−1−1+1+1+1+1 B3+B16 53 110101 +j−1+1−j+1+j+j+1 −1−1+1+1+1−1−1+1 −B3+B22 +1−1+1−1+1+1+1+1 −B5+B16 54 110110 −1−j+j+1+1+j+j+1 −1+1−1+1+1−1−1+1 B5+B22 −1−1+1+1+1+1+1+1 −B3+B16 55 110111 −j+1−1+j+1+j+j+1 +1+1−1−1+1−1−1+1 B3+B22 −1+1−1+1+1+1+1+1 B5+B16 56 111000 +j−1−j−1+j−1+j+1 −1−1+1−1−1−1−1+1 −B1+B23 +1−1−1−1+1−1+1+1 −B4+B18 57 111001 −1−j+1−j+j−1+j+1 −1+1+1+1−1−1−1+1 B4+B23 −1−1+1−1+1−1+1+1 −B1+B18 58 111010 −j+1+j+1+j−1+j+1 +1+1−1+1−1−1−1+1 B1+B23 −1+1+1+1+1−1+1+1 B4+B18 59 111011 +1+j−1+j+j−1+j+1 +1−1−1−1−1−1−1+1 −B4+B23 +1+1−1+1+1−1+1+1 B1+B18 60 111100 −1−j−j−1−1−j+j+1 −1+1+1−1−1+1−1+1 B6+B21 −1−1−1−1−1−1+1+1 −B0+B19 61 111101 −j+1+1−j−1−j+j+1 +1+1+1+1−1+1−1+1 B0+B21 −1+1+1−1−1−1+1+1 B6+B19 62 111110 +1+j+j+1−1−j+j+1 +1−1−1+1−1+1−1+1 −B6+B21 +1+1+1+1−1−1+1+1 B0+B19 63 111111 +j−1−1+j−1−j+j+1 −1−1−1−1−1+1−1+1 −B0+B21 +1−1−1+1−1−1+1+1 −B6+B19 XI. Conclusion
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SC-14, No. 6, pp. 1020-1033 (Dec. 1979).Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8571135Dec 12, 2011Oct 29, 2013Parkervision, Inc.Method, system and apparatus for balanced frequency up-conversion of a baseband signalClassifications U.S. Classification708/425International ClassificationG06F17/15, G06F17/14Cooperative ClassificationG06F17/147, G06F17/141, G06F17/15European ClassificationG06F17/14M, G06F17/15, G06F17/14FLegal EventsDateCodeEventDescriptionJan 24, 2008ASAssignmentOwner name: PARKERVISION, INC., FLORIDAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:RAWLINS, GREGORY S.;KASSEL, RAY;REEL/FRAME:020475/0197;SIGNING DATES FROM 20040326 TO 20040702Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:RAWLINS, GREGORY S.;KASSEL, RAY;SIGNING DATES FROM 20040326 TO 20040702;REEL/FRAME:020475/0197RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services