Source: http://www.patentgenius.com/patent/8592855.html
Timestamp: 2018-05-27 14:03:47
Document Index: 587569503

Matched Legal Cases: ['art 25', 'art 25', 'art 25', 'art 25', 'art 25', 'art 29', 'art 25', 'art 25', 'art 29', 'art 25', 'art 29', 'art 25', 'art 29', 'art 25', 'art 25', 'art 25', 'art 25', 'art 29', 'art 25', 'art 25', 'art 25', 'art 25', 'art 25', 'art 25', 'art 25', 'art 25', 'art 25', 'art 31', 'art 32', 'art 32', 'art 31', 'art 25', 'art 32', 'art 31', 'art 32', 'art 31', 'art 31', 'art 32', 'art 25', 'art 32', 'art 32', 'art 25', 'art 32', 'art 45', 'art 49', 'art 45', 'art 51', 'art 52', 'art 52', 'art 51', 'art 45', 'art 52', 'art 51', 'art 52', 'art 51', 'art 31', 'art 32', 'art 45', 'art 32', 'art 52', 'art 45', 'art 52']

Light emitting device package including a substrate having at least two recessed surfaces - Patent # 8592855 - PatentGenius
8592855 Light emitting device package including a substrate having at least two recessed surfaces
U.S. Class: 257/99; 257/433; 257/434; 257/E33.056; 257/E33.057; 257/E33.058; 257/E33.059
Field Of Search: ;257/99; ;257/433; ;257/434; ;257/E33.056; ;257/E33.057; ;257/E33.058; ;257/E33.059
International Class: H01L 29/22; H01L 31/0203; H01L 33/00
Foreign Patent Documents: 1691360; 101101944; 8-274378; 2001-257410; 2003-318448; 2004-71726; 2004-111937; 2004-207542; 2004-228240; 2004-253711; 2004-281994; 2004-327503; 2004-327504; 2006-114854; 2006-185967; 2007-207895; 2007-231253; 2007-234846; 2007-262375; 2007-273592; 2007-273754; 2007-305703; 2008-34550; 2008-041968; 2008-53707; 2008-72092; 2002-0037623; 10-2006-0004504; 100600411; 2007-0095665; 10-2008-0004931; 2006/046655
Other References: Chinese Office Action dated Apr. 26, 2012. cited by applicant.
International Search Report dated Nov. 13, 2009. cited by applicant.
English Abstract and Translation of JP2007-231253A, Sep. 13, 2007. cited by applicant.
English Abstract and Translation of JP2007-234846, Sep. 13, 2007. cited by applicant.
English Abstract and Translation of JP2008-041968A, Feb. 21, 2008. cited by applicant.
English Abstract and Translation of KR10-0600411A, Jul. 5, 2006. cited by applicant.
English Abstract and Translation of KR2002-0037623, May 22, 2002. cited by applicant.
English Abstract and Translation of KR2007-0095665, Oct. 1, 2007. cited by applicant.
Full machine-generated English translation for JP-2003-318448-A. cited by applicant.
Full machine-generated English translation for JP-2004-111937-A. cited by applicant.
Full machine-generated English translation for JP-2007-305703-A. cited by applicant.
English Translation of 2001257410A. cited by applicant.
English Translation of 2004207542A. cited by applicant.
English Translation of 2004228240A. cited by applicant.
English Translation of 2004253711A. cited by applicant.
English Translation of 2004281994A. cited by applicant.
English Translation of 2004327503A. cited by applicant.
English Translation of 2004327504A. cited by applicant.
English Translation of 2006185967A. cited by applicant.
English Translation of 2007207895A. cited by applicant.
English Translation of 2007262375A. cited by applicant.
English Translation of 2007273592A. cited by applicant.
English Translation of 2007273754A. cited by applicant.
English Translation of 2008034550A. cited by applicant.
English Translation of 2008053702A. cited by applicant.
English Translation of 8-274378A. cited by applicant.
Abstract: Disclosed is a light emitting device package. The light emitting device package includes a substrate comprising a recess, a light emitting chip on the substrate and a first conductive layer electrically connected to the light emitting chip. And the first conductive layer includes at least one metal layer electrically connected to the light emitting chip on an outer circumference of the substrate.
1. A light emitting device package comprising: a substrate; a light emitting chip on the substrate; a first conductive type metal electrically connected to the lightemitting chip; and a second conductive type metal electrically connected to the light emitting chip, wherein the substrate comprises a first cavity having a first depth recessed from an upper surface of the substrate and a second cavity having a seconddepth recessed from the first cavity, wherein the light emitting chip is disposed on the second cavity, wherein the first depth of the first cavity is greater than the second depth of the second cavity, wherein a top surface of the light emitting chip islower than a bottom surface of the first cavity, wherein the substrate comprises a first via hole and a second via hole passing through a part of the substrate, and wherein the first conductive type metal comprises a first part disposed on the firstcavity, and a second part disposed on a bottom surface of the substrate.
2. The light emitting device package of claim 1, wherein the first conductive type metal comprises a third part disposed on an outer surface of the substrate.
3. The light emitting device package of claim 2, wherein the second conducive type metal comprises a fourth part disposed on the first cavity, and a fifth part disposed on the bottom surface of the substrate.
4. The light emitting device package of claim 3, wherein the second conductive type metal comprises a sixth part disposed on the outer surface of the substrate.
5. The light emitting device package of claim 4, wherein the first part is electrically connected to the third part through the first via hole.
6. The light emitting device package of clam 5, wherein the fourth part is electrically connected to the sixth part through the second via hole.
7. The light emitting device package of claim 6, wherein the first part comprises an uneven shape.
8. The light emitting device package of claim 6, wherein the fourth part comprises an uneven shape.
9. The light emitting device package of claim 6, further comprising a zener diode disposed on the substrate.
10. The light emitting device package of claim 6, wherein the outer surface of the substrate comprises a first recess portion on a first side surface of the substrate.
11. The light emitting device package of claim 10, wherein the third part is disposed on the first recess portion.
12. A light emitting device package comprising: a substrate comprising a first cavity having a first depth recessed from an upper surface of the substrate and a second cavity having a second depth recessed from the first cavity, a first recessportion on a first side surface of the substrate and a second recess portion on a second side surface of the substrate; a light emitting chip on the second cavity of the substrate; a first conductive type metal electrically connected to the lightemitting chip; and a second conductive type metal electrically connected to the light emitting chip, wherein the first conductive type metal comprises a first part disposed on the first cavity of the substrate and a second part disposed on a bottomsurface of the substrate and a third part disposed on the first recess portion on the first side surface of the substrate, wherein the second conductive type metal comprises a fourth part disposed on the first cavity of the substrate and a fifth partdisposed on the bottom surface of the substrate and a sixth part disposed on the second recess portion on the second side surface of the substrate, and wherein the first depth of the first cavity is greater than the second depth of the second cavity.
13. The light emitting device package of claim 12, further comprising a phosphor on the light emitting chip.
14. The light emitting device package of claim 12, further comprising a zenor diode integrated onto the substrate and improving a withstanding voltage of the light emitting chip.
15. The light emitting device package of claim 12, wherein the second cavity of the substrate comprises an uneven shape.
16. The light emitting device package of claim 12, wherein a width of the first cavity is wider than a width of the second cavity.
17. The light emitting device package of claim 12, wherein the substrate further comprises a third surface between a bottom surface of the first cavity and a bottom surface of the second cavity, and wherein the third surface is not vertical tothe bottom surface of the first cavity.
18. The light emitting device package of claim 12, wherein each of the first cavity and the second cavity comprises a substantially flat surface.
19. The light emitting device package of claim 12, further comprising a first protrusion portion of the first side surface of the substrate and a second protrusion portion of the second side surface of the substrate.
20. The light emitting device package of claim 19, wherein the first protrusion portion of the first side surface of the substrate comprises a first surface of the first protrusion portion and a second surface of the first protrusion portion.
A light emitting device (LED) is a semiconductor device to convert a current into a light. Since a red LED has been commercialized, the red LED, together with a green LED, is used as a light source of electronic devices including informationcommunication equipment.
The light emitting device package includes a light emitting part and a phosphor. In this case, the light emitting part emits light having a first wavelength and the phosphor emits light having a second wavelength, so that the light emittingdevice package emitting white light can be realized. However, since the light emitted from the phosphor is absorbed into the light emitting part, light efficiency may be reduced. In addition, color deviation may occur due to the difference of opticalpaths of the light emitted from the light emitting part and transmitted to the phosphor.
According to the embodiments, a light emitting device package includes a semiconductor substrate comprising a first surface at a first depth from an upper surface of the semiconductor substrate and a second surface at a second depth from thefirst surface; and a light emitting part on the second surface of the semiconductor substrate.
According to the embodiments, a light emitting device package includes a semiconductor substrate comprising a groove having a multi-layer structure; a light emitting part in the groove of the semiconductor substrate; a first conductive layerelectrically connected to a first electrode of the light emitting part; and a second conductive layer electrically connected to a second electrode of the light emitting part.
According to the embodiments, a light emitting device package includes a substrate comprising a recess; a light emitting chip on the substrate; and a first conductive layer electrically connected to the light emitting chip, wherein the firstconductive layer comprises at least one metal layer electrically connected to the light emitting chip on an outer circumference of the substrate.
In the description of the embodiments, it will be understood that, when a layer (or film), a region, a pattern, or a structure is referred to as being "on/over" or "below/under" another substrate, another layer (or film), another region, anotherpad, or another pattern, it can be "directly" or "indirectly" "on/over" or "below/under" the other substrate, layer (or film), region, pad, or pattern, or one or more intervening layers may also be present. Such a position of the layer has beendescribed with reference to the drawings.
Next, as shown in FIG. 2, in order to etch the semiconductor substrate 11, a first pattern mask 13a and a second pattern mask 15a are formed. The first and second pattern masks 13a and 15a can be formed through a photolithography process.
The semiconductor substrate 11 can include single crystalline silicon, but the embodiment is not limited thereto. The semiconductor substrate 11 can be etched through a dry etching process or a wet etching process. When the semiconductorsubstrate 11 includes a silicon substrate, the first and second masks 13 and 15 can include a silicon nitride layer, but the embodiment is not limited. In addition, the semiconductor substrate 11 can be subject to a KOH wet etching process, but theembodiment is not limited thereto.
Thereafter, as shown in FIG. 3, the etching process is performed to form a first semiconductor substrate 11a having a first surface (or first groove) formed at a first depth from an upper surface thereof. In other words, the etch shape of thefirst semiconductor substrate 11a can be adjusted according to the alignment of the first and second pattern masks 13a and 15a. Accordingly, the first semiconductor substrate 11a can have the shape of a bathtub with the first surface formed at the firstdepth from the upper surface of the first semiconductor substrate 11a, but the embodiment is not limited thereto.
Subsequently, as shown in FIG. 4, the first and second pattern masks 13a and 15a can be removed from the first semiconductor substrate 11a. For example, the first and second pattern masks 13a and 15a can be removed through the wet etchingprocess, but the embodiment is not limited thereto.
Thereafter, as shown in FIG. 5, a third mask 17 is formed on the first semiconductor substrate 11a. The third mask 17 can include a silicon nitride layer or a silicon oxide layer, but the embodiment is not limited thereto.
Then, as shown in FIG. 6, in order to etch the first semiconductor substrate 11a, third and fourth pattern masks 17a and 17b are formed on upper and lower surfaces of the first semiconductor substrate 11a. The third and fourth pattern masks 17aand 17b can be formed in a desired shape through a photolithography process, but the embodiment is not limited thereto.
Next, as shown in FIG. 7, an etching process is performed to form a second semiconductor substrate 11b having a second surface (or a second groove) formed in the first surface at a second depth. The etch shape of the second semiconductorsubstrate 11b can be adjusted according to the alignment of the third and fourth pattern masks 17a and 17b. The etching process for the second semiconductor substrate 11b can be performed along to a crystal plane (e.g., (100) or (111)) of a singlecrystalline substrate.
Thereafter, as shown in FIG. 8, the third and fourth pattern masks 17a and 17b can be removed.
According to the first embodiment, as shown in FIG. 8, the second semiconductor substrate 11b can have a bathtub shape, in which a first surface A having a first depth h1 on the basis of the upper surface of the semiconductor substrate 11b isformed in a first region and a second surface B having a second depth h2 is formed in a second region of the first surface A.
Thereafter, as shown in FIG. 9, an insulating layer 19 can be formed on the second semiconductor substrate 11b. The insulating layer 19 is formed for the electric insulation from a conductive layer formed in the subsequent process. Theinsulating layer 19 can include a silicon oxide layer, a silicon nitride layer, an aluminum nitride (AlN) layer, or a silicon carbide (SiC) layer, but the embodiment is not limited thereto.
Next, as shown in FIG. 10, the conductive layer can be formed on the insulating layer 19. The conductive layer can be electrically connected to a light emitting part that is formed in the subsequent process. First and second metal layers 21aand 21b can be formed on the insulating layer 19, and third and fourth metal layers 23a and 23b can be formed below the insulating layer 19.
Thereafter, as shown in FIG. 11, a light emitting part 25 can be formed on the second semiconductor substrate 11b. The light emitting part 25 can be realized in the form of a light emitting diode, but the embodiment is not limited thereto. Thefirst metal layer 21a and/or the third metal layer 23a serving as a first conductive layer can be connected to a first electrode (not shown) of the light emitting part 25, and the second metal layer 21b and/or the fourth metal layer 23b serving as asecond conductive layer can be connected to a second electrode (not shown) of the light emitting part 25.
The first metal layer 21a and the second metal layer 21b formed on the upper surface of the second semiconductor substrate 11b can include a metal thin film having high reflectance, so that the light efficiency of the light emitting devicepackage can be improved. In addition, the third metal layer 23a and the fourth metal layer 23b formed on the lower surface of the second semiconductor substrate 11b can include metal having superior adhesive strength with an adhesive such as a creamsolder or the like. This can improve electric/mechanical connection with metal interconnections formed on a printed circuit board in the subsequent surface-mount technology (SMT) process.
The first and second metal layers 21a and 21b can include a plurality of metal layers, and the upper most layer thereof can include aluminum (Al), silver (Ag), or APC (Ag, Pd, Cu) metal. In addition, the third and fourth metal layers 23a and23b can include a plurality of metal layers, and the lower most layer thereof can include gold (Au), or copper (Cu).
A phosphor 27 can be formed on the light emitting part 25, and a molding part 29 can be formed on the phosphor 27. The phosphor 27 can receive light having a first wavelength band from the light emitting part 25 and can supply light having asecond wavelength band. The second wavelength band can be longer than the first wavelength band. White light can be emitted based on the light having the second wavelength band from the phosphor 27 and the light having the first wavelength band fromthe light emitting part 25. The molding part 29 can protect the phosphor 27 and the light emitting part 25. The molding part 29 can include silicon, but the embodiment is not limited thereto.
According to the embodiment, as shown in FIG. 11, the light emitting device package can include the second semiconductor substrate 11b, the light emitting part 25, the first metal layer 21a, the second metal layer 21b, the third metal layer 23a,the fourth metal layer 23b, the phosphor 27, the insulating layer 19, and the molding part 29.
The second semiconductor substrate 11b can be formed in the shape of a two-stage bathtub having the first surface formed at the first depth h1 from the upper surface of the second semiconductor substrate 11b and the second surface formed at thesecond depth h2 from the first surface. The light emitting part 25 can be formed on the second surface of the second semiconductor substrate 11b.
The first conductive layer including the first metal layer 21a and the third metal layer 23a can be connected to the first electrode of the light emitting part 25, and the second conductive layer including the second metal layer 21b and thefourth metal layer 23b can be connected to the second electrode of the light emitting part 25.
The first conductive layer can include the first metal layer 21a provided on the second semiconductor substrate 11b and the third metal layer 23a provided below the semiconductor substrate 11b. The first metal layer 21a and the third metallayer 23a can be electrically connected to each other at an outer peripheral surface of the second semiconductor substrate 11b.
The second conductive layer can include the second metal layer 21b provided on the second semiconductor substrate 11b and the fourth metal layer 23b provided below the semiconductor substrate 11b. The second metal layer 21b and the fourth metallayer 23b can be electrically connected to each other at the outer peripheral surface of the second semiconductor substrate 11b.
The phosphor 27 can be formed on the light emitting part 25, and the molding part 29 can be formed on the phosphor 27. The insulating layer 19 can be interposed between the semiconductor substrate 11b and the first conductive layer. Inaddition, the insulating layer 19 can be interposed between the second semiconductor substrate 11b and the second conductive layer.
According to the embodiment, a zener diode (not shown) can be formed on the second semiconductor substrate 11b. The zener diode can be integrated onto the semiconductor substrate 11b by forming a diode pattern and performing a diffusion processor an ion implantation process for the resultant structure after the insulating layer 19 has been formed, but the embodiment is not limited thereto. As the zener diode is formed, the withstanding voltage of the light emitting device package according tothe embodiment can be improved. In addition, according to the embodiment, electronic elements such as a resistor or a capacitor can be integrated into the light emitting device package.
In the light emitting device package according to the embodiment, a mounting region for the light emitting part 25 is formed in the shape of the two-stage bathtub, so that the light emitting part 25 is mounted on the second surface, which isformed at the bottom of the two-stage bathtub, and the first and second metal layers 21a and 21b having high reflectance can be formed on the first surface. Accordingly, light, which is emitted from the light emitting part 25 but cannot be transmittedthrough a light exit surface (an outer portion of the light emitting device package), is reflected toward the first surface, and light reflected from the first surface is emitted out of the light emitting device package without being incident onto thelight emitting part 25, thereby improving light efficiency.
In addition, the distance between a reflective surface, such as a (111) surface formed between the first surface and the second surface, and the light emitting part 25, and the height of the phosphor 27 provided at the upper portion of the lightemitting part 25 can be reduced. Accordingly, the light emitted from the light emitting part 25 can be transmitted through the phosphor 27 without causing difference in optical path in all directions around the light emitting part 25, so that colordeviation caused by orientation angles of the light can be reduced, thereby supplying high-quality light.
The light emitting device package according to the second embodiment includes the second semiconductor substrate 11b, the light emitting part 25, the first metal layer 21a, the second metal layer 21b, the third metal layer 23a, the fourth metallayer 23b, a first molding part 31, a second molding part 32, and the insulating layer 19.
Different from the first embodiment, according to the second embodiment, a phosphor is provided in the second molding part 32. For example, the first molding part 31 can be formed on the light emitting part 25, and the second molding part 32can be formed on the first molding part 31. The second molding part 32 can include a second phosphor. The first molding part 31 can be filled with transparent silicon gel. In addition, the first molding part 31 can include a first phosphor.
According to the second embodiment, since the second molding part 32 can include a phosphor, thereby realizing a remove phosphor structure in which the light emitting part 25 is spaced apart from the second molding part 32 including a phosphorto improve light efficiency.
When compared to the first embodiment, the third embodiment employs a third semiconductor substrate 11c having a first surface in a concave-convex shape. For example, when a second surface of the third semiconductor substrate 11c is formed, thesecond surface having the second depth is formed in a second region of the first surface, and a third surface having a concave-convex shape is formed in a third region of the first surface, thereby forming the third semiconductor substrate 11c having aconcave-convex shape as shown in FIG. 13. The concave-convex shape can include a V-shape groove, but the embodiment is not limited thereto.
According to the third embodiment, the V-shape groove is formed on the first surface, so that light, which does not escape from the light emitting device package but is reflected toward the first surface, is reflected from a concave-convexsurface with a changed reflection angle to increase the probability in which the light is emitted from the light emitting device package. Therefore, light efficiency can be more improved.
Different from the second embodiment, the first surface of the semiconductor substrate 11c can have a concave-convex pattern according to the fourth embodiment.
For example, when the second surface of the semiconductor substrate 11c is formed, the second surface having the second depth is formed in the second region of the first surface, and a third surface having a concave-convex shape is formed in thethird region of the first surface, thereby forming the semiconductor substrate 11c having a concave-convex pattern as shown in FIG. 14.
According to the fourth embodiment, the V-shape groove is formed on the first surface, so that light, which does not escape from the light emitting device package but is reflected toward the first surface, is reflected from a concave-convexsurface with a changed reflection angle to increase the probability in which the light is emitted from the light emitting device package. Therefore, light efficiency can be more improved.
According to the fourth embodiment, the second molding part 32 includes a phosphor, thereby realizing a remove phosphor structure in which the light emitting part 25 is spaced apart from the second molding part 32 including the phosphor, so thatlight efficiency can be improved.
According to the fifth embodiment, the light emitting device package includes a semiconductor substrate 40, a light emitting part 45, a first metal layer 41a, a second metal layer 41b, a third metal layer 43a, a fourth metal layer 43b, aphosphor 47, an insulating layer 39, and a molding part 49.
When comparing with the first embodiment, the fifth embodiment has difference in that first and second via holes 53a and 53b are formed in the semiconductor substrate 40.
For example, the first metal layer 41a can be electrically connected to the third metal layer 43a through the first via hole 53a formed in the second surface of the semiconductor substrate 40. In addition, the second metal layer 41b iselectrically connected to the fourth metal layer 43b through the second vial hole 53b formed in the second surface of the semiconductor substrate 40.
According to the fifth embodiment, when the second surface of the semiconductor substrate 40 is formed, the second surface having the second depth is formed in the second region of the first surface, and the first and second vial holes 53a and53b can be formed in the second surface through the semiconductor substrate 40.
A desirable etching mask pattern is formed on the upper and lower surfaces of the semiconductor substrate 40, and the etching process for the upper and lower surfaces of the semiconductor substrate 40 is performed, thereby realizing thesemiconductor substrate 40 including the first and second via holes 53a and 53b.
According to the embodiment, the first conductive layer is electrically connected to the second conductive layer through the first via hole 53a or the second via hole 53b, so that a small-scale light emitting device package can be formed.
The light emitting device package according to the sixth embodiment can include the semiconductor substrate 40, the light emitting part 45, the first metal layer 41a, the second metal layer 41b, the third metal layer 43a, the fourth metal layer43b, a first molding part 51, a second molding part 52, and the insulating layer 39.
When compared to the fifth embodiment, the sixth embodiment can employ the second molding part 52 having a phosphor. For example, the first molding part 51 can be formed on the light emitting part 45, and the second molding part 52 can beformed on the first molding part 51. The second molding part 52 can include the second phosphor. The first molding part 51 can be filled with transparent silicon gel, but the embodiment is not limited thereto. In addition, the first molding part 31can include the first phosphor.
According to the sixth embodiment, the second molding part 32 includes a phosphor, thereby realizing a remove phosphor structure in which the light emitting part 45 is spaced apart from the second molding part 32 including the phosphor, so thatlight efficiency can be improved.
According to the sixth embodiment, the first conductive layer can be electrically connected to the second conductive layer through the first via hole 53a or the second via hole 53b, so that a small-scale light emitting device package can beformed.
When the second surface of the semiconductor substrate 40 is formed, the second surface having the second depth can be formed in the second region of the first surface, and the third surface having a concave-convex shape can be formed in thethird region of the first surface, so that the semiconductor substrate 40 having a concave-convex shape can be formed.
According to the seventh embodiment, the V-shape groove can be formed in the first surface, so that light, which does not escape from the light emitting device package but is reflected toward the first surface, can be reflected from theconcave-convex surface with a changed reflection angle to increase the probability in which the light is emitted from the light emitting device package. Therefore, light efficiency can be more improved.
According to the eighth embodiment, the V-shape groove can be formed in the first surface, so that light, which does not escape from the light emitting device package but is reflected toward the first surface, can be reflected from theconcave-convex surface with a changed reflection angle to increase the probability in which the light is emitted from the light emitting device package. Therefore, light efficiency can be more improved.
According to the eighth embodiment, the second molding part 52 can include a phosphor, thereby realizing a remove phosphor structure in which the light emitting part 45 is spaced apart from the second molding part 52 including the phosphor, sothat light efficiency can be improved.
Method of and apparatus for all busy detection
Self-indexing spacer for air spring assembly
Waterproof top cover for a pet bed
Method of assembling a refrigerent compressor