Source: http://www.google.com/patents/US6831635?dq=6,563,928
Timestamp: 2013-12-20 15:38:56
Document Index: 535718109

Matched Legal Cases: ['art/9612', 'art4', 'art/9606', 'art4', 'art/9606', 'art7', 'art/9606', 'art5', 'art/9606', 'art6', 'art/9606', 'art8', 'art 2']

Patent US6831635 - Method and system for providing a unified API for both 2D and 3D graphics ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA method for controlling the algorithmic elements in 3D graphics systems via an improved 3D graphics API is provided. In one aspect, the invention unifies separately provided 2D and 3D graphics APIs into a single graphics interface, thereby eliminating redundancy of functionality and unnecessary data...http://www.google.com/patents/US6831635?utm_source=gb-gplus-sharePatent US6831635 - Method and system for providing a unified API for both 2D and 3D graphics objectsAdvanced Patent SearchPublication numberUS6831635 B2Publication typeGrantApplication numberUS 09/796,885Publication dateDec 14, 2004Filing dateMar 1, 2001Priority dateMar 1, 2001Fee statusPaidAlso published asUS20020178301Publication number09796885, 796885, US 6831635 B2, US 6831635B2, US-B2-6831635, US6831635 B2, US6831635B2InventorsCharles N. Boyd, Jeff M. J. Noyle, Michael A. ToelleOriginal AssigneeMicrosoft CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (24), Non-Patent Citations (68), Referenced by (16), Classifications (7), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetMethod and system for providing a unified API for both 2D and 3D graphics objectsUS 6831635 B2Abstract A method for controlling the algorithmic elements in 3D graphics systems via an improved 3D graphics API is provided. In one aspect, the invention unifies separately provided 2D and 3D graphics APIs into a single graphics interface, thereby eliminating redundancy of functionality and unnecessary data types. As a result, a single mapping to various graphics objects replaces redundant mappings. A single texture download that optimizes the use of different graphics hardware is provided. A single instruction for effecting a resolution change is also provided.
SUMMARY OF THE INVENTION In view of the foregoing, the present invention provides a method and system for controlling the algorithmic elements in 3D graphics systems via an improved 3D graphics API. In one aspect, the invention unifies separately provided 2D and 3D graphics APIs into a single graphics interface, thereby eliminating redundancy of functionality and unnecessary data types. As a result, a single mapping to various graphics objects replaces redundant mappings. A single texture download that optimizes the use of different graphics hardware is provided. A single instruction for effecting a resolution change is provided.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS Overview The present invention provides a new and improved API as a layer between application developers and the current state of the art of graphics hardware and the pipeline that renders and processes the graphics data. In recognition that current implementations of graphics API objects consist of two sets of processes that have evolved asynchronously and in parallel i.e., that 2D graphics APIs have evolved earlier and differently than 3D graphics APIs, a single unified set of graphics APIs is provided in accordance with the present invention for processing both 2D and 3D data objects. Due to the separate evolution of 2D and 3D APIs, there is overlapping or redundant functionality that exists from the perspective of the developer. For example, there are redundant mappings to various types of graphics systems objects. Similarly, there are currently too many ways to perform a texture download depending upon the hardware implicated. As a result, the developer is left with the task of optimizing a strategy for texture downloads. In accordance with the set of APIs of the present invention, a single way for performing a texture download is provided, wherein various ways of optimizing the hardware utilized in connection with the texture download are hidden from the developer. Additionally, while it previously required at least five instructions to effect a resolution change, the present invention enables a resolution change with a single instruction irrespective of whether the data being presented is a 2D data object or a 3D data object.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4805098May 5, 1986Feb 14, 1989Mips Computer Systems, Inc.Write bufferUS4953073Feb 6, 1986Aug 28, 1990Mips Computer Systems, Inc.Cup chip having tag comparator and address translation unit on chip and connected to off-chip cache and main memoriesUS4959779Nov 28, 1988Sep 25, 1990Mips Computer Systems, Inc.Dual byte order computer architecture a functional unit for handling data sets with differnt byte ordersUS5027270Oct 11, 1988Jun 25, 1991Mips Computer Systems, Inc.Processor controlled interface with instruction streamingUS5394524 *Nov 30, 1992Feb 28, 1995International Business Machines CorporationMethod and apparatus for processing two graphics data streams in parallelUS5398328Sep 27, 1993Mar 14, 1995Silicon Graphics, Inc.System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory ordersUS5590294May 24, 1995Dec 31, 1996Silicon Graphics, Inc.Method and apparatus for retarting pipeline processingUS5673377Sep 2, 1994Sep 30, 1997Ray Dream, Inc.Method and system for displaying a representation of a three-dimensional object with surface features that conform to the surface of the three-dimensional objectUS5801717Apr 25, 1996Sep 1, 1998Microsoft CorporationMethod and system in display device interface for managing surface memoryUS5812136Oct 30, 1996Sep 22, 1998Microsoft CorporationSystem and method for fast rendering of a three dimensional graphical objectUS5822570Oct 30, 1996Oct 13, 1998Microsoft CorporationSystem and method for parsing and executing a single instruction stream using a plurality of tightly coupled parsing and execution unitsUS5835096 *May 1, 1996Nov 10, 19983D LabsRendering system using 3D texture-processing hardware for accelerated 2D renderingUS5844569Apr 25, 1996Dec 1, 1998Microsoft CorporationDisplay device interface including support for generalized flipping of surfacesUS5850232Apr 25, 1996Dec 15, 1998Microsoft CorporationMethod and system for flipping images in a window using overlaysUS5864703Oct 9, 1997Jan 26, 1999Mips Technologies, Inc.Method for providing extended precision in SIMD vector arithmetic operationsUS5964843Apr 25, 1996Oct 12, 1999Microsoft CorporationSystem for enhancing device driversUS6008816Apr 25, 1996Dec 28, 1999Microsoft CorporationMethod and system for managing color specification using attachable palettes and palettes that refer to other palettesUS6044408 *Apr 25, 1996Mar 28, 2000Microsoft CorporationMultimedia device interface for retrieving and exploiting software and hardware capabilitiesUS6081270 *Jan 27, 1997Jun 27, 2000International Business Machines CorporationMethod and system for providing an improved view of an object in a three-dimensional environment on a computer displayUS6208347 *Jun 23, 1997Mar 27, 2001Real-Time Geometry CorporationSystem and method for computer modeling of 3D objects and 2D images by mesh constructions that incorporate non-spatial data such as color or textureUS6208361 *Jun 15, 1998Mar 27, 2001Silicon Graphics, Inc.Method and system for efficient context switching in a computer graphics systemUS6215495 *May 30, 1997Apr 10, 2001Silicon Graphics, Inc.Platform independent application program interface for interactive 3D scene managementUS6252600 *Oct 2, 1998Jun 26, 2001International Business Machines CorporationComputer graphics system with dual FIFO interfaceUS6289396 *Nov 21, 1995Sep 11, 2001Diamond Multimedia Systems, Inc.Dynamic programmable mode switching device driver architecture* Cited by examinerNon-Patent CitationsReference1Abrash, M., "Inside Xbox Graphics," Dr. Dobb's J., Aug., 2000, 21-22, 24-26.2Antinori, F. et al., "Experience with a 30 cm<2 >silicon pixel plane in CERN experiment WA97," Nucl. Instr. Meth. Phys. Res. A., 1995, 360, 91-97.3Antinori, F. et al., "Experience with a 30 cm2 silicon pixel plane in CERN experiment WA97," Nucl. Instr. Meth. Phys. Res. A., 1995, 360, 91-97.4Bachstein, W. et al., "Single-Chip erledigt Multimedia," Elektronik, 1996, 17, 58-62.5Bajaj, C. et al., "Making 3D Textures Practical," IEEE: Proceedings-Seventh Pacific Conference on Computer Graphics and Applications, Oct. 5-7, 1999, 259-269.6Bakalash, R. et al., "A Barrel Shift Microsystem for Parallel Processing," in MICRO 23 Microprogramming and Microarchitecture, IEEE: Proceedings of the 23<rd >Workshop and Symposium, Orlando Florida, Nov. 27-29, 1990, 223-229.7Bakalash, R. et al., "A Barrel Shift Microsystem for Parallel Processing," in MICRO 23 Microprogramming and Microarchitecture, IEEE: Proceedings of the 23rd Workshop and Symposium, Orlando Florida, Nov. 27-29, 1990, 223-229.8Bankston, J. et al., "Pipeline Processing with Modula-2," J. Pascal, Ada, & Modula-2, 1986, 5(5), 46-51.9Biernat, M.J. et al., "Approximate Shadow Generation," IEEE Montech Conferences, Nov. 9-12, 1987, 97-101.10Brechb�hler, Ch. et al., "Parametrization of Closed Surfaces for 3-D Shape Description," Comp. Vision Image Understanding, Mar., 1995, 61(2), 154-170.11Chen, Li, "Generalization Discrete Object Tracking Algorithms and Implementation," in Vision Geometry VI, Proceedings of SPIE, Melter, R.A. et al. (eds.), Jul. 28-29, 1997, 3168, 184-195.12Chiarulli, D.M. et al., "Draft: A Dynamically Reconfigurable Processor for Integer Arithmetic," IEEE: Proceedings-7<th >Symposium on Computer Arithmetic, University of Illinois, Hwang, K. (ed.), Jun. 4-6, 1985, 309-317.13Chiarulli, D.M. et al., "Draft: A Dynamically Reconfigurable Processor for Integer Arithmetic," IEEE: Proceedings-7th Symposium on Computer Arithmetic, University of Illinois, Hwang, K. (ed.), Jun. 4-6, 1985, 309-317.14Conference Paper, "A Shading and Compositing Processor based on Crossbar Switches and SRAM Memory," 1999, 4 pages.15Cox, M. et al., "Multi-Level Texture Caching for 3D Graphics Hardware," IEEE: Proceedings-The 25<th >Annual International Symposium on Computer Architecture, Barcelona, Spain, Jun. 27-Jul. 1, 1998, 86-97.16Cox, M. et al., "Multi-Level Texture Caching for 3D Graphics Hardware," IEEE: Proceedings-The 25th Annual International Symposium on Computer Architecture, Barcelona, Spain, Jun. 27-Jul. 1, 1998, 86-97.17Dietz, P.H. et al., "Simple Networks for Pixel Plane Median Filtering," IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Dec., 1993, 40(12), 799-801.18Gomes, J. et al., "Graphical Objects," The Visual Computer, 1996, 12, 269-282.19Gordon, R.L., Ph.D. et al., Window Management, Graphics, and Operating Systems, Operating Systems Review, Jul., 1987, 21(3), 5-8.20Goris, A. et al., "A Configurable Pixel Cache for Fast Image Generation," IEEE Computer Graphics and Applications, Mar., 1987, 24-32.21Grimes, J. et al., "A New Processor with 3-D Graphics Capabilities," NCGA '89 Conference Proceedings: 10<th >Annual Conference and Exposition Dedicated to Computer Graphics, Philadelphia, Pennsylvania, Apr. 17-20, 1989, vol. 1, 275-284.22Grimes, J. et al., "The Intel i860 64-Bit Processor: A General-Purpose CPU with 3D Graphics Capabilities," IEEE Computer Graphics and Applications, Jul., 1989, 85-94.23Grimes, J. et al., "A New Processor with 3-D Graphics Capabilities," NCGA '89 Conference Proceedings: 10th Annual Conference and Exposition Dedicated to Computer Graphics, Philadelphia, Pennsylvania, Apr. 17-20, 1989, vol. 1, 275-284.24Haig, T., "How to program in machine language," Electronics, Aug., 1982, 94-96, 98, 100-103.25Harrison, J.P. et al., "The Role of Microcomputers in Interactive Graphical Planning," Engin. Software for Microcomputers, Proc., Apr., 1984, 631-641.26Ho, C-H et al., "Efficient Point-Based Rendering Techniques for Haptic Display of Virtual Objects," Presence, Oct., 1999, 8(5), 477-491.27Hoffman, C. et al., "Automatic Surface Generation in Computer Aided Design," supported by the National Science Foundation, Department of Computer Science, Cornell University, Ithaca, New York, Jan., 1985, 1-22.28Hummel, R., "Render Benders: 26 Graphics Cards for Fast 3-D," Byte, Mar., 1998, 112-119.29James, M., "3-D graphics to become accessible to all," Scientific Computing World, Feb., 1997, 41 and 43.30Johnson, S.P., "Direct3D Revealed: Microsoft's 3-D API provides device-independent access to acceleration hardware. Here's how it works," Core Technologies, http://byte.com/art/9612/sec5/art4.htm, Dec. 1996, 5 pages.31Jones, M. et al., "High-Performance Graphics Via Silicon Compilation," VLSI Systems Design, Mar., 1987, 32, 33, 36 and 38.32Kaya, E.M., "New Trends in Graphic Display System Architecture," in Frontiers in Computer Graphics, Proceedings of Computer Graphics, Tokyo '84, Kunii, T.L. (ed.), 1985, 310-320.33Kumar, S. et al., "Efficient rendering of trimmed NURBS surfaces," Computer-Aided Disign, Jul., 1995, 27(7), 509-521.34Labsik, U. et al., "Progressive transmission of subdivision surfaces," Computational Geometry, 2000, 15, 25-39.35Lachaud, J-O. et al., "Continuous Analogs of Digital Boundaries: A Topological Approach to Iso-Surfaces," Graphical Models, 2000, 62, 129-164.36Lapidous, E. et al., "Optimal Depth Buffer for Low-Cost Graphics Hardware," Trident Microsystems, Inc., 1999, 67-73.37Lastra, A. et al., "Real-Time Programmable Shading," Proceedings: 1995 Symposium on Interative 3D Graphics, Monterey, California, Apr. 9-12, 1995, 59-66.38Lee, J-A. et al., "SPARP: a single pass antialiased rasterization processor," Comput. & Graphics, 2000, 24, 233-243.39Lichten, L., "A Solution to Surface Connectivity Problems in Computer-Aided Design," Computer Graphics, Mar., 1981, 14(4), 168-199.40Mabin, F.H. et al., "A Parallel Algorithm to Reconstruct Bounding Surfaces in 3D Images," J. Supercomputing, 1998, 12, 137-155.41McManus, D. et al., "Optimal Static 2-Dimensional Screen Subdivision for Parallel Rasterization Architectures," Comput. & Graphics, 1997, 21(2), 159-169.42Meyers, D. et al., "Surfaces from Contours," ACM Transactions on Graphics, Jul. 1992, 11(3), 228-258.43Micikevicius, P. et al., "Teaching a Computer Graphics Class Using DirectX," J. Comput. in Small Colleges: Proceedings of the Ninth Annual CCSC South Central Conference, (Jackson, Mississippi, Apr. 17-18), Meinke, J.G. (ed.), Mar., 1998, 13(4), 61-66.44Nishimura, H. et al., "A Multicomputer System Links: Its Architecture and Graphics Applications," IECON '84: International Conference on Industrial Electronics Control and Instrumentation, Tokyo, Japan, Oct. 22-26, 1984, 1, 270-274.45NVIDIA Corporation, "System Platform Porcessor (SPP) / Integrated Graphics Processor (IGP): Redefnining System and Graphics Performance," nForce SPP/IGP Product Overview, Jan., 2002, Version 1, 2 pages.46NVIDIA Corporation, "Technical Brief: NVIDIA nfiniteFX II Engine From Research to Real Time," Jan. 16, 2002, 7 pages.47NVIDIA Corporation, "Technical Brief: NVIDIA nForce Platform Processing Architecture," 2001, 1-9.48Ohbuchi, R. et al., "Embedding Data in 3D Models," in Interactive Distributed Multimedia Systems and Telecommunication Services, 4<th >International Workshop, IDMS '97, Darmstadt, Germany, Sep. 10-12, 1997, 1-10.49Ohbuchi, R. et al., "Embedding Data in 3D Models," in Interactive Distributed Multimedia Systems and Telecommunication Services, 4th International Workshop, IDMS '97, Darmstadt, Germany, Sep. 10-12, 1997, 1-10.50Ohhashi, M. et al., "A 32b 3-D Graphic Processor Chip with 10M Pixels/s Gouraud Shading," 1998 IEEE International Solid-State Circuits Conference Digest of Technical Papers, Feb., 1988, 168-169, and 352.51Rowlan, J.S. et al., "A distributed, parallel, interactive volume rendering package," IEEE: Proceedings-Visualization '94, Washington, D.C., Oct. 17-21, 1994, 21-30.52Schneider, B-O. et al., "An adaptive framework for 3D graphics over networks," Comput. & Graphics, 1999, 23, 867-874.53Schneider, B-O. et al., "M-Buffer: A Flexible MISD Architecture for Advanced Graphics," Comput. & Graphics, 1995, 19(2), 239-246.54Senthinathan, R. et al., "A 650-MHz, IA-32 Microprocessor with Enhanced Data Streaming for Graphics and Video," IEEE J. Solid-State Circuits, Nov., 1999, 34(11), 1454-1465.55Shinya, M., "Improvements on the Pixel-tracing Filter: Reflection/Refraction, Shadows, and Jittering," Proceedings: Graphics Interface '95, May 7-19, 1995, 92-102.56Shirali, N.S. et al., "A Parallel Architecture Graphics Processor," IEEE Southeastcon: Conference Proceedings, Knoxville, Tennessee, Apr. 11-13, 1998, 108-111.57Smith, D.R. et al., "A Circuit-Switched Shared-Memory Multiprocessor," International J. Mini Microcomputers, 1995, 17(3), 108-118.58Sussman, H. et al., "Graphics Memory Architectures," Wescon/86 Conference Record, 1986, 1-6.59Swanson, R.W. et al., "A Fast Shaded-Polygon Rendered," Computer Graphics, Aug., 1986, 20(4), 95-101.60Teonnies, K.D. et al., "Volume rendering for interactive 3-d segmentation," in Image Display, Proceeding of SPIE, Newport Beach, California, Feb. 23-25, 1997, 3031, 602-609.61Thompson, T., "An inside look at the most popular 3-D environments: OpenGL, QuickDraw3D, and Direct 3D," Must-See 3-D Engines, Jun., 1996, http://byte.com/art/9606/sec11/art4.htm, 7 pages.62Thompson, T., "Direct3D's Engine," Must-See 3-D Engines, Jun., 1996, http://byte.com/art/9606/sec11/art7.htm, 1 page.63Thompson, T., "Open GL's Command Structure," Must-See 3-D Engines, Jun., 1996, http://byte.com/art/9606/sec11/art5.htm, 1 page.64Thompson, T., "QuickDraw 3D's Command Structure," Must-See 3-D Engines, Jun., 1996, http://byte.com/art/9606/sec11/art6.htm, 1 page.65Thompson, T., "Three Ways to Tackle Multithreading," Must-See 3-D Engines, Jun., 1996, http://byte.com/art/9606/sec11/art8.htm, 1 page.66Wilson, J.L. et al., "Designing a Graphics Application Interface," Proceedings Graphics Interface '85, Montreal, Quebec, May 27-31, 1985, 373-380.67Yoshida, M. et al., "Trend of the computer graphics hardware," Information Processing Soc. of Japan, Oct., 1988, 29(10), 1109-1115.68Zheng, Y. et al. , "Three-dimensional unstructured mesh generation: Part 2. Surface meshes," Comput. Methods Appl. Mech. Engrg., 1996, 134, 269-284.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7487516 *Aug 1, 2005Feb 3, 2009Nvidia CorporationDesktop composition for incompatible graphics applicationsUS7908178Jul 31, 2009Mar 15, 2011Paul NykampMethods for interactive and synchronous displaying sessionUS7999807Dec 12, 2005Aug 16, 2011Microsoft Corporation2D/3D combined renderingUS8004515 *Mar 15, 2005Aug 23, 2011Nvidia CorporationStereoscopic vertex shader overrideUS8009176Apr 5, 2011Aug 30, 2011Apple Inc.System and method for processing graphics operations with graphics processing unitUS8040353Oct 15, 2010Oct 18, 2011Apple Inc.System for emulating graphics operationsUS8040359Oct 15, 2010Oct 18, 2011Apple Inc.System for emulating graphics operationsUS8044963Oct 15, 2010Oct 25, 2011Apple Inc.System for emulating graphics operationsUS8069087Feb 16, 2010Nov 29, 2011Paul NykampMethods for interactive and synchronous display sessionUS8120622 *Jan 15, 2008Feb 21, 2012Microsoft CorporationProxy direct 3-D device and remote renderingUS8134561Apr 16, 2004Mar 13, 2012Apple Inc.System for optimizing graphics operationsUS8144159May 19, 2011Mar 27, 2012Apple Inc.Partial display updates in a windowing system using a programmable graphics processing unitUS8311894Feb 16, 2010Nov 13, 2012Reliable Tack Acquisitions LlcMethod and apparatus for interactive and synchronous display sessionUS8432407Jul 30, 2009Apr 30, 2013Microsoft CorporationMethod and system for managing graphics objects in a graphics display systemUS8446416Feb 11, 2011May 21, 2013Apple Inc.System for optimizing graphics operationsUS8520021Jul 13, 2011Aug 27, 2013Apple Inc.System and method for processing graphics operations with graphics processing unit* Cited by examinerClassifications U.S. Classification345/418, 345/629, 719/328International ClassificationG06F17/00, G06F9/46Cooperative ClassificationG06F9/541European ClassificationG06F9/54ALegal EventsDateCodeEventDescriptionMay 16, 2012FPAYFee paymentYear of fee payment: 8May 30, 2008FPAYFee paymentYear of fee payment: 4Apr 30, 2001ASAssignmentOwner name: MICROSOFT CORPORATION, WASHINGTONFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BOYD, CHARLES N.;NOYLE, JEFFREY M. J.;TOELLE, MICHAEL A.;REEL/FRAME:011760/0287Effective date: 20010227Owner name: MICROSOFT CORPORATION ONE MICROSOFT WAYREDMOND, WAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BOYD, CHARLES N. /AR;REEL/FRAME:011760/0287RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google