Source: http://www.google.com/patents/US6025220?dq=oakley+5,387,949
Timestamp: 2014-09-17 08:54:00
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Patent US6025220 - Method of forming a polysilicon diode and devices incorporating such diode - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsA method for manufacturing a diode having a relatively improved on-off ratio. The diode is formed in a container in an insulative structure layered on a substrate of an integrated circuit. The container is then partially filled with a polysilicon material, by methods such as conformal deposition, leaving...http://www.google.com/patents/US6025220?utm_source=gb-gplus-sharePatent US6025220 - Method of forming a polysilicon diode and devices incorporating such diodeAdvanced Patent SearchPublication numberUS6025220 APublication typeGrantApplication numberUS 08/665,325Publication dateFeb 15, 2000Filing dateJun 18, 1996Priority dateJun 18, 1996Fee statusPaidAlso published asUS6229157, US6392913Publication number08665325, 665325, US 6025220 A, US 6025220A, US-A-6025220, US6025220 A, US6025220AInventorsGurtej S. SandhuOriginal AssigneeMicron Technology, Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (42), Non-Patent Citations (24), Referenced by (218), Classifications (18), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetMethod of forming a polysilicon diode and devices incorporating such diodeUS 6025220 AAbstract A method for manufacturing a diode having a relatively improved on-off ratio. The diode is formed in a container in an insulative structure layered on a substrate of an integrated circuit. The container is then partially filled with a polysilicon material, by methods such as conformal deposition, leaving a generally vertical seam in the middle of the polysilicon material. An insulative material is deposited in the seam. The polysilicon material is appropriately doped and electrical contacts and conductors are added as required. The diode can be coupled to a chalcogenide resistive element to create a chalcogenide memory cell.
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format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:23786/416Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:023786/0416Owner name: ROUND ROCK RESEARCH, LLC, NEW YORKJul 20, 2007FPAYFee paymentYear of fee payment: 8Jul 21, 2003FPAYFee paymentYear of fee payment: 4Jun 18, 1996ASAssignmentOwner name: MICRON TECHNOLOGY, INC., IDAHOFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SANDHU, GURTEJ S.;REEL/FRAME:008079/0538Effective date: 19960607RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google