Source: http://www.google.com/patents/US5798554?dq=7,682,496
Timestamp: 2015-03-31 15:40:19
Document Index: 589168708

Matched Legal Cases: ['Application No. 95830453', 'Application No. 95830454', 'Application No. 95830468', 'Application No. 95830453', 'Application No. 95830454', 'Application No. 95830468']

Patent US5798554 - MOS-technology power device integrated structure and manufacturing process ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA MOS-technology power device integrated structure includes a first plurality of elongated doped semiconductor stripes of a first conductivity type formed in a semiconductor layer of a second conductivity type, each including an elongated source region of the first conductivity type, an annular doped...http://www.google.com/patents/US5798554?utm_source=gb-gplus-sharePatent US5798554 - MOS-technology power device integrated structure and manufacturing process thereofAdvanced Patent SearchPublication numberUS5798554 APublication typeGrantApplication numberUS 08/605,381Publication dateAug 25, 1998Filing dateFeb 22, 1996Priority dateFeb 24, 1995Fee statusPaidAlso published asUS6111297Publication number08605381, 605381, US 5798554 A, US 5798554A, US-A-5798554, US5798554 A, US5798554AInventorsAntonio Grimaldi, Antonino SchillaciOriginal AssigneeConsorzio Per La Ricerca Sulla Microelettronica Nel MezzogiornoExport CitationBiBTeX, EndNote, RefManPatent Citations (67), Non-Patent Citations (55), Referenced by (49), Classifications (55), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetMOS-technology power device integrated structure and manufacturing process thereof
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ToshibaWiring layout for bipolar and unipolar insulated gate transistorsEP0252236A2 *May 5, 1987Jan 13, 1988Kabushiki Kaisha ToshibaVertical MOS type semiconductor deviceEP0279403A2 *Feb 15, 1988Aug 24, 1988Nec CorporationVertical MOS field effect transistor having a high withstand voltage and a high switching speedEP0304839A2 *Aug 22, 1988Mar 1, 1989Hitachi, Ltd.Method for fabricating insulated gate semiconductor deviceEP0358389A1 *Aug 25, 1989Mar 14, 1990Nec CorporationVertical field-effect transistor having a high breakdown voltage and a small on-resistanceEP0393949A1 *Apr 12, 1990Oct 24, 1990General Electric CompanyPower field effect devices having small cell size and low contact resistance and method of fabricationEP0405138A2 *May 23, 1990Jan 2, 1991Mitsubishi Denki Kabushiki KaishaInsulated gate bipolar transistor and method of making the sameEP0543313A1 *Nov 16, 1992May 26, 1993Nec CorporationField effect transistor having back gate held in contact with source electrode without variation in source contact resistanceEP0632503A1 *Jul 1, 1993Jan 4, 1995Consorzio Per La Ricerca Sulla Microelettronica Nel MezzogiornoIntegrated edge structure for high voltage semiconductor devices and related manufacturing processEP0671769A2 *Mar 10, 1995Sep 13, 1995Nippondenso Co., Ltd.Insulated gate field effect transistorEP0685886A1 *May 31, 1995Dec 6, 1995Kabushiki Kaisha ToshibaMOS composite type semiconductor deviceFR2640081A1 * Title not availableGB2087648A * Title not availableJPH01272163A * Title not availableJPH02143566A * Title not availableJPH03185737A * Title not availableJPH04256367A * Title not availableJPH04349660A * Title not availableJPS5123088A * Title not availableJPS5148981A * Title not availableJPS5185381A * Title not availableJPS5265943A * Title not availableJPS5366181A * Title not availableJPS5374385A * Title not availableJPS6247162A * Title not availableJPS53135284A * Title not availableJPS55163877A * Title not availableJPS58206174A * Title not availableWO1994011904A1 *Oct 26, 1993May 26, 1994Harris CorpDevice and method for improving current carrying capability in a semiconductor device* Cited by examinerNon-Patent CitationsReference1 *Electronic Design, For Engineers and Engineering Managers Worldwide, pp. 8276 8282, HEXFET, A New Power Technology Cuts On Resistance, Boosts Ratings No Date.2Electronic Design, For Engineers and Engineering Managers--Worldwide, pp. 8276-8282, "HEXFET, A New Power Technology Cuts On-Resistance, Boosts Ratings" No Date.3 *European Search Report from European Patent Application 95830055.0, filed Feb. 24, 1995.4European Search Report from European Patent Application 95830418.0, filed Oct. 9, 1996.5 *European Search Report from European Patent Application 95830535.1, filed Dec. 22, 1995.6European Search Report from European Patent Application 95830542.7, filed Dec. 28, 1995.7European Search Report from European Patent Application No. 95830453.7, filed Oct. 30, 1995.8European Search Report from European Patent Application No. 95830454.5, filed Oct. 30, 1995.9European Search Report from European Patent Application No. 95830468.5, filed Nov. 6, 1995.10 *EUROPEAN SEARCH REPORT, from European Patent Application 95830418.0, filed Oct. 9, 1996.11 *EUROPEAN SEARCH REPORT, from European Patent Application 95830542.7, filed Dec. 28, 1995.12 *EUROPEAN SEARCH REPORT, from European Patent Application No. 95830453.7, filed Oct. 30, 1995.13 *EUROPEAN SEARCH REPORT, from European Patent Application No. 95830454.5, filed Oct. 30, 1995.14 *EUROPEAN SEARCH REPORT, from European Patent Application No. 95830468.5, filed Nov. 6, 1995.15 *ICS and Semiconductors, pp. 8272 8275 No Date.16ICS and Semiconductors, pp. 8272-8275 No Date.17 *IEEE Journal of Solid-State Circuits, vol. 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Mena, et al., High Frequency Performance of VDMOS Power Transistors .23International Electron Devices Meeting--Tech. Digest, Dec. 8-10, 1980, Washington, D.C., pp. 91-94, J. Mena, et al., "High Frequency Performance of VDMOS Power Transistors".24Laid Open Patent Specification No. 85073/80, Laid Open Date: Jun. 26, 1980, Patent No. 75/162,677, Kanushiki Kaisha Hitachi Seisakusho, "Methods for Manufacturing Insulated Gate Type Field Effect Transistors".25 *Laid Open Patent Specification No. 85073/80, Laid Open Date: Jun. 26, 1980, Patent No. 75/162,677, Kanushiki Kaisha Hitachi Seisakusho, Methods for Manufacturing Insulated Gate Type Field Effect Transistors .26Mena J., et al., "High Frequency Performance of VDMOS Power Transistors", International Electron Devices Meeting, Technical Digest, Washington, D.C., USA, 8-10 Dec. 1980, 1980 New York, NY, USA.27 *Mena J., et al., High Frequency Performance of VDMOS Power Transistors , International Electron Devices Meeting, Technical Digest, Washington, D.C., USA, 8 10 Dec. 1980, 1980 New York, NY, USA.28 *Patent Abstracts of Japan, vol. 005, No. 040 (E 049), Mar. 17, 1981 & JP A 55 163877 (Toshiba Corp.).29Patent Abstracts of Japan, vol. 005, No. 040 (E-049), Mar. 17, 1981 & JP-A-55 163877 (Toshiba Corp.).30Patent Abstracts of Japan, vol. 008, No. 053 (E-231), Mar. 9, 1984 & JP-A-58 206174 (Tokyo Shibaura Denki KK).31 *PATENT ABSTRACTS OF JAPAN, Vol. 008, No. 053 (E-231), Mar. 9, 1984; & JP-A-58 206174 (TOKYO SHIBAURA DENKI KK.)32Patent Abstracts of Japan, vol. 011, No. 231 (E-527), Jul. 28, 1987 & JP-A-62 047162 (Matsushita Electric Works Ltd.).33 *PATENT ABSTRACTS OF JAPAN, Vol. 011, No. 231 (E-527), Jul. 28, 1987; & JP-A-62 047162 (MATSUSHITA ELECTRIC WORKS LTD.)34 *Patent Abstracts of Japan, vol. 014 No. 387 (E 0967), Aug. 21, 1990 & JP A 02 143566 (Toshiba Corp.) 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LTD.)38Patent Abstracts of Japan, vol. 015, No. 442 (E-1131), Nov. 11, 1991 & JP-A-03 185737 (Toshiba Corp.)39 *PATENT ABSTRACTS OF JAPAN, Vol. 015, No. 442 (E-1131), Nov. 11, 1991; & JP-A-03 185737 (TOSHIBA CORP.)40Patent Abstracts of Japan, vol. 017, No. 039 (E-1311), Jan. 25, 1993 & JP-A-04 256367 (Hitachi Ltd.).41 *PATENT ABSTRACTS OF JAPAN, Vol. 017, No. 039 (E-1311), Jan. 25, 1993; & JP-A-04 256367 (HITACHI LTD.)42Patent Abstracts of Japan, vol. 017, No. 213 (E-1356), Apr. 26, 1993 & JP-A-04 349660 (Toshiba Corp).43 *PATENT ABSTRACTS OF JAPAN, Vol. 017, No. 213 (E-1356), Apr. 26, 1993; & JP-A-04 349660 (TOSHIBA CORP.)44Semiconductor Science and Technology, Apr. 1993, UK, vol. 8, No. 4, oo 488-494, Galvagno., et al. "Diffusion and Outdiffusion of Aluminum Implanted into Silicon".45 *SEMICONDUCTOR SCIENCE AND TECHNOLOGY, Apr. 1993, UK, Vol. 8, No. 4, pp. 488-494, GALVAGNO., ET AL., "Diffusion and Outdiffusion of Aluminum Implanted into Silicon".46Siliconix Technical Proposal in response to N.A.F.I., Solicitation #N00163-77-R-1197, Aug. 31, 1977, Labor and Materials to Design, Develop and Fabricate a 500V/2A N-Channel Metal Oxide Semiconductor F.E.T.47 *Siliconix Technical Proposal in response to N.A.F.I., Solicitation N00163 77 R 1197, Aug. 31, 1977, Labor and Materials to Design, Develop and Fabricate a 500V/2A N Channel Metal Oxide Semiconductor F.E.T.48 *Solid State Electronics, 1977, vol. 29, pp. 875 878, Surinder Krishna, Second Breakdown in High Voltage MOS Transistors No Month.49Solid State Electronics, 1977, vol. 29, pp. 875-878, Surinder Krishna, "Second Breakdown in High Voltage MOS Transistors" No Month.50 *Solid State Electronics, vol. 27, No. 5, pp. 419 432, 1984, P. McGregor, et al, Small Signal High Frequency Performance of Power MOS Transistors No Month.51Solid State Electronics, vol. 27, No. 5, pp. 419-432, 1984, P. McGregor, et al, "Small-Signal High-Frequency Performance of Power MOS Transistors" No Month.52 *Solid State Electronics, vol. 29, No. 6, pp. 647 656, 1986, Jose G. Mena et al., High Voltage Multiple Resistivity Drift Region LDMOS No Month.53Solid State Electronics, vol. 29, No. 6, pp. 647-656, 1986, Jose G. Mena et al., "High-Voltage Multiple-Resistivity Drift-Region LDMOS" No Month.54Stanford Electronics Laboratories, Integrated Circuits Laboratory, Stanford University, Stanford, CA, Technical Report No. 4956-1, Mar. 1976, Michael Donald Pocha, "High Voltage Double Diffused MOS Transistors for Integrated Circuits" pp. 229-240.55 *STANFORD ELECTRONICS LABORATORIES, Integrated Circuits Laboratory, Stanford University, Stanford, CA, Technical Report No. 4956-1, Mar. 1976, MICHAEL DONALD POCHA, "High Voltage Double Diffused MOS Transistors for Integrated Circuits", pp. 229-240.* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS6228719Jan 21, 1999May 8, 2001Stmicroelectronics S.R.L.MOS technology power device with low output resistance and low capacitance, and related manufacturing processUS6297534 *Oct 7, 1999Oct 2, 2001Kabushiki Kaisha ToshibaPower semiconductor deviceUS6344676 *Mar 24, 2000Feb 5, 2002Samsung Electronics Co., Ltd.Power semiconductor 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Inc.Combination therapy with anti-CD74 antibodies provides enhanced toxicity to malignancies, Autoimmune disease and other diseasesUS8481003Nov 27, 2012Jul 9, 2013Immunomedics, Inc.Anti-CD74 immunoconjugates and methodsUS8486395Nov 19, 2012Jul 16, 2013Immunomedics, Inc.Anti-CD19 antibodiesUS8552493Jun 2, 2009Oct 8, 2013Power Integrations, Inc.Segmented pillar layout for a high-voltage vertical transistorUS8624001Jun 17, 2013Jan 7, 2014Immunomedics, Inc.Anti-CD19 antibodiesUS8816433Mar 28, 2013Aug 26, 2014Power Integrations, Inc.Checkerboarded high-voltage vertical transistor layoutUS8846002Jan 3, 2013Sep 30, 2014The Ohio State UniversityAnti-CD74 immunoconjugates and methods of useUS8871216Nov 5, 2012Oct 28, 2014Ibc Pharmaceuticals, Inc.Multiple signaling pathways induced by hexvalent, monospecific and bispecific antibodies for enhanced toxicity to B-cell lymphomas and other diseasesUS8883160Feb 28, 2011Nov 11, 2014Ibc Pharmaceuticals, Inc.Dock-and-lock (DNL) complexes for therapeutic and diagnostic useUS8906378May 29, 2013Dec 9, 2014Ibc Pharmaceuticals, Inc.Combination therapy with anti-CD74 antibodies provides enhanced toxicity to malignancies, autoimmune disease and other diseasesEP2216342A1Aug 2, 2004Aug 11, 2010Immunomedics, Inc.Anti-CD19 antibodiesEP2295468A1Feb 14, 2003Mar 16, 2011Immunomedics, Inc.Anti-CD20 antibodies and fusion proteins thereof and methods of useEP2301570A1Dec 31, 2003Mar 30, 2011Immunomedics, Inc.Immunotherapy of B cell malignancies and autoimmune diseases using unconjugated and conjugated antibodies, antibody combinations and fusion proteinsEP2308898A1Mar 3, 2003Apr 13, 2011Immunomedics, Inc.Internalizing anti-CD74 antibodies and methods of useEP2587545A1 *Nov 28, 2007May 1, 2013Power Integrations, Inc.High-voltage vertical FET and method of manufacturing the same* Cited by examinerClassifications U.S. Classification257/401, 257/E29.027, 257/384, 438/268, 257/382, 257/412, 438/586, 438/652, 257/E29.013, 257/E29.118, 257/E29.133, 257/E29.04, 257/329, 257/E23.015, 438/694, 257/E29.066, 257/E29.136, 257/E29.026, 257/341, 438/156, 438/514, 257/E29.257, 257/E21.418, 438/647International ClassificationH01L29/423, H01L29/78, H01L29/06, H01L29/739, H01L29/10, H01L23/482, H01L29/417, H01L29/08, H01L21/336Cooperative ClassificationH01L29/1095, H01L29/0696, H01L29/0619, H01L29/4238, H01L29/0615, H01L29/0692, H01L2924/3011, H01L29/0847, H01L29/66712, H01L23/4824, H01L29/7802, H01L2924/0002, H01L29/41741, H01L29/42368European ClassificationH01L29/66M6T6F14V, H01L29/06D3B, H01L29/417D4, H01L29/06D3, H01L29/423D2B7C, H01L29/10G, H01L29/78B2, H01L23/482ELegal EventsDateCodeEventDescriptionFeb 23, 2010FPAYFee paymentYear of fee payment: 12Jan 31, 2006FPAYFee paymentYear of fee payment: 8Jan 31, 2002FPAYFee paymentYear of fee payment: 4Feb 22, 1996ASAssignmentOwner name: CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GRIMALDI, ANTONIO;SCHILLACI, ANTONINO;REEL/FRAME:007875/0348Effective date: 19960215RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services