Source: http://www.google.com/patents/US4517584?dq=5787449
Timestamp: 2017-07-25 13:39:04
Document Index: 8564627

Matched Legal Cases: ['art 18', 'arts 15', 'arts 15', 'art 18', 'arts 17', 'art 17']

Patent US4517584 - Ceramic packaged semiconductor device - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA semiconductor device with a semiconductor element encased in a hollow ceramic package. The portion of the package at which the semiconductor element is disposed is formed from a SiC-based substrate containing Be or a compound of Be with a thin SiO2 layer being capable of reacting with glass provided...http://www.google.com/patents/US4517584?utm_source=gb-gplus-sharePatent US4517584 - Ceramic packaged semiconductor deviceAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS4517584 APublication typeGrantApplication numberUS 06/448,592Publication dateMay 14, 1985Filing dateDec 10, 1982Priority dateDec 11, 1981Fee statusLapsedAlso published asEP0081992A2, EP0081992A3Publication number06448592, 448592, US 4517584 A, US 4517584A, US-A-4517584, US4517584 A, US4517584AInventorsYasuo Matsushita, Kousuke Nakamura, Mitsuru UraOriginal AssigneeHitachi, Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (12), Referenced by (32), Classifications (31), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetCeramic packaged semiconductor device
US 4517584 AAbstract
A semiconductor device with a semiconductor element encased in a hollow ceramic package. The portion of the package at which the semiconductor element is disposed is formed from a SiC-based substrate containing Be or a compound of Be with a thin SiO2 layer being capable of reacting with glass provided thereon and with a glass layer or a thin film circuit on the SiO2 layer.
1. A semiconductor device, comprising:an insulating substrate comprising non-oxide ceramic as the main component and having a coefficient of thermal expansion approximating to that of a semiconductor material and a thermal conductivity not smaller than 0.2 cal/sec.cm.° C. at room temperature, an oxide layer having sufficient thickness to provide a good bonding strength provided on the substrate and a glass layer provided on the oxide layer; at least one semiconductor element disposed at a predetermined location on one surface of the insulating substrate; a cap member of ceramic bonded to be a preselected portion on the one surface of the insulating substrate, thereby forming a package hermetically enclosing the semiconductor element together with the insulating substrate; and a terminal means whose one end is electrically connected to the semiconductor element within the package and whose other end is exposed at the outside of the package. 2. A semiconductor device, comprising:an insulating substrate comprising non-oxide ceramic as the main component containing 0.05 to 5% by weight of at least one of Be and a compound of Be in terms of Be element on the basis of total ceramic and having a relative density of not lower than 90% to the theoretical density, an oxide layer having sufficient thickness to provide a good bonding strength provided on the substrate and a glass layer provided on the oxide layer; at least one semiconductor element disposed at a predetermined location on one surface of the insulating substrate; a cap member of ceramic bonded to a preselected portion on the one surface of the insulating substrate, thereby forming a package hermetically enclosing the semiconductor element together with the insulating substrate; and a thermal means whose one end is electrically connected to the semiconductor element within said package and whose other end is exposed at the outside of the package. 3. The semiconductor device according to claim 2, wherein a cooling fin is mounted on the other surface of the insulating substrate.
5. The semiconductor device according to claim 2, wherein the non-oxide as a main component ceramic for the insulating substrate is at least one of SiC, Si3 N4 and AlN.
10. The semiconductor device according to claim 9, wherein the low melting point glass has a coefficient of thermal expansion of 5-10×10-6 /° C. at room temperature and a composition of PbO--ZnO--B2 O3 as the main components.
11. The semiconductor device according to claim 10, wherein the low melting point glass comprises 60-75% by weight of PbO, 5-20% by weight of ZnO, 5-20% by weight of B2 O3, not more than 15% by weight of SiO2 and not more than 5% by weight of Al2 O3.
13. The semiconductor device according to claim 12, wherein the glass layer has a coefficient of thermal expansion of 2.5-6×10-6 /° C. at room temperature, and contains SiO2 as the main component and further contains 5-20% by weight of B2 O3, not more than 10% by weight of Na2 O and not more than 5% by weight of Al2 O3.
18. A semiconductor device according to claim 1, wherein said oxide layer is SiO2 and the non-oxide ceramic is SiC or Si3 N3.
19. A semiconductor device according to claim 1, wherein said oxide layer is Al2 O3 and the non-oxide ceramic is AlN.
20. A semiconductor device according to claim 2, wherein said oxide layer is SiO2 and the non-oxide ceramic is SiC or Si3 N3.
21. A semiconductor device according to claim 2, wherein said oxide layer is Al2 O3 and the non-oxide ceramic is AlN.
22. A semiconductor device according to claim 8, wherein said oxide layer comprises SiO2 formed by oxidation treatment of said substrate.
The present invention relates to a ceramic packaged semiconductor device with a semiconductor element contained in a hollow package of ceramic, and more particularly to a ceramic packaged semiconductor device with a ceramic substrate containing SiC as the main component and having a good adhesion to a conductor paste or a soldering glass.
Semiconductor devices with a semiconductor element such as IC, LSI, etc. contained in a package of ceramic material having an inside space and with lead conductors introduced into the package, the semiconductor element and lead conductors being connected with one another by bonding wires in the inside space of the package, are widely used, as are resin-sealed semiconductor devices. The problem of package type semiconductor device is a poor heat dissipation due to the use of the package. Obviously, the poor heat dissipation is a great obstacle to an attempt to make a semiconductor device with a larger capacity, a higher intergration density and a smaller size. Thus, a material with a low heat resistance is required for an insulating substrate of a semiconductor element in a ceramic package. Besides, a material for the insulating substrate must satisfy (1) a higher electrical insulation, (2) a substantially equal coefficient of thermal expansion to that of silicon, and (3) a higher mechanical strength. Sintered alumina is now used for the insulating substrate which can meet these requirements to some extent. From the standpoint of the thermal resistance, sintered alumina having a low thermal conductivity, such as 0.05 cal/sec.cm.°C., is not regarded as a preferable material for the insulating substrate for the semiconductor device, when attempting to make the integration density higher and the capacity larger.
An object of the present invention is to provide an improved ceramic-packaged semiconductor device which is free from the drawbacks of the prior art device described above, and which has highly improved heat dissipation characteristics.
Another object of the present invention is to provide a ceramic-packaged electrical device with an insulating substrate having a circuit with a high bonding strength, particularly, a thick film circuit having a bonding strength equal to a tensile strength of a solder glass (about 2 kg/mm2) and capable of being baked at a relatively low temperature.
In view of the above object, it is proposed according to a first aspect of the present invention that an insulating substrate for mounting thereon a semiconductor element to be hermetically housed within a ceramic package made from non-oxide ceramic which contains a non-oxide material as the main component and exhibits a coefficient of thermal expansion of 4×10-6 /°C. or less (which approximates that of silicon) and a thermal conductivity of not smaller than 0.2 ca/sec. cm.°C. at room temperature. With the term "non-oxide ceramic as the main component", it is intended to mean SiC admixed with a small amount of Be or a compound thereof, Si3 N4 admixed with a small amount of Be or a compound thereof, or AlN admixed with a small amount of Be or a compound thereof. The term "coefficient of thermal expansion approximating to that of silicon" is to mean a coefficient of thermal expansion of the insulating substrate being approximate that of silicon semiconductor element to such a degree that when a silicon semiconductor element is bonded to the insulating substrate through an interposed bonding layer, neither destruction nor peeling occurs under a thermal stress due to a difference in the coefficient of thermal expansion between the silicon semiconductor element and the insulating substrate. Further, the thermal conductivity of not smaller than 0.2 cal/sec.cm.°C. at room temperature means the lower limit to the range of thermal conductivity of sintered non-oxide ceramic which can be obtained with a good reproducibility without any adverse effect on the insulating property of higher than 107 Ω.cm and the coefficient of thermal expansion.
The insulating substrate for use in the semiconductor device of the present invention is preferably made from sintered SiC containing 0.05 to 5% by weight of at least one of Be and a compound of Be in terms of Be element on the basis of total ceramic and having a relative density of not smaller than 90% to the theoretical density, where the insulating substrate having a high thermal conductivity of 0.4 cal/sec.cm.°C. or more can be obtained with a good reproducibility.
A second aspect of the present invention is to use a substrate comprising the non-oxide ceramic substrate as a base, a thin layer capable of reacting with glass being provided on the base and a glass layer being further provided on the thin layer. These layers improve a wettability with a conductor paste or a solder glass, and metallizing and glass bonding with a high bonding strength can be obtained. The thin layer capable of reacting with glass is preferably an oxide layer or an oxidized layer. In the case of a SiC-based ceramic substrate or a Si3 N4 -based substrate as a base, a SiO2 film formed by an oxidation treatment of the substrate is preferable. In the case of an AlN-based ceramic substrate, an Al2 O3 film formed by an oxidation treatment of the substrate is preferable.
FIG. 1 is a schematic cross-sectional view showing one embodiment of a substrate for a semiconductor device according to the second aspect of the present invention;
The invention will be described in detail, referring to the following embodiments.
A semiconductor device according to a first embodiment of the present invention comprises an insulating substrate formed of SiC ceramic, a semiconductor element such as IC, LSI, etc. soldered to one surface of the insulating substrate substantially at a center portion thereof by means of an interposed metal paste, a lead member, for example, lead frame, with its one end being bonded to one side of the insulating substrate by a sealing glass and with the other end portion extending outwardly from the outer peripheral portion of the one side of the insulating substrate, bonding wires, each serving to electrically connect the lead member to the semiconductor element, and a cap member of alumina which is bonded hermetically to the one side of the insulating substrate and the lead member by a solder glass to form a hermetically sealed package in cooperation with the insulating substrate, thereby encapsulating therein the semiconductor element, the one end portions of the lead member and the bonding wires. The SiC ceramic constituting the insulating substrate of the semiconductor device according to the first embodiment is formed of a sintered ceramic which contains 2% by weight of BeO in terms of Be element on the basis of total ceramic, the balance being SiC and incidental impurities, and which exhibits a relative density of 98% to the theoretical density. This SiC ceramic characteristically exhibits specific gravity of about 3.2, resistivity of 1013 Ω.cm at room temperature, coefficient of thermal expansion of 4.0×10-6 /°C. in a range from room temperature to 900° C., thermal conductivity of 0.6 cal/sec.cm.°C. at room temperature, and bending strength of about 45 kg/mm2 at room temperature.
Both sealing glass and solder glass contain 60 to 75% by weight of PbO, 5 to 20% by weight of ZnO, and 5 to 20% by weight of B2 O3, or further contain not more than 15% by weight of SiO2 and not more than 5% by weight of Al2 O3 and have a coefficient of thermal expansion of 5-10×10-6 /°C. at room temperature.
______________________________________                              Coefficient of thermalNo.  PbO    ZnO    B2 O3                   SiO2                        Al2 O3                              expansion (room temp.)______________________________________1    72.5   15.0   12.5 --   --    9.2 × 10-6 /°C.2    65     7      10   11   --    8.3 × 10-6 /°C.3    72     5      18   2.5  2.5   --______________________________________
Examination as to characteristics of the semiconductor device having the structure as described above reveals that the dielectric strength between the insulating substrate and the lead member is higher than 1000 V and the thermal resistance between the semiconductor element and the insulating substrate of SiC ceramic is about 12.5°C./W. Further, neither deterioration such as damage, destruction or the like nor abnormality in the electric characteristics has been found in the semiconductor device even when subjected to an impact of about 50 G. These undesirable phenomena have not been observed even after the semiconductor device is subjected to 1000 thermal cycles of cooling and heating in the temperature range of -30° C. to +150° C.
The high dielectric strength attained in the semiconductor device mentioned above is due to such an arrangement that the semiconductor element is mounted on the insulating substrate made of SiC ceramic having a high insulation resistance. Further, the thermal resistance of a smaller value as compared with 21.9 W/°C. of the hitherto known semiconductor device with an insulating substrate of alumina ceramic (in reality, the thermal resistance is decreased by about 40% according to the invention) is due to the fact that the thermal conductivity of the SiC ceramic is about ten times as high as that of alumina. The increased shock or impact resistance as well as the enhanced resistance to the temperature changes, involving substantially no deterioration such as damage, etc., is due to the high mechanical strength of the SiC ceramic. Further, the fact that no abnormality occurs in the electric characteristics of the semiconductor device after the aforementioned thermal cycles is explained by the fact that the coefficient of thermal expansion of Si as the matrix of the semiconductor element and that of the SiC ceramic of the insulating substrate approximate to each other, producing no stress at the bonding parts, and thus the semiconductor is positively protected from deformation, damages and other abnormalities.
In preparation of SiC ceramic for forming the insulating substrate, beryllium oxide (BeO) as a sintering aid and silicon carbide (SiC) are pulverized to an average particle size of 10 μm or less, preferably, 2 μm or less. The pulverized mixture thus obtained is subjected to a hot press and sintered to form the insulating substrate of SiC ceramic. Contamination of aluminum and boron must be avoided, but low content of these two elements, for example, 0.1% by weight or less each, has no problem. However, when the content of aluminum is higher than 0.1% by weight, the electric resistivity of the sintered material will undesirably become smaller than 107 Ω.cm. On the other hand, when the content of boron is higher than 0.1% by weight, the thermal conductivity becomes smaller than 0.4 cal/sec.cm.°C.
A semiconductor device having a thermal conductivity of not lower than 0.5 cal/sec.cm.°C. can be obtained by sintering silicon carbide powder containing α-form SiC as the main component.
Also important is the conditions used for sintering silicon carbide powder containing beryllium oxide. The sintering must be effected in the non-oxidizing atmosphere. Otherwise, surfaces of silicon carbide powder will be oxidized, failing to obtain the sintered material of high relative density. Further, no furnace material applicable to the oxidizing atmosphere at the sintering temperature of about 2000° C. is available for the present.
The sintering must be effected at a temperature of 1850° C. to 2500° C., preferably 1900° C. to 2300° C. At a sintering temperature lower than 1850° C., the sintered material will have a low relative density. On the other hand, sintering at a temperature higher than 2500° C. will promote vigorous sublimation of silicon carbide, failing to produce a dense ceramic due to excessive sintering. When the powder is pressed at a high sintering temperature according to the hot-press process, the upper limit of applicable load depends on the material of the hot-press die used. The ordinary die is made of graphite, where it is possible to apply a load of up to about 700 kg/cm2.
In general, however, the sintered material of high relative density can be obtained without applying such high load. The load of 100 to 300 kg/cm2 will be usually satisfactory. Silicon carbide powder having particle sizes on the submicron order can be formed into a sintered material of high relative density, for example, 90% or more to the theoretical density without applying such a high load. The optimal sintering time depends on the particle size of raw material powder, sintering temperature and load applied during sintering. It can be generally said that the smaller the particle size of raw material powder is, the higher the sintering temperature is, and that the higher the applicable load during sintering is, the shorter the time required for obtaining the sintered product of high relative density is.
SiC powder having an average particle size of 2 μm is mixed with 0.1 to 20% by weight of BeO powder having an average particle size of not smaller than 10 μm. The mixture thus obtained is pressed under a load of 1000 kg/cm2 at room temperature to prepare a molding having a density of 1.60 to 1.67 g/cm3 (which corresponds to a relative density of 50 to 52% to the theoretical density of SiC). Subsequently, the molding is placed in a die made of graphite and sintered according to the hot-press process under vacuum of 1×10-5 to 1×10-3 Torr and a load of 300 kg/cm2, while heating it from room temperature to 2000° C. over about two hours, maintaining it at 2000° C. for an hour, and then leaving it to cool by turning off the heating power source. The load is released after it has been cooled below 1500° C. Thus, sintered material having a high density (relative density of not smaller than 90% to the theoretical density), a high thermal conductivity (0.4 cal/sec.cm.°C. or higher), a high electric resistivity (1010 Ω.cm or higher), and a low coefficient of thermal expansion (4×10-6 /°C. or less) can be obtained.
The same conditions as described above are also applicable to Si3 N4 and AlN, though the thermal conductivity is a litter lowered, for example, 0.2 cal/sec.cm.°C. However, the thermal conductivity is nevertheless significantly higher than that of alumina. Thus, there is no practical problem.
The semiconductor device of the structure according to the second embodiment as described above has a high dielectric strength as well as increased resistances to thermal fatigue and shocks, as is the case of the device of the first embodiment. It is found that the thermal resistance between the semiconductor element and the cooling fin is on the order of 9.3° C./W, which is obviously lower by about 25% than the corresponding thermal resistance of the semiconductor device of the first embodiment without the cooling fin, i.e. 12.5° C./W. Such reduction in the thermal resistance is due to the provision of the cooling fin. When compared with the thermal resistance of about 11.5° C./W as in the conventional semiconductor having the same structure as that of the first embodiment only except that the insulating substrate is formed of alumina ceramic, the thermal resistance of the semiconductor device is decreased by about 20%, which results from the fact that the insulating substrate of SiC ceramics has a much improved thermal conductivity than the substrate of alumina ceramic.
It has been found that the semiconductor device of the third embodiment has the dielectric strength and the resistances to thermal fatigue and shock comparable to those of the device of the first embodiment. Further, the device of the third embodiment has a thermal resistance of about 5.1° C./W, reduction by about 45% in the thermal resistances as compared with the device of the second embodiment in which the separately fabricated cooling fin is bonded to the insulating substrate by a binder resin. Such remarkable reduction in the thermal resistance is due to the fact that the insulating substrate and the cooling fin are integrally formed from SiC ceramic having a thermal conductivity comparable to that of aluminum and to elimination of the binder resin layer having a poor thermal conductivity, for example, an epoxy resin layer.
As shown in FIG. 1, the present substrate comprises a non-oxide ceramic substrate 1 of, for example, SiC, as a base, a SiO2 layer 2 formed on the surface of the ceramic base as a film capable of reacting with glass, and a glass layer 3 covering the SiO2 layer.
In the second aspect of the present invention, a SiO2 layer 2 having a good adhesion can be formed on the ceramic base 1 by the well known technique, such as by heat oxidation, CVD, or PVD. Furthermore, a glass layer 3 having a coefficient of thermal expansion approximating to that of the base 1 is provided on the SiO2 layer 2 by coating. The glass layer 3 can be bonded to the base 1 with good adhesion through the SiO2 layer, because of good mutual wettability between SiO2 and glass.
Since the SiC-based ceramic base has a coefficient of thermal expansion of 3-4×10-6 /°C., a glass having a coefficient of thermal expansion of 2-6×10-6 /°C., preferably 2.5-4.5×10-6 /°C. can be used for the glass layer 3. The coefficient of thermal expansion of the layer is preferably 2.5-6×10-6 /°C. to reduce differences in thermal expansion between the glass layer and the base ceramic and between a silicon semiconductor element to be disposed on the glass layer by soldering and the glass layer, giving no residual strain to the glass layer and the silicon semiconductor element provided thereon, and preventing any decrease in their strength.
In the present invention, the thickness of the SiO2 layer formed on the non-oxide ceramic substrate as a thin film capable of reacting with glass is 0.05 μm or more, preferably 0.1-1 μm, more preferably 0.1-0.5 μm in view of the wettability with the glass layer. The thickness of the glass layer is preferably 0.05 mm or less, more preferably 0.05-0.3 mm in view of the thermal conductivity.
In FIG. 1, a schematic cross-sectional view of a substrate for a semiconductor device according to the present invention is shown, where a SiO2 layer 2 is provided on the entire surface of a base of SiC-based substrate, and a glass layer 3 is provided on the SiO2 layer. In FIG. 2, a SiO2 layer 2 and a glass layer 3 are locally and partially provided on the surface of the base 1.
α-form silicon carbide powder having an average particle size of about 2 μm is mixed with 2% by weight of BeO powder as a sintering aid on the basis of the silicon carbide powder, and the mixture is molded and sintered by vacuum hot pressing at 300 kg/cm2 and 2050° C. for 30 minutes. The resulting sintered SiC-based substrate having a relative density of 99% or more is subjected to oxidation treatment at 1200° C. in an oxygen-steam atmosphere to form a hot oxidized layer of SiO2 having a thickness of 0.5 μm. Then, fine powder of borosilicate-based pyrex glass, code No. 7740 of Iwaki Glass Co., Ltd, Japan (composition by weight: 80.9% SiO2, 2.3% Al2 O3, 0.03% Fe2 O3, 12.7% B2 O3, 4.0% Na2 O and 0.04% K2 O; coefficient of thermal expansion at room temperature: 3.5×10-6 /°C.) is deposited on the hot-oxidized layer of SiO2 by centrifugal settling, and heated above the softening point of the pyrex glass to form a smooth non-porous glass layer having a glass glaze surface and a thickness of 0.1 mm on the hot oxidized layer of SiO2 on the substrate. The SiC-based substrate has a resistivity of 1010 Ω.cm or more, a coefficient of thermal expansion of 3.5×10-6 /°C. and a thermal conductivity of 0.7 cal/cm.sec.°C.
As shown in FIGS. 3 or 4, a silicon semiconductor chip 14 or 24, a lead frame 13 or 23 and an alumina ceramic cap 12 or 22 are bonded to a substrate 11 or 21 with a thin SiO2 layer (not indicated in the drawing) through a glass layer 10 or 20 in the following manner.
First of all, an Au-Si eutectic solder is provided on the desired part 18 or 28 for a silicon semiconductor chip on the glass layer 10 or 20 on the SiC-based ceramic substrate 11 or 21 with a thin SiO2 layer and a solder glass No. 2 as given before is provided by prebaking on the edge parts 15 or 25 for the lead frame 13 or 23 on the glass layer 10 or 20 on the substrate 11 or 21. Then, the lead frame 13 or 23 is placed on the prebaked edge parts 15 or 25 and baked, and also the silicon semiconductor chip 14 or 24 is placed on the part 18 or 28 and baked. Then, a wire bondings 16 or 26 are provided between the frame lead 13 or 23 and the silicon semiconductor chip 14 or 24. On the other hand, the solder glass No. 2 is prebaked on the necessary parts 17 or 27 on the alumina ceramic cap 12 or 22 and then the cap 12 or 22 is bonded to the frame lead 13 or 23 by baking. In FIG. 4, a cooling fin 29 is further bonded to the back side of the substrate 21 by the solder glass No. 2.
Sealing part 17 or 27 of Al2 O3 ceramic cap has a helium gas leakage of less than 1×10-7 cc/sec, and thus is in a good hermetic sealing. The glass layer and the Au-Si joints on the glass layer on the substrate are not damaged by a thermal change at the bonding, and it is found that the substrate has a good strength.
Semiconductor devices with the substrate of the present Example, which have a glass layer provided thereon with a lead frame, a silicon semiconductor chip, and a Al2 O3 ceramic cap through a solder glass or Au-Si eutectic solder, are subjected to an actual load test and a thermal cycle test of cooling and heating and have been found quite satisfactory, and practically applicable.
For example, in the semiconductor device of the first embodiment, as described before, glass sealing of the alumina ceramic cap to the substrate by a sealing glass corresponding to 15 and 17 in FIG. 3 or 20 and 27 in FIG. 4 is preferably carried out at a sealing temperature of 450° C. or less to protect aluminum bonding wires to semiconductor elements from a damage by heating for glass sealing. However, a low melting point glass having a sealing temperature of 450° C. or less generally has a high coefficient of thermal expansion, for example, 6×10-7 /°C. or more, and when a SiC-based ceramic substrate is sealed with such sealing glass, cracks occur. in the sealing glass owing to a large difference in thermal expansion therebetween, resulting in gas leakage into the packaged semiconductor device or peeling-off of the sealing glass.
The glass layer on the thin SiO2 layer on the substrate is thus effective for preventing the sealing glass from such troubles as mentioned above. That is, the glass layer to be formed on the SiO2 layer on the non-oxide ceramic base can buffer the thermal strain due to the difference in thermal expansion and helps to provide a crack-free glass seal, when a glass having an intermediate coefficient of thermal expansion between that of the SiC-based ceramic base and that of the sealing glass is selected for the glass layer.
The third aspect of the present invention is to use a substrate comprising a non-oxide ceramic base of, for example, SiC, a SiO2 layer formed on the surface of the ceramic base as a first film capable of reacting with glass and a thick film conduit of a mixture of conductor and glass provided on the SiO2 layer through bonding by reaction as a second layer, where the non-oxide base and the first film are the same as used in the second aspect of the present invention, and the second layer is made of a mixture of conductor and glass most suitable for forming a thick film circuit. The mixture is preferably a paste of a mixture of glass powder and metal powder or metal compound powder in an organic solvent, and is applied to the necessary parts for a circuit on the SiO2 layer of the non-oxide ceramic base. The metal compound can be a conductor or a semiconductor, and can be a compound decomposable to a metal by decomposition at the baking, for example, oxide of Ag or Pd.
In the present invention, at least the second layer can be further coated with a glass overcoat, which can also react with the first SiO2 layer formed on the non-oxide ceramic substrate to form firm adhesion, and thus the second layer can be thoroughly protected thereby.
A thick film paste shown in Table 1 is applied to the same sintered SiC-based ceramic substrate as preparing in Example 1 by printing without forming an oxide layer thereon, and baked. The bonding strength of the baked thick film is 0.30-0.61 kg/mm2 and is not satisfactory. The vehicle for the paste is 7% ethylcellulose/carbitol acetate having a viscosity of about 100,000 centipoises. The application of the paste by printing is carried out by masking unwanted parts for paste application with a photoresist, and then applying a paste shown in Table 1, and then by baking the applied paste at 800°-850° C. The resulting thick film has a thickness of 25 μm. The bonding strength is measured by bonding a tensile test piece to the surface of the thick film on the ceramic substrate and then subjecting the bonded substrate to a tensile test.
TABLE 1__________________________________________________________________________Thick    Proportion of metal         Metal-glass                    Bondingfilm    powder (wt. %)         ratio (wt. %)                  Glass composition (wt. %)                                        strengthpaste    Ag Pd    Au Pt         Metal             Glass                 B2 O3                    Bi2 O3                        PbO                           SiO2                              Al2 O3                                  ZnO                                     CaO                                        (kg/mm2)__________________________________________________________________________1   70 30    -- --         80  20  20 40  20 10 2   5  3  0.422   -- 30    70 --         "   "   "  "   "  "  "   "  "  0.573   -- --    80 20         "   "   "  "   "  "  "   "  "  0.304   70 30    -- --         "   "   20 50  10 10 "   "  "  0.61 -5 " " -- -- 85 15 " " "                                        1" "  " " 0.456   "  " -- --         80  20  30 30  30 10 "   "  "  0.387   80 20    -- --         85  15  10 10  40 30 3   3  4  0.528   "  " -- --         "   "   10  5  60 20 2   3  -- 0.439   "  " -- --         90  10  "  "   "  "  "   "  -- 0.3910  "  " -- --         85  15  20 20  40 15 3   2  -- 0.48__________________________________________________________________________
The same sintered SiC-based ceramic substrate, as prepared in Example 1, is subjected to oxidation treatment at 1,300° C. in air for a varied oxidation time to form an oxide film, and then a conductor paste shown in Table 1 is applied to the oxide film by printing in the same manner as in Comparative Example to form a thick film thereof. The bonding strength of the thick film is shown in Table 2, and can be considerably improved, as shown in FIG. 5. Particularly when the thickness of an oxide film is 0.1-0.5 μm, the bonding strength is 2 kg/mm2 or higher, and thus practically large enough.
FIG. 6 is a schematic cross-sectional view showing a SiC-based ceramic substrate 1 with a SiO layer 2 having a thickness of 0.10 μm, and a conductor 4 provided partly on the SiO2 layer and prepared from the thick film paste No. 1 shown in Table 1 and a resistor 5 provided on the conductor and the exposed SiO2 layer and prepared from a thick film paste consisting of 8.2% by weight of Ag and 18.8% by weight of Pb, the balance being the glass of the thick film paste No. 1 shown in Table 1 to a thickness of about 20 to about 25 μm.
TABLE 2______________________________________Thick filmpaste No.(correspond-      Oxidation  Oxide film                           Bondinging to     time       thickness strengthTable 1)   (min.)     (&#956;m)   (kg/mm2)______________________________________1           0          0.008    0.421           1         0.01      1.301           5         0.07      2.161           8         0.10      2.321          60         0.50      2.291          200        1.00      1.641          400        1.30      0.694           1         0.01      1.234          60         0.50      2.084          400        1.30      0.527          60         0.50      2.489          60         "         2.123          60         "         2.34______________________________________
A glass overcoat paste comprising 10% by weight of PbO, 20% by weight of SiO2, 10% by weight of Al2 O3, 20% by weight of CdO, and 40% by weight of B2 O3 is applied to the wanted parts on the surface of the same substrate having a 0.10 μm-thick oxide layer and the thick film conductor and resistor based on the thick film paste No. 1 and baked thereon as prepared in Example 2, and heated at 700° C. for 10 minutes. The unovercoated parts are destined for conductor terminals, condensers, etc.
FIG. 7 shows a schematic cross-sectional view of the substrate having a glass overcoat 6 on the thick film circuit of conductor 4 and resistor 5 on the SiO2 layer 2 on the substrate 1 shown in FIG. 6.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS3408228 *Feb 24, 1965Oct 29, 1968Nat Res DevElectrical insulating bodiesUS3576668 *Jun 7, 1968Apr 27, 1971United Aircraft CorpMultilayer thick film ceramic hybrid integrated circuitUS3650778 *Oct 29, 1969Mar 21, 1972Fairchild Camera Instr CoLow-expansion, low-melting zinc phosphovanadate glass compositionsUS3718608 *Oct 6, 1969Feb 27, 1973Owens Illinois IncResistor compositions for microcircuitryUS3825442 *Sep 27, 1972Jul 23, 1974Intel CorpMethod of a semiconductor device wherein film cracking is prevented by formation of a glass layerUS3900330 *Mar 22, 1973Aug 19, 1975Nippon Electric Glass CoZno-b' 2'o' 3'-sio' 2 'glass coating compositions containing ta' 2'o' 5 'and a semiconductor device coated with the sameUS4073657 *Jul 16, 1976Feb 14, 1978Motorola, Inc.Glass for semiconductorsUS4172109 *Aug 28, 1978Oct 23, 1979The Carborundum CompanyPressureless sintering beryllium containing silicon carbide powder compositionUS4352120 *Apr 22, 1980Sep 28, 1982Hitachi, Ltd.Semiconductor device using SiC as supporter of a semiconductor elementUS4396935 *Oct 6, 1980Aug 2, 1983Ncr CorporationVLSI Packaging systemEP0028802A1 *Nov 4, 1980May 20, 1981Hitachi, Ltd.Electrically insulating substrate and a method of making such a substrateJPS5615047A * Title not available* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS4650922 *Mar 11, 1985Mar 17, 1987Texas Instruments IncorporatedThermally matched mounting substrateUS4651192 *Jul 3, 1985Mar 17, 1987Hitachi, Ltd.Ceramic packaged semiconductor deviceUS4663649 *Jun 16, 1983May 5, 1987Hitachi, Ltd.SiC sintered body having metallized layer and production method thereofUS4729010 *Jul 30, 1986Mar 1, 1988Hitachi, Ltd.Integrated circuit package with low-thermal expansion lead piecesUS4761345 *Feb 20, 1987Aug 2, 1988Kabushiki Kaisha ToshibaAluminum nitride substrateUS4769345 *Mar 12, 1987Sep 6, 1988Olin CorporationProcess for producing a hermetically sealed package for an electrical component containing a low amount of oxygen and water vaporUS4784974 *Oct 31, 1986Nov 15, 1988Olin CorporationMethod of making a hermetically sealed semiconductor casingUS4796077 *Aug 11, 1987Jan 3, 1989Hitachi, Ltd.Electrical insulating, sintered aluminum nitride body having a high thermal conductivity and process for preparing the sameUS4843188 *Mar 25, 1986Jun 27, 1989Western Digital CorporationIntegrated circuit chip mounting and packaging assemblyUS4926242 *Apr 20, 1987May 15, 1990Sumitomo Electric Industries, Ltd.Aluminum-silicon alloy heatsink for semiconductor devicesUS4953006 *Jul 27, 1989Aug 28, 1990Northern Telecom LimitedPackaging method and package for edge-coupled optoelectronic deviceUS4961106 *Aug 31, 1987Oct 2, 1990Olin CorporationMetal packages having improved thermal dissipationUS5016089 *Jan 4, 1989May 14, 1991Hitachi, Ltd.Substrate for hybrid IC, hybrid IC using the substrate and its applicationsUS5057648 *Nov 20, 1989Oct 15, 1991Westinghouse Electric Corp.High voltage hybrid packageUS5057908 *Jul 10, 1990Oct 15, 1991Iowa State University Research Foundation, Inc.High power semiconductor device with integral heat sinkUS5087509 *May 18, 1990Feb 11, 1992Mitsubishi Metal CorporationSubstrate used for fabrication of thick film circuitUS5134029 *Jul 25, 1991Jul 28, 1992Mitsubishi Material CorporationSubstrate used for fabrication of thick film circuitUS5138426 *Sep 20, 1989Aug 11, 1992Ngk Insulators, Ltd.Ceramic joined bodyUS5362226 *Sep 25, 1992Nov 8, 1994Asahi Kasei Kogyo Kabushiki KaishaMold for synthetic resin moldingUS5466488 *Feb 8, 1994Nov 14, 1995Mitsubishi Materials CorporationMethod of making glazed AlN substrate with an Al2 O3 -SiO2 interfacial layerUS5508559 *Apr 25, 1994Apr 16, 1996Motorola, Inc.Power circuit packageUS5616956 *Sep 7, 1995Apr 1, 1997Kabushiki Kaisha ToshibaCircuit substrate including insulating layer of aluminum nitride and electrically conductive layer of conductive component, aluminum nitride and other components, and semiconductor device containing sameUS5977620 *May 19, 1998Nov 2, 1999Samsung Aerospace Industries, Ltd.Lead frame having a Ni-Mn alloy layer and a Pd layerUS6891263 *Feb 7, 2001May 10, 2005Ibiden Co., Ltd.Ceramic substrate for a semiconductor production/inspection deviceUS6979894 *Sep 27, 2001Dec 27, 2005Marvell International Ltd.Integrated chip package having intermediate substrateUS6995463 *Jan 16, 2003Feb 7, 2006Marvell International Ltd.Integrated chip package having intermediate substrate and multiple semiconductor chipsUS8525317May 20, 2005Sep 3, 2013Marvell International Ltd.Integrated chip package having intermediate substrate with capacitorUS20030047802 *Feb 7, 2001Mar 13, 2003Yasuji HiramatsuCeramic substrate for a semiconductor production/inspection deviceUS20030230403 *Jun 14, 2002Dec 18, 2003Webb Brent J.Conductive thermal interface and compoundUS20130220676 *Nov 11, 2011Aug 29, 2013Tyk CorporationElectronic circuit and heat sinkUSRE37082Apr 14, 1994Mar 6, 2001Stmicroelectronics, Inc.RF transistor package with nickel oxide barrierWO1988007761A1 *Mar 22, 1988Oct 6, 1988Olin CorporationMetal packages having improved thermal dissipation* Cited by examinerClassifications U.S. Classification257/705, 257/706, 257/E23.192, 257/E23.189, 257/E23.009International ClassificationH01L23/057, H01L23/15, H01L23/08Cooperative ClassificationH01L2924/14, H01L24/45, H01L2224/45124, H01L24/48, H01L23/15, H01L2924/1532, H01L2924/16152, H01L2924/1517, H01L2924/01079, H01L2924/01078, H01L2924/01025, H01L2224/48247, H01L2924/01046, H01L23/08, H01L2924/0102, H01L2924/15153, H01L23/057, H01L2924/01322, H01L2224/73265, H01L2924/01004European ClassificationH01L23/15, H01L23/057, H01L23/08Legal EventsDateCodeEventDescriptionDec 10, 1982ASAssignmentOwner name: HITACHI, LTD., 5-1, MARUNOUCHI 1-CHOME, CHIYODA-KUFree format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:MATSUSHITA, YASUO;NAKAMURA, KOUSUKE;URA, MITSURU;REEL/FRAME:004076/0538Effective date: 19821203Sep 26, 1988FPAYFee paymentYear of fee payment: 4Dec 15, 1992REMIMaintenance fee reminder mailedMay 16, 1993LAPSLapse for failure to pay maintenance feesAug 3, 1993FPExpired due to failure to pay maintenance feeEffective date: 19930516RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services