Source: http://www.google.com/patents/US7152803?ie=ISO-8859-1&dq=5,893,120
Timestamp: 2015-01-28 12:17:51
Document Index: 101533591

Matched Legal Cases: ['art 4', 'art 4', 'art 4', 'art 4', 'art 4', 'art 4']

Patent US7152803 - Smart label web and a method for its manufacture - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsThe present invention relates to manufacture of a smart label web, the smart label web comprising smart labels one after another and/or side by side. The smart label web comprises also a circuitry pattern and an integrated circuit on a chip attached to it. In the method, an electric contact is formed...http://www.google.com/patents/US7152803?utm_source=gb-gplus-sharePatent US7152803 - Smart label web and a method for its manufactureAdvanced Patent SearchPublication numberUS7152803 B2Publication typeGrantApplication numberUS 10/869,586Publication dateDec 26, 2006Filing dateJun 16, 2004Priority dateDec 21, 2001Fee statusPaidAlso published asDE10297573T5, US20050087607, WO2003056509A1Publication number10869586, 869586, US 7152803 B2, US 7152803B2, US-B2-7152803, US7152803 B2, US7152803B2InventorsSamuli Str�mbergOriginal AssigneeUpm Rafsec OyExport CitationBiBTeX, EndNote, RefManPatent Citations (111), Referenced by (2), Classifications (13), Legal Events (5) External Links: USPTO, USPTO Assignment, EspacenetSmart label web and a method for its manufactureUS 7152803 B2Abstract The present invention relates to manufacture of a smart label web, the smart label web comprising smart labels one after another and/or side by side. The smart label web comprises also a circuitry pattern and an integrated circuit on a chip attached to it. In the method, an electric contact is formed between the integrated circuit on the chip and the circuitry pattern on the smart label of the smart label web in such a way that a structural part separated from a separate carrier web and containing the integrated circuit on the chip is electrically connected to the smart label by pressing mechanically. The structural part or the smart label comprises a thermoplastic film whereby the structural part is attached to the smart label substantially entirely.
BACKGROUND For attaching an integrated circuit on a chip in such a way that it is in electrical contact with a circuitry pattern, methods are known for direct attachment of the chip by flip-chip technology, or the chip can be attached in such a way that a separate structural part, onto whose surface the chip is attached, is connected to the smart label.
SUMMARY By means of the method and the smart label web according to the invention, it is possible to reduce the above-mentioned problems. The method of the invention for the manufacture of a smart label web is characterized in that the structural part or the smart label comprises a thermoplastic film whereby the structural part is attached to the smart label substantially entirely. The smart label web according to the invention is characterized in that the structural part or the smart label comprises a thermoplastic film whereby the structural part is attached to the smart label substantially entirely.
Integrated circuits on chips are attached one after another and/or next to each other on the surface of the base web by using flip-chip technology. The chips are picked up from the silicon wafer by means of a die sorter and placed in a continuous manner onto the surface of the base web. Possible techniques to attach the chip to the base web include technologies known as such, such as placing a chip by a die sorter on a piece of a blister tape attached to the smart label. The chip can also be placed in a recess formed in the base web. Then contact pads of the chip are in the level of the upper surface of the base web or they are formed at the ends of the chip. The other way to put a chip into a recess is to put it so that the active side of the chip is on the upper level of the chip. The chip is in two previous cases relatively thin, at the most 70 m, typically 50�70 m. Because the dimensions of the structural part to be formed of the carrier web are small, it is possible to place chips relatively close to each other on the carrier web, and thereby long paths will not be needed for attaching the chip. With short paths, it is possible to implement sufficiently accurate positioning more easily than on attachment of the chip directly to the circuitry pattern. Furthermore, the position of the chip on the structural part may vary within a larger range.
BRIEF DESCRIPTION OF THE DRAWINGS In the following, the invention will be described with reference to the appended drawings, in which
DETAILED DESCRIPTION FIG. 1 a shows a circuitry pattern 2 of a smart label 1. During processing, smart labels are in a web form, the web comprising successive and/or adjacent smart labels. The ends of the circuitry pattern are indicated with reference numbers 2 a and 2 b. FIG. 1 b shows a structural part 4. The structural part 4 comprises a base web 4 b, an integrated circuit 3 on a chip and a thermoplastic film 4 a, attached to the surface of the base web (shown in FIG. 2). The contact points made of conductive material are indicated with reference numbers 2 c and 2 d. FIG. 1 c shows a smart label 1 comprising a circuitry pattern 2 and an integrated circuit 3 on a chip, attached to the surface of a separate structural part 4. An electrical contact is formed between the circuitry pattern 2 and the integrated circuit 3 on the chip by aligning points 2 b and 2 c in one end of the structural part and points 2 a and 2 d in the other end of the structural part. The joint is made by mechanical pressing from at least one end of the structural part. The structural part 4 is attached to the smart label 1 in such a way that substantially the whole area of its one side is attached to the smart label 1 by means of a thermoplastic film. The integrated circuit on the chip 3 is left between the base web 4 b and the thermoplastic film 4 a. The structural part 4 and/or the circuitry pattern 2 of the smart label can be provided with bumps for providing an electrical contact. The bumps can be provided before the lamination or the extrusion of the thermoplastic film on the same production line on which the chip is attached to the base web in such a way that suitable bumps, whose material can be a suitable metal, are formed at the ends of the structural part 4. So-called stud bumps can be formed at this process step by means of a gold wire bonder but they are not essential.
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FrenchRead and write playing careClassifications U.S. Classification235/492, 235/488International ClassificationG06K19/077, G06K19/06, B29C65/02Cooperative ClassificationG06K19/07749, G06K19/0775, G06K19/07783, G06K19/07779European ClassificationG06K19/077T2, G06K19/077T7C1, G06K19/077T7C1C, G06K19/077TLegal EventsDateCodeEventDescriptionJun 5, 2014FPAYFee paymentYear of fee payment: 8Oct 10, 2012ASAssignmentOwner name: SMARTRAC IP B.V., NETHERLANDSFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:UPM RAFLATAC OY;REEL/FRAME:029103/0366Effective date: 20120927Jun 28, 2010FPAYFee paymentYear of fee payment: 4Apr 11, 2007ASAssignmentOwner name: UPM RAFLATAC OY, FINLANDFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:UPM RAFSEC OY;REEL/FRAME:019147/0058Effective date: 20070308Dec 27, 2004ASAssignmentOwner name: UPM RAFSEC OY, FINLANDFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:STROMBERG, SAMULI;REEL/FRAME:015489/0259Effective date: 20041123RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services