Source: https://patents.google.com/patent/US8934525B2/en
Timestamp: 2019-01-17 18:04:51
Document Index: 704974853

Matched Legal Cases: ['§112', 'Application No. 200880001824', 'Application No. 08705518', 'Application No. 12170931', 'Application No. 12170931', 'Application No. 12170935', 'Application No. 08705518', 'Application No. 08705518']

US8934525B2 - High-speed signaling systems and methods with adaptable, continuous-time equalization - Google Patents
US8934525B2
US8934525B2 US12522362 US52236208A US8934525B2 US 8934525 B2 US8934525 B2 US 8934525B2 US 12522362 US12522362 US 12522362 US 52236208 A US52236208 A US 52236208A US 8934525 B2 US8934525 B2 US 8934525B2
US12522362
US20100008414A1 (en )
While the present invention has been described in connection with specific embodiments, variations of these embodiments will be obvious to those of ordinary skill in the art. For example, the depicted embodiments are signal-data-rate (SDR) systems, but other embodiments may support e.g. double-data-rate (DDR) or quad-data-rate (QDR) operation instead of or in addition to SDR operation. Furthermore, the receivers described above employ current-mode signaling, but might also be adapted to employ voltage-mode schemes in which signals are conveyed as modulated voltages. Voltage thresholds may also be employed in the latter case by simply converting current signals to voltage for comparison with a voltage reference. In addition, embodiments of the invention may be adapted for use with multi-pulse-amplitude-modulated (multi-PAM) signals, and PrDFE taps can be inserted after equalizer 120. Moreover, some components are shown directly connected to one another while others are shown connected via intermediate components. In each instance the method of interconnection, or “coupling,” establishes some desired electrical communication between two or more circuit nodes, terminals, or ports. Such coupling may often be accomplished using a number of circuit configurations, as will be understood by those of skill in the art. Therefore, the spirit and scope of the appended claims should not be limited to the foregoing description. Where U.S. law applies, only those claims specifically reciting “means for” or “step for” should be construed in the manner required under the sixth paragraph of 35 U.S.C. §112.
1. An integrated circuit to receive a series of symbols over a communication channel, the integrated circuit comprising:
a continuous-time equalizer to reduce intersymbol interference from a most-recently received symbol in the series;
a decision-feedback equalizer to reduce intersymbol interference from symbols other than the most-recently received symbol in the series;
a data sampler to produce data samples from an equalized signal generated by the continuous-time equalizer and the decision-feedback equalizer; and
an adaptation engine to separately adjust a a low-frequency gain and a high-frequency gain provided by the continuous-time equalizer in dependence on the most-recently received symbol in the series, the adaptation engine to adjust an amount of equalization provided by the decision-feedback equalizer in dependence on the symbols other than the most-recently received symbol in the series and independent of the most-recently received symbol in the series.
2. The integrated circuit of claim 1, the adaptation engine to adjust the low-frequency gain and the high-frequency gain in dependence on the most-recently received symbol in the series and a current symbol in the series.
3. The integrated circuit of claim 1, where:
the continuous-time equalizer is to reduce the intersymbol interference associated only with the most-recently received symbol in the series and the decision-feedback equalizer is to reduce the intersymbol interference only from symbols other than the most-recently received symbol in the series.
4. The integrated circuit of claim 3, the adaptation engine to adjust the low-frequency gain responsive to a comparison between an error sample and one of the data samples.
5. The integrated circuit of claim 1, where the adaptation engine adjusts the low-frequency gain relative to the high-frequency gain in dependence on the most-recently received symbol.
6. An integrated circuit to receive a series of symbols over a communication channel, the integrated circuit comprising:
a data sampler to produce data samples from an equalized signal generated by the continuous-time equalizer and the decision-feedback equalizer;
an adaptation engine to generate a first control value to adjust a low-frequency gain provided by the continuous-time equalizer and at least a second control value to adjust a high-frequency gain provided by the continuous-time equalizer, the first or the second control values being controlled so as to reduce intersymbol interference from the most-recently received symbol in the series; and
a second sampler to generate error samples representing divergence of the equalized signal from an expected data-carrying level of the equalized signal;
the adaptation engine to generate the first control value responsive to the error samples.
7. An integrated circuit to receive a series of symbols over a communication channel, the integrated circuit comprising:
an adaptation engine responsive to the error samples to control the continuous-time equalizer to urge a data-carrying level of the equalized signal for a current symbol toward the expected data-carrying level; and
a data filter to enable change in control of the continuous-time equalizer only when incoming symbols match predetermined values.
8. A method for sampling a series of symbols over a communication channel, the series of symbols including an incoming symbol and a most-recently-received symbol immediately preceding the incoming symbol, the method comprising:
applying decision-feedback equalization to the first equalized signal to produce a second equalized signal;
where the applying continuous-time equalization includes reducing intersymbol interference from the most-recently-received symbol, and where applying decision feedback equalization includes using one or more taps to produce the second equalized signal in a manner in which none of the one or more taps is dependent upon the most-recently-received sample for the most-recently-received symbol; and
controlling low-frequency gain of the continuous-time equalization relative to high-frequency gain of the continuous-time equalization and responsively adjusting continuous-time equalization so as to reduce the intersymbol interference from the most-recently-received prior symbol, and adjusting decision-feedback equalization so as to reduce intersymbol interference in the first equalized signal not attributable to the most-recently-received symbol;
where the applying continuous-time equalization further includes providing a first gain for low frequencies and a second gain for high frequencies, and both decreasing the low frequency gain and increasing the high frequency gain if a current error sample has the same logic value as a data value of an immediately preceding symbol.
9. The method of claim 8, where controlling the low-frequency gain of the continuous-time equalization includes adjusting the low-frequency gain of the continuous-time equalization in dependence upon an expected data-carrying level of the incoming signal.
10. The method of claim 8, further comprising generating error samples representing differences between expected data-carrying levels and equalized-signal levels, and adjusting the continuous-time equalization responsive to the error samples.
11. The integrated circuit of claim 1, the adaptation engine to adjust at least one of the low-frequency gain or the high-frequency gain in dependence on the most-recently received symbol in the series and a current symbol in the series.
12. The integrated circuit of claim 1, where the adaptation engine adjusts both the low-frequency gain and the high-frequency gain in dependence on the most-recently received symbol.
13. The integrated circuit of claim 12, wherein the adaptation engine adjusts both the low-frequency gain and the high-frequency gain in dependence on an error sample.
14. The integrated circuit of claim 1, further comprising an error sampler to produce error samples, the adaptation engine to adjust the low-frequency gain and the high-frequency gain responsive comparisons between the error samples and the data samples.
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