Source: http://www.google.com/patents/US7977961?dq=6,275,983
Timestamp: 2017-04-24 13:24:30
Document Index: 180764773

Matched Legal Cases: ['Application No. 2008', 'art 3', 'art 3', 'arts 5', 'art 3', 'art 4', 'art 4', 'arts 25', 'arts 25', 'art 17', 'art 17', 'art 30', 'arts 36', 'arts 36', 'arts 41', 'arts 41', 'art 50', 'arts 50', 'arts 50', 'art 50', 'arts 50', 'arts 25', 'art 25', 'art 25', 'Application No. 10']

Patent US7977961 - Component for testing device for electronic component and testing method of ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA component for a testing device for an electronic component includes a testing board; a projection electrode provided on a main surface of the testing board; a positioning part provided on the main surface of the testing board, the positioning part being configured to position the electronic component;...http://www.google.com/patents/US7977961?utm_source=gb-gplus-sharePatent US7977961 - Component for testing device for electronic component and testing method of the electronic componentAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS7977961 B2Publication typeGrantApplication numberUS 12/358,522Publication dateJul 12, 2011Filing dateJan 23, 2009Priority dateJun 9, 2008Fee statusPaidAlso published asCN101604000A, CN101604000B, US20090302876Publication number12358522, 358522, US 7977961 B2, US 7977961B2, US-B2-7977961, US7977961 B2, US7977961B2InventorsDaisuke Koizumi, Naohito Kohashi, Yuji AkasakiOriginal AssigneeFujitsu Semiconductor LimitedExport CitationBiBTeX, EndNote, RefManPatent Citations (8), Non-Patent Citations (1), Classifications (6), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetComponent for testing device for electronic component and testing method of the electronic component
US 7977961 B2Abstract
A component for a testing device for an electronic component includes a testing board; a projection electrode provided on a main surface of the testing board; a positioning part provided on the main surface of the testing board, the positioning part being configured to position the electronic component; and a pressing part configured to press the electronic component being positioned by the positioning part and make a lead part of the electronic component come in contact with the projection electrode so that the lead part is elastically deformed and made come in contact with the projection electrode.
wherein the step of mounting operation is performed in a state in which the lead parts of the electronic component is being positioned. Description
This patent application is based upon and claims the benefit of priority of Japanese Patent Application No. 2008-150895 filed on Jun. 9, 2008, the entire contents of which are hereby incorporated herein by reference.
The embodiments discussed herein are related to components for testing devices for electronic components and a testing method of the electronic components.
Recently, as miniaturization, thin size, and high functions are demanded for electronic apparatuses such as mobile communication apparatuses, miniaturization, thin size, and high functions are required for semiconductor devices provided inside the electronic apparatuses. Because of this, for example, a CSP (Chip Size Package) type semiconductor device which is a package having dimensions equal to or slightly larger than those of the semiconductor element has been suggested.
A semiconductor package mounting part 3 a is provided in a substantially center of the socket 3. Plural contacts 3 b having spring properties are provided outside the semiconductor package mounting part 3 a. End parts of the contacts 3 b are inserted in through holes 6 formed in the burn-in board 1 and fixed to the burn-in board 1 by solder. When contact parts 5 a extending inside the cover 5 come in contact with the contacts 3 b, the other end parts of the contacts 3 b come in contact with leads 4 a of the semiconductor package 4 mounted on the semiconductor package mounting part 3 a. The leads 4 a of the semiconductor package 4 are provided on two side surfaces facing each other of a resin part 4 b. The resin part 4 b seals the semiconductor element. The leads 4 a are made of, for example, a copper (Cu) alloy or an iron-nickel (Fe—Ni) alloy.
According to an aspect of the invention, a component for a testing device for an electronic component includes a testing board; a projection electrode provided on a main surface of the testing board; a positioning part provided on the main surface of the testing board, the positioning part being configured to position the electronic component; and a pressing part configured to press the electronic component being positioned by the positioning part and make a lead part of the electronic component come in contact with the projection electrode so that the lead part is elastically deformed and made come in contact with the projection electrode.
FIG. 1 is a perspective view of a related art burn-in board where IC sockets are provided;
A burn-in board 11 which is an example of a component for a testing device of a first embodiment is illustrated in FIG. 4. The burn-in board 11 is used for a burn-in process wherein an accelerated test is performed so that temperature and voltage stresses are applied to the semiconductor element.
The contact board 21 has a base member made of an insulation material 21 a such as glass epoxy resin or FRP (Fiber Reinforced Plastic). Pads (electrodes) 26 are formed on external circumferential surfaces (hatched portions of the contact board 21 in FIG. 6) of parts of the contact board 21 where the lead parts 25 come in contact. The pads (electrodes) 26 are made of a copper (Cu) foil and gold (Au) plating or a copper (Cu) foil and nickel-gold (Ni—Au) plating.
The contact pad 31 is made of, for example, a copper (Cu) foil and gold (Au) plating or a copper (Cu) foil and nickel-gold (Ni—Au) plating. The contact pads 31 are situated in positions of the lead parts 25 provided on two side surfaces facing each other of the resin part 17 a of the semiconductor package 17 when the resin part 17 a of the semiconductor package 17 is positioned the concave part 30.
Plural (four in the example illustrated in FIG. 13) step parts 36 are formed with a designated length in a longitudinal direction of the contact board 35. Pads (electrodes) 37 are formed on bottom surfaces of the step parts 36. The pads (electrodes) 37 are made of, for example, a copper (Cu) foil and gold (Au) plating or a copper (Cu) foil and nickel-gold (Ni—Au) plating.
Plural concave parts 41 are formed with a designated length in a longitudinal direction of the contact board 40. Pads (electrodes) 42 are formed on portions of the upper surface of the contact board 40 where the concave parts 41 are formed. The pads (electrodes) 42 are made of, for example, a copper (Cu) foil and gold (Au) plating or a copper (Cu) foil and nickel-gold (Ni—Au) plating.
Each of the chip components 50 includes an element part 50 a such as a resistance element or a condenser element and pad (electrode) parts 50 b and 50 c. The pad (electrode) parts 50 b and 50 c are provided one at each end of the element part 50 a and have rectangular-shaped configurations. The pad parts 50 b are made of, for example, a copper (Cu) foil and gold (Au) plating or a copper (Cu) foil and nickel-gold (Ni—Au) plating.
In the meantime, in the example illustrated in FIG. 7, the contact board 21 has a base member made of an insulation material 21 a such as glass epoxy resin or FRP (Fiber Reinforced Plastic). Pads (electrodes) 26 are formed on external circumferential surfaces (hatched portions of the contact board 21 in FIG. 6) of parts of the contact board 21 where the lead parts 25 come in contact. The pads (electrodes) 26 are made of a copper (Cu) foil and gold (Au) plating or a copper (Cu) foil and nickel-gold (Ni—Au) plating. See FIG. 16( a).
In a fifth example of the first embodiment illustrated in FIG. 16( b), a first layer 60 is formed on an external circumferential surface of a portion of the contact board 21 where the lead part 25 comes in contact. The first layer 60 is made of, for example, a copper (Cu) foil and gold (Au) plating or a copper (Cu) foil and nickel-gold (Ni—Au) plating which is a material of the pad 26 in the example illustrated in FIG. 16( a). In addition, a second conductive layer 61 made of a conductive material is formed on the first layer 60 situated on the upper surface of the contact board 21. More specifically, the second layer 61 is made of, for example, a material having conductivity and elasticity such as a silicon conductive rubber or a material having conductivity and high hardness such as palladium (Pd) or rhodium (Rh).
In a sixth modified example illustrated in FIG. 16( c) of the first embodiment, a first layer 60 is formed on an external circumferential surface of a portion of the contact board 21 where the lead part 25 comes in contact. The first layer 60 is made of, for example, a copper (Cu) foil and gold (Au) plating or a copper (Cu) foil and nickel-gold (Ni—Au) plating which is a material of the pad 26 in the example illustrated in FIG. 16( a). In addition, a convex-shaped electrode 62 is provided in the vicinity of the external edge part on the first layer 60 situated on the upper surface of the contact board 21.
In the above-mentioned first embodiment, the burn-in board 11 is discussed as an example of the component for the testing device. However, as illustrated in FIG. 18, plural (four in the example illustrated in FIG. 18) contactors 13 are mounted and the pressing plate 14 is provided on the main surface of a base board 80 which is a board other than the burn-in board 11.
An embodiment of the present invention can be applied to a testing board for performing a final test of the semiconductor package.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4766371 *Jun 19, 1986Aug 23, 1988Risho Kogyo Co., Ltd.Test board for semiconductor packagesUS5180974 *May 26, 1992Jan 19, 1993Micron Technology, Inc.Semiconductor testing and shipping systemUS5528466 *Sep 26, 1994Jun 18, 1996Sunright LimitedAssembly for mounting and cooling a plurality of integrated circuit chips using elastomeric connectors and a lidUS5990692May 9, 1997Nov 23, 1999Samsung Electronics Co., Ltd.Testing apparatus for non-packaged semiconductor chipUS6203332 *Dec 16, 1999Mar 20, 2001Fujitsu LimitedAttachment structure of semiconductor device socketJP2920859B2 Title not availableJP2004085424A Title not availableJPH1090350A Title not available* Cited by examinerNon-Patent CitationsReference1Korean Notice of Preliminary Rejection, English-language translation, mailed Nov. 29, 2010 for corresponding Korean Application No. 10-2009-0010096.Classifications U.S. Classification324/756.07, 324/756.01International ClassificationG01R31/00Cooperative ClassificationG01R31/2863, G01R31/2865European ClassificationG01R31/28G2B2Legal EventsDateCodeEventDescriptionFeb 3, 2009ASAssignmentOwner name: FUJITSU MICROELECTRONICS LIMITED, JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KOIZUMI, DAISUKE;KOHASHI, NAOHITO;AKASAKI, YUJI;REEL/FRAME:022198/0947Effective date: 20090113Jul 9, 2010ASAssignmentOwner name: FUJITSU SEMICONDUCTOR LIMITED, JAPANFree format text: CHANGE OF NAME;ASSIGNOR:FUJITSU MICROELECTRONICS LIMITED;REEL/FRAME:024651/0744Effective date: 20100401Dec 24, 2014FPAYFee paymentYear of fee payment: 4Apr 27, 2015ASAssignmentOwner name: SOCIONEXT INC., JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:FUJITSU SEMICONDUCTOR LIMITED;REEL/FRAME:035508/0637Effective date: 20150302RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services