Source: http://www.docstoc.com/docs/58407322/Arrangement-For-Energy-Conditioning---Patent-7768763
Timestamp: 2014-04-17 01:55:16
Document Index: 746107603

Matched Legal Cases: ['Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60']

Arrangement For Energy Conditioning - Patent 7768763
United States Patent: 7768763
7,768,763
12/554,976
11866437Oct., 2007
11296391Dec., 20057321485
60280819Apr., 2001
Sprietsma et al.
6559484
07-022757
07 161568
2000-286665
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This application is a continuation of application Ser. No. 11/866,437,
filed Oct. 3, 2007, now abandoned, which is a continuation of application
Ser. No. 11/296,391, filed Dec. 8, 2005, now issued as U.S. Pat. No.
7,321,485, which is a continuation of application Ser. No. 10/189,339,
filed Jul. 2, 2002, now issued as U.S. Pat. No. 7,110,235, which is a
2002, now issued as U.S. Pat. No. 6,894,884, which is a
2001, now issued as U.S. Pat. No. 6,580,595, which is a
continuation-in-part of application Ser. No. 09/777,021 filed Feb. 5,
2001, now issued as U.S. Pat. No. 6,687,108, which is a
2000, now issued as U.S. Pat. No. 6,738,249 which is a
2000, now issued as U.S. Pat. No. 6,636,406, which is a
continuation-in-part of application Ser. No. 09/579,606 filed May 26,
2000, now issued as U.S. Pat. No. 6,373,673, which is a
continuation-in-part of application Ser. No. 09/460,218 filed Dec. 13,
1999, now issued as U.S. Pat. No. 6,331,926, which is a continuation of
application Ser. No. 09/056,379 filed Apr. 7, 1998, now issued as U.S.
No. 09/008,769 filed Jan. 19, 1998, now issued as U.S. Pat. No.
6,097,581, which is a continuation-in-part of application Ser. No.
08/841,940 filed Apr. 8, 1997, now issued as U.S. Pat. No. 5,909,350;
and application Ser. No. 10/115,159, filed Apr. 2, 2002, now issued as
U.S. Pat. No. 6,894,884, also claims the benefit of U.S. Provisional
Application 60/280,819, filed Apr. 2, 2001, and U.S. Provisional
Application No. 60/302,429, filed Jul. 2, 2001 and U.S. Provisional
Application No. 60/310,962, filed Aug. 8, 2001;
and application Ser. No. 10/189,339, filed Jul. 2, 2002, now issued as
U.S. Pat. No. 7,110,235, also claims the benefit of U.S. Provisional
Application 60/302,429 filed Jul. 2, 2001, and U.S. Provisional
Application 60/310,962 filed Aug. 8, 2001, and U.S. Provisional
Application No. 60/388,388 filed Jun. 12, 2002.
11/866,437, filed Oct. 3, 2007, now abandoned, Ser. No. 11/296,391, filed
Dec. 8, 2005, now issued as U.S. Pat. No. 7,321,485, Ser. No. 10/115,159,
filed Apr. 2, 2002, now issued as U.S. Pat. No. 6,894,884, Ser. No.
09/845,680, filed Apr. 30, 2001, now issued as U.S. Pat. No. 6,580,595,
Ser. No. 09/777,021, filed Feb. 5, 2001, now issued as U.S. Pat. No.
6,687,108, Ser. No. 09/594,447 filed Jun. 15, 2000, now issued as U.S.
Pat. No. 6,636,406, Ser. No. 09/579,606 filed May 26, 2000, now issued as
U.S. Pat. No. 6,373,673, Ser. No. 09/460,218 filed Dec. 13, 1999, now
issued as U.S. Pat. No. 6,331,926, Ser. No. 09/056,379 filed Apr. 7,
1998, now issued as U.S. Pat. No. 6,018,448, Ser. No. 09/008,769 filed
Jan. 19, 1998, now issued as U.S. Pat. No. 6,097,581, and Ser. No.
08/841,940 filed Apr. 8, 1997, now issued as U.S. Pat. No. 5,909,350.
1.  An energy pathway arrangement comprising: an integrated circuit wafer;  a first plurality of shielding pathways that are conductively coupled to one another;  a
second plurality of shielding pathways that are conductively coupled to one another;  a first plurality of shielded energy pathways;  a second plurality of shielded energy pathways;  wherein at least one shielded energy pathway of the first plurality of
shielded energy pathways is conductively coupled to a first portion of the integrated circuit wafer;  wherein at least one shielded energy pathway of the second plurality of shielded energy pathways is conductively coupled to a second portion of the
integrated circuit wafer;  and wherein the first plurality of shielded energy pathways is conductively isolated from the first plurality of shielding pathways.
2.  The energy pathway arrangement of claim 1, wherein the energy pathway arrangement is operable as a capacitor when the integrated circuit wafer is energized.
3.  A substrate with pathway arrangement, comprising: at least a first surface of the substrate;  a first pathway including a first pathway area, wherein the first area is under the first surface;  a second pathway including a second pathway
area, wherein the second area is between the first area and the first surface, and wherein the second area is above the first area;  a third pathway including a third pathway area, wherein the third area is between the second area and the first surface,
and wherein the third area is above the second area;  a fourth pathway including a fourth pathway area, wherein the fourth area is between the third area and the first surface, and wherein the fourth area is above the third area;  a fifth pathway
including a fifth pathway area, wherein the fifth area is between the fourth area and the first surface, and wherein the fifth area is above the fourth area;  wherein the first pathway, the third pathway and the fifth pathway are conductively coupled to
one another, and wherein the second pathway and the fourth pathway are electrically insulated from each other;  wherein the third area is larger than the second area, and wherein the third area is larger than the fourth area;  and wherein a portion of
the second area and a portion of the fourth area are substantially the same size, and wherein the portion of the second area is shielded from the portion of the fourth area by the third area, and wherein the portion of the second area and the portion of
the fourth area are each oriented facing the other, and wherein the portion of the second area and the portion of the fourth area are in an alignment with each other.
4.  The substrate with pathway arrangement as recited in claim 3, further comprising: an integrated circuit assembly;  wherein a portion of the second pathway is conductively coupled to at least a first portion of the integrated circuit
assembly;  wherein a portion of the fourth pathway is conductively coupled to at least a second portion of the circuit assembly;  and an energy source, wherein the energy source is conductively coupled to the integrated circuit assembly;  and wherein the
circuit assembly is energized by the energy source.
5.  The substrate with pathway arrangement as recited in claim 3, further comprising: a circuit assembly;  wherein a portion of the second pathway is conductively coupled to at least a first portion of the circuit assembly;  wherein a portion of
the fourth pathway is conductively coupled to at least a second portion of the circuit assembly;  wherein a portion of the fifth pathway is conductively coupled to at least a third portion of the circuit assembly;  and wherein the second pathway and the
fourth pathway are electrically insulated from the first pathway, the third pathway, and the fifth pathway.
6.  The substrate with pathway arrangement as recited in claim 5, wherein the substrate is conductively coupled to an energy source;  and wherein the substrate is energized by the energy source.
7.  The substrate with pathway arrangement as recited in claim 4, further comprising: a first capacitor having a capacitance value, wherein the first capacitor is operable between the third area and the portion of the second area;  a second
capacitor having a capacitance value, wherein the second capacitor is operable between the third area and the portion of the fourth area;  a third capacitor having a capacitance value, wherein the third capacitor is operable between the portion of the
second area and the portion of the fourth area;  and wherein the capacitance value of the first capacitor is substantially the same as the capacitance value of the second capacitor, and wherein the capacitance value of the third capacitor is
approximately one half the capacitance value of the first capacitor.
8.  The substrate with pathway arrangement as recited in claim 6, further comprising: a first capacitor having a capacitance value, wherein the first capacitor is operable between the third area and the portion of the second area;  a second
capacitor having a capacitance value, wherein the second capacitor is operable between the third area and the portion of the fourth area;  a third capacitor having a capacitance value, wherein the third capacitor is operable between the second area and
the portion of the fourth area;  and wherein the capacitance value of the first capacitor is substantially the same as the capacitance value of the second capacitor, and wherein the capacitance value of the third capacitor is approximately one half the
capacitance value of the second capacitor.
9.  The substrate with pathway arrangement as recited in claim 8, wherein the third area sustains a first voltage reference for an energy propagating the portion of the second area;  and wherein the third area sustains the first voltage
reference for another energy propagating the portion of the fourth area.
10.  An integrated circuit assembly incorporating the substrate with pathway arrangement of claim 3.
11.  A circuit conductively coupled to the substrate with pathway arrangement of claim 3, wherein the circuit is conductively coupled to an energy source;  and wherein the circuit is energized by the energy source.
12.  The substrate with pathway arrangement as recited in claim 7, wherein the second pathway and the fourth pathway are electrically insulated from the first pathway, the third pathway, and the fifth pathway.
13.  The substrate with pathway arrangement as recited in claim 12, wherein a portion of the fifth pathway is conductively coupled to at least a third portion of the integrated circuit assembly.
14.  A pathway arrangement, comprising: a first pathway including a first area, wherein the first area is located in a first pathway plane;  a second pathway including a second area, wherein the second area is located in a second pathway plane;
a third pathway including a third area, wherein the third area is located in a third pathway plane;  a fourth pathway including a fourth area, wherein the fourth area is located in a fourth pathway plane;  a fifth pathway including a fifth area, wherein
the fifth area is located in a fifth pathway plane;  wherein the second plane is between the first plane and the third plane, and wherein the fourth plane is between the third plane and the fifth plane, and wherein the second plane, the third plane and
the fourth plane are between the first plane and the fifth plane;  wherein the first pathway, the third pathway and the fifth pathway are conductively coupled to one another, and wherein the first pathway, the third pathway and the fifth pathway are
electrically insulated from the second pathway and the fourth pathway, and wherein the second pathway and the fourth pathway are electrically insulated from each other;  wherein the second area is smaller than the third area, and wherein the fourth area
is smaller than the third area;  wherein a portion of the second area is substantially the same size as a portion of the fourth area;  and wherein the portion of the second area is shielded from the portion of the fourth area by the third area, and
wherein the portion of the second area and the portion of the fourth area are in a substantially superposed alignment with each other.
15.  A circuit incorporating the pathway arrangement, as recited in claim 14.
16.  An energy source conductively coupled to the circuit of claim 15, wherein the circuit is energized by the energy source.
17.  The circuit conductively coupled to the substrate with pathway arrangement of claim 3, as recited in claim 11, wherein the alignment of the portion of the second area and the portion of the fourth area to each other is a superposed
18.  A substrate with an energy pathway arrangement comprising: a first surface of the substrate;  an energy pathway arrangement comprising: a first conductor including a first conductive plane;  a second conductor including a second conductive
plane;  a third conductor including a third conductive plane;  a fourth conductor including a fourth conductive plane;  a fifth conductor including a fifth conductive plane;  wherein the first conductor, the third conductor and the fifth conductor are
conductively coupled to one another, and wherein the first conductor, the third conductor and the fifth conductor are electrically insulated from the second conductor and the fourth conductor, and wherein the second conductor and the fourth conductor are
electrically insulated from each other;  wherein an area of the third conductive plane is between an area of the second conductive plane and an area of the fourth conductive plane, and wherein the area of the second conductive plane, the area of the
third conductive plane and the area of the fourth conductive plane are between an area of the first conductive plane and an area of the fifth conductive plane;  wherein the area of the second conductive plane, the area of the third conductive plane, the
area of the fourth conductive plane, and the area of the fifth conductive plane are between the area of the first conductive plane and the first surface of the substrate;  wherein the area of the first conductive plane is larger than the area of the
second conductive plane, and wherein the area of the third conductive plane is larger than the area of the second conductive plane, and wherein the area of the fifth conductive plane is larger than the area of the second conductive plane;  wherein the
area of the first conductive plane is larger than the area of the fourth conductive plane, and wherein the area of the third conductive plane is larger than the area of the fourth conductive plane, and wherein the area of the fifth conductive plane is
larger than the area of the fourth conductive plane;  and wherein a portion of the area of the second conductive plane is shielded from a portion of the area of the fourth conductive plane by the area of the third conductive plane.
19.  The substrate with an energy pathway arrangement of claim 18, wherein the first surface of the substrate is operable for connection to an integrated circuit chip;  wherein the area of the second conductive plane and the area of the fourth
conductive plane are oriented facing each other;  wherein the portion of the area of the second conductive plane is in a superposed alignment with the portion of the area of the fourth conductive plane;  wherein the second conductor is operable for
conductive connection to a first part of the integrated circuit chip, and wherein the fourth conductor is operable for conductive connection to a second part of the integrated circuit chip;  and wherein at least either the first conductor, the third
conductor or the fifth conductor is operable for conductive connection to a third part of the integrated circuit chip.
20.  The substrate with an energy pathway arrangement of claim 18, wherein the portion of the area of the second conductive plane is oriented facing the portion of the area of the fourth conductive plane and a first side of the area of the third
conductive plane, and wherein the portion of the area of the fourth conductive plane is oriented facing the portion of the area of the second conductive plane and a second side of the area of the third conductive plane;  and wherein the portion of the
area of the second conductive plane overlaps the portion of the area of the fourth conductive plane, and wherein the portion of the area of the fourth conductive plane overlaps the portion of the area of the second conductive plane.
21.  An energized substrate with an energy pathway arrangement of claim 19.
22.  An energized substrate with an energy pathway arrangement of claim 20.  Description
This application relates to balanced shielding arrangements that use complementary relative groupings of energy pathways, such as pathways for various energy propagations for multiple energy conditioning functions.  These shielding arrangements
may be operable as discrete or non-discrete embodiments that can sustain and condition electrically complementary energy confluences.
This application incorporates by reference herein each of the following: application Ser.  No. 10/115,159, filed Apr.  2, 2002, now issued as U.S.  Pat.  No. 6,894,884, which is a continuation-in-part of application Ser.  No. 09/845,680, filed
Apr.  30, 2001, now issued as U.S.  Pat.  No. 6,580,595, which is a continuation-in-part of application Ser.  No. 09/815,246 filed Mar.  22, 2001, now issued as U.S.  Pat.  No. 6,469,595, which is a continuation-in-part of application Ser.  No.
09/777,021 filed Feb.  5, 2001, now issued as U.S.  Pat.  No. 6,687,108, which is a continuation-in-part of application, Ser.  No. 09/632,048 filed Aug.  3, 2000, now issued as U.S.  Pat.  No. 6,738,249, which is a continuation-in-part of application
Ser.  No. 09/594,447 filed Jun.  15, 2000, now issued as U.S.  Pat.  No. 6,636,406, which is a continuation-in-part of application Ser.  No. 09/579,606 filed May 26, 2000, now issued as U.S.  Pat.  No. 6,373,673, which is a continuation-in-part of
application Ser.  No. 09/460,218 filed Dec.  13, 1999, now issued as U.S.  Pat.  No. 6,331,926, which is a continuation of application Ser.  No. 09/056,379 filed Apr.  7, 1998, now issued as U.S.  Pat.  No. 6,018,448, which is a continuation-in-part of
application Ser.  No. 09/008,769 filed Jan.  19, 1998, now issued as U.S.  Pat.  No. 6,097,581, which is a continuation-in-part of application Ser.  No. 08/841,940 filed Apr.  8, 1997, now issued as U.S.  Pat.  No. 5,909,350.
In addition, this application incorporates by reference herein each of the following: U.S.  Provisional Application No. 60/302,429, filed Jul.  2, 2001, U.S.  Provisional Application No. 60/310,962, filed Aug.  8, 2001, U.S.  Provisional
Application No. 60/349,954, filed Jan.  8, 2002 and U.S.  Provisional Application No. 60/388,388, filed Jun.  12, 2002.
may include appropriate metal oxides, such as ruthenium oxide, which; depending on the exigencies of a particular application, may be diluted with a suitable metal.  Other pathways may be formed of a substantially non-resistive conductive material.  Any
shields, designated herein as -IM that are additionally coupled and, in part, form the shielding structure.
A device according to an aspect of the present invention may, as set forth hereinabove, be placed between each isolated circuit and a paired plurality of pathways or differential pathways This exemplary device may operate effectively across a
815-1, 815-2, 800-1-IM, 800-2-IM, 810-1, 810-2, and 820-1-IM, 820-2-IM.  The first, second, and third pluralities may be stacked to form an embodiment 3199, 3200, 3201.  The third plurality of co-planar pathways may provide shielding.  Main-bodies 81 of
oriented face to face, may have main-body pathways 80s co-registered and aligned except for the various contiguous pathway extensions 812&quot;X&quot;, 811&quot;X&quot;.  As shown in FIGS. 18 and 1C, a pair of outer co-planar pathways 820-1-IM, 825-1-IM may serve as pathway
extensions 812SSW and 811 SSW may be arranged spaced apart, each extending toward the opposite edge 812 of layer of material 801.  In FIG. 1C, pathways 865-1 and 865-2 may be mirror images, as discussed hereinabove.  Comparably to FIG. 1B, extensions
clarity, and wherein the shields of.  FIG. 5A are oriented in flip-flop for each relative set of 855&quot;X&quot; and 865&quot;X&quot; pathways.  The 79&quot;X&quot; pathway extensions may be rotated 90 degrees relative to the various pathway extensions 811&quot;x&quot; and 812&quot;X&quot;.  A dynamic
accepted methodologies.  For example a &quot;flip chip&quot; type of integrated circuit, meaning that the input/output terminations as well as any other pathways on the chip may occur at any point on its surface.  After the IC chip is prepared for attachment to
the RF return path is parallel and adjacent to a corresponding pathway.  Thus, the magnetic flux energy may be measured or observed relative to a return.
Arrangement for energy conditioning, Anthony, et al., Anthony A. Anthony, William M. Anthony, Application number 12 554-976, Electricity: Electrical Systems And Devices, energy pathway, energy pathways, Patent application, circuit arrangement, Patent Documents, Application Number, UNITED STATES OF AMERICA, ESD protection, surge protection, integrated circuit
This application relates to balanced shielding arrangements that use complementary relative groupings of energy pathways, such as pathways for various energy propagations for multiple energy conditioning functions. These shielding arrangementsmay be operable as discrete or non-discrete embodiments that can sustain and condition electrically complementary energy confluences.BACKGROUNDToday, as the density of electronics within applications increases, unwanted noise byproducts of the increased density may limit the performance electronic circuitry. Consequently, the avoidance of the effects of unwanted noise byproducts, suchas by isolation or immunization of circuits against the effects of the undesirable noise is an important consideration for circuit arrangements and circuit design.Differential and common mode noise energy may be generated by, and may propagate along or around, energy pathways, cables, circuit board tracks or traces, high-speed transmission lines, and/or bus line pathways. These energy conductors may actas, for example, an antenna that radiates energy fields. This antenna-analogous performance may exacerbate the noise problem in that, at higher frequencies, propagating energy utilizing prior art passive devices may experience increased levels of energyparasitic interference, such as various capacitive and/or inductive parasitics.These increases may be due, in part, to the combination of constraints resulting from functionally or structurally limitations of prior art solutions, coupled with the inherent manufacturing or design imbalances and performance deficiencies ofthe prior art. These deficiencies inherently create, or induce, unwanted and unbalanced interference energy that may couple into associated electrical circuitry, thereby making at least partial shielding from these parasitics and electromagneticinterference desirable. Consequently, for broad frequency operating environments, solving these problems necessitates at least a combinati
Air Conditioning Design Coils
Air Conditioning Energy Management System