Source: https://patents.google.com/patent/US8704604B2/en
Timestamp: 2018-12-14 22:20:03
Document Index: 759579151

Matched Legal Cases: ['§120', '§119', '§120', '§119', '§120', '§119', '§120', '§119']

US8704604B2 - Oscillators having arbitrary frequencies and related systems and methods - Google Patents
Oscillators having arbitrary frequencies and related systems and methods Download PDF
US8704604B2
US8704604B2 US13312220 US201113312220A US8704604B2 US 8704604 B2 US8704604 B2 US 8704604B2 US 13312220 US13312220 US 13312220 US 201113312220 A US201113312220 A US 201113312220A US 8704604 B2 US8704604 B2 US 8704604B2
US13312220
US20120139647A1 (en )
This application claims the benefit under 35 U.S.C. §120 as a continuation-in-part (CIP) of U.S. patent application Ser. No. 12/721,484, filed on Mar. 10, 2010 and entitled “Oscillators Having Arbitrary Frequencies and Related Systems and Methods,” which application is hereby incorporated herein by reference in its entirety. Patent application Ser. No. 12/721,484 in turn claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application Ser. No. 61/289,984, filed on Dec. 23, 2009 and entitled “Oscillators Having Arbitrary Frequencies and Related Systems and Methods”, which application is hereby incorporated herein by reference in its entirety.
This application also claims the benefit under 35 U.S.C. §120 as a continuation-in-part (CIP) of U.S. patent application Ser. No. 12/721,472, filed on Mar. 10, 2010 and entitled “Oscillators Having Arbitrary Frequencies and Related Systems and Methods,” which application is hereby incorporated herein by reference in its entirety. Patent application Ser. No. 12/721,472 in turn claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application Ser. No. 61/289,984, filed on Dec. 23, 2009 and entitled “Oscillators Having Arbitrary Frequencies and Related Systems and Methods”, which application is hereby incorporated herein by reference in its entirety.
This application also claims the benefit under 35 U.S.C. §120 as a continuation-in-part (CIP) of U.S. patent application Ser. No. 12/977,367, filed on Dec. 23, 2010 and entitled “Oscillators Having Arbitrary Frequencies and Related Systems and Methods,” which application is hereby incorporated herein by reference in its entirety. U.S. patent application Ser. No. 12/977,367 claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application Ser. No. 61/289,984, filed on Dec. 23, 2009 and entitled “Oscillators Having Arbitrary Frequencies and Related Systems and Methods”, which application is hereby incorporated herein by reference in its entirety. U.S. patent application Ser. No. 12/977,367 also claims the benefit under 35 U.S.C. §120 as a continuation-in-part (CIP) of U.S. patent application Ser. No. 12/721,484, filed on Mar. 10, 2010 and entitled “Oscillators Having Arbitrary Frequencies and Related Systems and Methods,” which application is hereby incorporated herein by reference in its entirety. Patent application Ser. No. 12/721,484 in turn claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application Ser. No. 61/289,984, filed on Dec. 23, 2009 and entitled “Oscillators Having Arbitrary Frequencies and Related Systems and Methods”, which application is hereby incorporated herein by reference in its entirety.
Oscillators are ubiquitous components in electronic equipment including wireless and wireline communications systems, entertainment electronics, aerospace systems, and timing systems. The oscillators traditionally are used to provide a reference signal or clock signal, such that precision of the signal frequency is important. Conventionally, crystal oscillators having quartz crystals as the resonating element have served as the oscillators of choice because they can be manufactured to provide precise signal frequencies within ±1.5 parts-per-million (ppm) of a target frequency value, frequency stabilities of ±2.5 ppm over the entire operating temperature range from −40° C. to +85° C., aging of below ±1 ppm/year (at 25° C.), typical phase noise of −138 dBc/Hz at 1 kHz, and power consumption as low as 1.5 mA.
In the event that an oscillator does not provide a frequency precisely matching that required by a system, some conventional devices include circuitry to provide a tuning signal to the oscillator, referred to as automatic frequency control (AFC), as shown in FIGS. 2A and 2B. The apparatus 200 of FIG. 2A includes a 26 MHz oscillator 202 which provides the oscillator signal 104 to a system 206. Although the oscillator 202 is shown as a 26 MHz oscillator, for conventional oscillators the oscillator signal 104 can differ from 26 MHz by ±2 ppm. The system 206 determines whether the oscillator signal 104 has a frequency of precisely 26 MHz, and includes an output port 208 from which is provided an AFC tuning signal 210 to tune the oscillator if the oscillator signal 104 is not precisely 26 MHz. The AFC tuning signal 210 is received at an electronic frequency control input port (EFC_tune) 204 of the oscillator.
Conventional AFC tuning is limited to ±30 ppm of an initial frequency by the properties of the quartz crystals used as the resonating elements of conventional crystal oscillators, and is typically limited to ±10 ppm in practice.
According to one aspect of the present invention, an oscillator is configured to produce an oscillating signal of arbitrary frequency. The oscillator may include a mechanical resonator. In some embodiments, a system may include the oscillator.
According to an aspect of the present application, a method is provided. The method comprises receiving an oscillating signal from an oscillator including a mechanical resonating structure, the oscillating signal having a first frequency. The method further comprises measuring the first frequency of the oscillating signal and comparing the first frequency to a second frequency. The method further comprises determining that the first frequency differs from the second frequency based on the step of comparing the first frequency to the second frequency. The method further comprises adjusting one or more components of a circuit receiving the oscillating signal in response to determining that the first frequency differs from the second frequency.
According to another aspect of the present application, a method is provided. The method comprises receiving an oscillating signal from an oscillator including a mechanical resonating structure, the oscillating signal having a first frequency. The method further comprises measuring the first frequency of the oscillating signal and comparing the first frequency to a second frequency. The method further comprises determining that the first frequency differs from the second frequency based on the step of comparing the first frequency to the second frequency. The method further comprises applying a tuning signal to the oscillator to shift the first frequency to a third frequency.
According to another aspect of the present application, a method is provided. The method comprises measuring a frequency of an oscillating transmitter output signal of a transmitter, the transmitter forming at least part of a transceiver comprising a local oscillator having a mechanical resonating structure. The method further comprises comparing the frequency of the transmitter output signal to a target frequency. The method further comprises determining a difference between the frequency of the transmitter output signal and the target frequency. The method further comprises calculating an offset of an oscillator frequency of the local oscillator from a standard frequency based on the difference between the frequency of the transmitter output signal and the target frequency. The method further comprises adjusting a setting of a one or more components of the transmitter based on the offset.
FIG. 9 illustrates a circuit using a clock with one second period pulses in combination with a real time clock (RTC).
FIG. 10 illustrates a circuit using a clock with one second period pulses in combination with a system using a RTC as an internal sub-system.
FIG. 11 illustrates a one second period clock using an internal oscillator with arbitrary frequency.
FIG. 12 illustrates a one second period clock using an internal oscillator with arbitrary frequency, according to another embodiment of the present invention
FIG. 13 illustrates a one second period clock using an internal oscillator with arbitrary frequency and additional temperature compensation, according to another embodiment of the present invention.
FIG. 14 illustrates a one second period clock using an internal oscillator with arbitrary frequency and additional temperature compensation, according to another embodiment of the present invention.
FIG. 15 illustrates a one second period clock using an internal oscillator with arbitrary frequency and optional temperature compensation and error accumulation functionality, according to another embodiment of the present invention.
FIG. 16 illustrates a radio frequency (RF) front-end employing an oscillator configured to generate an oscillating signal having an arbitrary frequency, according to one embodiment of the present invention.
Furthermore, systems as described herein which may accurately operate (i.e., be workable) in combination with an oscillator manufactured to produce an oscillating signal of arbitrary frequency may enable the use of mechanical resonator technologies which cannot be manufactured with the precision of conventional quartz crystal resonators, but which may offer various advantages over quartz crystal resonator technology. For example, oscillators employing MEMS resonator technology may not be easily manufactured to conform to one of the standard oscillator frequencies, but rather may be manufactured with less precision to provide an arbitrary frequency, thus making them less desirable than quartz crystal resonators for many present day applications in which a frequency precisely matching a conventional standard oscillator frequency is required. However, oscillators employing MEMS resonator technology may offer benefits compared to conventional quartz crystal resonators in terms of, for example, frequency stability, ease of manufacturing, manufacturing compatibility of the materials of the oscillator and/or mechanical resonator, cost, or other beneficial characteristics. Accordingly, it may be desirable to use oscillators employing MEMS resonator technology for some applications. One or more of the aspects of the invention described herein may enable or facilitate use of such technologies.
Accordingly, aspects of the present invention provide oscillators configured to produce oscillating signals having arbitrary frequencies and related systems and methods which may properly operate in connection with such oscillators. For purposes of the following discussion, the described systems and methods may be grouped into one of two classes, although it should be appreciated that the classes are not necessarily mutually exclusive and may overlap in one or more embodiments. The first class includes systems and methods which generate, from an oscillator configured to produce an oscillating signal of arbitrary frequency or from the oscillating signal of arbitrary frequency, an oscillating signal having a standard oscillator frequency. For example, the arbitrary frequency may differ from a standard oscillator frequency (e.g., 26 MHz) by up to ±10,000 ppm or more, and the systems and methods according to the first class discussed herein may generate from the oscillator or the oscillating signal of arbitrary frequency a signal having the standard frequency. A second class of systems and methods described herein are those which operate with a received oscillator signal of arbitrary frequency and do not shift the oscillator signal to a standard frequency, but rather adapt the configuration and/or operation of one or more components of the system to account for the arbitrary frequency.
According to a further such aspect of the present invention, a method of operating on a signal down-converted using an oscillating reference signal having an arbitrary frequency comprises utilizing a carrier tracking loop. A carrier signal modulated with data may be received and down-converted using the oscillating reference signal of arbitrary frequency, resulting in a down-converted signal. The down-converted signal may then be sampled with an ADC, producing a digital signal including digital data corresponding to the data modulated on the carrier signal. The sampling rate of the ADC may be selected as if the oscillating reference signal had a standard oscillator frequency and not an arbitrary frequency. For example, the sampling rate of the ADC may be selected as if the oscillating reference signal had a standard oscillator frequency of, for example, 26 MHz, rather than an arbitrary frequency differing from the standard operating frequency by up to approximately ±10,000 ppm. As a result, the digitized signal may include digital data not accurately reflecting the data modulated on the carrier signal. The digitized signal may be applied to a carrier tracking loop, thus effectively re-sampling the digital data of the digital signal to restore its accuracy.
According to another aspect of the present invention, circuits and methods using an arbitrary frequency reference oscillator in combination with a real time clock are described. The arbitrary frequency reference oscillator may generate an arbitrary frequency signal whose frequency is not a power of 2. A reference clock signal having a desired time base may be generated from the arbitrary frequency signal by counting a number of oscillations of the arbitrary frequency signal. The reference clock signal may then be provided to a real time clock which may generate an output indicative of current time. In some embodiments, the arbitrary frequency reference oscillator may be frequency tunable, and frequency tuning may be performed to account for temperature induced fluctuations in the frequency of operation. In some embodiments, the arbitrary frequency reference oscillator may be frequency tunable, and the frequency tuning may be performed to set the frequency of the reference oscillator to an integer fraction of the desired time base of the reference clock signal, which may simplify operation of the counter in some embodiments. As a non-limiting example, an arbitrary frequency oscillator with an output frequency of 127,123.456 Hz, may be tuned to 127,123 Hz to reduce the complexity of the counter by allowing for use of an integer based counter.
According to a further aspect, a programmable (or adjustable) phase-locked loop (PLL) of a device (e.g., a mobile device, such as a cellular telephone, personal digital assistance (PDA), etc.) which includes or is coupled to a mechanical resonating structure producing an oscillating reference signal of arbitrary frequency is adjusted to account for the arbitrary frequency. The frequency of an oscillating signal representing or derived from the oscillating reference signal may be measured to determine whether the frequency matches a desired frequency. If there is an offset between the measured frequency and a target frequency, a PLL (or other circuitry) may be adjusted to account for the offset. According to this non-limiting aspect, then, the oscillating reference signal may not be tuned.
According to one embodiment, a combination of tuning signal 308 and AFC tuning signal 314 may induce a frequency shift of up to approximately ±10,000 ppm (e.g., up to approximately ±500 ppm, ±1,000 ppm, ±2,000 ppm, ±5,000 ppm, or any other suitable amount) of the oscillating output signal 304, or any other suitable amount. Thus, a large frequency shift of the oscillating output signal 304 may be realized by use of tuning signals 308 and 314, enabling or facilitating use of an oscillator 302 configured to produce an arbitrary frequency with the system 306. According to one embodiment, the value of tuning signal 308 induces a relatively larger frequency shift of the oscillating output signal 304 than does the AFC tuning signal 314. Thus, the tuning signal 308 may be thought of as a coarse adjustment tuning signal, and is referred to herein as a “frequency steering” signal (which is why output port 310 is labeled “FS” and input port 312 is labeled “FS_tune”), while the AFC tuning signal may be thought of as a fine adjustment tuning signal. According to one embodiment, the AFC tuning signal induces a relatively small frequency shift of the oscillating output signal 304 of, for example, less than approximately ±5 ppm, less than approximately ±10 ppm, or less than approximately ±20 ppm, as a continuous value or in increments of any suitable size. Thus, it should be appreciated that the tuning signal 308 may induce a substantially larger frequency shift, for example, up to approximately ±10,000 ppm according to some embodiments. The tuning signal 308 may induce a frequency shift of certain distinct values in increments of ±50 ppm, ±100 ppm, ±200 ppm, or any other suitable amount.
The form of tuning signals 308 and 314, and the manner and timing in which they are provided to the oscillator 302, are not limiting. According to one embodiment, the form of tuning signal 308 may depend on a type of tuning technique used to tune oscillator 302. For example, according to one embodiment the oscillator 302 may be tunable by inducing a phase shift between an output signal of the oscillator and an input signal of the oscillator, for example if the oscillator comprises or is part of a feedback loop. An example of such a device with which the aspects described herein may be applied is described in co-pending U.S. patent application Ser. No. 12/699,094, filed Feb. 8, 2010, entitled “Methods and Apparatus for Tuning Devices Having Mechanical Resonators”, and published as U.S. Patent Application Publication No. 2010-0308927-A1, which application is hereby incorporated herein by reference in its entirety. In such an embodiment, the tuning signal 308 may be any signal suitable for selecting or inducing a desired amount of phase shift. According to another embodiment, the oscillator 302 may be tunable by inducing a phase shift and an amplitude shift between an output signal of the oscillator and an input signal to the oscillator, for example again if the oscillator comprises or forms part of a feedback loop. Examples of such devices are also described in U.S. patent application Ser. No. 12/699,094. In such a non-limiting embodiment, tuning signal 308 may be any signal suitable for selecting or inducing a desired amount of phase shift and/or amplitude adjustment. Other tuning techniques for tuning the oscillator 302 are also possible, and tuning signal 308 may take any suitable form for dictating or selecting the amount of frequency shift by which to shift the frequency of the oscillating output signal provided by the oscillator.
While the oscillator 302 is not limited to utilizing any particular type of mechanical resonator technology, and therefore may utilize conventional quartz crystal resonator technology, MEMS resonator technology, or any other suitable technology, it should be appreciated that the amount of frequency shift which may be induced by the combination of tuning signal 308 and AFC tuning signal 314 may be limited at least in part by the type of resonator technology employed. For example, conventional quartz crystal resonator technology may not allow for tuning up to approximately ±10,000 ppm of the initial oscillator output signal frequency. Thus, it should be appreciated that those embodiments described herein relating to tuning of an oscillator output signal frequency by up to approximately ±10,000 ppm may correspond to embodiments in which the oscillator employs mechanical resonator technology allowing for such a relatively large tuning range. According to one embodiment, MEMS resonator technology, such as that described in U.S. patent application Ser. No. 12/181,531, filed Jul. 29, 2008, entitled “Micromechanical Resonating Devices and Related Methods” and published as U.S. Patent Application Publication No. 2010-0026136-A1, and U.S. patent application Ser. No. 12/142,254, filed Jun. 19, 2008, entitled “Methods and Devices For Compensating a Signal Using Resonators” and published as U.S. Patent Application Publication No. 2009-0243747-A1, may be employed, both of which applications are hereby incorporated herein by reference in their entireties.
Similarly, the frequency of a signal derived from the output signal of the oscillator may be directly measured, for example using a frequency analyzer or any other suitable technique. As a non-limiting example, the oscillator may be coupled to a system, such as a mobile device (e.g., a cellular telephone, a PDA, a transmitter, etc.) which may generate a device output signal. The device output signal may represent a multiple of the output signal of the oscillator, or otherwise may be indicative of the output signal of the oscillator. The measured frequency of the device output signal may be compared to a target value. If an offset exists between the measured frequency of the device output signal and the target frequency, suitable values for tuning signal 308 (or other tuning signals) may be selected to adjust the frequency of the output signal of the oscillator such that the frequency of the device output signal substantially matches the target frequency.
As a non-limiting example, a transmitter (e.g., as part of a cellular telephone, as a stand-alone device, or otherwise) may be intended to cover a frequency range from approximately 915 MHz to approximately 945 MHz, with a center frequency of 930 MHz. The transmitter may be coupled to an oscillator configured to provide an oscillating reference signal. Assuming a divide-by-4 configuration, as a non-limiting example, the nominal output frequency of the oscillator is approximately 31.125 MHz. However, in practice the frequency of the oscillator may be offset from this nominal value, resulting in the transmitter generating a transmitter output frequency offset from the target center frequency of 930 MHz. Thus, according to a non-limiting embodiment, the frequency of the transmitter signal may be measured and, if there is an offset between the measured value and the target transmitter frequency value (e.g., if the measured value is 929.880481 MHz rather than the target frequency value of 930 MHz), a suitable value for a tuning signal (e.g., tuning signal 308) may be selected to result in the transmitter frequency substantially matching the target frequency. It should be appreciated that this is a non-limiting example.
According to another embodiment, the values of one or both of tuning signals 308 and 314 may be determined based on a known value of the arbitrary frequency of oscillator 302. For example, as shown in FIG. 3, according to one embodiment the oscillator 302 provides from memory 313 a value 320 indicative of the arbitrary frequency, which may be received at an input port 315 of the system 306 (labeled as port “f_zero” since the initial arbitrary frequency of the oscillator may be labeled “f_zero”). Value 320 may be one of various values which the system 306 may use to determine appropriate values for tuning signals 308 and/or 314. For example, according to one embodiment, value 320 is a value of the frequency of oscillator 302 (e.g., 25.97425 MHz), for example, the arbitrary frequency. According to an alternative embodiment, value 320 is a value of an offset of the arbitrary frequency from a standard frequency. For example, value 320 may be 5,000 if the arbitrary frequency differs from a standard oscillator frequency of known value by 5,000 ppm. According to a further embodiment, value 320 may be a value of a frequency of the mechanical resonator of oscillator 302 (e.g., 25.99955 MHz), which may be indicative of the arbitrary frequency of oscillating output signal 304. According to another alternative embodiment, the value 320 may be a value of an offset of the frequency of the mechanical resonator of oscillator 302 from a standard oscillator frequency (e.g., value 320 may be 1,000 if the frequency of the mechanical resonator differs by 1,000 ppm from a standard oscillator frequency). Other values are also possible, as the value 320 is not limited to representing any specific physical quantity, but rather may represent one of various quantities which the system 306 may satisfactorily use to determine appropriate values for tuning signals 308 and/or 314.
More generally, according to an aspect of the present invention, at least one value indicative of the frequency of the oscillator and/or of the mechanical resonator may be provided to a system (e.g., to a synthesizer (e.g., a phase-locked loop), such as synthesizer 401 described further below or any other suitable synthesizer, or any other system) receiving the output of the oscillator from any suitable source (e.g., memory of the oscillator or any other suitable source). The at least one value may be the frequency of the oscillator/mechanical resonator, an offset of the frequency from a known frequency, or may be any other suitable indication. According to one embodiment, the at least one value may be the oscillating signal output itself, the frequency of which may be measured and provided to the receiving system. Such information may then be used to adjust the AFC tuning signal or the frequency steering signal, or both. In some embodiments, such information may be used to adjust a frequency synthesizer (e.g., a synthesizer of the types described below), for example in combination with adjusting the AFC tuning signal. In one non-limiting embodiment, the AFC tuning signal may be chosen based on a provided indication of the frequency of the oscillator or mechanical resonator, and no frequency steering signal may be applied. According to one embodiment, a frequency synthesizer receiving the oscillator output may be of such high resolution that no AFC signal is needed. Thus, information about the frequency of the oscillator output may be used to adjust other features of the system generating or receiving the output of the oscillator. Other scenarios are also possible.
The system 306 may utilize the value 320 in any suitable manner for determining suitable values of tuning signals 308 and/or 314. According to one embodiment, system 306 includes a reference table, such as a lookup table, storing values for tuning signal 308 based on the arbitrary frequency of the oscillator 302, an offset of the arbitrary frequency from a standard oscillator frequency, or any other value which may be represented by value 320, and the desired target frequency of the oscillating output signal 304 (e.g., a desired standard oscillator frequency). Thus, according to one embodiment, the system 306 receives the value 320 and refers to the reference table/lookup table stored therein to determine an appropriate value for tuning signal 308 to ensure the oscillating output signal 304 has the desired target frequency. According to one embodiment, the reference table/lookup table may provide values for both tuning signal 308 and tuning signal 314, although not all embodiments are limited in this respect. The reference table/lookup table within system 306 may be stored within memory of system 306, or in any other suitable manner. Furthermore, the reference table/lookup table may be populated or uploaded to the system 306 at any suitable time. For example, the table may be provided to the system 306 upon initial manufacturing of the system 306. Alternatively, the table may be updated or uploaded to the system 306 periodically.
A non-limiting example is now given. According to one embodiment, the frequency synthesizer 401 is a PLL having discrete frequency steps of 100 ppm. The oscillator 302 may initially output an oscillating output signal 304 having the indicated arbitrary frequency of 25.97425 MHz. Due to the step sizes of the frequency synthesizer 401, the synthesized signal 404 may have a frequency that is at best within ±50 ppm of a desired target frequency for the sub-system 402. The tuning signal 308 may, in this non-limiting example, have a value that may be selected in increments of ±10 ppm, and therefore may be selected to have a suitable value for adjusting the frequency of oscillating output signal 304 such that the synthesized signal 404 has a frequency within ±10 ppm of a desired target frequency for sub-system 402. The AFC tuning signal 314 may then assume a value suitable for shifting the frequency of the oscillating output signal 304 by a suitable amount such that frequency synthesizer 401 may synthesize a synthesized signal 404 having the target frequency. It should be appreciated that this is merely one non-limiting example, and that other manners of operation of the apparatus 400 are also possible. The values of tuning signals 308 and 314 in system 406 may be determined in any of the manners described above with respect to FIG. 3, or in any other suitable manner.
The incoming radio signal 501 is received by the antenna 502 and passes through a band pass filter 504, which may be a duplexer. The resulting signal is then amplified by a low noise amplifier (LNA) 506 and down-converted by mixing the incoming radio signal with a reference signal 512 using mixer 508. For quadrature mixing, a quadrature splitter 510 is provided (which generates zero and 90 degree phases in this non-limiting example). The reference signal 512 is illustrated in this non-limiting example as having a frequency of 900 MHz for purposes of illustration, but may have any suitable frequency. It may be generated by a frequency synthesizer 530 (illustrated as a fractional PLL in this non-limiting example) which receives the previously described oscillating output signal 304. As previously mentioned, the oscillating output signal 304 may, in some embodiments, have an arbitrary frequency, at least before any tuning signals are applied to the oscillator 302 generating the oscillating output signal. After mixing the incoming radio signal 501 and the reference signal 512 using mixer 508 the resulting down-converted signal may be low pass-filtered in filter 514 and then converted from an analog signal to a digital signal using ADC 516. The resulting digital signal may contain the data or information of the radio signal 501 (e.g., cellular telephone data). The digitized signal produced by ADC 516 may then be input to the baseband electronics 518 for further processing. The baseband electronics 518 may comprise a digital signal processor (DSP) 520, which may filter and condition the received data, e.g., the cellular telephone data in those embodiments in which the RF front-end 500 is part of a cellular telephone.
To accurately recover the data of radio signal 501, the frequency synthesizer 530 may be set to generate the reference signal 512 such that its frequency is as close to the carrier frequency of radio signal 501 as possible. However, due to the finite step size of the fractional N PLL and the fact that, in this non-limiting example, the frequency provided by oscillator 302 may be arbitrary, an offset Δf between the carrier frequency of radio signal 501 and the frequency of reference signal 512 may result. The baseband electronics may apply previously described tuning signals 308 and 314 to tune the oscillator 302 so that the frequency of oscillating output signal 304 facilitates generation by frequency synthesizer 530 of a reference signal 512 having the desired carrier frequency. The values of tuning signals 308 and 314 may be determined by the baseband electronics in any of the manners previously described with respect to FIGS. 3 and 4, or in any other suitable manner. The offset Δf may, in some embodiments, be in the range of ±50 ppm to ±100 ppm, and therefore the desired carrier frequency may not be achievable with conventional RF front-ends. However, use of the frequency steering tuning signal 308 in combination with the AFC tuning signal 314 may allow the RF front-end to achieve accurate operation by enabling the reference signal 512 to have the desired target frequency.
According to this aspect, a carrier tracking loop 815 is used at the intermediate frequency to lock to the carrier of the radio signal 501 at the intermediate frequency. For this purpose the digital intermediate frequency data is down-converted by a mixer 816 using a frequency from a numerically controlled oscillator (NCO) 822. A quadrature splitter 820 is also provided (which generates zero and 90 degree phases in this non-limiting example). The down-converted signal undergoes an integrate and dump 824 operation and is passed on to the receiver processor 826. The receiver processor includes a PLL discriminator and loop filter and controls the NCO 822. In this manner, the digital data of the signal output by ADC 814 is effectively down-converted to the baseband such that it accurately reflects the data of radio signal 501 independent of the frequency of the reference oscillator 802. As a result the reference oscillator 802 does not require a AFC to obtain lock to the carrier frequency of the received radio signal 501.
According to another non-limiting aspect, an oscillator characterized by a frequency that is offset from a standard frequency may be placed in a system, the frequency of a signal generated by the system may be measured and compared to a target frequency for the system, and then one or more circuit components of the system may be adjusted such that the signal generated by the system has a frequency substantially equal to (wherein substantially equal includes exactly equal) the target frequency of the system. In this manner, oscillators having an unknown frequency offset from a standard frequency may be used in a system without harm to the system or degradation of the performance of the system, as a non-limiting example. For instance, as a non-limiting example, a crystal oscillator (e.g., a quartz crystal oscillator), MEMS oscillator, or other type of oscillator with an unknown frequency offset value (an unknown frequency offset from a standard oscillator frequency) may be connected to (e.g., put into) a wireless transceiver. During system test, the output frequency from the transmitter of the transceiver may be measured to determine if any offset exists between the measured transmitted frequency and the target transmitted frequency. Based on this offset, the offset of the oscillator frequency from a standard oscillator frequency may be calculated. A PLL (or other component) of the transceiver receiving the oscillating reference signal from the oscillator may then be adjusted (e.g., reprogrammed) such that the frequency of the transmitted signal of the transceiver is substantially equal to the target frequency of the transmitted signal of the transceiver. A non-limiting example is now described.
For purposes of illustration, FIG. 16 illustrates a non-limiting example of an RF front end to which one or more aspects of the present application may apply. The RF front end 1600 may be the same as RF front end 500. However, for purposes of illustration, FIG. 16 illustrates the transmit path circuitry of the RF front end and omits the receive path circuitry, while FIG. 5 illustrated the receive path circuitry and not the transmit path circuitry. Those components which are the same in the two figures are labeled by the same reference number in both figures.
As shown, the transmit path circuitry of RF front end 1600 includes the baseband electronics 520 (previously described), two digital-to-analog converters (DACs) 1616, two low-pass filters 1614, two mixers 1608, a quadrature splitter 1610 (which generates zero and 90 degree phases in this non-limiting example), and a power amplifier 1612. The power amplifier 1612 is coupled to the RF filter/duplexer 504, previously described. The transmit path generates a signal transmitted by antenna 502 as transmitted signal 1601.
According to a non-limiting embodiment of the present application, the actual frequency of the oscillator 302 may not be known, for example by the manufacturers of the RF front end or by others. However, the actual frequency may be determined by measuring the frequency of the transmitted signal 1601, for example during test of the RF front end. If the frequency of the oscillator differs from a target frequency (e.g., from the expected frequency value of the oscillator), one or more components of the RF front end may be adjusted to account for the frequency offset of the oscillator from the target frequency. In some such embodiments, no tuning signals 308 or 314 are necessarily applied, i.e., the frequency of the oscillating output signal 304 of the oscillator 302 may not be adjusted, but rather one or more components of the circuitry of the RF front end (e.g., the PLL 530, the mixer 1608, the baseband electronics 520, etc.) may be adjusted to account for the frequency offset of the oscillator from its target frequency.
A non-limiting example is now provided. Assume that the RF front end 1600 may be intended to cover a frequency range from approximately 915 MHz to approximately 945 MHz, with a center frequency of 930 MHz. Assume that the transmit circuitry of RF front end is configured to operate based on the assumption that the oscillating output signal 304 has a nominal output frequency of approximately 31.125 MHz. However, in reality, the oscillator frequency may deviate from this nominal value by an offset, which may be unknown in some scenarios (e.g., a manufacturer of the RF front end may not be the manufacturer of the oscillator and may not know the actual frequency value of the oscillator 302). As a result of the oscillator offset from its nominal frequency value (e.g., by up to ±8000 ppm, or any other amount), the transmitted signal 1601 may itself be offset from the target center frequency of 930 MHz. The actual frequency of the transmitted signal 1601 may be measured (using a frequency counter or any other suitable technique), for example during system test or at any other suitable time, and, if there is an offset between the measured frequency and the target transmitter frequency value (e.g., if the measured frequency of transmitter signal 1601 is 929.880481 MHz rather than the target frequency value of 930 MHz), the offset of the oscillator from its nominal value may be calculated.
As an example, based on the nominal oscillator frequency of 31.125 MHz and the target center frequency of the RF front end of 930 MHz, a multiplication factor of 930 MHz/31.125 MHz=29.87951807229 may be determined. The circuitry of the transmit path may be configured to provide this multiplication factor. If the frequency of transmitter signal 1601 is then measured as 929.880481, rather than the target of 930 MHz, the frequency of oscillator output signal 304 may be calculated as 929.880481/29.87951807229=31.121 MHz, rather than the nominal 31.125 MHz. Given the oscillator's offset from its nominal value, one or more components of the transmit path circuitry may be adjusted to take into account the actual frequency value of the oscillator 302. For example, any one or more of the following components may be adjusted in any suitable manner (e.g., by reprogramming or otherwise) to provide the desired 930 MHz transmitter signal given the 31.121 MHz oscillator frequency: the PLL 530 (or other type of frequency synthesizer if the system includes another type); the modulator 1608, or the baseband electronics 520. Alternatively, other components of the transmit path may be adjusted. In this manner, the circuitry of the RF front end may be adjusted to provide desirable operation despite the frequency offset of the oscillator 302 from its intended frequency, without the need to tune the oscillator.
It should be appreciated that the above-described example is non-limiting. The frequency values recited are provided for purposes of illustration only, and the various aspects described herein are not limited to use with any particular frequency values. Also, it should be appreciated that a similar technique may be performed using the receive path circuitry of an RF front end (e.g., the receive path circuitry of RF front end 500 of FIG. 5). For example, the receive path circuitry may be programmed to operate assuming a particular frequency of the oscillator 302. A received signal of known frequency may be received by antenna 502 and processed by the receive path circuitry to produce a processed signal. A difference between the actual frequency of the processed signal and a target frequency for the processed signal may be determined and, based on that difference, the actual frequency of oscillator 302 may be determined. Then, the receive path circuitry may be adjusted (e.g., the PLL 530, the modulators 508, the baseband electronics 520, etc.) to account for the offset of the oscillator frequency from its nominal frequency value.
Using the above-described techniques, determination of the actual frequency value of the oscillator may be made at any point in time, and that value may be stored in any suitable location. According to one non-limiting embodiment, the determined frequency value of the oscillator may be stored in system memory (e.g., within memory of the RF front end 1600, in the non-limiting example of FIG. 16). As a result, any potential need for the system to read the oscillator frequency value from memory of the oscillator (e.g., from memory 313) may be avoided. According to an alternative embodiment, the frequency value may be stored in the oscillator memory.
As described above, one non-limiting example of the present application involves determining the frequency of an oscillator coupled to a system at the time of system testing (e.g., during manufacturing of the system). However, the above-described techniques may also apply to other scenarios, such as the calibration of a system at any point during the lifecycle of the system. For example, the frequency of an oscillator may vary over time, due to aging, changes in package stress, or any of a variety of other factors. At any point during the lifecycle of a system, calibration may be performed in the manner described above with respect to FIG. 16 to determine the actual frequency of the oscillator at that point in time, and the system circuitry (e.g., PLLs, etc.) may be adjusted accordingly to account for any variation of the oscillator frequency over time. The newly measured oscillator frequency may be stored in any suitable location, such as in system memory, oscillator memory, or any other suitable location.
According to another non-limiting embodiment, an oscillator of unknown frequency may be placed within a system, such as a transceiver system (e.g., RF front end 500 or 1600), that may receive signals. The frequency of the received signal may be compared to a standard, such as the OCXO in the base station or picocell, a cesium clock in a GPS satellite, or a time signal distributed by 1588 or NTP or some generic network time distribution protocol. If a frequency difference exists between the received frequency and the standard frequency, it may be assumed that the system may not be calibrated to the oscillator. The oscillator frequency of the oscillator may be calculated based on any frequency difference between the received signal and the standard frequency, and any suitable circuitry of the system (e.g., PLLs, other types of frequency synthesizers, etc.) may be adjusted to account for the oscillator frequency.
It should be appreciated that the above-described aspects may apply to various types of oscillators, such as quartz oscillators, MEMS oscillators, FBAR, SAW, or any other suitable oscillators.
Some aspects of the present invention are directed to the design and operation of circuitry for generating a real time clock signal. Real time clocks provide an output indicative of current time (or “real time”), i.e., the passage of time according to standard timing units (e.g., year, month, date, day, hour, minute, and second). Conventional real time clocks utilize a standard frequency oscillator signal which has a frequency that is a power of 2 (typically 32 kHz, i.e., 32,768 Hz) and is divided down multiple times to generate a 1 Hz signal that is then used to track the passage of time. The accuracy of such conventional real time clocks therefore depends on the frequency accuracy of the oscillator, and uses division circuitry to generate the 1 Hz signal from the initial 32 kHz signal.
According to an aspect of the present invention, a real time clock utilizes a reference signal of arbitrary frequency generated by an arbitrary frequency reference oscillator, wherein the arbitrary frequency is not a power of 2. The reference signal of arbitrary frequency may be used to generate a reference clock signal having a one second time base (i.e., 1 Hz) or a time base of N or 1/N, where N is an integer. The reference clock signal may be generated by counting a number of oscillations of the reference signal of arbitrary frequency and initiating a clock pulse when the number of oscillations equals the arbitrary frequency of the reference oscillator. According to some such embodiments, the reference clock signal may therefore be generated without the need for or use of division circuitry. The reference clock signal may be provided as an input to a real time clock, which may track the passage of time. Non-limiting examples will be described further below.
According to one aspect of the present invention, a real time clock uses a tunable reference oscillator. The tunable reference oscillator may have an arbitrary frequency and may be frequency tunable. The output signal of the reference oscillator may be used to generate a reference clock signal having a desired time base, as described above. For example, a number of oscillations of the oscillating signal provided by the tunable reference oscillator may be counted and a clock pulse generated each time the counted number of oscillations equals the frequency of the oscillator, for example if a reference clock signal having a one second time base is to be generated. The reference clock signal may then be used by a real time clock to track current time.
According to one embodiment, the tunable reference oscillator may be frequency tuned to account for temperature induced variations in the frequency of the reference oscillator output signal. Non-limiting examples are described below. According to another embodiment, the tunable reference oscillator may be frequency tuned to set the frequency of the reference oscillator to an integer fraction of the desired time base of the reference clock signal generated from the output of the tunable reference oscillator. Such tuning to an integer fraction may, in some embodiments, simplify operation of any counter used to count oscillations of the reference oscillator output, in that the counter may be an integer counter as opposed to a fractional counter. As a non-limiting example, an arbitrary frequency oscillator with an output frequency of 127,123.456 Hz, may be tuned to 127,123 Hz to reduce the complexity of the counter by allowing for use of an integer based counter.
FIG. 9 illustrates a non-limiting example of a circuit 900 for generating a real time clock signal using a reference clock providing a reference clock signal of approximately 1 Hz. The circuit 900 includes a reference clock 902 (shown as a 1 second clock in the non-limiting example illustrated), providing a reference clock signal 904 which in some embodiments may be a pulse train with one pulse per second. The reference clock signal 904 is provided to a real time clock 906, which may be simplified compared to conventional real time clocks in that it may not include division circuitry for dividing the reference clock signal. The real time clock 906 may use the reference clock signal 904 to produce an output 910 indicative of the current time in any of seconds, minutes, hours, day, date, month, year, any combination thereof, or in any other suitable units. The output 910 indicative of the current time may be provided to a system 908, which may be any of the types of systems described previously herein or any other type of system. For example, according to one non-limiting embodiment, the system 908 may be part of a global positioning system (GPS) receiver.
FIG. 10 illustrates a variation on the circuit 900 of FIG. 9, in which the real time clock 906 may form a subsystem within a larger system 1006. The system 1006 of circuit 1000 may be any type of system, such as any of the types previously described herein, or any other type which may use a real time clock. The real time clock 906 may provide the output 910 to a subsystem 1010, which may be any suitable type of subsystem, including any of the types previously described herein.
While FIGS. 9 and 10 are illustrated as utilizing a reference clock signal with a time base of one second (i.e., a 1 Hz signal), it should be appreciated that the various aspects described herein relating to real time clocks, including those examples described above and those described below, are not limited in this respect. A reference clock signal of any suitable time base may be generated. For example, a reference clock signal with a frequency of N Hz or a time base of 1/N may be used, wherein N is an integer. Reference clock signals with a time base of one second are shown in FIGS. 9 and 10, as well as some of the following examples, for purposes of illustration only.
The reference clock 902 of FIGS. 9 and 10 may take any suitable form for generating a reference clock signal having a frequency of approximately 1 Hz (or any other suitable time base). According to one aspect of the present invention, a reference clock generator generating a reference clock signal having a frequency of approximately 1 Hz may comprise an arbitrary frequency oscillator providing an arbitrary frequency oscillating output signal to counter circuitry, which may count a number of oscillations of the oscillating output signal. A non-limiting example is shown in FIG. 11.
As shown, the reference clock generator 1100 includes an oscillator 1104, which may be an arbitrary frequency oscillator with a frequency that is not a power of 2, counter and comparator circuitry 1106, memory 1108, and a pulse generator 1110. As mentioned, the oscillator 1104 may be an arbitrary frequency oscillator with a frequency that is not a power of 2, although not all embodiments are limited in this respect. As shown, the oscillator 1104 may be coupled to the counter and comparator circuitry 1106, such that an oscillating output signal from oscillator 1104 is provided to an input of the counter and comparator circuitry 1106. The counter and comparator circuitry 1106 may count a number of oscillations of the oscillator output signal provided by oscillator 1104, and may compare the counted number of oscillations to a reference number. According to the non-limiting embodiment shown, the reference number may be provided by memory 1108 (which, in some embodiments, may be part of the oscillator 1104, but in other embodiments may be separate).
According to one embodiment, the reference number provided corresponds to the frequency of oscillator 1104. Thus, the counter and comparator circuitry 1106 may compare the number of oscillations of the oscillator output signal from oscillator 1104 to the frequency of oscillator 1104. According to one embodiment, the counter and comparator circuitry counts a number of rising edges of the oscillator output signal provided by the oscillator 1104. However, other manners of counting the number of oscillations of the oscillator output signal are also possible.
When the number of counted oscillations of the oscillator output signal equals the reference number, the counter and comparator circuitry 1106 may provide an indication of this event to pulse generation circuitry 1110, which may produce a pulse. According to one embodiment, the indication provided by counter and comparator circuitry 1106 may be a state change in the output signal provided to the pulse generator 1110, e.g., from a comparator circuit of the counter and comparator circuitry. Thus, in those embodiments in which the reference number utilized by the comparator corresponds to the frequency of the oscillator 1104, the resulting signal produced by the pulse generator 1110 may include one pulse (e.g., a clock pulse) every second, in the form of a pulse train or in any other suitable form.
As also shown in FIG. 11, a feedback path may be coupled between an output of the counter and comparator circuitry 1106 and a reset port of the counter and comparator circuitry. In this manner, the counter and comparator circuitry may be reset each time the number of oscillations of the oscillator output signal reaches the reference number.
While FIG. 11 illustrates the counter and comparator circuitry 1106 as being a single unit, it should be appreciated that various alternatives are possible and are contemplated within the present disclosure. For example, the counter and comparator circuitry 1106 may alternatively be implemented as distinct counter circuitry and comparator circuitry. The specific implementation of the circuitry is not limiting, and the form shown in FIG. 11 is provided for purposes of illustration.
A non-limiting specific example of frequencies and reference numbers is now given with respect FIG. 11. As shown in this non-limiting example, the oscillator 1104 may have a frequency of 127.633 KHz (which, it is noted, is not a power of 2), such that output signal of the oscillator has that same frequency. The memory 1108 has a reference number stored therein which may be provided to the counter and comparator circuitry 1106, and in this non-limiting example may be 127,633. The counter and comparator circuitry 1106 may count each oscillation of the oscillator output signal up to 127,633, at which point the counted number of oscillations equals the reference value stored in the memory 1108. At that time, a state of the output of counter and comparator circuitry 1106 may change (e.g., a low state may change to high state or vice versa), thus resetting the counter and comparator circuitry 1106 and also creating a clock pulse causing pulse generator 1110 to generate and output pulse 904.
In some embodiments, the reference value provided to the counter and comparator circuitry may differ from the exact number of oscillations of the reference oscillator which occur within one second. For example, the reference value may be based on a 127.633 KHz oscillator, but the actual frequency of the oscillator may be 127,632.5 Hz, such that pulses at the output of the counter and comparator circuitry are about 4 ppm (part per million) late. To reduce the timing error, a higher frequency oscillator may be used. For example, using a reference oscillator with ten times higher output frequency will reduce the timing error by a factor of ten. However, use of higher frequency oscillators also may involve higher power consumption, which may be viewed as undesirable and which therefore may be balanced against the desire for increased accuracy of the signal.
According to one aspect of the present invention, a reference clock configured to generate a reference clock signal having a frequency of approximately 1 Hz (or any other suitable time base) may utilize a correction factor to improve accuracy of the output reference signal. A non-limiting example is shown with respect to FIG. 12. As shown, the reference clock 1200 includes an oscillator 1204, counter and comparator circuitry 1206, memory 1208, and the pulse generator 1110. In this non-limiting embodiment, the memory 1208 includes a value having more significant digits than that of the example of memory 1108 in FIG. 11. As with the previously described example, the counter and comparator circuitry counts the number of rising edges of the oscillator output signal of oscillator 1204 and compares that number to the reference value stored in memory 1208. This comparison includes a correction factor ΣΔ. Once the reference value 1210 (x-ΣΔ) is reached, the output level of the counter and comparator circuitry may change (e.g., from low to high) and a pulse may be generated by pulse generator 1110. At the same time, the residual of the counter and comparator circuitry and the reference value 1212 is integrated in an error accumulator 1214, which may be any suitable type of accumulator. This residual Δj is a real number within the bounds 0≦Δj<1. When the value of Δj reaches 1, a value of 1 is added to the counted number of oscillations of the oscillator signal, and the accumulated error is reset to zero.
Thus, the accumulated timing error ΣΔ is taken into account in the counter and comparator circuitry 1206 to improve the accuracy of the reference clock generator. Accordingly, although one second pulses 904 may show some jitter in the range of parts per million, the accumulated error may be compensated for after the appropriate number of clock cycles (e.g., 127,633,123,456 clock cycles in this non-limiting example). Thus, the maximum error for the reference clock in this non-limiting embodiment is less than plus or minus one clock cycle, but the average timing error is zero. This method therefore enables the use of a low frequency reference oscillator while providing accurate generation of a 1 Hz output signal (or any other suitable time base) and at the same time minimizing power consumption. It should be understood, however, that this is one non-limiting example of a manner in which timing discrepancy between a reference value and an actual oscillator frequency may be tracked and compensated for.
As mentioned previously, according to some embodiments, a tunable reference oscillator of arbitrary frequency may be used. The frequency may be tuned to an integer value, which, for example, may avoid the need for the counter to perform the accumulator operation described in the example above. Thus, the counter may be simplified to be a pure integer counter using such a technique.
Arbitrary frequency reference oscillators of the type which may be used in real time clocks (e.g., the oscillators 1104 and 1204) may exhibit temperature dependent behavior. In particular, the frequency of the oscillator may vary with temperature. According to an aspect of the present invention, such temperature induced variations may be accounted for in real time clocks utilizing such oscillators. According to one aspect of the present invention, a tunable reference oscillator may be used in connection with a real time clock. For instance, oscillator 1104 and/or oscillator 1204 may be frequency tunable. Accordingly, upon the occurrence of temperature induced variations in the frequency of signals output by those oscillators, a suitable tuning signal may be generated to return the frequency to a desired value. According to another aspect, temperature induced variations in the frequency of reference oscillators utilized in combination with real time clocks may be accounted for by adjusting counter circuitry (e.g., circuitry 1106 or 1206) or a reference value applied to such circuitry (e.g., from memory 1108 and 1208). According to one aspect, frequency tuning of the tunable reference oscillator is combined with adjustment of the counter circuitry and/or reference value to account for temperature induced variations in the reference oscillator operation. Non-limiting examples are now given.
FIG. 13 illustrates a non-limiting example of a reference clock generator 1300 which may be used in combination with a real time clock (e.g., to provide a reference clock signal to the real time clock), and which is temperature compensated to account for temperature drift of the oscillator 1204. In the non-limiting example illustrated, a temperature sensor 1316 is used in combination with a look-up table (LUT) 1308. The temperature sensor 1316 measures the temperature T. Depending on the value of temperature T, the respective comparison frequency x to serve as the reference value for comparison by the counter and comparator circuitry 1206 to the counted number of oscillations of the output of oscillator 1204 is chosen from the LUT 1308, and in particular from the respective values 1318 stored therein. In this manner, temperature induced variations in the operation of oscillator 1204 may be accounted for. However, it should be understood that the use of the LUT describes only one technique for addressing temperature induced variation of the reference oscillator, and that other techniques are possible.
According to an alternative embodiment, a current or voltage from the temperature sensor 1316 may be used to compute an analog tuning voltage that is applied directly to the oscillator 1204 to frequency tune the oscillator (i.e., to adjust the oscillator frequency). The oscillator may be tuned to an integer arbitrary frequency (e.g., 30 Hz, 50 Hz, etc. or N Hz, where N is an integer), or any other suitable value for facilitating generation of a suitable reference clock signal (e.g., a reference clock signal having a frequency of 1 Hz).
According to a further alternative embodiment, frequency tuning of the type described above may be combined with use of a LUT as described with respect to LUT 1308. The combination of such techniques may provide improved accuracy and flexibility in addressing temperature induced frequency variations of the oscillator 1204. A non-limiting example is shown in FIG. 14, in which the illustrated reference clock generator 1400 includes a tunable arbitrary frequency reference oscillator 1404 and a LUT 1408. In this example, the illustrated memory 1108 stores and provides to the counter and comparator circuitry 1106 an integer value (i.e., 127,633 in this non-limiting case) that is close to the non-integer arbitrary frequency of the tunable oscillator 1404 (i.e., 127.633,123,456 kHz). The LUT table stores tuning values 1418 which can be applied to the reference oscillator 1404 to tune the reference oscillator to the frequency value from memory 1108 for a given measured temperature from temperature sensor 1316. Thus, the temperature sensor provides a signal to the LUT 1408 indicative of the measured temperature, in response to which a suitable tuning value is chosen and applied to the oscillator 1404. Other manners of addressing temperature induced variations (“temperature drift”) are also possible.
For instance, a further non-limiting example is illustrated in FIG. 15 with respect to a reference clock generator 1500. As shown, various techniques for maintaining a desired frequency output from an arbitrary frequency oscillator 1504 may be optionally used. Error correction functionality may optionally be provided by the accumulator 1214, as previously described herein (the optional nature is illustrated by the dashed lines). Alternatively, frequency tuning of the arbitrary frequency oscillator may optionally be used in response to a measured temperature, as previously described with respect to FIG. 14 and as indicated by the arrow from the temperature sensor 1316 to the LUT 1308 and the dashed arrow from the LUT 1308 to the oscillator 1504 (the optional nature is indicated by the dashing). Furthermore, the LUT 1308 may optionally supply a reference value x to the counter and comparator circuitry 1206 as a reference value against which to compare a counted number of oscillations of the signal output from the reference oscillator 1504 or as an adjustment to the accumulated error ΣΔ, as also shown by the dashed arrows (the optional nature is indicated by the dashing). Any combination of the techniques represented by the dashed arrows in FIG. 15 may be used.
Furthermore, while some of the foregoing aspects have been described in the context of cellular telephones, it should be appreciated that they are not limited to such applications. For example, one or more of the aspects may apply to other types of communications systems (e.g., other wireless communications systems, WiFi systems, etc.), as well as to other systems which make use of an oscillating reference signal provided by an oscillator including a mechanical resonator, such as navigation receivers (e.g., GPS receivers), FM receivers, storage systems (e.g., Fibre storage systems, including those using a reference oscillator to generate or operate on an optical signal, etc.), video systems, wireless infrastructure (e.g., WiMax), networking systems (e.g., SPI-4, PCI Express, etc.) or other devices. Thus, it should be appreciated that the foregoing discussion is provided for purposes of illustration, and is not limiting.
It should be appreciated from the foregoing that various benefits may be attained by application of one or more of the described aspects. For example, manufacturing constraints of conventional quartz crystal resonators may be relaxed since such resonators need not provide a precise frequency matching a standard oscillator frequency to operate according to the various aspects described herein. Furthermore, resonator technologies other than conventional quartz crystal resonators may be used even if they are not easily manufactured to provide a precise output frequency matching a standard oscillator frequency. Thus, for example, MEMS resonators having output signal frequencies which may be manufactured to a precision of ±10,000 ppm may be used. Such resonators may provide beneficial characteristics in terms of signal noise (e.g., phase noise among others), reduced spurious modes, improved noise floor, jitter, ruggedness, cost, lower power consumption, and lighter weight, as well as other characteristics.
measuring a frequency of an oscillating transmitter output signal of a transmitter, the transmitter forming at least part of a transceiver comprising a local oscillator, the local oscillator having a mechanical resonating structure and being configured to produce an oscillating signal having a frequency exhibiting a fractional deviation from a nominal oscillator frequency;
calculating a scaling factor based on the nominal oscillator frequency of the local oscillator, the frequency of the transmitter output signal and a target frequency of the transmitter output signal; and
reducing a fractional deviation of the frequency of the transmitter output signal from the target frequency of the transmitter output signal by adjusting a setting of one or more components of the transmitter based on the scaling factor, independent of adjusting the fractional deviation of the frequency of the oscillating signal from the nominal oscillator frequency.
8. The method of claim 1, wherein said reducing results in a fractional deviation of the frequency of the oscillating transmitter output signal from the target frequency of less than 30 parts per million, and wherein the fractional deviation of the frequency of the oscillating signal of the local oscillator from the nominal oscillator frequency is greater than 100 parts per million.
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