Source: http://www.google.com/patents/US7574544?dq=patent:5992892
Timestamp: 2017-02-22 16:43:31
Document Index: 296792086

Matched Legal Cases: ['§120', 'ART 20', 'ART 29', 'ART 29', 'ART 29', 'ART 20', 'ART 29', 'ART 20', 'ART 29', 'ART 29']

Patent US7574544 - Flow control by supplying a remote start bit onto a single-wire bus - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA single-wire communication bus couples a transmitting device to a UART in a receiving device. Flow control circuitry in the UART fills a transmit memory buffer with remote data. The UART supplies a remote start bit onto the single-wire bus for each byte of remote data written into the transmit memory...http://www.google.com/patents/US7574544?utm_source=gb-gplus-sharePatent US7574544 - Flow control by supplying a remote start bit onto a single-wire busAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS7574544 B1Publication typeGrantApplication numberUS 11/893,333Publication dateAug 11, 2009Filing dateAug 15, 2007Priority dateMay 21, 2004Fee statusPaidAlso published asUS7260660Publication number11893333, 893333, US 7574544 B1, US 7574544B1, US-B1-7574544, US7574544 B1, US7574544B1InventorsJoshua J. NeklOriginal AssigneeZilog, Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (23), Non-Patent Citations (3), Referenced by (1), Classifications (18), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetFlow control by supplying a remote start bit onto a single-wire bus
US 7574544 B1Abstract
(a) writing remote data bits into a transmit memory buffer, wherein the remote data bits are transmitted with a remote start bit from a receiving device over a single-wire communication bus; and
(b) reading received data bits, wherein the received data bits are received from the single-wire communication bus by the receiving device, wherein the received data bits convey more than a single bit of data, and wherein the remote start bit occupies a pulse duration that immediately precedes the received data bits.
2. The method of claim 1, wherein an RS232 character comprises the remote start bit and the received data bits.
3. The method of claim 1, wherein the remote start bit is a digital logic low, and each of the remote data bits is a digital logic high.
4. The method of claim 1, wherein eight remote data bits are written in (a), and the remote data bits represent the hex character [FF].
5. The method of claim 1, wherein the transmit memory buffer is a first-in-first-out memory buffer of a universal asynchronous receiver/transmitter.
7. The method of claim 1, wherein the received data bits are supplied by a target device onto the single-wire communication bus, wherein the receiving device is a host PC, and wherein the writing in (a) is performed by an operating system running on the host PC.
(b) reading received data bits, wherein the received data bits are supplied by a target device onto the single-wire communication bus before a subsequent remote start bit is detected on the single-wire communication bus by the target device, wherein the received data bits are received from the single-wire communication bus, wherein the received data bits convey more than a single bit of data, and wherein the remote start bit occupies a pulse duration that immediately precedes the received data bits.
(b) reading received data bits, wherein the received data bits are supplied by a target device onto the single-wire communication bus and are received by a host PC from the single-wire communication bus, wherein the writing in (a) is performed by a driver for the target device that plugs into an operating system running on the host PC, wherein the received data bits are received from the single-wire communication bus, wherein the received data bits convey more than a single bit of data, and wherein the remote start bit occupies a pulse duration that immediately precedes the received data bits.
(b) reading received data bits, wherein the received data bits are received from the single-wire communication bus, wherein the received data bits convey more than a single bit of data, and wherein the remote start bit occupies a pulse duration that immediately precedes the received data bits; and
This application is a continuation of, and claims priority under 35 U.S.C. §120 from, nonprovisional U.S. patent application Ser. No. 10/851,882 entitled “Flow Control by Supplying a Remote Start Bit Onto a Single-Wire Bus,” filed on May 21, 2004, now U.S. Pat. No. 7,260,660, the subject matter of which is incorporated herein by reference.
In a step 43, microcontroller 12 determines a pulse duration 51 of the remote start bit. Microcontroller 12 uses baud clock 31 to determine the baud rate at which UART 20 of host PC 13 transmits. In one example, remote start bit UART 29 directly measures pulse duration 51 by detecting the falling edge of the remote start bit and then the rising edge of the remote start bit. In another example, remote start bit UART 29 indirectly determines the pulse duration of the remote start bit by measuring the total time duration of the eight data bits in a hex character for which the least significant bit is one and the most significant bit is zero. For example, remote start bit UART 29 is programmed to determine the baud rate at which UART 20 of host PC 13 transmits when remote start bit UART 29 receives the predetermined hex character [OD] having an 8-bit RS232 data payload of (10110000) (least-significant bit first). UART 20 of host PC 13 transmits the hex character [OD] (the ASCII Carriage Return character) for auto-baud detection before transmitting the hex character [FF] with remote start bit 47. Remote start bit UART 29 then measures the time duration from the end of the logic low start bit to the beginning of the logic high stop bit. Remote start bit UART 29 then calculates pulse duration 51 based on the measured total time duration of the eight data bits.
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