Source: http://www.google.com/patents/US6457084?dq=5893120
Timestamp: 2016-06-28 22:34:36
Document Index: 788990962

Matched Legal Cases: ['Application No. 09', 'Application No. 09', 'Application No. 09', 'Application No. 09', 'Application No. 09', 'Application No. 09', 'Application No. 09', 'Application No. 09']

Patent US6457084 - Target side distributor mechanism for connecting multiple functions to a ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA computer system includes a first integrated circuit having a first function and a second integrated circuit having a plurality of second functions. A communication link connects the first integrated circuit and the second integrated circuit. The communication link includes at least one logical pipe...http://www.google.com/patents/US6457084?utm_source=gb-gplus-sharePatent US6457084 - Target side distributor mechanism for connecting multiple functions to a single logical pipe of a computer interconnection busAdvanced Patent SearchPublication numberUS6457084 B1Publication typeGrantApplication numberUS 09/330,528Publication dateSep 24, 2002Filing dateJun 11, 1999Priority dateNov 23, 1998Fee statusPaidPublication number09330528, 330528, US 6457084 B1, US 6457084B1, US-B1-6457084, US6457084 B1, US6457084B1InventorsDale E. Gulick, Geoffrey S. S. StronginOriginal AssigneeAdvanced Micro Devices, Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (20), Non-Patent Citations (10), Referenced by (11), Classifications (7), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetTarget side distributor mechanism for connecting multiple functions to a single logical pipe of a computer interconnection bus
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Gulick, Larry D. Hewitt, Alfred Hartmann, and Geoffrey S. S. Strongin as inventors, (claims only).2Application No. 09/330,527, filed Jun. 11, 1990, listing Dale E. Gulick and Geoffrey S. S. Strogin as inventors, (claims only).3Application No. 09/330,529, filed Jun. 11, 1999, listing Dale E. Gulick as inventor, (claims only).4Application No. 09/330,635, filed Jun. 11, 1999, listing Dale E. Gulick as inventor, (claims only).5Application No. 09/330,636, filed Jun. 11, 1999, listing Dale E. Gulick as inventor, (claims only).6Application No. 09/330,637, filed Jun. 11, 1999, listing Dale E. Gulick as inventor, (claims only).7Application No. 09/349,563, filed Jul. 8, 1999, listing Dale E. Gulick as inventor, (claims only).8Application No. 09/396,025, filed Sep. 15, 1999, listing Larry D. Hewitt and Dale E. Gulick as inventors, (claims only).9Chapters 1-3 and 6-7 of PCI Local Bus Specification, Revision 2.2, PCI Special Interest Group, Hillsboro, Oregon, Dec. 18, 1998, especially Chapters 3 and 6.10Compaq et al., "University Serial Bus Specification," Revision 1.0, Jan. 15, 1996, pp. 1-216.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS6690676 *Jun 11, 1999Feb 10, 2004Advanced Micro Devices, Inc.Non-addressed packet structure connecting dedicated end points on a multi-pipe computer interconnect busUS7676603 *Apr 20, 2004Mar 9, 2010Intel CorporationWrite combining protocol between processors and chipsetsUS7996572 *Jun 2, 2004Aug 9, 2011Intel CorporationMulti-node chipset lock flow with peer-to-peer non-posted I/O requestsUS8909743 *Jun 9, 2011Dec 9, 2014Microsoft CorporationDynamic session maintenance for mobile computing devicesUS9049125Dec 28, 2012Jun 2, 2015Intel CorporationGeneral input/output architecture, protocol and related methods to implement flow controlUS9071528Dec 28, 2012Jun 30, 2015Intel CorporationGeneral input/output architecture, protocol and related methods to implement flow controlUS9088495 *Dec 28, 2012Jul 21, 2015Intel CorporationGeneral input/output architecture, protocol and related methods to implement flow controlUS20050235067 *Apr 20, 2004Oct 20, 2005Intel CorporationWrite combining protocol between processors and chipsetsUS20050273400 *Jun 2, 2004Dec 8, 2005Intel CorporationMulti-node chipset lock flow with peer-to-peer non-posted I/O requestsUS20110238801 *Sep 29, 2011Microsoft CorporationDynamic session maintenance for mobile computing devicesUS20130254452 *Dec 28, 2012Sep 26, 2013Jasmin AjanovicGeneral input/output architecture, protocol and related methods to implement flow control* Cited by examinerClassifications U.S. Classification710/305, 370/351, 370/464, 370/431International ClassificationG06F13/14, H04L12/28Cooperative ClassificationG06F13/36Legal EventsDateCodeEventDescriptionJun 11, 1999ASAssignmentOwner name: ADVANCED MICRO DEVICES, INC., CALIFORNIAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GULICK, DALE E.;STRONGIN, GEOFFREY S.S.;REEL/FRAME:010035/0939;SIGNING DATES FROM 19990604 TO 19990609Feb 28, 2006FPAYFee paymentYear of fee payment: 4Feb 19, 2010FPAYFee paymentYear of fee payment: 8Feb 26, 2014FPAYFee paymentYear of fee payment: 12RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services