Source: http://www.google.com/patents/US8093508?dq=6,547,249
Timestamp: 2015-01-30 08:21:15
Document Index: 166354287

Matched Legal Cases: ['Application No. 2004', 'arts 52', 'art 52', 'arts 52', 'arts 52', 'arts 52', 'arts 52', 'arts 52', 'arts 52', 'arts 52']

Patent US8093508 - Printed wiring board and method of manufacturing the same - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA printed wiring board including a first insulating layer, a second insulating layer formed over the first insulating layer, a capacitor portion including an upper electrode, a lower electrode and a ceramic high dielectric layer formed between the upper electrode and the lower electrode, the capacitor...http://www.google.com/patents/US8093508?utm_source=gb-gplus-sharePatent US8093508 - Printed wiring board and method of manufacturing the sameAdvanced Patent SearchPublication numberUS8093508 B2Publication typeGrantApplication numberUS 12/758,908Publication dateJan 10, 2012Filing dateApr 13, 2010Priority dateJun 25, 2004Also published asCN1973590A, CN100576979C, CN101695216A, CN101695216B, EP1768474A1, EP1768474A4, US7480150, US7856710, US20070105278, US20080104833, US20100193227, WO2006001505A1Publication number12758908, 758908, US 8093508 B2, US 8093508B2, US-B2-8093508, US8093508 B2, US8093508B2InventorsTakashi Kariya, Akira MochidaOriginal AssigneeIbiden Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (26), Classifications (29) External Links: USPTO, USPTO Assignment, EspacenetPrinted wiring board and method of manufacturing the sameUS 8093508 B2Abstract A printed wiring board including a first insulating layer, a second insulating layer formed over the first insulating layer, a capacitor portion including an upper electrode, a lower electrode and a ceramic high dielectric layer formed between the upper electrode and the lower electrode, the capacitor portion sandwiched by the first insulating layer and the second insulating layer, an upper electrode connecting portion passing through the capacitor portion without contact and through the second insulating layer and electrically connected to the upper electrode of the capacitor portion, and a lower electrode connecting portion passing through the second insulating layer and the upper electrode of the capacitor portion without contact and electrically connected to the lower electrode in contact.
CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of and claims benefit of priority under 35 U.S.C. �120 from U.S. application Ser. No. 11/964,355, filed Dec. 26, 2007, the entire contents of which are hereby incorporated by reference. U.S. application Ser. No. 11/964,355 is a division of and claims the benefit of priority under 35 U.S.C. �120 from U.S. Ser. No. 11/615,495, filed Dec. 22, 2006, which is a continuation of International Application No. PCT/JP2005/012146, filed on Jun. 24, 2005, which claims priority from Japanese Patent Application No. 2004-188855, filed on Jun. 25, 2004.
TECHNICAL FIELD The present invention relates to a printed wiring board and a method of manufacturing the same, and particularly to a printed wiring board containing a capacitor portion having a structure that a ceramic high-dielectric layer is sandwiched between an upper electrode and a lower electrode, a semiconductor device being mounted on the printed wiring board, and a method of manufacturing the printed wiring board.
BACKGROUND ART There have been proposed various structures for a printed wiring board having a build-up portion that is electrically connecting a plurality of wire patterns laminated via insulating layers to each other through via holes. For example, with respect to this type of printed wiring board, when a semiconductor device mounted thereon is turned on and off at high speed, switching noise occurs and thus the potential of a power supply line is instantaneously reduced in some cases. In order to suppress such instantaneous reduction of the potential, it has been proposed that a capacitor portion is connected between the power supply line and the ground line for decoupling.
DISCLOSURE OF THE INVENTION However, in the publication described above, the electrode layer 104 of the capacitor portion 113 is connected to the ground electrode 111 via the filled via 107 extending just to the lower side thereof, and thus it is impossible to form the capacitor portion 113 in process of build-up. Therefore, as shown from FIG. 21( a) to FIG. 21( b), it is necessary to form the laminate body 106 separately from the build-up process and then turn over the laminate body 106 so that the electrodes 111 and 112 of the substrate 110 face the filled vias 107 and 108, so that the manufacturing processing is complicated.
In this specification, �up/upper� and �down/lower� are expressed, however, these terms express the relative positional relationship for convenience. For example, �up/upper� and �down/lower� may be replaced by each other, or �up/upper� and �down/lower� may be replaced with �right� and �left.�
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing the construction of a printed wiring board 10;
BEST MODE FOR CARRYING OUT THE INVENTION Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view showing the construction of a printed wiring board 10 according to an embodiment of the present invention.
Next, an example of the manufacturing process of the printed wiring board 10 of this embodiment will be described with reference to FIG. 2 to FIG. 19. FIG. 2 to FIG. 19 are diagrams showing the manufacturing procedure of the capacitor portion. In this case, the core board having the build-up portion 20 formed on one surface thereof is used as shown in FIG. 4. The manufacturing process of the build-up portion 20 is well known (for example, see �BUILD-UP MULTILAYER PRINTED WIRING BOARD TECHNIQUE� issued by Nikkan Kogyo Shinbun, Ltd. (authored by Kiyoshi Takagi) on Jun. 20, 2000). Therefore, description of the manufacturing process is omitted, and the manufacturing process of the capacitor portion will be mainly described.
EXAMPLES Examples 1 to 9 The examples shown in Table 1 were manufactured according to the above-described embodiment. Specifically, in the process shown in FIG. 6, the ratio of the number of ground pads 62 and the number of resist opening portions 312-1 (lower electrode connecting portions 51) were set to 1:0.1, and also the ratio of the number of power supply pads 64 and the number of resist opening portions 312-2 (the upper electrode connecting portion first parts 52 a) was set to 1:0.1. Furthermore, by adjusting the sizes of the opening portions 312-1 and 312-2, 314-1 and 314-2 shown in FIG. 9, the confronting area of the lower electrode 41 and the upper electrode 41 was set in the range from 3.22�10−5 m2 to 1.83�10−3 m2. As a result, the capacitance of the capacitor portion was equal to 0.44�10−6 F to 25�10−6 F. In this case, a plurality of ground terminals 72 of the IC chip 70 were electrically connected to one lower electrode connecting portion 51, and a plurality of power supply terminals 74 of the IC chip 70 were electrically connected to one upper electrode connecting portion first part 52 a. Example 10 In the above-described embodiment, the size of the high dielectric capacitor sheet 400 was set to 49.5 mm�43 mm, the ratio of the number of ground pads 62 and the number of lower electrode connecting portions 51 was set to 1:1, and the ratio of the number of power supply pads 64 and the number of upper electrode connecting portion first parts 52 a was set to 1:1. The number of ground pads 62 and the number of power supply pads 64 were set to 11000. The size of each opening portion 312-1 and 312-2 was set in the range from 300 to 400 μmφ). As a result, the capacitance of the capacitor portion was equal to 0.18�10−6 F.
Example 11 In the example 10, the ratio of the number of ground pads 62 and the number of lower electrode connecting portions 51 was set to 1:0.7, and the ratio of the number of power supply pads 64 and the number of upper electrode connecting portion first parts 52 a was set to 1:0.7. As a result, the capacitance of the capacitor portion was set to 8.8�10−6 F.
Example 12 In the example 10, the ratio of the number of ground pads 62 and the number of lower electrode connecting portions 51 was set to 1:0.5, and the ratio of the number of power supply pads 64 and the number of upper electrode connecting portion first parts 52 a was set to 1:0.5. As a result, the capacitance of the capacitor portion was equal to 15�10−6 F.
Example 13 In the example 10, the ratio of the number of ground pads 62 and the number of lower electrode connecting portions 51 was set to 1:0.1, and the ratio of the number of power supply pads 64 and the upper electrode connecting portion first parts 52 a was also set to 1:0.1. As a result, the capacitance of the capacitor portion was equal to 26�10−6 F.
Example 14 In the example 10, the ratio of the number of ground pads 62 and the number of lower electrode connecting portions 51 was set to 1:0.05, and the ratio of the number of power supply pads 64 and the number of upper electrode connecting portion first parts 52 a was set to 1:0.05. As a result, the capacitance of the capacitor portion was equal to 27.5�10−6 F.
Example 15 In the example 10, the ratio of the number of ground pads 62 and the number of lower electrode connecting portions 51 was set to 1:0.03, and the ratio of the number of power supply pads 64 and the number of upper electrode connecting portion first parts 52 a was also set to 1:0.03. As a result, the capacitance of the capacitor portion was equal to 28�10−6 F.
Example 16 In the example 10, the ratio of the number of ground pads 62 and the number of lower electrode connecting portions 51 was set to 1:0.01, and the ratio of the number of power supply pads 64 and the number of upper electrode connecting portion first parts 52 a was also set to 1:0.01. As a result, the capacitance of the capacitor portion was equal to 29�10−6 F.
Example 17 This example was manufactured according to the example 6. Specifically, in the manufacturing of the high dielectric capacitor sheet 400, the repetitive frequency of spin-coat/dry/firing was set to one time. As a result, the thickness of the high dielectric layer 430 was equal to 0.03 μm.
Example 18 This example was manufactured according to the example 6. Specifically, in the manufacturing of the high dielectric capacitor sheet 400, the repetitive frequency of spin-coat/dry/firing was set to four times. As a result, the thickness of the high dielectric layer 430 was equal to 0.12 μm.
Example 19 This example was manufactured according to the example 6. Specifically, in the manufacturing of the high dielectric capacitor sheet 400, the repetitive frequency of spin-coat/dry/firing was set to 15 times. As a result, the thickness of the high dielectric layer 430 was equal to 0.44 μm.
Example 20 This example was manufactured according to the example 6. Specifically, in the manufacturing of the high dielectric capacitor sheet 400, the repetitive frequency of spin-coat/dry/firing was set to 200 times. As a result, the thickness of the high dielectric layer 430 was equal to 6 μm.
Example 21 This example was manufactured according to the example 6. Specifically, in the manufacturing of the high dielectric capacitor sheet 400, the repetitive frequency of spin-coat/dry/firing was set to 330 times. As a result, the thickness of the high dielectric layer 430 was equal to 9.9 μm.
Example 22 This example was manufactured according to the example 6. Specifically, in the manufacturing of the high dielectric capacitor sheet 400, the repetitive frequency of spin-coat/dry/firing was set to 500 times. As a result, the thickness of the high dielectric layer 430 was equal to 15 μm.
Example 23 A chip capacitor was mounted on the surface of the printed wiring board of the example 1, and the connection between the chip capacitor and the ground terminal, the power supply terminal of the IC chip was carried out via the capacitor portion 40 contained in the printed wiring board.
Comparative Example A high dielectric capacitor sheet of a comparative example was manufactured on the basis of the manufacturing process of the modification of the high dielectric capacitor sheet described with reference to the embodiment. However, the electrode was formed on the unfired layer after drying with no firing. As a result, the electrostatic capacitance just below the die was less than 0.001 μF.
The following IC chips were mounted on the printed wiring boards of the examples 1 to 16, 23 and the comparative example. The simultaneous switching was repeated at 100 times, and the presence or absence of malfunction was checked by using a pulse pattern generator/error detector (produced by Advantest Corporation, name of product: D3186/3286). When there was no malfunction, it was indicated as a good product �O (circle),� and when there was some mal function, it was indicated as a defective product �X (cross).�
One heat cycle was set to −55� C.�5 minutes, 125� C.�5 minutes, and 1000 cycles were repetitively carried out on each of the printed wiring boards of the examples 4, 17 to 22. The connection resistance of a specific circuit which was connected from a terminal at the opposite side to the IC chip mount surface via the IC to a terminal at the opposite side to the IC chip mount surface (a terminal different from the terminal at the opposite side) was measured before the heat cycle test, at the 500-th cycle and at 1000-th cycle to determine the resistance variation rates of the following equation. When the resistance variation rate was within �10%, it was indicated as success �O (circle),� and when the resistance variation rate exceeds �10%, it was indicated as defective �X (cross),� and the result is shown in Table 1.
3.67 � 10−4 �
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS5387888Apr 1, 1993Feb 7, 1995Matsushita Electric Industrial Co., Ltd.High frequency ceramic multi-layer substrateUS5745333Nov 21, 1994Apr 28, 1998International Business Machines CorporationLaminar stackable circuit board structure with capacitorUS6005197Aug 25, 1997Dec 21, 1999Lucent Technologies Inc.Embedded thin film passive componentsUS6218729Mar 11, 1999Apr 17, 2001Atmel CorporationApparatus and method for an integrated circuit having high Q reactive componentsUS6274224Feb 1, 1999Aug 14, 20013M Innovative Properties CompanyPassive electrical article, circuit articles thereof, and circuit articles comprising a passive electrical articleUS6512182Mar 4, 2002Jan 28, 2003Ngk Spark Plug Co., Ltd.Wiring circuit board and method for producing sameUS6677630Jun 25, 2002Jan 13, 2004Kabushiki Kaisha ToshibaSemiconductor device having ferroelectric film and manufacturing method thereofUS6822170Dec 26, 2001Nov 23, 2004Ngk Spark Plug Co., Ltd.Embedding resin and wiring substrate using the sameUS6910266Jul 1, 2003Jun 28, 2005Samsung Electro-Mechanics Co., Ltd.Printed circuit board with embedded capacitors therein, and process for manufacturing the sameUS6952049Mar 29, 2000Oct 4, 2005Ngk Spark Plug Co., Ltd.Capacitor-built-in type printed wiring substrate, printed wiring substrate, and capacitorUS6970363Nov 26, 2003Nov 29, 2005Hewlett-Packard Development Company, L.P.Expansion card support mechanismUS20010026444Jan 22, 2001Oct 4, 2001Naoki MatsushimaElectronic circuit board with built-in thin film capacitor and manufacturing method thereofUS20030215619May 13, 2003Nov 20, 2003Shinko Electric Industries Co., Ltd.Metal core substrate and process for manufacturing sameUS20040108134Sep 16, 2003Jun 10, 2004Borland William J.Printed wiring boards having low inductance embedded capacitors and methods of making sameUS20040231885Feb 4, 2004Nov 25, 2004Borland William J.Printed wiring boards having capacitors and methods of making thereofUS20090200073Sep 3, 2008Aug 13, 2009Ibiden, Co., Ltd.Printed wiring board with capacitorCN1458815AMay 14, 2003Nov 26, 2003新光电气工业株式会社Metal core base plate and its producing processEP0563873A2Mar 30, 1993Oct 6, 1993Matsushita Electric Industrial Co., Ltd.High frequency ceramic multi-layer substrateJP2002536825A Title not availableJP2003197463A Title not availableJP2003332752A Title not availableJP2004087971A Title not availableJPH02177350A Title not availableJPH06291520A Title not availableJPH08213758A Title not availableWO2000045624A1Jun 4, 1999Aug 3, 20003M Innovative Properties CoPassive electrical article, circuit articles thereof, and circuit articles comprising a passive electrical articleClassifications U.S. Classification174/262, 174/260, 361/763International ClassificationH05K1/16, H05K1/11Cooperative ClassificationH05K2201/0175, H05K3/4602, H05K1/162, H01L2924/3011, H05K2201/09509, H05K2201/09518, H01L2221/68363, H05K2201/09718, H01L21/6835, H05K2201/09309, H01L2224/16, H01L2924/01079, H01L2221/68345, H05K2201/0355, H01L21/4857, H01L2924/01078, H01L2924/01057, H05K2203/0353, H01L2924/30105, H01L2924/19041, H01L2924/0102European ClassificationH01L21/48C4D, H05K1/16C, H01L21/683TRotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services