Source: http://www.google.com/patents/US20050003586?dq=6233389
Timestamp: 2018-01-17 19:13:16
Document Index: 381744978

Matched Legal Cases: ['arts 4', 'arts 4', 'arts 4', 'arts 4', 'arts 4', 'arts 4', 'arts 4', 'arts 4', 'arts 51', 'arts 4', 'arts 4', 'art 42']

Patent US20050003586 - Manufacturing method of a semiconductor device - Google Patents
A non-leaded resin-sealed semiconductor device is manufactured by the steps of providing a conductive flat substrate (metal plate) of copper plate or the like, fixing semiconductor elements respectively to predetermined positions on the principal surface of the substrate by an insulating adhesive, electrically...http://www.google.com/patents/US20050003586?utm_source=gb-gplus-sharePatent US20050003586 - Manufacturing method of a semiconductor device
Publication number US20050003586 A1
Application number US 10/902,785
Also published as US7407834, US7459347, US20020168796, US20080268578
Publication number 10902785, 902785, US 2005/0003586 A1, US 2005/003586 A1, US 20050003586 A1, US 20050003586A1, US 2005003586 A1, US 2005003586A1, US-A1-20050003586, US-A1-2005003586, US2005/0003586A1, US2005/003586A1, US20050003586 A1, US20050003586A1, US2005003586 A1, US2005003586A1
Inventors Yoshihiko Shimanuki, Masayuki Suzuki
Original Assignee Renesas Technology Corporation, Hitachi Yonezawa Electronics Co., Ltd.
Patent Citations (11), Referenced by (85), Classifications (62), Legal Events (5)
US 20050003586 A1
A non-leaded resin-sealed semiconductor device is manufactured by the steps of providing a conductive flat substrate (metal plate) of copper plate or the like, fixing semiconductor elements respectively to predetermined positions on the principal surface of the substrate by an insulating adhesive, electrically connecting electrodes on the surfaces of the semiconductor elements with predetermined partition parts of the substrate separate from the semiconductor elements by conductive wires, forming an insulating resin layer on the principal surface of the substrate to cover the semiconductor elements and wires, selectively removing the substrate from the rear of said substrate to form electrically independent partition parts whereof at least some are external electrode terminals, and selectively removing said resin layer to fragment the device into regions containing the semiconductor elements and the plural partition parts around the semiconductor elements. Thus, there is provided a compact non-leaded semiconductor device having a large number of electrode terminals.
1-4 (Cancelled)
5. A method of manufacturing a semiconductor device comprising the steps of providing a metal substrate having a front surface, a rear surface, grooves on the front surface partitioning the front surface into plural areas;
providing a semiconductor chip having a front surface, a rear surface, electrodes formed on the front surface;
fixing the semiconductor chip on the front surface of the metal substrate;
electrically connecting the electrodes of the semiconductor chip with the plural areas of the front surface of the metal substrate by conductive wires, respectively;
forming a resin body which seals the semiconductor chip, the conductive wires, and the plural areas of the front surface of the metal substrate;
after the resin body forming step, etching the rear surface of the metal substrate so as to electrically isolating the plural areas of the front surface of the metal substrate from one another; and
after the etching step, plating etched surface of the metal substrate by solder by print-plating method.
6. A method of manufacturing a semiconductor device according to claim 5, wherein the metal substrate providing step, the rear surface of the metal substrate has no grooves formed thereon.
This invention relates to a method of manufacturing a semiconductor device such as a resin-sealed LSI (large-scale integrated circuit) using a metal substrate, and in particular to an effective technique which can be applied to the manufacture of a semiconductor device (non-leaded semiconductor device) wherein external electrode terminals are made to project from a mounting surface without deliberately making the external electrode terminals project from the side of the package, such as in a SON (Small Outline Non-Leaded Package) or QFN (Quad Flat Non-Leaded Package).
From the viewpoint of compactness of the semiconductor device and preventing bending of leads which are the external electrode terminals, non-leaded semiconductor devices such as SON or QFN with one-side molding are used. In non-leaded semiconductor devices, the lead surfaces exposed on one surface of the package are mounting surfaces, so the mounting surface area is smaller than in the case of semiconductor devices such as SOP (Small Outline Package) or QFP where the leads project from the lateral surface of the package.
The method of manufacturing the non-leaded semiconductor device using this substrate is as follows. Semiconductor elements are fixed to the unit substrate parts on the surface where grooves are present and the surface where grooves are not present. For example, a semiconductor element is fixed to the center of a unit substrate part. The substrate is formed so that plural (two or more) rows of partition parts are situated outside the semiconductor element. Next, the electrodes of the semiconductor element and a predetermined partition part situated outside the semiconductor element or the rear surface of the predetermined partition part are connected by wires. Next, a resin layer is formed to a uniform thickness in a one-side mold by transfer molding so as to cover the semiconductor element and wires. Next, a tape is affixed over the whole of the front surface of the resin layer. Subsequently, the groove bases are cut by moving a dicing blade relatively along the extension direction of the groove so as to isolate the substrate, i.e., isolate the partition regions. Next, the resin layer is cut transversely and longitudinally so that the unit substrate parts are mutually independent. independent unit substrate parts are supported by tape. Next, plural non-leaded semiconductor devices are manufactured by peeling off the tape.
(a) Two or more rows of external electrode terminals are arranged along one side of the non-leaded semiconductor device, so the number of external electrode terminals can be increased.
(b) As two or more rows of external electrode terminals are arranged along one side of the non-leaded semiconductor device, the semiconductor device can be made compact.
(c) The external electrode terminals are formed by cutting metal plate transversely and longitudinally by a dicing blade, so the shape and dimensions of the external electrode terminals can be made very precise.
(d) As the external electrode terminals are formed by cutting a metal plate transversely and longitudinally by a dicing blade, long projections (manufacturing burrs) due to cutting do not easily occur on the periphery of the external electrode terminals, and the electrode flatness improves. As a result, when the non-leaded semiconductor device is mounted on a mounting board using solder or the like, faulty contacts of the external electrode terminals with the lands (interconnections) of the mounting board due to projections do not easily occur, so mounting strength is improved and mounting reliability is improved.
(e) In a structure wherein partition parts in a region enclosed by the semiconductor element are connected, by means of wires, to partition parts to which wires are connected outside the semiconductor element, external electrode terminals may also be formed in a region underneath the semiconductor element, so not only is there more flexibility in forming the interconnection pattern on the mounting board, but the mounting board can be made more compact by modifying the interconnection pattern.
(f) The partition parts (external electrode terminals) can easily be formed by cutting one metal plate, so the cost of manufacturing the semiconductor device can be reduced.
According to the above means (2),
(a) At least two rows of external electrode terminals are disposed along one side of the non-leaded semiconductor device, so the number of external electrode terminals can be increased.
(c) The external electrode terminals are formed by cutting a metal plate transversely and longitudinally by a dicing blade, so the shape and dimensions of the external electrode terminals can be made very precise.
(e) As external electrode terminals can be formed for plural semiconductor devices simply by dicing with a dicing blade in the transverse and longitudinal directions of one metal plate, the cost of manufacturing semiconductor devices can be reduced.
(f) By providing grooves in the substrate and forming electrically isolated partition regions by removing the groove bases after forming the resin layer, the partition part isolation time is shorter and the time required to manufacture the semiconductor device is shortened. Due to this shortening of the cutting time, there is less wear of the dicing blade and the life of the blade is extended. Hence, the cost of manufacturing the semiconductor device is reduced.
(g) As the grooves are formed by etching, manufacturing burrs do not occur on the edges of the grooves. Therefore, in the manufacturing method where the semiconductor element is fixed to the surface where grooves are not present, the electrode flatness of the external electrode terminals formed by the partition parts is satisfactory, and the reliability of mounting the semiconductor device is increased.
(h) By adopting a stand-off construction, problems do not occur even if there are foreign bodies on the mounting board during mounting of devices.
(i) When the semiconductor element is fixed to the surface where grooves are present, isolation by removing the groove bases of the partition parts may be performed by removing the substrate by polishing or etching to a fixed thickness. In this case, the electrode flatness of the external electrode terminals can be made satisfactory.
(j) By providing through holes at intersection points which divide the substrate transversely and longitudinally, the cutting time by the dicing blade can be shortened and the life of the blade can be extended.
(k) When the semiconductor element is fixed to a surface where grooves are present, gaps between the semiconductor element and the substrate are prevented from occurring by filling the grooves in the region where the semiconductor element is fixed with a filling material, water does not collect on the fixing surfaces of the semiconductor element and substrate, and when the semiconductor device is mounted by solder reflow, mounting defects due to swelling of this water do not easily occur.
According to the above means (3), in addition to the effects of the above means (2),
(a) grooves are provided facing each other on the front and rear surfaces of the substrate, and when the partition regions of the substrate are isolated, the groove bases of the grooves on the front and rear surfaces can be cut simply by moving the dicing blade relatively in the extension direction of the grooves, therefore the isolation time of the partition parts is shorter and the time required to manufacture the semiconductor device is shortened. Also, due to the shortening of cutting time, there is less wear on the dicing blade and the life of the blade is extended. Hence, the cost of manufacturing the semiconductor device is reduced. According to the above means (4), two or more rows of external electrode terminals are disposed along one side of the non-leaded semiconductor device, so the number of external electrode terminals can be increased.
(c) The external electrode terminals are formed by cutting a metal plate (leads) at plural points by a dicing blade, so the shape and dimensions of the external electrode terminals can be made very precise.
(d) As the external electrode terminals are formed by cutting a metal plate (leads) at plural points by the dicing blade, long projections (manufacturing burrs) due to cutting do not easily occur on the periphery of the external electrode terminals, and the electrode flatness improves. As a result, when the non-leaded semiconductor device is mounted on a mounting board using solder or the like, faulty contacts of the external electrode terminals with the lands (interconnections) of the mounting board due to projections do not easily occur, so mounting strength is improved and mounting reliability is improved.
(f) The external electrode terminals can be formed by cutting the leads in their width direction with the dicing blade, so the cutting time can be shortened, and as the cutting time is short, there is less wear on the dicing blade and the life of the blade is extended. Hence, the cost of manufacturing the semiconductor device is reduced.
(g) When the resin layer is formed by transfer molding, the substrate is in adhesive contact with the mounting surface of the mold by vacuum suction, and as the lead surfaces are also in adhesive contact with the mounting surface, resin no longer seeps onto the rear surface of the tabs and the rear surface of the leads. Consequently, soiling of the mounting surface of the semiconductor element by the resin can be prevented, and a non-leaded semiconductor device having a high mounting reliability can be manufactured.
FIG. 1 is a schematic cross-sectional view of a non-leaded resin sealing package type semiconductor device according to a first embodiment (Embodiment 1) of this invention.
FIG. 32 is a base plan view of the semiconductor device of Embodiment S.
FIG. 41 is a base plan view of the semiconductor device of Embodiment 8.\
Some embodiments of this invention will now be described in detail referring to the appended drawings. In all of the drawings used to describe the embodiments of the invention, parts having identical functions are assigned the same symbols and their description will not be repeated.
FIG. 1 to FIG. 13 are diagrams related to the method of manufacturing a non-leaded resin-sealed semiconductor device according to a first embodiment (Embodiment 1) of the invention. In Embodiment 1, in FIG. 1 to FIG. 4, an example is shown wherein the method of this invention is applied to the manufacture of a non-leaded semiconductor device 1 wherein external electrode terminals 2 comprising a conductive body (metal) are exposed on the rear surface of a square sealing package 33.
In the manufacture of the non-leaded semiconductor device, a semiconductor substrate 20 is first provided as shown in FIG. 7(a). This substrate 20 comprises a metal plate such as a copper alloy plate, copper plate or iron-nickel alloy plate usually used for the manufacture of semiconductor devices. In Embodiment 1, a flat copper plate is used. As shown in FIG. 8, this substrate 20 is a rectangular flat plate (rectangular plate) of a size such that plural semiconductor devices can be manufactured in one operation, for example 3 columns and 8 rows of 24 semiconductor devices can be manufactured. Although not shown in FIGS. 7A to 7G, to improve the bonding properties of the semiconductor element and the connectivity of the wires, the plating film 11 (FIG. 5) comprising Ag is provided on one surface of the substrate 20, i.e., on the principal surface to which the semiconductor element is fixed. The thickness of the substrate 20 may for example be 0.125-0.2 mm.
If the dicing blade 22 has a thickness of 150 μm, for example, the partition parts 4 having sides of 0.5 mm are formed in a grid pattern at a pitch of 0.65 mm. In this dicing, as the substrate 20 is cut without fail, the tip of the dicing blade is diced to a depth which passes through the substrate 20, but care is taken not to cut the rear surface of the semiconductor element 5. Consequently, the dicing groove bases are situated at an intermediate depth of the adhesive 9 which fixes the semiconductor element 5 to the substrate 20. There is no particular problem if the dicing groove is formed in a surface layer part inside the resin layer 3 a.
The boundary between a unit substrate region and a unit substrate region is cut by the dicing blade 22, and the resin layer 3 a is cut simultaneously. Due to the cutting of the resin layer 3 a, fragmentation is achieved, and plural semiconductor devices 1 are manufactured although they are still attached to the tape 21. The resin layer 3 a covering the semiconductor elements 5 and wires 7 form a sealing package 3 due to this cutting.
Next, as shown in FIG. 7(g), plural non-leaded semiconductor devices 1 are manufactured by peeling off the tape 21 from the resin sealing body 3. In this construction, in the semiconductor device 1 of Embodiment 1, the external electrode terminals 2 are formed in two rows along the edges (sides) of the semiconductor device 1.
(1) The external electrode terminals 2 are formed in two rows along the periphery (sides) of the non-leaded semiconductor device, so the number of external electrode terminals 2 can be increased.
(2) In a non-leaded semiconductor device which requires a large number of external electrode terminals, the external electrode terminals have to be aligned in one row along one side of the sealing package, so the length of one side of the package has to be increased, the sealing package becomes larger and the semiconductor device becomes large, but in the case of Embodiment 1, the external electrode terminals 2 are disposed in two rows along the sides of the semiconductor device, so a sealing package 33 can be made smaller, and the semiconductor device 1 can be made compact.
(3) Due to the aforesaid (1) and (2), the number of external electrode terminals 2 can be increased even in a small resin sealing package, so large numbers of terminals are possible. This is desirable in a multi-function semiconductor device.
(4) As the external electrode terminals 2 are formed by cutting transversely and longitudinally by the dicing blade, the shape and dimensions of the external electrode terminals 2 can be controlled to a high precision.
(5) As the external electrode terminals 2 are formed by cutting a metal plate transversely and longitudinally by the dicing blade, long projections (manufacturing burrs) due to cutting do not easily occur on the periphery of the external electrode terminals, and the electrode flatness improves. As a result, when the non-leaded semiconductor device is mounted on the interconnection board 15 such as a motherboard, modular board or mounting board using solder or the like, faulty contacts of the external electrode terminals 2 with the lands (interconnections) 17 of the mounting board due to projections do not easily occur, so mounting strength is improved and mounting reliability is improved.
(6) As the partition parts (external electrode terminals) can easily be formed by cutting one metal plate, the cost of manufacturing the semiconductor device is reduced.
(7) According to the aforesaid (1)-(6), a non-leaded semiconductor device which has a high mounting reliability, is compact and has large numbers of external electrode terminals, can be manufactured economically.
Next, a modification of Embodiment 1 will be described. FIG. 9 to FIG. 11 are diagrams relating to another non-leaded semiconductor device manufactured by the semiconductor device manufacturing method of Embodiment 1. These diagrams show a non-leaded semiconductor device with a three row terminal construction wherein the external electrode terminals 2 are arranged in three rows. Specifically, in this semiconductor device 1, the wires 7 are connected to three rows of partition parts 4 separated from the semiconductor element 5. As contact between the wires is to be avoided, wires are not connected to some of the partition parts 4. The three rows of partition parts 4 to which the wires 7 are connected, are used as the external electrode terminals 2. However, in order to increase mounting strength, the partition parts 4 situated in the region underneath the semiconductor element 5 may also be used for mounting.
FIG. 14 and FIG. 15 are diagrams relating to the method of manufacturing the non-leaded semiconductor device according to another embodiment (Embodiment 2) of this invention. FIG. 14 is a cross-sectional view of the steps showing the method of manufacturing the semiconductor device, and FIG. 15 is a plan view of the substrate to which semiconductor elements are fixed and wires are attached.
(1) The external electrode terminals 2 are formed in two rows along the periphery (sides) of the non-leaded semiconductor device, so the number of the external electrode terminals 2 can be increased.
(2) In a non-leaded semiconductor device which requires a large number of external electrode terminals, the external electrode terminals have to be aligned in one row along one side of the sealing package, so the length of one side of the package has to be increased, the sealing package becomes larger and the semiconductor device becomes large, but in the case of Embodiment 2, the external electrode terminals 2 are disposed in two rows along the sides of the semiconductor device, so the sealing package 3 can be made smaller, and the semiconductor device 1 can be made compact.
(7) In the cutting of the substrate 20, the cutting depth of the dicing blade 22 is only the groove bases of the grooves 25, and due to the decrease in the amount of cutting, the time required for forming the external electrode terminals and fragmentation is shortened.
(8) From the above (7), due to the decrease in the amount of cutting, the dicing blade 22 has less wear, the life of the dicing blade 22 is extended and the cost of manufacturing the semiconductor device 1 is reduced.
(9) According to the aforesaid (1)-(8), a non-leaded semiconductor device which has a high mounting reliability, is compact and has large numbers of external electrode terminals, can be manufactured economically.
According also to Embodiment 2, various modifications can be applied as in the case of Embodiment 1, and in this case, an identical effect to that of Embodiment 1 is obtained.
FIGS. 16A to 16G are cross-sectional views of steps showing the method of manufacturing a non-leaded semiconductor device according to another embodiment (Embodiment 3) of this invention. In this Embodiment 3, the substrate 20 used in the manufacture of the semiconductor device 1 has a construction wherein, unlike Embodiment 2, the grooves 25 are provided in a checkered pattern on the side on which the semiconductor elements are fixed. In other words, the substrate 20 comprising the grooves 25 which was used in Embodiment 2 is inverted.
FIG. 26 is a cross-sectional view of steps showing the method of manufacturing a non-leaded semiconductor device according to another embodiment (Embodiment 4) of this invention. In Embodiment 4, the grooves 25 are not provided on one surface of the substrate 20 as in Embodiment 3, but are provided on both sides of the substrate 20 so that they are facing each other. The grooves 25 are provided on both sides of the substrate 20, and the groove bases have a predetermined thickness as mechanical strength is required. For example, the thickness of the bases grooves 25 may be 50 μm.
FIG. 31 is a cross-sectional view of a non-leaded semiconductor device manufactured by a method according to another embodiment (Embodiment 5) of this invention, and FIG. 32 is a base plan view of the semiconductor device. Embodiment 5 has a stand-off construction wherein a predetermined gap is left between the rear surfaces of the semiconductor elements 5 and the interconnection board during mounting, by removing the partition parts 4 inside the three rows of the external electrode terminals 2 arranged along the sides of the semiconductor device 1. The semiconductor device 1 having the structure shown in FIG. 31 can be manufactured by providing a rectangular hole which is a stand-off in the center part of the unit substrate parts of the substrate 20, and then performing chip bonding, wire bonding, transfer molding, dicing and fragmentation. FIG. 32 is a base plan view of the semiconductor device 1, there being no partition parts 4 (external electrode terminals 2) in the center part.
FIG. 33 is a cross-sectional view of a non-leaded semiconductor device manufactured by a method according to another embodiment (Embodiment 6) of this invention, and FIG. 34 is a base plan view of the semiconductor device. Embodiment 6 is a stand-off construction as in the case of Embodiment 5. In this embodiment, the substrate region surface requiring stand-off in the substrate 20 is made thinner by half-etching. In this construction also, during mounting as in the case of Embodiment 5, if a foreign body comes to be facing the half-etched partition parts 4, the foreign body does not easily interfere.
FIG. 35 to FIG. 38 are diagrams relating to a method of manufacturing a non-leaded semiconductor device according to another embodiment (Embodiment 7) of this invention. FIG. 35 is a cross-sectional view of the manufactured non-leaded semiconductor device, FIG. 36 is a perspective view showing the planar arrangement of the semiconductor device, FIG. 37 is a base plan view of the semiconductor device, and FIG. 38 is an enlarged cross-sectional view of part of the semiconductor device.
FIG. 39 to FIG. 41 are diagrams relating to a method of manufacturing a non-leaded semiconductor device according to another embodiment (Embodiment 8) of this invention. FIG. 39 is a cross-sectional view of the manufactured non-leaded semiconductor device, FIG. 40 is a perspective view showing the planar arrangement of the semiconductor device, and FIG. 41 is a base plan view of the semiconductor device.
FIG. 42 to FIG. 44 are diagrams relating to a method of manufacturing a non-leaded semiconductor device according to another embodiment (Embodiment 9) of this invention. FIG. 42 is a schematic cross-sectional view of the substrate used in the method of manufacturing the semiconductor device, FIG. 43 is a cross-sectional view along a line A-A in FIG. 42, and FIG. 44 is a cross-sectional view along a line B-B in FIG. 42.
FIG. 45 to FIG. 48 are diagrams relating to a method of manufacturing a non-leaded semiconductor device according to another embodiment (Embodiment 10) of this invention. FIG. 45 is a cross-sectional view of the manufactured non-leaded semiconductor device, FIG. 46 is a perspective view showing the planar arrangement of the semiconductor device, FIG. 47 is a base plan view of the semiconductor device, and FIG. 48 is a cross-sectional view of some of the steps in the method of manufacturing the semiconductor device.
FIG. 49 to FIG. 51 are diagrams relating to a method of manufacturing a non-leaded semiconductor device according to another embodiment (Embodiment 11) of this invention. FIG. 49 is a cross-sectional view of the manufactured non-leaded semiconductor device, FIG. 50 is a perspective view showing the planar arrangement of the semiconductor device, and FIG. 51 is a cross-sectional view of some of the steps in the method of manufacturing the semiconductor device.
FIG. 52 is a cross-sectional view of a non-leaded semiconductor device manufactured by a method according to another embodiment (Embodiment 12) of this invention, and FIGS. 53A to 53C is a cross-sectional view of some of the steps showing the method of manufacturing the semiconductor device. In FIGS. 53A to 53C, only provision of the substrate (FIG. 53A), fixing of the semiconductor elements (FIG. 53B) and wire bonding (FIG. 53C) are shown.
FIG. 54 is a perspective view showing a planar arrangement of a non-leaded semiconductor device manufactured by a method according to another embodiment (Embodiment 13) of this invention.
FIG. 55 is a cross-sectional view of steps illustrating the method of manufacturing the semiconductor device according to another embodiment (Embodiment 14) of this invention. Embodiment 14 is an example wherein the resin layer 3 a is formed by a method other than transfer molding, such as for example a dispenser.
FIG. 56 to FIG. 63 are diagrams relating to the method of manufacturing the semiconductor device according to another embodiment (Embodiment 15) of this invention. In Embodiment 15, the fixing of the semiconductor element to one surface of the substrate, the connection of the electrodes of the semiconductor device to predetermined positions on the substrate by conductive wires, one-side molding to cover the semiconductor elements, the cutting of the substrate to form the semiconductor device and the removal of unnecessary substrate are identical to the aforesaid embodiments.
Next, the method of manufacturing the semiconductor device will be described referring to FIG. 60. First, as shown in FIG. 60(a), the substrate 20 is provided. The substrate 20 has the pattern shown in FIG. 61. The materials and thickness of this substrate 20 are effectively identical to those of the aforesaid embodiments. Also, the pattern may be manufactured by selectively etching or stamping the substrate 20.
Next, as shown in FIG. 60D, the semiconductor elements 5 and wires 7 are covered by an insulating resin (resin layer 3 a) by transfer molding to seal the package. When this transfer molding is performed, the tab parts 51 of the substrate 20 are made to adhere to the surface of the lower die of a molding die by vacuum suction nozzles 53. This state is shown in FIG. 63. In FIG. 60(d), the nozzles 53 are shown schematically.
FIG. 64 to FIG. 69 are diagrams relating to the method of manufacturing the semiconductor device according to another embodiment (Embodiment 16) of this invention. In Embodiment 16, the unit substrate parts of Embodiment 15 are formed by the tabs 51 and leads 52, so the four corners of the rectangular unit substrate regions are not used efficiently. This embodiment therefore provides a means of also using the four corners efficiently.
FIG. 70 to FIG. 72 are diagrams relating to the method of manufacturing the semiconductor device according to another embodiment (Embodiment 17) of this invention. FIG. 70 is a cross-sectional view of the semiconductor device, FIG. 71 is a perspective view showing the planar arrangement of the semiconductor device, and FIG. 72 is a base plan view of the semiconductor device.
FIG. 73 to FIG. 75 are diagrams relating to the method of manufacturing a semiconductor device according to another embodiment (Embodiment 18) of this invention. FIG. 73 is a cross-sectional view of the manufactured non-leaded semiconductor device, FIG. 74 is a perspective view showing the planar arrangement of the semiconductor device, and FIG. 75 is a base plan view of the semiconductor device.
FIG. 76 to FIG. 78 are diagrams relating to the method of manufacturing the semiconductor device according to another embodiment (Embodiment 19) of this invention. FIG. 76 is a cross-sectional view of the manufactured non-leaded semiconductor device, FIG. 77 is a perspective view showing the planar arrangement of the semiconductor device, and FIG. 78 is a base plan view of the semiconductor device.
FIG. 79 to FIG. 82 are diagrams relating to the method of manufacturing the semiconductor device according to another embodiment (Embodiment 20) of this invention. FIG. 79 is a cross-sectional view of the semiconductor device, FIG. 80 is a perspective view showing the planar arrangement of the semiconductor device, FIG. 81 is a base plan view of the semiconductor device, and FIG. 82 is an enlarged cross-sectional view of part of the semiconductor device Embodiment 20, which is a Modification 3 of Embodiment 3, may be applied to the method of forming the partition parts 4 by polishing the undersurface of the substrate 20. Specifically, in this case, when the substrate 20 is patterned, the grooves 25 are not provided in the region to which the semiconductor element 5 is fixed. In this way, the bonding surface area of the semiconductor element 5 increases, the bonding strength increases, and heat which is generated from the semiconductor element 5 can be rapidly dissipated to the outside from the partition parts 4 which have a large surface area.
FIG. 83 is a schematic plan view of a semiconductor device manufactured by a method according to another embodiment (Embodiment 21) of this invention.
FIG. 84 to FIG. 97 are diagrams relating to the non-leaded semiconductor device according to another embodiment (Embodiment 22) of this invention. In Embodiment 22, a chip fixing partition part 42 which is slightly larger than the semiconductor element 5 is provided as in Embodiment 10, and the substrate 20 has the grooves 25 provided on the chip fixing surface side.
FIG. 98 is a cross-sectional view of the steps involved in the method of manufacturing a non-leaded semiconductor device according to another embodiment (Embodiment 23) of this invention, and FIG. 99 is an enlarged cross-sectional view showing a part of the non-leaded semiconductor device.
FIG. 100 to FIG. 105 are diagrams relating to the non-leaded semiconductor device according to another embodiment (Embodiment 24) of this invention. FIG. 100 to FIG. 103 are diagrams relating to the manufacture of the non-leaded semiconductor device, FIG. 100 is a cross-sectional view of the semiconductor device 1, FIG. 101 is a perspective view of the semiconductor device 1, FIG. 102 is a base plan view of the semiconductor device 1, and FIG. 103 is a partial enlarged cross-sectional view.
FIG. 106 to FIG. 110 are diagrams relating to a non-leaded semiconductor device according to another embodiment (Embodiment 25) of this invention. FIG. 106-FIG. 109 are diagrams relating to the manufacture of the non-leaded semiconductor device, FIG. 106 is a schematic cross-sectional view of the semiconductor device, FIG. 107 is a perspective view showing the planar arrangement of external electrode terminals, FIG. 108 is a base plan view of the semiconductor device, and FIG. 109 is an enlarged cross-sectional view of part of the semiconductor device. FIG. 110 is a descriptive diagram describing the relation between the interconnections of the mounting board of the non-leaded semiconductor device and the external electrode terminals of the non-leaded semiconductor device of Embodiment 25.
(1) A compact non-leaded semiconductor device can be provided.
(2) A non-leaded semiconductor device having plural external electrode terminals can be provided.
(3) A method of manufacturing a non-leaded semiconductor device having at least two rows of external electrode terminals along the sides of the semiconductor device, can be provided.
(4) A method of manufacturing a non-leaded semiconductor device wherein the external electrode terminals are formed to a high precision of shape and dimensions, can be provided.
(5) A non-leaded semiconductor device having a high mounting reliability, can be provided.
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U.S. Classification 438/124, 257/E23.124
International Classification H01L21/304, H01L21/301, H01L23/12, H01L21/56, H01L23/28, H01L21/48, H01L23/31
Cooperative Classification H01L2224/49113, H01L2224/05554, H01L24/73, H01L2924/12042, H01L2224/48644, H01L2224/48664, H01L2924/181, H01L2224/48639, H01L2924/07802, H01L24/48, H01L2224/48257, H01L2224/29111, H01L2924/0132, H01L2224/29139, H01L2224/85464, H01L2924/01047, H01L21/561, H01L2224/45144, H01L2924/01006, H01L2924/3025, H01L2224/49171, H01L2224/85439, H01L2224/29007, H01L2924/01005, H01L2224/48091, H01L2224/48247, H01L2224/73265, H01L2224/32245, H01L2924/01019, H01L24/32, H01L24/49, H01L21/4832, H01L23/3107, H01L2224/85444, H01L2924/01079, H01L2924/01028, H01L2224/92247, H01L2924/01078, H01L2924/01083, H01L24/45, H01L2924/014, H01L2224/49433, H01L2224/97, H01L24/97, H01L2924/01029, H01L2221/68377, H01L2924/14
European Classification H01L24/97, H01L24/49, H01L24/32, H01L21/56B, H01L23/31H, H01L21/48C3E4
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