Source: http://www.google.com/patents/US7505316?ie=ISO-8859-1&dq=7,682,496
Timestamp: 2015-03-01 21:28:55
Document Index: 19185642

Matched Legal Cases: ['Application No. 2005', 'art 2', 'art 1', 'art 1', 'art 210', 'art 210']

Patent US7505316 - Data storage having function to protect stored data - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA data storage includes a part of functioning for, when data reading operation is carried out on a storage part storing data for a case where the data storage is handled in a predetermined manner, causing predetermined data different from target data to be read out instead of the target data....http://www.google.com/patents/US7505316?utm_source=gb-gplus-sharePatent US7505316 - Data storage having function to protect stored dataAdvanced Patent SearchPublication numberUS7505316 B2Publication typeGrantApplication numberUS 11/740,811Publication dateMar 17, 2009Filing dateApr 26, 2007Priority dateOct 13, 2005Fee statusLapsedAlso published asUS7342834, US20070086242, US20070195599Publication number11740811, 740811, US 7505316 B2, US 7505316B2, US-B2-7505316, US7505316 B2, US7505316B2InventorsOsamu IshibashiOriginal AssigneeFujitsu LimitedExport CitationBiBTeX, EndNote, RefManPatent Citations (13), Classifications (5), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetData storage having function to protect stored data
US 7505316 B2Abstract
A data storage includes a part of functioning for, when data reading operation is carried out on a storage part storing data for a case where the data storage is handled in a predetermined manner, causing predetermined data different from target data to be read out instead of the target data.
1. A data storage comprising a functioning part responsive to an unauthorized data reading operation attempted to be carried out on a storage part storing target data, to cause predetermined data, different from the target data, to be read out instead of the target data, wherein:
said functioning part responds to a data reading operation attempted to be carried out on the storage part storing target data for a case where said data storage is handled in a predetermined manner to cause predetermined data, different from the target data, to be read out instead of the target data, and is configured such that said functioning part causes addressing in a manner different from a proper manner when said data storage is handled in said predetermined manner, upon addressing said storage part; and
predetermined external terminals are previously short-circuited, and a configuration is provided such that the short-circuit of the predetermined external terminals is removed when the data storage is handled in said predetermined manner, and
said functioning part, which causes addressing in a predetermined manner, different from the proper manner, when said data storage is handled in said predetermined manner, carries out the proper addressing when said predetermined external terminals are short-circuited while carrying out the predetermined addressing, different from the proper addressing, when said short-circuit is removed.
said predetermined data to be read out, instead of the target data, comprises information for automatically initiating a predetermined communication operation for notification.
3. The data storage as claimed in claim 1, wherein:
said predetermined data, read out instead of the target data, is configured in such a manner that, when said predetermined data is thus read out and then is actually used, the actual use is detected.
4. A data storage comprising a part functioning, in response to unauthorized addressing to perform a data reading operation, attempted to be carried out on a storage part storing target data, instead to cause dummy data, different from the target data, to be read out, wherein:
previously short-circuited external terminals, in response to authorized addressing of the functioning part to read out target data from the storage part, remain shod-circuited and cause the target data to be read out; and
in response to unauthorized addressing of the storage part storing target data, the short-circuit of the external terminals is removed, causing the functioning part to carry out addressing different from the proper addressing and causing dummy data, different from the target data, to be read out.
5. The data storage as claimed in claim 4, wherein:
said dummy data comprises information automatically initiating a predetermined communication operation for notification.
6. The data storage as claimed in claim 4, wherein:
said dummy data, read out instead of the target data, is configured in such a manner that, when read out and actually used, causes the actual use to be detected. Description
This application is a Divisional Application of Ser. No. 11/335,610 filed Jan. 20, 2006, now issued as U.S. Pat No. 7,342,834, and claims the benefit of Japanese Priority Application No. 2005-299201, filed on Oct. 13, 2005, the entire contents of which are hereby incorporated herein by reference.
Recently leakage, robbery or such, of information to be protected, such as personal information, confidential information or such, has taken an attention as a social problem. As a result, countermeasures are demanded for various types of information processing apparatuses which handle such information to be protected.
For example, in a fingerprint authentication system as one example of a system handling personal information as information to be protected, fingerprint information as personal information may be stored in such a nonvolatile memory. When the nonvolatile memory is stolen, a serious problem may occur, i.e., leakage of personal information to be protected.
Alternatively, a data storage includes a part of functioning for responding to data reading operation carried out on a storage part storing data to cause predetermined data, different from target data, to be read out instead of the target data.
As a result, even with a simple configuration, stored data can be positively erased automatically when the data storage is stolen or so (whereby the data storage is handled in the predetermined manner, i.e., the data storage is removed without a special concern).
In the latter configuration, data different from target data can be made to be read out when the data storage is stolen or so. In this configuration, an unauthorized person may believe that he or she obtained the target data even when actually different data is thus read out.
Thus, according to the present invention, when a data storage is stolen or so, stored data is automatically erased or different data is read out. As a result, unauthorized use of information to be protected can be effectively prevented.
A data storage according to each embodiment of the present invention includes, as shown in FIG. 1, a data storage part 2 storing information to be protected and a functioning part 1 functioning on the storing part 1.
According to a first mode of carrying out the present invention, a window or an opening is provided on, for example, a bottom of a package of a nonvolatile memory, that is, a so-called a memory with a window, described later, is realized. As a result, when the package of the nonvolatile memory is mounted on a printed substrate in such a manner that the bottom thereof is covered by a surface of the printed substrate, the window or the opening provided thereto is blocked thereby, and thus, the window or the opening is prevented from being exposed to outside light.
On the other hand, when this package of the nonvolatile memory is removed from the printed substrate without any special concern, the window or the opening, provided to the bottom thereof, is exposed to outside light accordingly. As a result, the nonvolatile memory, inside the package, is exposed to outside light via the window or the opening. Then, energy of the outside light functions to the nonvolatile memory to automatically erase the stored data.
Technology of data erasure with the use of hot carriers is mentioned, for example, by �a hot carrier mechanism is applied to an erasure method, . . . � in an item �(2) for employment of low cost flash memory process technology� in �for development of �World's first 32-bit RISC-type microcontroller having a flash memory built therein�, by NEC ELECTRONICS, NEC, Mar. 12, 1996 (URL: http://www.nec.co.jp/press/ja/9603/1202.html, Oct. 4, 2005).
Further, technology for reducing an write/erase operation voltage and achieving high speed operation by employing hot carriers is mentioned in an item of �principle and configuration of MONOS� in a column of �space traveling device, low-cost mixing-use nonvolatile memory device technology �MONOS�� by SONY (URL: http://www.sony.co.jp/Products/SC-HP/cx_pal/vol52/pdf/monos_f.pdf, Oct. 4, 2005).
From these known technologies, it is seen that a voltage required for driving electrons can be reduced with the use of hot carriers, and thereby, electrons even can be driven even with low energy. That is, it is seen that, by injecting hot carriers in a semiconductor memory, energy required for erasing data can be reduced.
Further, as described in an item of �UV-EPROM (ultraviolet erasable PROM)� of a column �EPROM, from: free encyclopedia �Wikipedia�� (URL: http://ja.wikipedia.org/wiki/EPROM: Oct. 4, 2005), technology of achieving data erasure by exciting electrons with ultraviolet irradiation so that they may penetrate a gate insulating film is known.
Especially, as will be descried later for a third embodiment, in the first mode of carrying out the present invention, a so-called memory with a window, the same as the above-mentioned well-known UV-EPROM, is applied. A configuration of this �memory with a window� is described as �a quartz glass made window is provided to a package of an UV-EPROM for applying ultraviolet ray� in a column �UV-EPROM (ultraviolet erasable PROM)� of the above-mentioned column �EPROM, from: free encyclopedia �Wikipedia�� (URL: http://ja.wikipedia.org/wiki/EPROM: Oct. 4, 2005).
As mentioned above, according to the second mode of carrying out the present invention, from the above-mentioned predetermined addressing (caused by the above-mentioned removal of the short circuit bridge) other than the proper addressing, predetermined dummy data is read out. Instead, a predetermined program may be executed as a result of the predetermined dummy data is read out. As a result, a control system of a general-purpose personal computer or such, which is applied by a third person to read data from the target data storage, may be controlled by this program or the dummy data itself. As a result, via a communication network such as the Internet, a notification signal is automatically generated for a predetermined organization. Then, this fact that the dummy data or the predetermined program has been thus read out is notified of to the predetermined organization as information of notifying that illegal reading or illegal use of information to be protected is thus executed, whereby the predetermined organization may take appropriate measures.
As shown, the data storage includes an address decoder 50 responding to an address signal to provide a reading signal to a memory cell 110 or a dummy memory cell 210; the memory cell 110 storing proper data; the dummy memory cell 210 storing dummy data different from the proper data; an EXOR device 300 with an inverting function to carry out exclusive-or operation between signals on the address terminal A1 and the connection monitor terminal TS, and outputting an operation result after inverting with the inverting function; a gate device 120 passing the proper read data from the memory cell 110 in response to an H level output of the EXOR 300 with the inverting function; a gate device 220 passing the dummy read data from the dummy memory cell 210 in response to an H level signal inverted by an inverter 230 from an L level output of the EXOR 300 with the inverting function; and the inverter 230.
On the other hand, when the short circuit bridge between the address terminal A1 and the connection monitor terminal TS is removed due to a cause that the data storage is removed from the printed substrate or such, as mentioned above for the second mode of carrying out the present invention, both inputs of the EXOR device 300 with the inverting function have different levels. As a result, the EXOR device 300 with the inverting function outputs an L level. Thereby, the gate device 120 enters a blocking state, while the gate device 220 responds to an H level inverted from the above-mentioned L level output enters a passing state. As a result, the dummy data is read out from the memory cell 210.
This dummy data is, as mentioned above, includes information for initiating automatic notifying operation for notifying the predetermined organization, information for initiating displaying operation for displaying a caution message to an operator, false and imitating authentication information or such.
Since the second embodiment has approximately the same configuration as that of the first embodiment described above with reference to FIG. 3, duplicate description is omitted.
In this configuration of the second embodiment, when the short-circuit bridge between the address terminal A1 and the connection monitor terminal TS is removed due to a removal of the data storage for an illegal purpose or such, the L level output of the EXOR device 300 with the inverting function is inverted by the inverter 230, and the H level signal thus obtained causes the gate device 220 to enter the passing state, whereby a signal having the above-mentioned fixed signal level is read out from the dummy data generating part 210A.
In Step S3, when unexpected removal of the memory with the window occurs, that is, when the memory with the window is removed without such a special concern that the window is prevented from being uncovered, the stored data is destroyed as a result of the inside memory chip being exposed to outside light in Step S4. That is, the window of the package of the memory with the window is thus uncovered, whereby the memory inside the package is exposed to outside light, and the stored data in the memory chip is destroyed due to the function of the hot carriers injected therein as mentioned above.
In FIG. 6, in Step S11, a data storage having a circuit configuration such as that shown in FIG. 3 or 4 is provided. In Step S12, when the data storage is mounted on a printed substrate, an address terminal A1 and a connection monitor terminal TS are short-circuited by a solder bridge.
As a result, only the gate device 220 enters the passing state as mentioned above since the short circuit between the terminals A1 and TS is thus removed, whereby both terminals may have different signal levels. Thereby, instead of the proper data, dummy data stored in the dummy memory cell 210 or fixed data generated by the dummy data generating part 210A is read out.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS6324626 *Jul 1, 1998Nov 27, 2001Rohm Co., Ltd.Semiconductor memoryUS6504765Dec 27, 2001Jan 7, 2003Hynix Semiconductor Inc.Flash memory device and method of erasing the sameJP2000047947A Title not availableJP2001195307A Title not availableJP2001202167A Title not availableJP2002073422A Title not availableJPH102004A Title not availableJPH0588986A Title not availableJPH0916477A Title not availableJPH10320293A Title not availableJPH11328036A Title not availableKR20030041007A Title not availableKR20040087794A Title not available* Cited by examinerClassifications U.S. Classification365/185.04, 711/156International ClassificationG11C16/04Cooperative ClassificationG11C16/22European ClassificationG11C16/22Legal EventsDateCodeEventDescriptionMay 7, 2013FPExpired due to failure to pay maintenance feeEffective date: 20130317Mar 17, 2013LAPSLapse for failure to pay maintenance feesOct 29, 2012REMIMaintenance fee reminder mailedSep 1, 2009CCCertificate of correctionRotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services