Source: http://www.google.com/patents/US8193567?dq=mezick
Timestamp: 2017-11-21 04:47:12
Document Index: 785282167

Matched Legal Cases: ['Application No. 094136197', 'Application No. 10', 'Application No. 200680023301', 'Application No. 03817697', 'Application No. 11', 'Application No. 112006001735', 'Application No. 2006', 'Application No. 10', 'Application No. 200680023301', 'Application No. 03817699', 'Application No. 05711376', 'Application No. 06815547', 'Application No. 10', 'Application No. 95122087', 'Application No. 95122087', 'Application No. 95123858', 'Application No. 95123858', 'Application No. 95123858', 'Application No. 95135820', 'Application No. 95135820', 'Application No. 95134963', 'Application No. 200680021817', 'Application No. 200580032314', 'Application No. 200507013', 'Application No. 200604766']

Patent US8193567 - Process for integrating planar and non-planar CMOS transistors on a bulk ... - Google Patents
A process capable of integrating both planar and non-planar transistors onto a bulk semiconductor substrate, wherein the channel of all transistors is definable over a continuous range of widths....http://www.google.com/patents/US8193567?utm_source=gb-gplus-sharePatent US8193567 - Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
Publication number US8193567 B2
Application number US 12/333,248
Also published as CN101292346A, CN101292346B, EP1929516A2, US7479421, US20070069293, US20090090976, WO2007038575A2, WO2007038575A3
Publication number 12333248, 333248, US 8193567 B2, US 8193567B2, US-B2-8193567, US8193567 B2, US8193567B2
Inventors Jack T. Kavalieros, Justin K. Brask, Brian S. Doyle, Uday Shah, Suman Datta, Mark L. Doczy, Matthew V. Metz, Robert S. Chau
Patent Citations (425), Non-Patent Citations (90), Referenced by (15), Classifications (21), Legal Events (1)
US 8193567 B2
4. The microprocessor of claim 1, wherein the channel regions of the first and second non-planar transistors are undoped and wherein the channel region of the planar transistor is doped.
US6317444 Jun 12, 1998 Nov 13, 2001 Agere System Optoelectronics Guardian Corp. Optical device including carbon-doped contact layers
US6457890 Dec 22, 1999 Oct 1, 2002 Gregor Kohlruss Device for cleaning flat objects
US6765303 May 6, 2003 Jul 20, 2004 Advanced Micro Devices, Inc. FinFET-based SRAM cell
US6780694 Jan 8, 2003 Aug 24, 2004 International Business Machines Corporation MOS transistor
US6967351 * Dec 4, 2001 Nov 22, 2005 International Business Machines Corporation Finfet SRAM cell using low mobility plane for cell stability and method for forming
US6969878 Apr 8, 2003 Nov 29, 2005 Stmicroelectronics S.A. Surround-gate semiconductor device encapsulated in an insulating medium
US7138320 Oct 27, 2004 Nov 21, 2006 Advanced Micro Devices, Inc. Advanced technique for forming a transistor having raised drain and source regions
US7141480 Mar 26, 2004 Nov 28, 2006 Texas Instruments Incorporated Tri-gate low power device and method for manufacturing the same
US7247578 Dec 30, 2003 Jul 24, 2007 Intel Corporation Method of varying etch selectivities of a film
US7297600 Dec 23, 2004 Nov 20, 2007 Samsung Electronics Co., Ltd. Methods of forming fin field effect transistors using oxidation barrier layers
US20040110331 Dec 6, 2002 Jun 10, 2004 Yee-Chia Yeo CMOS inverters configured using multiple-gate transistors
US20050023633 Nov 4, 2003 Feb 3, 2005 Yee-Chia Yeo Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
US20060172479 Mar 14, 2006 Aug 3, 2006 International Business Machines Corporation Method of forming buried isolation regions in semiconductor substrates and semiconductor devices with buried isolation regions
US20060227595 * Apr 7, 2005 Oct 12, 2006 International Business Machines Corporation Back-gate controlled read SRAM cell
US20070259501 May 5, 2006 Nov 8, 2007 Texas Instruments Incorporated Integrating high performance and low power multi-gate devices
US20080128796 Nov 30, 2006 Jun 5, 2008 International Business Machines Corporation Triple gate and double gate finfets with different vertical dimension fins
TW200518310A Title not available
1 Auth, Christopher P., et al., "Vertical, Fully-Depleted, Surrounding Gate MOSFETs on sub-0.1 mum Thick Silicon Pillars," 54th Annual Device Research Conference Digest, 1996, 4 pgs.
2 Auth, Christopher P., et al., "Vertical, Fully-Depleted, Surrounding Gate MOSFETs on sub-0.1 μm Thick Silicon Pillars," 54th Annual Device Research Conference Digest, 1996, 4 pgs.
3 Buchanan, D. A., et al., "Fabrication of Midgap Metal Gates Compatible With Ultrathin Dielectrics," Applied Physics Letters, vol. 73.12, Sep. 21, 1998, 3 pgs.
4 Burenkov, A., et al., "Corner Effect in Double and Triple Gate FinFETs," IEEE, 2003, 4 pgs.
5 Chang, L., et al., "CMOS Circuit Performance Enhancement by Surface Orientation Optimization," IEEE Transactions on Electron Devices, vol. 51, No. 10, Oct. 2004, 7 pgs.
6 Chang, S. T., et al., "3-D Simulation of Strained Si/SiGe Heterojunction FinFETs," Semiconductor Device Research Symposium, Dec. 2003, 2 pgs.
7 Chau, et al., "Advanced Depleted-Substrate Transistors: Single-Gate, Double-Gate and Tri-gate (Invited Paper)", Components Research, Logic Technology Development, Intel Corporation, Hillsboro, OR, 2 pages, filed Sep. 21, 2011.
8 Chau, Robert, "Advanced Metal Gate/High-K Dielectric Stacks for High-Performance CMOS Transistors," Components Research, Intel Corporation, 2004, 3 pgs.
9 Choi, et al., "A Spacer Patterning Technology for Nanoscale CMOS," IEEE, (49)3, Mar. 2002, 6 pgs.
10 Choi, et al., "Sub-20nm CMOS FinFET Technologies," IEEE, IEDM, 2001, 4 pgs.
11 Final Office Action for U.S. Appl. No. 11/648,521 mailed Jan. 8, 2010, 11 pgs.
12 Final Office Action from U.S. Appl. No. 11/080,765 mailed Nov. 13, 2007, 13 pgs.
13 Final Office Action from U.S. Appl. No. 11/154,138 mailed Dec. 8, 2009, 11 pgs.
14 Final Office Action from U.S. Appl. No. 11/158,661 mailed Jan. 15, 2008, 25 pgs.
15 Final Office Action from U.S. Appl. No. 11/240,487 mailed Sep. 21, 2009, 22 pgs.
16 Final Office Action from U.S. Appl. No. 11/322,795 mailed Jan. 13, 2010, 12 pgs.
17 Final Office Action from U.S. Appl. No. 11/828,290, mailed Feb. 17, 2010 18 pgs.
18 Final Office Action from U.S. Appl. No. 12/025,665 mailed Jun. 10, 2009, 9 pgs.
19 International Preliminary Report on Patentability from PCT Application No. PCT/US2006/024516 mailed Jan. 10, 2008, 11 pgs.
20 International Preliminary Report on Patentability from PCT/US/2006/037634, mailed Apr. 10, 2008, 12 pgs.
21 International Preliminary Report on Patentability from PCT/US2005/010505 mailed Oct. 12, 2006, 16 pgs.
22 International Search Report & Written Opinion from PCT/US2004/032442 mailed on Jun. 16, 2005, 12 pgs.
23 International Search Report & Written Opinion from PCT/US2005/000947 mailed on May 3, 2005, 14 pgs.
24 International Search Report & Written Opinion from PCT/US2005/033439 mailed on Jan. 31, 2006, 7 pgs.
25 International Search Report & Written Opinion from PCT/US2005/035380 mailed on Feb. 13, 2006, 14 pgs.
26 International Search Report & Written Opinion from PCT/US2005/037169 mailed on Feb. 23, 2006, 11 pgs.
27 International Search Report & Written Opinion from PCT/US2006/000378 mailed on May 24, 2006, 11 pgs.
28 International Search Report & Written Opinion from PCT/US2006/024516 mailed on Jan. 10, 2007, 18 pgs.
29 International Search Report & Written Opinion from PCT/US2006/025751 mailed on Dec. 6, 2006, 14 pgs.
30 International Search Report & Written Opinion from PCT/US2006/037634 mailed on May 31, 2007, 21 pgs.
31 International Search Report & Written Opinion from PCT/US2006/037643 mailed on Jan. 24, 2007, 14 pgs.
32 International Search Report and Written Opinion from PCT/US2004/032442 mailed Jun. 16, 2005, 22 pgs.
33 International Search Report and Written Opinion from PCT/US2005/010505 mailed Aug. 26, 2005, 24 pgs.
34 International Search Report and Written Opinion from PCT/US2005/010505 mailed on Aug. 26, 2005, 24 pgs.
35 International Search Report and Written Opinion from PCT/US2005/020339 mailed on Oct. 4, 2005, 12 pgs.
36 International Search Report from PCT Application No. PCT/US2003/40320 mailed Jun. 2, 2004, 6 pgs.
37 International Search Report from PCT/US03/26242 mailed on Jan. 26, 2004, 8 pgs.
38 International Search Report from PCT/US03/39727 mailed on Apr. 27, 2004, 6 pgs.
39 International Search Report from PCT/US03/40320 mailed Jun. 2, 2004, 6 pgs.
40 International Search report from PCT/US2003/39727 mailed Apr. 27, 2004, 6 pgs.
41 IPO Search Report for Application No. 094136197, date mailed Sep. 19, 2008, 1 pg.
42 Lide, David R., "Properties of Semiconductors", CRC Handbook of Chemistry and Physics, Internet version 2007, (87th edition), David R. Lide-Editor; Taylor and Francis., pp. 12-77-12-89.
43 Lide, David R., "Properties of Semiconductors", CRC Handbook of Chemistry and Physics, Internet version 2007, (87th edition), David R. Lide—Editor; Taylor and Francis., pp. 12-77-12-89.
44 Non-Final Office Action for U.S. Appl. No. 11/240,440 Mailed May 12, 2010, 8 Pages.
45 Non-Final Office Action from U.S. Appl. No. 11/322,795 mailed Jul. 28, 2009, 18 pgs.
46 Non-Final Office Action from U.S. Appl. No. 11/855,823, mailed Jul. 23, 2009, 31 pgs.
47 Notice of Preliminary Rejection from Korean Patent Application No. 10-2007-7030988 incl. translation, Sep. 14, 2009, 11 pgs.
48 Office Action for Application No. 200680023301.X dated May 23, 2011, 11 pages.
49 Office Action for European Application No. 03817697.0 mailed Nov. 22, 2010, 4 pgs.
50 Office Action for German Patent Application No. 11 2006 003 576.2-33 mailed Nov. 11, 2008, 6 pgs.
51 Office Action for German Patent Application No. 112006001735.7 with translation mailed Oct. 20, 2009, 6 pgs.
52 Office Action for Japanese Application No. 2006-549560 mailed Aug. 31, 2010, 7 pgs.
53 Office Action for Korean Application No. 10-2008-7007431 mailed on Dec. 30, 2010, 6 pgs.
54 Office Action for U.S. Appl. No. 11/064,996 mailed Jun. 27, 2008, 12 pages.
55 Office Action for U.S. Appl. No. 11/064,996 mailed Mar. 13, 2007, 19 pages.
56 Office Action for U.S. Appl. No. 11/064,996 mailed Mar. 14, 2008, 13 pages.
57 Office Action for U.S. Appl. No. 11/064,996 mailed Sep. 4, 2007, 11 pages.
58 Office Action for U.S. Appl. No. 11/648,521 mailed Aug. 5, 2009, 12 pgs.
59 Office Action for U.S. Appl. No. 11/648,521 mailed Jan. 4, 2011, 14 pgs.
60 Office Action for U.S. Appl. No. 12/343,400 mailed Dec. 30, 2009, 12 pages.
61 Office Action from Chinese Patent Application No. 200680023301.X mailed Jun. 26, 2009, 11 pgs.
62 Office Action from European Patent Application No. 03817699.6 mailed Aug. 29, 2007, 3 pgs.
63 Office Action from European Patent Application No. 05711376.3 mailed Jan. 11, 2010, 5 pgs.
64 Office Action from European Patent Application No. 06815547.2, mailed Sep. 9, 2008, 3 pgs.
65 Office Action from Korean Patent Application No. 10-2007-7030988 mailed Mar. 12, 2010, 3 pgs.
66 Office Action from Taiwan Patent Application No. 95122087 mailed Dec. 16, 2008, 14 pgs.
67 Office Action from Taiwan Patent Application No. 95122087 mailed Jun. 20, 2008, 8 pgs.
68 Office Action from Taiwan Patent Application No. 95123858, dated Oct. 9, 2008, 9 pgs.
69 Office Action from Taiwan Patent Application No. 95123858-translation, mailed Mar. 3, 2009, 10 pgs.
70 Office Action from Taiwan Patent Application No. 95123858—translation, mailed Mar. 3, 2009, 10 pgs.
71 Office Action from Taiwan Patent Application No. 95135820 mailed Oct. 22, 2009, 3 pgs.
72 Office Action from Taiwan Patent Application No. 95135820 mailed on Jan. 9, 2009, 14 pgs.
73 Office Action from Taiwanese Patent Application No. 95134963 issued Jun. 1, 2009; incl. translation, 15 pgs.
74 Office Action from U.S. Appl. No. 10/227,068 mailed Dec. 18, 2006, 25 pgs.
75 Office Action from U.S. Appl. No. 10/703,316 mailed Dec. 15, 2006, 22 pgs.
76 Office Action from U.S. Appl. No. 10/973,228 mailed Feb. 2, 2010, 8 pgs.
77 Office Action from U.S. Appl. No. 11/080,765 mailed May 2, 2007, 47 pgs.
78 Office Action from U.S. Appl. No. 11/234,014 mailed Jan. 23, 2008, 9 pgs.
79 Office Action from U.S. Appl. No. 11/240,440 mailed May 12, 2010, 8 pgs.
80 Office Action from U.S. Appl. No. 11/240,487 mailed Dec. 11, 2009, 9 pgs.
81 Office Action from U.S. Appl. No. 11/240,487 mailed Mar. 17, 2009, 13 pgs.
82 Office Action from U.S. Appl. No. 11/322,795 mailed Mar. 4, 2009, 12 pgs.
83 Office Action from U.S. Appl. No. 11/855,823 mailed Mar. 15, 2010, 31 pgs.
84 Office Action from U.S. Appl. No. 11/855,823, mailed Dec. 30, 2008, 18 pgs.
85 Office Action from U.S. Appl. No. 12/025,665 mailed on Nov. 12, 2008, 7 pgs.
86 Office Action from U.S. Appl. No. 12/114,227 mailed Mar. 30, 2010, 10 pgs.
87 Second Office Action for Chinese Patent Application No. 200680021817.0 mailed Dec. 11, 2009, 10 pgs.
88 Third Office Action for Chinese Patent Application No. 200580032314.9 mailed Jan. 29, 2010, 13 pgs.
89 Written Opinion from Singapore Patent Application No. 200507013-1 issued May 18, 2007, 4 pgs.
90 Written Opinion from Singapore Patent Application No. 200604766-6 mailed Apr. 4, 2008, 4 pgs.
US9425275 * Jun 2, 2015 Aug 23, 2016 Samsung Electronics Co., Ltd. Integrated circuit chips having field effect transistors with different gate designs
US9508853 * Mar 18, 2016 Nov 29, 2016 Globalfoundries Inc. Channel cladding last process flow for forming a channel region on a FinFET device having a reduced size fin in the channel region
US9666493 * Jun 24, 2015 May 30, 2017 International Business Machines Corporation Semiconductor device structure with 110-PFET and 111-NFET curent flow direction
US9711410 * Dec 12, 2014 Jul 18, 2017 Intel Corporation Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width
US9761499 Aug 25, 2016 Sep 12, 2017 International Business Machines Corporation Semiconductor device structure with 110-PFET and 111-NFET current flow direction
US9812586 Oct 20, 2014 Nov 7, 2017 Semiconductor Energy Laboratory Co., Ltd. Transistor with curved active layer
US20150147863 * Dec 12, 2014 May 28, 2015 Bernhard Sell Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width
US20150364556 * Jun 2, 2015 Dec 17, 2015 Samsung Electronics Co., Ltd. Integrated circuit chips having field effect transistors with different gate designs
US20160204261 * Mar 18, 2016 Jul 14, 2016 Globalfoundries Inc. Channel cladding last process flow for forming a channel region on a finfet device having a reduced size fin in the channel region
U.S. Classification 257/288, 257/368, 257/E29.264, 257/369
Cooperative Classification H01L21/823828, H01L29/785, H01L21/823807, H01L21/823821, H01L29/7851, H01L29/1037, H01L21/823431, H01L29/66795, H01L29/66545
European Classification H01L29/10D2B1, H01L21/8238G, H01L29/66M6T6F16F, H01L21/8234F, H01L21/8238F, H01L29/78S, H01L21/8238C