Source: http://www.google.com/patents/US7672155?dq=6289460
Timestamp: 2015-04-19 13:25:16
Document Index: 694534688

Matched Legal Cases: ['Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 095141271', 'Application No. 095141271', 'Application No. 095146843', 'Application No. 095146843']

Patent US7672155 - Resistive memory devices including selected reference memory cells - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA magnetic memory cell array device can include a first current source line extending between pluralities of first and second memory cells configured for respective simultaneous programming and configured to conduct adequate programming current for writing one of the pluralities of first and second memory...http://www.google.com/patents/US7672155?utm_source=gb-gplus-sharePatent US7672155 - Resistive memory devices including selected reference memory cellsAdvanced Patent SearchPublication numberUS7672155 B2Publication typeGrantApplication numberUS 12/265,941Publication dateMar 2, 2010Filing dateNov 6, 2008Priority dateNov 9, 2005Fee statusPaidAlso published asUS20070103964, US20090067216Publication number12265941, 265941, US 7672155 B2, US 7672155B2, US-B2-7672155, US7672155 B2, US7672155B2InventorsHyun-Jo Kim, Kyung-Tae Nam, In-Gyu Baek, Se-Chung Oh, Jang-eun Lee, Jun-Ho JeongOriginal AssigneeSamsung Electronics Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (34), Non-Patent Citations (9), Referenced by (2), Classifications (6), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetResistive memory devices including selected reference memory cells
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS5432731Mar 8, 1993Jul 11, 1995Motorola, Inc.Ferroelectric memory cell and method of sensing and writing the polarization state thereofUS5753946Feb 12, 1996May 19, 1998Sony CorporationFerroelectric memoryUS5999439Mar 1, 1999Dec 7, 1999Micron Technology, Inc.Ferroelectric memory using ferroelectric reference cellsUS6246622Jul 18, 2000Jun 12, 2001Nec CorporationSemiconductor memory deviceUS6269040Jun 26, 2000Jul 31, 2001International Business Machines CorporationInterconnection network for connecting memory cells to sense amplifiersUS6317376Jun 20, 2000Nov 13, 2001Hewlett-Packard CompanyReference signal generation for magnetic random access memory devicesUS6426907Apr 17, 2001Jul 30, 2002Infineon Technologies North America Corp.Reference for MRAM cellUS6490217May 23, 2001Dec 3, 2002International Business Machines CorporationSelect line architecture for magnetic random access memoriesUS6504751Jul 3, 2001Jan 7, 2003Infineon Technologies AgIntegrated memory having memory cells with a magnetoresistive storage property and method of operating such a memoryUS6738285Jul 9, 2002May 18, 2004Renesas Technology Corp.Thin film magnetic memory device with high-accuracy data read structure having a reduced number of circuit elementsUS6757191Aug 19, 2002Jun 29, 2004Renesas Technology Corp.Thin film magnetic memory device sharing an access element by a plurality of memory cellsUS6778426Aug 7, 2002Aug 17, 2004Kabushiki Kaisha ToshibaMagnetic random access memory including memory cell unit and reference cell unitUS6795340Jan 6, 2003Sep 21, 2004Nec CorporationNon-volatile magnetic memoryUS6839269Jun 27, 2002Jan 4, 2005Kabushiki Kaisha ToshibaMagnetic random access memoryUS6870759Aug 21, 2003Mar 22, 2005Applied Spintronics Technology, Inc.MRAM array with segmented magnetic write linesUS6982908Jul 22, 2003Jan 3, 2006Samsung Electronics Co., Ltd.Magnetic random access memory device capable of providing a constant current to a reference cellUS7027342Jun 15, 2005Apr 11, 2006Sharp Kabushiki KaishaSemiconductor memory deviceUS7116598Mar 21, 2005Oct 3, 2006Kabushiki Kaisha ToshibaSemiconductor memoryUS7286378Jun 23, 2004Oct 23, 2007Micron Technology, Inc.Serial transistor-cell array architectureUS7313043Nov 29, 2005Dec 25, 2007Altis Semiconductor SncMagnetic Memory ArrayUS20030235071Jun 18, 2003Dec 25, 2003Takeshi OkazawaMagnetic memory device having XP cell and STr cell in one chipUS20040233709 *Jul 18, 2003Nov 25, 2004Kenji TsuchidaMRAM having memory cell array in which cross-point memory cells are arranged by hierarchical bit line scheme and data read method thereofUS20050036376 *Sep 21, 2004Feb 17, 2005Yoshihisa IwataMagnetic random access memoryUS20050105329Jun 23, 2004May 19, 2005Nazarian Hagop A.Serial transistor-cell array architectureUS20050128793Dec 12, 2003Jun 16, 2005Ho ChiahuaMethod and apparatus for a low write current MRAM having a write magnetUS20060062066Sep 17, 2004Mar 23, 2006Garni Bradley JMram sense amplifier having a precharge circuit and method for sensingJP2003257177A Title not availableJP2004023062A Title not availableJPH0997496A Title not availableJPH02110895A Title not availableKR100449067B1 Title not availableKR20020003296A Title not availableKR20030097697A Title not availableKR20050004160A Title not available* Cited by examinerNon-Patent CitationsReference1John DeBrosse et al.; A High-Speed 128-kb MRAM Core for Future Universal Memory Applications; IEEE Journal of Solid-State Circuits, vol. 39. No. 4; Apr. 2004, pp. 678-683.2Korean Office Action for corresponding Korean Patent Application No. 10-2005-0124033, 2 pages, (Nov. 20, 2006).3M. Durlam et al; IEEE 2002 Symposium on VLSI Circuits Digest of Technical Papers; pp. 158-161.4Notice of Allowability for Korean Patent Application No. 10-2005-0107178; May 31, 2007.5Notice of Allowability for Korean Patent Application No. 10-2005-0124033; May 28, 2007.6Taiwanese First Office Action and English translation (12 pages) corresponding to Taiwanese Patent Application No. 095141271; Issue Date: Jun. 12, 2009.7Taiwanese First Office Action and English Translation (18 pages) corresponding to Taiwan Patent Application No. 095141271; Dated: Dec. 17, 2008.8Taiwanese Preliminary Notice of First Office Action and English translation (13 pages) corresponding to Taiwanese Patent Application No. 095146843; Issue Date: Dec. 3, 2009.9Taiwanese Preliminary Notice of First Office Action and English translation (5 pages) corresponding to Taiwanese Patent Application No. 095146843; Issue Date: Jul. 13, 2009.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7760543 *Oct 2, 2008Jul 20, 2010Kabushiki Kaisha ToshibaResistance change memoryUS8953387Jun 10, 2013Feb 10, 2015Micron Technology, Inc.Apparatuses and methods for efficient write in a cross-point array* Cited by examinerClassifications U.S. Classification365/158, 365/189.04, 365/189.14International ClassificationG11C11/00Cooperative ClassificationG11C11/16European ClassificationG11C11/16Legal EventsDateCodeEventDescriptionMar 14, 2013FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services