Source: https://patents.google.com/patent/WO2013126836A1/en
Timestamp: 2019-10-18 03:23:12
Document Index: 286455602

Matched Legal Cases: ['§ 1', '§ 1', 'Application No. 61', 'Application No. 61', '§ 120', 'Application No. 13', 'Application No. 1', 'Application No.\n1', 'Application No. 12', 'Application No. 12', 'Application No. 13', 'Application No. 12', 'Application No. 13', 'Application No. 13', 'Application No. 13', 'Application No.\n13', 'Application No. 13']

WO2013126836A1 - Mixed load current compensation for led lighting - Google Patents
Mixed load current compensation for led lighting Download PDF
WO2013126836A1
WO2013126836A1 PCT/US2013/027507 US2013027507W WO2013126836A1 WO 2013126836 A1 WO2013126836 A1 WO 2013126836A1 US 2013027507 W US2013027507 W US 2013027507W WO 2013126836 A1 WO2013126836 A1 WO 2013126836A1
PCT/US2013/027507
WO2013126836A8 (en
2012-02-29 Priority to US201261604740P priority Critical
2012-02-29 Priority to US61/604,740 priority
2012-03-01 Priority to US201261605459P priority
2012-03-01 Priority to US61/605,459 priority
2013-02-22 Application filed by Cirrus Logic, Inc. filed Critical Cirrus Logic, Inc.
2013-02-22 Priority to US13/774,914 priority
2013-02-22 Priority to US13/774,914 priority patent/US9167662B2/en
2013-08-29 Publication of WO2013126836A1 publication Critical patent/WO2013126836A1/en
2014-08-07 Publication of WO2013126836A8 publication Critical patent/WO2013126836A8/en
102100004126 CNTRL Human genes 0 description 3
101700059502 CNTRL family Proteins 0 description 3
[001] This application claims the benefit under 35 U.S.C. § 1 19(e) and 37 C.F.R. § 1.78 of U.S. Provisional Application No. 61/604,740, filed on February 29, 2012 and U.S.
Provisional Application No. 61/605,459 filed on March 1, 2012, which are both incorporated by reference in their entireties.
[002] This application also claims the benefit under 35 U.S.C. § 120 of U.S. Patent Application No. 13/774,914, filed February 22, 2013, and entitled "Mixed Load Current Compensation For Led Lighting" which is incorporated by reference in its entirety.
[003] The present invention relates in general to the field of electronics, and, more specifically, to a system and method for providing mixed load current compensation for LED lighting.
[004] Commercially practical incandescent light bulbs have been available for over 100 years. However, other light sources show promise as commercially viable alternatives to the incandescent light bulb. Light Emitting Diodes ("LEDs") are becoming particularly attractive as main stream light sources in part because of energy savings through high efficiency light output, long life, and environmental incentives such as the reduction of mercury.
[005] LEDs are semiconductor devices and are best driven by direct current. The brightness of the LED varies in direct proportion to the current flowing through the LED. Thus, increasing current supplied to an LED increases the brightness of the LED and decreasing current supplied to the LED dims the LED.
[006] Dimming a light source saves energy when operating a light source and also allows a user to adjust the brightness of the light source to a desired level. Many facilities, such as homes and buildings, include light source dimming circuits (referred to herein as "dimmers").
[007] Electronic systems utilize dimmers to direct modification of output power to a load. For example, in a lighting system, dimmers provide an input signal to a lighting system. The input signal represents a dimming level that causes the lighting system to adjust power delivered to a lamp, and, thus, depending on the dimming level, increase or decrease the brightness of the lamp. Many different types of dimmers exist. In general, dimmers use a digital or analog coded dimming signal that indicates a desired dimming level. For example, some analog based dimmers utilize a triode for alternating current ("triac") device to modulate a phase angle of each cycle of an alternating current ("AC") supply voltage.
"Modulating the phase angle" of the supply voltage is also commonly referred to as
"chopping" the supply voltage. Chopping the supply voltage causes the voltage supplied to a lighting system to rapidly turn "ON" and "OFF," thereby controlling the energy provided to a lighting system.
[008] Figure 1 depicts a lighting system 100 that includes a triac -based dimmer 102. Figure 2 depicts exemplary voltage graphs 200 associated with the lighting system 100. Referring to Figures 1 and 2, the lighting system 100 receives an AC supply voltage VSUPPLY from voltage supply 104. The supply voltage VSUPPLY is, for example, a nominally 60 Hz/110 V line voltage in the United States of America or a nominally 50 Hz/220 V line voltage in Europe. Triac 106 acts as voltage-driven switch, and a gate terminal 108 of triac 106 controls current flow between the first terminal 1 10 and the second terminal 1 12 of the triac 106. A gate voltage VQ on the gate terminal 108 causes the triac 106 to turn ON and conduct current iDIM when the gate voltage VG reaches a firing threshold voltage value VF and a voltage potential exists across the first and second terminals 1 10 and 112. Ideally, the dimmer output voltage o DIM is zero volts from the beginning of each of half cycles 202 and 204 at respective times to and t2 until the gate voltage VG reaches the firing threshold voltage value VF. Dimmer output voltage Vo DIM represents the output voltage of dimmer 102. During timer period TOFF, the dimmer 102 chops the supply voltage VSUPPLY SO that the dimmer output voltage Vo DIM ideally remains at zero volts during time period TQFF. At time ti, the gate voltage VG reaches the firing threshold value VF, and triac 106 begins conducting. Once triac 106 turns ON, the dimmer voltage Vo DIM ideally tracks the supply voltage VSUPPLY during time period TON- Once triac 106 turns ON, triac 106 continues to conduct current iDIM regardless of the value of the gate voltage VG as long as the current iDIM remains above a holding current value HC. The holding current value HC is a function of the physical characteristics of the triac 106. Once the current iDIM drops below the holding current value HC, i.e. IDIM < HC, triac 106 turns OFF, i.e. stops conducting, until the gate voltage VG again reaches the firing threshold value VF. The holding current value HC is generally low enough so that, ideally, the current iDIM drops below the holding current value HC when the supply voltage VSUPPLY is approximately zero volts near the end of the half cycle 202 at time t2.
[009] The variable resistor 1 14 in series with the parallel connected resistor 1 16 and capacitor 1 18 form a timing circuit 1 15 to control the time ti at which the gate voltage VG reaches the firing threshold value VF. Increasing the resistance of variable resistor 1 14 increases the time TOFF, and decreasing the resistance of variable resistor 1 14 decreases the time TOFF- The resistance value of the variable resistor 1 14 effectively sets a dimming value for lamp 122. Diac 1 19 provides current flow into the gate terminal 108 of triac 106. The dimmer 102 also includes an inductor choke 120 to smooth the dimmer output voltage Vo DIM- Triac -based dimmer 102 also includes a capacitor 121 connected across triac 106 and inductor 120 to reduce electro-magnetic interference.
[0010] Ideally, modulating the phase angle of the dimmer output voltage Vo DIM effectively turns the lamp 122 OFF during time period TOFF and ON during time period TON for each half cycle of the supply voltage VSUPPLY- Thus, ideally, the dimmer 102 effectively controls the average energy supplied to the lamp 122 in accordance with the dimmer output voltage
VO DIM-
[001 1 ] The triac -based dimmer 102 adequately functions in many circumstances. However, when the lamp 122 draws a small amount of current IDIM, the current IDIM can prematurely drop below the holding current value HC before the supply voltage VSUPPLY reaches approximately zero volts. When the current IDIM prematurely drops below the holding current value HC, the dimmer 102 prematurely shuts down, and the dimmer voltage Vo DIM will prematurely drop to zero. When the dimmer voltage Vo DIM prematurely drops to zero, the dimmer voltage Vo DIM does not reflect the intended dimming value as set by the resistance value of variable resistor 1 14. For example, when the current IDIM drops below the holding current value HC at time t3 for the dimmer voltage Vo DIM 206, the ON time period TON prematurely ends at a time earlier than t2, such as time t3, instead of ending at time t2, thereby decreasing the amount of energy delivered to the N electronic lamps 122.1, 122.2, ..., 122.Ν, where N is an integer reference greater than 1.
[0012] Figure 3 depicts a peak-rectified LED-based lamp 300, which represents an exemplary electronic lamp 122. A full-bridge diode rectifier 302 rectifies the dimmer voltage o DIM to provide a rectified voltage Vx(t) to the switching power converter 304. A controller 306 receives a SENSE signal, which, for example, represents the rectified voltage Vx(t) and the LED voltage VLED. The controller 306 generates a control signal CSo to cause the switching power converter 304 to convert the rectified voltage Vx(t) into the LED voltage VLED and provide an LED drive current ILED to the LED 308. Since the value of the LED drive current ILED directly relates to the brightness of the LED 308, the switching power converter 304 controls the value of the LED drive current ILED SO that the value of the LED drive current ILED is proportional to the phase-cut angle of the dimmer voltage Vo DIM- Thus, ideally the brightness of the LED 308 directly corresponds to the phase-cut angle of the dimmer voltage Vo DIM-
[0013] Figure 4 depicts exemplary voltage and current waveforms associated with the peak- rectified LED-based lamp 300. Referring to Figures 3 and 4, the controller 306 senses the dimmer voltage Vo DIM and determines the amount of LED drive current ILED to provide to the LED 308 for each cycle of the dimmer voltage Vo DIM- Beginning at each leading edge of the dimmer voltage Vo DIM, the controller 306 draws an amount of the dimmer current ILAMP for LED-based lamp 300 sufficient to provide the determined LED drive current ILED. Because the electronic lamps 122.1-122.N are configured in parallel, the dimmer current ILAMP represents a portion of the dimmer current iDIM in accordance with Kirchoff s current law. The peak-rectified-type embodiment of the LED-based lamp 300 is designed to draw the dimmer current ILAMP relatively quickly, thus, creating relatively large positive and negative changes in the dimmer current dimmer current ILAMP over time, i.e. relatively large positive and negative di/dt's. Thus, the current profiles, such as current profiles 402, 404, 406, and 408, are zero amps ("0 A") until an occurrence of a leading edge 418, 420, 422, and 424 of the dimmer voltage Vo DIM followed by a short duration, punctuated current with relatively large di/dt's, and then 0 A for the remainder of each positive half-line cycle 410 and 414 and each negative half-line cycle 412 and 416 of the dimmer voltage Vo DIM- [0014] Referring to Figure 1, lamps 122.1-122.N may be homogenous, i.e. the same, or a mix of two or more different types of LED-based lamps. For example, one or more proper subsets of the lamps 122.1-122.N may have a different type of controller or embedded switching power converter (not shown) than the remaining lamps. When the triac-based dimmer provides the dimmer voltage Vo DIM to multiple electronic lamps 122.1-122.N, particularly to a mix of different types of lamps, one or more of the electronic lamps 122.1- 122.N may operate in a noticeably non-ideal manner. Examples of a noticeably non-ideal manner include abnormal light flicker and shortened efficacy.
[0015] In one embodiment of the present invention, a method includes detecting a leading edge of a dimmer phase-cut voltage and after detecting the leading edge, controlling a lamp current of an electronic lamp to prevent a current through a triac of the dimmer from undershooting a holding current value. The holding current value represents a value that if undershot by the current through the triac of the dimmer would stop the triac from conducting. The method further includes preventing the current through the dimmer from undershooting the holding current value.
[0016] In another embodiment of the present invention, an apparatus includes a controller. The controller is configured to detect a leading edge of a dimmer phase-cut voltage and, after detecting the leading edge, controlling a lamp current of an electronic lamp to prevent a current through a triac of the dimmer from undershooting a holding current value. The holding current value represents a value that if undershot by the current through the triac of the dimmer would stop the triac from conducting. The controller is further configured to prevent the current through the dimmer from undershooting the holding current value.
[0017] In a further embodiment of the present invention, an apparatus includes a lamp, wherein the lamp comprises a switching power converter, one or more light emitting diodes coupled to the switching power converter, and a controller, coupled to the switching power converter. The controller is configured to detect a leading edge of a dimmer phase-cut voltage and, after detecting the leading edge, controlling a lamp current of an electronic lamp to prevent a current through a triac of the dimmer from undershooting a holding current value. The holding current value represents a value that if undershot by the current through the triac of the dimmer would stop the triac from conducting. The controller is further configured to prevent the current through the dimmer from undershooting the holding current value.
[0019] Figure 1 (labeled prior art) depicts a lighting system that includes a triac-based dimmer.
[0021] Figure 3 (labeled prior art) depicts a peak-rectified LED-based lamp
[0022] Figure 4 (labeled prior art) depicts exemplary voltage and current waveforms associated with the peak-rectified LED-based lamp of Figure 3.
[0023] Figure 5 depicts an exemplary lighting system that includes a mixed load of multiple, parallel configured LED-based lamps and an LED-based lamp that includes a controller with a multi-lamp compatibility compensation current generator.
[0024] Figure 6 depicts an LED-based lamp.
[0025] Figure 7 depicts exemplary, superimposed waveforms of a dimmer voltage and lamp current when the lamp of Figure 6 is the only lamp present in the lighting system of Figure 5.
[0026] Figure 8 depicts exemplary, superimposed waveforms of a dimmer voltage and lamp currents with a mixed set of lamps including the lamp of Figure 6.
[0027] Figure 9 depicts an exemplary state machine to provide current compensation for the mixed set of lamps in the lighting system of Figure 5.
[0028] Figure 10 depicts exemplary dimmer voltage and lamp current waveforms when a compensation current generator of the lamp of Figure 6 controls the lamp current. [0029] Figure 11 depicts exemplary, superimposed waveforms of a dimmer voltage and lamp current when multiple, peak-rectified lamps and the lamp of Figure 6 are present in the lighting system of Figure 5.
[0030] Figure 12 depicts exemplary delay period data, pulse period data, and the end of the pulse data corresponding to various phase-cut angles for a nominal 230V supply voltage.
[0031 ] Figure 13 depicts a compensation current initiator.
[0032] Figure 14 depicts an exemplary multi-lamp compatibility compensation current generator.
[0033] Figure 15 depicts an exemplary leading edge detector and state controller. DETAILED DESCRIPTION
[0034] In at least one embodiment, a system and method provide current compensation in a lighting system by controlling a lamp current to prevent a current through a triac of a triac- based dimmer from undershooting a holding current value. The "holding current value" is a value of the current through the dimmer below which the dimmer would stop conducting. In at least one embodiment, when a lighting system includes electronic lamps configured in parallel and also includes a triac -based dimmer to phase-cut a supply voltage, the lamps can cause the current through the triac -based dimmer (referred to as the "dimmer current") to prematurely drop below the holding current value. If the dimmer current prematurely drops below the holding current value, the triac will prematurely stop conducting during a then- current half-line cycle of a supply voltage. The premature cessation of current conduction by the dimmer can cause the lamps to behave in a noticeably non-ideal manner, such as exhibiting abnormal light flicker and shortened efficacy. The possibility of the premature cessation of dimmer current is particularly acute when the lamps present a mixed set of loads. In this context, a mixed set of loads refers to a non-homogenous set of lamps. For example, in a peak rectified lamp, the lamp current is aggressively drawn near a leading edge of the dimmer voltage, which results in a relatively large negative change in lamp current over time, i.e. -di/dt. Other lamps draw lamp current over a longer period of time and, thus, have a relatively smaller negative change in lamp current over time. The large negative di/dt can cause the dimmer current to fall below the holding current value, particularly with a set of lamps representing a mixed set of loads. "Electronic lamp" refers to lamps with electronics that actively control current to the light source of the lamp. Exemplary electronic lamps include light emitting diode (LED) based lamps and compact fluorescent lamps.
[0035] In at least one embodiment, at least one of the lamps includes a controller that controls circuitry in the lamp to draw more lamp current for a period of time than needed to illuminate a brightness of the lamp at a level corresponding to particular phase-cut angle of the supply voltage. By drawing more current than needed, the controller increases the dimmer current during the period of time to prevent the dimmer current from falling below the holding current value. In at least one embodiment, the period of time corresponds to a compensating pulse of the lamp current at a time when the dimmer current would otherwise fall below the holding current value. The particular start time and duration of the compensating current pulse are a matter of design choice, and in at least one embodiment, are determined empirically by testing various combinations of lamps configured in parallel in a lighting system and determining when the dimmer current will fall below the holding current value in the absence of the compensating current pulse. In at least one embodiment, at least the particular start time of the compensating current pulse is determined dynamically by sensing an indication of a possible undershoot of the holding current value. The particular shape of the compensating current pulse is a matter of design choice. In at least one embodiment, the compensating current pulse rises quickly and ramps down at a slower rate than the rising rate.
[0036] A dimmer voltage supplied to the lamp can be unrectified or rectified. A current through the triac of the triac-based dimmer "undershooting a holding current value" refers to an event when the current through the triac reaches a value that will cause the dimmer to stop conducting. In mathematical terms, when an absolute value of the current through the triac is less than an absolute value of the holding current value, the current through the triac undershoots the holding current value. In observational terms, during a positive voltage half- cycle of the dimmer voltage, the current through the triac undershoots the holding current value when the current through the triac is less than the holding current value, and during a negative half-cycle of the dimmer voltage, the current through the triac undershoots the holding current value when the current through the triac is greater than the holding current value. Additionally, in at least one embodiment, the holding current value for the positive half-cycle of the dimmer voltage may be the same or different from the holding current value for the negative half-cycle of the dimmer voltage. The particular holding current value(s) are a function of the particular triac used in the triac -based dimmer and can be obtained from a manufacturer of the dimmer or obtained empirically.
[0037] Figure 5 depicts an exemplary lighting system 500 that includes a mixed load of multiple, parallel configured lamp 501 including electronic lamps 122.1-122.M and an electronic lamp 502 that includes a controller 504 with a multi-lamp compatibility compensation current generator 506. Each of the lamps 122.1-122. M draws a respective lamp current ILAMP.I through ILAMP.M- The values of the lamp current ILAMP over time represent a current profile of the lamp current ILAMP- For example, as discussed in conjunction with Figure 4, the current profiles of a peak-rectified LED-based lamp are of short duration relative to a half line cycle of the dimmer voltage Vo DIM and have a large positive and negative di/dt beginning at a leading edge of the dimmer voltage Vo DIM- AS previously mentioned and subsequently described in more detail, when the triac -based dimmer 508 phase cuts the supply voltage VSUPPLY from AC power supply 104 to generate the dimmer voltage Vo DIM, without current compensation, the current profiles of the lamps 501 and, in at least one embodiment, particularly current profiles of the electronic lamps 122.1-122. M with large di/dt's, can cause the dimmer current IDIM to fall below a holding current value of the triac based dimmer 508. Undershooting the holding current value problematically causes the dimmer 508 to prematurely stop conducting the dimmer current IDIM- The compensation current generator 506 controls the lamp current ILAMP 502 to prevent the dimmer current IDIM from undershooting the holding current value. Thus, the lamp 502 compensates for the lamp currents ILAMP.I through ILAMP.M to prevent premature non- conduction of a triac of the triac -based dimmer 508.
[0038] The controller 504 also controls the switching power converter 510 to provide an operating voltage VLD and a light source drive current iLs provided to the light source 512. The light source 512 can be any type of light source, such as one or more light emitting diodes (LEDs) or direct current light source type. The LED(s) can be any type(s) and color(s) of one or more LEDs. The type of switching power converter 510 is a matter of design choice and can be, for example, a two-stage or single state switching power converter with any combination of topologies, such as a boost, boost-buck, buck, and/or Ciik topology. The particular implementation of controller 504 is a matter of design choice. For example, controller 504 can be (i) implemented as an integrated circuit including, for example, a processor to execute software or firmware instructions stored in a memory, (ii) implemented using discrete components, or (iii) implemented using any combination of the foregoing. In at least one embodiment, controller 504 generally regulates the load voltage VLD as described in U.S. Patent Application No. 1 1/967,269, entitled "Power Control System Using a
Nonlinear Delta-Sigma Modulator With Nonlinear Power Conversion Process Modeling", filed on December 31, 2007, inventor John L. Melanson, U.S. Patent Application No.
1 1/967,275, entitled "Programmable Power Control System", filed on December 31, 2007, and inventor John L. Melanson, U.S. Patent Application No. 12/495, 457, entitled "Cascode Configured Switching Using at Least One Low Breakdown Voltage Internal, Integrated Circuit Switch to Control At Least One High Breakdown Voltage External Switch", filed on June 30, 2009, and inventor John L. Melanson, and U.S. Patent Application No. 12/174,404, entitled "Constant Current Controller With Selectable Gain", filing date June 30, 201 1, and inventors John L. Melanson, Rahul Singh, and Siddharth Maru, which are all incorporated by reference in their entireties.
[0039] Figure 6 depicts an LED-based lamp 600, which represents one embodiment of the lamp 502. As subsequently explained in more detail, the lamp 600 includes a controller 602 that includes a multi-lamp compatibility compensation current generator 603 to control the lamp current ILAMP to prevent the dimmer current IDIM through the dimmer 508 from undershooting a holding current value. The controller and the multi-lamp compatibility compensation current generator 603 represent respective embodiments of a controller 504 and the multi-lamp compatibility compensation current generator 506.
[0040] The lamp 600 utilizes a flyback-type switching power converter 601 to convert the dimmer voltage Vo DIM into an LED drive current ILED and load voltage VLED on the side of the secondary- winding 616 of the transformer 612. The lamp 600 includes a full-bridge, diode rectifier 603 to rectify the dimmer voltage Vo DIM to produce the rectified dimmer voltage Vo DIM R. The controller 602 provides source control to the source of the field effect transistor (FET) 606 to control the flyback-type, switching power converter 601 and, thus, control the lamp current 1LAMP.6OO, the LED drive current ILED, and the load voltage VLED- The values of the lamp current 1LAMP.6OO, the LED drive current ILED, and the load voltage VLED correlate with the phase angle of the dimmer voltage Vo DIM- The lighting system 600 includes LED(s) 608, which represent one embodiment of the light source 512. The brightness of the LED(s) 608 directly correlates with the value of the LED drive current ILED- Thus, the brightness of the LED(s) 608 directly correlates with the phase angle of the dimmer voltage Vo DIM-
[0041 ] The controller 602 controls the conductivity of the FET 606 to control the lamp current ILAMP.6OO to meet the power demands of LED(s) 608. For an n-channel FET, the FET 606 is biased with a fixed gate voltage VQ and conducts (i.e. ON) when the source voltage VSOURCE is less than the gate voltage VQ minus a threshold voltage of the FET 606 and is nonconductive (i.e. OFF) when the source voltage VSOURCE is greater than the gate voltage VQ minus the threshold voltage. When the FET 606 conducts, the lamp current 1LAMP.6OO ramps up through the primary winding 610 of transformer 612. The dot convention of transformer 612 and the diode 614 prevent flow of the LED current ILED from the secondary-winding 616 when FET 606 conducts and the lamp current ILAMP.6OO is flowing into the primary winding 610. When the controller 602 turns the FET 606 OFF, the lamp current 1LAMP.6OO falls to 0, and the voltage across the primary winding 610 reverses for a period of time, referred to as the "flyback time". During the flyback time, the secondary current is quickly rises and charges capacitor 618. Capacitor 618 provides an output voltage VLED and current ILED to the LED(s) 608. A diode and resistor-capacitor filter circuit 620 provides a path for voltage perturbations. An exemplary flyback-type switching power converter and corresponding control and auxiliary power supply is described in U.S. Patent Application No. 13/715,45 1, entitled "Isolation of Secondary Transformer Winding Current During Auxiliary Power Supply Generation", inventors John L. Melanson, Prashanth Drakshapalli, and Siddharth Maru, filing date December 14, 2012, which is incorporated by reference in its entirety. As subsequently described in more detail, in at least one embodiment, the controller 602 also includes a non-transitory memory 622 that stores code that is executable by the compensation current generator 603 as a state machine to control the dimmer current IDIM to prevent the dimmer current IDIM from undershooting the holding current value. In at least one embodiment, the memory 622 receives the code from an external DATA programming signal. In at least one embodiment, the code is prestored in the memory 622. In at least one embodiment, the memory 622 is replaced with circuitry that implements the state machine. In at least one embodiment, the controller 602 senses the rectified dimmer voltage Vo DIM R via a sense path 624 to determine when to control the lamp current ILAMP.6OO by, for example, generating a current pulse to prevent a possible undershoot of the holding current value by the dimmer current iDiM- [0042] Figure 7 depicts exemplary, superimposed waveforms 700 of the dimmer voltage o DIM and the lamp current 1LAMP.6OO when lamp 600, an embodiment of electronic lamp 502, is the only lamp present in the lighting system 500. When the lamp 600 is the only lamp present in the lighting system 500, the lamp current 1LAMP.6OO equals the dimmer current iDIM. At the zero crossing time tzc, which indicates a beginning of a new cycle of the dimmer voltage Vo DIM, the controller 602 optionally asserts a "glue" current during the glue period TQLUE to keep the dimmer 508 from conducting until the timer circuit of dimmer 508 causes the triac of the dimmer 508 to conduct. Exemplary embodiments of asserting the glue current are described in U.S. Patent Application No. 12/858, 164, entitled "DIMMER OUTPUT EMULATION", inventor John L. Melanson and U.S. Patent Application No. 13/290,032, entitled "Switching Power Converter Input Voltage Approximate Zero Crossing
Determination", filing date November 4, 201 1, and inventors Eric J. King and John L.
Melanson, which are both incorporated by reference in their entireties.
[0043] When the leading edge of the dimmer voltage Vo DIM occurs at the time
tLEADiNG EDGE, the controller 602 causes the lamp current 1LAMP.6OO to rise above the holding current value of the dimmer current iDiM- The lamp current 1LAMP.6OO rises and then falls as the switching power converter 601 energizes the primary coil 610 to provide sufficient power to the LED(s) 608. The controller 602 maintains the lamp current 1LAMP.6OO above the holding current value until the time tPWR SUFF when the switching power converter has drawn sufficient power during the cycle of the dimmer voltage Vo DIM for the LED(s) 608 to illuminate at the brightness indicated by the phase angle of the dimmer voltage Vo DIM- The rectified dimmer voltage Vo DIM R momentarily rises when the lamp current 1LAMP.6OO falls to just above the holding current value.
[0044] Figure 8 depicts exemplary, superimposed waveforms 800 of the dimmer voltage o DIM and the lamp current 1LAMP.6OO when multiple, peak-rectified lamps 122.1-122. M (where M equals, for example, 3), and lamp 600 are present in the lighting system 500. The waveforms 800 represent an absence of compensation current by the compensation current generator 603 (Figure 6). The dimmer current IDIM represents the sum of the lamp currents into lamps 122.1-122.M and lamp 600 (Figures 5 and 6). At the leading edge time
tLEADiNG EDGE, the dimmer current IDIM rapidly climbs to a peak value that exceeds the scale of Figure 8. The lamp current 1LAMP.6OO has a smaller di/dt and draws current through the dimmer 508 for a longer period of time than the peak-rectified lamps 122.1-122. M. However, because of the large di/dt of the dimmer current IDIM due to the mixed load of lamps and without current compensation from the compensation current generator 603, the dimmer current iDIM undershoots the holding current value during the period T DERSHOOT. At the end of the period TWDERSHOOT, the peak-rectified lamps 122.1-122. M stop drawing current, and the dimmer current IDIM approximately tracks the lamp current 1LAMP.6OO. When the dimmer current iDIM undershoots below the holding current value, one or more of the lamps 122.1-122. M and lamp 600 can exhibit non-ideal behavior such as flicker and shortened efficacy.
[0045] As subsequently described in more detail, in at least one embodiment, the compensation current generator 603 determines when to control the lamp current 1LAMP.6OO to prevent an undershoot of the holding value by the dimmer current IDIM by dynamically sensing an indication of the possibility of the undershoot. When the dimmer current iDIM decreases, such as when one or more of the lamps 122.1-122.M stop drawing current, the rectified dimmer voltage Vo DIM R abruptly changes, as illustratively shown in the identified portion 802 of the rectified dimmer voltage Vo DIM R- Thus, in at least one embodiment, the compensation current generator 603 senses the rectified dimmer voltage Vo DIM R to identify the changing portion 802 of the rectified dimmer voltage Vo DIM R and controls the lamp current 1LAMP.6OO to compensate for the falling dimmer current IDIM to prevent an undershoot of the holding current value. The changing portion 802 is shown as a rise in the rectified dimmer voltage Vo DIM R in this positive half-cycle of the rectified dimmer voltage Vo DIM R- A corresponding portion in a negative half-cycle of the rectified dimmer voltage Vo DIM R is an abrupt decrease in the rectified dimmer voltage Vo DIM R-
[0046] Figure 9 depicts an exemplary state machine 900 to provide current compensation for the mixed set of lamps in the lighting system 500 and, thus, control the lamp current iLAMP.6oo to prevent the dimmer current IDIM from undershooting the holding current value. Referring to Figure 6, in at least one embodiment, the memory 622 stores the state machine 900 as code that is executable by a processor of the compensation current generator 603.
[0047] Figure 10 depicts exemplary dimmer voltage Vo DIM and lamp current ILAMP.6OO waveforms 1000 when the compensation current generator 603 controls the lamp current ILAMP.600 to prevent the dimmer current IDIM from undershooting the holding current value. Referring to Figures 6, 9, and 10, in the IN GLUE state 902, the controller 602 controls the lamp current 1LAMP.6OO as a glue current during the glue period TQLUE- At the occurrence of the leading edge at time FADING EDGE, the GLUE RELEASE state 904 releases the glue signal, and the controller 602 causes the lamp current 1LAMP.6OO to quickly rise. In at least one embodiment, the state machine 900 then waits for a delay period TDELAY before causing an assertion of a current compensation pulse 1002 of the lamp current 1LAMP.6OO during the period TPULSE- The delay period TDELAY corresponds to a time period when the dimmer current iDIM would otherwise undershoot the holding current value. At the end of the delay period state PULSE 906 causes the compensation current generator 603 to generate a pulse of the lamp current 1LAMP.6OO. In at least one embodiment, the state machine 900 waits for a dynamic determination of an event that predicts a possibility of an undershoot of the holding current value by the dimmer current IDIM through a triac of the dimmer 508 (Figure 5).
[0048] Since the dimmer current IDIM is a superposition of the lamp currents ILAMP.I through iLAMP.M and lamp current 1LAMP.6OO, generating the current compensation pulse 1002 in the lamp current 1LAMP.6OO correspondingly increases the value of the dimmer current iDiM- Since the state machine 1000 times the current compensation pulse 1002 to occur when the dimmer current IDIM would otherwise undershoot the holding current value, the compensation current generator 603 controls the lamp current 1LAMP.6OO to prevent the dimmer current IDIM from undershooting the holding value. HOLD UP state 908 causes the compensation current generator 603 to maintain the current compensation pulse 1002 of the lamp current 1LAMP.6OO until the end to the pulse period TPULSE. In at least one embodiment, the duration of the pulse period TPULSE is empirically determined to correspond to the duration of the time during which an undershoot of the dimmer current IDIM below the holding current value would otherwise occur. In at least one embodiment, both the delay period TDELAY and the pulse period TPULSE are extended by a margin of error based on the maximum empirically determined delay period and pulse period. In at least one embodiment, at the end of the pulse period TPULSE, state RAMP DOWN 910 ramps down the current compensation pulse 1002 at a di/dt rate that does not cause the dimmer current IDIM to drop below the holding current value and also minimizes other potential perturbations of the dimmer voltage Vo DIM- At the end of the state RAMP DOWN 910, the current compensation pulse 1002 is finished as indicated by state PULSE DONE 914. The state machine 900 then repeats for the next cycle of the dimmer voltage Vo DIM.
[0049] In at least one embodiment, assertion of the current compensation pulse 1002 draws more dimmer current IDIM than is used to drive the LED(s) 608. In at least one embodiment, the controller 602 dissipates excess power associated with the excess current. The particular manner of dissipation is a matter of design choice, such as routing the excess current through a resistor or dissipating the excess current in the FET 606. Exemplary systems and method for dissipating excess power are described in U.S. Patent Application No. 13/289,845, entitled "Controlled Energy Dissipation in a Switching Power Converter", filed November 4, 201 1, and inventors John L. Melanson and Eric. J. King and in U.S. Patent Application No. 13/289,931, entitled "Controlled Power Dissipation in a Lighting System", filed November 4, 201 1, and inventors John L. Melanson and Eric. J. King. U.S. Patent Application No.
13/289,845 and U.S. Patent Application No. 13/289,931 are both incorporated by reference herein in their entireties.
[0050] Figure 1 1 depicts exemplary, superimposed waveforms 1100 of the dimmer voltage o DIM and the lamp current 1LAMP.6OO when multiple, peak-rectified lamps 122.1-122. M (where M equals, for example, 3), and lamp 600 are present in the lighting system 500. The waveforms 1 100 represent the presence of the current compensation pulse 1002 by the compensation current generator 603 as described in conjunction with the Figures 6, 9, and 10.
[0051] Figure 12 depicts exemplary delay period TDELAY data, pulse period TPULSE data, and the end of the pulse data corresponding to various phase-cut angles for a nominal 230V supply voltage VSUPPLY- The end of the pulse data equals the sum of the period TDELAY plus the period TPULSE- In at least one embodiment, the value of the delay period TDELAY in Figure 12 is empirically determined based on the particular characteristics of the lamps 122.1-122. M of the lighting system 500 (Figure 5). In at least one embodiment, as shown in Figure 12, the particular values of the pulse period TPULSE and the delay period TDELAY are dependent on the phase angle of the rectified dimmer voltage Vo DIM R- In at least one embodiment, the data represented in Figure 12 is stored in the memory 622 of the controller 602 (Figure 6). In at least one embodiment, the pulse period TPULSE and the delay period TDELAY are non-linear with respect to the phase angles of the rectified dimmer voltage Vo DIM R-
[0052] Figure 13 depicts a compensation current initiator 1300, which, in at least one embodiment, is part of the compensation current generator 603. In at least one embodiment, the exemplary changing portion 802 (Figure 8) of the rectified dimmer voltage Vo DIM R is characterized by a sharp change, which correlates to a frequency component of the rectified dimmer voltage Vo DIM R- The bandpass filter 1302 receives a sensed version of the rectified dimmer voltage Vo DIM R- The sensed version of the rectified dimmer voltage Vo DIM R is, for example, either a sampled, digital version or an analog version. The frequency band of the bandpass filter 1302 is a matter of design choice and, in at least one embodiment, is designed to ignore low and high frequency perturbations of the rectified dimmer voltage o DIM R that are not associated with a potential for an undershoot of the holding current value. An example frequency pass band is 1kHz to 100kHz. If the bandpass filter 1302 detects a frequency component of the rectified dimmer voltage Vo DIM R in the frequency pass band, the bandpass filter 1302 generates a PULSE signal that causes the state machine 900 (Figure 9) to transition from the GLUE RELEASE state 904 to the PULSE state 906.
[0053] Numerous other processes can be used by the compensation current generator 603 and the state machine 900 to determine when to transition from the GLUE RELEASE state 904 to the PULSE state 906 in addition to the empirically determined TDELAY and the dynamic determination of a potential for an undershoot of the holding current value. The particular process is a matter of design choice. For example, in at least one embodiment, a prior sample of the dimmer current IDIM during a cycle of the rectified dimmer voltage o DIM R and determination of when an undershoot occurred can be used by the
compensation current generator 603 and the state machine 900 as the delay time for the current and/or one or more subsequent cycles of the rectified dimmer voltage Vo DIM R to transition from the GLUE RELEASE state 904 to the PULSE state 906. The particular duration of the delay time is a matter of design choice and is, in at least one embodiment, chosen with a minimum duration sufficient to prevent the undershoot of the holding current by the current through a triac (as, for example, shown in Figure 1) of the triac -based dimmer 508.
[0054] Figure 14 depicts an exemplary multi-lamp compatibility compensation current generator 1400, which represents one embodiment of the multi-lamp compatibility compensation current generator 603. To control the lamp current 1LAMP.6OO, the state machine 900 controls a digital current control value ILAMP CNTRL- The current control value
ILAMP CNTRL is an R+l bit signal having bits [B0, Bi, BR], and R is a positive integer, such as 4, 8, or 16. The digital current control value ILAMP CNTRL is an input to a current source 1401, which controls the value of the dimmer current ίφ R.
[0055] During operation, current source 1401 sources current from source voltage node 407 and provides a variable impedance path for the lamp current 1LAMP.6OO to control the value of the lamp current 1LAMP.6OO. Current source 1401 includes a bias current source 1402 that generates a bias current IBIAS. A drain and gate of FET 1404 are connected together to form a "diode connected" configuration. The R+l series connected FET pairs 1405.0/1406.0 through 1405.N/1406.N are respectively configured in a current mirror arrangement with FET 1404 to mirror the bias current IBIAS- "R" is an integer, and the value of R is a matter of design choice. Each pair of FETs 1405.X/1406.X is sized so that each subsequent pair sources twice as much current as the previous pair, e.g. FET pair 1405.1/1406.1 sources twice as much current as FET pair 1405.0/1406.0, and so on. "X" is an integer index ranging from 0 to R. In at least one embodiment, the value of R determines a maximum level of current capable of being sourced through current source 1401.
[0056] In at least one embodiment, the variable impedance control signal I V AR is a digital value having R+l bits, i.e. I_VAR = [B0, Bi, BR]. Each bit B0, Bi, BR is applied to the gate of a respective FET pair 1405.0/1406.0, 1405.1/1406.1, 1405.R/1406.R to control conductivity of the FET pairs. To operate the current source 1401, the state machine 900 sets a logical value of ILAMP CNTRL to set bits [B0, Bi, BR]. For example, to turn all of the FET pairs ON, state machine 900 sets [B0, Bi, BR] = [1, 1, 1] to cause each FET pair 1405.0/1406.0, 1405.1/1406.1, 1405.R/1406.R to conduct and sets bits to a logical value of I_VAR to B0, Bb BR = [0, 0, 0] to cause each FET pair 1405.0/1406.0, 1405.1/1406.1, 1405.R/1406.R to turn "off, i.e. nonconductive. In at least one embodiment, the state machine 900 sets the value of bits [Bo, Bi, BR] so that the lamp current 1LAMP.6OO follows the current profile of Figures 10 and 11 in accordance with the delay period TDELAY and the pulse period TPULSE of Figure 12.
[0057] Figure 15 depicts an exemplary leading edge detector and state controller 1500 of the controller 602 to detect leading edges of the dimmer voltage Vo DIM- Comparator 1502 compares the rectified dimmer voltage Vo DIM R to a threshold voltage VTH- In at least one embodiment, the threshold voltage VTH is greater than 0V and is sufficient to allow the leading edge detector 1500 to detect the leading edge of the rectified dimmer voltage Vo DIM R without being affected by minor perturbations of the rectified dimmer voltage Vo DIM R prior to an occurrence of a leading edge. When the rectified dimmer voltage Vo DIM R exceeds the threshold voltage VTH, comparator 1502 changes the logical value of output signal LE DET from a logical zero to a logical one to indicate detection of a leading edge. The timer 1504 begins timing a duration from detection of the leading edge of the rectified dimmer voltage Vo DIM R until the value of the delay period TDELAY is reached. When the delay period TDELAY time is reached, the timer generates a PULSE signal which causes the state machine 900 and, thus, the compensation current generator to control the lamp current 1LAMP.6OO to generate the current compensation pulse 1002 (Figure 10). The timer 1506 determines when the duration of the current compensation pulse 1002 reaches the pulse period TPULSE value. When the duration of the current compensation pulse 1002 reaches the pulse period TPULSE value, the timer 1506 generates a RAMP DOWN signal to cause the compensation current generator to ramp down the lamp current 1LAMP.6OO as, for example, depicted in Figures 10 and 1 1.
[0058] Thus, a system and method provide current compensation in a lighting system by controlling a lamp current to prevent a current through a dimmer from undershooting a holding current value.
[0059] Although embodiments have been described in detail, it should be understood that various changes, substitutions, and alterations can be made hereto without departing from the spirit and scope of the invention as defined by the appended claims.
WHAT IS CLAIMED IS; 1. A method comprising:
after detecting the leading edge, controlling a lamp current of an electronic lamp to prevent a current through a triac of the dimmer from undershooting a holding current value, wherein the holding current value represents a value that if undershot by the current through the triac of the dimmer would stop the triac from conducting; and
preventing the current through the dimmer from undershooting the holding current value.
generating a current pulse for a first duration of time as the current through the
dimmer decreases.
3. The method of claim 2 wherein a lighting system includes multiple lamps coupled in parallel to receive a portion of the lamp current and wherein the first duration of time is based on current control characteristics of at least a plurality of the multiple lamps.
6. The method of claim 1 wherein controlling a lamp current to prevent a current through a triac of the dimmer from undershooting a holding current value draws an amount of excess current into a switching power converter of the electronic lamp that exceeds an amount of current used to illuminate a light source of the electronic lamp at a brightness corresponding to the dimmer phase-cut voltage, the method further comprising:
varying the amount of lamp current drawn to prevent the undershooting in correlation with different phase-cut angles of the dimmer phase-cut voltage.
8. The method of claim 7 wherein the correlation between the varying amount of lamp current drawn to prevent the undershooting and the different phase-cut angles is non- linear.
1 1. The method of claim 10 wherein the first duration of time after detecting the leading edge begins after the current through the dimmer has a negative change over time and before the current through the dimmer reaches the holding current value.
12. The method of claim 1 wherein the dimmer is a triac -based dimmer that conducts current provided to a non-homogenous set of light emitting diode-based lamps.
after detecting the leading edge, control a lamp current of an electronic lamp to prevent a current through a triac of the dimmer from undershooting a holding current value, wherein the holding current value represents a value that if undershot by the current through the triac of the dimmer would stop the triac from conducting; and
prevent the current through the dimmer from undershooting the holding
generate a current pulse for a first duration of time as the current through the dimmer decreases.
multiple additional electronic lamps coupled in parallel with the electronic lamp to each receive a portion of the lamp current; wherein the first duration of time is based on current control characteristics of at least a plurality of the multiple lamps.
18. The apparatus of claim 16 wherein the controller is further configured to: retrieve data from a memory in a controller of a switching power converter, wherein the data represents the first duration of time of the current pulse.
19. The apparatus of claim 16 wherein the controller is further configured to: ramp down the current pulse at the end of the first duration of time.
20. The apparatus of claim 15 wherein control of a lamp current to prevent a current through a triac of the dimmer from undershooting a holding current value draws an amount of excess current into a switching power converter of the electronic lamp that exceeds an amount of current used to illuminate a light source of the electronic lamp at a brightness corresponding to the dimmer phase-cut voltage, the controller is further configured to:
vary the amount of lamp current drawn to prevent the undershooting in correlation with different phase-cut angles of the dimmer phase-cut voltage.
22. The apparatus of claim 21 wherein the correlation between the varying amount of lamp current drawn to prevent the undershooting and the different phase-cut angles is non- linear.
superimpose the lamp current on the current through the dimmer to prevent the
current through the dimmer from undershooting the holding current value.
24. The apparatus of claim 15 wherein the controller is further configured to: wait for a first duration of time after detecting the leading edge before controlling the lamp current to prevent the current through the dimmer from undershooting the holding current value.
26. The apparatus of claim 15 wherein the dimmer is a triac -based dimmer and triac -based dimmer conducts current provided to a non-homogenous set of light emitting diode-based lamps.
27. The apparatus of claim 15 wherein the controller is further configured to: dynamically detect an indication of a possible undershoot of the holding current value; and
upon detection of the indication, control the lamp current to prevent the current
through a triac of the dimmer from undershooting the holding current value.
after detecting the leading edge, control a lamp current of the lamp to prevent a current through a triac of the dimmer from undershooting a holding current value, wherein the holding current value represents a value that if undershot by the current through the triac of the dimmer would stop the triac from conducting; and
prevent the current through the dimmer from undershooting the
holding current value.
PCT/US2013/027507 2012-02-22 2013-02-22 Mixed load current compensation for led lighting WO2013126836A1 (en)
US201261604740P true 2012-02-29 2012-02-29
US61/604,740 2012-02-29
US201261605459P true 2012-03-01 2012-03-01
US61/605,459 2012-03-01
US13/774,914 2013-02-22
US13/774,914 US9167662B2 (en) 2012-02-29 2013-02-22 Mixed load current compensation for LED lighting
EP13710654.8A EP2820919A1 (en) 2012-02-29 2013-02-22 Mixed load current compensation for led lighting
WO2013126836A1 true WO2013126836A1 (en) 2013-08-29
WO2013126836A8 WO2013126836A8 (en) 2014-08-07
PCT/US2013/027507 WO2013126836A1 (en) 2012-02-22 2013-02-22 Mixed load current compensation for led lighting
WO (1) WO2013126836A1 (en)
US9986607B2 (en) 2016-06-02 2018-05-29 Semiconductor Components Industries, Llc Light emitting diode control circuit with hysteretic control and low-side output current sensing
2013-02-22 EP EP13710654.8A patent/EP2820919A1/en not_active Ceased
2013-02-22 WO PCT/US2013/027507 patent/WO2013126836A1/en active Application Filing
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