Source: http://www.google.co.uk/patents/US7761884
Timestamp: 2014-09-01 11:33:11
Document Index: 199592958

Matched Legal Cases: ['art/9612', 'art4', 'art/9606', 'art4', 'art/9606', 'art7', 'art/9606', 'art5', 'art/9606', 'art6', 'art/9606', 'art8', 'art 2']

Patent US7761884 - Method and system for maintaining connections between surfaces and objects ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsA method and system are provided for controlling the algorithmic elements in 3D graphics systems via an improved 3D graphics API and for managing computing resources utilized in connection with the maintenance of connections between surfaces and objects. When multiple applications are running simultaneously,...http://www.google.co.uk/patents/US7761884?utm_source=gb-gplus-sharePatent US7761884 - Method and system for maintaining connections between surfaces and objects in a graphics display systemAdvanced Patent SearchPublication numberUS7761884 B2Publication typeGrantApplication numberUS 10/961,435Publication date20 Jul 2010Filing date7 Oct 2004Priority date1 Mar 2001Fee statusPaidAlso published asUS6874150, US20030014562, US20050046627Publication number10961435, 961435, US 7761884 B2, US 7761884B2, US-B2-7761884, US7761884 B2, US7761884B2InventorsJeff M. J. NoyleOriginal AssigneeMicrosoft CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (30), Non-Patent Citations (62), Referenced by (2), Classifications (9), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetMethod and system for maintaining connections between surfaces and objects in a graphics display systemUS 7761884 B2Abstract A method and system are provided for controlling the algorithmic elements in 3D graphics systems via an improved 3D graphics API and for managing computing resources utilized in connection with the maintenance of connections between surfaces and objects. When multiple applications are running simultaneously, it is possible that the demand for overall computing resources may exceed supply, and it is possible that a connection between a surface and object may be lost for one or more applications. In accordance with the present invention, a check for the persistence of a connection between surface space and object space is made substantially at the time of a present function call, and thus multiple redundant checks are avoided. In one embodiment, checks made incident to function calls other than a present function call are spoofed or bypassed in order to avoid previous inefficient use of computing resources.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS48050985 May 198614 Feb 1989Mips Computer Systems, Inc.Write bufferUS49530736 Feb 198628 Aug 1990Mips Computer Systems, Inc.Cup chip having tag comparator and address translation unit on chip and connected to off-chip cache and main memoriesUS495977928 Nov 198825 Sep 1990Mips Computer Systems, Inc.Dual byte order computer architecture a functional unit for handling data sets with differnt byte ordersUS502727011 Oct 198825 Jun 1991Mips Computer Systems, Inc.Processor controlled interface with instruction streamingUS539452430 Nov 199228 Feb 1995International Business Machines CorporationMethod and apparatus for processing two graphics data streams in parallelUS539832827 Sep 199314 Mar 1995Silicon Graphics, Inc.System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory ordersUS559029424 May 199531 Dec 1996Silicon Graphics, Inc.Method of processing instructions by a processorUS56733772 Sep 199430 Sep 1997Ray Dream, Inc.Method and system for displaying a representation of a three-dimensional object with surface features that conform to the surface of the three-dimensional objectUS580171725 Apr 19961 Sep 1998Microsoft CorporationMethod and system in display device interface for managing surface memoryUS581213630 Oct 199622 Sep 1998Microsoft CorporationSystem and method for fast rendering of a three dimensional graphical objectUS582257030 Oct 199613 Oct 1998Microsoft CorporationIn a computer systemUS584456925 Apr 19961 Dec 1998Microsoft CorporationDisplay device interface including support for generalized flipping of surfacesUS585023225 Apr 199615 Dec 1998Microsoft CorporationIn a computer systemUS5861893 *27 May 199719 Jan 1999Intel CorporationSystem and method for graphics data concurrency and coherencyUS58647039 Oct 199726 Jan 1999Mips Technologies, Inc.Method for providing extended precision in SIMD vector arithmetic operationsUS5887172 *10 Jan 199623 Mar 1999Sun Microsystems, Inc.Remote procedure call system and method for RPC mechanism independent client and server interfaces interoperable with any of a plurality of remote procedure call backendsUS596484325 Apr 199612 Oct 1999Microsoft CorporationSystem for enhancing device driversUS600881625 Apr 199628 Dec 1999Microsoft CorporationMethod and system for managing color specification using attachable palettes and palettes that refer to other palettesUS604440825 Apr 199628 Mar 2000Microsoft CorporationMultimedia device interface for retrieving and exploiting software and hardware capabilitiesUS607894225 Apr 199620 Jun 2000Microsoft CorporationResource management for multimedia devices in a computerUS620836115 Jun 199827 Mar 2001Silicon Graphics, Inc.Method and system for efficient context switching in a computer graphics systemUS6213652 *17 Oct 199510 Apr 2001Fuji Xerox Co., Ltd.Job scheduling system for print processingUS621549530 May 199710 Apr 2001Silicon Graphics, Inc.Platform independent application program interface for interactive 3D scene managementUS624929421 Aug 199819 Jun 2001Hewlett-Packard Company3D graphics in a single logical sreen display using multiple computer systemsUS62526002 Oct 199826 Jun 2001International Business Machines CorporationComputer graphics system with dual FIFO interfaceUS628939621 Nov 199511 Sep 2001Diamond Multimedia Systems, Inc.Dynamic programmable mode switching device driver architectureUS641468829 Jan 19992 Jul 2002Micron Technology, Inc.Programmable graphics memory methodUS6496183 *30 Jun 199817 Dec 2002Koninklijke Philips Electronics N.V.Filter for transforming 3D data in a hardware accelerated rendering architectureUS652572515 Mar 200025 Feb 2003Sun Microsystems, Inc.Morphing decompression in a graphics systemUS7159041 *1 Mar 20012 Jan 2007Microsoft CorporationMethod and system for defining and controlling algorithmic elements in a graphics display system* Cited by examinerNon-Patent CitationsReference1Abrash, M., "Inside Xbox Graphics," Dr. Dobb's J., Aug. 2000, 21-22, 24-26.2Antinori, F. et al., "Experience with a 30 cm2 silicon pixel plane in CERN experiment WA97," Nucl. Instr. Meth. Phys. Res. A., 1995, 360, 91-97.3Bachstein, W. et al., "Single-Chip erledigt Multimedia," Elektronik, 1996, 17, 58-62.4Bajaj, C. et al., "Making 3D Textures Practical," IEEE: Proceedings-Seventh Pacific Conference on Computer Graphics and Applications, Oct. 5-7, 1999, 259-269.5Bakalash, R. et al., "A Barrel Shift Microsystem for Parallel Processing," in MICRO 23 Microprogramming and Microarchitecture, IEEE: Proceedings of the 23rd Annual Workshop and Symposium, Orlando Florida, Nov. 27-29, 1990, 223-229.6Bankston, J. et al., "Pipeline Processing with Modula-2," J. Pascal, Ada, & Modula-2, 1986, 5(5), 46-51.7Biernat, M.J. et al., "Approximate Shadow Generation," IEEE Montech Conferences, Nov. 9-12, 1987, 97-101.8Brechb�hler, Ch. et al., "Parametrization of Closed Surfaces for 3-D Shape Description," Comp. Vision Image Understanding, Mar. 1995, 61(2), 154-170.9Chen, Li, "Generalization Discrete Object Tracking Algorithms and Implementation," in Vision Geometry VI, Proceedings of SPIE, Melter, R.A. et al. (eds.), Jul. 28-29, 1997, 3168, 184-195.10Chiarulli, D.M. et al., "Draft: A Dynamically Reconfigurable Processor for Integer Arithmetic," IEEE: Proceedings-7th Symposium on Computer Arithmetic, University of Illinois, Hwang, K. (ed.), Jun. 4-6, 1985, 309-317.11Conference Paper, "A Shading and Compositing Processor based on Crossbar Switches and SRAM Memory," 1999, 4 pages.12Cox, M. et al., "Multi-Level Texture Caching for 3D Graphics Hardware," IEEE: Proceedings-The 25th Annual International Symposium on Computer Architecture, Barcelona, Spain, Jun. 27-Jul. 1, 1998, 86-97.13Dietz, P.H. et al., "Simple Networks for Pixel Plane Median Filtering," IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Dec. 1993, 40(12), 799-801.14Gomes, J. et al., "Graphical Objects," The Visual Computer, 1996, 12, 269-282.15Gordon, R.L., Ph.D. et al., Window Management, Graphics, and Operating Systems, Operating Systems Review, Jul. 1987, 21(3), 5-8.16Goris, A. et al., "A Configurable Pixel Cache for Fast Image Generation," IEEE Computer Graphics and Applications, Mar. 1987, 24-32.17Grimes, J. et al., "A New Processor with 3-D Graphics Capabilities," NCGA '89 Conference Proceedings: 10th Annual Conference and Exposition Dedicated to Computer Graphics, Philadelphia, Pennsylvania, Apr. 17-20, 1989, vol. 1, 275-284.18Grimes, J. et al., "The Intel i860 64-Bit Processor: A General-Purpose CPU with 3D Graphics Capabilities," IEEE Computer Graphics and Applications, Jul. 1989, 85-94.19Haig, T., "How to program in machine language," Electronics, Aug. 1982, 94-96, 98, 100-103.20Harrison, J.P. et al., "The Role of Microcomputers in Interactive Graphical Planning," Engin. Software for Microcomputers, Proc., Apr. 1984, 631-641.21Ho, C-H et al., "Efficient Point-Based Rendering Techniques for Haptic Display of Virtual Objects," Presence, Oct. 1999, 8(5), 477-491.22Hoffman, C. et al., "Automatic Surface Generation in Computer Aided Design," supported by the National Science Foundation, Department of Computer Science, Cornell University, Ithaca, New York, Jan. 1985, 1-22.23Hummel, R., "Render Benders: 26 Graphics Cards for Fast 3-D," Byte, Mar. 1998, 112-119.24James, M., "3-D graphics to become accessible to all," Scientific Computing World, Feb. 1997, 41 and 43.25Johnson, S.P., "Direct3D Revealed: Microsoft's 3-D API provides device-independent access to acceleration hardware. Here's how it works," Core Technologies, http://byte.com/art/9612/sec5/art4.htm, Dec. 1996, 5 pages.26Jones, M. et al., "High-Performance Graphics Via Silicon Compilation," VLSI Systems Design, Mar. 1987, 32, 33, 36 and 38.27Kaya, E.M., "New Trends in Graphic Display System Architecture," in Frontiers in Computer Graphics, Proceedings of Computer Graphics, Tokyo '84, Kunii, T.L. (ed.), 1985, 310-320.28Kumar, S. et al., "Efficient rendering of trimmed NURBS surfaces," Computer-Aided Disign, Jul. 1995, 27(7), 509-521.29Labsik, U. et al., "Progressive transmission of subdivision surfaces," Computational Geometry, 2000, 15, 25-39.30Lachaud, J-O. et al., "Continuous Analogs of Digital Boundaries: A Topological Approach to Iso-Surfaces," Graphical Models, 2000, 62, 129-164.31Lapidous, E. et al., "Optimal Depth Buffer for Low-Cost Graphics Hardware," Trident Microsystems, Inc., 1999, 67-73.32Lastra, A. et al., "Real-Time Programmable Shading," Proceedings: 1995 Symposium on Interative 3D Graphics, Monterey, California, Apr. 9-12, 1995, 59-66.33Lee, J-A. et al., "SPARP: a single pass antialiased rasterization processor," Comput. & Graphics, 2000, 24, 233-243.34Lichten, L., "A Solution to Surface Connectivity Problems in Computer-Aided Design," Computer Graphics, Mar. 1981, 14(4), 168-199.35Mabin, F.H. et al., "A Parallel Algorithm to Reconstruct Bounding Surfaces in 3D Images," J. Supercomputing, 1998, 12, 137-155.36McManus, D. et al., "Optimal Static 2-Dimensional Screen Subdivision for Parallel Rasterization Architectures," Comput. & Graphics, 1997, 21(2), 159-169.37Meyers, D. et al., "Surfaces from Contours," ACM Transactions on Graphics, Jul. 1992, 11(3), 228-258.38Micikevicius, P. et al., "Teaching a Computer Graphics Class Using DirectX," J. Comput. in Small Colleges; Proceedings of the Ninth Annual CCSC South Central Conference, (Jackson, Mississippi, Apr. 17-18), Meinke, J.G. (ed.), Mar. 1998, 13(4), 61-66.39Nishimura, H. et al., "A Multicomputer System Links: Its Architecture and Graphics Applications," IECON '84: International Conference on Industrial Electronics, Control and Instrumentation, Tokyo, Japan, Oct. 22-26, 1984, 1, 270-274.40NVIDIA Corporation, "System Platform Processor (SPP) / Integrated Graphics Processor (IGP): Redefining System and Graphics Performance," nForce SPP/IGP Product Overview, Jan. 2002, Version 1,2 pages.41NVIDIA Corporation, "Technical Brief: NVIDIA nfiniteFX II Engine From Research to Real Time," Jan. 16, 2002, 7 pages.42NVIDIA Corporation, "Technical Brief: NVIDIA nForce Platform Processing Architecture," 2001, 1-9.43Ohbuchi, R. et al., "Embedding Data in 3D Models," in Interactive Distributed Multimedia Systems and Telecommunication Services, 4th International Workshop, IDMS '97, Darmstadt, Germany, Sep. 10-12, 1997, 1-10.44Ohhashi, M. et al., "A 32b 3-D Graphic Processor Chip with 10M Pixels/s Gouraud Shading," 1988 IEEE International Solid-State Circuits Conference Digest of Technical Papers, Feb. 1988, 168-169 and 352.45Rowlan, J.S. et al., "A distributed, parallel, interactive volume rendering package," IEEE: Proceedings-Visualization '94, Washington, D.C., Oct. 17-21, 1994, 21-30.46Schneider, B-O. et al., "An adaptive framework for 3D graphics over networks," Comput. & Graphics, 1999, 23, 867-874.47Schneider, B-O. et al., "M-Buffer: A Flexible MISD Architecture for Advanced Graphics," Comput. & Graphics, 1995, 19(2), 239-246.48Senthinathan, R. et al., "A 650-MHz, IA-32 Microprocessor with Enhanced Data Streaming for Graphics and Video," IEEE J. Solid-State Circuits, Nov. 1999, 34(11), 1454-1465.49Shinya, M., "Improvements on the Pixel-tracing Filter: Reflection/Refraction, Shadows, and Jittering," Proceedings: Graphics Interface '95, May 7-19, 1995, 92-102.50Shirali, N. S. et al., "A Parallel Architecture Graphics Processor," IEEE Southeastcon: Conference Proceedings, Knoxville, Tennesse, Apr. 11-13, 1998, 108-111.51Smith, D.R. et al., "A Circuit-Switched Shared-Memory Multiprocessor," International J. Mini Microcomputers, 1995, 17(3), 108-118.52Sussman, H. et al., "Graphics Memory Architectures," Wescon/86 Conference Record, 1986, 1-6.53Swanson, R.W. et al., "A Fast Shaded-Polygon Rendered," Computer Graphics, Aug. 1986, 20(4), 95-101.54Teonnies, K.D. et al., "Volume rendering for interactive 3-d segmentation," in Image Display, Proceeding of SPIE, Newport Beach, California, Feb. 23-25, 1997, 3031, 602-609.55Thompson, T., "An inside look at the most popular 3-D environments: OpenGL, QuickDraw 3D, and Direct3D," Must-See-3-D Engines, Jun. 1996, byte.com/art/9606/sec11/art4.htm, 7 pages.56Thompson, T., "Direct3D's Engine," Must-See 3-D Engines, Jun. 1996, byte.com/art/9606/sec11/art7.htm, 1 page.57Thompson, T., "Open GL's Command Structure," Must-See 3-D Engines, Jun. 1996, byte.com/art/9606/sec11/art5.htm, 1 page.58Thompson, T., "QuickDraw 3D's Command Structure," Must-See 3-D Engines, Jun. 1996, byte.com/art/9606/sec11/art6.htm, 1 page.59Thompson, T., "Three Ways to Tackle Multithreading," Must-See 3-D Engines, Jun. 1996, byte.com/art/9606/sec11/art8.htm, 1 page.60Wilson, J.L. et al., "Designing a Graphics Application Interface," Proceedings Graphics Interface '85, Montreal, Quebec, May 27-31, 1985, 373-380.61Yoshida, M. et al., "Trend of the computer graphics hardware," Information Processing Soc. of Japan, Oct. 1988, 29(10), 1109-1115.62Zheng, Y. et al., "Three-dimensional unstructured mesh generation: Part 2. Surface meshes," Comput. Methods Appl. Mech. Engrg., 1996, 134, 269-284.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS78848172 Sep 20048 Feb 2011Microsoft CorporationMethod and system for defining and controlling algorithmic elements in a graphics display systemUS796528822 Oct 200921 Jun 2011Microsoft CorporationMethod and system for defining and controlling algorithmic elements in a graphics display systemClassifications U.S. Classification719/328, 345/418International ClassificationG06T15/00, G06F3/00, G06F17/00, G06F9/46Cooperative ClassificationG06T15/00, G06F9/445European ClassificationG06T15/00Legal EventsDateCodeEventDescription30 Dec 2013FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google