Source: http://www.google.fr/patents/US7317459
Timestamp: 2014-04-18 00:56:53
Document Index: 50902951

Matched Legal Cases: ['application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60']

Brevet US7317459 - Graphics system with copy out conversions between embedded frame buffer and ... - Google�BrevetsRecherche Images Maps Play YouTube Actualit�s Gmail Drive Plus »Connexion Recherche avanc�e dans les brevets BrevetsA graphics processor includes an embedded frame buffer for storing frame data prior to sending the frame data to an external location, such as main memory. A copy pipeline is provided which converts the data from one format to another format prior to writing the data to the external location. The conversion...http://www.google.fr/patents/US7317459?utm_source=gb-gplus-shareBrevet US7317459 - Graphics system with copy out conversions between embedded frame buffer and main memory for producing a streaming video image as a texture on a displayed object image Recherche avanc�e dans les brevets Num�ro de publicationUS7317459 B2Type de publicationOctroi Num�ro de demandeUS 11/604,374 Date de publication8 janv. 2008 Date de d�p�t27 nov. 2006 Date de priorit�23 ao�t 2000�tat de paiement des fraisPay�Autre r�f�rence de publicationUS7184059, US20070070083 Num�ro de publication11604374, 604374, US 7317459 B2, US 7317459B2, US-B2-7317459, US7317459 B2, US7317459B2 InventeursFarhad Fouladi, Mark M. Leather, Robert Moore, Howard Cheng, Timothy J. Van Hook Cessionnaire d'origineNintendo Co., Ltd.Exporter la citationBiBTeX, EndNote, RefManCitations de brevets (99), Citations hors brevets (84), R�f�renc� par (3), Classifications (25), �v�nements juridiques (1) Liens externes: USPTO, Cession USPTO, EspacenetGraphics system with copy out conversions between embedded frame buffer and main memory for producing a streaming video image as a texture on a displayed object imageUS 7317459 B2 R�sum� A graphics processor includes an embedded frame buffer for storing frame data prior to sending the frame data to an external location, such as main memory. A copy pipeline is provided which converts the data from one format to another format prior to writing the data to the external location. The conversion may be from one RGB color format to another RGB color format, from one YUV format to another YUV format, from an RGB color format to a YUV color format, or from a YUV color format to an RGB color format. MPEG image data initially stored in main memory in a YUV format as a texture is transferred to the embedded frame buffer prior to initiating a copy-out process via the copy pipeline from the embedded frame buffer to an external frame buffer in main memory. During the copy-out process, pixels are converted from YUV format to an RGB format. A new texture image containing MPEG image data is placed in the embedded frame buffer prior to each successive copy out process operation so as to produce a streaming video image as a surface texture on at least a portion of a displayed object image.
1. In a graphics system including a main processor and a pipelined architecture graphics coprocessor having an embedded frame buffer memory, the embedded frame buffer memory instantiated on a same semiconductor chip substrate as at least a portion of a graphics processing pipeline, and an external frame buffer residing within a main memory of said graphics system, said main memory being configured on one or more semiconductor chips separate from a semiconductor chip containing said graphics processing pipeline, a pixel data copy-out process for copying pixel data from said embedded frame buffer memory to said external frame buffer wherein said copy-out process performs predetermined pixel data conversion and/or filtering operations during transferring of pixel data from said embedded frame buffer to said external frame buffer, the pixel data copy-out process comprising:
selecting a region of pixels in the embedded frame buffer as a source for a pixel data copy operation, wherein the selected region of pixels contains MPEG image data in YUV format;
selecting a destination in the external frame buffer in said main memory for the pixel data copy operation; and
converting the selected region of pixels from a YUV format to an RGB format during said pixel data copy-out process when pixel data is transferred from said embedded frame buffer to said external frame buffer.
2. The pixel data copy-out process of claim 1 wherein MPEG image data is initially stored in main memory as a texture which is subsequently transferred to said embedded frame buffer prior to initiating said copy-out process.
3. The pixel data copy-out process of claim 1 wherein a new texture image containing MPEG image data is stored in the embedded frame buffer prior to each successive copy out process operation so as to produce a streaming video image on at least a portion of a displayed image.
4. A graphics generating system including a main processor, an associated graphics system main memory and a separate graphics coprocessor chip having graphics processing pipeline circuitry and an on-chip embedded frame buffer memory, said graphics system main memory being separate memory which is riot embedded on a same graphics coprocessor chip as said graphics processing pipeline circuitry, the graphics generating system comprising:
a programmable pixel data post-processing copy-out pipeline that selectively converts pixel data from one image format to another during a reading and transfer of the data from the embedded frame buffer to the separate non-embedded main memory, wherein the copy-out pipeline is operable to transfer pixel data to a display buffer area within the separate non-embedded main memory and wherein the copy-out pipeline converts successive frames of YUV formatted MPEG data stored in the embedded frame buffer memory to RGB pixel data upon transfer of the pixel data to the display buffer area so as to enable displaying of streaming MPEG video images.
5. The graphics generating system as in claim 4 wherein the MPEG data is initially stored in main memory as a texture image that is subsequently transferred to the embedded frame buffer prior to converting to RGB pixel data.
6. In a graphics processing system for rendering 3-D polygon based images for display, a method of superimposing streaming video as a texture on a surface of a rendered and displayed object, said graphics processing system including a graphics processing chip having an embedded memory which includes a first frame buffer and a separate non-embedded second frame buffer in a main memory provided separate from said graphics processing chip, the method comprising:
storing a texture image containing MPEG image data in the first embedded frame buffer on the graphics processing chip;
initiating a copy out operation for reading-out and transferring image data from the first embedded frame buffer to the separate non-embedded second frame buffer located in the main memory of the graphics processing system, wherein said copy out operation includes:
converting said MPEG image data from a YUV format to a ROB display format during the copy out operation upon reading out said image data from the embedded first frame buffer and prior to writing said image data to the non-embedded second frame buffer; and
writing convened MPEG image data to the non-embedded second frame buffer located in the main memory of the graphics system and displaying rendered image data from said second frame buffer.
7. The method of claim 6 wherein MPEG image data is initially stored in main memory as a texture which is subsequently transferred to said first embedded frame buffer prior to initiating said copy out operation.
8. The method of claim 6 wherein a new texture image containing MPEG image data is stored in the first embedded frame buffer prior to successive copy out operations so as to produce a streaming video image on at least a portion of a displayed image.
9. The method of claim 6 wherein the copy out operation, which includes converting MPEG image data from a YUV format to a RGB display format prior to writing image data to the non-embedded second frame buffer, is performed on successive video frames stored in the second frame buffer so as to produce a streaming video image on at least a portion of a displayed image.
10. A graphics generating system including a main processor, an associated graphics system main memory and a separate graphics coprocessor chip having graphics processing pipeline circuitry and an on-chip embedded frame buffer memory, said graphics system main memory being separate memory which is not embedded on a same graphics coprocessor chip as said graphics processing pipeline circuitry, comprising:
a programmable pixel data post-processing copy-out pipeline that selectively converts pixel data from one image format to another during a reading and copying of data from the embedded frame buffer to the separate non-embedded main memory, wherein the copy-out pipeline is operable to copy pixel data to a texture image storage area within the separate non-embedded main memory and wherein the copy-out pipeline applies a box filter to the pixel data in the embedded frame buffer prior to copying the data to the texture image storage area such that a lower level of detail texture image is created within the texture image storage area.
CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of application Ser. No. 09/722,663, filed Nov. 28, 2000 now U.S. Pat. No. 7,184,059 which claims the benefit of provisional application No. 60/227,030, filed Aug. 23, 2000.
This application is also related to the following co-pending applications identified below, which focus on various aspects of the graphics system described herein. Each of the following applications are hereby incorporated herein by reference.
provisional Application No. 60/161,915, filed Oct. 28, 1999 and its corresponding utility application Ser. No. 09/465,754, filed Dec. 17, 1999, now U.S. Pat. 6,717,577 issued on Apr. 6, 2004 both entitled �Vertex Cache For 3D Computer Graphics�, provisional Application No. 60/226,912, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,215, filed Nov. 28, 2000, now pending both entitled �Method and Apparatus for Buffering Graphics Data in a Graphics System �, provisional Application No. 60/226,889, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,419, filed Nov. 28, 2000, now U.S. Pat. 6,867,781, issued on Mar. 15, 2005 both entitled �Graphics Pipeline Token Synchronization�, provisional Application No. 60/226,891, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,382, filed Nov. 28, 2000, now U.S. Pat. 7,002,591, issued on Feb. 21, 2006 both entitled �Method And Apparatus For Direct and Indirect Texture Processing In A Graphics System�, provisional Application No. 60/226,888, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,367, filed Nov. 28, 2000, now U.S. Pat. 7,034,828, issued on Apr. 25, 2006 both entitled �Recirculating Shade Tree Blender For A Graphics System�, provisional Application No. 60/226,892, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,218, filed Nov. 28, 2000, now U.S. Pat. 6,980,218, issued on Dec. 27, 2005 both entitled �Method And Apparatus For Efficient Generation Of Texture Coordinate Displacements For Implementing Emboss-Style Bump Mapping In A Graphics Rendering System�, provisional Application No. 60/226,893, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,381 filed Nov. 28, 2000, now U.S. Pat. 6.825,851, issued on Nov. 30, 2004 both entitled �Method And Apparatus For Environment-Mapped Bump-Mapping In A Graphics System�, provisional Application No. 60/227,007, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,216, filed Nov. 28, 2000, now U.S. Pat. 6,639,595, issued on Oct. 28, 2003 both entitled �Achromatic Lighting in a Graphics System and Method�, provisional Application No. 60/226,900, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,226, filed Nov. 28, 2000, now U.S. Pat. 6,999,100, issued on Feb. 14, 2006 both entitled �Method And Apparatus For Anti-Aliasing In A Graphics System�, provisional Application No. 60/226,910, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,380, filed Nov. 28, 2000, now U.S. Pat. 6,937,245 issued on Aug. 30, 2005 both entitled �Graphics System With Embedded Frame Buffer Having Reconfigurable Pixel Formats�, utility application Ser. No. 09/585,329, filed Jun. 2, 2000, now U.S. Pat. 7,119,813, issued on Oct. 10, 2006 entitled �Variable Bit Field Color Encoding�, provisional Application No. 60/226,890, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,227, filed Nov. 28, 2000, now U.S. Pat. 6,636,214, issued on Oct. 21, 2003 both entitled �Method And Apparatus For Dynamically Reconfiguring The Order Of Hidden Surface Processing Based On Rendering Mode�, provisional Application No. 60/226,915, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,212 filed Nov. 28, 2000, now U.S. Pat. 7,061,502 issued on Jun. 13, 2006 both entitled �Method And Apparatus For Providing Non-Photorealistic Cartoon Outlining Within A Graphics System�, provisional Application No. 60/227,032, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,225, filed Nov. 28, 2000, now U.S. Pat. 6,580,430 issued on Jun. 17, 2003 both entitled �Method And Apparatus For Providing Improved Fog Effects In A Graphics System�, provisional Application No. 60/226,885, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,664, filed Nov. 28, 2000, now U.S. Pat. 6,811,489 issued on Nov. 2, 2004 both entitled �Controller Interface For A Graphics System�, provisional Application No. 60/227,033, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,221, filed Nov. 28, 2000, U.S. Pat. 6,707,458 issued on Mar. 16, 2004 both entitled �Method And Apparatus For Texture Tiling In A Graphics System�, provisional Application No. 60/226,899, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,667, filed Nov. 28, 2000, now U.S. Pat. 6,606,689 issued on Aug. 12, 2003 both entitled �Method And Apparatus For Pre-Caching Data In Audio Memory�, provisional Application No. 60/226,913, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,378, filed Nov. 28, 2000, now U.S. Pat. 6,664,958 issued on Dec. 16, 2003 both entitled �Z-Texturing�, provisional Application No. 60/227,031, filed Aug. 23, 2000 entitled �Application Program Interface for a Graphics System�, provisional Application No. 60/226,886, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,665, filed Nov. 28, 2000, now pending both entitled �Method and Apparatus for Accessing Shared Resources�, provisional Application No. 60/226,894, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/726,220, filed Nov. 28, 2000, now pending both entitled �Graphics Processing System With Enhanced Memory Controller�, provisional Application No. 60/226,914, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,390, filed Nov. 28, 2000, now U.S. Pat. 6,700,586 issued on Mar. 2, 2004 both entitled �Low Cost Graphics System With Stitching Hardware Support For Skeletal Animation�, and provisional Application No. 60/227,006, filed Aug. 23, 2000 and its corresponding utility application Ser. No. 09/722,421, filed Nov. 28, 2000, now U.S. Pat. 6,664,962 issued on Dec. 16, 2003 both entitled �Shadow Mapping In A Low Cost Graphics System�. FIELD OF THE INVENTION The present invention relates to computer graphics, and more particularly to interactive graphics systems such as home video game platforms. Still more particularly this invention relates to a graphics system having a copy pipeline capable of performing various conversion and other processing operations when transferring image data between a reconfigurable embedded frame buffer and main memory. The copy pipeline is used to selectively further process and selectively transfer image data to a display buffer or a texture buffer in main memory.
The particular and preferred anti-aliasing methods and arrangements for use in connection with the instant invention are disclosed in commonly owned and co-pending application Ser. No. 09/726,226, filed Nov. 28, 2000 now U.S. Pat. 6,999,100 issued on Feb. 14, 2006 and entitled �Method and Apparatus For Anti-Aliasing In A Graphics System�, which is incorporated by reference herein in its entirety. A brief explanation of this anti-aliasing is provided below, in order to give a more complete understanding of the 96-bit pixel format for the embedded frame buffer.
An exemplary interface between the pixel engine 700 and the embedded frame buffer 702 is shown in FIG. 8. Preferably, as shown in FIG. 8, there are 4 copies of the embedded frame buffer (702 a, 702 b, 702 c and 702 d)�2 for color and 2 for Z. In this example, a read or write access to the embedded frame buffer from the pixel engine transfers 96 bits of data or 4 quads of color and Z. There are 4 address/control and read buses to the core of each of the buffers. The Z channels A and B preferably share a write port 703 a, and the color channels A and B preferably share a separate write port 703 b. The embedded frame buffer preferably has enough bandwidth to blend 4 pixels per clock for peak filtrate of 800 M pixels per second. The maximum size of the embedded frame buffer is 640�528�24b color and 24b Z. The embedded frame buffer is single-buffered and expected to transfer a finished image to the external frame buffer for display. Double buffered display is achieved in this manner. The address/control, read and write buses shown in FIG. 8 are defined in the following table:
PE - EFB Interface Name: Description: za_addr (16:0) Z channel A quad address. There are 3 subfields: 3:0 column(3:0) valid range is 0 to 9 10:4 row(7:0) valid range 0 to 127 16:11 bank(5:0) valid range is 0 to 32 za_reb Z change A read enable (active low). za_web Z channel A write enable (active low). za_din(95:0) Z channel A quad read bus. 4 � 24 bit Z for a quad. (23:0) Z for the upper left pixel in the quad (47:24) Z for the upper right pixel in the quad (63:48) Z for the lower left pixel in the quad (95:64) Z for the lower right pixel in the quad zdout (95:0) Z channels A and B quad Z write bus. 4 � 24 bit Z for the quad Refer to za_din for pixel locations on the bus zb_addr (16:0) Z channel B quad address (refer to za_addr for bit-fields) zb_reb Z channel B read enable (active low) zb_web Z channel B write enable (active low) zb_din (95:0) Z channel B quad read bus (refer to za_din for pixel locations) ca_addr (16:0) C channel A quad address. There are 3 subfields: 3:0 column(3:0) valid range is 0 to 9 10:4 row(7:0) valid range 0 to 127 16:11 bank(5:0) valid range is 0 to 32 ca_reb Color channel A read enable (active low) ca_web Color channel A write enable (active low) ca_din (95:0) Color channel A quad read bus. 4 � 24 bit color for a quad. (23:0) color for the upper left pixel in the quad (47:24) color for the upper right pixel in the quad (63:48) color for the lower left pixel in the quad (95:64) color for the lower right pixel in the quad Cdout (95:0) Color channels A and B quad color write bus. 4 � 24 bit color for the quad Refer to ca_din for pixel locations on the bus. cb_addr (16:0) Color channel B quad address (refer to ca_addr for bit-fields) cb_reb Color channel B read enable (active low) cb_web Color channel B write enable (active low) cb_din (95:0) Color channel B quad read bus (refer to ca_din for pixel locations) Example Copy Out Operations and Pipeline
If the embedded frame buffer is configured for and contains data in any of the RGB(A) formats describe above, the copy pipeline performs anti-aliasing/deflickering operations, preferably using a programmable 7-tap vertical filter, as illustrated by block 628 in FIG. 12. As described in greater detail below, this filter blends the point sampled or supersampled (anti-aliasing) pixel data from multiple pixels and outputs a resulting pixel color. Once blended, gamma correction is performed, as illustrated by block 623. An optional conversion can then be performed, if desired for the particular application, to convert the RGB data to YUV444 format (block 641). If the data was converted to YUV444 at block 641, then another optional conversion can be performed at block 644 to convert from YUV444 to YUV422. If the copy pipe is being used for display, this conversion to YUV422 can be performed to put the data in main memory display format, which is YUV422 in this example. The tile data is then buffered at tile buffers 625 a and 625 b as explained above. Then, if the tile is intended for display, Y scaling is performed at block 626, and the scaled data is copied out to main memory in YUV422 format (block 642) for use by the video interface. On the other hand, if the data is intended to be used as a texture, Y scaling is not performed. Instead, the tile data is formatted into the desired texture at block 640 and sent to main memory as a texture tile for possible use in a subsequent graphics pipeline operation. The possible texture formats in this example are shown in FIG. 12 e and are listed below in connection with the texture copy commands and register bit definitions.
Normally, the source and destination rectangles would have the same size. However, when copying small textures that will be composited into a larger texture the source and destination rectangles may differ. The format GX_TF_A8 is used specifically to copy the alpha channel from the EFB into a GXTF_I8 formatted texture. The GX_TF_I8 will copy the luminance of the EFB into a GX_TF_I8 texture. When reading a texture, GX_TF_A8 and GX_TF_I8 are equivalent. When color textures are converted from an GX_PF_RGB8_Z24 pixel format to a lower-resolution color format, like GX_TF_RGB565, the least significant bits (LSBs) of the 8-bit colors are truncated. When color textures are converted from a lower resolution pixel format, such as GX_PF_RGB565_Z16, to a higher resolution texture format, such as GX_TF_RGB8, the most significant bits (MSBs) of each pixel are replicated in the LSBs of each texel. This conversion process distributes the estimation error evenly and allows each texel to represent the minimum or maximum value. In general, one should only copy textures containing alpha from an EFB with format GX_PF_RGBA6_Z24. When copying texture containing alpha from an EFB without alpha, alpha will be set to its maximum value. The GX_TF_Z24X8 format can be used to copy the 24-bit Z buffer to a 32-bit texture (equivalent format to GX_TF_RGBA8). To copy a texture, the application preferably first allocates a buffer in main memory the size of the texture to be copied. This size can be determined using, for example, a GXGetTexBufferSize function. This function preferably takes into account texture padding and texture type in its calculations.
Exemplary Anti-Aliasin During Copy Out
A luma/chroma (YUV) format stores the same visual quality pixel as RGB, but requires only two-thirds of the memory. Therefore, during the copy operation, the RGB(A) format in the EFB is converted to a YUV format in the XFB, in order to reduce the amount of main memory used for the external frame buffer (XFB). This conversion is done by the RGB to YUV section 624. An illustration of the conversion operation is shown in FIG. 10 a, wherein the RGB data is initially converted to YUV444 format and then down-sampled to YUV422 format for storage in the XFB as display data.
An illustration of the YUV444 to Y422 conversion is shown in FIG. 13. The following equations are used for this conversion:
c′(0,0)=�*c(0,0)+�*c(0,0)+�*c(1,0) c′(2,0)=�*c(1,0)+�*c(2,0)+�*c(3,0) c′(4,0)=�*c(3,0)+�*c(4,0)+�*c(5,0) c′(m,n)=�*c(m−1,n)+�*c(m,n)+1/4*c(m+1,n)
Void*DstBase
GXBool Clear
//Clamping flags for framebuffer
//Display buffer is interlaced
(YUV422).
src_clamp
tex_format
00: gamma=1.0 01: gamma=1.7 10: gamma=2.2 11: reserved 9: mip_map_filter
0: no filtering (1:1) 1: box filtering (2:1) 11: clr (should be set to 0 for rgb_aa)
0: do not clear Z and Color efb 1: clear Z and color efb 13:12 intlc
00: progressive 01: reserved 10: interlaced (even lines) 11: interlaced (odd lines) 16:15 ccv_mode
0x: automatic color conversion, based on pixtype and texture format 10: color conversion off (rgb to yuv) 11: color conversion on (rgb to yuv) The pixel types allowed for this operation are RGB8, RGBA6, RGB_AA (i.e. anti-aliasing (R5G6B5)), YUV8 and YUV420. Bits 3-6 determine the format of the texture stored by the copy command in texture buffer. In this example, this texture formatting is done in the texture format section 640 shown in FIG. 12. In this example, Clr is not supported for pixel type YUV420 and should be set to 0. Gamma correction is also not supported for pixel type YUV420 in this example.
10: scen
11: clr (should be set to zero for rgb_aa)
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