Source: http://www.google.com/patents/US8229110?ie=ISO-8859-1
Timestamp: 2015-04-25 16:11:05
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Patent US8229110 - Pipelined packet encryption and decryption using counter mode with cipher ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsAn apparatus includes a key mixing circuit to generate N groups of decryption seeds, each generated based upon a predetermined key, a transmitter address, and a predetermined start value for a packet number. An input circuit receives N encrypted packets, each including the transmitter address and one...http://www.google.com/patents/US8229110?utm_source=gb-gplus-sharePatent US8229110 - Pipelined packet encryption and decryption using counter mode with cipher-block chaining message authentication code protocolAdvanced Patent SearchPublication numberUS8229110 B1Publication typeGrantApplication numberUS 12/217,928Publication dateJul 24, 2012Filing dateJul 10, 2008Priority dateOct 27, 2004Also published asUS7742594, US8631233Publication number12217928, 217928, US 8229110 B1, US 8229110B1, US-B1-8229110, US8229110 B1, US8229110B1InventorsPeter Loc, Rahul KopikareOriginal AssigneeMarvell International Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (8), Non-Patent Citations (13), Referenced by (3), Classifications (15) External Links: USPTO, USPTO Assignment, EspacenetPipelined packet encryption and decryption using counter mode with cipher-block chaining message authentication code protocol
US 8229110 B1Abstract
An apparatus includes a key mixing circuit to generate N groups of decryption seeds, each generated based upon a predetermined key, a transmitter address, and a predetermined start value for a packet number. An input circuit receives N encrypted packets, each including the transmitter address and one of N values for the packet number. A decryption circuit decrypts each of the N encrypted packets using one of the N groups of decryption seeds that was generated based on the one of the N values in a respective one of the N encrypted packets. The key mixing circuit generates each of the N groups of decryption seeds before the input circuit receives the respective one of the N encrypted packets of the data. The predetermined start value is initialized when the apparatus is initialized and incremented when each of the N groups of decryption seeds is generated.
1. An apparatus for processing N encrypted packets, wherein N is an integer and N≧1, the apparatus comprising:
a key mixing circuit to generate N groups of decryption seeds, wherein each of the N groups of decryption seeds is generated based upon a predetermined key, a transmitter address, and a predetermined start value for a packet number;
an input circuit to receive the N encrypted packets, wherein each of the N encrypted packets comprises the transmitter address, and one of N values for the packet number, wherein each of the N values for the packet number is greater than, or equal to, the predetermined start value for the packet number; and
a decryption circuit to decrypt each of the N encrypted packets using one of the N groups of decryption seeds that was generated based on the one of the N values for the packet number in a respective one of the N encrypted packets,
wherein the key mixing circuit generates each of the N groups of decryption seeds before the input circuit receives the respective one of the N encrypted packets of the data, and
wherein the predetermined start value is (i) initialized when the apparatus is initialized and (ii) incremented when each of the N groups of decryption seeds is generated.
wherein the input circuit receives a message comprising the transmitter address and the predetermined start value for the packet number before generating the N groups of decryption seeds.
wherein the message further comprises information describing the N encrypted packets.
a verification circuit to verify each of the N decrypted packets using an integrity code key.
a countermeasures circuit to employ one or more countermeasures when any of the N decrypted packets cannot be verified.
wherein the decryption circuit selects one of the N encrypted packets and decrypts M different portions of the one of the N encrypted packets using M respective ones of the decryption seeds from the one of the N groups of decryption seeds that were generated based on the one of the N values for the packet number in the one of the N encrypted packets, where M is an integer greater than 1.
wherein the input circuit receives a message comprising a value of M for each of the N encrypted packets.
9. The network device of claim 8, wherein the network device comprises a wireless network device which is otherwise compliant with at least one standard selected from a group consisting of standards 802.11, 802.11a, 802.11b, 802.11g, 802.11n, 802.16, and 802.20 defined by Institute of Electrical and Electronics Engineers.
10. The network device of claim 8, wherein the network device comprises a wireless network device which is compliant with a standard 802.11i defined by Institute of Electrical and Electronics Engineers.
11. A method for processing N encrypted packets in an apparatus, wherein N is an integer and N≧1, the method comprising:
generating N groups of decryption seeds, wherein each of the N groups of decryption seeds is generated based upon a predetermined key, a transmitter address, and a predetermined start value for a packet number;
receiving the N encrypted packets, wherein each of the N encrypted packets comprises the transmitter address, and one of N values for the packet number, wherein each of the N values for the packet number is greater than, or equal to, the predetermined start value for the packet number; and
decrypting each of the N encrypted packets using the one of the N groups of decryption seeds that was generated based on the one of the N values for the packet number in a respective one of the N encrypted packets,
wherein each of the N groups of decryption seeds is generated before receiving the respective one of the N encrypted packets of the data, and
receiving a message comprising the transmitter address and the predetermined start value for the packet number before generating the N groups of decryption seeds.
verifying each of the N decrypted packets using an integrity code key.
employing one or more countermeasures when verifying any of the N decrypted packets fails.
16. The method of claim 11, wherein decrypting each of the N encrypted packets comprises:
selecting one of the N encrypted packets; and
decrypting M different portions of the one of the N encrypted packets using M respective ones of the decryption seeds from the one of the N groups of decryption seeds that were generated based on the one of the N values for the packet number in the one of the N encrypted packets, where M is an integer greater than 1.
receiving a message comprising a value of M for each of the N encrypted packets.
This application is a divisional of U.S. patent application Ser. No. 10/974,458, filed Oct. 27, 2004, now U.S. Pat. No. 7,742,594, issued Jun. 22, 2010, which is related to U.S. Non-Provisional patent application Ser. No. 10/974,388, filed Oct. 27, 2004, now U.S. Pat. No. 7,697,688, issued Apr. 18, 2010. The disclosures of the above applications are incorporated by reference herein in their entirety.
Embodiments of the present invention are described with respect to the Counter Mode With Cipher-Block Chaining Message Authentication Code Protocol (CCMP) specified by the IEEE 802.11i standard (April 2004). However, as will be apparent to one skilled in the relevant arts after reading this description, the techniques disclosed herein are equally applicable to other sorts of encryption and encapsulation protocols, and to wired networks as well as wireless networks.
FIG. 1 shows a network device 102 in communication with a network 104 such as a wireless local-area network (WLAN) according to a preferred embodiment. Network device 102 comprises an input circuit 106, a controller 108, a key mixing circuit 110, a memory 112, a Message Integrity Code (MIC) circuit 114, a packet number (PN) circuit 116, a CCMP encryption circuit 118, and an output circuit 120. According to some embodiments, network device 102 is compliant with IEEE standards 802.11i, and is otherwise compliant with one or more of IEEE standards 802.11 (1999 Edition), 802.11a (1999 Edition, Amended 2000), 802.11b (16 Sep. 1999 Edition), 802.11g (April 2003), 802.11n (e.g., IEEE P802.11-04/0889r6), 802.16 (Apr. 8, 2002), and 802.20-PD-06 (Jul. 16, 2004), the disclosures thereof incorporated herein by reference in their entirety.
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No. 10/974,388, filed Oct. 27, 2004, Loc et al.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8577037 *Jun 26, 2012Nov 5, 2013Marvell International Ltd.Pipelined packet encapsulation and decapsulation for temporal key integrity protocol employing arcfour algorithmUS8631233Jul 23, 2012Jan 14, 2014Marvell International Ltd.Pipelined packet encryption and decryption using counter mode with cipher-block chaining message authentication code protocolUS20120201196 *Aug 9, 2011Aug 9, 2012Qualcomm IncorporatedSignaling for extended mpdu, a-mpdu and a-msdu frame formats* Cited by examinerClassifications U.S. Classification380/28International ClassificationH04L9/28, H04K1/00, H04L9/00Cooperative ClassificationH04L2209/38, H04L2209/125, H04L9/0643, H04L9/0637, H04L9/0631, H04L2209/80, H04W12/10, H04W12/02European ClassificationH04L9/32M, H04L9/00, H04L9/06R1RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services