Source: http://www.google.com/patents/US3965366?ie=ISO-8859-1&dq=5998925
Timestamp: 2014-07-10 18:27:51
Document Index: 299544108

Matched Legal Cases: ['arts 310', 'arts 320', 'arts 330', 'arts 340', 'arts 350', 'art 320', 'arts 350', 'art 340', 'art 310', 'art 310', 'arts 330', 'arts 350', 'art 330', 'art 350', 'art 340', 'art 320', 'art 340', 'art 351', 'art 352', 'art 352', 'art 350', 'art 351', 'art 321', 'arts 150']

Patent US3965366 - Electrical devices control system - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsAn electrical device control system comprising: a plurality of signal sources; a plurality of electrical loads; a central operation apparatus; a plurality of terminal operation apparatus connected to the plurality of electrical loads and having means to detect the operation and a fault of the signal...http://www.google.com/patents/US3965366?utm_source=gb-gplus-sharePatent US3965366 - Electrical devices control systemAdvanced Patent SearchPublication numberUS3965366 APublication typeGrantApplication numberUS 05/501,985Publication dateJun 22, 1976Filing dateAug 30, 1974Priority dateSep 3, 1973Also published asDE2442066A1, DE2442066B2, DE2442066C3Publication number05501985, 501985, US 3965366 A, US 3965366A, US-A-3965366, US3965366 A, US3965366AInventorsShizuo Sumida, Kazuo Nii, Osamu Shimizu, Atsushi Ueda, Mitsuaki IshiiOriginal AssigneeMitsubishi Denki Kabushiki Kaisha, Toyo Kogyo Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (3), Referenced by (12), Classifications (15) External Links: USPTO, USPTO Assignment, EspacenetElectrical devices control systemUS 3965366 AAbstract An electrical device control system comprising: a plurality of signal sources; a plurality of electrical loads; a central operation apparatus; a plurality of terminal operation apparatus connected to the plurality of electrical loads and having means to detect the operation and a fault of the signal source and a fault of the electrical load and to generate a time division signal thereof; a multiple signal transmission line connecting the plurality of terminal operation apparatus to the central operation apparatus to transmit the time division signal to the central operation apparatus; the central operating apparatus having means to generate an activating signal for transmission over the multiple signal transmission line to the terminal station apparatus to operate an electrical load in response to the detection of the time division signal.
A plurality of terminal operation apparatus 300a, 300b, 300c respectively comprise input-output operation parts 310a, 310b, 310c; signal separating parts 320a, 320b, 320c; driving parts 330a, 330b1, 330b2 ; return signal composing parts 340a, 340b, 340c; and return signal generating parts 350a, 350b1, 350b2, 350c. The reference numerals 11, 12, 13, 21 designate electrical devices; 11, 12, 13 designate electrical loads and 21 designates a control switch. The number of the electrical devices is increased or decreased depending upon various needs.
In the terminal operation apparatus 300b, two electrical loads are connected with the result that the number of the blocks is increased as compared with the terminal operation apparatus 300a. However both of the basic structures are substantially the same. Since two loads 12, 13 are connected, the signal separating part 320b separates the signals corresponding to the two electrical loads. Two driving devices 330b1, 330b2 are required and two return signal generating parts 350b1, 350b2 are also required. The return signal composing part 340b combines the returning signals of the two electrical loads 12, 13 to form the time division multiple signal. The input-output operation part 310b is the same as the input-output operation part 310a.
Comparing the terminal operation apparatus 300a with the terminal operation apparatus 300b, the driving parts 330b1, 330b2 and the return signal generating parts 350b1, 350b2 are respectively connected to the two electrical loads 12, 13 in a manner similar to the connection of the driving part 330a to the return signal generating part 350a. The signal separation device 320b and the return signal composing part 340b are slightly different from the signal separating part 320a and the return signal composing part 340a because two signals need to be separated. However, they have substantially the same parts.
After the synchronizing signal 221, the data of the time division multiple signal is transmitted to all of the electrical devices. In FIG. 5, the data is transmitted to the n types of electrical devices, and the time periods for each electrical device are shown by the channel time periods CH1, CH2 . . . CHn. The positions of the channel time periods are designated as the addresses. The channel time periods are repeated in the repeating period T. The signal for each of the electrical devices is transmitted and received in each period T. The signal for each of the electrical devices is shown by 2 pulses of the clock signal in the channel time period.
The decoder circuit decodes the output of the counter circuit. The output is generated when it reaches a predetermined value. The set of the decoder is determined by the channel number alloted to the electrical load. In the case of CH1, the decoder is set to give the first and second pulses as the output of the decoder after the synchronizing signal 221. In the case of CH2, the decoder is set to give the third and fourth pulses as the output of the decoder after the synchronizing signal.
In the description, H level or H designates power voltage level and L level or L designates ground voltage level. The operation of the embodiment of FIG. 6 will now be described. When A is at H level, transistor 333 is in the ON state whereby electrical load 10 is driven. The resistance of resistor 353 is much higher than the resistance of electrical load 10 whereby a small current always passes to electrical load 10. The constant voltage diode 354, the transistor 356 and the resistors 355, 357 form a potential level detecting apparatus. The detected potential level is dependent upon the constant voltage diode 354. The detected level V1 is about one-half of the power voltage.
In FIG. 7, the reference numeral 20 designates a signal source of the control switch; 361 designates a resistor; 353, 363, 367, 369 designate resistors; 362, 366 designate constant voltage diodes; 364, 368 designate transistors; 370 designates an AND gate; and 371 designates a NOR gate. The signal source 20 is connected to the potential detecting part 351 at E. The output of the potential detecting part appears at F, G. The output of the return signal detecting part 352 appears at J, K. The resistance of the resistor 353 is set to be substantially equal to that of the resistor 361 whereby the potential V1 at E is about one-half of the power voltage in the OFF state of the signal source 20. The constant voltage diode 362, the transistor 364, the resistors 363, 365 form a first potential detecting circuit having the structure as stated in FIG. 6. The detecting level V2 is set so that V1 is less than V2. The constant voltage diode 366, the transistor 368, the resistors 367, 369 form a second potential detecting circuit. The detecting level V3 is set so that V3 is less than V1.
Since the potential at E is V1 in the OFF state of the signal source 20, F is at H level, G is at L level and J, K are respectively at L level whereby the OFF state of the signal source 20 indicates no fault. When the wiring to the signal source 20 is disconnected, E is at H level; F, G, are respectively at L level; K is at L level whereby the fault is indicated. When the signal source 20 is in the ON state, E is at L level; F, G are respectively at H level; J is at H level whereby the ON state of the signal source 20 is indicated.
Comparing FIG. 6 and FIG. 7, two potential detecting circuits are required in FIG. 7 and one OR gate 360 of the return signal detecting part 352 is required in FIG. 6. Accordingly, when the detecting potential level of the potential detecting circuit in FIG. 6 is set so as to be equal to the detecting potential level V2 of the first potential detecting circuit, the two potential detecting circuits can be commonly used. When the contact A in FIG. 6 is changed to the contact G in FIG. 7 and the outputs of the AND gate 358 and the NOR gate 359 are direct outputs, the contacts J, K are indicated. As stated above, the return signal generating part 350 can have the same structure whether the electrical device is the electrical load 10 or is the signal source 20. The signal can be transmitted in the same manner, even when the electrical device is an analogue signal source. The analogue signal can be converted to the digital signal by a conventional A-D converter.
The digital signal can be considered the same as the ON, OFF operation of the control switch 20. Accordingly, it is possible that the digital signal can be returned as the actuating signal when the digital signal is given as the input of the potential detecting part 351. In this embodiment, the multiple signal transmission line 200 is formed by two wires of the clock signal transmission line 210 and the data signal transmission line 220. It is also possible to transmit the synchronizing signal 221 separately by adding another signal transmission wire. In this case, as shown in FIG. 8, the synchronizing signal 221 is transmitted for one pulse of the clock pulse in the synchronizing signal transmission line of FIG. 8C whereby the waveform of the data signal shown in FIG. 5B is only the actuating signal 223 which has the waveform shown in FIG. 8B'. Since the pulse width of the synchronizing signal 221 can be small, the repeating period T' is slightly shorter than the repeating period T. This increases the quantity of data operated in the same period. The synchronizing signal separating part 321 can be deleted from the terminal operation apparatus 300. However, in the input-output operation parts 150, 310, it is necessary to set the buffer circuit for the synchronizing signal transmission line. On the other hand, it is possible to transmit all of the signals by one wire. The wavefore in this case is shown in FIG. 9 wherein the data signal is transmitted with the amplitude E1 and the clock signal is transmitted with the amplitude E2 which is about one-half of E1. In accordance with this embodiment, it is possible to separate the clock signal and the data signal by providing a composing circuit wherein the amplitude of the clock signal is one-half of the amplitude of the data signal in the output operation of the transmitting side and by detecting the level in the input operation of the receiving side. The composing circuit can be formed by the OR circuits for the data signal having the amplitude E1 and for the clock signal having the amplitude E2. The separating circuit in the receiving side can be formed by the potential level detecting part comprised of the constant voltage diode.