Source: http://www.google.com/patents/US7221017?dq=6272333
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Patent US7221017 - Memory utilizing oxide-conductor nanolaminates - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsStructures, systems and methods for floating gate transistors utilizing oxide-conductor nanolaminates are provided. One floating gate transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A floating gate is separated from the channel...http://www.google.com/patents/US7221017?utm_source=gb-gplus-sharePatent US7221017 - Memory utilizing oxide-conductor nanolaminatesAdvanced Patent SearchPublication numberUS7221017 B2Publication typeGrantApplication numberUS 10/191,336Publication dateMay 22, 2007Filing dateJul 8, 2002Priority dateJul 8, 2002Fee statusPaidAlso published asUS7583534, US7687848, US20040004245, US20060008966, US20070178643, US20090218612Publication number10191336, 191336, US 7221017 B2, US 7221017B2, US-B2-7221017, US7221017 B2, US7221017B2InventorsLeonard Forbes, Kie Y. AhnOriginal AssigneeMicron Technology, Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (107), Non-Patent Citations (74), Referenced by (43), Classifications (21), Legal Events (6) External Links: USPTO, USPTO Assignment, EspacenetMemory utilizing oxide-conductor nanolaminates
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS3665423Mar 13, 1970May 23, 1972Nippon Electric CoMemory matrix using mis semiconductor elementUS3877054Nov 8, 1973Apr 8, 1975Bell Telephone Labor IncSemiconductor memory apparatus with a multilayer insulator contacting the semiconductorUS3964085Aug 18, 1975Jun 15, 1976Bell Telephone Laboratories, IncorporatedMethod for fabricating multilayer insulator-semiconductor memory apparatusUS4217601Feb 15, 1979Aug 12, 1980International Business Machines CorporationNon-volatile memory devices fabricated from graded or stepped energy band gap insulator MIM or MIS structureUS4413022Jun 21, 1979Nov 1, 1983Canon Kabushiki KaishaMethod for performing growth of compound thin filmsUS4507673Sep 21, 1983Mar 26, 1985Tokyo Shibaura Denki Kabushiki KaishaSemiconductor memory deviceUS4661833Oct 29, 1985Apr 28, 1987Kabushiki Kaisha ToshibaElectrically erasable and programmable read only memoryUS4939559Apr 1, 1986Jul 3, 1990International Business Machines CorporationDual electron injector structures using a conductive oxide between injectorsUS5021999Dec 9, 1988Jun 4, 1991Mitsubishi Denki Kabushiki KaishaNon-volatile semiconductor memory device with facility of storing tri-level dataUS5027171Aug 28, 1989Jun 25, 1991The United States Of America As Represented By The Secretary Of The NavyDual polarity floating gate MOS analog memory deviceUS5111430Jun 21, 1990May 5, 1992Nippon Telegraph And Telephone CorporationNon-volatile memory with hot carriers transmitted to floating gate through control gateUS5253196Jan 9, 1991Oct 12, 1993The United States Of America As Represented By The Secretary Of The NavyMOS analog memory with injection capacitorsUS5274249Dec 20, 1991Dec 28, 1993University Of MarylandSuperconducting field effect devices with thin channel layerUS5293560Nov 3, 1992Mar 8, 1994Eliyahou HarariMulti-state flash EEPROM system using incremental programing and erasing methodsUS5298447Jul 22, 1993Mar 29, 1994United Microelectronics CorporationMethod of fabricating a flash memory cellUS5303182Nov 6, 1992Apr 12, 1994Rohm Co., Ltd.Nonvolatile semiconductor memory utilizing a ferroelectric filmUS5317535Jun 19, 1992May 31, 1994Intel CorporationGate/source disturb protection for sixteen-bit flash EEPROM memory arraysUS5388069Mar 18, 1993Feb 7, 1995Fujitsu LimitedNonvolatile semiconductor memory device for preventing erroneous operation caused by over-erase phenomenonUS5409859Apr 22, 1994Apr 25, 1995Cree Research, Inc.Method of forming platinum ohmic contact to p-type silicon carbideUS5424993Nov 15, 1993Jun 13, 1995Micron Technology, Inc.Programming method for the selective healing of over-erased cells on a flash erasable programmable read-only memory deviceUS5430670Nov 8, 1993Jul 4, 1995Elantec, Inc.Differential analog memory cell and method for adjusting sameUS5434815Jan 19, 1994Jul 18, 1995Atmel CorporationStress reduction for non-volatile memory cellUS5438544Jan 28, 1994Aug 1, 1995Fujitsu LimitedNon-volatile semiconductor memory device with function of bringing memory cell transistors to overerased state, and method of writing data in the deviceUS5449941Oct 27, 1992Sep 12, 1995Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS5467306Oct 4, 1993Nov 14, 1995Texas Instruments IncorporatedMethod of using source bias to increase threshold voltages and/or to correct for over-erasure of flash epromsUS5477485Feb 22, 1995Dec 19, 1995National Semiconductor CorporationMethod for programming a single EPROM or FLASH memory cell to store multiple levels of data that utilizes a floating substrateUS5485422Jun 2, 1994Jan 16, 1996Intel CorporationDrain bias multiplexing for multiple bit flash cellUS5493140Jun 21, 1994Feb 20, 1996Sharp Kabushiki KaishaNonvolatile memory cell and method of producing the sameUS5508543 *Apr 29, 1994Apr 16, 1996International Business Machines CorporationLow voltage memoryUS5530581May 31, 1995Jun 25, 1996Eic Laboratories, Inc.Protective overlayer material and electro-optical coating using sameUS5602777May 24, 1995Feb 11, 1997Sharp Kabushiki KaishaSemiconductor memory device having floating gate transistors and data holding meansUS5627781Nov 8, 1995May 6, 1997Sony CorporationNonvolatile semiconductor memoryUS5670790Sep 19, 1996Sep 23, 1997Kabushikik Kaisha ToshibaElectronic deviceUS5698022Aug 14, 1996Dec 16, 1997Advanced Technology Materials, Inc.Lanthanide/phosphorus precursor compositions for MOCVD of lanthanide/phosphorus oxide filmsUS5714766Sep 29, 1995Feb 3, 1998International Business Machines CorporationNano-structure memory deviceUS5740104Jan 29, 1997Apr 14, 1998Micron Technology, Inc.Multi-state flash memory cell and method for programming single electron differencesUS5754477Jan 29, 1997May 19, 1998Micron Technology, Inc.Differential flash memory cell and method for programmingUS5768192Jul 23, 1996Jun 16, 1998Saifun Semiconductors, Ltd.Non-volatile semiconductor memory cell utilizing asymmetrical charge trappingUS5795808Nov 12, 1996Aug 18, 1998Hyundai Electronics Industries C., Ltd.Method for forming shallow junction for semiconductor deviceUS5801401Jan 29, 1997Sep 1, 1998Micron Technology, Inc.Flash memory with microcrystalline silicon carbide film floating gateUS5828605Oct 14, 1997Oct 27, 1998Taiwan Semiconductor Manufacturing Company Ltd.Snapback reduces the electron and hole trapping in the tunneling oxide of flash EEPROMUS5840897Jun 7, 1995Nov 24, 1998Advanced Technology Materials, Inc.Metal complex source reagents for chemical vapor depositionUS5852306Jan 29, 1997Dec 22, 1998Micron Technology, Inc.Flash memory with nanocrystalline silicon film floating gateUS5856688Sep 30, 1997Jan 5, 1999Samsung Electronics Co., Ltd.Integrated circuit memory devices having nonvolatile single transistor unit cells thereinUS5886368Jul 29, 1997Mar 23, 1999Micron Technology, Inc.Transistor with silicon oxycarbide gate and methods of fabrication and useUS5912488Jun 24, 1997Jun 15, 1999Samsung Electronics Co., LtdStacked-gate flash EEPROM memory devices having mid-channel injection characteristics for high speed programmingUS5936274Jul 8, 1997Aug 10, 1999Micron Technology, Inc.High density flash memoryUS5943262Oct 28, 1998Aug 24, 1999Samsung Electronics Co., Ltd.Non-volatile memory device and method for operating and fabricating the sameUS5959896Feb 27, 1998Sep 28, 1999Micron Technology Inc.Multi-state flash memory cell and method for programming single electron differencesUS5973356Jul 8, 1997Oct 26, 1999Micron Technology, Inc.Ultra high density flash memoryUS5989958Aug 20, 1998Nov 23, 1999Micron Technology, Inc.Flash memory with microcrystalline silicon carbide film floating gateUS5991225Feb 27, 1998Nov 23, 1999Micron Technology, Inc.Programmable memory address decode array with vertical transistorsUS6005790Dec 22, 1998Dec 21, 1999Stmicroelectronics, Inc.Floating gate content addressable memoryUS6011725Feb 4, 1999Jan 4, 2000Saifun Semiconductors, Ltd.Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trappingUS6020024Aug 4, 1997Feb 1, 2000Motorola, Inc.Method for forming high dielectric constant metal oxidesUS6027961Jun 30, 1998Feb 22, 2000Motorola, Inc.CMOS semiconductor devices and method of formationUS6049479Sep 23, 1999Apr 11, 2000Advanced Micro Devices, Inc.Operational approach for the suppression of bi-directional tunnel oxide stress of a flash cellUS6072209Jul 8, 1997Jun 6, 2000Micro Technology, Inc.Four F2 folded bit line DRAM cell structure having buried bit and word linesUS6110529Jun 7, 1995Aug 29, 2000Advanced Tech MaterialsMethod of forming metal films on a substrate by chemical vapor depositionUS6115281Sep 11, 1998Sep 5, 2000Telcordia Technologies, Inc.Methods and structures to cure the effects of hydrogen annealing on ferroelectric capacitorsUS6122201Oct 20, 1999Sep 19, 2000Taiwan Semiconductor Manufacturing CompanyClipped sine wave channel erase method to reduce oxide trapping charge generation rate of flash EEPROMUS6124729Feb 27, 1998Sep 26, 2000Micron Technology, Inc.Field programmable logic arrays with vertical transistorsUS6143636Aug 20, 1998Nov 7, 2000Micron Technology, Inc.High density flash memoryUS6153468May 17, 1999Nov 28, 2000Micron Technololgy, Inc.Method of forming a logic array for a decoderUS6160739Apr 16, 1999Dec 12, 2000Sandisk CorporationNon-volatile memories with improved endurance and extended lifetimeUS6166401Aug 20, 1998Dec 26, 2000Micron Technology, Inc.Flash memory with microcrystalline silicon carbide film floating gateUS6171900Apr 15, 1999Jan 9, 2001Taiwan Semiconductor Manufacturing CompanyCVD Ta2O5/oxynitride stacked gate insulator with TiN gate electrode for sub-quarter micron MOSFETUS6194228Oct 21, 1998Feb 27, 2001Fujitsu LimitedElectronic device having perovskite-type oxide film, production thereof, and ferroelectric capacitorUS6203613Oct 19, 1999Mar 20, 2001International Business Machines CorporationAtomic layer deposition with nitrate containing precursorsUS6212103 *Jul 28, 1999Apr 3, 2001Xilinx, Inc.Method for operating flash memoryUS6222768Apr 26, 2000Apr 24, 2001Advanced Micro Devices, Inc.Auto adjusting window placement scheme for an NROM virtual ground arrayUS6225168Jun 4, 1998May 1, 2001Advanced Micro Devices, Inc.Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereofUS6232643Nov 13, 1997May 15, 2001Micron Technology, Inc.Memory using insulator trapsUS6238976Feb 27, 1998May 29, 2001Micron Technology, Inc.Method for forming high density flash memoryUS6243300Feb 16, 2000Jun 5, 2001Advanced Micro Devices, Inc.Substrate hole injection for neutralizing spillover charge generated during programming of a non-volatile memory cellUS6246606Sep 2, 1999Jun 12, 2001Micron Technology, Inc.Memory using insulator trapsUS6294813Feb 15, 2000Sep 25, 2001Micron Technology, Inc.Information handling system having improved floating gate tunneling devicesUS6310376Oct 2, 1998Oct 30, 2001Sharp Kabushiki KaishaSemiconductor storage device capable of improving controllability of density and size of floating gateUS6313518Mar 2, 2000Nov 6, 2001Micron Technology, Inc.Porous silicon oxycarbide integrated circuit insulatorUS6320784Mar 14, 2000Nov 20, 2001Motorola, Inc.Memory cell and method for programming thereofUS6320786Feb 5, 2001Nov 20, 2001Macronix International Co., Ltd.Method of controlling multi-state NROMUS6351411Jun 12, 2001Feb 26, 2002Micron Technology, Inc.Memory using insulator trapsUS6353554Dec 12, 2000Mar 5, 2002Btg International Inc.Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cellUS6365470Dec 29, 2000Apr 2, 2002Secretary Of Agency Of Industrial Science And TechnologyMethod for manufacturing self-matching transistorUS6387712Dec 3, 1999May 14, 2002Tdk CorporationProcess for preparing ferroelectric thin filmsUS6420902 *May 31, 2000Jul 16, 2002Micron Technology, Inc.Field programmable logic arrays with transistors with vertical gatesUS6429063Mar 6, 2000Aug 6, 2002Saifun Semiconductors Ltd.NROM cell with generally decoupled primary and secondary injectionUS6432779Jan 30, 2001Aug 13, 2002Motorola, Inc.Selective removal of a metal oxide dielectricUS6445023Mar 16, 1999Sep 3, 2002Micron Technology, Inc.Mixed metal nitride and boride barrier layersUS6445030Jan 30, 2001Sep 3, 2002Advanced Micro Devices, Inc.Flash memory erase speed by fluorine implant or fluorinationUS6449188Jun 19, 2001Sep 10, 2002Advanced Micro Devices, Inc.Low column leakage nor flash array-double cell implementationUS6456531Jun 19, 2001Sep 24, 2002Advanced Micro Devices, Inc.Method of drain avalanche programming of a non-volatile memory cellUS6456536Jun 19, 2001Sep 24, 2002Advanced Micro Devices, Inc.Method of programming a non-volatile memory cell using a substrate biasUS6458701Oct 12, 2000Oct 1, 2002Samsung Electronics Co., Ltd.Method for forming metal layer of semiconductor device using metal halide gasUS6459618Jun 13, 2001Oct 1, 2002Advanced Micro Devices, Inc.Method of programming a non-volatile memory cell using a drain biasUS6465306Nov 28, 2000Oct 15, 2002Advanced Micro Devices, Inc.Simultaneous formation of charge storage and bitline to wordline isolationUS6487121Jul 5, 2001Nov 26, 2002Advanced Micro Devices, Inc.Method of programming a non-volatile memory cell using a vertical electric fieldUS6490204Apr 5, 2001Dec 3, 2002Saifun Semiconductors Ltd.Programming and erasing methods for a reference cell of an NROM arrayUS6490205Oct 26, 2000Dec 3, 2002Advanced Micro Devices, Inc.Method of erasing a non-volatile memory cell using a substrate biasUS6504755 *May 14, 1999Jan 7, 2003Hitachi, Ltd.Semiconductor memory deviceUS6521950Mar 1, 2002Feb 18, 2003The United States Of America As Represented By The Secretary Of The NavyUltra-high resolution liquid crystal display on silicon-on-sapphireUS6521958Aug 26, 1999Feb 18, 2003Micron Technology, Inc.MOSFET technology for programmable address decode and correctionUS6541816Jun 27, 2001Apr 1, 2003Advanced Micro Devices, Inc.Planar structure for non-volatile memory devicesUS6580124 *Aug 14, 2000Jun 17, 2003Matrix Semiconductor Inc.Multigate semiconductor device with vertical channel current and method of fabricationUS6586785 *Jun 29, 2001Jul 1, 2003California Institute Of TechnologyAerosol silicon nanoparticles for use in semiconductor device fabricationUS6867097 *Oct 28, 1999Mar 15, 2005Advanced Micro Devices, Inc.Method of making a memory cell with polished insulator layerUS20020003252 *Sep 3, 1998Jan 10, 2002Ravi IyerFlash memory circuit with with resistance to disturb effect* Cited by examinerNon-Patent CitationsReference1Abbas, S. A., et al., "N-Channel Igfet Design Limitations Due to Hot Electron Trapping", Technical Digest, International Electron Devices Meeting., Washington, DC,(Dec. 1975),35-38.2Ahn, Seong-Deok , et al., "Surface Morphology Improvement of Metalorganic Chemical Vapor Deposition Al Films by Layered Deposition of Al and Ultrathin TiN", Japanese Journal of Applied Physics, Part 1(Regular Papers, Short Notes & Review Papers)39(6A), (Jun 2000),3394-3354.3Alen, Petra , et al., "Atomic LAyer Deposition of Ta(Al)N(C) Thin Films Using Trimethylaluminum as a Reducing Agent", Journal of the Electrochemical Society, 148(10), (Oct. 2001),G566-G571.4Asari, K , et al., "Multi-mode and multi-level technologies for FeRAM embedded reconfigurable hardware", Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International , Feb. 15-17, 1999, (1999),106-107.5Britton, J , et al., "Metal-nitride-oxide IC memory retains data for meter reader", Electronics, 45(22), (Oct. 23, 1972),119-23.6Carter, R J., "Electrical Characterization of High-k Materials Prepared By Atomic Layer CVD", IWGI, (2001),94-99.7Chae, Junghun , et al., "Atomic Layer Deposition of Nickel by the Reduction of Preformed Nickel Oxide", Electrochemical & Solid-State Letters, 5(6), (Jun. 2002),C64-C66.8Chaitsak, Suticai , et al., "Cu(InGa)Se/sub 2/ thin-film solar cells with high resistivity ZnO buffer layers deposited by atomic layer deposition", Japanese Journal of Applied Physics Part 1-Regular Papers Short Notes & Review Papers, 38(9A), (Sep. 1999),4989-4992.9Chang, C. , "Novel Passivation Dielectrics-The Boron- or Phosphorus-Doped Hydrogenated Amorphous Silicon Carbide Films", Journal of the Electrochemical Society, 132, (Feb. 1985),418-422.10Cricchi, J R., et al., "Hardened MNOS/SOS electrically reprogrammable nonvolatile memory", IEEE Transactions on Nuclear Science, 24(6), (Dec. 1977),2185-9.11Demichelis, F. , "Influence of Doping on the Structural and Optoelectronic Properties of Amorphous and Microcrystalline Silicon Carbide", Journal of Applied Physics, 72, (Aug. 15, 1992),1327-1333.12Demichelis, F. , "Physical Properties of Undoped and Doped Microcrystalline SiC:H Deposited By PECVD", Materials Research Society Symposium Proceedings, 219, Anaheim, CA,(Apr. 30-May 3, 1991),413-418.13Dimaria, D J., "Graded or stepped energy band-gap-insulator MIS structures (GI-MIS or SI-MIS)", Journal of Applied Physics, 50(9), (Sep. 1979),5826-5829.14Dimaria, D. , "Graded or stepped energy band-gap-insulator MIS structures (GI-MIS or SI-MIS)", J. Appl. Phys., 50(9),(Sep. 1979),5826-5829.15Dipert, B. , et al., "Flash Memory goes Mainstream", IEE Spectrum, No. 10, (Oct. 1993),48-50.16Dipert, Brian , "Flash Memory Goes Mainstream", IEEE Spectrum, 30(10), (Oct. 1993),48-52.17Eitan, Boaz , "NROM: A Novel Localized Trapping, 2-Bit Nonvolatite Memory Cell", IEEE Electron Device Letters, 21(11), (Nov. 2000),543-545.18 *Elam et al., "Kinetics of the WF6 and Si2H6 surface reactions during tungsten atomic layer deposition", May 20, 2001, Surface Science, Issue 1-3, pp. 121-135.19Elam, J W., "Kinetics of the WF6 and Si2H6 surface reactions during tungsten atomic layer deposition", Surface Science, 479(1-3), (May 2001),121-135.20Fauchet, P M., et al., "Optoelectronics and photovoltaic applications of microcrystalline SIC", Symp. on Materials Issues in Mecrocystalline Semiconductors, (1989),291-292.21Ferris-Prabhu, A V., "Amnesia in layered insulator FET memory devices", Institution of Electrical Engineers, (2002),Abstract.22Ferris-Prabhu, A V., "Charge transfer in layered insulators", Institution of Electrical Engineers, (2002),Abstract.23Ferris-Prabhu, A V., "Tunnelling theories of non-volatile semiconductor memories", Physics Status Solidi A, 35(1), (May 16, 1976),243-50.24Fisch, D E., et al., "Analysis of thin film ferroelectric aging", Proc. IEEE Int. Reliability Physics Symp., (1990),237-242.25Forbes, L. , et al., "Field Induced Re-Emission of Electrons Trapped in SiO", IEEE Transactions on Electron Devices, ED-26 (11), Briefs,(Nov. 1979),1816-1818.26Forsgren, Katarina , "Atomic Layer Deposition of HfO2 using hafnium iodide", Conference held in Monterey, California, (May 2001),1 page.27Frohman-Bentchkowsky, D , "An integrated metal-nitride-oxide-silicon (MNOS) memory", Proceedings of the IEEE, 57(6), (Jun. 1969),1190-1192.28Goodwins, Rupert , "New Memory Technologies on the Way", http://zdnet.com.com/2100-1103-846950.html, (Feb. 2002).29Guha, S , et al., "Atomic beam deposition of lanthanum-and yttrium-based oxide thin films for gate dielectrics", Appl. Phys. Lett., 77, (2000),2710-2712.30Hwang, C G., "Semiconductor Memories for the IT Era", 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers IEEE. Part vol. 1, San Francisco,(2002),24-27.31Hwang, N. , et al., "Tunneling and Thermal Emission of Electrons from a Distribution of Deep Traps in SiO", IEEE Transactions on Electron Devices, 40(6), (Jun. 1993),1100-1103.32Juppo, Marika, et al., "Use of 1,1Dimethylhydrazine in the Atomic Layer Deposition of Transition Metal Nitride Thin Films", Journal of the Electrochemical Society, 147(9), (Sep. 2000),3377-3381.33Klaus, J W., et al., "Atomic layer deposition of tungsten nitride films using seguential surface reactions", Journal of the Electrochemical Society, 147(3), (Mar. 2000),1175-81.34Kukli, K , et al., "Tailoring the dielectric properties of HfO2-Ta2O3 nanolaminates", Appl. Phys. Lett., 68, (1996),3737-3739.35Leskela, M , et al., "ALD precursor chemistry: Evolution and future challenges", Journal de Physique IV (Proceedings), 9(8), (Sep. 1999),837-852.36Liu, Z. , et al., "Low Programming Voltages and Long Retention Time in Metal Nanocrystal EEPROM Devices", Digest of the IEEE Device Research Conference, Notre Dame, Indiana, (Jun. 25-27, 2001), 79-80.37Luan, H. , "High Quality Ta2O5 Gate Dielectrics with Tox,eq<10A",IEDM, (1999),pp. 141-144.38Lusky, E , et al., "Characterization of Channel Hot Electron Injection by the Subthreshold Slope of NROM Device", IEEE Electron Device Letters, 22(11), (Nov. 2001),556-558.39Lusky, et al., "Characterization of channel hot electro injection by the subthreshold slope of NROM/sup TM/ device", IEEE Electron Device Letters, vol. 22, No. 11, (Nov. 2001),556-558.40Maayan, E., et al., "A 512Mb BROM Flash Data Storage: Memory with 8MB/s Data Rate", ISSCC 2002 / Session 6 / SRAM and Non-Volatile Memories, (Feb. 2002),4 pages.41Maayan, Eduardo , et al., "A 512Mb NROM Flash Data Storage Memory with 8MB/s Data Rate", Solid-State Curcuits Conference, 2002. Digest of Technical Papers. ISSCC, (2002), 100-101.42Martins, R , "Transport Properties of Doped Silicon Oxycarbide Microcrystalline Films Produced by Spatial Separation Techniques", Solar Energy Materials and Solar Cells, 41-42, (1996),493-517.43Martins, R. , "Wide Band Gap Microcrystalline Silicon Thin Films", Duffusion and Defect Data : Solid State Phenomena, 44-46, Part 1, Scitec Publications,(1995),299-346.44Min, J. , "Metal-organic atomic-layer deposition of titanium-silicon-nitride films", Applied Physics Letters, 75(11), (1999),1521-1523.45Min, Jae-Sik , et al., "Atomic layer deposition of TiN films by alternate supply of tetrakis (ethylmethylamino)-titanium and ammonia", Japanese Journal of Applied Physics Part 1-Regular Papers Short Notes & Review Papers, vol. 37, No. 9A, (Sep. 1998),4999-5004.46Moazzami, R , "Endurance properties of Ferroelectric PZT thin films", Int. Electron Devices Mtg., San Francisco,(1990),417-20.47Moazzami, R , "Ferroelectric PZT thin films for semiconductor memory", Ph.D Thesis, University of California, Berkeley, (1991).48Morishita, S , "Atomic-layer chemical-vapor-deposition of SiO/sub 2/ by cyclic exposures of CH/sub 3/OSi(NCO)/sub 3/ and H/sub 2/O/sub 2/", Japanese Journal of Applied Physics Part 1-Regular Papers Short Notes & Review Papers, vol. 34, No. 10, (Oct. 1995),5738-42.49Moriwaki, M , "Improved metal gate process by simultaneous gate-oxide nitridation during W/WN/sub x/gate formation", Japanese Journal of Applied Physics Part 1-Regular Papers Short Notes & Review Papers, 39(4B), (Apr. 2000),2177-2180.50Muller, R. S., et al., In: Device Electronics for Integrated Circuits, Second Edition, John Wiley & Sons, New York, (1986), p. 157.51Niilisk, A , "Atomic-scale optical monitoring of the initial growth of TiO2 thin films", Proceedings of the SPIE-The International Society for Optical Engineering, 4318, (2001),72-77.52Park, Jin-Seong , et al., "Plasma-Enhanced Atomic Layer Deposition of Tantalum Nitrides Using Hydrogen Radicals as a Reducing Agent", Electrochemical & Solid-State Letters, 4(4), (Apr. 2001),C17-19.53Renlund, G. M., "Silicon oxycarbide glasses: Part 1. Preparation and chemistry", J. Mater. Res., (Dec. 1991),pp. 2716-2722.54Renlund, G. M., "Silicon oxycarbide glasses: Part II. Structure and properties", J. Mater. Res., vol. 6, No. 12,(Dec. 1991),pp. 2723-2734.55Ritala, Mikko , "Atomic Layer Epitaxy Growth of Titanium, Zirconium and Hafnium Dioxide Thin Films", Annales Academiae Scientiarum Fennicae, (1994),24-25.56Robertson, J. , "Band offsets of wide-band-gap oxides and implications for future electronic devices", Journal of Vacuum Science & Technology B (Microelectronics and Nanometer Structures), 18(3), (May-Jun. 2000),1785-1791.57Sanders, B W., et al., "Zinc Oxysulfide Thin Films Grown by Atomic Layer Deposition", Chemistry of Materials, 4(5), (1992),1005-1011.58She, Min , et al., "Modeling and design study of nanocrystal memory devices", IEEE Device Research Conference, (2001), 139-40.59Shimada, H , et al., "Tantalum nitride metal gate FD-SOI CMOS FETs using low resistivity self-grown bcc-tantalum layer", IEEE Transactions on Electron Devices, vol. 48, No. 8, (Aug. 200),1619-1626.60Shirota, R , et al., "A 2.3 mu m/sup 2/ memory cell structure for 16 Mb NAND EEPROMs", International Electron Devices Meeting 1990. Technical Digest, San Francisco,(1990),103-106.61Sneh, Ofer , "Thin film atomic layer deposition equipment for semiconductor processing", Thin Solid Films, vol. 402, No. 1-2, (Jan. 2002),248-261.62Solanki, Raj , et al., "Atomic Layer Deposition of Copper Seed Layers", Electrochemical & Solid-State Letters, 3(10), (Oct. 2000),479-480.63Song, Hyun-Jung , et al., "Atomic Layer Deposition of Ta2O5 Films Using Ta(OC2H5)5 and NH3", Ultrathin SiO/sub 2/ and High-K Materials for ULSI Gate Dielectrics. Symposium, (1999),469-471.64Suntola, T , "Atomic layer epitaxy", Thin Solid Films, 216(1), (Aug. 28, 1992),84-89.65Suntola, T. , "Atomic Layer Epitaxy", Handbook of Crystal Growth, 3: Thin Films of Epitaxy, Part B: Growth Mechanics and Dynamics, Amsterdam,(1994),602-663.66Sze, S M., "Physics of Semiconductor Devices", New York : Wiley, (1981),504-506.67Sze, S M., "Physics of semiconductor devices", New York: Wiley, (1981),504-506.68Wei, L S., et al., "Trapping, emission and generation in MNOS memory devices", Solid-State Electronics, 17(6), (Jun. 1974),591-8.69White, M H., "Direct tunneling in metal-nitride-oxide-silicon (MNOS) structures", Programmme of the 31st physical electronics conference, (1971), 1.70White, M H., et al., "Characterization of thin-oxide MNOS memory transistors", IEEE Transactions on Electron Devices, ED-19(12), (Dec. 1972),1280-1288.71Wood, S W., "Ferroelectric memory design", M.A.Sc. thesis, University of Toronto, (1992).72Yagishita, A , "Dynamic threshold voltage damascene metal gate MOSFET (DT-DMG-MOS) with low threshold voltage, high drive current and uniform electrical characterizatics", International Electron Devices Meeting 2000, Technical Digest. IEDM, (Dec. 2000),663-666.73Yoder, M , "Wide Bandgap Semiconductor Materials and Devices", IEEE Transactions on Electron Devices, 43, (Oct. 1996),1633-1636.74Zhu, W J., et al., "Current transport in metal/hafnium oxide/silicon structure", IEEE Electron Device Letters, 23, (2002),97-99.* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS7531869 *Dec 1, 2006May 12, 2009Micron Technology, Inc.Lanthanum aluminum oxynitride dielectric filmsUS7583534 *Aug 31, 2005Sep 1, 2009Micron Technolgy, Inc.Memory utilizing oxide-conductor nanolaminatesUS7622355Nov 24, 2009Micron Technology, Inc.Write once read only memory employing charge trapping in insulatorsUS7670646Mar 2, 2010Micron Technology, Inc.Methods for atomic-layer depositionUS7687848Mar 30, 2010Micron Technology, Inc.Memory utilizing oxide-conductor nanolaminatesUS7700989Dec 1, 2006Apr 20, 2010Micron Technology, Inc.Hafnium titanium oxide filmsUS7709402Feb 16, 2006May 4, 2010Micron Technology, Inc.Conductive layers for hafnium silicon oxynitride filmsUS7719065Aug 29, 2005May 18, 2010Micron Technology, Inc.Ruthenium layer for a dielectric layer containing a lanthanide oxideUS7728392Jan 3, 2008Jun 1, 2010International Business Machines CorporationSRAM device structure including same band gap transistors having gate stacks with high-K dielectrics and same work functionUS7728626Sep 5, 2008Jun 1, 2010Micron Technology, Inc.Memory utilizing oxide nanolaminatesUS7754618Jul 13, 2010Micron Technology, Inc.Method of forming an apparatus having a dielectric containing cerium oxide and aluminum oxideUS7847344Jul 8, 2002Dec 7, 2010Micron Technology, Inc.Memory utilizing oxide-nitride nanolaminatesUS7867919Dec 8, 2006Jan 11, 2011Micron Technology, Inc.Method of fabricating an apparatus having a lanthanum-metal oxide dielectric layerUS7927948Jul 20, 2005Apr 19, 2011Micron Technology, Inc.Devices with nanocrystals and methods of formationUS7989290Aug 2, 2011Micron Technology, Inc.Methods for forming rhodium-based charge traps and apparatus including rhodium-based charge trapsUS8059462 *Nov 15, 2011Kabushiki Kaisha ToshibaNonvolatile semiconductor memory deviceUS8067794May 3, 2010Nov 29, 2011Micron Technology, Inc.Conductive layers for hafnium silicon oxynitride filmsUS8093129Jan 10, 2012Micron Technology, Inc.Methods of forming memory cellsUS8110469Feb 7, 2012Micron Technology, Inc.Graded dielectric layersUS8154066Dec 1, 2006Apr 10, 2012Micron Technology, Inc.Titanium aluminum oxide filmsUS8188533May 29, 2012Micron Technology, Inc.Write once read only memory employing charge trapping in insulatorsUS8228725Jul 24, 2012Micron Technology, Inc.Memory utilizing oxide nanolaminatesUS8237216Aug 7, 2012Micron Technology, Inc.Apparatus having a lanthanum-metal oxide semiconductor deviceUS8278225Oct 2, 2012Micron Technology, Inc.Hafnium tantalum oxide dielectricsUS8288818Apr 18, 2011Oct 16, 2012Micron Technology, Inc.Devices with nanocrystals and methods of formationUS8314456Jul 29, 2011Nov 20, 2012Micron Technology, Inc.Apparatus including rhodium-based charge trapsUS8501563Sep 13, 2012Aug 6, 2013Micron Technology, Inc.Devices with nanocrystals and methods of formationUS8524618Sep 13, 2012Sep 3, 2013Micron Technology, Inc.Hafnium tantalum oxide dielectricsUS8541276Apr 9, 2012Sep 24, 2013Micron Technology, Inc.Methods of forming an insulating metal oxideUS8558325May 17, 2010Oct 15, 2013Micron Technology, Inc.Ruthenium for a dielectric containing a lanthanideUS8785312Nov 28, 2011Jul 22, 2014Micron Technology, Inc.Conductive layers for hafnium silicon oxynitrideUS8907486Oct 11, 2013Dec 9, 2014Micron Technology, Inc.Ruthenium for a dielectric containing a lanthanideUS8921914Aug 5, 2013Dec 30, 2014Micron Technology, Inc.Devices with nanocrystals and methods of formationUS8951903Feb 3, 2012Feb 10, 2015Micron Technology, Inc.Graded dielectric structuresUS20040004247 *Jul 8, 2002Jan 8, 2004Micron Technology, Inc.Memory utilizing oxide-nitride nanolaminatesUS20060008966 *Aug 31, 2005Jan 12, 2006Micron Technology, Inc.Memory utilizing oxide-conductor nanolaminatesUS20060240626 *Jun 28, 2006Oct 26, 2006Micron Technology, Inc.Write once read only memory employing charge trapping in insulatorsUS20060258097 *Jul 25, 2006Nov 16, 2006Micron Technology, Inc.Memory utilizing oxide-nitride nanolaminatesUS20060284246 *Jul 20, 2006Dec 21, 2006Micron Technology, Inc.Memory utilizing oxide nanolaminatesUS20080032475 *Aug 2, 2006Feb 7, 2008Spansion LlcMemory cell system with gradient charge isolationUS20090174010 *Jan 3, 2008Jul 9, 2009International Business Machines CorporationSram device structure including same band gap transistors having gate stacks with high-k dielectrics and same work functionUS20090290416 *May 4, 2009Nov 26, 2009Kabushiki Kaisha ToshibaNonvolatile semiconductor memory deviceUS20100197095 *Feb 3, 2009Aug 5, 2010John Mark MeldrimMethods Of Forming Memory Cells* Cited by examinerClassifications U.S. Classification257/316, 257/E29.306, 257/E27.103, 257/324, 257/325, 257/321, 257/317International ClassificationH01L29/423, H01L29/788, G11C11/56, H01L27/115, G11C16/04Cooperative ClassificationH01L29/7885, H01L27/115, G11C11/5671, G11C16/0416, H01L29/42332European ClassificationH01L29/423D2B2C, H01L29/788B6B, H01L27/115, G11C11/56MLegal EventsDateCodeEventDescriptionJul 8, 2002ASAssignmentOwner name: MICRON TECHNOLOGY, INC., IDAHOFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:FORBES, LEONARD;AHN, KIE Y.;REEL/FRAME:013104/0061;SIGNING DATES FROM 20020624 TO 20020627Aug 7, 2007CCCertificate of correctionOct 20, 2010FPAYFee paymentYear of fee payment: 4Oct 22, 2014FPAYFee paymentYear of fee payment: 8May 12, 2016ASAssignmentOwner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENFree format text: SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038669/0001Effective date: 20160426Jun 2, 2016ASAssignmentOwner name: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERALFree format text: PATENT SECURITY AGREEMENT;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038954/0001Effective date: 20160426RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services