Source: http://www.google.com/patents/US5755744?dq=patent:5992892
Timestamp: 2017-11-22 14:13:44
Document Index: 599479790

Matched Legal Cases: ['ART 240', 'ART 240', 'ART 240', 'ART 240', 'ART1', 'ARTs 244', 'ARTs 244', 'ART 240', 'ARTs 244', 'ART 244', 'ART 246']

Patent US5755744 - Electro-convulsive therapy (ECT) system with enhanced safety features - Google Patents
An electro-convulsive therapy (ECT) system includes both hardware and software safety detectors and monitors, including a pulse generator that generates a pulse train of a plurality of pulses with parameters specified by the user. The safety monitors monitor these user-specified parameters as well as...http://www.google.com/patents/US5755744?utm_source=gb-gplus-sharePatent US5755744 - Electro-convulsive therapy (ECT) system with enhanced safety features
Publication number US5755744 A
Application number US 08/934,238
Also published as CA2190901A1, US6014587
Publication number 08934238, 934238, US 5755744 A, US 5755744A, US-A-5755744, US5755744 A, US5755744A
Patent Citations (12), Non-Patent Citations (22), Referenced by (37), Classifications (8), Legal Events (4)
US 5755744 A
An electro-convulsive therapy (ECT) system includes both hardware and software safety detectors and monitors, including a pulse generator that generates a pulse train of a plurality of pulses with parameters specified by the user. The safety monitors monitor these user-specified parameters as well as other important pulse parameters both during treatment of a patient and prior to treatment in order to ensure that the system is operating according to specification and, therefore, will not injure the patient. The pulse generator is responsive to the safety monitors in that if any of the safety detectors detect a parameter that is out of tolerance, the safety monitor disables the pulse generator so that no further pulses are delivered to the patient. The safety detectors detect plurality of pulse characteristics including pulse width, frequency, voltage, current, treatment duration, as well as energy. In addition to these real time safety checks, the system includes a pre-treatment arming routine that applies a pre-treatment ECT pulse train to an internal load and monitors these same parameters during this internal test. If all of these parameters are within tolerance, the system moves to an armed state in which the user can proceed to apply an ECT treatment pulse train. If any one of these safety checks fails, however, the system does not arm and, therefore, prohibits treatment.
1. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) by automatic self test and operation of ECT apparatus, the method comprising:
applying a pre-treatment pulse train to a dummy load including a plurality of individual pre-treatment pulses, each pre-treatment pulse having pulse parameters that define the pulse, the pulse parameters defining a set of pulse train parameters;
measuring a pulse train parameter of the pre-treatment pulse train across the dummy load; and
applying a treatment pulse train to the patient only if the measured pulse train parameter satisfies a predetermined criteria; and
disabling the apparatus from applying the treatment pulse train to the patient if the measured pulse train parameter fails the predetermined criteria.
2. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 1 wherein the step of measuring a pulse train parameter includes the step of measuring a pulse width of a pre-treatment pulse.
3. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 1 wherein the step of measuring a pulse train parameter includes the step of measuring a frequency of the pre-treatment pulse train.
4. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 1 wherein the step of measuring a pulse train parameter includes the step of measuring a duration of the pre-treatment pulse train.
5. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 1 wherein the step of measuring a pulse train parameter includes the step of measuring a power of the pre-treatment pulses.
6. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 5 wherein the step of measuring a power of pre-treatment pulses includes:
measuring a voltage of a pre-treatment pulse;
measuring a current of the pre-treatment pulse; and
multiplying the measured current and the measured voltage to produce the measured power.
7. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 6 wherein the step of measuring a pulse train parameter includes the step of measuring an energy of the pre-treatment pulse train.
8. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 7 wherein the step of measuring an energy of the pre-treatment pulse train includes integrating the measured power.
9. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 8 wherein the step of integrating the measured power includes:
converting the measured power to a power signal having a frequency proportional to the measured power; and
incrementing a counter by the power signal to produce a count signal that is proportional to the measured energy.
10. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 1 further comprising:
applying a train of treatment pulses to a patient;
11. A method of ensuring the safety of a patient during electro-convulsive therapy (ECT) according to claim 10 wherein the step of measuring a pulse train parameter includes the step of measuring a pulse width of the treatment pulses.
12. A method according to claim 10 in which each treatment pulse has a pulse width, the elapsed time of the pulse train defines a pulse train duration, and the time between adjacent pulses defines a frequency of the treatment pulse train;
the measuring step includes a pulse width detection step that measures the pulse width of each applied ECT treatment pulse; and
the terminating step includes a pulse width monitoring step responsive to the pulse width to cease applying the treatment pulses to the patient if a measured pulse width exceeds a predetermined maximum pulse width.
13. A method according to claim 10 in which each treatment pulse has a pulse width, the elapsed time of the pulse train defines a pulse train duration, and the time between adjacent pulses defines a frequency of the treatment pulse train;
the measuring step includes a pulse train duration detection step that measures the duration of the applied ECT treatment pulse train; and
the terminating step includes a pulse train duration monitoring step responsive to the pulse train duration to cease applying the treatment pulses to the patient if the measured pulse train duration exceeds a maximum pulse train duration.
14. A method according to claim 10 in which each treatment pulse has a pulse width, the elapsed time of the pulse train defines a pulse train duration, and the time between adjacent pulses defines a frequency of the treatment pulse train;
the measuring step includes a pulse train energy detection step that measures the energy in the applied ECT treatment pulse train; and
the terminating step includes a pulse train energy monitoring step responsive to the pulse train energy to cease applying the treatment pulses to the patient if the measured pulse train energy exceeds a predetermined limit.
15. A method according claim 14 wherein the step of pulse train energy detection includes:
a power detection step that generates a power signal having a signal level corresponding to the power of each applied ECT treatment pulse; and
an integration step receiving the power signal and generating an energy signal corresponding to the level of energy of the applied ECT treatment pulse train.
This is a continuation of application Ser. No. 08/562,336, filed Nov. 24, 1995 now abandoned.
Among those who were impressed by the early successes of pentylenetetrazolinduced seizures was the Italian neuropsychiatrist, Cerletti, who was at that time heavily involved in epilepsy research, using electrical stimulation to produce seizures in animals. Believing that therapeutic seizures in humans could be produced more easily and in a manner more tolerable to patients, Cerletti and his colleague, Bini, attempted to use their techniques clinically in 1937. The success of their initial report of such use in 1938 was heralded by psychiatrists as a significant improvement in the form of convulsive technique, and within one or two years had spread into clinical practice on a worldwide basis.
FIGS.11A and 11B are block diagrams of the delivery means and hardware safety monitors of the system shown in FIG. 1.
C. PATIENT MONITORING SECTION (FIGS. 3A-3B)
I. SAFETY MONITORING SECTIONS (FIGS. 11A, 11B, 12A, 12B, 13)
B. OPTICAL MOTION SENSOR (FIG. 15)
Referring now to FIG. 2, a more detailed schematic of the system processor is shown. The system processor in the preferred embodiments is an 80386(386) microprocessor manufactured by either Intel or Advanced Micro Devices. The organization shown in FIG. 2 is a typical organization employed in, for example, personal computers, in order to take advantage of the numerous components that have been designed for 386-based systems. The 386 microprocessor includes an address bus ADDR, a data bus DATA, and a control bus CNTL. These buses are coupled directly to an interface chip 74 which generates the signals necessary for the 386 to communicate with the other components in the system. The interface chip 74 can either be a standard off-the-shelf part that is sold by a variety of manufacturers such as Chips and Technology or, alternatively, can be an application specific integrated circuit (ASIC), which can then be manufactured by any number of semiconductor companies.
The output of the clamp is connected to a first input of switch S3 while the second input is connected to a reference voltage VREF2. The state of switch S3 is controlled by the signal appearing on line 106. This signal switches the switch between the output of the clamp and the reference voltage under one of two conditions. First, where the output voltage of integrator 116 exceeds a predetermined maximum limit, (which occurs when one or both of the inputs 13A or 13B are unhooked from the patient, or when the DC offset of the signal between inputs 13A and 13B is too large for the channel to handle properly) the switch S3 is switched to the reference voltage VREF2. This forces the channel output REEG1 to a known level near, but not at, the limit of its dynamic range. No patient signal could produce such a (sustained) output. System processor 38 recognizes this condition as a channel error condition. Second, the switch S3 can be switched to the reference voltage during the module ID test mode when module ID 156 is asserted. Logic circuit 108 is the circuit that asserts the signal on line 106 responsive to either of these two conditions being satisfied. One of ordinary skill in the art can readily design circuit 108 to switch S3 during either of these two conditions. The standard patient monitoring section (module) can have the aforementioned set of four signal channels present (though some channels can be disabled when not purchased as a fully-equipped option). All of these modules will have a specified voltage for VREF2. Optional modules with different channel specifications can use a different voltage for VREF2. The system processor 38 can distinguish module type by reading the reference voltage.
The input circuitry for the other two patient monitoring signals is substantially identical and therefore not described further. Note, however, that the patient monitoring signals (EEGI, ECG, and EEG2) are merely illustrative and are not limited to those shown. Moreover, the number of signals monitored is not limited to the number shown. Finally, those skilled in the art will be familiar with methods to add a driven reference output responsive to the common mode content of inputs 13A and 13B, or 15A and 15B, or 14A and 14B, to be connected to the patient to reduce common mode signal errors. While beneficial, such a scheme is not required for satisfactory operation.
FIG. 3B shows the input section for an optical motion sensor 122 (which produces a patient monitoring signal OMS shown in FIG. 1A). The optical motion sensor 122 uses a photoelectric technique to detect seizure activity in the patient. Standard pulse sensors, such as provided by UFI of Morro Bay, Calif. can be used to detect this motion. Pulse sensors have been used in the past to detect blood flow by placing the pulse sensor on the underside of a patient's digit, such as their index finger or toe. According to the invention, however, the pulse sensor is placed on the top (i.e., "nail") side of the patient's finger or toe proximate to the joint so that the motion detector detects movement of the joint due to flexing during seizures, while not detecting very much movement due to blood flow.
The motion sensor is coupled to the input section via a connector 124. The connector includes three terminals, two for providing power and ground and one for receiving the signal (OMS) from the motion sensor. The input section provides a 3.6 volt supply voltage VEE over pin 126, ground via pin 128, and receives the motion sensor signal over pin 130. The motion sensor produces an output voltage by the voltage divider action of resistor R3 and photoresistor R2. As the resistance of R2 is modulated by flexing of the patient's knuckle, the voltage of 130 also varies. This signal voltage is provided to one of the inputs of switch S4. Switch S4, like switch SI described above, is a two-position switch that switches between the input patient monitoring signal and a known reference voltage, in this case, VREF1. The output of switch S4 is connected to summing circuit 132 which sums the input signal from the motion sensor with the calibration signal CAL TEST on line 92. The output of summing circuit 132 is provided to a summing circuit 134 along with the output signal of an inverting integrator 136, which along with low pass filter 138, amplifier 140, and clamp 142, form a bandpass filter, as in the other circuits described above. The integrator 136 also includes two inputs: one connected to the output of clamp 142 and the other connected to line 120 to receive the TRACE RESTORE signal.
In international product applications, the line frequency depends upon the country. If no sample of the line frequency is available, such as in low cost equipment, it would be most desirable to use an adaptive filter which determines the line frequency and then cancels the interference. Preferably, this filter should be a FIR filter in order to not disturb the desired signals'phase properties. The traditional LMS algorithm may be used to develop a filter capable of identifying the line frequency interference and rejecting it. The following description describes such an implementation according to the invention.
EST=A×cos (phase)+B ×sin (phase)               (2)
where A, B and Δ are parameters to be adjusted at each iteration
err=diff.sub.2                                             (4)
We want to minimize the err function with respect to A, B, and phase. The gradient of err produces a vector in the direction of maximum increase, i.e.: ##EQU1## Where a, b and δ are unit vectors for the respective variables. We then apply a small amount of the negative of this gradient vector to the Current coordinate values (A, B and Δ). Thus, the three variables are related as follows:
a·A+b·B+δΔ-=β×grad (err)(6)
A-=β×diff×cos (phase)                     (7)
B-=β×diff×sin (phase)                     (8)
Δ-=×diff× i B×cos (phase)-A×sin (phase)!(9)
F=Δ·F.sub.s /CPC,
where Fs is equal to the sampling frequency of the filter (in this case the A-to-D converter) and CPC is equal to the number of counts per cycle. In the preferred embodiment s equal to 1536 Hz and CPC is equal to 65536. This latter value was chosen so that a range of CPCs of 0 to 65536 would correspond to an angle of 0 to 2π radians.
Acos (phase)+Bsin (phase)=αcos (phase-offset)
where α=(A2 +B2)1/2 and offset =arctan(B/A).
In step 202, a new data sample is read from the A-to-D converter by the digital signal processor. Next, the frequency, phase and amplitude of the signal is estimated in 204. These three parameters are estimated based on the formulas given above. An error (err) is calculated in 206 according to the formula (4) above. Finally, the frequency phase and amplitude are adjusted in 208 by recalculating the parameters (A,B,Δ) according to the formulas (7-9) shown above. This sequence is repeated for each data sample. A C++ implementation of a filter based on these principles is shown in Appendix A.
Referring now to FIG. 7, a more detailed schematic diagram of the LCD display section is shown. In addition, the two serial ports (SERIAL2, SERIAL3) and a parallel port (PRINTER CONNECTOR) are shown. All of these components interface to the system processor over the AT-- BUS, which is provided over the back plane. A set of bidirectional buffers 212 are interposed between the AT data bus IODATA and the other components in FIG. 7. A logic block 214 is coupled to the AT address bus IOADDR and the AT control bus IOCNTL. The logic box 214 decodes the address on the address bus IOADDR responsive to the control signals on the 10 bus IOCNTL according to a predetermined memory map in which the components in FIG. 7 are mapped.
The LCD display section includes an LCD controller 216, which is an industry standard part. The LCD controller communicates with the system processor over DATA BUS 218. The system processor communicates with the LCD controller using the AT bus protocol, as is well known in the art.
Also shown in FIG. 7, is a UART 240 which is interposed between the system processor 38 and the safety processor 40 (FIG. 1A). The UART 240 provides a serial interface (SERIAL1) between the system and safety processors to allow communication there between. The UART 240 is another memory mapped peripheral on the AT-- BUS, as is the LCD controllers and others. The UART 240 therefore communicates with the system processor over DATA BUS 218 and is selected or enabled by appropriate signals being asserted by logic block 214 on UART bus (UART1-- BUS) 242.
The other two serial polls (SERIAL2, SERIAL3) are also shown in FIG. 7. Two additional UARTs 244, 246 provide these two serial interfaces. The UARTs 244,246 communicate with the system processor in a conventional manner over the AT-- BUS as does UART 240. The UARTs 244 and 246 are isolated optically from external RS-232 interfaces 248 and 250 by opto-isolators 252 and 254, respectively. The UART 244 is used to provide digital patient information to an external peripheral over a standard RS-232 connection. The other UART 246 is used to provide miscellaneous other data that can be monitored and/or stored on a computer or peripheral.
Also shown in FIG. 8 is a timer and non-volatile RAM (NVRAM) circuit 280, which is also coupled to the AT-- BUS. The timer and NVRAM circuit 280 are mapped into the system processor's memory space, as is the keyboard controller 276. A logic block 282 decodes the address and control signals provided on the AT-- BUS and enables the timer and NVRAM circuit accordingly. In this way, the system processor can communicate to and front the timer and NVRAM circuit over the AT-- BUS. The logic block 282 includes a set of latches which latch an address provided on the AT data bus IODATA and provide this address (TADDR) to the timer NVRAM circuit over a dedicated address bus 284. The timer and NVRAM circuit 280 then provides the data corresponding to this address on the AT data bus IODATA responsive to control signals received on the timer and NVRAM control bus 286. In the preferred embodiment, the timer and NVRAM circuit includes a DS1386 part manufactured by Dallas Semiconductor.
H. DIGITAL-TO-ANALOG CONVERTER SECTION (FIGS. 9-10) Referring now to FIG. 9, a detailed block diagram of the digital-to-analog (D-to-A) converter section is shown. As described above, the digital signal processor 42 provides its filtered and decimated data to the isolated data output section 60 so that the patient monitoring signals can be displayed or captured by an external device. This data is provided over a synchronous serial port 288. Coupled to the serial port 288 is a synchronous serial interface circuit 290 that receives the serial data from the digital signal processor. An output bus 291 is coupled between the synchronous serial interface and a serial to D-to-A interface circuit 292. The bus 291 includes the standard transmit and receive signals that comprise a serial interface. The circuit 292 converts the serial inputs to a format required by the D-to-A converter 66. The D-to-A converter 66 is optically isolated from the circuit 292 by an opto-isolator circuit 294, which is known in the art.
The circuit shown in FIG. 10, however, is repeated for each of the outputs of the D-to-A converter. In the preferred embodiment, there are eight analog outputs, i.e., N = 8.
1. SAFETY MONITORING SECTIONS (FIGS. 11-13)
The output of the max frequency limiter 300 is connected to a max pulse width limiter circuit 306. The limiter circuit 306, as limiter 300 did for frequency, limits the pulse width of the pulses passed on to the ECT driver circuits to a predetermined maximum pulse width. If the pulse width of PULSE-- IN exceeds the maximum pulse width, limiter 306 limits the pulse width to the maximum predetermined pulse width. This limiter 306 in the preferred embodiment is also implemented using a one shot, e.g., 14538, but in a non-retriggerable mode. The maximum pulse width is set by the RC time constant of the one shot. The inverted output of the one shot is connected to the negative edge trigger input of the one shot (-T) to prevent retriggering, and the reset input (R) is connected to input 298 to receive the input PULSE-- IN. When the width of PULSE-- IN is less than the timeout period of one shot 306, the normal case, the latter connection causes the width of pulse passed on to the ECT driver circuits to be equal to the pulse width of PULSE13 IN.
The first output of the analog MUX OUT1 is connected to the non-inverting input of amplifier 320. Similarly, the second output OUT2 is connected to the non-inverting input of amplifier 322. The inverting inputs of both amplifiers 320 and 322 are connected to the emitters of output transistors Q1 and Q2. The outputs of amplifiers 320 and 322 are connected to drive output transistors Q1 and Q2, respectively by means of power MOSFET transistor drivers (not shown) one connected to the base of Q1 and another to the base of Q2 in the darlington configuration. Power is provided to both amplifiers 320 and 322 from a 20 volt regulator 324 through a switch S10. The switch S10 provides either the 20 volt supply voltage to the amplifiers on line 328 or a ground signal depending upon the state of switch S10, which is controlled by logic gate 326. Thus, logic gate 326 can remove power from the output amplifiers depending upon the state of its inputs. This is a safety feature, which is described further below.
Referring to FIG. 11A, the three outputs (+,-, and POWER) are connected to the center-tapped primary winding of transformer T1. Transformer T1 is a step up transformer so that the voltage across the secondary winding (FIG. 11B) is equal to the turns ratio times the voltage across the primary. The current in the secondary, on the other hand, is reduced by the turns ratio. In the preferred embodiment, the turns ratio is equal to 16.6:1.
The relay R1 is used to switch a dummy load R7 into and out of the circuit of the secondary winding of T1. When the relay is in the position shown in FIG. 11 B, the dummy load is switched into the circuit and when the relay is in its other position, the dummy load is taken out of the circuit and the winding is connected to the paddles 334 and 336. The state of the relay is controlled by a logic gate 338 whose output is connected to the coil of the relay via line 340. The logic gate 338 includes two inputs 342 and 344 for receiving a hardware shutdown signal HW-- SD (FIG. 12B) and a control signal CNTL2 (FIG. 12A). The logic gate 338 switches from the dummy load to the patient, i.e., the paddles, if the control signal CNTL2 is asserted and the hardware shutdown signal HW-- SD is not asserted. This provides the system with the ability to shunt the pulse to a dummy load under software control as indicated by the assertion of the control signal CNTL2, which is under control of the safety processor. The control signal CNTL2 allows the system to perform an internal self-test in which a pre-treatment pulse train is applied to the dummy load and the characteristics of the pulses are then examined by the safety hardware and the system rendered inoperable if any of these safety tests fail.
The safety monitoring section also includes a second relay R2 (FIG. 11B), which is used to either short out, or leave unshunted, a 10 K ohm resistor R8 in the output circuit under certain test conditions. This 10 K ohm load is shorted by R2, thus effectively shorting the secondary winding of transformer T1 when a control signal CNTL3 is asserted. This control signal is applied to the coil of relay R2 via input 346. The 10 K resistor and relay R2 are used during the self-tests of the instrument's ability to measure static impedances at zero ohms and 110 K ohms.
The circuit also includes another transformer T3, which is used to measure the current through the output circuit of TI. The transformer T3 is a (voltage) step up transformer whose secondary is coupled to a current monitoring circuit 364 which measures the current through the output circuit. This measured current signal DELIV-- I is then provided to the safety processor on output 366.
The paddles 334 and 336 are part of an optional remote control package that allows the user to initiate an ECT treatment from the paddles. Otherwise, the user can only initiate a treatment from the front panel start treatment switch. One of the paddles includes a two-stage switch represented by switches S11 and S12 in FIG. 11B. The first switch S11 initiates a pre-treatment test sequence. Actuation of switch 11 is detected by measuring the current through the optional remote control unit. This is accomplished by switching different resistances into the circuit according to which switch is actuated. Switch S11 is normally open, as indicated in FIG.11B. In addition, switch S12 is normally in the position shown. In this default state, a circuit is formed with resistors R9 and R10 across which a voltage is supplied by remote control power supply 400. The current supplied by the power supply 400 is detected by a current monitoring circuit 402 which is coupled to the power supply 400 by a transformer T4. The current monitor 402 produces a signal RC-- SENSE, which is proportional to the measured current supplied by the power supply 400. This signal RC-- SENSE is provided to a threshold detector 404, which compares the current level of the signal RC13 SENSE to determine whether the current level exceeds a predetermined amount. If insufficient current is detected, the circuit 404 assumes that the remote control unit is not connected. If the circuit, however, detects this minimum current level, then the circuit 404 switches the state of switches S13, S14 and S15 so as to disable the front panel switch S16, which is also used to initiate a treatment sequence.
The OR gate 428 also includes another input for receiving a timer expired signal TIMER-- EXPIRED on line 432. This signal is generated by a ten-second timer 434, which asserts the signal any time the timer exceeds ten seconds without being reset. The timer 434 includes a clock input that is driven by a 186 Hz oscillator 436, which produces a clock signal on line 438. This clock signal is gated by logic gate 440, which allows the clock signal to pass through to the clock input of the timer as long as the hardware shutdown signal HW-- SD is not asserted. If the hardware shutdown signal HW-- SD is asserted, logic gate 440 blocks the clock signal. This prevents the timer 434 from being incremented following a hardware shutdown. This further allows the system to determine what was the cause of the hardware shutdown, e.g., expiration of timer 434. The reset input of the timer 434 is driven by a logic block 442 that has two inputs: a first input coupled to an Output of one shot 422; and a second input coupled to input 298 to receive the signal PULSE-- IN. As described above, the PULSE-- IN signal is asserted during each pulse. The one shot 422, on the other hand, produces an output signal on line 444 at the end of each ECT pulse train responsive to a reset signal RESET on input 446. The logic block 442 contains a latch (not shown) which holds a reset signal on line 448 until that latched reset is removed by the first pulse in an ECT pulse train. The timer 434 then runs from that point. The timer 434 continues to run until the conclusion of the treatment. If a fault occurs which allows the treatment duration to exceed ten seconds, the timer will expire thereby producing a hardware shutdown. Thus, timer 434 is a pulse train duration detector that prohibits or disables further treatment if the ECT pulse train duration exceeds the ten second maximum duration. As a safety feature, one shot 422 is prevented from resetting counter 434 during a patient treatment by gate 418, which holds one shot 422 in reset during the treatment.
The system also includes a watchdog timer 450 that has a reset input coupled to input 452 for receiving a watchdog reset signal WD-- RESET and a clock input coupled to input 454 for receiving a watchdog clock signal WD-- CLK from the safety processor. The watchdog timer 450 includes an output that is coupled to line 456 that is connected to output 458 and to one of the inputs of gate 428. The watchdog timer 450 produces a watchdog failure signal WD-- FAILURE if the watchdog timer 450 is not clocked within a predetermined time following the last clock signal WD13 CLK. The watchdog timer therefore causes a hardware shutdown if the watchdog timer 450 is not clocked within this time period.
The watchdog timer ensures that the safety processor is functioning properly. The safety processor includes a routine that is invoked periodically. Under control of that routine, the safety processor repeatedly clocks the watchdog timer. Thus, if the watchdog timer is not clocked, it means that the safety processor has failed to execute this routine as it was suppose to. The system therefore disables further treatment in that case. WD-- RESET on 452 is activated at power up of the instrument, and for any other condition that would cause a reset of the system processor, e.g., logic supply voltage being too low.
A. TEST SEQUENCING (FIG. 14) The heart of the Applicant's invention is the advanced safety feature set included in the ECT apparatus. These safety features include both hardware and software safety detectors and monitors. Safety tests are performed during both pretreatment and treatment. This level of redundancy and frequency provides patient safety heretofore not found in ECT apparatus. The operation of these safety tests is now discussed.
The safety processor also checks the voltage level of the power supply voltages during this disarmed state. The safety processor samples the 33 volt, the-5 volt, the -12 volt and the 18 volt supply voltages and ensures that these voltages are within their specified tolerances. If not, the safety processor indicates an error condition exists. (Moreover, hardware voltage monitoring circuits will hold the system and safety processors in reset if the+5 volt or+12 supplies are out of their acceptable ranges.)
If the arm button is actuated, the system will transition from the disarmed state and perform a plurality of ECT hardware tests in step 504. Each of these tests must be completed successfully in order to move to an arm state 506. If any failures occur, an error message is displayed in step 508, the system is disarmed in step 510 and the system returns to the disarmed state 502. A list of these ECT hardware tests is given below in Table 1 and a description of each follows.
TABLE 1______________________________________ECT Hardware Test______________________________________1. 10,000 ohm static impedance test and calibration2. zero ohm static impedance test and calibration3. current calibration4. 300 ohm load delivery test5. zero ohm load delivery test6. energy limit test7. hardware watchdog test8. pulse width limit test9. frequency limit test______________________________________
TABLE 2______________________________________Tests Performed During Treatment______________________________________     1. maximum energy test     2. average current test     3. relay test     4. pulse width test     5. frequency test     6. voltage test     7. current test     8. pulse count test     9. duration test______________________________________
The optical detector includes a light-emitting diode 532 and an optical detector such as a photoresistor 534. The light-emitting diode 532 emits light that is reflected off of the knuckle and detected by photoresistor 534. The photoresistor 534 then produces a patient monitoring signal OMS that is proportional to the intensity of the light received thereby. A 3.6 volt supply voltage (3.6 V) is applied to the LED 532 to provide power thereto. An ECT-induced seizure will be manifest by twitching flexions of the knuckle. This changes the amount of light received by the detector 534 responsive to the expansion and contraction of the muscle under the surface. Thus, the optical detector 528 can effectively be used to monitor ECT-induced seizure activity.
3 * Hewlett Packard Defibrillator, Model 43130A 1, pp. 2 4., 1985 1986.
4 Hewlett Packard Defibrillator, Model 43130A-1, pp. 2-4., 1985-1986.
5 * Mecta Domestic Instruction Manual, Rev. 9900 1008, pp. 1 13; 28 55; 60 74., 1985.
6 Mecta Domestic Instruction Manual, Rev. 9900-1008, pp. 1-13; 28-55; 60-74., 1985.
7 * Mecta Domestic Service Manual, Rev. 9900 0010, pp. 13 41., 1985.
8 Mecta Domestic Service Manual, Rev. 9900-0010, pp. 13-41., 1985.
9 * Microcomputers in Safety Technique, by H. Holscher and J. Rader, pp. 3 7, 8;3 11, 12;4 5,6; 4 15, 16 and 7 5, 6 (1984);.
10 Microcomputers in Safety Technique, by H. Holscher and J. Rader, pp. 3-7, 8;3-11, 12;4-5,6; 4-15, 16 and 7-5, 6 (1984);.
11 * Physio Control Corporation, Lifepak 9P, pp. 1 16 and 5 41, (1993).
12 * Physio Control Corporation, Lifepak 9P, pp. 1 16 and 5 41.
13 Physio-Control Corporation, Lifepak 9P, pp. 1-16 and 5-41, (1993).
14 Physio-Control Corporation, Lifepak 9P, pp. 1-16 and 5-41.
15 * Strong, Peter, Biophysical Measurements, pp. 104 105, 1970.
16 Strong, Peter, Biophysical Measurements, pp. 104-105, 1970.
17 * Swartz, Conrad M. and Abrams, Richard, ECT Instruction Manual, pp. 6 27; 40 51; 59 70 and Table 2, Jan., 1994.
18 Swartz, Conrad M. and Abrams, Richard, ECT Instruction Manual, pp. 6-27; 40-51; 59-70 and Table 2, Jan., 1994.
19 * Thymatron DGx, 3 pages, 1994.
20 * UFI Model 1020 PPG, 2 pages, Jul. 1985.
21 * Widrow, Bernard and Stearns, Samuel D., Adaptive Signal Processing, Chapter 6, pp. 99 101, 1985.
22 Widrow, Bernard and Stearns, Samuel D., Adaptive Signal Processing, Chapter 6, pp. 99-101, 1985.
US6487449 * May 23, 2000 Nov 26, 2002 Ge Medical Systems Information Technologies, Inc. Method and apparatus for reducing noise and detecting electrode faults in medical equipment
US6974420 Jul 22, 2002 Dec 13, 2005 Ge Medical Systems Information Technologies, Inc. Method and apparatus for reducing noise and detecting electrode faults in medical equipment
US8170682 * Oct 29, 2007 May 1, 2012 Second Sight Medical Products, Inc. Method and apparatus to provide safety checks for neural stimulation
US8712532 May 12, 2009 Apr 29, 2014 Mecta Corporation Method and apparatus for focusing electrical stimulation in the brain during electro-convulsive therapy
US20100296819 * Apr 23, 2009 Nov 25, 2010 Kahn Joseph M Optical Receivers and Communication Systems
EP1194094A1 * Jun 11, 1999 Apr 10, 2002 Cochlear Limited Stimulus output monitor and control circuit for electrical tissue stimulator
EP1194094A4 * Jun 11, 1999 Aug 4, 2004 Cochlear Ltd Stimulus output monitor and control circuit for electrical tissue stimulator
U.S. Classification 607/45, 607/72
International Classification A61N1/08, A61N1/38
Cooperative Classification A61N1/08, A61N1/38
European Classification A61N1/38, A61N1/08