Source: http://www.google.com/patents/US20020094034?dq=5,687,325
Timestamp: 2016-12-02 21:08:38
Document Index: 470179255

Matched Legal Cases: ['Application No.56', 'art 250', 'art 250', 'art 250', 'art 350', 'art 350', 'art 350']

Patent US20020094034 - Radio equipment and peripheral apparatus - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsRadio equipment for communicating digital data includes a clock modulation part for angular-modulation of a clock signal by a given modulation signal; and a data processing part processing the digital data based on the clock signal angular-modulated in the clock modulation part and producing angular-modulated...http://www.google.com/patents/US20020094034?utm_source=gb-gplus-sharePatent US20020094034 - Radio equipment and peripheral apparatusAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS20020094034 A1Publication typeApplicationApplication numberUS 09/436,832Publication dateJul 18, 2002Filing dateNov 9, 1999Priority dateMay 2, 1995Also published asUS5995552, US6483880Publication number09436832, 436832, US 2002/0094034 A1, US 2002/094034 A1, US 20020094034 A1, US 20020094034A1, US 2002094034 A1, US 2002094034A1, US-A1-20020094034, US-A1-2002094034, US2002/0094034A1, US2002/094034A1, US20020094034 A1, US20020094034A1, US2002094034 A1, US2002094034A1InventorsYukihiro MoriyamaOriginal AssigneeYukihiro MoriyamaExport CitationBiBTeX, EndNote, RefManReferenced by (62), Classifications (7), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetRadio equipment and peripheral apparatus
DESCRIPTION OF THE PREFERRED EMBODIMENTS [0086] First, a description will be given of a first principle of digital radio equipment according to the present invention, by referring to FIG. 3 to FIGS. 5A, 5B. FIG. 3 shows a block diagram for explaining the first principle of the digital radio equipment according to the present invention. [0087] Digital radio equipment 100 shown in FIG. 3 includes a transmission part and a reception part. The transmission part comprises a data processing circuit 2, a modulator 4, and a transmitting circuit 6. The reception part comprises a receiving circuit 8, a demodulator 10, and a data processing circuit 12. The data processing circuit 2 includes a speech CODEC 16 and a signal processing circuit 18. The data processing circuit 12 includes a signal processing circuit 20 and a speech CODEC 22. [0088] The digital radio equipment 100 further comprises a variable frequency clock oscillator 60 for supplying a timing clock to the speech CODECs 16, 22, a variable frequency clock oscillator 62 for supplying a DSP clock to the signal processing circuits 18, 22, and a variable frequency clock oscillator 64 for supplying a CPU clock to the CPU 14. These clocks may be directly provided from clock sources included in the oscillators or may be provided through dividers. [0089] The timing clocks provided to the speech CODECs 16, 22 determine a coding rate of a speech and a transmission rate of digital data. The DSP clocks provided to the signal processing circuits 18, 20 determine a signal processing speed. When the radio equipment 100 operates in a time division multiple (TDM) system, the signal processing circuits 18, 20 carry out a multiplying process and a time dividing process. Therefore, the DSP clocks may also determine the transmission rate of the digital data. [0090] The digital radio equipment 100 further comprises an oscillator 66 whose output is used for frequency-modulating the timing clock, the DSP clock, and the CPU clock of the variable frequency clock oscillators 60, 62, 64. [0091] In the following, an operation of the digital radio equipment 100 will be discussed. First, the respective clocks of the variable frequency clock oscillators 60, 62, 64 are frequency-modulated by the output of the oscillator 66. In the speech CODEC 16, based on the frequency-modulated timing clock produced in the variable frequency clock oscillator 60, a speech signal is converted to the digital data. Therefore, the digital data is also frequency-modulated data. In the signal processing circuit 18, the digital data is formatted in a form suitable for being transmitted. For example, when the radio equipment 100 operates in the TDM system, the digital data is distributed to TDM frames. When the modulation method is QPSK, the digital data is separated to an I (in-phase) channel signal and a Q (quadrature phase) channel signal. [0092] In the modulator 4, by the digital data which has been processed in the signal processing circuit 18, a first local signal is digitally modulated. For the digital modulation, phase modulation such as QPSK and frequency modulation such as GMSK are usable. An output signal of the modulator 4 is converted to a radio signal by the transmitting circuit 6, and is transmitted through a filter 40 to an antenna 42. [0093] A radio signal which has come through the antenna 42 and the filter 40 is received in the receiving circuit 8, and is converted to an intermediate frequency signal. The intermediate frequency signal is demodulated in the demodulator 10 to reproduce digital data at a baseband frequency. The reproduced digital data is processed to digital data including a timing clock for the speech CODEC 22 in the signal processing circuit 20, and is converted to a speech signal in the speech CODEC 22. [0094] Next, a detail operation of the digital radio equipment 100 will be discussed by referring to FIGS. 4A, 4B, and FIGS. 5A, 5B. FIGS. 4A, 4B show spectra of the timing clock of the variable frequency clock oscillator 60 of the digital radio equipment according to the present invention. FIG. 4A shows a case in which the timing clock is not frequency-modulated, and FIG. 4B shows a case in which the timing clock is frequency-modulated. In those cases, a clock source included in the variable frequency clock oscillator 60 operates at fc=2.688 MHz, and the timing clock frequency provided to the speech CODECs 16, 18 is set to 11.2 kHz. FIGS. 5A, 5B show signal space diagrams (only first quadrant) for a demodulated signal of the digital radio equipment according to the present invention. FIG. 5A shows the case where the timing clock is not frequency-modulated, and FIG. 5B shows the case where the timing clock is frequency-modulated. [0095] In the case where the timing clock is not frequency-modulated, a large number of harmonics of the frequency fc are generated because the timing clock has rectangular shapes. For example, in a radio channel of 438.150 MHz, as shown in FIG. 4A, a 163-order harmonic is present in 438.144 MHz (fc×163), close to the radio channel. When the harmonic is added as interference to the receiving circuit 8, as shown in FIG. 5A, an input signal provided to the demodulator 10 has a large deviation from an ideal signal point. Therefore, in this case, by small noise, an error may easily occur. [0096] On the contrary, when the timing clock of the variable frequency clock oscillator 60 is frequency-modulated by the output signal (several kHz) of the oscillator 66 with a maximum frequency deviation of 1 kHz, the 163-order harmonic is frequency-modulated with a maximum frequency deviation of 163 kHz. Therefore, as shown in FIG. 4B, the frequency spectrum of the 163-order harmonic is widely spread, and the level of the 163-order harmonic is reduced. Accordingly, even when the level-reduced harmonic is added as interference to the receiving circuit 8, as shown in FIG. 5B, the deviation of the input signal provided to the demodulator 10 is reduced as compared to the case shown in FIG. 5A, and, thus, an error rate may also be reduced. [0097] In this way, by frequency-modulating the clock for generating the digital data with only small frequency deviation, energy of the harmonic of the clock is spread to a frequency determined by multiplying the frequency deviation with the number of the order of the harmonic. Therefore, the levels of the harmonics are reduced. As a result, the level of the interference to a received radio signal may be reduced, and error rate performance may be improved. Also, by this advantage, data transmission rate and digital processing speed may be further increased. [0098] It should be noted that in the radio equipment according to the present invention, the modulation method of the timing clock for generating the digital data is not limited to the frequency modulation, and various other angular modulation techniques including phase modulation are applicable. [0099] Next, a description will be given of a first embodiment of the radio equipment according to the present invention, by referring to FIG. 6. FIG. 6 shows a block diagram of the first embodiment of the digital radio equipment according to the present invention. Digital radio equipment 110 is one example of radio equipment communicating digital speech signals in the QPSK modulation and a time division multiple access (TDMA) system. The digital radio equipment 110 is mainly constructed with a baseband processing part for processing the digital data, a transmission part for modulating the radio signal by the digital data and transmitting the modulated signal, and a reception part for receiving and demodulating the radio signal. [0100] The baseband processing part includes a microphone 112, a speaker 114, CODEC 116, a TDMA processing circuit 118, and a modulation-and-demodulation processing circuit 120. [0101] The transmission part includes digital-to-analog converters 126, 128, low pass filters 130, 132, a quadrature modulator 134, a transmit amplifier 136, and a transmit antenna 138. In the transmission part, a direct modulation method is used, and a transmission carrier of a frequency synthesizer 140 is directly modulated by the baseband signal. It is noted that in the radio equipment according to the present invention, a conventional transmission method including frequency conversion is also applicable. [0102] The reception part includes a receive antenna 142, a receive amplifier 144, a mixer 146, an intermediate filter 148, a quadrature demodulator 150, low pass filters 152, 154, and analog-to-digital converters 156, 158. In the reception part, the received radio signal is mixed with a reception carrier of frequency synthesizer 164 in the mixer 146, and is converted to an intermediate frequency signal. Then, the intermediate frequency signal is demodulated. A demodulating section uses a coherent detection scheme, and includes a carrier recovery circuit 165 and a clock recovery circuit 166. The clock recovery circuit 166 is constructed such that the clock is directly recovered from the intermediate signal. However, a conventional clock recovery circuit where the clock is recovered from the detected signal is also usable. Further, the above-mentioned demodulating section may be constructed by also using a differential detection scheme. [0103] Next, an operation of the digital radio equipment 110 will be discussed. The CODEC 116 codes the speech signal from the microphone 12 based on a timing clock provided from a voltage-controlled crystal oscillator (VCXO) 170, and decodes coded data to an analog speech signal to transmit to the speaker 114. The TDMA processing circuit 118 converts the speech coded data generated in the CODEC 116 to digital data in a TDMA format and performs its reversal operation. These above-mentioned processes are carried out based on the DSP clock provided from the VCXO 172. [0104] In the modulation-and-demodulation circuit 120, the digital data generated in the TDMA processing circuit 118 is converted to a format suitable for the QPSK modulation, and detected data provided from the demodulating section is converted to serial digital data for transmission to the TDMA processing circuit 118. The processes in the modulation-and-demodulatior processing circuit 120 are carried out based on a DEMOD clock provided from the VCXO 174. The CPU 180 operates based on a CPU clock provided from the VCXO 182 and controls the above circuits. [0105] As mentioned above, the CODEC 116, the TDMA processing circuit 118, and the modulation-and-demodulation processing circuit 120 are directly related to generation, transmission, reception, and reproduction of the digital data, and are specific for the digital modulation-and-demodulation method. These circuits may commonly be constructed with a digital signal processor (DSP). [0106] In the digital radio equipment 110, the clocks, which are provided to the CODEC 116, the TDMA processing circuit 118, and the modulation-and-demodulation processing circuit 120, are frequency-modulated by a modulation signal of an oscillator 176. Therefore, in the same way, the digital data, which are generated or reproduced in the CODEC 116, the TDMA processing circuit 118, and the modulation-and-demodulation processing circuit 120, is also frequency-modulated. By the frequency modulation of the clocks, frequency spectrum of a harmonic generated in the clock for processing the digital data and frequency spectrum of a harmonic generated from a clock component included in the digital data are spread over a wide frequency range as disclosed in the description of the principle. Therefore, the levels of the harmonics are reduced, and also, the levels of the interference signals entering a receiving circuit such as a receive amplifier 144 and a mixer 146 are reduced. As a result, the level of the interference to the received radio signal may be reduced, and, thus, error rate performance may be improved. [0107] In this embodiment, though the CPU 180 is not directly related to reception and data reproduction, the CPU clock provided to the CPU 180 may be frequency-modulated by the modulation signal of the oscillator 176. In this case, the spectrum of harmonics generated from the CPU clock of the VCXO 182 are spread and the interference due to the harmonics may be reduced. [0108] Next, a method of reducing the interference generated in the clock recovery circuit 166 will be discussed. In the digital radio equipment 110, the timing clock for reproducing the baseband signal from the detected signal of the quadrature demodulator 150 is generated in the clock recovery circuit 166. Therefore, the clock recovery circuit 166 has a clock source for generating the timing clock. In fact, when harmonics generated from the recovered timing clock and an output of the clock source enter the receiving circuit, the harmonics may cause interference with the received radio signal. Since the demodulating section is located close to the receiving circuit, levels of the harmonics are relatively high. [0109] Accordingly, in the digital radio equipment 110, the clock source in the clock recovery circuit 166 is also frequency-modulated by the modulation signal of an oscillator 178. In this case, it is possible to frequency-modulate only the recovered timing clock. By that frequency modulation, in the same way as mentioned before, interference due to high-order harmonics from the clock source and the recovered timing clock may be reduced. [0110] In the digital radio equipment 110, the transmission part and the reception part are involved. However, the radio equipment according to the present invention may involve only one of the transmission part and the reception part. [0111] Next, a method of reducing influence of the frequency modulation will be discussed. When the respective clocks of the baseband processing part are frequency-modulated, the digital data, which are generated or reproduced in CODEC 116, the TDMA processing circuit 118, and the modulation-and-demodulation circuit 120, are also frequency-modulated. As a result, the digital data has a transmission rate deviation. When the digital data thus modulated is transmitted through the modulating section and the transmit amplifier 136, a transmission spectrum may be distorted. Further, in radio equipment receiving the transmitted signal, receiving performance may be degraded. [0112] Accordingly, in the digital radio equipment 110, to properly detect the frequency-modulated digital data in the reception part, a synchronization control circuit 190 is provided. From a transmission side of the radio signal, modulation information (frequency deviation and modulation frequency) of the digital data with the radio signal are transmitted to a reception side. In the reception side of the radio signal, by the synchronization control circuit 190, the demodulating process of the modulation-and-demodulation processing circuit 120 is carried out in synchronization with the modulation of the digital data. The synchronizing process may easily be performed by digital processing of the modulation-and-demodulation processing circuit 120. [0113] Further, in the transmission side, a synchronization signal (synchronization word), which is synchronized with phase and frequency of an oscillator generating a modulation signal, is transmitted as data to the reception side, and in the reception side, the synchronization word is analyzed. Based on a result of the analysis, phase and frequency of an oscillator generating a modulation signal in the reception side are controlled. The synchronization may also be achieved by modulating the clock of the baseband processing part at the same time. [0114] In the above-mentioned synchronizing method, even if the digital data involved in the received signal is frequency-modulated, an error due to the modulation may be prevented. [0115] Next, conditions for performing the frequency modulation will be discussed. [0116] A first condition is that the digital radio equipment 110 further comprises an interference detector 192 for detecting interference to the received signal. When one of the harmonics generated from the clocks in the baseband processing part and the clock recovery circuit 166 has a frequency close to the received radio signal, the harmonic can be detected as interference in the interference detector 192. In the digital radio equipment 110, when the interference is detected in the interference detector 192, the clocks of the baseband processing part and the clock recovery circuit 166 are frequency-modulated. On the other hand, when no interference is detected, the frequency modulation is not carried out. Therefore, when the harmonic frequency is spaced apart from the received radio signal and has no influence on detection in the receiving circuit, needless modulation may be prevented. [0117] The interference detection can be conventionally performed by analyzing deviation of the received signal points in the signal space diagram. For example, a method of comparing an input of the decision circuit with an output thereof, which is disclosed in Japanese Laid-Open Patent Application No.56-6556, is usable. Further, by also analyzing fluctuation of a control voltage of a variable frequency oscillator of the carrier recovery circuit, the interference can be detected. [0118] A second condition is that the CPU 180 in the digital radio equipment 110 has an interference channel table storing receive channels which may be subjected to interference by harmonics generated in the radio equipment. When one of the receive channels stored in the interference channel table is used, the clocks of the baseband processing part and the clock recovery circuit 166 are frequency-modulated. On the other hand, when no receive channel stored in the interference channel table is used, the frequency modulation is not carried out. Therefore, when the harmonic frequency is spaced apart from the received radio signal and has no influence on detection in the receiving circuit, needless modulation may be prevented. [0119] A third condition is that in the digital radio equipment 110, only when the radio signal is received, the clocks of the baseband processing part and the clocks recovery circuit 166 are frequency-modulated. On the other hand, when no radio-signal is received, the frequency modulation is not carried out. [0120] [0120]FIG. 7 shows an example of a TDMA frame format of a digital cellular communication system. In this system, when signals are successively transmitted from a base station to mobile stations MS3, MS1, MS2, signals from the mobile stations MS1, MS2, MS3 are received in the base station in that order. In the mobile station MS1, a transmission frame is not overlapped with a reception frame. An idle frame is used for hand-off sequence in the communication, etc. In this way, by frequency-modulating the clock only during the reception time period, the needless modulation may be prevented from being carried out when no radio signal is received. [0121] A fourth condition is that a time interval of the time division frame is given by integral multiples of a period of the modulation signal of the oscillator 176. FIG. 8 shows a relationship between the TDMA frame of the mobile station 1 shown in FIG. 7 and the modulation signals. In a first modulation signal, the time interval of one frame is given by twice the period of the modulation signal, and the clock is modulated over all frames. In a second modulation signal, the time interval of one frame is given by one time period of the modulation signal, and the clock is modulated only in the reception frames. In both examples, at start and end points of each frame, the deviation of the modulation is minimum, and, thus, the digital data has the conventional transmission rate at those points. [0122] At the inside of the frame, a pair of strong modulation and weak modulation are repeated. Therefore, on an average over the frame, the transmission rate is considered to be substantially constant. Namely, by synchronizing the modulation signal for modulating the digital data with the TDMA frame, no portion of the digital data in the frame is out of the frame, and, thus, a transmission amount in the frame may be maintained. Therefore, influence due to the modulation of the digital data may be reduced. [0123] Next, a description will be given of a second embodiment of the radio equipment according to the present invention, by referring to FIG. 9. FIG. 9 shows a block diagram of the second embodiment of the digital radio equipment according to the present invention. Digital radio equipment 111 has substantially the same configuration as that of the digital radio equipment 110 shown in FIG. 6. Therefore, the receiving circuit in the digital radio equipment 111 has the receive amplifier 144 and the receive mixer 146. The CPU 180 is operable based on the CPU clock which is frequency-modulated by the modulation signal of the low frequency oscillator 176. The data generated by the CPU clock is transmitted to the TDMA processing circuit 118 through the bus line. By frequency-modulating the CPU clock, the levels of the harmonics generated from the CPU clock may be reduced. [0124] In the digital radio equipment 111, more specifically, in the side of the TDMA processing circuit 118, the data which has come from the CPU 180 through the bus line is re-modulated by a modulation signal which is given by shifting the modulation signal from the oscillator 176 by 180 degrees. By the re-modulation, the modulated component in the data may be cancelled, and, thus, the modulated component is prevented from having an influence on digital processing in the TDMA processing circuit 118. In conventional radio equipment, the frequency deviation of the modulation was given such that the modulation had no influence on the digital processing. However, in the digital radio equipment 111 according to the present invention, even if large frequency deviation is set to the modulation, the influence on the digital processing due to the modulation may be reduced. Therefore, the levels of the harmonics of the clocks may further be reduced as compared to the conventional radio equipment in which the clock in a control circuit is merely modulated. [0125] [0125]FIG. 10 shows an example of modifications of the digital radio equipment 111 shown in FIG. 9. In digital radio equipment 111 a, the data through the bus line, which is generated in the CPU 180, is directly modulated by an angular modulator 198. The angular modulator 198 is a well-known circuit such as an Armstrong modulator, and is constructed with a phase shifter, a modulator, an integration circuit for integrating the modulation signal, and a combiner. [0126] From the angular modulator 198, angular-modulated CPU data is produced. By the angular modulation, the harmonics of the CPU data are spread. [0127] Further, in a receiving side of the data, the angular-modulated CPU data transmitted from the CPU 180 is re-modulated by an angular modulator 196 having the same configuration as the transmission side modulator. At this time, when the CPU data is modulated by the modulation signal shifted by 180 degrees, the modulated signal in the CPU data is cancelled in the angular modulator 196. Therefore, also in the digital radio equipment 111 a, large frequency deviation may be set to the modulation, and, thus, the levels of the harmonics of the clocks may be further reduced as compared to the conventional radio equipment in which the clock in the control circuit is merely modulated. [0128] The modulator 196 shown in FIG. 9 may have the same configuration as that of the modulator 196 shown in FIG. 10. [0129] Next, a description will be given of a first embodiment of a control apparatus according to the present invention, by referring to FIG. 11. FIG. 11 shows a system involving the first embodiment of the control apparatus according to the present invention. A control apparatus 900 of the first embodiment is connected to another control apparatus 910 through a transmission line located close to the radio equipment. Such a control apparatus may be a computer. The radio equipment may be a radio telephone, and radio equipment in the base station. The control apparatus 910 includes CPU 920 which is operable based on a CPU clock of VCXO 930. The CPU clock in the VCXO 930 is modulated by a modulation signal of a low frequency oscillator 940. Therefore, the data produced from the CPU 920 in the control apparatus includes modulation components. The data is transmitted to CPU or DSP 950 in the control apparatus 900 through the transmission line. [0130] The control apparatus 900 includes a 180-degree phase shifter 970 for shifting the modulation signal from the low frequency oscillator 940 in the control apparatus 910, and a modulator 960 for re-modulating the data passing through the transmission line. In the control apparatus 900, by the modulator 960, the frequency-modulated data transmitted through the transmission line is re-modulated by a modulation signal shifted by 180 degrees. By the re-modulation, the frequency-modulated components included in the data may be cancelled. [0131] Therefore, in the system having the apparatus 900 according to the present invention, interference influence on the process of the control apparatus 900 may be reduced. Further, since large frequency deviation can be set to the modulation of the clock, the levels of the harmonics of the clocks may further be reduced as compared to the conventional apparatus in which the clock in the control circuit is merely modulated. Accordingly, the harmonics are prevented from having an influence on the receiving circuit of the radio equipment. [0132] In the control apparatus 900 shown in FIG. 11, the modulator 960 and the 180-degree phase shifter 970 are not necessarily involved in the control apparatus 900, and may be individually constructed in connection with the control apparatus 900. [0133] Further, in FIG. 11, the output data of the CPU 920 may be directly modulated in the same modulation method (Armstrong modulation) as that shown in FIG. 10. The modulator 960 shown in FIG. 11 may have the same configuration as that of the angular modulator 196 shown in FIG. 10. [0134] Next, a description will be given of a second principle of the digital radio equipment according to the present invention, by referring to FIG. 12 and FIGS. 13A, 13B. FIG. 12 shows a block diagram for explaining the second principle of the digital radio equipment according to the present invention. [0135] Digital radio equipment 200 shown in FIG. 12 has substantially the same configuration as that of the digital radio equipment 100 shown in FIG. 3. Elements in FIG. 12 which are the same as those of FIG. 3 are given the same reference numerals. In the digital radio equipment 200, a divider 70 is provided instead of the variable frequency clock oscillators 60, 62, 64 shown in FIG. 3. Clocks generated by dividing a reference signal of a reference oscillator 26 are provided as the timing clock, the DSP clock, and the CPU clock. Other circuit configuration and operation are the same as those of the digital radio equipment 100 shown in FIG. 3. [0136] The reference signal of the reference oscillator 26 is conventionally used for stabilizing an oscillation frequency of the local oscillator 24. The local oscillator 24 is constructed with the frequency synthesizer using a phase-locked loop (PLL). The oscillation frequency of the frequency synthesizer is given by integral multiples of the frequency which is given by dividing the reference signal of the reference oscillator 26. The output signal of the local oscillator 24 is used as a carrier of the transmission radio signal and a carrier for receiving the radio signal. [0137] In the digital radio equipment 200, when the signals given by dividing the reference signal of the reference oscillator 26 are used as the clocks for the data processing circuits 2, 12 and the CPU 14, the clock frequency is given by one-integral multiples of the carrier frequency of the received radio signal. In this configuration, the higher-order harmonic frequency of the clock may be adjusted to one of the carrier frequencies of the received radio signal. [0138] For example, when frequency of the clock source (included in the divider 70) for the timing clock is set to 3.2 MHz and the reference oscillator 26 produces a 12.8-MHz reference signal, the output of the clock source may be given by dividing the reference signal by four. For a base signal of the frequency synthesizer, a 25-kHz signal given by dividing the reference signal by 512 is usable. In this case, a 137-order harmonic frequency of the 3.2-MHz clock source is 438.4 MHz, and this frequency is identical to one of carrier frequencies generated in the frequency synthesizer. [0139] [0139]FIGS. 13A, 13B show signal space diagrams for explaining an effect when the frequency of the interference is identical to the received signal frequency. FIG. 13A shows a case where there is a frequency difference between the interference and the received signal, and FIG. 13B shows a case where there is no frequency difference between the interference and the received signal. [0140] When there is a frequency difference between the interference and the received signal, as shown in FIG. 13A, a combined signal rotates about a signal point of the received signal. On the other hand, when there is no frequency difference between the interference and the received signal, as shown in FIG. 13B, the combined signal does not rotate about the signal point, but is merely phase shifted. In this case, for the QPSK modulation, four signal points are shifted in the same direction according to the level of the interference. Therefore, the received signal may be detected by shifting a phase of an input signal of the demodulator in the signal space diagram, or by shifting the decision level (for example, recovered carrier phases, namely I, Q axes). Namely, by adjusting the frequency of the interference to the frequency of the received signal, when the detection is carried out using the above mentioned phase shifting method, the influence due to the interference may be reduced. [0141] In the digital radio equipment 200 shown in FIG. 12, the reference signal of the reference oscillator 26 for the frequency synthesizer is used for the clocks provided to the data processing circuits 2, 12. In the equipment, another oscillator generating the same frequency signal may also be used. [0142] The second embodiment of the radio equipment is useful when a high precision clock signal is required and the clock signal may not be deviated at frequency by the modulation. Also, the level of lower-order harmonics is not sufficiently spread by the modulation. Therefore, this embodiment is useful also when the level of the lower-order harmonics is relatively large. [0143] Next, a description will be given of a third embodiment of the radio equipment according to the present invention, by referring to FIG. 14. FIG. 14 shows a block diagram of the third embodiment of the digital radio equipment according to the present invention. Digital radio equipment 210 has substantially the same configuration as that of the digital radio equipment 110 shown in FIG. 6. Therefore, elements in FIG. 12 which are the same as those of FIG. 6 are given the same reference numerals. The digital radio equipment 200 further comprises a divider 220 which is connected to a temperature compensation crystal oscillator (TCXO) 168 used as a reference oscillator of the frequency synthesizer 164. The divider 220 divides an output of the TCXO 168 and generates five clocks which are respectively provided to CODEC 116, the TDMA processing circuit 118, the modulation-and-demodulation processing circuit 120, the CPU 180, and an external output port of a connector 230. [0144] In such a configuration, in the same principle mentioned before, frequency of the high-order harmonics of the clocks may be adjusted to one of the carriers which are generated in the frequency synthesizer 164. Therefore, when the received signal is detected by using the phase shifting method in the demodulating section, influence due to the interference may be reduced. The phase shifting method may be performed by, for example, shifting the phase of the recovered carrier of the carrier recovery circuit 165. [0145] When through the digital radio equipment 210, data of a personal computer 240 is communicated with another computer connected to other radio equipment, harmonics generated from a clock source involved in a control part 250 of the personal computer 240 may interfere with the receiving circuit of the digital radio equipment 210. In this case, the clock 5 generated from the reference signal of the digital radio equipment 210 is provided as the clock source to the control part 250 of the personal computer 240 through the connector 230 and a connector 260. [0146] In this way, the frequency of the harmonics generated in the control part 250 of the personal computer 240 may be adjusted to the received signal frequency. Therefore, in this configuration, in the same way mentioned before, interference due to the harmonics generated from the personal computer 240 located close to the digital radio equipment 210 may be prevented from having an influence on the receiving circuit of the digital ratio equipment 210. [0147] Further, a signal of a reference oscillator involved in the peripheral apparatus such as a personal computer 240 can be provided within the digital radio equipment 210 and can be used as the signal of the TCXO 168. In this case, the same effect mentioned above may be obtained. [0148] Next, a description will be given of a fourth embodiment of the radio equipment according to the present invention, by referring to FIG. 15. FIG. 15 shows a block diagram of the fourth embodiment of the digital radio equipment according to the present invention. Digital radio equipment 300 has substantially the same configuration as that of the digital radio equipment 210 shown in FIG. 14. Therefore, elements in FIG. 15 which are the same as those of FIG. 14 are given the same reference numerals. The digital radio equipment 300 further comprises a divider 320 which is connected to the output of the carrier recovery circuit 165. The divider 320 divides the output of the carrier recovery circuit 165 and generates five clocks which are respectively provided to CODEC 116, the TDMA processing circuit 118, the modulation-and-demodulation processing circuit 120, the CPU 180, and an external output port of a connector 330. [0149] A carrier recovered in the demodulating section in the coherent detection method gives a reference phase for detecting the received signal. Therefore, when a signal given by dividing the recovered carrier is used as the clock, frequency and phase of the clock harmonics may be identical to those of the recovered carrier. Therefore, when the received signal is detected by offsetting the interference due to the harmonic, interference influence may be reduced. [0150] When through the digital radio equipment 300, data of a personal computer 340 is communicated with another computer connected to other radio equipment, harmonics generated from a clock source involved in a control part 350 of the personal computer 340 may interfere with the receiving circuit of the digital radio equipment 300. In this case, the clock 5 generated from the recovered carrier of the digital radio equipment 300 is provided as the clock source to the control part 350 of the personal computer 340 through the connector 330 and a connector 360. [0151] In this way, the phase of the harmonics generated in the control part 350 of the personal computer 340 may be adjusted to the reference phase of the demodulating section. Therefore, in this configuration, in the same way mentioned before, the interference due to the harmonic generated from the personal computer 340 located close to the digital radio equipment 300 may be prevented from having an influence on the receiving circuit of the digital radio equipment 300. [0152] Further, in the equipment, another oscillator generating a signal which has the same frequency as that of the recovered carrier may also be used to provide the signal to the divider 320. In this case, by the detection using the phase shifting method, influence due to the interference may be reduced. When the clock frequency in the peripheral apparatus such as personal computer 340 is set to the recovered carrier frequency in the radio equipment 300, the clock frequency can be provided to the digital radio equipment 300 and can be used as clocks for the internal circuits. In this case, the same effect mentioned above may be obtained. [0153] Next, a description will be given of a fifth embodiment of the radio equipment according to the present invention, by referring to FIG. 16. FIG. 16 shows a block diagram of the fifth embodiment of the digital radio equipment according to the present invention. Digital radio equipment 400 has substantially the same configuration as that of the digital radio equipment 110 shown in FIG. 6. Therefore, elements in FIG. 16 which are the same as those of FIG. 6 are given the same reference numerals. [0154] The digital radio equipment 400 further comprises an interference detector 410 detecting interference to the received signal. The interference detector 410 may have the same configuration as that of the interference detector 192 of the digital radio equipment 110. The digital radio equipment 400 has CPU 420 which receives an output of the interference detector 410 and controls frequencies of the variable frequency clock oscillators 170, 172, 174, and 182 so as to reduce the interference. In this case, the CPU 420 controls each clock frequency so as to phase synchronize the harmonic generated from the clock with the recovered carrier in the demodulating section. [0155] In such a control, the harmonic of the clock may be adjusted to have the same frequency and phase of the recovered carrier. Therefore, if the detection is carried out so as to offset the interference due to the harmonic, the interference is prevented from having an influence on the receiving circuit. [0156] Next, a description will be given of a third principle of the present invention. [0157] [0157]FIG. 17 shows a block diagram of a sixth embodiment of digital radio equipment according to the present invention. Digital radio equipment 500 has a variable frequency clock oscillator 502 as a timing clock oscillator, a data generation circuit 504 generating digital data based on the timing clock, a transmitting circuit 506 modulating a carrier by the digital data and transmitting the modulated signal, and a receiving circuit 508. The digital radio equipment 500 further comprises an interference channel table 510 for storing receiving channels which may be subjected to interference by harmonics of the timing clock and the digital data. [0158] In the digital radio equipment 500, when a communication channel is established, the interference channel table 510 is referenced by the control circuit 512. When the receiving channel to be used is in the table 510, the control circuit 512 changes the clock frequency of the variable frequency clock oscillator 502 to a given frequency. At this time, a transmission rate is also changed by the change of the clock frequency, and the harmonic frequency changes. Therefore, interference due to the harmonic is prevented from having an influence on the receiving circuit 508. [0159] In the above-mentioned operation, clock-frequency information is previously transmitted with the transmission data to an addressed party. Therefore, in the addressed party, the transmission data may be properly received without being influenced by the change of the transmission rate. [0160] [0160]FIG. 18 shows a block diagram of a seventh embodiment of digital radio equipment according to the present invention. Digital radio equipment 520 has substantially the same configuration as that of the digital radio equipment 510 shown in FIG. 17. The digital radio equipment 520 has a pair of oscillators 522, 524 whose clock frequencies are different from each other. Based on one of the clocks of the oscillators 522, 524, digital data is generated in the data generation circuit 504. The clock to be provided to the data generation circuit 504 is selected by a switch 526. [0161] In an operation of the digital radio equipment 520, when a communication channel is established, the interference channel table 510 is referenced by the control circuit 512. When the receiving channel to be used is in the table 510, the control circuit 512 controls the switch 526 and selects the other oscillator. At this time, a transmission rate is changed by the switching of the oscillator, and the harmonic frequency changes. Therefore, interference due to the harmonic is prevented from having an influence on the receiving circuit 508. [0162] In the above-mentioned operation, clock-frequency information is previously transmitted with the transmission data to an addressed party. Therefore, in the addressed party, the transmission data may be properly received without being influenced by the change of the transmission rate. [0163] Next, a description will be given of a fourth principle of the present invention. [0164] [0164]FIG. 19 shows a block diagram of a eighth embodiment of radio equipment according to the present invention. Radio equipment 600 has a transmitting circuit 602 and a receiving circuit 604. The radio equipment 600 further has an interference detector 606 detecting interference to a received signal, and a control circuit 608. The control circuit 608 operates based on a clock of a clock oscillator 610. In the radio equipment 600, the clock of the clock oscillator 610 is distributed to two clocks, one being inverted by a 180-degree phase shifter 612, and the other being amplitude adjusted by a level adjustment circuit 614. The two clocks are provided to the control circuit 608 in parallel. [0165] Harmonics of the clock of the clock oscillator 610 may have an influence on the receiving circuit 604 as interference. At this time, when the harmonics of the clock are combined with signals whose phases are opposite to those of the harmonics, the interference may be reduced. Further, by adjusting the amplitude of the harmonics and the signals, the interference further decreases. In the radio equipment 600, so as to reduce the interference detected in the interference detector 606, the amplitude of the clock of the clock oscillator 610 is adjusted in the level adjustment circuit 614. By this adjustment, the interference is prevented from having an effect on the receiving circuit 604. [0166] In the above-mentioned operation, when a line passing the 180-degree shifted (inverted) clock is arranged close to an in-phase clock line in parallel, the amplitude of the two clocks may be substantially the same, and, thus, the harmonics of the two clocks may easily cancel each other. Further, in the radio equipment 600, though the 180-degree shifted clock is connected to the control circuit 608, the clock does not need to be used in the control circuit 608. Therefore, there is no need for connecting the line of the 180-degree shifted clock to the control circuit 608. [0167] In the descriptions of the radio equipment according to the present invention, the angular modulation technology is not limited to frequency modulation as phase modulation technology is also usable. [0168] Further, the present invention is not limited to these embodiments, but other variations and modifications may be made without departing from the scope of the present invention. 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Classification375/271International ClassificationH04L27/20, H04B1/10, H04L27/18, H04B15/04Cooperative ClassificationH04B15/04European ClassificationH04B15/04Legal EventsDateCodeEventDescriptionApr 21, 2006FPAYFee paymentYear of fee payment: 4Jun 28, 2010REMIMaintenance fee reminder mailedNov 19, 2010LAPSLapse for failure to pay maintenance feesJan 11, 2011FPExpired due to failure to pay maintenance feeEffective date: 20101119RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services