Source: http://www.google.com/patents/US7290236?ie=ISO-8859-1&dq=Xerox+%2B+%22centroid
Timestamp: 2014-10-02 07:00:41
Document Index: 432700423

Matched Legal Cases: ['application No. 60', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30', 'ART 30']

Patent US7290236 - Configuration and/or reconfiguration of integrated circuit devices that ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsAn integrated circuit includes programmable logic circuitry and control circuitry that is operable to enable the integrated circuit to make a connection to an external source of data for configuring the programmable logic circuitry. The integrated circuit may include dedicated communications port circuitry...http://www.google.com/patents/US7290236?utm_source=gb-gplus-sharePatent US7290236 - Configuration and/or reconfiguration of integrated circuit devices that include programmable logic and microprocessor circuitryAdvanced Patent SearchPublication numberUS7290236 B1Publication typeGrantApplication numberUS 10/781,051Publication dateOct 30, 2007Filing dateFeb 17, 2004Priority dateJun 12, 2000Fee statusPaidAlso published asUS6738962Publication number10781051, 781051, US 7290236 B1, US 7290236B1, US-B1-7290236, US7290236 B1, US7290236B1InventorsEdward Flaherty, Mark DickinsonOriginal AssigneeAltera CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (19), Non-Patent Citations (4), Referenced by (3), Classifications (6), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetConfiguration and/or reconfiguration of integrated circuit devices that include programmable logic and microprocessor circuitryUS 7290236 B1Abstract An integrated circuit includes programmable logic circuitry and control circuitry that is operable to enable the integrated circuit to make a connection to an external source of data for configuring the programmable logic circuitry. The integrated circuit may include dedicated communications port circuitry that can be used in making the above-mentioned connection, or the programmable logic circuitry itself can be configured for operation as communications port circuitry for use in making the connection. The programmable logic circuitry may be configured any number of times.
CROSS REFERENCE TO RELATED APPLICATIONS This is a continuation of U.S. patent application Ser. No. 09/879,303, filed Jun. 12, 2001, now U.S. Pat. No. 6,738,962, which claims the benefit of U.S. provisional patent application No. 60/211,094, filed Jun. 12, 2000, which is hereby incorporated by reference herein in its entirety.
BACKGROUND OF THE INVENTION This invention relates to integrated circuit devices, and more particularly to integrated circuit devices that include both programmable logic and microprocessor circuitry or capabilities.
SUMMARY OF THE INVENTION In one aspect of the present invention, an integrated circuit includes programmable logic circuitry and circuitry configured to initiate a connection between the integrated circuit and an external source of data for configuring the programmable logic circuitry. The circuitry that is in addition to the programmable logic circuitry may include processor circuitry, external signaling circuitry, non-volatile memory circuitry, re-writable memory circuitry, and interconnection bus circuitry. In addition to other possible uses, some or all of the circuitry on the integrated circuit that is in addition to the programmable logic circuitry is typically used to control at least some aspects of configuration of the programmable logic circuitry. The same may additionally or alternatively be true for subsequent reconfiguration of the programmable logic circuitry, assuming that the programmable logic circuitry is reconfigurable. The programmable logic circuitry itself may be used as a temporary communications port for allowing the integrated circuit to receive the data that will later be used to further configure or reconfigure the programmable logic circuitry.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a simplified block diagram of an illustrative embodiment of circuitry constructed in accordance with the invention.
DETAILED DESCRIPTION An illustrative embodiment of an integrated circuit device (�IC�) 10 constructed in accordance with the invention is shown in FIG. 1. IC 10 includes microprocessor circuitry 20, universal asynchronous receiver/transmitter (�UART�) circuitry 30, programmable logic (�PLD�) circuitry 40, non-volatile memory circuitry 50, re-writable memory circuitry 60, and configuration interface circuitry 70. The various portions of the circuitry on IC 10 are interconnected by system bus circuitry 80 on the IC. Configuration interface circuitry 70 (which can be per se conventional circuitry for applying configuration data to PLD 40 in the form required to cause that data to configure the PLD) may have additional connections 90 to PLD 40 that are dedicated to applying PLD-configuring signals to the PLD.
It will be understood that FIG. 1 is quite simplified. For example, the details of each of circuit portions 20, 30, 40, 50, 60, 70, 80, and 90 are not shown because they can be individually well known to those skilled in the art. It may be helpful to mention, however, that although they are not shown separately in FIG. 1, input/output (�I/O�) pins are included on IC 10 for use in making connections to external circuitry. For example, such I/O pins may be connected more or less directly to system bus 80, and/or I/O pins may be provided as part of external signaling circuitry 30 and/or PLD 40. It will also be understood that certain of the elements shown in FIG. 1 as part of IC 10 may alternatively be provided in circuitry separate from IC 10. For example, non-volatile memory 50 may be provided on a separate integrated circuit device. However, at least most of the circuitry shown in FIG. 1 is preferably provided on IC 10. As still another illustration of variations within the scope of the invention, UART 30 is only one example of dedicated external signaling circuitry that can be provided on IC 10. If desired, UART 30 can be replaced by any other suitable communications port circuitry. As just one example of this, UART 30 can be replaced by per se conventional Ethernet media access controller (�MAC�) circuitry.
In very general terms, there are two ways that IC 10 can be configured and/or reconfigured in accordance with the invention. The first of these ways may be referred to as the �hard-logic� way. The second way may be referred to as the �soft-logic� way. The hard-logic way will be described first. Then the soft-logic way will be described.
In typical hard-logic mode operation, non-volatile memory 50 (whether on-board IC 10 as shown in FIG. 1 or separate from IC 10 as in one of the above-mentioned alternatives) stores the start-up or �boot� software required to at least initiate communication via UART 30. (As used herein, the term �software� refers not only to executable instructions, but also to data (e.g., data that some of the software instructions may need for execution or that some of the circuitry may need for desired operation). The term �data� may overlap with the term �software,� and it is not intended that these terms have rigorously, mutually exclusive meanings.) If desired, the boot software in memory 50 may additionally be sufficient to more extensively manage communication via UART 30 and to manage configuration of PLD 40. Assuming the more extensive boot software case, when IC 10 is started, the boot software from non-volatile memory 50 is loaded (as appropriate and via system bus 80) into any or all of processor or CPU 20, UART 30, and configuration interface 70. Under control of the boot software, UART 30 makes a connection to any suitable and desired source of PLD configuration data (and possibly other data and/or software as well). For example, this connection may be a relatively local and direct connection to one or more nearby devices and/or systems such as a memory device or a computer including a memory, or the connection may be a longer-distance modem-type connection via a telephone-type communication link to a more distant device or system. By way of further illustration, the connection made via UART 30 may be to an Internet website that will supply data for configuring PLD 40. Typically at least some addressing and/or switching is required to make the desired connection via UART 30. It is also typical that the connection made via UART 30 is to a selected one of any of several possible external data sources. Software and circuitry on IC 10 may be involved in making and/or effecting that selection.
After any desired data and/or software has been received via the UART 30 communications link, that link may be broken, or it may remain unbroken if desired. PLD 40 is configured using the PLD-configuring data that was received, and then �normal� (post-PLD-configuration) operation of IC 10 may begin. As still another alternative, during normal operation of IC 10, UART 30 may be used to provide one or more different communications links for use by or with the IC.
When reconfiguration is triggered, the above-described boot software is again read from non-volatile memory 50 and used as described earlier in connection with configuration to produce a reconfiguration of PLD 40. This may include causing UART 30 to again establish a communications link, or this step can be omitted if the desired communications link via UART 30 is still intact. Any of the various options described earlier in connection with configuration are again options during reconfiguration. In particular, earlier-described tasks ancillary to configuration of PLD 40 may also be performed in conjunction with reconfiguration. Examples of such ancillary tasks include PLD configuration data buffering, decompression, and/or decryption. After PLD 40 has been reconfigured, post-PLD-configuration (i.e., �normal�) operation of IC 10 may follow as described above in connection with initial configuration of the IC.
Turning now to the soft-logic mode of operating IC 10 to configure and/or reconfigure PLD 40, PLD 40 itself is preliminarily configured as a communications port for use as at least the primary means by which IC 10 receives data for producing a �final� configuration or reconfiguration of the PLD. (In this case �final configuration or reconfiguration� just means a configuration that PLD 40 will have for post-configuration, normal operation. It does not necessarily rule out subsequent reconfiguration of PLD 40.) The data for preliminarily configuring PLD 40 as a communications port may come from any of several sources. For example, it may be part of the boot software (as mentioned earlier in the discussion of the hard-logic mode of operation) from non-volatile memory 50. Alternatively, the boot software may enable UART 30 to make a connection to external circuitry, which then supplies to IC 10 the data for preliminarily configuring PLD 40 as a communications port. In either of the above cases, the preliminary configuration data may be streamed directly into PLD 40 (e.g., via configuration interface 70) or it may first require buffering, decompression, and/or decryption, which can be managed or performed by CPU 20 (with temporary storage of the data in re-writable memory 60) as was described above for the hard-logic mode. In this way PLD 40 is preliminarily configured as any desired type of communications port. As just one example, PLD 40 may be configured as an Ethernet MAC.
From the foregoing it will be better understood and appreciated why this mode of operation is referred to as the soft-logic mode. It is because PLD 40 itself is the primary means by which IC 10 receives the data required for configuring the PLD (at least to its final configuration). Dedicated (i.e., hard-wired) communications circuitry on IC 10 is not the primary means of communicating PLD configuration data to the IC. Instead, configurable or �soft� circuitry (i.e., PLD 40) is the primary PLD configuration data communication pathway. After the desired PLD configuration data has been received via that pathway, that pathway may be effectively erased by giving PLD 40 the desired new configuration.
An alternative term for �configuring� a PLD is �programming� the PLD, and hence �reprogramming� is an alternative term for �reconfiguring.� Although the term �reconfiguring� a PLD is sometimes used herein to refer to situations in which the configuration of an already-configured PLD is changed, the different terms �configuration� and �reconfiguration� are used for the most part just to help the reader appreciate that a sequence of events may have occurred. Technically, reconfiguration may involve few or no differences from configuration, and so reconfiguration may also be referred to as configuration if a sequence of configuration events is of no importance. The word �supply� is sometimes used as an alternative to the word �source� (as in �data source� or �data supply�).
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