Source: http://www.google.com/patents/US7682518?dq=6,757,710
Timestamp: 2017-10-18 18:41:06
Document Index: 41595578

Matched Legal Cases: ['Application No. 06250436', 'Application No. 06250435', 'Application No. 06250436', 'Application No. 10', 'Application No. 10', 'Application No. 2006100674423']

Patent US7682518 - Process for etching a metal layer suitable for use in photomask fabrication - Google Patents
Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one aspect, a method is provided for processing a substrate including positioning a substrate having a metal layer disposed on an optically transparent material in a processing...http://www.google.com/patents/US7682518?utm_source=gb-gplus-sharePatent US7682518 - Process for etching a metal layer suitable for use in photomask fabrication
Publication number US7682518 B2
Application number US 11/616,990
Also published as US7521000, US8202441, US20070105381, US20070184354, US20100178600
Publication number 11616990, 616990, US 7682518 B2, US 7682518B2, US-B2-7682518, US7682518 B2, US7682518B2
Inventors Madhavi R. Chandrachood, Nicole Sandlin, Yung-Hee Yvette Lee, Jian Ding
Patent Citations (118), Non-Patent Citations (34), Referenced by (60), Classifications (19), Legal Events (2)
US 7682518 B2
etching exposed portions of the chromium-based photomask layer.
The dimensions of openings or patterns in the metal layer 320 are patterned by depositing and pattern etching a resist material 330 to expose the metal layer 320 at step 230 as shown in FIG. 3B. The resist materials used in photolithographic reticle fabrication are usually low temperature resist materials, which are defined herein as materials that thermally degrade at temperatures above about 250° C., an example of which includes “ZEP,” manufactured by Hoya Corporation or others described herein. The resist material 330 is deposited upon the metal layer 320 to a thickness between about 200 nm and about 600 nm.
Generally, a source RF power level of about 1000 watts or less is applied to an inductor coil to generate and sustain a plasma of the processing gases during the etching process. A power level between about 100 watts and about 1000 watts, such between about 250 watts and about 650 watts, has been observed to provide sufficient plasma of the processing gases for etching the substrate surface. The recited source RF power levels have been observed to produce sufficient etching radicals and polymerization radicals from the processing gases to etch the exposed metal layer disposed on the substrate while providing a sufficiently low power level, compared to prior art metal etch processes, for the substrate temperatures to be about 150° C. or less.
The substrate is also maintained at a temperature of about 150° C. or less during processing. A substrate temperature below about 150° C. or less has minimal heat degradation of materials, such as resist materials, deposited on the substrate during the photolithographic reticle fabrication processes with the processing gases described herein. The substrate temperature between about 20° C. and about 150° C., preferably between about 20° C. and about 50° C., may be used to etch photomask features with minimal heat degradation of material disposed on the substrate surface. Additionally, the sidewalls of the processing chamber are preferably maintained at a temperature of less than about 70° C., and the dome is preferably maintained at a temperature of less than about 80° C. to maintain consistent processing conditions and to minimize polymer formation on the surfaces of the processing chamber.
Generally, the processing chamber pressure is maintained between about 2 milliTorr and about 20 milliTorr, for example, at about 3 milliTorr, about 5 milliTorr, or about 8 milliTorr. The substrate temperature is between about 20° C. and about 100° C. during the etching process. Additionally, the sidewalls 15 of the processing chamber 10 are maintained at a temperature of less than about 70° C. and the dome is maintained at a temperature of less than about 80° C. The above described metal etching process generally produces a selectivity of metal layer to resist of about 3:1 or greater.
The etching processes as described herein were also observed to remove “top” or upper surface resist material independent of “side” within feature resist material, which is consistent with anisotropic etching and improved feature formation. Additionally, processed substrates have produced features with the desired critical dimensions with an almost vertical profile, i.e., an angle of about 90° between the sidewall of the feature and the bottom of the feature compared to prior art result of about 85° to about 88°.
The reticle is placed in an etch chamber such as the DPS™ metal etch chamber described above. The patterned substrate also described above is placed on the cathode pedestal of the etch chamber, and the chamber is maintained at a pressure between about 8 milliTorr. A plasma was generated by applying a source RF voltage to the inductor coil at a power level of about 400 watts. A bias power of 20 watts was applied to the cathode pedestal. The substrate surface is maintained at a temperature between about 20° C. and about 50° C. The chamber walls and dome were cooled to less than about 70° C. to maintain a steady etch processing condition. The etching of the opening occurred under the following gas flows:
Oxygen (O2), at 12 sccm
Chlorine gas (Cl2), at 96 sccm
The reticle is placed in an etch chamber such as the DPS™ metal etch chamber described above. The patterned substrate also described above is placed on the cathode pedestal of the etch chamber, and the chamber is maintained at a pressure between about 5 milliTorr. A plasma was generated by applying a source RF voltage to the inductor coil at a power level of about 400 watts. A bias power of 20 watts was applied to the cathode pedestal. The substrate surface is maintained at a temperature between about 20° C. and about 50° C. The chamber walls and dome were cooled to less than about 70° C. to maintain a steady etch processing condition. The etching of the opening occurred under the following gas flows:
The reticle is placed in an etch chamber such as the DPS™ metal etch chamber described above. The patterned substrate also described above is placed on the cathode pedestal of the etch chamber, and the chamber is maintained at a pressure between about 5 milliTorr. A plasma was generated by applying a source RF voltage to the inductor coil at a power level of about 600 watts. A bias power of 20 watts was applied to the cathode pedestal. The substrate surface is maintained at a temperature between about 20° C. and about 50° C. The chamber walls and dome were cooled to less than about 70° C. to maintain a steady etch processing condition. The etching of the opening occurred under the following gas flows:
US4357195 Nov 10, 1980 Nov 2, 1982 Tegal Corporation Apparatus for controlling a plasma reaction
US4406733 Dec 21, 1982 Sep 27, 1983 Hitachi, Ltd. Dry etching method
US4600686 May 20, 1983 Jul 15, 1986 U.S. Philips Corporation Method of forming a resist mask resistant to plasma etching
US5474864 Nov 22, 1993 Dec 12, 1995 Ulvac Coating Corporation Phase shift mask and manufacturing method thereof and exposure method using phase shift mask
US5482799 Oct 5, 1994 Jan 9, 1996 Mitsubishi Denki Kabushiki Kaisha Phase shift mask and manufacturing method thereof
US5605776 Aug 15, 1995 Feb 25, 1997 Ulvac Coating Corporation Phase-shifting photomask blank, phase-shifting photomask, and method of manufacturing them
US5629114 Jun 7, 1995 May 13, 1997 Ulvac Coating Corporation Phase shift mask and manufacturing method thereof and exposure method using phase shift mask comprising a semitransparent region
US5674647 Oct 24, 1995 Oct 7, 1997 Ulvac Coating Corporation Phase shift mask and manufacturing method thereof and exposure method using phase shift mask
US5691090 Dec 20, 1996 Nov 25, 1997 Ulvac Coating Corporation Phase shift mask and manufacturing method thereof and exposure method using phase shift mask
US5750290 Apr 19, 1996 May 12, 1998 Nec Corporation Photo mask and fabrication process therefor
US5830607 May 27, 1997 Nov 3, 1998 Ulvac Coating Corporation Phase shift mask and manufacturing method thereof and exposure method using phase shift mask
US5938897 Jun 16, 1997 Aug 17, 1999 Ulcoat (Ulvac Coating Corporation) Method of manufacturing phase-shifting photomask blank
US5952128 Apr 17, 1996 Sep 14, 1999 Ulvac Coating Corporation Phase-shifting photomask blank and method of manufacturing the same as well as phase-shifting photomask
US6022460 Mar 22, 1999 Feb 8, 2000 Inha University Foundation Enhanced inductively coupled plasma reactor
US6228541 Apr 16, 1999 May 8, 2001 Ulvac Coating Corporation Phase-shifting photomask blank, phase-shifting photomask, method for producing them and apparatus for manufacturing the blank
US6391791 Jul 27, 1999 May 21, 2002 Ulvac Coating Corporation Dry-etching method and apparatus, photomasks and method for the preparation thereof, and semiconductor circuits and methods for the fabrication thereof
US6569577 Nov 3, 2000 May 27, 2003 Ulvac Coating Corporation Phase-shift photo mask blank, phase-shift photo mask and method for fabricating semiconductor devices
US6689515 Mar 15, 2001 Feb 10, 2004 Ulvac Coating Corporation Phase-shifting photomask blank, phase-shifting photomask, method for producing them and apparatus for manufacturing the blank
US7361433 Apr 19, 2004 Apr 22, 2008 Samsung Electronics Co., Ltd. Photomask for forming photoresist patterns repeating in two dimensions and method of fabricating the same
US20020155723 * Mar 28, 2002 Oct 24, 2002 Ulvac Coating Corporation Dry-etching method and apparatus, photomasks and method for the preparation thereof, and semiconductor circuits and method for the fabrication thereof
US20030003374 Dec 18, 2001 Jan 2, 2003 Applied Materials, Inc. Etch process for photolithographic reticle manufacturing with improved etch bias
US20030049934 Sep 4, 2002 Mar 13, 2003 Applied Materials, Inc. Methods and apparatus for etching metal layers on substrates
US20030059720 Jan 24, 2002 Mar 27, 2003 Hwang Jeng H. Masking methods and etching sequences for patterning electrodes of high density RAM capacitors
US20030129539 Jan 8, 2002 Jul 10, 2003 Taiwan Semiconductor Manufacturing Co., Ltd. Bi-layer photoresist dry development and reactive ion etch method
US20030165751 Feb 27, 2003 Sep 4, 2003 Klaus Elian Lithographic process for reducing the lateral chromium structure loss in photomask production using chemically amplified resists
US20030201455 Jun 10, 2003 Oct 30, 2003 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and manufacturing method thereof
US20040086787 Nov 5, 2002 May 6, 2004 Waheed Nabila Lehachi Alternating aperture phase shift photomask having plasma etched isotropic quartz features
US20040097077 Nov 15, 2002 May 20, 2004 Applied Materials, Inc. Method and apparatus for etching a deep trench
US20040132311 Jan 6, 2003 Jul 8, 2004 Applied Materials, Inc. Method of etching high-K dielectric materials
US20050181608 Mar 18, 2003 Aug 18, 2005 Applied Materials, Inc. Method and apparatus for etching photomasks
US20060154151 Jan 8, 2005 Jul 13, 2006 Applied Materials, Inc. Method for quartz photomask plasma etching
US20060166106 Jan 27, 2005 Jul 27, 2006 Applied Materials, Inc. Method for photomask plasma etching using a protected mask
US20060166107 Jan 27, 2005 Jul 27, 2006 Applied Materials, Inc. Method for plasma etching a chromium layer suitable for photomask fabrication
DE3613181A1 Apr 18, 1986 Oct 22, 1987 Siemens Ag Process for producing trenches with adjustable steepness of the trench walls in semiconductor substrates consisting of silicon
DE3706127A1 Feb 25, 1987 Oct 29, 1987 Univ Tokyo Diskontinuierliches aetzverfahren
DE3940083A1 Dec 4, 1989 Jun 13, 1991 Siemens Ag Anisotropic dry etching of aluminium (alloy) circuits - using plasma of chlorine, nitrogen and argon
DE4202447A1 Jan 29, 1992 Jul 30, 1992 Micron Technology Inc Trench profile with vertical walls - formed by dry etching using ambient contg. ammonia to produce passivation layer on trench walls
DE4204848A1 Feb 18, 1992 Aug 27, 1992 Micron Technology Inc Passivation of semiconductor surfaces after reactive plasma etching - involves additional plasma treatment using passivation mixture to replace reactive compounds adsorbed on the surface
EP0200951A2 Apr 11, 1986 Nov 12, 1986 International Business Machines Corporation Anisotropic silicon etching in fluorinated plasma
EP0363982A2 Oct 13, 1989 Apr 18, 1990 Hitachi, Ltd. Dry etching method
EP0383570A2 Feb 14, 1990 Aug 22, 1990 Hitachi, Ltd. Plasma etching method and apparatus
EP0978870A2 Aug 5, 1999 Feb 9, 2000 Mitsubishi Denki Kabushiki Kaisha Dry-etching method and apparatus, photomasks and method for the preparation thereof, and semiconductor circuits and method for the fabrication thereof
EP0999472A2 Aug 5, 1999 May 10, 2000 Mitsubishi Denki Kabushiki Kaisha Method and apparatus for dry-etching half-tone phase-shift films, half-tone phase-shift photomasks and method for the preparation thereof, and semiconductor circuits and method for the fabrication thereof
EP1420438A2 Nov 17, 2003 May 19, 2004 Applied Materials, Inc. Method and apparatus for etching a deep trench
EP1679741A1 Jan 5, 2006 Jul 12, 2006 Applied Materials, Inc. Method of quartz etching
JP03129820A Title not available
JP2000114246A Title not available
JPH1079372A Title not available
JPH02156529A Title not available
JPH02312229A Title not available
JPH06181185A Title not available
JPH06342769A Title not available
JPH07142453A Title not available
JPS5947733A Title not available
JPS6062125A Title not available
JPS61263125A Title not available
JPS63115338A Title not available
KR100620293B1 Title not available
WO2004090635A1 Apr 9, 2004 Oct 21, 2004 Hoya Corporation Method of producing photomask and photomask blank
1 Abstract from Korean Patent KR 2002002687A, Jan. 10, 2002, Hynix Semiconductor Inc.
2 Abstract from Korean Patent KR 2003002844A, Jan. 9, 2003, Hynix Semiconductor Inc.
3 Aoyama, et al. "Advanced Cr Dry Etching Process", SPIE Symposium on Photomask and X-Ray Technology VI, Yokohama, Japan, Sep. 1999 SPIE, vol. 3748, pp. 137-146.
4 European Patent Office Search Report dated Mar. 11, 2009 for Application No. 06250436.0. (APPM/009835 EP).
5 European Patent Office Search Report dated Mar. 12, 2009 for Application No. 06250435.2. (APPM/009836 EP).
6 European Search Report dated Feb. 15, 2008, for EP 06250045.9-2203. (APPM/9493).
7 Extended European Search Report dated May 19, 2008, for Application No. 06250436.0 (APPM/009835-EP).
8 Fujisawa, et al. "Evaluation of NLD Mask Dry Etching System", SPIE Symposium on Photomask and X-Ray Technology VI, Yokohama, Japan, Sep. 1999, vol. 3748, pp. 147-152.
9 Kawakami, et al., Time Modulated Etching for High-Aspect Ratio Patterning, 35th Applied Physics Related Joint Lecture, Mar. 28, 1988, pp. 28-G-5.
10 Kim et al., Decrease of Chrome Residue on MoSiON in Embeded Attenuated-PSM Processing, Apr. 2004, Photomask Japan 2004 Conference, Proceedings of SPIE, 2004, vol. 5446.
11 Kwon, et al., "Loading Effect Parameters at Dry Etcher System and Their Analysis at Mask-to-Mask Loading and Within-Mask Loading", Proceedings of SPIE, vol. 4562 (2002), pp. 79-87.
12 Mahi , et al., The Etching of Silicon in Diluted SF6 Plasmas: Correlation between the Flux of Incident Species and the Etching Kinetics, Journal of Vacuum Science and Technology B, May 1987, pp. 657-666, vol. 5, No. 3.
13 Maruyama et al., Reduction of Charge Build-Up with Pulse-Modulated Bias in Pulsed Electron Cyclotron Resonance Plasma, Jpn. J. Appl. Phys., 1998, 2306-2310, vol. 37.
14 Notice to File a Response dated Jan. 29, 2009, for Korean Application No. 10-2007-0087534. (APPM/011453KR).
15 Office Action dated Oct. 23, 2007, for Korean Application No. 10-2006-0002046. (APPM/9493).
16 Ogata, et al., A New Microwave Plasma Etching System Using Time Modulation Bias Technology, Hitachi Review vol. 48, No. 6 (1999) pp. 344-348.
17 Okudaira, et al., Micromachining by Plasma, EP-89, 1989, p. 9-18.
18 Paul, et al., Fabrication of High Aspect Ratio Structures using Chlorine Gas Chopping Technique, Microelectronic Engineering, 1997, pp. 79-82, vol. 35.
19 PCT International Search Report for PCT/US 01/19282, dated May 31, 2002 (AMAT/4213.PC).
20 PCT International Search Report from International Application No. PCT/US02/27869, Dated Dec. 23, 2002 (AMAT/6399PCT).
21 PCT Search Report for PCT/US03/11549, dated Feb. 19, 2004 (AMAT/6991.PCT).
22 Philipsen, et al., Printability of Topography in Alternating Aperture Phase-Shift Masks, Proceedings of SPIE, Oct. 2004, pp. 587-595, vol. 5567.
23 Prosecution History for U.S. Appl. No. 11/044,341 as obtained from PAIR on Nov. 10, 2009.
24 Prosecution History for U.S. Appl. No. 11/867,740 as obtained from PAIR on Nov. 10, 2009.
25 Rangelow, I., High Resolution Tri-Level Process by Downstream-Microwave RF-Biased Etching, SPIE, vol. 1392, Advanced Techniques for Integrated Circuit Processing (1990).
26 Ruhl, et al. "Chrome Dry Etch Process Characterization Using Surface Nano Profiling", Proceedings of SPIE, vol. 4186 (2001), pp. 97-107.
27 Schaepkens, et al., "Effects of radio frequency bias frequency and radio frequency bias pulsing on Si02 feature etching in inductively coupled fluorocarbon plasmas", J. Vac. Sci. Technol. B 18(2), Mar./ Apr. 2000, pp. 856-863, vol. 18, No. 2.
28 Seo, et al., The Feasibility Study of Thin Cr Film for Low Process Bias, Photomask Japan 2003 Conference 5130, Apr. 16, 2003, Proceedings of SPIE, vol. 5130.
29 Tin, et al., Effects of RF Bias on Remote Microwave Plasma Assisted Etching of Silicon in SF6, J. Electrochem. Soc., Oct. 1991, vol. 138, No. 10, pp. 3094-3100.
30 Translation of Official Letter from Chinese Patent Office of Application No. 2006100674423 dated Dec. 5, 2008. (APPM/9835).
31 Tsujimoto, et al., A New Side Wall Protection Technique in Microwave Plasma Etching Using a Chopping Method, 18th (1986 International) Conference of Solid State Devices and Materials, Tokyo, 1986, pp. 229-232.
32 Wu et al., MoSi Etch of Phase-Shift Masks, Journal of Microlithography, Microfabrication, and Microsystems, Jan. 2003, pp. 54-60, vol. 2, Issue 1.
33 Wu, An Investigation of Cr Etch Kinetics, 23rd Annual BACUS Symposium on Photomask Technology. Edited by Kimmel, Kurt R.; Staud, Wolfgang. Proceedings of the SPIE, Dec. 2003, pp. 701-712, vol. 5256.
34 Wu, Photomask Cr-MoSi Etching, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, May 2004, pp. 1150-1159, vol. 22, Issue 3.
US7955516 * Aug 9, 2007 Jun 7, 2011 Applied Materials, Inc. Etching of nano-imprint templates using an etch reactor
US8202441 * Mar 22, 2010 Jun 19, 2012 Applied Materials, Inc. Process for etching a metal layer suitable for use in photomask fabrication
US9309598 * May 28, 2014 Apr 12, 2016 Applied Materials, Inc. Oxide and metal removal
US20080105649 * Aug 9, 2007 May 8, 2008 Chandrachood Madhavi R Etching of nano-imprint templates using an etch reactor
US20100178600 * Mar 22, 2010 Jul 15, 2010 Applied Materials, Inc. Process for etching a metal layer suitable for use in photomask fabrication
US20160222522 * Apr 11, 2016 Aug 4, 2016 Applied Materials, Inc. Oxide and metal removal
U.S. Classification 216/67, 216/76, 216/75, 216/68
Cooperative Classification C03C2217/26, H01J2237/3341, C03C17/06, C03C2218/34, G03F1/54, H01J37/321, C03C2218/33, G03F1/80, C23F4/00
European Classification G03F1/54, G03F1/80, H01J37/32M8D, C03C17/06, C23F4/00
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHANDRACHOOD, MADHAVI R.;LEE, YUNG-HEE YVETTE;DING, JIAN;AND OTHERS;REEL/FRAME:018988/0342;SIGNING DATES FROM 20010411 TO 20041105
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHANDRACHOOD, MADHAVI R.;LEE, YUNG-HEE YVETTE;DING, JIAN;AND OTHERS;SIGNING DATES FROM 20010411 TO 20041105;REEL/FRAME:018988/0342