Source: http://www.patentsencyclopedia.com/app/20140209962
Timestamp: 2017-12-18 16:52:54
Document Index: 317865977

Matched Legal Cases: ['Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10']

Inventors: Won Cheol Seo (Ansan-Si, KR) Dae Sung Cho (Ansan-Si, KR) Dae Sung Cho (Ansan-Si, KR) Kyung Hee Ye (Ansan-Si, KR) Kyoung Wan Kim (Ansan-Si, KR) Kyoung Wan Kim (Ansan-Si, KR) Yeo Jin Yoon (Ansan-Si, KR)
Patent application number: 20140209962
1. A light emitting diode, comprising: a substrate; a first conductivity-type semiconductor layer disposed on the substrate; a second conductivity-type semiconductor layer disposed on the first conductivity-type semiconductor layer; an active layer disposed between the first conductivity-type layer and the second conductivity-type semiconductor layer; a first electrode pad electrically connected to the first conductivity-type semiconductor layer; a second electrode pad disposed on the first conductivity-type semiconductor layer; an insulation layer disposed between the first conductivity-type semiconductor layer and the second electrode pad, and electrically insulating the second electrode pad from the first conductivity-type semiconductor layer; and at least one upper extension connected to the second electrode pad and electrically is connected to the second conductivity-type semiconductor layer, wherein the first electrode pad and the second electrode pad are diagonally disposed near corners of the substrate and face each other.
2. The light emitting diode of claim 1, wherein the first conductivity-type is an n-type and the second conductivity-type is a p-type.
3. The light emitting diode of claim 2, further comprising a transparent electrode layer disposed on the second conductivity-type nitride semiconductor layer, wherein the at least one upper extension is disposed on the transparent electrode layer.
4. The light emitting diode of claim 1, wherein the first conductivity-type semiconductor layer comprises at least one exposed region, and the second electrode pad is disposed on the exposed region.
5. The light emitting diode of claim 4, further comprising a connector connecting the upper extension and the second electrode pad, wherein the insulation layer is disposed between the connector and side surfaces of the first conductivity-type semiconductor layer and the active layer.
6. The light emitting diode of claim 4, wherein: the insulation layer is disposed on an upper surface of the second conductivity-type semiconductor layer; and an edge of the insulation layer overlaps the second conductivity-type semiconductor layer.
7. The light emitting diode of claim 6, wherein a portion of the second electrode pad is disposed on the second conductivity-type semiconductor layer, and the second electrode pad and the second conductivity-type semiconductor layer are separated from each other by the insulation layer.
8. The light emitting diode of claim 1, wherein the second conductivity-type semiconductor layer and the active layer are divided to define at least two light emitting regions, and the at least one upper extension connected to the second electrode pad is disposed on each of the at least two light emitting regions.
9. The light emitting diode of claim 8, wherein the at least two light emitting regions are symmetrically disposed.
10. The light emitting diode of claim 8, further comprising a first lower extension connected to the first electrode pad and disposed between the at least two light emitting regions.
11. The light emitting diode of claim 10, further comprising a second lower extension connected to the first electrode pad and extending along an edge of the substrate.
12. A light emitting diode, comprising: a substrate; a first conductivity-type semiconductor layer disposed on the substrate; a second conductivity-type semiconductor layer disposed on the first conductivity-type semiconductor layer; an active layer disposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer; a first electrode pad electrically connected to the first conductivity-type semiconductor layer; a second electrode pad disposed on the substrate; and at least one upper extension connected to the second electrode pad and electrically connected to the second conductivity-type semiconductor layer, wherein the first electrode pad and the second electrode pad are diagonally disposed near corners of the substrate and face each other.
13. The light emitting diode of claim 12, wherein the second electrode pad is disposed on an exposed region of the substrate, from which the first conductivity-type semiconductor layer, active layer, and second conductivity-type semiconductor layer have been removed.
14. The light emitting diode of claim 13, further comprising an insulation layer disposed on side surfaces of the first conductivity-type semiconductor layer, active layer, and second conductivity-type semiconductor layer surrounding the second electrode pad.
15. The light emitting diode of claim 12, wherein the substrate comprises a dielectric material.
16. The light emitting diode of claim 12, further comprising an insulation layer disposed between the substrate and the second electrode pad.
17. The light emitting diode of claim 12, further comprising a transparent electrode layer disposed on the second conductivity-type semiconductor layer, wherein the at least one upper extension is disposed on the transparent electrode layer.
18. The light emitting diode of claim 12, wherein: the second conductivity-type semiconductor layer and the active layer are divided to define at least two light emitting regions; and the at least one upper extension connected to the second electrode pad is disposed on each of the at least two light emitting regions.
19. The light emitting diode of claim 18, wherein the at least two light emitting regions are symmetrically disposed.
20. The light emitting diode of claim 18, further comprising a first lower extension connected to the first electrode pad and disposed between the at least two light emitting regions.
[0001] This application is a continuation of U.S. patent application Ser. No. 13/862,713, filed on Apr. 15, 2013, which is a continuation of U.S. patent application Ser. No. 13/617,810, filed on Sep. 14, 2012 and issued as U.S. Pat. No. 8,436,369, which is a continuation of U.S. patent application Ser. No. 12/974,917, filed on Dec. 21, 2010 and issued as U.S. Pat. No. 8,309,971, and claims priority from and the benefit of Korean Patent Application No. 10-2010-0001089, filed on Jan. 7, 2010, Korean Patent Application No. 10-2010-0001090, filed on Jan. 7, 2010, Korean Patent Application No. 10-2010-0001204, filed on Jan. 7, 2010, Korean Patent Application No. 10-2010-0001205, filed on Jan. 7, 2010, Korean Patent Application No. 10-2010-0001408, filed on Jan. 7, 2010, Korean Patent Application No. 10-2010-0001813, filed on Jan. 8, 2010, Korean Patent Application No. 10-2010-0003396, filed on Jan. 14, 2010, Korean Patent Application No. 10-2010-0003964, filed on Jan. 15, 2010, and Korean Patent Application No. 10-2010-0003965, filed on Jan. 15, 2010, which are hereby incorporated by reference for all purposes as if fully set forth herein.
[0064] The first conductive type semiconductor layer 23 is located on the substrate 21 and the second conductive type semiconductor layer 27 is located on the first conductive type semiconductor layer 23 with the active layer 25 interposed between the first conductive type semiconductor layer 23 and the second conductive type semiconductor layer 27. The first conductive type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 may be formed of, but are not limited to, a GaN-based compound semiconductor material such as (Al, In, Ga)N. The active layer 25 is composed of elements emitting light at desired wavelengths, for example, ultraviolet (UV) or blue light.
[0068] The second conductive type semiconductor layer 27 and the active layer 25 may be subjected to a patterning process to expose a region(s) of the first conductive type semiconductor layer 23 via photolithography and etching. Such a process is generally known as mesa-etching. Mesa-etching may provide divided light emitting regions as shown in FIGS. 1 and 2. Although, in the present exemplary embodiment, the light emitting diode has two light emitting regions that are isolated from each other, the light emitting diode may have more than two separate light emitting regions. Further, the mesa-etching may be performed to form inclined side surfaces which have a degree of inclination in the range of 30-70 degrees relative to a substrate plane relative to a plane of the substrate 21.
[0108] According to the present exemplary embodiment, with the second electrode pad 163 located at the center of the substrate 21, a light emitting region is divided into the plural light emitting regions LE1, LE2, LE3, LE4, so that the light emitting diode may achieve uniform current spreading over a wide area.
[0186] In the present exemplary embodiment, the light emitting structure is substantially divided into the two light emitting regions by the indented portion 30b, but is not limited thereto. The light emitting structure may be divided into more than two light emitting regions. Further, although the transparent electrode layer 429 is formed after mesa-etching in the present exemplary embodiment, the mesa-etching may be carried out after formation of the transparent electrode layer 429.
[0187] Unlike the light emitting diode of the thirteenth exemplary embodiment, the light emitting diode of the present exemplary embodiment includes the second electrode pad 433 above the transparent electrode layer 429. This feature may also be applied to the light emitting diodes of the fifteenth and sixteenth exemplary embodiments described with reference to FIGS. 18 and 19, and a detailed description thereof will be omitted herein.
[0188] FIG. 23 is a plan view of a light emitting diode according to an eighteenth exemplary embodiment of the present invention, and FIGS. 24a, 24b and 24c are cross-sectional views taken along lines A-A, B-B and C-C of FIG. 23, respectively.
[0189] Referring to FIGS. 23, 24a, 24b and 24c, the light emitting diode includes a substrate 21, a light emitting structure including light emitting regions LE1, LE2, an electrode pad region EP isolated from the light emitting structure, a first electrode pad 535, a second electrode pad 533, and upper extensions 533a. Further, the light emitting diode may include a transparent electrode layer 529, an insulation layer 531, connectors 533b, a first lower extension 535a, and a second lower extension 535b. In addition, each of the light emitting structure and the electrode pad region EP includes a first conductive type semiconductor layer 23, an active layer 25, and a second conductive type semiconductor layer 27.
[0190] The substrate 21 may be, for example, a sapphire substrate, but is not limited thereto. The emitting structure and the electrode pad region EP are located on the substrate 21.
[0191] The first conductive type semiconductor layer 23 is an n-type semiconductor layer and the second conductive type semiconductor layer 27 is a p-type semiconductor layer, or vice versa. The first conductive type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 are the same as those described with reference to FIGS. 14 and 15, and a detailed description thereof will be omitted herein.
[0192] The second conductive type semiconductor layer 27 and active layer 25 of the light emitting structure may be divided to define at least two light emitting regions LE1, LE2. The light emitting regions LE1, LE2 may have a symmetrical structure and such a dividing process may be carried out by mesa-etching. Specifically, an indented portion 30b is formed by mesa-etching to divide the second conductive type semiconductor layer 27 and active layer 25 into the two light emitting regions. Further, side surfaces of the light emitting structure subjected to mesa-etching may be inclined at 30-70 degrees relative to a substrate plane relative to a plane of the substrate 21. Further, the first conductive type semiconductor layer 23 of the light emitting regions LE1, LE2 may be shared by the light emitting regions, so that the first conductive type semiconductor layer 23 is exposed between the light emitting regions.
[0193] In addition, a transparent electrode layer 529 may be located on the second conductive type semiconductor layer 27 of the light emitting structure. The transparent electrode layer 529 may be formed of ITO or Ni/Au and forms an ohmic contact with the second conductive type semiconductor layer 27.
[0194] The electrode pad region EP is isolated from the light emitting structure. Specifically, the first conductive type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 of the electrode pad region EP are separated from the first conductive type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 of the light emitting structure. Accordingly, the electrode pad region EP is electrically insulated from the light emitting structure. The electrode pad region EP may be isolated from the light emitting structure by a trench TI formed in the first conductive type semiconductor layer 23. On the other hand, the transparent electrode layer 529 formed of ITO or Ni/Au may be located on the electrode pad region EP.
[0195] An insulation layer 531 may cover the second conductive type semiconductor layer 27 (or the transparent electrode layer 529) of the light emitting structure. The insulation layer 531 may also cover side surfaces of the second conductive type semiconductor layer 27 and active layer 25, which are exposed by mesa-etching. In addition, the insulation layer 531 may have openings 431a which expose the transparent electrode layer 529 on the light emitting regions LE1, LE2. The transparent electrode layer 529 (or the second conductive type semiconductor layer 27) is exposed through the openings 531a. The insulation layer 531 may cover the second conductive type semiconductor layer 27 (or the transparent electrode layer 529) of the electrode pad region EP, and also cover a side surface of the electrode pad region EP. The insulation layer 531 may be formed of any transparent material, for example SiO2, through which light can be transmitted.
[0196] The first electrode pad 535 may be located on an exposed region of the first conductive type semiconductor layer 23 of the light emitting structure, and the second electrode pad 533 may be located on the electrode pad region EP. The first electrode pad 535 may be located to face the second electrode pad 533, as shown in the figures. The first and second electrode pads 535, 533 are bonding pads for wire bonding and may have a relatively wide area for wire bonding.
[0197] The first electrode pad 535 is electrically connected to the first conductive type semiconductor layer 23. Further, the first lower extension 535a may extend from the first electrode pad 535 towards the second electrode pad 533. The first lower extension 535a is located on the first conductive type semiconductor layer 23 and electrically connected thereto. As shown in the figures, the first lower extension 535a may be located in the indented portion 30b between the light emitting regions LE1, LE2 and has a distal end near the second electrode pad 533. In addition, the second lower extensions 535b may extend from the first electrode pad 535 along an edge of the substrate 21.
[0198] The second electrode pad 533 is located on the electrode pad region EP. The second electrode pad 533 may be located on the second conductive type semiconductor layer 27 and the transparent electrode layer 529 and/or the insulation layer 531 may be disposed between the second electrode pad 533 and the second conductive type semiconductor layer 27. When the insulation layer 531 is disposed between the second electrode pad 533 and the second conductive type semiconductor layer 27 (or the transparent electrode layer 529), the second electrode pad may be insulated from the electrode pad region EP.
[0199] The upper extensions 533a are located on the light emitting regions LE1, LE2. The upper extensions 533a may be electrically connected to the transparent electrode layer 529 (or the second conductive type semiconductor layer 27) via the openings 531a of the insulation layer 531. The second conductive type semiconductor layer 27 may be exposed through the openings 531a, and the upper extensions 533a may be directly connected to the second conductive type semiconductor layer 27. The upper extensions 533a are disposed to allow uniform current spreading in the second conductive type semiconductor layer 27. For example, the upper extensions 533a may extend parallel to each other. The upper extensions 533a may be connected to the second electrode pad 533 via connectors 533b, respectively. The connectors 533b are insulated from the transparent electrode layer 529 (or the second conductive type semiconductor layer 27) by the insulation layer 531. The connectors 533b are insulated from the side surface of the light emitting structure by the insulation layer 531.
[0200] The electrode pads 533, 535, upper extensions 533a, connectors 533b, and first and second lower extensions 535a, 535b may be formed of, but are not limited to, the same material, for example Cr/Au, by the same process. Alternatively, the upper extensions 433a and the second electrode pad 433 may be formed of different materials by different processes.
[0201] In the present exemplary embodiment, the light emitting diode has a symmetrical structure relative to a line crossing the first electrode pad 535 and the second electrode pad 533, for example line B-B of FIG. 23. The divided regions of the transparent electrode layer 529 and the upper extensions 533a may be symmetrically disposed, and the second lower extensions 535b may also be symmetrically disposed. Accordingly, the light emitting diode may exhibit the same luminescence characteristics at both sides of the indented portion 30b. As a result, the light emitting structure of the light emitting diode is divided into two light emitting regions, so the light emitting diode can prevent excessive current crowding around a defect such as pin holes or thread dislocations, thereby achieving uniform current spreading.
[0202] In the present exemplary embodiment, the first electrode pad 535 is located on the first conductive type semiconductor layer 23. However, if the substrate 21 is conductive, the first electrode pad 535 may be located on the top or bottom surface of the substrate 21. In this case, the second electrode pad 533 is insulated from the electrode pad region EP by the insulation layer 531.
[0203] FIGS. 25a, 25b, 25c, 25d and 25e are plan views illustrating a method of manufacturing a light emitting diode according to the eighteenth exemplary embodiment. A method of forming semiconductor layers 23, 25, 27, a transparent electrode layer 529 and an insulation layer 531 is well known in the art and a detailed description thereof will be omitted herein.
[0204] First, referring to FIG. 25a, semiconductor layers including an n-type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 are formed on a substrate 21. Then, the semiconductor layers are subjected to mesa-etching to expose the first conductive type semiconductor layer 23. The semiconductor layers may have inclined surfaces, for example, at 30-70 degrees relative to a substrate plane. Here, as shown in FIG. 23, a region 30a to be formed with a first electrode pad 535, a region 30b to be formed with a first lower extension 535a, and a region 30c to be formed with a second lower extension 535b are exposed on the first conductive type semiconductor layer 23. The region 30b to be formed with the first lower extension 535a becomes an indented portion 30b which extends inwardly. The indented portion 30b extends inwardly from the region 30a, on which the first electrode pad will be formed. Here, the first conductive type semiconductor layer 23 in the electrode pad region EP is exposed by mesa-etching, and the second conductive type semiconductor layer 27 and active layer 23 remain instead of being removed by etching. Accordingly, the second conductive type semiconductor layer 27 and active layer 23 are divided to define two light emitting regions LE1, LE2 and the electrode pad region EP is defined by the mesa-etching.
[0205] Referring to FIG. 25b, a trench TI is formed around the electrode pad region EP by etching the first conductive type semiconductor layer 23. The electrode pad region EP is isolated in an island shape from the first conductive type semiconductor layer 23 of the light emitting structure, which includes the light emitting regions LE1, LE2, by the trench TI.
[0206] Referring to FIG. 25c, a transparent electrode layer 529 may be formed on the second conductive type semiconductor layer 27 of the light emitting regions LE1, LE2. The transparent electrode layer 529 may also be formed on the electrode pad region EP. The transparent electrode layer 529 may have a symmetrical structure relative to an imaginary line extending along the indented portion 30c. The transparent electrode layer 529 may be formed of ITO or Ni/Au and forms an ohmic contact with the second conductive type semiconductor layer 27.
[0207] Referring to FIG. 25d, an insulation layer 531 is formed on the light emitting structure. The insulation layer 531 covers the transparent electrode layer 529 of the light emitting structure and the transparent electrode layer 529 on the electrode pad region EP. Further, the insulation layer 531 may also cover side surfaces of the second conductive type semiconductor layer 27 and active layer 25, which are exposed by mesa-etching. In addition, the insulation layer 531 is subjected to a patterning process to form openings 531a, which expose the transparent electrode layer 529 on light emitting regions LE1, LE2, via photolithography and etching. The openings 531a exposing the transparent electrode layer 529 may be symmetrically formed parallel to each other. Further, the regions of the first conductive type semiconductor layer 23, on which the first electrode pad 535, first lower extension 535a and second extension 535b will be respectively formed, are also exposed therethrough.
[0208] Referring to FIG. 25e, the first electrode pad 535, first lower extension 535a and second extension 535b are formed on the exposed regions of the first conductive type semiconductor layer 23 of the light emitting structure. Further, a second electrode pad 533 is formed on the electrode pad region EP, and upper extensions 533a are formed in the openings 531a. Further, connectors 533b are formed to connect the second electrode pad 533 to the upper extensions 533a.
[0209] The upper extensions 533a may be connected to the transparent electrode layer 529 and be formed parallel to the first lower extension 535a. As a result, a light emitting diode is fabricated as shown in FIG. 23.
[0210] In the present exemplary embodiment, the light emitting structure is divided into the two light emitting regions LE1, LE2, but is not limited thereto. The light emitting structure may be divided into more than two light emitting regions. Further, although the transparent electrode layer 529 is formed after mesa-etching in the present exemplary embodiment, the mesa-etching may be carried out after formation of the transparent electrode layer 529. Moreover, although the trench TI is formed after mesa-etching in the present exemplary embodiment, the mesa-etching may be carried out after formation of the trench TI.
[0211] FIG. 26 is a plan view of a light emitting diode according to a nineteenth exemplary embodiment of the present invention.
[0212] In the above exemplary embodiment of FIG. 23, the first and second electrode pads 535, 533 are disposed in a major axis direction of the light emitting diode, and the indented portion 30b is formed in the major axis direction of the light emitting diode. In the present exemplary embodiment, however, the first and second electrode pads 535, 533 are disposed in a minor axis direction of the light emitting diode, and an indented portion 560b is formed in the minor axis direction of the light emitting diode. Further, the transparent electrode layers 529, upper extensions 553a and lower extensions 555a are also symmetrically disposed.
[0213] Here, the upper extensions 553a extend along an edge of the light emitting diode to surround the light emitting diode and include extensions 553b extending inwardly from the edge of the light emitting diode. Lower extensions 555a extend outwardly from the interior of the light emitting diode. Further, the lower extensions 555a may be bifurcated to surround the extensions 553b in associated light emitting regions, respectively.
[0214] The upper extensions 553a are connected to the transparent electrode layer 529 on the light emitting regions LE1, LE2 through openings 531a of the insulation layer 531, and connected to the second electrode pad 553 through the connectors 553b. The connectors 553b are insulated from the transparent electrode layer 529 by the insulation layer 531.
[0215] As described with reference to FIG. 23, the electrode pad region EP is isolated from the light emitting structure by the trench TI.
[0216] In the present exemplary embodiment, the light emitting diode omits the first lower extension 535a (see FIG. 23), which extends from the first electrode pad 555 towards the second electrode pad 553.
[0217] FIG. 27 is a plan view of a light emitting diode according to a twentieth exemplary embodiment of the present invention.
[0218] Referring to FIG. 27, the light emitting diode of the present exemplary embodiment is generally similar to the light emitting diode described with reference to FIG. 26. In the light emitting diode of the present exemplary embodiment, however, lower extensions 565a and upper extensions 563a are arranged in a different manner than in the above exemplary embodiment.
[0219] Specifically, the lower extensions 565a extend along an edge of the light emitting diode and are bent to extend inwardly, and the upper extensions 563a include two extensions on each of divided regions of the transparent electrode layer 529, which surround each of the lower extensions 565a extending inwardly.
[0220] The upper extensions 563a are connected to the transparent electrode layer 529 on light emitting regions LE1, LE2 through openings 531a of an insulation layer 531, and are connected to the second electrode pad 553 through connectors 563b. The connectors 563b are insulated from the light emitting structure by the insulation layer 531
[0221] FIG. 28 is a plan view of a light emitting diode according to a twenty-first exemplary embodiment of the present invention, and FIGS. 29a, 29b and 29c are cross-sectional views taken along lines A-A, B-B and C-C of FIG. 28, respectively.
[0222] Referring to FIGS. 28, 29a, 29b and 29c, the light emitting diode of the present exemplary embodiment is generally similar to the light emitting diode described with reference to FIGS. 23 and 24. In the light emitting diode of the present exemplary embodiment, however, a second electrode pad 633 is located on an isolated electrode pad region EP of a first conductive type semiconductor layer 23. The same components as those of the above exemplary embodiments will be omitted for clarity.
[0223] In the present exemplary embodiment, a light emitting structure and the electrode pad region EP are located on the substrate 21, and the electrode pad region EP includes the first conductive type semiconductor layer 23.
[0224] The electrode pad region EP is isolated from the light emitting structure. Specifically, the first conductive type semiconductor layer 23 in the electrode pad region EP is separated from the first conductive type semiconductor layer 23 of the light emitting structure. Accordingly, the electrode pad region EP is electrically insulated from the light emitting structure. The electrode pad region EP may be isolated from the light emitting structure by a trench TI formed in the first conductive type semiconductor layer 23 in the electrode pad region EP. An insulation layer 531 may cover the first conductive type semiconductor layer 23 of the electrode pad region EP and may also cover the electrode pad region EP.
[0225] A second electrode pad 633 is located on the electrode pad region EP. The second electrode pad 633 may be located on the first conductive type semiconductor layer 23 and the insulation layer 531 may be disposed between the second electrode pad 633 and the first conductive type semiconductor layer 23. When the insulation layer 531 is disposed between the second electrode pad 633 and the first conductive type semiconductor layer 23, the second electrode pad may be electrically insulated from the electrode pad region EP.
[0226] FIGS. 30a, 30b, 30c, 30d and 30e are plan views illustrating a method of manufacturing a light emitting diode according to the twenty-first exemplary embodiment. Methods of forming semiconductor layers 23, 25, 27, a transparent electrode layer 29 and an insulation layer 31 are well known in the art and a detailed description thereof will be omitted herein. Any process, known now or not yet known, that can form semiconductor layers 23, 25, 27, a transparent electrode layer 329 and an insulation layer 331, can be used to manufacture the light emitting diode.
[0227] First, referring to FIG. 30a, semiconductor layers including an n-type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 are formed on a substrate 21. Then, the semiconductor layers are subjected to mesa-etching to expose the first conductive type semiconductor layer 23. The semiconductor layers may have inclined surfaces, for example, at 30-70 degrees relative to a substrate plane. Here, as shown in FIG. 28, a region 30a to be formed with a first electrode pad 535, a region 30b to be formed with a first lower extension 535a, and a region 30c to be formed with a second lower extension 535b are exposed on the first conductive type semiconductor layer 23. The region 30b to be formed with the first lower extension 535a becomes an indented portion 30b which extends inwardly. The indented portion 30b extends inwardly from the region 30a, on which the first electrode pad will be formed. Here, the first conductive type semiconductor layer 23 of the electrode pad region EP is exposed by mesa-etching. Accordingly, the second conductive type semiconductor layer 27 and active layer 23 are divided to define two light emitting regions LE1, LE2 by the mesa-etching.
[0228] Referring to FIG. 30b, a trench TI is formed around the electrode pad region EP by etching the first conductive type semiconductor layer 23. The electrode pad region EP is isolated in an island shape from the first conductive type semiconductor layer 23 of the light emitting structure, which includes the light emitting regions LE1, LE2, by the trench TI.
[0229] Referring to FIG. 30c, a transparent electrode layer 529 may be formed on the second conductive type semiconductor layer 27 of the light emitting regions LE1, LE2. The transparent electrode layer 529 may have a symmetrical structure relative to an imaginary line extending along the indented portion 30c. The transparent electrode layer 529 may be formed of ITO or Ni/Au and forms an ohmic contact with the second conductive type semiconductor layer 27.
[0230] Referring to FIG. 30d, an insulation layer 531 is formed on the light emitting structure. The insulation layer 531 covers the transparent electrode layer 529 of the light emitting structure and the first conductive type semiconductor layer 23 on the electrode pad region EP. The insulation layer 531 may also cover side surfaces of the second conductive type semiconductor layer 27 and active layer 25, which are exposed by mesa-etching. In addition, the insulation layer 531 is subjected to a patterning process to form openings 531a, which expose the transparent electrode layer 529 on light emitting regions LE1, LE2, via photolithography and etching. The openings 531a exposing the transparent electrode layer 529 may be symmetrically formed parallel to each other. Further, the regions 30a, 30b, 30c of the first conductive type semiconductor layer 23, on which the first electrode pad 535, first lower extension 535a and second extension 535b will be respectively formed, are also exposed therethrough.
[0231] Referring to FIG. 30e, the first electrode pad 535, first lower extension 535a and second extension 535b are formed on the exposed regions of the first conductive type semiconductor layer 23 of the light emitting structure. Further, a second electrode pad 633 is formed on the electrode pad region EP, and upper extensions 533a are formed on the openings 531a. Further, connectors 533b are formed to connect the second electrode pad 633 to the upper extensions 533a.
[0232] The upper extensions 533a may be connected to the transparent electrode layer 529 and be formed parallel to the first lower extension 535a. As a result, a light emitting diode is fabricated as shown in FIG. 28.
[0233] As compared with the light emitting diode of the exemplary embodiment shown in FIGS. 24 and 25, the electrode pad region EP of the present exemplary embodiment isolated from the light emitting structure is formed in the first conductive type semiconductor layer 23. Accordingly, the second electrode pad 633 is located on the first conductive type semiconductor layer 23 or on the insulation layer 531 of the first conductive type semiconductor layer. The feature of forming the electrode pad region EP using the first conductive type semiconductor layer 23 may also be applied to the light emitting diodes described with reference to FIGS. 26 and 27.
[0234] FIG. 31 is a plan view of a light emitting diode according to a twenty-second exemplary embodiment of the present invention, and FIGS. 32a, 32b and 32c are cross-sectional views taken along lines A-A, B-B and C-C of FIG. 31, respectively.
[0235] Referring to FIGS. 31, 32a, 32b and 32c, the light emitting diode of the present exemplary embodiment is similar to the light emitting diode described with reference to FIGS. 23 and 24. In the light emitting diode of the present exemplary embodiment, however, a second electrode pad 733 is located on an electrode pad region EP on a substrate 21. Description of the same components as those described in the above exemplary embodiments will be omitted.
[0236] In the present exemplary embodiment, the substrate 21 is a dielectric substrate, such as a sapphire substrate. The second electrode pad 733 is located on the substrate 21 to be in contact with the substrate 21 and may be isolated from a light emitting structure. Specifically, the second electrode pad 733 is separated from a first conductive type semiconductor layer 23 of the light emitting structure. The second electrode pad 733 is in contact with the substrate 21 through a hole 23a formed by etching the first conductive type semiconductor layer 23.
[0237] In the present exemplary embodiment, the second electrode pad 733 is described as being in contact with the substrate 21. Alternatively, an insulation layer 531 may be disposed between the second electrode pad 733 and the substrate 21. In other words, the insulation layer 531 may cover a sidewall and bottom of the hole 23a. In this case, since the second electrode pad 733 is insulated from the substrate by the insulation layer 31, the substrate 21 may be conductive.
[0238] FIGS. 33a, 33b, 33c, 33d and 33e are plan views illustrating a method of manufacturing a light emitting diode according to the twenty-second exemplary embodiment. Methods of forming semiconductor layers 23, 25, 27, a transparent electrode layer 29 and an insulation layer 31 are well known in the art and a detailed description thereof will be omitted herein. Any process, known now or not yet known, that can form semiconductor layers 23, 25, 27, a transparent electrode layer 329 and an insulation layer 331, can be used to manufacture the light emitting diode.
[0239] First, referring to FIG. 33a, semiconductor layers including an n-type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 are formed on a substrate 21. Then, the semiconductor layers are subjected to mesa-etching to expose the first conductive type semiconductor layer 23. The semiconductor layers may have inclined surfaces, for example, at 30-70 degrees relative to a substrate plane. Here, as shown in FIG. 31, a region 30a to be formed with a first electrode pad 535, a region 30b to be formed with a first lower extension 535a, and a region 30c to be formed with a second lower extension 535b are exposed on the first conductive type semiconductor layer 23. The region 30b to be formed with the first lower extension 535a becomes an indented portion 30b which extends inwardly. The indented portion 30b extends inwardly from the region 30a, on which the first electrode pad will be formed. Here, an upper portion of the electrode pad region EP, on which the second electrode pad will be formed, and the first conductive type semiconductor layer 23 around the electrode pad region EP are exposed by mesa-etching. Accordingly, the second conductive type semiconductor layer 27 and active layer 23 are divided to define two light emitting regions LE1, LE2 by the mesa-etching.
[0240] Referring to FIG. 33b, a hole 23a is formed to expose the substrate 21 by etching the first conductive type semiconductor layer 23 in the electrode pad region EP. The hole 23a may be formed to have a greater area than that of the electrode pad region EP, to encompass the electrode pad region EP.
[0241] Referring to FIG. 33c, a transparent electrode layer 529 may be formed on the second conductive type semiconductor layer 27 of the light emitting regions LE1, LE2. The transparent electrode layer 529 may have a symmetrical structure relative to an imaginary line extending along the indented portion 30c. The transparent electrode layer 529 may be formed of ITO or Ni/Au and forms an ohmic contact with the second conductive type semiconductor layer 27.
[0242] Referring to FIG. 33d, an insulation layer 531 is formed on the light emitting structure. The insulation layer 531 covers the transparent electrode layer 529 of the light emitting structure. The insulation layer 531 may also cover side surfaces of the second conductive type semiconductor layer 27 and active layer 25, which are exposed by mesa-etching, and may cover a sidewall of the hole 23a. In addition, the insulation layer 531 is subjected to a patterning process to form openings 531a, which expose the transparent electrode layer 529 on light emitting regions LE1, LE2, via photolithography and etching. The openings 531a exposing the transparent electrode layer 529 may be symmetrically formed parallel to each other. Further, the regions 30a, 30b, 30c of the first conductive type semiconductor layer 23, on which the first electrode pad 535, first lower extension 535a and second extension 535b will be respectively formed, are also exposed therethrough. In addition, the substrate 21 may be exposed in the electrode pad region EP. Alternatively, the insulation layer 531 may cover the bottom of the hole 23a, so that the electrode pad region EP can be covered with the insulation layer 531.
[0243] Referring to FIG. 33e, the first electrode pad 535, first lower extension 535a and second extension 535b are formed on the exposed regions of the first conductive type semiconductor layer 23 of the light emitting structure. Further, a second electrode pad 733 is formed on the electrode pad region EP, and upper extensions 533a are formed in the openings 531a. Further, connectors 533b are formed to connect the second electrode pad 733 to the upper extensions 533a.
[0244] The upper extensions 533a may be connected to the transparent electrode layer 529 and be formed parallel to the first lower extension 535a. As a result, a light emitting diode is fabricated as shown in FIG. 31.
[0245] In the present exemplary embodiment, the light emitting structure is divided into the two light emitting regions LE1, LE2, but is not limited thereto. The light emitting structure may be divided into more than two light emitting regions. Further, although the transparent electrode layer 529 is formed after mesa-etching in the present exemplary embodiment, the mesa-etching may be carried out after formation of the transparent electrode layer 529. Moreover, although the hole 23a is formed after mesa-etching in the present exemplary embodiment, the mesa-etching may be carried out after formation of the hole 23a.
[0246] As compared with the light emitting diode described with reference to FIGS. 24 and 25, the electrode pad region EP of the present exemplary embodiment isolated from the light emitting structure is formed in the hole 23a of the first conductive type semiconductor layer 23. Accordingly, the second electrode pad 733 is located on the substrate 21 or on the insulation layer 531 on the substrate. The feature of forming the electrode pad region EP in the hole 23a of the first conductive type semiconductor layer 23 may also be applied to the light emitting diodes described with reference to FIGS. 26 and 27.
[0247] FIG. 34 is a plan view of a light emitting diode according to a twenty-third exemplary embodiment of the present invention, and FIGS. 35a, 35b and 35c are cross-sectional views taken along lines A-A, B-B and C-C of FIG. 34, respectively.
[0248] Referring to FIGS. 34, 35a, 35b and 35c, the light emitting diode includes a substrate 21, a light emitting structure including light emitting regions LE1, LE2, a first electrode pad 835, a second electrode pad 833, and upper extensions 833a. Further, the light emitting diode may include a transparent electrode layer 829, an insulation layer 831, connectors 833b, a first lower extension 835a, and a second lower extension 835b. In addition, the light emitting structure includes a first conductive type semiconductor layer 23, an active layer 25, and a second conductive type semiconductor layer 27. Description of the same components as those described in the above exemplary embodiments will be omitted.
[0249] The second conductive type semiconductor layer 27 and active layer 25 of the light emitting structure may be divided to define at least two light emitting regions LE1, LE2. The light emitting regions LE1, LE2 may have a symmetrical structure and the dividing process may be carried out by mesa-etching. Specifically, the first conductive type semiconductor layer 23 is exposed in a region crossing the center of the light emitting structure by mesa-etching to divide the second conductive type semiconductor layer 27 and active layer 25 into the two light emitting regions. Further, side surfaces of the light emitting structure subjected to mesa-etching may be inclined at 30-70 degrees relative to a substrate plane relative to a plane of the substrate 21.
[0250] The region crossing the center of the light emitting structure, that is, at least a portion of the first conductive type semiconductor layer 23 between the light emitting regions is removed to expose a side surface of the first conductive type semiconductor layer 23.
[0251] In addition, a transparent electrode layer 829 may be located on the second conductive type semiconductor layer 27 of the light emitting structure. The transparent electrode layer 529 may be formed of ITO or Ni/Au and forms an ohmic contact with the second conductive type semiconductor layer 27.
[0252] An insulation layer 831 may cover the second conductive type semiconductor layer 27 (or the transparent electrode layer 829) of the light emitting structure. The insulation layer 831 may also cover side surfaces of the second conductive type semiconductor layer 27 and active layer 25, which are exposed by mesa-etching. In addition, the insulation layer 831 may have openings 831a which expose the transparent electrode layer 829 on the light emitting regions LE1, LE2. The transparent electrode layer 829 (or the second conductive type semiconductor layer 27) is exposed through the openings 831a. The insulation layer 831 may be formed of any transparent material, for example SiO2, through which light can be transmitted.
[0253] The first electrode pad 835 and the second electrode pad 833 may be located on the substrate 21. The first electrode pad 835 may be located to face the second electrode pad 833, as shown in FIG. 34. The first and second electrode pads 835, 833 are bonding pads for wire bonding and may have a relatively wide area for wire bonding.
[0254] The first electrode pad 835 may be in contact with the substrate and be connected to a side surface of the first conductive type semiconductor layer 23 of the light emitting structure. Further, the first lower extension 835a may extend from the first electrode pad 835 towards the second electrode pad 833. The first lower extension 835a is located on the substrate 21 and connected to a side surface of the first conductive type semiconductor layer 23. As shown in FIG. 34, the first lower extension 835a may be located between the light emitting regions LE1, LE2 and has a distal end near the second electrode pad 833. The first lower extension 835a may also be in contact with the substrate. In addition, the second lower extensions 835b may extend from the first electrode pad 835 along an edge of the substrate 21. The second lower extensions 835b may also be in contact with the substrate and be connected to the side surface of the first conductive type semiconductor layer 23 of the light emitting structure.
[0255] As the first electrode pad 835, first lower extensions 835a and second lower extensions 835b are connected to the side surface of the first conductive type semiconductor layer 23, carriers may spread in a region of the first conductive type semiconductor layer 23, which is located away from the active layer 25, thereby allowing efficient current spreading within the first conductive type semiconductor layer 23. In addition, as the first electrode pad 835, first lower extensions 835a and second lower extensions 835b are connected to the side surface of the first conductive type semiconductor layer 23, upper surfaces of the first electrode pad 835, first lower extensions 835a and second lower extensions 835b may be located under the active layer 25, which generates light. As a result, light laterally emitted from the active layer 25 may be discharged without being absorbed by the first electrode pad 835, first lower extensions 835a and second lower extensions 835b.
[0256] The second electrode pad 833 is located on the substrate 21 and is isolated from the second conductive type semiconductor layer 27 of the light emitting structure. The second electrode pad 833 may be located away from a side surface of the second conductive type semiconductor layer 27. For example, the second electrode pad 833 may be formed on the substrate 21 exposed through a hole 23a in the first conductive type semiconductor layer 23. In other words, the second electrode pad 833 may be laterally separated from the first conductive type semiconductor layer 23 of the light emitting structure. The second electrode pad 833 may be in contact with the substrate 21 exposed through the hole 23a. Further, an insulation layer 831 may be disposed between the second electrode pad 833 and the substrate 21. Alternatively, the second electrode pad may be formed above the first conductive type semiconductor layer 23 with the insulation layer 831 disposed between the second electrode pad 833 and the first conductive type semiconductor layer 23.
[0257] The upper extensions 833a are located on the light emitting regions LE1, LE2. The upper extensions 833a may be electrically connected to the transparent electrode layer 829 (or the second conductive type semiconductor layer 27) via the openings 831a of the insulation layer 831. The second conductive type semiconductor layer 27 may be exposed through the openings 831a, and the upper extensions 833a may be directly connected to the second conductive type semiconductor layer 27. The upper extensions 833a are disposed to allow uniform current spreading in the second conductive type semiconductor layer 27. For example, the upper extensions 833a may extend parallel to each other. The upper extensions 833a may be connected to the second electrode pad 833 via connectors 833b, respectively. The connectors 833b are insulated from the transparent electrode layer 829 (or the second conductive type semiconductor layer 27) by the insulation layer 831. The connectors 833b are insulated from the side surface of the light emitting structure by the insulation layer 831.
[0258] The electrode pads 833, 835, upper extensions 833a, connectors 833b, and first and second lower extensions 835a, 835b may be formed of, but are not limited to, the same material, for example Cr/Au, by the same process. Alternatively, the upper extensions 833a and the second electrode pad 833 may be formed of different materials by different processes.
[0259] In the present exemplary embodiment, the light emitting diode has a symmetrical structure relative to a line crossing the first electrode pad 835 and the second electrode pad 833, for example line B-B of FIG. 34. The divided regions of the transparent electrode layer 829 and the upper extensions 833a may be symmetrically disposed, and the second lower extensions 835b may also be symmetrically disposed. Accordingly, the light emitting diode may exhibit the same luminescence characteristics at both sides of the line crossing the first electrode pad 835 and the second electrode pad 833. As a result, the light emitting structure of the light emitting diode is divided into two light emitting regions, so the light emitting diode can prevent current crowding around a defect such as pin holes or thread dislocations, thereby achieving uniform current spreading.
[0260] FIGS. 36a, 36b, 36c, 36d and 36e are plan views illustrating a method of manufacturing a light emitting diode according to the twenty-third exemplary embodiment. Methods of forming semiconductor layers 23, 25, 27, a transparent electrode layer 829 and an insulation layer 831 are well known in the art and a detailed description thereof will be omitted herein. Any process, known now or not yet known, that can form semiconductor layers 23, 25, 27, a transparent electrode layer 329 and an insulation layer 331, can be used to manufacture the light emitting diode.
[0261] First, referring to FIG. 36a, semiconductor layers including an n-type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 are formed on a substrate 21. Then, the semiconductor layers are subjected to mesa-etching to expose the first conductive type semiconductor layer 23. The semiconductor layers may have inclined surfaces, for example, at 30-70 degrees relative to a substrate plane. Here, as shown in FIG. 34, a region 30a to be formed with a first electrode pad 835, a region 30b to be formed with a first lower extension 835a, and a region 30c to be formed with a second lower extension 835b are exposed on the first conductive type semiconductor layer 23. Here, an upper portion of an electrode pad region EP, on which the second electrode pad will be formed, and the first conductive type semiconductor layer 23 around the electrode pad region EP are exposed by mesa-etching. Accordingly, the second conductive type semiconductor layer 27 and active layer 23 are divided to define two light emitting regions LE1, LE2 by the mesa-etching, and a region between the light emitting regions LE1, LE2 will be formed with the first lower extension 835a.
[0262] Referring to FIG. 36b, the substrate 21 is exposed by etching the exposed first conductive type semiconductor layer 23. As a result, the substrate 21 is exposed on the regions 30a, 30b, 30c, on which the first electrode pad 835, first lower extension 835a and second extension 835b will be respectively formed. Further, a hole 23a may be formed to expose the substrate 21 by etching the first conductive type semiconductor layer 23 of the electrode pad region EP. The hole 23a may be formed greater than the electrode pad region EP to encompass the electrode pad region EP. The hole 23a may be in communication with the region 30b on which the first lower extension 835a will be formed. In this stage, the light emitting structure including the light emitting regions LE1, LE2 is formed.
[0263] Referring to FIG. 36c, a transparent electrode layer 829 may be formed on the second conductive type semiconductor layer 27 of the light emitting regions LE1, LE2. The transparent electrode layer 829 may have a symmetrical structure relative to a line crossing the first electrode pad and the second electrode pad. The transparent electrode layer 829 may be formed of ITO or Ni/Au and forms an ohmic contact with the second conductive type semiconductor layer 27.
[0264] Referring to FIG. 36d, an insulation layer 831 is formed on the light emitting structure. The insulation layer 831 covers the transparent electrode layer 829 of the light emitting structure. The insulation layer 831 may also cover side surfaces of the second conductive type semiconductor layer 27 and active layer 25, which are exposed by mesa-etching, and may cover a sidewall of the hole 23a. In addition, the insulation layer 831 is subjected to a patterning process to form openings 831a, which expose the transparent electrode layer 829 on light emitting regions LE1, LE2, via photolithography and etching. The openings 831a exposing the transparent electrode layer 829 may be symmetrically formed parallel to each other. Further, the regions 30a, 30b, 30c of the first conductive type semiconductor layer 23, on which the first electrode pad 835, first lower extension 835a and second extension 835b will be respectively formed, are also exposed therethrough. In addition, the substrate 21 may be exposed in the electrode pad region EP. Alternatively, the insulation layer 831 may cover the bottom of the hole 23a, so that the electrode pad region EP can be covered with the insulation layer 831.
[0265] Referring to FIG. 36e, the first electrode pad 835, first lower extension 835a and second extension 835b are formed on the exposed regions of the substrate 21. Further, a second electrode pad 833 is formed on the substrate 21 of the electrode pad region EP, and upper extensions 833a are formed in the openings 831a. Further, connectors 833b are formed to connect the second electrode pad 833 to the upper extensions 833a.
[0266] The first electrode pad 835, first lower extension 835a and second extension 835b may be connected to the side surface of the first conductive type semiconductor layer 23 of the light emitting structure, and upper surfaces of the first electrode pad 835, first lower extension 835a and second extension 835b may be lower than the height of the active layer 23. Further, the first electrode pad 835, first lower extension 835a and second extension 835b may extend to an upper surface of the first conductive type semiconductor layer 23 exposed by mesa-etching.
[0267] The upper extensions 833a may be connected to the transparent electrode layer 829 and be formed parallel to the first lower extension 835a. As a result, a light emitting diode is fabricated as shown in FIG. 34.
[0268] In the present exemplary embodiment, the light emitting structure is divided into the two light emitting regions LE1, LE2, but is not limited thereto. The light emitting structure may be divided into more than two light emitting regions. Further, although the transparent electrode layer 829 is formed after mesa-etching in the present exemplary embodiment, the mesa-etching may be carried out after formation of the transparent electrode layer 829. Moreover, although the hole 23a is formed after mesa-etching in the present exemplary embodiment, the mesa-etching may be carried out after formation of the hole 23a.
[0269] FIG. 37 is a plan view of a light emitting diode according to a twenty-fourth exemplary embodiment of the present invention.
[0270] In the above exemplary embodiment of FIG. 34, the first and second electrode pads 835, 833 are disposed in a major axis direction of the light emitting diode, and the light emitting regions LE1, LE2 are divided in the major axis direction of the light emitting diode. In the present exemplary embodiment, however, the first and second electrode pads 835, 833 are disposed in a minor axis direction of the light emitting diode, and the light emitting regions LE1, LE2 are divided in the minor axis direction of the light emitting diode. Further, the transparent electrode layers 829, upper extensions 853a and lower extensions 855a are also disposed in a symmetrical structure relative to a line crossing in the minor axis direction of the light emitting diode.
[0271] Here, the upper extensions 853a extend along an edge of the light emitting diode to surround the light emitting diode and include extensions 853b extending inwardly from the edge of the light emitting diode. Lower extensions 555a extend outwardly from the interior of the light emitting diode. Further, the lower extensions 555a may be bifurcated to surround the extensions 553b in associated light emitting regions, respectively. Each of the lower extensions 855a is connected to a side surface of the first conductive type semiconductor layer 23 of the light emitting structure.
[0272] The upper extensions 853a are connected to the transparent electrode layer 829 on the light emitting regions LE1, LE2 through the openings 831a of the insulation layer 831, and connected to the second electrode pad 853 through the connectors 853b. The connectors 853b are insulated from the light emitting structure by the insulation layer 831.
[0273] As described with reference to FIG. 34, the second electrode pad 835 is located on the substrate 21 and isolated from the second conductive type semiconductor layer 27 of the light emitting structure.
[0274] In the present exemplary embodiment, the light emitting diode omits the first lower extension 835a (see FIG. 34), which extends from the first electrode pad 855 to the second electrode pad 853.
[0275] FIG. 38 is a plan view of a light emitting diode according to a twenty fifth exemplary embodiment of the present invention.
[0276] Referring to FIG. 38, the light emitting diode of the present exemplary embodiment is generally similar to the light emitting diode described with reference to FIG. 37. In the light emitting diode of the present exemplary embodiment, however, lower extensions 865a and upper extensions 863a are arranged in a different manner than in the above exemplary embodiment.
[0277] Specifically, the lower extensions 865a extend along an edge of the light emitting diode and are bent to extend inwardly, and the upper extensions 863a include two extensions on each of divided regions of the transparent electrode layer 829, which surround each of the lower extensions 865a extending inwardly.
[0278] The upper extensions 863a are connected to the transparent electrode layer 829 on light emitting regions LE1, LE2 through openings 831a of an insulation layer 831, and are connected to the second electrode pad 853 through connectors 863b. The connectors 863b are insulated from the light emitting structure by the insulation layer 831.
[0279] In a conventional light emitting diode, a second electrode pad may be located on a second conductive type semiconductor layer and electrically connected thereto. As a result, electric current is concentrated around the second electrode pad, thereby inhibiting current spreading. On the contrary, according to exemplary embodiments of the present invention, since the second electrode pad is isolated from a light emitting structure or separated from a second conductive type semiconductor layer of the light emitting structure and a transparent electrode layer, it is possible to prevent current crowding around the second electrode pad. In addition, the light emitting diode according to the exemplary embodiments includes a plurality of first electrode pads to achieve current spreading around the first electrode pads. Further, the light emitting diode according to the exemplary embodiments has plural light emitting regions divided from one another, thereby achieving uniform current spreading over the light emitting regions. Furthermore, the first electrode pad is connected to a side surface of the light emitting structure, thereby achieving efficient current spreading in the first conductive type semiconductor layer. Furthermore, since the first electrode pad is connected to a side surface of the first conductive type semiconductor layer, an upper surface of the first electrode pad may be located under an active layer. Consequently, the light emitting diodes may reduce optical loss by preventing absorption of light into the first electrode pad when light generated from the active layer is emitted through the side surface of the light emitting structure.
[0280] Although the invention has been illustrated with reference to exemplary embodiments in conjunction with the drawings, it will be apparent to those skilled in the art that various modifications and changes can be made in the invention without departing from the spirit and scope of the invention. Therefore, it should be understood that the exemplary embodiments are provided by way of illustration only and are given to provide complete disclosure of the invention and to provide thorough understanding of the invention to those skilled in the art. Thus, it is intended that the invention covers the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
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