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Matched Legal Cases: ['application No. 08', 'application No. 08', 'application No. 08', 'application No. 08', 'application No. 08', 'application No. 08', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09', 'application No. 09']

Patente US6191443 - Capacitors, methods of forming capacitors, and DRAM memory cells - Google PatentesB�squeda Im�genes Maps Play YouTube Noticias Gmail Drive M�s » B�squeda avanzada de patentes | Historial web | Iniciar sesi�n B�squeda avanzada de patentesPatentesCapacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion...http://www.google.es/patents/US6191443?utm_source=gb-gplus-sharePatente US6191443 - Capacitors, methods of forming capacitors, and DRAM memory cells N�mero de publicaci�nUS6191443 B1Tipo de publicaci�nConcesi�n N�mero de solicitud09/033,063 Fecha de publicaci�n20 Feb 2001 Fecha de presentaci�n28 Feb 1998 Fecha de prioridad28 Feb 1998Tambi�n publicado comoUS6400552, US6773981, US20010053057 N�mero de publicaci�n033063, 09033063, US 6191443 B1, US 6191443B1, US-B1-6191443, US6191443 B1, US6191443B1 InventoresHusam N. Al-Shareef, Scott Jeffrey DeBoer, F. Daniel Gealy, Randhir P. S. Thakur Cesionario originalMicron Technology, Inc.Citas de patentes (68), Otras citas (32), Citada por (15), Clasificaciones (15) Enlaces externos: USPTO, Cesi�n de USPTO, EspacenetCapacitors, methods of forming capacitors, and DRAM memory cellsUS 6191443 B1 Resumen Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175� C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode comprises a conductive metal oxide. A more preferred second capacitor electrode comprises a conductive silicon comprising layer, over a conductive titanium comprising layer, over a conductive metal oxide layer. A preferred first capacitor electrode comprises a conductively doped Si-Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.
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