Source: http://www.google.com/patents/US20020052118?ie=ISO-8859-1&dq=6377161
Timestamp: 2014-09-23 05:27:20
Document Index: 270575051

Matched Legal Cases: ['arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15', 'arts 15']

Patent US20020052118 - Method for forming isolation regions on semiconductor device - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsA method for forming an isolation region on a semiconductor substrate with a high yield, comprising partially covering the surface of a semiconductor substrate with an oxidation inhibitor film, depositing a material for side-wall parts on the oxidation inhibitor film and also on an exposed region of...http://www.google.com/patents/US20020052118?utm_source=gb-gplus-sharePatent US20020052118 - Method for forming isolation regions on semiconductor deviceAdvanced Patent SearchPublication numberUS20020052118 A1Publication typeApplicationApplication numberUS 09/847,274Publication dateMay 2, 2002Filing dateMay 3, 2001Priority dateOct 27, 2000Also published asUS6479397, US6579807, US20020192961Publication number09847274, 847274, US 2002/0052118 A1, US 2002/052118 A1, US 20020052118 A1, US 20020052118A1, US 2002052118 A1, US 2002052118A1, US-A1-20020052118, US-A1-2002052118, US2002/0052118A1, US2002/052118A1, US20020052118 A1, US20020052118A1, US2002052118 A1, US2002052118A1InventorsMotoki KobayashiOriginal AssigneeMotoki KobayashiExport CitationBiBTeX, EndNote, RefManReferenced by (2), Classifications (17), Legal Events (6) External Links: USPTO, USPTO Assignment, EspacenetMethod for forming isolation regions on semiconductor deviceUS 20020052118 A1Abstract A method for forming an isolation region on a semiconductor substrate with a high yield, comprising partially covering the surface of a semiconductor substrate with an oxidation inhibitor film, depositing a material for side-wall parts on the oxidation inhibitor film and also on an exposed region of the surface, which is revealed through an opening of the oxidation inhibitor film, to form side-wall parts at the edge portions of the oxidation inhibitor film, then, removing by a plasma etching process the unnecessary portions of said side-wall material deposited on the oxidation inhibitor film and on the exposed region of the substrate and leaving intact the side-wall parts at the edge portions of the oxidation inhibitor film, and cleaning the exposed region on the surface of the semiconductor substrate, revealed through the opening of the oxidation inhibitor film, before subsequent heat treatment to generate a field oxide film. Images(7) Claims(5)
What is claimed is: 1. A method for forming an isolation region made of a field oxide film generated by thermal oxidation of an exposed region of the surface of a semiconductor substrate partially covered by an oxidation inhibitor film, comprising the steps of: partially covering the surface of said semiconductor substrate with an oxidation inhibitor film; depositing a material for side-wall parts on said oxidation inhibitor film and on an exposed region of said surface revealed through an opening of said oxidation inhibitor film to form side-wall parts at edge portions of said oxidation inhibitor film by a material having the same function as said oxidation inhibitor film; then, removing by a plasma etching process unnecessary portions of said side-wall material deposited on said oxidation inhibitor film and on said exposed region of said semiconductor substrate and leaving intact said side-wall parts at the edge portions of said oxidation inhibitor film; and carrying out a cleaning process on said exposed region on the surface of said semiconductor substrate, revealed through the opening of said oxidation inhibitor film, before performing subsequent heat treatment to generate a field oxide film. 2. A method for forming an isolation region according to claim 1, wherein said cleaning process is a dry etching process chiefly using radicals. 3. A method for forming an isolation region according to claim 1, wherein said cleaning process is a wet etching process using an etchant. 4. A method for forming an isolation region according to claim 1, further comprising the steps of: before depositing a material for said side-wall parts, covering said exposed region on the surface of said semiconductor with an oxide film; and after said unnecessary portions of said side-wall material are removed, removing said oxide film covering said exposed region by carrying out said cleaning process on said exposed region. 5. A method for forming an isolation region made of a field oxide film generated by thermal oxidation of an exposed region of the surface of a semiconductor substrate partially covered by an oxidation inhibitor film, comprising the steps of: partially covering the surface of said semiconductor with an oxidation inhibitor film, the surface of said oxidation film being covered by a protective film; depositing a material for side-wall parts on said oxidation inhibitor film and on an exposed region of said surface, revealed through an opening of said oxidation inhibitor film, to form side-wall parts at edge portions of said oxidation inhibitor film by a material having the same function as said oxidation inhibitor film; then, by a plasma etching process, removing unnecessary portions of said side-wall material deposited on said protective film and on said exposed region on said semiconductor surface and leaving intact said side-wall parts at the edge portions of said oxidation inhibitor film; and carrying out heat treatment on said semiconductor substrate to generate said field oxide film. Description
BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a method for manufacturing a semiconductor device, such as a semiconductor integrated circuit, and more particularly to a method for forming isolation regions to delimit active regions on a semiconductor substrate. [0003] 2. Prior Art [0004] To electrically isolate the active regions, where semiconductor devices, such as transistors, are formed, on a silicon semiconductor substrate for example, isolation regions made of silicon oxide are generally formed, and semiconductor devices are formed as required in the active regions delimited by the isolation regions. [0005] One of the above-mentioned methods for forming an isolation region is the LOCOS isolation process. According to this process, the surface of a silicon semiconductor substrate is partially covered with an oxidation inhibitor film formed by a silicon nitride film, for example, which has been patterned, and the regions of the surface of the semiconductor substrate which are exposed through the openings of the oxidation inhibitor film can be oxidized locally by thermal oxidation. Therefore, isolation regions are formed by a field oxide film made of silicon oxide generated by the oxidation process mentioned above. [0006] Incidentally, as an improved type of the LOCOS process, there is the FLOCOS (Flamed LOCOS) process. According to this proior improved technique, side-walls are provided at the edge portions of a patterned opening in an oxidation inhibitor film to enable patterning of finer patterns in an oxidation inhibitor film than specified in the design rule applicable to patterning of oxidation inhibitor films, so that finer isolation regions can be obtained than are specified in the pattern design rule. Moreover, it becomes possible to inhibit the so-called bird's beak of the isolation region from encroaching into the active region. [0007] However, in the conventional FLOCOS isolation process in which side-walls are provided for the oxidation inhibitor film, even if heat treatment is carried out on the semiconductor substrate to oxidize the region of the surface of the semiconductor substrate which is exposed through the opening of the oxidation inhibitor film, it often happens that the exposed region is not oxidized and therefore an oxide film for use as the isolation region cannot be grown sufficiently. Such a situation is often encountered when isolation regions made of a field oxide film are to be located less densely and secluded from one another. [0008] The object of the present invention is to provide an isolation-region forming method by which isolation regions can be formed with a higher yield than before even when the isolation regions are formed sparsely. SUMMARY OF THE INVENTION [0009] The present invention derived from a basic concept that effects by the deposit, which builds up on the exposed region, should be precluded from heat treatment of the exposed region to generate a field oxide film. This concept was developed from a viewpoint as follows: an insufficient growth of the field oxide film on the exposed region of the surface of the semiconductor substrate, revealed through an opening of the oxidation inhibitor film, in heat treatment of the semiconductor substrate is caused by part of the material for the oxidation inhibitor film building up on the exposed region when the unwanted side-wall material is removed in the formation of the side-walls on the oxidation inhibitor film by the plasma etching process prior to the heat treatment. [0010] According to an aspect of the present invention, there is provided a method for forming an isolation region made of a field oxide film generated by thermal oxidation of an exposed region of the surface of a semiconductor substrate partially covered by an oxidation inhibitor film, comprises partially covering the surface of the semiconductor substrate with an oxidation inhibitor film; depositing a side-wall material on the oxidation inhibitor film and on an exposed region of the surface, revealed through an opening of the oxidation inhibitor film, to form side-wall parts at edge portions of the oxidation inhibitor film by a material having the same function as the oxidation inhibitor film; then, removing by a plasma etching process, unnecessary portions of the side-wall material deposited on the oxidation inhibitor film and on the exposed region of the semiconductor substrate and leaving intact the side-wall parts at the edge portions of the oxidation inhibitor film; and carrying out a cleaning process on the exposed region of the surface of the semiconductor substrate, revealed through an opening of the oxidation inhibitor film, before performing subsequent heat treatment to generate a field oxide film. [0011] According to a second aspect of the present invention, after unnecessary portions of the side-wall material deposited on the oxidation inhibitor film and on the exposed region of the semiconductor substrate are removed, leaving intact the side-wall parts at the edge portions of the oxidation inhibitor film, a cleaning process by an etching process is carried out on the exposed region of the surface of the semiconductor substrate, revealed through an opening of the oxidation inhibitor film, before subsequent heat treatment is performed to generate a field oxide film. [0012] According to a third aspect of the present invention, even if part of the material for the oxidation inhibitor film builds up on the exposed region when the plasma etching process is performed to form the side walls, after removal of the unnecessary side-wall material by the plasma etching process, by the cleaning process performed on the exposed region on the surface of the semiconductor substrate prior to the heat treatment, the deposit may be removed securely from the exposed region, and by the heat treatment on the cleaned semiconductor substrate, an isolation region made of a field oxide film may be formed on the exposed region with a high yield. [0013] According to a fourth aspect of the present invention, as an etching process to be used for removal of the deposit, it is possible to adopt a dry etching process chiefly using radicals or a wet etching process using an etchant. By an etching process such as these, the deposit may be removed securely without having particles of the material of the deposit re-accumulate on the exposed region. [0014] According to a fifth aspect of the present invention, before depositing a material for the side-wall parts, covering the exposed region on the surface of the semiconductor may be covered by an oxide film and after the unnecessary portions of the side-wall material are removed, the oxide film covering the exposed region may be removed by carrying out the cleaning process on the exposed region. Thus, the deposit from the oxidation inhibitor film that accumulates on the oxide film may be removed together with the oxide film. [0015] According to a sixth aspect of the present invention, another method for forming an isolation region made of a field oxide film generated by thermal oxidation of an exposed region of the surface of a semiconductor substrate partially covered by an oxidation inhibitor film, comprises partially covering the surface of the semiconductor with an oxidation inhibitor film, the surface of the oxidation film being covered by a protective film; depositing a material for side-wall parts on the oxidation inhibitor film and on an exposed region of the surface, revealed through an opening of the oxidation inhibitor film, to form side-wall parts on edge portions of the oxidation inhibitor film by a material having the same function as the oxidation inhibitor film; then, by a plasma etching process, removing unnecessary portions of the side-wall material deposited on the protective film and on the exposed region on the semiconductor surface and leaving intact the side-wall parts on the edge portions of the oxidation inhibitor film; and carrying out heat treatment on the semiconductor substrate to generate the field oxide film. [0016] According to a seventh aspect of the present invention, in the one other method mentioned above, when the unnecessary side-wall material which is not required to form the side wall parts is removed, the protective film covering the oxidation inhibitor film protects the oxidation inhibitor film beneath the protective film from the plasma etching process carried out for the removal, with the result that part of the material for the oxidation inhibitor film is prevented from building up on the exposed region. [0017] Therefore, in heat treatment to generate the field oxide film, the growth of the field oxide film on the exposed region on the surface of the semiconductor substrate is not limited by the deposit unlike in the prior art, so that the field oxide film can be grown securely and the isolation region made of this field oxide film can be grown with a high yield.
BRIEF DESCRIPTION OF THE DRAWING [0018] The present invention will be understood more fully from the detailed description and the accompanying drawings below of the preferred embodiments of the invention. [0019] FIGS. 1(a) to 1(h) show the manufacturing steps of a method for forming an isolation region according to a first embodiment of according to the present invention; [0020] FIGS. 2(a) to 2(g) show the manufacturing steps of a method for forming an isolation region according to a second embodiment of according to the present invention; and [0021] FIGS. 3(a) to 3(g) show the manufacturing steps of a method for forming an isolation region according to a third embodiment of according to the present invention.
DESCRIPTION OF THE EMBODIMENTS [0022] Preferred embodiments of the present invention will be described with reference to the accompanying drawings. [0023] <Embodiment 1>
[0024] FIGS. 1(a) to 1(h) show a first embodiment of the method for forming an isolation region according to the present invention. [0025] In the example illustrated, as a semiconductor substrate 10, a well-known SOI substrate is used. As shown in FIG. 1(a), the SOI substrate 10 includes a silicon semiconductor crystal plate 10 a, an electrically-insulating layer 10 b called a BOX layer, which is an electrically-insulating layer of silicon oxide, formed on the silicon semiconductor crystal plate, and a silicon crystal layer 10 c called an SOI layer, which is deposited on the BOX layer 10 b . [0026] To form an isolation region conforming to a desired pattern on the surface of the substrate 10, an oxidation inhibitor film conforming to a desired pattern to partially expose only the region of the surface, where an isolation region is to be created, is formed on the substrate 10, namely, on the SOI layer 10 c. [0027] Further, to form an oxidation inhibitor film conforming to the desired pattern, as shown in FIG. 1(b), a silicon nitride layer 12 is formed by CVD for example on the SOI layer 10 c of the substrate 10 through the intermediary of a pad layer 11 of silicon oxide. [0028] The pad film 11, as is well known, serves to lessen the distortion by a difference in thermal expansion between the SOI layer 10 c as the surface layer of the substrate 10 and the silicon nitride layer 12 covering the SOI layer in heat treatment of the substrate 10, which will be described later. [0029] As shown in FIG. 1(c), a resist film 13 patterned to cover the active region of the desired pattern is formed by a well-known lithographcal technique. The exposed region 14 of the silicon nitride layer 12 revealed through an opening of the resist film 13 and the pad film 11 beneath the exposed region are partially removed by a well-known dry etching process using an etching gas and the resist film 13 as the etching mask. [0030] By this drying etching process, the silicon nitride film 12 a is formed in the desired pattern defined by the resist 13, and the SOI layer 10 c of the substrate 10 is partially exposed through the opening of the remaining silicon nitride film 12 a on the SOI layer after the patterning mentioned above. [0031] As shown in FIG. 1(d), to form side-wall parts on the patterned silicon nitride film 12 a, a silicon nitride film layer 15 with a substantially uniform thickness is formed by CVD, for example, on the silicon nitride film 12 a and on the exposed region 14 of the SOI layer 10 c which is revealed through an opening of the silicon nitride film 12 a. [0032] To form the side-wall parts covering the edge portions of the silicon nitride film 12 a by removal of unnecessary portions of the silicon nitride film 15 made of a side-wall material, a plasma etching process called reactive ion etching is performed, as is well known, by holding the reactive gas in a plasma state and irradiating the ionized gas to an object by electric field effect. [0033] By the above plasma etching process, as shown in FIG. 1(e), the unnecessary portions of the side-wall material 15, specifically, one on the exposed region 14 of the SOI layer 10 c revealed through the opening of the silicon nitride film 12 a and the other portion on the silicon nitride film 12 a, are removed. Therefore, well-known side-wall parts 15 a, made of the same material as with the silicon nitride film 12 a and covering the edge portions of the silicon nitride film 12 a, are formed above the exposed region 14 of the SOI layer 10 c. [0034] After the side-wall parts 15 a are formed, the substrate 10 is heat-treated to thermally oxidize the exposed region through the opening of the silicon nitride film 12 a. Prior to this heat treatment, the exposed region 14 undergoes a cleaning process in the above-mentioned method according to the present invention. [0035] As the above cleaning process of the exposed region 14 of the SOI layer 10 c, the exposed region is cleaned by an etching process. [0036] For this etching process, a dry etching system is employed which uses an etching gas. By the etching process using the dry etching system, the very thin layer on the surface of the SOI layer 10 c is removed. For this purpose, as the etching system, a down-flow plasma etching system is desirably employed which chiefly uses radicals. [0037] An example of operating conditions of the down-flow plasma etching system is as follows. [0038] As etching gases, O2/CF4 were supplied at 60 sccm/100 sccm to the etching chamber. The pressure of the etching chamber was 1.0 mTorr. The high frequency output (RF power) was 300 W. The etching process time was 9 sec. [0039] The etching conditions are not limited to the values shown in the above example, but may be selected suitably in such a range as not causing a severe damage to the exposed region 14. [0040] In stead of the above dry etching process, the exposed region 14 may be cleaned by a wet etching process using an etchant, such as phosphoric acid. [0041] For this wet etching, a well-known dip-type draft system may be used. By the draft system, the exposed region 14 can be subjected to an etching process for 3 minutes by using phosphoric acid at 140� C., for example. By the etching process under this condition, the exposed region can be cleaned without removing the side-wall parts 15 a. [0042] The etching conditions are not limited to the values shown in the above example, but may be selected suitably in a range that allows the exposed region 14 to be cleaned without removing the side-wall parts 15 a. [0043] By the dry etching or wet etching process mentioned above, the exposed region 14 of the SOI layer 10 c is cleaned. [0044] After the exposed region is cleaned by the etching process, when the substrate 10 is heat-treated, as shown in FIG. 1(f), the exposed region 14 revealed through the opening of the silicon nitride film 12 a is, as it is oxidized, transformed into a region of silicon oxide continuous to the pad film 11 of silicon oxide while on the contrary the portion of the SOI layer 10 c of silicon crystal, located beneath the silicon nitride 12 a, is not oxidized owing to the well-known silicon nitride film's function to inhibit the growth of an oxide film. [0045] However, in the prior art that performs heat treatment without carrying out the cleaning process on the exposed region 14 by etching as mentioned above, as described when reference was made to the prior art, the exposed region could not oftentimes be exposed sufficiently. [0046] In the plasma etching process for forming the side-wall parts 15 a as described with reference to FIG. 1(e), a large quantity of side-wall material, that is, silicon nitride adhering to the silicon nitride film 12 a floats in the plasma atmosphere, and part of the suspended nitride particles accumulates on the exposed region 14 as shown by n imaginary line 16 in FIG. 1(e). The nitride deposit 16 is considered to inhibit the oxidation and growth of oxide of the SOI layer 10 c at the exposed region in the subsequent heat treatment. [0047] The dry etching process performed to clean the exposed region is an etching process using chiefly radicals. Therefore, compared with the plasma etching process to form the side-wall parts 15 a, the suspended particles, which result in the formation of the nitride 16, do not fall and build up so much as during the formation of the side-wall parts 15 a, so that the exposed region 14 can be cleaned properly. [0048] After the side-wall parts 15 a were formed by the plasma etching process as mentioned above, before the cleaning process was carried out on the exposed region 14, the surface of the exposed region 14 was observed under a fluoroscopic electron microscope. However, the deposit 16 could not be detected in a quantity large enough to clearly determine its presence, nor could the presence of a nitride deposit that inhibits the growth of an oxide film be confirmed. [0049] However, the phenomenon that sufficient oxidation and oxide growth on the exposed region is not observable becomes more notable as the surface area of the silicon nitride film 12 a considered to be the cause of the deposit becomes wider with respect to the area of the exposed region 14, in other words, as the exposed regions 14 are provided less densely or in a more mutually secluded layout. By cleaning of the exposed region 14 by etching according to the present invention, the exposed region 14 can be oxidized securely. From these facts, it is considered that the nitride 16, which inhibits the oxidation and its growth, builds up on the exposed region 14, and that the deposit 16 is removed from the exposed region 14 by the cleaning process. [0050] In the process of growing the silicon oxide 17 by heat treatment, the side-wall parts 15 a are formed on the edge portions of the silicon nitride film 12 a. Therefore, as is well known, the silicon oxide 17 can be made smaller in size by the thickness according to the thickness of the side-wall parts 15 a than the minimum feature size of the silicon nitride film 12 a specified by the design rule, which was applied in patterning of the resist 13. The side-wall parts suppresses the bird's beak, which is known to occur in during the formation of the silicon oxide 17. [0051] After the formation of the silicon oxide 17, as shown in FIG. 1(g), the silicon nitride 12 a and the side-wall parts 15 a are removed. When the pad film 11 is exposed accordingly, the pad film 11 and the surface portion of the silicon oxide 17 continuous to the pad film 11 are removed by using a well-known etchant, the surface portion being removed by the amount corresponding to the thickness of the pad film 11. By the etching process, the isolation region 17 a, made of the remainder of the silicon oxide 17 and referred to as the field oxide film, is formed in the SOI layer 10 c of the substrate 10 as shown in FIG. 1(h). [0052] According to the method of the present invention, as described above, after the side-wall parts 15 a are formed at the edge portions of the silicon nitride film 12 a, by performing the cleaning process on the exposed region 14 through the opening of the oxidation inhibitor film 12 a on the substrate, the substance (16) inhibiting the thermal oxidation can be removed from the exposed region 14. Therefore, by the subsequent heat treatment, the field oxide film can be grown securely on the exposed region 14. [0053] <Embodiment 2>
[0054] By covering the exposed region 14, which receives a cleaning process, with an oxide film in advance, the nitride 16 that will build up on the oxide film can be removed with the oxide film when removing the oxide film. [0055] Referring to FIG. 2(a), as in FIG. 18(c) of the first embodiment, after a silicon nitride layer 12 is formed on the substrate 10 through the intermediary of the pad film 11, by a selective etching process using the resist 13 patterned on the silicon nitride layer, the exposed region of the silicon nitride film 12 through the opening of the resist 13 and the pad film 11 beneath the exposed region are partially removed. [0056] By a partial removal of the pad film 11 by the above-mentioned selective etching process, the SOI layer 10 c as the surface of the substrate 10 is partially exposed, and an oxide film 11 a with a thickness of 10 nm, for example, covering the exposed region 14 is formed by heat treatment on the exposed region 14, the oxide film being continuous to the remainder of the pad film 11 as shown in FIG. 2(b). [0057] Subsequently, a side-wall material 15 the same as the one described with reference to FIG. 1(d) in the first embodiment is deposited on the oxide film 11 a covering the exposed region 14 of the SOI layer 10 c and on the patterned silicon nitride film serving as an oxidation inhibitor film 12 a as shown in FIG. 2 [0058] After the side-wall parts 15 are deposited, as shown in FIG. 2(d), the side-wall parts 15 a are formed, which covers the edge portions of the silicon nitride film 12 a, by a plasma etching process the same as that described with reference to FIG. 1(e). [0059] By the earlier-mentioned plasma etching process for forming the side-wall parts 15 a, a silicon nitride film material 16 is deposited on the oxide film 11 a covering the exposed region 14 of the SOI layer 10 c. Prior to the heat-treatment, a wet etching process using fluoric acid as an etchant, for example, is carried out on the exposed region 14, the oxide film 11 a is removed, and the deposit 16 on the oxide film 11 a is removed together with the oxide film 11 a. [0060] Therefore, by performing the cleaning process by a wet etching technique using fluoric acid on the exposed region 14, the cleaned SOI layer 10 c, in other words, free of the nitride 16, is exposed through the opening of the silicon nitride film 12 a, and by the heat-treatment described with reference to the first embodiment, silicon oxide 17 can be grown securely on the exposed region 14 as shown in FIG. 2(e). [0061] After the silicon oxide is formed, as in the first embodiment and as shown in FIG. 2(f), the silicon nitride film 12 a and the side-wall parts 15 a are removed. Thus, when the pad film 11 and the pad film 11 and the surface portion of the silicon oxide 17 continuous to the pad film 11 are removed by a conventional etching process such as has been used, the surface portion of the silicon oxide 17 being removed by the amount corresponding to the thickness of the pad film 11. Therefore, an isolation region 17 a, which is the same as has been shown in the first embodiment, is obtained as shown in FIG. 2(g). [0062] In the second embodiment that has been described, description has been made of a case where in a selective etching process using the resist 13, by partially removing the pad film 11, part of the SOI layer 10 c is exposed temporarily as shown in FIG. 2(a), and after this, the oxide film 11 a covering the exposed region 14 is formed as shown in FIG. 2(b). Instead of forming the oxide film 11 a, after removing the silicon nitride film 12 by the above-mentioned selective etching process, by terminating the selective etching before the etching reaches the pad film 11, without partially removing the pad film 11, the portion of the pad film 11 which covers the exposed region 14 can be used as the above-mentioned oxide film. [0063] However, because it is difficult to perform specified patterning of the silicon nitride film 12 to leave only the pad film 11 intact by the selective etching process, it is desirable to remove the silicon nitride film 12 and remove the pad film 11 partially by the selective etching process to temporarily and partially expose the SOI layer 10 c and then form an oxide film 11 a that covers this exposed region 14. [0064] <Embodiment 3>
[0065] To show an example of a third embodiment of the present invention, in the above-mentioned plasma etching process for forming the side-wall parts 15 a, the silicon nitride film 12 a, which is the origin of the deposit 16 on the exposed region 14 of the SOI layer 10 c, is covered with a protective film to inhibit the occurrence of the deposit 16. [0066] In the third embodiment, as shown in FIG. 3(a), a silicon oxide film 12 is formed, through the intermediary of the pad film 11 of silicon oxide, on the SOI layer 10 c of the substrate 10, and then a protective film 18 of silicon oxide is formed to a thickness of not more than 100 nm, for example, by CVD the same as has been described above. [0067] A resist 13 is formed with a desired pattern just as illustrated in the first and second embodiments on the protective film over the silicon nitride film 12 as shown in FIG. 3(b). [0068] By a dry etching process using the resist 13 as the etching mask, the exposed region of the protective layer 18 which is not protected by the resist 13 and the silicon nitride film 12 and the pad film 11 under the exposed region are partially removed one layer after another. By this partial removal, the SOI layer 10 c is partially exposed through the opening of the silicon nitride film 12 a covered by the protective film 18 a as the remainder of the protective film 18 patterned. [0069] After the exposed region 14 is formed, when a side-wall material 15 is deposited on the exposed region 14 of the SOI layer 10 c of the substrate 10, as shown in FIG. 3(c), the side-wall material 15 is deposited on the silicon nitride film 12 as well as on the exposed region 14 just as in the embodiments mentioned above. In the third embodiment, however, because the silicon nitride film 12 a is covered by the protective film 18 a, the side-wall material 15 builds up on the protective film 18 a, not directly on the silicon nitride film 12 a. [0070] After the side-wall material 15 is deposited, by the same plasma etching process as that described above, as shown in FIG. 3(d), out of the side-wall material, its unnecessary portion on the exposed region 14 and the other unnecessary portion on the protective film 18 that covers the silicon nitride film 12 a are removed barring the portion required to form the side-wall parts 15 a. [0071] In this plasma etching process, because the protective film 18 a of silicon oxide on the silicon nitride film 12 a serves as an etching stopper, the underlying silicon nitride film 12 a is protected from the plasma etching. [0072] Therefore, when those unnecessary portions of the side-wall material 15 are removed from the exposed region 14 and from the protective film 18 a, the silicon nitride film 12 a are protected from etching. For this reason, it never occurs that the silicon nitride film material 16 drifts in the plasma atmosphere in a large quantity�large enough to allow a considerable quantity of deposit 16 to builds up to inhibit the thermal oxidation of the exposed region 14 in heat treatment that follows the plasma etching process. Thus, the deposit 16 is prevented from accumulating on the exposed region 14 of the SOI layer 10 c. [0073] Therefore, as shown in FIG. 3(e), after the side-wall parts 15 a are formed and after the protective film 18 a has been removed from the silicon nitride film 12 a with an etchant containing fluoric acid, for example, the substrate 10 is oxidized thermally, which securely causes oxidation of the exposed region 14 of the SOI layer 10 c, and the exposed region 14 becomes silicon oxide 17. [0074] After the silicon oxide 17 is formed, in the same was as in the first and second embodiments, as shown in FIG. 3(f), the silicon nitride film 12 a and the side-wall parts 15 a are removed, which causes the pad film 11 to be exposed, and the pad film 11 and the silicon oxide 17 continuous to the pad film 11 are removed by the same etching process as has been used heretofore, the surface portion being removed by the amount corresponding to the thickness of the pad film 11. Thus, as shown in FIG. 3(g), an isolation region 17 a is formed, which is the same as those formed in the first and second embodiments. [0075] In the foregoing, description has been made of examples of using the SOI substrate, but the present invention is not limited to this substrate and may be applied to various kinds of semiconductor substrate that can be transformed into an electrically insulating material, such as a silicon crystal substrate, and for the oxidation inhibitor film, its material is not limited to a silicon nitride film, but various kinds of material that inhibit thermal oxidation of the semiconductor substrate may be adopted. [0076] According to the present invention, as has been described, even if, owing to the plasma etching process to form the side-wall parts on the oxidation inhibitor film, particles of the material of the oxidation inhibitor film builds up on the exposed region of the semiconductor substrate which is revealed through an opening of the oxidation inhibitor film, this deposit can be removed from the exposed region by cleaning through an etching process, or the material of the oxidation inhibitor film is prevented from falling and accumulating on the exposed region by the use of a protective film on the oxidation inhibitor film. Therefore, even when the isolation regions are provided mutually secluded from one another, the field oxide film can be grown securely by heat treatment and the isolation regions made of this field oxide film can be formed with a high yield. Referenced byCiting PatentFiling datePublication dateApplicantTitleUS20140203365 *Jan 9, 2014Jul 24, 2014Nxp B.V.Semiconductor deviceEP2757581A1 *Nov 12, 2013Jul 23, 2014Nxp B.V.Semiconductor device* Cited by examinerClassifications U.S. Classification438/696, 257/E21.226, 438/695, 257/E21.228, 257/E21.258, 257/E21.564International ClassificationH01L21/762, H01L21/306, H01L21/32Cooperative ClassificationH01L21/32, H01L21/02046, H01L21/76264, H01L21/76281, H01L21/02052European ClassificationH01L21/762D20, H01L21/32, H01L21/02F2BLegal EventsDateCodeEventDescriptionJun 20, 2014REMIMaintenance fee reminder mailedMar 21, 2014ASAssignmentEffective date: 20111003Owner name: LAPIS SEMICONDUCTOR CO., LTD., JAPANFree format text: CHANGE OF NAME;ASSIGNOR:OKI SEMICONDUCTOR CO., LTD;REEL/FRAME:032495/0483May 3, 2010FPAYFee paymentYear of fee payment: 8Dec 4, 2008ASAssignmentOwner name: OKI SEMICONDUCTOR CO., LTD., JAPANFree format text: CHANGE OF NAME;ASSIGNOR:OKI ELECTRIC INDUSTRY CO., LTD.;REEL/FRAME:022043/0739Effective date: 20081001Owner name: OKI SEMICONDUCTOR CO., LTD.,JAPANFree format text: CHANGE OF NAME;ASSIGNOR:OKI ELECTRIC INDUSTRY CO., LTD.;US-ASSIGNMENT DATABASE UPDATED:20100216;REEL/FRAME:22043/739Apr 14, 2006FPAYFee paymentYear of fee payment: 4May 3, 2001ASAssignmentOwner name: OKI ELECTRIC INDUSTRY CO., LTD., JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KOBAYASHI, MOTOKI;REEL/FRAME:011784/0523Effective date: 20010329Owner name: OKI ELECTRIC INDUSTRY CO., LTD. 7-12, TORANOMON 1-Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KOBAYASHI, MOTOKI /AR;REEL/FRAME:011784/0523RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google