Source: http://www.google.com/patents/US20040239790?ie=ISO-8859-1&dq=5251294
Timestamp: 2015-04-01 04:39:24
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Patent US20040239790 - Image capturing apparatus - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsThe present invention provides an image capturing apparatus capable of realizing both improved operability and higher picture quality. In the case where a sports mode which is mainly selected when the subject is a moving subject is set, at the time of image capturing, by electrically connecting a first...http://www.google.com/patents/US20040239790?utm_source=gb-gplus-sharePatent US20040239790 - Image capturing apparatusAdvanced Patent SearchPublication numberUS20040239790 A1Publication typeApplicationApplication numberUS 10/658,728Publication dateDec 2, 2004Filing dateSep 9, 2003Priority dateMay 30, 2003Publication number10658728, 658728, US 2004/0239790 A1, US 2004/239790 A1, US 20040239790 A1, US 20040239790A1, US 2004239790 A1, US 2004239790A1, US-A1-20040239790, US-A1-2004239790, US2004/0239790A1, US2004/239790A1, US20040239790 A1, US20040239790A1, US2004239790 A1, US2004239790A1InventorsToshihisa Maeda, Ryuichi KitaokaOriginal AssigneeMinolta Co., Ltd.Export CitationBiBTeX, EndNote, RefManReferenced by (14), Classifications (19), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetImage capturing apparatus
BRIEF DESCRIPTION OF THE DRAWINGS [0024]FIGS. 1A to 1C are schematic diagrams showing the appearance of an image capturing apparatus according to a first embodiment; [0025]FIG. 2 is a block diagram showing a functional configuration of the image capturing apparatus; [0026]FIG. 3 is a diagram describing the configuration of a CCD; [0027]FIG. 4 is a diagram showing the structure of a portion around a photoelectric converting part; [0028]FIG. 5 is a diagram showing a potential state of a portion around the photoelectric converting part; [0029]FIG. 6 is a diagram showing a potential state of a portion around the photoelectric converting part; [0030]FIG. 7 is a diagram showing a potential state of a portion around the photoelectric converting part; [0031]FIG. 8 is a diagram showing a potential state of a portion around the photoelectric converting part; [0032]FIG. 9 is a schematic diagram showing a conventional VSUB switching circuit; [0033]FIG. 10 is a schematic diagram showing a VSUB switching circuit according to a first embodiment; [0034]FIG. 11 is a diagram showing parameters of γ correction in a normal image capturing mode; [0035]FIG. 12 is a diagram for describing a loss of a color balance; [0036]FIG. 13 is a diagram showing parameters of γ correction in a sports mode; [0037]FIG. 14 is a diagram for describing correction of a loss of a color balance; [0038]FIG. 15 is a flowchart showing an image capturing operation flow of the image capturing apparatus; [0039]FIG. 16 is a flowchart showing the image capturing operation flow of the image capturing apparatus; [0040]FIG. 17 is a schematic diagram showing a VSUB switching circuit according to a second embodiment; [0041]FIG. 18 is a timing chart showing the relationship between a resistance value r5 and a change in the substrate voltage VSUB; [0042]FIG. 19 is a flowchart showing an image capturing operation of an image capturing apparatus according to the second embodiment; and [0043]FIG. 20 is a flowchart showing the image capturing operation flow of an image capturing apparatus according to a modification.
DESCRIPTION OF THE PREFERRED EMBODIMENTS [0044] Hereinafter, description will be given of embodiments of the present invention with reference to the drawings. 1. First Embodiment [0045] Configuration of Main Components of Image Capturing Apparatus [0046]FIGS. 1A, 1B and 1C are front view, rear view and top view, respectively, each schematically showing the appearance of an image capturing apparatus 1 according to a first embodiment of the present invention. [0047] The image capturing apparatus 1 takes the form of a digital camera. On the front face of the image capturing apparatus 1, a taking lens 10 and a viewfinder window 44 are provided. The taking lens 10 includes a lens system which can be driven along the optical axis direction. By driving the lens system in the optical axis direction, a focus state of an image of the subject formed on a CCD (which will be described later) provided in the image capturing apparatus 1 can be achieved. [0048] On the top face of the image capturing apparatus 1, a mode changeover switch 12, a shutter start button (hereinafter, simply referred to as �shutter button�) 13, and a sports mode button 17 are disposed. [0049] The mode changeover switch 12 is a switch for selectively switching a mode such as an image capturing mode and a reproduction mode. [0050] The shutter button 13 is a button depressed by the user at the time of photographing a subject, thereby giving an image capturing instruction to the image capturing apparatus 1. The shutter button 13 can be set in two depressed states of a lightly pressed state (hereinafter, referred to as �S1 state�) and a fully depressed state (hereinafter, referred to as �S2 state�). In an image capturing standby state, the shutter button 13 is depressed to set the S1 state, thereby executing automatic exposure (AE) control and auto-focus (AF) control which will be described later. Further, when the S2 state is set, an image capturing operation which will be described later is executed. [0051] Each time the sports mode button 17 is depressed, a mode can be sequentially switched between a mode for photographing mainly a stationary subject (hereinafter, referred to as �normal image capturing mode�) and a mode of photographing mainly a moving subject (hereinafter, referred to as a �sports mode�). [0052] In the normal image capturing mode, when the shutter button 13 is depressed to set the S1 state, an AF control (so-called one-shot AF control) for stopping the driving of the taking lens 10 when a focus state on the subject is achieved is performed. On the other hand, in the sport mode, after the shutter button 13 is depressed to set the S1 state, an AF control (so-called continuous AF control) for continuously maintaining a focus state on a subject is performed and a shutter speed to the relatively high side is set. [0053] In the image capturing apparatus 1, on the basis of a setting state of the normal image capturing mode or the sports mode, a control of driving a CCD which will be described later and an image process such as T correction are changed. Changes in the drive control of the CCD and the y correction will be described in detail later. [0054] In a side face of the image capturing apparatus 1, a slot 20 into which a memory card 9 for storing image data captured by an image capturing operation (captured image) performed in association with depression of the shutter button 13 by the user can be inserted is formed. [0055] On the rear face of the image capturing apparatus 1, a liquid crystal display (LCD) 18 for displaying a live view of a subject in a moving mode before image capturing, a captured image and the like, an operation button 15 for changing various setting states of the image capturing apparatus 1 such as shutter speed, and the viewfinder window 44 are provided. [0056] Functional Configuration of Image Capturing Apparatus [0057]FIG. 2 is a block diagram showing the functional configuration of the image capturing apparatus 1. [0058] The image capturing apparatus 1 has an AFE (Analog Front End) 31 connected to a CCD 2 so that data can be transferred, an image processing block 4 connected to the AFE 31 so that data can be transferred, and a control block 5 for controlling those components in a centralized manner. [0059] On the face facing the taking lens 10 of the CCD 2, a light reception part 2 a is provided. In the light reception part 2 a, a plurality of (e.g., 2560�1920) pixels are arranged. When light is incident on the light reception part 2 a via the taking lens 10, the light is photoelectrically converted by the light reception part 2 a and an image signal (video signal) is outputted synchronously with a read signal and a CCD drive signal sent from a timing generator (TG) 32. In the light reception part 2 a, a color filter array corresponding to the pixel array is provided. In the color filter array, color filters of three different primary colors such as red (R), green (Gr, Gb) and blue (B) periodically distributed are disposed in a Bayer method. The configuration of the CCD 2 will be further described later. [0060] The CCD 2 has a mode of reading image signals from the whole pixel array (hereinafter, referred to as �all pixel reading mode�) at the time of capturing an image and a mode of reading image signals from pixels obtained by skipping the whole pixel array to ⅛ in the vertical direction (hereinafter, referred to as �monitoring mode�) at the time of live view displaying in the image capturing standby state. [0061] The AFE 31 is constructed as an LSI (Large Scale Integrated Circuit) having a CDS (Correlated Double Sampling device) 311, a PGA (Programmable-Gain-Amplifier) 312 functioning as an amplifier, and an ADC (A/D converter) 313. An image signal outputted from the CCD 2 is sampled by the CDS 311 on the basis of a sampling signal from the TG 32 and is subjected to desired amplification in the PGA 312. The PGA 312 can change the amplification factor by using numerical data obtained via serial communication from a control block 5. An analog signal amplified by the PGA 312 is converted to a digital signal of 12 bits by the ADC 313 and the digital signal is sent to the image processing block 4. [0062] The image processing block 4 has an image memory 41, an AE/AF/WB computer 42 connected to the image memory 41 so that data can be transferred, and an image processing part 43. [0063] The image memory 41 is, e.g., a semiconductor memory and is a part for temporarily storing image data which is converted to a digital signal by the ADC 313. All of image data of one frame is stored in the image memory 41 and, after that, sent to the image processing part 43. The image data is stored in the image memory 41 and, immediately after that, also sent to the AE/AF/WB computer 42. [0064] The AE/AF/WB computer 42 calculates an AE evaluation value, an AF evaluation value and a white balance (WB) evaluation value on the basis of image data sent from the image memory 41. [0065] In the case where the shutter button 13 enters the lightly pressed state (S1 state), the AE/AF/WB computer 42 calculates an average value of all of pixel values of G color of image data sent from the image memory 41 as a luminance value of the subject, i.e., an AE evaluation value. The AE/AE/WB computer 42 calculates an evaluation value (AF evaluation value) as a sum of the absolute value of the difference of pixel values regarding neighboring pixels with respect to data corresponding to a predetermined area out of image data of one frame stored in the image memory 41. Further, the AE/AF/WB computer 42 calculates a WB evaluation value by integrating pixel values (luminance values) for each of R, G and B colors with respect to the image data sent from the image memory 41. [0066] The AE, AF and WB evaluation values calculated by the AE/AF/WB computer 42 are sent to the control block 5. [0067] The image processing part 43 performs an interpolating process based on the color filter characteristics of the CCD 2 on monochromatic image data (monochromatic information constructed only by luminance) sent from the image memory 41, thereby converting the monochromatic image data into color image data. The image processing part 43 performs various image processes such as automatic white balance (AWB) correction for obtaining desired color balance, γ correction for obtaining natural tone, and a filter process for performing contour emphasis and saturation adjustment. Herein, the AWB correction is made, γ correction and the like is made and, subsequently, color processing (so-called pixel interpolation) is performed. [0068] An image processed by the image processing part 43 is displayed on the LCD 18 or stored in the memory card 9. Further, the image stored in the memory card 9 can be reproduced and displayed on the LCD 18. [0069] The control block 5 has a control part 51 and an operation part 52 connected to the control part 51 so that data can be transferred. [0070] The operation part 52 is constructed by various operation members such as the mode changeover switch 12, shutter button 13, sports mode button 17, and operation button 15. When the user operates the operation part 52, various modes and the like can be set. Various mode setting states are controlled and managed by the control part 51. [0071] The control part 51 is a part having a CPU and a memory and controlling the components of the image capturing apparatus 1 in a centralized manner. For example, on the basis of the AE, AF and WB evaluation values sent from the AE/AF/WB computer 42, the control part 51 transmits, as optimized set values, a signal of a gain setting in the PGA 312 as a processing part in the pre-stage, a signal of image process setting in the image processing part 43 as a processing part in the post-stage, and an AF drive control signal of a lens unit in the taking lens 10. [0072] The control part 51 performs gain setting on the PGA 312 and adjustment of exposure time (shutter speed) and an aperture at the time of image capturing or live view display (monitoring of a subject). Further, the control part 51 drives and controls the CCD 2 via the TG 32 and realizes switching of a substrate voltage in the CCD 2 which will be described later. [0073] Switching of Substrate Voltage in CCD [0074] Configuration of CCD [0075]FIG. 3 is a diagram showing the configuration of the CCD 2. [0076] The CCD 2 is constructed as a solid-state image capturing device of an interline transfer type all-pixel reading type (progressive type). The CCD 2 has: a pixel matrix Mt in which photoelectric converting parts (pixels) 21 (21R, 21Gr, 21Gb, 21B) for receiving reflection light (incident light) from a subject and performing photoelectric conversion are arranged; a read gate 23 for transferring each of signal charges accumulated in the pixel matrix Mt to a vertical transfer CCD 22; a horizontal CCD transfer gate 25 for transferring the signal charge vertically transferred by the vertical transfer CCD 22 to a horizontal transfer CCD 24; and an output amplifier 26 for outputting the signal charge transferred to the horizontal transfer CCD 24. [0077] The photoelectric converting part 21 is divided into pixels 21R having a color filter of red (R) color, pixels 21Gr and 21Gb having a color filter of green (G) color, and a pixel 21B having a color filter of blue (B) color. The pixels 21 are arranged in the vertical and horizontal directions in the pixel matrix Mt. [0078] The horizontal CCD transfer gate 25 selectively transfers a plurality of signal charges related to each pixel line LG in the horizontal direction transferred from the pixel matrix Mt to the vertical transfer CCD 22 to the horizontal transfer CCD 24. [0079] Structure in Portion Around Photoelectric Converting Part in CCD [0080]FIG. 4 is a diagram showing the structure in a portion around the photoelectric converting part 21 of the CCD 2. [0081] As shown in FIG. 4, a p-type semiconductor (P-well) 6E is formed on an n-type semiconductor substrate (n-substrate) 6F and a photo diode part 6D taking the form of a pn junction diode is formed on the p-type semiconductor 6E. When reflection light (incident light) from the subject is incident on the photo diode part 6D, the light is photoelectrically converted by the photo diode part 6D and a signal charge is accumulated. In order to prevent incident light from entering the portion other than the photo diode part 6D and from performing unnecessary photoelectric conversion, an aluminum (Al) shielding film 70 is formed so as to cover the portion other than the photo diode part 6D of the light reception part 2 a of the CCD 2. Further, between the photo diode part 6D and a vertical transfer CCD 6B for a pixel adjacent to the photo diode part 6D, a channel stop 6A of which potential is maintained low by increasing the amount of impurity is formed in such a manner that the signal charge does not leak. In other words, a charge accumulation device (herein, the photo diode part 6D) is electrically inserted between the n-substrate 6F and the charge transfer path (herein, the vertical transfer CCD 6B). [0082] When a field shift pulse voltage (φSG) is applied to a transfer electrode (P�Si electrode) 80, the potential of a channel part 6C made of p+ semiconductor disposed between the photo diode part 6D and the vertical transfer CCD 6B fluctuates and signal charges accumulated in the photo diode part 6D move to the vertical transfer CCD 6B. After that, by applying a drive pulse potential (φV) to the P�Si electrode 80, a vertical transfer operation of the signal charges in the vertical transfer CCD 6B is performed and the signal charges are sequentially outputted. [0083] Potential State of Photoelectric Converting Part [0084] FIGS. 5 to 8 are diagrams each showing the state of potential in a portion around the photoelectric converting part. Parts 6A to 6F in FIGS. 5 to 8 show the potential states of the channel stop 6A, vertical transfer CCD 6B, channel part 6C, photo diode part 6D, P-well 6E and n-substrate 6F shown in FIG. 4, respectively. [0085] In FIGS. 5 to 8, the potential of the channel stop 6A is shown as φ0, the potential of the channel part 6C is expressed as φ1, the potential of the photo diode part 6D is expressed as φ3, the potential of the P-well 6E is expressed as φ2, and the potential of the n-substrate 6F is expressed as φSUB. Herein, φ0 is designed so as to be almost 0 (ground level) and each of potentials φ1 to φ3 and φSUB indicates a value of which reference is the ground (GND) level. In the following, the potential difference between the ground level and the potential φSUB of the n-substrate 6F will be also referred to as the substrate voltage VSUB. [0086] When the electrostatic capacity of the pn junction diode of the photo diode part 6D is expressed as C, at the time of photoelectric conversion, the maximum charge amount Qmax accumulated in the photo diode part 6D is expressed as Qmax=C(φ3−φ2). In the case where an amount of incident light is excessive, the amount of signal charges generated by the photoelectric conversion exceeds the amount of charges which can be held by the photo diode part 6D and the signal charges overflows to the peripheral portion. When the overflowed signal charges flow into the vertical transfer CCD 6B, blooming occurs. [0087] Therefore, usually, in order to prevent occurrence of blooming, the potentials in the channel part 6C and the p-well 6E are set so as to satisfy the relationship of φ2>φ1, and it is designed to perform so-called overflow drain of draining signal charges overflowed from the photo diode part 6D by excessive photoelectric conversion from the n-substrate 6F side (FIG. 6) Because of such a concept, the potential φ2 of the p-well 6E is called an overflow barrier (OFB) potential. [0088] In order to increase the maximum charge amount Qmax (i.e., dynamic range) of the photo diode part 6D, it is necessary to set the OFB potential φ2 as low as possible. Conventionally, a method of decreasing the potential φSUB (i.e., the substrate voltage VSUB) applied to the n-substrate 6F and lowering the OFB potential φ2 is used (FIG. 7). However, when the OFB potential φ2 is lowered and the relationship of φ2<φ1 is satisfied, if the amount of signal charges exceeds the maximum capacity of the photo diode part 6D, the signal charges are saturated and overflowed to the vertical transfer CCD 6B (FIG. 8). [0089] Consequently, in order to prevent occurrence of blooming in an image captured by the image capturing operation, at the time of the image capturing, it is necessary to drive the vertical transfer CCD 6B just before the field shift pulse voltage (φSG) is applied and to preliminarily eliminate unnecessary signal charges overflowed to the vertical transfer CCD 6B. [0090] However, in a reading mode (monitoring mode) requiring a high frame rate (e.g., {fraction (1/30)} second) for live view display (motion image display) or the like, there is no time to eliminate unnecessary signal charges overflowed in the vertical transfer CCD 6B in advance. Consequently, in the monitoring mode, in order to prevent occurrence of blooming, the substrate voltage VSUB should not be switched. [0091] Generally, switching of the substrate voltage VSUB is limited to the time of capturing a still image in which time for eliminating unnecessary charges in the vertical transfer CCD 6B in advance can be provided. [0092] Substrate Voltage Switching Circuit [0093] Next, description will be given of a circuit for switching the substrate voltage VSUB (hereinafter, referred to as �VSUB switching circuit�). First, description will be given of an example of a conventional VSUB switching circuit 900 and its problem. After that, description will be given of a VSUB switching circuit 100 according to the first embodiment. [0094] Conventional VSUB Switching Circuit [0095]FIG. 9 is a schematic diagram showing the conventional VSUB switching circuit 900. In FIG. 9, only main components of the VSUB switching circuit 900 are shown in a simplified manner. [0096] The VSUB switching circuit 900 is constructed by npn type transistors (hereinafter, simply referred to as �transistors�) Tr1 and Tr2, resistors R1 to R5, and a capacitor Cnd. [0097] The base B of the transistor Tr1 is electrically connected to the TG 32 via the resistor R1. Under control of the control block 5, a control signal (Ctr1 signal) of the VSUB switching circuit 900 is given from the TG 32 to the base B. The collector C of the transistor Tr1 is electrically connected to a connection point C3 via the resistor R2. The connection point C3 is electrically connected to a connection point C4 and is also grounded via the resistor R4. The connection point C3 is also grounded via the capacitor Cnd in addition to the resistor R4. The emitter E of the transistor Tr1 is grounded. [0098] The base B of the transistor Tr2 is electrically connected to the connection point C3. The collector C of the transistor Tr2 is connected to a circuit power source (not shown) which gives a voltage VDD of which reference is the GND level. A connection point C2 is provided between the collector C of the transistor Tr2 and the circuit power source. The connection points C2 and C3 are electrically connected to each other via the resistor R3. Between the connection points C2 and C3, the resistor R3 and the transistor Tr2 are electrically connected in parallel. The emitter E of the transistor Tr2 is electrically connected to a connection point C1. The connection point C1 is grounded via the register R5 and is electrically connected to the n-substrate 6F of the CCD 2, and the substrate voltage VSUB of which GND level is used as a reference. [0099] A Ctr1 signal usually enters an OFF state (state where the signal is not given), i.e., at the GND level. At this time, no base current is passed to the transistor Tr1, so that the transistor Tr1 is in the OFF state, i.e., the state where no emitter current flows. In this case, the substrate voltage VSUB is determined by the base voltage of the transistor Tr2, i.e., a voltage dividing ratio between the resistors R3 and R4 of the voltage VDD. [0100] On the other hand, when the Ctr1 signal is set to the ON state (state where the Ctr1 signal is given), a base current flows in the transistor Tr1 and the transistor Tr1 enters the ON state, i.e., an emitter current flows. In this case, the base voltage of the transistor Tr2 decreases according to change in the voltage dividing ratio due to the resistor R2 and, as a result, the substrate voltage VSUB can be reduced. [0101] By turning on/off the Ctr1 signal to decrease the substrate voltage VSUB, the OFB potential φ2 is set low and the maximum charge amount Qmax of the photo diode part 6D can be increased. In other words, by changing the substrate voltage VSUB, a barrier voltage (herein, OFB potential φ2) between the n-substrate 6F and the photo diode part 6D can be controlled. [0102] In the following, the state where the substrate voltage VSUB is decreased will be referred to as a �state where the VSUB switching circuit is ON (driven state)� and the state where the substrate voltage VSUB is not decreased will be referred to as a �state where the state where the VSUB switching circuit is OFF (non-driven state)� in some cases. [0103] The time required for change in the substrate voltage VSUB by ON/OFF of the Ctr1 signal (hereinafter, referred to as �VSUB switch response time�) depends on response characteristic of the transistor Tr2 and a resistance value of the resistor R5 electrically connected to the emitter E side of the transistor Tr2. At present, in a general CCD image capturing device generally used for a digital camera, the transistor Tr2 as a main part and the like in the VSUB switching circuit 900 is disposed in the CCD image capturing device, so that it is not easily replaced/changed. In the case of using a general CCD image capturing device, therefore, in order to reduce the VSUB switch response time, the resistance value of the resistor R5 is reduced. [0104] However, when the resistance value of the resistor R5 is reduced, current passing through the transistor Tr2 increases at the time of switching the substrate voltage VSUB, and an amount of heat generation in a portion from the transistor Tr2 to the resistor R5 increases. Particularly, in a case of, for example, photographing a subject of low luminance requiring exposure for a long time, local heat noise occurs in the photoelectric converting part disposed near the transistor Tr2, and it might cause dark current and, further, deterioration in picture quality. Consequently, there is a problem that the resistance value of the resistor R5 cannot be decreased unnecessarily. [0105] VSUB Switching Circuit According to First Embodiment [0106]FIG. 10 is a schematic diagram showing the VSUB switching circuit 100 according to the first embodiment. The VSUB switching circuit 100 is obtained by adding a switch SW1 for masking the Ctr1 signal to the VSUB switching circuit 900 shown in FIG. 9. The other part of the VSUB switching circuit 100 is substantially the same as the VSUB switching circuit 900. Similar parts will be designated by similar reference numerals and their description will not be repeated. Only the different part will be described. [0107] As shown in FIG. 10, the switch SW1 is electrically connected to the base B side of the transistor Tr1 via the resistor R1. The switch SW1 is provided with three terminals TO, TA and TB. The state can be switched between a state where the terminals TO and TA are electrically connected to each other (hereinafter, referred to as �state A�) and a state where the terminals TO and TB are electrically connected to each other (hereinafter, referred to as �state B�). The switch between the states A and B is controlled on the basis of a drive signal from the TG 32 under control of the control part 51. [0108] The resistor R1 and the terminal TO are electrically connected to each other, the terminal TA is electrically connected to the TG 32 and, under control of the control block 5, the Ctr1 signal is given from the TG 32. Further, the terminal TB is grounded and its potential is set to the GND level. That is, in the VSUB switching circuit 100, according to an object of image capturing, whether the operation of switching the substrate voltage VSUB by switching the states A and B in the switch SW1 is performed or not can be selectively set. [0109] That is, the VSUB switching circuit 100 can be set to the ON or OFF state, in other words, a valid state or invalid state under control of the control part 51. In the switch SW1, in a normal state, the terminals TO and TB are electrically connected. Under control of the control part 51, at the time of image capturing, the terminals TO and TA are electrically connected to each other according to the object of image capturing, thereby setting the VSUB switching circuit 100 in the ON state (drive state). [0110] For example, in the case of photographing a moving subject, in order to prevent an opportunity to take a good picture from being missed, the switch SW1 is always set in the state B and the transistor Tr1 is set to the OFF state (i.e., the VSUB switching circuit 100 is set to the OFF state), thereby preventing occurrence of waiting for VSUB switching response time and suppressing a release time lag. The Ctr1 signal is always given to the terminal TA in the image capturing operation and, by the switch SW1, whether the signal Ctr1 is given to the base B of the transistor Tr1 or not is adjusted. [0111] Herein, the object of image capturing is determined and the switch SW1 is controlled by the control part 5l. An example of conditions of determining the object of image capturing is a setting state of a sports mode (mode which provides image capturing parameters optimum to photograph a moving subject) which is changed by operation of the operation part 52 by the user. Concretely, in the case where the sports mode is set, the control part 51 switches/sets the switch SW1 to the state B by a control via the TG 32 and, at the time of image capturing, the transistor Tr1 is always in the OFF state so that the substrate voltage VSUB is not switched. [0112] In short, the image capturing apparatus 1 has the VSUB switching circuit 100 capable of switching the substrate voltage VSUB of the CCD 2, and the VSUB switching circuit 100 switches the substrate voltage VSUB. The switch SW1 sets/controls whether the substrate voltage VSUB is switched or not in the image capturing in accordance with the image capturing conditions such as a setting state of the image capturing mode (herein, sports mode). In order words, the switch SW1 is provided so as to be able to control the VSUB switching circuit 100 and selectively inhibits switching of the substrate voltage VSUB in the image capturing operation in accordance with the image capturing conditions. [0113] In other words, under control of the control part 51, the switch SW1 switches/sets the state between the state where the substrate voltage VSUB can be switched and the state where the substrate voltage VSUB cannot be switched, according to the image capturing conditions such as a setting state of the image capturing mode. That is, under control of the control unit 51, according to the image capturing conditions such as a setting state of the image capturing mode, the switch SW1 switches so as to decrease the substrate voltage VSUB at the time of image capturing. [0114] Change in Image Processing [0115] As described above, when photographing is performed without switching the substrate voltage VSUB, the maximum charge amount Qmax accumulated in the photo diode part 6D does not increase. Consequently, the amount of charges dealt by the photoelectric converting part decreases and, as a result, the dynamic range is narrowed. [0116] In order to compensate the narrowing of the dynamic range, for example, by making a parameter of γ correction (curve of γ characteristic) hard, the image processing part 43 performs an image process (herein, γ correction) which does not deteriorates the tone characteristics of the captured image as much as possible. That is, in both of the normal image capturing mode and the sports mode, the γ correction parameter is changed. Specifically, by the control of the control part 51, the image processing part 43 changes the image process (herein, γ correction) for a captured image in accordance with whether the substrate voltage VSUB is changed or not. In other words, by the control of the control part 51, the image processing part 43 changes the image process (herein, γ correction) for a captured image in accordance with the switching state of the substrate voltage VSUB. [0117] Further, in other words, when the state where the substrate voltage VSUB can be switched is set, the image processing part 43 changes the γ correction for a captured image. Specifically, in the case where the substrate voltage VSUB is decreased in the image capturing, the image processing part 43 changes the γ correction for a captured image. [0118]FIG. 11 is a diagram showing a curve CV1 of the γ characteristic (tone converting characteristic) as a parameter of γ correction in the normal image capturing mode. FIG. 11 shows a curve associating pixel values before and after γ correction. The lateral axis denotes the pixel value (numerical value indicating luminance in tone) of digital image data before γ correction. The vertical axis denotes the pixel value of digital image data after γ correction. The curve CV1 shows the relationship of pixel values before and after γ correction. Since image data is converted by the ADC 313 into digital image data of 12 bits, before the γ correction, the maximum pixel value is 4095. By the γ correction, image data is converted to digital image data of 8 bits (having the number of tones of pixel values is 256). [0119] Concretely, tone conversion (γ correction) of enhancing the contrast of luminance from shadow to middle tone and, on the contrary, weakening the contrast of luminance from middle tone to highlight tone is performed. [0120] In the case of performing image capturing without switching the substrate voltage VSUB, the dynamic range is narrowed and, for example, there may be a case such that the pixel value of digital image data before γ correction reaches up to 2000 at the maximum. In such a case, for example, as shown in FIG. 11, the pixel value in the digital image data subjected to γ correction reaches only 210 at the maximum and the tone in the high luminance portion of a captured image cannot be sufficiently expressed. [0121] Further, in the case where the dynamic range is narrowed, if the γ correction parameter in the normal image capturing mode is employed, a phenomenon occurs such that the color balance deteriorates conspicuously by AWB correction in the high luminance portion of a captured image. [0122] Herein, descriptions will be give of a general AWB correction method, loss of color balance caused by the AWB correction in the case where the dynamic range is narrowed, and a method of compensating reduction in the dynamic range and making the color balance proper (change in the γ correction parameter). [0123] General AWB Correcting Method [0124] For example, the AE/AF/WB computer 42 divides an image based on image data inputted from the image memory 41 into 16�12 blocks of the same size. Subsequently, the pixel values of each of R, G and B colors are integrated on the block unit basis, thereby obtaining Rbij, Gbij and Bbij (1≦i≦12, 1≦j≦16). Average values of the Rbij, Gbij and Bbij are computed as WB evaluation values Rs, Gs and Bs, respectively. [0125] In the control part 51, gr=Rs/Gs and gb=Bs/Gs are computed. Further, set values kr and kb of gains of R and B (R gain set value and B gain set value) satisfying the relation of gr�kr=gb�kb=1 are obtained and AWB correction is made in the image processing part 43 every photographing. For example, in the case of Rs:Gs:Bs=3:5:4, gr=3/5 and gb=4/5 are calculated, and the R gain set value kr=5/3 and the B gain set value kb=5/4 are obtained. [0126] Loss of Color Balance Caused by Narrowing of Dynamic Range [0127] Generally, photographing is performed in various compositions. In many cases, a low luminance part (low-luminance subject) and a high luminance part (high-luminance subject such as sky) mixedly exist in an image of one frame. In the following, description will be given of a phenomenon that color balance of a high-luminance portion deteriorates with respect to the case where the R gain set value kr=5/3 and the B gain set value kb=5/4 are computed will be described. [0128]FIG. 12 is a diagram for describing loss of color balance, in which attention is paid to each pixel and pixel values of R, G and B before AWB correction, gain set values, and pixel values of R, G and B after the AWB correction are sequentially shown from above. [0129] For example, before the γ correction, even in the case where the maximum pixel value is 4095 when the substrate voltage VSUB is decreased and image capturing is performed, if image capturing is performed without switching the substrate voltage VSUB, the dynamic range becomes narrow. For example, there may be a case such that the maximum pixel value in image data inputted from the ADC 313 to the image memory 41 is only 2000. [0130] In such a case, as shown in FIG. 12, although the pixel value of G color is supposed to be 2001 or more (e.g., 3000) in a high-luminance portion in image data temporarily stored in the image memory 41, a case such that the pixel value of G color is saturated at 2000 can easily happen. Concretely, for example, it is expected that the pixel values of the high-luminance portion before the AWB correction become like R=1800, G=2000 and B=2000. In such a case, in AWB correction, by the gain set values kr=5/3 and kb=5/4, the pixel values are set as R=3000 (=1800�5/3), G=2000 (=2000�1) and B=2500 (=2000�5/4). [0131] Herein, before the AWB correction, by narrowing the dynamic range in the CCD 2, the maximum pixel value becomes 2000. However, as shown in FIG. 11, the upper limit of the pixel value which can be handled is 4095. Consequently, after the AWB correction, the pixel value of G color remains 2000 as the upper limit of the dynamic range. The pixel values of R and B colors are amplified to values of 2001 or more (herein, R=3000 and B=2500) by the gain set values kr and kb. The pixel values of the high luminance portion should become R=3000, G=3000 and B=2500. Actually, however, by narrowing the dynamic range, the pixel values become R=3000, G=2000 and B=2500. [0132] On the image data subjected to the AWB correction as described above, in the image processing part 43, γ correction according to the curve CV1 indicative of the γ characteristic as shown in FIG. 11 is made. For example, by the γ correction, the pixel values of the high luminance portion should become R=240, G=240 and B=225 which express lightly-reddish white. Actually, however, the pixel values become R=240, G=210 and B=225 by the γ correction. [0133] When the gain set values kr and kb obtained from the whole image of one frame are applied to, for example, a high luminance portion in which the pixel value of G color is saturated, the pixel values of R and B colors become too large with respect to the pixel values of G color. As a result, the high luminance portion becomes a portion in which the R and B colors are enhanced more than an actual subject, and the color balance in the high luminance portion is lost. [0134] Change in γ Correction Parameter [0135] When the sports mode is set, as described above, without switching the substrate voltage VSUB, image capturing is performed. Consequently, the dynamic range is narrowed, and there may be a case such that the maximum pixel value in image data inputted from the ADC 313 to the image memory 41 reaches only 2000. In the following, description will be given of the case where the pixel value in image data inputted from the ADC 313 to the image memory 41 reaches only 2000 at the maximum as an example. [0136]FIG. 13 is a diagram showing a curve CV2 of a γ characteristic as a γ correction parameter in the sports mode. FIG. 13 shows, in a manner similar to FIG. 11, a curve associating pixel values before and after γ correction. The lateral axis denotes the pixel value (numerical value indicating luminance in tone) of digital image data before γ correction. The vertical axis denotes the pixel value of digital image data after γ correction. The curve CV2 shows the relationship of pixel values before and after γ correction. In FIG. 13, for comparison, the curve CV1 of the γ characteristic in the normal image capturing mode shown in FIG. 11 is indicated by a dotted line. [0137] As shown in FIG. 13, a tone conversion characteristic (γ correction characteristic) is provided such that the pixel value after γ correction is 255 in the case where the pixel value before γ correction is 2000 or more, and with respect to pixel values from 0 to 2000, the contrast of luminance from shadow to middle tone is enhanced and, on the contrary, the contrast of luminance from middle tone to highlight tone is weakened. [0138] Specifically, a predetermined pixel value (herein, 2000) or more is converted by γ correction to a predetermined pixel value (herein, 255) as the maximum value in a range of corrected pixel values. A pixel value less than the predetermined pixel value in a range of pixel values less than the predetermined pixel value is subjected to tone conversion such that the contrast of luminance from the shadow to middle tone is enhanced and, on the contrary, the contrast of luminance from the middle tone to the highlight tone is weakened. [0139]FIG. 14 is a diagram for describing correction of loss of color balance, in which attention is paid to each pixel and pixel values of R, G and B before AWB correction, gain set values, pixel values of R, G and B after the AWB correction, and pixel values of R, G and B after γ correction are sequentially shown from above. [0140] Also in the case where the pixel values after AWB correction are R=3000, G=2000 and B=2500 as shown in FIG. 12, by the γ correction according to the γ characteristic as shown in FIG. 13, the pixel values after γ correction are R=255, G=255 and B=255. Although color balance is lost once by AWB correction with respect to a high luminance portion originally close to white color, the color can be converted by the γ correction to a color close to white color. Consequently, the color balance of image data obtained finally can be corrected to proper balance. [0141] As described above, in the sports mode, the maximum pixel value in image data inputted from the ADC 313 to the image memory 41 is 2000. If γ correction is made according to the γ characteristic in the normal image capturing mode, for example, the pixel value of G color reaches only 210 at the maximum, so that the tone in the high luminance portion of a captured image finally obtained cannot be sufficiently expressed. [0142] However, in the case where the image capturing apparatus 1 according to the embodiment is set in the sports mode, γ correction according to the γ characteristic as shown in FIG. 13 is performed so that the maximum pixel value (herein, 2000) in image data inputted from the ADC 313 to the image memory 41 becomes the maximum pixel value (herein, 255) after correction. [0143] Even in the case where the dynamic range is narrowed, captured image data can be expressed by using all range of pixel values after γ correction. In other words, γ correction having the tone converting characteristic which enhances the contrast of luminance (pixel value) is performed on the pixel value of each of color components of image data. As a result, the tone in the high luminance portion of a captured image finally obtained can be sufficiently expressed. [0144] Image Capturing Operation Flow of Image Capturing Apparatus [0145]FIGS. 15 and 16 are flowcharts showing the image capturing operation flow of the image capturing apparatus 1. The operation flow is controlled by the control part 51. When the power source of the image capturing apparatus 1 is turned on in a state where the image capturing mode is set by the mode changeover switch 12 or the image capturing mode is set by the mode changeover switch 12 in a state where the power source of the image capturing apparatus 1 is ON, the image capturing operation flow starts and the program advances to step S1. [0146] In step S1, a monitoring mode is set as the driving mode of the CCD 2, and the program advances to step S2. [0147] In step S2, any of various image capturing modes is set, and the program advances to step S3. Herein, for example, according to an operation of depressing the sports mode button 17, the normal image capturing mode or the sports mode is set. [0148] In step S3, at the time of image capturing, a setting state of the image capturing mode as one of image capturing conditions is detected and whether the sports mode is set or not is determined. If the sports mode is not set but the normal image capturing mode is set, the program advances to step S4. If the sports mode is set, the program advances to step S8. [0149] First, description will be given of the case where the program advances to step S4. [0150] In step S4, the VSUB switching circuit 100 is set to be valid, and the program advances to step S5. At the time of image capturing, a setting is made to turn on the VSUB switching circuit 100, that is, to decrease the substrate voltage VSUB. [0151] In step S5, whether the S1 state is set or not is determined. Herein, if the S1 state is set, the program advances to step S6. If the S1 state is not set, the determining operation in step S5 is repeated until the S1 state is set. [0152] In step S6, AE, AF and AWB are performed, and the program advances to step S7. Since the normal image capturing mode is set, the AF control in this case is so-called one-shot AF control. [0153] In step S7, whether the S2 state is set or not is determined. If the S2 state is set, the program advances to step S12. If the S2 state is not set, the determining operation in step S7 is repeated until the S2 state is set. [0154] Description will be given of the case where the program advances from step S3 to step S8. [0155] In step S8, a setting of invalidating the VSUB switching circuit 100 is made, and the program advances to step S9. In step S8, at the time of image capturing, it is set so that the VSUB switching circuit 100 is in the OFF state, that is, the substrate voltage VSUB is not decreased. [0156] In step S9, whether the S1 state is set or not is determined. If the S1 state is set, the program advances to step S10. If the S1 state is not set, the determining operation in step S9 is repeated until the S1 state is set. [0157] In step S10, AE, AF and AWB are performed, and the program advances to step S11. [0158] In step S11, whether the S2 state is set or not is determined. If the S2 state is set, the program advances to step S12. If the S2 state is not set, the program returns to step S10. That is, the processes in steps S10 and S11 are repeated until the S2 state is set. Specifically, since the sports mode is set, the AF control of maintaining the focus state on the subject (so-called continuous AF control) is performed. For the AE control, shutter speed which is relatively high speed is set. [0159] In step S12, whether a setting of validating the VSUB switching circuit 100 is made or not is determined. If a setting of validating the VSUB switching circuit 100 is made in step S4, the program advances to step S13. If a setting of invalidating the VSUB switching circuit 100 is made in step S8, the program advances to step S15. [0160] In step S13, the VSUB switching circuit 100 is set in the ON state (valid state) and the program advances to step S14. In the case where the image capturing condition in which the normal mode is set is detected in step S3, at the time of image capturing, the substrate voltage VSUB is adjusted so as to be switched from the original substrate voltage VSUB to another substrate voltage VSUB. [0161] In step S14, image processing parameters for the normal image capturing mode (e.g., the γ correction parameter of the γ characteristic shown in FIG. 11) are set, and the program advances to step S21 in FIG. 16. [0162] On the other hand, in step S15, image processing parameters for the sports mode (e.g., the γ correction parameter of the γ characteristic shown in FIG. 13) are set, and the program advances to step S21 in FIG. 16. In this case, the setting is made to invalid the VSUB switching circuit 100, so that the VSUB switching circuit 100 is not set in the ON state (valid state). That is, when the image capturing condition of setting of the sports mode is detected in step S3, at the time of image capturing, the substrate voltage VSUB is adjusted so as to maintain the original substrate voltage VSUB. [0163] In step S21, exposure for forming an optical image of a subject on the light reception part 2 a of the CCD 2 is started, and the program advances to step S22. [0164] In step S22, the all pixel mode is set as the CCD drive mode, and the program advances to step S23. [0165] In step S23, exposure of the CCD 2 is finished, an image signal (signal charge) is read from all of pixels as targets, and the program advances to step S24. Herein, an amplifying process and A/D conversion are performed in the AFE 31 on the image signal read from the CCD 2, and the obtained digital image data (captured image) is temporarily stored into the image memory 41. [0166] In step S24, the image processes such as AWB correction and γ correction are performed by the image processing part 43 on the digital image data stored in the image memory 41, an after view is displayed on the LCD 18, and the program advances to step S25. Herein, γ correction is made according to the image processing parameters set in step S14 or S15. [0167] In step S25, the VSUB switching circuit 100 is returned to the OFF state (invalid state), and the program advances to step S26. [0168] In step S26, in a manner similar to step S1, the drive mode of the CCD 2 is reset to the monitoring mode, and the image capturing operation flow is finished. As long as the image capturing mode is set, after completion of the process in step S26, the program returns to step S1 and, according to whether photographing is performed or not, the processes from step S1 to step S26 are repeated. [0169] As described above, the image capturing apparatus 1 according to the first embodiment controls whether the substrate voltage VSUB is switched or not at the time of image capturing on the basis of the image capturing mode setting state such as the sports mode or normal image capturing mode. Therefore, for example, a special circuit for detecting whether the subject is a moving subject or not and determining whether the substrate voltage VSUB is switched or not is not necessary, so that information for determining whether the substrate voltage VSUB is switched or not can be easily obtained. Since switching of the substrate voltage VSUB at the time of image capturing is selectively inhibited on the basis of the setting state of the image capturing mode, information indicating whether switching of the substrate voltage VSUB has to be inhibited or not can be easily obtained. [0170] Since the image capturing mode is set according to the state of the subject and the intention of the user, in the case of photographing a moving subject, occurrence of a release time lag is suppressed. In the case of photographing a stationary subject, narrowing of the dynamic range is suppressed. That is, while properly reflecting the state of the subject and the intention of the user, whether the substrate voltage VSUB is switched at the time of image capturing or not is controlled. In accordance with the image capturing conditions, switching of the substrate voltage VSUB at the time of photographing is selectively inhibited. [0171] As a result, under the image capturing condition requiring high response to the image capturing operation (herein, the state where the sports mode is set), the operability is improved without switching the substrate voltage VSUB. Under the image capturing condition requiring high picture quality (herein, the state where the normal image capturing mode is set), by switching the substrate voltage VSUB, high picture quality can be achieved. Consequently, both improvement in operability and higher picture quality can be realized. [0172] On the basis of whether the substrate voltage VSUB is switched or not, the image process such as γ correction on a captured image is changed. Specifically, according to whether the substrate voltage VSUB is switched or not, the image process on a captured image is changed. As a result, by compensating an insufficient dynamic range which occurs when the substrate voltage VSUB is high at the time of image capturing, tone in a high luminance portion of a captured image can be sufficiently expressed, and color balance can be assured and optimized. That is, the picture quality of a captured image can be maintained. 2. Second Embodiment [0173] In the image capturing apparatus 1 according to the first embodiment, by controlling whether the substrate voltage VSUB is switched by the VSUB switching circuit 100 or not, both improvement in operability and higher picture quality are realized. In an image capturing apparatus 1A according to a second embodiment, by enabling a resistor of a circuit connected to an emitter electrode of the transistor Tr2 used for a VSUB switching circuit 100A to be switched, response time (i.e., the VSUB switching response time) of the transistor Tr2 is made changeable. As a result, both improvement in operability and higher picture quality are achieved. [0174] VSUB Switching Circuit According to Second Embodiment [0175]FIG. 17 is a schematic diagram showing the VSUB switching circuit 100A according to the second embodiment. Since the configuration of the VSUB switching circuit 100 and that of the VSUB switching circuit 100A are slightly different from each other, parts similar to those of the image capturing apparatus 1 according to the first embodiment are designated by similar reference numerals and their description will not be repeated. Only different parts (part of the VSUB switching circuit 100A shown in FIG. 17) will be described later. [0176] In the VSUB switching circuit 100 according to the first embodiment, the switch SW1 for masking the Ctr1 signal is added to the VSUB switching circuit 900 shown in FIG. 9. As shown in FIG. 17, in the VSUB switching circuit 100A according to the second embodiment, without adding the switch SW1, a switch SW2 capable of changing a resistance value of the resistor R5 (hereinafter, referred to as �resistance change switch�) is added to the connection point C1 of the VSUB switching circuit 900 shown in FIG. 9. The other part is similar to that of the VSUB switching circuit 100 or 900. [0177] As shown in FIG. 17, the resistance change switch SW2 is electrically connected to the connection point C1. The resistance change switch SW2 is provided with n+1 terminals T50, T51, T52, T53, . . . , and T5n. The terminal T50 is electrically connected to the connection point C1. n terminals T51, T52, T53, . . . , and T5n are grounded via resistors R51, R52, R53, . . . , and R5n, respectively. [0178] Resistance values r51, r52, r53, . . . , and r5n of the resistors R51, R52, R53, . . . , and R5n have the relationship of r51<r52<r53< . . . <r5n, and in the resistance change switch SW2, the terminal T50 and any one of the terminals T51, T52, T53, . . . , and T5n can be electrically connected to each other. The connection state in the resistance change switch SW2 is changed based on the control signal Ctr2 from the control part 51. In the following, the resistors R51, R52, R53, . . . , and R5n connected to the terminal T50 will be also called the resistor R5, and the resistance value of the resistor R5 will be also called r5. [0179]FIG. 18 is a timing chart showing the relationship between the resistance value r5 of the resistor R5 and a change in the substrate voltage VSUB. From above, states of the control signal Ctr2 and the substrate voltage VSUB are shown. With respect to the substrate voltage VSUB, changes in the substrate voltage VSUB are shown in the case where the resistance values of R5 are r51, r52, r53, . . . , and r5n. [0180] As shown in FIG. 18, when the Ctr1 signal is set in the ON state (state where the Ctr1 signal is given) at the time of image capturing, in response to this, a base current of the transistor Tr1 flows and the transistor Tr1 enters the ON state, that is, a state where the emitter current flows. In this case, the base voltage of the transistor Tr2 decreases due to a change in a voltage dividing ration by the resistor R2. As a result, the substrate voltage VSUB decreases. [0181] In this case, as shown in FIG. 18, the lower the resistance value r5 of the resistor R5 is, the substrate voltage VSUB decreases in shorter time. Specifically, according to the connection state of the resistance change switch SW2, time necessary for switching the substrate voltage VSUB (herein, VSUB switch response time) is changed. Specifically, the resistance change switch SW2 changes the time necessary for switching the substrate voltage VSUB (herein, VSUB switch response time), and the control part 51 controls a change in the VSUB switch response time at the time of the image capturing on the basis of image capturing conditions such as shutter speed. [0182] In other words, the resistance change switch SW2 can selectively switch the substrate voltage VSUB and the switch response time in the operation of switching the substrate voltage VSUB (herein, the VSUB switch response time) is made variable. The control part 51 changes the VSUB switch response time at the time of image capturing in accordance with the image capturing conditions such as shutter speed. [0183] The lower the resistance value r5 of the resistor R5 becomes, the more current flowing from the transistor Tr2 to a portion around the resistor R5 increases at the time of decreasing the substrate voltage VSUB, and the amount of heat generation around the portion from the transistor Tr2 to the resistor R5 increases. The longer the exposure time is, the more local heat noise occurs in the photoelectric converting part near the resistor R5, so that it tends to deteriorate the picture quality. [0184] In the image capturing apparatus 1A according to the embodiment, in order to suppress deterioration of the picture quality and a release time lag, on the basis of the shutter speed obtained by AE performed prior to the image capturing, the resistance value r5 at the time of the image capturing is changed. [0185] Concretely, when the shutter speed is high (when the shutter speed value is small), it is thought that the exposure time is short and the amount of heat generation near the portion from the transistor Tr2 to the resistor R5 by switching the substrate voltage VSUB is small. Consequently, the connection state of the resistance change switch SW2 is selected so that the release time lag becomes as short as possible and the resistance value r5 becomes a relatively small value. [0186] On the other hand, when the shutter speed is low (when the shutter speed value is large), it is thought that the exposure time is long, a stationary subject is photographed and, further, the release time lag is short relative to the exposure time. Therefore, in such a case, the necessity of shortening the release time lag is not high. Consequently, the connection state of the resistance change switch SW2 is selected so that the amount of heat generation near the portion from the transistor Tr2 to the resistor R5 is suppressed as much as possible and the resistance value r5 becomes a relatively large value. [0187] That is, according to the exposure time (i.e., shutter speed), the resistance value r5 of the resistor R5 is decreased as low as possible within limits at which deterioration in picture quality does not occur. The resistance value r5 of the limits at which deterioration in picture quality does not occur can be obtained by experiments or the like at the stage of designing of the image capturing apparatus 1A. [0188] Image Capturing Operation Flow of Image Capturing Apparatus [0189]FIG. 19 is a flowchart showing an image capturing operation flow of the image capturing apparatus 1A according to the second embodiment. Since steps after step S58 in FIG. 19 are similar to those of the flowchart shown in FIG. 16, their description will not be repeated. In a manner similar to the first embodiment, the operation flow is controlled by the control part 51. When the power source of the image capturing apparatus 1A is turned on in a state where the image capturing mode is set by the mode changeover switch 12 or the image capturing mode is set by the mode changeover switch 12 in a state where the power source of the image capturing apparatus 1A is ON, the image capturing operation flow starts and the program advances to step S51. [0190] For the purpose of making description simpler, it is assumed herein that one-shot AF operation is performed irrespective of the image capturing mode. [0191] In step S51, in a manner similar to step S1 in FIG. 15, the drive mode of the CCD 2 is set to the monitoring mode, and the program advances to step S52. [0192] In step S52, in a manner similar to step S2 in FIG. 15, any of the various image capturing modes is set, and the program advances to step S53. Herein, for example, according to an operation of depressing the sports mode button 17, the normal image capturing mode or the sports mode is set. [0193] In step S53, whether the S1 state is set or not is determined. When the S1 state is set, the program advances to step S54. When the S1 state is not set, the determination operation in step S53 is repeated. [0194] In step S54, AE, AF and AWB are performed and the program advances to step S55. Herein, shutter speed (SS) or the like is determined by the AE. [0195] In step S55, on the basis of the shutter speed (SS) set in step S54, the resistance value r5 is set, and the program advances to step S56. The shutter speed set in step S54 is detected and the resistance value r5 is set. Specifically, the shutter speed determined in step S54 at the time of image capturing is detected. When the first image capturing condition according to the shutter speed is detected, the substrate voltage VSUB is changed from the original substrate voltage VSUB to another substrate voltage VSUB in first response time. On the other hand, when the second image capturing condition according to the shutter speed is detected, the substrate voltage VSUB is adjusted so that the original substrate voltage VSUB is switched to another substrate voltage VSUB is second response time [0196] In step S56, whether the S2 state is set or not is determined. If the S2 state is set, the program advances to step S57. If the S2 state is not set, the determination operation in step S56 is repeated until the S2 state is set. [0197] In step S57, the VSUB switching circuit 100A is set in an ON state (valid state), and the program advances to step S58. Herein, by setting the Ctr1 signal in the ON state, that is, the state where the base current of the transistor Tr1 flows and by setting the transistor Tr1 to the ON state, that is, the state where the emitter current flows, the substrate voltage VSUB is decreased. [0198] In step S58, various image processing parameters (e.g., WB correction value and the like) are set, and the program advances to step S21 in FIG. 16. [0199] In the case where high shutter speed is set, the resistance value r5 is set as low as possible, the substrate voltage VSUB is promptly stabilized in a low state, and the release time lag is shortened. In the case where low shutter speed is set, in order to avoid local picture quality deterioration in a captured image due to temperature rise of the CCD 2 during exposure, the resistance value r5 is set so that the temperature of the CCD 2 is not easily increased, thereby giving priority to maintenance and assurance of the picture quality of a captured image more than shortening of the release time lag. [0200] As described above, in the image capturing apparatus 1A according to the second embodiment, the lower the shutter speed is, the resistance value r5 of the resistor R5 connected to the emitter side of the transistor Tr2 of the VSUB switching circuit 100A is set as low as possible. Specifically, at the time of switching the substrate voltage VSUB so as to be decreased in the image capturing on the basis of the image capturing conditions such as the shutter speed, by changing the amount of current flowing from the transistor Tr2 to the resistor R5 in the VSUB switching circuit 100A, time required to switch the substrate voltage VSUB of the CCD 2 at the time of image capturing (herein, VSUB switch response time) is changed. Therefore, while suppressing deterioration in a captured image due to heat generation near the portion from the transistor Tr2 to the resistor R5, a release time lag can be shortened as much as possible. [0201] That is, by switching the resistance value r5 of the VSUB switching circuit 100A by setting the shutter speed, the release time lag and deterioration in picture quality of a captured image due to temperature rise of the CCD 2 can be balanced. [0202] In other words, according to the image capturing condition (herein, shutter speed), the VSUB switch response time of the substrate voltage VSUB of the image capturing device at the time of image capturing is changed. As a result, in the image capturing condition requesting high response to the image capturing operation (herein, in the case where the shutter speed is high), the VSUB switch response time is shortened, thereby improving operability. In the image capturing condition in which the degree of request of high response to the image capturing operation is relatively low (in the case where the shutter speed is low), the VSUB switch response time is made long and high picture quality can be obtained. Thus, both improved operability and higher picture quality can be satisfied. [0203] In the image capturing apparatus 1A according to the second embodiment, the VSUB switch response time at the time of image capturing is changed according to the shutter speed. The present invention is not limited to the case. For example, on the basis of a set state of the image capturing mode or the like, the resistance value r5 of the resistor R5 can be switched in two levels or the like. 3. Modifications [0204] Although the embodiments of the present invention have been described above, the present invention is not limited to the foregoing description. [0205] For example, in the image capturing apparatus 1 according to the first embodiment, based on the sports mode setting state, the VSUB switching circuit 100 is set in a valid/invalid state. The present invention is not limited thereto. For example, on the basis of the setting state of the image capturing mode such as a quick shot mode in which high shutter speed is set, the VSUB switching circuit 100 may be set in a valid/invalid state. [0206] In the image capturing apparatus 1 according to the first embodiment, based on the setting state of the image capturing mode, the VSUB switching circuit 100 is set to the valid/invalid state. The present invention is not limited thereto. For example, on the basis of the states of the subject like whether the subject is a moving subject or not, the VSUB switching circuit 100 may be set in the valid/invalid state. [0207] Examples of the method of determining whether the subject is a moving subject or not include a method of detecting movement per time of the contrast or luminance pattern of a subject in a live-view image and, in the case where the continuous AF mode is set, a method of detecting a lens drive amount per time of the taking lens for continuously achieving focus on the subject. [0208]FIG. 20 is a flowchart of an image capturing operation flow of an image capturing apparatus according to a modification. Specifically, FIG. 20 shows the image capturing operation flow in the case where the VSUB switching circuit 100 is set in the valid/invalid state on the basis of whether the subject is a moving subject or not. Since processes after step S72 in FIG. 20 are similar to those in the flowchart of FIG. 16, their description will not be repeated. [0209] In a manner similar to the first embodiment, the operation flow is controlled by the control part 51. When the power source of the image capturing apparatus 1 is turned on in a state where the image capturing mode is set by the mode changeover switch 12 or the image capturing mode is set by the mode changeover switch 12 in a state where the power source of the image capturing apparatus 1 is ON, the image capturing operation flow starts and the program advances to step S61. For the purpose of making description simpler, it is assumed herein that continuous AF operation is performed irrespective of the image capturing mode. [0210] In step S61, in a manner similar to step S1 in FIG. 15, the drive mode of the CCD 2 is set to the monitoring mode, and the program advances to step S62. [0211] In step S62, in a manner similar to step S2 in FIG. 15, any of the various image capturing modes is set, and the program advances to step S63. [0212] In step S63, a determination is made to see whether the S1 state is set or not. If the S1 state is set, the program advances to step S64. If the S1 state is not set, the determination operation in step S63 is repeated. [0213] In step S64, AE, AF, AWB, and detection of a moving subject are performed and the program advances to step S65. For example, as described above, by detecting movement per time of a pattern of contrast indicative of a subject in a live view image, whether the subject is a moving subject or not can be detected. [0214] In step S65, whether the subject is a moving subject or not is determined. On the basis of a result of the detection in step S64, if the subject is not a moving subject, the program advances to step S66. If the subject is a moving subject, the program advances to step S67. [0215] In step S66, in a manner similar to step S4 in FIG. 15, a setting of making the VSUB switching circuit 100 valid is made, and the program advances to step S68. [0216] In step S67, in a manner similar to step S8 in FIG. 15, a setting of making the VSUB switching circuit 100 invalid is made, and the program advances to step S68. [0217] In step S68, whether the S2 state is set or not is determined. If the S2 state is set, the program advances to step S69. If the S2 state is not set, the determination operation in step S68 is repeated until the S2 state is set. [0218] In step S68, whether a setting of making the VSUB switching circuit 100 valid is made or not is checked. If the setting of making the VSUB switching circuit 100 valid is made in step S66, the program advances to step S70. If the setting of making the VSUB switching circuit 100 invalid is made in step S67, the program advances to step S72. [0219] In step S70, the VSUB switching circuit 100 is set in the ON state (valid state), and the program advances to step S71. Specifically, in the case where the image capturing condition that the subject is not a moving subject is detected in step S64, at the time of image capturing, adjustment of the substrate voltage VSUB to switch the original substrate voltage VSUB to another substrate voltage VSUB is made. [0220] In step S71, the image processing parameter for photographing a stationary subject (e.g., a parameter of γ correction of the γ characteristic shown in FIG. 11) is set, and the program advances to step S21 in FIG. 16. [0221] On the other hand, in step S72, an image processing parameter for photographing a moving subject (e.g., a parameter of γ correction of the γ characteristic shown in FIG. 13) is set, and the program advances to step S21 in FIG. 16. Since the setting of making the VSUB switching circuit 100 invalid is made herein, the VSUB switching circuit 100 is not set in the ON state (valid state). In the case where the image capturing condition that the subject is a moving subject is detected in step S64, at the time of image capturing, the substrate voltage VSUB is adjusted so as to maintain the original substrate voltage VSUB. [0222] In the case where the subject is a moving subject, it is thought that a priority is assigned to shortening of the release time lag more than the picture quality of a captured image, so that the VSUB switching circuit 100 is set in an invalid state. On the other hand, in the case where the subject is not a moving subject, it is thought that a priority is assigned to maintenance of the picture quality of a captured image more than the release time lag, so that the VSUB switching circuit 100 is set in a valid state. That is, by setting the VSUB switching circuit 100 in a valid/invalid state on the basis of whether the subject is a moving subject or not, both improved operability and higher picture quality are satisfied. [0223] Although the VSUB switching circuit 100 is set in the valid/invalid state on the basis of whether the subject is a moving subject or not in the above, for example, when an image capturing mode such as a sports mode or continuous AF mode is set, the VSUB switching circuit 100 may be set in an invalid state. [0224] In the above-described first embodiment, when the sports mode is set, the VSUB switching circuit 100 is set in an invalid state at the time of image capturing. The present invention is not limited thereto. When the sports mode is set, at the time of image capturing, the resistance value r5 may be decreased. [0225] Although the image processing parameter of γ correction on a captured image is changed on the basis of the sports mode setting state, that is, the valid/invalid setting state of the VSUB switching circuit 100 in the above-described first embodiment, the present invention is not limited thereto. For example, the image processing parameter such as the intensity of an edge emphasizing process on a captured image may be changed according to the sports mode setting state. Concretely, in the case where the sports mode is set, the possibility that the subject is a moving subject is high, so that the degree of the edge emphasizing process may be increased as compared with the case where the normal image capturing mode is set. [0226] Although the shutter speed is obtained by the AE in the above-described second embodiment, the present invention is not limited thereto. The shutter speed may be manually set by operating the operation part 52 by the user. [0227] Obviously, by properly combining the method of setting the VSUB switching circuit 100 in a valid/invalid state in the first embodiment and the method of changing the resistance value r5 in the second embodiment, both improved operability and higher picture quality can be satisfied. [0228] An example of the combination is that in the case where the sports mode is not set, while setting the VSUB switching circuit in a valid state, the resistance value r5 is properly changed on the basis of the shutter speed. [0229] Although the image capturing apparatus using the CCD of the progressive type has been described as an example in the above-described embodiments, the present invention is not limited thereto but, for example, an image capturing apparatus using an interlace type CCD may be employed. [0230] While the invention has been shown and described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous modifications and variations can be devised without departing from the scope of the invention. Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7656450 *Nov 19, 2004Feb 2, 2010Ricoh Company, Ltd.Image capture apparatus which sets a substrate bias voltage of an image sensorUS7817200 *Feb 12, 2007Oct 19, 2010Sony CorporationSolid-state image-capturing device, driving method thereof, camera, electric charge transfer device, driving method and driving device for driving load, and electronic equipmentUS7925149 *Jun 28, 2007Apr 12, 2011Samsung Electronics Co., Ltd.Photographing apparatus and method for fast photographing capabilityUS8102358 *Apr 16, 2007Jan 24, 2012Dell Products L.P.System and method for information handling system LCD white balance alignmentUS8139137 *Nov 15, 2007Mar 20, 2012Novatek Microelectronics Corp.Focusing method, suitable for an image capturing apparatus using in an environment of low brightness and image capturing apparatus using the sameUS8144223Jan 28, 2009Mar 27, 2012Gentex CorporationImaging deviceUS8378284Jan 28, 2009Feb 19, 2013Gentex CorporationImaging deviceUS8411153 *Apr 28, 2010Apr 2, 2013Samsung Electronics Co., Ltd.Camera unit and multimedia information appliance including camera unitUS8735952 *Jul 17, 2007May 27, 2014Sony CorporationSolid-state imaging device and control systemUS20080017901 *Jul 17, 2007Jan 24, 2008Sony CorporationSolid-state imaging device and control systemUS20100302388 *Apr 28, 2010Dec 2, 2010Samsung Electronics Co., Ltd.Camera unit and multimedia information appliance including camera unitUS20110019032 *Dec 31, 2008Jan 27, 2011Rafael Advanced Defense Systems Ltd.Method and apparatus for multi-spectral imagingEP1871095A1 *Mar 31, 2006Dec 26, 2007Olympus CorporationImaging taking system, and image signal processing programWO2010087881A1 *Oct 19, 2009Aug 5, 2010Gentex CorporationImproved imaging device* Cited by examinerClassifications U.S. Classification348/311, 348/241, 348/E05.036, 348/223.1, 348/E05.034, 348/254International ClassificationH04N5/335, H04N5/353, H04N5/372, H04N5/376, H04N5/235, H04N5/232, H04N101/00Cooperative ClassificationH04N5/2352, H04N5/23245, H04N5/235European ClassificationH04N5/232R, H04N5/235C, H04N5/235Legal EventsDateCodeEventDescriptionSep 9, 2003ASAssignmentOwner name: MINOLTA CO., LTD., JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MAEDA, TOSHIHISA;KITAOKA, RYUICHI;REEL/FRAME:014478/0703Effective date: 20030901RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services