Source: http://www.google.com/patents/US7315265?dq=patent:5567455
Timestamp: 2013-12-10 18:18:56
Document Index: 50096253

Matched Legal Cases: ['Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60']

Patent US7315265 - Double data rate serial encoder - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Advanced Patent Search | Sign inAdvanced Patent SearchPatentsA double data rate serial encoder is provided. The serial encoder comprises a mux having a plurality of inputs, a plurality of latches coupled to the inputs of the mux, an enabler to enable the latches to update their data inputs, and a counter to select one of the plurality of inputs of the mux for...http://www.google.com/patents/US7315265?utm_source=gb-gplus-sharePatent US7315265 - Double data rate serial encoderPublication numberUS7315265 B2Publication typeGrantApplication numberUS 11/285,397Publication dateJan 1, 2008Filing dateNov 23, 2005Priority dateNov 24, 2004Fee statusPaidAlso published asUS20060179384Publication number11285397, 285397, US 7315265 B2, US 7315265B2, US-B2-7315265, US7315265 B2, US7315265B2InventorsGeorge Alan Wiley, Brian Steele, Curtis D. MusfeldtOriginal AssigneeQualcomm IncorporatedExport CitationBiBTeX, EndNote, RefManPatent Citations (29), Non-Patent Citations (2), Referenced by (3), Classifications (11), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetDouble data rate serial encoderUS 7315265 B2Abstract A double data rate serial encoder is provided. The serial encoder comprises a mux having a plurality of inputs, a plurality of latches coupled to the inputs of the mux, an enabler to enable the latches to update their data inputs, and a counter to select one of the plurality of inputs of the mux for output. In another aspect, the mux provides a glitch-less output during input transitions. The mux includes an output selection algorithm optimized based on a priori knowledge of an input selection sequence provided by the counter.
Output = (sn(2) AND sn(1) AND sn(0) AND d(0)) OR (sn(2) AND sn(1) AND s(0) AND d(1)) OR (sn(2) AND s(1) AND sn(0) AND d(2)) OR (sn(2) AND s(1) AND s(0) AND d(3)) OR (s(2) AND sn(1) AND sn(0) AND d(4)) OR (s(2) AND sn(1) AND s(0) AND d(5)) OR (s(2) AND s(1) AND sn(0) AND d(6)) OR (s(2) AND s(1) AND s(0) AND d(7)) OR (sn(2) AND sn(1) AND d(1) AND d(0)) OR (sn(1) AND sn(0) AND d(4) AND d(0)) OR (sn(2) AND s(0) AND d(3) AND d(1)) OR (sn(2) AND s(1) AND d(3) AND d(2)) OR (s(2) AND sn(1) AND d(5) AND d(4)) OR (s(1) AND sn(0) AND d(6) AND d(2)) OR (s(2) AND s(0) AND d(7) AND d(5)) OR (s(2) AND s(1) AND d(7) AND d(6)); wherein s(n) represents a bit of an input selection value;
CROSS REFERENCE TO RELATED APPLICATIONS The present application claims priority to Provisional Application No. 60/630,853 entitled �MDDI Host Core Design� filed Nov. 24, 2004, Provisional Application No. 60/631,549 entitled �Mobile Display Digital Interface Host Camera Interface Device� filed Nov. 30, 2004, Provisional Application No. 60/632,825 entitled �Camera MDDI Host Device� filed Dec. 2, 2004, Provisional Application No. 60/633,071 entitled �MDDI Overview� filed Dec. 2, 2004, Provisional Application No. 60/633,084 entitled �MDDI Host Core Pad Design� filed Dec. 2, 2004, and Provisional Application No. 60/632,852 entitled �Implementation of the MDDI Host Controller� filed Dec. 2, 2004, and assigned to the assignee hereof and hereby expressly incorporated by reference herein in their entirety.
The present application is also related to commonly assigned U.S. Pat. No. 6,760,772 B2, titled �Generating and Implementing a Communication Protocol and Interface for High Speed Data Transfer�, issued Jul. 6, 2004, the disclosure of which is incorporated herein by reference.
SUMMARY In one aspect of the present invention, a double data rate serial encoder for MDDI is provided. The serial encoder comprises a multiplexer (mux) having a plurality of inputs, a plurality of latches coupled to the inputs of the mux, an enabler to enable the latches to update their data inputs, and a counter to select one of the plurality of inputs of the mux for output.
The embodiment(s) described, and references in the specification to �one embodiment�, �an embodiment�, �an example embodiment�, etc., indicate that the embodiment(s) described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
Alternatively, the host could be a portable entertainment or presentation device such as a portable DVD or CD player, or a game playing device. Furthermore, the host can reside as a host device or control element in a variety of other widely used or planned commercial products for which a high speed communication link is desired with a client. For example, a host could be used to transfer data at high rates from a video recording device to a storage based client for improved response, or to a high resolution larger screen for presentations. An appliance such as a refrigerator that incorporates an onboard inventory or computing system and/or Bluetooth connections to other household devices, can have improved display capabilities when operating in an internet or Bluetooth connected mode, or have reduced wiring needs for in-the-door displays (a client) and keypads or scanners (client) while the electronic computer or control systems (host) reside elsewhere in the cabinet. In general, those skilled in the art will appreciate the wide variety of modern electronic devices and appliances that may benefit from the use of this interface, as well as the ability to retrofit older devices with higher data rate transport of information utilizing limited numbers of conductors available in either newly added or existing connectors or cables. At the same time, an MDDI client may comprise a variety of devices useful for presenting information to an end user, or presenting information from a user to the host. For example, a micro-display incorporated in goggles or glasses, a projection device built into a hat or helmet, a small screen or even holographic element built into a vehicle, such as in a window or windshield, or various speaker, headphone, or sound systems for presenting high quality sound or music. Other presentation devices include projectors or projection devices used to present information for meetings, or for movies and television images. Another example would be the use of touch pads or sensitive devices, voice recognition input devices, security scanners, and so forth that may be called upon to transfer a significant amount of information from a device or system user with little actual �input� other than touch or sound from the user. In addition, docking stations for computers and car kits or desk-top kits and holders for wireless telephones may act as interface devices to end users or to other devices and equipment, and employ either clients (output or input devices such as mice) or hosts to assist in the transfer of data, especially where high speed networks are involved. However, those skilled in the art will readily recognize that the present invention is not limited to these devices, there being many other devices on the market, and proposed for use, that are intended to provide end users with high quality images and sound, either in terms of storage and transport or in terms of presentation at playback. The present invention is useful in increasing the data throughput between various elements or devices to accommodate the high data rates needed for realizing the desired user experience.
The Video Electronics Standards Association (�VESA�) MDDI Standard, which is incorporated herein by reference in its entirety, describes the requirements of a high-speed digital packet interface that lets portable devices transport digital images from small portable devices to larger external displays. MDDI applies a miniature connector system and thin flexible cable ideal for linking portable computing, communications and entertainment devices to emerging products such as wearable micro displays. It also includes information on how to simplify connections between host processors and a display device, in order to reduce the cost and increase the reliability of these connections. Link controllers 140 and 170 establish communication path 105 based on the VESA MDDI Standard.
U.S. Pat. No. 6,760,772, entitled Generating and Implementing a Communication Protocol and Interface for High Data Rate Signal Transfer, issued to Zou et al. on Jul. 6, 2004 ('772 Patent�) describes a data interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for presentation data. Embodiments of the invention taught in the '772 Patent are directed to an MDDI interface. The signal protocol is used by link controllers, such as link controllers 140 and 170, configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through a communications path, such as communications path 105.
The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range �serial� type data link, which lends itself to implementation with miniature connectors and thin flexible cables. An embodiment of link controllers 140 and 170 establishes communication path 105 based on the teachings of the '772 Patent. The '772 Patent is herein incorporated by reference in its entirety.
In the example of FIG. 8, a mux 802 has four data inputs D0, D1, D2, D3 and two select inputs S0 and S1. A first output glitch 804 is due to a transition in the select inputs of the mux. In the example, the input selection sequence {S1, S0} is transitioning from {0,0} to {1,1} in order to change the mux output from D0 to D3. However, due to a skew delay between the �0 to 1� transitions of S0 and S1, the input selection sequence {S1, S0} briefly takes the value {0,1} for which data input D1 is incorrectly selected. A �0� glitch appears at the output of mux 802 when the output should remain at �1� throughout the transition.
Another type of output glitch, illustrated as 806 in FIG. 8, occurs due to transitions in the data inputs of the mux. In the example of FIG. 8, in an input selection cycle, the input selection sequence {S1, S0} transitions from {0,0} to {0,1}. However, due a timing skew between the select signals S1, S0 and the data signal D0, the data signal D0 changes values before the end of its selection period. A �0� glitch appears at the output of mux 802 when the output should remain at �1� throughout the transition. To prevent such glitches at the output of mux 606 of MDDI serial encoder 600, embodiments of the present invention ensure that data inputs to the mux remain stable one clock cycle before being used. This is done by delay matching the paths from the select inputs to the output of mux.
In addition to the two types of mux output glitches illustrated in FIG. 8, yet another type of output glitch can occur at the output of a mux. This type of glitch, typically caused by a timing imbalance between internal signals within the mux itself, causes the mux to select no input during an input transition. As such, whenever the input transition is between data inputs both having the value �1�, glitches of this type may be seen at the output of the mux. To prevent such glitches, the output of mux 606 of MDDI serial encoder 600 is designed such that it remains at �1� throughout any input transition between data inputs both having the value �1� at the time of the transition.
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