Source: http://www.google.com/patents/US7899329?ie=ISO-8859-1&dq=5754119
Timestamp: 2014-07-25 17:31:37
Document Index: 506160253

Matched Legal Cases: ['art 11', 'art 12', 'art 13', 'art 14', 'art 21', 'art 11', 'art 12', 'art 21', 'art 13', 'art 14', 'art 21', 'art 21', 'art 15', 'art 11', 'art 12', 'art 13', 'art 14', 'art 14', 'art 14', 'art 11', 'art 11', 'art 12', 'art 12', 'art 13', 'art 13', 'art 14', 'art 14', 'art 14', 'art 14', 'art 15', 'art 11', 'art 12', 'art 11', 'art 12', 'art 13', 'art 14', 'art 14', 'art 14', 'art 13']

Patent US7899329 - Transmission system and transmission apparatus - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsOn an optical access network, transmission at different bit rates is realized without modifying subscriber units. A low-speed signal generating part generates a low-speed signal having a low bit rate. A high-speed signal generating part generates a high-speed signal having a high bit rate. A recovery...http://www.google.com/patents/US7899329?utm_source=gb-gplus-sharePatent US7899329 - Transmission system and transmission apparatusAdvanced Patent SearchPublication numberUS7899329 B2Publication typeGrantApplication numberUS 12/010,751Publication dateMar 1, 2011Filing dateJan 29, 2008Priority dateFeb 1, 2007Also published asUS20080187317Publication number010751, 12010751, US 7899329 B2, US 7899329B2, US-B2-7899329, US7899329 B2, US7899329B2InventorsTetsuji YamabanaOriginal AssigneeFujitsu LimitedExport CitationBiBTeX, EndNote, RefManPatent Citations (3), Non-Patent Citations (1), Referenced by (4), Classifications (13), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetTransmission system and transmission apparatusUS 7899329 B2Abstract On an optical access network, transmission at different bit rates is realized without modifying subscriber units. A low-speed signal generating part generates a low-speed signal having a low bit rate. A high-speed signal generating part generates a high-speed signal having a high bit rate. A recovery signal generating part generates a recovery signal. A multiplex part generates and sends a multiplexed signal obtained by multiplexing the low-speed signal, the high-speed signal, and the recovery signal. A reception processing part performs processing for receiving the multiplexed signal by extracting clocks from the low-bit-rate signal. When the reception processing part enters a free running state in response to receiving the high-speed signal, the recovery signal generating part generates the recovery signal at a low bit rate in order to recover clock synchronization from the free running state.
a termination unit,
the terminal apparatus including:
a low-speed signal generating part for generating a low-speed signal having a low bit rate;
a high-speed signal generating part for generating a high-speed signal having a high bit rate;
a recovery signal generating part for generating a recovery signal; and
a multiplex part for transmitting a multiplexed signal composed by multiplexing the low-speed signal, the high-speed signal, and the recovery signal,
the termination unit including:
a reception processing part for performing processing for receiving the multiplexed signal by performing clock extraction according to the low bit rate,
wherein the recovery signal generating part generates the recovery signal at the low bit rate so as to recover clock synchronization from a free running state, when the reception processing part enters the free running state of clock in response to receiving the high-speed signal.
2. The transmission system according to claim 1,
wherein the multiplex part adds the recovery signal immediately after the high-speed signal.
3. The transmission system according to claim 1,
wherein the multiplex part adds the recovery signal immediately before the low-speed signal.
4. The transmission system according to claim 1,
wherein the recovery signal generating part generates the recovery signal including a signal in which logic level �0� and logic level �1� are alternately arranged.
5. The transmission system according to claim 1,
wherein the recovery signal generating part generates the recovery signal including a signal interval that (tH/(tH+tL))�100 is 20 to 25(%),
wherein tH represents an interval of the high-speed signal, and tL represents an interval of the low-speed signal.
6. An optical transmission system for transmitting on an optical access network, the optical transmission system comprising:
an optical subscriber-line terminal apparatus; and
a plurality of optical subscriber-line termination unit,
the optical subscriber-line terminal apparatus including:
the optical subscriber-line termination unit including:
the optical subscriber-line termination unit connecting to the optical subscriber-line terminal apparatus through a star coupler,
7. The transmission system according to claim 6,
8. The transmission system according to claim 6,
9. The transmission system according to claim 6,
10. The transmission system according to claim 6,
wherein tH represents an interval of the high-speed signal, and tL represents an interval of the low-speed signal. Description
The present invention relates to transmission systems and a transmission apparatus, and in particular, to a transmission system and a transmission apparatus for transmitting a signal on an optical access network.
In recent years, with widespread use of the Internet, information communication networks have become widely used in homes and companies. Regarding optical access networks, a PON (passive optical network) has come to be widely employed as an optical access system in order to provide a higher-speed, large-capacity service.
FIG. 6 is a block diagram showing the configuration of a PON system 5. The PON system 5 includes an OLT (optical line terminal) 51 provided in a station, a star coupler 52 for performing optical demultiplication and multiplication, and ONUs (optical network units) 53-1 to 53-n provided for subscribers.
The OLT 51 is connected to the ONUs 53-1 to 53-n via the star coupler 52 with optical fibers F in a one-to-n relationship, and optical packet communication is performed between the OLT 51 and the ONUs 53-1 to 53-n. For example, when the OLT 51 transmits 2.5-GHz optical packets as downstream signals, the optical packets are distributed by the star coupler 52 to the ONUs 53-1 to 53-n, and are received by the ONUs 53-1 to 53-n. Japanese Unexamined Patent Application Publication No. 2005-33537 (paragraph numbers [0017] to [0026], FIG. 1) proposes, as a PON system technology of the related art, a technology in which various terminal apparatuses having different speed series can be allocated in the same transmission interval of the PON.
In the PON system 5 shown in FIG. 6, when the OLT 51 sends signals having both a low bit rate and a high bit rate, one ONU, which only responds to a low bit rate, cannot perform normal reception processing. Accordingly, in the PON system of the related art, it is difficult to perform communication by using differing transmission bit rates.
FIG. 7 is an illustration of signal reception processing of an ONU. When an ONU receives an optical packet, the ONU uses CDR (clock data recovery) to perform clock extraction, and reproduces transmitted data.
In addition, a frame transmitted from an OLT includes frame-synchronization managing information and data. In FIG. 7, for example, frame-synchronization managing information 6-1, and data 6-2, 6-3, and 6-5 each have a low bit rate, and data 6-4 has a high bit rate.
When an ONU having a CDR portion for a low bit rate receives the signals shown in FIG. 7, the ONU performs data reception processing while extracting clocks from the frame-synchronization managing information 6-1, and the data 6-2 and 6-3 in accordance with the low bit rate. However, when the ONU receives the data 6-4 having a high speed, the CDR portion enters a free running state. Accordingly, if, after that, the ONU receives low-speed data, clock synchronization becomes unstable. Since, in reception processing performed on the data 6-5, data reproduction is performed at unstable clocks, communication quality deteriorates.
In other words, in the PON system of the related art, when communication is performed by using differing bit rates, deterioration occurs in communication quality. Therefore, when a subscriber requests to upgrade the communication speed, ONUs of all subscribers need to be modified.
By way of example, in a case in which, in FIG. 6, the ONUs 53-1 to 53-n initially comply with 2.5-GHz communication, when it is requested that only the ONU 53-1 be able to respond to 10-GHz high-speed signals, 10-GHz high-speed signals transmitted from the OLT 51 are equally distributed to each ONU by the star coupler 52. Thus, in fact, the other ONUs 53-2 to 53-n also need to be modified to be capable of responding to 10-GHz high-speed signals. However, a necessary communication speed differs for each subscriber. For a subscriber who does not wish for upgrade, upgrade results in an increase in cost.
SUMMARY It is an object of the present invention to provide a transmission system for performing transmission at different bit rates on the same system without adding any modification to a subscriber apparatus.
A transmission system, of the present invention, for performing signal transmission, includes a terminal apparatus and a termination unit. The terminal apparatus includes a low-speed signal generating part for generating a low-speed signal having a low bit rate, a high-speed signal generating part for generating a high-speed signal having a high bit rate, a recovery signal generating part for generating a recovery signal, and a multiplex part for transmitting a multiplexed signal composed by multiplexing the low-speed signal, the high-speed signal, and the recovery signal. The termination unit includes a reception processing part for performing processing for receiving the multiplexed signal by performing clock extraction from a low-bit-rate signal.
When the signal received by the reception processing part changes from a low-speed signal to a high-speed signal, the extracted clock enters a free running state. When the reception processing part enters a free running state in response to receiving the high-speed signal, the recovery signal generating part generates the recovery signal at a low bit rate in order to recover clock synchronization from the free running state.
In a transmission system of the present invention, in a case in which a termination unit that can receive a low-speed signal receives a high-speed signal and a reception processing part enters a free running state; in order to recover clock synchronization from the clock free running state of the termination unit, the terminal apparatus generates a low-bit-rate recovery signal, multiplexes the high-speed signal, the low-speed signal, and the recovery signal, and sends the multiplexed signal. In this manner, even if a high-speed signal is inserted during transmission of low-speed signals, stable communication can be performed, and transmission at different bit rates of high and low bit rates on the same system without adding any modification to a subscriber apparatus.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing the principle of a transmission system;
FIG. 2 is a block diagram showing the configuration of a PON system;
FIG. 3 is a block diagram showing the configuration of an OLT;
FIG. 4 is an illustration of signal reception processing of an ONU;
FIG. 5 is an illustration of signal reception processing of the ONU;
FIG. 6 is a block diagram showing the configuration of a PON; and
FIG. 7 is an illustration of signal reception processing of an ONU.
FIG. 1 is a block diagram showing the principle of a transmission system 1. The transmission system 1 includes a terminal apparatus 10 and a termination unit 20. The terminal apparatus 10 includes a low-speed signal generating part 11, a high-speed signal generating part 12, a recovery signal generating part 13, and a multiplex part 14. The termination unit 20 includes a reception processing part 21.
The low-speed signal generating part 11 generates a low-speed signal having a low bit rate. The high-speed signal generating part 12 generates a high-speed signal having a high bit rate. When the reception processing part 21 enters a free running state in response to receiving a high-speed signal, the recovery signal generating part 13 generates a low-bit-rate recovery signal for recovering clock synchronization from the free running state.
The multiplex part 14 generates and sends a multiplexed signal obtained by multiplexing the low-speed signal, the high-speed signal, and the recovery signal.
Also, the reception processing part 21 in the termination unit 20 performs reception processing by performing clock extraction according to the low bit rate.
Next, the configuration and operation of a PON system 1 a obtained by applying the transmission system 1 to a PON system are described below. FIG. 2 is a block diagram showing the configuration of the PON system 1 a. An OLT 10 a in the PON system 1 a corresponds to the terminal apparatus 10 shown in FIG. 1, and each of ONUs 20 a-1 to 20 a-n corresponds to the termination unit 20 shown in FIG. 1.
The PON system 1 a includes the OLT 10 a, which is provided on a station side, a star coupler 52 for performing optical demultiplication and multiplication, and the ONUs 20 a-1 to 20 a-n (collectively called �ONU 20 a�), which are provided on a subscriber side.
The OLT 10 a is connected to the ONUs 20 a-1 to 20 a-n via the star coupler 52 with optical fibers F in a one-to-n relationship, and optical packet communication is performed between the OLT 10 a and the ONUs 20 a-1 to 20 a-n. For example, each of the ONUs 20 a-1 to 20 a-n includes a CDR portion 21 a (corresponding to the reception processing part 21 shown in FIG. 1) that receives a signal having a low bit rate for 2.5 GHz and performs clock extraction.
FIG. 3 is a block diagram showing the configuration of the OLT 10 a. For example, the bit rate of the low-speed signal has 2.5 GHz, and the bit rate of the high-speed signal has 10 GHz. The OLT 10 a includes a data receiving part 15, a 2.5-GHz data generating part 11 a, a 10-GHz data generating part 12 a, a recovery data generating part 13 a, a multiplexing process part 14 a-1, a header adder part 14 a-2, and a modulation processing part 14 a-3.
The 2.5-GHz data generating part 11 a corresponds to the low-speed signal generating part 11 shown in FIG. 1. The 10-GHz data generating part 12 a corresponds to the high-speed signal generating part 12 shown in FIG. 1. The recovery data generating part 13 a corresponds to the recovery signal generating part 13 shown in FIG. 1. The multiplexing process part 14 a-1, the header adder part 14 a-2, and the modulation processing part 14 a-3 realize a function of the multiplex part 14 shown in FIG. 1.
When receiving data from an external network, on the basis of an instruction from an upper level (not shown), the data receiving part 15 transmits the data to the 2.5-GHz data generating part 11 a or the 10-GHz data generating part 12 a. When receiving the data, the 2.5-GHz data generating part 11 a generates low-speed data having a low bit rate for 2.5 GHz. When receiving the data, the 10-GHz data generating part 12 a generates high-speed data having a high bit rate for 10 GHz.
The recovery data generating part 13 a generates recovery data, having a low bit rate for 2.5 GHz, for recovering clock synchronization before 10-GHz high-speed data is received by the CDR portion 21 a to cause desynchronization. The recovery data includes, for example, a signal string in which zeros and ones are alternately arranged.
The multiplexing process part 14 a-1 multiplexes the low-speed data, the high-speed data, and the recovery data, and the header adder part 14 a-2 adds header information, whereby multiplexed data is generated. Recovery addition has two methods, addition of the recovery data immediately after the high-speed data, and addition of the recovery data immediately before all the low-speed data. The modulation processing part 14 a-3 performs E/O (electrical/optical) conversion on the multiplexed data, modulates the multiplexed data, and outputs the modulated data. The output optical data is distributed to each of the ONUs 20 a-1 to 20 a-n, and reception processing is performed.
Next, signal reception processing of the ONU 20 a is described. In the OLT 10 a, recovery data addition has the two forms shown in FIGS. 4 and 5. Accordingly, each case is described below.
FIG. 4 is an illustration of the signal reception receiving process of the ONU 20 a. FIG. 4 shows processing for receiving multiplexed data in which recovery data is added immediately after high-speed data. When the ONU 20 a receives the multiplexed data, the ONU 20 a uses the CDR portion 21 a to perform clock extraction, and performs data reception.
A frame transmitted from the OLT 10 a includes frame-synchronization managing information, low-speed data, high-speed data, and recovery data. In FIG. 4, each of frame-synchronization managing information 2-1, low-speed data 2-2, 2-3, and 2-6, and recovery data 2-5 is 2.5-GHz data having a low bit rate. High-speed data 2-4 is 10-GHz data having a high bit rate.
When the ONU 20 a that includes the CDR portion 21 a for a low bit rate for 2.5 GHz receives the signal shown in FIG. 4, the ONU 20 a extracts clocks from low-bit-rate signals, that is, the frame-synchronization managing information 2-1, the low-speed data 2-2 and 2-3, and performs data reception processing. Also, when the ONU 20 a receives the high-speed data 2-4, the ONU 20 a cannot extract a low-bit-rate clock. Thus, the CDR portion 21 a enters a free running state and performs the reception processing on the basis of a free running clock.
In addition, since the recovery data, which has a low bit rate, is added immediately after the high-speed data 2-4, when the CDR portion 21 a receives the recovery data 2-5, the CDR portion 21 a extracts a clock from a low-bit-rate signal of the recovery data 2-5. Therefore, clock synchronization is re-established (re-locked) in an interval of the recovery data 2-5. Thus, from the next low-speed data 2-6, low-speed clocks are extracted, with synchronization established, whereby stable data reception processing can be performed.
Here, an interval of the high-speed data 2-4 is represented by t10, and an interval of the recovery data 2-5 is represented by t2.5. In this case, immediately after the high-speed data 2-4, the (low-bit-rate) recovery data 2-5 is added, which has such a signal interval that, for the entirety of the intervals of the high-speed data 2-4 and the recovery data 2-5, the high-speed data 2-4 occupies approximately 75% (=t10/(t10+t2.5))�100) and the recovery data 2-5 occupies approximately 25% (=t2.5/(t10+t2.5)�100). From an experiment result, it is recognized that, in the interval of the recovery data 2-5, the CDR portion 21 a re-locks from free running clocks to low-bit-rate clocks.
Therefore, in general, the recovery data generating part 13 a in the OLT 10 a may generate recovery data having such a signal interval that (tL/(tH+tL))�100 is 20 to 25(%), where tH represents a high-speed data interval, and tL represents a recovery data interval.
FIG. 5 is an illustration of signal reception processing of the ONU 20 a. FIG. 5 shows processing for receiving multiplexed data in which recovery data is added immediately before all low-speed data (the recovery data is inserted as a preamble signal of the low-speed data). When the ONU 20 a receives multiplexed data, the ONU 20 a uses the CDR portion 21 a to perform clock extraction and perform data reproduction.
A frame transmitted from the OLT 10 a includes frame-synchronization managing information, low-speed data, high-speed data, and recovery data. In FIG. 5, for example, each of frame-synchronization managing information 3-1, low-speed data 3-3, 3-4, and 3-7, and recovery data 3-2 and 3-6 is 2.5-GHz data having a low bit rate, and the high-speed data 3-5 is 10-GHz data having a high bit rate.
When the ONU 20 a that includes the CDR portion 21 a for a low bit rate for 2.5 GHz receives the signal shown in FIG. 5, the ONU 20 a extracts clocks from low-bit-rate signals, that is, the frame-synchronization managing information 3-1, the recovery data 3-2, and the low-speed data 3-3 and 3-4, and performs data reception processing. Also, when the ONU 20 a receives the high-speed data 3-5, the CDR portion 21 a enters a free running state, and processing for receiving the high-speed data 3-5 is performed on the basis of free running clocks.
In addition, since the recovery data is added immediately before all the low-speed data, the recovery data 3-6, which has a low bit rate, is positioned immediately after the high-speed data 3-5. When the CDR portion 21 a receives the recovery data 3-6, the CDR portion 21 a extracts a clock from a low-bit-rate signal of the recovery data 3-6. Therefore, clock synchronization is re-established (re-locked) in an interval of the recovery data 3-6. Thus, from the next low-speed data 3-7, low-speed clocks are extracted, with synchronization established, whereby stable data reception processing can be performed.
Similarly to the case of FIG. 4, also in the case of FIG. 5, the recovery data has such a signal interval that (t2.5/(t10+t2.5))�100 is 20 to 25%, where t10 represents a high-speed data interval, and t2.5 represents a recovery data interval. The recovery data are added immediately before the low-speed data.
As described above, according to the present invention, the OLT 10 a generates a low-bit-rate recovery signal for recovering clock synchronization before high-speed data is received by the ONUs 20 a-1 to 20 a-n to cause desynchronization, multiplexes the high-speed data, low-speed data, and recovery data, and sends the multiplexed data to the ONUs 20 a-l to 20 a-n. In addition, when each of the ONUs 20 a-1 to 20 a-n only including the CDRs 21 a for low bit rates receives a high-speed signal, the CDR portion 21 a enters a free running state and performs processing for receiving the high-speed signal on the basis of free running clocks. For a subsequent low-speed signal, reception processing is performed on the basis of clocks stabilized by re-locking based on a recovery signal.
This eliminates an interval in which reception processing is performed on the basis of free running clocks for low-speed signals occupying most of transmitting signals. Thus, even if a high-speed signal is inserted during low-speed signal transmission, stable communication can be performed, thus enabling prevention of deterioration in communication quality.
In addition, by employing the above-described system configuration, by only modifying the OLT 10 a, high-speed and low-speed signals having different bit rates can be transmitted on the same system without adding any modification to the ONUs 20 a-1 to 20 a-n as subscriber units.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS6633541Dec 30, 1999Oct 14, 2003Fujitsu LimitedAscending transmission speed controlling method and communication system in ATM-PON systemJP2000332808A Title not availableJP2005033537A Title not availableNon-Patent CitationsReference1 *S. Kobayashi et al., "Multi-Bit Rate Passive Double Star System Using Time-Unit Packet", Journal of Lightwave Technology, vol. 19, No. 2, Feb. 2001.* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS8199775 *Apr 2, 2008Jun 12, 2012Fujitsu LimitedOptical transmission device and optical transmission methodUS8331402 *Apr 11, 2008Dec 11, 2012Fujitsu LimitedOptical transmission device, scrambling method, and descrambling methodUS8724658May 4, 2012May 13, 2014Fujitsu LimitedOptical transmission device and optical transmission methodUS20080253568 *Apr 11, 2008Oct 16, 2008Fujitsu LimitedOptical transmission device, scrambling method, and descrambling method* Cited by examinerClassifications U.S. Classification398/66, 398/154International ClassificationH04J14/00, H04L12/44Cooperative ClassificationH04J3/0605, H04Q2011/0045, H04J3/22, H04Q11/0067, H04L7/0083, H04J3/1694European ClassificationH04J3/06A1, H04J3/22, H04Q11/00P4CLegal EventsDateCodeEventDescriptionJan 29, 2008ASAssignmentOwner name: FUJITSU LIMITED, JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:YAMABANA, TETSUJI;REEL/FRAME:020506/0247Effective date: 20071107RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google