Source: https://patents.google.com/patent/US20060280231A1/en
Timestamp: 2020-02-17 05:05:45
Document Index: 272494401

Matched Legal Cases: ['Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'Application No. 60', 'art 6900', 'art 7000', 'art 7100', 'art 7200', 'art 7400', 'art 7700', 'art 7800', 'art 8819']

US20060280231A1 - Spread spectrum applications of universal frequency translation - Google Patents
Spread spectrum applications of universal frequency translation Download PDF
US20060280231A1
US20060280231A1 US11/404,957 US40495706A US2006280231A1 US 20060280231 A1 US20060280231 A1 US 20060280231A1 US 40495706 A US40495706 A US 40495706A US 2006280231 A1 US2006280231 A1 US 2006280231A1
US11/404,957
US7599421B2 (en
1999-03-15 Priority to US12437699P priority Critical
1999-04-16 Priority to US12983999P priority
2000-03-14 Priority to US09/525,185 priority patent/US7110435B1/en
2006-04-17 Priority to US11/404,957 priority patent/US7599421B2/en
2006-04-17 Application filed by ParkerVision Inc filed Critical ParkerVision Inc
2006-12-14 Publication of US20060280231A1 publication Critical patent/US20060280231A1/en
2009-08-06 Assigned to PARKERVISION, INC. reassignment PARKERVISION, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CLEMENTS, CHARLES D., LOOKE, RICHARD C., COOK, ROBERT W., HAMILLA, JOSEPH M., RAWLINS, GREGORY S., BULTMAN, MICHAEL J., MOSES, CHARLEY D., JR., RAWLINS, MICHAEL W., SILVER, GREGORY S., SORRELLS, DAVID F.
2009-10-06 Publication of US7599421B2 publication Critical patent/US7599421B2/en
238000001228 spectrum Methods 0 abstract claims description title 258
238000003892 spreading Methods 0 abstract claims description 187
238000006243 chemical reaction Methods 0 abstract claims description 153
230000000051 modifying Effects 0 claims description 295
230000000670 limiting Effects 0 abstract description 16
230000001702 transmitter Effects 0 description 178
238000001914 filtration Methods 0 description 75
230000000630 rising Effects 0 description 26
This application claims the benefit of following: U.S. Provisional Application No. 60/124,376, filed on Mar. 15, 1999; U.S. Provisional Application No. 60/177,381, filed on Jan. 24, 2000; U.S. Provisional Application No. 60/171,502, filed Dec. 22, 1999; U.S. Provisional Application No. 60/177,705, filed on Jan. 24, 2000; U.S. Provisional Application No. 60/129,839, filed on Apr. 16, 1999; U.S. Provisional Application No. 60/158,047, filed on Oct. 7, 1999; U.S. Provisional Application No. 60/171,349, filed on Dec. 21, 1999; U.S. Provisional Application No. 60/177,702, filed on Jan. 24, 2000; U.S. Provisional Application No. 60/180,667, filed on Feb. 7, 2000; and U.S. Provisional Application No. 60/171,496, filed on Dec. 22, 1999.
“Applications of Universal Frequency Translation,” Ser. No. 09/261,129, filed Mar. 3, 1999;
“Method, System, and Apparatus for Balanced Frequency Up-Conversion of a Baseband Signal,” Ser. No. 09/525,615, filed Mar. 14, 2000; and
The present invention is generally related to down-conversion and de-spreading of a spread spectrum signal, and applications of the same. The present invention is also related to frequency up-conversion and spreading of a baseband signal, and applications of the same.
Various communication components exist for performing frequency down-conversion and frequency up-conversion of electromagnetic signals. Also, schemes exist for spreading a baseband signal, and for de-spreading a received spread spectrum signal.
The present invention is related to frequency translation of spread spectrum signals. More specifically, the present invention is related to down-converting and de-spreading a spread spectrum signal in a unified and integrated manner, and applications of the same. Additionally, the present invention is related to up-converting and spreading a baseband signal in a unified and integrated manner to generate a spread spectrum signal for transmission, and applications of the same.
During down-conversion, a received spread spectrum signal is sampled according to a control signal that carries a corresponding spreading code, resulting in a down-converted and de-spread baseband signal. In embodiments, the control signal includes a plurality of pulses having apertures (or pulse widths) that are established to improve energy transfer to the down-converted baseband signal. In embodiments, the frequency (or aliasing rate) of the control signal can be a harmonic or sub-harmonic of the received spread spectrum signal. In alternate embodiments, the aliasing rate of the control signal is offset from a harmonic or sub-harmonic of the received spread spectrum signal. Applications of the invention include IQ receivers, rake receivers, and early/late receivers that incorporate the down-conversion and de-spreading technique described herein.
During up-conversion, a baseband signal is sampled according to a control signal that carries a corresponding spreading code, resulting in a harmonically rich signal. The harmonically rich signal contains harmonic images that repeat at harmonics of the sampling frequency. Each harmonic image is a spread spectrum signal and contains the necessary amplitude, frequency, and phase information to reconstruct the baseband signal. A desired harmonic can be selected for transmission using filtering techniques. In embodiments, the control signal includes a plurality of pulses having apertures (or pulse widths) that operate to improve transfer energy to a desired harmonic image. Applications of the invention include IQ transmitters, and configurations that limit unwanted spectral growth in the resulting spread spectrum signal.
An advantage of the present invention is that down-conversion and de-spreading of a received spread spectrum signal is performed in a unified and integrated manner. Likewise, in the up-conversion embodiment, up-conversion and spreading are performed in a unified and integrated manner. This occurs because the control signal that controls the sampling process during down-conversion and up-conversion carries the spreading code. Additionally, in embodiments, the present invention incorporates matched filters concepts during the sampling process to improve energy transfer during frequency translation and spreading/de-spreading.
FIG. 24K illustrates an example block diagram of a unified down-conversion and de-spreading (UDD) module according to embodiments of the present invention;
FIG. 25A illustrates a UDD module for down-converting and de-spreading a spread spectrum signal in an integrated manner according to embodiments of the present invention;
FIG. 25B illustrates a UDD module using a controlled switch and capacitor implementation for the UFT module according to embodiments of the present invention;
FIG. 25C is a flowchart representing an example operation of the UDD Module of FIG. 25A;
FIG. 25D is a flowchart illustrating an example operation of a portion of the flowchart illustrated in FIG. 25C;
FIG. 25E illustrates a UDD module in a FET configuration according to embodiments of the invention;
FIG. 25F illustrates a UDD module in a shunt sampling configuration according to embodiments of the present invention;
FIG. 25G illustrates a UDD module having a FET sampling module in a shunt sampling according to embodiments of the present invention;
FIG. 25H-J illustrate various matched filter concepts according to embodiments of the invention;
FIGS. 26A-26E illustrate example signal diagrams associated with UDD modules in FIGS. 25A-25G according to embodiments of the present invention;
FIG. 27 illustrates a UDD module in an IQ configuration according to embodiments of the present invention;
FIG. 28A illustrates an example multipath profile;
FIG. 28B illustrates example weights given to taps of an example RAKE receiver;
FIG. 28C illustrates example weights given to eight taps of an example RAKE receiver;
FIG. 28D illustrates conventional RAKE receiver using post-correlator, coherent combining of different rays;
FIG. 28E illustrates a conventional approach to a RAKE receiver;
FIG. 28F illustrates a conventional approach to a RAKE receiver;
FIG. 28G illustrates the general arrangement of a non-coherent RAKE receiver;
FIG. 28H illustrates an example embodiment of a RAKE receiver;
FIG. 28I illustrates a RAKE receiver, utilizing multiple UFD modules, for efficiently synchronizing the local spreading code to that of a received spread spectrum signal according to embodiments of the present invention;
FIG. 28J illustrates a correlator having a UFD module according to embodiments of the invention;
FIG. 29 illustrates an IQ configuration of an Early/Late receiver, utilizing multiple UFD modules according to embodiments of the present invention;
FIG. 30 illustrates an IQ configuration of an Early/Late rake receiver with multiple UFD modules, where PN code adjustment occurs on both the I & Q channels according to embodiments of the present invention;
FIG. 31A illustrates a unified up-conversion and spreading (UUS) module, according to embodiments of the present invention;
FIG. 31B illustrates a spread spectrum harmonically rich signal according to embodiments of the present invention;
FIG. 32 illustrates an example IQ implementation of a UUS module according to embodiments of the present invention;
FIGS. 33A-B illustrate carrier insertion;
FIGS. 34A-C illustrate a balanced transmitter 3402 according to the present invention and associated example signal diagrams;
FIG. 34D illustrates a FET configuration of the balanced transmitter 3402 according to embodiments of the present invention;
FIG. 35A-I illustrate various timing diagrams associated with the transmitter 3402 according to embodiments of the present invention;
FIG. 35J illustrates a frequency spectrum plot associated with transmitter 3402 according to embodiments of the invention;
FIGS. 36A-B illustrate a balanced transmitter 3602 configured for carrier insertion according to embodiments of the invention and an example signal diagram;
FIG. 37 illustrates an I Q balanced transmitter 3720 according to embodiments of the present invention;
FIGS. 38A-C illustrate various signal diagrams associated with the balanced transmitter 3720 in FIG. 37;
FIG. 39A illustrates an IQ balanced transmitter 3908 according to embodiments of the invention;
FIG. 39B illustrates an IQ balanced transmitter 3918 according to embodiments of the invention;
FIG. 40 illustrates an I Q balanced transmitter 4002 configured for carrier insertion according to embodiments of the invention;
FIG. 41 illustrates an IQ balanced transmitter 4102 configured for carrier insertion according to embodiments of the invention;
FIGS. 42A-B illustrate various input configuration for the balanced transmitter 3710 according to embodiments of the present invention;
FIGS. 43A-B illustrate sidelobe for the CDMA IS-95 specification;
FIG. 44 illustrates a conventional CDMA transmitter;
FIG. 45A illustrates a CDMA transmitter according to embodiments of the present invention;
FIGS. 45B-E illustrate various signal diagrams associated with the CDMA transmitter 4500 according to embodiments of the present invention;
FIG. 45F illustrates a CDMA transmitter 4518 according to embodiments of the present invention;
FIG. 46 illustrates a CDMA transmitter on a CMOS chip according to embodiments of the present invention;
FIG. 47 illustrates an example test set 4700;
FIGS. 48-60Z illustrate various example test results from testing the modulator 3710 in the test set 4700;
FIGS. 61A-B illustrate modulator 6100 and associated signal diagrams according to embodiments of the present invention;
FIGS. 62A-B illustrate modulator 6200 and associated signal diagrams according to embodiments of the present invention;
FIGS. 63A, 63B (which consists of 63B-1, 63B-2, 63B-3, and 63B-4), 63C (which consists of 63C-1, 63C-2, and 63C-3), and 63D illustrate various implementation circuits for the modulator 3710 according to embodiments of the present invention;
FIG. 64A illustrate a balanced shunt transmitter 6400 according to embodiments of the present invention;
FIGS. 64B-C illustrate various frequency spectrums that are associated with the transmitter 6400 according to embodiments of the present invention;
FIG. 64D illustrate a FET configuration of the transmitter 6400 according to embodiments of the present invention;
FIG. 65 illustrates an IQ transmitter 6500 according to embodiments of the present invention;
FIGS. 66A-C illustrate various frequency spectrums that are associated with the IQ transmitter 6500;
FIG. 67 illustrates an IQ transmitter 6700 according to embodiments of the present invention;
FIG. 68 illustrates an IQ transmitter 6800 according to embodiments of the present invention;
FIG. 69 illustrates a flowchart 6900 according to embodiments of the present invention;
FIG. 70 illustrates a flowchart 7000 according to embodiments of the present invention;
FIGS. 71A and 71B illustrate a flowchart 7100 according to embodiments of the present invention;
FIGS. 72A and 72B illustrate a flowchart 7200 according to embodiments of the present invention;
FIG. 73A illustrate a pulse generator according to embodiments of the present invention;
FIGS. 73B-C illustrates various signal diagrams that are associated with the pulse generator 7302 according to embodiments of the invention;
FIGS. 73D-E illustrate pulse generators 7312 and 7316 according to embodiments of the present invention;
FIGS. 74A-B illustrates a flowchart 7400 according to embodiments of the invention;
FIG. 75 illustrates a UDDIQ module 7500 according to embodiments of the present invention;
FIG. 76 illustrates a UDDIQ module 7600 according to embodiments of the present invention;
FIG. 77 illustrates a flowchart 7700 according to embodiments of the present invention;
FIGS. 78A-B illustrates a flowchart 7800 according to embodiments of the present invention;
FIG. 79 illustrates a UUSIQ module 7900 according to embodiments of the present invention;
FIG. 80 illustrates a UUSIQ module 8000 according to embodiments of the present invention;
FIGS. 81A-D illustrate example implementations of a switch module according to embodiments of the invention;
FIGS. 82A-E illustrate example aperture generators;
FIG. 83 illustrates an energy transfer system with an optional energy transfer signal module according to an embodiment of the invention;
FIG. 84 illustrates an aliasing module with input and output impedance match according to an embodiment of the invention;
FIG. 85A illustrates an example pulse generator;
FIGS. 85B and C illustrate example waveforms related to the pulse generator of FIG. 71A;
FIG. 86 illustrates an example energy transfer module with a switch module and a reactive storage module according to an embodiment of the invention;
FIGS. 87A-B illustrate example energy transfer systems according to embodiments of the invention;
FIG. 88A illustrates an example energy transfer signal module according to an embodiment of the present invention;
FIG. 88B illustrates a flowchart of state machine operation according to an embodiment of the present invention;
FIG. 88C is an example energy transfer signal module;
FIG. 89 is a schematic diagram of a circuit to down-convert a 915 MHZ signal to a 5 MHZ signal using a 101.1 MHZ clock according to an embodiment of the present invention;
FIG. 90 shows simulation waveforms for the circuit of FIG. 86 according to embodiments of the present invention;
FIG. 91 is a schematic diagram of a circuit to down-convert a 915 MHZ signal to a 5 MHZ signal using a 101 MHZ clock according to an embodiment of the present invention;
FIG. 92 shows simulation waveforms for the circuit of FIG. 88 according to embodiments of the present invention;
FIG. 93 is a schematic diagram of a circuit to down-convert a 915 MHZ signal to a 5 MHZ signal using a 101.1 MHZ clock according to an embodiment of the present invention;
FIG. 94 shows simulation waveforms for the circuit of FIG. 90 according to an embodiment of the present invention;
FIG. 95 shows a schematic of the circuit in FIG. 86 connected to an FSK source that alternates between 913 and 917 MHZ at a baud rate of 500 Kbaud according to an embodiment of the present invention;
FIG. 96A illustrates an example energy transfer system according to an embodiment of the invention;
FIGS. 96B-C illustrate example timing diagrams for the example system of FIG. 94A;
FIG. 97 illustrates an example bypass network according to an embodiment of the invention;
FIG. 98 illustrates an example bypass network according to an embodiment of the invention;
FIG. 99 illustrates an example embodiment of the invention;
FIG. 100A illustrates an example real time aperture control circuit according to an embodiment of the invention;
FIG. 100B illustrates a timing diagram of an example clock signal for real time aperture control, according to an embodiment of the invention;
FIG. 100C illustrates a timing diagram of an example optional enable signal for real time aperture control, according to an embodiment of the invention;
FIG. 100D illustrates a timing diagram of an inverted clock signal for real time aperture control, according to an embodiment of the invention;
FIG. 100E illustrates a timing diagram of an example delayed clock signal for real time aperture control, according to an embodiment of the invention;
FIG. 100F illustrates a timing diagram of an example energy transfer including pulses having apertures that are controlled in real time, according to an embodiment of the invention;
FIG. 105A is a timing diagram for the example embodiment of FIG. 103;
FIG. 105B is a timing diagram for the example embodiment of FIG. 104;
FIG. 106A is a timing diagram for the example embodiment of FIG. 105;
FIG. 106B is a timing diagram for the example embodiment of FIG. 106;
FIG. 107A illustrates and example embodiment of the invention;
FIG. 107B illustrates equations for determining charge transfer, in accordance with the present invention;
FIG. 107C illustrates relationships between capacitor charging and aperture, in accordance with the present invention;
FIG. 107D illustrates relationships between capacitor charging and aperture, in accordance with the present invention;
FIG. 107E illustrates power-charge relationship equations, in accordance with the present invention; and
FIG. 107F illustrates insertion loss equations, in accordance with the present invention.
2.1 Optional Energy Transfer Signal Module
2.2 Smoothing the Down-Converted Signal
2.4 Tanks ad Resonant Structures
2.5 Charge and Power Transfer Concepts
2.6 Optimizing and Adjusting the Non-Negligible Aperture Width/Duration
2.7 Adding a Bypass Network
2.8 Modifying the Energy Transfer Signal Utilizing Feedback
2.9 Other Implementations
2.10 Example Energy Transfer Down-Converters
7.1.2. Balanced Modulator Example Signal Diagrams and Mathematical Description
7.1.4 Balanced Modulator FET Configurations
8.0 Integrated Frequency Translation and Spreading/De-spreading of a Spread Spectrum Signal
8.1 Integrated Down-Conversion and De-spreading of a Spread Spectrum Signal
8.2 Integrated Down-Conversion and De-spreading of an IQ Spread Spectrum Signal
8.3 RAKE Receivers
8.3.1 Introduction: Rake Receivers in Spread Spectrum Systems
8.3.2 Rake Receivers Utilizing a Universal Frequency Down-Conversion (UFD) Module
8.4 Early/Late Spread Spectrum Receiver
8.5 Integrated Up-Conversion and Spreading of a Spread Spectrum Signal
8.6 Integrated Up-Conversion and Spreading of Two Baseband signals to Generate an IQ Spread Spectrum Signal
8.6.1 Integrated Up-conversion and Spreading Using an Amplitude Shaper
8.6.2 Integrated Up-conversion and Spreading Using a Smoothly Varying Clock Signal
Alternatively, to down-convert an input FM signal to a non-FM signal, a frequency within the FM bandwidth must be down-converted to baseband (i.e., zero IF). As an example, to down-convert a frequency shift keying (FSK) signal (a sub-set of FM) to a phase shift keying (PSK) signal (a subset of PM), the mid-point between a lower frequency F1 and an upper frequency F2 (that is, [(F1+F2)÷2]) of the FSK signal is down-converted to zero IF. For example, to down-convert an FSK signal having F1 equal to 899 MHZ and F2 equal to 901 MHZ, to a PSK signal, the aliasing rate of the control signal 2006 would be calculated as follows: Frequency ⁢ ⁢ of ⁢ ⁢ the ⁢ ⁢ input = ( F 1 + F 2 ) ÷ 2 = ( 899 ⁢ ⁢ MHZ + 901 ⁢ ⁢ MHZ ) ÷ 2 = 900 ⁢ ⁢ MHZ
FIG. 83 illustrates an energy transfer system 8301 that includes an optional energy transfer signal module 8302, which can perform any of a variety of functions or combinations of functions including, but not limited to, generating the energy transfer signal 8305.
In an embodiment, the optional energy transfer signal module 8302 includes an aperture generator, an example of which is illustrated in FIG. 82J as an aperture generator 8220. The aperture generator 8220 generates non-negligible aperture pulses 8226 from an input signal 8224. The input signal 8224 can be any type of periodic signal, including, but not limited to, a sinusoid, a square wave, a saw-tooth wave, etc. Systems for generating the input signal 8224 are described below.
The width or aperture of the pulses 8226 is determined by delay through the branch 8222 of the aperture generator 8220. Generally, as the desired pulse width increases, the difficulty in meeting the requirements of the aperture generator 8220 decrease. In other words, to generate non-negligible aperture pulses for a given EM input frequency, the components utilized in the example aperture generator 6820 do not require as fast reaction times as those that are required in an under-sampling system operating with the same EM input frequency.
The example logic and implementation shown in the aperture generator 8220 are provided for illustrative purposes only, and are not limiting. The actual logic employed can take many forms. The example aperture generator 8220 includes an optional inverter 8228, which is shown for polarity consistency with other examples provided herein.
An example implementation of the aperture generator 8220 is illustrated in FIG. 82K. Additional examples of aperture generation logic are provided in FIGS. 82H and 821. FIG. 82H illustrates a rising edge pulse generator 8240, which generates pulses 8226 on rising edges of the input signal 8224. FIG. 821 illustrates a falling edge pulse generator 8250, which generates pulses 8226 on falling edges of the input signal 8224.
In an embodiment, the input signal 8224 is generated externally of the energy transfer signal module 8302, as illustrated in FIG. 83. Alternatively, the input signal 8224 is generated internally by the energy transfer signal module 8302. The input signal 8224 can be generated by an oscillator, as illustrated in FIG. 82L by an oscillator 6830. The oscillator 8230 can be internal to the energy transfer signal module 8302 or external to the energy transfer signal module 8302. The oscillator 8230 can be external to the energy transfer system 8301. The output of the oscillator 8230 may be any periodic waveform.
The type of down-conversion performed by the energy transfer system 8301 depends upon the aliasing rate of the energy transfer signal 8305, which is determined by the frequency of the pulses 8226. The frequency of the pulses 8226 is determined by the frequency of the input signal 8224. For example, when the frequency of the input signal 8224 is substantially equal to a harmonic or a sub-harmonic of the EM signal 8103, the EM signal 8103 is directly down-converted to baseband (e.g. when the EM signal is an AM signal or a PM signal), or converted from FM to a non-FM signal. When the frequency of the input signal 8224 is substantially equal to a harmonic or a sub-harmonic of a difference frequency, the EM signal 8103 is down-converted to an intermediate signal.
The optional energy transfer signal module 8302 can be implemented in hardware, software, firmware, or any combination thereof.
Referring to FIG. 84, a specific embodiment using an RF signal as an input, assuming that the impedance 8412 is a relatively low impedance of approximately 50 Ohms, for example, and the input impedance 8416 is approximately 300 Ohms, an initial configuration for the input impedance match module 8406 can include an inductor 8606 and a capacitor 8608, configured as shown in FIG. 86. The configuration of the inductor 8606 and the capacitor 8608 is a possible configuration when going from a low impedance to a high impedance. Inductor 8606 and the capacitor 8608 constitute an L match, the calculation of the values which is well known to those skilled in the relevant arts.
When matching from a high impedance to a low impedance, a capacitor 8614 and an inductor 8616 can be configured as shown in FIG. 86. The capacitor 8614 and the inductor 8616 constitute an L match, the calculation of the component values being well known to those skilled in the relevant arts.
The configuration of the input impedance match module 8406 and the output impedance match module 8408 are considered to be initial starting points for impedance matching, in accordance with the present invention. In some situations, the initial designs may be suitable without further optimization. In other situations, the initial designs can be optimized in accordance with other various design criteria and considerations.
2.4 Tanks and Resonant Structures
An example embodiment is shown in FIG. 96A. Two additional embodiments are shown in FIG. 91 and FIG. 99. Alternate implementations will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein. Alternate implementations fall within the scope and spirit of the present invention. These implementations take advantage of properties of series and parallel (tank) resonant circuits.
FIG. 96A illustrates parallel tank circuits in a differential implementation. A first parallel resonant or tank circuit consists of a capacitor 9638 and an inductor 9620 (tank1). A second tank circuit consists of a capacitor 9634 and an inductor 9636 (tank2).
In the illustrated example of FIG. 96A, the first and second tank circuits resonate at approximately 920 Mhz. At and near resonance, the impedance of these circuits is relatively high. Therefore, in the circuit configuration shown in FIG. 96A, both tank circuits appear as relatively high impedance to the input frequency of 950 Mhz, while simultaneously appearing as relatively low impedance to frequencies in the desired output range of 50 Mhz.
An energy transfer signal 9642 controls a switch 9614. When the energy transfer signal 9642 controls the switch 9614 to open and close, high frequency signal components are not allowed to pass through tank1 or tank2. However, the lower signal components (50 Mhz in this embodiment) generated by the system are allowed to pass through tank1 and tank2 with little attenuation. The effect of tank1 and tank2 is to further separate the input and output signals from the same node thereby producing a more stable input and output impedance. Capacitors 9618 and 9640 act to store the 50 Mhz output signal energy between energy transfer pulses.
Further energy transfer optimization is provided by placing an inductor 9610 in series with a storage capacitor 9612 as shown. In the illustrated example, the series resonant frequency of this circuit arrangement is approximately 1 GHz. This circuit increases the energy transfer characteristic of the system. The ratio of the impedance of inductor 9610 and the impedance of the storage capacitor 9612 is preferably kept relatively small so that the majority of the energy available will be transferred to storage capacitor 9612 during operation. Exemplary output signals A and B are illustrated in FIGS. 96B and 96C, respectively.
In FIG. 96A, circuit components 9604 and 9606 form an input impedance match. Circuit components 9632 and 9630 form an output impedance match into a 50 ohm resistor 9628. Circuit components 9622 and 9624 form a second output impedance match into a 50 ohm resistor 9626. Capacitors 9608 and 9612 act as storage capacitors for the embodiment. Voltage source 9646 and resistor 9602 generate a 950 Mhz signal with a 50 ohm output impedance, which are used as the input to the circuit. Circuit element 9616 includes a 150 Mhz oscillator and a pulse generator, which are used to generate the energy transfer signal 9642.
FIG. 91 illustrates a shunt tank circuit 9110 in a single-ended to-single-ended system 9112. Similarly, FIG. 99 illustrates a shunt tank circuit 9910 in a system 9912. The tank circuits 9110 and 9910 lower driving source impedance, which improves transient response. The tank circuits 9110 and 9910 are able store the energy from the input signal and provide a low driving source impedance to transfer that energy throughout the aperture of the closed switch. The transient nature of the switch aperture can be viewed as having a response that, in addition to including the input frequency, has large component frequencies above the input frequency, (i.e. higher frequencies than the input frequency are also able to effectively pass through the aperture). Resonant circuits or structures, for example resonant tanks 9110 or 9910, can take advantage of this by being able to transfer energy throughout the switch's transient frequency response (i.e. the capacitor in the resonant tank appears as a low driving source impedance during the transient period of the aperture).
Concepts of charge transfer are now described with reference to FIGS. 107A-F. FIG. 107A illustrates a circuit 10702, including a switch S and a capacitor 10706 having a capacitance C. The switch S is controlled by a control signal 10708, which includes pulses 10710 having apertures T.
In FIG. 107B, Equation 10 illustrates that the charge q on a capacitor having a capacitance C, such as the capacitor 10706, is proportional to the voltage V across the capacitor, where:
Where the voltage V is represented by Equation 11, Equation 10 can be rewritten as Equation 12. The change in charge Δq over time t is illustrated as in Equation 13 as Δq(t), which can be rewritten as Equation 14. Using the sum-to-product trigonometric identity of Equation 15, Equation 14 can be rewritten as Equation 16, which can be rewritten as equation 17.
Note that the sin term in Equation 11 is a function of the aperture T only. Thus, Δq(t) is at a maximum when T is equal to an odd multiple of π (i.e., π, 3π, 5π, . . . ). Therefore, the capacitor 10906 experiences the greatest change in charge when the aperture T has a value of π or a time interval representative of 180 degrees of the input sinusoid. Conversely, when T is equal to 2π, 4π, 6π, . . . , minimal charge is transferred.
Equations 18, 19, and 20 solve for q(t) by integrating Equation 10, allowing the charge on the capacitor 10706 with respect to time to be graphed on the same axis as the input sinusoid sin(t), as illustrated in the graph of FIG. 107C. As the aperture T decreases in value or tends toward an impulse, the phase between the charge on the capacitor C or q(t) and sin(t) tend toward zero. This is illustrated in the graph of FIG. 107D, which indicates that the maximum impulse charge transfer occurs near the input voltage maxima. As this graph indicates, considerably less charge is transferred as the value of T decreases.
Power/charge relationships are illustrated in Equations 21-26 of FIG. 107E, where it is shown that power is proportional to charge, and transferred charge is inversely proportional to insertion loss.
Concepts of insertion loss are illustrated in FIG. 107F. Generally, the noise figure of a lossy passive device is numerically equal to the device insertion loss. Alternatively, the noise figure for any device cannot be less that its insertion loss. Insertion loss can be expressed by Equation 27 or 28. From the above discussion, it is observed that as the aperture T increases, more charge is transferred from the input to the capacitor 10706, which increases power transfer from the input to the output. It has been observed that it is not necessary to accurately reproduce the input voltage at the output because relative modulated amplitude and phase information is retained in the transferred power.
(i) Varying Input and Output Impedances
In an embodiment of the invention, the energy transfer signal (i.e., control signal 2006 in FIG. 20A), is used to vary the input impedance seen by the EM Signal 2004 and to vary the output impedance driving a load. An example of this embodiment is described below using a gated transfer module 8703 shown in FIG. 87A. The method described below is not limited to the gated transfer module 8703.
In FIG. 87A, when switch 8706 is closed, the impedance looking into circuit 8702 is substantially the impedance of a storage module, illustrated here as a storage capacitance 8708, in parallel with the impedance of a load 8712. When the switch 8706 is open, the impedance at point 8714 approaches infinity. It follows that the average impedance at point 8714 can be varied from the impedance of the storage module illustrated in parallel with the load 8712, to the highest obtainable impedance when switch 8706 is open, by varying the ratio of the time that switch 8706 is open to the time switch 8706 is closed. The switch 8706 is controlled by an energy transfer signal 8710. Thus the impedance at point 8714 can be varied by controlling the aperture width of the energy transfer signal in conjunction with the aliasing rate.
An example method of altering the energy transfer signal 8710 of FIG. 87A is now described with reference to FIG. 85A, where a circuit 8502 receives an input oscillating signal 8506 and outputs a pulse train shown as doubler output signal 8504. The circuit 8502 can be used to generate the energy transfer signal 8710. Example waveforms of 8504 are shown on FIG. 85C.
It can be shown that by varying the delay of the signal propagated by the inverter 8508, the width of the pulses in the doubler output signal 8504 can be varied. Increasing the delay of the signal propagated by inverter 8508, increases the width of the pulses. The signal propagated by inverter 8508 can be delayed by introducing a R/C low pass network in the output of inverter 8508. Other means of altering the delay of the signal propagated by inverter 8508 will be well known to those skilled in the art.
(ii) Real Time Aperture Control
In an embodiment, the aperture width/duration is adjusted in real time. For example, referring to the timing diagrams in FIGS. 100B-F, a clock signal 10014 (FIG. 100B) is utilized to generate an energy transfer signal 10016 (FIG. 100F), which includes energy transfer pluses 10018, having variable apertures 10020. In an embodiment, the clock signal 10014 is inverted as illustrated by inverted clock signal 10022 (FIG. 100D). The clock signal 10014 is also delayed, as illustrated by delayed clock signal 10024 (FIG. 100E). The inverted clock signal 10014 and the delayed clock signal 10024 are then ANDed together, generating an energy transfer signal 10016, which is active—energy transfer pulses 10018—when the delayed clock signal 10024 and the inverted clock signal 10022 are both active. The amount of delay imparted to the delayed clock signal 10024 substantially determines the width or duration of the apertures 10020. By varying the delay in real time, the apertures are adjusted in real time.
In an alternative implementation, the inverted clock signal 10022 is delayed relative to the original clock signal 10014, and then ANDed with the original clock signal 10014. Alternatively, the original clock signal 10014 is delayed then inverted, and the result ANDed with the original clock signal 10014.
FIG. 100A illustrates an exemplary real time aperture control system 10002 that can be utilized to adjust apertures in real time. The example real time aperture control system 10002 includes an RC circuit 10004, which includes a voltage variable capacitor 10012 and a resistor 10026. The real time aperture control system 10002 also includes an inverter 10006 and an AND gate 10008. The AND gate 10008 optionally includes an enable input 10010 for enabling/disabling the AND gate 10008. The RC circuit 10004. The real time aperture control system 10002 optionally includes an amplifier 10028.
Operation of the real time aperture control circuit is described with reference to the timing diagrams of FIGS. 100B-F. The real time control system 10002 receives the input clock signal 10014, which is provided to both the inverter 10006 and to the RC circuit 10004. The inverter 10006 outputs the inverted clock signal 10022 and presents it to the AND gate 10008. The RC circuit 10004 delays the clock signal 10014 and outputs the delayed clock signal 10024. The delay is determined primarily by the capacitance of the voltage variable capacitor 10012. Generally, as the capacitance decreases, the delay decreases.
The delayed clock signal 10024 is optionally amplified by the optional amplifier 10028, before being presented to the AND gate 10008. Amplification is desired, for example, where the RC constant of the RC circuit 10004 attenuates the signal below the threshold of the AND gate 10008.
The AND gate 10008 ANDs the delayed clock signal 10024, the inverted clock signal 10022, and the optional Enable signal 10010, to generate the energy transfer signal 10016. The apertures 10020 are adjusted in real time by varying the voltage to the voltage variable capacitor 10012.
In an embodiment, the apertures 9820 are controlled to optimize power transfer. For example, in an embodiment, the apertures 10020 are controlled to maximize power transfer. Alternatively, the apertures 10020 are controlled for variable gain control (e.g. automatic gain control—AGC). In this embodiment, power transfer is reduced by reducing the apertures 10020.
As can now be readily seen from this disclosure, many of the aperture circuits presented, and others, can be modified as in circuits illustrated in FIGS. 82H-K. Modification or selection of the aperture can be done at the design level to remain a fixed value in the circuit, or in an alternative embodiment, may be dynamically adjusted to compensate for, or address, various design goals such as receiving RF signals with enhanced efficiency that are in distinctively different bands of operation, e.g. RF signals at 900 MHz and 1.8 GHz.
For example, referring to FIG. 97 a bypass network 9702 shown in this instance as capacitor 9712), is shown bypassing switch module 9704. In this embodiment the bypass network increases the efficiency of the energy transfer module when, for example, less than optimal aperture widths were chosen for a given input frequency on the energy transfer signal 9706. The bypass network 9702 could be of different configurations than shown in FIG. 97. Such an alternate is illustrated in FIG. 93. Similarly, FIG. 98 illustrates another example bypass network 9802, including a capacitor 9804.
The following discussion will demonstrate the effects of a minimized aperture and the benefit provided by a bypassing network. Beginning with an initial circuit having a 550 ps aperture in FIG. 101, its output is seen to be 2.8 mVpp applied to a 50 ohm load in FIG. 105A. Changing the aperture to 270 ps as shown in FIG. 102 results in a diminished output of 2.5 Vpp applied to a 50 ohm load as shown in FIG. 105B. To compensate for this loss, a bypass network may be added, a specific implementation is provided in FIG. 103. The result of this addition is that 3.2 Vpp can now be applied to the 50 ohm load as shown in FIG. 106A. The circuit with the bypass network in FIG. 103 also had three values adjusted in the surrounding circuit to compensate for the impedance changes introduced by the bypass network and narrowed aperture. FIG. 104 verifies that those changes added to the circuit, but without the bypass network, did not themselves bring about the increased efficiency demonstrated by the embodiment in FIG. 103 with the bypass network. FIG. 106B shows the result of using the circuit in FIG. 104 in which only 1.88 Vpp was able to be applied to a 50 ohm load.
FIG. 83 shows an embodiment of a system 8301 which uses down-converted signal 8307 as feedback 8306 to control various characteristics of the energy transfer module 8303 to modify the down-converted signal 8307.
Generally, the amplitude of the down-converted signal 8307 varies as a function of the frequency and phase differences between the EM signal 1304 and the energy transfer signal 6306. In an embodiment, the down-converted signal 8307 is used as the feedback 8306 to control the frequency and phase relationship between the EM signal 8103 and the energy transfer signal 8305. This can be accomplished using the example logic in FIG. 88A. The example circuit in FIG. 88A can be included in the energy transfer signal module 6902. Alternate implementations will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein. Alternate implementations fall within the scope and spirit of the present invention. In this embodiment a state-machine is used as an example.
In the example of FIG. 88A, a state machine 8804 reads an analog to digital converter, A/D 8802, and controls a digital to analog converter, DAC 8806. In an embodiment, the state machine 8804 includes 2 memory locations, Previous and Current, to store and recall the results of reading A/D 8802. In an embodiment, the state machine 8804 utilizes at least one memory flag.
The DAC 8806 controls an input to a voltage controlled oscillator, VCO 8808. VCO 8808 controls a frequency input of a pulse generator 8810, which, in an embodiment, is substantially similar to the pulse generator shown in FIG. 82J. The pulse generator 8810 generates energy transfer signal 6306.
In an embodiment, the state machine 8804 operates in accordance with a state machine flowchart 8819 in FIG. 88B. The result of this operation is to modify the frequency and phase relationship between the energy transfer signal 8305 and the EM signal 8103, to substantially maintain the amplitude of the down-converted signal 8307 at an optimum level.
The amplitude of the down-converted signal 8307 can be made to vary with the amplitude of the energy transfer signal 8305. In an embodiment where the switch module 8105 is a FET as shown in FIG. 81A, wherein the gate 8104 receives the energy transfer signal 8111, the amplitude of the energy transfer signal 8111 can determine the “on” resistance of the FET, which affects the amplitude of the down-converted signal 8307. The energy transfer signal module 8302, as shown in FIG. 88C, can be an analog circuit that enables an automatic gain control function. Alternate implementations will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein. Alternate implementations fall within the scope and spirit of the present invention.
FIG. 89 is a schematic diagram of an exemplary circuit to down convert a 915 MHZ signal to a 5 MHZ signal using a 101.1 MHZ clock.
FIG. 90 shows example simulation waveforms for the circuit of FIG. 89. Waveform 8902 is the input to the circuit showing the distortions caused by the switch closure. Waveform 8904 is the unfiltered output at the storage unit. Waveform 8906 is the impedance matched output of the downconverter on a different time scale.
FIG. 91 is a schematic diagram of an exemplary circuit to downconvert a 915 MHZ signal to a 5 MHZ signal using a 101.1 MHZ clock. The circuit has additional tank circuitry to improve conversion efficiency.
FIG. 92 shows example simulation waveforms for the circuit of FIG. 91. Waveform 9102 is the input to the circuit showing the distortions caused by the switch closure. Waveform 9104 is the unfiltered output at the storage unit. Waveform 9106 is the output of the downconverter after the impedance match circuit.
FIG. 93 is a schematic diagram of an exemplary circuit to downconvert a 915 MHZ signal to a 5 MHZ signal using a 101.1 MHZ clock. The circuit has switch bypass circuitry to improve conversion efficiency.
FIG. 94 shows example simulation waveforms for the circuit of FIG. 93. Waveform 9302 is the input to the circuit showing the distortions caused by the switch closure. Waveform 9304 is the unfiltered output at the storage unit. Waveform 9306 is the output of the downconverter after the impedance match circuit.
FIG. 95 shows a schematic of the example circuit in FIG. 89 connected to an FSK source that alternates between 913 and 917 MHZ, at a baud rate of 500 Kbaud. FIG. 93 shows the original FSK waveform 9202 and the downconverted waveform 9204 at the output of the load impedance match circuit.
In one embodiment, the number of redundant spectrums 2206 a-n generated by transmitter 2301 is arbitrary and may be unlimited as indicated by the “a-n” designation for redundant spectrums 2206 a-n. However, a typical