Source: http://www.google.com/patents/US20110133322?ie=ISO-8859-1
Timestamp: 2016-02-06 12:30:19
Document Index: 561621483

Matched Legal Cases: ['arts 132', 'arts 131', 'arts 132', 'arts 132', 'arts 131', 'arts 132', 'arts 132', 'arts 132', 'arts 131']

Patent US20110133322 - Leadframe for leadless package, structure and manufacturing method using the ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA leadframe employed by a leadless package comprises a plurality of package units and an adhesive tape. Each of the package units has a die pad with a plurality of openings and a plurality of pins disposed in the plurality of openings. The adhesive tape is adhered to the surfaces of the plurality of...http://www.google.com/patents/US20110133322?utm_source=gb-gplus-sharePatent US20110133322 - Leadframe for leadless package, structure and manufacturing method using the sameAdvanced Patent SearchPublication numberUS20110133322 A1Publication typeApplicationApplication numberUS 13/016,341Publication dateJun 9, 2011Priority dateApr 20, 2007Also published asUS7902649, US8105876, US8106494, US20080258279, US20110136299Publication number016341, 13016341, US 2011/0133322 A1, US 2011/133322 A1, US 20110133322 A1, US 20110133322A1, US 2011133322 A1, US 2011133322A1, US-A1-20110133322, US-A1-2011133322, US2011/0133322A1, US2011/133322A1, US20110133322 A1, US20110133322A1, US2011133322 A1, US2011133322A1InventorsChun Ying Lin, Geng Shin Shen, Yu Tang Pan, Shih Wen ChouOriginal AssigneeChipmos Technologies Inc.Export CitationBiBTeX, EndNote, RefManPatent Citations (18), Referenced by (4), Classifications (39), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetLeadframe for leadless package, structure and manufacturing method using the same
US 20110133322 A1Abstract
a plurality of pins each disposed in one of the plurality of openings respectively,_wherein the pins are isolated from each other and isolated from the die pad; and
[0001] This is a divisional application of U.S. patent application Ser. No. 11/934,287, which is filed on Nov. 2, 2007 and claims the priority benefit of Taiwan application serial no. 096113893, filed on Apr. 20, 2007. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of specification.
[0003] The present invention relates to a leadframe for a leadless package, structure and manufacturing method using the same, and more particularly, to the structure of a quad flat non-leaded (QFN) package, a leadframe thereof and a manufacturing method using the same.
[0005] To meet electronic devices' requirements for lightness, thinness and small size, QFN packaging has overtaken the traditional leadframe packaging method to replace the more expensive wafer level chip size packaging (CSP). While CSP scales down the package size so that it is the same as the die size, it needs a fine-pitch ball grid array to act as pins, which makes the manufacturing process more complicated. In contrast, QFN packaging is not only with a small size, a low cost and a high manufacturing yield, it is also a high speed and power managing circuit device with a better coplanarity and high heat dissipation capacity. In addition, the QFN packaging does not need to extend the pins from its sides, and therefore its electrical performance is better than the traditional leaded packaging which needs to extend several pins from its sides, and sometime these pins serving as an inductance or a capacitor produce a lot of noise when applied to high frequency systems.
[0006] Furthermore, the exposed lead frame pad of QFN packaging can serve as a direct heat dissipation path, which enables the package to exhibit a better heat dissipation capacity. Normally, such a thermal pad is directly soldered on the circuit board, and the thermal via in the circuit board brings the surplus heat to the copper foil connected to the ground, so additional cooling fins can be saved.
[0007] FIG. 1 shows the cross-sectional schematic view of a prior art example of a QFN package structure. A QFN packaging element 80 includes a lead-frame 81, a die 82, an adhesive 83, a plurality of leads 84 and a molding material 85, wherein the die 82 is mounted on a die pad 811 of the lead frame 81 by means of the adhesive 83, and the plurality of leads 84 electrically connect the die 82 to a plurality of pins 812 of the lead frame 81. The die 82, the leads 84 and the leadframe 81 are covered with the molding material 85, while the molding material 85 does not cover the lower surfaces of the die pad 811 and the pins 812. The uncovered parts of the surface of the pins 812 act as the contacts of the surface mounting. The uncovered part of the surface of the die pad 811 can dissipate heat directly to outside and therefore replace the heat sink of the prior art serving the same function. However, the die pad 811 is disposed on the center of the pins 812, and needs to be kept at a proper distance from the surrounding pins 812, so the package size is limited. In view of above, because the heat dissipation efficiency is closely related to the package size, if the uncovered area of the surface of the die pad 811 can be increased, it will help solve the more and more serious problem of heat dissipation that a multiple function die especially faces.
[0008] One aspect of the present invention is to provide a leadframe for a leadless package and a package structure and a manufacturing method using the same, which improve the heat dissipation efficiency of the package by modifying the layout of the die pad and the pins in the leadframe.
[0009] Another aspect of the present invention is to provide a leadless package structure with steady pins, wherein each pin's four end faces are fixed and protected by a molding material, so that the package is not easily damaged by external forces.
[0010] Yet another aspect of the present invention is to provide a leadless package structure with steady pins, wherein each pin has a concave part and a convex part, which increases the area in contact with the molding material and thus reduces the probability of the molding material getting stripped from the pins, improving the manufacturing yield.
[0011] A leadframe for leadless package of one embodiment of the present invention comprises a plurality of package units and one adhesive tape. Each package unit has a die pad with a plurality of openings, and a plurality of pins disposed in the plurality of openings. The adhesive tape is adhered to the surface of the plurality of package units to fix the die pad and the plurality of pins.
[0012] A package structure for leadless package of another embodiment of the present invention comprises a leadframe, a die and a plurality of lead wires. The leadframe has a die pad with a plurality of openings and a plurality of pins disposed in the plurality of openings. The die is fixed on the die pad and is electrically connected to the pins by the plurality of lead wires.
[0013] A manufacturing method for leadless package of yet another embodiment of the present invention comprises the steps of providing a metal sheet covered by an adhesive tape; patterning the metal sheet to form a plurality of package units, wherein each of the package unit has a die pad with a plurality of openings and a plurality of pins disposed in the plurality of openings; mounting one die on each of the die pads; and covering each of the dies, each of the package units and the plurality of lead wires with a molding material.
[0014] The objectives and advantages of the present invention will become apparent upon reference to the following description and the accompanying drawings in which:
[0015] FIG. 1 shows the cross-sectional schematic view of a prior art example of a QFN package structure;
[0016] FIGS. 2( a)-2(e) are schematic drawings showing each of the manufacturing steps of a leadless package structure in accordance with an embodiment of the present invention;
[0017] FIG. 3 shows a top view of a leadless package device in accordance with the present invention;
[0018] FIG. 4 shows a top view of a leadframe employed by a leadless package in accordance with the present invention; and
[0019] FIGS. 5( a)-5(c) are schematic drawings showing each of manufacturing steps of a leadless package in accordance with another embodiment of the present invention.
[0020] FIGS. 2( a)-2(e) are schematic drawings showing each of the manufacturing steps of a leadless package structure in accordance with an embodiment of the present invention. First, a metal sheet 11 covered by an adhesive tape 12 is provided, wherein the metal sheet 11 can be made of copper, aluminum, Cu—Al alloy, aluminum alloy or a combination of the above materials. As shown in FIG. 2( b), by a stamping process, a plurality of concaves 132 are formed on the upper surface of the metal sheet 11, and therefore a plurality of convexes 131 are formed on the lower surface between the metal sheet 11 and the adhesive tape 12. By a photolithography process, the metal sheet 11 is turned into a plurality of connected die pads 14 and a plurality of separated pins 13, wherein the pins 13 are formed in the plurality of openings 141 of the die pad 14, as shown in FIG. 2( c). And the combination of one of the die pads 14 and its surrounding pins 13 is considered as a package unit 181 of the leadframe 18.
[0021] As shown in FIG. 2( d), each die 15 is further mounted on the die fixing area 142 (as shown in FIG. 3) at the center of each die pad 14. A plurality of lead wires 17 connect each die 15 to the pins 13 surrounding it by wire bonding. Preferably, the lead wires 17 are connected to the portions of the s pins 13 excluding the concave parts 132. To protect the die 15 and the lead wires 17 from external forces and the environmental influence, each die 15, each package unit 181 and the plurality of lead wires 17 are covered with a molding material 16, as shown in FIG. 2( d). After the molding material 16 hardens, the adhesive tape 12 can be removed, and the leadless package unit 20 is cut along the edges of the package units 181 by a dicing process so that the package units 181 are separated from each other, as shown in FIG. 2( e).
[0022] FIG. 3 shows the top view of a leadless package unit in accordance with the present invention. The die 15 is mounted on the die fixing area 142 in the center of the die pad 14, and the plurality of leads 17 are placed on the plurality of openings 141 surrounding the die pad 14. Unlike the QFN package 80 in FIG. 1, the die pad 14 of the present invention extends to the four edges of the leadless package unit 20. Except the openings 141, the whole area of the die pad 14 can dissipate heat. Besides, since the area of the die pad 811 of the conventional QFN package 80 is approximately the same as that of the die fixing area 142 in FIG. 3, the heat dissipation efficiency of these two packages are remarkably different due to the different sizes of the areas of the die pads 14. Furthermore, the four sides of each pin 13 of the present invention are fixed and protected by the molding material 16, so the package is not easily damaged by external forces.
[0023] FIG. 4 shows the top view of a lead frame employed by a leadless package in accordance with the present invention. To meet the requirements of mass production, the plurality of package units 181 of the lead frame 18 can be arranged in M rows by N columns matrix. For example, the package units 181 in FIG. 4 are arranged in two rows by N columns matrix. Instead of such arrangement, there can also be more rows to increase the unit per hour (UPH) of the molding process.
[0024] The convex parts 131 of pins 13 on the leadless package unit 20 increase the area in contact with the solders, and therefore enhance the solderability of the leadless package unit 20 in the surface mounting process. The concave parts 132 of pins 13 increase the area in contact with the molding material 16, and therefore reduce the probability of the molding material getting delaminated from the pins 13, which in turn improves the manufacturing yield. As shown in FIG. 5( a), a plurality of concave parts 132′ are first formed on one surface of the metal sheet 11, and accordingly a plurality of convex parts 131′ are formed on the other surface of the metal sheet 11. Afterward, the plurality of concave parts 132′ and the adhesive tape are adhered together, as shown in FIG. 5( b). Then, the same steps in FIGS. 2( c) to 2(e) are implemented to complete most of the manufacturing processes. Preferably, the lead wires 17 are connected to the parts of the pins 13 excluding the concave parts 132. Finally, the leadless package unit 20′ is cut along edges of the package units 181 by a dicing process so that the package units 181 are separated from each other, as shown in FIG. 5( c). The concave parts 132′ of pins 13 of the leadless package unit 20 increase the area in contact with the solders, and therefore enhance the solderability of the leadless package unit 20 in the surface mounting process. The convex parts 131′ of pins 13 increase the area in contact with the molding material 16, and therefore reduce the probability of the molding material getting delaminated from the pins 13.
[0025] The above-described embodiments of the present invention are intended to be illustrative only. Numerous alternative embodiments may be devised by those skilled in the art without departing from the scope of the following claims.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS6060768 *Sep 23, 1997May 9, 2000Fujitsu LimitedSemiconductor device, method of manufacturing the semiconductor device, and method of manufacturing lead frameUS6309909 *Sep 26, 2000Oct 30, 2001Mitsubishi Denki Kabushiki KaishaSemiconductor device and method of manufacturing the sameUS6400004 *Aug 17, 2000Jun 4, 2002Advanced Semiconductor Engineering, Inc.Leadless semiconductor packageUS6420779 *Sep 14, 1999Jul 16, 2002St Assembly Test Services Ltd.Leadframe based chip scale package and method of producing the sameUS6498392 *Jan 23, 2001Dec 24, 2002Nec CorporationSemiconductor devices having different package sizes made by using common partsUS6818973 *Sep 9, 2002Nov 16, 2004Amkor Technology, Inc.Exposed lead QFP package fabricated through the use of a partial saw processUS6876068 *May 28, 2003Apr 5, 2005Amkor Technology, IncSemiconductor package with increased number of input and output pinsUS7211471 *Jun 30, 2004May 1, 2007Amkor Technology, Inc.Exposed lead QFP package fabricated through the use of a partial saw processUS20010008305 *Mar 9, 2001Jul 19, 2001Asat Ltd.Leadless plastic chip carrier with etch back pad singulationUS20020140061 *Dec 10, 2001Oct 3, 2002Lee Hyung JuLead frame for semiconductor packageUS20020163015 *Feb 22, 2002Nov 7, 2002Chippac, Inc.Plastic semiconductor packageUS20030073265 *Oct 12, 2001Apr 17, 2003Tom HuSemiconductor package with singulation creaseUS20040061202 *Sep 27, 2002Apr 1, 2004St Assembly Test Services Pte LtdLeadframe for die stacking applications and related die stacking conceptsUS20040113280 *Jul 18, 2003Jun 17, 2004Kim Tae-HunMulti-chip packageUS20060035414 *Aug 11, 2004Feb 16, 2006Park HyungjunProcess and lead frame for making leadless semiconductor packagesJP2000022044A * Title not availableJPH08306853A * Title not availableTW444367B * Title not available* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS8105876 *Jan 31, 2012Chipmos Technologies Inc.Leadframe for leadless package, structure and manufacturing method using the sameUS8735223 *Feb 16, 2012May 27, 2014Freescale Semiconductor, Inc.Semiconductor devices and methods of assembling sameUS20110136299 *Jun 9, 2011Chipmos Technologies Inc.Leadframe for leadless package, structure and manufacturing method using the sameUS20130056861 *Mar 7, 2013Freescale Semiconductor, IncSemiconductor devices and methods of assembling same* Cited by examinerClassifications U.S. Classification257/676, 257/E23.031International ClassificationH01L23/495Cooperative ClassificationY02P70/613, H01L24/49, H01L24/48, H01L2224/32245, H01L2224/48247, H01L2924/01013, H01L2224/85001, H01L2924/014, H01L21/6835, H05K2201/09745, H05K2201/10787, H01L21/4842, H05K2201/10689, H01L2224/49171, H05K3/3426, H01L2924/01006, H01L24/97, H01L2924/01082, H01L2224/97, H01L2924/19041, H01L23/49548, H01L2224/48091, H01L2924/01029, H01L21/561, H01L2924/01005, H01L21/568, H01L2924/01033, H01L2924/30107, H01L2224/73265European ClassificationH01L21/48C3M, H01L21/56T, H01L23/495G4, H05K3/34C3B, H01L21/56B, H01L21/683T, H01L24/97Legal EventsDateCodeEventDescriptionJul 31, 2015FPAYFee paymentYear of fee payment: 4RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services