Source: http://www.google.com/patents/US8198720?dq=4052565
Timestamp: 2014-04-19 15:06:39
Document Index: 304290008

Matched Legal Cases: ['Application No. 10', 'Application No. 200880024992', 'Application No. 10', 'Application No. 2010', 'Application No. 200705422', 'Application No. 200705422']

Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS3746934May 6, 1971Jul 17, 1973Siemens AgStack arrangement of semiconductor chipsUS5107328Feb 13, 1991Apr 21, 1992Micron Technology, Inc.Packaging means for a semiconductor die having particular shelf structureUS5128831Oct 31, 1991Jul 7, 1992Micron Technology, Inc.High-density electronic package comprising stacked sub-modules which are electrically interconnected by solder-filled viasUS5138434Jan 22, 1991Aug 11, 1992Micron Technology, Inc.Packaging for semiconductor logic devicesUS5145099Nov 4, 1991Sep 8, 1992Micron Technology, Inc.Method for combining die attach and lead bond in the assembly of a semiconductor packageUS5252857Aug 5, 1991Oct 12, 1993International Business Machines CorporationStacked DCA memory chipsUS5356838Oct 25, 1993Oct 18, 1994Samsung Electronics Co., Ltd.Manufacturing method of a semiconductor deviceUS5518957Mar 28, 1994May 21, 1996Samsung Electronics Co., Ltd.Method for making a thin profile semiconductor packageUS5554886Feb 7, 1995Sep 10, 1996Goldstar Electron Co., Ltd.Lead frame and semiconductor package with such lead frameUS5593927Dec 1, 1995Jan 14, 1997Micron Technology, Inc.Method for packaging semiconductor diceUS5677566May 8, 1995Oct 14, 1997Micron Technology, Inc.Semiconductor chip packageUS5760471Feb 3, 1997Jun 2, 1998Fujitsu LimitedSemiconductor device having an inner lead extending over a central portion of a semiconductor device sealed in a plastic package and an outer lead exposed to the outside of a side face of the plastic packageUS5801439Feb 21, 1997Sep 1, 1998Fujitsu LimitedSemiconductor device and semiconductor device unit for a stack arrangementUS5807762Mar 12, 1996Sep 15, 1998Micron Technology, Inc.Multi-chip module system and method of fabricationUS5811877Mar 31, 1997Sep 22, 1998Hitachi, Ltd.Semiconductor device structureUS5826628Jun 6, 1997Oct 27, 1998Micron Technology, Inc.Form tooling and method of forming semiconductor package leadsUS5835988Oct 24, 1996Nov 10, 1998Mitsubishi Denki Kabushiki KaishaPacked semiconductor device with wrap around external leadsUS5851845Dec 18, 1995Dec 22, 1998Micron Technology, Inc.Process for packaging a semiconductor die using dicing and testingUS5879965Jun 19, 1997Mar 9, 1999Micron Technology, Inc.Plastic lead frames for semiconductor devices, packages including same, and methods of fabricationUS5883426Apr 18, 1997Mar 16, 1999Nec CorporationStack moduleUS5891797Oct 20, 1997Apr 6, 1999Micron Technology, Inc.Method of forming a support structure for air bridge wiring of an integrated circuitUS5894218Aug 7, 1996Apr 13, 1999Micron Technology, Inc.Method and apparatus for automatically positioning electronic dice within component packagesUS5933713Apr 6, 1998Aug 3, 1999Micron Technology, Inc.Method of forming overmolded chip scale package and resulting productUS5938956Sep 10, 1996Aug 17, 1999Micron Technology, Inc.Circuit and method for heating an adhesive to package or rework a semiconductor dieUS5946553Sep 25, 1995Aug 31, 1999Micron Technology, Inc.Process for manufacturing a semiconductor package with bi-substrate dieUS5986209Jul 9, 1997Nov 16, 1999Micron Technology, Inc.Package stack via bottom leaded plastic (BLP) packagingUS5990566May 20, 1998Nov 23, 1999Micron Technology, Inc.High density semiconductor packageUS5994784Dec 18, 1997Nov 30, 1999Micron Technology, Inc.Die positioning in integrated circuit packagingUS6002167 *Sep 20, 1996Dec 14, 1999Hitachi Cable, Ltd.Semiconductor device having lead on chip structureUS6004867Dec 12, 1997Dec 21, 1999Samsung Electronics Co., Ltd.Chip-size packages assembled using mass production techniques at the wafer-levelUS6008070May 21, 1998Dec 28, 1999Micron Technology, Inc.Wafer level fabrication and assembly of chip scale packagesUS6018249Dec 11, 1997Jan 25, 2000Micron Technolgoy, Inc.Test system with mechanical alignment for semiconductor chip scale packages and diceUS6020624Apr 1, 1998Feb 1, 2000Micron Technology, Inc.Semiconductor package with bi-substrate dieUS6020629Jun 5, 1998Feb 1, 2000Micron Technology, Inc.Stacked semiconductor package and method of fabricationUS6028352Jun 10, 1998Feb 22, 2000Irvine Sensors CorporationIC stack utilizing secondary leadframesUS6028365Mar 30, 1998Feb 22, 2000Micron Technology, Inc.Integrated circuit package and method of fabricationUS6030858Nov 19, 1997Feb 29, 2000Lg Semicon Co., Ltd.Stacked bottom lead package in semiconductor devices and fabricating method thereofUS6048744Sep 15, 1997Apr 11, 2000Micron Technology, Inc.Integrated circuit package alignment featureUS6051878Jan 19, 1999Apr 18, 2000Micron Technology, Inc.Method of constructing stacked packagesUS6064194Dec 17, 1996May 16, 2000Micron Technology, Inc.Method and apparatus for automatically positioning electronic dice within component packagesUS6066514Nov 3, 1997May 23, 2000Micron Technology, Inc.Adhesion enhanced semiconductor die for mold compound packagingUS6072233May 4, 1998Jun 6, 2000Micron Technology, Inc.Stackable ball grid array packageUS6072236Mar 7, 1996Jun 6, 2000Micron Technology, Inc.Micromachined chip scale packageUS6089920May 4, 1998Jul 18, 2000Micron Technology, Inc.Modular die sockets with flexible interconnects for packaging bare semiconductor dieUS6097087Oct 31, 1997Aug 1, 2000Micron Technology, Inc.Semiconductor package including flex circuit, interconnects and dense array external contactsUS6103547Jan 17, 1997Aug 15, 2000Micron Technology, Inc.High speed IC package configurationUS6104086Apr 13, 1998Aug 15, 2000Nec CorporationSemiconductor device having lead terminals bent in J-shapeUS6107122Aug 4, 1997Aug 22, 2000Micron Technology, Inc.Direct die contact (DDC) semiconductor packageUS6111312Jun 2, 1999Aug 29, 2000Fujitsu LimitedSemiconductor device with leads engaged with notchesUS6124634Sep 17, 1998Sep 26, 2000Micron Technology, Inc.Micromachined chip scale packageUS6130474Oct 12, 1999Oct 10, 2000Micron Technology, Inc.Leads under chip IC packageUS6133068Mar 8, 1999Oct 17, 2000Micron Technology, Inc.Increasing the gap between a lead frame and a semiconductor dieUS6133622Dec 31, 1997Oct 17, 2000Micron Technology, Inc.High speed IC package configurationUS6146919Jun 21, 1999Nov 14, 2000Micron Technology, Inc.Package stack via bottom leaded plastic (BLP) packagingUS6148509Aug 26, 1998Nov 21, 2000Micron Technology, Inc.Method for supporting an integrated circuit dieUS6150710Apr 29, 1999Nov 21, 2000Micron Technology, Inc.Transverse hybrid LOC packageUS6150717Jun 16, 1998Nov 21, 2000Micron Technology, Inc.Direct die contact (DDC) semiconductor packageUS6153924Dec 13, 1999Nov 28, 2000Micron Technology, Inc.Multilayered lead frame for semiconductor packageUS6159764Jul 2, 1997Dec 12, 2000Micron Technology, Inc.Varied-thickness heat sink for integrated circuit (IC) packages and method of fabricating IC packagesUS6175149Feb 13, 1998Jan 16, 2001Micron Technology, Inc.Mounting multiple semiconductor dies in a packageUS6184465Nov 12, 1998Feb 6, 2001Micron Technology, Inc.Semiconductor packageUS6187615Dec 28, 1998Feb 13, 2001Samsung Electronics Co., Ltd.Chip scale packages and methods for manufacturing the chip scale packages at wafer levelUS6188232Jun 29, 1998Feb 13, 2001Micron Technology, Inc.Temporary package, system, and method for testing semiconductor dice and chip scale packagesUS6198172Feb 20, 1997Mar 6, 2001Micron Technology, Inc.Semiconductor chip packageUS6201304Oct 10, 1997Mar 13, 2001Micron Technology, Inc.Flip chip adaptor package for bare dieUS6212767Aug 31, 1999Apr 10, 2001Micron Technology, Inc.Assembling a stacked die packageUS6214716Sep 30, 1998Apr 10, 2001Micron Technology, Inc.Semiconductor substrate-based BGA interconnection and methods of farication sameUS6225689Aug 14, 2000May 1, 2001Micron Technology, Inc.Low profile multi-IC chip package connectorUS6228548Feb 11, 2000May 8, 2001Micron Technology, Inc.Method of making a multichip semiconductor packageUS6228687Jun 28, 1999May 8, 2001Micron Technology, Inc.Wafer-level package and methods of fabricatingUS6229202Jan 10, 2000May 8, 2001Micron Technology, Inc.Semiconductor package having downset leadframe for reducing package bowUS6232666Dec 4, 1998May 15, 2001Mciron Technology, Inc.Interconnect for packaging semiconductor dice and fabricating BGA packagesUS6235552Jan 12, 2000May 22, 2001Samsung Electronics Co., Ltd.Chip scale package and method for manufacturing the same using a redistribution substrateUS6235554May 24, 1999May 22, 2001Micron Technology, Inc.Method for fabricating stackable chip scale semiconductor packageUS6239489Jul 30, 1999May 29, 2001Micron Technology, Inc.Reinforcement of lead bonding in microelectronics packagesUS6242798 *Feb 29, 2000Jun 5, 2001Hyundai Electronics Industries Co., Ltd.Stacked bottom lead package in semiconductor devicesUS6246108Aug 12, 1999Jun 12, 2001Micron Technology, Inc.Integrated circuit package including lead frame with electrically isolated alignment featureUS6246110Oct 12, 1999Jun 12, 2001Micron Technology, Inc.Downset lead frame for semiconductor packagesUS6247629Feb 5, 1999Jun 19, 2001Micron Technology, Inc.Wire bond monitoring system for layered packagesUS6252772Feb 10, 1999Jun 26, 2001Micron Technology, Inc.Removable heat sink bumpers on a quad flat packageUS6258623Jul 8, 1999Jul 10, 2001Micron Technology, Inc.Low profile multi-IC chip package connectorUS6258624May 1, 2000Jul 10, 2001Micron Technology, Inc.Semiconductor package having downset leadframe for reducing package bowUS6259153Jul 12, 2000Jul 10, 2001Micron Technology, Inc.Transverse hybrid LOC packageUS6261865Oct 6, 1998Jul 17, 2001Micron Technology, Inc.Multi chip semiconductor package and method of constructionUS6265766Jan 14, 2000Jul 24, 2001Micron Technology, Inc.Flip chip adaptor package for bare dieUS6271580Apr 29, 1999Aug 7, 2001Micron Technology, Inc.Leads under chip in conventional IC packageUS6281042Aug 31, 1998Aug 28, 2001Micron Technology, Inc.Structure and method for a high performance electronic packaging assemblyUS6281577Apr 22, 1997Aug 28, 2001Pac Tech-Packaging Technologies GmbhChips arranged in plurality of planes and electrically connected to one anotherUS6284571May 25, 1999Sep 4, 2001Micron Technology, Inc.Lead frame assemblies with voltage reference plane and IC packages including sameUS6285204Jun 3, 2000Sep 4, 2001Micron Technology, Inc.Method for testing semiconductor packages using oxide penetrating test contactsUS6291894Aug 31, 1998Sep 18, 2001Micron Technology, Inc.Method and apparatus for a semiconductor package for vertical surface mountingUS6294839Aug 30, 1999Sep 25, 2001Micron Technology, Inc.Apparatus and methods of packaging and testing dieUS6297547May 19, 2000Oct 2, 2001Micron Technology Inc.Mounting multiple semiconductor dies in a packageUS6303981Sep 1, 1999Oct 16, 2001Micron Technology, Inc.Semiconductor package having stacked dice and leadframes and method of fabricationUS6303985Nov 12, 1998Oct 16, 2001Micron Technology, Inc.Semiconductor lead frame and package with stiffened mounting paddleUS6310390Apr 8, 1999Oct 30, 2001Micron Technology, Inc.BGA package and method of fabricationUS6313998Apr 2, 1999Nov 6, 2001Legacy Electronics, Inc.Circuit board assembly having a three dimensional array of integrated circuit packagesUS6320251Jan 18, 2000Nov 20, 2001Amkor Technology, Inc.Stackable package for an integrated circuitUS6326697Dec 10, 1998Dec 4, 2001Micron Technology, Inc.Hermetically sealed chip scale packages formed by wafer level fabrication and assemblyUS6326698Jun 8, 2000Dec 4, 2001Micron Technology, Inc.Semiconductor devices having protective layers thereon through which contact pads are exposed and stereolithographic methods of fabricating such semiconductor devicesUSRE36469Sep 26, 1995Dec 28, 1999Micron Technology, Inc.Packaging for semiconductor logic devices* Cited by examinerNon-Patent CitationsReference1International Search Report and Written Opinion issued Dec. 11, 2008 for International Application No. PCT/US2008/070325.2Office Action issued Apr. 18, 2011 in Republic of Korea Application No. 10-2010-7002652, 6 pages.3Office Action issued Apr. 26, 2011 in People's Republic of China Application No. 200880024992.4, 31 pages.4Office Action issued Nov. 1, 2011 in Republic of Korea Application No. 10-2010-7002652, 16 pages.5Office Action issued Sep. 20, 2011 for Japan Application No. 2010-518303, 7 pages.6Search Report and Written Opinion issued Feb. 16, 2009 in Singapore Application No. 200705422-4.7Written Opinion (corrected version) issued Jul. 1, 2009 in Singapore Application No. 200705422-4.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8322118 *Jul 13, 2009Dec 4, 2012Dell Products L.P.Systems and methods for packaging of information handling systems* Cited by examinerClassifications U.S. Classification257/686, 257/685, 438/110, 438/109, 257/E25.013, 438/107, 257/684International ClassificationH01L25/065Cooperative ClassificationH01L2225/1029, H01L2225/1064, H01L2225/1058, H01L24/18, H01L23/3121, H01L2924/01078, H01L2924/01079, H01L23/49861, H01L2224/16, H01L23/49555, H01L21/50, H01L25/105, H01L23/49811European ClassificationH01L23/495G4B6, H01L25/10J, H01L23/498LRotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google