Source: https://patents.google.com/patent/KR101994227B1/en
Timestamp: 2020-01-27 22:27:18
Document Index: 316543438

Matched Legal Cases: ['art.\n2', 'art 21', 'art.\n3', 'arts 115', 'arts 115', 'art 115']

KR101994227B1 - Organic light emitting diode device and method for fabricating the same - Google Patents
Organic light emitting diode device and method for fabricating the same Download PDF
KR101994227B1
KR101994227B1 KR1020120142202A KR20120142202A KR101994227B1 KR 101994227 B1 KR101994227 B1 KR 101994227B1 KR 1020120142202 A KR1020120142202 A KR 1020120142202A KR 20120142202 A KR20120142202 A KR 20120142202A KR 101994227 B1 KR101994227 B1 KR 101994227B1
KR1020120142202A
KR20140074037A (en
송상무
나세환
타로 하스미
2012-12-07 Priority to KR1020120142202A priority Critical patent/KR101994227B1/en
2014-06-17 Publication of KR20140074037A publication Critical patent/KR20140074037A/en
2019-09-30 Publication of KR101994227B1 publication Critical patent/KR101994227B1/en
239000010408 films Substances 0 abstract claims description 148
239000010409 thin films Substances 0 abstract claims description 103
230000000903 blocking Effects 0 abstract claims description 46
239000011810 insulating materials Substances 0 description 27
-1 for example Chemical compound 0 description 14
229910004207 SiNx Inorganic materials 0 description 10
229910004298 SiO 2 Inorganic materials 0 description 10
229910016027 MoTi Inorganic materials 0 description 5
The present invention relates to an organic light emitting device and a method for manufacturing the same, and the disclosed invention includes: a switching thin film transistor and a driving thin film transistor formed in each pixel area on a substrate; A planarization layer formed on the substrate including the switching thin film transistor and the driving thin film transistor, the planarization film having a moisture blocking portion in a non-display area of the substrate; A first electrode formed on the planarization layer and connected to the drain electrode of the driving thin film transistor; Banks formed around and in a non-display area of each pixel area of the substrate including the first electrode; An organic emission layer formed on each of the pixel areas above the first electrode; A second electrode formed on an entire surface of the substrate including the organic light emitting layer; A first passivation film formed on an entire surface of the substrate including the second electrode; An organic film formed on the first passivation film; A second passivation film formed on the organic film and the first passivation film; A protective film facing the substrate; And an adhesive interposed between the substrate and the protective film to form a panel state by adhering the substrate and the protective film.
Organic electroluminescent device and manufacturing method therefor {ORGANIC LIGHT EMITTING DIODE DEVICE AND METHOD FOR FABRICATING THE SAME}
The present invention relates to an organic light emitting diode device (hereinafter, referred to as "OLED"), and more particularly, to block moisture from penetrating into the organic light emitting diode from the outside, thereby preventing the environment of the organic light emitting diode. The present invention relates to an organic light emitting device capable of improving reliability and a method of manufacturing the same.
One of the flat panel displays (FPD), an organic light emitting display device has high luminance and low operating voltage characteristics. In addition, the self-luminous self-illuminating type provides high contrast ratio, enables ultra-thin display, easy response sphere with a response time of several microseconds (μs), no restriction on viewing angle, and low temperature. It is stable even in the case of driving at low voltage of DC 5-15V, so that the fabrication and design of the driving circuit is easy.
In addition, the manufacturing process of the organic electroluminescent device is very simple because the deposition (deposition) and encapsulation (encapsulation) equipment is all.
The organic light emitting diode having such characteristics is largely divided into a passive matrix type and a matrix type. In the passive matrix method, a scan line and a signal line cross each other to form a device in a matrix form, and each pixel In order to drive, the scanning lines are sequentially driven over time, and in order to represent the required average luminance, the instantaneous luminance must be equal to the average luminance multiplied by the number of lines.
However, in the active matrix method, a thin film transistor (TFT), which is a switching element for turning on / off a pixel area, is positioned for each pixel area, and is connected to the switching thin film transistor and the driving thin film transistor is connected to the driving thin film transistor. It is connected to a power supply wiring and an organic light emitting diode and is formed for each pixel region.
In this case, a first electrode connected to the driving thin film transistor is turned on / off in a pixel area unit, and a second electrode facing the first electrode serves as a common electrode to be interposed between these two electrodes. Together with the organic light emitting layer, the organic light emitting diode is formed.
In the active matrix method having this characteristic, the voltage applied to the pixel region is charged in the storage capacitor Cst, and the power is applied until the next frame signal is applied. Run continuously during the screen.
Therefore, since low luminance, high definition, and large size can be obtained even when a low current is applied, an active matrix type organic light emitting diode is mainly used in recent years.
The basic structure and operation characteristics of the active matrix organic light emitting diode will be described with reference to the accompanying drawings.
1 is a configuration circuit diagram of one pixel area of a general active matrix organic light emitting diode.
Referring to FIG. 1, one pixel area of a general active matrix organic light emitting diode includes a switching thin film transistor STr, a driving thin film transistor DTr, a storage capacitor Cst, and an organic light emitting diode E. .
A gate line GL is formed in a first direction, and is disposed in a second direction crossing the first direction to define a pixel region P together with the gate line GL, and a data line DL is formed. The power line PL is spaced apart from the data line DL to apply a power voltage.
In addition, a switching thin film transistor STr is formed at a portion where the data line DL and the gate wiring GL cross each other, and are electrically connected to the switching thin film transistor STr inside each pixel region P. FIG. The driving thin film transistor DTr is formed.
In this case, the driving thin film transistor DTr is electrically connected to the organic light emitting diode E. That is, the first electrode, which is one terminal of the organic light emitting diode E, is connected to the drain electrode of the driving thin film transistor DTr, and the second electrode, which is the other terminal, is connected to the power line PL. In this case, the power line PL transfers a power supply voltage to the organic light emitting diode E. In addition, a storage capacitor Cst is formed between the gate electrode and the source electrode of the driving thin film transistor DTr.
Therefore, when a signal is applied through the gate line GL, the switching thin film transistor STr is turned on, and the signal of the data line DL is transferred to the gate electrode of the driving thin film transistor DTr to drive the driving signal. Since the thin film transistor DTr is turned on, light is output through the organic light emitting diode E. At this time, when the driving thin film transistor DTr is in an on state, the level of the current flowing from the power supply line PL to the organic light emitting diode E is determined, and thus the organic light emitting diode E is It is possible to implement gray scale.
In addition, the storage capacitor Cst serves to maintain a constant gate voltage of the driving thin film transistor DTr when the switching thin film transistor STr is turned off, thereby turning off the switching thin film transistor STr. Even in the off state, the level of the current flowing through the organic light emitting diode E can be kept constant until the next frame.
On the other hand, Figure 2 is a schematic cross-sectional view showing an organic light emitting device according to the prior art.
2, in the organic light emitting diode 10 according to the related art, a display area AA is defined on a substrate 11, and a non-display area NA is defined outside the display area AA. The display area AA includes a plurality of pixel areas P defined as areas captured by a gate line (not shown) and a data line (not shown). Power wirings (not shown) are provided side by side.
In each of the plurality of pixel areas P, a switching thin film transistor (not shown) and a driving thin film transistor DTr are formed.
In the organic light emitting diode 10 according to the related art, the substrate 11 on which the driving thin film transistor DTr and the organic light emitting diode E is formed is encapsulated by a protective film (not shown).
Referring to the organic light emitting device 10 according to the related art in detail, as shown in FIG. 2, the display area AA is defined in the substrate 11, and the display area AA is not displayed outside the display area AA. An area NA is defined, and the display area AA includes a plurality of pixel areas P defined as areas captured by a gate line (not shown) and a data line (not shown). The power supply wiring (not shown) is provided in parallel with the data wiring (not shown).
Here, a plurality of driving circuit lines GIP, ground lines GND, and the like are formed on the substrate 11 of the non-display area NA.
Although not shown in the drawing, the driving thin film transistor DTr is formed on a semiconductor layer, a gate insulating film, a gate electrode formed on the gate insulating film on the semiconductor layer, and an interlayer insulating film formed on the gate insulating film including the gate electrode. And a source electrode and a drain electrode formed to be spaced apart from each other.
Meanwhile, an interlayer insulating layer 13 and an organic planarization layer having a drain contact hole (not shown) that expose a drain electrode of the driving thin film transistor DTr and the switching thin film transistor DTr. (15) is laminated.
In addition, the organic planarization layer 15 is contacted through a drain electrode (not shown) of the driving thin film transistor DTr and the drain contact hole (not shown), and separated in each pixel area P. The first electrode 19 which is an anode is formed.
A bank 21 is formed on the first electrode 19 to separate the pixel regions P. In this case, the bank 21 is disposed between adjacent pixel regions P. In addition, the bank 21 is formed not only between adjacent pixel regions P, but a part 21 of the bank 21 is also formed in the outer portion of the panel, that is, the non-display region NA.
On the first electrode 19 in each pixel region P surrounded by the bank 21, an organic emission layer 23 formed of an organic emission pattern (not shown) that emits red, green, and blue colors is formed. .
In addition, a second electrode 25, which is a cathode, is formed on the entire surface of the display area AA and the non-display area NA on the organic emission layer 23 and the bank 21. In this case, the organic light emitting layer 23 interposed between the first electrode 19 and the second electrode 25 and the two electrodes 19 and 25 forms an organic light emitting diode (E).
On the other hand, the first passivation film 27 is formed on the entire surface of the substrate including the second electrode 25 as an insulating film for preventing moisture permeation.
In the display area AA on the first passivation layer 27, an organic layer 29 made of a polymer organic material such as a polymer is formed.
The second passivation layer 31 is further formed on the first passivation layer 27 including the organic layer 29 to block moisture from penetrating through the organic layer 29.
Further, a barrier film (not shown) for preventing encapsulation and upper moisture permeation of the organic light emitting diode E is disposed on the front surface of the substrate including the second passivation layer 31. A pressure sensitive adhesive (hereinafter referred to as PSA) (not shown) is interposed between the substrate 11 and the protective film (not shown) to be in close contact with the substrate 11 and the protective film (not shown) without an air layer. have. In this case, the second passivation film 31, the adhesive (not shown), and the protective film (not shown) form a face seal structure.
Thus, the substrate 11 and the protective film (barrier film) (not shown) are fixed by an adhesive (not shown) to form a panel state, thereby forming the organic light emitting device 10 according to the prior art.
However, according to the organic light emitting device according to the prior art, when a defect occurs in a face seal, for example, a protective film, an adhesive, etc., moisture (H 2 O) may cause the defect and the planarization film. It quickly penetrates into the active area. In this case, in order to prevent moisture from penetrating through the planarization layer, when the planarization layer is not formed in the non-display area NA, the quality of the inorganic insulating layer, for example, the passivation layer, which is disposed on the organic light emitting diode is different. Will fall.
In addition, when a defect occurs in the protective film, the adhesive or the like, moisture (H 2 O) quickly penetrates into the active area through the bank along with the defect. At this time, in order to prevent moisture from penetrating through the bank, since there is a flattening film when no bank is formed in the non-display area, there is a limit in preventing moisture from infiltrating through the flattening film. .
The present invention is to solve the problems of the prior art, an object of the present invention is to improve the environmental reliability of the organic light emitting device by forming a water blocking portion in the planarization film of the non-display area to block moisture penetrating into the display area from the outside The present invention provides an organic EL device and a method of manufacturing the same.
According to an aspect of the present invention, there is provided an organic light emitting display device including: a display area including a plurality of pixel areas and a non-display area defined outside thereof; A switching thin film transistor and a driving thin film transistor formed in each pixel area on the substrate; A planarization film formed on a substrate including the switching thin film transistor and a driving thin film transistor, the planarization film having a moisture blocking portion in a non-display area of the substrate; A first electrode formed on the planarization layer and connected to the drain electrode of the driving thin film transistor; Banks formed around and in a non-display area of each pixel area of the substrate including the first electrode; An organic emission layer formed on each of the pixel areas above the first electrode; A second electrode formed on an entire surface of the substrate including the organic light emitting layer; A first passivation film formed on an entire surface of the substrate including the second electrode; An organic film formed on the first passivation film; A second passivation film formed on the organic film and the first passivation film; A protective film facing the substrate; And an adhesive interposed between the substrate and the protective film to form a panel state by adhering the substrate and the protective film.
According to an aspect of the present invention, there is provided a method of manufacturing an organic light emitting display device, including: providing a display area including a plurality of pixel areas and a substrate having a non-display area defined outside thereof; Forming a switching thin film transistor and a driving thin film transistor in each pixel area on the substrate; Forming a planarization layer on the substrate including the switching thin film transistor and the driving thin film transistor; Forming a moisture barrier on the planarization layer of the non-display area; Forming a first electrode connected to the drain electrode of the driving thin film transistor on the planarization layer; Forming a bank around each pixel region of the substrate including the first electrode and in a non-display region; Forming an organic emission layer on the first electrode of the pixel region; Forming a second electrode on an entire surface of the substrate including the organic light emitting layer; Forming a first passivation film on an entire surface of the substrate including the second electrode; Forming an organic film on the first passivation film; Forming a second passivation film on the organic film and the first passivation film; Forming a protective film facing the substrate; Forming an adhesive to form a panel state by adhering the substrate and the protective film between the substrate and the protective film; characterized in that it comprises a.
According to the organic light emitting device according to the present invention and a method of manufacturing the same, by forming a water blocking portion in the planarization film located in the non-display area in the non-display area, by foreign matter or impact on the first or second passivation film, etc. Even if cracks are generated and moisture penetrates and the water propagates through the flattening film and the bank, the water is prevented from propagating to the display area by the water blocking part formed in the flattening film positioned in the non-display area. In particular, an anode hole formed in the auxiliary electrode pattern positioned outside the display area AA in order to induce out gassing of the planarization film which causes degradation of organic material in the emission area in advance. Since the planarization film and the bank are in contact with each other through holes, the water H 2 O penetrated from the outside may simultaneously serve as a path for transferring the display area AA. Although 2 O) is transmitted through the anode hole 121, the moisture is no longer propagated to the display area AA by the moisture blocking portions formed in the planarization layer under the auxiliary electrode pattern.
Accordingly, the organic light emitting diode and the method of manufacturing the same according to the present invention have a front seal because moisture is no longer propagated to the display area AA by moisture blocking portions formed in the planarization film under the auxiliary electrode pattern. Environmental reliability can be improved in the top emission type organic light emitting device to which is applied.
2 is a schematic cross-sectional view of an organic light emitting device according to the prior art.
3 is a schematic plan view of an organic light emitting device according to the present invention.
4 is a cross-sectional view taken along line IV-IV of FIG. 3, and is a schematic cross-sectional view of an organic light emitting diode according to the present invention.
FIG. 5 is an enlarged cross-sectional view of "A" of FIG. 4 and is an enlarged schematic view showing that water infiltration is blocked from the water blocking portion and the metal pattern of the planarization film.
6A to 6H are cross-sectional views illustrating a process of manufacturing an organic light emitting diode according to the present invention.
Hereinafter, an organic light emitting diode according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.
The organic light emitting device according to the present invention is divided into a top emission type and a bottom emission type according to the transmission direction of the emitted light. Hereinafter, the top emission method will be described as an example. would.
3 to 5, in the organic light emitting device 100 according to the present invention, a substrate 101 on which a driving thin film transistor DTr and an organic light emitting device E is formed is encapsulated by a protective film 137. It is encapsulation.
Referring to FIGS. 3 and 4, the organic light emitting diode 100 according to the present invention includes a display area AA including a plurality of pixel areas P and a substrate on which a non-display area NA is defined. 101; A switching thin film transistor (not shown) and a driving thin film transistor DTr formed in each pixel area P on the substrate 101; A planarization layer 113 formed on the substrate 101 including the switching thin film transistor and the driving thin film transistor DTr, and having a water blocking unit 115b in the non-display area NA of the substrate; A first electrode 117 formed on the planarization film 113 and connected to the drain electrode 111b of the driving thin film transistor DTr; A bank 123 formed around each pixel region P of the substrate including the first electrode 117 and in the non-display region NA; An organic emission layer 125 formed on each of the pixel areas P on the first electrode 117; A second electrode 127 formed on an entire surface of the substrate including the organic light emitting layer 125; A first passivation film 129 formed on the entire surface of the substrate including the second electrode 127; An organic film 131 formed on the first passivation film 129; A second passivation layer 133 formed on the organic layer 131 and the first passivation layer 129; A protective film 137 positioned facing the substrate; And an adhesive 135 interposed between the substrate 101 and the protective film 137 to adhere the substrate 101 and the protective film 137 to form a panel state.
Referring to the organic light emitting device 100 according to the present invention in detail, as shown in FIGS. 3 to 5, the display area AA is defined on the substrate 101, and the display area AA is located outside the display area AA. A non-display area NA is defined, and the display area AA includes a plurality of pixel areas P defined as areas captured by a gate line (not shown) and a data line (not shown). A power supply wiring (not shown) is provided in parallel with the data wiring (not shown).
Here, a glass substrate or a flexible substrate may be used as the substrate 101. A flexible substrate may be used to maintain display performance even when a flexible organic light emitting diode (OLED) is bent like a paper. It is made of a flexible glass substrate or plastic material having a.
In addition, a buffer layer (not shown) made of an insulating material such as silicon oxide (SiO 2 ) or silicon nitride (SiNx) is formed on the substrate 101. At this time, the reason why the buffer layer (not shown) is formed below the semiconductor layer 103 formed in a subsequent process is due to the release of alkali ions emitted from the inside of the substrate 101 during crystallization of the semiconductor layer 103. This is to prevent deterioration of the characteristics of the semiconductor layer 103.
In addition, each pixel area P in the display area AA above the buffer layer (not shown) is made of pure polysilicon corresponding to the driving area (not shown) and the switching area (not shown), respectively. The semiconductor layer 103 includes a first region 103a constituting a channel and second regions 103b and 103c doped with a high concentration of impurities on both sides of the first region 103a.
A gate insulating layer 105 is formed on the buffer layer including the semiconductor layer 103, and the semiconductor layer 103 is disposed above the gate insulating layer 105 in the driving region (not shown) and the switching region (not shown). The gate electrode 107 is formed to correspond to the first region 103a of.
In addition, the gate insulating layer 105 is connected to the gate electrode 107 formed in the switching region (not shown) and extends in one direction to form a gate wiring (not shown). In this case, the gate electrode 107 and the gate wiring (not shown) is a first metal material having low resistance, for example, aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum ( Mo) may be made of any one of the molybdenum (MoTi) may have a single layer structure, or may be made of two or more of the first metal material to have a double layer or triple layer structure. In the drawing, the gate electrode 107 and the gate wiring (not shown) are illustrated as one example. In addition, when the gate electrode 107 is formed, a gate driving circuit wiring (GIP) 107a and a ground wiring (GND) 107b are formed in the non-display area NA of the substrate 101.
Meanwhile, an interlayer insulating layer made of an insulating material, for example, silicon oxide (SiO 2 ) or silicon nitride (SiNx), which is an inorganic insulating material on the entire display area of the substrate including the gate electrode 107 and the gate wiring (not shown). 109 is formed. In this case, a semiconductor exposing each of the second regions 103b and 103c positioned on both sides of the first region 103a of each semiconductor layer 103 in the interlayer insulating layer 109 and the gate insulating layer 105 under the interlayer insulating layer 109. A layer contact hole (not shown) is provided.
An upper portion of the interlayer insulating layer 109 including the semiconductor layer contact hole (not shown) intersects with the gate wiring (not shown), defines the pixel region P, and defines a second metal material, for example, aluminum ( Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum (MoTi), chromium (Cr), titanium (Ti) or a data wiring made of one or more materials (not shown) ) And a power supply wiring (not shown) are formed apart from each other. In this case, the power line (not shown) may be formed in parallel with the gate line (not shown) on the layer on which the gate line (not shown) is formed, that is, the gate insulating layer 105.
4 and 5, the driving regions (not shown) and the switching regions (not shown) on the interlayer insulating layer 109 are spaced apart from each other and exposed through the semiconductor layer contact hole (not shown). The source electrode 111a and the drain electrode 111b are formed in contact with the two regions 103b and 103c and made of the same second metal material as the data line (not shown). In this case, the source electrode 111a formed to be spaced apart from the semiconductor layer 103, the gate insulating layer 105, the gate electrode 107, and the interlayer insulating layer 109 sequentially stacked in the driving region (not shown), and The drain electrode 111b forms a driving thin film transistor (not shown, see DTr of FIG. 6B).
In the drawings, the data wiring (not shown), the source electrode 111a and the drain electrode 111b all have a single layer structure, but these components may form a double layer or triple layer structure. have.
In this case, although not shown in the drawing, a switching thin film transistor (not shown) having the same stacked structure as the driving thin film transistor DTr is also formed in the switching region (not shown). In this case, the switching thin film transistor (not shown) is electrically connected to the driving thin film transistor DTr, the gate line (not shown), and the data line 113. That is, the gate line (not shown) and the data line (not shown) are respectively connected to the gate electrode (not shown) and the source electrode (not shown) of the switching thin film transistor (not shown), the switching thin film transistor ( The drain electrode of the driving thin film transistor DTr is electrically connected to the gate electrode 107 of the driving thin film transistor DTr.
Meanwhile, although the driving thin film transistor DTr and the switching thin film transistor (not shown) have a semiconductor layer 103 of polysilicon and are configured as a top gate type, the driving switching thin film transistor is shown as an example. It is apparent that the DTr and the switching thin film transistor (not shown) may be configured as a bottom gate type having a semiconductor layer of amorphous silicon.
When the driving thin film transistor DTr and the switching thin film transistor (STr) are configured as a bottom gate type, the stacked structure is spaced apart from the active layer of the gate electrode / gate insulating film / pure amorphous silicon and is formed of impurity amorphous silicon. The semiconductor layer is formed of an ohmic contact layer and / or a source electrode and a drain electrode spaced apart from each other. In this case, the gate line is formed to be connected to the gate electrode of the switching thin film transistor on the layer where the gate electrode is formed, and the data line is formed to be connected to the source electrode on the layer where the source electrode of the switching thin film transistor is formed.
Meanwhile, a planarization layer 113 having a drain contact hole (not shown) exposing the drain electrode 111b of the driving thin film transistor DTr is disposed on the driving thin film transistor DTr and the switching thin film transistor DTnot. Formed. In this case, the planarization layer 113 may include an insulating material, for example, an inorganic insulating material including silicon oxide (SiO 2 ) and silicon nitride (SiNx), or an organic group including photo-acyl. Use any one of the insulating materials. In the present invention, a case where the planarization film 113 is formed using an organic insulating material will be described as an example.
In addition, the planarization film 113 corresponding to the display area of the substrate 101 has a drain contact hole 115a for electrically contacting the drain electrode 111b with the first electrode 117 formed in a subsequent process. Formed.
In addition, a plurality of moisture blocking parts 115b are formed in the planarization film 113 corresponding to the non-display area of the substrate 101 to prevent moisture from penetrating and propagating to the display area. In this case, each of the plurality of moisture blocking units 115b is formed by cutting the planarization film 113 positioned in the non-display area NA of the substrate 101 by a predetermined width. It is formed along the outer peripheral surface of NA). In addition, the moisture blocking unit 115b is disposed corresponding to an upper portion of the driving circuit wiring applied to the power source DC among the gate driving circuit wiring 107b.
Therefore, even if moisture penetrates from the outside, the moisture is no longer propagated to the display area AA by the moisture blocking unit 115b formed in the planarization film 113 of the non-display area NA. That is, the moisture blocking unit 115b is formed by cutting the planarization film 113 which serves as a path through which the moisture penetrates, so that the cut water blocking unit (even if the water penetrates through the planarizing film 113) Only propagation up to 115b) no longer proceeds to the planarization film on the display area side.
On the other hand, the planarization layer 113 is in contact with the drain electrode 111b of the driving thin film transistor DTr through the drain contact hole (not shown), and has a shape separated from each pixel area P. One electrode 117 is formed. In this case, the auxiliary electrode pattern 119 is formed on the planarization layer 113 of the non-display area NA to lower the resistance of the second electrode 127, which is a cathode electrode formed in a subsequent process. This is because the second electrode 127 is formed of a transparent conductive material, which may be a problem in uniformly applying a constant current because the resistance value is large, so that the auxiliary value of the second electrode 127 may be lowered. By forming the electrode pattern 119 and electrically connecting the second electrode 127, the resistance of the second electrode 127 can be lowered. In this case, the auxiliary electrode pattern 119 is electrically connected to the second electrode 127 and the ground wiring 107b. In this case, the auxiliary electrode pattern 119 is electrically connected to the ground wiring 107b through a ground wiring contact hole (not shown, see 115c of FIG. 5).
In addition, in order to induce out gassing of the planarization film 113 that causes degradation of the organic material in the light emitting area, the auxiliary electrode pattern 119 positioned outside the display area AA is previously described. In the anode holes 121 are formed. At this time, the path that the planarization layer 113 and the bank 123 is therefore presented abuts connection, a water (H 2 O) penetrates from the outside at the same time transmitted to the display area (AA) through the anode holes 121 It also works. However, even if the water (H 2 O) penetrating from the outer portion is transmitted through the anode hole 121, by the water blocking portions 115b formed in the planarization film 113 under the auxiliary electrode pattern 119. Moisture no longer propagates to the display area AA and is blocked.
Above the first electrode 117, an insulating material may be formed on the boundary of each pixel area P and the non-display area NA, for example, bensocyclobutene (BCB), polyimide, or photoacryl ( A bank 123 made of photo acryl is formed. In this case, the bank 123 is formed to surround each pixel area P so as to overlap the edge of the first electrode 121a and has a lattice shape having a plurality of openings as a whole of the display area AA. It is coming true. The bank 123 is also formed in the non-display area NA, which is an outer portion of the panel.
On the other hand, an organic emission layer 125 formed of an organic emission pattern (not shown) that emits red, green, and blue light is formed on the first electrode 121a in each pixel area P surrounded by the bank 123. It is. The organic light emitting layer 125 may be composed of a single layer made of an organic light emitting material or, although not shown in the drawing, in order to increase light emission efficiency, a hole injection layer, a hole transporting layer, and a light emitting material layer (emitting material layer), an electron transporting layer (electron transporting layer) and an electron injection layer (electron injection layer) may be composed of multiple layers.
In addition, a second electrode 127 is formed in the display area AA of the substrate including the organic emission layer 125 and the bank 123. In this case, the organic light emitting layer 125 interposed between the first electrode 121a and the second electrode 127 and the two electrodes 121a and 127 forms an organic light emitting diode (E). The second electrode 127 is electrically connected to the auxiliary electrode pattern 119.
Accordingly, when a predetermined voltage is applied to the first electrode 121a and the second electrode 127 according to the selected color signal, the organic light emitting diode E may have holes and second holes injected from the first electrode 117. Electrons provided from the electrode 127 are transported to the organic light emitting layer 125 to form excitons, and when such excitons transition from the excited state to the ground state, light is generated and emitted in the form of visible light. In this case, since the emitted light passes through the transparent second electrode 127 to the outside, the organic light emitting diode 100 implements an arbitrary image.
On the other hand, a first passivation film 129 made of an insulating material, in particular an inorganic insulating material, silicon oxide (SiO 2 ) or silicon nitride (SiNx) is formed on the entire surface of the substrate including the second electrode 127. In this case, since the penetration of moisture into the organic light emitting layer 125 cannot be completely suppressed by the second electrode 127 alone, the organic light emitting layer is formed by forming the first protective layer 129 on the second electrode 127. It is possible to completely suppress the water penetration into the 125.
In addition, an organic layer 131 formed of a polymer organic material such as a polymer is formed on the first passivation layer 129. In this case, the polymer thin film constituting the organic layer 131 may be an olefin-based polymer (polyethylene, polypropylene), polyethylene terephthalate (PET), epoxy resin, fluoro resin, polysiloxane, or the like. This can be used.
In addition, an entire surface of the substrate including the organic layer 131 and the first passivation layer 129 may be formed of an insulating material, for example, an inorganic insulating material, such as silicon oxide, to block moisture from penetrating through the organic layer 131. A second passivation film 133 made of SiO 2 ) or silicon nitride (SiNx) is further formed.
A protective film 137 is disposed on the front surface of the substrate including the second passivation layer 133 so as to encapsulate the organic light emitting diode E, between the substrate 101 and the protective film 137. The adhesive 135 formed of any one of a frit, an organic insulating material, and a polymer material having transparent and adhesive properties is interposed in close contact with the substrate 101 and the barrier film 137 without an air layer. have. In this case, in the present invention, a case using PSA (Press Sensitive Adhesive) as the adhesive (not shown) will be described as an example.
As described above, the substrate 101 and the barrier film 137 are fixed by the adhesive 135 to form a panel, thereby forming the organic light emitting diode 100 according to the present invention.
Therefore, according to the organic light emitting device according to the present invention, by forming a water blocking portion in the planarization film positioned in the non-display area in the non-display area, the cracks may be caused by foreign matter or impact due to the first or second passivation film. Even if a crack occurs and moisture penetrates and the water propagates through the flattening film and the bank, the water is prevented from propagating to the display area by the water blocking part formed in the flattening film located in the non-display area. In particular, an anode hole formed in the auxiliary electrode pattern positioned outside the display area AA in order to induce out gassing of the planarization film which causes degradation of organic material in the emission area in advance. Since the planarization film and the bank are in contact with each other through holes, the water H 2 O penetrated from the outside may simultaneously serve as a path for transferring the display area AA. Although 2 O) is transmitted through the anode hole 121, the moisture is no longer propagated to the display area AA by the moisture blocking portions formed in the planarization layer under the auxiliary electrode pattern.
Therefore, in the organic light emitting device according to the present invention, since the moisture is no longer propagated to the display area AA by the moisture blocking parts formed in the planarization film under the auxiliary electrode pattern, the front seal is applied. In the top emission type organic light emitting device, environmental reliability may be improved.
Meanwhile, a method of manufacturing an organic light emitting diode according to the present invention will be described with reference to FIGS. 6A to 6H.
6A to 6H are cross-sectional views schematically illustrating a method of manufacturing an organic light emitting diode according to the present invention.
As shown in FIG. 6A, a display area AA and a substrate 101 having a non-display area NA defined outside the display area AA are prepared. In this case, the substrate 101 may be a glass substrate or a flexible substrate. The flexible substrate may be flexible to maintain display performance even when the flexible organic light emitting diode (OLED) is bent like paper. It is made of flexible glass substrate or plastic material.
Next, a buffer layer (not shown) made of an insulating material, for example, silicon oxide (SiO 2 ) or silicon nitride (SiNx), which is an inorganic insulating material, is formed on the substrate 101. At this time, the reason why the buffer layer (not shown) is formed below the semiconductor layer 103 formed in a subsequent process is due to the release of alkali ions emitted from the inside of the substrate 101 during crystallization of the semiconductor layer 103. This is to prevent deterioration of the characteristics of the semiconductor layer 103.
Subsequently, each of the pixel areas P in the display area AA on the buffer layer (not shown) is made of pure polysilicon corresponding to the driving area (not shown) and the switching area (not shown), respectively. The semiconductor layer 103 includes a first region 103a constituting a channel and second regions 103b and 103c doped with a high concentration of impurities on both sides of the first region 103a.
Next, a gate insulating film 105 is formed on the buffer layer including the semiconductor layer 103, and each of the semiconductors is formed in the driving region (not shown) and the switching region (not shown) on the gate insulating film 105. The gate electrode 107 is formed corresponding to the first region 103a of the layer 103.
In addition, the gate insulating layer 105 is connected to the gate electrode 107 formed in the switching region (not shown) and extends in one direction to form a gate wiring (not shown). In this case, the gate electrode 107 and the gate wiring (not shown) is a first metal material having low resistance, for example, aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum ( Mo) may be made of any one of the molybdenum (MoTi) may have a single layer structure, or may be made of two or more of the first metal material to have a double layer or triple layer structure. In the drawing, the gate electrode 107 and the gate wiring (not shown) are illustrated as one example. In addition, when the gate electrode 107 is formed, a gate driving circuit wiring (GIP) 107a and a ground wiring (GND) 107b are simultaneously formed in the non-display area NA of the substrate 101.
Next, as shown in FIG. 6B, an insulating material, for example, silicon oxide (SiO 2 ) or silicon nitride (SiNx), which is an insulating material, is formed on the entire surface of the substrate including the gate electrode 107 and the gate wiring (not shown). An insulating film 109 is formed.
Subsequently, the insulating layer 109 and the gate insulating layer 105 below are selectively patterned to expose each of the second regions 103b and 103c located on both sides of the first region 103a of each semiconductor layer. A semiconductor layer contact hole (not shown) is formed.
Next, although not shown in the figure, a metal material crossing the gate wiring (not shown) on the interlayer insulating layer 109 including the semiconductor layer contact hole (not shown) and defining the pixel region P. Form a layer (not shown). In this case, the metal material layer (not shown) is aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum (MoTi), chromium (Cr), titanium (Ti) As one or more than two materials.
Subsequently, the metal material layer (not shown) is selectively patterned to intersect with the gate wiring (not shown), and the data wiring (not shown) and the data driving circuit wiring (not shown) defining the pixel area P are formed. And, apart from this to form a power wiring (not shown). In this case, the power line (not shown) may be formed in parallel with the gate line (not shown) on the layer where the gate line (not shown) is formed, that is, the gate insulating layer.
When the data line is formed, the insulating layer 109 is spaced apart from each other in the driving region (not shown) and the switching region (not shown) and exposed through the semiconductor layer contact hole (not shown). Contacting the second regions 103b and 103c to form a source electrode 111a and a drain electrode 111b made of the same metal material as that of the data line (not shown). In this case, the source electrode 111a formed to be spaced apart from the semiconductor layer 103, the gate insulating layer 105, the gate electrode 107, and the interlayer insulating layer 109 sequentially stacked in the driving region (not shown), and The drain electrode 111b forms a driving thin film transistor DTr.
In the drawings, the data wiring (not shown), the source electrode 111a, and the drain electrode 111b all have a single layer structure. However, these components may form a double layer or triple layer structure. have.
When the driving thin film transistor DTr and the switching thin film transistor (STr) are configured as a bottom gate type, the stacked structure is spaced apart from the active layer of the gate electrode / gate insulating film / pure amorphous silicon and is formed of impurity amorphous silicon. The semiconductor layer is formed of an ohmic contact layer and a source electrode and a drain electrode spaced apart from each other. In this case, the gate line is formed to be connected to the gate electrode of the switching thin film transistor on the layer where the gate electrode is formed, and the data line is formed to be connected to the source electrode on the layer where the source electrode of the switching thin film transistor is formed.
Next, the planarization film 113 having a drain contact hole (not shown) exposing the drain electrode 111b of the driving thin film transistor DTr on the driving thin film transistor DTr and the switching thin film transistor DTr. To form. In this case, the planarization layer 113 may include an insulating material, for example, an inorganic insulating material including silicon oxide (SiO 2 ) and silicon nitride (SiNx), or an organic group including photo-acyl. Use any one of the insulating materials. In the present invention, a case where the planarization film 113 is formed using an organic insulating material will be described as an example.
Subsequently, as shown in FIG. 6C, the planarization film 113 is selectively patterned after the exposure and development processes to form the planarization film 113 corresponding to the display area of the substrate 101 in a subsequent process. The first electrode 117 to form a drain contact hole 115a for electrically contacting the drain electrode 111b.
In addition, a plurality of moisture blocking parts 115b are formed in the planarization film 113 corresponding to the non-display area of the substrate 101 to prevent moisture from penetrating and propagating to the display area AA. . In this case, each of the plurality of moisture blocking units 115b is formed by cutting the planarization layer 113 positioned in the non-display area NA of the substrate 101 by a predetermined width. It is formed along the outer circumferential surface of the non-display area NA. In addition, the moisture blocking unit 115b is disposed corresponding to an upper portion of the driving circuit wiring applied to the power source DC among the gate driving circuit wiring 107b.
Therefore, even if moisture penetrates from the outside, the moisture is blocked by the moisture blocking part 115b formed in the planarization film 113 of the non-display area NA, and thus no longer propagates to the display area AA.
In addition, when the drain contact hole 115a and the moisture blocking unit 115b are formed, a ground wiring contact hole 107c exposing the ground wiring 107b is also formed.
Next, as shown in FIG. 6D, a metal material layer (not shown) is deposited on the entire surface of the substrate including the planarization film 113, and then the metal material layer is selectively patterned to form the planarization film 113. Is in contact with the drain electrode 111b of the driving thin film transistor DTr through the drain contact hole 115a and forms a first electrode 117 having a separate shape for each pixel region P. Referring to FIG. In this case, the auxiliary electrode pattern 119 is simultaneously formed on the planarization layer 113 of the non-display area NA to reduce the resistance of the second electrode 127, which is a cathode electrode formed in a subsequent process. This is because the second electrode 127 is formed of a transparent conductive material, which may be a problem in uniformly applying a constant current because the resistance value is large, so that the auxiliary value of the second electrode 127 may be lowered. By forming the electrode pattern 119 and electrically connecting the second electrode 127, the resistance of the second electrode 127 can be lowered. In this case, the auxiliary electrode pattern 119 is electrically connected to the second electrode 127 and the ground wiring 107b. In this case, the auxiliary electrode pattern 119 is electrically connected to the ground wiring 107b through the ground wiring contact hole 115c. In this case, the metal material layer (not shown) is aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum (MoTi), chromium (Cr), titanium (Ti) As one or more than two materials.
In addition, together with the auxiliary electrode pattern 119 at the time of forming the first electrode 117, out gassing of the planarization film 113 causing degradation of organic matter in the emission region is induced in advance. In order to do so, anode holes 121 are simultaneously formed in the auxiliary electrode pattern 119 positioned outside the display area AA. At this time, the path that the planarization layer 113 and the bank 123 is therefore presented abuts connection, a water (H 2 O) penetrates from the outside at the same time transmitted to the display area (AA) through the anode holes 121 It also works. However, even if the water (H 2 O) penetrated from the outer portion is transmitted through the anode hole 121, by the water blocking portions 115b formed in the planarization film 113 under the auxiliary electrode pattern 119. Moisture no longer propagates to the display area AA and is blocked.
Next, as shown in FIG. 6E, an insulating material, for example, bensocyclobutene (BCB), polyimide, is formed on the boundary of each pixel area P and on the non-display area NA above the first electrode 117. A bank 123 made of poly-imide or photo acryl is formed. In this case, the bank 123 is formed to overlap the edge of the first electrode 121a in a form surrounding each pixel area P, and has a lattice shape having a plurality of openings as a whole of the display area AA. It is coming true. The bank 123 is also formed in the non-display area NA, which is an outer portion of the panel.
Next, an organic light emitting layer 125 including an organic light emitting pattern (not shown) emitting red, green, and blue light may be disposed on the first electrode 121a in each pixel region P surrounded by the bank 123. Form. The organic light emitting layer 125 may be composed of a single layer made of an organic light emitting material or, although not shown in the drawing, in order to increase light emission efficiency, a hole injection layer, a hole transporting layer, and a light emitting material layer (emitting material layer), an electron transporting layer (electron transporting layer) and an electron injection layer (electron injection layer) may be composed of multiple layers.
Subsequently, as illustrated in FIG. 6F, a transparent conductive material layer (not shown) made of any one of transparent conductive materials including, for example, ITO and IZO, on the entire surface of the substrate including the organic light emitting layer 125 and the bank 123. ) Is deposited and then selectively patterned to form a second electrode 127 in the display area AA of the substrate including the organic emission layer 125 and the bank 123. In this case, the organic light emitting layer 125 interposed between the first electrode 121a and the second electrode 127 and the two electrodes 121a and 127 forms an organic light emitting diode (E). The second electrode 127 is electrically connected to the auxiliary electrode pattern 119.
Next, as illustrated in FIG. 6G, a first passivation layer (eg, silicon oxide (SiO 2 ) or silicon nitride (SiNx), which is an insulating material, particularly an inorganic insulating material, may be formed on the entire surface of the substrate including the second electrode 127. 129). In this case, since the penetration of moisture into the organic light emitting layer 125 cannot be completely suppressed by the second electrode 127 alone, the organic light emitting layer is formed by forming the first passivation layer 129 on the second electrode 127. It is possible to completely suppress the water penetration into the 125.
6H, an organic layer 131 made of a polymer organic material such as a polymer is formed in the display area AA on the first passivation layer 129. In this case, the polymer thin film constituting the organic layer 131 may be an olefin-based polymer (polyethylene, polypropylene), polyethylene terephthalate (PET), an epoxy resin, a fluoro resin, a polysiloxane, or the like. This can be used.
Next, an insulating material, for example, an inorganic insulating material, silicon oxide, to prevent moisture from penetrating through the organic film 131 on the front surface of the substrate including the organic film 131 and the first passivation film 129. A second passivation film 133 made of (SiO 2 ) or silicon nitride (SiNx) is further formed.
Subsequently, the protective film 137 is disposed to face the substrate including the second passivation layer 133 so as to encapsulate the organic light emitting diode E. The substrate 101 and the protective film 137 may be disposed to face each other. Transparent and adhesive property between the through) an adhesive 135 made of any one of a frit, an organic insulating material, and a polymer material, so that the substrate 101 and the protective film 137 is completely in contact without an air layer. . At this time, in the present invention, the pressure sensitive adhesive 135 is described as an example of using a PSA (Press Sensitive Adhesive).
Thus, the substrate 101 and the barrier film 137 are fixed by the adhesive 135 to form a panel state, thereby completing the manufacturing process of the organic light emitting device 100 according to the present invention.
Therefore, according to the method of manufacturing an organic light emitting device according to the present invention, by forming a water blocking portion in the planarization film positioned in the non-display area in the non-display area, by foreign matter or impact on the first passivation film or the second passivation film or the like. Even if cracks are generated and moisture penetrates and the water propagates through the flattening film and the bank, the water is prevented from propagating to the display area by the water blocking part formed in the flattening film positioned in the non-display area. In particular, an anode hole formed in the auxiliary electrode pattern positioned outside the display area AA in order to induce out gassing of the planarization film which causes degradation of organic material in the emission area in advance. Since the planarization film and the bank are in contact with each other through holes, the water H 2 O penetrated from the outside may simultaneously serve as a path for transferring the display area AA. Although 2 O) is transmitted through the anode hole 121, the moisture is no longer propagated to the display area AA by the moisture blocking portions formed in the planarization layer under the auxiliary electrode pattern.
Therefore, in the method of manufacturing the organic light emitting device according to the present invention, since the moisture is no longer propagated to the display area AA by moisture blocking portions formed in the planarization film under the auxiliary electrode pattern, the front seal is blocked. Environmental reliability can be improved in the top emission type organic light emitting device to be applied.
Those skilled in the art to which the present invention pertains will understand that the above-described present invention can be implemented in other specific forms without changing the technical spirit or essential features.
Therefore, it is to be understood that the embodiments described above are exemplary in all respects and not restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.
101: substrate 103: semiconductor layer
103a: first region 103b, 103c: second region
105: gate insulating film 107: gate electrode
109: interlayer insulating film 111a: source electrode
111b: drain electrode 113: planarization film
115a: drain contact hole 115b: moisture barrier
115c: ground wiring contact hole 117: first electrode
119: auxiliary electrode pattern 121: anode hole (anode hole)
123: bank 125: organic light emitting layer
127: second electrode 129: first passivation film
131: organic film 133: second passivation film
135: pressure-sensitive adhesive 137: protective film
AA: display area NA: non-display area
P: pixel area
A substrate in which a display area including a plurality of pixel areas and a non-display area outside the display area are defined;
A switching thin film transistor and a driving thin film transistor formed in each pixel area on the substrate;
A planarization layer covering the switching thin film transistor and the driving thin film transistor;
A plurality of moisture blocking units disposed in the non-display area and penetrating the planarization layer;
A first electrode formed on the planarization layer of the display area and connected to the drain electrode of the driving thin film transistor through a drain contact hole corresponding to each pixel area and penetrating the planarization layer;
An auxiliary electrode pattern formed on the planarization layer of the non-display area and corresponding to at least one of the plurality of moisture blocking units;
At least one anode hole disposed between the plurality of moisture blocking parts and penetrating the auxiliary electrode pattern;
A bank formed on the planarization layer and covering at least a portion of the periphery of the first electrode and the auxiliary electrode pattern;
An organic emission layer corresponding to each pixel area and formed on the first electrode;
A second electrode formed on an entire surface of the substrate including the organic light emitting layer and the bank and electrically connected to the auxiliary electrode pattern through a spaced area between the banks in the non-display area;
A first passivation film formed on an entire surface of the substrate including the second electrode;
An organic film formed on the first passivation film;
A second passivation film formed on the organic film and the first passivation film;
A protective film facing the substrate; And
And an adhesive interposed between the substrate and the protective film to form a panel state by adhering the substrate and the protective film.
And in the region where the planarization layer and the bank overlap each other and correspond to the auxiliary electrode pattern, the planarization layer and the bank contact each other through the at least one anode hole.
The organic light emitting device of claim 1, wherein the moisture blocking unit is formed along at least one outer circumferential surface of the non-display area of the substrate.
The organic light emitting device of claim 1, wherein the moisture blocking unit corresponds to a driving circuit wiring formed in the non-display area of the substrate.
The organic light emitting device of claim 3, wherein the moisture blocking unit corresponds to a wiring applied to a power source DC among the driving circuit wirings.
The organic light emitting device of claim 1, wherein the substrate is formed of any one selected from a glass substrate, a flexible glass substrate, and a plastic material.
Providing a substrate having a display area including a plurality of pixel areas and a non-display area outside the display area;
Forming a switching thin film transistor and a driving thin film transistor in each pixel area on the substrate;
Forming a planarization film covering the switching thin film transistor and the driving thin film transistor;
Patterning the planarization layer to form a drain contact hole corresponding to the drain electrode of the driving thin film transistor and a plurality of moisture blocking units disposed in the non-display area;
A first electrode on the planarization layer of the display area and corresponding to each pixel area, and connected to the drain electrode of the driving thin film transistor through the drain contact hole, and on the planarization layer of the non-display area Forming an auxiliary electrode pattern corresponding to at least one of the plurality of moisture blocking units;
Forming a bank on the planarization layer covering at least a portion of the periphery of the first electrode and the auxiliary electrode pattern;
Forming an organic emission layer corresponding to each pixel area on the first electrode;
Forming a second electrode on the front surface of the substrate including the organic light emitting layer and the bank and electrically connected to the auxiliary electrode pattern through a spaced area between the banks in the non-display area;
Forming a first passivation film on an entire surface of the substrate including the second electrode; Forming an organic film on the first passivation film;
Forming a second passivation film on the organic film and the first passivation film;
Forming a protective film facing the substrate; And
Forming an adhesive to form a panel state by adhering the substrate and the protective film between the substrate and the protective film;
In the forming of the auxiliary electrode pattern, the auxiliary electrode pattern includes at least one anode hole disposed between the plurality of moisture blocking parts and penetrating the auxiliary electrode pattern.
In the forming of the bank, the planarization film and the bank is in contact with each other through the at least one anode hole.
The method of claim 7, wherein in the forming of the water blocking unit, the water blocking unit is formed along an outer circumferential surface of the non-display area of the substrate.
The method of claim 7, wherein in the forming of the moisture blocking unit, the moisture blocking unit corresponds to a driving circuit wiring formed in the non-display area of the substrate.
The method of claim 9, wherein in the forming of the moisture blocking unit, the moisture blocking unit corresponds to a wiring applied to a power source DC among the driving circuit wirings.
The method of claim 7, wherein the substrate comprises one selected from a glass substrate, a flexible glass substrate, and a plastic material.
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