Source: http://www.google.com/patents/US7884369?ie=ISO-8859-1&dq=7245279
Timestamp: 2014-03-15 12:40:28
Document Index: 204781109

Matched Legal Cases: ['Application No. 2007', 'Application No. 2007', 'Application No. 2007', 'Application No. 2007', 'Application No. 2009', 'Application No. 200201417']

Patent US7884369 - Wiring and method of manufacturing the same, and wiring board and method of ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsThe wiring of the present invention has a layered structure that includes a first conductive layer (first layer) having a first width and made of one or a plurality of kinds of elements selected from W and Mo, or an alloy or compound mainly containing the element, a low-resistant second conductive layer...http://www.google.com/patents/US7884369?utm_source=gb-gplus-sharePatent US7884369 - Wiring and method of manufacturing the same, and wiring board and method of manufacturing the sameAdvanced Patent SearchPublication numberUS7884369 B2Publication typeGrantApplication numberUS 11/525,016Publication dateFeb 8, 2011Filing dateSep 22, 2006Priority dateMar 27, 2001Also published asCN1311549C, CN1378276A, CN100573884C, CN101009241A, CN101009241B, CN101009292A, US7169710, US20030054653, US20070013859Publication number11525016, 525016, US 7884369 B2, US 7884369B2, US-B2-7884369, US7884369 B2, US7884369B2InventorsShunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yoshihiro KusuyamaOriginal AssigneeSemiconductor Energy Laboratory Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (80), Non-Patent Citations (10), Referenced by (3), Classifications (33) External Links: USPTO, USPTO Assignment, EspacenetWiring and method of manufacturing the same, and wiring board and method of manufacturing the sameUS 7884369 B2Abstract The wiring of the present invention has a layered structure that includes a first conductive layer (first layer) having a first width and made of one or a plurality of kinds of elements selected from W and Mo, or an alloy or compound mainly containing the element, a low-resistant second conductive layer (second layer) having a second width smaller than the first width, and made of an alloy or a compound mainly containing Al, and a third conductive layer (third layer) having a third width smaller than the second width, and made of an alloy or compound mainly containing Ti. With this constitution, the present invention is fully ready for enlargement of a pixel portion. At least edges of the second conductive layer have a taper-shaped cross-section. Because of this shape, satisfactory coverage can be obtained.
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Tauber, 1986, p. 518.9Wolf et al., Silicon Processing for the VLSI Era, 1986, vol. 1-Process Technology, p. 518.10Wolf et al., Silicon Processing for the VLSI Era, 1986, vol. 1�Process Technology, p. 518.* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS8212284Jan 20, 2011Jul 3, 2012Semiconductor Energy Laboratory Co., Ltd.Display device and manufacturing method of the display deviceUS8456849Aug 2, 2010Jun 4, 2013Seiko Epson CorporationConductive film stacked member, electro-optical device, and electronic apparatusUS8592861Jun 29, 2012Nov 26, 2013Semiconductor Energy Laboratory Co., Ltd.Display device and manufacturing method of the display deviceClassifications U.S. Classification257/72, 257/E27.108International ClassificationH01L23/532, H01L27/32, G02F1/1345, H01L21/336, H01L29/04, H01L29/15, H01L31/036, H01L29/786, H01L51/52, H01L27/14, H01L23/528, G02F1/1362Cooperative ClassificationH01L29/78621, H01L29/78648, H01L27/3241, H01L29/78645, H01L23/5283, H01L23/53223, G02F2001/13629, H01L2924/3011, H01L29/4908, H01L29/66757, H01L51/5203, H01L2924/12044European ClassificationH01L23/528C, H01L23/532M1A4, H01L29/786D, H01L29/786B4B, H01L29/49B, H01L29/66M6T6F15A2, H01L29/786D2RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google