Source: http://www.google.es/patents/US7660100?dq=flatulence
Timestamp: 2014-10-02 08:35:16
Document Index: 496164900

Matched Legal Cases: ['arts 21', 'arts 41', 'arts 31', 'arts 51', 'arts 21', 'arts 21', 'arts 21', 'arts 21', 'arts 21', 'arts 21', 'arts 21', 'arts 21', 'arts 21']

Patente US7660100 - Through-type multilayer capacitor array - Google PatentesB�squeda Im�genes Maps Play YouTube Noticias Gmail Drive M�s »Iniciar sesi�n<nobr> B�squeda avanzada de patentes</nobr>PatentesA through-type multilayer capacitor array comprises a capacitor body, and two first signal terminal electrodes, two second signal terminal electrodes, two grounding terminal electrodes, a first outer connecting conductor, and a second outer connecting conductor. The capacitor body includes a grounding...http://www.google.es/patents/US7660100?utm_source=gb-gplus-sharePatente US7660100 - Through-type multilayer capacitor array B�squeda avanzada de patentes N�mero de publicaci�nUS7660100 B2Tipo de publicaci�nConcesi�n N�mero de solicitudUS 12/339,519 Fecha de publicaci�n9 Feb 2010 Fecha de presentaci�n19 Dic 2008 Fecha de prioridad28 Dic 2007TarifaPagadasTambi�n publicado comoCN101471179A, CN101471179B, US20090168298 N�mero de publicaci�n12339519, 339519, US 7660100 B2, US 7660100B2, US-B2-7660100, US7660100 B2, US7660100B2 InventoresMasaaki Togashi Cesionario originalTdk CorporationExportar citaBiBTeX, EndNote, RefManCitas de patentes (18), Clasificaciones (15), Eventos legales (2) Enlaces externos: USPTO, Cesi�n de USPTO, EspacenetThrough-type multilayer capacitor arrayUS 7660100 B2 Resumen A through-type multilayer capacitor array comprises a capacitor body, and two first signal terminal electrodes, two second signal terminal electrodes, two grounding terminal electrodes, a first outer connecting conductor, and a second outer connecting conductor. The capacitor body includes a grounding inner electrode, and first to fourth signal inner electrodes. The grounding inner electrode is arranged to oppose the first or second signal inner electrode with an insulator layer in between and oppose the third or fourth signal inner electrode with an insulator layer in between while being connected to the grounding terminal electrodes. The first signal inner electrode is connected to the first signal terminal electrodes and first outer connecting conductor. The third signal inner electrode is connected to the second signal terminal electrodes and the second outer connecting conductor. The second and fourth signal inner electrodes are respectively connected to the first and second outer connecting conductor.
4. A through-type multilayer capacitor array according to claim 1, wherein both or one of the first and third signal inner electrodes has a meander form. Descripci�n
SUMMARY OF THE INVENTION When including a resistor and adjusting its resistance value by changing the compounding ratio of a dielectric powder in a resistance paste as in the multilayer capacitor described in Japanese Patent Application Laid-Open No. 2000-58382, however, the resistance value of resistance components in the CR filter is very hard to manage accurately. In particular, it is difficult for the multilayer capacitor described in Japanese Patent Application Laid-Open No. 2000-58382 to set the resistance value of resistance components higher.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of the through-type multilayer capacitor array in accordance with a first embodiment;
DESCRIPTION OF THE PREFERRED EMBODIMENTS In the following, preferred embodiments will be explained in detail with reference to the accompanying drawings. In the explanation, the same constituents or those having the same functions will be referred to with the same reference characters while omitting their overlapping descriptions.
First Embodiment The structure of the through-type multilayer capacitor array CA1 in accordance with the first embodiment will now be explained with reference to FIGS. 1 and 2. FIG. 1 is a perspective view of the through-type multilayer capacitor array in accordance with the first embodiment. FIG. 2 is an exploded perspective view of a capacitor body included in the through-type multilayer capacitor array in accordance with the first embodiment.
The first signal terminal electrodes 1, 2 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1. The first signal terminal electrode 1 is arranged on the first side face B1 c of the capacitor body B1. On the other hand, the first signal terminal electrode 2 is arranged on the second side face B1 d of the capacitor body B1 opposing the first side face B1 c. The first signal terminal electrodes 1, 2 oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The second signal terminal electrodes 3, 4 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1. The second signal terminal electrode 3 is arranged on the first side face B1 c of the capacitor body B1. On the other hand, the second signal terminal electrode 4 is arranged on the second side face B1 d of the capacitor body B1 opposing the first side face B1 c. The second signal terminal electrodes 3, 4 oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The grounding terminal electrodes 5, 6 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1. The grounding terminal electrode 5 is arranged on the first side face B1 c of the capacitor body B1. On the other hand, the grounding terminal electrode 6 is arranged on the second side face B1 d of the capacitor body B1 opposing the first side face B1 c. The grounding terminal electrodes 5, 6 oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The first and second signal terminal electrodes 1, 3 and grounding terminal electrode 5 are arranged on the first side face B1 c of the capacitor body B1 in the order of the first signal terminal electrode 1, grounding terminal electrode 5, and second signal terminal electrode 3 in the direction from the first end face B1 a to the second end face B1 b. The first and second signal terminal electrodes 2, 4 and grounding terminal electrode 6 are arranged on the second side face B1 d of the capacitor body B1 in the order of the first signal terminal electrode 2, grounding terminal electrode 6, and second signal terminal electrode 4 in the direction from the first end face B1 a to the second end face B1 b. The first outer connecting conductor 7 is arranged on the first end face B1 a of the capacitor body B1. The second outer connecting conductor 8 is arranged on the second end face B1 b of the capacitor body B1.
As shown in FIG. 2, the capacitor body B1 is constructed by laminating a plurality of (8 in this embodiment) insulator layers 11 to 18. Each of the insulator layers 11 to 18 is constituted by a sintered body of a ceramic green sheet containing a dielectric ceramic, for example. The laminating direction of the insulator layers 11 to 18 in the capacitor body B1 will simply be referred to as �laminating direction� in the following. In the actual multilayer capacitor array CA1, the insulator layers 11 to 18 are integrated to such an extent that their boundaries are indiscernible.
In this embodiment, the first signal terminal electrodes 1, 2 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1 such as to oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The second signal terminal electrodes 3, 4 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1 such as to oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The grounding terminal electrodes 5, 6 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1 such as to oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. For example, this makes it easy to connect the first signal terminal electrodes 1, 2 to linear signal leads, the second signal terminal electrodes 3, 4 to linear signal leads, and the grounding terminal electrodes 5, 6 to linear grounding leads, whereby the through-type multilayer capacitor array CA1 can be mounted easily.
Second Embodiment The structure of the through-type multilayer capacitor array CA2 in accordance with the second embodiment will now be explained with reference to FIGS. 5 and 6. The through-type multilayer capacitor array CA2 in accordance with the second embodiment differs from the through-type multilayer capacitor array CA1 in accordance with the first embodiment in terms of the arrangement of the grounding terminal electrodes and first and second outer connecting conductors formed on the capacitor body. FIG. 5 is a perspective view of the through-type multilayer capacitor array in accordance with the second embodiment FIG. 6 is an exploded perspective view of the capacitor body included in the through-type multilayer capacitor array in accordance with the second embodiment
The first signal terminal electrodes 1, 2 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1. The first signal terminal electrode 1 is arranged on the first side face B1 c of the capacitor body B1. On the other hand, the first signal terminal electrode 2 is arranged on the second side face B1 d of the capacitor body B1 opposing the first side face B1 c. The first signal terminal electrodes 1, 2 oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The second signal terminal electrodes 3, 4 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1. The second signal terminal electrode 3 is arranged on the first side face B1 c of the capacitor body B1. On the other hand, the second signal terminal electrode 4 is arranged on the second side face B1 d of the capacitor body B1 opposing the first side face B1 c. The second signal terminal electrodes 3, 4 oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The grounding terminal electrodes 5, 6 are arranged one by one on the opposing first and second end faces B1 a, B1 b of the capacitor body B1. The grounding terminal electrode 5 is arranged on the first end face B1 a of the capacitor body B1. On the other hand, the grounding terminal electrode 6 is arranged on the second end face B1 b of the capacitor body B1 opposing the first end face B1 a. The grounding terminal electrodes 5, 6 oppose each other in the opposing direction of the first and second end faces B1 a, B1 b. The first and second outer connecting conductors 7, 8 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1. The first outer connecting conductor 7 is arranged on the second side face B1 d of the capacitor body B1. On the other hand, the second outer connecting conductor 8 is arranged on the first side face B1 c of the capacitor body B1 opposing the second side face B1 d. The first and second outer connecting conductors 7, 8 oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The first and second signal terminal electrodes 1, 3 and second outer connecting conductor 8 are arranged on the first side face B1 c of the capacitor body B1 in the order of the first signal terminal electrode 1, second outer connecting conductor 8, and second signal terminal electrode 3 in the direction from the first end face B1 a to the second end face B1 b. The first and second signal terminal electrodes 2, 4 and first outer connecting conductor 7 are arranged on the second side face B1 d of the capacitor body B1 in the order of the first signal terminal electrode 2, first outer connecting conductor 7, and second signal terminal electrode 4 in the direction from the first end face B1 a to the second end face B1 b. As shown in FIG. 6, the capacitor body B1 is constructed by laminating a plurality of (8 in this embodiment) insulator layers 11 to 18.
Each of the main electrode parts 21 a, 22 a has a form in which a larger rectangle is arranged such that its longer sides are parallel to the first and second end faces B1 a, B1 b while a smaller rectangle is combined with the larger rectangle such as to project from the longer side on the second end face B1 b side thereof toward the second end face B1 b. Each of the main electrode parts 41 a, 42 a has a form in which a larger rectangle is arranged such that its longer sides are parallel to the first and second end faces B1 a, B1 b while a smaller rectangle is combined with the larger rectangle such as to project from the longer side on the second end face B1 b side thereof toward the second end face B1 b. Each of the main electrode parts 31 a, 32 a has a form in which a larger rectangle is arranged such that its longer sides are parallel to the first and second end faces B1 a, B1 b while a smaller rectangle is combined with the larger rectangle such as to project from the longer side on the first end face B1 a side thereof toward the first end face B1 a. Each of the main electrode parts 51 a, 52 a has a form in which a larger rectangle is arranged such that its longer sides are parallel to the first and second end faces B1 a, B1 b while a smaller rectangle is combined with the larger rectangle such as to project from the longer side on the first end face B1 a side thereof toward the first end face B1 a. The first signal inner electrodes 21, 22 include lead parts 21 b, 22 b extending from the main electrode parts 21 a, 22 a to the second side face B1 d, lead parts 21 c, 22 c extending from the main electrode parts 21 a, 22 a to the first side face B1 c, and lead parts 21 d, 22 d extending from the main electrode parts 21 a, 22 a to the second side face B1 d. Each of the lead parts 21 b, 22 b is connected to the first outer connecting conductor 7. Each of the lead parts 21 c, 22 c is connected to the first signal terminal electrode 1. Each of the lead parts 21 d, 22 d is connected to the first signal terminal electrode 2.
In this embodiment, the first signal terminal electrodes 1, 2 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1 such as to oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The second signal terminal electrodes 3, 4 are arranged one by one on the opposing first and second side faces B1 c, B1 d of the capacitor body B1 such as to oppose each other in the opposing direction of the first and second side faces B1 c, B1 d. The grounding terminal electrodes 5, 6 are arranged one by one on the opposing first and second end faces B1 a, B1 b of the capacitor body B1 such as to oppose each other in the opposing direction of the first and second end faces B1 a, B1 b. For example, this makes it easy to connect the first signal terminal electrodes 1, 2 to linear signal leads, the second signal terminal electrodes 3, 4 to linear signal leads, and the grounding terminal electrodes 5, 6 to linear grounding leads, whereby the through-type multilayer capacitor array CA2 can be mounted easily.
Citas de patentes Patente citada Fecha de presentaci�n Fecha de publicaci�n Solicitante T�tuloUS6266228 *9 Feb 200024 Jul 2001Murata Manufacturing Co., LtdMultilayer capacitorUS6532143 *29 Dic 200011 Mar 2003Intel CorporationMultiple tier array capacitorUS67686303 Jun 200327 Jul 2004Tdk CorporationMultilayer feedthrough capacitorUS6819543 *31 Dic 200216 Nov 2004Intel CorporationMultilayer capacitor with multiple plates per layerUS6934145 *5 Jul 200123 Ago 2005Phycomp Holding B.V.Ceramic multilayer capacitor arrayUS6940710 *6 Ene 20056 Sep 2005Samsung Electro-Mechanics Co., Ltd.Multilayered chip capacitorUS711305712 Ago 200426 Sep 2006Tdk CorporationNoise filterUS714542926 Ene 20065 Dic 2006Tdk CorporationMultilayer capacitorUS7411776 *25 Jun 200712 Ago 2008Tdk CorporationMultilayer capacitor arrayUS74331723 Mar 20067 Oct 2008Tdk CorporationMultilayer capacitorUS7593214 *2 Feb 200622 Sep 2009Samsung Electro-Mechanics Co., Ltd.Array type multi-layer ceramic capacitor and production method thereofUS7595973 *31 Oct 200829 Sep 2009Samsung Electro-Mechanics Co., Ltd.Multilayer chip capacitor and circuit board apparatus having the capacitorJP2000058382A T�tulo no disponibleJP2004014961A T�tulo no disponibleJP2005079756A T�tulo no disponibleJP2006253419A T�tulo no disponibleJP2007201467A T�tulo no disponibleJPH0993069A T�tulo no disponible* Citada por examinadorClasificaciones Clasificaci�n de EE.UU.361/306.3, 361/321.2, 361/321.1, 361/306.1, 361/301.2, 361/308.1 Clasificaci�n internacionalH01G4/228 Clasificaci�n cooperativaH01G4/30, H01G4/232, H01G4/35, H01G4/012 Clasificaci�n europeaH01G4/012, H01G4/232, H01G4/30, H01G4/35Eventos legales FechaC�digoEventoDescripci�n13 Mar 2013FPAYFee paymentYear of fee payment: 421 Ene 2009ASAssignmentOwner name: TDK CORPORATION, JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TOGASHI, MASAAKI;REEL/FRAME:022139/0062Effective date: 20090105Owner name: TDK CORPORATION,JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TOGASHI, MASAAKI;US-ASSIGNMENT DATABASE UPDATED:20100209;REEL/FRAME:22139/62GirarImagen originalP�gina principal de Google - Sitemap - Descargas masivas de USPTO - Pol�tica de privacidad - Condiciones de servicio - Acerca de Google Patentes - Enviar sugerenciasDatos proporcionados por IFI CLAIMS Patent Services©2012 Google