Source: http://www.google.fr/patents/USRE42241?hl=fr
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Brevet USRE42241 - Method of fabricating a semiconductor device - Google�BrevetsRecherche Images Maps Play YouTube Actualit�s Gmail Drive Plus »Connexion Recherche avanc�e dans les brevets BrevetsA semiconductor device with high reliability is provided using an SOI substrate. When the SOI substrate is fabricated by using a technique typified by SIMOX, ELTRAN, or Smart-Cut, a single crystal semiconductor substrate having a main surface (crystal face) of a {110} plane is used. In such an SOI substrate,...http://www.google.fr/patents/USRE42241?utm_source=gb-gplus-shareBrevet USRE42241 - Method of fabricating a semiconductor device Recherche avanc�e dans les brevets Num�ro de publicationUSRE42241 E1Type de publicationOctroi Num�ro de demandeUS 12/418,245 Date de publication22 mars 2011 Date de d�p�t3 avr. 2009 Date de priorit�4 sept. 1998�tat de paiement des fraisPay�Autre r�f�rence de publicationUS6335231, US6803264, US7473592, US7473971, US7476576, US7638805, US7642598, US8405090, US20020137265, US20050009252, US20070184632, US20080054269, US20080067596, US20080070335, US20080113487, US20080113488, US20090236698, USRE42097, USRE42139 Num�ro de publication12418245, 418245, US RE42241 E1, US RE42241E1, US-E1-RE42241, USRE42241 E1, USRE42241E1 InventeursShunpei Yamazaki, Hisashi Ohtani Cessionnaire d'origineSemiconductor Energy Laboratory Co., Ltd.Exporter la citationBiBTeX, EndNote, RefManCitations de brevets (103), Citations hors brevets (55), R�f�renc� par (4), Classifications (33), �v�nements juridiques (2) Liens externes: USPTO, Cession USPTO, EspacenetMethod of fabricating a semiconductor deviceUS RE42241 E1 R�sum� A semiconductor device with high reliability is provided using an SOI substrate. When the SOI substrate is fabricated by using a technique typified by SIMOX, ELTRAN, or Smart-Cut, a single crystal semiconductor substrate having a main surface (crystal face) of a {110} plane is used. In such an SOI substrate, adhesion between a buried insulating layer as an under layer and a single crystal silicon layer is high, and it becomes possible to realize a semiconductor device with high reliability.
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R�f�renc� par Brevet citant Date de d�p�t Date de publication D�posant TitreUS84712728 sept. 201025 juin 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having a display portionUS851367812 mai 200820 ao�t 2013Semiconductor Energy Laboratory Co., Ltd.Light-emitting deviceUS867436828 mars 201218 mars 2014Semiconductor Energy Laboratory Co., Ltd.Display device and method for manufacturing thereofUS87598427 juin 201124 juin 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameClassifications Classification aux �tats-Unis438/151, 257/E21.569, 257/E21.563, 438/458, 438/459, 438/164 Classification internationaleH01L21/84, H01L21/30, H01L21/336, H01L29/786, H01L21/02, H01L21/762, H01L27/12 Classification coop�rativeY10S438/977, Y10S438/973, H01L29/78603, H01L29/045, H01L29/66772, H01L21/76256, H01L27/1214, H01L21/76243, H01L21/76254, H01L27/1203, H01L27/1266 Classification europ�enneH01L21/762D2, H01L21/762D8B, H01L21/762D8D, H01L27/12B, H01L29/66M6T6F15C, H01L29/786A, H01L29/04B, H01L27/12T, H01L27/12T30A2�v�nements juridiques DateCode�v�nementDescription20 juin 2012FPAYFee paymentYear of fee payment: 44 oct. 2011CCCertificate of correctionFaire pivoterImage d'origineAccueil Google - Plan du site - T�l�chargements par lot sur l'USPTO - R�gles de confidentialit� - Conditions d'utilisation - � propos de Google�Brevets - Envoyer des commentairesDonn�es fournies par IFI CLAIMS Patent Services