Source: http://www.google.com/patents/US8148830?dq=5,987,610
Timestamp: 2014-08-22 20:27:34
Document Index: 388892209

Matched Legal Cases: ['Application No. 08', 'Application No. 08', 'Application No. 08250440', 'Application No. 08', 'Application No. 08250440', 'Application No. 200880011449', 'Application No. 200880011449']

Patent US8148830 - Environmental protection coating system and method - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsA circuit board assembly includes a circuit board having an outer surface configured with a plurality of discrete electrical components. The assembly includes a first protective dielectric layer overlying the outer surface, and a second dielectric layer overlying the first protective dielectric layer...http://www.google.com/patents/US8148830?utm_source=gb-gplus-sharePatent US8148830 - Environmental protection coating system and methodAdvanced Patent SearchPublication numberUS8148830 B2Publication typeGrantApplication numberUS 12/533,409Publication dateApr 3, 2012Filing dateJul 31, 2009Priority dateFeb 7, 2007Also published asEP1956872A2, EP1956872A3, EP1956872B1, EP2469993A1, EP2469993B1, US8173906, US8319112, US20080185173, US20090288876, US20090290314, US20090291200Publication number12533409, 533409, US 8148830 B2, US 8148830B2, US-B2-8148830, US8148830 B2, US8148830B2InventorsJohn M. Bedinger, Michael A. MooreOriginal AssigneeRaytheon CompanyExport CitationBiBTeX, EndNote, RefManPatent Citations (31), Non-Patent Citations (27), Referenced by (2), Classifications (21), Legal Events (1) External Links: USPTO, USPTO Assignment, EspacenetEnvironmental protection coating system and methodUS 8148830 B2Abstract A circuit board assembly includes a circuit board having an outer surface configured with a plurality of discrete electrical components. The assembly includes a first protective dielectric layer overlying the outer surface, and a second dielectric layer overlying the first protective dielectric layer and the discrete electrical components. The second dielectric layer includes a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), a dielectric constant less than 3.0, a dielectric loss less than 0.008, a moisture absorption less than 0.04 percent, a breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), a temperature stability to 300� Celsius, pinhole free in films greater than 50 Angstroms, hydrophobic with a wetting angle greater than 45 degrees, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 30%.
a second dielectric layer overlying the first protective dielectric layer and the plurality of discrete electrical components, the second dielectric layer comprising a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), a dielectric constant less than 3.0, a dielectric loss less than 0.008, a moisture absorption less than 0.04 percent, a breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), a temperature stability to 300� Celsius, pinhole free in films greater than 50 Angstroms, hydrophobic with a wetting angle greater than 45 degrees, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 30%; and
4. The circuit board assembly of claim 1, wherein the dielectric material is made of a material that is selected from the group consisting of alumina, tantalum oxide, beryllium oxide, hafnium oxide, silicon nitride, silica, parylene F, aromatic-fluorinated VT-4, parylene HT�, and polytetrafluoroethylene (PTFE).
RELATED APPLICATIONS This application is a divisional of application Ser. No. 11/848,891, filed Aug. 31, 2007, entitled Environmental Protection Coating System and Method, which claims the benefit of priority under 35 U.S.C. �119(e) of U.S. Provisional Application Ser. No. 60/888,715, entitled Environmental Protection Coating System and Method, filed Feb. 7, 2007.
SUMMARY OF THE DISCLOSURE According to one embodiment of the disclosure, a circuit board assembly includes a circuit board having an outer surface, the outer surface being configured with a plurality of discrete electrical components that are each manufactured independently of one another. The circuit board assembly further includes a first protective dielectric layer overlying the outer surface, and a second dielectric layer overlying the first protective dielectric layer and the plurality of discrete electrical components. The second dielectric layer includes a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), a dielectric constant less than 3.0, a dielectric loss less than 0.008, a moisture absorption less than 0.04 percent, a breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), a temperature stability to 3000 Celsius, pinhole free in films greater than 50 Angstroms, hydrophobic with a wetting angle greater than 45 degrees, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 30%.
According to one embodiment, the second 156 and/or third 158 protective dielectric layers may be coated with a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), dielectric constant less than 2.7, dielectric loss less than 0.008, breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), temperature stability to 3000 Celsius, pinhole free in films greater than 50 Angstroms, hydrophobic with a wetting angle greater than 45 degrees, and capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 30%. This dielectric material may be applied during the assembly level phase of production to passivate the circuit board 161, board traces 162, circuit device 140, discrete electrical components 164 and 170, and assembly level features from the environment. This dielectric material may be applied as the second protective dielectric layer 156 or third dielectric layer 158. The dielectric material is generally chemically stable with respect to vapor or liquid water, thus protecting the first protective dielectric layer 150 and/or second protective dielectric layer 156. The dielectric material has superior moisture retarding characteristics and is functionally stable over a wider temperature range than other known passivation materials described above. The dielectric material also has a lower intrinsic dielectric constant than other known passivation materials. In one embodiment, the third dielectric layer 26 may have a thickness in the range of approximately 100 to 1000 angstroms. In one embodiment, the dielectric material is parylene F, aromatic-fluorinated VT-4, parylene HT�, or other fluorinated parylene-like film.
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No. 11/848,891, 12 pages.Referenced byCiting PatentFiling datePublication dateApplicantTitleUS8345434 *May 25, 2010Jan 1, 2013Kabushiki Kaisha ToshibaHigh frequency circuit having multi-chip module structureUS20110044016 *May 25, 2010Feb 24, 2011Kabushiki Kaisha ToshibaHigh frequency circuit having multi-chip module structure* Cited by examinerClassifications U.S. Classification257/790International ClassificationH01L23/29Cooperative ClassificationH01L2224/83801, H01L2924/01019, H05K2201/0179, H05K2201/0195, H01L2924/1423, H01L23/3192, H01L2224/73265, H01L2924/19041, H05K3/284, H01L2224/8592, H05K2203/1322, H01L2924/0781, H01L2924/01004, H01L23/4821, H01L24/83, H01L2224/83851European ClassificationH01L23/31P12, H01L23/482A, H05K3/28DLegal EventsDateCodeEventDescriptionJul 31, 2009ASAssignmentOwner name: RAYTHEON COMPANY, MASSACHUSETTSFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BEDINGER, JOHN M.;MOORE, MICHAEL A.;REEL/FRAME:023036/0949Effective date: 20070827RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google