Source: http://www.google.fr/patents/US7830793
Timestamp: 2017-12-18 01:22:31
Document Index: 432342403

Matched Legal Cases: ['Application No. 60', 'Application No. 200680032204', 'Application No. 200580035946', 'Application No. 200580034646', 'Application No. 200580035946', 'Application No. 200580034647', 'Application No. 200580034646', 'Application No. 05810800', 'Application No. 05810244', 'Application No. 05810244', 'Application No. 05810800', 'Application No. 08728248', 'Application No. 11', 'Application No. 11', 'Application No. 11']

Brevet US7830793 - Network device architecture for consolidating input/output and reducing latency - Google Brevets
The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet...http://www.google.fr/patents/US7830793?utm_source=gb-gplus-shareBrevet US7830793 - Network device architecture for consolidating input/output and reducing latency
Numéro de publication US7830793 B2
Numéro de demande US 11/094,877
Autre référence de publication EP1803257A2, EP1803257A4, EP1803257B1, US20060087989, WO2006057730A2, WO2006057730A3
Numéro de publication 094877, 11094877, US 7830793 B2, US 7830793B2, US-B2-7830793, US7830793 B2, US7830793B2
Inventeurs Silvano Gai, Thomas Edsall, Davide Bergamasco, Dinesh Dutt, Flavio Bonomi
Citations de brevets (149), Citations hors brevets (87), Référencé par (73), Classifications (16), Événements juridiques (2)
Network device architecture for consolidating input/output and reducing latency
US 7830793 B2
15. The method of claim 1, further comprising the step of storing the first frames and the second frames in virtual output queues (“VOQs”), wherein each VOQ is associated with a destination port/virtual lane pair.
This application claims priority to U.S. Provisional Application No. 60/621,396, entitled “FC Over Ethernet” and filed on Oct. 22, 2004, which is hereby incorporated by reference in its entirety. This application is related to U.S. patent application Ser. No. 11/078,992, entitled “Fibre Channel Over Ethernet” and filed on Mar. 10, 2005 and to U.S. patent application Ser. No. 11/084,587, entitled “Ethernet Extension for the Data Center” and filed on Mar. 18, 2005, which are also hereby incorporated by reference in their entirety.
The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet and storage traffic. Some aspects of the invention involve transforming FC frames into a format suitable for transport on an Ethernet.
Some preferred implementations of the invention implement multiple virtual lanes (“VLs”)(also referred to as virtual links) in a single physical connection of a data center or similar network. Some VLs are “drop” VLs, with Ethernet-like behavior, and others are “no-drop” lanes with FC-like behavior. Some implementations provide intermediate behaviors between “drop” and “no-drop.” Some such implementations are “delayed drop,” wherein frames are not immediately dropped when a buffer is full, but instead there is an upstream “push back” for a limited time (e.g., on the order of milliseconds) before dropping a frame.
Flow control for “no drop” and “delayed drop” VLs may be implemented by using any convenient combination of buffer-to-buffer crediting schemes and/or PAUSE frames. For example, some implementations use a buffer-to-buffer crediting scheme within a network device and using PAUSE frames for flow control on the links. Accordingly, the second set of rules may involve implementing a buffer-to-buffer crediting scheme for the second frames. A buffer-to-buffer crediting scheme may involve crediting according to frame size and may be implemented within a network device and/or on network links. Within a network device, the buffer-to-buffer credits may be managed by an arbiter. If a buffer-to-buffer crediting scheme is used both within a network device and on links, the credits managed within the network device are preferably not the same credits that are managed on the links.
The partitioning step may involve dynamically partitioning buffers according to buffer occupancy, time of day, traffic loads, congestion, guaranteed minimum bandwidth allocation, known tasks requiring greater bandwidth and/or maximum bandwidth allocation. The first frames and the second frames may be stored in virtual output queues (“VOQs”). Each VOQ may be associated with a destination port/virtual lane pair. The method may include the step of performing buffer management in response to VOQ length, buffer occupancy per virtual lane, overall buffer occupancy and packet age.
Yet other embodiments of the invention provide a network device that includes a plurality of ports configured for receiving frames on a plurality of physical links and a plurality of line cards. Each port is in communication with one of the plurality of line cards. Each line card is configured to do the following: identify first frames received on first virtual lanes and second frames received on second virtual lanes; dynamically partition buffers of the network device into first buffer spaces for the first frames and second buffer spaces for the second frames; store the first frames in first virtual output queues (“VOQs”) of the first buffer spaces; store the second frames in second VOQs of the second buffer spaces; apply a first set of rules to the first frames; and apply a second set of rules to the second frames. The buffers may be dynamically partitioned according to overall buffer occupancy, buffer occupancy per virtual lane, time of day, traffic loads, congestion, guaranteed minimum bandwidth allocation, known tasks requiring greater bandwidth and/or maximum bandwidth allocation. The methods described herein may be implemented and/or manifested in various ways, including as hardware, software or the like.
ECN (explicit congestion notification) field 455 is used to indicate that a buffer (or a portion of a buffer allocated to this VL) is being filled and that the source should slow down its transmission rate, for the indicated VL. In preferred implementations of the invention, at least some host devices of the network can understand the ECN information and will apply a shaper, a/k/a a rate limiter, for the VL indicated. Explicit congestion notification can occur in at least two general ways. In one method, a packet is sent for the express purpose of sending an ECN. In another method, the notification is “piggy-backed” on a packet that would have otherwise been transmitted.
DCE switch 1200 needs to be able to support the “drop,” “no drop” and intermediate behaviors required for virtual lanes, as discussed elsewhere herein. The “no drop” functionality is enabled, in part, by applying internally to the DCE switch some type of credit mechanism like the one described above. Externally, the “no drop” functionality can be implemented in accordance with the buffer-to-buffer credit mechanism described earlier or PAUSE frames. For example, if one of input line cards 1205 is experiencing back pressure from one or more output line cards 1225 through the internal credit mechanism, the line card can propagate that back pressure externally in an upstream direction via a buffer-to-buffer credit system like that of FC.
Preferably, the same chip (e.g., the same ASIC) that is providing “no drop” and intermediate functionality will also provide “drop” functionality like that of a classical Ethernet switch. Although these tasks could be apportioned between different chips, providing drop, no drop and intermediate functionality on the same chip allows DCE switches to be provided at a substantially lower price.
Flow control for a DCE network has at least two basic manifestations, one being implemented within the DCE switches and another being implemented on links of the network. One flow control manifestation is a buffer-to-buffer, credit-based flow control that is used primarily to implement the “no drop” or delayed drop VLs. As noted above, PAUSE frames or the like may also be used to implement flow control for the “no drop” or “delayed drop” VLs. Any convenient combination of credits and PAUSE frames, either within DCE switches or on the links, may be used to implement flow control. It is important to note that in preferred embodiments, the credits that are managed within a DCE switch are not the same credits that are managed on a link. Some preferred embodiments use PAUSE frames on the links and credits within a DCE switch.
Another flow control manifestation of some preferred implementations involves an explicit upstream congestion notification to other devices in the network. This explicit upstream congestion notification may be implemented, for example, by the explicit congestion notification (“ECN”) field of the DCE header, as described elsewhere herein.
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Classification aux États-Unis 370/230, 370/415, 370/233
Classification coopérative H04L47/32, H04L12/413, H04L47/10, H04L49/90, H04L47/39, H04L47/33
Classification européenne H04L12/413, H04L47/32, H04L47/10, H04L49/90, H04L47/39, H04L47/33
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GAI, SILVANO;EDSALL, THOMAS;BERGAMASCO, DAVIDE;AND OTHERS;REEL/FRAME:016439/0841;SIGNING DATES FROM 20050321 TO 20050329