Source: http://www.google.com/patents/US20070187760?ie=ISO-8859-1
Timestamp: 2014-12-29 04:44:10
Document Index: 83843608

Matched Legal Cases: ['Application No. 2006', 'arts 7', 'art 7', 'arts 7', 'arts 7', 'arts 18', 'arts 18', 'arts 18', 'arts 18']

Patent US20070187760 - Thin film transistor including low resistance conductive thin films and ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inAdvanced Patent SearchPatentsA thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain...http://www.google.com/patents/US20070187760?utm_source=gb-gplus-sharePatent US20070187760 - Thin film transistor including low resistance conductive thin films and manufacturing method thereofAdvanced Patent SearchPublication numberUS20070187760 A1Publication typeApplicationApplication numberUS 11/701,343Publication dateAug 16, 2007Filing dateFeb 1, 2007Priority dateFeb 2, 2006Also published asCN101326644A, CN101326644B, EP1979948A2, EP1979948B1, US7576394, US7981734, US20090269881, WO2007089048A2, WO2007089048A3Publication number11701343, 701343, US 2007/0187760 A1, US 2007/187760 A1, US 20070187760 A1, US 20070187760A1, US 2007187760 A1, US 2007187760A1, US-A1-20070187760, US-A1-2007187760, US2007/0187760A1, US2007/187760A1, US20070187760 A1, US20070187760A1, US2007187760 A1, US2007187760A1InventorsMamoru Furuta, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko YoshidaOriginal AssigneeKochi Industrial Promotion Center, Casio Computer Co., Ltd.Export CitationBiBTeX, EndNote, RefManReferenced by (668), Classifications (18), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetThin film transistor including low resistance conductive thin films and manufacturing method thereofUS 20070187760 A1Abstract A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel. Images(10) Claims(19)
1. A thin film transistor comprising: a substrate; a pair of source/drain electrodes formed on the substrate and defining a gap therebetween; a pair of low resistance conductive thin films, each coating at least a part of one of the source/drain electrodes, the low resistance conductive thin films defining a gap therebetween; and an oxide semiconductor thin film layer, which is continuously formed on upper surfaces of the pair of low resistance conductive thin films, and which extends along the gap defined between the low resistance conductive thin films so as to function as a channel; wherein side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel. 2. The thin film transistor according to claim 1, wherein a length of the oxide semiconductor thin film layer in a channel width direction of the channel is equal to or larger than a length of the source/drain electrodes in the channel width direction. 3. The thin film transistor according to claim 1, wherein the oxide semiconductor thin film layer primarily comprises zinc oxide. 4. The thin film transistor according to claim 1, wherein the source/drain electrodes are made of metal. 5. The thin film transistor according to claim 1, wherein each of the low resistance conductive thin films primarily comprises any one selected from a group consisting of indium tin oxide (ITO), zinc oxide doped with gallium (Ga), and zinc oxide doped with aluminum (Al). 6. The thin film transistor according to claim 3, wherein the low resistance conductive thin films are made of intrinsic zinc oxide, and the zinc oxide forming the low resistance conductive thin films has a crystal grain size that is larger than a crystal grain size of the zinc oxide forming the oxide semiconductor thin film layer. 7. The thin film transistor according to claim 1, further comprising: a gate insulating film disposed over the oxide semiconductor thin film layer, the gate insulating film having a dual-layer structure comprising a lamination of a first gate insulating film that covers only an upper surface of the oxide semiconductor thin film layer and a second gate insulating film that covers an upper surface and side surfaces of the first gate insulating film and side surfaces of the oxide semiconductor thin film layer; and a gate electrode disposed over the gate insulating film. 8. The thin film transistor according to claim 1, further comprising: a gate electrode disposed below the oxide semiconductor thin film layer; and an overcoat insulating film disposed over the oxide semiconductor thin film layer, the overcoat insulating film having a dual-layer structure comprising a lamination of a first overcoat insulating film that covers only an upper surface of the oxide semiconductor thin film layer and a second overcoat insulating film that covers an upper surface and side surfaces of the first overcoat insulating film and side surfaces of the oxide semiconductor thin film layer. 9. A thin film transistor comprising: an oxide semiconductor thin film layer having a pair of side surfaces; a pair of low resistance conductive thin films defining a gap therebetween along an area corresponding to a channel of the thin film transistor, each of the low resistance conductive thin films having a pair of side surfaces, each of the side surfaces being positioned so as to coincide with a corresponding one of the side surfaces of the oxide semiconductor thin film layer; and a pair of source/drain electrodes, each having a pair of side surfaces, each of the side surfaces being one of positioned so as to coincide with and positioned inside of a corresponding one of the side surfaces of the low resistance conductive thin films. 10. A manufacturing method of a thin film transistor comprising: forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel; etching the low resistance conductive thin films and the oxide semiconductor thin film layer so that side surfaces of the low resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel; and mounting a gate electrode over the oxide semiconductor thin film layer. 11. The method according to claim 10, wherein the oxide semiconductor thin film layer primarily comprises zinc oxide. 12. The method according to claim 10, further comprising: forming a first gate insulating film on the oxide semiconductor thin film layer; etching the first gate insulating film together with the low resistance conductive thin films, and the oxide semiconductor thin film layer, such that the side surfaces of the low resistance conductive thin films, the corresponding side surfaces of the oxide semiconductor thin film, and corresponding side surfaces of the first gate insulating film coincide with each other at least in the channel width direction, and such that respective outer ends of the low resistance conductive thin films, the oxide semiconductor thin film, and the first gate insulating film, are positioned outside inner ends of the source/drain electrodes in the channel length direction; and forming a second gate insulating film on the first gate insulating film and mounting a gate electrode over the second gate insulating film. 13. The method according to claim 10, wherein the etching is dry etching. 14. A manufacturing method of a thin film transistor comprising: mounting a gate electrode over a substrate; placing a gate insulating film on the gate electrode and forming a pair of source/drain electrodes on the gate insulating film, such that the source/drain electrodes define a gap therebetween; forming a pair of low resistance conductive thin films, which define a gap therebetween, each of the low resistance conductive thin films covering at least a part of the one of source/drain electrodes and having an inner end that is positioned inside outer ends of the gate electrode in a channel length direction of a channel of the thin film transistor; forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap so that the oxide semiconductor thin film layer functions as the channel; and etching the low resistance conductive thin films and the oxide semiconductor thin film layer such that side surfaces of the low resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. 15. The method according to claim 14, wherein the oxide semiconductor thin film layer primarily comprises zinc oxide. 16. The method according to claim 14, further comprising: forming a first overcoat insulating film on the oxide semiconductor thin film layer; etching the first overcoat insulating film, together with the low resistance conductive thin films, and the oxide semiconductor thin film layer, such that that the side surfaces of the low resistance conductive thin films, the corresponding side surfaces of the oxide semiconductor thin film, and corresponding side surfaces of the first gate insulating film, e coincide with each other at least in the channel width direction; and forming a second overcoat insulating film on the first overcoat insulating film. 17. The method according to claim 14, wherein the etching is dry etching. 18. A manufacturing method of a thin film transistor comprising: forming a predetermined number of pairs of source/drain electrodes, each said pair comprising a source electrode and a drain electrode defining a gap therebetween at an area corresponding to a channel of the thin film transistor, and each said pair being spaced apart from an adjacent pair by a spacing; forming a pair of low resistance conductive thin films, which define a gap therebetween along the channel-corresponding area, such that one of the low resistance conductive thin films covers the source electrodes and another of the low resistance conductive thin films covers the drain electrodes; forming an oxide semiconductor thin film layer on the pair of low resistance conductive thin films, on the channel-corresponding area, and on each said spacing; and etching the oxide semiconductor thin film layer and the low resistance conductive thin films along each said spacing between adjacent pairs of the source/drain electrodes, to separate each of the oxide semiconductor thin film layer and the low resistance conductive thin films into a predetermined number of oxide semiconductor thin film layer pieces and a predetermined number of pairs of low resistance conductive thin film pieces corresponding respectively to the predetermined number of pairs of source/drain electrodes, such that at each said spacing side surfaces of each of the oxide semiconductor thin film layer pieces coincide with corresponding side surfaces of the pair of low resistance conductive thin film pieces corresponding to the oxide semiconductor thin film layer piece. 19. The method of according to claim 18, wherein the forming of the pair of low resistance conductive thin films comprises etching a low resistance conductive thin film to form the pair of low resistance conductive thin films to have outer ends that are positioned outside outer ends of a final shape of the low resistance conductive thin films.
CROSS-REFERENCE TO RELATED APPLICATIONS This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2006-26320, filed on Feb. 2, 2006, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor including low resistance conductive thin films and a manufacturing method thereof. 2. Description of the Background Art It has been known for many years that oxides such as zinc oxide or magnesium zinc oxide have excellent characteristics as a semiconductor (an active layer). In recent years, active research and development of a semiconductor thin film layer using these compounds have been made in order to apply such a semiconductor thin film layer to electronic devices such as a thin film transistor (hereinafter abbreviated as TFT), a light emitting device, and a transparent conductive film. An oxide TFT including a semiconductor thin film layer made of zinc oxide or magnesium zinc oxide has greater electron mobility and better TFT characteristics than an amorphous silicon TFT including a semiconductor thin film layer of amorphous silicon (a-Si:H), which has been mainly used for liquid crystal displays. Another advantage of the oxide TFTs is that high electron mobility can be expected because a crystalline thin film is formed even at a temperature as low as a room temperature. These advantages have been encouraging the development of the oxide TFTs. TFTs using an oxide semiconductor thin film layer, such as a bottom gate type TFT (see, for example, Japanese Patent Publications No. 2005-033172 and No. 2004-349583) and a top gate type TFT, have been reported. The bottom gate type TFTs include, for example, a lamination of a gate electrode disposed over a substrate, a gate insulating film, source/drain electrodes, and an oxide semiconductor thin film layer, which are laminated in this order. On the other hand, the top gate type TFTs, for example, include a lamination of source/drain electrodes disposed over a substrate, an oxide semiconductor thin film layer, a gate insulating film, and a gate electrode, which are laminated in this order. In both of the bottom and top gate type TFTs, sufficient contact is required between each of the source/drain electrodes and the oxide semiconductor thin film layer (primarily comprising zinc oxide and the like) in order to ensure high current drive power. In a conventional method, a source/drain region having lower resistance than the oxide semiconductor thin film layer is provided to improve the contact property between the source/drain electrodes and the oxide semiconductor thin film layer. FIG. 9A shows a TFT 500 as one example of the TFTs provided according to the conventional method. The TFT 500 has a pair of low resistance conductive thin films 110 sandwiched between the oxide semiconductor thin film layer 103 and a pair of source/drain electrodes 102 placed on a substrate 101. Since the low resistance conductive thin films 110 have a lower resistance than the oxide semiconductor thin film layer 103, they improve the contact between each of the source/drain electrodes 102 and the oxide semiconductor thin film layer 103. The oxide semiconductor thin film layer 103 is disposed on the low resistance conductive thin films 110 and on an area of the substrate 101 exposed between the pair of low resistance conductive thin films 110, while the outer periphery 110 a (See FIG. 9B described below for a plan view) of the low resistance conductive thin films 110 remains uncovered. All the exposed surfaces of the oxide semiconductor thin film layer 103 are covered with a gate insulating film 104. A gate electrode 106 is disposed over the gate insulating film 104. FIG. 9B is a plan view of an array of the TFTs 500 shown in FIG. 9A. In FIG. 9B, two of the TFTs 500 are aligned in parallel. FIG. 9A is a cross sectional view along line IXA-IXA of FIG. 9B. For clarity, FIG. 9B omits gate insulating film 104 shown in FIG. 9A In manufacturing the TFT 500, first a pair of source/drain electrodes 102 is patterned and then the low resistance conductive thin film 110 is formed. The low resistance conductive thin film 110 is separated into a plurality of low resistance conductive thin films 110 that are spaced apart from each other, using a photo-lithography technique. Accordingly, an outer periphery 110 a (cross-hatched in FIG. 9B) of the low resistance conductive thin films 110 protrudes from the outer profile of the oxide semiconductor thin film layer 103. As shown in FIG. 9B, at least a distance D (distance D=width A+gap B+width A) is needed between the oxide semiconductor thin film layers of the TFTs. A narrower distance D is preferable in order to achieve higher integration of TFTs. The width A is defined by the mask-alignment accuracy of an aligner, in other words, by the alignment accuracy in the photo-lithography of the low resistance conductive thin film 110 and the oxide semiconductor thin film layer 103. The higher the alignment accuracy is, the smaller the width A becomes. On the other hand, the gap B is defined by the minimum resolution during the patterning of the low resistance conductive thin film 110. The higher the minimum resolution is, the smaller the gap B becomes. When a conventional aligner for an LCD is used, the width A determined by the alignment accuracy, is about 1.5 μm, and the gap B determined by the minimum resolution is about 4.0 μm. Therefore, in the conventional TFT 500, the distance D between the oxide semiconductor thin film layers 103 is approximately 7.0 μm (1.5 μm+4.0 μm+1.5 μm) (see FIG. 9B). On the other hand, in manufacturing a TFT that includes no low resistance conductive thin film, an oxide semiconductor thin film layer is laid over the source/drain electrodes of a plurality of TFTs, and then the oxide semiconductor thin film layer is patterned. Therefore, the width A required in TFT 500 according to the mask-alignment accuracy is not necessary. Thus the width A is eliminated from the distance D so that the distance D includes only the gap B. As mentioned above, for TFTs including no low resistance conductive thin film, the minimum distance D between the adjacent oxide semiconductor thin film layers is equal to the gap B, whereas, for TFTs (e.g. TFT 500) including the low resistance conductive thin film, the minimum distance D between the oxide semiconductor thin film layers is equal to the sum of width A, gap B, and width A (width A+gap B+width A). In other words, in the TFTs (e.g. TFT 500) including the low resistance conductive thin film for improving the contact properties, the low resistance conductive thin film 110 forces the gap between the oxide semiconductor thin film layers to be wider, which results in difficulty in achieving a high integration of the TFTs. SUMMARY OF THE INVENTION Considering the above-mentioned problems, one object of the present invention is to decrease the distance D between oxide semiconductor thin film layers by eliminating the width A so as to increase a degree of integration of the thin film transistors. According to one aspect of the present invention, a thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel. The manufacturing method of the thin film transistor according to one aspect of the present invention includes forming a pair of source/drain electrodes on a substrate; forming low resistance conductive thin films, which are made of an oxide, on the source/drain electrodes; and forming an oxide semiconductor thin film layer, which functions as a channel, along the gap defined between the low resistance conductive thin films and on the upper surfaces of the low resistance conductive thin films. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.
BRIEF DESCRIPTION OF THE DRAWINGS Further features and advantages of the present invention will become apparent from the following detailed description, taken in combination with the accompanying drawings. FIGS. 1A to 1C show the thin film transistor of the first embodiment of the present invention. FIG. 1A is a cross-sectional view of the thin film transistor along line IA-IA in FIG. 1C; FIG. 1B is a plan view of the layout of the thin film transistor according to the first embodiment after forming source/drain electrodes and low resistance conductive thin films; and FIG. 1C is a plan view of the layout of the thin film transistor according to the first embodiment; FIGS. 2A to 2D are cross-sectional views showing steps of the manufacturing method of the thin film transistor according to the first embodiment of the present invention. FIG. 2A is a cross-sectional view of the thin film transistor according to the first embodiment after forming the source/drain electrodes and the low resistance conductive thin films on the substrate; FIG. 2B is a cross-sectional view of the thin film transistor according to the first embodiment after coating the oxide semiconductor thin film layer; FIG. 2C is a cross-sectional view of the thin film transistor according to the first embodiment after performing etching; FIG. 2D is a cross-sectional view of the thin film transistor according to the first embodiment after laminating the gate insulating film and a gate electrode; and FIG. 2E is a cross-sectional view after laminating contact parts, external source/drain electrodes, and a display electrode; FIG. 3 is a cross-sectional view of the thin film transistor according to the second embodiment of the present invention; FIGS. 4A to 4D are cross-sectional views showing steps of the manufacturing method of the thin film transistor according to the second embodiment of the present invention. FIG. 4A is a cross-sectional view of the thin film transistor according to the second embodiment after forming the source/drain electrodes, the low resistance conductive thin films and the oxide semiconductor thin film layer on the substrate; FIG. 4B is a cross-sectional view of the thin film transistor according to the second embodiment after forming the first insulating film; FIG. 4C is a cross-sectional view of the thin film transistor according to the second embodiment after performing etching; and FIG. 4D is a cross-sectional view of the thin film transistor according to the second embodiment after laminating the second gate insulating film and the gate electrode; FIG. 5 is a cross-sectional view of the thin film transistor according to the third embodiment of the present invention; FIGS. 6A to 6D are cross-sectional views showing steps of the manufacturing method of the thin film transistor according to the third embodiment of the present invention. FIG. 6A is a cross-sectional view of the thin film transistor according to the third embodiment after forming the gate electrode and the gate insulating film on the substrate; FIG. 6B is a cross-sectional view of the thin film transistor according to the third embodiment after forming the source/drain electrodes, the low resistance conductive thin films, and the oxide semiconductor thin film layer; FIG. 6C is a cross-sectional view of the thin film transistor according to the third embodiment after performing etching; and FIG. 6D is a cross-sectional view after forming an overcoat insulating film; FIG. 7 is a cross-sectional view of the thin film transistor according to the fourth embodiment of the present invention; FIGS. 8A to 8D are cross-sectional views showing steps of the manufacturing method of the thin film transistor according to the fourth embodiment of the present invention. FIG. 8A is a cross-sectional view of the thin film transistor according to the fourth embodiment after forming the gate electrode and the gate insulating film on the substrate; FIG. 8B is a cross-sectional view of the thin film transistor according to the fourth embodiment after forming the source/drain electrodes, the low resistance conductive thin films, the oxide semiconductor thin film layer, and the first overcoat insulating film; FIG. 8C is a cross-sectional view of the thin film transistor according to the fourth embodiment after performing etching; and FIG. 8D is a cross-sectional view of the thin film transistor according to the fourth embodiment after forming the second overcoat insulating film; and FIG. 9 shows one example of a conventional thin-film transistor. FIG. 9A is a cross-sectional view along line IXA-IXA in FIG. 9B; and FIG. 9B is a plan view of the layout of the conventional thin film transistor of FIG. 9A.
DETAILED DESCRIPTION FIGS. 1A-1C are views of the TFT 100 according to the first embodiment of the present invention. FIG. 1A is a cross-sectional view along line IA-IA of FIG. 1C. FIG. 1B shows the TFTs 100 at a stage of manufacturing after formation of the source/drain electrodes and low resistance conductive thin films and before coating the TFTs 100 with an oxide semiconductor thin film layer. In FIG. 1B a plurality (two in the figure) of the TFTs 100 are aligned in parallel for integration. FIG. 1C is a plan view for describing the subsequent processes. Hereinafter, the first embodiment of the present invention will be described referring mainly to FIG. 1A, as well as FIG. 1B and FIG. 1C. �Channel length direction� as used herein refers to the direction perpendicular to the channel width. The channel length direction is the right-to-left direction in FIG. 1A. �Channel width direction� as used herein refers to the up-and-down direction in FIG. 1C. A thin film transistor 100 according to the first embodiment of the present invention includes a substrate 1, a pair of source/drain electrodes 2, a pair of low resistance conductive thin films 10, an oxide semiconductor thin film layer 3, a gate insulating film 4, a gate electrode 6, contact parts 7 a, a pair of external source/drain electrodes 2 a, and a display electrode 8, which are laminated in the order shown in FIG. 1A. The thin film transistor 100, as shown in FIG. 1A, is formed on a substrate 1 made of glass (non-alkali glass primarily comprising SiO2 and Al2O3). The material for the substrate 1 is not limited to glass, and other insulating materials, such as plastics covered with an insulator and metal foils covered with an insulator, are applicable to form the substrate 1 according to the present invention. The pair of the source/drain electrodes 2 is laminated on the upper surface of the substrate 1. The source/drain electrodes 2 include a source electrode and a drain electrode that are spaced apart from each other. The source/drain electrodes 2 are made of metal. Conductive oxides, such as indium tin oxide (ITO) and n+ZnO, which are generally used as source/drain electrodes, are preferably not used in the source/drain electrode 2 of the present invention because a conductive oxide such as ITO or n+ZnO would be etched when the oxide semiconductor thin film layer and low resistance conductive thin films are etched. The length in the channel width direction (the up-and-down direction in FIG. 1C) of the source/drain electrodes 2 is preferably equal to or smaller than the length of the oxide semiconductor thin film layer 3 in the channel width direction. If the length of the source/drain electrodes 2 in the channel width direction is larger than the length of the oxide semiconductor thin film layer 3 in the channel width direction, it prevents high integration of the thin film transistors when a plurality of TFTs are integrated as shown in FIG. 1C. The source/drain electrodes 2 may be formed as a monolayer of Ti, Cr, Ta, Mo, W, Al, Cu, and Ni or as a lamination of two or more of these materials, or as an alloy containing one or more of Ti, Cr, Ta, Mo, W, Al, Cu, Si and Ni. Specific examples of the alloy include, for example, TiW, TaW, MoW, MoSi, AlCu, AlSi, and NiSi. The thickness of the source/drain electrodes 2 may be, for example, though not limited to, 30 to 150 nm (in the height direction of the layer of the source/drain electrodes 2, corresponding to the up-and-down direction of FIG. 1). The low resistance conductive thin films 10 are formed on the pair of source/drain electrodes 2 in the manner shown in FIG. 1B. The low resistance conductive thin films 10 may be, for example, a thin film primarily comprising indium tin oxide (ITO); or zinc oxide doped with gallium (Ga) or aluminum (Al); or the like. If the oxide semiconductor thin film layer 3 primarily comprises zinc oxide, the low resistance conductive thin films 10 may be made of intrinsic zinc oxide (ZnO) with no impurity introduced. When the low resistance conductive thin films 10 are made of intrinsic zinc oxide with no impurities introduced, the zinc oxide in the low resistance conductive thin films 10 must have larger crystal grain size than the zinc oxide in the oxide semiconductor thin film layer 3. The crystal grain size of the zinc oxide may be adjusted by applying high frequency bias during film formation or by changing film forming conditions during the film formation. The resistance of the low resistance conductive thin films 10 is higher than the resistance of the source/drain electrodes 2 and lower than the resistance of the oxide semiconductor thin film layer 3. Therefore, the contact properties between the source/drain electrodes 2 and the oxide semiconductor thin film layer 3 are improved by using the low resistance conductive thin films 10. The oxide semiconductor thin film layer 3, which is formed by an oxide semiconductor, is arranged so that a channel is formed on each of the low resistance conductive thin films 10 and between the pair of the source/drain electrodes 2. The oxide semiconductor thin film layer 3 may be an oxide semiconductor primarily comprising zinc oxide. As used herein, an oxide semiconductor primarily comprising zinc oxide includes: intrinsic zinc oxide; zinc oxide doped with a p-type dopant such as Li, Na, N, C; zinc oxide doped with an n-type dopant such as B, Al, Ga, In; and zinc oxide doped with Mg, Be. The oxide semiconductor thin film layer 3 may be an amorphous oxide semiconductor, such as an IGZO (In�Ga�Zn�O). The oxide semiconductor thin film layer 3 covers the entire upper surfaces of each of the low resistance conductive thin films 10. At least side surfaces 10 a (see FIG. 1C) of the low resistance conductive thin films 10, extending in the channel length direction, are positioned coincident with the side surfaces of the oxide semiconductor thin film layer 3. The thickness of the oxide semiconductor thin film layer 3 may be, for example, though not limited to, about 25 to 200 nm, and preferably about 50 to 100 nm (in the height direction of the layer of the source/drain electrodes 2, corresponding to the up-and-down direction of FIG. 1). In the present invention, the low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 are formed in a self-aligning manner in the channel width direction, as shown in FIG. 1C, so that the low resistance conductive thin films 10 below the oxide semiconductor thin film layer 3 are not seen when viewed from above. In other words, the entire upper surfaces of the low resistance conductive thin films 10 are coated with the oxide semiconductor thin film layer 3. Consequently, the space provided between the adjacent oxide semiconductor thin films 3 according to the accuracy of mask alignment between the low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 (width A described above with respect to FIG. 9B) is not necessary. Therefore, it is possible to shorten the distance (spacing) between the low resistance conductive thin films 10 to the minimum line width of the aligner (gap B described above with respect to FIG. 9B) and this enables high integration of the thin film transistors 100. A specific comparison between the conventional TFT 500 (see FIG. 9) and the TFT 100 according to the first embodiment of the present invention is set forth below. As mentioned above, the TFT 500 is fabricated by patterning the low resistance conductive thin films 110 on each TFT and then forming the oxide semiconductor thin film layers 103. Consequently, the distance (spacing) between the oxide semiconductor thin film layers 103 is defined as gap B+2�width A (here the gap B is the width of an area determined by the minimum resolution, and the width A is the width of an area determined by the alignment accuracy of the photolithography of the low resistance conductive thin film 110 and the oxide semiconductor thin film layer 103). As explained above with respect to FIG. 9B, when a conventional aligner for an LCD is used, the width A determined by the alignment accuracy, is about 1.5 μm, and the gap B determined by the minimum resolution is about 4.0 μm. Therefore, in the conventional TFT 500, the distance D between the oxide semiconductor thin film layers 103 is approximately 7.0 μm (1.5 μm+4.0 μm+1.5 μm) (see FIG. 9B). On the other hand, in manufacturing the TFT 100 according to the present invention, the low resistance conductive thin films 10 are formed on multiple pairs of the source/drain electrodes 2 (two pairs in the example shown in FIG. 1B) of the TFTs 100 as shown in FIG. 1B. Then the oxide semiconductor thin film layer 3 is coated on the low resistance conductive thin films 10. The oxide semiconductor thin film layer 3 and the low resistance conductive thin films 10 are subsequently etched together in a self-aligning manner so that the side surfaces 10 a of the low resistance conductive thin films 10 have an identical shape to the side surfaces of the oxide semiconductor thin film layer 3, so that the side surfaces of the low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 are positioned coincident with each other. Therefore, although the width A, which is determined by the alignment accuracy, is necessary in the conventional TFT 500, the width A is not necessary in the TFT 100 of the present invention. The distance between the adjacent oxide semiconductor thin film layers 3 of the TFT 100 may be reduced to be equal to the gap B 4.0 μm, which is determined by the minimum resolution. Consequently, the TFT 100 according to the present invention enables nearly twice as high integration as the conventional TFT 500. The gate insulating film 4 is formed so as to cover the upper surface and the side surfaces of the oxide semiconductor thin film layer 3. The gate insulating film 4 may be a silicon oxide (SiOx) film, a silicon oxide nitride (SiON) film, a silicon nitride (SiNx) film, or a silicon nitride (SiNx) film that is doped with oxygen using oxygen or a compound containing oxygen. Preferably, the gate insulating film 4 is formed by a silicon nitride (SiNx) film that is doped with oxygen using oxygen or compound (e.g. N2O) containing oxygen. Such a doped silicon nitride film has a higher dielectric constant than silicon oxide compounds (SiOx) or silicon oxide nitride (SiON). Therefore, if the TFT 100 has a gate insulating film 4 made of a SiNx film doped with oxygen, the gate insulating film has a high dielectric constant and an excellent protecting effect on the oxide semiconductor thin film layer 3. The gate electrode 6 is formed on the gate insulating film 4. The gate electrode 6 is configured to control electron density in the oxide semiconductor thin film layer 3 according to the gate voltages applied to the thin film transistor. The gate electrode 6 is made of a metal film such as films comprising Cr or Ti. Along the channel length direction, the outer ends 6 b of the gate electrode 6 are positioned outside the inner ends 10 c of the low resistance conductive thin films 10. Each of the external source/drain electrodes 2 a is connected to the corresponding source/drain electrodes 2 via the contact part 7 a. The display electrode 8 is configured to apply a voltage to a liquid crystal in a liquid crystal display via the thin film transistor. The display electrode 8 is formed by a conductive oxide thin film such as an indium tin oxide (ITO) thin film and the like because it must have high transmittance with respect to visible light. Referring to FIGS. 2A-2E, a manufacturing method of a thin film transistor (TFT) according to the first embodiment of the present invention will be described. First, as shown in FIG. 2A, the source/drain electrodes 2 are formed on the substrate 1. In the case a plurality of TFTs are arranged in parallel on the substrate 1, the corresponding number of pairs of the source/drain electrodes 2 are patterned, as shown in FIG. 1B (which shows two pairs of source/drain electrodes 2 corresponding to two TFTs). Next, the low resistance conductive thin film 10 having, for example, a 10 to 100 nm thickness, is coated on the source/drain electrodes 2 and the substrate 1 by means of magnetron sputtering. The low resistance conductive thin film 10 is then patterned as shown in FIG. 1B. In the patterning, the low resistance conductive thin film 10 is etched in an area (channel-corresponding area) that corresponds to the gap extending between the source electrodes and the drain electrodes. The resultant low resistance conductive thin film 10 is separated into a first low resistance conductive thin film piece and a second low resistance conductive thin film piece. The first low resistance conductive thin film piece bridges one of the source electrodes and the drain electrodes of the plurality of the TFTs (e.g., the source electrodes), while the second low resistance conductive thin film piece bridges the other of the source electrodes and the drain electrodes of the plurality of the TFTs (e.g., the drain electrodes). At this stage, the low resistance conductive thin films 10 are shaped to extend longer in the channel length direction than the final shape of the low resistance conductive thin films 10. The outer ends of the low resistance conductive thin films 10 are then etched together with the oxide semiconductor thin film layer 3 that is formed thereon so that the outer ends of the low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 have an identical shape, as described below. As shown in FIG. 2B, the oxide semiconductor thin film layer 3 is coated on all the exposed surfaces of the substrate 1, the source/drain electrodes 2, and the low resistance conductive thin films 10, with a thickness, for example, of about 50 to 100 nm. After being coated with the oxide semiconductor thin film layer 3, the low resistance conductive thin films 10 are etched together with the oxide semiconductor thin film layer 3. It is preferable to perform the etching treatment by means of dry etching. Wet etching is also applicable but not preferable because the wet-etched edges form a nonplanar surface, which results in insufficient step coverage of the gate insulating film 4 to be formed on these layers and in increasing leak current. If the low resistance conductive thin film 10 is made of zinc oxide doped with gallium (Ga) or aluminum (Al) or intrinsic zinc oxide (ZnO) with no impurity introduced, gases such as CH4, CF4, CHF3, Cl2, or gas containing one of these gases and oxygen may be used in the dry etching. On the other hand, if the low resistance conductive thin film 10 is made of indium tin oxide (ITO), gases such as CH4 or mixture of CH4 and oxygen may be used. For example, conventional reactive ion etching (RIE method) or inductively coupled plasma (ICP) etching may be used in the dry etching process of the present invention. The low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 are etched together. As a result, the outer ends 10 b of each of the low resistance conductive thin films 10 and the outer ends 3 b of the oxide semiconductor thin film layer 3 are positioned coincident with each other along the channel length direction, as shown in FIG. 2C. Also, the low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 are formed to have an identical shape in the channel width direction. The low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 are slightly longer than the source/drain electrodes 2, as shown in FIG. 1C. FIG. 2C is a sectional view illustrating the lamination of the substrate 1, the source/drain electrodes 2, the low resistance conductive thin films 10, and the oxide semiconductor thin film layer 3 after performing dry etching as described above. In the manufacturing stage shown in FIG. 2C, etched surfaces (3 b and 10 b in FIG. 2C) must be formed outside the respective inner ends 2 c of the source/drain electrodes 2, along the channel length direction. The source/drain electrodes 2 subsequently serve as etching stoppers (since the source/drain electrodes 2 are made of metal, as described above) so that only the low resistance conductive thin films 10 and the oxide semiconductor thin film layers 3 are etched. Next, a gate insulating film 4 is formed on the oxide semiconductor thin film layer 3 using a technique and under a condition(s) that do not reduce the resistance of the semiconductor thin film layer 3. The gate insulating film 4 may be a silicon-based-insulating film such as a silicon oxide (SiOx) film; a silicon oxide nitride (SiON) film; a silicon nitride (SiNx) film; or a silicon nitride (SiNx) film doped with oxygen using oxygen or a compound containing oxygen as a constituent element. Among these, a film of SiNx doped with oxygen using oxygen or a compound (e.g. N2O) including oxygen or the like is desirable because the constituents of such a film have a high dielectric constant as well as an excellent effect of preventing reduction and removal of oxygen and zinc from the oxide semiconductor thin film layer 3. The gate insulating film 4 may be a 100 to 300 nm thick SiNx film created by means of a plasma-enhanced chemical vapor deposition (PCVD) under a condition, for example, where a substrate temperature is 250� C. and mixed gas containing NH3 and SiH4 is used at a flow rate ratio of 4 to 1. As shown in FIG. 2D, a gate electrode 6 is disposed over the gate insulating film 4 so that both of the outer ends 6 b of the gate electrode 6 are positioned outside the respective inner ends 10 c of the low resistance conductive thin films 10. As shown in FIG. 2E, contact holes are opened in the gate insulating film 4 to expose portions of the source/drain electrodes 2 by means of photolithography. The external source/drain electrodes 2 a are respectively connected to the source/drain electrodes 2 through the contact holes via contact parts 7 a. In the final step to form a TFT array, a display electrode 8 made of indium tin oxide (ITO) and the like is formed. FIG. 3 is a cross-sectional view showing the structure of the thin film transistor 200 according to the second embodiment of the present invention. The TFT 200 according to the second embodiment has some similar structures to the TFT 100 according to the first embodiment. These structures are denoted by the same reference numerals. However, in place of the gate insulating film 4 of the TFT 100 according to the first embodiment, the TFT 200 according to the second embodiment includes a first gate insulating film and a second gate insulating film, which are denoted as the first gate insulating film 41 and the second gate insulating film 5. The first gate insulating film 41 is formed to cover only the upper surface of the oxide semiconductor thin film layer 3. The first gate insulating film 41 is provided as a part of the gate insulating film. The first gate insulating film 41 serves as a protective film configured to protect the oxide semiconductor thin film layer 3 from the resist stripper used in the manufacturing process. The second gate insulating film 5 is laminated to cover the side surfaces of the low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 as well as the entire upper surfaces of the first gate insulating film 41. Since the upper surface of the oxide semiconductor thin film layer 3 is covered with the first gate insulating film 41, the coverage on all the exposed surfaces of the semiconductor thin film layer 3 is then completed. The first gate insulating film 41 and the second gate insulating film 5 may be a silicon oxide (SiOx) film; a silicon oxide nitride (SiON) film; a silicon nitride (SiNx) film; or a silicon nitride (SiNx) film doped with oxygen using oxygen or a compound containing oxygen as a constituent element. Preferably, the first gate insulating film 41 and the second gate insulating film 5 are formed by a SiNx film doped with oxygen using oxygen or a compound (e.g. N2O) containing oxygen. Such a doped SiNx film has a higher dielectric constant than silicon oxide compounds (SiOx) or silicon oxide nitride (SiON). The first gate insulating film 41 and the second gate insulating film 5 are formed by means of a plasma-enhanced chemical vapor deposition (PCVD) process. It is desirable to perform the film formation by the plasma-enhanced chemical vapor deposition (PCVD) process at a substrate temperature of 250� C. or below. In this temperature range, the reduction of the oxide semiconductor thin film layer or removal of oxygen and zinc does not occur. Hereinafter, a manufacturing method of a thin film transistor (TFT) according to the second embodiment of the present invention will be explained referring to FIGS. 4A-4D. First, as shown in FIG. 4A, source/drain electrodes 2 and low resistance conductive thin films 10 are formed on a substrate 1 as in the first embodiment of the present invention. The low resistance conductive thin films 10 are formed over the source/drain electrodes 2 of a plurality of TFTs 200. An oxide semiconductor thin film layer 3 is formed on all the exposed surfaces of the substrate 1, the source/drain electrodes 2, and the low resistance conductive thin films 10. Next, as shown in FIG. 4B, a first gate insulating film 41 is formed on the oxide semiconductor thin film layer 3 using a technique and under a condition(s) that do not reduce the resistance of the oxide semiconductor thin film layer 3. Then, a photo-resist is coated on the first gate insulating film 41 and patterned. Using the patterned photo-resist as a mask, the first gate insulating film 41, the low resistance conductive thin films 10, and the oxide semiconductor thin film layer 3 are simultaneously etched. Preferably, dry etching is used in the etching process because the dry-etched edges are positioned coincident with each other. Thus leakage current resulting from insufficient step coverage is suppressed after the first gate insulating film 41 is formed. As in the first embodiment of the present invention, if the low resistance conductive thin films 10 are made of zinc oxide doped with gallium (Ga) or aluminum (Al); or intrinsic zinc oxide (ZnO) with no impurity introduced, gases such as CH4, CF4, CHF3, Cl2, or gas containing one of these gases and oxygen may be used in the dry etching. On the other hand, if the low resistance conductive thin films 10 are made of indium tin oxide (ITO), gases such as CH4 or a mixture of CH4 and oxygen may be used. For example, common reactive ion etching (RIE method) or inductively coupled plasma (ICP) etching may be used in the dry etching process. FIG. 4C shows a cross-section of a lamination comprising the oxide semiconductor thin film layer 3, the low resistance conductive thin films 10, and the first gate insulating film 41 after etching and removing the photo-resist. Etched surfaces 3 b, etched surfaces 10 b, and etched surfaces 41 b of the layers are positioned coincident with each other. Consequently, sufficient step coverage is maintained and leakage current is suppressed, after a second gate insulating film 5 is formed. The etched surfaces must be formed outside the respective inner ends 2 c of the source/drain electrodes 2 in the channel length direction. Thus, only the first gate insulating film 41, the low resistance conductive thin films 10 and the oxide semiconductor thin film layer 3 are etched. The first gate insulating film 41 not only forms an interface with the oxide semiconductor thin film layer 3 but also protects the oxide semiconductor thin film layer 3 while an active region of the TFT is patterned. If the first gate insulating film 41 is not present, while the resist stripper is used to remove photo-resist after the patterning of the active layer, the resist stripper contacts with the surface of the oxide semiconductor thin film layer 3. The resist stripper generally etches and roughens the surface and crystal grain boundary of the oxide semiconductor thin film layer 3. However, if the first gate insulating film 41 is present on the surface of the oxide semiconductor thin film layer 3, the first gate insulating film 41 functions as a protective film against various kinds of liquid chemicals such as a resist stripper used in a photo-lithography process. The first gate insulating film 41 therefore prevents the surface of the oxide semiconductor thin film layer 3 from roughening. Thus, sufficient interface properties between the oxide semiconductor thin film layer 3 and the gate insulating film are maintained. Referring to FIG. 4D, after the TFT active layer region is patterned, a second gate insulating film 5 is formed on all the exposed surfaces of substrate 1, the source/drain electrodes 2, the oxide semiconductor thin film layer 3, the low resistance conductive thin films 10, and the first gate insulating film 41. Then contact holes are opened in the gate insulating film 5 to expose portions of the source/drain electrodes 2. In this embodiment, it is desirable to form the second gate insulating film 5 under similar conditions to the first gate insulating film 41. A gate electrode 6 made of a metal film is formed on the second gate insulating film 5. After that, external source/drain electrodes 2 a are formed with the same material as the gate electrode 6. The external source/drain electrodes 2 a are connected to the source/drain electrodes 2 via contact parts 7 a. A display electrode 8 is formed in the final step to form a TFT array of the second embodiment of the present invention (see the TFT shown in FIG. 3). Hereinafter, the thin film transistor according to the third embodiment of the present invention will be described with reference to FIG. 5. FIG. 5 is a cross-sectional view showing the structure of a thin film transistor 300 according to the third embodiment of the present invention. The thin film transistor 300 includes a substrate 11, a gate electrode 12, a gate insulating film 13, source/drain electrodes 14, low resistance conductive thin films 20, an oxide semiconductor thin film layer 15, an overcoat insulating film 16, external source/drain electrodes 14 a, contact parts 18 a, and a display electrode 19. The TFT 300 is a bottom gate type TFT in which these layers are laminated in the order shown in FIG. 5. As shown in FIG. 5, the thin film transistor 300 is formed on the substrate 11. The gate electrode 12 is formed on the substrate 11. In this step, the gate electrode 12 is disposed over the substrate 11 so that the outer ends of the gate electrode 12 will be positioned outside the inner ends of the low resistance conductive thin films 20 (described below), along the channel length direction. The gate insulating film 13 is laminated on the entire upper surface of the substrate 11 so as to cover the gate electrode 12. The source/drain electrodes 14 are laminated on the gate insulating film 13. The source/drain electrodes 14 are made of metal. In general, source/drain electrodes are formed with conductive oxides such as indium tin oxide (ITO) and n+ZnO. In the present invention, however, the conductive oxides are not preferable because the source/drain electrodes made of the conductive oxides are etched when the oxide semiconductor thin film layer and low resistance conductive thin films are etched. The length in the channel width direction of the source/drain electrodes 14 is preferably equal to or smaller than the length of the oxide semiconductor thin film layer 15 in the channel width direction. If the length in the channel width direction of the source/drain electrodes 14 is larger than the length of the source drain electrodes in the channel width direction, it prevents high integration of the thin film transistors when a plurality of TFTs are integrated. The low resistance conductive thin films 20 are formed on the source/drain electrodes 14. The low resistance conductive thin films 20 may be, for example, a thin film primarily comprising indium tin oxide (ITO); or the zinc oxide doped with gallium (Ga) or aluminum (Al); or the like. If the oxide semiconductor thin film layer 15 primarily comprises zinc oxide, the low resistance conductive thin films 20 may be made of intrinsic zinc oxide (ZnO) with no impurity introduced. When the low resistance conductive thin films 10 are made of intrinsic zinc oxide with no impurities introduced, the zinc oxide in the low resistance conductive thin films 20 must have larger crystal grain size than the zinc oxide in the oxide semiconductor thin film layer 15. The resistance of the low resistance conductive thin films 20 is higher than the resistance of the source/drain electrodes 14 and lower than the resistance of the oxide semiconductor thin film layer 15. Therefore, the contact properties between each of the source/drain electrodes 14 and the oxide semiconductor thin film layer 15 are improved by using the low resistance conductive thin films 20. The oxide semiconductor thin film layer 15 is arranged so that a channel is formed on each of the low resistance conductive thin films 20 and between the electrodes of the low resistance conductive thin films 20. The oxide semiconductor thin film layer 15 may be made of, for example, an oxide semiconductor primarily comprising zinc oxide or an IGZO as the oxide semiconductor thin film layer 3 described above. The oxide semiconductor thin film layer 15 covers the entire upper surface of the low resistance conductive thin films 20. At least side surfaces of the low resistance conductive thin films 20 have an identical shape to the side surfaces of the oxide semiconductor thin film layer 15 so that they form a planar surface. Consequently, the space provided between the adjacent oxide semiconductor thin films 15 according to the accuracy of mask alignment of the low resistance conductive thin films 20 and the oxide semiconductor thin film layer 15 (i.e., a space corresponding to width A described above with respect to FIG. 9B) is not necessary. Therefore, it is possible to shorten the distance (spacing) between the low resistance conductive thin films 20 to the minimum line width of the aligner (i.e., the gap B described above with respect to FIG. 9B), which enables high integration of the thin film transistors 300. The overcoat insulating film 16 is formed so as to cover the upper surface and side surfaces of the oxide semiconductor thin film layer 15. The external source/drain electrodes 14 a are formed so as to be connected to the source/drain electrodes 14 via the contact parts 18 a in the contact holes opened in the overcoat insulating film 16. The display electrode 19 is configured to apply a voltage to a liquid crystal in a liquid crystal display via the thin film transistor. The display electrode 19 is formed by a conductive oxide thin film such as an indium tin oxide (ITO) thin film and the like because it must have high transmittance with respect to visible light. Referring to FIGS. 6A-6D, a manufacturing method of the bottom gate type TFT according to the third embodiment of the present invention will be described below. As shown in FIG. 6A, a gate electrode 12 is formed on a substrate 11 made of, for example, glass. Then, a gate insulating film 13 is formed on the entire upper surface of the substrate 11 so as to cover the gate electrode 12. Although the method for forming the gate insulating film 11 is not limited especially, it is preferable to use a plasma-enhanced chemical vapor deposition (PCVD) process that enables film formation on a substrate having a large area. Referring to FIG. 6B, after the gate insulating film 13 is formed, a metal film is formed on the entire upper surface of the gate insulating film 13. The metal film is then subjected to photolithography to form the source/drain electrodes 14. After that, a low resistance conductive thin film 20 having a thickness of, for example, about 10 to 100 nm, is formed on the source/drain electrodes 14 by means of a magnetron sputtering process. The low resistance conductive thin film 20 is then patterned to bridge the source/drain electrodes 14 of a plurality of TFTs. More specifically, in the patterning, the low resistance conductive thin film 20 is etched in an area (channel-corresponding area) that corresponds to the gap extending between the source electrodes and the drain electrodes. The resultant low resistance conductive thin films 20 are separated into a first low resistance conductive thin film piece and a second low resistance conductive thin film piece. The first low resistance conductive thin film piece bridges, for example, the source electrodes of the plurality of the TFTs, while the second low resistance conductive thin film piece bridges, for example, the drain electrodes of the plurality of the TFTs. At this stage, the low resistance conductive thin films 20 are shaped to extend longer in the channel length direction than the final shape of the low resistance conductive thin films 20. The oxide semiconductor thin film layer 15 is then coated on the low resistance conductive thin films 20, as shown in FIG. 6B. A photo-resist is coated on the upper surface of the oxide semiconductor thin film layer 15 and patterned. Using the patterned photo-resist as a mask, the low resistance conductive thin films 20 and the oxide semiconductor thin film layer 15 are simultaneously etched. Preferably, dry etching is used in the etching process because the dry-etched edges form a planar surface. Thus, leakage current resulting from insufficient step coverage is suppressed after an overcoat insulating film 16 is formed. If the low resistance conductive thin film 20 is made of zinc oxide doped with gallium (Ga) or aluminum (Al), or intrinsic zinc oxide (ZnO) with no impurity introduced, gases such as CH4, CF4, CHF3, Cl2, or gas containing one of these gases and oxygen may be used in the dry etching. On the other hand, if the low resistance conductive thin film 10 is made of indium tin oxide (ITO), gases such as CH4 or a mixture of CH4 and oxygen may be used. For example, common reactive ion etching (RIE method) or inductively coupled plasma (ICP) etching may be used in the dry etching process of the present invention. FIG. 6C is a cross-sectional view of the TFT 300 after performing dry etching. At this stage, etched surfaces 15 b of the oxide semiconductor thin film layer 15 and etched surfaces 20 b of the low resistance conductive thin films 20 must be located outside respective inner ends 14 c of the source/drain electrodes 14 in the channel length direction. The source/drain electrodes 14 subsequently serve as etching stoppers so that only the low resistance conductive thin films 20 and the oxide semiconductor thin film layer 15 are etched. After the patterning of the oxide semiconductor thin film layer 15, the overcoat insulating film 16 is formed to cover all the exposed surfaces of the oxide semiconductor thin film layer 15, as shown in FIG. 6D. The overcoat insulating film 16 may be a silicon oxide (SiOx) film; a silicon oxide nitride (SiON) film; a silicon nitride (SiNx) film; or a silicon nitride (SiNx) film doped with oxygen using oxygen or a compound containing oxygen as a constituent element. Preferably, the overcoat insulating film 16 is formed with a SiNx film that is doped with oxygen using oxygen or a compound (e.g. N2O) containing oxygen. Such a doped SiNx film has a higher dielectric constant than silicon oxide compounds (SiOx) or silicon oxide nitride (SiON). The overcoat insulating film 16 is formed by means of a plasma-enhanced chemical vapor deposition (PCVD) process. After forming the overcoat insulating film 16, external source/drain electrodes 14 a are formed. The external source/drain electrodes 14 a are connected to the source/drain electrodes 14 via contact parts 18 a. A display electrode 19 is formed in the final step to form a TFT array of the third embodiment of the present invention (see the TFT shown in FIG. 5). Finally, the fourth embodiment of the present invention will be described. FIG. 7 is a cross-sectional view showing the structure of the thin film transistor 400 according to the fourth embodiment of the present invention. The TFT 400 according to the fourth embodiment has some similar structures to the TFT 300 according to the third embodiment. These structures are denoted by the same reference numerals. However, in place of the overcoat insulating film 16 of the TFT 300 according to the third embodiment, TFT 400 according to the fourth embodiment includes a first overcoat insulating film and a second overcoat insulating film, which are denoted as the first overcoat insulating film 161 and the second overcoat insulating film 17. The first overcoat insulating film 161 is formed so as to cover only the upper surface of the oxide semiconductor thin film layer 15. The first overcoat insulating film 161 is provided as a part of the gate insulating film. The first overcoat insulating film 161 serves as a protective film configured to protect the oxide semiconductor thin film layer 15 from resist stripper used in the manufacturing process. The second overcoat insulating film 17 is provided for protecting the TFT 400. The second overcoat insulating film 17 is laminated to cover all the exposed surfaces of the first overcoat insulating film 161 and side surfaces of the oxide semiconductor thin film layer 15. The second overcoat insulating film 17 ensures that the entire side surfaces of the oxide semiconductor thin film layer 15 get covered even if some parts of them are not covered with the first overcoat insulating film 161. The first overcoat insulating film 161 and the second overcoat insulating film 17 may be a silicon oxide (SiOx) film; a silicon oxide nitride (SiON) film; a silicon nitride (SiNx) film; or a silicon nitride (SiNx) film doped with oxygen using oxygen or a compound containing oxygen. Preferably, the first overcoat insulating film 161 and the second overcoat insulating film 17 are formed with the SiNx film that is doped with oxygen using oxygen or a compound (e.g. N2O) containing oxygen. Such a doped SiNx film has a higher dielectric constant than silicon oxide compounds (SiOx) or silicon oxide nitride (SiON). The first overcoat insulating film 161 and the second overcoat insulating film 17 are formed by, for example, a plasma-enhanced chemical vapor deposition (PCVD) process. Referring to FIGS. 8A-8D, a manufacturing method of the thin film transistor (TFT) according to the fourth embodiment of the present invention will be described below. First, as shown in FIG. 8A, a gate electrode 12 and a gate insulating film 13 are formed on a substrate 11 as in the third embodiment of the present invention. Next, as shown in FIG. 8B, source/drain electrodes 14, low resistance conductive thin films 20, an oxide semiconductor thin film layer 15, and a first overcoat insulating film 16 are laminated in this order on the gate insulating film 13. Then, the low resistance conductive thin films 20, the oxide semiconductor thin film layer 15 and the first overcoat insulating film 161 are simultaneously etched. Preferably, dry etching is used in the etching process because the dry-etched edges are positioned coincident with each other. Thus leakage current resulting from insufficient step coverage is suppressed, after the first overcoat insulating film 161 is formed. As in the third embodiment of the present invention, if the low resistance conductive thin film 20 is made of zinc oxide doped with gallium (Ga) or aluminum (Al); or intrinsic zinc oxide (ZnO) with no impurity introduced, gases such as CH4, CF4, CHF3, Cl2, or gas containing one of these gases and oxygen may be used in the dry etching. On the other hand, if the low resistance conductive thin film 20 is made of indium tin oxide (ITO), gases such as CH4 or a mixture of CH4 and oxygen may be used. In the fourth embodiment of the present invention, for example, common reactive ion etching (RIE method) or inductively coupled plasma (ICP) etching may be used in the dry etching process, as in the first embodiment of the present invention. FIG. 8C shows a cross-section of a lamination comprising the oxide semiconductor thin film layer 15, the low resistance conductive thin films 20, and the first overcoat insulating film 161 after etching and removing the photo-resist. Etched surfaces 15 b, etched surfaces 20 b, and etched surfaces 161 b of the above-mentioned layers are positioned coincident with each other. Consequently, sufficient step coverage is maintained after a second overcoat insulating film 17 is formed. The first overcoat insulating film 161 also protects the oxide semiconductor thin film layer 15 while an active region of the TFT is patterned. If the first overcoat insulating film 161 is not present, when the resist stripper is used to remove photo-resist after the patterning of an active layer, the resist stripper contacts with the surface of the oxide semiconductor thin film layer 15. The resist stripper generally etches and roughens the surface and crystal grain boundary of the oxide semiconductor thin film layer 15. However, if the first overcoat insulating film 161 is present on the surface of the oxide semiconductor thin film layer 15, the first overcoat insulating film 161 functions as a protective film against various kinds of liquid chemicals such as a resist stripper used in a photo-lithography process. The first overcoat insulating film 161 therefore prevents the surface of the oxide semiconductor thin film layer 15 from roughening. Thus, sufficient interface properties between the oxide semiconductor thin film layer 15 and the first overcoat insulating film 161 are maintained. Referring to FIG. 8D, after the active layer region of the TFT is patterned, a second overcoat insulating film 17 is formed on all the exposed surfaces of the gate insulating film 13, the source/drain electrodes 14, the oxide semiconductor thin film layer 15, the low resistance conductive thin films 20, and the first overcoat insulating film 161. Then contact holes are opened in the first overcoat layer 17 to expose portions of the source/drain electrodes 14. External source/drain electrodes 14 a, which are connected to the source/drain electrodes 14 via contact parts 18 a, are formed. Then a display electrode 19 is formed in the final step to form a TFT array of the fourth embodiment of the present invention (See the TFT shown in FIG. 7). As described above, the thin film transistor according to the present invention has excellent performance so that it is preferably used as an active element of a liquid crystal display device and the like. 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manufacturing the sameUS8242837Oct 19, 2010Aug 14, 2012Semiconductor Energy Laboratory Co., Ltd.Analog circuit and semiconductor deviceUS8243873Sep 22, 2010Aug 14, 2012Semiconductor Energy Laboratory Co., Ltd.Driver circuit, display device including the driver circuit, and electronic appliance including the display deviceUS8247276Feb 3, 2010Aug 21, 2012Semiconductor Energy Laboratory Co., Ltd.Thin film transistor, method for manufacturing the same, and semiconductor deviceUS8247812Feb 4, 2010Aug 21, 2012Semiconductor Energy Laboratory Co., Ltd.Transistor, semiconductor device including the transistor, and manufacturing method of the transistor and the semiconductor deviceUS8247813Dec 1, 2010Aug 21, 2012Semiconductor Energy Laboratory Co., Ltd.Display device and electronic device including the sameUS8247814May 9, 2011Aug 21, 2012Semiconductor Energy Laboratory Co., Ltd.Active matrix display device including a metal oxide semiconductor filmUS8253135Mar 18, 2010Aug 28, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device, display device, and electronic applianceUS8258862Feb 14, 2011Sep 4, 2012Semiconductor Energy Laboratory Co., Ltd.Demodulation circuit and RFID tag including the demodulation circuitUS8268194Feb 15, 2008Sep 18, 2012Samsung Electronics Co., Ltd.Vacuum deposition while applying direct current power , injecting oxygen into enclosure ; sputteringUS8268642Sep 29, 2010Sep 18, 2012Semiconductor Energy Laboratory Co., Ltd.Method for removing electricity and method for manufacturing semiconductor deviceUS8269218Dec 3, 2010Sep 18, 2012Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8274079Jan 26, 2011Sep 25, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device comprising oxide semiconductor and method for manufacturing the sameUS8278162Apr 27, 2010Oct 2, 2012Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8278657Feb 4, 2010Oct 2, 2012Semiconductor Energy Laboratory Co., Ltd.Transistor, semiconductor device including the transistor, and manufacturing method of the transistor and the semiconductor deviceUS8283662Nov 15, 2010Oct 9, 2012Semiconductor Energy Laboratory Co., Ltd.Memory deviceUS8289753Nov 2, 2010Oct 16, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8293594Jul 14, 2010Oct 23, 2012Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing a display device having oxide semiconductor layerUS8293595Jul 29, 2009Oct 23, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8293661Dec 2, 2010Oct 23, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8294147Jul 8, 2010Oct 23, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method the sameUS8298858Nov 9, 2011Oct 30, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8304300Jul 1, 2010Nov 6, 2012Semiconductor Energy Laboratory Co., Ltd.Method of manufacturing display device including transistorUS8304765Sep 10, 2009Nov 6, 2012Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8304773Nov 27, 2008Nov 6, 2012Canon Kabushiki KaishaOxide semiconductor thin-film transistorUS8305109Sep 13, 2010Nov 6, 2012Semiconductor Energy Laboratory Co., Ltd.Logic circuit, light emitting device, semiconductor device, and electronic deviceUS8309961Oct 4, 2010Nov 13, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device, display device, and electronic applianceUS8313980Mar 12, 2012Nov 20, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8314637Dec 13, 2010Nov 20, 2012Semiconductor Energy Laboratory Co., Ltd.Non-volatile latch circuit and logic circuit, and semiconductor device using the sameUS8318551Nov 30, 2009Nov 27, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8319215Sep 30, 2009Nov 27, 2012Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8319216Nov 5, 2009Nov 27, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the semiconductor deviceUS8319218Oct 4, 2010Nov 27, 2012Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor layer and semiconductor deviceUS8319267Nov 10, 2010Nov 27, 2012Semiconductor Energy Laboratory Co., Ltd.Device including nonvolatile memory elementUS8320162Feb 7, 2011Nov 27, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method of the sameUS8320516Feb 22, 2011Nov 27, 2012Semiconductor Energy Laboratory Co., Ltd.Pulse signal output circuit and shift registerUS8324018Dec 18, 2009Dec 4, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device, electronic device, and method of manufacturing semiconductor deviceUS8324027Jul 8, 2010Dec 4, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8324621Oct 7, 2010Dec 4, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having oxide semiconductor layerUS8324626Aug 5, 2010Dec 4, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8329506Nov 16, 2009Dec 11, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8330156Dec 22, 2009Dec 11, 2012Semiconductor Energy Laboratory Co., Ltd.Thin film transistor with a plurality of oxide clusters over the gate insulating layerUS8330157Oct 25, 2010Dec 11, 2012Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor device and semiconductor deviceUS8334719Nov 10, 2010Dec 18, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having function of thyristorUS8338226Mar 29, 2010Dec 25, 2012Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8338827Nov 4, 2009Dec 25, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8339828Nov 17, 2010Dec 25, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8339836Jan 10, 2011Dec 25, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8343799Oct 20, 2009Jan 1, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8343817Aug 5, 2009Jan 1, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8344372Sep 30, 2009Jan 1, 2013Semiconductor Energy Laboratory Co., Ltd.Display device and method for manufacturing the sameUS8344374Oct 5, 2010Jan 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device comprising oxide semiconductor layerUS8344387Nov 24, 2009Jan 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8344788Jan 20, 2011Jan 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8350261Feb 4, 2010Jan 8, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including a transistor, and manufacturing method of the semiconductor deviceUS8350621Aug 7, 2012Jan 8, 2013Semiconductor Energy Laboratory Co., Ltd.Analog circuit and semiconductor deviceUS8357963Jul 19, 2011Jan 22, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8362538Dec 22, 2010Jan 29, 2013Semiconductor Energy Laboratory Co., Ltd.Memory device, semiconductor device, and electronic deviceUS8362563Jul 26, 2012Jan 29, 2013Semiconductor Energy Laboratory Co., Ltd.Thin film transistor, method for manufacturing the same, and semiconductor deviceUS8363452Nov 2, 2010Jan 29, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8363778Jul 19, 2012Jan 29, 2013Semiconductor Energy Laboratory Co., Ltd.Driver circuit, display device including the driver circuit, and electronic appliance including the display deviceUS8367489Nov 22, 2010Feb 5, 2013Semiconductor Energy Laboratory Co., Ltd.Method of fabricating a stacked oxide material for thin film transistorUS8369478Feb 24, 2011Feb 5, 2013Semiconductor Energy Laboratory Co., Ltd.Pulse signal output circuit and shift registerUS8372664Dec 21, 2010Feb 12, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing display deviceUS8373164Nov 6, 2009Feb 12, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8373203Nov 24, 2010Feb 12, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8377744Dec 1, 2010Feb 19, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8377762Sep 13, 2010Feb 19, 2013Semiconductor Energy Laboratory Co., Ltd.Light-emitting device and manufacturing method thereofUS8378343Jul 13, 2010Feb 19, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8378344Aug 26, 2010Feb 19, 2013Semiconductor Energy Laboratory Co., Ltd.Light-emitting device with plural kinds of thin film transistors and circuits over one substrateUS8378391Nov 3, 2010Feb 19, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including image sensorUS8378393Oct 30, 2009Feb 19, 2013Semiconductor Energy Laboratory Co., Ltd.Conductive oxynitride and method for manufacturing conductive oxynitride filmUS8378403Jun 27, 2011Feb 19, 2013Semiconductor Energy LaboratorySemiconductor deviceUS8383470Dec 9, 2009Feb 26, 2013Semiconductor Energy Laboratory Co., Ltd.Thin film transistor (TFT) having a protective layer and manufacturing method thereofUS8384076 *May 14, 2009Feb 26, 2013Samsung Electronics Co., Ltd.Transistors, semiconductor devices and methods of manufacturing the sameUS8384077Dec 10, 2008Feb 26, 2013Idemitsu Kosan Co., LtdField effect transistor using oxide semicondutor and method for manufacturing the sameUS8384079Jul 29, 2010Feb 26, 2013Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor deviceUS8384085Aug 5, 2010Feb 26, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8385105Feb 2, 2011Feb 26, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8389326Jun 13, 2012Mar 5, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8389417Nov 12, 2010Mar 5, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8389988Oct 1, 2009Mar 5, 2013Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8389989Aug 26, 2010Mar 5, 2013Semiconductor Energy Laboratory Co., Ltd.Transistor having oxide semiconductor layer and display utilizing the sameUS8390044Nov 24, 2010Mar 5, 2013Semiconductor Energy Laboratory Co., Ltd.Non-linear element, display device including non-linear element, and electronic device including display deviceUS8394671Jun 13, 2012Mar 12, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8395148Nov 4, 2009Mar 12, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8395153Aug 28, 2012Mar 12, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method the sameUS8395716Nov 30, 2009Mar 12, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display deviceUS8395931Jan 19, 2011Mar 12, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device and driving method thereofUS8395938Jan 10, 2011Mar 12, 2013Semiconductor Energy Laboratory Co., Ltd.Non-volatile semiconductor memory device equipped with an oxide semiconductor writing transistor having a small off-state currentUS8400817Dec 27, 2010Mar 19, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8405092Sep 9, 2011Mar 26, 2013Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8406038Apr 27, 2011Mar 26, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8410002Nov 12, 2010Apr 2, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8410838Nov 15, 2010Apr 2, 2013Semiconductor Energy Laboratory Co., Ltd.Nonvolatile latch circuit and logic circuit, and semiconductor device using the sameUS8411480Apr 8, 2011Apr 2, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8415665Dec 6, 2010Apr 9, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and electronic deviceUS8415667Dec 1, 2010Apr 9, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8415731Dec 27, 2010Apr 9, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor storage device with integrated capacitor and having transistor overlapping sectionsUS8416622May 16, 2011Apr 9, 2013Semiconductor Energy Laboratory Co., Ltd.Driving method of a semiconductor device with an inverted period having a negative potential applied to a gate of an oxide semiconductor transistorUS8420441Jul 29, 2010Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing oxide semiconductor deviceUS8420553Dec 2, 2010Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8421067Jul 29, 2010Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor deviceUS8421068Oct 14, 2010Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8421069Oct 14, 2010Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8421070Jan 14, 2011Apr 16, 2013Samsung Electronics Co., Ltd.ZnO based semiconductor devices and methods of manufacturing the sameUS8421071Jan 9, 2012Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Memory deviceUS8421081Dec 20, 2011Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Memory device, memory module and electronic deviceUS8421083Jul 29, 2010Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device with two oxide semiconductor layers and manufacturing method thereofUS8422272Aug 1, 2011Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method thereofUS8422298Mar 10, 2011Apr 16, 2013Semiconductor Energy Laboratory Co., Ltd.Memory device and semiconductor deviceUS8426853Dec 3, 2010Apr 23, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8426868Oct 23, 2009Apr 23, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8427417Sep 8, 2010Apr 23, 2013Semiconductor Energy Laboratory Co., Ltd.Driver circuit, display device including the driver circuit, and electronic device including the display deviceUS8427595Sep 10, 2009Apr 23, 2013Semiconductor Energy Laboratory Co., Ltd.Display device with pixel portion and common connection portion having oxide semiconductor layersUS8431449Apr 1, 2011Apr 30, 2013Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8432187Dec 7, 2010Apr 30, 2013Semiconductor Energy Laboratory Co., Ltd.Nonvolatile latch circuit and logic circuit, and semiconductor device using the sameUS8432502Dec 1, 2010Apr 30, 2013Semiconductor Energy Laboratory Co., Ltd.Display device and electronic device including the sameUS8432718Dec 3, 2010Apr 30, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8432730Jul 19, 2011Apr 30, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for driving the sameUS8436350Jan 25, 2010May 7, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device using an oxide semiconductor with a plurality of metal clustersUS8436403Jan 26, 2011May 7, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including transistor provided with sidewall and electronic applianceUS8436431Jan 26, 2011May 7, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including gate and three conductor electrodesUS8437165Feb 25, 2011May 7, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device and semiconductor deviceUS8440502Sep 9, 2011May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the semiconductor deviceUS8440510May 10, 2011May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8441007Dec 9, 2009May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Display device and manufacturing method thereofUS8441009Dec 21, 2010May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8441010Jun 21, 2011May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8441011Oct 23, 2012May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8441047Apr 5, 2010May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8441425Nov 24, 2009May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display deviceUS8441841Feb 15, 2011May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method of semiconductor deviceUS8441868Apr 1, 2011May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory having a read circuitUS8442183Feb 28, 2011May 14, 2013Semiconductor Energy Laboratory Co., Ltd.Pulse signal output circuit and shift registerUS8445905Aug 6, 2012May 21, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8446171Apr 23, 2012May 21, 2013Semiconductor Energy Laboratory Co., Ltd.Signal processing unitUS8450123Aug 19, 2011May 28, 2013Semiconductor Energy Laboratory Co., Ltd.Oxygen diffusion evaluation method of oxide film stacked bodyUS8450144Mar 12, 2010May 28, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8450732Jun 19, 2008May 28, 2013Samsung Electronics Co., Ltd.Oxide semiconductors and thin film transistors comprising the sameUS8450735Aug 25, 2010May 28, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including a transistor, and manufacturing method of semiconductor deviceUS8450783Dec 27, 2010May 28, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8451651Feb 15, 2011May 28, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8455868Dec 22, 2010Jun 4, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8461007Apr 21, 2011Jun 11, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8461582Feb 24, 2010Jun 11, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8461584Mar 25, 2011Jun 11, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device with metal oxide filmUS8461586Jul 1, 2011Jun 11, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8461630Nov 18, 2011Jun 11, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8466014Jul 26, 2012Jun 18, 2013Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8466740Oct 27, 2011Jun 18, 2013Semiconductor Energy Laboratory Co., Ltd.Receiving circuit, LSI chip, and storage mediumUS8467231Jul 29, 2011Jun 18, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method thereofUS8467232Jul 29, 2011Jun 18, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8467825Nov 16, 2010Jun 18, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8470649Dec 1, 2010Jun 25, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8470650Oct 18, 2010Jun 25, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method for the sameUS8471252Aug 5, 2009Jun 25, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8472231Mar 31, 2011Jun 25, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8472235Mar 15, 2011Jun 25, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8476625Dec 2, 2009Jul 2, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device comprising gate electrode of one conductive layer and gate wiring of two conductive layersUS8476626Nov 18, 2010Jul 2, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device including semiconductor and oxide semiconductor transistorsUS8476719May 18, 2011Jul 2, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method of manufacturing the sameUS8476927Apr 23, 2012Jul 2, 2013Semiconductor Energy Laboratory Co., Ltd.Programmable logic deviceUS8477158Feb 15, 2011Jul 2, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device and electronic deviceUS8481363Sep 8, 2011Jul 9, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8481377Feb 14, 2011Jul 9, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing a semiconductor device with impurity doped oxide semiconductorUS8482001Dec 22, 2010Jul 9, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8482004Oct 4, 2010Jul 9, 2013Semiconductor Energy Laboratory Co., Ltd.Light-emitting display device and electronic device including the sameUS8482005Dec 1, 2010Jul 9, 2013Semiconductor Energy Laboratory Co., Ltd.Display device comprising an oxide semiconductor layerUS8482690Oct 4, 2010Jul 9, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device and electronic device including the sameUS8482974Feb 7, 2011Jul 9, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device and method for driving the sameUS8487303Mar 14, 2011Jul 16, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8487844Aug 18, 2011Jul 16, 2013Semiconductor Energy Laboratory Co., Ltd.EL display device and electronic device including the sameUS8488077Feb 1, 2012Jul 16, 2013Semiconductor Energy Laboratory Co., Ltd.Display device and method for manufacturing the sameUS8488394Aug 4, 2011Jul 16, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8492756Jan 7, 2010Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8492757Mar 4, 2010Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8492758Sep 22, 2010Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor film and semiconductor deviceUS8492759Dec 6, 2010Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Field effect transistorUS8492760Feb 8, 2012Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8492764Aug 2, 2010Jul 23, 2013Semicondcutor Energy Laboratory Co., Ltd.Light-emitting device and manufacturing method thereofUS8492806Oct 26, 2010Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Non-linear element, display device including non-linear element, and electronic device including display deviceUS8492840 *Jan 18, 2011Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having an oxide semiconductor layerUS8492853Jan 26, 2011Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Field effect transistor having conductor electrode in contact with semiconductor layerUS8492862Nov 12, 2010Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Sputtering target and manufacturing method thereof, and transistorUS8493766Feb 2, 2011Jul 23, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method of driving semiconductor deviceUS8501555Sep 10, 2009Aug 6, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8501564Nov 30, 2010Aug 6, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor element, semiconductor device, and method for manufacturing the sameUS8502216Nov 5, 2009Aug 6, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8502220Aug 2, 2010Aug 6, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8502221Mar 29, 2011Aug 6, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device with two metal oxide films and an oxide semiconductor filmUS8502226Feb 17, 2011Aug 6, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display deviceUS8502292Jul 14, 2011Aug 6, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device with memory cellsUS8502772Jun 30, 2011Aug 6, 2013Semiconductor Energy Laboratory Co., Ltd.Driving method of input/output deviceUS8507907Jan 27, 2011Aug 13, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8508256May 15, 2012Aug 13, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor integrated circuitUS8508276Aug 19, 2011Aug 13, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including latch circuitUS8508967Sep 1, 2011Aug 13, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method of semiconductor deviceUS8513053Feb 4, 2013Aug 20, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method the sameUS8513054Feb 14, 2013Aug 20, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8513773Jan 9, 2012Aug 20, 2013Semiconductor Energy Laboratory Co., Ltd.Capacitor and semiconductor device including dielectric and N-type semiconductorUS8514609Feb 2, 2011Aug 20, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method of driving semiconductor deviceUS8518739Nov 10, 2009Aug 27, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8518740Jul 1, 2010Aug 27, 2013Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8518755Feb 17, 2011Aug 27, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8518761Apr 13, 2011Aug 27, 2013Semiconductor Energy Laboratory Co., Ltd.Deposition method and method for manufacturing semiconductor deviceUS8519387Jul 19, 2011Aug 27, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturingUS8519990Mar 24, 2011Aug 27, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor display deviceUS8520426Sep 1, 2011Aug 27, 2013Semiconductor Energy Laboratory Co., Ltd.Method for driving semiconductor deviceUS8525304May 18, 2011Sep 3, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8525551May 16, 2012Sep 3, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8525585Jul 26, 2012Sep 3, 2013Semiconductor Energy Laboratory Co., Ltd.Demodulation circuit and RFID tag including the demodulation circuitUS8526567Oct 4, 2010Sep 3, 2013Semiconductor Energy Laboratory Co., Ltd.Shift register and display device and driving method thereofUS8530285Dec 22, 2010Sep 10, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8530289Apr 21, 2011Sep 10, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8530892Nov 2, 2010Sep 10, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8530944Mar 1, 2011Sep 10, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8531618Nov 29, 2010Sep 10, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device, method for driving the same, and electronic device including the sameUS8531870Jul 28, 2011Sep 10, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method of semiconductor deviceUS8536571Jan 9, 2012Sep 17, 2013Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8537600Jul 27, 2011Sep 17, 2013Semiconductor Energy Laboratory Co., Ltd.Low off-state leakage current semiconductor memory deviceUS8541266Mar 26, 2012Sep 24, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8541780Aug 31, 2010Sep 24, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having oxide semiconductor layerUS8541781Mar 2, 2012Sep 24, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8541782Nov 5, 2010Sep 24, 2013Semiconductor Energy Laboratory Co., Ltd.Method for evaluating oxide semiconductor and method for manufacturing semiconductor deviceUS8541846Feb 14, 2011Sep 24, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8542004Nov 21, 2012Sep 24, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method of the sameUS8542034May 16, 2012Sep 24, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8542528Aug 3, 2011Sep 24, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for driving semiconductor deviceUS8546161Sep 7, 2011Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of thin film transistor and liquid crystal display deviceUS8546180Jul 29, 2010Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing oxide semiconductor deviceUS8546181Sep 25, 2012Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8546182Nov 19, 2012Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8546225Apr 21, 2011Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8546811Feb 1, 2011Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8546892Oct 17, 2011Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8547493Oct 6, 2010Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device with indium or zinc layer in contact with oxide semiconductor layer and method for manufacturing the semiconductor deviceUS8547753Jan 13, 2011Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8547771Aug 2, 2011Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor integrated circuitUS8551810Mar 25, 2011Oct 8, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8551824Feb 17, 2011Oct 8, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8552423Jul 14, 2010Oct 8, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8552425Jun 10, 2011Oct 8, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8552434Nov 19, 2012Oct 8, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8552712Apr 13, 2011Oct 8, 2013Semiconductor Energy Laboratory Co., Ltd.Current measurement method, inspection method of semiconductor device, semiconductor device, and test element groupUS8553447Sep 20, 2011Oct 8, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device and driving method thereofUS8557641Jun 29, 2010Oct 15, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8558233Sep 14, 2012Oct 15, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8558960Sep 7, 2011Oct 15, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device and method for manufacturing the sameUS8559220Nov 23, 2010Oct 15, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8563973Mar 7, 2011Oct 22, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8563976Dec 6, 2010Oct 22, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8564331May 2, 2012Oct 22, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8569753May 27, 2011Oct 29, 2013Semiconductor Energy Laboratory Co., Ltd.Storage device comprising semiconductor elementsUS8569754Oct 31, 2011Oct 29, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8570065Apr 3, 2012Oct 29, 2013Semiconductor Energy Laboratory Co., Ltd.Programmable LSIUS8575610Aug 19, 2011Nov 5, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for driving the sameUS8575618Jun 25, 2012Nov 5, 2013Semiconductor Energy Laboratory Co., Ltd.Electronic device, semiconductor device and manufacturing method thereofUS8575678Jan 4, 2012Nov 5, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device with floating gateUS8575960May 15, 2012Nov 5, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8576620Nov 12, 2010Nov 5, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method thereofUS8576636Jul 1, 2011Nov 5, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8576978Oct 25, 2012Nov 5, 2013Semiconductor Energy Laboratory Co., Ltd.Pulse signal output circuit and shift registerUS8581625May 3, 2012Nov 12, 2013Semiconductor Energy Laboratory Co., Ltd.Programmable logic deviceUS8581818Mar 28, 2011Nov 12, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device and method for driving the sameUS8582348Aug 1, 2011Nov 12, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for driving semiconductor deviceUS8582349Aug 24, 2011Nov 12, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8582716Jan 10, 2013Nov 12, 2013Semiconductor Energy Laboratory Co., Ltd.Driver circuit, display device including the driver circuit, and electronic appliance including the display deviceUS8586905Feb 4, 2011Nov 19, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method thereofUS8587342May 15, 2012Nov 19, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor integrated circuitUS8587999Nov 9, 2012Nov 19, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8588000May 16, 2011Nov 19, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device having a reading transistor with a back-gate electrodeUS8592251May 9, 2012Nov 26, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8592261Aug 25, 2011Nov 26, 2013Semiconductor Energy Laboratory Co., Ltd.Method for designing semiconductor deviceUS8592814Sep 22, 2010Nov 26, 2013Semiconductor Energy Laboratory Co., Ltd.Device with oxide semiconductor thin film transistorUS8592879Aug 30, 2011Nov 26, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8593856Jan 18, 2011Nov 26, 2013Semiconductor Energy Laboratory Co., Ltd.Signal processing circuit and method for driving the sameUS8593857Feb 10, 2011Nov 26, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device, driving method thereof, and method for manufacturing semiconductor deviceUS8593858Aug 26, 2011Nov 26, 2013Semiconductor Energy Laboratory Co., Ltd.Driving method of semiconductor deviceUS8597992Feb 14, 2011Dec 3, 2013Semiconductor Energy Laboratory Co., Ltd.Transistor and manufacturing method of the sameUS8598591May 27, 2011Dec 3, 2013Semiconductor Energy Laboratory Co., Ltd.Display device including clock wiring and oxide semiconductor transistorUS8598635Oct 26, 2010Dec 3, 2013Semiconductor Energy Laboratory Co., Ltd.TransistorUS8598648Mar 10, 2011Dec 3, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method of semiconductor deviceUS8599177Dec 15, 2010Dec 3, 2013Semiconductor Energy Laboratory Co., Ltd.Method for driving liquid crystal display deviceUS8599604Oct 19, 2011Dec 3, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device and driving method thereofUS8599998Feb 11, 2011Dec 3, 2013Semiconductor Energy Laboratory Co., Ltd.Display device, semiconductor device, and driving method thereofUS8603841Aug 24, 2011Dec 10, 2013Semiconductor Energy Laboratory Co., Ltd.Manufacturing methods of semiconductor device and light-emitting display deviceUS8604472Nov 1, 2012Dec 10, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8604473Apr 18, 2013Dec 10, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8604476Oct 11, 2011Dec 10, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including memory cellUS8605059Jun 22, 2011Dec 10, 2013Semiconductor Energy Laboratory Co., Ltd.Input/output device and driving method thereofUS8605073Feb 14, 2011Dec 10, 2013Semiconductor Energy Laboratory Co., Ltd.Pulse signal output circuit and shift registerUS8605477Apr 25, 2011Dec 10, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8609478Jun 29, 2010Dec 17, 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8610120Sep 7, 2011Dec 17, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device and manufacturing method thereofUS8610180Jun 7, 2011Dec 17, 2013Semiconductor Energy Laboratory Co., Ltd.Gas sensor and method for manufacturing the gas sensorUS8610187Dec 13, 2010Dec 17, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8610482May 22, 2012Dec 17, 2013Semiconductor Energy Laboratory Co., Ltd.Trimming circuit and method for driving trimming circuitUS8610696Feb 4, 2011Dec 17, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and display device including the sameUS8614910Jul 20, 2011Dec 24, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for driving the sameUS8614916Aug 2, 2011Dec 24, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method thereofUS8617920Feb 8, 2011Dec 31, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8618543Oct 30, 2007Dec 31, 2013Samsung Electronics Co., Ltd.Thin film transistor including selectively crystallized channel layer and method of manufacturing the thin film transistorUS8618586Jan 18, 2013Dec 31, 2013Semiconductor Energy Laboratory Co., Ltd.Memory device, semiconductor device, and electronic deviceUS8619104Feb 4, 2011Dec 31, 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device and electronic deviceUS8619454Nov 19, 2012Dec 31, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8619470Jun 16, 2011Dec 31, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device with long data holding periodUS8623698Mar 4, 2013Jan 7, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8624237Jul 29, 2009Jan 7, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8624239May 11, 2011Jan 7, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8624245Dec 1, 2010Jan 7, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8624650Dec 20, 2010Jan 7, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8625085Feb 29, 2012Jan 7, 2014Semiconductor Energy Laboratory Co., Ltd.Defect evaluation method for semiconductorUS8628987Aug 24, 2011Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Manufacturing methods of thin film transistor, liquid crystal display device, and semiconductor deviceUS8629000Jan 8, 2013Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Thin film transistor, method for manufacturing the same, and semiconductor deviceUS8629432Jan 7, 2010Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8629434May 2, 2013Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Display device and manufacturing method thereofUS8629438May 18, 2011Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8629441Aug 2, 2010Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8629496Nov 16, 2011Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8630110Apr 30, 2012Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8630127Jun 22, 2011Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for driving the sameUS8630130Mar 26, 2012Jan 14, 2014Semiconductor Energy Laboratory Co., Ltd.Memory circuit, memory unit, and signal processing circuitUS8633480Nov 3, 2010Jan 21, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having an oxide semiconductor with a crystalline region and manufacturing method thereofUS8633492Nov 29, 2012Jan 21, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8634228Aug 29, 2011Jan 21, 2014Semiconductor Energy Laboratory Co., Ltd.Driving method of semiconductor deviceUS8634230Jan 12, 2012Jan 21, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for driving the sameUS8637347Jul 1, 2010Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8637348Jul 24, 2013Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8637354Jun 14, 2011Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8637802Jun 7, 2011Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Photosensor, semiconductor device including photosensor, and light measurement method using photosensorUS8637861Nov 18, 2010Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Transistor having oxide semiconductor with electrode facing its side surfaceUS8637863Aug 27, 2012Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8637864Oct 1, 2012Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method of manufacturing the sameUS8637865Feb 15, 2013Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8638123May 16, 2012Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Adder including transistor having oxide semiconductor layerUS8638322Jan 26, 2011Jan 28, 2014Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8642380Jun 22, 2011Feb 4, 2014Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8642412Oct 18, 2010Feb 4, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing an oxide-based semiconductor thin film transistor (TFT) including out diffusing hydrogen or moisture from the oxide semiconductor layer into an adjacent insulating layer which contains a halogen elementUS8643004Oct 26, 2010Feb 4, 2014Semiconductor Energy Laboratory Co., Ltd.Power diode including oxide semiconductorUS8643007Feb 16, 2012Feb 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8643008Jul 12, 2012Feb 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8643009Sep 4, 2012Feb 4, 2014Semiconductor Energy Laboratory Co., Ltd.Transistor, semiconductor device including the transistor, and manufacturing method of the transistor and the semiconductor deviceUS8643011Nov 15, 2012Feb 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8644048Sep 12, 2011Feb 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8647919 *Sep 7, 2011Feb 11, 2014Semiconductor Energy Laboratory Co., Ltd.Light-emitting display device and method for manufacturing the sameUS8648343Jul 20, 2010Feb 11, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8649208May 17, 2012Feb 11, 2014Semiconductor Energy Laboratory Co., Ltd.Method for driving semiconductor deviceUS8653513Feb 17, 2011Feb 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device with sidewall insulating layerUS8653514Apr 5, 2011Feb 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8653520Feb 4, 2011Feb 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8654231Mar 1, 2011Feb 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8654272Aug 2, 2010Feb 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device wherein each of a first oxide semiconductor layer and a second oxide semiconductor layer includes a portion that is in an oxygen-excess state which is in contact with a second insulatng layerUS8654582Mar 8, 2013Feb 18, 2014Semiconductor Energy Laboratory Co., Ltd.Non-volatile semiconductor memory device equipped with an oxide semiconductor writing transistor having a small off-state currentUS8658448Dec 1, 2011Feb 25, 2014Semiconductor Energy Laboratory Co., Ltd.Display device and method for manufacturing the sameUS8659013Apr 5, 2011Feb 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8659015Feb 23, 2012Feb 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8659934Oct 9, 2012Feb 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8659935Jan 25, 2013Feb 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device with transistor having oxide semiconductor channel formation regionUS8659941Nov 22, 2010Feb 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory cell having an oxide semiconductor transistor and erasable by ultraviolet lightUS8659957Feb 23, 2012Feb 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method of driving semiconductor deviceUS8664036Dec 15, 2010Mar 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8664097Aug 30, 2011Mar 4, 2014Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8664118Jul 2, 2012Mar 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8664652Dec 21, 2010Mar 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8664653 *Mar 1, 2011Mar 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8664658May 5, 2011Mar 4, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8665403May 16, 2011Mar 4, 2014Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display deviceUS8669148Aug 13, 2013Mar 11, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8669556Nov 30, 2011Mar 11, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8669781May 25, 2012Mar 11, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8673426Jun 21, 2012Mar 18, 2014Semiconductor Energy Laboratory Co., Ltd.Driver circuit, method of manufacturing the driver circuit, and display device including the driver circuitUS8674351Dec 22, 2011Mar 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and semiconductor memory deviceUS8674354Sep 13, 2012Mar 18, 2014Semiconductor Energy Laboratory Co., Ltd.Display device with an oxide semiconductor including a crystal regionUS8674738May 17, 2012Mar 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8674972Sep 2, 2011Mar 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8675382Jan 31, 2012Mar 18, 2014Semiconductor Energy Laboratory Co., Ltd.Programmable LSIUS8675394Jul 27, 2011Mar 18, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device with oxide semiconductor transistorUS8679986Sep 24, 2011Mar 25, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing display deviceUS8680520Nov 18, 2010Mar 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8680521Jan 30, 2013Mar 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8680522Mar 15, 2013Mar 25, 2014Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor film and semiconductor deviceUS8680529May 3, 2012Mar 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8680679Mar 1, 2011Mar 25, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8681533Apr 23, 2012Mar 25, 2014Semiconductor Energy Laboratory Co., Ltd.Memory circuit, signal processing circuit, and electronic deviceUS8685787Aug 17, 2011Apr 1, 2014Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8686416Mar 15, 2012Apr 1, 2014Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor film and semiconductor deviceUS8686417Jul 23, 2012Apr 1, 2014Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor device formed by using multi-tone maskUS8686425Aug 14, 2012Apr 1, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8686486Mar 21, 2012Apr 1, 2014Semiconductor Energy Laboratory Co., Ltd.Memory deviceUS8686750May 5, 2011Apr 1, 2014Semiconductor Energy Laboratory Co., Ltd.Method for evaluating semiconductor deviceUS8687411Jan 6, 2012Apr 1, 2014Semiconductor Energy Laboratory Co., Ltd.Memory device, semiconductor device, and detecting method for defective memory cell in memory deviceUS8687416Dec 23, 2011Apr 1, 2014Semiconductor Energy Laboratory Co., Ltd.Signal processing circuit comprising buffer memory deviceUS8692243Apr 11, 2011Apr 8, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8692579May 15, 2012Apr 8, 2014Semiconductor Energy Laboratory Co., Ltd.Circuit and method of driving the sameUS8692823Jul 29, 2011Apr 8, 2014Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device and driving method of the sameUS8693617May 10, 2013Apr 8, 2014Semiconductor Energy Laboratory Co., Ltd.Pulse signal output circuit and shift registerUS8697488Aug 15, 2013Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8698138Dec 13, 2012Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor film on amorphous insulating surfaceUS8698143Aug 6, 2012Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8698155Jun 24, 2013Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Display deviceUS8698214Oct 18, 2012Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8698219Jan 11, 2011Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device having a low off state current and high repeatabilityUS8698521May 15, 2012Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8698717Dec 15, 2010Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device and driving method thereofUS8698970Jul 11, 2013Apr 15, 2014Semiconductor Energy Laboratory Co., Ltd.Display device and method for manufacturing the sameUS8703531Feb 25, 2011Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of oxide semiconductor film and manufacturing method of transistorUS8704216Feb 17, 2010Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8704218Oct 26, 2010Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having an oxide semiconductor filmUS8704219Mar 25, 2011Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8704221Dec 17, 2012Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8704222Jul 8, 2013Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Field effect transistorUS8704267Oct 15, 2009Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Light-emitting display deviceUS8704806Dec 6, 2010Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Display device and driving method thereofUS8705267Nov 30, 2011Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Integrated circuit, method for driving the same, and semiconductor deviceUS8705292May 8, 2012Apr 22, 2014Semiconductor Energy Laboratory Co., Ltd.Nonvolatile memory circuit with an oxide semiconductor transistor for reducing power consumption and electronic deviceUS8709864Nov 3, 2010Apr 29, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor element and semiconductor device, and deposition apparatusUS8709889May 15, 2012Apr 29, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device and manufacturing method thereofUS8709920Feb 16, 2012Apr 29, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8709922Apr 17, 2012Apr 29, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8710499Feb 19, 2013Apr 29, 2014Semiconductor Energy Laboratory Co., Ltd.Transistor and display deviceUS8710762Jun 7, 2011Apr 29, 2014Semiconductor Energy Laboratory Co., Ltd.DC/DC converter, power supply circuit, and semiconductor deviceUS8711312Apr 8, 2011Apr 29, 2014Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display deviceUS8711314Mar 11, 2013Apr 29, 2014Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display deviceUS8711623Mar 22, 2013Apr 29, 2014Semicondoctor Energy Laboratory Co., Ltd.Memory device and semiconductor deviceUS8716061 *Dec 18, 2012May 6, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8716073Jul 12, 2012May 6, 2014Semiconductor Energy Laboratory Co., Ltd.Method for processing oxide semiconductor film and method for manufacturing semiconductor deviceUS8716646Oct 4, 2011May 6, 2014Semiconductor Energy Laboratory Co., Ltd.Photoelectric conversion device and method for operating the sameUS8716708Sep 25, 2012May 6, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8716712Feb 15, 2011May 6, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8717806Jan 3, 2012May 6, 2014Semiconductor Energy Laboratory Co., Ltd.Storage element, storage device, signal processing circuit, and method for driving storage elementUS8718224Jul 30, 2012May 6, 2014Semiconductor Energy Laboratory Co., Ltd.Pulse signal output circuit and shift registerUS8723173Sep 22, 2010May 13, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device, power circuit, and manufacturing method of semiconductor deviceUS8723176Jan 28, 2013May 13, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8724407Mar 23, 2012May 13, 2014Semiconductor Energy Laboratory Co., Ltd.Signal processing circuitUS8728860Aug 17, 2011May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8728883Nov 16, 2011May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8729545Apr 24, 2012May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8729547Dec 26, 2012May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8729550Jul 14, 2010May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8729613Oct 11, 2012May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8729938May 16, 2012May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Phase locked loop and semiconductor device using the sameUS8730416Dec 1, 2011May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display deviceUS8730730Jan 24, 2012May 20, 2014Semiconductor Energy Laboratory Co., Ltd.Temporary storage circuit, storage device, and signal processing circuitUS8735882Jan 14, 2011May 27, 2014Samsung Electronics Co., Ltd.ZnO based semiconductor devices and methods of manufacturing the sameUS8735884Oct 1, 2012May 27, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including oxide semiconductorUS8735892Dec 23, 2011May 27, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device using oxide semiconductorUS8736371May 10, 2012May 27, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having transistors each of which includes an oxide semiconductorUS8737109Aug 23, 2011May 27, 2014Semiconductor Energy Laboratory Co., Ltd.Memory device and semiconductor deviceUS8742422Aug 30, 2010Jun 3, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8742544Feb 19, 2013Jun 3, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8742804May 17, 2012Jun 3, 2014Semiconductor Energy Laboratory Co., Ltd.Divider circuit and semiconductor device using the sameUS8743590Apr 5, 2012Jun 3, 2014Semiconductor Energy Laboratory Co., Ltd.Memory device and semiconductor device using the sameUS8748215Nov 22, 2010Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Stacked oxide material, semiconductor device, and method for manufacturing the semiconductor deviceUS8748223Sep 23, 2010Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing oxide semiconductor film and method for manufacturing semiconductor deviceUS8748224Aug 4, 2011Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8748240Dec 13, 2012Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8748241Dec 17, 2012Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8748880Nov 19, 2010Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device with oxide semiconductorUS8748881Nov 22, 2010Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8748886Jun 26, 2012Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8748887Sep 13, 2012Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8748889Jul 22, 2011Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method of manufacturing the sameUS8749930Jan 26, 2010Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Protection circuit, semiconductor device, photoelectric conversion device, and electronic deviceUS8750023Sep 12, 2011Jun 10, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8753491Nov 12, 2010Jun 17, 2014Semiconductor Energy Laboratory Co., Ltd.Method for packaging target material and method for mounting targetUS8753928Mar 7, 2012Jun 17, 2014Semiconductor Energy Laboratory Co., Ltd.Method of manufacturing semiconductor deviceUS8754409Mar 23, 2012Jun 17, 2014Semiconductor Energy Laboratory Co., Ltd.Field-effect transistor, and memory and semiconductor circuit including the sameUS8754693Mar 1, 2013Jun 17, 2014Semiconductor Energy Laboratory Co., Ltd.Latch circuit and semiconductor deviceUS8754839Nov 1, 2011Jun 17, 2014Semiconductor Energy Laboratory Co., Ltd.Method for driving display deviceUS8759132Dec 3, 2012Jun 24, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8759167Nov 29, 2012Jun 24, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8759206Jun 4, 2013Jun 24, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8759820Aug 9, 2011Jun 24, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8759829Aug 14, 2012Jun 24, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device comprising oxide semiconductor layer as channel formation layerUS8759917Dec 28, 2010Jun 24, 2014Samsung Electronics Co., Ltd.Thin-film transistor having etch stop multi-layer and method of manufacturing the sameUS8760442Feb 17, 2011Jun 24, 2014Semiconductor Energy Laboratory Co., Ltd.Display device and E-book reader provided therewithUS8760903Mar 5, 2012Jun 24, 2014Semiconductor Energy Laboratory Co., Ltd.Storage circuitUS8760931Sep 23, 2013Jun 24, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8765522Nov 22, 2010Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Stacked oxide material, semiconductor device, and method for manufacturing the semiconductor deviceUS8766250Nov 19, 2010Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Thin film transistorUS8766252Jun 23, 2011Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device comprising an oxide semiconductorUS8766253Aug 24, 2011Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8766255Mar 13, 2012Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor device including gate trench and isolation trenchUS8766329Jun 14, 2012Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and a method for manufacturing the sameUS8766338Mar 3, 2011Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including photosensor and transistor having oxide semiconductorUS8766608Oct 21, 2010Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Voltage regulator circuit and semiconductor device, including transistor using oxide semiconductorUS8767159Apr 20, 2012Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display deviceUS8767442Sep 12, 2011Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including memory cell arrayUS8767443Sep 19, 2011Jul 1, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory device and method for inspecting the sameUS8772093Dec 18, 2012Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8772094Nov 20, 2012Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8772160Feb 17, 2011Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor element and deposition apparatusUS8772701May 23, 2011Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Photodetector and display device with light guide configured to face photodetector circuit and reflect light from a sourceUS8772768Dec 20, 2011Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturingUS8772769Oct 5, 2012Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing semiconductor deviceUS8772771Apr 25, 2013Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor deviceUS8772784Feb 21, 2013Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including pair of electrodes and oxide semiconductor film with films of low conductivity therebetweenUS8772849Mar 2, 2012Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor memory deviceUS8773173Dec 13, 2012Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device, image display device, storage device, and electronic deviceUS8773906Jan 24, 2012Jul 8, 2014Semiconductor Energy Laboratory Co., Ltd.Memory circuitUS8778729Jul 28, 2011Jul 15, 2014Semiconductor Energy Laboratory Co., Ltd.Manufacturing method of semiconductor deviceUS8779418Oct 7, 2010Jul 15, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the sameUS8779420Nov 23, 2012Jul 15, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8779432Jan 20, 2012Jul 15, 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereofUS8779433May 25, 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