Source: http://www.google.com/patents/US7884817?dq=4168396
Timestamp: 2016-08-28 20:12:42
Document Index: 545016356

Matched Legal Cases: ['art/9612', 'art4', 'art/9606', 'art4', 'art/9606', 'art7', 'art/9606', 'art5', 'art/9606', 'art6', 'art/9606', 'art8', 'art 2']

Patent US7884817 - Method and system for defining and controlling algorithmic elements in a ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsAn API is provided that enables programmability of a 3D chip, wherein programming or algorithmic elements written by the developer can be downloaded to the chip, thereby programming the chip to perform those algorithms. A developer writes a routine that is downloadable to a 3D graphics chip. There are...http://www.google.com/patents/US7884817?utm_source=gb-gplus-sharePatent US7884817 - Method and system for defining and controlling algorithmic elements in a graphics display systemAdvanced Patent SearchPublication numberUS7884817 B2Publication typeGrantApplication numberUS 10/934,274Publication dateFeb 8, 2011Priority dateMar 7, 2000Fee statusPaidAlso published asUS7159041, US7782316, US7800606, US7800607, US7965288, US20020033817, US20050027682, US20050052456, US20050086317, US20050086669, US20100039430Publication number10934274, 934274, US 7884817 B2, US 7884817B2, US-B2-7884817, US7884817 B2, US7884817B2InventorsCharles N. Boyd, Michael A. ToelleOriginal AssigneeMicrosoft CorporationExport CitationBiBTeX, EndNote, RefManPatent Citations (66), Non-Patent Citations (100), Referenced by (2), Classifications (6), Legal Events (2) External Links: USPTO, USPTO Assignment, EspacenetMethod and system for defining and controlling algorithmic elements in a graphics display system
[31:29] 0x1 [28] indicates whether this is a tessellator stream [27:04] 0x0 [03:00] stream selector (0. . . 15) Stream Data Definition (single DWORD token)
[31:29] 0x4 [28:25] count of 4*DWORD constants to load (0 . . . 15) [24:07] 0x0 [06:00] constant memory address (0. . . 95) Extension Token (single or multiple DWORD token)
Stream Data Definition (Load): type=FLOAT3; register=3 Stream Data Definition (Load): type=FLOAT3; register=4 Stream Data Definition (Skip): count=2 Stream Data Definition (Load): type=FLOAT2; register=7 defines stream zero to consist of four elements, three of which are loaded into registers and the fourth skipped over. Register 3 is loaded with the first three DWORDs in each vertex interpreted as FLOAT data. Register 4 is loaded with the fourth, fifth, and sixth DWORDs interpreted as FLOAT data. The next two DWORDs (seventh and eighth) are skipped over and not loaded into any vertex input register. Register 7 is loaded with the ninth and tenth DWORDS interpreted as FLOAT data. Placing of tokens other than NOPs between the Stream Selector and Stream Data Definition tokens is disallowed. While the above exemplary computer-executable instructions have been described in the context of a procedural shader, these concepts and principles may be applied to any 3D hardware rendering device utilized in connection with a graphics display system.
Patent CitationsCited PatentFiling datePublication dateApplicantTitleUS4805098May 5, 1986Feb 14, 1989Mips Computer Systems, Inc.Write bufferUS4953073Feb 6, 1986Aug 28, 1990Mips Computer Systems, Inc.Cup chip having tag comparator and address translation unit on chip and connected to off-chip cache and main memoriesUS4959779Nov 28, 1988Sep 25, 1990Mips Computer Systems, Inc.Dual byte order computer architecture a functional unit for handling data sets with differnt byte ordersUS5027270Oct 11, 1988Jun 25, 1991Mips Computer Systems, Inc.Processor controlled interface with instruction streamingUS5122783 *Jul 27, 1990Jun 16, 1992Cirrus Logic, Inc.System and method for blinking digitally-commanded pixels of a display screen to produce a palette of many colorsUS5269021Oct 12, 1989Dec 7, 1993Texas Instruments IncorporatedMultiprocessor software interface for a graphics processor subsystem employing partially linked dynamic load modules which are downloaded and fully linked at run timeUS5388841 *Jan 30, 1992Feb 14, 1995A/N Inc.External memory system having programmable graphics processor for use in a video game system or the likeUS5394524Nov 30, 1992Feb 28, 1995International Business Machines CorporationMethod and apparatus for processing two graphics data streams in parallelUS5398328Sep 27, 1993Mar 14, 1995Silicon Graphics, Inc.System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory ordersUS5590294May 24, 1995Dec 31, 1996Silicon Graphics, Inc.Method and apparatus for retarting pipeline processingUS5594854 *Mar 24, 1995Jan 14, 19973Dlabs Inc. Ltd.Graphics subsystem with coarse subpixel correctionUS5650941 *Dec 29, 1995Jul 22, 1997Intel CorporationComputer architecture for creating and manipulating displayable objectsUS5671401 *May 8, 1995Sep 23, 1997Silicon Graphics, Inc.Apparatus for efficiently accessing graphic data for rendering on a displayUS5673377Sep 2, 1994Sep 30, 1997Ray Dream, Inc.Method and system for displaying a representation of a three-dimensional object with surface features that conform to the surface of the three-dimensional objectUS5721928May 16, 1996Feb 24, 1998Hitachi, Ltd.Method for partitioning computationUS5764963 *Sep 20, 1995Jun 9, 1998Rambus, Inc.Method and apparatus for performing maskable multiple color block writesUS5793374 *Jul 28, 1995Aug 11, 1998Microsoft CorporationSpecialized shaders for shading objects in computer generated imagesUS5793386 *Jun 28, 1996Aug 11, 1998S3 IncorporatedRegister set reordering for a graphics processor based upon the type of primitive to be renderedUS5798762 *May 10, 1995Aug 25, 1998Cagent Technologies, Inc.Controlling a real-time rendering engine using a list-based control mechanismUS5801717Apr 25, 1996Sep 1, 1998Microsoft CorporationMethod and system in display device interface for managing surface memoryUS5812136Oct 30, 1996Sep 22, 1998Microsoft CorporationSystem and method for fast rendering of a three dimensional graphical objectUS5815703 *Jun 28, 1996Sep 29, 1998Microsoft CorporationComputer-based uniform data interface (UDI) method and system using an application programming interface (API)US5822570Oct 30, 1996Oct 13, 1998Microsoft CorporationSystem and method for parsing and executing a single instruction stream using a plurality of tightly coupled parsing and execution unitsUS5844569Apr 25, 1996Dec 1, 1998Microsoft CorporationDisplay device interface including support for generalized flipping of surfacesUS5850232Apr 25, 1996Dec 15, 1998Microsoft CorporationMethod and system for flipping images in a window using overlaysUS5861893May 27, 1997Jan 19, 1999Intel CorporationSystem and method for graphics data concurrency and coherencyUS5864703Oct 9, 1997Jan 26, 1999Mips Technologies, Inc.Method for providing extended precision in SIMD vector arithmetic operationsUS5880736Jun 20, 1997Mar 9, 1999Silicon Graphics, Inc.Method system and computer program product for shadingUS5887172Jan 10, 1996Mar 23, 1999Sun Microsystems, Inc.Remote procedure call system and method for RPC mechanism independent client and server interfaces interoperable with any of a plurality of remote procedure call backendsUS5949424Feb 28, 1997Sep 7, 1999Silicon Graphics, Inc.Method, system, and computer program product for bump mapping in tangent spaceUS5964843Apr 25, 1996Oct 12, 1999Microsoft CorporationSystem for enhancing device driversUS5974410 *Jun 28, 1996Oct 26, 1999Microsoft CorporationMethod and system for filtering in a uniform data interfaceUS6008816Apr 25, 1996Dec 28, 1999Microsoft CorporationMethod and system for managing color specification using attachable palettes and palettes that refer to other palettesUS6044408Apr 25, 1996Mar 28, 2000Microsoft CorporationMultimedia device interface for retrieving and exploiting software and hardware capabilitiesUS6078942Apr 25, 1996Jun 20, 2000Microsoft CorporationResource management for multimedia devices in a computerUS6198488 *Dec 6, 1999Mar 6, 2001NvidiaTransform, lighting and rasterization system embodied on a single semiconductor platformUS6208361Jun 15, 1998Mar 27, 2001Silicon Graphics, Inc.Method and system for efficient context switching in a computer graphics systemUS6213652Oct 17, 1995Apr 10, 2001Fuji Xerox Co., Ltd.Job scheduling system for print processingUS6215495May 30, 1997Apr 10, 2001Silicon Graphics, Inc.Platform independent application program interface for interactive 3D scene managementUS6249294Aug 21, 1998Jun 19, 2001Hewlett-Packard Company3D graphics in a single logical sreen display using multiple computer systemsUS6252600Oct 2, 1998Jun 26, 2001International Business Machines CorporationComputer graphics system with dual FIFO interfaceUS6289396Nov 21, 1995Sep 11, 2001Diamond Multimedia Systems, Inc.Dynamic programmable mode switching device driver architectureUS6359619 *Jun 18, 1999Mar 19, 2002Mitsubishi Electric Research Laboratories, IncMethod and apparatus for multi-phase renderingUS6359630Jun 14, 1999Mar 19, 2002Sun Microsystems, Inc.Graphics system using clip bits to decide acceptance, rejection, clippingUS6362825 *Jan 19, 1999Mar 26, 2002Hewlett-Packard CompanyReal-time combination of adjacent identical primitive data sets in a graphics call sequenceUS6414688Jan 29, 1999Jul 2, 2002Micron Technology, Inc.Programmable graphics memory methodUS6452595Nov 27, 2000Sep 17, 2002Nvidia CorporationIntegrated graphics processing unit with antialiasingUS6489963Jun 22, 2001Dec 3, 2002Nintendo Co., Ltd.Application program interface for a graphics systemUS6496183Jun 30, 1998Dec 17, 2002Koninklijke Philips Electronics N.V.Filter for transforming 3D data in a hardware accelerated rendering architectureUS6515671Dec 6, 1999Feb 4, 2003Nvidia CorporationMethod, apparatus and article of manufacture for a vertex attribute buffer in a graphics processorUS6525725Mar 15, 2000Feb 25, 2003Sun Microsystems, Inc.Morphing decompression in a graphics systemUS6525737 *Aug 20, 1999Feb 25, 2003Apple Computer, Inc.Graphics processor with pipeline state storage and retrievalUS6559842 *Oct 7, 1999May 6, 2003Sun Microsystems, Inc.Compressing and decompressing graphics data using gosub-type instructions and direct and indirect attribute settingsUS6578197 *Apr 8, 1998Jun 10, 2003Silicon Graphics, Inc.System and method for high-speed execution of graphics application programs including shading language instructionsUS6650327 *Jun 16, 1998Nov 18, 2003Silicon Graphics, Inc.Display system having floating point rasterization and floating point framebufferingUS6717576 *Aug 20, 1999Apr 6, 2004Apple Computer, Inc.Deferred shading graphics pipeline processor having advanced featuresUS6765571Jan 11, 2001Jul 20, 2004Sun Microsystems, Inc.Using a master controller to manage threads and resources for scene-based renderingUS6819325Mar 6, 2001Nov 16, 2004Microsoft CorporationAPI communications for vertex and pixel shadersUS6874150Mar 1, 2001Mar 29, 2005Microsoft CorporationMethod and system for maintaining connections between surfaces and objects in a graphics display systemUS7159041Mar 1, 2001Jan 2, 2007Microsoft CorporationMethod and system for defining and controlling algorithmic elements in a graphics display systemUS7761884Oct 7, 2004Jul 20, 2010Microsoft CorporationMethod and system for maintaining connections between surfaces and objects in a graphics display systemUS7782316Oct 22, 2004Aug 24, 2010Microsoft CorporationMethod and system for defining and controlling algorithmic elements in a graphics display systemUS20040201590Mar 8, 2004Oct 14, 2004Wu Tsailai Terry3-D graphics chip with embedded DRAM buffersUS20050052456Oct 22, 2004Mar 10, 2005Microsoft CorporationMethod and system for defining and controlling algorithmic elements in a graphics display systemUS20050086669Oct 22, 2004Apr 21, 2005Microsoft CorporationMethod and system for defining and controlling algorithmic elements in a graphics display systemUS20100039430Feb 18, 2010Microsoft CorporationMethod and system for defining and controlling algorithmic elements in a graphics display system* Cited by examinerNon-Patent CitationsReference1Abrash, M., "Inside Xbox Graphics," Dr. Dobb's J., Aug. 2000, 21-22, 24-26.2Antinori, F. et al., "Experience with a 30 cm2 silicon pixel plane in CERN experiment WA97," Nucl. Instr. Meth. Phys. Res. A., 1995, 360, 91-97.3Bachstein, W. et al., "Single-Chip erledigt Multimedia," Elektronik, 1996, 17, 58-62.4Bajaj, C. et al., "Making 3D Textures Practical," IEEE: Proceedings-Seventh Pacific Conference on Computer Graphics and Applications, Oct. 5-7, 1999, 259-269.5Bakalash, R. et al., "A Barrel Shift Microsystem for Parallel Processing," in MICRO 23 Microprogramming and Microarchitecture, IEEE: Proceedings of the 23rd Annual Workshop and Symposium, Orlando Florida, Nov. 27-29, 1990, 223-229.6Bankston, J. et al., "Pipeline Processing with Modula-2," J. Pascal, Ada, & Modula-2, 1986, 5(5), 46-51.7Biernat, M.J. et al., "Approximate Shadow Generation," IEEE Montech Conferences, Nov. 9-12, 1987, 97-101.8Brechb�hler, Ch. et al., "Parametrization of Closed Surfaces for 3-D Shape Description," Comp. Vision Image Understanding, Mar. 1995, 61(2), 154-170.9Chen, Li, "Generalization Discrete Object Tracking Algorithms and Implementation," in Vision Geometry VI, Proceedings of SPIE, Melter, R.A. et al. (eds.), Jul. 28-29, 1997, 3168, 184-195.10Chiarulli, D.M. et al., "Draft: A Dynamically Reconfigurable Processor for Integer Arithmetic," IEEE: Proceedings-7th Symposium on Computer Arithmetic, University of Illinois, Hwang, K. (ed.), Jun. 4-6, 1985, 309-317.11 *Chin et al., The OpenGL Graphics System Utility Library (Version 1.3), Nov. 1998.12Conference Paper, "A Shading and Compositing Processor based on Crossbar Switches and SRAM Memory," 1999, 4 pages.13Corrie, B. et al., "Data Shaders," Proceedings Visulaization '93, San Jose, CA, Oct. 25-29, 1993, 275-282.14Cox, M. et al., "Multi-Level Texture Caching for 3D Graphics Hardware," IEEE: Proceedings-The 25th Annual International Symposium on Computer Architecture, Barcelona, Spain, Jun. 27-Jul. 1, 1998, 86-97.15Dietz, P.H. et al., "Simple Networks for Pixel Plane Median Filtering," IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Dec. 1993, 40(12), 799-801.16Glazzard, N. et al., "Implementing a Shading Language," Computer Graphics 90, London, UK, Nov. 6-8, 1990, 111-121.17Gomes, J. et al., "Graphical Objects," The Visual Computer, 1996, 12, 269-282.18Gordon, R.L., Ph.D. et al., Window Management, Graphics, and Operating Systems, Operating Systems Review, Jul. 1987, 21(3), 5-8.19Goris, A. et al., "A Configurable Pixel Cache for Fast Image Generation," IEEE Computer Graphics and Applications, Mar. 1987, 24-32.20Grimes, J. et al., "A New Processor with 3-D Graphics Capabilities," NCGA '89 Conference Proceedings: 10th Annual Conference and Exposition Dedicated to Computer Graphics, Philadelphia, Pennsylvania, Apr. 17-20, 1989, vol. 1, 275-284.21Grimes, J. et al., "The Intel i860 64-Bit Processor: A General-Purpose CPU with 3D Graphics Capabilities," IEEE Computer Graphics and Applications, Jul. 1989, 85-94.22Haig, T., "How to program in machine language," Electronics, Aug. 1982, 94-96, 98, 100-103.23Hanrahan, P. et al., "A Language for Shading and Lighting Calculations," Computer Graphics, 1990, 24(4), 289-298.24Harrison, J.P. et al., "The Role of Microcomputers in Interactive Graphical Planning," Engin. Software for Microcomputers, Proc., Apr. 1984, 631-641.25Ho, C-H et al., "Efficient Point-Based Rendering Techniques for Haptic Display of Virtual Objects," Presence, Oct. 1999, 8(5), 477-491.26Hoffman, C. et al., "Automatic Surface Generation in Computer Aided Design," supported by the National Science Foundation, Department of Computer Science, Cornell University, Ithaca, New York, Jan. 1985, 1-22.27Hummel, R., "Render Benders: 26 Graphics Cards for Fast 3-D," Byte, Mar. 1998, 112-119.28James, M., "3-D graphics to become accessible to all," Scientific Computing World, Feb. 1997, 41 and 43.29Johnson, S.P., "Direct3D Revealed: Microsoft's 3-D API provides device-independent access to acceleration hardware. Here's how it works," Core Technologies, http://byte.com/art/9612/sec5/art4.htm, Dec. 1996, 5 pages.30Jones, M. et al., "High-Performance Graphics Via Silicon Compilation," VLSI Systems Design, Mar. 1987, 32, 33, 36 and 38.31Kaya, E.M., "New Trends in Graphic Display System Architecture," in Frontiers in Computer Graphics, Proceedings of Computer Graphics, Tokyo '84, Kunii, T.L. (ed.), 1985, 310-320.32Kumar, S. et al., "Efficient rendering of trimmed NURBS surfaces," Computer-Aided Disign, Jul. 1995, 27(7), 509-521.33Labsik, U. et al., "Progressive transmission of subdivision surfaces," Computational Geometry, 2000, 15, 25-39.34Lachaud, J-O. et al., "Continuous Analogs of Digital Boundaries: A Topological Approach to Iso-Surfaces," Graphical Models, 2000, 62, 129-164.35Lapidous, E. et al., "Optimal Depth Buffer for Low-Cost Graphics Hardware," Trident Microsystems, Inc., 1999, 67-73.36Lastra, A. et al., "Real-Time Programmable Shading," Proceedings: 1995 Symposium on Interative 3D Graphics, Monterey, California, Apr. 9-12, 1995, 59-66.37Lee, J-A. et al., "SPARP: a single pass antialiased rasterization processor," Comput. & Graphics, 2000, 24, 233-243.38Leech, J., "OpenGL Extensions and Restrictions for PixelFlow," The University of North Caroline at Chapel Hill, 1995, 1-39.39Lichten, L., "A Solution to Surface Connectivity Problems in Computer-Aided Design," Computer Graphics, Mar. 1981, 14(4), 168-199.40Mabin, F.H. et al., "A Parallel Algorithm to Reconstruct Bounding Surfaces in 3D Images," J. Supercomputing, 1998, 12, 137-155.41McManus, D. et al., "Optimal Static 2-Dimensional Screen Subdivision for Parallel Rasterization Architectures," Comput. & Graphics, 1997, 21(2), 159-169.42Meyers, D. et al., "Surfaces from Contours," ACM Transactions on Graphics, Jul. 1992, 11(3), 228-258.43Micikevicius, P. et al., "Teaching a Computer Graphics Class Using DirectX," J. Comput. in Small Colleges; Proceedings of the Ninth Annual CCSC South Central Conference, (Jackson, Mississippi, Apr. 17-18), Meinke, J.G. (ed.), Mar. 1998, 13(4), 61-66.44Molnar, S. et al., "PixelFlow: High-Speed Rendering Using Image Composition," Computer Graphics, 26(2), 231-240.45Molnar, S. et al., "PixelFlow: The Continuing Saga," 1995 Parallel Rendering Symposium, Atlanta, GA, Oct. 30-31, 1995, p. 79.46Molnar, S., "The PixelFlow Texture and Image Subsystem," Computers & Graphics, 1996, 20(4), 491-502.47Nishimura, H. et al., "A Multicomputer System Links: Its Architecture and Graphics Applications," IECON '84: International Conference on Industrial Electronics, Control and Instrumentation, Tokyo, Japan, Oct. 22-26, 1984, 1, 270-274.48NVIDIA Corporation, "System Platform Porcessor (SPP) / Integrated Graphics Processor (IGP): Redefining System and Graphics Performance," nForce SPP/IGP Product Overview, Jan. 2002, Version 1, 2 pages.49NVIDIA Corporation, "Technical Brief: NVIDIA nfiniteFX II Engine From Research to Real Time," Jan. 16, 2002, 7 pages.50NVIDIA Corporation, "Technical Brief: NVIDIA nForce Platform Processing Architecture," 2001, 1-9.51Ohbuchi, R. et al., "Embedding Data in 3D Models," in Interactive Distributed Multimedia Systems and Telecommunication Services, 4th International Workshop, IDMS '97, Darmstadt, Germany, Sep. 10-12, 1997, 1-10.52Ohhashi, M. et al., "A 32b 3-D Graphic Processor Chip with 10M Pixels/s Gouraud Shading," 1988 IEEE International Solid-State Circuits Conference Digest of Technical Papers, Feb. 1988, 168-169 and 352.53Olano, M. et al., "A Shading Language on Graphics Hardware: The PixelFlow Shading System," Proceedings of SIGGRAPH 98, Orlando, Florida, Jul. 19-24, 1998, 1-10.54Olano, M. et al., "Procedural Primitives in a High Performance, Hardware Accelerated, Z-Buffer Renderer," UNC Computer Science Technical Report 97-040, Department of Computer Science, University of North Carolina, Chapel Hill, North Carolina, 1997, 1-10.55Olano, M., "A Programmable Pipeline for Graphics Hardware," PhD Dissertation, Department of Computer Science, University of North Carolina at Chapel Hill, 1998, 1-168.56Pountain, D., "PixelFlow-Scalable Image Processing-It Divides and Conquers Rendering by Drawing the Objects First, Then Combining Them," Byte, 1995, 20(11), 6 pages.57Pountain, D., "PixelFlow—Scalable Image Processing—It Divides and Conquers Rendering by Drawing the Objects First, Then Combining Them," Byte, 1995, 20(11), 6 pages.58Proudfoot, K. et al., "A Real-Time Procedural Shading System for Programmable Graphics Hardware," Computer Graphics Proceedings, SIGGRAPH, 2001, 159-170.59Rowlan, J.S. et al., "A distributed, parallel, interactive volume rendering package," IEEE: Proceedings-Visualization '94, Washington, D.C., Oct. 17-21, 1994, 21-30.60Schneider, B-O. et al., "An adaptive framework for 3D graphics over networks," Comput. & Graphics, 1999, 23, 867-874.61Schneider, B-O. et al., "M-Buffer: A Flexible MISD Architecture for Advanced Graphics," Comput. & Graphics, 1995, 19(2), 239-246.62Segal et al., "The OpenGL Graphics Systems: A Specification (Version 1.2.1)", Silicon Graphics, Apr. 1, 1999, 1-278.63Senthinathan, R. et al., "A 650-MHz, IA-32 Microprocessor with Enhanced Data Streaming for Graphics and Video," IEEE J. Solid-State Circuits, Nov. 1999, 34(11), 1454-1465.64Shinya, M., "Improvements on the Pixel-tracing Filter: Reflection/Refraction, Shadows, and Jittering," Proceedings: Graphics Interface '95, May 7-19, 1995, 92-102.65Shirali, N.S. et al., "A Parallel Architecture Graphics Processor," IEEE Southeastcon: Conference Proceedings, Knoxville, Tennessee, Apr. 11-13, 1998, 108-111.66Slusallek, P. et al., "Implementing RenderMan-Practice, Problems and Enhancements," Eurographics '94, 1994, 13(3), 443-454.67Smith, D.R. et al., "A Circuit-Switched Shared-Memory Multiprocessor," International J. Mini Microcomputers, 1995, 17(3), 108-118.68Sussman, H. et al., "Graphics Memory Architectures," Wescon/86 Conference Record, 1986, 1-6.69Swanson, R.W. et al., "A Fast Shaded-Polygon Rendered," Computer Graphics, Aug. 1986, 20(4), 95-101.70Teonnies, K.D. et al., "Volume rendering for interactive 3-d segmentation," in Image Display, Proceeding of SPIE, Newport Beach, California, Feb. 23-25, 1997, 3031, 602-609.71Thompson, T., "An inside look at the most popular 3-D environments: OpenGL, QuickDraw 3D, and Direct3D," Must-See 3-D Engines, Jun. 1996, http://byte.com/art/9606/sec11/art4.htm, 7 pages.72Thompson, T., "Direct3D's Engine," Must-See 3-D Engines, Jun. 1996, http://byte.com/art/9606/sec11/art7.htm, 1 page.73Thompson, T., "Open GL's Command Structure," Must-See 3-D Engines, Jun. 1996, http://byte.com/art/9606/sec11/art5.htm, 1 page.74Thompson, T., "QuickDraw 3D's Command Structure," Must-See 3-D Engines, Jun. 1996, http://byte.com/art/9606/sec11/art6.htm, 1 page.75Thompson, T., "Three Ways to Tackle Multithreading," Must-See 3-D Engines, Jun. 1996, http://byte.com/art/9606/sec11/art8.htm, 1 page.76U.S. Appl. No. 09/796,577: Final Rejection, Jun. 23, 2005, 10 pages.77U.S. Appl. No. 09/796,577: Final Rejection, Mar. 27, 2006, 13 pages.78U.S. Appl. No. 09/796,577: Non-Final Rejection, Aug. 5, 2004, 17 pages.79U.S. Appl. No. 09/796,577: Non-Final Rejection, Dec. 23, 2005, 10 pages.80U.S. Appl. No. 09/796,577: Non-Final Rejection, Feb. 24, 2005, 10 pages.81U.S. Appl. No. 09/796,577: Notice of Allowance, Oct. 5, 2006, 9 pages.82U.S. Appl. No. 09/796,579: Final Rejection, Aug. 24, 2004, 7 pages.83U.S. Appl. No. 09/796,579: Non-Final Rejection, Feb. 11, 2004, 9 pages.84U.S. Appl. No. 09/796,579: Non-Final Rejection, Oct. 2, 2003, 16 pages.85U.S. Appl. No. 09/796,579: Notice of Allowance, Nov. 12, 2004, 4 pages.86U.S. Appl. No. 10/961,435: Non-Final Rejection, Dec. 31, 2008, 18 pages.87U.S. Appl. No. 10/961,435: Non-Final Rejection, Sep. 25, 2009, 12 pages.88U.S. Appl. No. 10/961,435: Notice of Allowance, Mar. 22, 2010, 19 pages.89U.S. Appl. No. 10/971,248: Final Rejection dated Sep. 22, 2009.90U.S. Appl. No. 10/971,248: Non-Final Rejection dated Feb. 18, 2009.91U.S. Appl. No. 10/971,248: Notice of Allowance dated Apr. 30, 2010.92U.S. Appl. No. 10/971,450: Final Rejection dated Sep. 22, 2009.93U.S. Appl. No. 10/971,450: Non-Final Rejection dated Feb. 18, 2009.94U.S. Appl. No. 10/971,450: Notice of Allowance dated May 6, 2010.95U.S. Appl. No. 10/971,484: Final Rejection dated Sep. 15, 2009.96U.S. Appl. No. 10/971,484: Non-Final Rejection dated Feb. 20, 2009.97U.S. Appl. No. 10/971,484: Notice of Allowance dated Apr. 29, 2010.98Wilson, J.L. et al., "Designing a Graphics Application Interface," Proceedings Graphics Interface '85, Montreal, Quebec, May 27-31, 1985, 373-380.99Yoshida, M. et al., "Trend of the computer graphics hardware," Information Processing Soc. of Japan, Oct. 1988, 29(10), 1109-1115.100Zheng, Y. et al., "Three-dimensional unstructured mesh generation: Part 2. Surface meshes," Comput. Methods Appl. Mech. Engrg., 1996, 134, 269-284.* Cited by examinerReferenced byCiting PatentFiling datePublication dateApplicantTitleUS8432407Apr 30, 2013Microsoft CorporationMethod and system for managing graphics objects in a graphics display systemUS20100020071 *Jul 30, 2009Jan 28, 2010Microsoft CorporationMethod and system for managing graphics objects in a graphics display system* Cited by examinerClassifications U.S. Classification345/418, 345/419International ClassificationG06F17/00, G06T15/00Cooperative ClassificationG06T15/005European ClassificationG06T15/00ALegal EventsDateCodeEventDescriptionJul 25, 2014FPAYFee paymentYear of fee payment: 4Dec 9, 2014ASAssignmentOwner name: MICROSOFT TECHNOLOGY LICENSING, LLC, WASHINGTONFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MICROSOFT CORPORATION;REEL/FRAME:034541/0477Effective date: 20141014RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services