Source: http://www.google.com/patents/US6346716?dq=5008718
Timestamp: 2017-04-25 01:45:47
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Matched Legal Cases: ['application No. 08', 'application No. 08', 'application No. 06', 'application No. 5', 'application No. 5', 'application No. 5', 'application No. 5', 'application No. 08', 'application No. 07', 'application No. 5', 'application No. 5', 'application No. 5', 'application No. 5', 'application No. 5', 'art. 1', 'application No. 5', 'application No. 4', 'application No. 4', 'application No. 5']

Patent US6346716 - Semiconductor material having particular oxygen concentration and ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsA photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure...http://www.google.com/patents/US6346716?utm_source=gb-gplus-sharePatent US6346716 - Semiconductor material having particular oxygen concentration and semiconductor device comprising the sameAdvanced Patent SearchTry the new Google Patents, with machine-classified Google Scholar results, and Japanese and South Korean patents.Publication numberUS6346716 B1Publication typeGrantApplication numberUS 08/994,345Publication dateFeb 12, 2002Filing dateDec 19, 1997Priority dateDec 23, 1982Fee statusLapsedPublication number08994345, 994345, US 6346716 B1, US 6346716B1, US-B1-6346716, US6346716 B1, US6346716B1InventorsShunpei YamazakiOriginal AssigneeSemiconductor Energy Laboratory Co., Ltd.Export CitationBiBTeX, EndNote, RefManPatent Citations (50), Non-Patent Citations (288), Referenced by (9), Classifications (37), Legal Events (3) External Links: USPTO, USPTO Assignment, EspacenetSemiconductor material having particular oxygen concentration and semiconductor device comprising the same
What is claimed is: 1. A non-single-crystalline semiconductor material comprising silicon of an intrinsic conductivity type, wherein said semiconductor material contains at least one of a halogen and hydrogen as a dangling bond neutralizer and wherein said material contains oxygen in a concentration less than 5×1019 atoms/cm3 and carbon in a concentration less than 4×1018 atoms/cm3.
a substrate; and an amorphous semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; wherein said semiconductor layer contains oxygen in a concentration less than 5×1019 atoms/cm3 and carbon in a concentration less than 4×1018 atoms/cm3. 4. In a semiconductor device formed on a substrate, which utilizes a non-single-crystalline semiconductor material comprising silicon of an intrinsic conductivity type, wherein said semiconductor material contains at least one of a halogen and hydrogen as a dangling bond neutralizer and wherein said semiconductor material contains oxygen in a low concentration less than 5×1019 atoms/cm3 and carbon in a low concentration less than 4×1018 atoms/cm3.
a substrate; an amorphous semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; and a second semiconductor layer comprising silicon in contact with said amorphous semiconductor layer, said second semiconductor layer containing an N type impurity to form an NI junction in contact with said amorphous semiconductor layer, wherein said amorphous semiconductor layer contains oxygen in a low concentration less than 5×1019 atoms/cm3, and wherein said N type impurity has a concentration of 1×1019 to 6×1020 atoms/cm3. 6. An amorphous semiconductor material comprising silicon, wherein said semiconductor material contains at least one of a halogen and hydrogen as a dangling bond neutralizer and wherein said material contains oxygen in a concentration less than 5×1019 atoms/cm3 and carbon in a concentration not higher than 4×1018 atoms/cm3.
a substrate; an amorphous semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; and a second semiconductor layer comprising silicon in contact with said amorphous semiconductor layer, said second semiconductor layer containing phosphorus to form an NI junction in contact with said amorphous semiconductor layer, wherein said amorphous semiconductor layer contains oxygen in a concentration less than 5×1019 atoms/cm3 and boron in a concentration not higher than 2×1017 atoms/cm3, and wherein said phosphorus has a concentration of 1×1019 to 6×1020 atoms/cm3. 8. In a semiconductor device formed on a substrate, which utilizes an amorphous semiconductor material comprising silicon, wherein said semiconductor material contains at least one of a halogen and hydrogen as a dangling bond neutralizer and wherein said semiconductor material contains oxygen in a low concentration less than 5×1019 atoms/cm3 and carbon in a concentration not higher than 4×1018 atoms/cm3.
a substrate; a non-single crystalline semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; a second semiconductor layer comprising silicon in contact with said non-single crystalline semiconductor layer, said second semiconductor layer containing an N type impurity to form an NI junction in contact with said non-single crystalline semiconductor layer, wherein said non-single crystalline semiconductor layer contains oxygen in a low concentration less than 5×1019 atoms/cm3, and wherein said N type impurity has a concentration of 1×1019 to 6×1020 atoms/cm3. 10. The semiconductor material of claim 1 wherein said material is amorphous.
a substrate; a non-single crystalline semiconductor layer comprising silicon formed over said substrate, said non-single crystalline semiconductor layer containing hydrogen or a halogen; and a second semiconductor layer comprising silicon, said second semiconductor layer containing phosphorus to form an NI junction in contact with said non-single crystalline semiconductor layer, wherein said non-single crystalline semiconductor layer contains oxygen in a low concentration less than 5×1019 atoms/cm. 18. The semiconductor device of claim 17 wherein said non-single crystalline semiconductor layer contains boron in a concentration not higher than 2×1017 atoms/cm3.
a substrate; a non-single crystalline semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; a second semiconductor layer comprising silicon in contact with said non-single crystalline semiconductor layer, said second semiconductor layer containing an N type impurity to form an NI junction in contact with said non-single crystalline semiconductor layer, wherein said non-single crystalline semiconductor layer contains oxygen in a concentration not higher than 5×1019 atoms/cm3 and carbon in a concentration not higher than 4×1018 atoms/cm3. 20. The semiconductor device of claim 19 wherein boron is contained in said non-single crystalline semiconductor layer in a concentration not higher than 2×1017 atoms/cm3.
a substrate; a non-single crystalline semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; a second semiconductor layer comprising silicon in contact with said non-single crystalline semiconductor layer, said second semiconductor layer containing phosphorus to form an NI junction in contact with said non-single crystalline semiconductor layer, wherein said non-single crystalline semiconductor layer contains oxygen in a concentration not higher than 5×1019 atoms/cm3 and carbon in a concentration not higher than 4×1018 atoms/cm3. 22. A semiconductor device comprising:
a substrate; an amorphous semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; a second semiconductor layer comprising silicon in contact with said amorphous semiconductor layer, said second semiconductor layer containing N type impurity to form an NI junction in contact with said amorphous semiconductor layer, wherein said amorphous semiconductor layer contains oxygen in a concentration not higher than 5×1019 atoms/cm3 and carbon in a concentration not higher than 4×1018 atoms/cm3. 23. A semiconductor device comprising:
a substrate; an amorphous semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; a second semiconductor layer comprising silicon in contact with said amorphous semiconductor layer, said second semiconductor layer containing phosphorus to form an NI junction in contact with said amorphous semiconductor layer, wherein said amorphous semiconductor layer contains oxygen in a concentration not higher than 5×1019 atoms/cm3 and carbon in a concentration not higher than 4×1018 atoms/cm3. 24. A semiconductor device comprising:
a substrate; a non-single crystalline semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; a second semiconductor layer comprising silicon in contact with said non-single crystalline semiconductor layer, said second semiconductor layer containing a P type impurity to form a PI junction in contact with said non-single crystalline semiconductor layer, wherein said non-single crystalline semiconductor layer contains oxygen in a concentration not higher than 5×1019 atoms/cm3 and carbon in a concentration not higher than 4×1018 atoms/cm3. 25. A semiconductor device comprising:
a substrate; a non-single crystalline semiconductor layer comprising silicon containing hydrogen or a halogen formed over said substrate; a second semiconductor layer comprising silicon in contact with said non-single crystalline semiconductor layer, said second semiconductor layer containing boron to form a PI junction in contact with said non-single crystalline semiconductor layer, wherein said non-single crystalline semiconductor layer contains oxygen in a concentration not higher than 5×1019 atoms/cm3 and carbon in a concentration not higher than 4×1018 atoms/cm3. 26. The semiconductor device of claim 4 wherein said non-single crystalline semiconductor material contains boron in a concentration not higher than 2×1017 atoms/cm3.
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Hirose, "Amorphous Silicon", Nikkei Electronics—Special Issue, pp. 163-179 (Dec. 20, 1982).288Zeolite documentation from Union Carbide (SEC014384-SEC014387).Referenced byCiting PatentFiling datePublication dateApplicantTitleUS7503975Jun 25, 2001Mar 17, 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and fabrication method thereforUS8076175Feb 25, 2008Dec 13, 2011Suniva, Inc.Method for making solar cell having crystalline silicon P-N homojunction and amorphous silicon heterojunctions for surface passivationUS8192522Mar 26, 2009Jun 5, 2012Et-Energy Corp.Chemical process for generating energyUS8945976Nov 30, 2011Feb 3, 2015Suniva, Inc.Method for making solar cell having crystalline silicon P—N homojunction and amorphous silicon heterojunctions for surface passivationUS20020043660 *Jun 25, 2001Apr 18, 2002Shunpei YamazakiSemiconductor device and fabrication method thereforUS20090211623 *Feb 25, 2008Aug 27, 2009Suniva, Inc.Solar module with solar cell having crystalline silicon p-n homojunction and amorphous silicon heterojunctions for surface passivationUS20090211627 *Feb 25, 2008Aug 27, 2009Suniva, Inc.Solar cell having crystalline silicon p-n homojunction and amorphous silicon heterojunctions for surface passivationUS20090215218 *Feb 25, 2008Aug 27, 2009Suniva, Inc.Method for making solar cell having crystalline silicon p-n homojunction and amorphous silicon heterojunctions for surface passivationUS20090241730 *Mar 26, 2009Oct 1, 2009Et-Energy Corp.Chemical process for generating energy* Cited by examinerClassifications U.S. Classification257/65, 257/68, 257/462, 257/62, 257/70, 257/69, 257/E31.012, 257/55, 257/E31.042, 257/58, 257/66, 257/E31.014, 257/53, 257/57, 257/54, 257/439, 257/67, 257/56, 257/293, 257/290, 257/52International ClassificationH01L31/075, H01L31/0288, H01L31/028, H01L31/0392Cooperative ClassificationY02E10/547, Y02E10/548, H01L31/028, H01L31/075, H01L31/0288, H01L31/077, H01L31/03921European ClassificationH01L31/077, H01L31/028, H01L31/0392B, H01L31/0288, H01L31/075Legal EventsDateCodeEventDescriptionAug 31, 2005REMIMaintenance fee reminder mailedFeb 13, 2006LAPSLapse for failure to pay maintenance feesApr 11, 2006FPExpired due to failure to pay maintenance feeEffective date: 20060212RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services