Source: http://www.google.com/patents/US20070059875?dq=patent:5881444
Timestamp: 2017-11-22 09:16:01
Document Index: 546614387

Matched Legal Cases: ['art 34', 'art 34', 'art 34', 'art 34', 'art 34', 'art 43', 'art 43']

Patent US20070059875 - Semiconductor device and method of manufacturing the same, and semiconductor ... - Google Patents
A method of manufacturing a semiconductor device including a substrate; an insulating film formed thereon; a first semiconductor layer where strain is induced in the directions parallel to the surface of the substrate, the first semiconductor layer being on the insulating film; a source region and a...http://www.google.com/patents/US20070059875?utm_source=gb-gplus-sharePatent US20070059875 - Semiconductor device and method of manufacturing the same, and semiconductor substrate and method of manufacturing the same
Publication number US20070059875 A1
Application number US 11/585,804
Also published as CN1954418A, CN100573834C, US7910415, WO2005112097A1, WO2005112129A1
Publication number 11585804, 585804, US 2007/0059875 A1, US 2007/059875 A1, US 20070059875 A1, US 20070059875A1, US 2007059875 A1, US 2007059875A1, US-A1-20070059875, US-A1-2007059875, US2007/0059875A1, US2007/059875A1, US20070059875 A1, US20070059875A1, US2007059875 A1, US2007059875A1
Inventors Yasuyoshi Mishima
US 20070059875 A1
FIG. 1 is a cross-sectional view of a semiconductor substrate 10 according to the first embodiment of the present invention. Referring to FIG. 1, the semiconductor substrate 10 includes a single-crystal silicon substrate 11, a silicon oxide film 12 stacked thereon, and a strained Si film 13 b stacked thereon. Tensile strain is induced in the directions parallel to the surface of the single-crystal silicon substrate 11 (hereinafter referred to as “in-plane direction”) in the strained Si film 13 b. The strained Si film 13 b has a diamond crystal structure. The surface of the strained Si film 13 b is a (001) plane, and the direction of film thickness is a [001] direction. In the strained Si film 13 b, tensile strain is induced in the in-plane direction and compressive strain is induced in the thickness direction. In the strained Si film 13 b, since tensile strain is induced in the in-plane direction, the electron mobility in the in-plane direction is improved. Accordingly, by forming an n-type MOS transistor having a channel in the in-plane direction of the strained Si film 13 b using this semiconductor substrate 10, it is possible to increase the operating speed of the transistor. Further, as described in detail below in Example 1, the Ge content of the strained Si film 13 b is extremely lower than the Ge content of the strained Si film in which tensile strain is induced of the conventional SOI substrate. With respect to the Ge content of the strained Si film 13 b, according to SIMS (Secondary Ion Mass Spectrometry) measurement in the depth direction (film thickness direction) of the strained Si film 13 b, it is preferable that the maximum value of the moving averages of the Ge content in the depth direction be less than or equal to 3×1018 atoms/cm−3. This is smaller than the maximum value of the moving averages of the Ge content of a strained Si film formed by the conventional sticking method. By reducing the Ge content of the strained Si film 13 b, an increase in the interface state is suppressed in the case of using the strained Si film 13 b as a channel, so that it is possible to prevent a decrease in carrier mobility. Further, if the maximum value of the moving averages of the Ge content in the depth direction exceeds 3×1018 atoms/cm−3, the Ge atoms of the strained Si film 13 b are oxidized and vaporized so that the crystallinity of the strained Si film 13 b is likely to be degraded when the strained Si film 13 b is exposed to an oxygen atmosphere. Degradation of the crystallinity of the strained Si film 13 b reduces electron mobility. Further, the lower the Ge content of the strained Si film 13 b, the better in suppressing formation of the interface state and avoiding degradation of crystallinity. The Ge content is higher than or equal to 2-4×1017 atoms/cm−3 in terms of the detection limit of SIMS. An explanation of the moving average is given in an example below.
Further, Ge atoms enter only the extreme surface layer of the strained Si film 13 b according to a manufacturing method described next. More specifically, as shown below in FIG. 6, Ge atoms enter the strained Si film 13 b only to the depth of 3 nm or less from the surface according to SIMS measurement. The depth of entrance of Ge atoms is from the surface of the strained Si film 13 b to where the Ge content is less than or equal to 2×1018 atoms/cm−3. As described below in Example 1, the depth of entrance of the Ge atoms of the strained Si film 13 b is extremely smaller than that of an SOI substrate having a conventional strained Si film. This reduces the entire amount of Ge atoms contained in the strained Si film 13 b, so that it is possible to suppress formation of the interface state and avoid degradation of crystallinity.
Further, a channel and a shallow junction region are formed only in a region close to the surface of the strained Si film 13 b also in the case of applying the technique of reducing the vertical dimension of a semiconductor device in order to realize a semiconductor device that operates at high speed. In such a case, Ge atoms are contained only in the extremely shallow region at the surface of the strained Si film 13 b of the semiconductor substrate 10. Accordingly, compared with an SOI substrate having a conventional strained Si film, it is possible to reduce the degree of adverse effects exerted by Ge atoms, such as formation of the interface state and degradation of crystallinity, in the semiconductor substrate 10. Further, since diffusion of impurity ions due to ion implantation is also suppressed, it is easy to control the profile of the impurity ions.
First, in the process of FIG. 2A, a natural oxide film (not graphically illustrated) on the surface of the single-crystal silicon substrate 11 having a (001) plane is removed using hydrofluoric acid. Thereafter, a Si film 13 a (for example, 100 nm in thickness) is formed by epitaxial growth using molecular epitaxy or CVD (chemical vapor deposition) such as ultrahigh vacuum CVD, hydrogen reduction, thermal decomposition, or MOCVD (metal organic CVD). The Si film 13 a is a single-crystal film having a (001) plane.
Further, in the process of FIG. 2A, oxygen ions are implanted while heating the single-crystal silicon substrate 11 to approximately 600° C. Further, the silicon oxide film 12 (buried oxide film) is formed between the single-crystal silicon substrate 11 and the Si film 13 a. by high-temperature annealing at 1300° C., so that an SOI substrate 15 is formed with the Si film 13 a of approximately 20 nm in thickness remaining at the surface. The thickness of the Si film 13 a is selected depending on the type of semiconductor device to be formed on the semiconductor substrate 10.
Next, in the process of FIG. 2B, a SiGe film 14 a of 40 nm in thickness is formed by epitaxial growth on the surface of the Si film 13 a using molecular epitaxy or CVD (such as ultrahigh vacuum CVD, hydrogen reduction, thermal decomposition, or MOCVD). The SiGe film 14 a grows so that its (001) plane is parallel to the substrate surface, and the SiGe film 14 a forms a heterostructure with the Si film 13 a. The SiGe film 14 a is substantially coherent with the Si film 13 a (has substantially the same lattice constant as the Si film 13 a) at the interface with the Si film 13 a, and the higher in the SiGe film 14 a, the closer to its inherent lattice constant. Accordingly, compressive strain is caused in the SiGe film 14 a (strained SiGe film), and is great at the interface with the Si film 13 a in particular.
Specifically, formation of the SiGe film 14 a is performed for 3 minutes by, for example, ultrahigh vacuum CVD, using Si2H6 as a source gas of Si (flow rate of 2 sccm) and GeH4 as a source gas of Ge (flow rate of 4 sccm) at a substrate temperature of 550° C. at a pressure of 10−4 Pa.
The thickness of the SiGe film 14 a is within the range of 5 nm to 60 nm, preferably 10 nm to 40 nm. With this thickness, a defect may be caused in the SiGe film 14 a. However, since the SiGe film 14 a is eventually removed, this does not affect the quality of the strained SOI substrate. With respect to the composition of the SiGe film 14 a, letting the Ge concentration be expressed as x at. %, it is preferable that the Ge concentration x be within the range of 10 at. % to 40 at. %. If the Ge concentration x is lower than 10 at. %, tensile stress is not applied sufficiently to the Si film 13 a. On the other hand, if the Ge concentration x is higher than 40 at. %, dislocation is likely to occur at the interface with the Si film 13 a, so that the tensile strain induced in the Si film 13 a is non-uniform. Further, it is preferable that the Ge concentration x of the SiGe film 14 a be within the range of 15 at. % to 30 at. % in terms of easy formation of the SiGe film 14 a with good crystallinity. In the following, the composition of the SiGe film is expressed as Si100-xGex, letting the Ge concentration be x at. %.
The ratio of thickness of the SiGe film 14 a to the Si film 13 a is suitably determined. It is preferable that SiGe film 14 a/Si film 13 a (thickness ratio) be within the range of 0.2 to 30 in terms of sufficient application of tensile stress from the SiGe film 14 a to the Si film 13 a.
It is preferable that the substrate temperature at the time of forming the SiGe film 14 a be within the range of 450° C. to 750° C. If the substrate temperature is lower than 450° C., the Si/Ge composition ratio changes depending on the composition of the SiGe film 14 a, so that dislocation is likely to occur at the interface with the Si film 13 a. This results in reduction in the amount of tensile strain induced in the Si film 13 a in the next process. If the substrate temperature is higher than 750° C., the diffusion of impurities occurs if the impurities have been implanted, so that the impurity profile changes. An oxide film on the surface of the Si film 13 a may be removed using hydrofluoric acid before forming the SiGe film 14 a.
Next, in the process of FIG. 2C, energy lines are emitted onto the surface of the SiGe film 14 a. For example, laser light is emitted onto the surface of the SiGe film 14 a using a XeCl excimer laser (of a wavelength of 308 nm and an exposure energy of 280 mJ/cm2). This laser light emission relaxes the compressive strain of the SiGe film 14 a, so that tensile stress is applied to the Si film 13 a. Since the Si film 13 a is weakly joined to its underlayer silicon oxide film 12, this joining is broken by heating by the conducted heat by the laser light emission and tensile stress applied from the Si film 13 a. As a result, tensile stress is induced over the entire Si film 13 a in its depth direction. Thus, the lattice-relaxed SiGe film 14 b and the strained Si film 13 b in which tensile strain is induced are formed as shown in FIG. 2D.
The laser light is preferably shorter in wavelength than visible light (400 nm to 760 nm in wavelength) in terms of high exposure energy density. The laser light is more preferably in the range of 150 nm to 400 nm in terms of easy conversion from light into heat at the topmost surface of the SiGe film 14 a. The depth of entrance of such short-wavelength light into the SiGe film 14 a is small (shallow), so that diffusion of Ge atoms into the Si film 13 a is further prevented. Examples of such a laser light source include a XeCl excimer laser (308 nm wavelength), a KrF excimer laser (248 nm wavelength), an ArF excimer laser (193 nm wavelength), and a F2 excimer laser (157 nm wavelength).
The exposure energy is determined so that temperature is such that the compressive strain of the SiGe film 14 a is relaxed and the joining of the Si film 13 a and the silicon oxide film 12 is broken so that compressive strain is induced in the Si film 13 a. The exposure energy is suitably determined in accordance with the thickness of the SiGe film 14 a and the thickness of the Si film 13 a. Further, the exposure energy may be controlled by emitting multiple pulses onto a single point in relation to exposure energy density.
Laser light exposure may be either surface exposure or spot exposure. It is preferable to expose the entire surface to be exposed at a time. This makes it possible to induce strain uniformly in the Si film 13 a.
Next, in the process of FIG. 2E, the SiGe film 14 b is removed from the structure of FIG. 2D by wet etching. Specifically, a liquid mixture of hydrofluoric acid, oxygenated water, and acetic acid is used as the etching liquid. The liquid mixture is set at a liquid temperature of, for example, 25° C., and is applied on the surface of the structure of FIG. 2D by spray etching, thereby dissolving and removing only the SiGe film 14 b. Then, the surface of the exposed strained Si film 13 b is cleaned and rinsed with pure water, and is dried. Such etching liquid has a higher etching rate for SiGe than for Si, thus having etching selectivity. Therefore, it is possible to stop etching at the interface of the SiGe film 14 b and the strained Si film 13 b with good controllability. Accordingly, since the SiGe film 14 b is prevented from remaining, the remaining of Ge atoms on the surface of the strained Si film 13 b is suppressed. Further, since the surface of the strained Si film 13 b is not etched, the strained Si film 13 b has a smooth surface. Alternatively, the SiGe film 14 b may be removed using dipping, spin coating, or jet etching. Further, at the time of removing the SiGe film 14 b, the surface of the strained Si film 13 b may be overetched for 0.1 nm to 3 nm in film thickness. By thus removing the extreme surface layer of the strained Si film 13 b in which Ge atoms are diffused, it is possible to obtain the strained Si film 13 b with a lower Ge content. In particular, overetching is effective because in this method of manufacturing a semiconductor substrate, the diffusion of Ge atoms into the strained Si film 13 b is limited to its extreme surface layer only. The overetching of the strained Si film 13 b may be performed either at the time of removing the SiGe film 14 b or separately after removing the SiGe film 14 b. Thereby, the semiconductor substrate 10 shown in FIG. 2E, having the strained Si film 13 b in which tensile strain is induced, is formed.
According to this embodiment, strain is induced in the Si film 13 a by brief heating of the SiGe film 14 a with energy lines. Therefore, diffusion of Ge atoms into the strained Si film 13 b from the SiGe film 14 a is suppressed. Accordingly, it is possible to significantly reduce residual Ge atoms in the strained Si film 13 b. As a result, it is possible to realize the semiconductor substrate 10 having a high-quality strained Si film 13 b of an extremely low Ge content.
Further, in place of the above-described SiGe film 14 a, a material having a greater lattice constant than SiGe, such as AlAs, GaAs, or InP, may be employed. Alternatively, the above-described SiGe film 14 a may be replaced by a film having a composition where an element having a large covalent radius is substituted for part of the elements forming a compound of a group III element and a group V element having substantially the same lattice constant as Si, such as GaP or AlP. By using these materials greater in lattice constant than SiGe, the same effects as in the case of using the SiGe film are produced. For example, a GaPAs film formed by substituting As for part of P of GaP, a GaInP film formed by substituting In for part of Ga of GaP, and an AlInP film formed by substituting In for part of Al of AlP may be employed.
Further, it is possible to induce compressive strain in the Si film 13 a by causing a film having a smaller lattice constant than Si to grow on the Si film 13 a in place of the above-described SiGe film 14 a and applying compressive stress to the Si film 13 a by the above-described heating method. The compressive strain-induced Si film has a higher hole mobility than a Si film in which no strain is induced. By using such a compressively strained Si film for the channel layer of a p-type MOS transistor, it is possible to increase operating speed. As such a film applying compressive stress to the Si film, a SiC film formed by substituting C for part of Si of a Si film or a film having a composition where an element having a large covalent radius is substituted for part of the elements forming a compound of a group III element and a group V element having substantially the same lattice constant as Si, such as GaP or AlP, may be employed. For example, a GaPN film formed by substituting N for part of P of GaP, a GaAlP film formed by substituting Al for part of Ga of GaP, and AlPN film formed by substituting N for part of P of AlP may be employed. Further, a C film, a BN film, a BP film, and a ZnS film are expected to be also employable as films applying compressive stress to the Si film.
FIG. 9 is a cross-sectional view of a semiconductor substrate 60 according to the second embodiment of the present invention. In FIG. 9 and subsequent drawings, the same elements as those described above are referred to by the same numerals, and a description thereof is omitted. Referring to FIG. 9, the semiconductor substrate 60 includes the single-crystal silicon substrate 11, the silicon oxide film 12 stacked thereon, and strained Si films 13 b-1 provided separately in multiple regions on the silicon oxide film 12. The strained Si films 13 b-1, in which tensile strain is induced in the in-plane direction, are the same as the strained Si film 13 b of the first embodiment. The strained Si films 13 b-1 are separated from one another by grooves 61 exposing the silicon oxide film 12. A large number of strained Si films 13 b-1 are formed on the single substrate. Since the strained Si films 13 b-1 are separated from one another by the grooves 61, there is no interference when their respective strains are formed, so that strain has good uniformity in amount in the in-plane direction. Therefore, according to this embodiment, the strained Si films 13 b-1 are better in electron mobility and in uniformity.
Each of the strained Si films 13 b-1 separated from one another by the grooves 61 may be the size of a single chip of a semiconductor device to be formed on the strained Si film 13 b-1. Alternatively, each of the strained Si films 13 b-1 may be the size of one of the multiple functional parts of a semiconductor device or the size of a single element.
First, the silicon oxide film 12, the Si film 13 a, and the SiGe film 14 a are stacked on the single-crystal silicon substrate 11 in the same manner as in the processes of FIGS. 2A and 2B of the first embodiment.
Next, in the process of FIG. 10A, the grooves 61 passing through the SiGe film 14 a and the Si film 13 a so as to expose the silicon oxide film 12 are formed. Specifically, as also shown in FIG. 11, the grooves 61 are formed on the substrate surface in a matrix-like manner so as to divide the SiGe film 14 a and the Si film 13 a in multiple regions, thereby forming layered bodies 62 a each formed of a corresponding Si film 13 a-1 and SiGe film 14 a-1. The grooves 61 are formed by, for example, photolithography and RIE. The cross-sectional view of FIG. 10A is taken along the line A-A of FIG. 11.
Further, in the process of FIG. 10B, the surfaces of the SiGe films 14 a-1 are exposed to energy lines. Exposure to the energy lines is performed in the same manner as in FIG. 2C. As a result, by the same action as in the process of FIG. 2C, the compressive strain of the SiGe films 14 a-1 is relaxed so that tensile strain is induced in the Si films 13 a-1. Consequently, Si films 13 b-1 in which tensile strain is induced as shown in FIG. 10B are formed. Layered bodies 62 b each formed of the corresponding Si film 13 b-1 and SiGe film 14 b-1 are separated by the grooves 61, so that the ends of each of the Si films 13 b-1 and the SiGe films 14 b-1 are open. This smoothes relaxation of the compressive strain of each SiGe film 14 b-1 and induction of the tensile strain of each Si film 13 b-1. As a result, the uniformity of the tensile strain of each Si film 13 b-1 in the in-plane direction is good, and the uniformity of the electron mobility of each Si film 13 b-1 is good. Further, substantially all the amount of relaxed compressive strain of each SiGe film 14 a-1 of FIG. 10A becomes the amount of tensile strain of the corresponding Si film 13 b-1. Accordingly, a greater amount of tensile strain is induced in the strained Si film 13 b-1 than in the first embodiment. Further, at the time of exposure to energy lines, the surface of the silicon oxide film 12 exposed at the bottom surfaces of the grooves 61 is exposed to the energy lines. As a result, the temperature of the silicon oxide film 12 rises, so that the joining of the Si films 13 a-1 and the silicon oxide film 12 shown in FIG. 10A is likely to be broken. Consequently, a greater tensile strain is likely to be formed in each Si film 13 b-1.
The layered bodies 62 a shown in FIGS. 10A and 11 may be exposed to energy lines one by one. The area of each layered body 62 a is smaller than the area of the entire substrate 11, and it is easier to form energy lines of uniform energy density for such a small-area region. As a result, the amount of tensile strain of the Si film 13 b-1 of each layered body 62 b has better uniformity. Further, it is more effective to emit energy lines onto an area greater than each layered body 62 a.
The in-plane-directional size of each of the layered bodies 62 a separated by the grooves 61 is suitably determined. Each layered body 62 a may be equal in size to a semiconductor device such as a memory chip or an LSI. Alternatively, each layered body 62 a may be approximately an integral multiple of a semiconductor device in size. This facilitates a dicing process for cutting the semiconductor substrate 60 into individual semiconductor devices after forming the semiconductor devices thereon in a semiconductor device manufacturing process.
Next, the SiGe films 14 b-1 are removed in the same manner as in the above-described process of FIG. 2E, of which graphical illustration is omitted. Thereby, the semiconductor substrate 60 shown in FIG. 9, having the strained Si films 13 b-1 separated from one another in the in-plane direction, is formed.
According to this manufacturing method, the grooves 61 are formed in the layered body of the Si film 13 a and the SiGe film 14 a in the process of FIG. 10A. Alternatively, although not graphically illustrated, grooves may be formed in the same manner as in the process of FIG. 10A after forming the Si film 13 a, and then the SiGe films 14 a-1 may be formed on the Si films 13 a-1.
According to this embodiment, the same effects as those of the semiconductor substrate manufacturing method according to the first embodiment are produced. In addition, since the amount of tensile strain is uniform over the entire strained Si film 13 b-1, the strained Si film 13 b-1 with higher quality can be obtained.
First, in the process of FIG. 12A, a layered body of the single-crystal silicon substrate 11, the silicon oxide film 12, and the Si film 13 a is formed in the same manner as in the process of FIG. 2A of the first embodiment.
Further, in the process of FIG. 12A, a layered body of multiple SiGe films 14 a-1, 14 a-2, and 14 a-3 having different Ge concentrations is formed on the Si film 13 a. The SiGe films 14 a-1 through 14 a-3 are formed in the same manner as in the process of FIG. 2B of the first embodiment.
The compositions of the SiGe films 14 a-1 through 14 a-3 are determined so that the Ge concentration gradually decreases in the stacking direction from the Si film 13 a side. For example, referring to FIG. 12A, the SiGe films 14 a-1 through 14 a-3 are a Si60Ge40 film (5 nm in thickness), a Si80Ge20 film (20 nm in thickness), and a Si90Ge10 film (20 nm in thickness), respectively, from the Si film 13 a side. By thus configuring the layered body of the SiGe films 14 a-1 through 14 a-3, a greater tensile strain can be induced in the Si film 13 a at the interface therewith by the Si60Ge40 film 14 a-1 having a high Ge concentration. In addition, by forming a layered body suppressing the occurrence of a defect therein, ensuring thickness, and having good crystallinity by successively stacking the Si80Ge20 film 14 a-2 and the Si90Ge10 film 14 a-3 both smaller in lattice constant than the Si60Ge40 film in the stacking direction of the layered body, it is possible to support the Si60Ge40 film 14 a-1 and to stably induce tensile strain in the Si film 13 a.
Further, the shorter the wavelength of laser light, the higher the absorbance of the Si90Ge10 film 14 a-3 of a low Ge concentration disposed at the surface of the layered body of the SiGe films 14 a-1 through 14 a-3, so that the Si90Ge10 film 14 a-3 can convert the light energy of laser light into heat with efficiency. That is, the layered body of the SiGe films 14 a-1 through 14 a-3 may have a composition that induces a greater strain on the Si film 13 a side and have a composition that causes the absorbance of laser light to be high on the layered body surface side. The number of layers of the layered body is not limited to three, and may be two or more than three. Further, the layered body of the SiGe films 14 a-1 through 14 a-3 may be a composition gradient film in which the Ge concentration changes continuously.
Further, in the process of FIG. 12A, the surface of the layered body of the SiGe films 14 a-1 through 14 a-3 is exposed to laser light in the same manner as in the process of FIG. 2C. This induces tensile strain in the Si film 13 a, so that a strained Si film 13 c shown in FIG. 12B is formed. Although not graphically illustrated, the compressive strain of the layered body of the SiGe films 14 a-1 through 14 a-3 is relaxed by laser exposure.
Next, in the process of FIG. 12B, the layered body of the SiGe films 14 a-1 through 14 a-3 shown in FIG. 12A is removed in the same manner as in the process of FIG. 2E. Thereby, a semiconductor substrate 20 having the Si film 13 c in which tensile strain is induced can be formed.
According to this embodiment, multiple SiGe films are stacked on a Si film so that the Ge concentration in the SiGe films decreases in the direction away from the interface with the Si film. By thus forming a SiGe film layered body suppressing the occurrence of a defect therein, ensuring thickness, and having good crystallinity, it is possible to support the Si60Ge40 film 14 a-1 and to stably induce tensile strain in the Si film 13 a. Accordingly, it is possible to form the semiconductor substrate 20 having the Si film 13 c having a greater tensile strain induced than the semiconductor substrate 10 formed in the first embodiment.
Next, a description is given of a semiconductor substrate and a method of manufacturing the same according to a fourth embodiment of the present invention. The semiconductor substrate according to the fourth embodiment is formed by forming a Ge film on the surface of the strained Si film 13 c of the semiconductor substrate 20 according to the third embodiment.
Referring to FIG. 13, the semiconductor substrate 25 includes the semiconductor substrate 20 formed of the single-crystal silicon substrate 11, the silicon oxide film 12, and the strained Si film 13 c; and a Ge film 26 formed on the surface of the strained Si film 13 c. The semiconductor substrate 20 has the same configuration and is formed in the same manner as the semiconductor substrate 20 shown in FIG. 12B according to the third embodiment.
The Ge film 26 is formed on the strained Si film 13 c by CVD such as ultrahigh vacuum CVD, hydrogen reduction, thermal decomposition, or MOCVD. A Ge crystal is approximately 4.2% greater in lattice constant than a Si crystal. However, since tensile strain is caused in the strained Si film 13 c by the SiGe film 14 a-1 of a high Ge concentration of the third embodiment, the Ge film 26 is prevented from having dislocation at the interface, and forms a coherent interface to grow epitaxially. Specifically, formation of the Ge film 26 is performed for 30 minutes, using GeH4 (flow rate of 7 sccm) as a source gas of Ge and H2 (flow rate of 1 sccm) as a carrier gas, at a pressure of 10−4 Pa and at a substrate temperature of 350° C. Further, the Ge film 26 is within the range of 1 nm to 10 nm in thickness.
Further, the Ge film 26, better in quality than a Ge film formed on a normal Si film, can be formed on the semiconductor substrate 25. Further, the strained Si film 13 c may have such thickness as to allow the Ge film 26 to grow epitaxially thereon. For example, the strained Si film 13 c may be 1 nm to 5 nm in thickness. Thus, the strained Si film 13 c can be reduced in thickness. Therefore, the strained Si film 13 c with better quality can be used, so that it is possible to form the Ge film 26 with good quality.
The semiconductor substrate 25 according to this embodiment is formed using the semiconductor substrate 20 formed of the single-crystal silicon substrate 11, the silicon oxide film 12, and the strained Si film 13 of the third embodiment. Alternatively, the semiconductor substrate 10 of the first embodiment or the semiconductor substrate 60 of the second embodiment may be used, and a Ge film may be formed on the strained Si film 13 b or each strained Si film 13 b-1.
FIG. 14 is a cross-sectional view of a semiconductor substrate 30 according to the fifth embodiment of the present invention. Referring to FIG. 14, the semiconductor substrate 30 includes the single-crystal silicon substrate 11, the silicon oxide film 12, and a first region 31 and a second region 32 on the silicon oxide film 12. The first region 31 includes the Si film 13 b in which tensile strain is induced in a crystal lattice in the directions parallel to the substrate surface. The second region 32 includes the SiGe film 14 a in which compressive strain is induced in a crystal lattice in the directions parallel to the substrate surface. The Si film 13 b of the first region 31 is the same as the strained Si films of the above-described first through third embodiments. The SiGe film 14 a of the second region 32 has a zinc blende crystal structure, and has a (001) plane formed parallel to the substrate surface. Further, the [001] direction is its film thickness direction. Tensile strain is induced in the SiGe film 14 a in its film thickness direction. Further, compressive strain is induced in the SiGe film 14 a in the directions parallel to the substrate surface, that is, in the moving directions of holes, thus resulting in better hole mobility.
First, in the process of FIG. 15A, the layered body of single-crystal silicon substrate 11/silicon oxide film 12/Si film 13 a is formed in the same manner as in the process of FIG. 2A of the first embodiment.
Further, in the process of FIG. 15A, the SiGe film 14 a is formed in the same manner as in the process of FIG. 2B. As described above, since the SiGe film 14 a has grown epitaxially on the Si film 13 a, compressive strain is induced therein.
Further, in the process of FIG. 15A, a resist film (not graphically illustrated; 100 nm in thickness) is formed by photolithography selectively on the SiGe film 14 a of the first region 31 to cause tensile strain to be induced in the Si film 13 a in the next process, and a silicon oxide film 33 is further formed by sputtering or CVD. The silicon oxide film 33 is approximately 50 nm in thickness if the surface of the silicon oxide film 33 is heated in the next process. Then, the resist film is lifted off along with the silicon oxide film 33 thereon. A groove part 34 reaching the lower silicon oxide film 12 may be provided at the boundary part between the first region 31 and the second region 32. Specifically, although not graphically illustrated, a resist film is selectively formed by photolithography, and the groove part 34 is formed by dry etching such as RIE. By causing the Si film 13 a to be discontinuous between the first region 31 and the second region 32 by providing the groove part 34 as described above, it is possible to induce tensile strain uniformly in the Si film 13 a only in the first region 31 in the next process.
In the process of FIG. 15B, the surface of the structure of FIG. 15A is exposed to laser light. The exposure to laser light is performed in the same manner as in the process of FIG. 2C of the first embodiment. By this exposure to laser light, tensile stress is applied to the Si film 13 a by the SiGe film 14 a in the first region 31, so that tensile strain is induced in the Si film 13 a in the first region 31. The power of the heat by the laser exposure to enter the SiGe film 14 a in the second region 32 is halved by light interference because of the silicon oxide film 33. Therefore, the compressive strain remains induced in the SiGe film 14 a in the second region 32. The heating methods using exposure to other energy lines described in the process of FIG. 2C may be employed.
It is also possible to selectively expose only the SiGe film 14 a in the first region 31 to laser light without forming the silicon oxide film 33. The selective laser exposure may be performed by using a galvano scanner or a polygon mirror as described above, or by providing a mask to restrict the spread of a predetermined laser light beam in accordance with an area to be illuminated between a laser light source and an illumination optical system.
In the process of FIG. 15C, the SiGe film 14 a in the first region 31, in which strain has been relaxed by the laser exposure, is removed in the same manner as in the process of FIG. 2E of the first embodiment. Then, the silicon oxide film 33 in the second region 32 is removed by etching (chemical processing). Thereby, the strained semiconductor substrate 30, having on the silicon oxide film 12 the first region 31 including the Si film 13 b in which tensile strain is induced, and the second region 32 including the SiGe film 14 a in which compressive strain is induced, is formed.
According to this embodiment, it is possible to manufacture a semiconductor substrate having the strained Si film 13 b having high electron mobility and the strained SiGe film 14 a having high hole mobility by a simplified method. Further, since a Si film of high electron mobility and such a semiconductor substrate can be provided on a single substrate, a CMOS (complementary MOS) transistor that operates at high speed can be formed with ease as described below.
In the n-type MOS transistor 41, a source region 44 a and a drain region 44 b in which an n-type impurity is diffused are formed in the strained Si film 13 b of the first region 31. A gate layered body 48 of a gate insulating film 45 and a gate electrode 46 stacked thereon is formed on the strained Si film 13 b between the source region 44 a and the drain region 44 b. A sidewall insulating film 49 is formed on each side of the gate layered body 48. A channel (not graphically illustrated) is formed in the strained Si film 13 b under the gate insulating film 45. Since tensile strain is induced in the strained Si film 13 b, the strained Si film 13 b is greater in electron mobility than a Si film in which no strain is induced, thus enabling the n-type MOS transistor 41 to operate at high speed.
On the other hand, in the p-type MOS transistor 42, a source region 50 a and a drain region 50 b in which a p-type impurity is diffused are formed in the SiGe film 14 a of the second region 32 in which compressive strain is induced (hereinafter referred to as “strained SiGe film 14 a”). The gate layered body 48 of the gate insulating film 45 and the gate electrode 46, and the sidewall insulating films 49 are formed in the p-type MOS transistor 42 the same as in the n-type MOS transistor 41. Further, a channel is formed in the strained SiGe film 14 a under the gate insulating film 45. Since compressive strain is induced in the strained SiGe film 14 a, the strained SiGe film 14 a is greater in hole mobility than a Si film and a SiGe film in which no strain is induced, thus enabling the p-type MOS transistor 42 to operate at high speed.
First, in the process of FIG. 17A, the semiconductor substrate 30 having the strained Si film 13 b (first region 31) and the strained SiGe film 14 a (second region 32) at its surface is formed in the same manner as in the fifth embodiment. The groove part 34 is formed at the boundary part between the first region 31 and the second region 32. Next, the groove part 34 is filled with an insulating material such as a silicon oxide film or a silicon nitride film, thereby forming the isolation part 43.
Further, in the process of FIG. 17A, the gate insulating film 45 (for example, a silicon oxide film, a silicon oxynitride film, or a metal oxide film of 1 nm to 3 nm in thickness) is formed on the surfaces of the strained Si film 13 b, the isolation part 43, and the strained SiGe film 14 a by thermal oxidation, CVD, or sputtering. Further, a polysilicon film 46 a (100 nm in thickness) to serve as a gate electrode in the next process is formed.
Next, in the process of FIG. 17B, a resist film is formed on the surface of the polysilicon film 46 a, and patterning is performed so that only regions to serve as gates remain. Then, using the resist film as a mask, the polysilicon film 46 a and the gate insulating film 45 are etched by RIE so as to expose the surfaces of the strained Si film 13 b and the strained SiGe film 14 a, thereby forming the gate layered bodies 48 each formed of the gate insulating film 45 and the gate electrode 46.
Further, in the process of FIG. 17B, using the resist film and the gate layered bodies 48 as a mask, an n-type impurity and a p-type impurity are implanted into the strained Si film 13 b and the strained SiGe film 14 a, respectively, thereby forming extension regions 52 and 53. Next, the resist film is removed by ashing using an oxygen plasma.
Further, in the process of FIG. 17C, activation is performed by implanting an n-type impurity and a p-type impurity into the strained Si film 13 b and the strained SiGe film 14 a, respectively, using the sidewall insulating films 49 and the gate electrodes 46 as a mask, thereby forming the source regions 44 a and 50 a and the drain regions 44 b and 50 b. Thereby, the n-type MOS transistor 41 and the p-type MOS transistor 42 are formed.
According to this embodiment, since the channel of the n-type MOS transistor 41 is formed in the strained Si film 13 b of high electron mobility in which tensile strain is induced, the n-type MOS transistor 41 can operate at high speed. Further, since the p-type MOS transistor 42 is formed in the strained SiGe film 14 a of high hole mobility in which compressive strain is induced, the p-type MOS transistor 42 can operate at high speed.
Further, since the Ge atom content of the strained Si film 13 b of the n-type MOS transistor 41 is extremely reduced, it is possible to suppress formation of the interface state in the channel, and thus to prevent a decrease in electron mobility. Further, there is no possibility of an increase in the sheet resistance of the surfaces of the source region 44 a and the drain region 44 b converted into silicide due to the effect of Ge atoms. Further, even if the strained Si film 13 b is exposed to oxygen plasma employed in ashing for removing a resist film, since the Ge atom content of the strained Si film 13 b is extremely reduced, oxidation and vaporization of Ge atoms are suppressed, so that it is possible to suppress degradation of the film quality of the strained Si film 13 b.
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U.S. Classification 438/199, 257/E21.703, 257/E21.409, 257/E27.112, 257/E29.297, 257/E21.633, 257/E29.056, 257/E21.347, 257/E29.298, 438/520
International Classification H01L27/092, H01L21/20, H01L29/786, H01L27/12, H01L27/088, H01L27/08, H01L21/336, H01L21/84, H01L21/8238, H01L21/265
Cooperative Classification H01L29/78687, H01L29/78684, H01L21/823807, H01L29/1054, H01L29/7842, H01L21/268, H01L21/84, H01L27/1203
European Classification H01L29/786G2, H01L29/78R, H01L21/84, H01L21/268, H01L29/10D2B4, H01L27/12B
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