Source: http://www.google.com/patents/US20030116790?ie=ISO-8859-1&dq=5,915,131
Timestamp: 2014-07-14 07:15:22
Document Index: 190709159

Matched Legal Cases: ['art 14', 'art 15', 'art 66', 'art 66', 'art 66', 'art 66', 'art 66', 'art 66', 'arts 1', 'arts 1']

Patent US20030116790 - Semiconductor chip and semiconductor device using the semiconductor chip - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign in<nobr>Advanced Patent Search</nobr>PatentsA semiconductor chip of rewiring layer-integral type capable of preventing a maloperation by noise and a deterioration of communication characteristics and a semiconductor device with excellent communication characteristics; the semiconductor chip, wherein a rewiring layer (3) is formed on a circuit...http://www.google.com/patents/US20030116790?utm_source=gb-gplus-sharePatent US20030116790 - Semiconductor chip and semiconductor device using the semiconductor chipAdvanced Patent SearchPublication numberUS20030116790 A1Publication typeApplicationApplication numberUS 10/311,707PCT numberPCT/JP2001/005282Publication dateJun 26, 2003Filing dateJun 20, 2001Priority dateJun 21, 2000Also published asCN1275328C, CN1436370A, DE10196382T0, DE10196382T1, US6838773, WO2001099193A1Publication number10311707, 311707, PCT/2001/5282, PCT/JP/1/005282, PCT/JP/1/05282, PCT/JP/2001/005282, PCT/JP/2001/05282, PCT/JP1/005282, PCT/JP1/05282, PCT/JP1005282, PCT/JP105282, PCT/JP2001/005282, PCT/JP2001/05282, PCT/JP2001005282, PCT/JP200105282, US 2003/0116790 A1, US 2003/116790 A1, US 20030116790 A1, US 20030116790A1, US 2003116790 A1, US 2003116790A1, US-A1-20030116790, US-A1-2003116790, US2003/0116790A1, US2003/116790A1, US20030116790 A1, US20030116790A1, US2003116790 A1, US2003116790A1InventorsYuji Kikuchi, Kiyoharu Kishimoto, Kazunari Nakagawa, Yoshiharu HinoOriginal AssigneeYuji Kikuchi, Kiyoharu Kishimoto, Kazunari Nakagawa, Yoshiharu HinoExport CitationBiBTeX, EndNote, RefManReferenced by (33), Classifications (37), Legal Events (4) External Links: USPTO, USPTO Assignment, EspacenetSemiconductor chip and semiconductor device using the semiconductor chipUS 20030116790 A1Abstract A semiconductor chip of rewiring layer-integral type capable of preventing a maloperation by noise and a deterioration of communication characteristics and a semiconductor device with excellent communication characteristics; the semiconductor chip, wherein a rewiring layer (3) is formed on a circuit formed surface (1 a) through an insulating layer (2) so as to form an antenna coil (4) with the rewiring layer (3), the antenna coil (4) is formed around the periphery of an analog circuit (21) on the circuit formed surface (1 a) by avoiding forming on the analog circuit (21), the analog circuit (21) may be formed by collecting analog circuits to be formed in the semiconductor chip (1A) therein, may be one of the particularly noise-susceptible analog circuits such as a power circuit, a calculation amplifier, a comparison amplifier, an RF receiving part, an RF transmitting part, an RF synthesizer part, and a voltage build-up circuit and an amplifying circuit forming a part of a memory part, or may be a coil provided in a part of the analog circuit formed in the semiconductor chip (1A). Images(13) Claims(10)
[0057] A first example of a semiconductor chip according to the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view of a semiconductor chip 1A according to a first embodiment of the present invention, and FIG. 2 is a sectional view taken along the line A-A in FIG. 1. [0058] The semiconductor chip 1A in this example is a coil-on-chip type semiconductor chip which, as shown in FIGS. 1 and 2, has a rewiring layer 3 formed on a circuit-formed-surface 1 a through an insulating layer 2, and an antenna coil 4 made up of the rewiring layer 3 is formed integral with the chip. In the semiconductor chip of this embodiment, the antenna coil 4 of square-spiral shape is formed in the peripheral area of the circuit-formed surface 1 a in a manner to avoid an analog circuit 21 in the center area of the circuit-formed surface 1 a. [0059] The analog circuit 21 may be formed by collecting all analog circuits to be formed in the semiconductor chip 1A, or may be one of the particularly noise-susceptible analog circuits, such as the power circuit 11, the operational amplifier 12, the comparison amplifier 13, the RF receiving part 14, the RF transmitting part 15, the RF synthesizer, and a voltage build-up circuit or an amplifier circuit for forming a part of the memory block 18, or may be a coil provided in a part of the analog circuit formed in the semiconductor chip 1A. [0060] The semiconductor chip 1A in this first example is produced by forming the rewiring layer 3, through the insulating layer 2, on the circuit-formed surface 1 a in a semiconductor chip as the base (more practically, in a finished wafer before discrete semiconductor chips are cut out of it). For a semiconductor chip as the base of a semiconductor chip 1A in this first example, any well-known semiconductor chip may be used. In order to obtain thinner non-contact type semiconductor devices as final products, it is preferable to use a bare chip of thin thickness achieved by chemical polishing or mechanical polishing or a combination of these carried out on a surface 1 b on which circuits are yet to be formed. The thickness is preferably not more than 300 μm, but should preferably be about 50 μm�150 μm for chips applied to thinner cards. It is possible to use chips with a radio communication circuit formed on the circuit-formed surface by CMOS technology or chips which have a radio communication circuit formed on the circuit-formed surface to transmit or receive or exchange signals of frequencies of 800 MHz or higher with an external device. [0061] In the example in FIG. 1, the antenna coil 4 contains several turns of wire but is not limited to this number of turns, and may be a coil of any number of turns, larger than one turn. Also, with regard to the plane figure of the antenna coil 4 as viewed from above, the plane figure is not limited to the example shown in FIGS. 1 and 2. For example, the antenna 4 may be in a shape less liable, by effect of shape, to deterioration in communication characteristics by chamfering the corner portions. The number of turns of the antenna coil 4 may be increased by stacking insulating layers 2 and rewiring layers 3 in a multilayer structure. [0062] In the semiconductor chip 1A in this example, the antenna coil 4 is formed by avoiding the analog circuit 21 in the center area of the circuit-formed surface 1 a and by arranging the analog circuit 21 and the antenna coil 4 such that they do not overlap each other, and for this reason, a parasitic capacitance is not formed between the analog circuit 21 and the antenna coil 4, making it possible to prevent the occurrence of electrostatic capacitance noise that affects the analog circuit 21. Because the analog circuit 21 is not face-to-face with the antenna coil 4, it is possible to prevent the occurrence of electromagnetic induction that affects the analog circuit 21. Accordingly, it is possible to prevent crosstalk noise, ringing, power source noise, or the like attributable to the electrostatic induction noise or the electromagnetic induction noise, and also with the coil-on-chip type applicable to high frequencies, it is possible to solve noise-induced malfunction and deterioration in communication characteristics. [0063] When, for a semiconductor chip as the base of the semiconductor chip 1A, a chip having a radio communication circuit formed on the circuit-formed surface by CMOS technology is used, the semiconductor chip of this kind particularly susceptible to the effect of the rewiring layer 3 (the antenna coil 4) can be prevented from deteriorating in communication characteristics. Furthermore, when, for a semiconductor chip as the base of the semiconductor chip 1A, a chip having formed on the circuit-formed surface a radio communication circuit to transmit or receive or exchange signals of frequencies of 800 MHz or higher with an external device, the semiconductor chip of this kind particularly susceptible to the effects of the rewiring layer 3 (the antenna coil 4) can be prevented from deteriorating in communication characteristics. [0064] <Second Example of Semiconductor Chip>
[0105] A second example of the semiconductor device according to the present invention will be described with reference to FIG. 15. FIG. 15 is a sectional view of an essential portion of the semiconductor device according to a third embodiment of the present invention. [0106] As shown in FIG. 15, a semiconductor device 60 according to the third embodiment comprises a first wiring layer 61, a first insulating layer 62, a second wiring layer 63, a junction to connect the first wiring layer 61 and the second wiring layer 63, a second insulating layer 64, a semiconductor chip 1C, another mounted part 66, a conductor 67 to connect the second wiring layer 63 to the semiconductor chip 1C, a conductor 68 to connect the second wiring layer 63 to the one other mounted part 66, a molding resin 69 for encapsulating the semiconductor chip 1C, the one other mounted part 66, and the conductors 67, 68 in one body, a nickel layer (metal film) 70 formed locally on the outer surface of the first wiring layer 61, a protective resin layer 71 covering the outer surface of the first wiring layer 61, and external terminals 72 formed on the nickel layer. [0107] The first wiring layer 61, the second wiring layer 63, and the junctions 63a are formed by electroplating (electrocasting) using copper or a copper alloy. As a copper alloy for this purpose, a copper-nickel alloy or a copper-nickel-silver alloy is particularly suitable, being superior in corrosion resistance and bond strength. A junction 63 a is formed in each of first openings 62 a provided in the first insulating layer 62, and electrically connects the first wiring layer 61 with the second wiring layer 63. [0108] The first insulating layer 62, the second insulating layer 64, and the protective resin layer 71 are formed by an insulating resin. For the insulating resin, a photosensitive resin may be used to facilitate the formation of the first insulating layer 62, the second insulating layer 64, and the protective resin layer 71. In the first insulating layer 62, the first openings 62 a for forming the junctions 63 a are formed in a required array, and in the second insulating layer 64, second openings 64 a that have the conductors 67, 68 pass through are formed in a required array. [0109] As the other mounted part 66, a chip part, such as a transistor, a diode, a resistor, an inductor, a capacitor, a quartz oscillator, a filter, a balun, an antenna, and a function module, and an external link connector can be mounted. The function module contains a VCO, a PLL or a power regulator, or the like. [0110] As the conductor 68 for connecting the other mounted part 66 with the second wiring layer 63, a conductive paste or an anisotropic conductive adhesive may be used, but solder is most suitable, being less expensive and highly reliable. [0111] The molding resin 69 is used as a resin for sealing the semiconductor chip 1C, another mounted part 66, and the conductive parts connecting the mounted parts 1C and 66 to the second wiring layer 63 by a resin in a monolithic package, and for this purpose, any of the various kinds of resin materials, which have been used for resin-sealing of semiconductor chips, can be used. [0112] The nickel layer 70 serves to facilitate the formation of the external terminals 72 and is formed at the terminal portions of the first wiring layer 61, on which the external terminals 72 are to be formed. [0113] The external terminals 72 are used to connect the semiconductor device 60 according to this embodiment to an external device, such as a printed circuit board, and the external terminals 72 are preferably formed by solder because solder is suitable for obtaining reliable connections at low cost. [0114] The semiconductor device 60 in this example has the same effects as the semiconductor device 40, and in the semiconductor chip 60, because the mounted parts 1C and 66 are connected by the wiring means, such as the wiring layers 61 and 63 and the protective resin layers 62 and 64, a part corresponding to the core material of the conventional multilayered substrate need not be provided, and therefore a thin-thickness less-expensive semiconductor device can be obtained. Moreover, because the wiring layers 61 and 63 are used, compared with a case where a substrate is used which has a lead frame or a wiring layer formed by metal-foil etching or conductive-paste printing, the wiring pattern can be produced with higher component density, higher precision, smaller size and improved homogenization, and a semiconductor module reduced in size and highly adapted to high frequencies can be obtained. Furthermore, because the first wiring layer 61 and the second wiring layer 63, which are electrically connected with each other, are formed in a two-layer structure, the area required for forming the wiring layers 61 and 63 can be reduced, to thereby decrease the semiconductor device to a smaller size. [0115] In the above-mentioned embodiment, the wiring layer is formed as a two-layer structure but, obviously, may be formed as a not-less-than-three-layer structure. In the above-mentioned embodiment, the CSP type semiconductor chip 1C is used, but another CSP type semiconductor chip, such as 1D or 1E, can be used. INDUSTRIAL APPLICABILITY [0116] According to the invention set forth in claim 1, the analog circuit formed on the circuit-formed surface of the semiconductor chip and the rewiring layer are arranged not to overlap each other through an insulating layer; therefore, a parasitic capacitance is not formed between the analog circuit and the rewiring circuit, thereby eliminating the occurrence of electrostatic induction noise that affects the analog circuit. Moreover, because the analog circuit is not arranged face-to-face with the rewiring layer, electromagnetic induction noise is prevented from occurring that affects the analog circuit. Therefore, crosstalk noise, ringing, and power source noise, for example, ascribable to the electrostatic induction noise or electromagnetic induction noise can be prevented, and also with a semiconductor chip of rewiring layer-integral type adapted to high frequencies, malfunction or deterioration in communication characteristics ascribable to noise can be eliminated. [0117] According to the invention set forth in claim 2, the rewiring layer and at least one of the particularly noise-susceptible analog circuits formed on the circuit-formed surface, such as the power circuit, operational amplifier, comparison amplifier, RF receiving part, RF transmitting part, and RF synthesizer, are arranged not to overlap each other through an insulating layer, with each of such circuits, crosstalk noise, ringing, power noise or the like ascribable to electrostatic induction noise or electromagnetic induction noise can be prevented, making it possible to eliminate malfunction and deterioration in communication characteristics due to noise. [0118] According to the invention set forth in claim 3, among the analog circuits formed on the circuit-formed surface, the coil particularly susceptible to noise and the rewiring layer are arranged not to overlap each other through an insulating layer, making it hard for electrostatic induction noise or electromagnetic induction noise to act on the coil, and thus eliminating malfunction and deterioration in communication characteristics, which may be induced by noise. [0119] According to the invention set forth in claim 4, because the antenna coil for non-contact communication is formed from the rewiring layer, it becomes possible to obtain a coil-on-chip type semiconductor chip superior in noise resistance, thereby making it possible to manufacture a non-contact type semiconductor device with excellent noise resistance at low cost. [0120] According to the invention set forth in claim 5, because the bump-setting wires are formed from the rewiring layer, a CSP type semiconductor chip with excellent noise resistance can be obtained, and a semiconductor device using a chip with many terminals and exhibiting excellent noise resistance can be obtained. [0121] According to the invention set forth in claim 6, in a semiconductor chip which has a radio transmission circuit formed on the circuit-formed surface by CMOS technology, the rewiring layer is arranged so as not to be on the analog circuit, for which reason semiconductor chips of this kind particularly susceptible to the effect of the rewiring can be prevented from deteriorating in the communication characteristics. [0122] According to the invention set forth in claim 7, in a semiconductor chip which has formed thereon a radio communication circuit for transmitting, receiving or exchanging signals of frequencies of 800 MHz or higher with an external device, the rewiring layer is arranged not to be on the analog circuit, for which reason semiconductor chips of this kind particularly susceptible to the effect of the rewiring layer are prevented from deteriorating in the communication characteristics. [0123] According to the invention set forth in claim 8, a semiconductor chip, in which the analog circuit on the circuit-formed surface and the rewiring layer are arranged not to overlap each other through an insulating layer, for which reason it is possible to obtain a semiconductor device, in which the analog circuit of the semiconductor chip is less liable to suffer malfunction and deterioration in communication characteristics attributable to electrostatic induction noise or electromagnetic induction noise, and which therefore exhibits excellent communication characteristics. [0124] According to the invention set forth in claim 9, a semiconductor device is equipped with a semiconductor chip, in which the rewiring layer and at least one of the analog circuits, formed on the circuit-formed surface and particularly susceptible to noise, such as the power circuit, operational amplifier, comparison amplifier, RF receiving part, RF transmitting part and RF synthesizer, are arranged not to overlap each other through an insulating layer, for which reason it is possible to obtain a semiconductor device, in which those circuits most susceptible to the adverse effects of noise are least liable to malfunction and deterioration in communication characteristics attributable to electrostatic induction noise or electromagnetic induction noise, and which therefore exhibits superb communication characteristics. [0125] According to the invention set forth in claim 10, a semiconductor device is equipped with a semiconductor chip, in which out of the analog circuits on the circuit-formed surface, the coil particularly susceptible to noise and the rewiring layer are arranged not to overlap each other through an insulating layer, for which reason it is possible to obtain a semiconductor device, in which the coil most susceptible to the detrimental effects of noise is free from the action of electrostatic induction noise or electromagnetic induction noise, and which therefore exhibits superior communication characteristics. [0126] It should be further understood by those skilled in the art that although the foregoing description has been made on embodiments of the invention, the invention is not limited thereto and various changes and modifications may be made without departing from the spirit of the invention and the scope of the appended claims. Referenced byCiting PatentFiling datePublication dateApplicantTitleUS6838773 *Jun 20, 2001Jan 4, 2005Hitachi Maxell, Ltd.Semiconductor chip and semiconductor device using the semiconductor chipUS7157794 *Nov 7, 2002Jan 2, 2007Oki Electric Industry Co., Ltd.Semiconductor device that suppresses variations in high frequency characteristics of circuit elementsUS7268740 *Aug 24, 2004Sep 11, 2007Rcd Technology Inc.Method for forming radio frequency antennaUS7298331Aug 11, 2005Nov 20, 2007Rcd Technology, Inc.Method for forming radio frequency antennaUS7377447Dec 5, 2005May 27, 2008Rcd Technology, Inc.Tuned radio frequency identification (RFID) circuit used as a security device for wristbands and package securityUS7388542Nov 10, 2005Jun 17, 2008Rcd Technology, Inc.Method for an element using two resist layersUS7456506Nov 22, 2005Nov 25, 2008Rcd Technology Inc.Radio frequency identification (RFID) tag lamination process using linerUS7456752May 5, 2004Nov 25, 2008Rcd Technology, Inc.Radio frequency identification sensor for fluid levelUS7515116Aug 10, 2007Apr 7, 2009Rcd Technology, Inc.Method for forming radio frequency antennaUS7545036Sep 28, 2006Jun 9, 2009Oki Semiconductor Co., Ltd.Semiconductor device that suppresses variations in high frequency characteristics of circuit elementsUS7639184Jul 26, 2005Dec 29, 2009Rcd Technology Inc.Method for forming radio frequency antennaUS7698805 *Feb 5, 2008Apr 20, 2010Mutual-Pak Technology Co., Ltd.Method for manufacturing integrated circuit device having antenna conductorsUS7886421 *Mar 2, 2010Feb 15, 2011Mutual-Pak Technology Co., LtdMethod for manufacturing integrated circuit device having antenna conductorsUS7906856Apr 25, 2008Mar 15, 2011Sharp Kabushiki KaishaSemiconductor device and method for manufacturing semiconductor deviceUS7986023Sep 17, 2007Jul 26, 2011Infineon Technologies AgSemiconductor device with inductorUS8030745Feb 28, 2005Oct 4, 2011Semiconductor Energy Laboratory Co., Ltd.ID chip and IC cardUS8159043Mar 9, 2005Apr 17, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8222735 *Oct 12, 2006Jul 17, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and communication system using the semiconductor deviceUS8227802Jul 30, 2010Jul 24, 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS8237569 *Apr 6, 2005Aug 7, 2012Semiconductor Energy Laboratory Co., Ltd.Product management systemUS8314345 *Nov 27, 2009Nov 20, 2012Sanyo Electric Co., Ltd.Device mounting board and semiconductor moduleUS8366009Dec 3, 2011Feb 5, 2013F�inics Amatech TeorantaCoupling in and to RFID smart cardsUS8448870 *Jul 9, 2007May 28, 2013Nxp B.V.Transponder and method of producing a transponderUS8546912Apr 5, 2012Oct 1, 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor deviceUS20080224831 *Apr 6, 2005Sep 18, 2008Semiconductor Energy Laboratory Co., LtdProduct Management SystemUS20090294542 *Jul 9, 2007Dec 3, 2009Nxp B.V.Transponder and Method of Producing a TransponderUS20100147800 *Dec 16, 2008Jun 17, 2010City University Of Hong KongMethod of making foraminous microstructuresDE102008046862B4 *Sep 12, 2008May 5, 2011Infineon Technologies AgHalbleiterstruktur mit Halbleiterchip und mit Induktionsspule und Verfahren zum Ausbilden einer solchenEP1952312A1 *Oct 5, 2006Aug 6, 2008Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and communication system using the semiconductor deviceWO2005088704A1 *Mar 9, 2005Sep 22, 2005Tatsuya AraoSemiconductor deviceWO2007001976A2 *Jun 19, 2006Jan 4, 2007R828 LlcSemiconductor structure with rf elementWO2013020610A1 *Dec 6, 2011Feb 14, 2013F�inics Amatech TeorantaImproving coupling in and to rfid smart cardsWO2013020971A1 *Aug 7, 2012Feb 14, 2013F�inics Amatech TeorantaImproving coupling in and to rfid smart cards* Cited by examinerClassifications U.S. Classification257/208, 257/E23.146, 257/E23.114, 257/E23.079, 257/E21.022International ClassificationH01L23/522, H01L23/552, H01L23/525, H01L23/31, G06K19/077, H01L21/02, H01L23/50Cooperative ClassificationH01L2224/16225, H01L2924/19041, H01L23/50, H01L23/3114, H01L23/552, G06K19/07775, H01L2924/12044, H01L2924/01078, H01L23/525, G06K19/07749, H01L2924/15311, G06K19/07756, H01L23/5227, H01L28/10, G06K19/07779, H01L2924/01057European ClassificationG06K19/077T7C1, G06K19/077T7A, G06K19/077T2E, H01L23/31H1, H01L23/552, G06K19/077T, H01L23/522L, H01L23/525, H01L23/50Legal EventsDateCodeEventDescriptionJun 6, 2012FPAYFee paymentYear of fee payment: 8May 19, 2009ASAssignmentOwner name: KYUSHU HITACHI MAXELL, LTD., JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HITACHI MAXELL, LTD.;REEL/FRAME:022694/0568Effective date: 20090424Jun 20, 2008FPAYFee paymentYear of fee payment: 4Dec 19, 2002ASAssignmentOwner name: HITACHI MAXELL, LTD., JAPANFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KIKUCHI, YUJI;KISHIMOTO, KIYOSHARU;NAKAGAWA, KAZUNARI;AND OTHERS;REEL/FRAME:013817/0619Effective date: 20021125Owner name: HITACHI MAXELL, LTD. 1-88, USHITORA 1-CHOME, IBARAFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KIKUCHI, YUJI /AR;REEL/FRAME:013817/0619RotateOriginal ImageGoogle Home - Sitemap - USPTO Bulk Downloads - Privacy Policy - Terms of Service - About Google Patents - Send FeedbackData provided by IFI CLAIMS Patent Services©2012 Google