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Samsung RC-5521 Service manual
PT-92 Chassis Service Manual
2. Recommendation for service repairs
3. Handling of MOS chip components
4. X-Ray radiation precaution
6. Specification of the connector (Euroscart)
7. Component descriptions
9. Fault tracing diagram-power supply
10. Power Supply circuit diagram
11. Troubleshooting guide for main PCB
12. Descriptions of the integrated circuits
TDA24C16
UOC IC
TV SOUND IC (STEREO)
TV SOUND IC (G. STEREO)
VERTICAL IC (110O)
VERTICAL IC (90O)
STEREO AUDIO AMPLIFIER (110O)
STEREO AUDIO AMPLIFIER (90O)
MONO AUDIO AMPLIFIER (90O)
TV SOUND AM DEMODULATOR
HORIZONTAL TRANSISTOR (110O)
HORIZONTAL TRANSISTOR (90O)
SMPS MOSFET (90O)
SMPS MOSFET (110O)
13. Dolby and secam L mono board and circuits diagrams
14. Oscilloscope shapes
47” / 50 cm / 66 cm
90o / 110o
15.625Hz
100+AV
Flof text
Cable tuner - 8 MHz spacing for Hyper Band
European CCIR system
90o 2x8 Watt Rms 10% distortion
110o 2x4 Watt Rms 10% distortion
Euro AV Socket
In Stby Mode
165-260VAC
110o 126 W; 90o 75 W
110o 8 W; 90o 5 W
RECOMMENDATION FOR SERVICE REPAIRS
ve a shock hazard from the receiver.
Servicing should not be attempted by anyone who is
not thoroughly familiar with the precautions
necessary when working on high voltage equipment.
Perfectly discharge the high potential of the picture
tube before handling the tube. The picture tube is
highly evacuated and if broken.
Glass fragments will be violently expelled.
Always discharge the picture tube anode to the receiver chassis to keep of the shock hazard before removing the anode cap.
8- Keep wire away from the high voltage or high temperature components.
9- When replacing a wattage resistor in circuit board,
keep the resistor 10 mm away from circuit board.
1- Use only original spare parts. Only use components
with the same specifications for replacement.
2- Original fuse value only should be used.
3- Main leads and connecting leads should be checked
for external damage before connection.
4- Parts contributing to the safety of the product must
not be damaged or obviously unsuitable.
This is valid especially for insulators and insulating
5- Thermally loaded solder pads are to be sucked off
and re-soldered.
6- Ensure that the ventilation slots are not obstructed.
7- Potentials as high as 25 KV are present when this receiver is operating. Operation of the receiver
outside the cabinet or with back cover removed invol-
MOS circuit requires special attention with regard to
static charges. Static charges may occur with any highly insulating plastics and can be transferred to persons
wearing clothes and shoes made of synthetic materials. Protective circuits on the inputs and outputs of mos
circuits give protection to a limited extend only due to
Please observe the following instructions to protect the
components against damage from static charges.
red in styropor materials or plastic magazines.
2- Persons have to rid themselves of electrostatic charges by touching MOS components.
3- Hold the component by the body touching the terminals.
4- Use only grounded instruments for testing and processing purposes.
5- Remove or connect MOS ICs when operating voltage is disconnected.
1- Keep mos components in conductive package until
they are used. Most components must never be sto-
1- Excessive high voltage can be produce potentially
hazardous X-RAY radiation. To avoid such hazard,
the high voltage must not be above the specified limit. The nominal value of the high voltage of this receiver is 25KV at zero beam current (minimum
brightness) under 220V AC power source. The high
voltage must not under any circumstance, exceed
30KV. It is recommended the reading of the high vol-
tage be recorded as a part of the service record. It is
important to use an accurate and reliable high voltage meter.
2- The primary source of X-RAY radiation in this TV receiver is the picture tube. For continued X-RAY radiation protection, the replacement tube must be
exactly the same type tube as specified in the part
The service menu is entered by pressing the <SUB-PAGE> key on the RC and VOLUME-DOWN key on the TV simultaneously when the TV is in TV- mode. The service menu is left by pressing the <TV> key.
When entering the service mode the first menu item is IF (selection of normal IF). Next items can be selected using the keys
<PROGRAM-UP> and <PROGRAM-DOWN>. The value of each item can be changed using the keys <VOLUME-UP> and
<VOLUME-DOWN>. The item values are displayed as decimal values, except for the tuner-band-selection, BITS and option
They are displayed as hexa-decimal values. All values are stored in non-volatile memory when the service menu is left. The
“INIT CTV832U” item initializes the NVM: It clears all names and tuning information of all programs and writes default values for the service alignments and preset values in NVM. While doing so, the OSD displays “BUSY”. When the initialization is
finished, the message “READY” is written on the screen.
IF selection (58.8, 45.8, 38.9 or 38.00 MHz)
IF for SECAM-L1 selection (33.4 or 33.9 MHz)
East-west Width for picture setting 16:9
East-west Parabola for picture setting 16:9
East-west Upper Corner parabola for picture setting 16:9
East-west Lower Corner parabola for picture setting 16:9
East-west Trapezium for picture setting 16:9
HP4:3
Horizontal parallelogram for picture setting 4:3
HB4:3
Horizontal bow for picture setting 4:3
EW4:3
East-west Width for picture setting 4:3
PW4:3
East-west Parabola for picture setting 4:3
UCP4:3
East-west Upper Corner parabola for picture setting 4:3
LCP4:3
East-west Lower Corner parabola for picture setting 4:3
TC4:3
East-west Trapezium for picture setting 4:3
Vertical Scan Disable
Vertical zoom (East-west only)
Black Level Red
Black Level Green
White point correction Red
White point correction Green
White point correction Blue
Y-delay adjustment for SECAM
Y-delay adjustment for NTSC
Y-delay adjustment for PAL
Y-delay adjustment for external sources
(ACL=0; FCO= 0; SVO= 0; HP2= 0; FSL= 0; OSO= 0)
(FFI= 0; TV= 0; AV-1= 0; AV-2= 0; AV-2S= 0;
AV-3= 0; AV-3S= 0; AV = 0)
OptByte1
(Default=E3)
Selection PAL-BG
Selection PAL-DK
Selection PAL-I
Selection PAL-M
Selection PAL-N
Selection NTSC-M
Selection NTSC-443
Selection SECAM-BG
*(1) Selected, (0) Not Selected
OptByte2
(Default=07)
Selection SECAM-DK
PalBG Scr
When the PalBG Scr selected, TV searches only
PalBG. Otherwise it searches all. (0)
Selection AV2
OptByte3
(Default=E8)
Vol Bar =
Sub Wof =
When the Hotel mode selected, It’s impossible to
nter menu settings.lt selects the Hotel mode. (1)
OptByte4
(Default=B8)
Set 16:9 mode active
Selection 110/90 Tube
FE-Out
When the power on the TV, it Enables or Disables
OptByte5
(Default=09)
Enable/Disable Clock Menu
1-norma
Flof-Txt
OptByte6
UOC-J
ignrSUP
ignrNDF
Pal-BG/DK
(Default=00)
Start frequency of the low-band in MHz
End frequency of the low-band
Start frequency of the mid-band
End frequency of the mid-band
Start frequency of the high-band
End frequency of the high-band
hex Value needed for switching to the low-band
hex Value needed for switching to the mid-band
hex Value needed for switching to the high-band
16:9 / 4:3 Adjustment
The CTV832U software uses two sets of parameters for the registers HP (horizontal parallelogram), HB (horizontal
bow), EW (EW width), PW (parabola/width), UCP (upper corner parabola), LCP (lower corner parabola)
and IC (EW trapezium). They occur in the service menu for 16:9 screen with the listed abbreviations.
For the 4:3 screen there is a second set of these registers. They occur in the service menu with the extension ‘4:3’
(i.e. HP4:3, HB4:3,...).
Each register set must be adjusted under the right conditions i.e. the 16:9 settings are adjusted with a 16:9 picture the 4:3 settings with a 4:3 picture.
The inenu items EW, PW, UCP, LCP, TC, HP4:3, HB4:3,... TC4:3 and VX will only be in the service menu if the
option 16:9 is set in 4 th option byte.
TUNER PARAMETER IN SERVICE AND DEFINITION
SPECIFICATIONS OF THE CONNECTOR
(EURO SCART)
I- Audio output 1. right channel 0.5 VRMS/<l k 0
2- Audio input 1. right channel 0.5 VRMS (connected to No.6)
3- Audio output 2. left channel 0.5 VRMS (connected to No.1)
4- GND (audio)
6- Audio input 2. left channel 0.5 VRMS/>10k 0
7- RGB input, blue (B)
8- Switch signal video (status)
10- Reserved for clock signals (not connected)
11- RGB input, green (G)
12- Reserved for remote control (not connected)
13- GND
14- GND switch signal RGB
15- RGB input, red (R)
16- Switch signal RGB
17- GND (video)
18- GND19- Video output 1 Vpp/75 ohm
20- Video input 1 Vpp/75 ohm
21- Shield
IW METAL OXIDE RESISTOR
1/2W METAL OXIDE RESISTOR
1/4 OR 1/6W CARBON FILM RESISTOR
CERAMIC CAPACITOR /POLYESTER CAPACITOR
SWITCH JUMPER
NET (INPUT)
NET (OUTPUT)
PT92 110o STEREO CHASSIS
UV1316 PLL
TDA9870A/75A
Triple RGB
TDA935X/6X/8X
TV Signal Proc.
& EHT
E/W (110o)
RC-5 Transmitter
PT92 90o STEREO CHASSIS
PT92 90o MONO CHASSIS
FAULT TRACING DIAGRAM-POWER SUPPLY
supply defective,+145V
is missing or level is wrong
DP 01 ÷ 04
CP 01 ÷ 04
CP 06, TP01
F1 defective
RP 07, RP 05
Voltage at drain
< 8V
varies ca. 8V
Measure +145 V
VAP 01
Control range of
TROUBLESHOOTING GUIDE FOR MAIN PCB
CV37, CV38, XV01
LD02, RD20, DD06
+B voltage, CD18, CD20, CD27, CD08, TV06
Flue picture
RD17, RD06, RD62, R001, Focus adjust
Screen adjust, EHT voltage
TU01, AGC adjust, If adjust
TV01, TV04, TU01
IA50, IA51, IA01, DP17, DP12, RA51, X301, I302, IV01
I302, IC01, L304, CA07, CA06, RA06, RA07, IA01, IA50, IA51
IC02, IV01, TC10
No video on the SCART
IV01, TE01, TE04
No audio on the SCART
I302, TV03
TD01, TD02, DD01, TD04, DD03, DD04, ID50, RD56, IV01
Controller For Switch Mode Power Supplies
The TDA16846 is suited for TV-, VCR-sets and SAT receivers. It also can be good used in PC monitors.
The TDA 16847 is identical with TDA16846 but has an additional power measurement output (pin 8) which can be used
a Temporary High Power Circuit.
Off Time Circuit
Regulation and Zero Crossing Input
Soft-Start and Regulation Capacitor
Opto Coupler Input
Fault Comparator 2
Not Connected (TDA16846)
Reference Voltage and Current
Fault Comparator 1
Primary Voltage Check
Fold Back Point Correction
R6x1/3
ErrorFlipflop
RSTC/RSTF
<25mV
All voltages listed are referenced to ground (0V, Vss) except where noted.
Supply Voltage at Pin 14
Voltage at Pin 1, 4, 5, 6, 7, 9, 10
Voltage at Pin 2, 8, 11
Voltage at Pin 3
Current into Pin 3
Current into Pin 13
V3 < - 0.3V
V13 > - Vcc
V13 < - 0V
MIIL STD 883C
methot 3015.6,
100 PF, 1500Ω
Soldering Time -
Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute
A parallel RC-circuit between this pin and ground determines the ringing suppression time
and the standby-frequency.
A capacitor between this pin and ground and a resistor between this pin and the positive
terminal of the primary elcap quantifies the max. possible output power of the SMPS.
This is the input of the error amplifier and the zero crossing input. The output of a voltage
divider between the control winding and ground is connected to this input. If the pulses at
pin 3 exceed a 5 V threshold, the control voltage at pin 4 is lowered.
This is the pin for the control voltage. A capacitor has to be connected between this pin
and ground. The value of this capacitor determines the duration of the softstart and the
speed of the control.
If an opto coupler for the control is used, it's output has to be connected between this pin
and ground. The voltage divider at pin 3 has then to be changed, so that the pulses at pin
3 are below 5 V.
Fault comparator 2: If a voltage > 1.2 V is applied to this pin, the SMPS stops.
If fixed frequency mode is wanted, a parallel RC circuit has to be connected between this
pin and ground. The RC-value determines the frequency. If synchronized mode is wanted,
sync pulses have to be fed into this pin.
Not connected (TDA16846). / This is the power measurement output of the Temporary
High Power Circuit. A capacitor and a RC-circuit has to be connected between this pin
Output for reference voltage (5 V). With a resistor between this pin and ground the fault
comparator 2 (pin 6) is enabled.
Fault comparator i: If a voltage > 1 V is applied to this pin, the SMPS stops.
This is the input of the primary voltage check. The voltage at the anode of the primary
elcap has to be fed to this pin via a voltage divider. If the voltage of this pin falls below
1 V, the SMPS is switched off. A second function of this pin is the primary voltage dependent fold back point correction (only active in free running mode).
Output signal. This pin has to be connected across a serial resistor with the gate of the
Connection for supply voltage and startup capacitor. After startup the supply voltage is
produced by the control winding of the transformer and rectified by an external diode.
TV signal processor-Teletext decoder with embedded µ-Controller
The various versions of the TDA935X/6X/8X series
combine the functions of a n/ signal processor together with a µ-Controller and US Closed Caption decoder. Most versions have a Teletext decoder on board.
The Teletext decoder has an internal RAM memory
for 1 or 10 page text. The ICs are intended to be
used in economy television receivers with 90o and
110o picture tubes.
The ICs have supply voltages of 8 V and 3.3 V and
they are mounted in S-DIP envelope with 64 pins.
The features are given in the following feature list.
The differences between the various ICs are given in
TV-signal processor
• Multi-standard vision IF circuit with alignment-free PLL
• Internal (switchable) time-constant for the IF-AGC circuit
• A choice can be made between versions with mono
intercarrier sound FM demodulator and versions with
QSS IF amplifier.
• The mono intercarrier sound versions have a selective
FM-PLL demodulator which can be switched to the
different FM sound frequencies (4.5/5.5/6.0/6.5 MHz).
The quality of this system is such that the external
band-pass filters can be omitted.
• Source selection between 'internal’ CVBS and external
CVBS or Y/C signals
• Integrated chrominance trap circuit
• Integrated luminance delay line with adjustable delay
• Asymmetrical ‘delay line type’ peaking in the luminance
• Black stretching for non-standard luminance signals
• Integrated chroma band-pass filter with switchable
• Only one reference (12 MHz) crystal required for the
CL-Controller, Teletext- and the colour decoder
• PAL/NTSC or multi-standard colour decoder with
• Internal base-band delay line
• RGB control circuit with ‘Continuous Cathode
Calibration’, white point and black level off set
adjustment so that the colour temperature of the dark
and the light parts of the screen can be chosen
• Linear RGB or YUV input with fast blanking for external
RGB/YUV sources. The Text/OSD signals are internally supplied from the µ-Controller/Teletext decoder
• Contrast reduction possibility during mixed-mode of
OSD and Text signals
• Horizontal synchronization with two control loops and
• Vertical count-down circuit
• Vertical driver optimized for DC-coupled vertical output
• Horizontal and vertical geometry processing
• Horizontal and vertical zoom function for 16 : 9
• Horizontal parallelogram and bow correction for large
screen picture tubes
• 80C51 µ-controller core standard instruction set and
• 1 µs machine cycle
• 32 - 128Kx8-bit late programmed ROM
• 3 - 12Kx8-bit Auxiliary RAM (shared with Display and
• Interrupt controller for individual enable/disable with
two level priority
• Two 16-bit Timer/Counter registers
• Auxiliary RAM page pointer
• 16-bit Data pointer
• IDLE and Power Down (PD) mode
• 14 bits PWM for Voltage Synthesis Tuning
• 8-bit A/D converter
• 4 pins which can be programmed as general
I/O pin, ADC input or PWM (6-bit) output
• Text memory for 1 or 10 pages
• In the 10 page versions inventory of transmitted
Teletext pages stored in the Transmitted Page Table
(TPT) and Subtitle Page Table (SPT)
• Data Capture for US Closed Caption
• Data Capture for 525/625 line WST, VPS
(PDC system A) and Wise Screen Signalling (WSS)
• Automatic selection between 525 WST/625 WST
• Automatic selection between 625 WST/VPS on line
16 of VBI
• Real-time capture and decoding for WST Teletext in
Hardware, to enable optimized µ-processor throughput
• Automatic detection of FASTEXT transmission
• Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters
• Signal quality detector for video and WST/VPS data
• Comprehensive teletext language coverage
• Full Field and Vertical Blanking Interval (VBI) data
capture of WST data
Teletext and Enhanced OSD modes
Features of level 1.5 WST and US Close Caption
Serial and Parallel Display Attributes
Single/Double/Quadruple Width and Height for
Scrolling of display region
Variable flash rate controlled by software
Enhanced display features including overlining,
Soft colours using CLUT with 4096 colour palette
Globally selectable scan lines per row (9/10/13/16)
and character matrix [12x10, 12x13, 12x16 (VxH)]
Fringing (Shadow) selectable from N-S-E-W direction
Fringe colour selectable
Meshing of defined area
Contrast reduction of defined area
Special Graphics Characters with two planes,
allowing four colours per character
32 software redefinable On-Screen display characters
4 WST Character sets (GO/G2) in single device (e.g.
Latin, Cyrillic, Greek, Arabic)
G1 Mosaic graphics, Limited G3 Line drawing
WST Character sets and Closed Caption Character
set in single device.
8.0/3.3
ViSIF(rms)
video IF amplifier sensitivity (RMS value)
ViVIF(rms)
QSS sound IF amplifier sensitivity (RMS value)
ViAUDIO(rms)
external audio input (RMS value)
ViCVBS(p-p)
external CVBS/Y input (peak-to-peak value)
ViCHORAMA(p-p) external chroma input voltage (burst amplitude)
ViRGB(p-p)
RGB inputs (peak-to-peak value)
ViYIN(p-p)
luminance input signal (peak-to-peak value)
ViUVIN(p-p)
U/V input signal (peak-to-peak value)
1.33/1.05
Vo(IFVO(p-p)
demodulated CVBS output (peak-to-peak value)
Vo(QSSO)(rms)
sound IF intercarrier output in QSS versions (RMS value)
Vo(AMOUT)(rms) demodulated AM sound output in QSS versions (RMS value)
Io(AGCOUT)
tuner AGC output current range
VoRGB(p-p)
RGB output signal amplitudes (peak-to-peak value)
Io HOUT
horizontal output current
Io VERT
vertical output current (peak-to-peak value)
Io EWD
EW drive output current
P1.3TT1
port 1.3 or Counter/Timer 1 input
port 1.6 or I2C-bus clock line
port 1.7 or I2C-bus data line
P2. O/TPWM
port 2.0 or Tuning PWM output
port 3.0 or ADC0 input
P3.1/ADCI
port 3.1 or ADC1 input
port 3.2 or ADC2 input
port 3.3 or ADC3 input
digital ground for µ-Controller core and periphery
port 0.5 (8 mA current sinking capability for direct drive of LEDs)
port 0.6 (8 mA current sinking capability for direct drive of LEDs)
analog ground of Teletext decoder and digital ground of TV- processor
SECAM PLL decoupling
decoupling digital supply of TV-processor
phase-2 filter
phase-1 filter
ground 3 for TV-processor
Automatic Volume Levelling /East-West drive output
vertical drive B output
vertical drive A output
reference current input
vertical sawtooth capacitor
audio deemphasis or SIF input 1
DECSDEM/SIFIN2
decoupling sound demodulator or SIF input 2
ground 2 for TV-processor
narrow band PLL filter / AGC sound IF
AVL/REF0/AMOUT
Automatic Volume Levelling / subcarrier reference output/AM output (non controlled)
flyback input/sandcastle output
external audio input/QSS intercarrier out /AM audio output (non controlled)
EHT/overvoltage protection input
IF-PLL loop filter
IF video output / selected CVBS output
main supply voltage TV-processor (+8 V)
internal CVBS input
AUDEEM/SIFIN1
SNDPLL/SIFAGC
AUDEXT/
2nd supply voltage TV-processor (+8V)
QSSO/AMOUT
ground 1 for TV-processor
external CVBS/Y input
chrominance input (SVHS)
audio output / AM audio output (volume controlled)
2nd RGB /YUV insertion input
2nd R input / V (R-Y) input
G2 YIN
2nd G input Y input
B2 UIN
2nd B input / U (B-Y) input
beam current limiter input/V-guard input
black current input
analog supply of Teletext decoder and digital supply of TV-processor (3.3 V)
OTP Programming Voltage
digital supply to core (3.3V)
oscillator ground supply
digital supply to periphery (+3.3 V)
port 1.0 or external interrupt 1 input
port 1.1 or Counter/Timer 0 input
port 1.2 or external interrupt 0 input
AUDOUT / AMOUT
1. The function of pin 20, 28, 29, 31, 32, 35 and 44 is dependent on the IC version (mono irtercarrier FM demodulator / QSS IF
amplifier and East-West output or not) and on some software control bits. The valid combinations are given in table 1.
Table 1 Pin functions for various versions
East-West Y/N
FM-PLL version
QSS version
CMB1/CMB0 bits
SNDPLL
AUDOUT
controlled AM out
Pin configuration (SDIP 64)
P1.G/SCL
P1.2/ONTO
P1.1/TO
P2.0TPMW
B2/UIN
AUDOUT/AMOUT
DECSDEM/SIFIN(2)
AUDEXT/QSSO/
AVLIREFO/AMOUT
Digital TV sound processor (DTVSP)
• Dual audio ADC from analog inputs to DSP
• Two dual audio Digital-to-Analog Converters (DACs)
for loudspeaker (Main) and headphone (Auxiliary)
outputs; also applicable for L, R, C and S in the
Dolby Pro Logic mode with feature extension.
1.1 Demodulator and decoder section
• Sound IF (SIF) input switch e.g. to select between
terrestrial TV SIF and SAT SIF sources
• SIF AGC with 24 dB control range
• SIF 8-bit Analog-to-Digital Converter (ADC)
• DQPSK demodulation for different standards,
simultaneously with 1-channel FM demodulation
• NICAM decoding (B/G, I and L standard)
• Two-carrier multistandard FM demodulation (B/G,
D/K and M standard)
• Decoding for three analog multi-channel systems
(A2, A2+ and A2*) and satellite sound
• Optional AM demodulation for system L,
simultaneously with NICAM
• Programmable identification (B/G, D/K and M
standard) and different identification times.
The TDA9875A is a single-chip Digital TV Sound
Processor (DTVSP) for analog and digital multi-channel
sound systems in TV sets and satellite receivers.
2.1 Supported standards
The muItistandard/multi-stereo capability of the
TDA9875A is mainly of interest in Europe, but also in
Hong Kong/Peoples Republic of China and South East
Asia. This includes B/G, D/K, 1, M and L standard. In
other application areas there exists only subsets of
those standard combinations otherwise only single
standards are transmitted.
1.2 DSP section
• Digital crossbar switch for all digital signal sources
• Control of volume, balance, contour, bass, treble,
pseudo stereo, spatial, bass boost and soft-mute
• Plop-free volume control
• Automatic Volume Level (AVL) control
• Adaptive de-emphasis for satellite
• Programmable beeper
• Monitor selection for FM/AM DC values and signals,
with peak detection option
• I2S-bus interface for a feature extension (e.g. Dolby
surround) with matrix, level adjust and mute.
M standard is transmitted in Europe by the American
Forces Network (AFN) with European channel spacing
(7 MHz VHF, 8 MHz UHF) and monaural sound.
1.3 Analog audio section
• Analog crossbar switch with inputs for mono and
stereo (also applicable as SCART 3 input), SCART 1
input/output, SCART 2 input/output and line output
• User defined full-level/-3 dB scaling for SCART
• Output selection of mono, stereo, dual A/B, dual A or
• 20 kHz bandwidth for SCART-to-SCART copies
• Standby mode with functionality for SCART copies
• Dual audio digital-to-analog converter from DSP to
analog crossbar switch, bandwidth 15 kHz
An overview of the supported standards and sound
systems and their key parameters is given in Table 1.
The AM sound of L/L standard is normally demodulated
in the 1st sound IF. The resulting AF signal has to be
entered into the mono audio input of the TDA9875A. A
second possibility is to use the internal AM demodulator stage, however this gives limited performance.
Korea has a stereo sound system similar to Europe
and is supported by the TDA9875A. Differences
include deviation, modulation contents and
identification. It is based on M standard.
The analog multi-channel sound systems (A2, A2+ and
A2*) are sometimes also named 2CS (2 carrier
2.1.1 ANALOG 2-CARRIER SYSTEMS
Table 1 Frequency modulation
NOM./MAX./OVER
(kHz/µs)
4.5/4.724
1/2 (L + R)
1/2 (L - R)
15/75 (Korea)
5.5/5.742
27/50/80
6.5/6.742
6.5/6.258
Table 2 Identification for A2 systems
A2/A2*
A2+ (KOREA)
54.6875 kHz = 3.5 x line frequency
55.0699 kHz = 3.5 x line frequency
Stereo identification frequency
117.5 Hz = line frequency
149.9 Hz = line frequency
Dual identification frequency
274.1Hz = line frequency
276.0 Hz = line frequency
2.1.2 2-CARRIER SYSTEMS WITH NICAM
Table 3 NICAM
1. See “EBU specification” or equivalent specification.
2. Not yet defined
2.1.3 SATELLITE SYSTEMS
An important for satellite TV reception is the ‘Astra specification”. The TDA9875A is suited for the
reception of Astra and other satellite signals.
Table 4 FM satellite sound
15/50(1)
m/st/d(2)
15/adaptive(3)
7.38/7.56
7.74/7.92
8.10/8.28
1. For other satellite systems, frequencies of, for example, 5.80, 6.60 or 6.65 MHz can also be
received. A de-emphasis of 60 µs, or in accordance with J17, is available.
2. m/st/d = mono or stereo or dual language sound.
3. Adaptive de-emphasis = compatible to transmitter specification.
plastic shrink dual-in-line package; 64 leads (750 mil)
SOT274-1
AGC, ADC
FM (AM)
A2 DECODER
SCIL1
SCIR2
PCAPL
MOL MOR
Vref(p)
Vref(n)
NICAM clock output at 728 Khz
serial NICAM data output at 728 kHz
first I2C-bus slave address modifier
I2C-bus clock
positive power supply voltage 1 decoupling; analog front-end circuitry
resistor for reference current generator; analog front-end circuitry
sound IF input 2
reference voltage; analog front-end circuitry
sound IF input 1
second I2C-bus slave address modifier
supply ground 1; digital circuitry
digital supply voltage 1; digital circuitry
capacitor for power-on reset
supply ground 4; digital circuitry
I2C-bus word select
I2C-bus data output 2
I2C-bus data output 1
I2C-bus data input 2
I2C-bus data input 1
first test pin; connected to VSSD1 for normal operation
audio mono input
second test pin; connected to VSSD1 for normal operation
external audio input right channel
external audio input left channel
SCART 1 input right channel
SCART 1 input left channel
supply ground 3; digital circuitry
SCART 2 input right channel
SCART 2 input left channel
positive power supply voltage 2 decoupling; audio analog to digital converter circuitry
supply ground 1; analog front-end circuitry
first general purpose I/O pin
second general purpose I/O pin
positive reference voltage; audio analog to digital converter circuitry
PCLKVref(n)
reference voltage ground; audio analog-to-digital converter circuitry
internally connected; note 1
internally connected; note 2
reference voltage; audio analog-to-digital converter circuitry
SCART 1 output right channel
SCART 1 output left channel
supply ground 2; digital circuitry
supply ground 4; audio operational amplifier circuitry
SCART 2 output right channel
SCART 2 output left channel
reference voltage; audio digital to analog converter and operational amplifier circuitry
post filter capacitor pin right channel, audio digital-to-analog converter
post filter capacitor pin left channel, audio digital-to-analog converter
headphone (auxiliary) output right channel
headphone (auxiliary) output left channel
positive analog power supply voltage; analog circuitry
loudspeaker (Main) output right channel
supply supply ground; audio analog-to-digital converter circuitry
supply ground 3; audio analog-to-digital converter circuitry
loudspeaker (Main) output left channel
digital supply voltage 2; digital circuitry
1. Test pin, CMOS level input, pull-up resistor, can be connected to VSS.
2. Test pin, CMOS 3-state stage, can be connected to VSS.
• Two-carrier multistandard FM demodulation (B/G, D/K
and M standard)
• Decoding for three analog multi-channel systems (A2,
A2+ and A2*) and satellite sound
• Programmable identification (B/G, D/K and M standard)
and different identification times.
The TDA9870A is a single-chip Digital TV Sound
Processor (DTVSP) for analog multi-channel sound
systems in TV sets and satellite receivers.
The multistandard/multi-stereo capability of the TDA9870A
is mainly of interest in Europe, but also in Hong
Kong/Peoples Republic of China and South East Asia.
This includes B/G, D/K, I, M and L standard. In other
application areas there exists only subsets of those
standard combinations otherwise only single standards
Forces Network (AFN) with European channel spacing (7
MHz VHF, 8 MHz UHF) and monaural sound.
Korea has a stereo sound system similar to Europe and is
supported by the TDA9870A. Differences include
deviation, modulation contents and identification. It is
based on M standard.
systems and their key parameters is given in.(Table 1).
AP) are sometimes also named 2CS (2 carrier systems).
• Digital crossbar switch for all digital signal sources and
• Analog crossbar switch with inputs for mono and stereo
(also applicable as SCART 3 input), SCART 1
• User defined full-level/-3 dB scaling for SCART outputs
• Two dual audio Digital-to-Analog Converters (DACs) for
loudspeaker (Main) and headphone (Auxiliary) outputs;
also applicable for L, R, C and S in the Dolby Pro Logic
mode with feature extension.
2.1.2 SATELLITE SYSTEMS
An important for satellite TV reception is the ‘Astra specification”. The TDA9875A is suited for the reception of Astra
and other satellite signals.
Table 3 FM satellite sound
1. For other satellite systems, frequencies of, for example, 5.80, 6.60 or 6.65 MHz can also be received. A de-emphasis of 60 µs, or in accordance with J17, is available.
internal connected; note 1
internally connected; note 3
supply ground; audio analog-to-digital converter circuitry
1. Test pin, CMOS 3-state stage, pull-up resistor, can be connected to VSS.
2. Test pin, CMOS level input, pull-up resistor, can be connected to VSS.
3. Test pin, CMOS 3-state stage, can be connected to VSS.
Description of the demodulator and
decodersection
6.1.1 SIF INPUT
Two input pins are provided, SIF1 e.g. for terrestrial TV
and SIF2 e.g. for a satellite tuner. For higher SIF signal
levels the SIF input can be attenuated with an internal
switchable -10 dB resistor divider. As no specific filters
integrated, both inputs have the same specification giving
flexibility in application. The selected signal is passed
through an AGC circuit and then digitized by an 8-bit
operating at 24.576 MHz.
6.1.5 FM AND AM DEMODULATION
The identification of the FM sound mode is performed
AM synchronous demodulation of the pilot signal and
narrow-band detection of the identification frequencies.
The result is available via the I2C-bus interface. A
can be made via the I2C-bus for B/G, D/K and M standard
and for three different modes that represent different
trade-offs between speed and reliability of identification.
6.1.6 CRYSTAL OSCILLATOR
The crystal oscillator (XO) is illustrated in Fig.8 (see
Chapter 12). The circuitry of the XO is fully integrated,
the external 24.576 MHz crystal is needed.
6.1.2 AGC
The gain of the AGC amplifier is controlled from the
output by means of a digital control loop employing
hysteresis The AGC has a fast attack behaviour to
prevent ADC overloads and a slow decay behaviour to
prevent AGC oscillations. For AM demodulation the
must be switched off. When switched off, the control
is reset and fixed gain settings can be chosen
(see table 14; subaddress 0).
The AGC can be controlled via the I2C-bus. Details can
found in the I2C-bus register definitions (see Chapter
6.1.7 TEST PINS
Both test pins are active HIGH, in normal operation of
device they are wired to VSSD1. Test functions are fo
manufacturing tests only and are not available to
customers. Without external circuitry these pads are
down to LOW level with internal resistors.
6.1.8 POWER-ON RESET FLIP-FLOP
The power-on reset flip-flop monitors the internal power
supply for the digital part of the device. If the supply
temporary been lower than the specified lower limit, the
power-on reset bit FOR, transmitter register subaddress O
(see Section 10.4.1), will be set to HIGH. The CLRPOR
slave register subaddress 1 (see Section 10.3.2),
the power-on reset flip-flop to LOW.
6.1.3 MIXER
The digitized input signal is fed to the mixers, which
one or both input sound carriers down to zero IF. A 24bit
control word for each carrier sets the required frequency.
Access to the mixer control word registers is via the
6.1.4 FM AND AM DEMODULATION
An FM or AM input signal is fed via a band-limiting filter
a demodulator that can be used for either FM or AM
demodulation. Apart from the standard (fixed)
de-emphasis characteristic, an adaptive de-emphasis is
available for encoded satellite programs. A stereo
recovers the left and right signal channels from the
demodulated sound carriers. Both the European and
Korean stereo systems are supported.
and right channel volume settings. Contour is adjustable
between 0 and +18 dB with 1 dB resolution. This function
is linked to the volume setting by means of microcontroller
Bass is adjustable between +15 and -12 dB with 1 dB resolution and treble is adjustable between +12 dB with 1 dB
For the purpose of a simple control software in the microcontroller, the decimal number that is sent as an I2C-bus
data byte for contour, bass or treble is identical to the new
contour, bass or treble setting in dBs (e.g. the I2C-bus
data byte +8 sets the new value to +8 dB).
Extra bass boost is provided up to 20 dB with 2 dB resolution. The implemented coefficient set serves merely as an
example on how to use this filter.
The beeper provides tones in a range from approximately
400 Hz to 30 kHz. The frequency can be selected via the
I2C-bus. The beeper output signal is added to the loudspeaker and headphone channel signals. The beeper
volume is adjustable with respect to full scale between 0
and -93 dB with 3 dB resolution. The beeper is not effected by mute.
Soft mute provides a mute ability in addition to volume
control with a well defined time (32 ms) after which the
soft mute is completed. A smooth fading is achieved by a
cosine masking.
6.2.1 LEVEL SCALING
All input channels to the digital crossbar switch (except for
the loudspeaker feedback path) are equipped with a level
adjust facility to change the signal level in a range of ±15
dB. It is recommended to scale all input channels to be 15
dB below full scale (-15 dB full scale) under nominal conditions.
6.2.2 FM (AM) PATH
A high-pass filter suppresses DC offsets from the FM
demodulator, due to carrier frequency offsets, and supplies the monitor/peak function with DC values and an
unfiltered signal, e.g. for the purpose of carrier detection.
The de-emphasis function offers fixed settings for the supported standards (50 µs, 60 µs and 75 µs). An adaptive
de-emphasis is available for Wegener-Panda 1 encoded
A matrix performs the dematrixing of the A2 stereo, dual
and mono signals.
6.2.3 MONITOR
This function provides data words from a number of locations of the signal processing paths to the I2C-bus interface (2 data bytes). Signal sources include the FM
demodulator outputs, most inputs to the digital crossbar
switch and the outputs of the ADC. Source selection and
data read-out is performed via the I2C-bus.
Optionally, the peak value can be measured instead of
simply taking samples. The internally stored peak value is
reset to zero when the data is read via the I2C-bus. The
monitor function may be used, for example, for signal level
measurements or carrier detection.
6.2.5 HEADPHONE (AUXILIARY) CHANNEL
The matrix provides the following functions; forced mono,
stereo, channel swap, channel 1 and channel 2 (or C and
S in Dolby Surround Pro Logic mode).
Volume is controlled individually for each channel in a
range from +24 to -83 dB with 1 dB resolution. There is
also a mute position.
6.2.4 LOUDSPEAKER (MAIN) CHANNEL
stereo, channel swap, channel 1, channel 2 and spatial
There are fixed coefficient sets for spatial settings of 30%,
40% and 52%.
The Automatic Volume Level (AVL) function provides a
constant output level of -23 dB full scale for input levels
between 0 and -29 dB full scale. There are some fixed
decay time constants to choose from, i.e. 2, 4 and 8 s.
Pseudo stereo is based on a phase shift in one channel
via a 2nd-order all-pass filter. There are fixed coefficient
sets to provide 90 degrees phase shift at frequencies of
150, 200 and 300 Hz.
Volume is controlled individually for each channel ranging
from +24 to -83 dB with 1 dB resolution. There is also a
mute position. For the purpose of a simple control software in the microcontroller, the decimal number that is
sent as an I2C-bus data byte for volume control is identical
to the volume setting in dBs (e.g. the 12C-bus data byte
+10 sets the new volume value to +10 dB).
Balance can be realized by independent control of the left
data byte for volume control is identical to the volume setting in dB (e.g. the 12C-bus data byte +10 sets the new
volume value to +10 dB).
and right channel volume settings.
data byte for bass or treble is identical to the new bass or
treble setting in dB (e.g. the 12C-bus data byte +8 sets
the new value to +8 dB).
I2C-bus. The beeper output signal is added to the loudspeaker and headphone channel signals. The beeper volume is adjustable with respect to full scale between 0 and
-93 dB with 3 dB resolution. The beeper is not effected by
6.2.8 CHANNEL TO THE ANALOG CROSSBAR PATH
Level adjust with control positions 0 dB, +3 dB, +6 dB and
+9 dB.
6.2.9 DIGITAL CROSSBAR SWITCH
Input channels to the crossbar switch are from the audio
ADC, I2S1, I2S2, FM path and from the loudspeaker channel path after matrix and AVL.
Output channels comprise loudspeaker, headphone, I2S1,
I2S2 and the audio DACs for line output and SCART.
The I2S1 and I2S2 outputs also provide digital outputs from
the loudspeaker and headphone channels, but without the
beeper signals.
6.2.10 GENERAL
There are a number of functions that can provide signal
gain, e.g. volume, bass and treble control. Great care has
to be taken when using gain with large input signals in
order not to exceed the maximum possible signal swing,
which would cause severe signal distortion. The nominal
signal level of the various signal sources to the digital
crossbar switch should be 15 dB below digital full scale
(15 dB full scale). This means that a volume setting of,
say, +15 dB would just produce a full scale output signal
and not cause clipping, if the signal level is nominal.
Sending illegal data patterns via the I2C-bus will not cause
any changes of the current setting for the volume, bass,
treble, bass boost and level adjust functions.
6.2.6 FEATURE INTERFACE
The feature interface comprises two I2S-bus input/output
ports and a system clock output. Each I2S-bus port is
equipped with level adjust facilities that can change the
signal level in a range of ±15 dB with 1 dB resolution.
Outputs can be disabled to improve EMC performance.
The I2S-bus output matrix provides the following functions;
forced mono, stereo, channel swap, channel 1 and channel 2.
One example of how the feature interface can be used in
a TV set is to connect an external Dolby Surround Pro
Logic DSP, such as the SAA7710, to the I2S-bus ports.
Outputs must be enabled and a suitable master clock signal for the DSP can be taken from pin SYSCLK.
A stereo signal from any source will be output on one of
the I2S-bus serial data outputs and the four processed signal channels will be entered at both I2S-bus serial data
inputs. Left and right could then be output to the power
amplifiers via the Main channel, centre and surround via
the Auxiliary channel.
6.2.11 EXPERT MODE
The TDA9870A provides a special expert mode that gives
direct write access to the internal Coefficient RAM
(CRAM) of the DSP. It can be used to create user-defined
characteristics, such as a tone control with different corner
frequencies or special boost/cut characteristics to correct
the low-frequency loudspeaker and/or cabinet frequency
responses by means of the bass boost filter. However,
this mode must be used with great care.
More information on the functions of this device, such as
the number of coefficients per function, their default values, memory addresses, etc., can be made available
6.2.7 CHANNEL FROM THE AUDIO ADC
The signal level at the output of the ADC can be adjusted
in a range of ±15 dB with 1 dB resolution. The audio ADC
itself is scaled to a gain of -6 dB.
ST24C16, ST25C16, ST24W16, ST25W16
Serial 16 K (2K x 8) Eeprom
• 1 million erase/write cycles, with 40 years data
• Single supply voltage:
- 4.5V to 5.5V for ST24x16 versions
- 2.5V to 5.5V for ST25x16 versions
• Hardware write control versions:
ST24W16 and ST25W16
• Two wire serial interface, fully I2C Bus compatible
• Byte and Multibyte write (up to 8 bytes) for the
• Page write (up to 16 bytes)
• Byte, random and sequent›al read modes
• Enhanced ESD/Latch up performances
150 mil Width
PSDIP8 (B)
0.25mm Frame
This specification covers a range of 16K bits I2C bus
EEPROM products, the ST24/25C16 and the
ST24/25W16. In the text, products are referred to as
ST24/25x16 where “X” is: “C” for Standard version and
“W” for hardware Write Control version.
The ST24/25x16 are 16K bit electrically erasable programmable memories (EEPROM), organized as 8
blocks of 256 x 8 bits. These are manufactured in SGSThomson’s Hi-Endurance Advanced CMOS technology
which guarantees an endurance of one million
erase/write cycles with a data retention of 40 years. The
ST25x16 operates with a power supply value as low as
2.5V. Both Plastic Dual-in-Line and Plastic Small Outline
PBO-PB1
ST24x16
ST25x16
MODE/WC*
Write Protect Enable
PB0, PB1
Protect Block Select
Serial Data Address Input/Output
Multybyte/Page Write Mode
Write Control (W version)
Note: WC signal is only available for ST24/25W16 products
SO8 Pin Connections
DIP Pin Connections
MODE/WC
(PSDIP8)
-0.6 to 6.5
Electrostatic Discharge Voltage (Human Body Model) (2)
Electrostatic Discharge Voltage (Machine Model) (3)
Notes: 1. Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above
those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.
2. 100pF through 1500Ω; MIL-STD-883C, 3015.7
3. 200pF through 0Ω; EIAJ IC-121 (condition C)
The memories are compatible with the I2C standard two
wire serial interface which uses a bi-directional data bus
and serial clock. The memories carry a built-in 4 bit, unique
device identification code (1010) corresponding to the I2C
bus definition. The memories behave as slave devices in
the I2C protocol with all memory with all memory operations
synchronized by the serial clock. Read and write operations
are initiated by a START condition generated by the bus
master. The START condition is followed by a stream of 4
bits (identification code 1010), 3 block select bits, plus one
read/write bit and terminated by an acknowledge bit. When
writing data to the memory it responds to the 8 bits received
by asserting an acknowledge bit during the 9th bit time.
When data is read by the bus master, it acknowledges the
receipt of the data bytes in the same way. Data transfers
are terminated with a STOP condition .
- short - circuit of the output pins (7 and 4)
- short - circuit of the output pins to Vp
The TDA8351 is a power circuit for use in 90o and 100o
120 Hz. The circuit provides a DC driven vertical deflection output circuit, operating as a highly efficient class
• A quard signal in zoom mode.
IO(p-p)
Idiff(p-p)
Vdiff(p-p)
Flyback switch
Thermal data (in accordance with IEC 747-1)
1- A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22Ω resistor
(dependent on lo and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling capacitor of VFB has to be
connected between pin 6 and pin 3. This supply voltage line must have a resistance of 33 Ω (see application circuit Fig.G).
SIL9P
plastic single-in-line power package; 9 leads
SOT131-2
VP VO(guard)
+VO(A)
-VO(B)
I drive(pos)
I drive(neg)
guardoutput voltage
The vertical driver circuit is a bridge configuration. The deflection coil is connected between the output amplifiers, which
are driven in phase opposition. An external resistor (RM)
connected in series with the deflection coil provides internal
feedback information. The differential input circuit is voltage
driven. The input circuit has been adapted to enable it to be
used with the TDA9150A, TDA9151B, TDA9160A, TDA9162,
TDA8366 and TDA8376 which deliver symmetrical current
signals. An external resistor (RCON) connected between the
differential input determines the output current through the
deflection coil. The relationship between the differential input
current and the output current is defined by: Idiff x RCON =
Icoil x RM. The output current is adjustable from 0.5 A (p-p)
to 3 A (p-p) by varying RM. The maximum input differential
Vdiff = 1.5 V (typ), This is recommended because of the
spread of input current and the spread in the value of RCON
voltage VFB. The principle of operating with two supply voltages (class G) makes it possible to fix the supply voltage Vp
optimum for the scan voltage and the second supply voltage
VFB optimum for the flyback voltage. Using this method,
very high efficiency is achieved.
The supply voltage VFB is almost totally available as flyback
voltage across the coil, this being possible due to the absence of a decoupling capacitor (not necessary, due to the bridge configuration). The output circuit is fully protected against
Metal on back
In accordance with the Absolute Maximum Rating System (IEJ 134)
output voltage (pin 7)
Rth vj-c
Rth vj-a
resistance vj-case
resistance vj-ambient in free air
short-circuiting time
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22Ω resistor (dependent on lo and the
inductance of the coil) has to be connected between pin 7 and ground. The decoupling capacitor of VFB has to be connected between pin 6 and
pin 3. This supply voltage line must have a resistance of 33 Ω (see application circuit Fig.6).
2. Io maximum determined by current protection.
3. Up to Vp = 18V.
• Highly efficient fully DC-coupled vertical
The TDA8356 is a power circuit for use in 90o and 100o
internal feedback information. The differential input circuit is
voltage driven. The input circuit has been adapted to enable
it to be used with the TDA9150, TDA9151B, TDA9160A,
TDA9162, TDA8366 and TDA8376 which deliver
symmetrical current signals. An external resistor (RCON)
connected between the differential input determines the
output current through the deflection coil.
the output current is defined by: Idiff X RCON = Icoil X RM.
The output current is adjustable from
0.5 A (p-p) to 2 A (p-p) by varying RM. The maximum input
differential voltage is 1.8 V. In the application it is
recommended that Vdiff = 1.5 V (typ). This is recommended
because of the spread of input current and the spread in the
value of RCON.
this method, very high efficiency is achieved. The supply
voltage VFB is almost totally available as flyback voltage
across the coil, this being possible due to the absence of a
decoupling capacitor (not necessary, due to the bridge
configuration). The output circuit is fully protected against
1. IO maximum determined by current protection.
2. Up to Vp = 18 V.
2x12W Hi-Fi Audio Power Amplifiers with Mute
The TDA2616 is a dual power amplifiers. It has been especially designed for mains fed applications such as stereo
radio and stereo TV.
• No switch-on/switch-off clicks
• Input mute during switch-on and switch-off
• Low offset voltage between output and ground
• Excellent gain balance of both amplifiers
• Hi-Fi accordance with IEC 268 and DIN 45500
• Short-circuit proof and thermal protected
• Mute possibility.
1/2VP/GND
1/2 supply voltage or ground
supply voltage (negative)
supply voltage (positive)
inverting inputs 1,2
I GV I
internal voltage gain
VP = ±16V; THD = 0.5%
–INV1
1/2 VP / GND
+Vref2
–Vref2
–INV2
INV1, 2
In accordance with the Absolute maximum System (IEC 134)
non-repetitive peak output current
TXTAL
short-circuit to ground; note 1
Note to the limiting values
1. For asymmetrical power supplies (with the load short-circued), the maximum unloaded supply voltage is limited to VP = 28 V and with an internal
supply resistance of RS ≥ 4Ω, the maximum unloaded supply voltage is limited to 32 V (with the load short-circuited). For symmetrical power
supplies the circuit is short-circuit-proof up to VP=±21V.
2x6 W Hi-Fi Audio Power Amplifiers with Mute
• Hi-Fi accordance with “IEC 268” and “DIN 45500”
The TDA2615 is a dual power amplifier in a 9-lead plastic single-in-line (SIL9MPF) medium power package. It
has been especially designed for mains fed applications
such as stereo radio and stereo TV.
VS = ±12V; THD = 0.5%
SIL9PPF
plastic single-in-line medium power package with fin ; 9 leads
1/2 Vp/GND
inverting input 1 and 2
current of 300 µA is present at pin 2, the circuit is in the
mute condition.
The TDA2615 is a hi-fi stereo amplifier designed for mains fed applications, such as stereo radio and TV. The circuit is optimally designed for symmetrical power supplies,
but is also well-suited to asymmetrical power supply systems.
An output power of 2 x 6 W (THD = 0.5%) can be delivered into an 8 Ω load with asymmetrical power supply of
±12 V. The gain is internally fixed at 30 dB, thus offering a
low gain spread and a very good gain balance between
the two amplifiers (0.2 dB).
A special feature is the input mute circuit. This circuit disconnects the non-inverting inputs when the supply voltage
drops below ±6 V, while the amplifier still retains its DC
operating adjustment. The circuit features suppression of
unwanted signals at the inputs, during switch-on and
The device is provided with two thermal protection circuits. One circuit measures the average temperature of the
crystal and the other measures the momentary temperature of the power transistors. These control circuits attack at
temperatures in excess of +150 oC, so a crystal operating
temperature of max. +150 oC can be used without extra
distortion. With the derating value of 6 K/W, the heatsink
at RL = 8 Ω and Vs = ±12 V. The measured maximum
dissipation is 7.8 W.
With a maximum ambient temperature of +60 oC, the thermal resistance of the heatsink is:
Rth = ______ -6 = 5.5 K/W.
The internal metal block has the same potential as Pin 5.
The mute circuit can also be activated via pin 2. When a
Operating position; note 1
THD = 0.5%
Po = 4W
THD = 0.5%; note 2
gain unbalance
∆VGND
∆V4-6
VI = 600 mV
MUTE POSITION (AT I MUTE ≥ 300µA)
mute input impedance
∆Voff
offset voltage with respect to
current if pin 2 is connected to pin 5
Mute position; note 5
The TDA8351 is a mono output amplifier contained in a 9
pin medium power package.
The device is designed for battery-fed portable mono
recorders, radios and television.
No switch-on/off clicks
output power in 16 Ω
Vp = 11V
Vp = 11V;
Po = 0.5W
SOT110(1)
1. SOT110-1; 1996 August 21.
output (–)
The TDA7056 is a mono output amplifier, designed for battery-fed portable radios and mains-fed equipment such as
television. For space reasons there is a trend to decrease
the number of external components. For portable applications there is also a trend to decrease the number of battery cells, but still a reasonable output power is required.
The TDA7056 fulfills both of these requirements. It needs
no peripheral components, because it makes use of the
Bridge-Tied-Load (BTL) principle. Consequently it has, at
the same supply voltage, a higher output power compared
to a conventional Single Ended output stage. It delivers an
output power of 1 W into a loudspeaker load of 8 Ω with 6
V supply or 3 W into 16 Ω loudspeaker at 11 V without
need of an external heatsink. The gain is internally fixed at
40 dB. Special attention is given to switch-on/off click suppression, and it has a good overall stability. The load can
be short circuited at all input conditions.
At Tamb = 25 oC; f = 1kHz; Vp = 11V; RL = 16Ω (see Fig. 2)
20 to 20.000
DC-output offset voltage
1. With a load connected to the outputs the quiescent current will increase, the maximum value of this increase being equal to the DC output offset voltage divided by RL.
2. The noise output voltage (RMS value) is measured with Rs = 5 kΩ unweighted (20 Hz to 20 kHz).
3. The noise output voltage (RMS value) at f = 500 kHz is measured with Rs = 0 Ω and bandwidth = 5 kHz. With a practical load (RL = 16Ω, LL =
200 µH) the noise output current is only 50 nA.
4. The ripple rejection is measured with Rs = 0 Ω and f = 100 Hz to 10 kHz.
The ripple voltage (200 mV) is applied to the positive supply rail.
5. Rs=5kΩ.
• DC volume control
• No switch-on and switch-off clicks
• Good overall stability
• Low HF radiation
• ESD protected on all pins.
The TDA7057AQ is astereo BTL output amplifier with DC
volume control. The device is designed for use in TV and
monitors, but are also suitable for battery-fed portable
recorders and radios.
A MCL protection circuit is built-in. The MCL circuit is
activated when the difference in current between the
output terminal of each amplifier exceeds 100 mA (typical
300 mA). This level of 100 mA allows for headphone
applications (single-ended).
Vp = 12 V; RL = 16 Ω
Vp = 12 V; RL = 8Ω
Vp = 12 V; RL = ∞
Pout=0.5w w
DC volume contol 1
OUT2OUT1PGND1
DC volume contol 2
positeve output 2
negative output 2
negative output 1
powwer ground 1
›+i
›–i
citors can be used which results in cost reductions.
The TDA7057AQ is a stereo output amplifiers with two
DC volume control stages. The device is designed for TV
and monitors, but also suitable for battery-fed portable recorders and radios.
In conventional DC volume control circuits the control or
input stage is AC coupled to the output stage via external
capacitors to keep the offset voltage low.
In the TDA7057AQ the two DC volume control stages are
integrated into the input stages so that no coupling capacitors are required and a low offset voltage is still maintained. The minimum supply voltage also remains low.
The BTL principle offers the following advantages:
• Lower peak value of the supply current
• The frequency of the ripple on the supply voltage is twice the signal frequency.
Consequently, a reduced power supply with smaller capa
For portable applications there is a trend to decrease the
supply voltage, resulting in a reduction of output power at
conventional output stages. Using the BTL principle increases the output power.
The maximum gain of the amplifier is fixed at 40.5 dB.
The DC volume control stages have a logarithmic control
characteristic. Therefore, the total gain can be controlled
from +40.5 dB to -33 dB. If the DC volume control voltage
falls below 0.4 V, the device will switch to the mute mode.
The amplifier is short-circuit protected to ground, Vp and
across the load. A thermal protection circuit is also implemented. If the crystal temperature rises above 150 oC the
gain will be reduced, thereby reducing the output power.
Special attention is given to switch-on and switch-off
clicks, low HF radiation and a good overall stability.
Low voltage mono/stereo power amplifier
The TDA7050 is a low voltage audio amplifier for small radios with headphones (such as watch, pen and pocket
radios) in mono (bridge-tied load) or stereo applications.
Limited to battery supply application only (typ. 3 and 4 V)
Operates with supply voltage down to 1.6 V
Fixed integrated gain of 26 dB, floating differential input
Flexibility in use - mono BTL as well as stereo
Small dimension of encapsulation (see package design example)
Total guiescent current (at Vp = 3V)
1.6 to 6.0V
Bridge tied load application (BTL)
Output power at RL = 32Ω
Vp = 3V; dtot = 10%
D.C. output offset voltage between the outputs
noise output voltage (r.m.s. value)
at f = 1 kHz; Rs = 5Ω
dtot =10%; Vp = 3V
dtot =10%; Vp = 4.5V
Channel separation at Rs = 0Ω; f = 1 kHz
8 -lead DIL; plastic (SOT97); SOT97-1; 1996 July 23.
Fig. 2 Output power across the load impedance (RL) as a function of supply voltage (VP) in BTL application. Measurements were made at f = 1 kHz; dtot = 10%; Tamb = 25 oC
Fig. 3 Output power across the load impedance (RL) as a function of supply voltage (VP) in stereo application. Measurements were made at f = 1 kHz; dtot = 10%; Tamb = 25 oC
Vp = 3V; f = 1 kHz; RL = 32 Ω; Tamb = 25 oC; unless otherwise specified
Total guiescent current
D.C. output offset voltage (at Rs = 5Ω)
input impedance (at Rs = ∞)
Vp = 3.0V; dtot = 10%
Vp = 4.5V; dtot = 10%
Bridge tied load application (BTL); see Fig.4
Output power; note 1
Vp = 4.5V; dtot = 10% (RL = 64Ω)
Rs = 5Ω; f = 1 kHz;
Rs = 0Ω; f = 500 kHz; B = 5 kHz
Stereo applications; see Fig 5
Rs = 0Ω; f = 1 kHz
1.Output power is measured directly at the output pins of the IC. It is shown as a function of the supply voltage in
Fig. 2 (BTL application) and Fig. 3 (stereo application).
• Typical bandwidth of 5.5 MHz for an output signal of
60 V (peak-to-peak value)
• High slew rate of 900 V/µs
• Very simple application
• Internal reference voltage of 2.5 V
• Fixed gain of 50
• Black-Current Stabilization (BCS) circuit
The TDA6107Q includes three video output amplifiers in
one plastic DIL-bent-SIL 9-pin medium power
(DBS9MPF) package (SOT111-1), using high-voltage
DMOS technology, and is intended to drive the three
cathodes of a colour CRT directly. To obtain maximum
performance, the amplifier should be used with
black -current control.
plastic DIL-bent-SIL medium power package with fin; 9 leads
SOT111-1
ground (fin)
black current measurement output
cathode output 3
cathode output 2
cathode output 1
In accordance with the Absolute Maximum Rating System (IEC 134); voltages measured with respect to pin 4
(ground); currents as specified in Fig. 1; unless otherwise specified.
input voltage at pins 1 to 3
Vo(c)
cathode output voltage
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices (see “Handling MOS Devices”).
Quality specification “SNW-FQ-611 part D” is applicable and can be found in the “Quality reference Handbook”.
The handbook can be ordered using the code 9397 750 00192.
TCDT1100(G) Series
• Further approvals:
BS 415, BS 7002, SETI: IEC 950,
UL 1577: File No: E 76222
• Base not connected
• CTR offered in 4 groups
• Isolation materials according to UL94-VO
• Pollution degree 2 (DIN/VDE 0110 / resp. IEC 664)
• Climatic classification
55/100/21 (IEC 68 part 1)
• Special construction:
Therefore extra low coupling capacity of typical
0.2 pF, high Common Mode Rejection
According to VDE 0884:
• Rated impulse voltage (transient overvoltage)
VIOTM = 6 kV peak
• Isolation test voltage (partial discharge test voltage)
Vpd = 1.6 kV
• Rated isolation voltage (RMS includes DC)
VlOWM = 600 VRMS (848 V peak)
• Rated recurring peak voltage (repetitive)
VIoRM = 600 VRMS
• Creepage current resistance according to
VDE 0303/1EC 112
Comparative Tracking Index: CTI = 275
• Thickness through insulation ≥ 0.75 mm
ORDER SCHEMATIC
CTR-RANKING
TCDT1100/TCDT1100G
TCDT1101/TCDT1101G
TCDT1102/TCDT1102G
63 to 125%
TCDT1103/TCDT1103G
100 to 2000%
G = Leadform 10.16 mm
tp ≤ 10µs
Tamb ≤ 25 oC
tp/T = 0.5, tp ≤ 10ms
Isolation test voltage (RMS)
2 mm from case t ≤ 10 s
• Adjustment free wideband synchronous AM demodulator
• Audio source-mute switch (low noise)
• Audio level according EN50049
• 5 to 8 V power supply or 12 V alternative
The TDA9830, a monolithic integrated circuit, is designed for AM-sound demodulation used in L- and L’-standard.
The IC provides an audio source selector and also mute switch.
supply voltage (alternative)
I14,11
IF sensitivity (RMS value) (for -3 dB AF-signal)
AF output signal (m - 54%) (RMS value)
V7,9
S/N ratio ace. CCIR468-3 (IF-signal 10 mVRMS)
AF input signal (for THD < 1.5%) (RMS value)
crosstalk and mute attenuation
SOT38GG(1)
TDA9830T
SOT109(2
1. SOT38-1; 1996 November 20.
2. SOT109-1 1996 Novembe r20.
sound IF differential input signal
REF voltage filtering capacitor
AM demodulator output
input signal (from AM) to audio switch
output signal from audio switch
input signal (from external) to audio switch
switch input select control
supply voltage +12 V (alternative)
ground (O V)
supply voltage +5 to +8 V
Vp1 = 5.0 V at pin 14; Tamb = +25 OC; sound carrier fsc = 32.4 MHz modulated with f = 1 kHz and modulation depth
m = 54%. IF input signal (sound carrier): V1-16 10 mVRMS; unless otherwise specified.
V14-13
positive supply voltage Vp1
positive supply voltage Vp2
I11/I14
IF amplifier and gain control
minimum IF input signal (RMS value)
maximum IF input signal (RMS value)
fast AGC discharging current
maximum AGC charging/discharging current
V3 - V13
gain control voltage (Gmin - Gmax)
–3dB IF bandwidth
V1/16-13
AM-Demodulator
AF output signal (RMS value)
-3 dB AF bandwidth
frequency; note 7
S/N (weighted acc. CCIR 468-3)
(emitter follower with 0.5 mA bias current)
I6abs
allowable AC output current
allowable DC output current
V7,9-13
AF-input-signal for THD < 1.5%
(RMS value)
S/N ratio of audio switch
(in accordance with CCIR 468-3)
at pin 7/9 is
THD at 1 VRMS input signal at pin 7 or 9
V7,8,9-13
R7,9-13
G7,9-8
gain of audio switch
audio switching voltage to activate pin 7
audio switching voltage to activate pin 9
input voltage for MUTE-ON
input voltage for MUTE-OFF
I10, 12
output current of switching-pins at
V 10,12-13= 0V
DC-plop at AF output pin with switching
from internal to external audio signal or
to mute-state or vice-versa
Ripple rejection note 6
AF signal output:
αRR = Vripple On Vp / Vripple On Vout
AF signal output with AF signal from
1. In the power supply voltage range Vpl = 5.0 V UP to 8.0 V the performance will not change essentially. With
power supply from Vp2 = 12.0 V the performance will be comparable with the performance at Vpl = 5•0 V UP fo
8.0 V.
The unused power supply pin must be not connected.
2. Start of gain control (low IF input signal) at -3 dB AF signal reduction at pin 6.
3. End of gain control (high IF input signal) at +1 dB AF signal expansion at pin 6.
4. This state is also valid for pin left open-circuit.
5. If a DC-plop of about maximum 100 mV is acceptable when switching from internal to external audio-signal or
from internal to mute state or vice versa, the capacitor between pin 6 and 7 can be omitted and pin 6 can be connected to pin 7.
6. Measured with Vripple = 200 mV(p-p) at 70 Hz superimposed on supply voltage Vp.
7. Dependent on value of AGC capacitor.
Dolby Pro Logic Surround; Incredible Sound
• Incredible sound functions
• 5-band parametric equalizer on main channels left, centre, right (fs = 32 kHz)
• Tone control (bass/treble) on all four output channels (fs
= 44.1 kHz).
• Two stereo I C-bus digital input channels
• Three stereo I2C-bus digital output channels
• I2C-bus mode control
• Up to 45 ms on-chip delay-line (fs = 44.1 kHz)
• Optional clock divider for crystal oscillator
• Package: SO32L
• Operating supply voltage range: 4.5 to 5.5 V.
This data sheet describes the 104 ROM-code version of
the SAA7710T chip. The SAA7710T chip is a high quality
audio-performance digital add-on processor for digital sound systems. It provides all the necessary features for
complete Dolby Pro Logic surround sound on chip.
In addition to the Dolby Pro Logic surround function, this
device also incorporates a 5-band parametric equalizer, a
tone control section and a volume control. Instead of
Dolby Pro Logic surround, the Hall/matrix surround and
Incredible sound functions can be used together with the
equalizer or tone control.
• 4-channel active surround, 20 Hz to 20 kHz
(maximum 1/2fs)
• Adaptive matrix
• 7 kHz low-pass filters
• Adjustable delay for surround channel
• Modified Dolby B noise reduction
• Noise sequencer
• Variable output matrix
• Centre mode control: on/off, normal, phantom, wide
• Automatic balance and master level control with DC-offset filter
• Hall/matrix surround sound functions
∆vDD
voltage difference between two VDDx pins
Remark Dolby* Dolby’ and ‘Pro Logic’ are trademarks of Dolby Laboratories Licensing Corporation. They are available
only to licensees of Dolby Laboratories Licensing Corporation, San Francisco, CA94111, USA, from whom licensing and
application information mus be obtained.
SAA7710T/N104
plastic small outline package; 32 leads; body width 7.5 mm
I S-input2
I2S-input1
DSP-RESET
I2S-WSIN2
I S-BCKIN2
I2S-DATAIN2
I2S-DATAIN1
I2S-WSIN1
I2S-BCKIN1
DSP-OUT2
DSP-OUT1
DSP-IN2
DSP-IN1
I2S OUT 2
I2S OUT 1
SHTCB
3 OR 5-BAND
DOLBY PRO LOGIC L
HALL/MATRIX
MGE751
VSS-XTAL
VDD-XTAL
I2S-DATAOUT3
I2S-DATAOUT2
I2S-DATAOUT1
I S-WSOUT
I2S-BCKOUT
I2S outputs
I2S-WSOUT
I2S-bus slave word-select output
I2S-bus slave bit-clock output
asynchronous reset test control
block input (active LOW)
clock divider switch eneble
input (LOW = divide)
flag input 1
flag input 2
flag output 1
flag output 2
I2C-bus slave adress
I2S-bus serial clock input
chip reset input (active LOW)
ground power supply crystal
positive power supply crystal
I S-BCKOUT
SCHTCP
I2S-BCKIN2
I2S-bus master bit-clock input 1
I2S-bus master word-select
I S-DATAIN1
I2S-bus master data input 1
I2S-bus master data input 2
I2S-bus master bit-clock input 2
I2S-bus slave data output 1
I2S-bus slave data output 2
I2S-bus slave data output 3
In accordance with the Absolute Maximum Rating System (IEC134)
voltage difference between two VDDx, pins
DC input clamp diode current
Vi < -0.5 V or
Vi > VDD + 0.5 V
DC output clamp diode current output
type 4 mA
V0 < -0.5 V or
V0 > VDD + 0.5 V
DC output source or sink current output
-0.5 V < V0 < VDD + 0.5 V
DC VDD supply current per pin
DC Vss supply current per pin
ESD sensitivity for all pins
machine model all pins except pin OSC
machine model pin OSC
100 pF; 1500 Ω
200 pF; 2.5 µH; O Ω
200 pF; 2.5 µH; 0 Ω
CIC spec/test method
VDD1 = VDD2 = VDD3 = VDD-XTAL = 4.5 to 5.5 V; Tamb = -40 to +85 OC; note 1; unless otherwise specified.
VDDtot
IDD(tot)
total DC supply voltage
total DC supply current
DSP frequency=18 MHz;
0.7VDDX
0.8VDDX
maximum activity DSP
pin types 11, 12 and 13
all digital inputs and I/OS
pin type 14
0.3VDDX
0.2VDDX
0.33VDDX
VDDX = 4.5 V; Io = -4 mA;
pin type 01 and 02
VDDX=4.5 V; I0 = 4 mA;
pin types 13, 01 and 02
Vi = O or VDDX voltage;
pin type I1
V0 = O or VDDX voltage;
pin type 13 and O2
Rpu(VDDX)(int)
internal pull-up resistor to
Rpd(VSSD)(int)
pin type I2
1. VDDX = VDD-XTAL.
Enhanced performance, new generation, high voltage, high-speed switching npn transistor in a plastic full-pack envelope, intended for use in horizontal deflection circuits of colour television receivers. Features exceptional envelope to
base drive and collector current load variations resulting in a very low worst case dissipation.
VBE = 0V
collector - emitter voltage peak value
collector - emitter voltage (open base)
Ths ≤ 25 oC
Ic = 4.5 A; IB = 1.1 A
Icsat = 4.5 A; IB = 1.1 A
PINNING - SOT199
– IB (AV)
Reverse Base current
Reverse Base current peak value
Ic=4.5A; IB=1.1 A
Icsat=4.5A; IB(end)=1.1 A
without heatsink compound
ISOLATION LIMITING VALUE & CHARACTERISTICS
Ths = 25 oC; unless otherwise specified
Repetitive peak voltage from
all three terminals to external
Capaticance from T2 to
R.H.≤ 65%; clean and dustfree
Collector cut-off current 2
Emitter -basebreakdown voltage
Base-emitter saturation voltages
VEB = 6.0 V; IC = OA
IB = 1mA
IB = 0A; Ic = 100 mA;
IC = 4.5 A; IB = 1.1 A;
IC = 4.5 A; IB = 1.7 A;
IC = 100 mA; VCE = 5 V
IC = 4.5 mA; VCE = 1 V
Switching times (16 kHz line
deflection circuit)
IE = 0A; VCB = 10V; f= 1 MHz
ICsat = 4.5 A; IB(end) = 1.1 A; LB = 6 µH;
-VBB = 4V (-dB/dt = 0.6 A/µs)
Turn-off storage time
Switching times (38 kHz line
ICsat = 4.0 A; IB(end) = 0.9 A; LB = 6 µH;
2 Measured with half sine-wave voltage (curve tracer)
Fig. 7 Typical base-emitter saturation voltage.
VBEsat = f (Ic); parameter IC/IB
Fig. 10 Typical collector-emitter saturation voltage.
VCEsat = f (IB); parameter IC
Fig. 8 Typical collector-emitter saturation voltage.
VCEsat = f (Ic); parameter IC/IB
Fig. 11 Typical turn-off losses. Ti = 85 oC
Eoff = f (IB); parameter IC; f = 16 kHz
Fig. 9 Typical base-emitter saturation voltage.
VBEsat = f (IB); parameter IC
Fig. 12 Typical collector storage and fall time.
ts = f (IB); tf = f (IB); parameter IC; Tj =85 oC; f = 16 kHz
High voltage, high-speed switching non transistor in a fully isolated SOT199 envelope with integrated efficiency diode,
primarily for use in horizontal deflection circuits of colour television receivers.
f = 16kHz
IF = 4.5 A; f = 16 kHz
Icsat = 4.5 A; IB(end) = 1.1 A
VBE = 0V; VCE = VCESMmax
IC = 4.5A; IB = 1.1A;
IC = 4.5A; IB = 2.0A;
IC = 100 mA; VCE = 5V
IF = 4.5A
Transition frequency at f = 5 MHz
IC = 0.1 A; VCE = 5V
VCB = 10V
ICsat = 4.5A; IC 1MHz; CFB = 4 nF
IB(end) = 1.4A; LB = 6 µH; VBB = -4 V;
-IBM = 2.25A
1 Measured with half sine-wave voltage (curve tracer)
Fig. 7 Typical collector-emitter saturation voltage.
Fig. 5 Typical collector-emitter saturation voltage.
Fig. 6 Typical base-emitter saturation voltage.
VBEsat = f (Ic); parameter IC
Fig. 8 Normalised power dissipation
PD% = 100 PD/PD 25 C = f (Ths);
SPP03N60S5 / SPB03N60S5
Periodic avalanche proved
Optimized capacitances
Former development designation:
SPPx4N60S5/SPBx4N60S5
VPT05155
VPT05164
Q67040-S4184
Q67040-S4197
at Tj = 25 oC; unless otherwise specified
TC = 100 oC
Pulsed drain current, tp = 1ms (1)
ID =3.2A, VDD = 50V, RGS = 25Ω
Periodic avalanche energy EAR only limited by Tjmax
IS = 3.2 A, VDS<VDSS, di/dt = 100 A/µs,
Tjmax = 150 oC
Thermal resistance, junction - case
Thermal resistance, junction - ambient
(Leaded and through-hole packages)
SMD version, device on PCB
@ min. footprint
@ 6 cm2 cooling area (2)
VGS = 0V, ID = 0.25 mA
Gate threshold voltage, VGS = VDS
ID = 135 µA, Tj = 25 oC
Zero gate voltage drain current, VDS = VDSS
VGS = 0V, Tj = 25 oC
VGS = 0V, Tj = 150 oC
VGS = 20V, VDS = 0V
VGS = 10V, ID = 2A
1 current limited by T
2 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm
thick) copper area for drain connection. PCB is vertical without blown air.
SPP04N60S5 / SPB04N60S5
SPPx6N60S5/SPBx6N60S5
Q67040-S4200
ID = 4.5A, VDD = 50V, RGS = 25Ω
IS = 4.5 A, VDS<VDSS, di/dt = 100 A/µs,
@ 6 cm cooling area (2)
ID = 200 µA, Tj = 25 oC
VGS = 10V, ID = 2.8A
PT-92 DOLBY BOARD
PT-92 SECAM L
99TA020
EX. AUD
IF 2-S
BCS47B
IF2-S
IF 1-S
1N2F
IF1-S
PT-92 SECAM L/L’ MONO MODUL
CL06 CL02
100MF 100MF
PT-92 DOLBY MODUL
WSOUT
BCKOUT
BCKIN2
DSPIN1
DSPOUT1
DSPOUT2
99TA019
DATAOUT3
WSIN2
DATAIN2
WSIN1
BCKIN1
USSXTAL
OSCILLOSCOPE SHAPES
1) 5usn/div 100 volt/div
2) 20msn/50 volts/div
3) 10 usn/div 250 volt/div
4) 5 msn/div 0.5 volt/div
Drain of TP01
Collector of TD01
Collector of TD02
I V01 pin 22
5) 5msn/div 20 volts/div
6) 20usn/2 volts/div
7) 20usn/2 volts/div
8) 20usn/2 volts/div
I D50 pin 4
I V01 pin 34
I V01 pin 48
I V01 pin 47
9)10 usn/2 volts/div
10) 20 usn/0.5 volt/div
11) 20usn/1 volt/div
I V01 pin 46
I V01 pin 33
I V01 pin 40
Turbo-V60 Leak Detector PCB Controller
F 19 SERVICE MANUAL
Capital PRO-3N User`s guide
SERVICE MANUAL FE
Multimedia Processor for Mobile Applications (EMMA
CoolSET™-F2
SERVICE MANUAL - Planetatecnico
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