Source: https://patents.google.com/patent/KR20160117505A/en
Timestamp: 2020-01-18 18:03:25
Document Index: 335890587

Matched Legal Cases: ['Application No. 61', 'Application No. 14', 'Application No. 13', 'Application No. 61', 'Application No. 61', 'Application No. 62', 'Application No. 62', 'Application No. 14']

KR20160117505A - Method and apparatus for low power chip-to-chip communications with constrained isi ratio - Google Patents
Method and apparatus for low power chip-to-chip communications with constrained isi ratio Download PDF
KR20160117505A
KR20160117505A KR1020167023379A KR20167023379A KR20160117505A KR 20160117505 A KR20160117505 A KR 20160117505A KR 1020167023379 A KR1020167023379 A KR 1020167023379A KR 20167023379 A KR20167023379 A KR 20167023379A KR 20160117505 A KR20160117505 A KR 20160117505A
KR1020167023379A
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2014-02-02 Priority to US201461934804P priority Critical
2014-02-02 Priority to US61/934,804 priority
2015-02-02 Application filed by 칸도우 랩스 에스에이 filed Critical 칸도우 랩스 에스에이
2015-02-02 Priority to PCT/US2015/014147 priority patent/WO2015117102A1/en
2016-10-10 Publication of KR20160117505A publication Critical patent/KR20160117505A/en
230000002829 reduced Effects 0 abstract claims description 78
230000011664 signaling Effects 0 abstract description 92
241000591215 Acraea andromacha Species 0 description 17
229920002401 polyacrylamides Polymers 0 description 11
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An efficient communication device for vector signaling code for transmitting data and optionally a clocking signal between integrated circuit devices is described. A method of designing such devices and their associated codes is described herein based on a new metric, referred to as the "ISI ratio ", which allows for faster communication speeds, lower system power consumption, and reduced implementation complexity .
METHOD AND APPARATUS FOR LOW POWER CHIP-TO-CHIP COMMUNICATIONS WITH CONSTRAINED ISI RATIO &lt; RTI ID = 0.0 &gt;
This application claims priority to U.S. Provisional Patent Application No. 61 / 934,803, filed Feb. 2, 2014, by Ali Hormati and Amin Shokrollahi entitled "Method for Code Evaluation using ISI Ratio" The patent application is incorporated herein by reference in its entirety for all purposes.
U.S. Patent Application Publication No. 2011/0268225, filed May 20, 2010, entitled " Orthogonal Differential Vector Signaling ", filed on May 20, 2010 in the name of Harm Cronie and Amin Shokrollahi I ");
Filed on February 17, 2011 under the names of Harm Cronie, Amin Shokrollahi and Armin Tajalli, entitled " Methods and Systems for Noise Resilient, Pin-Efficient and Low Power Communications with Sparse Signaling Codes, 13 / 030,027, hereinafter identified as [Cronie II];
Chip-1, filed January 17, 2014, in the name of John Fox, Brian Holden, Peter Hunt, John D Keay, Amin Shokrollahi, Richard Simpson, Anant Singh, Andrew Kevin John Stewart, and Giuseppe Surace. US Patent Application No. 14 / 158,452, hereinafter " Fox I ", which is identified as &quot; Fox-to-Chip Communication with Reduced SSO Noise &quot;;
The invention is referred to as "Methods and Applications", filed February 11, 2014, in the name of John Fox, Brian Holden, Peter Hunt, John D Keay, Amin Shokrollahi, Richard Simpson, Andrew Kevin John Stewart, Giuseppe Surace, and Roger Ulrich. United States Patent Application Serial No. 14 / 178,051, hereinafter &quot; Fox II &quot;; &quot; Systems for High Bandwidth Chip-to-Chip Communications Interface &quot;;
Brian Holden, Amin Shokrollahi and Anant Singh, entitled " Methods and Systems for Skew Tolerance in Vector Signaling Codes for Chip-to-Chip Communication ", filed on March 15, Patent Application No. 13 / 842,740, hereinafter identified as Holden I;
U.S. Provisional Patent Application No. 61 / 839,360 ("Shokrollahi I"), entitled "Vector Signaling with Reduced Receiver Complexity," filed June 23, 2013 in the name of Amin Shokrollahi;
U.S. Provisional Patent Application No. 61 / 839,360 ("Shokrollahi II"), entitled "Vector Signaling Codes with Reduced Receiver Complexity," filed June 23, 2013 in the name of Amin Shokrollahi.
US Patent Application Serial No. 61 / 946,574 entitled " Clock Embedded Vector Signaling Codes " filed February 28, 2014 in the name of Amin Shokrollahi, Brian Holden, and Richard Simpson, hereinafter referred to as [Shokrollahi III] Identified.
US Patent Application No. 62 / 015,172, entitled " Vector Signaling Codes with Increased Signal to Noise Characteristics, " filed on July 10, 2014 in the name of Amin Shokrollahi and Roger Ulrich, hereinafter referred to as [Shokrollahi IV] Identified.
Filed on May 15, 2013, entitled " Circuits for Efficient Detection of Vector Signaling Codes for Chip-to-Chip Communications Using Sums of Differences, " filed May 15, 2013 by Roger Ulrich and Peter Hunt, 895,206, hereinafter referred to as [Ulrich I].
US Patent Application No. 62 / 026,860, entitled " Bus Reversible Orthogonal Differential Vector Signaling Codes, " filed July 21, 2014, in the name of Roger Ulrich and Amin Shokrollahi, hereinafter identified as [Ulrich II]. .
U.S. Patent Application No. 14 / 315,306, entitled " Multilevel Driver for High Speed Chip-to-Chip Communications, " filed on June 25, 2014 in the name of Roger Ulrich, being.
The following additional references to the prior art are incorporated herein by reference:
U.S. Patent No. 7,053,802, entitled " Single-Ended Balance-Coded Interface with Embedded-Timing, " filed April 22, 2004 and issued May 30, 2006 under the name William Cornelius, Identified as [Cornelius];
U.S. Patent No. 8,649,460, entitled " Techniques for Multi-Wire Encoding with an Embedded Clock, " filed on March 11, 2010 and issued on February 11, 2014 in the names of Frederick Ware and Jade Kizer, Hereinafter, it is identified as [Ware].
FIELD OF THE INVENTION The present invention relates generally to the field of communications, and more particularly to the transmission and reception of signals that can carry information within and between devices.
In communication systems, the goal is to convey information from one physical location to another. The transmission of this information is typically desirable to be reliable, fast and to consume a minimal amount of resources. One common communication medium is a serial communication link, which may be a single wire circuit based on a ground or other common reference, or a plurality of common reference points on a ground or other common reference point. May be based on this circuit of FIG. A common example uses singled-ended signaling ("SES"). SES operates by transmitting a signal on one line and measuring that signal with respect to a fixed reference point in the receiver. The serial communication link may also be based on multiple circuits used in conjunction with each other. A common example of the latter is the use of differential signaling ("DS"). Differential signaling works by sending one signal on one line and the opposite signal on the matching line. The signal information is represented by the difference between the lines, not the absolute value of the lines relative to the ground or other fixed reference point.
There are a number of signaling methods that maintain the desired characteristics of the DS while increasing the pin efficiency through the DS. Vector signaling is one way of signaling. In vector signaling, a plurality of signals on a plurality of lines are collectively considered, but each of the plurality of signals may be independent. Each of the bundle signals is referred to as a component and the number of the plurality of circuits is referred to as the "dimension" of the vector. In some embodiments, in the case of a DS pair, And thus in some cases the dimension of the vector may represent the number of degrees of freedom of the signal on a plurality of lines instead of the exact number of lines in the plurality of lines.
Any suitable subset of the vector signaling code represents the "subcode" of that code. These sub-codes may themselves be vector signaling codes. In binary vector signaling, each component or "symbol" of a vector has one of two possible values. In non-binary vector signaling, each symbol has a value that is selected from a set of more than two possible values. The set of all values necessary to represent all symbols is referred to as the "alphabet" of the code. Thus, as an example, a binary vector signaling code needs at least two alphabets, while a ternary vector signaling code needs at least three alphabets. When transmitted as a physical signal on a communication medium, the symbol may be represented by a particular physical value appropriate for that medium; By way of example, in one embodiment, a voltage of 150 mV may represent a "+1" symbol and a voltage of 50 mV may represent a "-1" symbol, while in other embodiments "+1" And "-1" may be represented by -800 mV.
The vector signaling code is an aggregate (C) of vectors having the same length N, referred to as codewords, as described herein. The ratio between the binary logarithm of size C and the length N is referred to as the pin efficiency of the vector signaling code. Orthogonal Differential Vector Signaling or ODVS codes of [Cronie I], [Cronie II], [Fox I], [Shokrollahi I], [Shokrollahi II], and [Shokrollahi III] are examples of vector signaling codes And is used herein for illustrative purposes.
Inter-symbol interference (ISI) is a distortion of a symbol to be decoded at a receiver due to the residual effect of a symbol previously transmitted through the system. This effect is mainly due to the characteristics of the underlying communication channel and is often a limiting feature that excludes faster speed or lower error communication. Well known examples of channel vulnerability to ISI include wireless communication with band limited channels and multipath interference in a wireline system. Since the ISI degradation is deterministic, it is desirable to offset the effect before attempting to decode the current symbol to obtain the embedded information of the current symbol. In some cases, the previously transmitted sequence of symbols may be constructively combined to maximize their impact on the detection margin of the current symbol. A method of quantifying and minimizing the impact of a pattern and the destructive behavior of a pattern is a major concern in the design of a communication system, since these worst case symbol patterns generally occur with a high probability of comparison with the target error rate of the system. In addition to this temporary identification of problematic patterns, there is no reliable metric for evaluating the impact of ISI on communication system performance, and there is no metric to suggest channels or coding modifications to mitigate such effects .
One way to deal with the ISI problem is to use an equalizer that makes the equivalent channel ISI-free. The equalizer is a functional processing block or circuit that attempts to reverse the channel in such a way that the transmitted data in each symbol interval is (ideally) independent of the other symbols transmitted through the system. In a serializer-deserializer (SerDes), Finite Impulse Response Filtering (FIR) and Continuous Time Linear Equalization (CTLE) are used at the transmitter and receiver sides of the system (DFE) is a well known nonlinear equalization method on the receiver side, while DFE (Decision Feedback Equalization) is a well known nonlinear equalization method. For the field practitioner, other equalization methods such as the Tomlinson-Harashima precoding method are also known. Such precoding is often equivalent to equalization at the transmitter. On the other hand, the equalizer may be expensive in terms of implementation complexity, power consumption, and calibration requirements, especially in a few gigabit / second communication system. Thus, there is a need for both metrics that accurately reflect the impact of ISI on communication system performance, and metrics for channel processing solutions that mitigate ISI effects in an efficient and high performance manner.
1 illustrates one embodiment of a communication system according to the present invention.
Figure 2 shows the case of differential signaling on two lines transmitting one bit per symbol.
Figure 3 shows the case of PAM-4 signaling on two lines transmitting two bits per symbol.
Figure 4 illustrates the pulse response of an exemplary channel used for the simulations herein.
Figure 5 shows an eye diagram for the MIC embodiment of the first example of a P3 receiver.
Figure 6 shows an eye diagram for the MIC embodiment of the second example of a P3 receiver.
Figures 7A-7E show eye diagrams for five subchannels of a 5b6w code receiver.
Figures 8A-8C show an eye diagram for three subchannels of an ENRZ code receiver.
Figures 9a and 9b show an eye diagram for the 4.5b5w code of [Shokrollahi I].
Figures 10A and 10B show an eye diagram for an 8b8w code.
11 is a graph comparing the performance of NRZ, PAM-4, and ENRZ signaling over the same channel model.
Figure 12 shows an eye diagram for NRZ as an example of a common practice signaling method on this channel.
Figure 13 shows an eye diagram for PAM-4 as an example of a common implementation signaling method on this channel.
14 is a block diagram of a glasswing receiver.
15 is a block diagram of a glass wing receiver for restoring an embedded clock.
16 is a schematic diagram of one embodiment of a multiple input comparator with input weights as defined by row 6 of the matrix of Equation 3 with and without equalization.
17 is a schematic diagram of an alternative embodiment of a multiple input comparator with input weights as defined by row 6 of the matrix of Equation 3 with and without equalization.
18 is a schematic diagram of one embodiment of a multiple input comparator with input weights as defined by row 3 of the matrix of Equation 3 with and without equalization. It may also be used to implement the comparator of row 5 of the matrix of Equation 3, if the line inputs are appropriately substituted.
19 is a schematic diagram of an alternative embodiment of a multiple input comparator with input weights as defined by row 3 of the matrix of Equation 3 with and without equalization. It may also be used to implement the comparator of row 5 of the matrix of Equation 3, if the line inputs are appropriately substituted.
20 is a schematic diagram of one embodiment of a multiple input comparator with input weights as defined by row 2 of the matrix of Equation 3 with and without equalization. It may also be used to implement the comparator of row 4 of the matrix of Equation 3, as appropriate substituting the line inputs.
Equation 21 is a block diagram of one embodiment of a glass wing 5b6w transmit driver.
Equation 22 is a block diagram of one embodiment of a glass wing 5b6w_10_5 transmit driver.
23 is a flowchart of a transmission method.
24 is a flowchart of a receiving method.
1 illustrates an embodiment of a communication system according to the present invention utilizing a vector signaling code. The source data to the transmitter 110, illustrated here as S 0 , S 1 , S 2 , S 3 , and S 4 , enter the encoder 112 as the source data word 100. The size of the source data word may vary and depends on the parameters of the vector signaling code. Encoder 112 generates a code word of a vector signaling code, which is designed for the vector signaling code. In operation, a codeword generated by the encoder 112 may be transmitted to each of the N communication lines 125 of the communication channel 120 by two, three, Is used to control the PMOS and NMOS transistors in the driver 118, which produce a different voltage or current. In the embodiment of Figure 1, the size of the source data word is shown as five bits and the codeword size is six symbols. Thus, the communication channel 110 is shown as consisting of six signal lines 125 each transmitting one codeword symbol. Those skilled in the art of encoding will be able to code this code with a block length of 6 (i.e., generating six symbol output words) and a code size of 32 (i.e., 32 separate codes sufficient to encode data of five binary bits Quot; word &quot;).
Within communications receiver 130, detector 132 reads the voltage or current on line 125, including possibly amplification, frequency compensation, and common mode signal cancellation. In this example, the received result 140, shown here as R 0 , R 1 , R 2 , R 3 , R 4 , is provided directly by the detector 132, without the need for an optional decoder 138 do.
As will be readily apparent, different codes may be associated with different block sizes and different code word sizes; For illustrative convenience and without implied limitation, the example of FIG. 1 illustrates a system using an ODVS code, the so-called 5b6w code, that can encode five binary bit values for transmission over six lines.
Depending on which vector signaling code is used, there may be no decoder, no encoder, or neither decoder nor encoder. For example, in the case of the 8b8w code disclosed in [Cronie II], there is both an encoder 112 and a decoder 138. On the other hand, in the case of the 5b6w code of the present example, an explicit decoder is not necessary, because the system may be configured so that the detector 132 directly generates the received result 140.
The operation of the communication transmitter 110 and the communication receiver 130 must be fully synchronized in order to ensure the correct functioning of the communication system. In some embodiments, this synchronization is performed by an external clock shared between the transmitter and the receiver. Other embodiments may combine a clock function with a data channel, such as in the well-known Biphase encoding used for serial communications, or other methods described herein.
Signaling in communication systems
Signaling is a method of transmitting information over a communication channel. Any type of mapping information (typically expressed in bits) to a physical quantity carried on a communication channel is referred to as signaling. In a preferred embodiment, the information to be communicated on the communication channel is modulated through a shaped pulse having a real-valued function of finite support. The signal transmitted on the line has the following form,
Where C i is a codeword vector of length N (equal to the number of lines), T is the temporal length of the unit interval (UI) of the pulse representing one transmitted value, P is the Is a function on the interval [0, T] defining the pulse shape used. The codeword C i determines the information to be transmitted every moment. The choice of C i is the set belongs, and determines the signaling method, with a selection of the mapping between the information bits and C i.
Pulse amplitude modulation (PAM) is a technique that uses a value that represents an equivalent amplitude interval over an acceptable signal range
Of a method of signaling in a one C i can take. This type of signaling is referred to as PAM-X signaling. Often (but not exclusively), X is a power of 2, and each C i carries log2 (X) (binary log of X) information bits. In many high-speed SerDes applications, X = 2, but values such as X = 4, X = 8, or X = 16 have also been proposed in various standards bodies.
It is well known to those skilled in the art that although PAM-X signaling leads to a higher rate of transmitted bits per unit interval, it is more vulnerable to ISI than PAM-2. This is often mistakenly attributed to the fact that PAM-X signaling has more possible transition ranges (i.e., changes in signal amplitude) and the amount of different time needed to traverse these ranges leads to increased ISI. On the basis of this erroneous premise, it has also often been suggested that any signaling method using an alphabetic size greater than 2 would be more problematic for ISI than PAM-2. However, we next indicate that the alphabet size does not directly affect the ISI.
The vector signaling code includes a set of vectors (C) of the same dimension N referred to as codewords, a second set of vectors of dimensions N, referred to as a multi-input comparator (MIC) (Λ), and "do not cares", each of which is a pair C i , λ, C i is an element of C and λ is an element of Λ. In operation, the coordinates of the elements of C are limited and choose to express them by a real number between -1 and 1.
In operation, the code words, C i, is uniquely determined by a vector of scalar multiplication of the code word with all of the MIC λ λ is not uncorrelated. If the pair C i , λ is not a non-tracer, C i is said to be active for MIC λ.
An example is provided as follows: A set of codewords (C) consists of twelve vectors obtained from a combination of vectors (1, 0, 0, -1)
, And the set of unlicensed channels is a pair of codewords and MICs such that the scalar multiplication of the MIC with the codeword is zero. In other words, the uncensored is the following pair:
In the following, the interpretation of the MIC defined as a vector and the interpretation of the MIC defined as a hyperplane given by a set of all points perpendicular to this vector will be used interchangeably.
The ISI problem is examined from the perspective of this signaling with the intent of determining the method of data transmission in a way less sensitive to the uncorrected residual ISI of the system. In situations where the detection of a signal is achieved using a comparison of signals to a fixed reference point or to each other, the ISI vulnerability is determined primarily by the signal level observed at the output of these comparators, instead of the signal level observed on the line itself Respectively. Introduces the concept of ISI ratio (ISI-Ratio), which is a metric that will help quantify the effect of ISI noise as a function of the detection method and signaling used. We will use this concept to design a robust vector signaling method for ISI noise and will show simulation results verifying this method.
Receiver using multiple input comparators
As described in [Holden I], an actual embodiment of a multiple input comparator or MIC having coefficients (a 0 , a 1 , ..., a m- 1 ) includes, as its input, a plurality of signal conductors, vector from (x 0, x 1, ... , x m-1) and a summing circuit for receiving the output and then,
Where (x 0 , ..., x m - 1 ) is the signal weight vector for the summation circuit. In many embodiments, the desired output is a binary value, so the value Result is split into an analog comparator or other such signal slicer circuit to produce a binary decision output. Since this is a common use case, the colloquial name of this circuit incorporates the term "comparator &quot;, but other embodiments may apply the summing result to PAM-3 or PAM-4 to obtain a ternary or quinary output Or actually maintain the analog output of Equation 2 for further computation.
A receiver described by a matrix notation
Mathematically, a set of multiple input comparators comprising a code receiver may be described concisely using a matrix notation, wherein the columns of the matrix correspond to the input vectors (x 0 , x 1 , ..., x m -1 ) Corresponds to a plurality of signal conductors or line inputs carrying a successive element, i. E., A vector signaling code, and each row of the matrix corresponds to a vector defining a particular multiple input comparator and its output. In this notation, the value of the matrix element corresponds to a weighted vector or set of scaling factors applied to the input values of the column by the row's multiple-input comparator.
The matrix of Equation 3 describes one such set of multiple input comparators comprising a code receiver.
In this embodiment, the six input lines represented by six matrix rows are processed by five multiple input comparators represented by matrix rows 2-6. For purposes of the following discussion, the first matrix rows are all made up of a value of "1 " to produce a square 6x6 matrix.
As used herein, a matrix M , such as that of Equation 3, is defined as M T M = D , i. E., If the product of the matrix and its predecessor matrix is a diagonal matrix with non-zero values only in its diagonal , "Orthogonal &quot;. This is a weaker definition than is commonly used, and in the general case the result needs to be an identity matrix, a matrix with diagonal values equal to one. The matrix M may be normalized to meet the stronger conventional orthogonal requirements, but as will be explained below, this normalization is neither necessary nor desirable.
Functionally, orthogonality requires that the vector of the weight of the row representing the multiple input comparator should be orthogonal to all other rows, and that each row representing the multiple input comparator should be summed to zero. This means that the comparator output represents a separate communication mode, described herein as the "subchannel" of the vector signaling code communication system, since it also means that the comparator output is also orthogonal (and therefore independent).
Given the interpretation of this mode, the starting row of the matrix may be viewed as representing a common mode communication channel over the communication medium. The first row is set to a value of mode "1 " because it is desirable in a real system for the receiver to have a common mode rejection, thereby maximizing the common mode contribution of each line input to this one matrix row. By definition all rows of the matrix are orthogonal, so that any other matrix row (i. E., Any receiver output) may not be affected by the common mode signal. Embodiments with this common mode rejection need not implement a physical comparator corresponding to the first row of their descriptive matrix.
Note that in order to avoid confusion, all data communications in the ODVS system, including state changes indicating signals carried in the subchannels, are transmitted as codewords across the entire channel. One embodiment may associate specific mappings of input values to codewords and correlate these mappings with specific detector results, as taught herein and by [Holden I] and [Ulrich I] The correlation should not be confused with the partition, sub-division, or subchannel of the physical communication medium itself. Likewise, the concept of an ODVS subchannel is not limited to a particular ODVS code, transmitter embodiment, or receiver embodiment by way of example embodiments. Encoders and / or decoders that maintain internal state may also be components of embodiments according to the present invention. The subchannel may be represented by an individual signal or by a state conveyed by multiple signals.
Shokrollahi II describes a method for constructing an orthogonal matrix that may be utilized as described herein.
ODVS code generation corresponding to receiver matrix
[Cronie I] and [Cronie II] as will be described, a quadrature differential vector signaling code, the form (0, a 1, a 2 , ..., a n) for having generator being arranged to multiply the input modulation vector in matrix M It may also be constructed from a matrix. In the simplest case, each of a i of this vector is a positive or negative single value representing one bit of the transmitted information, e.g., +/- 1.
Understanding M, which describes the various communication modes of the system, multiplication of the matrix by this input vector can be performed by the excitation of various modes by a i of the vector, in which the 0th mode corresponding to the common mode transmission is not excited at all . It will be apparent to those skilled in the art that the transmit energy emitted in the common mode is unnecessary and wasteful in most embodiments. However, in at least one embodiment according to the present invention, the nonzero amplitude for the common mode term is used to provide a non-zero bias or a base value over the communication channel.
It may also be known that the various codewords of the code generated using this method represent a linear combination of various orthogonal communication modes. If no further constraints are imposed (for purposes of implementation convenience, for example), the method appears to be a system capable of communicating N-1 distinct sub-channels over N circuits, typically N- 1 bit / N circuit system. The set of distinct codeword values needed to represent the encoded value is referred to as the alphabet of the code, and the number of such distinct alphabetical values is its alphabet size.
As a further example, the code generated by this method from the matrix of Equation 3 is shown in Table 1.
As may be readily observed, the alphabet of this code consists of values of +1, +1/3, -1/3, -1, and so this is a quadratic code (for example, an alphabet size of 4 . This code will be described hereinafter as 5b6w or "glass wing" code herein, and its corresponding receiving matrix of equation 3 will be described as a "glass receiver ".
Timing information for the subchannel
Since the ODVS communication system must communicate each combination of data inputs as an encoded transmission and the rate of such encoded transmission is inevitably constrained by the capacity of the communication medium, the rate of change of the data to be transmitted is limited by the Nyquist limit In which case the rate of transmission of the codeword represents the sampling interval. As an example, if the ODVS subchannel has only one clock edge per codeword transmission, a binary clock or strobe signal may be transmitted on the ODVS subchannel.
Embodiments of the ODVS encoder and its associated line driver may operate asynchronously in response to any change in data input. Another embodiment, as one example, utilizes an internal timing clock to combine multiple phases of data processing to produce a single high-speed output stream. In such an embodiment, the output of all elements of the codeword is essentially synchronous (without any logical delay or other implementation constraints), so that the strobe or clock signal being transmitted on the subchannel The data-aligned clock (for example, its transition edge occurs at the same time as the data edge on the other sub-channel of the same code). Methods for converting such a data alignment clock to a delayed clock or a center-of-eye-aligned clock, suitable for initiating sampling of data subchannels in combination with the present invention, are well known in the art have. Such a method may include fixed time delay, adjustable time delay, delay locked loop, and so on.
The ISI ratio is a measure of the sensitivity of the signaling scheme to inter-symbol interference in a communication system. It is, in a sense, a measure of the degradation of the signaling scheme due to residual uncorrected ISI.
In order to formulate the above definition, it is assumed that there are N communication lines. At each unit interval (hereinafter UI), the encoder selects one of K possible codewords of length N (based on the bits to be transmitted) and the driver generates a voltage / current proportional to the coordinate value of the codeword Drive the line with that value. Without implicit limitation, it is assumed that, in this example, a rectangular pulse shape P t is used for the value on each line. The codeword moves toward the receiver on the channel. On the receiver side, the line values may pass through the equalizer and possibly the gain stages in the Rx front end, and these new values are (possibly) combined in multiple linear fashion in the comparator network to arrive at a set of decision values. As discussed above, the comparator may take a linear combination of line values and may compare them to a fixed reference point or other linear combination of line values. The receiver comparator network has M MICs. The MIC can conveniently be described as an " affine linear form "for the line value. In other words, the coefficients a 0 , a 1 , ... , a n is associated with each MIC. In operation, the output of the MIC is represented by a 0 + a 1 x 1 + ... + a n x n , where x 1 , ... , x n denote the line 1, ..., , &Lt; / RTI &gt; the value in N, and -a 0 is the corresponding reference value. If the reference value of the MIC is 0, the MIC is regarded as the center. Otherwise, the MIC is considered non-central. The central MIC is often a vector of coefficients in its linear form, i.e. [a 0 , a 1 , ... , a n ]. A central MIC can have two types: a reference-less MIC and a referenced MIC. The no reference MIC is the central MIC with the sum of its coefficients being zero.
For example, in standard differential signaling, the MIC coefficient is simply a pair [+1, -1] with a result compared to zero. This is a central, reference-free MIC. In PAM-4 signaling, the same MIC is used, but two of the three MICs have reference values. In other words, if the largest signal value is 1 and the smallest signal value is -1, the MIC is given by the following three affine linear forms:
In general, some of the coefficients of the MIC may be zero, in which case their corresponding inputs are simply discarded.
Occasionally, it is beneficial to use a geometric view of the MIC by considering the MIC as a hyperplane in the N-dimensional Euclidean space. The MIC is then equal to the set of all vectors that are evaluated as zero for that MIC. For example, for MIC [1, -1] with reference value 0, the hyperplane is only a straight line x = y in the 2D Euclidean plane. Will frequently and interchangeably identify the MIC with its corresponding vector, or its associated hyperplane. In this geometric view, the MIC is centered when its hyperplane passes through the origin, otherwise, the MIC is not centered.
Each of the K code words in the code may be interpreted as a point in the N-dimensional Euclidean space. The task of the MIC is to separate points . A non-stateless MIC for two codewords separates the point if it is placed on the opposite side of the hyperplane corresponding to the MIC.
Figures 2 and 3 illustrate the case of differential signaling and PAM-4 signaling on two lines carrying one bit and two bits per symbol, respectively. In the case of the differential signaling shown in Fig. 2, the hyperplane is a straight line passing through the origin at a 45 degree angle, and the codeword is a point having coordinates (1, -1) and (-1, 1). These codewords are separated by a hyperplane, and they have the same distance from the hyperplane. In the case of PAM-4 signaling as shown in Fig. 3, the hyperplane has a straight line passing through the origin at a 45 degree angle, and vectors (2/3, -2/3) and (-2/3, 2/3) Are two parallel translation lines of this straight line. The codewords are point (1, -1), (1/3, -1/3), (-1/3, 1/3) and (-1,1) Lt; / RTI &gt; As can be seen, the MIC separates the codeword.
We will present a new signaling method that is designed based on the ISI ratio concept. The ISI ratio is defined for MIC [lambda] for a set of codewords (C). Let Δm be the set of active codeword indices for MIC m (ie, they are not insignificant for that MIC). To accurately define the ISI ratio, a central MIC (in this case the hyperplane passes through the origin) and a non-central MIC (in this case the hyperplane does not pass through the origin as in the two MICs in PAM-4 signaling) It is necessary to distinguish them separately.
Calculate ISI ratio for central MIC
Let d (C k , MIC m ) be the distance between the code word C k and the hyperplane representing the referenced MIC m . The ISI ratio for MIC m is defined as:
Geometrically, the ISI ratio is the ratio of the maximum distance of any active codeword to the MIC hyperplane to the minimum distance of any active codeword to the MIC hyperplane. Calculating this amount for the above signaling example yields the following values:
The ISI ratio is 1 for MIC.
PAM-4 signaling:
The ISI ratio is 3 for the middle MIC (this is the middle)
These values may be verified by examining the differential signaling case of FIG. 2, where the two codeword points are equidistant from the MIC plane and represent a maximum / minimum distance ratio of 1. In the PAM-4 signaling of Fig. 3, a ratio of 3: 1 appears at the distance from the farthest codeword point to the central MIC plane to the closest codeword point.
Another example of addressing the signaling design based on the ISI ratio will be presented.
Calculate ISI ratio for non-central MIC
Let d (C k , MIC m ) be the distance between the code word C k and the hyperplane representing the referenced MIC m . The distance between the codeword C k and the shifted version of MIC m passing through the origin is denoted by d 0 (C k , MIC m ). The ISI ratio for the non-central MIC m is then defined as:
By this equation, the ISI ratio for the two noncentral MICs of PAM-4 signaling is also equal to 3. Thus, the ISI ratio of all MICs in the PAM-4 communication system is three.
ISI ratio and horizontal eye opening
Each of the k code words C k (k = 1, ..., K) generates its own pulse response at the output of MIC m , the pulse response of which is given by:
There is cross-talk can be ignored by the system and the channel (h i, i (t) ) is equal to (= h (t)), the pulse response is generated by code word K at the output of the MIC m all is given by the following:
Where p h (t) = P ( t) * h (t) is the pulse response of the system, including an all linear equalizer, MIC m (i) is the i-th coordinate of the m-th MIC, C k (i) is a code Is the i-th coordinate of the word C k . Assuming that the MIC is centered and its coefficients are normalized such that the sum of their squares is equal to 1,
Represents the distance between the codeword K and the central hyperplane representing MIC m . Note that the ISI ratio is invariant under the nonzero scalar multiplication of the MIC by any nonzero real number. Therefore, it can be assumed that the vector representing the MIC has a norm 1 (i.e., the sum of the squares of the coefficients of the MIC is 1).
The signal at the output of MIC m is a superposition of the pulse response P m, k (t) temporally shifted for an arbitrary selection of code words and by an integer multiple of the UI length (= T). Suppose that t 0 is a reference sampling time (reference sampling time) for the code word C 0 is. At time t 0 , we get:
In the case of a central MIC, the receiver eye at the MIC output is closed for a sampling time t where r m (t) changes sign with respect to its sign at t 0 . This determines the horizontal opening for the eye at the MIC output. For many communication systems, it is the goal to achieve a very low detection error rate (e.g., less than 10 -12 ) at the receiver, and therefore determining the eye-opening is the worst codeword pattern. The worst-case codeword pattern is generated when the codeword to be detected is the codeword closest to the hyperplane (referred to as Cmin (m)) representing the MIC m and the precursor codeword and post- ( Referred to as C max (m)). If you select these codewords, you can write:
By changing the sampling phase t0,
Each time the code changes, the child closes. The higher the ISI ratio for the signaling scheme, the greater the residual ISI seen from the neighboring codeword and the sooner it will close. Note that for a given pulse response (P h (t)) (determined by the system's channel, equalizer, transmitter pulse shape and baud-rate), the horizontal opening depends only on the ISI ratio of the underlying signaling scheme. do. The higher the ISI ratio, the smaller the horizontal opening of the child.
For non-central signaling, it is the distance to the reference point of the MIC, as indicated by ref (m), which determines the horizontal opening of the child. Thus, Equation 8 is changed to:
It is again shown that the horizontal eye opening is determined solely by the ISI ratio of the base MIC.
Signaling design based on ISI ratio metrics
Based on the above discussion, a signaling scheme can be designed based on the ISI ratio concept. For purposes of illustration, examples are drawn from the domain of a wire-line transmission system, but no limitation is implied.
As a first example, it is desired to transmit b bits of information over the channel, thus it is necessary to have at least 2 b codewords in the signaling scheme. Also consider the following in your design:
The order N is equal to the number of circuits in the channel (i. E., Independent communication elements or subchannels)
Because of the voltage swing restrictions at the transmitter, the codewords all have their coordinates in the range [-1,1].
It is the goal to find codewords, MICs, and codewords, so codewords can be distinguished by these MICs and the maximum ISI rate of the MIC is minimized. As shown in the previous section, the MIC with the largest ISI ratio will dominate and its corresponding child's horizontal opening will determine the error rate of the entire communication system.
In the following example, TE (www.te.com) for two lines on the backplane channel measured against the IEEE 802.3bj standard (available online at www.ieee802.org/3/100GCU/public/channel.html) A 4-line transmission line having a channel characteristic based on a reference channel provided by a transmission line is used. The described channel response was extended to a four-channel channel with crosstalk removed. The baud-rate was fixed at 8 GBaud per second. A 3-tap filter and a continuous time linear equalizer (CTLE) with an equalization range between 0 dB and 12 dB were assumed at the transmitter and the equalizer settings were optimized to obtain the best eye opening. The resulting pulse response of the channel is shown in FIG.
FIG. 12 shows an eye diagram for NRZ (throughput = 4 Gbps / line, horizontal opening = 106.2 psec), and FIG. 13 shows an eye diagram for PAM-4 signaling = 8 Gbps / line, horizontal opening = 40.0 psec).
A first embodiment of the vector signaling code design is called P3 signaling and includes four codewords (1, 0, -1), (-1, 0, 1 ), (0, 1, -1) and (0, -1, 1) are used. Consider the following two cases:
Case 1: Select MIC as (1, -1, 0) and (0, 1, -1). The outputs for the two MICs for the four codewords are the values 1, -1, -1, 1, and 1, -1, 2, and -2, respectively. From the examination, it is clear that the two MICs can distinguish four codewords from each other. The ISI ratio for the first MIC is 1 (horizontal opening = 106.2 psec) while the ISI ratio for the second MIC is 2 (horizontal opening = 60 psec). The throughput is 5.33 Gbps / line. The eye diagram is shown in Fig.
Case 2: Select MIC as (1, -1, 0) and (1/2, 1/2, -1). The output of the second MIC is 3/2, -3/2, 3/2, -3/2. Two MICs can still distinguish codewords, but the ISI ratio is 1 for both MICs (horizontal opening = 106.2 psec for both MICs). The throughput is 5.33 Gbps / line. The eye diagram is shown in Fig.
This example confirms that the MIC with the same ISI ratio on the same channel under the same clock rate leads to roughly the same horizontal eye opening and that the correct selection of the MIC is important for the signal strength of the transmission system.
A second embodiment of the signaling design utilizes linear coding; That is, the signaling scheme is defined by the matrix vector product. The vector contains the bits to be transmitted and the matrigel defines the transformations applied to the bits to generate the codeword. In this scheme, in principle, N-1 bits are transmitted through N circuits. The vector representing the bit has the form of (0, ± 1, ± 1, ..., ± 1). The coding matrix has a first row of all 1's and the other N-1 rows are orthogonal to the first row and span the remaining (N-1) -dimensional space. Thus, this is an orthogonal matrix as previously described herein. The MIC coefficients are simply found from the corresponding N-1 columns of the inverse matrix of the coding matrix.
An interesting characteristic of linear coding schemes based on orthogonal matrices is that the output of all MICs is simply in the form of ± 1, thus ensuring an ISI ratio of 1. As can be seen, this guarantee has a significant impact on the performance of communication systems using these codes.
In another embodiment, the following Glass Wing coding matrix is constructed to transmit five bits over six lines using the above P3 code:
S 0 , S 1 , S 2 , S (S 0 , S 1 , S 2 , S 3 , S 4 , S 5) indicating S = antipodal weight (for example, logical bit 0, ± 1 or alternatively ± 1 / 3 , S 4 ] and w is the codeword vector [w 0 , w 1 , w 2 , w 3 , w 4 , w 5 ] to be transmitted. If a counterweight of ± 1 is used, the transmitted codeword may be normalized by a factor of 1/3 to appear as a codeword with a quadrant of {± 1/3, ± 1}. In addition, due to the selection of the subchannel codewords of Equation 13, the linear combination of subchannel codes forming the ultimately transmitted codeword will provide a reduced alphabet of codeword elements. That is, at least one of the subchannel code vectors has a non-normalized size, in which case a linear combination of the reduced alphabetical rows provides a reduced alphabet. A subchannel code vector having three nonzero elements comprises a first nonzero element that is twice as large as each of a second nonzero element and a third nonzero element, It can be observed that the position of the first non-zero element is aligned only with the element.
The inverse matrix whose columns define the MIC coefficients is simply the transpose matrix of the matrix A of Equation 13 with the proper normalization and has already been described in Equation 3. The throughput is 6.66 Gbps / line. The eye diagram of this scheme is shown in Figures 7A-7E. The horizontal opening is 106.2 psec for all MICs. The five bits through the six lines of Equation 13 or 5b6w, the MIC matrix of Equation 3, and the codewords of Table 1 will be referred to herein as "glass wing" codes.
A third embodiment of the signaling design also utilizes linear coding and is referred to as ensemble NRZ (Ensemble-NRZ) or ENRZ. A full description of ENRZ may be found in [Cronie I]. ENRZ has eight code words in the form of ± perm (1, -1/3, -1/3, -1/3), where "perm" means all permutations of the coefficients and 1/2, -1/2, 1/2, -1/2), (1/2, 1/2, -1/2, -1/2) The three MICs in the form of 1/2, 1/2) can transmit three bits over four lines per unit interval. The coding matrix is a scaled version of a 4x4 Hadamard matrix:
The scale factor 1/3 is selected so that the final value is limited between -1 and 1. The throughput is 6 Gbps / line. The eye diagram for ENRZ signaling is shown in Figs. 8A-8C. The horizontal opening is 106.2 psec for the three MICs.
The fourth embodiment is a vector signaling code design with characteristics including inactive codewords for MIC as well as different MICs with different ISI ratios. This category of codes allows the designer to provide codes with fewer MICs, compared to codes with equal and equal throughput at all ISI ratios. Also, as can be seen in the following example, a MIC with a lower ISI ratio is typically an MIC that produces a linear combination on more lines as compared to a MIC with a higher ISI ratio. Because these MICs provide more horizontal opening, this characteristic makes these MICs more resistant to larger skew when more lines are involved in the linear combination. An example of this design strategy is derived from [Shokrollahi I], where [Shokrollahi I] describes a code with 24 codewords in the form of ± (perm (1,1,0, -1) | -1) Here, "perm" means all permutations of coefficients. This code can transmit 4.5 bits over five lines at each unit interval. There are 7 MICs in this scheme, the first 6 are all pairwise comparisons between the first four circuits and all have an ISI ratio of 2. The last MIC has coefficients (1/4, 1/4, 1/4, 1/4, -1) and an ISI ratio of 1. The throughput is 7.2 Gbps / line. The eye diagram of Figures 9A and 9B shows that the wider horizontal opening of the last MIC (Figure 9B, horizontal opening = 106.2 psec (Figure 9B), compared to a pairwise comparator MIC with a higher ISI ratio ).
The last exemplary embodiment is a code for transmitting 8 bits over 8 lines using 13 MICs. The codeword has the form of ± (perm (1,1,0, -1) | perm (-1,1,0,1)), where "perm" means all permutations of the coefficients. The MIC consists of six pairwise comparators on the first four lines, six pairwise comparators on the second four lines, and one MIC (1,1,1,1, -1, -1, -1, -1) / 4. The last input MIC has an ISI ratio of 1, but each of the pairwise comparator MICs has an ISI ratio of 2. The throughput is 8 Gbps / line. The eye diagram is shown in Figs. 10A and 10B. The MIC with an ISI ratio of 1 has a horizontal opening of 106.2 psec (Fig. 10b) and the other MIC with an ISI ratio of 2 has a horizontal opening of 62.5 psec (Fig. 10a).
To allow a direct comparison of these embodiments, a horizontal eye opening for the previously described ENRZ, NRZ and PAM-4 signaling schemes is calculated and then the relationship of the horizontal eye opening is plotted as a function of throughput. Since the baud-rate required to achieve the same throughput is different for each of these signaling schemes, the throughput value is normalized for comparison purposes.
The results are shown in the graph of FIG. Comparing NRZ and ENRZ, the ISI ratio of both is equal to 1, but the baud-rate of ENRZ is 2/3 of that of NRZ. Comparing PAM4 and ENRZ, the baud-rate of ENRZ is 4/3 of PAM4, but its ISI ratio is three times smaller. Thus, the ENRZ with its own ISI ratio of 1, the embodiment with the lowest ISI ratio, is the overall winner over the throughput range, explaining that a low ISI ratio is a good predictor of communication system performance.
Subchannel gain normalization
Performing a numerical analysis of the receiver defined by the matrix of Equation 3 and the code of Table 1, the comparator defined by matrix rows 1, 3, and 5 produces an output value of 占 / 3, It may be observed that the comparator defined by 2 and 4 produces an output value of +/- 1. Thus, the loss in vertical eye opening compared to differential signaling is 20 * log 10 (3) = ~ 9.5 dB. This output level variation is the result of a loose definition of the orthogonality for the reception matrix, since the non-unity value of orthogonal M T M = D represents the non-unity gain for the corresponding subchannel. As will be apparent to those skilled in the art, normalizing the matrix (i. E., Scaling the element so that the diagonal value is 1) will appear as a system with constant unit gain over all subchannels. However, this known normalization method may lead to a later-described embodiment because a large number of distinct normalized coefficient values, including irrational values in many cases, are difficult to materialize in an actual system.
At least one embodiment has a non-normalized matrix as exemplified by Equation 3 with its own coefficient value that is convenient to implement, and can be used to modify the sub-channel amplitude by modifying the input signal amplitude to modulate the various sub- Compensate for the fluctuations instead. For example, a hypothetical system with eight subchannels of unit gain and one subchannel of 0.8 gain will ultimately be limited by the latter output SNR. Thus, increasing the transmit input of the last subchannel to {+1.2, -1.2} instead of {+1, -1} will increase the corresponding channel output. Alternatively, decreasing all other sub-channel inputs to {+0.8, -0.8} would reduce the corresponding channel output, so that all channels would have the same output level requiring less transmit power.
However, this comparison technique is not without cost. Modifying the input vector in this manner, as taught by [Shokrollahi IV], is based on the fact that the alphabet size needed to communicate the codeword over the channel (and thus the number of distinct signal levels that the transmitter has to generate ). &Lt; / RTI &gt; [Shokrollahi IV] teaches a numerical method to select the appropriate modulation amplitude to appear as a closer match of the subchannel output with the minimum expansion of the required alphabet size.
Applying the procedure taught by [Shokrollahi IV], the optimal initial code set for the glass wing is (0, ± 3/8, ± 1/4, ± 3/8, ± 1/4, ± 3/8 ), And is given by (1, 7/8, 1/2, 1/4, 1/8, -1/8, -1/4, -1/2, -7/8, -1) It has a corresponding code with an alphabet of size 10. The resulting codeword is shown in Table 2, where the new code is referred to herein as the 5b6w_10_5 code. One embodiment of a driver for generating these signal levels is shown in Fig. Each driver slice 1010 produces one line output signal, with multiple driver elements on each slice being combinable to produce the ten required distinct output levels.
In this code, all comparators as in Equation 3 produce an output value of ą3 / 4. The increase in vertical eye opening compared to the unmodified 5b6w code is 20 * log 10 ((3/4) / (2/3)) = ~ 1 dB. The termination power of 5b6w_10_5 is about 88% of the end power of the unmodified 5b6w code, so even at the lower end power, 5b6w_10_5 leads to a piecemeal improved vertical eye opening. However, the implementation cost for achieving this enhancement is the added complexity in the transmitter to encode the data into an internal representation that can be selected between ten symbol values rather than four per line, It is a line driver that can generate output levels. This transmitter embodiment will be fully compatible with any glass wing receiver defined by the matrix of Equation 3 and will require less line driver power than the unmodified 5b6w transmitter driver. Because of this generally ineffective cost / benefit trade-off, most embodiments of the glass wing transmitter are expected to use an unmodified 5b6w signal level; Alternative implementations that incorporate 5b6w_10_5 modifications may be transparently exchanged and / or interoperable with unmodified implementations if they are cost effective.
Basic Glass Wing Receiver
One embodiment of a glass wing receiver as defined by the matrix of Equation 3 is shown in Fig. The six input lines are w 0 to w 5 ; The five subchannel outputs are S 0 to S 5 . In the drawing rules used herein, each of the inputs of the plurality of input comparators 210-250 may have a relative input to its final result output, as defined by the matrix row of Equation 3 defining each MIC It is identified by a weight indicating the contribution. Thus, 210 and 230 may appear to be conventional dual input differential comparators, each having one positive input and one negative input of the same but opposite weights. Each of comparators 220 and 240 has two positive inputs each contributing half of the total positive value and one input contributing the entire negative value. The comparator 250 has three inputs each contributing 1/3 of the total positive value and three inputs each contributing 1/3 of the total negative value.
The embodiment of the five multiple input comparators corresponding to row 2 through row 6 of the matrix of equation 3 may use an alternative differential pair design of [Holden I] or an alternative design of [Ulrich I]. In some embodiments, the continuous time linear equalizer (CTLE) is also integrated into a multi-line comparator stage. A transistor level schematic of this embodiment suitable for use with a glass wing is described in Shokrollahi IV and is provided herein as an example as in Figures 16-20. Each design is shown with both with and without an integrated CTLE and, where applicable, an alternative embodiment is illustrated.
The embodiment of FIG. 16 or its alternate embodiment of FIG. 17 is suitable for use as the comparator 250 of FIG. The embodiment of FIG. 18 or its alternate embodiment of FIG. 19 is suitable for use as the comparator 220. For use as the comparator 240, the inputs w0, w1, and w2 to w3, w4, and w5 Replacing is obvious. The embodiment of FIG. 20 is suitable for use as comparator 210, and for comparator 230 it replaces the input equally.
In general, Decision Feedback Equalization (DFE) techniques are not required in typical glass wing embodiments where channel length is typically small and signal propagation characteristics are good. However, since the DFE and other known techniques may be combined in a simple manner with the described invention, no limitations are implied. In at least some such embodiments, the DFE is performed on the subchannel instead of on the received line signal. In this configuration, the DFE history and correction calculations may be performed on the binary signal value instead of the quadrature (for 5b6w) or decimal (for 5b6w_10_5) circuit signals, since the DFE is directly &Lt; / RTI &gt;
Glass Wing Transmitter
Depending on the unique characteristics of the process and communication channel used to fabricate the semiconductor device, various known technology solutions may be applied to the glass wing transmitter. Very short and / or suitable data rate glass wing channels may utilize a high impedance "CMOS type" point-to-point interconnection that is optimally driven using conventional voltage mode drivers. It may be desirable that higher speed and / or longer channels with matched impedance terminations are driven using current mode drivers.
It will be apparent to those skilled in the art that the required multilevel output driver represents a specialized instance of a Digital-to-Analog (D / A) conversion that is well known in the art. Thus, all known methods of D / A conversion, including resistive chains, resistive ladders, summing of regulated voltages or currents, or methods based on selection in regulated voltage or current, It is possible. The adjustment may be for an absolute value, such as a predetermined voltage or current, or may be for a specified level, such as an integrated circuit power supply voltage, or may be proportional to its specified level.
One embodiment of a resistive source terminated driver for a 5b6w transmitter using the teachings of [Ulrich III] is shown in FIG. Each driver slice 910 produces one line output signal, with multiple driver elements on each slice representing the codeword alphabet of +1, +1/3, -1/3, and -1 symbols , And combinable to produce four distinct output levels that must be generated by the transmitter. Thus, as will be apparent to those skilled in the art, the output of the encoder of FIG. 21 is comprised of at least two binary selector signals per driver slice 910, so that at least a selection of output values representing the alphabet of four symbols per line . In order to enable selection of an output value that represents at least a larger alphabet set, it is advantageous to use a modulated modulation value, in exchange for additional transmitter complexity, such as a wider set of selector signals between the encoder and the line driver, Larger alphabets may be utilized as previously described for optimization of the channel gain. One embodiment of a driver that generates multiple signal levels is shown in Fig.
Known transmit driver equalization techniques such as finite impulse response filtering may be used in combination with the glass wings when required by the system design goals and specific channel characteristics of the embodiment.
In one embodiment, a method 2300 is described in connection with FIG. At block 2302, a set of information bits is received. At block 2304, a reduced alphabet codeword vector is generated by the encoder. The encoder forms a weighted sum of the subchannel codevectors, in which case the weighting of each subchannel codevector is based on the corresponding opposite weights determined by the corresponding information bits in the received set of bits It is based in part. In various embodiments, the encoder is an orthogonal encoding logic circuit, wherein the encoder maps the received set of information bits to a respective reduced alphabet codeword vector and outputs a reduced alphabetic code word selector signal, And generates a word vector. The selector signal may then be provided to a plurality of line drivers. Each line driver of the plurality of line drivers uses a portion of the reduced alphabet codeword vector selector signal to output a corresponding current or voltage representing the reduced alphabet codeword vector element. As described above, the subchannel codevectors form a reduced alphabet weighting matrix, the subchannel code vectors are mutually orthogonal and orthogonal to the common mode vector.
At block 2306, the reduced alphabet codeword vector is transmitted using a plurality of line drivers. In particular, the reduced alphabet codeword vector comprises a plurality of reduced alphabet codeword vector elements, each reduced alphabet codeword vector element being transmitted on a line of a multi-line communication bus by a respective one of a plurality of line drivers do. In some embodiments, the reduced alphabet codeword vector element is selected from a normalized set {+1, +1/3, -1/3, -1} of elements.
The method 2300 may be used with a system having five subchannel vectors, for use with a six-line multi-line communication bus. The opposite weights are selected from the normalized set {+1, -1} of the elements. An alternative method may modulate the opposite weights of at least one subchannel in accordance with the clock signal. Also, in some embodiments, the voltage offset may be modeled as including a constant weight applied to the common mode subchannel vector.
A method 2400 will be described in connection with FIG. At block 2402, a set of signals is received over the multi-line communication bus. The set of signals represents a reduced alphabet codeword vector formed from the opposite weighted sum of subchannel code vectors. At block 2404, the plurality of subchannel multi-input comparators generate a plurality of subchannel output signals. Each multiple input comparator of the plurality of multiple input comparators implements an input weight vector corresponding to the subchannel codevector and outputs the opposite output signal. At block 2406, a set of information bits is determined based on each of the opposite output signals, e.g., by slicing the opposite output signal relative to a reference value. In one embodiment, the reduced alphabet codeword vector element comes from a normalized set {+1, +1/3, -1/3, -1} of elements, so that there are five subchannel multiple input comparators present And the multi-line communication bus includes six lines.
Glass Wings with Embedded Clock
The embodiment of FIG. 15 utilizes the base glass wing receiver of FIG. 14, which further incorporates the embedded clock signal carried by one subchannel. Typically, when embedding a clock in a subchannel, the highest amplitude channel is selected to carry the clock, as taught by [Shokrollahi III]. As a general design practice, this selection generally appears as a clock channel with the best SNR, and therefore the cleanest output.
However, there is no fairly practical motivation to select a particular subchannel for the clock based on that criterion, in the proper gain variation seen across the various glass wing channels of an actual embodiment. In the embodiment of FIG. 15, the subchannel defined by the bottom row of the matrix of Equation 3 is specified to carry a clock whose symmetry and delay characteristics in the actual embodiment are delayed and delayed in conventional clock / data recovery circuits Because it has been found to help integrate with delay-and-sample behavior. One example of such a circuit is shown as 380, which includes a clock edge detector 382; A fixed, adjustable, or DLL controlled time delay 385, a sample and hold or an equivalent data sampler 388.
In one embodiment, the method includes: receiving a set of information bits; The subchannel code vector - the weighting of each subchannel code vector is based in part on the corresponding opposite weights determined by the corresponding information bits in the set of received bits, and the subchannel code vector is based on the reduced alphabet weight matrix Generating a reduced alphabet codeword vector with the encoder by forming a weighted sum of orthogonal and orthogonal to the common mode vector; And a reduced alphabetic codeword vector using a plurality of line drivers, wherein the reduced alphabetic codeword vector comprises a plurality of reduced alphabetic codeword vector elements, each reduced alphabetic codeword vector element comprising a plurality of reduced- And transmitted on the line of the multi-line communication bus by each one.
In one embodiment, the encoder is an orthogonal encoding logic, generating a reduced alphabet codeword vector comprises mapping the received set of information bits to a respective reduced alphabet codeword vector, And outputting a vector selector signal.
In one embodiment, the reduced alphabet codeword vector selector signal is provided to a plurality of line drivers, and each line driver of the plurality of line drivers outputs a corresponding current or voltage indicative of the reduced alphabet codeword vector element, A portion of the reduced alphabet codeword vector selector signal is used.
In one embodiment, at least one of the subchannel code vectors has a non-normalized size, and a row-wise linear combination of reduced alphabets provides a reduced alphabet.
In one embodiment, the reduced alphabet codeword vector element is selected from the normalized set {+1, +1/3, -1/3, -1} of the element. These are five subchannel vectors, and the multi-line communication bus includes six lines.
In one embodiment, the opposite weights are selected from the normalized set {+1, -1} of the elements. In one embodiment, the opposite weights of at least one subchannel are modulated according to the clock signal.
In one embodiment, to provide a voltage offset, an unmodulated common mode subchannel vector is included.
In one embodiment, a subchannel code vector comprising three nonzero elements comprises a first nonzero element that is twice as large as each of a second nonzero element and a third nonzero element, The position of the element is aligned only where one other subchannel codeword vector has a non-zero element.
In one embodiment, the method comprises: receiving a set of signals over a multi-line communication bus, the set of signals representing a reduced alphabet codeword vector formed from an opposite-weighted sum of subchannel code vectors; A plurality of subchannel multi-input comparators, each multi-input comparator of the plurality of multi-input comparators implementing an input weight vector corresponding to a subchannel code vector, and outputting the opposite output signal, &Lt; / RTI &gt; And determining a set of information bits from each of the opposite output signals.
In one embodiment, the method may determine that a set of information bits is made using a plurality of signal slicers. In one embodiment, the reduced alphabet codeword vector element comes from a normalized set {+1, +1/3, -1/3, -1} of elements, so that there are five subchannel multiple input comparators present And the multi-line communication bus includes six lines.
In one embodiment, the apparatus comprises: a plurality of signal conductors for receiving a set of information bits; The subchannel code vector - the weighting of each subchannel code vector is based in part on the corresponding opposite weights determined by the corresponding information bits in the set of received bits, and the subchannel code vector is based on the reduced alphabet weight matrix An encoder coupled to the signal conductor for generating a reduced alphabetic codeword vector by forming a sum of squares, orthogonal to each other and orthogonal to the common mode vector; And a reduced alphabet code word vector comprises a plurality of reduced alphabet code word vector elements, each reduced alphabet code word vector element comprising a plurality of reduced alphabet code word vector elements, And transmitted on the line of the communication bus.
In one embodiment, the encoder further comprises a logic circuit for mapping the received set of information bits to each reduced alphabet codeword vector and outputting a reduced alphabet codeword vector selector signal.
In one embodiment, the apparatus includes a line connection for providing a reduced alphabetic codeword vector selector signal to a plurality of line drivers, wherein each line driver of the plurality of line drivers includes a reduced alphabetic code word vector element A portion of the reduced alphabet codeword vector selector signal is used to output a corresponding current or voltage indicative of the alphabet.
In one embodiment, the encoder is configured to generate a reduced alphabet comprising a set of elements {+1, +1/3, -1/3, -1}. The multi-line communication bus includes six lines to transmit a set of five sub-channel code vectors. In one embodiment, the encoder is configured to select the opposite weights from the set {+1, -1} of elements.
The encoder is configured to modulate the at least one subchannel code vector according to the clock signal. The encoder is configured to provide a voltage offset by providing an unmodulated common mode sub-channel vector.
In one embodiment, the apparatus comprises: a multi-line communication bus configured to receive: a set of signals - a set of signals representing a reduced alphabet codeword vector formed from an oppositely weighted sum of subchannel code vectors; A plurality of subchannel multi-input comparators, each multi-input comparator of the plurality of multi-input comparators implementing an input weight vector corresponding to a sub-channel codevector and outputting an opposite output signal; And a plurality of signal slicers configured to determine a set of information bits from each of the opposite output signals.
In one embodiment, the apparatus may receive a reduced alphabetic codeword vector element from a normalized set {+1, +1/3, -1/3, -1} of elements, There is an input comparator, and the multi-line communication bus includes six lines.
In another embodiment, a diagnostic tool using one method is provided, the method comprising: receiving a plurality of candidate codewords; Calculating, for a plurality of multiple input comparators, the ratio of the minimum distance of the active codeword to the multiple input comparator hyperplane through the maximum distance to origin of the active codeword to the multiple input comparator hyperplane passing through the origin; And exporting the ratios for each central multiple input comparator for analysis. The hyperplane may also include and shift the offset, which is the maximum distance of the active codeword to the shifted hyperplane relative to the minimum distance of the active codeword to the shifted hyperplane.
The examples presented herein illustrate the use of vector signaling codes for point-to-point line communication. For purposes of explanation, the interconnection between the first transmitting device and the second receiving device has been described as a unidirectional signaling network. However, this should not be seen as limiting the scope of the invention in any way. The method disclosed in the present application is based on the ability to provide simultaneous communications between a transmitter and a receiver that can alternate signaling directions (i.e., half duplex) or separate in both directions (i.e., full duplex) network. &lt; / RTI &gt; Likewise, more than one instance of the described invention may be used in essentially parallel to deliver a wider data word and / or to provide greater overall communication bandwidth, wherein each instance may be implemented as an individual embedded clock Or two or more instances share a common clock. Other communication media, including optical and wireless communications, may be used as well, instead of the described line interconnections. Thus, descriptive terms herein such as "voltage" or "signal level" should be considered to include equivalent expressions in other measurement systems, such as "optical intensity", "RF modulation", and the like. As used herein, "physical signal" includes any appropriate behavior and / or attribute of a physical phenomenon capable of conveying information. The physical signal may be tangible and non-transient.
Receiving a set of information bits;
Subchannel code vectors-the weighting of each subchannel code vector is based in part on a corresponding antipodal weight determined by the corresponding information bits in the received set of bits, Generating a reduced alphabet codeword vector using an encoder by forming a weighted sum of the subchannel code vectors forming a reduced alphabet weight matrix and being orthogonal to each other and orthogonal to the common mode vector ; And
Transmitting the reduced alphabet codeword vector using a plurality of line drivers
Wherein the reduced alphabet codeword vector comprises a plurality of reduced alphabet codeword vector elements and each reduced alphabet codeword vector element comprises a multi-line communication bus by a respective line driver of the plurality of line drivers, wire communication bus.
Wherein the encoder is an orthogonal encoding logic circuit, the step of generating a reduced alphabetic codeword vector comprises: mapping the set of received information bits to a respective reduced alphabetic codeword vector and generating a reduced alphabetic codeword vector signal / RTI &gt;
Wherein the reduced alphabet code word vector selector signal is provided to the plurality of line drivers and each line driver of the plurality of line drivers outputs a corresponding current or voltage representing the reduced alphabet code word vector element Using a portion of the reduced alphabetic code word vector selector signal.
Wherein at least one of the subchannel code vectors has a non-normalized size and the row-wise linear combination of the reduced alphabets provides a reduced alphabet.
Wherein the reduced alphabet codeword vector elements are selected from a normalized set of elements {+1, +1/3, -1/3, -1}.
There are five subchannel vectors, and the multi-line communication bus includes six circuits.
Wherein the opposite weights are selected from a normalized set of elements {+1, -1}.
Wherein the opposite weights of at least one subchannel are modulated according to a clock signal.
Wherein an unmodulated common mode subchannel vector is included to provide a voltage offset.
The subchannel code vectors having three nonzero elements include a first nonzero element that is twice as large as each of the second nonzero element and the third nonzero element, Wherein the position of the first non-zero element is aligned only where the word vector comprises a non-zero element.
A plurality of signal conductors for receiving a set of information bits;
An encoder coupled to the signal conductors for generating a reduced alphabet codeword vector by forming a sum of subchannel code vectors, wherein the weighting of each subchannel code vector is weighted in the set of received bits The subchannel code vectors forming a reduced alphabet weight matrix, orthogonal to each other, and orthogonal to the common mode vector, wherein the subchannel code vectors are partially based on corresponding opposite weights determined by corresponding information bits of the subchannel code vectors;
A plurality of line drivers for transmitting the reduced alphabet codeword vector
Wherein the reduced alphabet codeword vector comprises a plurality of reduced alphabet codeword vector elements and each reduced alphabet codeword vector element is encoded by a line driver of each of the plurality of line drivers on a line of a multi- Lt; / RTI &gt;
Wherein the encoder further comprises logic circuitry for mapping the set of received information bits to a respective reduced alphabet codeword vector and outputting a reduced alphabetic code word vector selector signal.
And a plurality of line connectors for providing the reduced alphabet codeword vector selector signal to the plurality of line drivers
Wherein each line driver of the plurality of line drivers uses a portion of the reduced alphabet codeword vector selector signal to output a corresponding current or voltage representing the reduced alphabet codeword vector element Lt; / RTI &gt;
Wherein the encoder is configured to generate a reduced alphabet comprising a set of elements {+1, +1/3, -1/3, -1}.
Wherein the multi-line communication bus comprises six circuits for transmitting a set of five sub-channel code vectors.
Wherein the encoder is configured to select the opposite weights from a set of elements {+1, -1}.
Wherein the encoder is configured to modulate at least one subchannel code vector according to a clock signal.
Wherein the encoder is configured to provide a voltage offset by providing an unmodulated common mode sub-channel vector.
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