Source: https://patents.google.com/patent/JP4565799B2/en
Timestamp: 2020-01-28 04:55:22
Document Index: 697569881

Matched Legal Cases: ['Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10', 'Application No. 10']

JP4565799B2 - Horizontal electric field type liquid crystal display device, manufacturing method thereof, scanning exposure apparatus, and mixed scanning exposure apparatus - Google Patents
Horizontal electric field type liquid crystal display device, manufacturing method thereof, scanning exposure apparatus, and mixed scanning exposure apparatus Download PDF
JP4565799B2
JP4565799B2 JP2002237219A JP2002237219A JP4565799B2 JP 4565799 B2 JP4565799 B2 JP 4565799B2 JP 2002237219 A JP2002237219 A JP 2002237219A JP 2002237219 A JP2002237219 A JP 2002237219A JP 4565799 B2 JP4565799 B2 JP 4565799B2
JP2002237219A
JP2004038130A (en
2002-07-01 Application filed by 大林精工株式会社 filed Critical 大林精工株式会社
2002-07-01 Priority to JP2002237219A priority Critical patent/JP4565799B2/en
2004-02-05 Publication of JP2004038130A publication Critical patent/JP2004038130A/en
2010-10-20 Publication of JP4565799B2 publication Critical patent/JP4565799B2/en
2014-04-02 First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=29720330&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JP4565799(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
The present invention relates to a large-screen horizontal electric field type liquid crystal display device having a wide viewing angle and high image quality, and a manufacturing apparatus thereof.
A method for manufacturing an active matrix substrate using the halftone exposure method is discussed in detail in Japanese Patent Application No. 10-283194.
However, the halftone exposure method disclosed here is used to form a channel portion of a thin film transistor as shown in FIG. Using this method, the manufacturing cost of the active matrix substrate can be significantly reduced.
When the halftone exposure method disclosed in Japanese Patent Application No. 10-283194 is used, the processing accuracy of the channel portion of the thin film transistor varies greatly, which is likely to be an unstable factor during mass production.
Variations in the amount of overlap between the gate electrode and the source / drain electrodes cause display unevenness in the halftone region and cause a decrease in yield. (FIGS. 1 and 22 are conventional halftone exposure processes)
The present invention provides means for solving this problem, and an object of the present invention is to provide a method capable of manufacturing an ultra-large and ultra-wide viewing angle liquid crystal display device at a low cost and with a high yield.
A pair of substrates at least one of which is transparent, a liquid crystal composition layer sandwiched between the substrates, and a plurality of scanning lines and video signals arranged in a matrix on the facing surface of one of the substrates In a method of manufacturing a horizontal electric field mode liquid crystal display device comprising a thin film transistor element connected to a pixel electrode paired with a wiring and a common electrode, the pixel electrode, the scanning line, and the video signal wiring,
[Means 1] Forming a connection portion for forming a protection transistor element for preventing static electricity connecting the common electrode and the scanning line, and a protection transistor element for preventing static electricity connecting the common electrode and the video signal wiring. The above three connection portions, that is, the connection portion between the scanning line driving external circuit and the scanning line terminal portion, were formed at the same time when the thin film semiconductor layer of the thin film transistor element was separated using the halftone exposure technique.
[Means 2] The halftone exposure technique used in the means 1 uses a halftone photomask composed of a complete transmission region, a semitransmission region, and a complete cutoff region, and forms a semiconductor layer of a thin film transistor element in the complete cutoff region. A connection part for forming an anti-static protection transistor element connecting the common electrode and the scanning line, and a connection part for forming an anti-static protection transistor element connecting the common electrode and the video signal wiring. In addition, the contact holes in the three connection portions of the connection portion between the scanning line driving external circuit and the scanning line terminal portion are formed in a completely transmissive region, and all other regions are formed in a semi-transmissive region.
[Means 3] The halftone exposure technique used in Means 1 uses a normal photomask consisting of a completely transmissive region and a completely shielded region, and the semiconductor layer of the thin film transistor element is formed in the completely shielded region, and everything else is completely After the entire surface is exposed under incomplete exposure conditions (under exposure conditions) with reduced UV irradiation energy density at the time of exposure in the transmissive region, a protection transistor element for static electricity countermeasures connecting the common electrode and the scanning line is formed. A connection portion for forming an anti-static protection transistor element connecting the common electrode and the video signal wiring, a connection portion for the scanning line driving external circuit, and the scanning line terminal portion. Only the contact hole area of the connection part is irradiated with ultraviolet rays using another photomask, or in a spot shape without using a photomask. And the state of complete exposure by irradiating by scanning the Borikon's ultraviolet rays.
[Means 4] The halftone exposure technique used in Means 1 utilizes a normal photomask consisting of a completely transmissive region and a completely shielded region. The semiconductor layer of the thin film transistor element is formed in the completely shielded region, and everything else is completely transmissive. A protective transistor element for static electricity countermeasures that connects the common electrode and the scanning line is formed at the same time while performing scanning exposure under incomplete exposure conditions (under exposure conditions) in which the ultraviolet irradiation energy density is reduced during exposure. A connection portion for forming an anti-static protection transistor element connecting the common electrode and the video signal wiring, and a connection portion between the scanning line driving external circuit and the scanning line terminal portion. The connecting portion was scanned with ultraviolet rays squeezed into a spot shape, and only these three connecting portions were in a completely exposed state.
[Means 5] In the halftone exposure process of means 2, 3 and 4, after exposure and development, the film thickness of the positive resist in the halftone exposure area (incomplete exposure area) is measured, and the exposure light amount is fed back according to the measured value. I tried to control it.
[Means 6] With respect to an exposure apparatus for an ultra-large active matrix substrate, when the large quartz photomask substrate is horizontally arranged, the exposure UV light is incident on the back side of the photomask in order to eliminate the deflection of the quartz photomask substrate due to gravity. A plurality of non-contact Bernoulli chucks were arranged, and exposure was performed while accurately controlling the position of the back surface of the photomask substrate with a laser displacement meter.
[Means 7] With respect to an exposure apparatus for an ultra-large active matrix substrate, when a large quartz photomask substrate is disposed horizontally, the quartz photomask substrate and the quartz photomask substrate with no pattern are sealed in order to eliminate the deflection of the quartz photomask substrate due to gravity. Exposure was made while correcting the deflection due to the weight of the quartz photomask substrate by creating a space, making the pressure in this space smaller than atmospheric pressure, and accurately controlling the differential pressure from the atmospheric pressure with a pressure sensor.
[Means 8] With respect to an exposure apparatus for an ultra-large active matrix substrate, a mask pattern is scanned and exposed to a positive photoresist coated on the active matrix substrate while the photomask and the stage move in the Y-axis direction at the same speed. In addition to the function, the positive photoresist was exposed by using ultraviolet light directly in a width of about 0.1 mm to 5 mm without using a photomask, and using the above two functions simultaneously.
[Means 9] Regarding the method of manufacturing the horizontal electric field type liquid crystal display device, the following four photomask processes can be used by using [Means 1].
[Means 10] By using [Means 1] with respect to a method for producing a horizontal electric field type active matrix liquid crystal display device, it can be produced by the following three photomask processes.
The present invention is exactly the same as Japanese Patent Application No. 10-283194 in that the process is shortened using a halftone exposure technique, but the area to which the halftone exposure area is applied is different from that of Japanese Patent Application No. 10-283194. Yes.
By using the means 1, 2, 3 and 4, the variation in the processing accuracy of the channel length that determines the characteristics of the thin film transistor element is almost eliminated, and the unstable factor at the time of mass production is eliminated. The processing accuracy of element isolation of the thin film semiconductor layer is worse than that of Japanese Patent Application No. 10-283194. However, as shown in FIGS. 11 and 15, if the thin film semiconductor layer is made larger than the gate electrode, the thin film semiconductor element can be obtained. There is almost no difference in characteristics. Similarly, the processing accuracy of the contact hole is worse than that of the conventional process, but the variation in the processing accuracy of the contact hole does not affect the characteristics of the thin film transistor element.
By using the means 3 and 4, the halftone exposure process can be performed without using a special photomask disclosed in Japanese Patent Application No. 10-283194. Conventionally, when a halftone exposure process is applied to mass production, an advanced photomask design technique has been required, but such a process is no longer necessary in the process of the present invention. Even without halftone mask design know-how, the halftone exposure process can be carried out, which greatly increases the degree of freedom in design and significantly reduces the cost of creating a photomask.
By using the means 4 and 8, the exposure time of the mix exposure method can be shortened. By adopting the halftone mixed simultaneous exposure method of the present invention, production efficiency can be greatly improved. By providing a partial exposure function that does not use a photomask inside one scanning exposure apparatus, it is possible to reduce the number of apparatuses, thereby reducing the area of the clean room and greatly improving the investment efficiency.
By combining the means 2, 3, 4 and the means 5, the variation peculiar to the halftone exposure process can be reduced, and the mass production process is stabilized. In the case of the multi-lens projection exposure system as shown in FIGS. 17 and 18, since the ultraviolet light source is arranged with quartz fibers as springs, the amount of light can be easily adjusted. Ultraviolet irradiation uniformity is particularly important in the present invention. In the halftone exposure process, if the film thickness after development of the positive resist in the halftone exposure area changes, mass production cannot be performed, so the film thickness is measured with a precise measuring device, and the exposure light quantity distribution and exposure light quantity are determined. By managing all of them one by one, a significant yield improvement can be realized.
By using means 6 and 7, it is possible to scan and expose ultra-large active matrix substrates of about 60 inches using a single photomask. The exposure of active matrix substrates can be performed by connecting photomasks, but there is a drawback that the photomask joints are easily visible to the naked eye. Furthermore, in the case of the half-tone exposure method as in the present invention, the joint of the photomask becomes very difficult and cannot be put into practical use. In the exposure process using a very large photomask, there is a problem that the deflection due to its own weight becomes a big problem, and the uniformity of resolution is poor due to underfocus and overfocus. In the present invention, by using means 6 or 7, it becomes possible to perform scanning exposure while completely correcting the deflection caused by the weight of the photomask and holding it horizontally, and the uniformity of resolution after exposure and development can be greatly improved. It became so.
By using the means 9 and 10, an active matrix lateral electric field type liquid crystal display device having the characteristics of the thin film transistor elements can be manufactured at a low cost and with a high yield. Further, since a protection circuit for protecting the active matrix element against static electricity generated in the manufacturing process of the liquid crystal display device can be incorporated in the active matrix substrate, the manufacturing process can be easily managed and the defect occurrence rate can be greatly reduced.
By using the means 1, 2, 3, 4, 9, and 10, it is possible to manufacture a horizontal electric field mode liquid crystal display device without using a transparent conductive film. As the electrode material, a metal, a metal silicide compound, or a metal nitride can be used, so that the sputtering target cost can be reduced. Since all the protection transistor circuits for static electricity countermeasures formed on the active matrix substrate can be formed using the above metal material, the current capacity that can be passed through the protection transistor circuit can be increased. This is particularly important in the manufacturing process of an ultra-large liquid crystal display device of 40 inches or more, and it is not necessary to make the production line static electricity management standards more strict than before, so there is no need to slow down the substrate transfer speed. . Since the substrate transfer speed can be increased, the production efficiency can be improved and the yield can be improved.
[Embodiment 1] FIGS. 2, 3, 7, 7, 9, 10, and 11 are a cross-sectional view of a photomask for halftone exposure according to the first embodiment of the present invention, a photomask process flow chart, It is a top view of the protection transistor element for static electricity countermeasures, and the manufacturing process explanatory drawing of an active matrix substrate. As shown in i) of FIG. 11, halftone mask FIG. 2 is used to completely block ultraviolet light in the semiconductor region of the thin film transistor element, and to irradiate ultraviolet light in the region where the contact hole of the scanning line terminal portion is opened. It is designed to be completely transparent. Although not shown in FIG. 11, the contact hole for forming the protection transistor element circuit for countermeasure against static electricity is made to be able to completely transmit ultraviolet light like the terminal portion of the scanning line. 5 and 6 are used as the protection transistor element circuit diagrams for static electricity countermeasures, but the circuit diagram is not limited to this circuit diagram, and any circuit having the same effect may be used. 7, 8, 9, and 10 are plan views of the circuit of the protection transistor element for preventing static electricity produced by the process of the present invention.
In the halftone exposure process used in Japanese Patent Application No. 10-283194, an active matrix substrate is formed according to a photomask process flow as shown in FIG. 22 using a slit photomask as shown in FIG. However, halftone exposure is not used for the channel portion of the thin film transistor. As shown in FIG. 11, in the process of the present invention, as shown in iii), only the thin film semiconductor layer is isolated, and the channel portion of the thin film transistor element is formed in the process iv). Therefore, in the process of the present invention, there is almost no variation in the channel length of the channel portion of the thin film transistor element, and the area variation in the overlap region of the gate electrode, the source and the drain electrode can be minimized. Therefore, there is almost no unevenness caused by thin film transistor elements, and stable mass production can be realized.
As shown in FIG. 11, according to the present invention, the active matrix substrate can be manufactured with a metal material for forming two types of electrodes for the scanning lines and the video signal wirings, so that the manufacturing cost can be reduced. Even if a variation in processing accuracy peculiar to the halftone exposure process occurs, the thin film transistor characteristics are not affected. Therefore, even if the screen size is made extremely large, the yield does not decrease. Further, as shown in FIG. 11 iv), the present invention has an advantage that the rubbing process is easily performed in the liquid crystal cell process because there is no thin film semiconductor layer under the liquid crystal driving electrode. As shown in FIG. 11 vi), the present invention has an advantage that the afterimage phenomenon hardly occurs because the common electrode and the liquid crystal drive electrode in the display pixel region are completely covered with the passivation film.
[Embodiment 2] FIG. 4, FIG. 12, FIG. 13, FIG. 14, FIG. 15, FIG. 16 and FIG. 21 show the photomask process flow diagram of the second embodiment of the present invention and the explanation of the halftone exposure process using mixed exposure. FIG. 4 is a plan view of a protection transistor element for preventing static electricity and a plan view of a lateral electric field type active matrix substrate manufactured by using mixed halftone exposure.
In the present invention, neither a slit halftone photomask as shown in FIG. 1 nor a transflective halftone photomask as shown in FIG. 2 is used. As shown in (a) of FIG. 12, the photomask used in the present invention has no halftone area and uses a conventional ordinary photomask. Usually, exposure is performed under the conditions of underexposure by reducing the irradiation density of ultraviolet rays using a photomask. Next, as shown in (b), the positive resist at a position corresponding to the contact hole of the terminal portion is irradiated with ultraviolet rays squeezed into a spot shape to completely expose only this region. The film thickness shape of the positive resist after development is shown in (c). Although the steps (a) and (b) may be performed by separate apparatuses, the steps (b) and (b) can be performed simultaneously in one exposure apparatus.
It is also possible to perform the step (b) in FIG. 12 using a photomask. In this case, the exposure is performed by exchanging the photomask and the exposure time becomes long. However, this method is suitable when many small contact holes are formed.
The step of simultaneously performing (a) and (b) in FIG. 12 is the most efficient of the present invention. In particular, when exposing an ultra-large active matrix substrate of 40 inches or more, it is impossible to manufacture by photomask stitching exposure using the halftone exposure method of the present invention, so the entire screen must be exposed with a single photomask. Don't be. If the photomask is 40 inches or more, the replacement work takes time and the throughput is greatly reduced. Adopting a mixed exposure system that can perform full surface scanning exposure and spot scanning exposure separately using a device that incorporates a full surface scanning exposure optical system and a spot scanning exposure optical system in one exposure apparatus as in the present invention. Can greatly reduce the drop in throughput.
FIG. 13 and FIG. 14 are plan views of protection transistor elements for electrostatic countermeasures formed using the mixed exposure method of the present invention. The region {circle around (31)} is a contact groove formed by spot scanning exposure. 16 and 21 are plan views of a lateral electric field type active matrix substrate manufactured using mixed halftone exposure. The contact groove of the scanning line is wider than the contact groove of the terminal portion of the protection transistor element for preventing static electricity. If the contact resistance of the scanning line terminal portion is large, lateral stripes occur in the image. Therefore, it is necessary to reduce the contact resistance as much as possible.
FIG. 15 is an explanatory diagram of a three-time photomask process employing a halftone process using the mixed scanning exposure method of the present invention. As in Example 1, halftone exposure is not used for the channel portion of the thin film transistor. Since there is almost no channel length variation in the channel portion of the thin film transistor element, display unevenness caused by the thin film transistor element does not occur.
In the present invention, n doped with phosphorus in the ohmic contact layer of the thin film transistor element in the step iv) of FIG. + Use layers. After the source and drain electrodes are formed, n of the channel portion of the transistor + After removing the layer using a dry etching method, the surface of this channel portion is changed to B 2 H 6 Plasma doping is performed in an atmosphere of hydrogen gas or nitrogen gas containing (diborane) gas. Thereafter, as shown in v), a transparent flattening film such as BCB or polyphenylsilazane is applied using a printing method. As a printing method, an inkjet method, a flexographic printing method, or the like is used, but another coating method may be used. A coating thickness of about 2000 to 6000 angstroms is sufficient. In addition to the flattening film, polyimide used for the alignment film may be used as the flattening film.
If the process of the present invention is used, an active matrix substrate can be formed by only three photomask processes, and the process can be greatly reduced.
Back channel doping (B 2 H 6 In the case where the plasma treatment is not performed, the use of an organic flattening film causes a problem in terms of long-term reliability. If the back channel doping process cannot be performed, as in Example 1, a silicon nitride film is formed with a thickness of about 2000 angstroms to 4000 angstroms using plasma CVD, and then a positive resist is applied again, and scanning lines and countermeasures against static electricity are applied. The contact groove may be formed by spot scanning exposure only to the terminal portion of the protective transistor element for use, and using a dry etching method after development.
[Embodiment 3] FIGS. 17, 18, 19, 20, 23, and 24 are a plan view and a sectional view of a scanning exposure apparatus according to a third embodiment of the present invention, and a field back used in halftone exposure. It is a flowchart of control, and the principle figure of the optical system of a white interferometer.
FIG. 17 is a plan view of a multi-lens scanning exposure apparatus in which the stage holding the glass substrate moves in the X and Y directions and the photomask substrate moves only in the Y axis direction. FIG. 18 is a plan view of a multi-lens scanning exposure apparatus in which the stage holding the glass substrate moves only in the Y direction and the photomask substrate also moves only in the Y axis direction. In FIG. 17, the spot ultraviolet exposure optical system is fixed, but it may be movable in the X-axis direction as shown in FIG.
When making a 60-inch active matrix liquid crystal display device, the problem is that the photomask substrate will be bent by its own weight.
In order to solve the deflection of its own weight, a method of vertically arranging the photomask substrate was also devised, but since the glass substrate has become very large, the weight of the stage increases and the method of vertically positioning moves the stage smoothly. Has become difficult. In the present invention, as shown in FIGS. 23 and 24, the deflection of the photomask is corrected using atmospheric pressure using a Bernoulli chuck or a sealed chamber. If this method is used, a 60-inch photomask can be used without increasing the thickness of the quartz photomask substrate. Not only can the cost of the photomask substrate be significantly reduced, but also the process of creating the photomask is greatly simplified, and the price of the quartz photomask substrate can be greatly reduced.
As shown in FIGS. 23 and 24, the optical system (50) for spot scanning exposure without using a photomask is arranged between the photomask and a glass substrate coated with a positive resist. It is transmitted using. The order of spot scanning exposure using the optical system (50) for spot scanning exposure after full surface scanning exposure using a photomask under the under-exposure condition is the best method for increasing the yield. In the case of underexposure using a photomask, a resolution of about 3 μm to 10 μm is required, but in spot scanning exposure, the resolution is very low, about 100 μm. Before the dust adheres to the glass substrate, it is better to first perform underexposure using a photomask that requires high resolution accuracy.
In order to correct the deflection of the photomask substrate's own weight, it is necessary to dynamically correct with a precision of about ± 15 μm from the horizontal plane using a laser change meter or a digital differential pressure gauge. The accuracy of this correction must also be changed according to the depth of focus of the projection lens and the required resolution.
FIG. 19 is a flowchart showing the halftone exposure process used in the present invention. In the halftone exposure method, the film thickness of the positive resist is about 1.5 μm to 2.0 μm, and the film thickness after development of the positive resist in the halftone exposure region must be controlled in the range of 4000 Å to 6000 Å. If the film thickness is significantly deviated from this range, rework must be performed. In order to realize a uniform halftone exposure region with as good reproducibility as possible, 100% inspection is preferably performed. As an inspection method, a laser step meter or a laser interferometer may be used, but in the present invention, a method of accurately measuring the step of the positive resist using a white interferometer is employed. The measurement principle diagram uses an interference optical system as shown in FIG. When this white interferometer is used, it is possible to measure the steps of the positive resist in the complete exposure area, halftone exposure area and complete blocking area simultaneously in a single measurement without contact, thereby shortening the measurement time. Can be measured.
The white interferometer shown in Fig. 20 has a simple principle, a simple system, and very good measurement accuracy (accuracy of about 10 angstroms is possible), so even if a multipoint simultaneous measurement system is made, the measurement system is very inexpensive. to watch. The measurement time is also very short, making it ideal for in-line inspection. If the underexposure conditions are controlled based on the step measurement data obtained by the white interferometer, it is possible to construct a halftone exposure process with no variations and good reproducibility.
In the present invention, the multi-lens projection optical system is used in FIGS. 17 and 18, but the present invention can also be applied to a scanning exposure system using a mirror reflection optical system.
By building a halftone exposure process using a feedback system based on positive resist step measurement data using the scanning exposure apparatus and white light interferometer of the present invention, halftone exposure with good reproducibility can be performed. Yield is improved.
By combining the underexposure full scan using a photomask with a scanning exposure method using spot ultraviolet light, a halftone exposure process completely different from the conventional halftone exposure process can be created. It became possible to reduce variation in characteristics.
By using the present invention, it has become possible to produce an active matrix element at a low cost with a good yield using an inexpensive photomask.
FIG. 1 is a sectional view of a conventional photomask for halftone exposure and a developed photoresist.
FIG. 2 is a sectional view of a photomask for halftone exposure according to the present invention and a developed photoresist.
FIG. 3 is a flow chart of a 4-photomask process according to the present invention.
FIG. 4 is a flow diagram of a 3-photomask process according to the present invention.
[Fig.5] 2 Thin film transistor protection circuit diagram for static electricity countermeasures
[Fig. 6] Three-thin film transistor protection circuit diagram for static electricity countermeasures
FIG. 7 is a plan view of the protection transistor element for static electricity countermeasure according to the present invention.
FIG. 8 is a plan view of the protection transistor element for static electricity countermeasure according to the present invention.
FIG. 9 is a plan view of the protection transistor element for static electricity countermeasure according to the present invention.
FIG. 10 is a plan view of the protection transistor element for static electricity countermeasure according to the present invention.
FIG. 11 is a sectional view for explaining the flow of a 4-photomask process of the present invention.
FIG. 12 is a sectional view of a photoresist after the mixed exposure method and development of the present invention.
FIG. 13 is a plan view of a protection transistor element for static electricity countermeasures according to the present invention.
FIG. 14 is a plan view of a protection transistor element for preventing static electricity according to the present invention.
FIG. 15 is a sectional view for explaining a flow of a 3-photomask process of the present invention.
FIG. 16 is a plan view of a lateral electric field type active matrix array substrate produced by using the mixed exposure method of the present invention.
FIG. 17 is a plan view of a scanning exposure apparatus used in the mixed exposure process of the present invention.
FIG. 18 is a plan view of a scanning exposure apparatus used in the mixed exposure process of the present invention.
FIG. 19 is a feedback control flowchart used in the halftone exposure process of the present invention.
FIG. 20 is a diagram illustrating the optical principle of a white interferometer that measures the level difference between a halftone exposed portion and an unexposed portion in the present invention.
FIG. 21 is a plan view of a lateral electric field type active matrix array substrate produced by using the mixed exposure method of the present invention.
FIG. 22 shows a 4-photomask process using a conventional halftone exposure technique.
FIG. 23 is a sectional structural view of a projection scanning exposure apparatus using the Bernoulli chuck of the present invention.
FIG. 24 is a sectional structural view of a projection scanning exposure apparatus using the pressure control photomask of the present invention.
1. Quartz glass substrate for photomask
2 ... Photomask metal (Cr or Mo)
3... Transflective photomask area (slit pattern area)
4... Translucent photomask region (a-Si or TiSix or MoSixor Ti)
5 ... Completely transparent area
6 ... Area after development of positive resist UV exposure complete blocking area
7 ... Area after development of semi-transparent area of positive resist UV exposure
8 ... Area where the positive resist is completely exposed after UV exposure
9 ... Gate insulation film
10. Thin film semiconductor layer (non-doped layer)
11 ... Thin film semiconductor layer (Doping layer ... Ohmic contact layer)
12 ... Barrier metal layer
13 ... Low resistance gold layer
14 ... Video signal wiring
15 Scan line
16. Electrostatic countermeasure pixel area peripheral common electrode
17 Thin film semiconductor layer
18. Contact hole for making static electricity countermeasure thin film transistor circuit
19 ... Scanning line terminal
20 ... Common electrode in pixel (pixel electrode)
21 Scanning line terminal drive circuit junction electrode (metal electrode)
22 Liquid crystal drive electrode (pixel electrode)
23 ... Passivation film
24 ... Scanning line terminal contact hole
25 ... UV light
26 ... Positive resist UV exposure complete blocking area
27 ... Positive resist UV exposure area
28 ... UV light condenser lens
29... Positive resist area partially exposed with UV light
30 ... Area after development of positive resist UV exposure and incomplete exposure
31 ... Slit contact grooves formed by partial exposure with UV light
32. Area where the positive resist is completely removed after being partially exposed to UV light
33... Flattened passivation film applied by printing
34 ... Pixel peripheral common electrode terminal
35 ... Video signal wiring terminal
36 ... Photomask
37 X & Y axis movable stage
38 ... Y axis movable stage
39 ... Lens module for multi-projection exposure
40. Fixed optical module for partial exposure
41 Optical module for X-axis movable part exposure
42 .. Static electricity protection circuit
43 ... UV light source
44 ... red laser displacement meter
45 ... Bernoulli chuck (vacuum non-contact suction plate)
46 Pellicle
47 Projection exposure lens
48 ... Positive resist
49 ... Glass substrate for thin film transistor array
50 ... Optical module for partial exposure with adjustable exposure width
51 ... Pressure sensor
A pair of substrates at least one of which is transparent, a liquid crystal composition layer sandwiched between the substrates, and a plurality of scanning lines and an image arranged in a matrix on the facing surface of one of the substrates Regarding a method of manufacturing a horizontal electric field mode liquid crystal display device including a signal line and a thin film transistor element connected to the pixel electrode paired with a common electrode and the pixel electrode, the scan line, and the video signal line.
Using a halftone photomask consisting of a completely transmissive area, a semi-transmissive area and a completely blocked area,
A thin film transistor element semiconductor layer is formed in a completely cut-off region, and a connection portion for forming a protection transistor element for preventing static electricity that connects the common electrode and the scanning line, and static electricity that connects the common electrode and the video signal wiring. Contact holes for the above three connection parts of the connection part for forming the protection transistor element for countermeasures and the connection part of the scanning line driving external circuit and the scanning line terminal part are formed in a completely transmissive region, and the other regions are A method of manufacturing a horizontal electric field mode liquid crystal display device, characterized in that all are formed in a semi-transmissive region.
Using a normal photomask consisting of a completely transparent area and a completely blocked area,
The semiconductor layer of the thin film transistor element is formed in a completely cut-off region, all others are formed in a completely transmissive region, and the entire surface is exposed under incomplete exposure conditions (under exposure conditions) with reduced UV irradiation energy density during exposure, and then the common electrode And a connecting portion for forming a protection transistor element for preventing static electricity connecting the scanning line, a connecting portion for forming a protection transistor element for preventing static electricity connecting the common electrode and the video signal wiring, and scanning Only the contact hole area of the above three connection portions of the connection portion between the line drive external circuit and the scanning line terminal portion is irradiated with ultraviolet rays using another photomask, or ultraviolet rays squeezed into a spot shape without using a photomask A method of manufacturing a horizontal electric field type liquid crystal display device, characterized in that complete exposure is carried out by scanning and irradiating the light.
A thin film transistor element semiconductor layer is formed in a completely blocked region using a normal photomask consisting of a completely transmissive region and a completely blocked region, and all others are formed in a completely transmissive region, and the UV irradiation energy density is reduced during exposure. While scanning exposure under full exposure conditions (under-exposure conditions), simultaneously connect the common electrode and video signal wiring to the connection part for forming the protection transistor element for static electricity prevention that connects the common electrode and the scanning line. The above-mentioned three connection parts, that is, the connection part for forming the protective transistor element for preventing static electricity and the connection part of the scanning line driving external circuit and the scanning line terminal part, are scanned with the spotted ultraviolet rays. A method of manufacturing a horizontal electric field type liquid crystal display device using a mixed simultaneous exposure method in which only these three connection portions are completely exposed.
4. The method of manufacturing a horizontal electric field type liquid crystal display device according to claim 1, wherein the device is used in an exposure process using the photomask, and after exposure and development, a halftone exposure region (incomplete exposure region). A scanning exposure apparatus characterized in that after the film thickness of the positive resist is measured, the exposure light amount is feedback-controlled according to the measured value.
4. The method of manufacturing a horizontal electric field type liquid crystal display device according to claim 1, wherein the device is used in an exposure process using the photomask, and after exposure and development, a halftone exposure region (incomplete exposure region). Film thickness step of positive resist in the completely unexposed area (UV light completely blocking area) or film thickness difference of positive resist in the halftone exposed area (incompletely exposed area) and completely exposed area (area where no positive resist exists) A scanning exposure apparatus characterized in that the exposure light amount is feedback-controlled in accordance with the measured value after measuring with a white interferometer.
A horizontal electric field mode liquid crystal display device manufactured by using the manufacturing method according to claim 1.
A horizontal electric field mode liquid crystal display device manufactured by using the manufacturing method according to claim 1, and a connection portion for forming a protection transistor element for preventing static electricity connecting a common electrode and a scanning line; The connection width of the connection portion for forming the anti-static protection transistor element connecting the common electrode and the video signal wiring is 1 / less than the connection width of the connection portion of the scanning line driving external circuit and the scanning line terminal portion. A lateral electric field type liquid crystal display device characterized by being narrowed by about 2 to 1/100.
It is a mix scanning exposure apparatus used for the manufacturing method of the horizontal electric field type liquid crystal display device of Claim 3,
In addition to the function of scanning and exposing the mask pattern to the positive photoresist applied to the active matrix substrate, the photomask and stage move in the Y-axis direction at the same speed in conjunction with the exposure apparatus for ultra-large active matrix substrates. A mix that has the function of scanning and exposing ultraviolet light directly in a width of about 0.1 mm to 5 mm without using a photomask, and can expose a positive photoresist using the above two functions simultaneously. Scanning exposure device .
9. The exposure apparatus according to claim 8, wherein a spot scanning exposure optical system that does not use a photomask after full scan underexposure processing is used, or an exposure sequence for performing spot scan exposure on a scanning line or a terminal portion of a protection transistor element for static electricity countermeasures. During underexposure, spot scanning exposure is performed simultaneously using the spot scanning exposure optical system only in the Y-axis direction. After all the entire surface scanning underexposure is completed, spot scanning exposure is performed using the spot scanning exposure optical system only in the X-axis direction. A mix scanning exposure apparatus capable of performing a mix exposure with a single exposure apparatus using an exposure sequence to be performed.
JP2002237219A 2002-07-01 2002-07-01 Horizontal electric field type liquid crystal display device, manufacturing method thereof, scanning exposure apparatus, and mixed scanning exposure apparatus Active JP4565799B2 (en)
JP2002237219A JP4565799B2 (en) 2002-07-01 2002-07-01 Horizontal electric field type liquid crystal display device, manufacturing method thereof, scanning exposure apparatus, and mixed scanning exposure apparatus
TW092113536A TWI282897B (en) 2002-07-01 2003-05-20 Transverse electric-field type liquid crystal display device, process of manufacturing the same, and scan-exposing device
KR1020030039603A KR100551319B1 (en) 2002-07-01 2003-06-18 Horizontal electrical field type LCD, method for making the same, and scanning-exposing apparatus
EP03014265.7A EP1378788B1 (en) 2002-07-01 2003-06-25 Transverse electric-field type liquid crystal display device, process of manufacturing the same, and scan-exposing device
US10/606,175 US7125654B2 (en) 2002-07-01 2003-06-25 Transverse electric-field type liquid crystal display device, process of manufacturing the same, and scan-exposing device
CNB031457827A CN100370347C (en) 2002-07-01 2003-06-30 Transverse electric-field type liquid crystal display device, its making method and scanning exposure device
US11/250,040 US7749688B2 (en) 2002-07-01 2005-10-13 Transverse electric-field type liquid crystal display device, process of manufacturing the same, and scan-exposing device
US11/249,596 US7423723B2 (en) 2002-07-01 2005-10-13 Transverse electric-field type liquid crystal display device, process of manufacturing the same, and scan-exposing device
US12/220,781 US20080297756A1 (en) 2002-07-01 2008-07-28 Transverse electric-field type liquid crystal display device, process of manufacturing the same, and scan-exposing device
US13/956,190 US9201309B2 (en) 2002-07-01 2013-07-31 Transverse electric-field type liquid crystal display device, process of manufacturing the same, and scan-exposing device
JP2004038130A JP2004038130A (en) 2004-02-05
JP4565799B2 true JP4565799B2 (en) 2010-10-20
ID=29720330
JP2002237219A Active JP4565799B2 (en) 2002-07-01 2002-07-01 Horizontal electric field type liquid crystal display device, manufacturing method thereof, scanning exposure apparatus, and mixed scanning exposure apparatus
US (5) US7125654B2 (en)
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JP (1) JP4565799B2 (en)
KR (1) KR100551319B1 (en)
CN (1) CN100370347C (en)
TW (1) TWI282897B (en)
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2002-07-01 JP JP2002237219A patent/JP4565799B2/en active Active
2003-05-20 TW TW092113536A patent/TWI282897B/en active
2003-06-18 KR KR1020030039603A patent/KR100551319B1/en not_active IP Right Cessation
2003-06-25 EP EP03014265.7A patent/EP1378788B1/en active Active
2003-06-25 US US10/606,175 patent/US7125654B2/en active Active
2003-06-30 CN CNB031457827A patent/CN100370347C/en active IP Right Grant
2005-10-13 US US11/250,040 patent/US7749688B2/en active Active
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2008-07-28 US US12/220,781 patent/US20080297756A1/en not_active Abandoned
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US9201309B2 (en) 2015-12-01
US20080297756A1 (en) 2008-12-04
US20040048405A1 (en) 2004-03-11
US20130314687A1 (en) 2013-11-28
KR20040004055A (en) 2004-01-13
US20060035175A1 (en) 2006-02-16
US20060040214A1 (en) 2006-02-23
CN100370347C (en) 2008-02-20
CN1470927A (en) 2004-01-28
EP1378788A2 (en) 2004-01-07
EP1378788B1 (en) 2015-06-17
US7125654B2 (en) 2006-10-24
TW200401150A (en) 2004-01-16
US7423723B2 (en) 2008-09-09
JP2004038130A (en) 2004-02-05
US7749688B2 (en) 2010-07-06
KR100551319B1 (en) 2006-02-13
TWI282897B (en) 2007-06-21
EP1378788A3 (en) 2007-05-23
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