Patent Publication Number: US-2023137811-A1

Title: Semiconductor device and method of manufacturing semiconductor device

Description:
TECHNICAL FIELD 
     The present disclosure relates to a semiconductor device and a method of manufacturing a semiconductor device. 
     BACKGROUND OF INVENTION 
     An example of a semiconductor device of the related art that includes a Schottky barrier junction is described in Japanese Unexamined Patent Application Publication No. 9-232597. In this semiconductor device, an insulating film is formed on a surface of a semiconductor layer in which a trench has been formed, and an electric conductor is embedded into the trench. Then, the insulating film that has been formed on the surface of the semiconductor layer and that is adjacent to the trench is removed by etching in such a manner as to expose the surface of the semiconductor layer, so that a Schottky barrier junction is formed at the surface of the semiconductor layer. 
     SUMMARY 
     In an embodiment of the present disclosure, a method of manufacturing a semiconductor device includes forming an insulating film onto a surface of a semiconductor layer in which a trench has been formed, embedding an electric conductor into the trench, removing the insulating film that has been formed on the surface of the semiconductor layer and that is adjacent to the trench by etching in such a manner as to expose the surface of the semiconductor layer, further etching the surface of the semiconductor layer in such a manner that the surface of the semiconductor layer is lowered relative to an upper end of the insulating film covering an inner surface of the trench, and forming a Schottky barrier junction at the surface of the semiconductor layer. 
     In another embodiment of the present disclosure, a semiconductor device includes a semiconductor layer in which a trench has been formed, an insulating film covering an inner surface of the trench, an electric conductor embedded in the trench covered with the insulating film, and a Schottky barrier layer forming a Schottky barrier junction together with a surface of the semiconductor layer adjacent to the trench. The Schottky barrier junction is positioned lower than an upper end of the insulating film covering the inner surface of the trench. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a schematic sectional view illustrating a manufacturing process of a semiconductor device according to an embodiment of the present disclosure. 
         FIG.  2    is a schematic sectional view illustrating a manufacturing process to be performed subsequent to that illustrated in  FIG.  1   . 
         FIG.  3    is a schematic sectional view illustrating a manufacturing process to be performed subsequent to that illustrated in  FIG.  2   . 
         FIG.  4    is a schematic sectional view illustrating a manufacturing process to be performed subsequent to that illustrated in  FIG.  3   . 
         FIG.  5    is a schematic sectional view illustrating a manufacturing process to be performed subsequent to that illustrated in  FIG.  4    and illustrating a semiconductor device model A 4 . 
         FIG.  6    is an enlarged view corresponding to  FIG.  2   . 
         FIG.  7    is an enlarged view corresponding to  FIG.  3   . 
         FIG.  8    is an enlarged view corresponding to  FIG.  4   . 
         FIG.  9    is an enlarged view corresponding to  FIG.  5   . 
         FIG.  10    is a schematic sectional view illustrating a semiconductor device model A 1 . 
         FIG.  11    is a schematic sectional view illustrating a semiconductor device model A 2 . 
         FIG.  12    is a schematic sectional view illustrating a semiconductor device model A 3 . 
         FIG.  13    is a schematic sectional view illustrating a semiconductor device model A 5 . 
         FIG.  14    is a graph illustrating reverse voltage-current characteristics of the models A 1  to A 5 . 
     
    
    
     DESCRIPTION OF EMBODIMENTS 
     An embodiment of the present disclosure will be described below with reference to the drawings. 
     A method of manufacturing a semiconductor device will now be described with reference to the drawings. 
     [Overview of Manufacturing Method] 
     As illustrated in  FIG.  1   , an insulating film  12  is formed on a surface of a semiconductor layer  11  in which a trench  10  has been formed, and an electric conductor  13  is embedded into the trench  10 . For example, polysilicon may be used as the electric conductor  13 . The semiconductor layer  11  may be made of, for example, silicon, and the insulating film  12  may be made of, for example, a silicon oxide film. 
     (Process of Etching Insulating Film) 
     Next, the insulating film  12  that has been formed on a semiconductor layer surface  11   a  and that is adjacent to the trench  10  is removed by etching in such a manner as to expose the semiconductor layer surface  11   a  as illustrated in  FIG.  2   . In this case, the insulating film  12  may sometimes be overetched in order to sufficiently expose the semiconductor layer surface  11   a , and an upper end  12   a  of the insulating film  12  covering an inner surface  10   a  of the trench  10  may sometimes be etched deeper.  FIG.  2    illustrates a case where the upper end  12   a  is located below the semiconductor layer surface  11   a . In this case, the insulating film on the semiconductor layer surface  11   a  is sufficiently removed. Note that, in the descriptions of the semiconductor device and the method of manufacturing the semiconductor device, a downward direction and an upward direction respectively refer to a direction in which the trench  10  extends from the surface of the semiconductor layer  11  and a direction opposite to the downward direction, and these directions do not refer to the vertical direction (the direction of gravity) in the manufacture of the semiconductor device or when the semiconductor device is used. 
     (Process of Etching Semiconductor Layer Surface) 
     Subsequently, as illustrated in  FIG.  3   , the semiconductor layer surface  11   a  is etched in such a manner that the semiconductor layer surface  11   a  is lowered relative to the upper end  12   a  of the insulating film  12  covering the inner surface  10   a  of the trench  10 . In other words, the position of the semiconductor layer surface  11   a  becomes lower than the position of the upper end  12   a  of the insulating film  12  in  FIG.  2   . Here, the semiconductor layer surface  11   a  is etched so as to be positioned lower than the upper end  12   a  of the insulating film  12  as illustrated in  FIG.  3   . However, the semiconductor layer surface  11   a  may be etched so as to be located at a predetermined position above the upper end  12   a  of the insulating film  12  or so as to be located at the same position as the upper end  12   a  as long as the height of the semiconductor layer surface  11   a  is reduced with respect to the upper end  12   a  of the insulating film  12 . 
     (Process of Forming Schottky Barrier Junction) 
     After that, a Schottky barrier layer  14  is formed on the semiconductor layer surface  11   a  as illustrated in  FIG.  4    so as to form a Schottky barrier junction. Here, for example, the Schottky barrier layer  14  may be made of nickel silicide or may be made of a metal such as nickel, molybdenum, or platinum. 
     Subsequently, an upper surface electrode  15  made of aluminum is formed on the metallic layer  14 , the electric conductor  13 , and the upper end  12   a  of the insulating film  12 . Then, other necessary processes are performed, so that manufacture of the semiconductor device is completed. 
     [Supplementary Description of Manufacturing Method and Description of Semiconductor Device] 
       FIG.  6    to  FIG.  9    are enlarged views clearly illustrating the structures when the above-described processes are performed.  FIG.  6    is an enlarged view corresponding to  FIG.  2   .  FIG.  7    is an enlarged view corresponding to  FIG.  3   .  FIG.  8    is an enlarged view corresponding to  FIG.  4   .  FIG.  9    is an enlarged view corresponding to  FIG.  5   . 
     The semiconductor device having the structure illustrated in  FIG.  5    and  FIG.  9    will be referred to as a model A 4 . Due to the differences in the positional relationship between the semiconductor layer surface  11   a  and an upper end portion  12   b  of the insulating film  12 , the semiconductor device having the structure illustrated in  FIG.  10    will be referred to as a model A 1 . The semiconductor device having the structure illustrated in  FIG.  11    will be referred to as a model A 2 . The semiconductor device having the structure illustrated in  FIG.  12    will be referred to as a model A 3 . The semiconductor device having the structure illustrated in  FIG.  13    will be referred to as a model A 5 . 
     Each of the semiconductor device models A 1  to A 5  includes the semiconductor layer  11  in which the trench  10  has been formed, the insulating film  12  covering the inner surface of the trench  10 , the electric conductor  13  embedded in the trench  10 , which is covered with the insulating film  12 , and the Schottky barrier layer  14  forming a Schottky barrier junction together with the semiconductor layer surface  11   a , which is adjacent to the trench  10 . 
     In the semiconductor device model A 1 , the Schottky barrier junction formed by the semiconductor layer  11  and the Schottky barrier layer  14  is located at the same position as the upper end  12   a  of the insulating film  12 , which covers the inner surface  10   a  of the trench  10 , in the vertical direction. In this structure, the insulating film  12  and the Schottky barrier layer  14  are in point contact with each other as illustrated in the sectional view in  FIG.  10   . In other words, in this structure, the semiconductor layer  11  and the upper surface electrode  15  are in point contact with each other without the Schottky barrier layer  14  interposed therebetween. 
     In each of the semiconductor device models A 2  to A 5 , the Schottky barrier junction formed by the semiconductor layer  11  and the Schottky barrier layer  14  is located below the upper end  12   a  of the insulating film  12  covering the inner surface  10   a  of the trench  10 . 
     In the model A 4 , in the process of forming a Schottky barrier junction illustrated in  FIG.  8   , 100% of the area of an end surface  14   a  of the Schottky barrier layer  14  forming the Schottky barrier junction is caused to overlap and to be in contact with the upper end portion  12   b  of the insulating film  12  in a thickness direction T. This is common to the model A 5 . 
     As a result, in the model A 4  illustrated in  FIG.  9    and the model A 5  illustrated in  FIG.  13   , 100% of the area of the end surface  14   a  of the Schottky barrier layer  14  forming the Schottky barrier junction overlaps and is in contact with the upper end portion  12   b  of the insulating film  12  in the thickness direction T. 
     In the model A 5 , the upper end portion  12   b  of the insulating film  12  projects in such a manner as to be located above an upper surface of the Schottky barrier layer  14  that is a surface opposite to the surface of the Schottky barrier layer  14  forming the Schottky barrier junction. The semiconductor device having such a structure can be easily manufactured while ensuring 100% overlap amount as the above-mentioned overlapping. 
     In the process of forming a Schottky barrier junction in the manufacture of the models A 3  to A 5 , a lower area of the end surface  14   a  of the Schottky barrier layer  14  forming the Schottky barrier junction, the lower area being at least 50% of the end surface  14   a , is caused to overlap and to be in contact with the upper end portion  12   b  of the insulating film  12  in the thickness direction T. 
     As a result, in the models A 3  to A 5 , a lower area of the end surface  14   a  of the Schottky barrier layer  14  forming the Schottky barrier junction, the lower area being at least 50% of the end surface  14   a , overlaps and is in contact with the upper end portion  12   b  of the insulating film  12  in the thickness direction T. 
     In the model A 3 , the lower area of the end surface  14   a  of the Schottky barrier layer  14  forming the Schottky barrier junction, the lower area being 50% of the end surface  14   a , overlaps and is in contact with the upper end portion  12   b  of the insulating film  12  in the thickness direction T. 
     In the process of forming a Schottky barrier junction in the manufacture of the models A 2  to A 5 , the lower area of the end surface  14   a  of the Schottky barrier layer  14  forming the Schottky barrier junction is caused to overlap and to be in contact with the upper end portion  12   b  of the insulating film  12  in the thickness direction T. 
     In the model A 2 , a small lower area of the end surface  14   a  of the Schottky barrier layer  14  forming the Schottky barrier junction, the lower area being less than 50% of the end surface  14   a , overlaps and is in contact with the upper end portion  12   b  of the insulating film  12  in the thickness direction T. The overlapping length is, for example, 0.01 μm. 
     The reverse voltage-current characteristics of the Schottky diodes of the above-described models A 1  to A 5  were examined, and the examination results are illustrated in  FIG.  14   . 
     The reverse current was suppressed most in the model A 5 , followed by the model A 4 . The difference between the model A 4  and the model A 5  was small. Each of the models A 4  and A 5  is a model with 100% overlap amount. A leak current was suppressed presumably because the Schottky barrier junction is isolated from the upper surface electrode  15 . 
     The model A 3  was the third most capable of suppressing the reverse current and is a model with 50% overlap amount. The model A 2  was the fourth most capable of suppressing the reverse current, and the model A 1  was the fifth most capable of suppressing the reverse current. Substantially the same results were obtained from the model A 1  and the model A 2 . 
     As a result of performing the process of etching a semiconductor layer surface, a remarkable effect of improving the reverse characteristics was observed, and in particular, the overlap amount was 50% or more. 
     (Silicide) 
     In the process of forming a Schottky barrier junction, a method is used in which a Schottky barrier junction is formed by a silicide process and in which the Schottky barrier layer  14  forming the Schottky barrier junction is made of silicide. 
     In other words, the Schottky barrier layer  14  in each of the models A 1  to A 5  is made of silicide. 
     (Relationship Between Process of Etching Insulating Film and Process of Etching Semiconductor Layer Surface) 
     The process of etching a semiconductor layer surface may be performed during the process of etching an insulating film. A wafer having a structure that has not yet undergone the process of etching an insulating film may be placed in an etching chamber, and a gas that etches the semiconductor layer  11  may be added in the later stage of the etching of the insulating film  12 , so that the etching of the semiconductor layer  11  may be progressed in the later stage of the progress period of etching the insulating film  12  in such a manner as to etch the semiconductor layer surface  11   a.    
     Alternatively, the process of etching the semiconductor layer surface  11   a  may be performed after the process of etching the insulating film  12 . In this case, the etching of the insulating film  12  and the etching of the semiconductor layer surface  11   a  may be performed in the same chamber or may be performed in different chambers. 
     In addition, at a timing after the process of etching an insulating film and before the process of forming a Schottky barrier junction, the semiconductor layer surface  11   a  may be etched by using an anisotropic etching solution on the wafer surface when performing cleaning before formation of an electrode. 
     According to the manufacturing method of the above-described embodiment of the present invention, the process of etching a semiconductor layer surface is performed so as to bring the height of the semiconductor layer surface  11   a  to the same level as the upper end  12   a  of the insulating film  12  covering the inner surface  10   a  of the trench  10  or so as to reduce the height of the semiconductor layer surface  11   a  to be lower than that of the upper end  12   a  of the insulating film  12 . As a result, a leak current that occurs at an edge of the Schottky barrier junction in the vicinity of the end surface  14   a  of the Schottky barrier layer  14  when a reverse voltage is applied can be reduced so as to be low. 
     In addition, the insulating film on the semiconductor layer surface  11   a  can be sufficiently removed, and thus, the Schottky barrier junction having favorable characteristics can be obtained. 
     According to the semiconductor device of the above-described embodiment of the present invention, a leak current that occurs at an edge of the Schottky barrier junction in the vicinity of the end surface  14   a  of the Schottky barrier layer  14  when a reverse voltage is applied can be reduced so as to be low. 
     The insulating film on the semiconductor layer surface  11   a  is sufficiently removed, and the characteristics of the Schottky barrier junction are favorable. 
     Although the embodiment of the present disclosure has been described above, the embodiment has been described as an example, and there are various other embodiments available. The components can be omitted, replaced, or changed within the gist of the invention. 
     INDUSTRIAL APPLICABILITY 
     The present disclosure can be used for a semiconductor device and a method of manufacturing a semiconductor device. 
     REFERENCE SIGNS 
     
         
         
           
               10  trench 
               10   a  inner surface 
               11  semiconductor layer 
               11   a  semiconductor layer surface 
               12  insulating film 
               12   a  upper end 
               12   b  upper end portion 
               13  electric conductor 
               14  Schottky barrier layer 
               14   a  end surface 
               15  upper surface electrode 
             A 1  to A 5  semiconductor device model