Patent Publication Number: US-2020285089-A1

Title: Display device

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application claims priority from and the benefit of Korean Patent Application No. 10-2019-0026391 filed on Mar. 7, 2019, which is hereby incorporated by reference for all purposes as if fully set forth herein. 
     BACKGROUND 
     Field 
     Exemplary embodiments of the invention relate generally to a display device, and, more specifically, to a liquid crystal display. 
     Discussion of the Background 
     A display device, such as a liquid crystal display (LCD) and an organic light diode display, includes a display panel including a plurality of pixels as a unit for displaying an image. 
     The display panel of the liquid crystal display includes a liquid crystal layer including liquid crystal molecules, a field generating electrode controlling alignment of the liquid crystal molecules of the liquid crystal layer, a plurality of signal lines applying a voltage to at least a portion of the field generating electrode, and a plurality of switching elements connected thereto. If the voltage is applied to the field generating electrode, an electric field is generated to the liquid crystal layer to arrange the liquid crystal molecules, such that a desired image may be displayed by controlling an amount of transmitted light. To control the amount of transmitted light, the display panel may include at least one polarizer. 
     The field generating electrode included in the liquid crystal display includes a pixel electrode applied with the data voltage and an opposed electrode applied with a common voltage. The pixel electrode may be applied with the data voltage through a switching element, which may be a thin film transistor. 
     The above information disclosed in this Background section is only for understanding of the background of the inventive concepts, and, therefore, it may contain information that does not constitute prior art. 
     SUMMARY 
     A display device constructed according to exemplary embodiments of the invention are capable of reducing a light leakage phenomenon and that may be repaired with reduced light leakage. 
     A display device according to exemplary embodiments also provides a high aperture ratio and transmittance. 
     Additional features of the inventive concepts will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concepts. 
     A display device according to an exemplary embodiment includes a substrate, a gate line disposed on the substrate and transmitting a gate signal, a first reference voltage line separated from the gate line and transmitting a reference voltage, a data line insulated from and crossing the gate line and the first reference voltage line, a first drain electrode separated from the data line, an insulating layer disposed on the data line and the first drain electrode, and a pixel electrode layer disposed on the insulating layer, in which the pixel electrode layer includes a pixel electrode and a light blocking electrode overlapping the data line, the pixel electrode includes a first sub-pixel electrode including a first extension part protruded toward the first drain electrode and a contact portion connected to one end of the first extension part, the first extension part of the first sub-pixel electrode has a first side parallel to a first side of the light blocking electrode, and an interval between the first sides of the first extension part and the light blocking electrode is less than about 4 μm. 
     The first extension part may include a first portion and a second portion, the first portion may include the first side extending in a first direction parallel to the first side of the light blocking electrode, and the second portion may extend from one end of the first portion in a second direction intersecting the first direction and is bent in the first direction to be connected to the contact portion. 
     The first portion may include a first part extending from one edge of the first sub-pixel electrode in a third direction oblique to the first direction, the first part being parallel to a portion of a side of the light blocking electrode and connected to the first side. 
     The first portion and the second portion may be connected to each other, and the first direction may cross the second direction. 
     The first sub-pixel electrode may further include a second extension part, and the second extension part may have a second side opposing the first side of the first extension part, the second side of the second extension part may be parallel to a second side of another light blocking electrode adjacent to the light blocking electrode. 
     An interval between the second sides of the second extension part and the adjacent other light blocking electrode may be less than about 4 μm. 
     The first extension part may be connected to a first edge of the first sub-pixel electrode, and the second extension part may be connected to a second edge of the first sub-pixel electrode. 
     The second extension part may have a first part protruding from the second edge of the first sub-pixel electrode, the first part being parallel to the first direction, a second part connected to the first part and extending in the second direction, and a third part connected to the second part and comprising the second side of the second extension part. 
     The gate line may include a first gate electrode, a second gate electrode, and a third gate electrode, a first transistor may include the first gate electrode, a first source electrode, and a first drain electrode, a second transistor may include the second gate electrode, a second source electrode, and a second drain electrode, a third transistor may include the third gate electrode, a third source electrode, and a third drain electrode, the pixel electrode may further include a second sub-pixel electrode, and the insulating layer may include a first contact hole disposed on the first drain electrode, a second contact hole disposed on the second drain electrode, and a third contact hole disposed on the third drain electrode, the first sub-pixel electrode may be electrically connected to the first drain electrode through the first contact hole, the second sub-pixel electrode may be electrically connected to the second drain electrode through the second contact hole, and the first contact hole, the second contact hole, and the third contact hole may be disposed on the same side with respect to the gate line. 
     The display device may further include a connecting member electrically connecting the first reference voltage line and the third drain electrode through the third contact hole may be further included. 
     The connecting member may further include a protrusion protruded toward the second extension part. 
     One side of the protrusion of the connecting member may be parallel to one side of the second extension part. 
     The interval between sides of the protrusion and the second extension part facing each other may be less than about 4 μm. 
     The protrusion may include a first part having a first width and a second part having a second width less than the first width. 
     The display device may further include a second reference voltage line disposed on the gate line and the first reference voltage line, in which the second reference voltage line may be electrically connected to the first reference voltage line, include the third drain electrode, and disposed on the same conductive layer as the third drain electrode. 
     One second reference voltage line may be disposed in three adjacent pixels. 
     Each of the first drain electrode, the second drain electrode, the protrusion of the data line, and a connection portion between the first extension part and the first sub-pixel electrode may be cut. 
     The first sub-pixel electrode may further include a cutting position guide part for showing a cut position at the connection portion of the first extension part and the first sub-pixel electrode. 
     The first extension part of the first sub-pixel electrode may be configured to be cut when the protrusion of the date line is cut. 
     The display device may further include a color filter disposed on the substrate, a facing substrate facing the substrate and including a light blocking member and a common electrode, and a liquid crystal layer disposed between the substrate and the facing substrate. 
     It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention, and together with the description serve to explain the inventive concepts. 
         FIG. 1  is an equivalent circuit diagram of one pixel of a display device according to an exemplary embodiment. 
         FIG. 2  is a layout view of a part of one pixel of a display device according to an exemplary embodiment. 
         FIG. 3  is a cross-sectional view taken along line of the display device of  FIG. 2 . 
         FIG. 4  is a cross-sectional view taken along line IVa-IVb of the display device of  FIG. 2 . 
         FIG. 5  is a view exemplarily illustrating a pixel electrode layer in the display device of  FIG. 2 . 
         FIG. 6  is a layout view of a part of one pixel of a display device according to another exemplary embodiment. 
         FIG. 7  is a view exemplarily illustrating a pixel electrode layer in the display device of  FIG. 6 . 
         FIG. 8  is a photograph illustrating a portion where light is leaked in the display device of  FIG. 6 . 
         FIG. 9  is a plan layout view for a display area of a display device according to an exemplary embodiment. 
         FIG. 10  is a layout view of three pixels of a display device according to an exemplary embodiment. 
         FIG. 11  is a layout view of a color filter and a longitudinal reference voltage line of three pixels of a display device according to an exemplary embodiment. 
         FIG. 12  is a view showing a disconnection position for repairing a pixel in the display device of  FIG. 6 . 
     
    
    
     DETAILED DESCRIPTION 
     In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of various exemplary embodiments or implementations of the invention. As used herein “embodiments” and “implementations” are interchangeable words that are non-limiting examples of devices or methods employing one or more of the inventive concepts disclosed herein. It is apparent, however, that various exemplary embodiments may be practiced without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring various exemplary embodiments. Further, various exemplary embodiments may be different, but do not have to be exclusive. For example, specific shapes, configurations, and characteristics of an exemplary embodiment may be used or implemented in another exemplary embodiment without departing from the inventive concepts. 
     Unless otherwise specified, the illustrated exemplary embodiments are to be understood as providing exemplary features of varying detail of some ways in which the inventive concepts may be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions, and/or aspects, etc. (hereinafter individually or collectively referred to as “elements”), of the various embodiments may be otherwise combined, separated, interchanged, and/or rearranged without departing from the inventive concepts. 
     The use of cross-hatching and/or shading in the accompanying drawings is generally provided to clarify boundaries between adjacent elements. As such, neither the presence nor the absence of cross-hatching or shading conveys or indicates any preference or requirement for particular materials, material properties, dimensions, proportions, commonalities between illustrated elements, and/or any other characteristic, attribute, property, etc., of the elements, unless specified. Further, in the accompanying drawings, the size and relative sizes of elements may be exaggerated for clarity and/or descriptive purposes. When an exemplary embodiment may be implemented differently, a specific process order may be performed differently from the described order. For example, two consecutively described processes may be performed substantially at the same time or performed in an order opposite to the described order. Also, like reference numerals denote like elements. 
     When an element, such as a layer, is referred to as being “on,” “connected to,” or “coupled to” another element or layer, it may be directly on, connected to, or coupled to the other element or layer or intervening elements or layers may be present. When, however, an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present. To this end, the term “connected” may refer to physical, electrical, and/or fluid connection, with or without intervening elements. Further, the D1-axis, the D2-axis, and the D3-axis are not limited to three axes of a rectangular coordinate system, such as the x, y, and z-axes, and may be interpreted in a broader sense. For example, the D1-axis, the D2-axis, and the D3-axis may be perpendicular to one another, or may represent different directions that are not perpendicular to one another. For the purposes of this disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” may be construed as X only, Y only, Z only, or any combination of two or more of X, Y, and Z, such as, for instance, XYZ, XYY, YZ, and ZZ. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. 
     Although the terms “first,” “second,” etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Thus, a first element discussed below could be termed a second element without departing from the teachings of the disclosure. 
     Spatially relative terms, such as “beneath,” “below,” “under,” “lower,” “above,” “upper,” “over,” “higher,” “side” (e.g., as in “sidewall”), and the like, may be used herein for descriptive purposes, and, thereby, to describe one elements relationship to another element(s) as illustrated in the drawings. Spatially relative terms are intended to encompass different orientations of an apparatus in use, operation, and/or manufacture in addition to the orientation depicted in the drawings. For example, if the apparatus in the drawings is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. Furthermore, the apparatus may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and, as such, the spatially relative descriptors used herein interpreted accordingly. 
     The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms, “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Moreover, the terms “comprises,” “comprising,” “includes,” and/or “including,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, and/or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It is also noted that, as used herein, the terms “substantially,” “about,” and other similar terms, are used as terms of approximation and not as terms of degree, and, as such, are utilized to account for inherent deviations in measured, calculated, and/or provided values that would be recognized by one of ordinary skill in the art. 
     Various exemplary embodiments are described herein with reference to sectional and/or exploded illustrations that are schematic illustrations of idealized exemplary embodiments and/or intermediate structures. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, exemplary embodiments disclosed herein should not necessarily be construed as limited to the particular illustrated shapes of regions, but are to include deviations in shapes that result from, for instance, manufacturing. In this manner, regions illustrated in the drawings may be schematic in nature and the shapes of these regions may not reflect actual shapes of regions of a device and, as such, are not necessarily intended to be limiting. 
     Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure is a part. Terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense, unless expressly so defined herein. 
     Hereinafter, a display device according to an exemplary embodiment will be described with reference to  FIG. 1 . 
       FIG. 1  is an equivalent circuit diagram of one pixel PX of a display device according to an exemplary embodiment. 
     A display device according to an exemplary embodiment includes a plurality of pixels PX as a unit capable of displaying an image. Referring to  FIG. 1 , one pixel PX may include a first sub-pixel PXaa and a second sub-pixel PXbb. The first sub-pixel PXaa includes a first transistor Qa connected to one data line  171  and one gate line  121 , and a first liquid crystal capacitor Clca connected to the first transistor Qa. The second sub-pixel PXbb includes a second transistor Qb connected to the same data line  171  and gate line  121  as the first transistor Qa, a third transistor Qc connected to the same gate line  121  as the second transistor Qb, and a second liquid crystal capacitor Clcb connected to the second transistor Qb and the third transistor Qc. 
     The first transistor Qa includes a gate electrode connected to the gate line  121 , a source electrode connected to the data line  171 , and a drain electrode connected to the first liquid crystal capacitor Clca. The first transistor Qa is controlled depending on a gate signal transmitted by the gate line  121 , such that a data voltage transmitted by the data line  171  is transmitted to an electrode of the first liquid crystal capacitor Clca. 
     The second transistor Qb includes a gate electrode connected to the same gate line  121  as the first transistor Qa, a source electrode connected to the same data line  171  as the first transistor Qa, and a drain electrode connected to the second liquid crystal capacitor Clcb and the source electrode of the third transistor Qc. 
     The third transistor Qc includes a gate electrode connected to the same gate line  121  as the first transistor Qa and the second transistor Qb, a source electrode connected to the drain electrode of the second transistor Qb, and a drain electrode to which a reference voltage Vref is applied. 
     The second transistor Qb and the third transistor Qc are controlled depending on the gate signal transmitted by the gate line  121 , and if the third transistor Qc and the second transistor Qb are turned on, the voltage having a divided value between the data voltage transmitted through the data line  171  and the reference voltage Vref is transmitted to an electrode of the second liquid crystal capacitor Clcb. The reference voltage Vref may be a predetermined constant voltage, for example. 
     The first sub-pixel PXaa and the second sub-pixel PXbb may display an image according to different gamma curves for one input image signal. The gamma curve means a curve which shows a change of luminance or transmittance for a gray of the input image signal. The gamma curve provided by the display device corresponds to the gamma curve provided by one pixel PX, and the gamma curve provided by one pixel PX corresponds to a sum of the gamma curves provided by two sub-pixels PXaa and PXbb. 
     The gamma curve on which the second sub-pixel PXbb depends may be controlled by controlling a resistance ratio of the third transistor Qc and the second transistor Qb, the reference voltage Vref, etc. As the charge voltage of the second liquid crystal capacitor Clcb is controlled through the control of the third transistor Qc, the reference voltage Vref, and the like, the luminance of two sub-pixels PXaa and PXbb may be varied, and if the voltage charged to the first liquid crystal capacitor Clca and the second liquid crystal capacitor Clcb is appropriately controlled, lateral visibility of the display device may be improved. 
     The detailed structure of the pixel PX of the display device according to an exemplary embodiment will further be described with reference to  FIG. 2  to  FIG. 4  along with  FIG. 1 . 
       FIG. 2  is a layout view of a part of one pixel of a display device according to an exemplary embodiment,  FIG. 3  is a cross-sectional view taken along line IIIa-IIIb of the display device of  FIG. 2 , and  FIG. 4  is a cross-sectional view taken along line IVa-IVb of the display device of  FIG. 2 . 
     The display device according to an exemplary embodiment may be a liquid crystal display, which may include a first display panel  100 , a second display panel  200 , and a liquid crystal layer  3  located between two display panels  100  and  200 . 
     In the first display panel  100 , a gate conductive layer including a plurality of gate lines  121  and a reference voltage line  131  (hereinafter referred to as “a first reference voltage line”) are disposed on an insulating substrate  110 . 
     The gate line  121  transmits a gate signal, mainly extends in a first direction DR 1 , and includes an extension portion  124 . The extension portion  124  of the gate line  121  includes a first gate electrode  124   a , a second gate electrode  124   b , and a third gate electrode  124   c , which are connected to each other. The second gate electrode  124   b  may be disposed between the first gate electrode  124   a  and the third gate electrode  124   c.    
     The extension portion  124  may have a shape that is extended or protruded in a second direction DR 2  from a portion of the gate line  121  extending in parallel to the first direction DR 1 . 
     The reference voltage line  131  transmits the reference voltage Vref, is separated from the gate line  121 , and extends substantially parallel to the gate line  121 . The reference voltage line  131  includes an extension portion  132  having a shape that is extended or protruded in the opposite direction to the second direction DR 2  from a portion of the reference voltage line  131  extending in parallel to the first direction DR 1 . More particularly, the direction in which the extension portion  124  is protruded from the gate line  121  and the direction in which the extension portion  132  is protruded from the reference voltage line  131  may be opposite to each other. In other words, the extension portion  124  of the gate line  121  and the extension portion  132  of the reference voltage line  131  may face each other and disposed between the portion of the gate line  121  extending in the first direction DR 1  and the portion of the reference voltage line  131  extending in the first direction DR 1   
     A gate insulating layer  140  may be disposed on the gate conductive layer and the exposed substrate  110 . The gate insulating layer  140  may include an inorganic insulating material, such as a silicon nitride (SiN x ), a silicon oxide (SiO x ), and a silicon oxynitride. 
     A semiconductor layer  151  including a first semiconductor  154   a , a second semiconductor  154   b , and a third semiconductor  154   c  is disposed in the gate insulating layer  140 . The first semiconductor  154   a  is disposed on the first gate electrode  124   a  to overlap the first gate electrode  124   a , the second semiconductor  154   b  is disposed on the second gate electrode  124   b  to overlap the second gate electrode  124   b , and the third semiconductor  154   c  is disposed on the third gate electrode  124   c  to overlap the third gate electrode  124   c . The first semiconductor  154   a , the second semiconductor  154   b , and the third semiconductor  154   c  may be connected to each other, and the second semiconductor  154   b  may be disposed between the first semiconductor  154   a  and the third semiconductor  154   c.    
     The semiconductor layer  151  may include an amorphous silicon, a polycrystalline silicon, or an oxide semiconductor including a metal oxide. 
     An ohmic contact layer  161  including a plurality of ohmic contact layers  163   a  and  165   a  may be disposed on the semiconductor layer  151 , and the ohmic contact layer  161  may not be formed on at least a partial region of the semiconductor layer  151 . 
     A data conductive layer is disposed on the ohmic contact layer  161 . The data conductive layer includes a plurality of data lines  171   a  and  171   b , a first source electrode  173   a , a second source electrode  173   b , a third source electrode  173   c , a first drain electrode  175   a , a second drain electrode  175   b , and a third drain electrode  175   c.    
     According to an exemplary embodiment, the first source electrode  173   a  and the second source electrode  173   b  are connected to each other and are connected to one data line  171   a . However, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, the first source electrode  173   a  and the second source electrode  173   b  may be connected to a different data line  171   b  in the pixels PX adjacent upward and downward. More particularly, the first source electrode  173   a  and the second source electrode  173   b  may be protruded from one of two data lines  171   a  and  171   b.    
     The first drain electrode  175   a  faces the first source electrode  173   a , and includes one end portion enclosed by the first source electrode  173   a  and an extension portion  177   a  disposed at the other side. 
     The second drain electrode  175   b  faces the second source electrode  173   b , and includes one end portion extending parallel to the second source electrode  173   b  and an extension portion  177   b  disposed at the other side. 
     The third source electrode  173   c  may be disposed on at least a portion of the second drain electrode  175   b . More particularly, the third source electrode  173   c  may be a portion of the second drain electrode  175   b  that opposes a portion of the second drain electrode  175   b  that faces the second source electrode  173   b.    
     The third drain electrode  175   c  may include one end portion facing the third source electrode  173   c  and the other end portion  176 . The third drain electrode  175   c  may extend from one end portion facing the third source electrode  173   c , which is then bent in the second direction DR 2  to be extended in the first direction DR 1 , and then bent again in the second direction DR 2  to be extended to the other end portion  176 . The end portion  176  of the third drain electrode  175   c  is electrically connected to the extension portion  132  of the reference voltage line  131 , thereby receiving the reference voltage Vref. 
     The data conductive layer may further include an auxiliary electrode  174   c  disposed between the third source electrode  173   c  and the third drain electrode  175   c . The auxiliary electrode  174   c  may be formed as an island type that overlaps the third semiconductor  154   c  and the third gate electrode  124   c . A width or length of the channel of the third transistor Qc may be controlled by the auxiliary electrode  174   c.    
     The extension portion  177   a  of the first drain electrode  175   a , the extension portion  177   b  of the second drain electrode  175   b , and the end portion  176  of the third drain electrode  175   c  are disposed on the side of the second direction DR 2  based on the gate line  121 . For example, as shown in  FIG. 2 , the extension portion  177   a  of the first drain electrode  175   a , the extension portion  177   b  of the second drain electrode  175   b , and the end portion  176  of the third drain electrode  175   c  may disposed on the upper side based on the gate line  121 , and are sequentially arranged from the left side in the first direction DR 1 . 
     At least part of each of the extension portion  177   a , the extension portion  177   b , and the third drain electrode  175   c  may overlap the extension portion  132  of the reference voltage line  131 . 
     The data lines  171   a  and  171   b  may mainly extend in the second direction DR 2  and respectively transmit the data voltage. The data lines  171   a  and  171   b  may include a first protrusion  172   a  protruded in the first direction DR 1  and a second protrusion  172   b  protruded in the opposite direction of the first direction DR 1 , respectively. More particularly, the data lines  171   a  and  171   b  may include a first protrusion  172   a  and a second protrusion  172   b  protruded in opposite directions to each other. Referring to one pixel PX, the left data line  171   a  includes the first protrusion  172   a  protruded toward the right data line  171   b , and the data line  171   b  includes the second protrusion  172   b  protruded toward the left data line  171   a . In  FIG. 2 , the first source electrode  173   a  is connected to the data line  171   a  through the first protrusion  172   a . However, in the vertically adjacent pixels, the first source electrode  173   a  may be connected to the data line  171   b  through the second protrusion  172   b . In this case, the first transistor Qa may be disposed on the rightmost side, and the second transistor Qb and the third transistor Qc may be sequentially arranged on the left side thereof to be arranged in the opposite direction to the first direction DR 1 . 
     The first protrusion  172   a  and the second protrusion  172   b , as shown in  FIG. 2 , are not aligned in the first direction DR 1 , but may be slightly shifted. Alternatively, the first protrusion  172   a  and the second protrusion  172   b  may be disposed to correspond to and be aligned with each other in the first direction DR 1 . 
     The gate conductive layer and the data conductive layer may include at least one metal, such as copper (Cu), aluminum (Al), magnesium (Mg), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni), neodymium (Nd), iridium (Ir), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), tantalum (Ta), and alloys thereof. The gate conductive layer and the data conductive layer may be formed as a single layer or as a multilayer of two or more layers formed of a plurality of materials. 
     The planar shape of the data conductive layer and the ohmic contact layer  161  may be substantially the same. In the portions between the first source electrode  173   a  and the first drain electrode  175   a , between the second source electrode  173   b  and the second drain electrode  175   b , between the third source electrode  173   c  and the auxiliary electrode  174   c , and between the auxiliary electrode  174   c  and the third drain electrode  175   c , the planar shape of the data conductive layer and the semiconductor layer  151  may be substantially the same. As shown in  FIG. 2 , the planar area of the semiconductor layer  151  may be slightly smaller than the planar area of the data conductive layer. 
     The first gate electrode  124   a , the first source electrode  173   a , and the first drain electrode  175   a  form the first transistor Qa together with the first semiconductor  154   a . The second gate electrode  124   b , the second source electrode  173   b , and the second drain electrode  175   b  form the second transistor Qb together with the second semiconductor  154   b . The third gate electrode  124   c , the third source electrode  173   c , the auxiliary electrode  174   c , and the third drain electrode  175   c  form the third transistor Qc together with the third semiconductor  154   c.    
     The channels of the first transistor Qa, the second transistor Qb, and the third transistor Qc may be formed in the first, second, and third semiconductors  154   a ,  154   b , and  154   c  between the first, second, and third source electrodes  173   a ,  173   b , and  173   c , and the first, second, and third drain electrodes  175   a ,  175   b , and  175   c , respectively. The auxiliary electrode  174   c  may be formed to elongate the channel length of the third transistor Qc. In some exemplary embodiments, the auxiliary electrode  174   c  may be omitted. 
     The first transistor Qa, the second transistor Qb, and the third transistor Qc overlap the extension portion  124  of the gate line  121 , and may be arranged in the first direction DR 1 . For example, as shown in  FIG. 2 , the first transistor Qa, the second transistor Qb, and the third transistor Qc may be sequentially arranged in the first direction DR 1 . 
     A first insulating layer  180   a  is disposed on the data conductive layer, the exposed semiconductors  154   a ,  154   b , and  154   c , and the gate insulating layer  140 . The first insulating layer  180   a  may include the organic insulating material or the inorganic insulating material. 
     A color filter layer including a plurality of color filters  230 ,  230   d , and  230   e  may be disposed on the first insulating layer  180   a . The color filters  230 ,  230   d , and  230   e  may display one of primary colors, such as three primary colors of red, green, and blue, or four primary colors, etc. The color filters of one group representing the different primary colors may be repeatedly disposed in the first direction DR 1 . 
     At least adjacent two color filters  230 ,  230   d , and  230   e  may be overlapped on the data lines  171   a  and  171   b . The color filters  230 ,  230   d , and  230   e  that are overlapped with each other may prevent light leakage near the data lines  171   a  and  171   b  disposed in an adjacent pixel. 
     According to another exemplary embodiment, the color filters  230 ,  230   d , and  230   e  may not be included in the first display panel  100 , but may be included in the second display panel  200 . 
     A second insulating layer  180   b  may be disposed on the color filters  230 ,  230   d , and  230   e . The second insulating layer  180   b  may include the inorganic insulating material or the organic insulating material, including a generally organic insulating material, to provide a substantially flat surface. The second insulating layer  180   b  may function as an overcoat for the color filters  230 ,  230   d  and  230   e  to prevent the color filters  230 ,  230   d  and  230   e  from being exposed and an impurity such as the pigment from permeating into the liquid crystal layer  3 . 
     The first insulating layer  180   a  and the second insulating layer  180   b  may include a contact hole  185   a  formed on the extension portion  177   a  of the first drain electrode  175   a , a contact hole  185   b  formed on the extension portion  177   b  of the second drain electrode  175   b , and a contact hole  188  formed on the end portion  176  of the third drain electrode  175   c  and the part of the extension portion  132  of the reference voltage line  131  adjacent thereto. 
     As shown in  FIG. 2 , the contact holes  185   a ,  185   b , and  188  may be formed on the same side based on the gate line  121 , for example, the upper side (the second direction DR 2  side). The contact hole  185   a , the contact hole  185   b , and the contact hole  188  may be sequentially arranged in the first direction DR 1  from the left side. 
     In each pixel PX, since an interval between the three contact holes  185   a ,  185   b , and  188  arranged in one line in the first direction DR 1  and an interval between the contact hole  185   a  or the contact hole  188  adjacent to the data lines  171   a  and  171   b  and the data lines  171   a  and  171   b  are not sufficient, when forming openings respectively corresponding to the contact holes  185   a ,  185   b , and  188  in the color filters  230 ,  230   d , and  230   e , the thickness of the color filters  230 ,  230   d , and  230   e  remaining between the contact holes  185   a ,  185   b , and  188 , or the color filters  230 ,  230   d , and  230   e  remaining between the data lines  171   a  and  171   b  and the contact hole  185   a  or the contact hole  188  may be formed thin. In this case, the color filters  230 ,  230   d , and  230   e , which are left with insufficient thickness, may be separated (or delaminated) and cause display defects. 
     According to an exemplary embodiment, the openings  235  may be formed by removing the color filters  230 ,  230   d , and  230   e  corresponding to at least three contact holes  185   a ,  185   b , and  188 , to prevent or at least suppress the color filters  230 ,  230   d , and  230   e  from being delaminated. 
     In a plan view, the opening  235  may overlap a light blocking member  220  to be described later. More specifically, the opening  235 , as shown in  FIG. 2 , may not overlap the transistors Qa, Qb, and Qc and the second gate electrode  124   b , or in some exemplary embodiments, the opening  235  may overlap some of the transistors Qa, Qb, and Qc and the second gate electrode  124   b.    
     Referring to  FIG. 2 , each color filter  230 ,  230   d , and  230   e  corresponding to one pixel column may have a plurality of openings  235 . Each opening  235  is located in a region overlapping three contact holes  185   a ,  185   b , and  188 , and one opening  235  may be formed for each pixel PX. However, according to another exemplary implementation, the opening  235  may extend in the first direction DR 1  and intersect the plurality of data lines  171   a  and  171   b  without being limited to one pixel PX being elongated in the first direction DR 1  over the plurality of pixels PX. 
     The width of the second direction DR 2  of the opening  235  may be less than about half of the width of the light blocking member  220  of the second direction DR 2 . For example, when the width of the light blocking member  220  of the second direction DR 2  is about 40 μm to about 70 μm, the width of the opening  235  of the second direction DR 2  may be about 20 μm to about 35 μm. 
     A pixel electrode layer including a pixel electrode having a plurality of first sub-pixel electrodes  191   a  and a plurality of second sub-pixel electrodes  191   b , a light blocking electrode  190 , and a connecting member  90  may be disposed on the second insulating layer  180   b.    
     For each pixel PX, the first sub-pixel electrode  191   a  is disposed on one side and the second sub-pixel electrode  191   b  is disposed on the other side based on the region where the gate line  121 , the reference voltage line  131 , and the transistors Qa, Qb, and Qc are disposed. In  FIG. 2 , the first sub-pixel electrode  191   a  may be disposed below the gate line  121 , and the second sub-pixel electrode  191   b  may be disposed above the gate line  121  according to an exemplary embodiment. The detailed shape of the first sub-pixel electrode  191   a  and the second sub-pixel electrode  191   b  will be described below with reference to  FIG. 9 . 
     The first sub-pixel electrode  191   a  includes an extension part  196   a  protruded toward the extension portion  177   a  of the first drain electrode  175   a  and a contact portion  197   a  connected to the end of the extension part  196   a , and the second sub-pixel electrode  191   b  includes an extension part  196   b  protruded toward the extension portion  177   b  of the second drain electrode  175   b  and a contact portion  197   b  connected to the end of the extension part  196   b . The contact portion  197   a  is electrically connected to the extension portion  177   a  of the first drain electrode  175   a  through the contact hole  185   a , and the contact portion  197   b  is electrically connected to the extension portion  177   b  of the second drain electrode  175   b  through the contact hole  185   b.    
     The connecting member  90  is in contact with the end portion  176  of the first drain electrode  175   c  and a portion of the extension portion  132  of the reference voltage line  131  adjacent thereto through a contact hole  188  to be electrically connected. Thus, the end portion  176  of the first drain electrode  175   c  is electrically connected to the extension portion  132  of the reference voltage line  131  via the connecting member  90 , thereby receiving the reference voltage Vref. In this manner, the third drain electrode  175   c  of the third transistor Qc may be connected to the reference voltage Vref. 
     The light blocking electrode  190  is generally extended in the second direction DR 2  and may be disposed between two adjacent pixel PXs. The light blocking electrode  190  overlaps the data lines  171   a  and  171   b  to shield the data lines  171   a  and  171   b  from an electric field, and reduces capacitive coupling between the data lines  171   a  and  171   b  and the first and second sub-pixel electrodes  191   a  and  191   b.    
     The first sub-pixel electrode  191   a  is further formed with a cutting position guide part  199  for guiding a cutting position. The cutting position guide part  199  may be protruded from the first sub-pixel electrode  191   a  and guides the position to be cut by laser when repair is needed. 
     The pixel electrode layer may include a transparent conductive material, such as indium-tin oxide (ITO), indium-zinc oxide (IZO), a metal thin film, etc. 
     An alignment layer  11  may be disposed on the pixel electrode layer and the second insulating layer  180   b . The alignment layer  11  may be a vertical alignment layer. The alignment layer  11  may be rubbed in at least one direction, or may be an optical alignment layer including a photo-reactive material. 
     In the second display panel  200 , the light blocking member  220  may be disposed on an insulating substrate  210  (hereinafter referred to as a “facing substrate”). Referring to  FIGS. 3 and 4 , the light blocking member  220  may be disposed below the substrate  210  according to an exemplary embodiment. As shown in  FIG. 2 , the light blocking member  220  includes a portion extending in the first direction DR 1  on a plane, and may overlap the extension portion  124  of the gate line  121 , the extension portion  132  of the reference voltage line  131 , the transistors Qa, Qb, and Qc, the extension portion  177   a  of the first drain electrode  175   a , the extension portion  177   b  of the second drain electrode  175   b , and the end portion  176  of the third drain electrode  175   c . That is, the light blocking member  220  may transverse and extend between the first sub-pixel electrode  191   a  and the second sub-pixel electrode  191   b , and may overlap the gate line  121  and the reference voltage line  131 . 
     According to another exemplary embodiment, the light blocking member  220  may be disposed on the first display panel  100 , rather than in the second display panel  200 . 
     A common electrode  270  may be disposed on the light blocking member  220 . Referring to  FIGS. 3 and 4 , the common electrode  270  may be disposed below the light blocking member  220  according to an exemplary embodiment. The common electrode  270  may be formed as a plate on substantially the entire surface of the substrate  210 . More particularly, the common electrode  270  may not include a portion that is removed, such as a slit. The common electrode  270  receives a common voltage Vcom having a constant voltage value. 
     The reference voltage Vref transmitted by the reference voltage line  131  may be the same as the common voltage Vcom or may be difference from the common voltage Vcom. When there is a difference, the reference voltage Vref may have a potential of about −2 V or about 2 V from the common voltage Vcom. 
     The common electrode  270  may include the transparent conductive material, such as ITO, IZO, or the metal thin film. 
     An alignment layer  21  may be disposed on the common electrode  270 . Referring to  FIGS. 3 and 4 , the alignment layer  21  may be disposed below the common electrode  270 . The alignment layer  21  may be the vertical alignment layer. The alignment layer  21  may be rubbed in at least one direction, or may be an optical alignment layer containing a photo-reactive material. 
     The liquid crystal layer  3  includes a plurality of liquid crystal molecules  31 . The liquid crystal molecules may have negative dielectric anisotropy, and may be aligned to be arranged substantially perpendicular to the substrates  110  and  210  when no electric field is generated in the liquid crystal layer  3 . In some exemplary embodiments, the liquid crystal molecules may be pretilted in a predetermined direction when no electric field is generated in the liquid crystal layer  3 . 
     The first sub-pixel electrode  191   a  forms the first liquid crystal capacitor Clca along with the common electrode  270  and the liquid crystal layer  3  interposed therebetween. The second sub-pixel electrode  191   b  forms the second liquid crystal capacitor Clcb along with the common electrode  270  and the liquid crystal layer  3  interposed therebetween. 
     A plurality of spacers may be disposed between the first display panel  100  and the second display panel  200 . The spacers may be disposed to overlap the transistors Qa, Qb, and Qc in a plan view. When the pixel electrode layer overlaps the spacer, the pixel electrode layer may be cracked. As such, the pixel electrode layer may not overlap the spacer. Accordingly, the extension part  196   a  (hereinafter referred to as a “first extension part”) and the extension part  196   aa  (hereinafter referred to as a “second extension part”) of the first sub-pixel electrode  191   a  may be protruded and disposed at the place adjacent to the data lines  171   a  and  171   b , at the right and left edges of the first sub-pixel electrode  191   a.    
     According to an exemplary embodiment, the contact hole  185   a , the contact hole  185   b , and the contact hole  188  of one pixel PX are disposed on the same side with respect to the gate line  121 , and are arranged side by side in the first direction DR 1 . Accordingly, as compared with a case when the contact holes  185   a ,  185   b , and  188  are dispersed and disposed upward and downward based on the gate line  121 , the space occupied by the contact holes may be reduced, such that the width of the light blocking member  220  of the second direction DR 2  may be further decreased, thereby increasing the aperture ratio and the transmittance of the pixel PX. 
     Also, in the pixel PX according to an exemplary embodiment, since the contact holes  185   a ,  185   b , and  188  are disposed on the same side based on the gate line  121 , one of the extension part  196   a  of the first sub-pixel electrode  191   a  and the extension part  196   b  of the second sub-pixel electrode  191   b  intersect the first protrusion  172   a  of the data lines  171   a  and  171   b . As shown in  FIG. 2 , since the contact holes  185   a ,  185   b , and  188  are disposed upward based on the gate line  121 , the extension part  196   a  of the first sub-pixel electrode  191   a  that is disposed downward crosses the first protrusion  172   a  of the data line  171   a . In this case, a stain from vertical crosstalk may be visible due to the parasitic capacitance between the first sub-pixel electrode  191   a  and the data line  171   a . However, according to an exemplary embodiment, since the second extension part  196   aa  disposed on the opposite side of the extension part  196   a  of the first sub-pixel electrode  191   a  crosses the data line  171   b  adjacent to the data line  171   a  to form the additional parasitic capacitance, the vertical crosstalk between the first sub-pixel electrode  191   a  and the data line  171   a  may be compensated. 
     According to an exemplary embodiment, the interval between the extension part  196   a  of the first sub-pixel electrode  191   a  and the light blocking electrode  190  may be formed less than a predetermined interval, such as about 4 μm to reduce the leakage of light. As such, the extension part  196   a  of the first sub-pixel electrode  191   a  is formed with the predetermined interval (Db of  FIG. 3 ) from the light blocking electrode  190 , and the structures that are parallel to each other with the predetermined interval Db are formed in at least one or more portions, which will be described in detail with reference to  FIG. 5 . 
       FIG. 5  is a view exemplarily illustrating a pixel electrode layer of the display device of  FIG. 2 . 
     The extension part  196   a  of the first sub-pixel electrode  191   a  has the structure that is protruded in the second direction DR 2  to be parallel to one side of the light blocking electrode  190  in the upper-left edge portion of the first sub-pixel electrode  191   a . The extension part  196   a  then is bent and extends in an oblique direction. The extension part  196   a  is then bent again in the second direction DR 2  to be parallel to one side of the light blocking electrode  190 . The extension part  196   a  is then bent and extends in the first direction DR 1 , and then is again bent in the second direction DR 2  to be connected to the contact portion  197   a . Hereinafter, a portion of the extension part  196   a  having the predetermined interval from the light blocking electrode  190  while being protruded from the first sub-pixel electrode  191   a  and extending in the second direction DR 2  is referred to as a first portion  196   a   1 , and a portion of the extension part  196   a  connected to the contact portion  197   a  while being bent in the first direction DR 1  to be disposed away from the light blocking electrode  190  is referred to as a second portion  196   a   2 . 
     The first portion  196   a   1  of the extension part  196   a  is parallel to one side of the light blocking electrode  190  and has the predetermined interval Db therebewteen. According to an exemplary embodiment, the predetermined interval Db is less than about 4 μm to prevent the leakage of light between the light blocking electrode  190  and the first portion  196   a   1  of the extension part  196   a . If the distance between the light blocking electrode  190  and the first portion  196   a   1  of the extension part  196   a  exceeds about 4 μm, light leakage may occur, which will be described in more detail below with reference to  FIG. 8 . 
     The first portion  196   a   1  of the extension part  196   a  has the extending structure while intersecting the first protrusion  172   a  of the data line  171   a.    
     The first portion  196   a   1  and the second portion  196   a   2  of the extension part  196   a  are basically characterized by being bent in the vertical direction. The liquid crystal molecules  31  of the liquid crystal layer  3  may be arranged along the step generated by to the extension part  196   a . As such, due to the structure of the first and second portions of the extension part  196   a , the arrangement direction of the liquid crystal molecules  31  may be aligned to correspond to a direction to which the liquid crystal molecules  31  are arranged on the first and second sub-pixel electrodes  191   a  and  191   b . This will be described in more detail below. 
     The second insulating layer  180   b , which may be formed relatively thick to have the planarization characteristic, is disposed under the pixel electrode layer including the extension part  196   a . As such, the thickness of the data conductive layer or the gate conductive layer may not affect the liquid crystal layer  3 . However, since only the alignment layer  11  is disposed on the pixel electrode layer above the second insulating layer  180   b , the step due to the thickness of the pixel electrode layer may affect the arrangement of the liquid crystal molecules  31  of the liquid crystal layer  3 . In this case, if the extension part  196   a  does not have the structure that is bent in the vertical direction as in the illustrated exemplary embodiment, but rather extends in the diagonal direction, the direction to which the liquid crystal molecules  31  are arranged around the extension part  196   a  may be different from the direction in which the liquid crystal molecules  31  are pretilted on the first and second sub-pixel electrode  191   a  and  191   b  and the direction in which the liquid crystal molecules  31  are arranged, thereby causing a portion where the liquid crystal molecules  31  are misaligned. Such portion of the liquid crystal molecules  31  may not have the desired arrangement and cause the light leakage phenomenon. 
     However, when the extension part  196   a  is formed to have the structure that is bent in the vertical direction as in the illustrated exemplary embodiment, the arrangement direction of the liquid crystal molecules  31  is aligned to correspond to the direction of the liquid crystal molecules  31  above the first and second sub-pixel electrodes  191   a  and  191   b , thereby preventing the occurrence of the light leakage phenomenon. 
     Since the extension part  196   a  is the portion shielded by the light blocking member  220  when the display device is manufactured correctly, even if the light leakage occurs in the corresponding portion, such would not affect the display quality. However, it may be difficult to precisely align the light blocking member  220  with respect to all of the pixels, especially when the display device has a high resolution with smaller sized pixels and greater number of pixels. As such, the light leakage may occur even with a slight deviation of the light blocking member  220 . 
     According to the illustrated exemplary embodiment, the light leakage may not be generated around the extension part  196   a  due to the structure of the extension part  196   a , which includes a first portion  196   a   1  that is parallel to the light blocking electrode  190  with the predetermined interval (about 4 μm or less) and a second portion  196   a   2  that is bent vertically. In this manner, even if the light blocking member  220  is deviated slightly, the light leakage may not occur. 
     According to another exemplary embodiment, the extension part  196   a  may include only one of the first and second portions, because the light leakage phenomenon may be reduced even with only one of the first and second portions of the extension part  196   a.    
     The first sub-pixel electrode  191   a  of  FIG. 5  includes another extension part  196   aa  (hereinafter referred to as a “second extension part”) corresponding to the extension part  196   a  (hereinafter referred to as a “first extension part”) and disposed at the other side. The second extension part  196   aa  has a structure similar to that of the first extension part  196   a , which will be described in more detail below. 
     The second extension part  196   aa  includes a third portion  196   aa   1  that is parallel to one side of the light blocking electrode  190  with having the constant interval (Db: about 4 μm or less). 
     The second extension part  196   aa  of the first sub-pixel electrode  191   a  has one end that protrudes in the second direction DR 2  from the upper right edge portion of the first sub-pixel electrode  191   a  to be parallel to one side of the light blocking electrode  190 , which is then bent and extends in the first direction DR 1 , and which is then bent again in the second direction DR 2 . The end formed in the second direction DR 2  at the second extension part  196   aa  is formed with the interval Db of about 4 μm or less to one side of the light blocking electrode  190  while being parallel to the one side of the light blocking electrode  190 . If the distance between the light blocking electrode  190  and the first portion  196   a   1  of the extension part  196   a  exceeds about 4 μm, the light leakage may occur, which will be described in more detail with reference to  FIG. 8 . 
       FIG. 5  shows that the second extension part  196   aa  is not parallel to the light blocking electrode  190  until it reaches the end, or has the interval of about 4 μm or more, however, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, the second extension part  196   aa  may be formed to have the structure that is parallel to one end of the light blocking electrode  190  as in the first extension part  196   a.    
     Due to the structure of the second extension part  196   aa  according to the illustrated exemplary embodiment, the light leakage may be decreased at the periphery of the second extension part  196   aa , or at least at the end portion of the second extension part  196   aa.    
     In addition, the second extension part  196   aa  may include a fourth portion  196   aa   2  bent in the vertical direction. 
     The second extension part  196   aa  includes only portions extending in the first direction DR 1  and the second direction DR 2 . As such, in the periphery of the second extension part  196   aa , since the liquid crystal molecules  31  are arranged to correspond to the direction of the liquid crystal molecules  31  on the first and second sub-pixel electrodes  191   a  and  191   b , the light leakage may not be generated as in the first extension part  196   a.    
     Also, referring to  FIG. 5 , the left and right end sides of the first sub-pixel electrode  191   a  are spaced apart by about 4 μm or less from the light blocking electrode  190 , thereby reducing the light leakage in the corresponding portion. Similarly, in the second sub-pixel electrode  191   b , the left and right end sides are spaced apart by about 4 μm or less from the light blocking electrode  190 , thereby reducing the light leakage. 
     The structure of the second extension part  196   aa  extends while intersecting the second protrusion  172   b  of the data line  171   b.    
     According to another exemplary embodiment, the second extension part  196   aa  may have only one of the third and fourth portions. According to still another exemplary embodiment, the first extension part  196   a  may have only one of the first and second portions, and the second extension part  196   aa  may not include the third and fourth portions. However, in some exemplary embodiments, first extension part  196   a  may include both of the first and second portions, and the second extension part  196   aa  may include both of the third and fourth portions to effectively prevent the occurrence of light leakage. 
     In the exemplary embodiments described above with reference to  FIG. 2  to  FIG. 5 , the connecting member  90  has a structure corresponding to the structure of the contact hole  188 . 
     Hereinafter, the connecting member  90  including an additional protrusion  91  will be described according to an exemplary embodiment. 
       FIG. 6  is a layout view of a part of one pixel of a display device according to another exemplary embodiment, and  FIG. 7  is a view exemplary showing a pixel electrode layer of the display device of  FIG. 6 . 
       FIG. 6  corresponds to  FIG. 2 , and  FIG. 7  corresponds to  FIG. 5 . As such, detailed descriptions of the substantially the same elements will be omitted to avoid redundancy. 
     In the pixel shown in  FIG. 6  and  FIG. 7  according to an exemplary embodiment, the connecting member  90  includes a first portion corresponding to the contact hole  188  and a second portion  91  (hereinafter referred to as a “protrusion”) protruded downward from the first portion of the connecting member  90 . The second portion  91  extends to one side of the second extension portion  196   aa , and the sides of the second portion  91  and the second extension portion  196   aa  facing each other are parallel to each other. According to an exemplary embodiment, the interval between the sides of the second portion  91  and the second extension portion  196   aa  facing each other may be constant and may be less than about 4 μm. In addition, the second portion  91  has a portion with a reduced width near where the second extension part  196   aa  is bent, thereby having the sides parallel to the sides of the second extension part  196   aa  facing each other. 
     Due to the second portion  91  of the connecting member  90 , the light leakage that would otherwise be generated at the left of the second extension part  196   aa  may be prevented. 
       FIG. 8  shows a result of an experiment on a degree of the light leakage in the pixel PX of  FIG. 6  according to an exemplary embodiment. 
       FIG. 8  is a photograph of a portion where light is leaked in the pixel of  FIG. 6 . 
       FIG. 8  is photographed in a state when the light blocking member  220  is removed to capture the leakage of light. In addition, in  FIG. 8 , the pixel of  FIG. 6  is additionally indicated with a line in order to confirm a portion where light leaks. In  FIG. 8 , the portion A is disposed between the first extension part  196   a  and the light blocking electrode  190 , and the portion B is disposed between the second extension part  196   aa  and the light blocking electrode  190 . 
     As shown in the portions A and B of  FIG. 8 , it may be confirmed that the light leakage is not generated between the first extension part  196   a  and the light blocking electrode  190  (the portion A) and between the second extension part  196   aa  and the light blocking electrode  190  (the portion B). Since these portions are also applied to the pixel shown in  FIG. 2  to  FIG. 5 , the light leakage is also reduced in the pixel of  FIG. 2  to  FIG. 5 . 
     As the connecting member  90  shown in  FIG. 6  further includes the second portion  91 , the light leakage that may otherwise be generated at the left of the second extension part  196   aa  is removed, and this may be confirmed in  FIG. 8 . That is, referring to  FIG. 8 , the portions near the lower side of the contact portion  197   a  of the first sub-pixel electrode  191   a  and the lower side of the contact portion  197   b  of the second sub-pixel electrode  191   b  appear white, which show the leakage of light. However, since the connecting member  90  according to an exemplary embodiment includes the second portion  91  on the lower side thereof, it may be confirmed that the light leakage is blocked. More particularly, when the sides of the second portion  91  and the second extension portion  196   aa  that face each other have the parallel structure with the constant interval (about 4 μm or less), the light leakage is removed even between the second portion  91  and the second extension portion  196   aa.    
     As such, even if the light blocking member  220  is misaligned up and down to some extent, the deterioration of the display quality due to the light leakage is reduced, and a margin for compensating the misalignment of the light blocking member  220  is shown in  FIG. 8 . 
     That is, if the degree of the misalignment of the light blocking member  220  in the second direction DR 2  is less than about 24.3 the light leakage may be masked and the display quality may not be deteriorated. Also, if the degree of the misalignment of the light blocking member  220  in the opposite direction of the second direction DR 2  is within about 24.8 the light leakage may be masked and the display quality may not be deteriorated. 
     In general, the degree of misalignment of the light blocking member  220  in a high-resolution display device is within about 15 and a standard requires that the margin to be less than about 15 As such, the pixel of  FIG. 6  according to an exemplary embodiment has a sufficient margin for the misalignment of the light blocking member  220 , and thus, deterioration of the display quality (typically a contrast ratio (CR)) due to the leakage of light may be prevented. 
     In the pixel of  FIG. 2  to  FIG. 6 , as compared with that of  FIG. 6 , the margin for the misalignment of the light blocking member  220  may be reduced, however the light leakage in the portions A and B of  FIG. 8  is removed, such that the margin may be about 15 μm or more. 
     In the above, the structure of one pixel and its corresponding light leakage were described. Hereinafter, the structure of the display device according to an exemplary embodiment will be described. 
       FIG. 9  is a layout view of a display device according to an exemplary embodiment. 
     A display device  1000  according to an exemplary embodiment may include a display area DA capable of displaying an image. A display area may include a plurality of pixels PX arranged in a matrix form. 
     A plurality of color filters  230   a ,  230   b , and  230   c , which may represent different primary colors, are alternately arranged in the first direction DR 1 . The color filters  230 ,  230   d , and  230   e  described in  FIG. 2  may correspond to the plurality of color filters  230   a ,  230   b , and  230   c , respectively. 
     The opening  235  formed in the plurality of color filters  230   a ,  230   b , and  230   c  may be extended continuously in the first direction DR 1  in the display area DA. Referring back to  FIGS. 2 and 6 , according to an exemplary embodiment, the opening  235  may be formed only in one color filter, such that the opening  235  is not connected with that in the adjacent color filter. According to the illustrated exemplary embodiment, a plurality of such openings  235  may be arranged in the second direction DR 2 . As such, throughout the display area, the color filter  230   a ,  230   b , and  230   c  are arranged in the second direction DR 2 . The color filters  230   a ,  230   b , and  230   c  corresponding to each pixel column may be positioned at the upper and lower sides based on the opening  235 . The pitch between the plurality of openings  235  in the second direction DR 2  may be the same as or similar to the pitch of the plurality of gate lines  121  in the second direction DR 2 . 
     In the above, the arrangement structure of the pixel PX based on the color filter has been described with reference to  FIG. 9 . Hereinafter, the detailed structure of the display device  1000  will be described with reference to  FIG. 10  and  FIG. 11 . 
       FIG. 10  is a layout view of three pixels of a display device according to an exemplary embodiment, and  FIG. 11  is a layout view of a color filter and a longitudinal reference voltage line of three pixels of a display device according to an exemplary embodiment. 
     Among the structures of each pixel PX of  FIG. 10 , the structure of the pixel electrodes (the first sub-pixel electrode  191   a  and the second sub-pixel electrode  191   b ), which have not been described in  FIG. 2  and  FIG. 6 , is described below. 
     The overall shape of the first sub-pixel electrode  191   a  and the second sub-pixel electrode  191   b  disposed at each pixel PX 1 , PX 2 , and PX 3  may be a quadrangle. 
     The first sub-pixel electrode  191   a  may include a cross-shaped stem part including a transverse stem part  192   a  and a longitudinal stem part  193   a , a plurality of branch parts  194   a  extending outside from the cross-shaped stem part, an edge part  195   a  defining an outer side, and the above-described extension part  196   a  and contact portion  197   a . According to an exemplary embodiment, the first sub-pixel electrode  191   a  may further include a cutting position guide part  199  for guiding the cutting position at the time of the repairing. 
     The second sub-pixel electrode  191   b  may include a cross-shaped stem part including a transverse stem part  192   b  and a longitudinal stem part  193   b , a plurality of branch parts  194   b  extending outside from the cross-shaped stem part, an edge part  195   b  defining the outer side, and the above-described extension part  196   b  and contact portion  197   b.    
     The planar area of the first sub-pixel electrode  191   a  may be smaller than the planar area of the second sub-pixel electrode  191   b.    
     The primary color of the color filter  230  corresponding to the pixel column in which the pixel PX 1  is disposed, the primary color of the color filter  230  corresponding to the pixel column in which the pixel PX 2  is disposed, and the primary color of the color filter  230  corresponding to the pixel column in which the pixel PX 3  is disposed may be different from each other. For example, the pixel PX 1  may correspond to a red color filter, the pixel PX 2  may correspond to a green color filter, and the pixel PX 3  may correspond to a blue color filter. 
     In  FIG. 2  and  FIG. 6 , a wiring structure connected to the reference voltage line  131  has not been described, which will be described in detail with reference to  FIG. 10  and  FIG. 11  below. 
     Referring to  FIG. 10 , the reference voltage line  131  may further include a longitudinal part  133  extending in the second direction DR 2 , a transverse part  134  connected to the longitudinal part  133 , and longitudinal parts  135   a  and  135   b  connected to the transverse part  134 , disposed at right and left sides of the first sub-pixel electrode  191   a , and extending in the second direction DR 2  as well as the portion extending in the first direction DR 1 , in which the extension portion  132  is disposed. The transverse part  134  may be disposed to correspond to the boundary of two adjacent pixels in the second direction DR 2 . 
     The longitudinal part  133  is not disposed in all of the pixels PX 1 , PX 2 , and PX 3 , but may be disposed at some pixel PX 3 . For example, the longitudinal part  133  may be extended to overlap the longitudinal stem part  193   b  of the second sub-pixel electrode  191   b  of the pixel PX 3 . The longitudinal parts  135   a  and  135   b  may be disposed in all three pixels PX 1 , PX 2 , and PX 3 . 
     Referring to  FIG. 11 , in the display device according to an exemplary embodiment, the structure of at least one pixel PX 3  among the adjacent pixels PX 1 , PX 2 , and PX 3  may be different from the remaining pixels PX 1  and PX 2 . In particular, the data conductive layer may further include a longitudinal reference voltage line  178  (also referred to as a “second reference voltage line”) overlapping the pixel PX 3 . 
     The longitudinal reference voltage line  178  serves to transmit the reference voltage Vref in the vertical direction. The longitudinal reference voltage line  178  may include a longitudinal part  178   a  overlapping and crossing the first sub-pixel electrode  191   a  of at least one pixel PX 3  among a plurality of pixels PX 1 , PX 2 , and PX 3 , and a longitudinal part  178   b  overlapping and crossing the second sub-pixel electrode  191   b . The longitudinal parts  178   a  and  178   b  of the longitudinal reference voltage line  178  may be substantially elongated and extend in the second direction DR 2 . 
     The longitudinal reference voltage line  178  may include a third drain electrode  175   c . In particular, the end portion  176  of the first drain electrode  175   c  may be further extended upward to be connected to the longitudinal portion  178   b  of the longitudinal reference voltage line  178 , and the lower end portion of the first drain electrode  175   c  may extend further downward to be connected to the longitudinal portion  178   a  of the longitudinal reference voltage line  178 . The longitudinal reference voltage line  178 , including the first drain electrode  175   c , is electrically connected to the reference voltage line  131  through the contact hole  188 . Accordingly, as the reference voltage Vref is transmitted through the reference voltage line  131  in the first direction DR 1  and is transmitted through the longitudinal reference voltage line  178  in the second direction DR 2 , the resistance of the wiring that transmits the reference voltage Vref may be reduced. As such, the voltage drop of the reference voltage Vref may be reduced and the occurrence of planar horizontal crosstalk may be prevented. 
     The longitudinal part  178   a  of the longitudinal reference voltage line  178  may overlap and extend with the longitudinal stem part  193   a  of the first sub-pixel electrode  191   a  of the pixel PX 3 , and the longitudinal part  178   b  may overlap and extend with the longitudinal stem part  193   b  of the second sub-pixel electrode  191   b  of the pixel PX 3 . 
     The longitudinal reference voltage line  178  is spaced apart from the neighboring data line  171 , and may not intersect the data line  171 . 
     Since the longitudinal reference voltage line  178  corresponds only to some pixel PX 3 , the pitch of the longitudinal reference voltage line  178  in the first direction DR 1  may be greater than the pitch of the pixels PX 1 , PX 2 , and PX 3 . More specifically, the pitch of the longitudinal reference voltage line  178  in the first direction DR 1  may be approximately three times or more than the pitch of the pixels PX 1 , PX 2 , and PX 3  in the first direction DR 1  (or the pitch of the first and second sub-pixel electrodes  191   a  and  191   b  in the first direction DR 1 ). 
     The width PW 3  of the pixel electrode in the first direction DR 1  (the first sub-pixel electrode  191   a  or the second sub-pixel electrode  191   b ) disposed at some pixels PX 3  among the plurality of pixels PX 1 , PX 2 , and PX 3  may be greater than the widths PW 1  and PW 2  of the pixel electrode in the first direction DR 1  (the first sub-pixel electrode  191   a  or the second sub-pixel electrode  191   b ) at the remaining pixels PX 1  and PX 2 . For example, the difference between the width PW 3  of the pixel electrode in the first direction DR 1  disposed at the pixel PX 3  and the width PW 1  and PW 2  of the pixel electrode in the first direction DR 1  disposed at the pixel PX 1  and PX 2  is substantially equal or similar to the width WW of the longitudinal reference voltage line  178  in the first direction DR 1 . As such, the area of the effective aperture region, which is the region through which light may pass through the pixel PX 3  overlapping the longitudinal reference voltage line  178 , may be similar to the area of the effective aperture region of the pixels PX 1  and PX 2  that do not overlap the longitudinal reference voltage line  178 . 
     For example, when the width WW of the longitudinal reference voltage line  178  in the first direction DR 1  is about 3 μm and the width PW 1  and PW 2  of the pixel electrode in the first direction DR 1  disposed at the pixel PX 1  and PX 2  is about 104 μm, the width PW 3  of the pixel electrode in the first direction DR 1  disposed at the pixel PX 3  may be about 107 μm. 
     As such, by increasing the width of the pixel electrode of the pixel PX 3  in the first direction DR 1  by considering the aperture ratio reduced by the longitudinal reference voltage line  178  across the pixel PX 3 , the overall aperture ratio and transmittance of the pixel PX 3  may be substantially the same as the overall aperture ratio and transmittance of the remaining pixels PX 1  and PX 2 . In this manner, even if the longitudinal reference voltage line  178  overlapping the pixels PX 3  among the plurality of pixels PX 1 , PX 2 , and PX 3  is added, the defects on the color expression of some pixels PX 3  from relatively low aperture ratio and transmittance may be prevented. 
     In the illustrated exemplary embodiment, the distance between two adjacent data lines  171  disposed on either side of the pixel PX 3  may be greater than the distance between two adjacent data lines  171  disposed on both sides of the remaining pixels PX 1  and PX 2 . In addition, the area of the first and second sub-pixel electrodes  191   a  and  191   b  included in the pixel PX 3  may be larger than the area of the first and second sub-pixel electrodes  191   a  and  191   b  included in the other pixels PX 1  and PX 2 . 
     Referring to  FIG. 11  along with  FIG. 10 , at least two adjacent color filters  230   a ,  230   b , and  230   c  among the plurality of color filters  230   a ,  230   b , and  230   c  are overlapped with each other to form an overlapping part  230   p  at where the data lines  171   a  and  171   b  overlap. 
     If the effective aperture region of each pixel PX 1 , PX 2 , and PX 3  is defined as the region between two neighboring overlapping parts  230   p , the effective aperture region of the pixel PX 3  among the plurality of pixels PX 1 , PX 2 , and PX 3  may be the same as or similar to the sum of the width OW 3   a  of the left portion and the width OW 3   b  of the right portion obtained by subtracting the width WW of the longitudinal reference voltage line  178  in the first direction DR 1  from the width OW 3  between two adjacent overlapping parts  230   p  in the first direction DR 1 . The width of the effective aperture region of the pixel PX 3  in the first direction DR 1  may be similar to the widths OW 1  and OW 2  of the effective aperture region of the pixels PX 1  and PX 2  in the first direction DR 1 , respectively. 
     The pixel PX 3  through the longitudinal reference voltage line  178  may be a pixel representing blue, without being limited thereto, and the longitudinal reference voltage line  178  may intersect a pixel representing red or a pixel representing green. In addition, the number of the pixels PX 3  through the longitudinal reference voltage line  178  among the plurality of pixels PX 1 , PX 2 , and PX 3  of one repeated group may be one or two, without being limited thereto. 
     Next, a disconnection position during a repair will be described with reference to  FIG. 12  according to an exemplary embodiment. 
       FIG. 12  is a view showing a disconnection position in the pixel of  FIG. 6 . 
       FIG. 12  corresponds to  FIG. 6 , and shows a cutting position of four cutting parts C 1 , C 2 , C 3 , and C 4 . 
     According to an exemplary embodiment, a process of cutting four positions for repairing is performed to the pixel of  FIG. 2  or  FIG. 6 . The laser cutting cuts the wiring of the corresponding position by irradiating a laser through the rear side of the substrate  110 . 
     Referring to  FIG. 12 , the first cutting part C 1  shows the position where the first drain electrode  175   a  is cut. In this case, even if an output occurs in the first transistor Q 1 , no voltage is applied to the first sub-pixel electrode  191   a  due to the cutting of the first drain electrode  175   a.    
     The second cutting part C 2  shows the position where the second drain electrode  175   b  is cut. In this case, even if an output is generated in the second transistor Q 2 , no voltage is applied to the second sub-pixel electrode  191   b  due to the cutting of the second drain electrode  175   b.    
     The third cutting part C 3  shows the position where the first protrusion  172   a  of the data line  171   a  is cut. In this case, the data line  171   a  is electrically disconnected from the first transistor Q 1  and the second transistor Q 2 , due to the cutting of the first protrusion  172   a . That is, the data voltage is not transferred to the first transistor Q 1  and the second transistor Q 2 . However, when cutting the third cutting part C 3 , the first extension part  196   a  is also cut, which may cause a short between metals melted by the laser. In this case, the data voltage may be directly transmitted to the first sub-pixel electrode  191   a.    
     The fourth cutting part C 4  is cut to prevent such problem. The fourth cutting part C 4  shows the position where the first sub-pixel electrode  191   a  is cut. The cutting position at the first sub-pixel electrode  191   a  is near the cutting position guide part  199 , and the portion connected to the first extension part  196   a  at the first sub-pixel electrode  191   a  is cut. As such, even if the first extension part  196   a  is shorted with the first protrusion  172   a  of the data line  171   a  when cutting the third cutting part C 3 , the data voltage may not be applied to the first sub-pixel electrode  191   a.    
     As such, the data voltage is not transferred to the first sub-pixel electrode  191   a  and the second sub-pixel electrode  191   b  of the pixel where the repair process is performed. As such, the repaired pixel PX displays the normal state, and is displayed as black in the display device  1000  manufacture as normally black. 
     In a high resolution display device  1000 , such as 4K, 8K, etc., since the number of pixels is very large, even if some pixels are defective, the device may be sold without being processed as defective. Also, if the defective pixel PX is repaired as a black, an image may be displayed with a pixel without a color, however, such may not prevent the usage of a device as it cannot be easily be recognized by a user. 
       FIG. 12  shows the cutting part position when the first transistor Q 1  and the second transistor Q 2  are connected to the left-disposed data line  171   a . When the right data line  171   b , and the first transistor Q 1  and the second transistor Q 2 , are connected to each other, cutting parts may be positioned at symmetrical positions of the cutting part shown in  FIG. 12 . In general, it may be difficult for a repairer to determine cutting positions of various display devices. As such, a cutting position guide part  199  according to an exemplary embodiment may be provided to indicate the cutting position. 
     According to exemplary embodiments, a display device constructed according to the principles of the invention may reduce a light leakage phenomenon. Also, if a defect is generated in the display device, the display device may be repaired through the repairing process. In addition, a display device according to exemplary embodiments has an increased aperture ratio and transmittance. 
     Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Accordingly, the inventive concepts are not limited to such embodiments, but rather to the broader scope of the appended claims and various obvious modifications and equivalent arrangements as would be apparent to a person of ordinary skill in the art.