Patent Publication Number: US-9405686-B2

Title: Cache allocation system and method using a sampled cache utility curve in constant space

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a Continuation-in-Part of U.S. patent application Ser. No. 13/799,942, filed 13 Mar. 2013. 
    
    
     FIELD OF THE INVENTION 
     This invention relates to operation of a cache in a computer system. 
     BACKGROUND 
     Caching is a common technique in computer systems to improve performance by enabling retrieval of frequently accessed data from a higher-speed cache instead of having to retrieve it from slower memory and storage devices. Caching occurs not only at the level of the CPU itself, but also in larger systems, up to and including caching in enterprise-sized storage systems or even potentially globally distributed “cloud storage” systems. 
     For example, caches are commonly included in central processing units (CPUs) to increase processing speed by reducing the time it takes to retrieve information from memory or other storage device locations. As is well known, a CPU cache is a type of memory fabricated as part of the CPU itself. In some architectures such as x86, caches may be configured, hierarchically, with multiple levels (L1, L2, etc.), and separate caches may have different purposes, such as an instruction cache for executable instruction fetches, a data cache for data fetches, and a Translation Lookaside Buffer (TLB) that aids virtual-to-physical address translation. Access to cached information is therefore faster—usually much faster—than access to the same information stored in the main memory of the computer, to say nothing of access to information stored in non-solid-state storage devices such as a hard disk. 
     On a larger scale, dedicated cache management systems may be used to allocate cache space among many different client systems communicating over a network with one or more servers, all sharing access to a peripheral bank of solid-state mass-storage devices. This arrangement may also be found in remote “cloud” computing environments. 
     Data is typically transferred between memory (or another storage device or system) and cache as cache “lines”, “blocks”, “pages”, etc., whose size may vary from architecture to architecture. In systems with an x86 architecture, for example, the transfer size between CPU caches and main memory is commonly 64 bytes. In systems that have a caching hierarchy, relatively slow memory (such as RAM, which is slow compared to processor cache) may be used to cache even-slower memory (such as storage devices). Note also that, in such systems, the transfer size between levels of the cache generally increases, e.g. typically 64 bytes from DRAM to processor cache, but typically 512B to 64 KB between disk and DRAM-based cache. Just for the sake of succinctness, all the different types of information that is cached in a given system are referred to commonly here as “data”, even if the “data” comprises instructions, addresses, etc. Transferring blocks of data at a time may mean that some of the cached data will not need to be accessed often enough to provide a benefit from caching, but this is typically more than made up for by the relative efficiency of transferring blocks as opposed to data at many individual memory locations; moreover, because data in adjacent or close-by addresses is very often needed (“spatial locality”), the inefficiency is not as great as randomly distributed addressing would cause. 
     A common structure for each entry in the cache is to have at least three elements: a “tag” that indicates where (generally an address) the data came from in memory; the data itself; and one or more flag bits, which may indicate, for example, if the cache entry is currently valid, or has been modified. 
     Regardless of the number, type or structure of the cache(s), however, the standard operation is essentially the same: When a system hardware or software component needs to read from a location L in storage (main or other memory, a peripheral storage bank, etc.), it first checks to see if a copy of that data is in any cache line(s) that includes an entry that is tagged with the corresponding location identifier, such as a memory address. If it is (a cache hit), then there is no need to expend relatively large numbers of processing cycles to fetch the information from storage; rather, the processor may read the identical data faster—typically much faster—from the cache. If the requested read location&#39;s data is not currently cached (a cache miss), or the corresponding cached entry is marked as invalid, however, then the data must be fetched from storage, whereupon it may also be cached as a new entry for subsequent retrieval from the cache. 
     In most systems, the cache will populate quickly. Whenever a new entry must be created, for example because the cache has a fixed or current maximum size and has been filled, some other entry must therefore be evicted to make room for it. There are, accordingly, many known cache “replacement policies” that attempt to minimize the performance loss that each replacement causes. Many of these policies rely on a “least-recently used” (LRU) heuristic, which implements different types of predictions about which cache entries are least likely to be used and are therefore most suitable for eviction. 
     In some schemes, for various known reasons, including reducing demand on the cache, some memory locations may be marked as non-cacheable, in which case, of course, the soft- or firmware that controls the cache will not create an entry for them on misses. Furthermore, the cache may also be used analogously for data writes. Two common write policies include “write back,” in which modified data is held in the cache until evicted or flushed to a backing store, and “write through,” in which modified data is concurrently stored in the cache and written to the backing store. 
     The greatest performance advantage, at least in terms of speed, would of course occur if the cache (to include, depending on the system, any hierarchical levels) were large enough to hold the entire contents of memory (and/or disk, etc.), or at least the portion one wants to use the cache for, since then cache misses would rarely if ever occur. In systems where the contents of the hard disk are cached as well, to be able to cache everything would require a generally unrealistic cache size. Moreover, since far from all memory locations are accessed often enough that caching them gives a performance advantage, to implement such a large cache would be inefficient. Such theoretical possibilities aside, in most modern systems the CPU cache will be much smaller than memory, and smaller still than a hard disk; other caches such as server-side flash storage or RAM-backed caches may be larger, but they will also be slower. 
     On the other hand, if the cache is too small to contain the frequently accessed memory or other storage locations, then performance will suffer from the increase in cache misses. In extreme cases, having a cache that is far too small may cause more overhead than whatever performance advantage it provides, for a net loss of performance. 
     The cache is therefore a limited resource that should be managed properly to maximize the performance advantage it can provide. This becomes increasingly important as the number of software entities that a CPU (regardless of the number of cores) or multiprocessor system must support increases. One common example would be many applications loaded and running at the same time—the more that are running, the more pressure there is likely to be on the cache. Of course, some software entities can be much more complicated than others, such as a group of virtual machines running on a system-level hypervisor, all sharing the same cache. As with other hardware resources, either a human or automatic administrator should therefore preferably carry out some policy to most efficiently allocate the cache resource, to implement some preference policy, etc. This task becomes even more complicated in hosted or “cloud computing” environments, where many physically and/or logically isolated client systems share the memory and storage subsystems of one or a cluster of servers (such as network attached storage servers), storage area networks, etc., with each client system expecting or needing at least some minimum quality of service level. In many cases, client systems may be virtual machines that must be instantiated or loaded and managed and can change in number and workload dynamically. 
     There are, accordingly, many existing and proposed systems that attempt to optimize, in some sense, the allocation of cache space among several entities that might benefit from it. Note the word “might”: Even if an entity were exclusively allocated the entire cache, this does not ensure a great improvement in performance even for that entity, since the performance improvement is a function of how often there are cache hits, not of available cache space alone. In other words, generous cache allocation to an entity that addresses memory in such a way that there is a high proportion of misses and therefore underutilizes the cache may be far from efficient and cause other entities to lose out on performance improvements unnecessarily. Key to optimizing cache allocation—especially in a dynamic computing environment—is the ability to determine the relative frequencies of cache hits and misses. 
       FIG. 1  illustrates qualitatively a typical “miss ratio curve” (MRC) which is often used to represent cache performance. By convention, an MRC is plotted with the cache size on the X-axis, and the cache miss ratio (i.e., misses/(hits+misses)) on the Y-axis. In the region marked “A” in  FIG. 1 , the cache is so small that it has a high rate of misses; in this region, the performance loss of handling cache misses could even outweigh any gains achieved for the relatively few cache hits. In the region marked “C”, however, the cache is so large that even an increase in its size will bring negligible reduction in cache misses—the cache effectively includes the entire memory region that is ever accessed. In most implementations, at any given moment of execution, the preferred choice in the trade-off between performance and cache size will normally lie somewhere in the region marked “B”. In some cache partitioning and allocation schemes (see, for example, U.S. Pat. No. 7,107,403, Modha, et al., “System and method for dynamically allocating cache space among different workload classes that can have different quality of service (QoS) requirements where the system and method may maintain a history of recently evicted pages for each class and may determine a future cache size for the class based on the history and the QoS requirements”), even the slope of the MRC is used to help determine the optimal partitioning and allocation. 
     A miss ratio curve (MRC) thus summarizes the effectiveness of caching for a given workload. A human administrator or an automated program can then use MRC data to optimize the allocation of cache space to workloads in order to achieve aggregate performance goals, or to perform cost-benefit tradeoffs related to the performance of competing workloads of varying importance. Note that in some cases, a workload will not be a good caching candidate, such that it may be more efficient simply to bypass the caching operations for its memory/storage accesses. The issue then becomes how to construct the MRC. 
     It would be far too costly in terms of processing cycles to check every memory access request to test if it leads to a cache hit or a cache miss and to construct the MRC based on the results. Especially in a highly dynamic computing environment with many different entities vying for maximum performance, exhaustive testing could take much longer than the performance advantage the cache itself provides. Different forms of sampling or other heuristics are therefore usually implemented. For example, using temporal sampling, one could check for a hit or miss every n microseconds or processing cycles, or at random times. Using spatial sampling, some deterministically or randomly determined subset of the addressable memory space is traced and checked for cache hits and misses. 
     Many existing MRC construction techniques are based on Mattson&#39;s Stack Algorithm, described, for example, in R. L. Mattson, J. Gecsei, D. R. Slutz, and I. L. Traiger. “Evaluation Techniques for Storage Hierarchies”, IBM Systems Journal, Volume 9, Issue 2, 1970. The Mattson Stack Algorithm maintains an LRU-ordered stack of references and yields a histogram of stack distances (also known as reuse distances) from which an MRC can be generated directly. Unfortunately, the cost of maintaining and updating the associated data structures is expensive in terms of both time and memory space, even when efficient data structures (such as hash tables and balanced trees) are employed. 
     Spatial sampling has been proposed in the prior art to reduce the cost of MRC construction, essentially running Mattson&#39;s Stack Algorithm over the subset of references that access sampled locations. For example, according to the method disclosed in U.S. Pat. No. 8,694,728 (Waldspurger et al., “Efficient Online Construction of Miss Rate Curves”), a set of pages is selected randomly within a fixed-size main-memory region to generate MRCs for guest-physical memory associated with virtual machines. Earlier computer architecture research by Qureshi and Patt on utility-based cache partitioning (Moinuddin K. Qureshi and Yale N. Patt. “Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches”, in Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 39), December 2006) proposed adding novel hardware to processor caches, in order to sample memory accesses to a subset of cache indices. 
     For some applications of MRCs, however, randomly selecting a subset of locations to sample is challenging. In many cases, for example, such as those involving accesses to I/O devices, the entire set of locations from which the sample must be drawn may not be known until after the workload has completed. In other cases, even if the complete set of locations is known up-front, it may span an extremely large range, of which only a small fraction may be accessed by the workload, so that storing even the reduced set of sampled locations may still prove very inefficient. Furthermore, the skewed nature of I/O access patterns can cause pre-selection of random samples from a large storage address space to yield inaccurate results. In some cases, a stratified sampling approach can help characterize the space by first dividing it into subgroups. For example, Kodakara et al., in Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Wei-Chung Hsu and Pen-Chung Yew. “Analysis of Statistical Sampling in Microarchitecture Simulation Metric, Methodology and Program Characterization”, in Proceedings of the 10th IEEE International Symposium on Workload Characterization (IISWC &#39;07), September 2007, proposed a stratified sampling approach for processor microarchitecture simulation with a set of benchmarks, using a time-based division of program execution into distinct phases, which are each sampled. 
     While such techniques can be effective in some cases, they do not work well when access patterns are irregular or non-stationary, resulting in large sampling errors and inaccurate simulation results. An approach that requires neither prior information about workloads nor the ability to analyze or classify program phases is therefore desirable. Moreover, the cost of stratified sampling would be prohibitively high for any inline processing involving a large storage address space. 
     Unless exhaustive testing is implemented, in order to be able to evaluate cache performance using miss-ratio or (equivalently) hit-ratio statistics, an administrator or automatic software module must decide which memory (or disk or other storage) accesses lead to cache hits (or misses); the universe of memory/disk accesses must be sampled. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  qualitatively illustrates a typical miss rate curve (MRC). 
         FIG. 2  is a MRC plot illustrating the results achieved by a prototype of spatial sampling embodiment. 
         FIG. 3  illustrates one example of a system that implements various aspects of the spatial sampling embodiment. 
         FIG. 4  illustrates an offline implementation of the system for constructing cache utility curves. 
         FIG. 5  illustrates another offline implementation with partial extension of some cache analysis functions into a primary system that includes addressable storage. 
         FIG. 6  illustrates a priority queue data structure. 
         FIG. 7  shows adaptations of a cache analysis system used in an example of a constant-space MRC construction embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     This disclosure is divided into two main sections. The first relates primarily to a novel hash-based spatial sampling method that is used to construct a Cache Utility Curve (CUC) that requires no prior knowledge of the system or its input workload; moreover, no information is required about the set of locations that may be accessed by a workload, nor is information regarding the workload access distribution needed. The embodiments described in this first section are also described in the “parent” of this application, namely, U.S. patent application Ser. No. 13/799,942 (also filed as international application PCT/US14/21922). The concepts explained in the first section underlie the improvements described in the second section. In the second section, a novel method is described that extends the concepts discussed in the first section and make possible an upper bound on the total memory space needed to construct such a CUC; in particular, it allows for construction of a CUC in constant space. 
     Hash-Based Sampling for CUC Construction 
     In a hash-based spatial sampling embodiment used to construct a Cache Utility Curve (CUC), for each referenced location L, whatever software entity is chosen to determine hits/misses in general may decide whether or not to sample a current referenced location L based on whether hash(L) meets at least one criterion. 
     The “location” L may be a location such as an address, or block number, or any other identifier used to designate a corresponding portion of system memory, or disk storage, or some other I/O device (for example, onboard memory of a video card, or an address to a data buffer, etc.), or any other form of device, physical or virtual, whose identifier is used to create cache entries. Merely for the sake of simplicity, the various examples described below may refer to “memory”; these examples would also apply to other storage devices, however, including disks, volatile or non-volatile storage resident within I/O devices, including peripheral banks of solid-state or other storage media, etc. As before, “data” is also used here to indicate any form of stored digital information, “pure” data as well as instructions, etc. 
     As is well known in many areas of computer science, a hash function is a function that takes a plurality of inputs (which may be bits or portions of a single data string), which may (but need not) be of variable length, and returns a usually (but not necessarily) fixed-length, smaller (often much smaller) output. Hash functions are used, for example, to reduce entire memory pages or even documents to single numbers that can be used as a form of validating checksum, or addresses can be hashed to create index entries into page tables, etc. 
     A good hash function normally maps its input to a small, fixed-length output, uniformly distributed over its output range. Many hash functions, including cryptographic hash functions (such as SHA-1, SHA-2 and others in the “Secure Hash Algorithm” family), are effectively randomizing in that a small change to the input value will yield a different hash value, with high probability. Some other hash functions, however, attempt to retain some degree of locality, such that a small change in the input will return an output that is relatively close, in some sense, to the “adjacent” input. There is a long list of well-known, common hash functions, many of which would be suitable choices for most implementations of this invention. No particular hash function is required; indeed, it does not require many of the characteristics of some more “advanced” hash functions. For example, the one-way property of cryptographic hashing will typically not be required. Universal hashing is typically faster, and also has the known and desirable “uniform difference property”. 
     Hash-based spatial sampling may be implemented in the context of MRC construction for a trace of disk I/O requests associated with a virtual machine over a given time period. One prototype used the MurmurHash hash function for spatial sampling decisions. A description of this prototype illustrates the more general principle of the invention. 
     Let L represent a location identifier (such as a disk block number) in the trace, that is, the observed stream of references (L 1 , L 2 , . . . ), and let H 10 =hash(L)= (L). (Here,   indicates the chosen hash function.) Unless otherwise indicated or readily apparent, the description here will use base-10 numbers merely because this is easier for most readers to follow. A sampling fraction T, which, as will be seen, functions as a threshold, was then specified with a resolution of 0.1% as an integer value in the range [1, 1000]. If  (L) mod 1000&lt;T, then the reference in the stream was sampled, otherwise it was discarded. In this prototype, the sampling criterion was therefore that  (L) mod 1000&lt;T. If T is set to 100, then, on average, only 10% of locations would be tracked to detect whether they led to cache hits or cache misses. Settings of T=50 and T=10 would lead to sampling rates of 5% and 1%, respectively. 
     As one alternative, the modulo operation could also be replaced with a bit mask by specifying the sampling fraction T as an integer value in [1, 2 n ] and using the mask (2 n −1). For example, with n=10, the range would be [1, 1024], and the mask would be 1023 10 =0x3FF 16 , resulting in the check “ (L) 16  &amp; 0x3FF 16 &lt;T 16 ”, where “&amp;” indicates the logical, bit-wise “AND” operation. Assuming the output of the hash is effectively random, any subset of its output bits could be used instead of just its contiguous low-order bits. For example, the system could shift output right by m bits first, or reverse/permute the output bits, or use every other bit, or run the output through a second hash function, etc. 
       FIG. 2  plots representative miss ratio curves (MRCs) obtained without sampling, and with 5% and 1% sampling rates, for a 24-hour trace of disk block accesses from a real-world VM workload using the prototype described above. Each MRC plots misses/(hits+misses) against cache size, and can be converted to a hit-ratio curve (HRC) trivially, by plotting “100-miss %” (HRC) on the Y-axis, as desired. In other words, the system may compute and base decisions on either type of access result ratio, either an access success ratio (a hit ratio) or access failure ratio (a miss ratio). The resulting curves, of either type, as well as other metrics such as miss rate or hit rate-derived curves, are referred to collectively as a “cache utility curve” (CUC), which is preferably (but not necessarily, depending on the implementation) compiled per-client as curve data CUC(Ci). As can be seen, in the example plot, the MRCs computed using hash-based sampled information matched the MRC computed using complete information (exhaustive sampling) surprisingly closely, despite the 20× to 100× reduction in data. Hash-based spatial sampling is even more valuable when used in an online manner to construct a CUC without having to store a trace of the reference stream, because hash-based sampling does not require any knowledge of which set of locations may be accessed by a workload in the future; moreover, with hash-based sampling, there is no need to store or consult a list of sampled addresses. 
     In some embodiments, it may be useful to vary the hash-based sampling rate adaptively to improve accuracy. One approach is to increase the sampling rate when the “rate of change” of the reuse-distance distribution (see Mattson) is determined to be high (above a first threshold value), and to decrease it when the rate of change is relatively low (below a second threshold value). 
     Hash-based spatial sampling is well-suited to such adaptive sampling, since the set of locations selected by  (L) mod M&lt;T is a proper subset of the set of locations selected by “ (L) mod M&lt;G” when T&lt;G. Increasing/decreasing the sampling rate using this invention can be easily accomplished simply by setting T higher (closer to M) or lower (closer to 0), with similar adjustments being made in implementations with other sampling criteria. As a result, the set of blocks associated with the minimum sampling rate is available consistently throughout an entire run. For example, assume M=100 and T=5, 20. The criterion  (L) mod M&lt;T would then lead to sampling rates of 5% and 20%, respectively. Of course, the modulus M need not be 100, but may be set initially to any convenient value. For example, setting M equal to a power of two may make computations faster, and T can still be adjusted dynamically to change the sampling rate. 
     Finally, note that the hash-based sampling method is not limited to CUCs for disk (including solid-state) devices or I/O requests. Hash-based sampling is particularly useful when all requests for data stored in a set of locations that may potentially be cached flow through a common point where sampling decisions can be made. The use of repeatable hash-based sampling makes this easy: Input locations L, compute  (L i ) for each of these, then mark for later sampling all the locations for which  (L i ) meets the sampling criterion/criteria. Hash-based sampling does not require such a common point, however. For example, sampling could be done independently for multi-processor channels within a storage system so as to simulate the behavior of a single cache. Independent sampling could also be implemented at multiple different points in a potentially parallel or distributed system. Each sampling point (“tap”) could then use the same hash function; in such a case, the collection of all sampling points should ensure that every I/O request (all of which should be observable) is hashed by some sampling point. 
     For example, to sample P percent of the entire location space, the system may sample a reference if and only if  (L) mod 100&lt;P. Note that this approach ensures that all accesses to the same location will be sampled, as required for reuse distance computations, since they will have the same hash value. Unlike sampling methods that rely on [pseudo-]random sampling based on time or accesses (such as every Nth reference, random with a mean of N references, etc.) the hash-based spatial sampling method according to this invention provides repeatability with no need to store a “seed” value: For a given L,  (L) will return the same value regardless of when it&#39;s evaluated or what the sampling criteria (one or more) are. 
     Note that, although hash-based spatial sampling according to this invention is not random in the sense of some conventional sampling methods, the sampling rate itself will normally have at least some stochastic properties in that it is not necessarily fixed but rather will typically depend on the distribution of location hash values. Thus, the sampling rate may vary randomly, even if the sampling itself is not random. Consider, for example, a threshold of T=10 and M=100. The nominal sampling rate is 10/100=0.10=10%, but the actual sampling rate may be slightly different, for example, 9% or 12%, depending on the particular mix of location identifiers that are accessed and the chosen hash function. Given a reasonably large number of location references, and assuming a reasonably good hash function that effectively randomizes its input, this will rarely matter in practice. As used in this disclosure “sampling rate” therefore should be understood to mean both a rate forced to be fixed at some value, as well as a nominal sampling rate that may vary from a nominal, expected value depending on the location identifiers that are accessed and the chosen hash function. 
     The criterion for sampling does not have to be “&lt;T” or indeed “&lt;” at all. It would of course work equally well to set the criterion as, for example,  (L) mod M ε{range(s) of values} or  (L) mod M&gt;T, etc., and may combine more than one condition. Similarly, the bit mask could be chosen to detect not a value that is less that or greater than the sampling fraction, but rather a particular bit pattern. For example, if the sampling criterion is that the five least-significant bits of  (L) are 11111 2  (or 00000 2  or any other five-bit pattern), then the criterion would be fulfilled for 1/32 of the locations, for a sampling percentage of about 3.1%; testing for a pattern in the three least significant bits would lead to a sampling frequency of ⅛ or 12.5%, etc.; such criteria may also be implemented using a bit mask. Skilled software designers or mathematicians will easily be able to implement other sampling criteria. 
     In this discussion, it is assumed merely by way of illustration that the system samples if the hash function meets the sampling criterion. Of course, one could also equivalently design the system such that it excludes a storage location from sampling if the location&#39;s identifier&#39;s hash meets the criterion. For example, the “inclusive” criterion  (L) mod 100&lt;T could easily be converted into the “exclusive” criterion such as, for example,  (L) mod 100≧T′. 
     If  (L) for a current location L that has been addressed meets the sampling criterion, then known methods may be used to trace the cache access and detect whether a hit or miss occurs. Note that whether a hit or miss occurs also depends on the cache size. After enough samples have met the criterion and been traced, a statistically meaningful value of the miss ratio (or hit ratio, depending on the design choice) for the size of the given cache allocation will be available, which the system administrator (human or automatic) can then use to adjust the allocation if needed. 
     The surprisingly high accuracy of even a relatively small—indeed, very small—sample chosen using the hash-based spatial sampling technique described here, together with the relative speed of computation of a hash function compared with conventional approaches, means that the invention is better suited for real-time, dynamic cache allocation adjustments. In some implementations, it may be advantageous to transform or filter out references L i  (such as from a trace of references) for reasons other than sampling, to reflect specific cache policies or cache implementation details. One example of a non-sampling transformation would be that the raw trace may represent each access as a “start location” and “size”, which is then converted into a sequence of cache-block-sized block accesses (for example, converting “offset=1 MB, size=32 KB” into two accesses to 16 KB blocks at block locations 64 and 65, since 64*16K is the block at 1 MB, and 65*16K is the next consecutive block). The hash function could then be applied to L=64 and L=65 for separate sampling decisions. An example of a non-sampling filter based on cache policy would be to discard all I/O requests larger than a certain size (for example, bypassing the cache for large I/Os with sizes above some threshold such as 1 MB, since a disk can process such large sequential I/O requests relatively efficiently). Another example would be to filter out all I/O requests of a certain type, such as writes. 
       FIG. 3  illustrates a representative system that implements an embodiment that is useful for compiling dynamic and possibly real-time, in-line information useful for decisions regarding cache allocation. The different embodiments of the system shown in  FIGS. 3-6  each include various hardware and software components or “modules”. As is well know, such software modules comprise bodies of computer-executable code that may be stored, that is, embodied, in any conventional non-transitory medium and will be loaded into system memory for execution by the system processor(s). 
     One or more clients  100  (such as an application, a virtual machine, a host, a hardware entity, some aggregation of any or all of these, etc.) includes, by way of example, a system  100 - 1  that in turn includes virtual machines  110  and other applications  120  running on a hypervisor/operating system  130 ; as well as other clients  100 - 2 , . . . ,  100 - n.    
     A primary system  400  includes at least one storage system  450 , which may be of any type or configuration, from a single disk to a mixed storage technology system spread over multiple servers and locations in the “cloud”. An access management system  420 , which may be a dedicated system or simply the storage access components of a conventional server, mediates I/O operations with the storage system  450  and will typically include one or more processors  430 . In this example, the primary system is shown as including a cache  440  (which may be part of the processing system  430  itself) and a component (software, firmware, etc.)  410  that manages cache operations such as cache  440  partitioning (if implemented) and allocation for entities, such as the clients  100 , that issue read and write requests to the storage device(s)  450 . As is mentioned below, however, some embodiments of the invention may help the administrator of the primary system decide whether to include a cache at all. 
     The storage devices  450  may, but need not be located in the same place (such as in a distributed “cloud” storage environment) and may be of any type, such as solid-state devices (SSDs), including but not limited to flash drives, RAM-based storage systems, or slower electromechanical storage systems. The storage devices may be of different technology types, and may have any block or page size. The only assumption is that there is some form of location identifier L that may also be used to identify a corresponding cache entry if the data at L is in fact cached. 
     The clients are any entities that address the storage system  450  either directly or, more likely, via one or more intermediate address translations. Depending on the chosen implementation, the clients may communicate data requests to one or more cooperating servers via a bus, a network, or any other communications channel, all of which are indicated collectively by reference number  200 . In some implementations, all or some of the clients  100 - 1 , . . . ,  100 - n  (also referred to as C1, . . . , Cn for succinctness) may be incorporated into the primary system  400  itself, in which case no network will normally be needed for them. In the illustrated example, one of the virtual machines  110  has issued a read request for data at location L. (For simplicity and clarity, any intermediate address translations L→L′→L″, etc., are ignored here.) Note that, depending on the embodiment, the individual VMs  110  may be considered to be clients, rather than, or in addition to, the overall virtualization platform  100 - 1 . This invention does not presuppose any type of client, which may be any software and/or hardware entity—or any combination of software and/or hardware entities—that addresses the storage system  450  and whose possible or actual need for cache allocation is to be tested and, optionally, adjusted. 
     In the embodiment illustrated in  FIG. 3 , one or more of the clients  100 - 1  (C1),  100 - 1  (C2) . . . ,  100 - n  (Cn) transmit respective streams of reference requests L(C1), L(C2), . . . , L(Cn) to access the storage system  450  (all or for only designated clients) are passed to or tapped by a cache analysis system  300 , which may be free-standing or incorporated into another system, including the primary system  400 . The cache analysis system  300  here includes a buffer/storage component  370 , which may be a hardware device such as a flash memory, disk, RAM, access to an external storage (even directly to the storage system  450 ), that stores the location identifiers L submitted by any or all of the clients that one desires to construct a CUC for. 
     In some implementations, the references (submission of storage location identifiers L) of more than one, or even all, of the clients, for example, all of the VMs on a single host, may be considered as a whole for analysis. In other cases, however, cache analysis is preferably done per-client so as to be able to construct a separate cache utility curve CUC(Ci) for each client Ci. For per-client analysis, each reference may be tagged in any known manner with a client identifier such that the respective client&#39;s references are segregated for storage and processing. The storage component  370  is therefore shown as segregating submitted identifiers L(Ci) per-client, although it could also be arranged through filtering that only one client&#39;s identifiers are captured and stored at a time for analysis. The cache analysis system  300  includes a module  360  to calculate the hash value  (L). Since hash functions are well known, the programming of such a software component is well within the skill of programmers who work with memory and cache management. The hashing module  360  computes the hash function for the currently requested data location identifier L. The result of the hash function evaluation is then passed to a sampling module  332 , which evaluates whether the hash of the current location identifier L meets the currently set criterion, and then submits requests that do to a simulated cache component  340  to test whether there is a hit or miss. 
     The results of the hit/miss testing are made available to a cache utility curve (CUC, such as an MRC or HRC) compilation module  336  that may compile the results as per-client statistics, for example, in value range bins such as are used to form histograms. Particularly in implementations that are fully automated, the per-client CUC(Ci) results may then be passed to a workstation monitor  500 , which can then display the current CUC(Ci) estimate, for example, for a selected client. The monitor  500  may also be included to allow a system administrator to communicate various parameters to the sampling module  332  to change the sampling criterion, etc. The CUC results are preferably also, or instead, passed to the cache manager  410 , which then may then adjust, either under operator control or automatically, the current cache allocations for the respective clients so as to improve the cache performance. 
     The concept of hash-based sampling does not presuppose any particular method for simulating the cache. There are different ways to simulate a cache, which also leads to different ways to “adjust” the size of the simulated cache  340 . One example is simply to allocate a portion of system memory to act like a cache, loading and evicting entries as if it were a real cache. In such a case, it will typically be necessary to implement more than one simulated cache so as to be able to determine the miss ratio (“Y-axis”) for enough simulated cache sizes (“X-axis”) to compile a CUC; alternatively, the same set of inputs L would need to be tested multiple times against a single simulated cache with different simulated sizes, which would increase processing time. In other words, in this example, a part of system memory is treated as if it were a real cache. Note that it is possible to simulate the cache by storing only the cache metadata (including the per-entry tag aka “location”, and perhaps other flags like “dirty”). It is not necessary to store the actual cached data itself since the caching routine doesn&#39;t depend on the actual data contents, but rather only the location alone and the size of the cache line/block. Since the tag size is typically much smaller than the data size, this would have the benefit of reducing the memory footprint significantly. 
     One of the advantages of Mattson&#39;s LRU-based stack algorithm is that it enables capture of information (via stack/reuse distances) for all possible cache sizes at once, which can then be used to construct an MRC. Consider that, according to the standard Mattson algorithm, a miss will occur whenever the reuse distance of a current reference is greater than the current cache size. Assume, for example, that the cache size (or the cache size currently allocated to an entity) is B cache blocks (or other units). Any location whose reuse distance (stack distance) is greater than B will be considered a miss; in essence, since the request is “too far” from the top of the stack, it doesn&#39;t “fit” within the current cache allocation. Given a set of location identifiers L i , the LRU ordering, and the currently assumed “cut-off” B, the Mattson algorithm can therefore determine whether there would be a hit (LRU_distance(L i )≦B) or a miss (LRU(L i )_distance&gt;B). But note that the Mattson algorithm can determine whether there would be a hit or a miss for L, for any chosen B, or in fact for a set of different values Bj, given a current LRU stack. The number of misses (or hits, depending on when an MRC or HRC is used) can therefore be incremented for every Bj for which LRU(L i )_distance&gt;Bj. Given a series of location requests L i , an entire MRC can therefore be constructed, by comparing LRU(L i )_distance with each of Bj using a single simulated cache, which can be defined by the “available” size of the LRU stack. Note that the LRU stack could even be big enough to include an entry for every possible L i , but its effective size for purposes of determining hit/miss can be varied by changing the “cut-off” threshold B. 
     These properties of the Mattson LRU-based stack algorithm lead to another way to implement the simulated cache  340 : As long as an LRU stack is maintained, it is possible to determine hit/miss for all cache allocation sizes of interest for each L, regardless of whether there is any memory assigned to as a simulated cache or not; in effect, the LRU stack itself functions as the simulated cache  340 . Other non-Mattson cache simulation algorithms may of course also be implemented as the simulated cache  340 , with changes such as any supporting data structures needed; these will be understood by skilled programmers who deal with cache operations. 
     Note that a single CUC (in particular, MRC or HRC) represents miss/hit rates for an entire range of possible cache sizes. In most implementations, the system (human operator or automatic software module or both) will attempt to find some optimal allocation setting for multiple clients. A single client would of course have no competition for cache space at all; nonetheless, the invention may also be useful in single-client situations by providing cache-sizing information, which may be useful for decisions relating to reallocation of unnecessary cache space (for example in main memory or on an SSD) for non-caching purposes. Another example of a single-client implementation would be to simulate a single cache size in order to determine, using a simulated hit ratio, whether, for example, it would be advantageous to buy and install a cache card of some given size. 
     An example of yet another possible use would be in classifying workload behavior, for example, to identify workload types, such as “streaming” (no locality) or “small working set”, etc. For automated cache allocation decisions, the cache analysis system may compute the CUCs for different clients, and then the cache manager  410  may choose an efficient operating point (cache size) for each client that maximizes a utility function, such as reducing aggregate misses (across all clients) the most, or a priority-weighted function of miss rates across clients, etc. The system may also attempt to find a point or a range on the CUC that has been pre-defined as optimal in some user-chosen sense. By looking at estimates of first and maybe second derivatives of the MRCs for the various clients, for example, the system could attempt to choose cache allocations that get as many higher priority clients as possible in the range between some estimate of A and B (as illustrated in  FIG. 1 ), such as just beyond the “knee” or “fall-off” (relatively faster changing first derivative) of the MRC. 
     In an online system that makes fine-grained dynamic cache allocation decisions, the per-client MRCs may be updated incrementally in an online manner; allocation decisions may then be made periodically using the current set of per-client MRCs. As mentioned above, the core concept of the invention—hash-based sampling—does not presuppose any particular method for cache simulation. The system could, for example, also generate an MRC for a cache using a non-LRU replacement policy. In such a case, a method such as Mattson&#39;s, which is based on a stack algorithm that exhibits a stack inclusion property, may not be able to simulate all cache sizes at once, but the system could instead use multiple simulations of caches at different sizes (either in parallel, or sequentially), each fed with hash-sampled accesses. In the case of parallel cache simulation, the simulated cache component  340  would thus in effect comprise a plurality of simulated caches of different sizes. 
     Other parameters that an administrator might want to set and adjust in the sampling module  332  might be how often sampling and MRC-construction should be done, or what the first and second threshold values (which control the sampling rate) should be. Typical times might be on the order of minutes or even hours, but the decision could also be based on a large enough (determined by the administrator) change in the number and/or type of clients that need to share the cache. Of course, all such manual settings could also be accomplished automatically by programming suitable heuristic algorithms. 
     Some caching systems, such as some flash-based storage, can also cause a net loss of performance as a result of caching policies regarding cache block size and write caching. For example, a cache may be designed to cache read-heavy workloads, using a write-through policy with a default cache block size larger than default size of a write. A write to a block that isn&#39;t already cached may then first cause the cache to issue a larger-sized read of the enclosing block, followed by a smaller write to both the cache and backing disk. This has two effects: 1) a beneficial pre-fetching effect—the spatial locality mentioned above; and 2) additional overhead due to write-induced reads. In some cases, such as write-heavy workloads, 2) outweighs 1) by a large enough margin that the cache has no net benefit, or is even a net loss. Some systems may therefore benefit from creating two MRCs—one for the main misses, and one for write-induced misses. The system may then, for example, subtract the two MRC (or HRC) curves to determine the “net reads saved” by caching. 
     The miss “ratio” indicates relative frequency of hits and misses, but another parameter that is discussed in the literature and used in some allocation schemes is the miss (or, equivalently, hit) “rate” (collectively: “utility rate”) which typically measures misses per system event, which may be any measurable system quantity that can be monitored; examples include low-level events such as “instructions executed” (either as an absolute number or per some unit time), elapsed real or virtual time, “TLB misses”, etc. that could be measured by a hardware performance counter, higher-level application-specific events such as “number of transactions processed”, workload-specific and application-level operations such as “database query count”, etc. Utility rate curves may then be compiled and used in a manner similar to cache ratio curves. 
     For optimizing cache allocations across multiple clients, some embodiments may also measure and use the number of hits per unit time. For example, if the hit ratio for client A is much higher than that for client B, but if B has many more accesses than A, then allocating more cache to B (despite its lower hit ratio) may save more total disk accesses over a given time period. Hit rate information may be incorporated in any known manner into the chosen allocation routine programmed into the module  330 . 
     There are different design and purely administrative choices when it comes to how often a CUC should be constructed for a given client or set of clients. In some cases, static choices may be preferred, such as redoing the CUC-compilation process every n minutes, or every day or hour, or whenever a new client or number of clients enters the system, when some other significant change to the workload is detected, etc. In some other cases, such as where the CUC is constructed online, it may be advantageous to include some form of periodic reset or “aging” to weight more recent accesses more than older accesses. For example, the system could periodically age/decay per-histogram-bucket counts by, for example, dividing the values by two or by applying a decay factor, if such histograms or equivalent structures are used to compile miss statistics. Examples of other possible aging techniques include using a moving average of values and exponentially-weighted moving average (EWMA). 
       FIGS. 4 and 5  illustrate system configurations that are variations of the configuration shown in  FIG. 3  that enable practical, off-line, high-speed construction of an MRC using a cache simulation taking as input an actual reference stream. 
     See  FIG. 4 , which illustrates an example of an offline, “batch” embodiment. As in the real-time, in-line embodiment illustrated in  FIG. 3 , the client entities  100 - 1 ,  100 - 2 , . . . ,  100 - n  submit respective streams of storage access requests L(C1), L(C2), . . . , L(Cn) either directly or via the network  200 , or both, to the primary system  400 . 
     There are different ways to compile the set of location identifiers used for sampling. One way would be for the cache analysis system  300  to tap the location identifier stream L(Ci) in real time (either via a per-client filter or using segregated, per-client storage) as in the embodiment of  FIG. 3  and store the corresponding addresses in the component  370 . Assume, however, that a system administrator (as opposed to the cache analysis system  300 ) wishes to examine how best to allocate actual cache for a given set of clients. The administrator could compile a log (also known as a “trace”)  470  (total, or perhaps a subset, such as identifiers submitted only by clients of interest) of the submitted location identifiers L and then transfer these to the storage component  370  of the cache analysis system  300  for processing. The log  470  could be transferred on a physical medium such as a disk, flash drive, hard drive, etc., or by downloading over a network, depending on the size of the log file and required transfer speed. Hash computation, sampling of the simulated cache, and compilation of the CUC may then be carried out as before, on the basis of the location identifiers stored in the component  370 . The CUC can then be presented in any desired manner, such as on the display of a monitor  500 , or sent to the administrator of the primary system  400  to help him determine proper allocation of any actual cache used, or, indeed, if there needs to be a cache at all. 
     The set of all submitted location identifiers can quickly grow very large. To transfer the entire set even for a single client may therefore in some cases take too many processing cycles from the processing components controlling the system  400 , or require undesirably large bandwidth and transfer time or require special protocols and arrangements.  FIG. 5  illustrates a variation of the configuration of  FIG. 4  that reduces some of this problem. 
     In  FIG. 5 , an agent or similar software module  300 ′ is co-located with the primary system  400 . This module  300 ′ includes not only the storage module  470  for location identifiers, but also the modules that handle hash computation  360 ′ and sampling  332 ′. In effect, in this embodiment, the hashing and sampling modules  356 ,  332  have thus been “moved” into the primary system, such that the cache analysis system  300  is partially extended into the primary system. The hash value for each identifier L can thus be pre-computed, and compared with the sampling criterion, and only those (indicated as L*) that meet the criterion can then be passed on to the cache analysis system  300  and tested against the simulated cache  340  for the hit/miss determination and construction of the CUC in the module  336  as usual. Because hash-based sampling often leads to a surprisingly accurate CUC even with low sampling rates, the amount of data that needs to be transferred to the cache analysis system is also greatly reduced. 
     As mentioned above, most implementations of the invention will want to determine cache utility curves per-client and will consequently tag and/or segregate storage references for each client so as to make separate processing more efficient. In cases where one or more clients is a virtual machine, each client Ci may maintain and transmit a buffer of sampled locations L*(Ci), independent of its actual accesses to the real storage system. This could be implemented, for example, via a filter driver in the guest OS within a VM, or via a filter driver in the hypervisor. For example, traces may be collected on each host using block trace collection tool such as “ESX vscsiStats” in VMware-based systems, which can collect separate traces for VM virtual disks. The block trace tool could even be modified itself to perform sampling to reduce the data that the hypervisor needs to send for cache analysis. Once the raw trace data is extracted from the hypervisor, it could be sampled before sending it off for analysis; alternatively, the entire trace maybe sent off for analysis, with sampling applied later during the analysis itself. 
     The hash-based sampling method described here is particularly advantageous for compiling some notion of a CUC to provide information that can be used to allocate cache space among various entities/clients, but it may also be used in other applications as well. For example, hash-based sampling could be used to determine which accesses to run through a cache simulator. Hash-based cache access may also be used in otherwise known routines to optimize cache block size, to optimize other parameters/choices such as cache replacement policy, etc. 
     One advantageous aspect of various embodiments of the invention is that they effectively provide a stateless mechanism that can automatically track underlying cache distribution. Note, for example, that the invention may sample more if the I/O rate increases and it will generally sample address ranges that are more frequently accessed since all addresses are hashed. Different embodiments of the invention therefore may offer an improvement in terms of detection of “phase changes”—since the invention is able to track the underlying distribution at any given time, it can also detect peaks of the underlying distribution to detect phase change. This then provides information that can be used to reconfigure cache settings, allocations or even the chosen replacement algorithm. 
     In most cases, a CUC will be compiled for each entity of interest, that is, for each entity Ci one wishes to determine efficient cache allocation for. Location identifiers L(Ci) are in such cases preferably stored, hashed, sampled and evaluated per client; in other words, each CUC will typically be associated with a particular client. This is not necessary in all cases, however. For example, in some systems, the main question of interest may be if a cache is beneficial at all, since cache operations themselves take processing time. A CUC can in such cases be complied for all clients without differentiation, such that the CUC will represent an aggregate cache performance. The system designer or administrator can then determine whether to implement a cache or, if so, how large to make it. Hash-based sampling is particularly advantageous in such cases, since it may reduce the computational burden of this task by orders of magnitude. 
     In the embodiments discussed above, by way of example, the CUCs are shown as informing cache reallocation code (in the cache manager  410 ) that essentially then partitions a single large cache  440  into smaller per-client caches, each of which operates independently (between reallocations) using LRU replacement. This is not a necessary assumption for this invention. Instead, even if the large cache is managed as a single large cache, the cache replacement policy could use CUC information when making individual replacement decisions. As one example, suppose the cache manager  410  randomly selects N candidate lines (blocks) to victimize; it may then choose which one to replace based on the derivatives of the CUCs associated with their respective clients. 
     Constant-Space CUC Construction 
     The hash-based sampling approach described above significantly reduces the computational resources required to estimate a cache utility curve, while maintaining acceptable accuracy. For example, that embodiment, using sampling rates as low as 0.1% to 1%, may reduce both the time and space required to construct an MRC by several orders of magnitude. 
     Despite such a significant improvement, even a low, constant sampling rate does not place an upper bound on the total memory space needed to construct a cache utility curve (CUC). This is because the amount of memory required is a function of the total number of unique storage locations U that may be cached. Depending on the application, a “storage location” may represent a logical or physical disk block, a virtual or physical memory address, or any other indexable unit of storage that may be cached by hardware or software. 
     For example, simple list-based implementations of the Mattson algorithm for MRC construction use space proportional to U, while more time-efficient, tree-based implementations (see, for example, Qingpeng Niu, James Dinan, Qingda Lu, and P. Sadayappan, “PARDA: A Fast Parallel Reuse Distance Analysis Algorithm”, Proceedings of the 26th International IEEE Parallel &amp; Distributed Processing Symposium (IPDPS &#39;12), Shanghai, China, May 2012) typically use more space, proportional to U log U. Statistically, spatial sampling with a fixed sampling rate R reduces U by a factor of 1/R. As one example, with a 1% sampling rate (R=0.01), U is reduced by a factor of 100. 
     Even with a large multiplicative reduction due to sampling, however, space consumption still grows with U. For many applications, it would be valuable to be able to place an upper bound on the total required memory size. An example is embedding MRC computations within a cache subsystem, to inform cache allocation decisions in a memory-constrained environment. Such an a priori bound would be valuable in both offline and online systems. It would be useful in an offline system that processes historical traces of past references, since the alternative—computing a bound by determining the number of unique locations U within a trace—requires making an expensive additional pass over the entire data set. In a live, online system that processes a continuous stream of references to storage locations, it is not even possible to know U up-front, so it is generally infeasible to compute such a bound for online systems. 
     An additional problem is the choice of an appropriate sampling rate, R. In addition to R, the accuracy of CUC estimation using spatial sampling also depends on U, as well as the total number of references to these unique locations. When these values are small, it is preferable to use a relatively large value for R (such as 10%) to improve accuracy. When these values are very large, it is preferable to use a relatively small value for R (such as 0.1%), to avoid wasting or exhausting available computational resources. 
     Assessing these tradeoffs—especially with incomplete information—may be difficult for the developers, administrators, and users of such systems. It is well-known that for many applications of statistical sampling, such as opinion polls, a relatively small fixed sample size can yield accurate estimates within a small margin of error. As a result, in some cases, when U is unknown, it may be preferable to rely on an absolute number of samples, instead of a relative percentage of an unknown quantity. 
     Ideally, what is desired is a technique that can compute a CUC, such as a miss ratio curve, using only a fixed, bounded amount of space, regardless of the size or other properties of its inputs. In addition, it would be advantageous if the technique could determine an appropriate sampling rate automatically, without the need for manual intervention. 
     To this end, a constant-space embodiment progressively lowers the hash-based spatial sampling rate adaptively, in order to maintain a fixed bound on the number of sampled locations that are tracked at any given point in time. The sampling rate may be started at a high initial value, such as 100%, and lowered gradually as more unique locations are encountered. One advantage of this approach is that it bounds the amount of space required to store the data values needed to compute a CUC to a constant. Another advantage is that it does not require a particular sampling rate to be specified. 
     As explained above, for the general hash-based sampling embodiment, hash-based spatial sampling may be implemented so as to maintain a subset inclusion property when the sampling rate is lowered. This inclusion property means that each location sampled after lowering the rate would also have been sampled prior to lowering the rate. In other words, at any given point in time, the sampling criterion (for example,  (L) mod M&lt;T), for location identifier L, and current threshold T, implementing sampling rate T/M as described above chooses only locations which would have also been chosen by the sampling criterion used at any earlier point in time (for example, with hash threshold T old &gt;T). 
     After lowering the sampling rate, information about some previously-sampled locations may no longer be needed, since those locations would not have been sampled if the new, lower rate had always been in effect. Notably, no information is needed about locations that were not previously sampled; this property enables online processing of continuous reference streams. 
     Typically, routines such as Mattson&#39;s for constructing cache utility curves maintain various data structures such as histogram buckets to simulate cache operations and track associated statistics. When spatial sampling, such as in the above-described hash-based sampling embodiment, is employed, each sampled location simply represents many more unsampled locations, in a statistical sense. As a result, the same data structures and update rules may be used, essentially without modification. 
     Dynamic changes to the sampling rate, however, may require changes. When the sampling rate changes, it may be necessary to transform or adjust data structures, statistics, or other state. For example, consider histogram bucket increments performed by an MRC construction routine for previously-sampled locations that are no longer part of the currently-active sample set. Ideally, the effects of these updates should be “undone”, as if the locations with which they are associated were never sampled in the first place. 
     In general, completely unwinding the effects of previous updates would be complex, and would require maintaining a prohibitively large amount of state, contrary to the goal of using only a small, bounded amount of memory for the purpose of the cache analysis itself. This constant-space embodiment of the invention therefore includes techniques that can serve as effective “undo” approximations. For MRC construction, one such technique involves rescaling histogram bucket counts by a function of the new and old sampling rates, such as, for example, by K·R/R new /R old  (where K may be any chosen value, such as K=1) Using this adjustment, an estimated MRC, constructed using a fixed sample-set size and an adaptive sampling rate, closely approximates one constructed using a constant sampling rate equal to the final adaptive rate. 
     Purely by way of example, this embodiment is described below primarily in terms of modifications to hash-based spatial sampling for performing MRC construction in constant space, following the basic approach outlined above. Many of the techniques in this embodiment, however, are not limited to MRCs, and can be applied more generally for estimating other cache utility curves.  FIG. 7 , furthermore, shows adaptations of the cache analysis system  300  that implement this exemplifying embodiment. 
     Initially, the sampling rate is set by a rate-adjustment portion  610  of the sampling module  332  to a maximum value, such as 100% (R=1.00), the maximum possible value. In an implementation that uses selection criteria of the form “ (L) mod M&lt;T”, this can be accomplished by setting the current hash threshold T=M, so that every location L will be selected. One advantage of beginning with R=1.00 is that this choice will work regardless of the choice of other parameters such as M and T—it will be able to “converge” so as to adapt to whatever such settings are currently in operation. On the other hand, it would be possible to begin with or calculate some other maximum R value given additional knowledge of how much memory is available to the cache analysis system for construction of the CUC relative the size of the set of locations that will possibly be sampled. As one concrete example, the system could start with an R value of 10% instead of 100%, which may be a reasonable starting rate, unless the total number of referenced locations is extremely small. Nevertheless, by starting with R=1.00, there will be no need for such extra information. 
     An auxiliary data structure  620  is introduced to maintain a fixed-size set S with cardinality (number of elements) /S/. Let  = (L i ) mod M be a “hash threshold value” for L i . Each element of set S is a tuple (L i ,    i ), consisting of an actively-sampled location L i  and its associated hash threshold value    i . Let S bound  denote the maximum desired size |S| of set S; that is, S bound  is a constant that represents an upper bound on the number of actively sampled locations. 
     When S bound  is large, a known “priority queue” data structure (a queue or stack data structure in which each element has a “priority” associated with it) is preferred, using the tuple&#39;s hash threshold value as its priority. The priority queue  622  (see  FIG. 17 ), which will typically be stored in read/write storage such as RAM or cache local to the cache analysis system  300 , is designed to support dequeuing, that is, removing its highest-priority element efficiently, which allows for quick removal of the location with the largest associated hash value. Of course, alternate implementations may use different data structures; for example, a simple unordered array may be more efficient when S bound  is small. 
     When the first reference to a location L that meets the current sampling criteria is processed, it is called a “cold miss”, since it has never been resident in the cache. In this case, L is not already in set S (stored in  620 ), so it must be added to the set. In some implementations, such as those that employ a hash-table lookup to index into a tree-based reuse-distance data structure, the cold-miss determination may be made without consulting S directly. If, after adding L, the bound on the set of active locations would be exceeded, such that |S|&gt;S bound , then the size of S must be reduced. 
     To reduce the size of S, the element (L max ,    max ) with the largest hash threshold value    max  is removed from the set, for example, by using a priority-queue dequeue operation. The location L max  is also removed from all other data structures, such as the hash table and balanced tree commonly used in time-efficient implementations, if these structures are present in a given implementation. The current hash threshold is then reduced to    max , that is, the rate adjustment module  610  effectively reduces the sampling rate from the previous rate R old =T/M to the new rate R new =   max /M, which narrows the criteria used for future sample selection. 
     Note that, for each element (L i ,    i ), the value used to determine its order in S whether it remains in S or is removed through threshold adjustment is the hash threshold value    i . A possible alternative implementation could therefore be not to store the L i  values at all, but rather, after calculating them from L i , only the    i  values. This would approximately halve the required size of S, but may on the other hand be lossy inasmuch as multiple locations might alias to the same hash value. 
     Another alternative would be to store, not the hash threshold values    i = (L i ) mod M, but rather only the “raw” hash values  (L i ) and then to perform the modulo operation dynamically to compute the hash threshold values    i  to test against the sampling criterion. This option might be preferred in systems that have other uses for the raw hash values. In general, the system may store entries in the data structure using any representation from which the location identifiers and/or hash threshold values can be computed. 
     See  FIG. 6 , which illustrates a greatly reduced (only 16-entry) priority queue, in which the 16 entries (L a ,    a )-(L q ,    q ) are organized in ascending order (shown bottom-to-top) according to the value of  . Thus, in this exemplifying embodiment, the   values are used as indices or “keys” locating the samples within the queue. Other keys, such as ordinal numbers, could, however, be implemented, although this will in general require additional storage, computation effort (since   for each sample will already be available anyway), or data structure complexity. 
     In this example, assume that the sampling fraction, that is, threshold, is currently set at T old  and that, following the criterion  (L) mod M&lt;T, the entry whose hash threshold value is greatest but still less than T old  is the L q  entry. In other words, initially, T=T old =   q . Now, given the same selection formula  (L) mod M&lt;T, in particular, with a constant modulus M, assume that the sampling fraction, that is, threshold T is lowered from T old  to T new  such that, now,    p =T new &lt;   q =T old . This means that the entry L q  no longer meets the selection criterion and would have been excluded from use in CUC construction. Lowering the threshold even further to T=T*=   m  would similarly have excluded all of the entries L m -L q . In other words, as explained above, lowering the threshold T changes which locations L are used in hash-based MRC construction. This embodiment takes advantage of the fact that the “inverse” of this operation is also valid: If there is a need to reduce the set S by, for example, N entries, so as to keep /S/ no greater than some desired size, there will in general be some threshold value T for which the number of entries remaining in the priority queue  622  is no more than /S/. 
     It can happen that multiple entries in S have hash threshold values that are identical, yet still are the greatest and less than T old . In other words, there may be more than one entry that no longer meets the current selection formula. In such a case, one policy would be to remove all of these entries when reducing the size of S, which ensures that all the remaining elements in S are strictly less that the new threshold. 
     Continuing with the simplified example in  FIG. 6 , if the system needs to create one (N=1) free space in the queue  622 , for example to insert a new sample, then the entry L q  may be discarded (for example, over-written or erased), the threshold may be lowered from T old  (=   q ) to T new  (=   p ), and the new sample may be inserted into the queue (keeping the same relative ordering of entries). Because of the inclusion property and because the modulus M is the same, this will not cause the unwanted exclusion of other entries from the queue  622 . 
     There are different known methods for ordering the elements of a data structure such as the priority queue  622  to enable the cache analysis system to identify and extract the required number of entries from the queue. Heaps and balanced trees (including the binary search tree known as a “splay tree”) are just two of the many known possibilities. In the example illustrated in  FIG. 6 , the entries(s) are ordered in increasing order of hash threshold values. Ordering by the size of such a key can be maintained using a linked list, for example. 
     One alternative would be to store location entries L i  initially into an array and then run any of the many known sorting routines to order the array as desired. It would even be possible not to order the array/queue  622  at all, but rather to recompute the hash values    i  dynamically from their corresponding location identifiers L i , without needing to store the hash values    i  at all, as long as the implementation of the priority queue is altered accordingly. 
     Although this embodiment of the invention is illustrated as setting an upper-bound threshold and removing highest-valued priority queue entries, it would of course be possible to remove entries from the “bottom”, that is, to set a lower-bound threshold and remove entries whose hash threshold values are less than this threshold. Current threshold values may then be adjusted upward according to the number of entries to be removed to achieve the desired size for the priority queue. Whether the threshold is chosen to establish a maximum or minimum value, entries in the queue  622  are extracted or otherwise de-queued when the respective location identifiers&#39; hash threshold values fail to meet the current sampling criterion. 
     The threshold, T, is used in the different embodiments for two primary purposes: rescaling the existing counts in the data structure for the sample set, and determining those locations that should be added to the sample set. The values of the threshold for these two cases need not be the same. 
     While the primary embodiment is described in terms of a test on each location L as being whether  (L) mod M&lt;T, note that when a sample set becomes too large, that is, /S/&gt;N for some N, this state would have been reached for any value of T′ such that T′&gt;max{ (L) mod M|L in S}. 
     Let U=max{ (L) mod M|L in S}. In addition, for the set of locations Q of each of those locations K that has been observed and rejected, let V be min{ (L) mod M|K in Q}. So similarly, this state would have been reached for those T′ such that also T′≦V. That is, with a test using “&lt;”, this sample set would have been built for any threshold T′ in the range (U, V]. An alternate embodiment could use this range to determine an effective sampling threshold as a function F(U, V, T) in place of whatever the previous threshold T was. Such an embodiment would generally require the tracking of the minimum threshold value for any rejected location but this can be done with constant space. In the embodiment described primarily above, F(U, V, T)=T. The system could, however, use F(U, V, T)=V, thereby maximizing the possible range sampled. One could have used F(U, V, T)=U, thereby minimizing the possible range to those locations observed to the point where the sample set becomes too full. Alternatively, the system could use F(U, V, T), or some combination of these values such as a (weighted) average. 
     With any such choice of F, the effective sampling threshold T new  could be derived for the sample set S, and its value could be used in rescaling the recorded values in the data structure by T new /T old . 
     Consider a sample set that becomes too large through sampling a new location, L′, using a threshold T. Let S′=S U {L′}, let    max =max{ (L) mod M|L in S′}, let S max ={L|L in S′ and  (L) mod M=   max }, let S next =S′−S max , and let    next =max{ (L) mod M|L in S next }. Reducing S′ so that the sample set size is less than or equal to the desired size S bound  requires reducing the threshold subsequently used. This threshold T′ may be any value in the range (   next ,    max ] to remove S max  from S′, or a value less than or equal to    next  to reduce the sample set size further. 
     In the embodiment mainly described above, T′=   max . As with rescaling, this threshold could be a function, G(S′), of the locations in S′. Note that for any choice of the threshold, T′&gt;.   next , a new location L′ may be such that  (L′) mod M&gt;max{ (L) mod M|L in S}. In such cases, the new location will be the location removed to prevent the sample set S from exceeding its maximum size; furthermore, in reducing the threshold to exclude it, the data structure will be further rescaled. 
     To avoid this needless sampling, removal, and rescaling, in an alternative embodiment, the threshold test may be modified to be whether  (L) mod M≦T. In this embodiment, the new threshold, T′, could be in the range [   next ,    max ); taking T′=   next  avoids the new cases that are immediately sampled and removed. 
     As noted, when the sample set is reduced in size, some subset of sampled locations is removed by reducing the threshold so that if considered again, their hash threshold values would fail the threshold test, that is, would not meet the sampling criterion. This set may be more than one location if, for example, several locations when hashed and reduced (mod M) have the same value. It may also be the case, however, that an embodiment deliberately reduces the sample set by more than one location. In such a case, one would choose a new threshold such that the desired number of locations cease to be sampled and are removed. 
     In a further embodiment, instead of rescaling the data structure counts by the ratio of the new and old thresholds, the system could rescale the counts by the change in size. So, for example, if P elements are removed from the set S of already sampled locations and that sample set size is Q, then one could rescale the counts by (Q−P)/Q. As for the needless sampling and removal described above, there is no need for rescaling in this embodiment in such cases. 
     When the threshold is reduced, the count associated with each histogram bucket (for example, if a Mattson-type technique is implemented) is scaled, for example, by a scaling module  625 , by the ratio of the new and old sampling rates, R new /R old . Note that this is equivalent to scaling the counts by the ratio of the new and old thresholds. For improved accuracy, histogram counts may preferentially be represented as floating- or fixed-point numbers, rather than as integers. 
     The practical result of this rescaling procedure is to “undo” the effects of sample points eliminated by the reduction in the hash threshold, especially in cases where the eliminated sample values contributed equally to all existing buckets. Applied immediately on a change in threshold, the rescaling ensures that subsequent sampled events (and their increments to buckets) have the appropriate relative weight. Note that the effect of rescaling on the last bucket (the one measuring cold misses and which is sometimes referred to as measuring “infinite” distance) should be such that once it reaches the desired maximum number of sample elements, it should have this value and remain constant. An alternative to rescaling, just for this last bucket, is to not rescale it but instead to stop counting cold misses once this number is reached. 
     In some implementations, rescaling the histogram bucket counts may be expensive, since it requires time linear in the number of buckets. Many optimizations are possible. As one example, histogram bucket rescaling can be temporarily deferred, allowing |S| to exceed S bound  transiently, by a specified “slack” parameter. Slack may be expressed as either an absolute number of samples, as a percentage of S bound , or by any other chosen metric. 
     For example, consider a fixed-size set containing S bound =1000 samples. With 5% relative slack (or, equivalently, absolute slack of 50 samples), when the active sample set size |S| grows to 1050 samples, 50 samples may be removed from the set in one batch. The sampling rate may then be updated based on the last removed sample, with the count associated with each histogram bucket being scaled (once) by the ratio of the new and old rates. In this case, the optimization reduces the amount of time consumed by rescaling by a factor of approximately 50, or about 98%, at a cost of only 5% additional space. 
     Larger slack values should be expected to yield somewhat less accurate results, because rescaling operations will then not be performed immediately. Nevertheless, empirical MRC construction experiments have indicated that small amounts of slack generally produce results that would be acceptable in typical situations. Different implementations may, however, choose different amounts of slack to achieve various time, space, and accuracy tradeoffs. 
     Additional optimizations may be employed to further reduce the amount of work that must be performed when adjusting algorithm state to reflect sampling-rate reductions accurately. One general approach is to track exactly which state is affected more precisely, and avoid unnecessary updates. Examples for MRC construction involve only rescaling affected histogram buckets, such as by using a bitvector, Bloom filter, or other compact representations to track which buckets have been modified. Yet another option is to track the maximum hash threshold associated with each bucket increment since the most recent rescaling. 
     It would also be possible to rescale histogram buckets incrementally. In this optional embodiment, on each histogram bucket update, the (floating- or fixed-point) count associated with the bucket is scaled by the ratio of the new sampling threshold to the sampling threshold used for its last update. This can be accomplished efficiently by storing T bucket  with each bucket, tracking the sampling threshold in effect when the bucket was last updated. The sampling threshold can then be represented compactly and there is no need to make a pass over the histogram buckets when the sampling rate changes; instead, when incrementing the count in a bucket, if T bucket ≠T current , then the system may first rescale the existing count by T current /T bucket  before incrementing (and setting T bucket =T current ). Before constructing the MRC from the histogram values, to ensure that all buckets are scaled consistently, a single linear-time pass should be made over all buckets, updating anywhere T bucket ≠T current . 
     Yet another option would be to divide the set of sampled elements into subsets where each subset comprises those elements whose hash threshold falls in a band or range of the sampling ratio. Separate histograms tracking counts may then be kept for each band. For example, one could have bands organized by decile ranges (0-10%, 10-20%, . . . , 90-100%), or as a function of widths (for example, 0-0.1%, 0.1-1%, 1-10%, 10-100%). As the threshold is reduced, an entire band may then be dropped as the threshold drops below the range for that band. 
     As yet another option, rescaling may be applied just to the counts in the band where the reduced threshold falls. Here, for rescaling within a band, one would scale the rescaling factor according to how much of the band&#39;s range is eliminated. The advantage of banding is higher accuracy in the resulting counts, since rescaling applies only to the portion of the count that has eliminated elements, but this advantage comes at the increased cost of space and time that is linear in the number of bands. 
     In yet another optional embodiment, the space associated with any “dropped” bands for each histogram bucket is dynamically reused by splitting remaining bands into finer-grained ranges. This will tend to improve resolution and better overall accuracy.