Patent Publication Number: US-2007103131-A1

Title: DC-DC converter and organic light emitting display using the same

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
      This application claims the benefit of Korean Patent Application No. 2005-0106169, filed on Nov. 7, 2005, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety.  
     BACKGROUND OF THE INVENTION  
      1. Field of the Invention  
      The present invention relates to a DC-DC converter and an organic light-emitting display using the same, and more specifically to a DC-DC converter configured to output a voltage according to a comparison result obtained by comparing an input voltage with a reference voltage; and an organic light-emitting display using the same.  
      2. Description of the Related Technology  
       FIG. 1  is a circuit diagram showing a previous comparator. Referring to  FIG. 1 , the comparator includes an input unit and first, second and third inverters.  
      The input unit has a first switch SW 1  for switching transmission of the input voltage Vin; and a second switch SW 2  for switching transmission of a reference voltage Vref.  
      The first inverter has a first transistor M 1  as the P MOS transistor and a second transistor M 2  as the N MOS transistor. And the first power supply Vdd is connected to a source of the first transistor M 1  to supply a high level of voltage, and the second transistor M 2  has a source connected to a ground GND to supply a low level of voltage. And, the first capacitor C 1  and the third switch SW 3  are connected to the first node N 1 .  
      The second inverter has a third transistor M 3  as the P MOS transistor and a fourth transistor M 4  as the N MOS transistor. And the first power supply Vdd is connected to a source of the third transistor M 1  to supply a high level of voltage, and a ground is connected to a source of the fourth transistor M 4  to supply a low level of voltage. And, the second inverter is connected with the first inverter through the second capacitor C 2 , and terminals of the second capacitor C 2 , the fourth switch M 4 , and the third and fourth transistors M 3 ,M 4  are connected to the second node N 2 .  
      The third inverter has a fifth transistor M 5  as the P MOS transistor and a sixth transistor M 6  as the N MOS transistor. And the first power supply Vdd is connected to a source of the fifth transistor M 5  to supply a high level of voltage, and a ground is connected to a source of the sixth transistor M 6  to supply a low level of voltage.  
       FIG. 2  is a timing diagram showing input/output waveforms of the circuit shown in  FIG. 1 . Referring to  FIG. 2 , an input voltage Vin input at an input terminal of a comparator unit changes in a voltage level and is compared with the reference voltage Vref. The first to fifth switches SW 1  to SW 5  conduct a switching operation according to the first control signal P 1  and the second control signal P 2 , where the first, third and fourth switches SW 1 , SW 3 , SW 4  are operated according to the first control signal P 1  and the second and fifth switches SW 2 , SW 5  are operated by the second control signal P 2 .  
      Firstly, if the first, third and fourth switches SW 1 , SW 3 , SW 4  are turned on by the first control signal P 1  and the second and fifth switches SW 2 , SW 5  are turned off by the second control signal P 2 , then the input voltage Vin is transmitted to the first capacitor C 1 , and the voltage corresponding to a threshold voltage difference between the first inverter and the second inverter is stored in the second capacitor C 2 .  
      And, if the first, third and fourth switches SW 1 , SW 3 , SW 4  are subsequently turned off by the first control signal P 1  and the second and fifth switches SW 2 , SW 5  are turned on by the second control signal P 2 , then the reference voltage Vref is transmitted to the first capacitor C 1  to compare the input voltage Vin with the reference voltage Vref.  
      At this time, if the input voltage Vin is higher than the reference voltage Vref, then an output port of the third inverter outputs a low level of voltage, and if the input voltage Vin is lower than the reference voltage Vref, then an output port of the third inverter outputs a high level of voltage.  
      In the comparator described above, the output voltage is determined according to a difference between the reference voltage Vref and the input voltage Vin in the first capacitor C 1 , and therefore the comparator has a problem in that it takes more time to change the output voltage into the high level or the low level if there is not a high difference between the reference voltage Vref and the input voltage Vin than if there is a high difference between the reference voltage Vref and the input voltage Vin.  
      In order to address the problem, the comparator as described above can have a large capacitance, and therefore it has a problem because its power consumption is increased due to a large consumption of the current.  
     SUMMARY OF CERTAIN INVENTIVE ASPECTS  
      Accordingly, certain instant embodiments solve such drawbacks of the device discussed above, and therefore can provide a DC-DC converter capable of improving a response time characteristic of the signal and also reducing power consumption.  
      One embodiment is a comparator configured to receive an input voltage and a reference voltage and to determine an output corresponding to a difference between the input voltage and the reference voltage. The comparator includes an input unit configured to transmit the input voltage to a first stage and to transmit the reference voltage to a second stage, and an amplification unit including a first capacitor configured to store the input voltage and the reference voltage, a second capacitor configured to receive a feedback voltage and to transmit the feedback voltage to the first capacitor, and at least one inverter configured to output signals corresponding to the voltage stored in the first capacitor and the second capacitor. The comparator also includes a feedback unit configured to receive a voltage output in the amplification unit when the input voltage is transmitted, a voltage output unit in the amplification unit, the voltage output unit configured to generate the feedback voltage when the reference voltage is transmitted, where the feedback unit is configured to modify a difference voltage corresponding to the difference between the input voltage and the reference voltage according to the feedback voltage, and an output unit configured to receive the output voltage of the amplification unit and to output a voltage based on the output voltage of the amplification unit.  
      Another embodiment is a DC-DC converter including a charge pump with a voltage output terminal configured to vary and output a voltage according to a voltage at a voltage input terminal, and a signal input terminal. The DC-DC converter also includes a comparator configured to receive a comparator input voltage and a reference voltage and to determine an output voltage corresponding to a difference between the comparator input voltage and the reference voltage. The comparator includes an input unit configured to transmit the input voltage to a first stage and to transmit the reference voltage to a second stage, and an amplification unit. The amplification unit includes a first capacitor configured to store the input voltage and the reference voltage, a second capacitor configured to receive a feedback voltage and to transmit the feedback voltage to the first capacitor, and at least one inverter configured to output signals corresponding to the voltage stored in the first capacitor and the second capacitor. The comparator also has a feedback unit configured to receive a voltage output in the amplification unit when the input voltage is transmitted, a voltage output unit in the amplification unit, the voltage output unit configured to generate the feedback voltage when the reference voltage is transmitted, where the feedback unit is configured to modify a difference voltage corresponding to the difference between the input voltage and the reference voltage according to the feedback voltage, and an output unit configured to receive the output voltage of the amplification unit and to output a voltage based on the output voltage of the amplification unit.  
      Another embodiment is a organic light-emitting display including a pixel unit configured to display an image corresponding to data signals and scan signals, a data driver configured to transmit the data signals to the pixel unit, a scan driver configured to transmit the scan signals to the pixel unit, and a DC-DC converter to transmit a power supply to the pixel unit, the data driver and the scan driver. The DC-DC converter includes a comparator including an input unit configured to transmit the input voltage to a first stage and to transmit the reference voltage to a second stage, an amplification unit including a first capacitor configured to store the input voltage and the reference voltage, a second capacitor configured to receive a feedback voltage and to transmit the feedback voltage to the first capacitor, and at least one inverter configured to output signals corresponding to the voltage stored in the first capacitor and the second capacitor. The comparator also includes a feedback unit configured to receive a voltage output in the amplification unit when the input voltage is transmitted, a voltage output unit in the amplification unit, the voltage output unit configured to generate the feedback voltage when the reference voltage is transmitted, where the feedback unit is configured to modify a difference voltage corresponding to the difference between the input voltage and the reference voltage according to the feedback voltage, and an output unit configured to receive the output voltage of the amplification unit and to output a voltage based on the output voltage of the amplification unit. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
      These and/or other aspects and advantages will become apparent and more readily appreciated from the following description of certain embodiments, taken in conjunction with the accompanying drawings of which:  
       FIG. 1  is a circuit diagram showing a previous comparator;  
       FIG. 2  is a timing diagram showing input/output waveforms of the circuit shown in  FIG. 1 ;  
       FIG. 3  is a schematic view showing a configuration of an organic light-emitting display;  
       FIG. 4  is a schematic view showing a DC-DC converter used in the organic light-emitting display shown in  FIG. 3 ;  
       FIG. 5  is a circuit diagram showing an embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 ;  
       FIG. 6  is a characteristic curve showing an output property of the comparator shown in  FIG. 5 ;  
       FIG. 7  is a circuit diagram showing another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 ;  
       FIG. 8  is a circuit diagram showing yet another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 ;  
       FIG. 9  is a circuit diagram showing still another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 ;  
       FIG. 10  is a circuit diagram showing another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 ;  
       FIG. 11  is a circuit diagram showing still another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 ; and  
       FIG. 12  is a circuit diagram showing yet another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 . 
    
    
     DETAILED DESCRIPTION OF CERTAIN INVENTIVE EMBODIMENTS  
       FIG. 3  is a schematic view showing a configuration of an organic light-emitting display according to some embodiments. Referring to  FIG. 3 , the organic light-emitting display has a pixel unit  100 , a data driver  200 , a scan driver  300  and a DC-DC converter  400 .  
      In the pixel unit  100 , a plurality of data lines D 1  to Dm and a plurality of scan lines S 1  to Sn cross each other, and pixels  110  are formed in regions in which the data lines D 1  to Dm and the scan lines S 1  to Sn cross. The pixels  110  present an image by displaying a gray level corresponding to data signals transmitted through the data lines D 1  to Dm and scan signals transmitted through the scan lines S 1  to Sn.  
      The data driver  200  is connected with a plurality of the data lines D 1  to Dm to transmit data signals to a plurality of the data lines in parallel, and to simultaneously transmit data signals to a pixel row arranged in a latitudinal direction of the pixel unit  100 .  
      The scan driver  300  is connected with a plurality of the scan lines S 1  to Sn to transmit scan signals to a specific pixel  110  by transmitting the scan signals to the pixel  110  to which the scan signals are to be transmitted.  
      The DC-DC converter  400  converts a D.C. power supply level, transmitted from the outside, to a suitable D.C. power supply level for each electrical load and transmits the D.C. power supply level to each of the electrical loads, and the D.C. power supply level generated in the DC-DC converter  400  is transmitted to the pixel unit  100 , the data driver  200  and the scan driver  300 , etc.  
       FIG. 4  is a schematic view showing an embodiment of a DC-DC converter used in the organic light-emitting display shown in  FIG. 3 . Referring to  FIG. 4 , the DC-DC converter includes a clock switch  430 , a charge pump  410 , a clock divider  440  and a comparator  420 .  
      The clock switch  430  receives clocks from a clock generation unit CLK, and adjusts the clocks generated in the clock generation unit CLK using the first clock CLK 1  and the second clock CLK 2  transmitted through the inverter  450 .  
      The charge pump  410  synchronizes with the first clock CLK 1  and the second clock CLK 2 , and charges a capacitor to generate a higher voltage or lower voltage than the input voltage, and output the generated voltage to each of the driving units.  
      The clock divider  440  transmits the clocks CLK, CLKB from the clock generation unit CLK to the comparator unit  420  to operate the comparator unit  420 .  
      The comparator  420  is synchronized by the clocks CLK, CLKB, and compares a reference voltage ref with an input voltage Vin by receiving the input voltage Vin from an output port of the charge pump  410  and receiving the reference voltage ref through the reference voltage source, and allows the clock switch  430  to be operated by the first clock CLK 1  and the second clock CLK 2  by transmitting the compared signals to the clock switch  430  through the inverter  450 . This allows a charge pump to control an output voltage corresponding to the first clock (CLK 1 ) and the second clock CLK 2 .  
       FIG. 5  is a circuit diagram showing an embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 . Referring to  FIG. 5 , the comparator  420  has an input unit and first, second, and third inverters.  
      Referring to  FIG. 5 , the input unit has an input voltage connected with the capacitor C 10  through the first switch SW 11 , and a reference voltage Vref connected with the capacitor C 10  through the second switch SW 12 . The capacitor C 10  is connected with the gates of the first and second transistors of the first inverter.  
      The capacitor C 11  has a first electrode connected with the gates of the first and second transistors M 11  and M 12  of the first inverter, and a second electrode connected between a fourth switch SW 14  and a fifth switch SW 15 . Also, the first, second, and third inverters are connected in the same manner as in  FIG. 1 . and therefore signals output through the output port of the second inverter are transmitted by means of switching operations of the fourth switch SW 14  and the fifth switch SW 15 .  
      The comparator can be operated according the signals shown in  FIG. 2 , where the first switch SW 11 , the third switch SW 13 , the fourth switch SW 14  conduct the switching operation according to the first control signal P 1 , the second switch SW 12  and the fifth switch SW 15  conduct the switching operation according to the second control signal P 2  in the comparator.  
      Operation of the comparator will be described with reference to  FIGS. 2 and 5 . Firstly, the first switch SW 11 , the third switch SW 13  and the fourth switch SW 14  are turned on by the first control signal P 1 , and the second switch SW 12  and the fifth switch SW 15  are turned off by the second control signal P 2 . Accordingly, an input voltage Vin is transmitted to a capacitor C 10 , and the voltage corresponding to a threshold voltage difference between the first inverter and the second inverter is stored in the second capacitor C 12 . The third inverter is at a floating state since the fifth switch SW 15  remains turned off. At this time, the output voltage of the second inverter is stored in the first capacitor C 11  by the output port of the second inverter, and the voltage stored in the first capacitor C 11  is transmitted to the gates of the first and second transistors M 11  and M 12  of the first inverter, and therefore, the output voltage of the first inverter is controlled by the voltage stored in the first capacitor C 11 .  
      If the second switch SW 12  and the fifth switch SW 15  are turned on by the second control signal P 2 , then the voltage transmitted to the capacitor C 10  is changed from the input voltage Vin to the reference voltage Vref, and the third switch SW 13  is open, and therefore the voltages transmitted to the first inverter is changed. Accordingly, the voltage transmitted to the second inverter is changed.  
      Furthermore, if the output signals of the second inverter are transmitted to the first capacitor C 11  by the second control signal P 2 , then the fifth switch SW 15  is turned on during a period in which the second switch SW 12  is turned on, and therefore a feedback operation is conducted during the time when the reference signal Vref is transmitted. The fluctuation range of the output voltage of the third inverter is further increased by such a feedback operation, resulting in improvement of the response characteristics of the signal.  
       FIG. 6  is a characteristic curve showing an output property of the comparator shown in  FIG. 5 . Referring to  FIG. 6 , Vout represents a characteristic curve of the inverter, and Inverse represents a curve in which the characteristic curve of the inverter is at a reversed state.  
      The characteristic curve shows that the output changes significantly around an input of 2.5V, and is substantially stable in two points having a large difference between the input voltage and the reference voltage, allowing the output of the comparator to output high or low signals. Because of the feedback procedure discussed above, the response characteristics of the signal are improved.  
       FIG. 7  is a circuit diagram showing another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 . Unlike the comparator shown in  FIG. 5 , since the capacitor C 20  and the first capacitor C 21  are connected in series, the capacitor C 20  and the first capacitor C 21  transmit the voltage to the first inverter, and the feedback voltage is also distributed onto the capacitor C 20  and the first capacitor C 21 , before being transmitted to the first inverter.  
       FIG. 8  is a circuit diagram showing another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 . Capacitor C 30  is further included so as to stabilize an operation of the comparator. Capacitor C 31  is connected to the input of the first inverter and a third capacitor C 33  connected to capacitor C 31  and to ground. The third capacitor C 33  stores and holds the voltage output of the second inverter when the comparator is operated by the first control signal P 1 . Accordingly, the output of the comparator is substantially prevented from moving between the stable points when the comparator is operated by the second control signal P 2 , and therefore waveforms of the signals output in the comparator are improved.  
       FIG. 9  is a circuit diagram showing yet another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 . A capacitor C 43  is included to stabilize the time point when the signals output from the comparator. A second capacitor C 42  is connected between the first inverter and the second inverter and a third capacitor C 43  is connected between the first inverter and ground, and therefore waveforms of the output signals of the comparator are stabilized.  
       FIG. 10  is a circuit diagram showing still another embodiment of the comparator used in the DC-DC converter shown in  FIG. 4 . The comparator shown in  FIG. 10  has a third capacitor C 53  at the input port of the first inverter, and further has a fourth capacitor C 54  between the first inverter and the second inverter, and therefore the output signals of the comparator are more stabile, according to principles discussed above.  
       FIG. 11  is a circuit diagram showing another embodiment of a comparator which may be used in the DC-DC converter shown in  FIG. 4 . The comparator shown in  FIG. 11  has a capacitor C 63  connected to the first capacitor C 61  and to ground, and therefore is operated in a similar manner as capacitor C 33 , shown in  FIG. 8 .  
       FIG. 12  is a circuit diagram showing still another embodiment of a comparator, which can be used in the DC-DC converter shown in  FIG. 4 . The comparator shown in  FIG. 12  has a fourth capacitor C 74  connected between the first inverter output and ground. Accordingly, the fourth capacitor C 74  is operated in a similar manner as capacitor C 43 , shown in  FIG. 9 .  
      The DC-DC converter and the organic light-emitting display using the same may be useful to increase a response rate by varying the voltage input to the inverter to increase a changing level of the output voltage. Also, the DC-DC converter of the present invention may reduce power consumption by shutting off the inverter circuit to prevent flow of the current if the input/output unit is not operated.  
      Although certain inventive embodiments have been shown and described in detail, the embodiments mentioned herein are examples for the purpose of illustrations only, and are not intended to limit the scope of the invention to these embodiments. Also, it would be appreciated by those skilled in the art that changes might be made in these embodiments without departing from the principles and spirit of the invention.