Patent Publication Number: US-8532313-B2

Title: Audio processing system for an audio output device

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure relates to audio processing, and particularly, to an audio processing system to control an audio signal input to be within an acceptable range to an audio output device. 
     2. Description of Related Art 
     Transducers, such as speakers or earphones, typically have a maximum acceptable input limit. If the input of the transducers exceeds the maximum acceptable input limit, sound reproduction by transducer may be distorted and even fail. 
     Therefore, it is desirable to provide an audio processing system, which can overcome the above-mentioned limitations. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a circuit diagram of an exemplary embodiment of an audio processing system. 
         FIG. 2  is a waveform view showing one embodiment of the audio processing of the audio processing system of  FIG. 1   
         FIG. 3  is a circuit diagram of another exemplary embodiment of an audio processing system 
     
    
    
     DETAILED DESCRIPTION 
     Referring to  FIG. 1 , an audio processing system  100 , according to an exemplary embodiment, includes a direct current (DC) offset unit  110 , a sampling unit  120 , a triggering unit  130 , and a gain control unit  140 . 
     The DC offset unit  110  is connected to a signal input device  20 . The signal input device  20  may comprise a system-on-chip (SoC) and other electronic elements that can produce an audio signal. The DC offset unit  110  receives the audio signal and is configured for offsetting the audio signal, to yield an offset audio signal. 
     The gain control unit  140  is connected to the DC offset unit  110  and an audio output device  30 . The gain control unit  140  is configured for amplifying the offset audio signal, to yield an amplified audio signal, and outputting the amplified audio signal to the audio output device  30 . The audio output device  30  can be a speaker or an earphone that reproduces the amplified audio signal into sound, and typically has an acceptable input range. If the amplified audio signal exceeds the acceptable range, the restoration of the sound is distorted or even fails. 
     The sampling unit  120  is also connected to the signal input device  20  and configured for sampling the audio signal, to yield a sampled audio signal. 
     The triggering unit  130  is connected to the sampling unit  120  and the gain control unit  140 . The triggering unit  140  is configured for triggering a gain reduction signal if the amplitude (i.e., the voltage) of the sampled audio signal exceeds a predetermined value over a predetermined time period. The predetermined value is set so that when the voltage of sampled audio signal exceeds the predetermined value, the amplitude of the amplified audio signal by the audio processing system  10  exceeds the acceptable range of the audio output device  30 . Therefore, the gain control unit  120  needs to reduce the gain thereof, according to the gain reduction signal, thus, limit/controlling the amplitude of the amplified audio signal to be within the acceptable range. 
     The DC offset unit  110  includes a first amplifier U 1 , a first resistor R 1 , a second resistor R 2 , and a third resistor R 3 . The negative input of the first amplifier U 1  is connected to the signal input device  20  through the first resistor R 1 , and connected to the output of the first amplifier U 1  through the second resistor R 2 , and connected to a DC voltage input U. 
     The sampling unit  120  includes a second amplifier U 2 , a first diode D 1 , a second diode D 2 , a fourth resistor R 4 , a fifth resistor R 5 . The negative input of the second amplifier U 2  is connected to the signal input device  20  through the fourth resistor R 4  and the first diode D 1 , wherein the cathode of the first diode D 1  is directly connected to the signal input device  20 . The negative input of the second amplifier U 2  is also connected to the output of the second amplifier U 2  through the fifth resistor R 5 . The positive input of the second amplifier U 2  is grounded. The output of the second amplifier U 2  is connected to the anode of the second diode D 2 . 
     The triggering unit  130  includes a first capacitor C 1 , four sixth resistor R 6   i  (i=1, 2, 3, 4), four seventh resistors R 7   i , four comparators Ai, four eighth resistors R 8 , and four second capacitors C 2   i . The first capacitor C 1  is connected to the cathode of the second diode D 2  and the ground. The negative input of each comparator Ai is connected to the cathode of the second diode D 2  through a corresponding sixth resistor R 6   i , and connected to the ground through a corresponding seventh resistor R 7   i . The positive input of each comparator Ai is connected to the DC voltage input U. The output of each comparator Ai is connected to the DC voltage input U through a corresponding eighth resistor R 8 , and connected to the ground through a corresponding second capacitor C 2   i.    
     The gain control unit  140  is typically an inverse feedback amplifying circuit, and includes a third amplifier U 3 , a basic feedback resistor Rf, four controllable switches Si, and four additional feedback resistors Rfi. The negative input of the third amplifier U 3  is connected to the output of the first amplifier U 1  through a ninth resistor R 9 , and connected to the output of the third amplifier U 3  through the basic feedback resistor Rf. The positive input of the third amplifier U 3  is grounded. Each controllable switch includes two connection terminals T, and a control terminal VC. The two connection terminals T of each controllable switch electrically connect when a corresponding control terminal VC receives a logic high level (e.g., logical “1”), and disconnects when the corresponding control terminal VC receives a logic low level (e.g., logical “0”). One connection terminal T of each controllable switch Si is connected to the negative input of the third amplifier U 3 , and the other connection terminal T is connected to the output of the third amplifier U 3  through a corresponding additional feedback resistor Rfi. The control terminal VC of each controllable switch Si is connected to the output of a corresponding comparator Ai. 
     Also referring to  FIG. 2 , in operation, the voltage of the audio signal is typically in a range of, for example, −2.5V to 2.5V. The acceptable input range is typically in a range of, for example, 0V to 5V. The gain control unit  140  is typically an inverse amplifying circuit. Therefore, the DC offset unit  110  is employed to facilitate signal processing of the gain control unit  140 . It should be understood that if the range of voltage of the audio signal, the acceptable range, and the gain control unit  140  are different from this embodiment, the DC offset unit  110  can be omitted or replaced with other suitable pre-process circuits. 
     In this embodiment, considering the range of the audio signal, the acceptable range, and the gain of the gain control unit  140 , the resistances of the first resistor R 1 , the second resistor R 2 , and the third resistor R 3  set as about 10 KΩ. The DC voltage input U is set as about 3.3. As such, the DC offset of the offset audio signal (the mean of the offset audio signal) is about −3.3 V. 
     The first diode D 1  samples a portion of the audio signal with negative voltage. The portion of the audio signal with negative voltage is amplified by the second amplifier U 2 . The second diode D 2  is for outputting the sampled audio signal (i.e., the inversely amplified audio signal with negative voltage) and further protecting the sampling unit  120  from current reflux. In this embodiment, the resistances of the fourth resistor R 4  and the fifth resistor R 5  are 3 KΩ and 12 KΩ respectively. 
     The first capacitor C is a bypass filter used for filtering. Each sixth resistor R 6   i  and a corresponding seventh resistor R 7   i  divide the voltage of the sampled audio signal. However, the divided voltages of the seventh resistors R 7   i  are different from each other because that the capacitances of the sixth resistors R 6   i  are different and the capacitances of the seventh resistors R 7   i  are the same. In one embodiment, the resistances of the sixth resistors R 61 , R 62 , R 63 , R 64  may be about 5.9 KΩ, 8.45 KΩ, 11.8 KΩ, and 15.8 KΩ, respectively. The resistances of the seventh resistors R 71 , R 72 , R 73 , R 74  may all be about 10 KΩ. 
     Since the divided voltage of the seventh resistor R 71  is the highest among those of the seventh resistors R 7   i , therefore, once the voltage of the audio signal exceeds a first predetermined value. The divided voltage on the seventh resistor R 71  will be the first to exceed 3.3V. The corresponding comparator Ai output a logic high level which charges the corresponding second capacitor C 2   i . If voltage of the audio signal remains above the first predetermined value over a first predetermined time period (e.g., t 2 -t 1 , see  FIG. 2 ), the voltage on the second capacitor C 21  exceeds the logic high level and that triggers the controllable switch S 1 . As a result, the two connection terminals T of the controllable switch S 1  electrically connects. The additional feedback resistor Rf 1  is parallely connected to the basic feedback resistor Rf. As such, the total feedback resistance of the gain control unit  140   
             (         Rf   ×   Rf   ⁢           ⁢   1       Rf   +     Rf   ⁢           ⁢   1         ,           
the resistance between the negative input and the output of the third amplifier U 3 ) is weakened (original is Rf). Therefore, the gain of the gain control unit  140  reduces due to the reduction of the total feedback resistance.
 
     In more detail, if the voltage of the audio signal exceeds a second predetermined value that is higher than the first predetermined value, the voltage on the second capacitor C 22  exceeds the logic high level that triggers the controllable switch S 2 . As a result, the additional resistor Rf 2  is also parallely connected with the basic feedback resistor Rf and the additional feedback resistor Rf 1  too. The gain of the gain control unit  140  is further reduced. Similarly, if the voltage of the audio signal exceeds a third predetermined value (higher than the second predetermined value) and a fourth predetermined value (higher than the third predetermined value). The gain of the gain control unit  140  is further reduced. 
     The first predetermined value is set so that if the voltage of the audio signal exceeds the first predetermined value and the gain of the gain control unit  140  is not reduced, the voltage of the amplified audio signal would exceed the acceptable range. However, in this embodiment the gain of the gain control unit  140  is reduced when the voltage of the audio signal exceeds the first predetermined value. Therefore, the voltage of the amplified audio signal is controlled to be within the acceptable input range. 
     In one embodiment, the resistances of eighth resistors R 8  may be about 4.7 KΩ, the capacitances of the second capacitors C 2   i  may be about 0.1 uF, the resistances of the basic feedback resistor Rf may be about 10 KΩ, and the resistances of the additional feedback resistors Rf 1 , Rf 2 , Rf 3 , Rf 4  may be about 92 KΩ, 72 KΩ, 56 KΩ, 42 KΩ, respectively. When the additional feedback resistor Rf 1  is parallely connected with the basic feedback resistor Rf, the gain of the gain control unit  140  is weakened by about 10%. When the additional feedback resistor Rf 2  is parallely connected with the basic feedback resistor Rf and the additional feedback resistor Rf 1 , the gain of the gain control unit  140  is weakened by about 20%. When the additional feedback resistor Rf 3  is parallely connected with the basic feedback resistor Rf and the additional feedback resistors Rf 1 , Rf 2 , the gain of the gain control unit  140  is weakened by about 30%. Additionally, when the additional feedback resistor Rf 4  is parallely connected with the basic feedback resistor Rf and the additional feedback resistors Rf 1 , Rf 2 , Rf 3 , the gain of the gain control unit  140  is weakened by about 40%. 
     In this embodiment, the first predetermined value is slightly higher than about 2V, and the fourth predetermined value is lower than about 2.5V. Therefore, referring to  FIG. 2 , from time t 1 , the voltage of the audio signal exceeds the fourth predetermined value, and all comparators Ai output the high logic level that charge the corresponding second capacitors Ci. At time t 2 , the voltage on the second capacitor C 2  becomes higher than the high logic level that triggers the controllable switches Si, and the additional feedback resistor Rf 1  is parallely connected with the basic feedback resistor Rf, the gain of the gain control unit  140  is weakened by about 10%. Similarly, the gain of the gain control unit  140  is about 20%, 30%, and 40% off starting from t 3 , t 4 , and t 5  respectively. 
     It should be understood that disclosed circuit of the sampling unit  120  is corresponding to the disclosed circuit of the triggering unit  130 . However, if other layouts of the triggering unit  130  are employed, the layout of the sampling unit  120  needs to be changed correspondingly. 
     It also should be understood that, not limited to this embodiment, more or less sets of sixth resistor R 6   i , the seventh resistor R 7   i , the comparator A 1 , the eighth resistor R 8 , the second capacitor C 2   i , the controllable switch Si and the additional resistor Rfi can be employed to obtain more levels of reduction of the gain of the gain control unit  140 . 
     It also should be understood that, the above disclosed circuit of the audio processing system  100  is for processing audio signal of a single channel. However, the audio processing system  100  also can process audio signal of multiply channels. In one example and with reference to  FIG. 3 , if the audio signal has two channels: for example, a left channel (LC) and a right channel (RC), one more DC offset unit  110   r , first diode Dr, and gain control unit  140   r  can be employed to cooperating with the sampling unit  120  and the triggering unit  130  to process the RC of the audio signal. 
     While various exemplary and preferred embodiments have been described, it is to be understood that the disclosure is not limited thereto. To the contrary, various modifications and similar arrangements (as would be apparent to those skilled in the art) are intended to also be covered. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.