Patent Publication Number: US-6667523-B2

Title: Highly linear integrated resistive contact

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a Continuation-in-part (CIP) of U.S. application Ser. No. 09/339,274 filed Jun. 23, 1999 now U.S. Pat. No. 6,403,472. 
    
    
     FIELD OF THE INVENTION 
     This invention relates to the insertion of resistors in integrated-circuit memory or logic, specifically as related to semiconductor contacts. 
     BACKGROUND OF THE INVENTION 
     Resistors of high value (typically 1 k ohm) are often desired at many locations in a circuit. A typical application is the use of resistors in memory or logic to guard against single event upset phenomena in spacecraft and other applications. Typically such resistors are patterned from a high sheet resistance film. It would be advantageous to integrate a high value resistor into a semiconductor contact, thus avoiding the area penalty for using such resistors repetitively over the surface of the circuit. 
     Chen et al. (U.S. Pat. No. 5,665,629) explains the formation of a highly-resistive layer over contact openings using a CVD or physical deposition process, controlling the resistivity of the layer through control of the proportion of silicon in the deposition process, and subsequently performing a pattern mask and etch of the deposited material to remove selectively the deposited resistive layer. 
     Manning (U.S. Pat. Nos. 5,159,430 and 5,232,865) explains the formation of polysilicon-filled vias in contact with a silicon device and subsequently implanting oxygen or nitrogen to increase the resistance of the polysilicon plugs. A high-temperature anneal at about 950 C is carried out to stabilize the resistor value. Since load resistors are required only in some of the contacts, Manning&#39;s process involves fabricating the resistor contacts in a separate step, (i.e., two mask steps are required in order to fabricate all the contacts). An annealing temperature of 950° C. is high for very shallow doped devices, which can cause dopant spreading and affect junction widths. It is therefore preferable to form a high-value resistor using a lower-temperature process. 
     These prior-art methods teach the formation of a resistor by either introducing silicon in an SiO 2  layer or introducing oxygen or nitrogen into an Si layer, (i.e., by forming off-stoichiometric structures). 
     OBJECTIVES, AND ADVANTAGES 
     It is an object of the invention herein to simplify the prior art by selectively converting silicon substrate material located in a contact to a material with a desired higher resistivity, thereby eliminating the need to incorporate an added resistive layer. 
     It is an object of the invention herein to integrate a resistor with a metal interconnect. 
     It is another object of the invention herein to produce a high resistance contact having highly linear I-V characteristics over a wide range of voltage. 
    
    
     DETAILED DESCRIPTION OF THE DRAWINGS 
     FIG. 1A shows an oblique view of a contact at the time of implant of the mobility spoiling material. 
     FIG. 1B shows a cross section of a contact after implant. 
     FIG. 2 shows the results of the selective etch (left contact) after the contact oxidation. 
     FIG. 3 shows the results after the deposition of a nonselective siliciding material. 
     FIG. 4 shows the results after the stripping of the residual non-silicided metal and the contact oxide. 
     FIG. 5 shows the final metalization, with an interconnect metal in place on a barrier metal such as TiW which protects the contact from chemical interaction with the interconnect. 
     FIG. 6 shows a highly linear resistance characteristic of the invention herein. 
     FIG. 7 shows a non-linear resistance characteristic of prior art resistors. 
    
    
     SUMMARY OF THE INVENTION 
     The invention relates to a method for producing an article comprising a silicon substrate having mobility spoiling ions implanted in a portion thereof, thereby forming a stable and linear resistive contact. 
     The invention herein uses a low energy implantation technique to implant a mobility spoiling species such as carbon or oxygen directly in open contacts after the contacts have been cut. Subsequent steps selectively remove mobility spoiling ions from portions of the substrate in only some of the contacts, thereby creating the desired low resistance contacts. The mobility spoiling ions implanted in the remaining contacts are left in place to aid in producing the desired high resistance contacts. Consequently, no added resistive layers need be formed else where on or in the substrate using extra processing steps. Further, precision implant techniques preclude the need for high-temperature annealing. 
     The high resistance contacts formed in accordance with the invention herein exhibit a very high degree of linearity over a wide range of voltage that was previously unknown in the art of making resistive contacts. 
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring to FIGS. 1A and 1B, a contact  10  is cut through a field dielectric  20  to expose a silicon substrate  15  below. A mobility spoiling ion species  5  is implanted through contact  10  into substrate  15 , for all contacts on substrate  15 . The presence of mobility spoiling ions in a material functions to inhibit a flow of electric current through a material. Consequently, the ion implanted material functions as a resistor. 
     Referring to FIG. 2, an oxide  25  is grown or deposited on all contacts  10 ,  11 . Selective etching then removes oxide  25  only from some contacts such as contact  11 , leaving a surface  12  of substrate  15  exposed. Surface  12  contains the implanted ion species  5 . Some contacts such as contact  10 , retain oxide  25  after the selective etching process. Exposed contacts  11  will become low resistive contacts, and contacts  10  having oxide  25 , will become high resistance contacts. The effect of this deposition and selective etching step is to differentiate high resistance contacts from low resistance contacts. 
     In one embodiment of the invention, oxide  25  is deposited in contacts  10  and  11  in lieu of using a grown oxide. This is because a grown oxide is efficient at removing implanted oxygen. 
     Consequently, a grown oxide would consume oxygen ions from contact  10  if the mobility spoiling species  5  are oxygen ions. 
     However, a grown oxide is not efficient at removing implanted carbon. Ergo, if the implanted mobility spoiling ions are carbon ions, then a grown oxide may be utilized as oxide  25 , which is an alternate embodiment of the invention. 
     Referring to FIG. 3, a nonselective siliciding metal  30  is then deposited and sintered to form a silicide  35  in selected low resistance contacts  11 . Siliciding metal  30  and remaining oxide  25  (in contacts  10 ) are both stripped away. Siliciding metal  30  may be platinum, titanium, tungsten, or molybdenum. Other refractory metals may also be used. 
     Note high resistance contact  10  may be formed in a hexode etcher with a 100 to 200 volt bias in the presence of an organic photoresist. 
     Referring to FIG. 4, contact  11  now contains a silicide  35 , causing contact  11  to be a low resistance contact as desired. 
     Contact  10 , having the mobility spoiling species has a higher resistance than contact  11 . 
     A structural difference between contacts  11  and contacts  10  is that high resistance contact  10  is made without silicide so a metal, e.g. a barrier metal and/or an interconnect metal, rests directly on, and in direct contact with, the ion implanted portion of substrate  15  (silicon). This leaves the ion implanted silicon either actually or effectively undisturbed instead of being silicided. 
     Referring to FIG. 5, a final metalization step or steps is/are performed, where an interconnect metal  40 , comprising aluminum, is placed over a barrier metal  45 . Barrier metal  45  protects contact surface  12  from interacting with interconnect metal  40 . Barrier metal  45  is usually masked by interconnect metal  40  during a subsequent etch process. Barrier metal  45  can be W, TiW, or titanium nitride. 
     The original mobility spoiling ions implanted in substrate  15 , through contact  11 , are either actually or effectively, consumed by silicide  35  forming low resistance contact  11 . 
     The original mobility spoiling ions implanted in substrate  15 , through contact  10 , either actually or effectively remain in substrate  15  (or may mix with barrier metal  45 , or alternatively may mix with both barrier metal  45  and interconnect metal  40 ) thereby forming high resistance contact  10 . 
     Testing of high resistance contact  10  revealed an unexpected result of a very linear resistive contact that remained linear from 0 to about 175 v (the maximum voltage available from the curve tracer) as shown in FIG.  6 . No indication of non-linear behavior was seen anywhere on I-V curve  46 . In other words, curve  46  is a straight line over the entire range of voltage that high resistance contact  10  was tested, which means that the resistance is remaining constant. Attempts to break high resistance contact  10  down with high voltage, failed to “short” out or otherwise alter the highly linear characteristic of high resistance contact  10 . This means that the value of resistance for contact  10  does not change versus voltage, a highly desired characteristic. 
     The I-V curve  47  for prior art resistive contacts is nonlinear, e.g. has a curved portion as shown in FIG.  7 . The resistance of prior art resistive contacts starts to decrease as increasing voltage is applied. Further, the resistance of prior art resistive contacts changes over time with a given voltage applied, resulting in an unstable structure. 
     Consequently, prior art resistive contacts have not found widespread usage. 
     Since the inventive resistor herein is also very stable, and linear, it can be used as an integrated circuit element with high confidence that the I-V characteristic will not change during use. This allows for a significant reduction in semiconductor surface area since reliable resistors are now able to be integrated into contacts, thereby freeing up valuable “real estate”. This in turn allows electronic devices to become smaller, or alternatively, new features may be added without increasing the size of the electronic device. 
     From the detailed description of the invention herein and the figures shown, some of the many advantages of the invention are clear: 
     1. The invention herein provides differentiation of low resistance contacts from high resistance contacts without requiring the formation of an added resistive layer, 
     2. precludes having to use valuable semiconductor surface area to form resistors, 
     3. reduces process integration issues, such as those associated with high-temperature annealing, as taught in Chen et al. (U.S. Pat. No. 5,665,629), and 
     4. provides a highly linear resistor over a wide range of voltage. In other words, the resistor formed in accordance with the invention herein has a resistance value that is constant versus voltage. 
     These and other advantages herein are applicable wherever the fundamental techniques are within the range of fabrication for all types of integrated circuits and/or semiconductor applications, including, but not limited to, digital, analog, RF and video. 
     Although the description and illustrative material here contain many specificities, these specificities should not be construed as limiting the scope of the invention but as merely providing illustrations and examples of some of the preferred embodiments of this invention. Thus the scope of the invention should be determined by the appended claims and their legal equivalents, rather than by the examples given above.