Patent Publication Number: US-2007109221-A1

Title: Method of driving discharge display panel for effective initialization

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
      This application claims the benefit of Korean Patent Application No. 10-2005-0108069, filed on Nov. 11, 2005, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.  
     BACKGROUND  
      1. Field of the Invention  
      The present invention relates to a method of driving a discharge display panel, and more particularly, to a method of driving a discharge display panel which divides a unit frame for time-division gradation display into a plurality of subfields, each subfield including an initializing period, an addressing period, and a sustaining period.  
      2. Description of Related Technology  
      A conventional plasma display apparatus, which is a discharge display apparatus, divides a unit frame into a plurality of subfields for a time-division gradation display, wherein each of the subfields includes an initializing period, an addressing period, and a sustaining period.  
      Each subfield has a unique gradation weight, and the sustaining period is set in proportion to this gradation weight. For example, when 8 subfields included in a unit frame are represented by 256 gradations, a sustaining period of a first subfield is set to a time 1T corresponding to 2 0 , a sustaining period of a second subfield is set to a time 2T corresponding to 2 1 , a sustaining period of a third subfield is set to a time 4T corresponding to 2 2 , a sustaining period of a fourth subfield is set to a time 8T corresponding to 2 3 , a sustaining period of a fifth subfield is set to a time 16T corresponding to 2 4 , a sustaining period of a sixth subfield is set to a time 32T corresponding to 2 5 , a sustaining period of a seventh subfield is set to a time 64T corresponding to 2 6 , and a sustaining period of an eighth subfield is set to a time 128T corresponding to 2 7 , respectively.  
      Operation during a subfield having a large gradation weight, such as the eighth subfield, most greatly affects image reproducibility. However, an initialization operation in the prior art is not properly performed in the subfield having the large gradation weight, for example, the eighth subfield, because the subfield immediately before the subfield having the large gradation weight, for example, the seventh field, has a long sustaining period and thus an excessive amount of wall charges are formed around electrode lines at a start point of the subfield having the large gradation weight.  
      When the initialization operation is not properly performed in the subfield having the large gradation weight, the operation in the following addressing period cannot be accurately performed, thereby adversely affecting the image reproducibility.  
     SUMMARY OF CERTAIN INVENTIVE ASPECTS  
      One aspect of the present invention is a method of driving a discharge display panel wherein reproducibility of a displayed image can be enhanced by an effective initialization operation.  
      One embodiment is a method of driving a discharge display panel The method includes dividing a unit frame into a plurality of subfields for time-division gradation display, and dividing each of the subfields into an initialization period, an addressing period, and a sustaining period, where a driving power for initialization in a subfield having a higher gradation weight is lower than a driving power for initialization in a subfield having a lower gradation weight.  
      Another embodiment is a time-division gradation method of driving a discharge display panel. The method includes driving the display panel during a unit frame period, the unit frame period including a plurality of subfields, each subfield including an initialization period, an addressing period, and a sustaining period, and each of the plurality of subfields having a respective gradation weight. The method also includes driving the display panel during a first one of the subfields with a signal having a first driving power during an initialization period of the first subfield, the first subfield having a first gradation weight, and driving the display panel during a second subfield with a signal having a second driving power during an initialization period of the second subfield, the second subfield having a second gradation weight, where the first driving power is higher than the second driving power, and the first gradation weight is lower than the second gradation weight. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
      The above and other features and advantages will become more apparent by describing in detail embodiments thereof with reference to the attached drawings in which:  
       FIG. 1  is a perspective view illustrating the structure of a plasma display panel with a three-electrode surface discharge structure according to an embodiment;  
       FIG. 2  is a cross-sectional view of one display cell in the plasma display panel of  FIG. 1 ;  
       FIG. 3  is a block diagram of a driving apparatus configured to drive the plasma display panel of  FIG. 1 ;  
       FIG. 4  is a timing diagram illustrating a method of driving the plasma display panel of  FIG. 1  according to an embodiment;  
       FIG. 5  is a timing diagram illustrating driving signals selectively transmitted to electrode lines of the discharge display panel of  FIG. 1  in each subfield illustrated in  FIG. 4 ;  
       FIG. 6  is a cross-sectional view illustrating the distribution of wall charges of a display cell at a t 3  timing of  FIG. 5 ;  
       FIG. 7  is a cross-sectional view illustrating the distribution of wall charges of a display cell at a t 4  timing of  FIG. 5 ;  
       FIG. 8  is a cross-sectional view illustrating the distribution of wall charges of a display cell at a t 8  timing of  FIG. 5 ;  
       FIG. 9  is a cross-sectional view illustrating the distribution of wall charges of a display cell at t 10  timing of  FIG. 5 ;  
       FIG. 10  is a timing diagram illustrating first and second initialization types of  FIG. 5  applied in each subfield of a unit frame according to an embodiment; and  
       FIG. 11  is a waveform diagram illustrating a case where an initializing period of an eighth subfield having a large weight uses the second initialization type according to an embodiment. 
    
    
     DETAILED DESCRIPTION OF CERTAIN INVENTIVE EMBODIMENTS  
       FIG. 1  is a perspective view illustrating the structure of a plasma display panel  1  with a three-electrode surface discharge structure according to an embodiment.  FIG. 2  is a cross-sectional view of one display cell in the plasma display panel  1  of  FIG. 1 .  
      Referring to  FIGS. 1 and 2 , address electrode lines A R1 , . . . , A Bm , dielectric layers  11  and  15 , X-electrode lines X 1 , . . . , X n  as first display electrode lines, Y-electrode lines Y 1 , . . . , Y n  as second display electrode lines, phosphors  16 , barrier ribs  17 , and a protective layer  12  comprising MgO in this embodiment, are provided between front and rear glass substrates  10  and  13  of a conventional surface discharge type plasma display panel  1 .  
      The address electrode lines A R1 , . . . , A Bm  are formed in a pattern on an upper surface of the rear glass substrate  13 . The lower dielectric layer  15  is formed to cover the address electrode lines A R1 , . . . , A Bm . The barrier ribs  17  are formed in a parallel direction with the address electrode lines A R1 , . . . , A Bm  on the upper surface of the lower dielectric layer  15 . The barrier ribs  17  partition discharge areas of display cells and substantially prevent cross-talk between the display cells. The phosphors  16  are formed respectively between the barrier ribs  17 .  
      The X-electrode lines X 1 , . . . , X n  as the first display electrode lines and Y electrode lines Y 1 , . . . , Y n  as the second display electrode lines are formed alternately and in parallel to one another on the lower surface of the front glass substrate  10  in a manner such that the X-electrode lines X 1 , . . . , X n  and Y-electrode lines Y 1 , . . . , Y n  cross the address electrode lines A R1 , . . . , A Bm . Each intersection occurs at a corresponding display cell. Each of the X-electrode lines X 1 , . . . , X n  and each of the Y-electrode lines Y 1 , . . . , Y n  are formed respectively by both transparent electrode lines (X na  and Y na  shown in  FIG. 2 ) formed of a transparent conductive material such as ITO (Indium Tin Oxide) with metal electrode lines (X nb  and Y nb  shown in  FIG. 2 ) for enhancing conductivity. The upper dielectric layer  11  is formed to cover the X-electrode lines X 1 , . . . , X n  and Y electrode lines Y 1 , . . . , Y n . A protective layer  12  for protecting the panel  1  in a strong electric field, for example, an MgO layer is formed on the lower surface of the front electronic layer  11 . A discharge space  14  is filled with plasma-forming gas and is sealed.  
      According to a method of driving the plasma display panel  1 , a unit subfield includes an initializing period, an addressing period, and a sustaining period sequentially executed. During the initializing period, the states of charges in all display cells are initialized. During the addressing period, wall voltages are generated in selected display cells. During the sustaining period, an alternating voltage is applied to all XY electrode line pairs. A sustaining discharge occurs in the display cells having the wall voltages generated during the addressing period. During the sustaining period, a plasma is formed in a discharge space  14 , and a phosphor layer  16  is excited by ultraviolet rays emitted by the plasma and generates light.  
       FIG. 3  is a block diagram of a driving apparatus configured to drive the plasma display panel  1  of  FIG. 1 . Referring to  FIG. 3 , the driving apparatus includes an image processor  66 , a controller  62 , an address driver  63 , an X driver  64 , and a Y driver  65 .  
      The image processor  66  converts external analog image signals into digital signals to generate internal image signals, for example, red (R), green (G), and blue (B) image data each having  8  bits, clock signals, and vertical and horizontal synchronization signals. The controller  62  generates driving control signals S A , S Y , and S X  according to the internal image signals output from the image processor  66 . The address driver  63  processes the address signal S A , generates a display data signal, and transmits the display data signal to the address electrode lines A R1 , . . . , A Bm  of the plasma display panel  1 . The X driver  64  processes a X driving control signal S X , and transmits corresponding X driving control signals to the X electrode lines (X 1 , . . . , X n  of  FIG. 1 ). The Y driver  65  processes a Y driving control signal S Y  and transmits corresponding Y driving control signals to the Y electrode lines (Y 1 , . . . , Y n  of  FIG. 1 ).  
       FIG. 4  is a timing diagram illustrating a method of driving the plasma display panel  1  of  FIG. 1  according to an embodiment. Referring to  FIG. 4 , each unit frame is partitioned into 8 subfields SF 1 , . . . , SF 8  in order to implement time-division gradation display. Also, the subfields SF 1 , . . . , SF 8  are divided respectively into initializing periods R 1 , . . . , R 8 , addressing periods A 1 , . . . , A 8 , and sustaining periods S 1 , . . . , S 8 .  
      Discharge conditions of all the display cells are initialized during the respective initializing periods R 1 , . . . , R 8  for the following addressing period.  
      During each of the addressing periods A 1 , . . . , A 8 , the display data signal is applied sequentially to the address electrode lines (A R1 , . . . , A Bm  of  FIG. 1 ) while injection pulses corresponding to each of the Y electrode lines Y 1 , . . . , Y n  are applied sequentially to the address electrode lines. Accordingly, if a display data signal with a high level is applied while the injection pulses are applied, wall charges are generated by address discharge in a corresponding discharge cell and no wall charge is generated in the other discharge cells.  
      During each of the sustaining periods S 1 , . . . , S 8 , discharge-sustain pulses are applied alternately to all the Y electrode lines Y 1 , . . . , Y n  and all the X electrode lines X 1 , . . . , X n , so that the discharge cells in which the wall charges are formed cause display discharge. Accordingly, luminance of the plasma display panel is proportional to a length of a sustaining period S 1 , . . . , S 8  during a unit frame. The maximum length of the sustaining period S 1 , . . . , S 8  during a unit frame is 255T (T is an unit of time). Accordingly, the length of the sustaining period S 1 , . . . , S 8  can be represented by 256 gradations including one gradation corresponding to no display discharge during the unit frame.  
      A sustaining period S 1  of a first subfield SF 1  is set to a time 1T corresponding to 2 0 , a sustaining period S 2  of a second subfield SF 2  is set to a time 2T corresponding to 2 1 , a sustaining period S 3  of a third subfield SF 3  is set to a time 4T corresponding to 2 2 , a sustaining period S 4  of a fourth subfield SF 4  is set to a time 8T corresponding to 2 3 , a sustaining period S 5  of a fifth subfield SF 5  is set to a time 16T corresponding to 2 4 , a sustaining period S 6  of a sixth subfield SF 6  is set to a time 32T corresponding to 2 5 , a sustaining period S 7  of a seventh subfield SF 7  is set to a time 64T corresponding to 2 6 , and a sustaining period S 8  of an eighth subfield SF 8  is set to a time 128T corresponding to 2 7 , respectively.  
      Accordingly, by appropriately selection of subfields to be displayed, a display with 256 gradations including a zero (0) gradation that corresponds to no display can be implemented.  
      In each of the initializing periods R 1 , . . . , R 8 , an initialization driving power of the eighth subfield SF 8  having the largest gradation weight is lower than that of each of the first through seventh subfields SF 1  through SF 7 . Accordingly, the initialization operation in the eighth subfield SF 8  can be properly performed. This occurs because the seventh subfield S 7  immediately before the eighth subfield SF 8  has a long sustaining period SF 7  and thus induces a sufficient amount of wall charges around electrode lines at the start point of the eight subfield SF 8 .  
      As described above, since the initialization operation is accurately performed during the eighth subfield SF 8  having the largest gradation weight, the addressing operation during the following addressing period A 8  can be more accurately performed. In other words, the accurate operation in the eighth subfield SF 8  having the largest gradation weight can enhance image reproducibility.  
       FIG. 5  illustrates driving signals transmitted to the electrode lines of the discharge display panel  1  of  FIG. 1  in a subfield SF A  and another subfield SF B  illustrated in  FIG. 4 . Waveforms of driving signals in the subfield SF A  during an addressing period A and a sustaining period S are substantially identical to those of the subfield SF B . In  FIG. 6 , reference numeral S AR1 , . . . A Bm  indicates a driving signal applied to each of the address electrode lines (A R1 , A G1 , . . . , A Gm , A Bm  of  FIG. 1 ), reference numeral S X1 , . . . X n  indicates a driving signal applied to each of the X electrode lines (X 1 , . . . , X n  of  FIG. 1 ), and reference numeral S Y1 , . . . . , S Yn  indicates a driving signal applied to each of the Y electrode lines (Y 1 , . . . , Y n  of  FIG. 1 ).  FIG. 6  is a cross-sectional view illustrating the distribution of wall charges of a display cell at a t 3  timing of  FIG. 5 .  FIG. 7  is a cross-sectional view illustrating the distribution of wall charges of a display cell at a t 4  timing of  FIG. 5 .  FIG. 8  is a cross-sectional view illustrating the distribution of wall charges of a display cell at a t 8  timing of  FIG. 5 .  FIG. 9  is a cross-sectional view illustrating the distribution of wall charges of a display cell at too timing of  FIG. 5 . In  FIGS. 6 through 9 , components having the same reference numerals as those of  FIG. 2  operate in substantially the same manner as the corresponding components of  FIG. 2 .  
      The driving signals transmitted to the electrode lines of the discharge display panel  1  of  FIG. 1  in the subfield SFA illustrated in  FIG. 4  will now be described with reference to  FIGS. 5 through 7 .  
      During a first period between a t 1  timing and a t 2  timing included during an initializing period R A  of the subfield SF A , a voltage applied to the X electrode lines X 1 , . . . , X n  as the first electrode lines is raised from a ground voltage V G  to a second voltage V S . The ground voltage V G  is applied to the Y electrode lines Y 1 , . . . , Y n  and the address electrode lines A R1 , . . . , A Bm . Accordingly, a weak discharge is generated between the Y electrode lines Y 1 , . . . , Y n  and the X electrode lines X 1 , . . . , X n  and between the Y electrode lines Y 1 , . . . , Y n  and the address electrode lines A R1 , . . . , A Bm . Consequently, wall charges with negative polarity are formed around the X electrode lines X 1 , . . . , X n .  
      During a second period, which is a first voltage-rising period, between the t 2  timing and the t 3  timing, a voltage applied to the Y electrode lines Y 1 , . . . , Y n  as the second display electrode lines is raised from the second voltage V S  to a first voltage V SET +V S , which is higher than the second voltage V S  by a fifth voltage V SET . Here, the ground voltage V G  is applied to the X electrode lines X 1 , . . . , X n  and the address electrode lines A R1 , . . . , A Bm . Accordingly, a weak discharge is generated between the Y electrode lines Y 1 , . . . , Y n  and the X electrode lines X 1 , . . . , X n , while a weaker discharge is generated between the Y electrode lines Y 1 , . . . , Y n  and the address electrode lines A R1 , . . . , A Bm . The reason why the discharge between the Y electrode lines Y 1 , . . . , Y n  and the X electrode lines X 1 , . . . , X n  is stronger than the discharge between the Y electrode lines Y 1 , . . . , Y n  and the address electrode lines A R1 , . . . , A Bm  is that the wall charges with negative polarity are formed around the X electrode lines X 1 , . . . , X n . That is, many wall charges with negative polarity are formed around the Y electrode lines Y 1 , . . . , Y n , while wall charges with positive polarity are formed around the X electrode lines X 1 , . . . , X n , and some wall charges with positive polarity are formed around the address electrode lines A R1 , . . . , A Bm  (see  FIG. 6 ).  
      During a third period, which is a voltage falling period, between the t 3  timing and the t 4  timing, the voltage applied to the Y electrode lines Y 1 , . . . , Y n  falls from the second voltage V S  to a third voltage V NF  which is lower than the ground voltage V G  while the voltage applied to the X electrode lines X 1 , . . . , X n  is maintained at the second voltage V S . The ground voltage V G  is applied to the address electrode lines A R1 , . . . , A Bm . Some of the wall charges with negative polarity formed around the Y electrode lines Y 1 , . . . , Y n , move to and stay near the X electrode lines X 1 , . . . , X n  due to a discharge between the X electrode lines X 1 , . . . , X n  and the Y electrode lines Y 1 , . . . , Y n  (see  FIG. 7 ). In addition, wall voltages of the X electrode lines X 1 , . . . , X n  are lower than those of the address electrode lines A R1 , . . . , A Bm  and higher than those of the Y electrode lines Y 1 , . . . , Y n . In the following addressing period A, an addressing voltage V A -V SC     —     L  for an opposed discharge between selected address electrode lines and the Y electrode lines Y 1 , . . . , Y n  may be lowered. Since the ground voltage V G  is applied to all the address electrode lines A R1 , . . . , A Bm , the address electrode lines A R1 , . . . , A Bm  perform a discharge for the X electrode lines X 1 , . . . , X n  and the Y electrode lines Y 1 , . . . , Y n . Because of this discharge, wall charges with positive polarity formed around the address electrode lines A R1 , . . . , A Bm  are substantially eliminated (see  FIG. 7 ).  
      In the following addressing period A, a display data signal is transmitted to the address electrode lines A R1 , . . . , A Bm , and scan signals having a seventh voltage V SC     —     L  (lower than the ground voltage V G ) are sequentially transmitted to the Y electrode lines Y 1 , . . . , Y n  which are biased by a sixth potential V SC     —     H  which is lower than the second voltage V S , so that smooth addressing can be performed.  
      As the display data signal is transmitted to each of the address electrode lines A R1 , . . . , A Bm , an addressing voltage V A  with positive polarity is applied to selected display cells, and the ground potential V G  is applied to the remaining display cells. Accordingly, if the display data signal having the positive-polarity addressing voltage V A  is transmitted while scan pulses having the ground voltage V G  are applied, wall charges are formed by addressing discharge in the corresponding display cells and no wall charges are formed in the other display cells. Thus, to correctly and efficiently perform addressing discharge, the second voltage V S  is applied to the X electrode lines X 1 , . . . , X n .  
      In the following sustaining period S, discharge-sustain pulses of the second voltage V S  with positive polarity are alternately applied to the Y electrode lines Y 1 , . . . , Y n  and the X electrode lines X 1 , . . . , X n , so that discharge for discharge-sustain is generated in the display cells with the wall charges formed in the corresponding addressing period A.  
      Driving signals transmitted to the electrode lines of the discharge display panel  1  of  FIG. 1  in the subfield SF B  illustrated in  FIG. 5  will now be described with reference to  FIGS. 5, 8 , and  9 .  
      During a first period between a t 5  timing and a t 6  timing during an initializing period R B  of the subfield SF B , a voltage applied to the X electrode lines X 1 , . . . , X n  is raised from the ground voltage V G  to the second voltage V S . The ground voltage V G  is applied to the Y electrode lines Y 1 , . . . , Y n  and the address electrode lines A R1 , . . . , A Bm . Accordingly, a weak discharge occurs between the X electrode lines X 1 , . . . , X n  and the Y electrode lines Y 1 , . . . , Y n  and between the X electrode lines X 1 , . . . , X n  and the address electrode lines A R1 , . . . , A Bm  in display cells in which the sustain-discharge occurred during the sustaining period S of the previous subfield. Consequently, wall charges with negative polarity are formed around the X electrode lines X 1 , . . . , X n .  
      During a second period, which is a second voltage rising period, between a t 6  timing and a t 7  timing, the voltage applied to the Y electrode lines Y 1 , . . . , Y n  is raised to the second voltage V S . Here, the ground voltage V G  is applied to the X electrode lines X 1 , . . . , X n  and the address electrode lines A R1 , . . . , A Bm . Accordingly, wall charges with positive polarity are formed around the Y electrode lines Y 1 , . . . , Y n , wall charges with positive polarity are formed around the X electrode lines X 1 , . . . , X n , and wall charges with positive polarity are formed around the address electrode lines A R1 , . . . , A Bm  in the display cells in which the sustain-discharge occurred during the sustaining period S of the previous subfield (see  FIG. 8 ).  
      During the second period, which is the second voltage rising period, between the t 6  timing and the t 7  timing, when the subfield SF B  is the subfield having the largest gradation weight (the eighth subfield SF 8  in  FIG. 4 ), the voltage applied to the Y electrode lines Y 1 , . . . , Y n  is raised to the second voltage Vs with a profile configured to result in driving power lower than in SF A . Accordingly, the initializing operation of the eighth field SF 8  having the largest gradation weight can be performed properly since the seventh subfield S 7  immediately before the eighth subfield SF 8  has a long sustaining period S 7  and induces a sufficient amount of wall charges around the electrode lines at the start point (t 5  timing) of the eight subfield SF 8 .  
      As described above, since the initialization operation can be accurately performed for the eighth subfield SF 8  having the largest gradation weight, the addressing operation during the following addressing period A 8  can be more accurately performed. In other words, the accurate operation during the eighth subfield SF 8  having the largest gradation weight can enhance image reproducibility, which will be described in more detail later with reference to  FIGS. 10 and 11 .  
      During a third period between a t 7  timing and a t 8  timing, the voltage applied to the Y electrode lines Y 1 , . . . , Y n  is maintained at the second voltage V S , thereby facilitating proper stabilization.  
      During a fourth period, which is a voltage falling period, between a t 8  timing through a t 10  timing, the voltage applied to the Y electrode lines Y 1 , . . . , Y n  falls from the second voltage V S  to the seventh voltage V SC     —     L  which is lower than the ground voltage V G  while the voltage applied to the X electrode lines X 1 , . . . , X n  is maintained at the second voltage V S . Here, the ground voltage V G  is applied to the address electrode lines A R1 , . . . , A Bm . Accordingly, some of the wall charges with negative polarity, which are formed around the Y electrode lines Y 1 , . . . , Y n , move to and stay around the X electrode lines X 1 , . . . , X n  due to a discharge between the X electrode lines X 1 , . . . , X n  and the Y electrode lines Y 1 , . . . , Y n  (see  FIG. 9 ). In addition, the wall voltages of the X electrode lines X 1 , . . . , X n  are lower than those of the address electrode lines A R1 , . . . , A Bm  and higher than those of the Y electrode lines Y 1 , . . . , Y n . In the following addressing period A, an addressing voltage V A -V G  for the opposed discharge between selected address electrode lines and the Y electrode lines Y 1 , . . . , Y n  may be lowered. Since the ground voltage V G  is applied to all the address electrode lines A R1 , . . . , A Bm , the address electrode lines A R1 , . . . , A Bm  perform a discharge for the X electrode lines X 1 , . . . , X n  and the Y electrode lines Y 1 , . . . , Y n . Due to this discharge, wall charges with positive polarity formed around the address electrode lines A R1 , . . . , A Bm  are eliminated (see  FIG. 9 ).  
       FIG. 10  is a timing diagram illustrating first and second initialization types R A  and R B  of  FIG. 5  applied in each subfield of a unit frame according to an embodiment. Referring to  FIGS. 5 and 10 , the second initialization type R B  is used in initializing periods R 1  and R 5  through R 8  of subfields SF 1  and SF 5  through SF 8  whose previous subfields have relatively long sustaining periods S, respectively. The first initialization type R A  is used in initializing periods R 2  through R 4  of subfields SF 2  through SF 4  whose previous subfields have relatively short sustaining periods S, respectively. Since the initialization operation is properly and effectively performed, the contrast of the discharge display apparatus can be enhanced, power consumption can be reduced, and the life of the discharge display apparatus can be extended. When the initializing period R 8  of the eighth subfield SF 8  having the largest weight uses the second initialization type R B , a signal transmitted to the Y electrode lines Y 1 , . . . , Y n  as the second display electrode lines illustrated in  FIG. 1  is modified as illustrated in  FIG. 11 .  
       FIG. 11  is a waveform diagram illustrating a case where the initializing period R 8  of the eighth subfield SF 8  having the largest weight uses the second initialization type R B  according to an embodiment. Referring to  FIG. 11 , during the second period, which is the second voltage rising period, between the t 6  timing and the t 7  timing, the voltage applied to the Y electrode lines Y 1 , . . . , Y n  as the second display electrode lines is raised to the second voltage V S  with a profile configured to lower the driving power.  
      Specifically, there exists a period between a t 6A  timing and a t 6B  timing during which the driving power stops being supplied. In other words, in the second period, which is the second voltage rising period, between the t 6  timing and the t 7  timing, the voltage stops being applied to the Y electrode lines Y 1 , . . . , Y n  during the period between the t 6A  timing and the t 6B  timing.  
      Accordingly, the initializing operation in the eighth field SF 8  having the largest gradation weight can be performed properly since the seventh subfield S 7  immediately before the eighth subfield SF 8  has a long sustaining period S 7  and thus a sufficient amount of wall charges are formed around the electrode lines at the start point (t 5  timing) of the eight subfield SF 8 . As described above, since the initialization operation can be accurately performed during the eighth subfield SF 8  having the largest gradation weight, the operation in the following addressing period A 8  can be more accurately performed. In other words, the accurate operation in the eighth subfield SF 8  having the largest gradation weight can enhance image reproducibility.  
      Waveforms in the third period between the t 7  timing and t 8  timing and the fourth period between the t 8  timing through the t 10  timing are substantially identical to those of the second initialization type R B  of  FIG. 5 , and therefore, a detailed description thereof will not be repeated.  
      As described above, in a method of driving a discharge display panel according to the present invention, a driving power for initialization in a subfield having a large gradation weight is the lower. Therefore, an initialization operation can be properly performed in the subfield having the largest gradation weight because a subfield immediately before the subfield having the largest gradation weight has a long sustaining period and thus a sufficient amount of wall charges are formed around electrode lines at a start point of the subfield having the largest gradation weight. In some embodiments, the power lowering profile is based at least in part on the duration of the subfield with the largest gradation weight.  
      Because the initialization operation is accurately performed in the subfield having the largest gradation weight, an operation in the following addressing period can be more accurately performed. In other words, the accurate operation in the subfield having the largest gradation weight can enhance image reproducibility.  
      While the present invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention.