Patent Publication Number: US-2004042621-A1

Title: Multichannel television sound (MTS) stereo television encoder

Description:
BACKGROUND OF THE INVENTION  
       [0001] 1. Field of the Invention  
       [0002] The present invention relates in general to signal processing of television signals. More specifically, the present invention relates to processing stereo audio and line level video signals in accordance with the Multichannel Television Sound (MTS) television broadcast standard, officially known as the Broadcast Systems Television Committee (BTSC) standard, to generate a composite audio signal capable of modulating a radio frequency (RF) carrier, at a specific television channel, for cable transmission.  
       [0003] 2. Description of the Related Art  
       [0004] A problem with currently available MTS stereo signal processing systems is they are more complex and more expensive than necessary to generate acceptable stereo audio signals for the average home cable television user. Because currently available MTS stereo signal processing systems were designed to satisfy the less tolerant free space transmission environment, as opposed to the more tolerant cable transmission environment, they are comprised of more components and occupy more circuit board space than necessary for adequate cable transmission. Additionally, currently available systems are problematic because they implement multiple filtering stages, which truncate the audio frequency response at about twelve or thirteen kilohertz, short of the full audio range of fifteen kilohertz and also cause unwanted phase aberrations.  
       [0005] An MTS stereo signal processing system for cable transmission is needed that is designed to meet the needs of the average home cable television user and that takes advantage of the more tolerant cable transmission environment. A system is needed that uses fewer components and costs less than currently available MTS stereo signal processing systems. Furthermore, a system is needed that utilizes the full fifteen kilohertz audio range and that avoids unwanted phase aberrations.  
       SUMMARY OF THE INVENTION  
       [0006] The present invention is more suitable to the less exacting requirements of the average home cable television user. Because the present invention is designed to take advantage of the more tolerant cable transmission environment, it is implemented with fewer components, therefore, the present invention is less complex, less expensive, and occupies less physical circuit board space than currently available systems. Through unique treatment and implementation of the pre-emphasis characteristics of the system&#39;s noise reduction circuit, the present invention generates a composite audio signal with a unique audio frequency response that occupies the entire fifteen-kilohertz audio range. Additionally, because the present invention avoids multiple filtering stages, the present invention is less complex, does not truncate the audio frequency response, and avoids unwanted phase aberrations. The present invention is also cost-efficient because unlike currently available systems, the system is powered by a single, low-voltage power supply.  
       [0007] In one aspect, a system for generating a composite audio signal capable of modulating a radio frequency carrier to a standard television channel for cable transmission is disclosed. The system includes an input for a first audio signal, for a second audio signal and for a video signal. A first generating circuit is provided for generating a third audio signal which is the sum of the first and second audio signals input into the system. A second generating circuit serves to generate a fourth audio signal which is the different between the first and second audio signals input into the system. A first pre-emphasizing circuit serves to pre-emphasize the fourth audio signal a first time and a second pre-emphasizing circuit serves to pre-emphasize the fourth audio signal a second time.  
       [0008] An extracting circuit functions to extract a timing signal of a first frequency from the video signal. A pilot signal circuit serves to generate from the timing a signal a pilot signal of the first frequency and a sub-carrier signal of a second frequency. A compressing circuit is for compressing the twice pre-emphasized fourth audio signal. A suppressing circuit serves to suppress the sub-carrier signal and for modulating the compressed fourth audio signal. A composite signal circuit serves to generate the composite audio signal from the third audio signal, the compressed and modulated fourth audio signal, and the pilot signal.  
       [0009] In a different aspect, a method of generating a composite audio signal capable of modulating a radio frequency transmitter to a standard television channel for cable television is provided. A first audio signal, a second audio signal and a video signal are initially received. The first and second audio signals are summed to generate a third audio signal. The difference between the first and second audio signals is obtained to generate a fourth audio signal. The fourth audio signal is pre-emphasized a first time, and thereafter pre-emphasized a second time. A timing signal of a first frequency is extracted from the video signal. A pilot signal of the first frequency and a subcarrier signal of a second frequency are generated from the timing signal. The twice pre-emphasized fourth audio signal is compressed. The subcarrier signal is suppressed and the compressed fourth audio signal is modulated. The third audio signal, the compressed and modulated fourth audio signal, and the pilot signal are summed to generate the composite audio signal. 
     
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0010] The following brief description of the drawings will provide a better understanding of the present invention when viewed in context of the detailed description of the invention.  
     [0011]FIG. 1 is a block diagram of an MTS TV stereo encoder system according to an embodiment of the present invention.  
     [0012]FIG. 2 is a block diagram of a stereo matrix generator circuit of the MTS TV stereo encoder of FIG. 1.  
     [0013]FIG. 3 is a block diagram of a sync separator circuit of the MTS TV stereo encoder of FIG. 1.  
     [0014]FIG. 4 is a block diagram of an implementation of the Pilot &amp; Sub-Carrier Generator circuit of the MTS TV Stereo Encoder of FIG. 1.  
     [0015]FIG. 5 is a block diagram of an implementation of the Compressor &amp; Balanced Modulator circuit of the MTS TV Stereo Encoder of FIG. 1.  
     [0016]FIG. 6 is a block diagram of an implementation of the Summing &amp; Output Amplifiers circuit of the MTS TV Stereo Encoder of FIG. 1.  
     [0017]FIG. 7 is a plot of the signature audio frequency response of an implementation of the MTS TV Stereo Encoder.  
     [0018]FIG. 8 is a schematic diagram illustrating an embodiment of the Stereo Matrix Generator circuit of the MTS TV Stereo Encoder.  
     [0019]FIG. 9 is a schematic diagram illustrating an embodiment of the Sync Separator circuit of the MTS TV Stereo Encoder.  
     [0020]FIG. 10 is a schematic diagram illustrating an embodiment of the Pilot &amp; Sub-Carrier Generator circuit of the MTS TV Stereo Encoder.  
     [0021]FIG. 11 is a schematic diagram illustrating an embodiment of the Compressor &amp; Balanced Modulator circuit of the MTS TV Stereo Encoder.  
     [0022]FIG. 12 is a schematic diagram illustrating an embodiment of the Summing &amp; Output Amplifiers circuit of the MTS TV Stereo Encoder.  
     [0023]FIG. 13 is a schematic diagram illustrating an embodiment of an RF modulator capable of transmitting the composite stereo audio output signal of the MTS TV Stereo Encoder. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS OF THE PRESENT INVENTION  
     [0024] As shown in FIG. 1, an embodiment of the present invention includes an analog system  100  that accepts line level video  117 , left audio  101 , and right audio  103  input signals and processes these signals in accordance with the Broadcast Television Systems Committee (BTSC) television broadcast standards, often referred to as Multichannel Television Sound (MTS) standards, to produce a composite stereo audio output signal  129  capable of modulating a radio frequency (RF) transmitter set  131  to a standard television channel.  
     [0025] Referring to FIG. 9, the left  101  and right  103  audio input signals are accepted through the WHITE and RED RCA female jacks of assembly J 1 , respectively. The left  101  and right  103  audio input signals are line level signals, defined as 1.0 Volt peak-to-peak (V p-p ) at 500 ohms to 10,000 ohms impedance. The input voltage level should not exceed 3.0 V p-p  because higher levels will cause distortion.  
     [0026] The system  100  of FIG. 1 operates from a single, external, low-voltage power source  900 . As shown in FIG. 9, the power source is +5.000 Volts DC (+/−10%, 20 mV maximum ripple) at 0.100 Amps. The power source  900  is applied to P 1  (pin  16 / 17 ) and is filtered through capacitors C 42 , C 43 , and C 50 . A visual indicator shows when power is applied (R 61 /D 5 ). The ground return path is provided on P 1  (pins  15 / 18 / 19 ).  
     [0027] As shown in FIG. 1, the left  101  and right  103  audio input signals are coupled to a Stereo Matrix Generator circuit  105  that generates two separate audio channels  107  and  109 . The first channel  107  is the algebraic sum of the left  101  and right  103  audio input signals and is also the monophonic channel for non-stereo receivers. The second channel  109  is the algebraic difference between the left  101  and right  103  audio input signals.  
     [0028] As shown in FIG. 2, the left  101  and right  103  audio input signals are passed through resistive input attenuator circuits  201  and  203 , respectively. The attenuated left  205  and right  207  audio input signals are fed to the inputs of a summing amplifier circuit  209  and a difference amplifier circuit  211 , which together comprise the Stereo Matrix Generator  105 . Because the system  100  is powered by a single power supply  900 , a bias and filter circuit  213  conditions the power supplied to the amplifiers  209  and  211 .  
     [0029] The output of the summing amplifier circuit  219 , the L+R summed audio signal, is fed to a pre-emphasis circuit  223  that pre-emphasizes or provides gain to increase the higher frequency signal levels in order to maintain a superior signal-to-noise ratio. The output of the difference amplifier circuit  221 , the L−R difference audio signal, is fed to a first pre-emphasis circuit  225 , the output of which  227  is then fed to a second pre-emphasis circuit  229 . The purpose of the additional pre-emphasis circuit is to again pre-emphasize or decrease the low frequency effects on the Compressor &amp; Balanced Modulator  111 . In considering this it is noted that the phase shifts at low frequencies (50 Hz to 300 Hz) must be minimized in order to maintain proper stereo separation. The output of the pre-emphasis circuit  223  is the L+R main audio channel  107  and the output of the pre-emphasis circuit  229  is the L−R audio sub-channel  109 .  
     [0030] Referring to FIG. 8, the system  100  of FIG. 1 includes resistive input attenuators  201  and  203  designed to provide a flat (+/−0.75 dB) fixed attenuation level of 3.0 dB across the 50 Hz to 15,000 Hz input frequency range (R 50 / 10  kΩ &amp; R 43 / 10  kΩ). The output signals of the resistive attenuators  201  and  203  are AC coupled (C 41  &amp; C 40 ) to the inputs of the summing amplifier (U 3 A) and the difference amplifier (U 3 B).  
     [0031] The L+R main audio channel  107  is generated by summing the output signals of the attenuators  201  and  203  using two equal value resistors (R 28 /R 27 ). The summed signal is fed to the non-inverting input of an operational amplifier (U 3 A). The +5.0 Volts DC power source (+V cc ) that powers U 3 A is biased and filtered to {fraction (1/2 )}+V cc  via a bias and filter circuit  213  (R 25 /R 26 /C 26 /R 29 ). Additionally, an AC attenuator (R 29  &amp; C 26 ) provides an attenuation factor of about 21. A feedback circuit (Ri 9 /C 22  &amp; R 17 /C 21 ) provides a gain of about 2. A high frequency limiting capacitor (C 22 ) prevents oscillation and unacceptable gain phase margin errors. Another capacitor (C 21 ) prevents DC coupling, while providing an AC ground return path. The L+R summed audio signal  219  is fed to the 72.93 μs pre-emphasis network  223  (R 9 /C 15 /R 10 /C 9 ). The 72.93 μs pre-emphasis network  223  provides the recommended amplitude from −2.0 dB to +17.0 dB over the audio spectrum of 50 Hz to 15000 Hz. The signal from the pre-emphasis network  223  is fed to an AC attenuator (R 10 /C 9 ) within the pre-emphasis network  223  that attenuates the signal by a factor of about 3.3 and provides the proper input balance to the summing amplifier stage (U 5 B) shown in FIG. 12. The L+R main audio channel  107  is AC-coupled (C 7 ) to the summing amplifier stage (U 5 B) shown in FIG. 12 (described further herein).  
     [0032] The L−R audio sub-channel  109  is generated by feeding (via R 30 ) the attenuated right audio input signal  207  to the non-inverting input of the difference amplifier (U 3 B) of the difference amplifier circuit  211  and by feeding (via R 31 ) the attenuated left audio input signal  205  to the inverting input of the difference amplifier (U 3 B) of the difference amplifier circuit  211 . Further to the difference amplifier circuit  211 , a feedback resistor (R 20 ) in parallel with a high frequency limiting capacitor (C 23 ) produces a gain of about 1. A resistor (R 32 ) provides a DC path for biasing the amplifier (U 3 B) (via C 26 / 26 /R 25 ) (FIG. 8), while providing an AC ground return path for the audio signal. The L−R difference audio signal  221  is fed to the 72.93 μs pre-emphasis network  225  (R 12 /C 17 /R 11 /C 10 ). The output of the 72.93 μs pre-emphasis network is AC coupled (C 11 ) to a 300 μs pre-emphasis network  229  (R 16 /C 14 /R 8 /C 6 ). The output of the 300 μs pre-emphasis network  229  is the L-R audio sub-channel  109 .  
     [0033] Further to FIG. 1, the composite video input signal  117 , a National Television Systems Committee (NTSC) standard negative going signal, is fed to a Sync Separator  119  that extracts a timing signal  121  from the composite video input signal  117 . The internal circuits of the system  100  are synchronized to the extracted timing signal  121 .  
     [0034] As shown in FIG. 3, the Sync Separator  119  is comprised of a low-pass filter circuit  301 , which passes a filtered composite video input signal  303  to a dedicated integrated circuit (IC) sync separator  305 .  
     [0035] Referring to FIG. 9, the composite video input signal  117  shown in FIG. 3 is obtained from the YELLOW female RCA input jack (J 1 ). The composite video signal  117  is passed through a low-pass chroma filter  301  (R 60 /C 70 ) with a corner frequency (−3.0 dB) of about 500 KHz which causes a decrease in video sub-carrier content of about 18 dB and results in a composite sync delay of 40 ns to 200 ns. The filtered composite video input signal  303  shown in FIG. 3 is AC coupled to a commercially available sync separator IC  305  (U 9 ). The output of the sync separator IC  305  is the composite video sync signal  121 , which operates at a frequency of 15.734 KHz (63 μs period—line interval) and is AC coupled (C 59 ) to the Pilot &amp; Sub-Carrier Generator  123  shown in FIG. 1. A capacitor (C 71 ) decouples the +5.0 Volts DC power supply (+V cc ).  
     [0036] Further to FIG. 1, the Pilot &amp; Sub-Carrier Generator  123  receives the composite video sync signal  121  and outputs a pilot  127  and a sub-carrier  125  signal. As shown in FIG. 4, the Pilot &amp; Sub-Carrier Generator  123  from FIG. 1, provides waveform shaping by passing the square wave composite video sync signal  121  through a peak clipping limiter  401  and an inverter  405 . A monostable multivibrator  407  triggers on the composite video sync pulse, while ignoring the other video pulse information that is present, and generates a new square wave  409  that is in sync with the composite video sync signal  121 , but that does not contain any potential artifacts. A phase-locked loop (PLL) circuit  411  receives the square wave signal of a first frequency  409  and generates a square wave signal of a second frequency  415  that is two times the first frequency. The PLL circuit  411  also synchronizes the pilot  127  and sub-carrier  125  waveforms to the composite video sync signal  121 . A waveform smoothing circuit  417  generates a sub-carrier signal  125  of the second frequency from the square wave signal of the second frequency  415 . A divide-by-two counter  419  generates a new square wave signal of the first frequency  421 . A waveform smoothing circuit  423  generates a pilot signal  127  of the first frequency from the square wave signal of the first frequency  421 .  
     [0037] Referring to FIG. 10, the composite video sync signal  121  shown in FIG. 1 is AC coupled (C 58 ) to a peak clipping limiter  401  (D 3 ). The output of the peak clipping limiter  401  is fed to a transistor (Q 1 ) configured as part of an inverter  405  that inverts the negative-going composite video sync signal  121 . A resistor (R 54 ) serves as a base drive reduction resistor for the inverter  405 . A J-K flip-flop (U 6 B) is configured as a non-retriggerable one-shot monostable multivibrator  407  with an output oscillation frequency of 15.734 KHz (63.0 μs) being established by D 2 /R 53 /C 52 . The 15.735 KHz composite video sync signal is fed to the Clock Input of the monostable multivibrator  407  (U 6 B), J and K are tied to +V cc , and Set is tied to ground. The output is a 50/50 (50%) duty cycle square wave  409  shown in FIG. 4, which is used by the PLL  411  (U 4 ) as the signal input frequency.  
     [0038] A capacitor (C 36 ) sets the PLL  411  (U 4 ) voltage-controlled oscillator (VCO) center frequency to approximately two times the input frequency of 15.734 KHz (approximately 31.468 KHz). A resistor (R 34 ) sets the maximum VCO pull-in frequency and a resistor (R 35 ) sets the minimum VCO pull-in frequency. The PLL  411  (U 4 ) has a loop filter (R 39 /R 40 /C 37 /C 31 ). A capacitor (C 37 ) makes the loop filter second order, which improves its response to transients. A resistor and a capacitor (R 39 &amp;C 31 ) determine the loop setting time and two resistors (R 39 &amp;R 40 ) determine the damping factor. Indicators (R 33 &amp;D 1 ) show when the loop is locked by maximum brightness of the LED. The PLL  411  (U 4 ) VCO outputs a 31.468 KHz square wave signal  415  shown in FIG. 4, which is AC coupled (C 34 ) and passed through a smoothing circuit  417  (R 38 /C 33 ) that generates a 31.468 KHz triangle waveform sub-carrier signal  125 .  
     [0039] The PLL  411  (U 4 ) VCO 31.468 KHz square wave signal  415  is also routed to the second half of the type J-K flip-flop (U 6 A), which is configured as a divide-by-two counter  419 . Set and Reset are connected to ground, J and K are connected to +V cc , and a capacitor (C 49 ) provides decoupling. The divided-by-two 15.734 KHz “Q—prime” signal is AC coupled (C 44 ) through a smoothing circuit  423  (R 45 /C 45 /R 46 /C 46 /R 47 /R 48 ), which converts the square wave input signal into a 15.734 KHz sine wave pilot signal  127 . The pilot signal  127  is AC coupled (C 47 ) to the Summing &amp; Output Amplifiers  115  shown in FIG. 1.  
     [0040] The “Q” square wave  421  is DC coupled to the Reference Input of the PLL  411  (U 4 ), which compares the phase of this reference input to that of the signal input to provide steering information to the phase detector that results in an error voltage being created. This error voltage is filtered and fed back into the PLL  411  (U 4 ) to provide frequency lock to the 15.734 KHz composite video sync signal  121 , which in turn locks the encoder to the video source. Capacitors (C 56 /C 30 ) of monostable multivibrator  407  and PLL circuit  411 , respectively, decouple the power supply.  
     [0041] As shown in FIG. 1, the sub-carrier signal  125  and the L−R audio sub-channel  109  are fed to the Compressor &amp; Balanced Modulator  111 . Referring to FIG. 5, a compressor circuit  513  receives and increases the signal-to-noise ratio of the L−R audio sub-channel  109  by applying the BTSC standard 2:1 compression ratio. The compressed L−R audio sub-channel signal  509  is fed to a balanced modulator circuit  501  via a balancing and feedback circuit  505 . The balanced modulator circuit  501 , in conjunction with amplifiers internal to the compressor circuit  513 , produces a double-sideband suppressed carrier amplitude modulated (AM-DSB/SC) L−R audio signal  113 , centered around the 31.468 KHz carrier. The frequency range of the AM-DSB/SC L−R audio signal  113  is 17.468 KHz (31.468 KHz−14.000 KHz) to 45.468 KHz (31.468 KHz+14.000 KHz). Bias &amp; filter circuits  503  and  511  apply power to the balanced modulator  501  and compressor  513  circuits, respectively.  
     [0042] Referring to FIG. 11, the compressor circuit  513  is implemented with a dedicated Philips Compandor (compressor/expander) IC (U 2 ) specifically designed to produce the required 2:1 compression ratio. The compressor (U 2 ) contains two undedicated operational amplifiers that are used in the balanced modulator circuit  501 . The compressor (U 2 ) is designed to have a 0 dB amplitude reference level of 0.100 V rms  so that input amplitudes below 0.100 V rms  are multiplied by a factor of 2 and amplitudes above 0.100 V rms  are multiplied by a factor of 0.5.  
     [0043] A capacitor (C 20 ) sets the attack and release time constant of the compressor (U 2 ) to about 40 ms. The +5.0 Volts DC power supply (+V cc ) is filtered (C 19 /C 12 ) and applied to the compressor (U 2 ). The compressor (U 2 ) also contains a DC Reference and an internal amplifier that is biased and filtered (R 24 /C 25 /R 23 /C 28 ) to ½ of +V cc .  
     [0044] The L−R audio sub-channel signal  109  is applied to the compressor (U 2  pin  13 ), which is the input to the internal summing amplifier. The output of the internal summing amplifier is fed to the internal rectifier via a capacitor (C 13 ). Additionally, the internal summing amplifier is controlled by a feedback circuit (R 4 /C 1 /R 3 ) that yields a gain of about 6. A capacitor (C 1 ) decouples the AC components of the feedback signal so that only DC feedback is provided to the amplifier.  
     [0045] The output of the internal summing amplifier, the compressed L−R audio sub-channel signal  509  from FIG. 5, is AC coupled (C 4 ) to the input of the balanced modulator  501  (U 1 ) via a balancing circuit (C 5 /R 5 /R 2 ). A potentiometer (R 2 ) precisely sets the balance between the L+R main audio channel  107  from FIG. 1 and the L−R audio sub-channel  109 . A resistor (R 1 ) provides a DC balance between the Balanced Modulator  501  (U 1 ) differential inputs, while a capacitor (C 3 ) provides AC decoupling of the signal path to ground. The 31.468 KHz sub-carrier signal  125  is AC coupled (C 29 ) to the balanced modulator  501  (U 1 ).  
     [0046] The differential AM double-sideband signal  507  from FIG. 5 is fed to a difference amplifier internal to the compressor  513  (U 2 ); one signal is fed (via R 13 ) to the inverting input and the other signal is fed (via R 7 /R 6 /C 2 ) to the non-inverting input. A resistor (R 14 ) provides feedback with a gain of 1. The difference amplifier is DC biased by virtue of the fact that DC coupling is utilized. The output of the difference amplifier is fed (via R 15 /C 24 /R 21 ) to the inverting input of a second amplifier internal to the compressor  513  (U 2 ). A high pass filter (R 15 /C 24 ) serves to attenuate any low frequency signals (less than 15.0 KHz) that might remain after processing. A feedback resistor (R 22 ) provides a gain of about 2. The AM-DSB/SC L−R audio signal  113  is AC coupled (C 32 ) to the Summing &amp; Output Amplifiers  115  shown in FIG. 1.  
     [0047] As shown in FIG. 1, the Summing &amp; Output Amplifier circuit  115  generates the composite stereo audio signal  129 . As shown in FIG. 6, a summing amplifier circuit  601  sums the L+R main audio channel  107 , the compressed and modulated L−R audio sub-channel  113 , and the pilot signal  127 . The summed audio signal  605  is passed through a buffer &amp; output amplifier circuit  607 , which provides the final composite stereo audio output level that will be passed to the RF Modulator and Output Amplifier  131  shown in FIG. 1 to assure that the proper modulation level is achieved. The buffer &amp; output amplifier circuit  607  also provides isolation and buffering between the previous components of system  100  and the input of the RF Modulator &amp; Output Amplifier  131 . A bias &amp; filter circuit  603  applies power to the summing amplifier circuit  601  and to the buffer &amp; output amplifiers circuit  607 .  
     [0048] Referring to FIG. 12, the L+R main audio channel signal  107 , the compressed and modulated L−R audio sub-channel signal  113 , and the pilot signal  127  are fed to the inverting input of the summing amplifier (U 5 B) of the summing amplifier circuit  601  via three resistors (R 36 , R 41 , and R 44 ). A feedback resistor (R 49 ) of amplifier circuit  601  provides a gain of about 12. A capacitor (C 51 ) decouples the +5.0 Volts DC power supply (+V cc ), while a circuit (R 37 /R 42 /C 38 ) of bias and filter circuit  603  biases the amplifier (U 5 B) to ½ of +V cc .  
     [0049] The summed audio signal  605  shown in FIG. 6, is AC coupled (C 53 ) to the buffer &amp; output amplifier circuit  607  and fed (via R 56 ) to inverting input of an amplifier (U 5 A) of buffer &amp; output amplified circuit  607 . A capacitor (C 35 ) decouples the +5.0 Volts DC power supply (+V cc ) and resistors (R 37 /R 42 ) bias the amplifier (U 5 A) to ½ of +V cc . A feedback resistor (R 51 ) provides a gain of about 5. The output of the amplifier (U 5 A) is the composite stereo audio signal  129 , which is AC coupled (C 55 ) to the RF Modulator &amp; Output Amplifier  131  shown in FIG. 1.  
     [0050]FIG. 7 is a plot of the signature audio frequency response of system  100  as described herein. Through unique treatment and implementation of the pre-emphasis characteristics of the L−R audio sub-channel noise reduction circuit, system  100  generates a composite audio signal with a unique audio frequency response that occupies the entire 15 KHz audio range.  
     [0051] As shown in FIG. 1, the composite stereo audio signal  129  can be coupled to an RF Modulator and Output Amplifier circuit  131 . Referring to FIG. 13, in an embodiment of the present invention, the composite stereo audio signal  129  of FIG. 1 is coupled to a specifically designed Motorola RF modulator chip (U 8 ), which combines the video and audio input sources and modulates them onto an NTSC compliant VHF/UHF carrier.  
     [0052] The RF modulator chip (U 8 ) user interface and internal functions are controlled by an external microcontroller or microprocessor  133  of FIG. 1 via the I 2 C bus. Video input is AC coupled (C 61 ) to the RF modulator chip (U 8 ) from the YELLOW female RCA jack on J 1  via a terminator resistor (R 57 ). The composite stereo audio signal  129  is input to RF modulator chip (U 8 ) via Pin # 10 . The oscillator is set to a frequency of 4.000 MHz (via Y 1 /C 68 ) and the RF PLL loop filter is controlled by C 65 /C 66 /R 62 . The audio section PLL loop filter is determined by C 62 /C 69 /R 59 . Loop lock is visually indicated by D 4 /R 52 . Capacitors (C 60 /C 67 ) decouple the power supply. The RF output is AC coupled (C 63 ) to an RF amplifier (U 7 ) that is biased via R 58 /L 1 . The RF amplifier (U 7 ) output is AC coupled (C 57 ) to P 1  (Pin # 20 ) in FIG. 9.  
     [0053] The embodiment described herein is merely exemplary in that the invention contemplates all known variations of discrete component values and known combinations of discrete components for performing the described signal control functions. These variations and combinations are known to those skilled in the art and are within the scope of the invention as set forth herein.