Patent Publication Number: US-11650044-B2

Title: CMOS image sensor for 2D imaging and depth measurement with ambient light rejection

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 16/838,025, filed Apr. 1, 2020 which is a continuation of U.S. patent application Ser. No. 16/186,477, filed Nov. 9, 2018, now issued as U.S. Pat. No. 10,704,896, which is a continuation of U.S. patent application Ser. No. 14/842,825, filed Sep. 1, 2015, now issued as U.S. Pat. No. 10,132,616, which claims the priority benefit under 35 U.S.C. § 119(e) of U.S. Provisional Application No. 62/150,252 filed on Apr. 20, 2015, and U.S. Provisional Application No. 62/182,404 filed on Jun. 19, 2015, the disclosures of all of which are incorporated herein by reference in their entireties. 
    
    
     TECHNICAL FIELD 
     The present disclosure generally relates to image sensors. More specifically, and not by way of limitation, particular embodiments of the inventive aspects disclosed in the present disclosure are directed to a Complementary Metal Oxide Semiconductor (CMOS) image sensor in which each pixel may be used for two-dimensional (2D) imaging as well as point-scan based three-dimensional (3D) depth measurements with ambient light rejection. 
     BACKGROUND 
     Three-dimensional (3D) imaging systems are increasingly being used in a wide variety of applications such as, for example, industrial production, video games, computer graphics, robotic surgeries, consumer displays, surveillance videos, 3D modeling, real estate sales, and so on. 
     Existing 3D imaging technologies may include, for example, the time-of-flight (TOF) based range imaging, stereo vision systems, and structured light (SL) methods. 
     In the TOF method, distance to a 3D object is resolved based on the known speed of light—by measuring the round-trip time it takes for a light signal to travel between a camera and the 3D object for each point of the image. A TOF camera may use a scannerless approach to capture the entire scene with each laser or light pulse. Some example applications of the TOF method may include advanced automotive applications such as active pedestrian safety or pre-crash detection based on distance images in real time, to track movements of humans such as during interaction with games on video game consoles, in industrial machine vision to classify objects and help robots find the items such as items on a conveyor belt, and so on. 
     In stereoscopic imaging or stereo vision systems, two cameras—displaced horizontally from one another—are used to obtain two differing views on a scene or a 3D object in the scene. By comparing these two images, the relative depth information can be obtained for the 3D object. Stereo vision is highly important in fields such as robotics, to extract information about the relative position of 3D objects in the vicinity of autonomous systems/robots. Other applications for robotics include object recognition, where stereoscopic depth information allows a robotic system to separate occluding image components, which the robot may otherwise not be able to distinguish as two separate objects—such as one object in front of another, partially or fully hiding the other object. 3D stereo displays are also used in entertainment and automated systems. 
     In the SL approach, the 3D shape of an object may be measured using projected light patterns and a camera for imaging. In the SL method, a known pattern of light—often grids or horizontal bars or patterns of parallel stripes—is projected onto a scene or a 3D object in the scene. The projected pattern may get deformed or displaced when striking the surface of the 3D objet. Such deformation may allow an SL vision system to calculate the depth and surface information of the object. Thus, projecting a narrow band of light onto a 3D surface may produce a line of illumination that may appear distorted from other perspectives than that of the projector, and can be used for geometric reconstruction of the illuminated surface shape. The SL-based 3D imaging maybe used in different applications such as, for example, by a police force to photograph fingerprints in a 3D scene, inline inspection of components during a production process, in health care for live measurements of human body shapes or the micro structures of human skin, and the like. 
     SUMMARY 
     In one embodiment, the present disclosure is directed to a method that comprises: (i) providing an image sensor to capture a two-dimensional (2D) image of a three-dimensional (3D) object illuminated by ambient light, wherein the image sensor has a plurality of pixels arranged in a 2D array; (ii) further providing a laser light source to illuminate the 3D object using a point scan with light from the laser source, wherein the light from the laser source is in addition to the ambient light; and (iii) determining a depth of the 3D object, illuminated by the ambient and laser lights, using at least one row of pixels in the image sensor. 
     In another embodiment, the present disclosure is directed to a method that comprises: (i) configuring an image sensor to capture a 2D color image of a 3D object illuminated by ambient light, wherein the image sensor has a plurality of pixels arranged in a 2D array; (ii) determining an illuminance level of the ambient light; (iii) preparing the image sensor to operate in one of the following modes: (a) a linear mode of operation when the ambient light is at or below a pre-defined illuminance level, and (b) a logarithmic mode of operation when the ambient light is above the pre-defined illuminance level; (iv) configuring a visible light source to illuminate the 3D object using a point scan with visible light, wherein the visible light is in addition to the ambient light; (v) generating a pixel-specific output for each pixel in a row of pixels in the image sensor using either the linear mode of operation or the logarithmic mode of operation; and (vi) determining a depth of the 3D object, illuminated by the ambient and visible lights, based on the pixel-specific output of each pixel in the row of pixels. 
     In a further embodiment, the present disclosure is directed to a system, which comprises: (i) an image sensor operative to capture a 2D image of a 3D object illuminated by ambient light, wherein the image sensor has a plurality of pixels arranged in a 2D array; (ii) a laser light source operative to illuminate the 3D object using a point scan with laser light, wherein the laser light is in addition to the ambient light; and (iii) a processing unit operative to determine a depth of the 3D object, illuminated by the ambient and laser lights, using at least one row of pixels in the image sensor. In the system, the laser light source is one of the following: a visible laser light source, a near infrared laser light source, a point light source, a monochromatic illumination source, or an X-Y addressable laser light source. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       In the following section, the inventive aspects of the present disclosure will be described with reference to exemplary embodiments illustrated in the figures, in which: 
         FIG.  1    shows a highly simplified, partial layout of a system according to one embodiment of the present disclosure; 
         FIG.  2    illustrates an exemplary operational layout of the system in  FIG.  1    according to one embodiment of the present disclosure; 
         FIG.  3    is an exemplary illustration of how a point scan may be performed for 3D depth measurements according to one embodiment of the present disclosure; 
         FIG.  4    illustrates an exemplary time-stamping for scanned light spots according to one embodiment of the present disclosure; 
         FIG.  5    shows exemplary circuit details of the 2D pixel array and a portion of the associated processing circuits in the image processing unit of the image sensor in  FIGS.  1 - 2    according to one embodiment of the present disclosure; 
         FIG.  6 A  is an exemplary layout of an image sensor unit according to one embodiment of the present disclosure; 
         FIG.  6 B  shows architectural details of an exemplary CDS+ADC unit for 3D depth measurement according to one embodiment of the present disclosure; 
         FIG.  7    is a timing diagram that shows exemplary timing of different signals in the system of  FIGS.  1 - 2    to generate timestamp-based pixel-specific outputs in a 3D linear mode of operation according to particular embodiments of the present disclosure; 
         FIG.  8    shows an exemplary Look-Up Table (LUT) to illustrate how an LUT may be used in particular embodiments of the present disclosure to determine 3D depth values; 
         FIG.  9    depicts an exemplary flowchart showing how the same image sensor may be used for both 2D imaging and 3D depth measurements according to one embodiment of the present disclosure; 
         FIG.  10    is a timing diagram that shows exemplary timing of different signals in the system of  FIGS.  1 - 2    to generate a 2D RGB image using a 2D linear mode of operation according to particular embodiments of the present disclosure; 
         FIG.  11    is a timing diagram that shows exemplary timing of different signals in the system of  FIGS.  1 - 2    to generate timestamp-based pixel-specific outputs in a 3D logarithmic (log) mode of operation according to particular embodiments of the present disclosure; and 
         FIG.  12    depicts an overall layout of the system in  FIGS.  1 - 2    according to one embodiment of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the disclosure. However, it will be understood by those skilled in the art that the disclosed inventive aspects may be practiced without these specific details. In other instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present disclosure. Additionally, the described inventive aspects can be implemented to perform low power, 3D depth measurements in any imaging device or system, including, for example, a smartphone, a User Equipment (UE), a laptop computer, and the like. 
     Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” or “according to one embodiment” (or other phrases having similar import) in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Also, depending on the context of discussion herein, a singular term may include its plural forms and a plural term may include its singular form. Similarly, a hyphenated term (e.g., “two-dimensional,” “pre-determined”, “pixel-specific,” etc.) may be occasionally interchangeably used with its non-hyphenated version (e.g., “two dimensional,” “predetermined”, “pixel specific,” etc.), and a capitalized entry (e.g., “Counter Clock,” “Row Select,” “PIXOUT,” etc.) may be interchangeably used with its non-capitalized version (e.g., “counter clock,” “row select,” “pixout,” etc.). Such occasional interchangeable uses shall not be considered inconsistent with each other. 
     It is noted at the outset that the terms “coupled,” “operatively coupled,” “connected”, “connecting,” “electrically connected,” etc., may be used interchangeably herein to generally refer to the condition of being electrically/electronically connected in an operative manner. Similarly, a first entity is considered to be in “communication” with a second entity (or entities) when the first entity electrically sends and/or receives (whether through wireline or wireless means) information signals (whether containing address, data, or control information) to/from the second entity regardless of the type (analog or digital) of those signals. It is further noted that various figures (including component diagrams) shown and discussed herein are for illustrative purpose only, and are not drawn to scale. Similarly, various waveforms and timing diagrams are shown for illustrative purpose only. 
     The terms “first,” “second,” etc., as used herein, are used as labels for nouns that they precede, and do not imply any type of ordering (e.g., spatial, temporal, logical, etc.) unless explicitly defined as such. Furthermore, the same reference numerals may be used across two or more figures to refer to parts, components, blocks, circuits, units, or modules having the same or similar functionality. However, such usage is for simplicity of illustration and ease of discussion only; it does not imply that the construction or architectural details of such components or units are the same across all embodiments or such commonly-referenced parts/modules are the only way to implement the teachings of particular embodiments of the present disclosure. 
     It is observed here that the earlier-mentioned 3D technologies have many drawbacks. For example, a TOF-based 3D imaging system may require high power to operate optical or electrical shutters. These systems typically operate over a range of few meters to several tens of meters, but the resolution of these systems decreases for measurements over short distances, thereby making 3D imaging within a distance of about one meter almost impractical. Hence, a TOF system may not be desirable for cell phone-based camera applications, where pictures are pre-dominantly taken at close distances. A TOF sensor may also require special pixels with big pixel sizes, usually larger than 7 μm. These pixels also may be vulnerable to ambient light. 
     The stereoscopic imaging approach generally works only with textured surfaces. It has high computational complexity because of the need to match features and find correspondences between the stereo pair of images of an object. This requires high system power, which is not a desirable attribute where power conservation is needed, such as in smartphones. Furthermore, stereo imaging requires two regular, high bit resolution sensors along with two lenses, making the entire assembly unsuitable for applications in portable devices, like cell phones or tablets, where device real estate is at a premium. 
     The SL approach introduces distance ambiguity, and also requires high system power. For 3D depth measurements, the SL method may need multiple images with multiple patterns—all of these increase computational complexity and power consumption. Furthermore, the SL imaging may also require regular image sensors with high bit resolution. Thus, a structured light-based system may not be suitable for low-cost, low-power, compact image sensors in smartphones. 
     In contrast to the above-mentioned 3D technologies, particular embodiments of the present disclosure provide for implementing a low power, 3D imaging system on portable electronic devices such as smartphones, tablets, UEs, and the like. A 2D imaging sensor as per particular embodiments of the present disclosure can capture both 2D RGB (Red, Green, Blue) images and 3D depth measurements with visible light laser scanning, while being able to reject ambient light during 3D depth measurements. It is noted here that although the following discussion may frequently mention the visible light laser as a light source for point-scans and a 2D RGB sensor as an image/light capture device, such mention is for the purpose of illustration and consistency of discussion only. The visible laser and RGB sensor based examples discussed below may find applications in low-power, consumer-grade mobile electronic devices with cameras such as, for example, smartphones, tablets, or UEs. However, it is understood that the teachings of the present disclosure are not limited to the visible laser-RGB sensor based examples mentioned below. Rather, according to particular embodiments of the present disclosure, the point scan-based 3D depth measurements and the ambient light rejection methodology may be performed using many different combinations of 2D sensors and laser light sources (for point scans) such as, for example: (i) a 2D color (RGB) sensor with a visible light laser source, in which the laser source may be a red (R), green (G), or blue (B) light laser, or a laser source producing a combination of these lights; (ii) a visible light laser with a 2D RGB color sensor having an Infrared (IR) cut filter; (iii) a Near Infrared (NIR) laser with a 2D IR sensor; (iv) an NIR laser with a 2D NIR sensor; (v) an NIR laser with a 2D RGB sensor (without an IR cut filter); (vi) an NIR laser with a 2D RGB sensor (without an NIR cut filter); (vii) a 2D RGB-IR sensor with visible or NIR laser; (viii) a 2D RGBW (red, green, blue, white) sensor with either visible or NIR laser; and so on. 
     During 3D depth measurements, the entire sensor may operate as a binary sensor in conjunction with the laser scan to reconstruct 3D content. In particular embodiments, the pixel size of the sensor can be as small as 1 μm. Furthermore, due to lower bit resolution, the Analog-to-Digital Converter (ADC) units in the image sensor according to particular embodiments of the present disclosure may require significantly much lower processing power than that is needed for high bit resolution sensors in traditional 3D imaging systems. Because of the need for less processing power, the 3D imaging module according to present disclosure may require low system power and, hence, may be quite suitable for inclusion in low power devices like smartphones. 
     In particular embodiments, the present disclosure uses triangulation and point scans with a laser light source for 3D depth measurements with a group of line sensors. The laser scanning plane and the imaging plane are oriented using epipolar geometry. An image sensor according to one embodiment of the present disclosure may use timestamps to remove ambiguity in the triangulation approach, thereby reducing the amount of depth computations and system power. The same image sensor—that is, each pixel in the image sensor—may be used in the normal 2D (RGB color or non-RGB) imaging mode as well as in the 3D laser scan mode. However, in the laser scan mode, the resolution of the ADCs in the image sensor is reduced to a binary output (1-bit resolution only), thereby improving the readout speed and reducing power consumption—for example, due to switching in the ADC units—in the chip incorporating the image sensor and associated processing units. Furthermore, the point scan approach may allow the system to take all measurements in one pass, thereby reducing the latency for depth measurements and reducing motion blur. 
     As noted before, in particular embodiments, the entire image sensor may be used for routine 2D RGB color imaging using, for example, ambient light, as well as for 3D depth imaging using visible laser scan. Such dual use of the same camera unit may save space and cost for mobile devices. Furthermore, in certain applications, the user of visible laser for 3D applications may be better for a user&#39;s eye safety as compared to a Near Infrared (NIR) laser. The sensor may have higher quantum efficiency at visible spectrum that at the NIR spectrum, leading to lower power consumption of the light source. In one embodiment, the dual-use image sensor may work in a linear mode of operation for 2D imaging—as a regular 2D sensor. However, for 3D imaging, the sensor may work in linear mode under moderate lighting condition and in logarithmic mode under strong ambient light to facilitate continued use of the visible laser source through rejection of the strong ambient light. Furthermore, ambient light rejection may be needed in case of an NIR laser as well, for example, when the bandwidth of the pass band of an IR-cut filter employed with an RGB sensor is not narrow enough. 
       FIG.  1    shows a highly simplified, partial layout of a system  15  according to one embodiment of the present disclosure. As shown, the system  15  may include an imaging module  17  coupled to and in communication with a processor or host  19 . The system  15  may also include a memory module  20  coupled to the processor  19  to store information content such as, for example, image data received from the imaging module  17 . In particular embodiments, the entire system  15  may be encapsulated in a single Integrated Circuit (IC) or chip. Alternatively, each of the modules  17 ,  19 , and  20  may be implemented in a separate chip. Furthermore, the memory module  20  may include more than one memory chip, and the processor module  19  may comprise of multiple processing chips as well. In any event, the details about packaging of the modules in  FIG.  1    and how they are fabricated or implemented—in a single chip or using multiple discrete chips—are not relevant to the present discussion and, hence, such details are not provided herein. 
     The system  15  may be any low power, electronic device configured for 2D and 3D camera applications as per teachings of the present disclosure. The system  15  may be portable or non-portable. Some examples of the portable version of the system  15  may include popular consumer electronic gadgets such as, for example, a mobile device, a cellphone, a smartphone, a User Equipment (UE), a tablet, a digital camera, a laptop or desktop computer, an electronic smartwatch, a Machine-to-Machine (M2M) communication unit, a Virtual Reality (VR) equipment or module, a robot, and the like. On the other hand, some examples of the non-portable version of the system  15  may include a game console in a video arcade, an interactive video terminal, an automobile, a machine vision system, an industrial robot, a VR equipment, a driver-side mounted camera in a car (for example, to monitor whether the driver is awake or not), and so on. The 3D imaging functionality provided as per teachings of the present disclosure may be used in many applications such as, for example, virtual reality applications on a virtual reality equipment, online chatting/gaming, 3D texting, searching an online or local (device-based) catalog/database using a product&#39;s 3D image to obtain information related to the product (for example, calorie content of a piece of food item), robotics and machine vision applications, automobile applications such as autonomous driving applications, and the like. 
     In particular embodiments of the present disclosure, the imaging module  17  may include a light source  22  and an image sensor unit  24 . As discussed in more detail with reference to  FIG.  2    below, in one embodiment, the light source  22  may be a visible laser. In other embodiments, the light source may be an NIR laser. The image sensor unit  24  may include a pixel array and ancillary processing circuits as shown in  FIG.  2    and also discussed below. 
     In one embodiment, the processor  19  may be a CPU, which can be a general purpose microprocessor. In the discussion herein, the terms “processor” and “CPU” may be used interchangeably for ease of discussion. However, it is understood that, instead of or in addition to the CPU, the processor  19  may contain any other type of processors such as, for example, a microcontroller, a Digital Signal Processor (DSP), a Graphics Processing Unit (GPU), a dedicated Application Specific Integrated Circuit (ASIC) processor, and the like. Furthermore, in one embodiment, the processor/host  19  may include more than one CPU, which may be operative in a distributed processing environment. The processor  19  may be configured to execute instructions and to process data according to a particular Instruction Set Architecture (ISA) such as, for example, an x86 instruction set architecture (32-bit or 64-bit versions), a PowerPC® ISA, or a MIPS (Microprocessor without Interlocked Pipeline Stages) instruction set architecture relying on RISC (Reduced Instruction Set Computer) ISA. In one embodiment, the processor  19  may be a System on Chip (SoC) having functionalities in addition to a CPU functionality. 
     In particular embodiments, the memory module  20  may be a Dynamic Random Access Memory (DRAM) such as, for example, a Synchronous DRAM (SDRAM), or a DRAM-based Three Dimensional Stack (3DS) memory module such as, for example, a High Bandwidth Memory (HBM) module, or a Hybrid Memory Cube (HMC) memory module. In other embodiments, the memory module  20  may be a Solid State Drive (SSD), a non-3DS DRAM module, or any other semiconductor-based storage system such as, for example, a Static Random Access Memory (SRAM), a Phase-Change Random Access Memory (PRAM or PCRAM), a Resistive Random Access Memory (RRAM or ReRAM), a Conductive-Bridging RAM (CBRAM), a Magnetic RAM (MRAM), a Spin-Transfer Torque MRAM (STT-MRAM), and the like. 
       FIG.  2    illustrates an exemplary operational layout of the system  15  in  FIG.  1    according to one embodiment of the present disclosure. The system  15  may be used to obtain depth information (along the Z-axis) for a 3D object, such as the 3D object  26 , which may be an individual object or an object within a scene (not shown). In one embodiment, the depth information may be calculated by the processor  19  based on the scan data received from the image sensor unit  24 . In another embodiment, the depth information may be calculated by the image sensor unit  24  itself such as, for example, in case of the image sensor unit in the embodiment of  FIG.  6 A . In particular embodiments, the depth information may be used by the processor  19  as part of a 3D user interface to enable the user of the system  15  to interact with the 3D image of the object or use the 3D image of the object as part of games or other applications running on the system  15 . The 3D imaging as per teachings of the present disclosure may be used for other purposes or applications as well, and may be applied to substantially any scene or 3D objects. 
     In  FIG.  2   , the X-axis is taken to be the horizontal direction along the front of the device  15 , the Y-axis is the vertical direction (out of the page in this view), and the Z-axis extends away from the device  15  in the general direction of the object  26  being imaged. For the depth measurements, the optical axes of the modules  22  and  24  may be parallel to the Z-axis. Other optical arrangements may be used as well to implement the principles described herein, and these alternative arrangements are considered to be within the scope of the present disclosure. 
     The light source module  22  may illuminate the 3D object  26  as shown by exemplary arrows  28 - 29  associated with corresponding dotted lines  30 - 31  representing an illumination path of a light beam or optical radiation that may be used to point scan the 3D object  26  within an optical field of view. A line-by-line point scan of the object surface may be performed using an optical radiation source, which, in one embodiment, may be a laser light source  33  operated and controlled by a laser controller  34 . A light beam from the laser source  33  may be point scanned—under the control of the laser controller  34 —in the X-Y direction across the surface of the 3D object  26  via projection optics  35 . The point scan may project light spots on the surface of the 3D object along a scan line, as discussed in more detail with reference to  FIGS.  3 - 4    below. The projection optics may be a focusing lens, a glass/plastics surface, or other cylindrical optical element that concentrates laser beam from the laser  33  as a point or spot on that surface of the object  26 . In the embodiment of  FIG.  2   , a convex structure is shown as a focusing lens  35 . However, any other suitable lens design may be selected for projection optics  35 . The object  26  may be placed at a focusing location where illuminating light from the light source  33  is focused by the projection optics  35  as a light spot. Thus, in the point scan, a point or narrow area/spot on the surface of the 3D object  26  may be illuminated sequentially by the focused light beam from the projection optics  35 . 
     In particular embodiments, the light source (or illumination source)  33  may be a diode laser or a Light Emitting Diode (LED) emitting visible light, an NIR laser, a point light source, a monochromatic illumination source (such as, for example, a combination of a white lamp and a monochromator) in the visible light spectrum, or any other type of laser light source. The laser  33  may be fixed in one position within the housing of the device  15 , but may be rotatable in X-Y directions. The laser  33  may be X-Y addressable (for example, by the laser controller  34 ) to perform point scan of the 3D object  26 . In one embodiment, the visible light may be substantially green light. The visible light illumination from the laser source  33  may be projected onto the surface of the 3D object  26  using a mirror (not shown), or the point scan may be completely mirror-less. In particular embodiments, the light source module  22  may include more or less components than those shown in the exemplary embodiment of  FIG.  2   . 
     In the embodiment of  FIG.  2   , the light reflected from the point scan of the object  26  may travel along a collection path indicated by arrows  36 - 37  and dotted lines  38 - 39 . The light collection path may carry photons reflected from or scattered by the surface of the object  26  upon receiving illumination from the laser source  33 . It is noted here that the depiction of various propagation paths using solid arrows and dotted lines in  FIG.  2    (and also in  FIGS.  3 - 4   , as applicable) is for illustrative purpose only. The depiction should not be construed to illustrate any actual optical signal propagation paths. In practice, the illumination and collection signal paths may be different from those shown in  FIG.  2   , and may not be as clearly-defined as in the illustration in  FIG.  2   . 
     The light received from the illuminated object  26  may be focused onto one or more pixels of a 2D pixel array  42  via collection optics  44  in the image sensor unit  24 . Like the projection optics  35 , the collection optics  44  may be a focusing lens, a glass/plastics surface, or other cylindrical optical element that concentrates the reflected light received from the object  26  onto one or more pixels in the 2D array  42 . In the embodiment of  FIG.  2   , a convex structure is shown as a focusing lens  44 . However, any other suitable lens design may be selected for collection optics  44 . Furthermore, for ease of illustration, only a 3×3 pixel array is shown in  FIG.  2    (and also in  FIG.  5   ). However, it is understood that, modern pixel arrays contain thousands or even millions of pixels. The pixel array  42  may be an RGB pixel array, in which different pixels may collect light signals of different colors. As mentioned before, in particular embodiments, the pixel array  42  may be any 2D sensor such as, for example, a 2D RGB sensor with IR cut filter, a 2D IR sensor, a 2D NIR sensor, a 2D RGBW sensor, a 2D RGB-IR sensor, and the like. As discussed in more detail later, the system  15  may use the same pixel array  42  for 2D RGB color imaging of the object  26  (or a scene containing the object) as well as for 3D imaging (involving depth measurements) of the object  26 . Additional architectural details of the pixel array  42  are discussed later with reference to  FIG.  5   . 
     The pixel array  42  may convert the received photons into corresponding electrical signals, which are then processed by the associated image processing unit  46  to determine the 3D depth image of the object  26 . In one embodiment, the image processing unit  46  may use triangulation for depth measurements. The triangulation approach is discussed later with reference to  FIG.  3   . The image processing unit  46  may also include relevant circuits for controlling the operation of the pixel array  42 . Exemplary image processing and control circuits are illustrated in  FIGS.  6 A- 6 B , which are discussed later below. 
     The processor  19  may control the operations of the light source module  22  and the image sensor unit  24 . For example, the system  15  may have a mode switch (not shown) controllable by the user to switch from 2D imaging mode to 3D imaging mode. When the user selects the 2D imaging mode using the mode switch, the processor  19  may activate the image sensor unit  24 , but may not activate the light source module  22  because 2D imaging may use ambient light. On the other hand, when the user selects 3D imaging using the mode switch, the processor  19  may activate both of the modules  22 ,  24 , and may also trigger change in the level of the Reset (RST) signal in the image processing unit  46  to switch from linear mode to logarithmic mode of imaging, for example, when the ambient light is too strong to be rejected by linear mode (as discussed below). The processed image data received from the image processing unit  46  may be stored by the processor  19  in the memory  20 . The processor  19  may also display the user-selected 2D or 3D image on a display screen (not shown) of the device  15 . The processor  19  may be programmed in software or firmware to carry out various processing tasks described herein. Alternatively or additionally, the processor  19  may comprise programmable hardware logic circuits for carrying out some or all of its functions. In particular embodiments, the memory  20  may store program code, look-up tables (like the one showed in  FIG.  8    and discussed later), and/or interim computational results to enable the processor  19  to carry out its functions. 
     Briefly, the system  15  (more specifically, the processor  19 ) may perform a one-dimensional (1D) point scan of a 3D object, such as the object  26  in  FIG.  2   , along a scanning line using a light source, such as the light source module  22  in  FIG.  2   . As part of the point scan, the light source module  22  may be configured, for example, by the processor  19 , to project a sequence of light spots on a surface of the 3D object  26  in a line-by-line manner. The pixel processing unit  46  in the system  15  may select a row of pixels in an image sensor, such as the 2D pixel array  42  in  FIG.  2   . The image sensor  42  has a plurality of pixels arranged in a 2D array forming an image plane, and the selected row of pixels forms an epipolar line of the scanning line on the image plane. A brief discussion of epipolar geometry is provided below with reference to  FIG.  3   . The pixel processing unit  46  may be operatively configured by the processor  19  to detect each light spot using a corresponding pixel in the row of pixels. It is observed here that light reflected from an illuminated light spot may be detected by a single pixel or more than one pixel such as, for example, when the light reflected from the illuminated spot gets focused by the collection optics  44  onto two or more adjacent pixels. On the other hand, it may be possible that light reflected from two or more light spots may be collected at a single pixel in the 2D array  42 . The timestamp-based approach discussed below removes depth calculation-related ambiguities resulting from imaging of two different spots by the same pixel or imaging of a single spot by two different pixels. The image processing unit  46 —as suitably configured by the processor  19 —may generate a pixel-specific output in response to a pixel-specific detection of a corresponding light spot in the sequence of light spots. Consequently, the image processing unit  46  may determine the 3D distance (or depth) to the corresponding light spot on the surface of the 3D object based at least on the pixel-specific output and on a scan angle used by the light source for projecting the corresponding light spot. The depth measurement is discussed in more detail with reference to  FIG.  3   . 
       FIG.  3    is an exemplary illustration of how a point scan may be performed for 3D depth measurements according to one embodiment of the present disclosure. In  FIG.  3   , the X-Y rotational capabilities of the laser source  33  are illustrated using the arrows  62 ,  64  depicting the laser&#39;s angular motions in the X-direction (having angle “β”) and in the Y-direction (having angle “α”). In one embodiment, the laser controller  34  may control the X-Y rotation of the laser source  33  based on scanning instructions/input received from the processor  19 . For example, when the user selects 3D imaging mode, the processor  19  may instruct the laser controller  34  to initiate 3D depth measurements of the object surface facing the projection optics  35 . In response, the laser controller  34  may initiate a 1D X-Y point scan of the object surface through X-Y movement of the laser light source  33 . As shown in  FIG.  3   , the laser  33  may point scan the surface of the object  26  by projecting light spots along 1D horizontal scanning lines—two of which S R    66  and S R+1    68  are identified by dotted lines in  FIG.  3   . Because of the curvature of the surface of the object  26 , the light spots  70 - 73  may form the scanning line S R    66  in  FIG.  3   . For ease of illustration and clarity, the light spots constituting the scan line S R+1    68  are not identified using reference numerals. The laser  33  may scan the object  26  along rows R, R+1, and so on, one spot at a time—for example, in the left-to-right direction. The values of “R”, “R+1”, and so on, are with reference to rows of pixels in the 2D pixel array  42  and, hence, these values are known. For example, in the 2D pixel array  42  in  FIG.  3   , the pixel row “R” is identified using reference numeral “75” and the row “R+1” is identified using reference numeral “76.” It is understood that rows “R” and “R+1” are selected from the plurality of rows of pixels for illustrative purpose only. 
     The plane containing the rows of pixels in the 2D pixel array  42  may be called the image plane, whereas the plane containing the scanning lines, like the lines S R  and S R+1 , may be called the scanning plane. In the embodiment of  FIG.  3   , the image plane and the scanning plane are oriented using epipolar geometry such that each row of pixels R, R+1, and so on, in the 2D pixel array  42  forms an epipolar line of the corresponding scanning line S R , S R+1 , and so on. A row of pixels “R” may be considered epipolar to a corresponding scanning line “S R ” when a projection of an illuminated spot (in the scanning line) onto the image plane may form a distinct spot along a line that is the row “R” itself. For example, in  FIG.  3   , the arrow  78  illustrates the illumination of the light spot  71  by the laser  33 , whereas the arrow  80  shows that the light spot  71  is being imaged or projected along the row “R”  75  by the focusing lens  44 . Although not shown in  FIG.  3   , it is observed that all of the light spots  70 - 73  will be imaged by corresponding pixels in the row “R.” Thus, in one embodiment, the physical arrangement, such as the position and orientation, of the laser  33  and the pixel array  42  may be such that illuminated light spots in a scanning line on the surface of the object  26  may be captured or detected by pixels in a corresponding row in the pixel array  42 —that row of pixels thus forming an epipolar line of the scanning line. 
     It is understood that the pixels in the 2D pixel array  42  may be arranged in rows and columns. An illuminated light spot may be referenced by its corresponding row and column in the pixel array  42 . For example, in  FIG.  3   , the light spot  71  in the scanning line S R  is designated as “X R,i ” to indicate that the spot  71  may be imaged by row “R” and column “i” (C i ) in the pixel array  42 . The column C i  is indicated by dotted line  82 . Other illuminated spots may be similarly identified. As noted before, it may be possible that light reflected from two or more lights spots may be received by a single pixel in a row, or, alternatively, light reflected from a single light spot may be received by more than one pixel in a row of pixels. The timestamp-based approach discussed later may remove the ambiguities in depth calculations arising from such multiple or overlapping projections. 
     In the illustration of  FIG.  3   , the arrow having reference numeral “ 84 ” represents the depth or distance “Z” (along the Z-axis) of the light spot  71  from the X-axis along the front of the device  15 —such as the X-axis shown in  FIG.  2   . In  FIG.  3   , a dotted line having the reference numeral “86” represents such axis, which may be visualized as being contained in a vertical plane that also contains the projection optics  35  and the collection optics  44 . However, for ease of explanation of the triangulation method, the laser source  33  is shown in  FIG.  3    as being on the X-axis  86  instead of the projection optics  35 . In a triangulation-based approach, the value of “Z” may be determined using the following equation: 
                   Z   =       h   ⁢   d       q   -     h   ⁢   tan   ⁢   θ                 (   1   )               
The parameters mentioned in the above equation (1) are also shown in  FIG.  3   . Based on the physical configuration of the device  15 , the values for the parameters on the right-hand side of equation (1) may be pre-determined. In equation (1), the parameter “h” is the distance (along the Z-axis) between the collection optics  44  and the image sensor (which is assumed to be in a vertical plane behind the collection optics  44 ); the parameter “d” is the offset distance between the light source  33  and the collection optics  44  associated with the image sensor  24 ; the parameter “q” is the offset distance between the collection optics  44  and a pixel that detects the corresponding light spot—here, the detecting/imaging pixel “i” is represented by column C i  associated with the light spot X R,i    71 ; and the parameter “θ” is the scan angle or beam angle of the light source for the light spot under consideration—here, the light spot  71 . Alternatively, the parameter “q” may also be considered as the offset of the light spot within the field of view of the pixel array  42 .
 
     It is seen from equation (1) that only the parameters “θ” and “q” are variable for a given point scan; the other parameters “h” and “d” are essentially fixed due to the physical geometry of the device  15 . Because the row “R”  75  is an epipolar line of the scanning line S R , the depth difference or depth profile of the object  26  may be reflected by the image shift in the horizontal direction—as represented by the values of the parameter “q” for different lights spots being imaged. As discussed later below, the time-stamp based approach according to particular embodiments of the present disclosure may be used to find the correspondence between the pixel location of a captured light spot and the corresponding scan angle of the laser source  33 . In other words, a timestamp may represent an association between the values of parameters “q” and “θ”. Thus, from the known value of the scan angle “θ” and the corresponding location of the imaged light spot (as represented by the parameter “q”), the distance to that light spot may be determined using the triangulation equation (1). 
     It is observed here that usage of triangulation for distance measurements is described in the relevant literature including, for example, the United States Patent Application Publication No. US 2011/0102763 to Brown et al. The discussion in the Brown publication related to triangulation-based distance measurement is incorporated herein by reference in its entirety. 
       FIG.  4    illustrates an exemplary time-stamping for scanned light spots according to one embodiment of the present disclosure. Additional details of generation of individual timestamps are provided later such as, for example, with reference to discussion of  FIG.  7   . In contrast to  FIG.  3   , in the embodiment of  FIG.  4   , the collection optics  44  and the laser  33  are shown in an offset arrangement to reflect the actual physical geometry of these components as shown in the embodiment of  FIG.  2   . By way of an example, the scanning line  66  is shown in  FIG.  4    along with corresponding light spots  70 - 73 , which, as mentioned before, may be projected based on a left-to-right point scan of the object surface by the sparse laser point source  33 . Thus, as shown, the first light spot  70  may be projected at time instant “t 1 ,” the second light spot  71  may be projected at time instant “t 2 ,” and so on. These light spots may be detected/imaged by respective pixels  90 - 93  in the pixel row “R”  75 —which is an epipolar line of the scanning line S R  as discussed earlier. In one embodiment, the charge collected by each pixel when detecting a light spot may be in the form of an analog voltage, which may be output to the image processing unit  46  for pixel-specific depth determination as discussed below. The analog pixel outputs (pixouts) are collectively indicated by arrow  95  in  FIG.  4   . 
     As shown in  FIG.  4   , each detecting pixel  90 - 93  in row R may have an associated column number—here, columns C 1  through C 4 . Furthermore, it is seen from  FIG.  3    that each pixel column C i  (i=1, 2, 3, and so on) has an associated value for the parameter “q” in equation (1). Thus, when a pixel-specific timestamp t 1 -t 4  is generated for the detecting pixels  90 - 93  (as discussed in more detail later below), the timestamp may provide an indication of the pixel&#39;s column number and, hence, the pixel-specific value of the parameter “q.” Additionally, in one embodiment, the spot-by-spot detection using pixels in the pixel array  42  may allow the image processing unit  46  to “link” each timestamp with the corresponding illuminated spot and, hence, with the spot-specific scan angle “θ”—because the laser  33  may be suitably controlled to illuminate each spot in the desired sequence with pre-determined values for spot-specific scan angles “θ”. Thus, timestamps provide correspondence between the pixel location of a captured laser spot and its respective scan angle—in the form of the values for parameters “q” and “θ” in equation (1) for each pixel-specific signal received from the pixel array  42 . As discussed before, the values of the scan angle and the corresponding location of the detected spot in the pixel array  42 —as reflected through the value of the parameter “q” in equation (1)—may allow depth determination for that light spot. In this manner, the 3D depth map for the surface of the object  26  in the field of view of the pixel array  42  may be generated. 
       FIG.  5    shows exemplary circuit details of the 2D pixel array  42  and a portion of the associated processing circuits in the image processing unit  46  of the image sensor  24  in  FIGS.  1 - 2    according to one embodiment of the present disclosure. As noted before, the pixel array  42  is shown having nine pixels  100 - 108  arranged as a 3×3 array for ease of illustration only; in practice, a pixel array may contain hundreds of thousands or millions of pixels in multiple rows and columns. In one embodiment, each pixel  100 - 108  may have an identical configuration as shown in  FIG.  5   . In the embodiment of  FIG.  5   , the 2D pixel array  42  is a Complementary Metal Oxide Semiconductor (CMOS) array in which each pixel is a Four Transistor Pinned Photo-diode (4T PPD) pixel. For ease of illustration, the constituent circuit elements of only pixel  108  are labeled with reference numerals. The following discussion of the operation of the pixel  108  equally applies to the other pixels  101 - 107  and, hence, the operation of each individual pixel is not described herein. 
     As shown, the 4T PPD pixel  108  (and similar other pixels  101 - 107 ) may comprise a pinned photo-diode (PPD)  110  and four N-channel Metal Oxide Semiconductor Field Effect Transistors (NMOS)  111 - 114  connected as illustrated. The transistor  111  may operate as a Transfer Gate (TG), Floating Diffusion (FD) transistor. Broadly, the 4T PPD pixel  108  may operate as follows: First, the PPD  110  may convert the incident photons into electrons, thereby converting the optical input signal into an electrical signal in the charge domain. Then, the transfer gate  111  may be “closed” to transfer all the photon-generated electrons from the PPD  110  to the floating diffusion. The signal in the charge domain thus gets converted to the voltage domain for ease of subsequent processing and measurements. The voltage at the floating diffusion may be later transferred as a pixout signal to an Analog-to-Digital Converter (ADC) using the transistor  114  and converted into an appropriate digital signal for subsequent processing. More details of the pixel output (PIXOUT) generation and processing are provided below with reference to discussion of  FIGS.  7  and  10 - 11   . 
     In the embodiment of  FIG.  5   , a row decoder/driver  116  in the image processing unit  46  is shown to provide three different signals to control the operation of the pixels in the pixel array  42  to generate the column-specific pixout signals  117 - 119 . In the embodiment of  FIG.  4   , the output  95  may collectively represent such PIXOUT signals  117 - 119 . A Row Select (RSEL) signal may be asserted to select an appropriate row of pixels. In one embodiment, the row to be selected is the epipolar line of the current scanning line (of light spots) being projected by the laser source  33 . The row decoder/driver  116  may receive the address or control information for the row to be selected via the row address/control inputs  126 , for example, from the processor  19 . In the present discussion, it is assumed that the row decoder/driver  116  selects the row of pixels containing the pixel  108 . A transistor, such as the transistor  114 , in each row of pixels in the pixel array  42  may be connected to a respective RSEL line  122 - 124  as shown. A Reset (RST) signal may be applied to pixels in the selected row to reset those pixels to a pre-determined high voltage level. Each row-specific RST signal  128 - 130  is shown in  FIG.  5    and explained in more detail with reference to the waveforms in  FIGS.  7  and  10 - 11   . A transistor, such as the transistor  112 , in each pixel may receive the respective RST signal as shown. A Transfer (TX) signal may be asserted to initiate transfer of the pixel-specific output voltage (PIXOUT) for subsequent processing. Each row-specific TX line  132 - 134  is shown in  FIG.  5   . A transfer-gate transistor, such as the transistor  111 , may receive the respective TX signal as illustrated in  FIG.  5   . 
     As mentioned before, in particular embodiments of the present disclosure, the 2D array  42  and the rest of the rest of the components in the image sensor unit  24  may be used for 2D RGB (or non-RGB) imaging as well as for 3D depth measurements. Consequently, as shown in  FIG.  5   , the image sensor unit  24  may include a pixel column unit  138  that includes circuits for Correlated Double Sampling (CDS) as well as column-specific ADCs—one ADC per column of pixels—to be used during 2D and 3D imaging. The pixel column unit  138  may receive the PIXOUT signals  117 - 119  and process them to generate a digital data output (Dout) signal  140  from which 2D image may be generated or 3D depth measurements can be obtained. The pixel column unit  138  may also receive a reference input  142  and a ramp input  143  during processing of the PIXOUT signals  117 - 119 . More details of the operation of the unit  138  are provided later below. In the embodiment of  FIG.  5   , a column decoder unit  145  is shown coupled to the pixel column unit  138 . The column decoder  145  may receive a column address/control input  147 , for example, from the processor  19 , for the column to be selected in conjunction with a given row select (RSEL) signal. The column selection may be sequential, thereby allowing sequential reception of the pixel output from each pixel in the row selected by the corresponding RSEL signal. The processor  19  may be aware of the currently-projected scanning line of light spots and, hence, may provide appropriate row address inputs to select the row of pixels that forms the epipolar line of the current scanning line and may also provide appropriate column address inputs to enable the pixel column unit  138  to receive outputs from the individual pixels in the selected row. 
     It is observed here that although the discussion herein primarily focuses on the 4T PPD pixel design shown in  FIG.  5    for 2D and 3D imaging according to teachings of the present disclosure, different types of pixels may be used in the pixel array  42  in other embodiments. For example, in one embodiment, each pixel in the pixel array  42  may be a 3T pixel, which omits the transfer gate transistor—like the transistor  111  in the 4T PPD design in  FIG.  5   . In other embodiments, 1T pixels or 2T pixels may be used as well. In yet another embodiment, each pixel in the pixel array  42  may have a shared-transistor pixel configuration, where transistors and read-out circuitry can be shared among two or more neighboring pixels. In the shared-transistor pixel configuration, each pixel may have at least one photo-diode and one transfer-gate transistor; the rest of the transistors can be shared among two or more pixels. One example of such a shared-transistor pixel is the 2-shared (1×2) 2.5T pixel where five transistors (T) are used for two pixels, resulting in a 2.5T/pixel configuration. Another example of a shared-transistor pixel that may be used in the pixel array  42  is the 1×4 4-shared pixel, in which 4 pixels share the readout circuitry, but each one has at least one photo-diode and one TX (transfer-gate) transistor. Other pixel configurations than those listed here may be suitably implemented for 2D and 3D imaging as per teachings of the present disclosure. 
       FIG.  6 A  is an exemplary layout of an image sensor unit, such as the image sensor unit  24  in  FIG.  5   , according to one embodiment of the present disclosure. For the sake of brevity, only a brief discussion of the architecture in  FIG.  6 A  is provided herein; more relevant operational details are provided later with reference to  FIGS.  7  and  10 - 11   . As shown, the image sensor unit  24  in  FIG.  6 A  may include a row decoder unit  149  and a row driver unit  150 , both of which collectively comprise the row decoder/driver  116  in  FIG.  5   . Although not shown in  FIG.  6 A , the row decoder unit  149  may receive a row address input (like the input  126  shown in  FIG.  5   ), for example, from the processor  19 , and decode the input to enable the row driver unit  150  to provide appropriate RSEL, RST, and TX signals to the row selected/decoded by the row decoder  149 . The row driver unit  150  may also receive control signals (not shown), for example, from the processor  19 , to configure the row driver  150  to apply appropriate voltage levels for the RSEL, RST, and TX signals. In the image sensor  24  in  FIG.  6 A , a column ADC unit  153  may represent the pixel column unit  138  in  FIG.  5   . For ease of illustration, in  FIG.  6 A , various row-specific driver signals—such as the RSEL, RST, and TX signals—from the row driver  150  are collectively referenced using a single reference numeral “ 155 .” Similarly, all column-specific pixel outputs (pixouts)—like the pixouts  117 - 119  in  FIG.  5   —are collectively referenced using a single reference numeral “ 157 .” The column ADC unit  153  may receive the pixout signals  157  and the reference input  142  (from a reference signal generator  159 ) and the ramp signal  143  to generate a pixel-specific output by the corresponding column-specific ADC for the pixel&#39;s column. The 2D imaging is discussed in more detail later with reference to  FIG.  10   . In one embodiment, the ADC unit  153  may include circuitry for CDS—as in case of the pixel column unit  138  in  FIG.  5   —to generate a CDS output (not shown) that is the difference between the pixel&#39;s reset level and the received signal level. In particular embodiments, the 3D depth values may be combined with the 2D image to generate a 3D image of the object. 
     The column ADC unit  153  may include a separate ADC per pixel column in the 2D array  42 . Each column-specific ADC may receive a respective ramp input  143  (from a ramp signal generator  163 ) along with the pixout signals  157 . In one embodiment, the ramp signal generator  163  may generate the ramp input  143  based on the reference voltage level received from the reference signal generator  159 . Each column-specific ADC in the ADC unit  153  may process the received inputs to generate the corresponding digital data output (Dout) signal  140 . From the column decoder  145 , the ADC unit  153  may receive information about which column ADC output to be readout and sent to the Dout bus  140 , and may also receive information about which column to select for a given row to receive the appropriate pixel output. Although not shown in  FIG.  6 A , the column decoder unit  145  may receive a column address input (like the input  147  in  FIG.  5   ), for example, from the processor  19 , and decode the input to enable the column ADC unit  153  to select the appropriate pixel column. In the embodiment of  FIG.  6 A , the decoded column address signals are collectively identified using the reference numeral “ 165 .” 
     The digital data outputs  140  from the ADC units may be processed by a digital processing block  167 . In one embodiment, for the 2D RGB imaging mode, each ADC-specific data output  140  may be a multi-bit digital value that substantially corresponds to the actual photon charge collected by the respective pixel. On the other hand, in the 3D depth measurement mode, each ADC-specific data output  140  may be a timestamp value representing the time instant when the respective pixel detects its corresponding light spot. This timestamping approach according to the teachings of the present disclosure is discussed later in more detail. The digital processing block  167  may include circuits to provide timing generation; Image Signal Processing (ISP) such as, for example, processing of data outputs  140  for the 2D imaging mode; depth calculations for the 3D imaging mode; and so on. In that regard, the digital processing block  167  may be coupled to an interface unit  168  to provide the processed data as an output  170 , for example, to enable the processor  19  to render a 2D RGB/non-RGB image or a 3D depth image of the 3D object  26  on a display screen (not shown) of the device  15 . The interface unit  168  may include a Phase-Locked Loop (PLL) unit for generation of clock signals that support the timing generation functionality in the digital processing block  167 . Furthermore, the interface unit  168  may also include a Mobile Industry Processor Interface (MIPI) that provides an industry-standard hardware and software interface to other components or circuit elements in the device  15  for the data generated by the digital block  167 . The MIPI specifications support a broad range of mobile products and provide specifications for a mobile device&#39;s camera, display screen, power management, battery interface, and the like. The MIPI-standardized interfaces may yield an improved operability between a mobile device&#39;s peripherals—such as a smartphone&#39;s camera or display screen—and the mobile device&#39;s application processor(s), which may not be from the same vendor as the vendor (or vendors) providing the peripherals. 
     In the embodiment of  FIG.  6 A , a timestamp calibration unit  171  is shown coupled to the column ADC unit  153  to provide appropriate calibration signals  172  to individual column-specific ADCs to enable each column-specific ADC unit to generate an output representing a pixel-specific timestamp value in the 3D measurement mode. This timestamping approach is discussed in more detail with reference to  FIG.  7   . 
       FIG.  6 B  shows architectural details of an exemplary CDS+ADC unit  175  for 3D depth measurement according to one embodiment of the present disclosure. For ease of discussion, the unit  175  may be referred below to as “ADC unit,” however, it is understood that the unit  175  may also include CDS functionality in addition to the ADC functionality. A simplified version of a CDS unit is represented using the capacitor  176  in  FIG.  6 B . In one embodiment, each column of pixels in the 2D pixel array  42  may have a column-specific, single slope ADC unit similar to the ADC unit  175 . Thus, in the embodiment of  FIG.  5   , there may be three ADC units in the pixel column unit  138 —one ADC per column. As shown, the ADC  175  in the embodiment of  FIG.  6 B  may include two Operational Transconductance Amplifiers (OTA)  177 ,  179 , connected in series with a binary counter  181  and a line memory unit  183 . For ease of illustration, only the inverting (−) and non-inverting (+) voltage inputs to the OTAs  177 ,  179  are shown in  FIG.  6 B ; the biasing inputs and the power supply connections are not shown. It is understood that an OTA is an amplifier whose differential input voltage produces an output current. Thus, an OTA may be considered as a voltage-controlled current source. The biasing inputs may be used to provide currents or voltages to control the amplifier&#39;s transconductance. The first OTA  177  may receive—from the CDS unit  176 —a CDS version of the pixout voltage from a pixel, such as the pixel  108  in  FIG.  5   , that is selected in the activated row using the column number received from the column decoder  145 . The CDS version of a pixout signal may be referred to as a “PIX_CDS” signal. The OTA  177  may also receive a Vramp voltage  143  from the ramp signal generator  163  ( FIG.  6 A ). The OTA  177  may generate an output current when the pixout voltage  157  drops below the Vramp voltage  143 , as discussed below with reference to  FIG.  7   . The output of the OTA  177  may be filtered by the second OTA  179  before being applied to the binary counter  181 . In one embodiment, the binary counter  181  may be a 10-bit ripple counter that receives a Clock (Clk) input  185  and generates a timestamp value  186  based on the clock cycles counted during a pre-determined time triggered by the generation of the output current by the first OTA  177 . In the context of the embodiment in  FIG.  6 A , the Clk input  185  may be a system-wide clock or an image sensor-specific clock generated by the PLL unit  168  or other clock generator (not shown) in the device  15 . The pixel-specific timestamp value  186  may be stored in the line memory  183  against the column number (column #) of the pixel, and subsequently output to the digital processing block  167  as the Dout signal  140 . The column number input  165  may be received from the column decoder unit  145  shown in  FIG.  6 A . 
     In particular embodiments, the RGB color model may be used for sensing, representation, and display of images on mobile devices such as, for example, the device  15  in  FIGS.  1 - 2   . In the RGB color model, the light signals having three primary colors—red, green, and blue—may be added together in various ways to produce a broad array of colors in the final image. The CDS method may be used in 2D RGB imaging to measure an electrical value, such as a pixel/sensor output voltage, in a manner that allows removal of an undesired offset. For example, a CDS unit, like the CDS unit  176 , may be employed in each column-specific ADC unit, like the ADC unit  175 , to perform correlated double sampling. In CDS, the output of the pixel may be measured twice—once in a known condition, and once in an unknown condition. The value measured from the known condition may be then subtracted from the value measured from the unknown condition to generate a value with a known relation to the physical quantity being measured—here, the photoelectron charge representing the pixel-specific portion of the image signal. Using CDS, noise may be reduced by removing the reference voltage of the pixel (such as, for example, the pixel&#39;s voltage after it is reset) from the signal voltage of the pixel at the end of each integration period. Thus, in CDS, before the charge of a pixel is transferred as an output, the reset value is sampled. The reference value is “deducted” from the value after the charge of the pixel is transferred. 
     It is observed here that, in particular embodiments, the ADC unit  175  may be used for both—2D imaging as well as 3D depth measurements. All the inputs for such shared configuration, however, are not shown in  FIG.  6 B . In the shared use case, the corresponding Vramp signal may be different as well for 2D imaging. 
       FIG.  7    is a timing diagram  190  that shows exemplary timing of different signals in the system  15  of  FIGS.  1 - 2    to generate timestamp-based pixel-specific outputs in a 3D linear mode of operation according to particular embodiments of the present disclosure. As noted before, in particular embodiments, all pixels in the same image sensor  24  may be used for 2D as well as 3D imaging. However, the 3D depth measurements may be performed using a 3D linear mode or a 3D logarithmic mode depending on the level of ambient light. As discussed in more detail below with reference to  FIG.  11   , the 3D logarithmic mode may be used for depth measurements when ambient light rejection is needed. The discussion of  FIG.  7   , however, relates to the timing waveforms associated with the 3D linear mode. 
     Briefly, as discussed earlier with reference to  FIGS.  3 - 4   , the 3D object  26  may be point-scanned—one spot at a time—by the laser light source  33  along a row “R”  75  of the pixel array  42 , where “R” is known based on its epipolar relation with the scanning line S R    66 . After scanning one row, the scanning operation repeats with another row. When the laser projects the next spot, the earlier-projected light spot may be imaged by the corresponding pixel in the row R. The pixel-specific outputs from all the pixels in the row R may be read out to the depth processing circuit/module in the digital processing block  167  ( FIG.  6 A ). 
     To generate a pixel-specific output, the corresponding row may have to be initially selected using an RSEL signal. In the context of  FIG.  7   , it is assumed that the row decoder/driver  116  in  FIG.  5    selects the row of pixels containing pixels  106 - 108  by asserting the RSEL signal  122  to a “high” level as shown in  FIG.  7   . Thus, all the pixels  106 - 108  are selected together. For ease of discussion, the same reference numerals are used in  FIG.  7    for the signals, inputs, or outputs that are also shown in  FIGS.  5 - 6   . Initially, all the pixels  106 - 108  in the selected row may be reset to a high voltage using the RST line  128 . The “reset” level of a pixel may represent an absence of the pixel-specific detection of a corresponding light spot. In the 3D linear mode according to one embodiment of the present disclosure, the RST signal  128  may be released from its high level for a pre-determined time to facilitate integration of photoelectrons received by the pixels  106 - 108 , so as to obtain the corresponding pixel output (pixout) signals  117 - 119 —two of which are shown in  FIG.  7    and discussed later below. The PIXOUT 1  signal  119  represents the output supplied to a corresponding ADC unit by the pixel  108 , and is shown using a dashed line having the pattern “- •• - •• -”. The PIXOUT 2  signal  118  represents the output supplied to a corresponding ADC unit by the pixel  107 , and is shown using a dashed line having the pattern “ . . . ”. On the other hand, in the 3D logarithmic mode according to one embodiment of the present disclosure, the RST signal may remain high for the selected row during generation of the pixel output as discussed later below. It is noted here that, in one embodiment, other RST lines—like the lines  129 - 130  in  FIG.  5   —may remain high or “on” for unselected rows to prevent blooming. It is noted here that, strictly speaking, the PIXOUT signals  118 - 119  in  FIG.  7    (and similar pixout signals in  FIGS.  10 - 11   ) may be slightly modified by a CDS unit—such as, for example, the CDS unit  176  in  FIG.  6 B —before being applied as PIX_CDS signals to the first OTA—like the OTA  177  in  FIG.  6 B —in a respective column-specific ADC unit, such as the ADC unit  175  in  FIG.  6 B . However, for the simplicity of illustration and ease of discussion, the PIXOUT signals in  FIGS.  7  and  10 - 11    are treated as representatives of respective PIX_CDS signals (not shown) and are considered as having been directly “input” to the respective OTAs  177 . 
     After reset, when a photodiode in a pixel receives incident luminance—such as, for example, the photoelectrons in the light reflected from a light spot projected on the surface of the 3D object  26 , the photodiode may generate corresponding photocurrent. A pixel&#39;s detection of incident light may be called an “ON event,” whereas a decrease in the intensity of incident light may produce an “OFF event.” The photocurrent generated in response to an ON event may decrease the pixel output voltage (PIXOUT) from its initial reset level. A pixel thus functions as a transducer to convert received luminance/light signal into a corresponding electrical (analog) voltage, which is generally designated as a PIXOUT signal in  FIGS.  5 - 7  and  10 - 11   . Each pixel may be read individually and, preferably, in the sequence in which the corresponding light spots are projected by the laser source. The analog pixout signal may be converted to a digital value by the corresponding column ADC. In the 2D imaging mode, the ADC may function as an analog-to-digital converter and generate a multi-bit output. However, as discussed below, in the 3D depth measurement mode, the ADC may function as a time-to-digital converter and generate a timestamp value representing the time when a light spot is detected by a pixel. 
     Referring again to  FIG.  7   , after the pixel reset is done (with RST  128  high), the column ADCs associated with pixels  106 - 108  may be reset as well before the RST is released. However, the transfer (TX) signal  132  may remain high throughout. The ADCs may be reset using either a common ADC reset signal or individual ADC-specific reset signals. In the embodiment of  FIG.  7   , a common ADC_RST signal  192  is shown to have been briefly asserted (to a high level) to reset the column-specific ADCs—like the ADC  175 —in the column ADC unit  153  ( FIG.  6 A ). In one embodiment, the ADCs may be reset to a pre-determined binary value—such as a binary “0” or other known number—after the pixels are reset. In  FIG.  7   , these reset values for ADCs associated with pixels  108  and  107  are shown by “fields”  194 - 195  in the signals ADCOUT 1  (or ADC output “A”) and ADCOUT 2  (or ADC output “B”), respectively. It is noted here that the term “field” is used here for the sake of convenience only when discussing the ADC outputs shown in  FIGS.  7  and  10 - 11   . It is understood that an ADC output may not actually consist of all of such “fields” at the same time, but may be a specific digital value depending on the ADC&#39;s current stage of signal processing—if the ADC is reset, its output may be a binary “0”; if the ADC is triggered to count clock pulses, its output may be a count value as in case of the 3D depth measurements in  FIGS.  7  and  11   ; or if the ADC is used for 2D color imaging (as in case of  FIG.  10   ), then its output may be a multi-bit value representing an image signal. Thus, the ADC output signals in  FIGS.  7  and  10 - 11    are depicted with such “fields” merely to illustrate different digital values an ADC may internally generate in progressing toward the final output. In  FIG.  7   , the reference numeral “ 197 ” is used to refer to the ADCOUT 1  signal representing the output of the ADC associated with the pixel  108 , and the reference numeral “ 198 ” is used to refer to the ADCOUT 2  signal representing the output of the ADC associated with the pixel  107 . Each of the outputs  197 - 198  may appear as the Dout signal  140  ( FIGS.  5 - 6   ) when the respective ADC is selected by the column decoder during memory readout. Prior to being reset, the ADC outputs  197 - 198  may have unknown values, as indicated by the notation “x” in the fields  199 - 200 . 
     After ADCs are reset, a pre-determined threshold value may be enabled by de-asserting the ramp input (Vramp)  143  to a pre-defined voltage level after the pixel reset signal  128  and ADC reset signal  192  are released. In the embodiment of  FIG.  7   , the RAMP input  143  is common to all column-specific ADCs, thereby providing the same Vramp voltage to each ADC. However, in other embodiments, different Vramp values may be applied to two or more ADCs through separate, ADC-specific ramp inputs. Furthermore, in particular embodiments, the Vramp threshold may be a programmable parameter, allowing it to be variable as desired. After the threshold (RAMP signal) is enabled, the pixel-specific ADCs may wait for the corresponding pixel&#39;s “ON event” before starting their binary counters—like the counter  181  in  FIG.  6 B . 
     In the 3D depth measurement mode, each ADC may generate a single bit output (representing binary “0” or “ 1 ”), as opposed to a multi-bit output in case of the 2D imaging mode (discussed below). Thus, in case of an RGB sensor, any color information received by a pixel in the RGB pixel array  42  may be effectively ignored. In the absence of any incident light detected by a pixel, the corresponding ADCOUT signal may remain at the binary “0” value. Thus, columns without any ON events may continue to have digital value “0” (or other known number) for their respective ADCOUT signals. However, as noted before, when a pixel is hit with incident light, its PIXOUT line may start to droop from its reset level—as indicated by the downward slopes of the PIXOUT 1  and PIXOUT 2  signals in  FIG.  7   . Assuming that pixel charge is read starting with the pixel that receives the charge first, such a reading may start with the right-most pixel in a row and end with the left-most pixel as shown, for example, in  FIG.  4   , where “t 1 ” is the earliest time instant and “t 4 ” is the latest one. Thus, in the embodiment of  FIG.  7   , the output of the pixel  108  (PIXOUT 1 ) may be read before that of the pixel  107  (PIXOUT 2 ). As soon as the progressively-drooping PIXOUT 1  reaches the Vramp threshold  143 , the single-bit ADCOUT 1  may flip from binary “0” to binary “ 1 .” However, instead of outputting the bit “1,” the corresponding ADC may record the time when the bit flips (from “0” to “1”). In other words, the ADC associated with the pixel  108  may function as a time-to-digital converter, by starting the binary counter in the ADC, as indicated by the “up count” field  202  in ADCOUT 1 . During the “up count” period, the counter in the ADC may count the clock pulses in the CLK signal  185 , which may be applied to each ADC as shown, for example, in  FIG.  6 B . The counted clock pulses are shown by the Counter Clock- 1  signal  204  in  FIG.  7   , and the counted value (in the “up count” field) may be provided as a pixel-specific output for the pixel  108 . A similar counting may occur at the ADC associated with pixel  107  for the charge collected by the pixel  107 , as indicated by the Counter Clock- 2  signal  205  in  FIG.  7   . The pixel-specific counted value (in the “up count” field  207 ) may be provided by the respective ADC as a pixel-specific output for the pixel  107 . After scanning all pixels in one row, the pixel-by-pixel charge collection operation may repeat with another row, while the outputs from the earlier-scanned row are read out to the depth calculation unit in the digital block  167 . 
     Each ADC output may effectively represent a respective “timestamp” value providing a temporal indication of a pixel&#39;s detection of a light spot on the object surface illuminated by the laser light source  33 . A “timestamp” may be considered to capture the light arrival time for a pixel. In one embodiment, a timestamp value may be generated for a detected light spot by the digital processing block  167  from the count value (of the counted clock pulses) received from an ADC unit. For example, the digital block  167  may generate a timestamp by relating the count value to an internal system time or other reference time. The timestamp is generated at the receiving end and, hence, may not necessarily represent the exact time when the corresponding light spot was projected by the light source. However, the timestamp values may allow the digital block  167  to establish a temporal correlation among time-stamped light spots, thereby allowing the digital block  167  to determine distances to time-stamped light spots in the time-wise order specified by the temporal correlation—the distance to the earliest illuminated light spot being determined first, and so on, until the distance to the last-illuminated light spot is determined. In one embodiment, the timestamping approach may also facilitate resolution of the ambiguity that may arise from multiple light spots being imaged on the same pixel, as discussed later. 
     All ADC-based counters may stop simultaneously such as, for example, when the ramp signal  143  is asserted again after a pre-determined time period has elapsed. In  FIG.  7   , the transition of the ramp signal  143 , marking the conclusion of the pre-determined time period for pixel charge integration, is indicated by dotted line  210 . The RSEL  122  and the RST  128  signals may also transition their states substantially simultaneously with the change in the level of the ramp signal  143  (at line  210 ). It is observed here that, in one embodiment, all ADC-based counters may be reset at line  210 . In another embodiment, all ADC-based counters may be reset at any time prior to the selection of the next row of pixels for reading the pixel charge. Despite resetting of ADC counters upon conclusion of scanning of pixels in one row, the timestamp value for each pixel in the pixel array  42  may remain distinct because of the relational establishment of the timestamp value against an internal system time or other reference source of time, which may remain global and continuously-running. 
     It is observed here that, in the embodiment of  FIG.  7   , a later-scanned pixel—such as the pixel  107 —may have a smaller ADC output than the pixel that is scanned earlier—such as the pixel  108 . Thus, as shown, the ADCOUT 2  may have less count value (or less number of clock pulses counted) than the ADCOUT 1 . Alternatively, in another embodiment, a later-scanned pixel may have a larger ADC output than an earlier-scanned pixel, for example, when each ADC-specific counter starts counting when a pixel is reset and stops counting when an “ON event” is detected—such as, for example, when the pixel&#39;s pixout signal droops below a given threshold (Vramp). 
     It is noted here that circuits and waveforms shown in  FIGS.  5 - 7  and  10 - 11    are based on single-slope ADCs with per column up-counters. However, it is understood that the time-stamping approach may be implemented with up- or down-counters depending on the design choice. Furthermore, single slope ADCs with global counters may be used as well. For example, in one embodiment, instead of using individual, column-based counters, a global counter (not shown) may be shared by all column ADCs. In that case, the ADCs may be configured such that the column memory—like the line memory  183  in  FIG.  6 B —in each ADC may latch the output of the global counter to generate an appropriate ADC-specific output when a column-based comparator unit (not shown) detects an “ON event” such as, for example, when it first senses the respective pixout signal drooping below the ramp threshold  143 . 
     Although not shown in  FIG.  7   , it is observed here that dark current offset can be removed by decreasing the Vramp threshold at a rate that is the same as that of the dark current. Dark current may be a relatively small electric current that flows through a photosensitive device, such as a photodiode, even when no photons are entering the device. In image sensors, dark current may cause noise or unwanted artefacts in the collected charge. Dark current may be caused by defects in pixels and may have an effect like the photocurrent. Thus, due to the dark current, the pixel output may still decrease even without the existence of light (or in the absence of the light being received by the pixel). Thus, during charge collection, when the pixels in a row are “scanned” from right to left—as shown, for example, in the context of row  75  in  FIG.  4    and discussed with reference to  FIG.  7   , the pixels on the left hand side may integrate more dark current than the right ones. Therefore, in order to prevent registration of any false event due to dark current, the pre-determined ramp threshold (Vramp) may be decreased/adjusted by the rate that the dark current increases along the row of pixels to compensate for the reduced level of pixel output due to the dark current. In one embodiment, this adjusted threshold value may be then used for a pixel to compare the level of the pixel&#39;s PIXOUT signal. Thus, the value of the threshold voltage (Vramp) may be variable and individually-programmable for each ADC. In one embodiment, all pixels associated with a specific ADC may have the same Vramp value. In another embodiment, each pixel may have a pixel-specific Vramp value programmable in the corresponding ADC. 
     It is observed here that, when a row of light spots is scanned along the surface of the object, two or more different spots from the object scanned may be imaged on the same pixel. The spots may be in the same scanning line or may be on adjacent scanning lines. When multiple spots are scanned across the surface of the object, such overlapping imaging may negatively affect the correlation of the spots and the pixel ON events and, hence, may cause ambiguity in the depth measurements. For example, it is seen from the earlier-mentioned equation (1) that the depth measurement is related to the scan angle (θ) and the pixel location of the imaged light spot—as given by the parameter “q” in equation (1). Thus, if the scan angle is not correctly known for a given light spot, the depth calculation may be inaccurate. Similarly, if two or more light spots have the same value of “q”, the depth calculations may become ambiguous as well. The time-stamp based approach according to particular embodiments of the present disclosure may be used to maintain the correct correlation between the pixel location of a captured light spot and the corresponding scan angle of the laser source. In other words, a timestamp may represent an association between the values of parameters “q” and “θ”. Thus, if two spots land on the same pixel or column (from the data output point of view), the time-to-digital conversion in the timestamping approach may allow the imaging system—here, the digital processing block  167  ( FIG.  6 B )—to establish a temporal correlation between these two spots to identify which light spot was received first in time. Such correlation may not be easily possible in systems that do not use timestamping, such as, for example, the earlier-discussed stereo vision systems or the systems using the structured light approach. As a result, such systems may need to perform a lot of data searching and pixel-matching to solve the correspondence problem. 
     In one embodiment, when multiple light spots are imaged by the same pixel, timestamps of these light spots may be compared to identify the earliest-received light spot and the distance may be calculated for that light spot only, while ignoring all subsequently-received light spots at the same pixel. Thus, in this embodiment, the timestamp of the earliest-received light spot may be treated as the pixel-specific output for the corresponding pixel. Alternatively, in another embodiment, the distance may be calculated for the list spot that is received the last in time, while ignoring all other light spots imaged by the same pixel. In either case, any light spot received between the first or the last light spot may be ignored for depth calculations. Mathematically, the scan times of light spots projected by a light source may be given as t(0), t(1), . . . , t(n), where t(i+1)−t(i)=d(t) (constant). The pixel/column outputs may be given as a(0), a(1), . . . , a(n), which are timestamps for the ON events and a(i) is always after t(i), but before a(i+1). If a(i) and a(k) (i≠k) happen to be associated with the same pixel/column, only one of them may be saved as discussed before to remove any ambiguity in depth calculations. Based on the time relationship between the scan time and the output time (represented by timestamps), the processing unit, such as the digital block  167 , can figure out which output point(s) is missing. Although the processing unit may not be able to recover the missing location, the depth calculations from the available output points may suffice to provide an acceptable 3D depth profile of the object. It is noted here that, in one embodiment, it also may be possible for two different pixels to image a respective portion of the same light spot. In that embodiment, based on the closeness of the values of the timestamp outputs from these two pixels, the processing unit may infer that a single light spot may have been imaged by two different pixels. To resolve any ambiguity, the processing unit may use the timestamps to find an “average” of the respective location values “q”, and use that average value of “q” in equation (1) to calculate the 3D depth for such “shared” light spot. 
       FIG.  8    shows an exemplary Look-Up Table (LUT)  215  to illustrate how an LUT may be used in particular embodiments of the present disclosure to determine 3D depth values. The LUT-based approach may be used in place of the earlier-discussed triangulation-based depth calculations on-the-fly using the equation (1). The LUT  215  lists the parameters “θ”, “q”, and “Z” for a scan line S R . The relation among these parameters is given by equation (1). The LUT  215  may be pre-populated with the values of these parameters for multiple scan lines—only one of which, the scan line S R , is mentioned in  FIG.  8   . The pre-populated LUT  215  may be stored in the system memory  20  ( FIGS.  1 - 2   ), in the processor&#39;s  19  internal memory (not shown), or within the digital processing block  167  ( FIG.  6 A ). Initially, to populate the LUT  215 , a light spot along scan line S R  may be projected at a reference distance “Z i ”—for example, 1 meter—and using a specific scan angle “θ i ”. These pre-determined values of “Z i ” and “θ i ” may be used in equation (1) to obtain a corresponding value of “q i ”, which would indicate the column/pixel at which the imaged spot should appear for the scan line S R . Different values of “Z i ” and “θ i ” may be used to obtain corresponding values of “q i ”. If there is a ΔZ difference between the actual and pre-determined values of “Z i ” for a light spot in scanning line S R , the corresponding column/pixel should “move” by Δq. The values in the LUT  215  may be thus adjusted as necessary. In this manner, for each scanning line S R , the LUT  215  may be pre-populated with depth values “Z i ” as a function of “θ i ” and “q i ” using the triangulation equation (1). As noted before, the pre-populated LUT may be stored in the device  15 . During operation, the actual values of “θ i ” and “q i ” for each light spot in a scan line of light spots projected on a user-selected 3D object may be used as inputs to an LUT—like the LUT  215 —to look-up the corresponding value “Z i ”. The processor  19  or the digital block  167  may be configured to perform such look-ups. Thus, in particular embodiments, the 3D profile of the object may be generated by interpolating into an LUT that has been calibrated using triangulation. 
     It is observed from the foregoing discussion that the timestamp-based 3D depth measurement using triangulation according to particular embodiments of the present disclosure allows an ADC to be operated as a binary comparator with a low resolution of just a single bit, thereby consuming significantly less switching power in the ADC and, hence, conserving the system power. A high bit resolution ADC in traditional 3D sensors, on the other hand, may require more processing power. Furthermore, timestamp-based ambiguity resolution may also save system power in comparison with traditional imaging approaches that require significant processing power to search and match pixel data to resolve ambiguities. The latency is reduced as well because all depth measurements may be performed in one pass due to imaging/detection of all point-scanned light spots in a single imaging step. In particular embodiments, each pixel in the pixel array may be a single storage pixel and, hence, can be made as small as 1 micrometer (μm) in size. In a single storage pixel design, there may be only one photodiode and one junction capacitor per pixel (like the transistor  111  in  FIG.  5   ) to integrate and store photoelectrons. On the other hand, a pixel that has one photodiode with multiple capacitors—to store photoelectrons coming at different times—may not be reduced to such a small size. Thus, the low-power 3D imaging system with small sensors as per particular embodiments of the present disclosure may facilitate its easy implementation in mobile applications such as, for example, in cameras in smartphones or tablets. 
       FIG.  9    depicts an exemplary flowchart  220  showing how the same image sensor—such as the image sensor unit  24  in  FIGS.  1 - 2   —may be used for both 2D imaging and 3D depth measurements according to one embodiment of the present disclosure. As mentioned before, for example, the image sensor may be part of a camera system on a mobile phone, smartphone, laptop computer, or tablet, or as part of a camera system in an industrial robot or VR equipment. In particular embodiments, there may be a mode switch on the device to allow a user to select between the traditional 2D camera mode or the 3D imaging mode using depth measurements as discussed before. In the traditional 2D camera mode, in particular embodiments, the user may capture color (RGB) images or snapshots of a scene or a particular 3D object within the scene. However, in the 3D mode, the user may be able to generate a 3D image of the object based on the camera system performing the point scan-based depth measurements in the manner discussed earlier. In either mode, the same image sensor may be used in its entirety to carry out the desired imaging. In other words, each pixel in the image sensor may be used for either application—2D or 3D imaging. Such dual mode operation using the same image sensor may be accomplished as outlined in  FIG.  9   . 
     Various steps illustrated in  FIG.  9    may be performed by a single module or a combination of modules or system components in the system  15 . In the discussion herein, by way of an example only, specific tasks are described as being performed by specific modules or system components. Other modules or system components may be suitably configured to perform such tasks as well. 
     As shown in  FIG.  9   , at block  222 , the image sensor may be provided to capture a 2D image of a 3D object that is illuminated by ambient light. An exemplary 3D object  26  in shown in  FIGS.  2 - 4   . The image sensor may have a plurality of pixels arranged in a 2D array such as, for example, the 2D pixel array  42  shown in  FIGS.  2  and  5   . At block  224 , a laser light source, such as the laser light source  33  or the light source module  22  in  FIG.  2   , may be provided to illuminate the 3D object using a point scan with light from the laser source. The light from the laser source may be in addition to the ambient light. The point scan approach has been discussed earlier with reference to  FIGS.  3 - 4   . Thereafter, at block  226 , the depth of the 3D object—which is now illuminated by the ambient light as well as the laser light—may be determined using at least one row of pixels in the image sensor. The triangulation-based depth measurements using timestamping according to particular embodiments of the present disclosure have been discussed earlier. Thus, the general approach outlined in  FIG.  9   , may allow a device, such as the device  15  in  FIGS.  1 - 2   , to be configured and operated for 2D as well as 3D imaging without the need for separate image sensors. 
       FIG.  10    is a timing diagram  230  that shows exemplary timing of different signals in the system  15  of  FIGS.  1 - 2    to generate a 2D image using a 2D linear mode of operation according to particular embodiments of the present disclosure. It is noted here that the 2D image may be an RGB image of a scene or a 3D object within the scene under ambient light illumination, which may include occasional use of a camera flash or other similar component (not shown). However, in contrast to the 3D imaging-related embodiments in  FIGS.  7  and  11   , there may not be any illumination by the laser light source  33  ( FIG.  2   ) in case of the 2D imaging in the embodiment of  FIG.  10   . Many signals shown in  FIG.  10    are also shown in  FIG.  7   . In view of the earlier detailed discussion of  FIG.  7   , only the salient aspects of  FIG.  10    are discussed herein. It is noted here that the control signals RSEL, RST, TX, RAMP, and ADC_RST shown in  FIG.  10    are for the row of pixels containing pixels  106 - 108  in  FIG.  5    and, hence, for ease of discussion, these signals are identified using the same reference numerals as those used in  FIG.  7   , despite the difference in waveforms and timing of the signals in  FIGS.  7  and  10   . Furthermore, the illustration in  FIG.  10    is for a single pixel—here the pixel  108  in  FIG.  5   . Therefore, the PIXOUT signal  119 , the Counter Clock signal  204 , and the ADCOUT signal  197  in  FIG.  10    are shown using the same reference numerals as those for corresponding signals PIXOUT 1 , Counter Clock- 1  and ADCOUT 1  in  FIG.  7   . The pixel output  119  is generated by linearly integrating the photoelectrons collected by the pixel  108  over a pre-determined time period. As before, the discussion of  FIG.  10    in the context of pixel  108  remains applicable to corresponding signals associated with other pixels in the pixel array  42 . 
     As noted before, in particular embodiments, each column-specific ADC, such as the ADC unit  175  in  FIG.  6 B , may be a single slope ADC. As in case of  FIG.  7   , pixels in the same row may be selected and reset together, as shown by the RSEL signal  122  and the RST signal  128  in  FIG.  10   . The column ADCs may be reset also using the common ADC_RST signal  192 . In  FIG.  10   , the reset state of the ADC associated with pixel  108  is indicated by the field  234  in the ADCOUT signal  197 . After the pixel  108  and its ADC are reset, a threshold or reference voltage level may be enabled as shown by the voltage level  236  for the Vramp signal  143 . The ramp then ramps down from this voltage level  236  to digitize the comparator offset of the ADC unit, as given by the field  238  in the ADCOUT signal  197 . In one embodiment, the clock pulses in the counter clock  204  may be used to generate a count value as the offset  238 . The clock pulses may be counted from the time the Vramp signal  143  reaches the threshold level  236  until it drops to the reset level of the pixel output—here, the PIXOUT signal  119 . Thereafter, the respective transfer (TX) line  132  may be pulsed to trigger the transfer of charge accumulated on the photodiode  110  to the floating diffusion  111  for readout. While the TX pulse is asserted, the Vramp signal  143  may rise to the threshold level  236  and a counter in the pixel-specific ADC—such as the counter  181  in  FIG.  6 B —may be initialized with an inverted offset value as indicated by the field  240 . The inverted offset value  240  may represent the negative of the offset value  238 . After the TX pulse  132  is de-asserted, the ADC unit for the pixel  108  may start digitizing the received pixel signal (PIXOUT) until the Vramp threshold  143  drops to the level of the PIXOUT signal  119 . This operation is illustrated by the “up count” field  242  in the ADCOUT signal  197 . The count value  242  may be based on the clock pulses of the counter clock  204  and may represent a combined value including the offset count (at field  238 ) and the pixel-specific portion of the image signal for pixel  108 —as illustrated using the reference numeral “ 243 .” A comparator (not shown) in the ADC unit may compare the comparator offset value digitized at field  238  against the “up count” value  242 . Thus, in one embodiment, the RGB image signal  244  may be obtained by adding the ADC values in the fields  240  and  242 —thereby, effectively removing the offset value  238  from the combined value (offset+signal) in the “up count” field  242 . 
     The operation illustrated in  FIG.  10    may be performed for each pixel in the pixel array  42 . Each column ADC may generate a corresponding RGB image signal in the form of a multi-bit output from the ADC-based counter, such as the counter  181  in  FIG.  6 B . The multi-bit output—like the output at reference numeral “ 244 ” in  FIG.  10   —may be needed to effectively represent the color content of the image signal. The RGB image signal outputs from the ADCs in the column ADC unit  153  may be collectively represented by the Dout signal  140  ( FIGS.  6 A- 6 B ), which may be processed by the digital block  167  to present the 2D color image of the scene via the MIPI interface  168 . 
     Additional details of the 2D imaging and related waveforms shown in  FIG.  10    may be obtained from the U.S. Pat. No. 7,990,304 issued on Aug. 2, 2011 to Lim et al. The 2D imaging related discussion in this patent related to the present disclosure is incorporated herein by reference in its entirety. 
       FIG.  11    is a timing diagram  250  that shows exemplary timing of different signals in the system  15  of  FIGS.  1 - 2    to generate timestamp-based pixel-specific outputs in a 3D logarithmic (log) mode of operation according to particular embodiments of the present disclosure. As mentioned earlier, the 3D depth measurements may be performed using a 3D linear mode or a 3D logarithmic mode depending on the level of ambient light. Furthermore, during the 3D depth measurements, a 3D object—such as the 3D object  26  in  FIG.  2   —may be illuminated by the ambient light as well as by the visible light (or other light, such as, NIR light) from the laser scan. Therefore, the 3D logarithmic mode may be used for depth measurements when ambient light is too strong to be rejected by the 3D linear mode. In view of the CDS-based imaging to remove the offset or other noise from the final image signal, a logarithmic mode may not be needed for the 2D imaging-related waveforms depicted in  FIG.  10   . However, in case of the 3D depth measurements according to particular embodiments of the present disclosure, a strong ambient light may interfere with the light from the laser light source during point scans. In the 3D linear mode of operation, such interference may overwhelm or suppress the visible/NIR light reflected from a point-scanned light spot and, hence, may result in an inaccurate detection of the light received from the light spot. Hence, in particular embodiments, it may be desirable to reject the pixel charge attributable to the ambient light when the intensity of the ambient light is sensed to be above a pre-determined illuminance level (or intensity threshold), such as, for example, 10000 (10K) lux. Such ambient light rejection may be accomplished using the 3D log mode of operation shown in  FIG.  11   . 
     As before, the same reference numerals are used in  FIGS.  7 ,  10 , and  11    to refer to the similarly-named signals (or signals having similar functionality) and also for ease of discussion. It is understood, however, that the signals shown in  FIGS.  7  and  10 - 11    relate to specific modes of imaging. Thus, for example, the timing diagram  230  shown in  FIG.  10    illustrates a specific relationship among the signals shown therein when a user selects a 2D color imaging mode of operation. However, the similarly-named signals in  FIGS.  7  and  11    relate to a 3D imaging mode of operation and, hence, may have different timing relationships. Furthermore, even between  FIGS.  7  and  11   , some signals may differ in waveforms because  FIG.  7    relates to a 3D linear mode of operation, whereas  FIG.  11    relates to a 3D log mode of operation. In view of the earlier detailed discussion of  FIG.  7   , only the salient aspects of  FIG.  11    are discussed herein. Like  FIG.  7   , the timing diagram  250  in  FIG.  11    is also with reference to pixels  107  and  108  in  FIG.  5   . However, the discussion of  FIG.  11    remains applicable to all other pixels in the pixel array  42 . 
     In the 3D linear mode, the pixel-specific output may be generated by linearly integrating the photoelectrons collected by the pixel over a pre-determined time period. Thus, in the linear mode, a pixel&#39;s output voltage is proportional to the total photons collected/integrated over a given time period. However, in the 3D log mode, the pixel-specific output may be proportional to the natural logarithm of an instantaneous photo-current produced by the pixel during the pre-determined time period upon detecting the laser light reflected from the 3D object. Mathematically, the photo current generated by a photodiode, such as the PPD  110  in  FIG.  5   , may be represented by the following relationship: 
     I ph ∝e V     ph     /V     T   , where “I ph ,” is the diode&#39;s photocurrent, “V ph ” is the voltage across the diode, and “V T ” is the thermal voltage. Thus, “V ph ” and, hence, the respective pixel output (PIXOUT) may be made proportional to the natural logarithm of the instantaneous diode current “I ph ”, such as, for example, when ambient light rejection is desired. As noted before, heavy ambient light may restrict photon collection if linear integration is done. Hence, in such circumstances, the sensing of instantaneous photocurrent using the 3D log mode may be more desirable. 
     In particular embodiments, the device  15  may include an ambient light sensor (not shown). The processor  19  or the digital block  167  may be configured to sense the ambient light intensity as soon as the 3D imaging mode is selected by the user so as to determine whether to use the 3D linear mode or the 3D log mode. In one embodiment, the ambient light level may be sensed substantially simultaneously with the assertion of an RSEL signal, which may indicate the initiation of the imaging of the light reflected from the point-scanned light spots. In another embodiment, the ambient light level may be sensed substantially simultaneously with the initiation of the visible light point scan by the laser source. Based on the level of the ambient light, the processor  19  or the digital block  167  may choose either the 3D linear mode or the 3D log mode of depth measurements. In a still further embodiment, the ambient light level may be sensed periodically and continuously during a 3D depth measurement. In that case, the 3D mode of operation may be switched from linear to logarithmic, and vice versa, at any time prior to or during an ongoing imaging operation. Other approaches for sensing the ambient light level may be suitably devised. 
     Referring now to the embodiment of  FIG.  11   , it is observed that, in the 3D logarithmic mode, the row-specific RST signal  128  may be asserted (or turned on “high”) and may remain high/asserted for the selected row during the entire period of generation of the pixel output. In contrast, in the 3D linear mode of  FIG.  7   , the RST signal  128  may be initially asserted (or turned on “high”) to reset the pixels in the row to a pre-determined voltage level, but later turned off (or de-asserted) during linear integration of the photoelectrons. The TX signal  132 , however, may remain high, like in case of the 3D linear mode of  FIG.  7   . Thus, in particular embodiments, the appropriate level of the RST signal may be used to select the linear mode versus the logarithmic mode. In the logarithmic mode, in one embodiment, after the ADCs associated with pixels  107 - 108  are reset using the ADC_RST signal  192 , these ADCs may initially sample the ambient level to enable the ADCs to appropriately account for the signal levels of the pixel output (PIXOUT) signals when they are received. After ADCs are reset, the RAMP threshold  143  may be enabled, and the ADC counters may enter a “wait state” to wait for an “ON event” to occur at the respective pixel. When a pixel receives incident light (reflected from a projected light spot), its PIXOUT signal may start drooping. In contrast to the linear drop in  FIG.  7   , the PIXOUT signals  118 - 119  in  FIG.  11    may exhibit short, instantaneous drops  252 - 253 , respectively, which reflect the instantaneous photo-current produced by the respective pixel&#39;s detection of the reflected visible light. When the PIXOUT signals  118 - 119  reach the pre-determined Vramp threshold  143 , the ADC counters may start counting. All counters may stop simultaneously—after a pre-determined time for charge integration is over, as given by the transition of the RAMP signal  143  to its “high” state and as indicated by the dotted line  255 . The counted values are indicated by the data field  257  of ADCOUT 1  and the data field  259  of the ADCOUT 2  signals for pixels  108  and  107 , respectively. The count values in the logarithmic mode may be different from those in the linear mode and, hence, different reference numerals are used for the “up count” fields in the ADCOUT signals in  FIGS.  7  and  11   . As in case of  FIG.  7   , pixel scanned later may have a smaller count value for its ADC output than the one that is scanned earlier. 
     As mentioned earlier with reference to  FIG.  7   , instead of per column up-counters, down counters may be used in the ADC units in the embodiments of  FIGS.  10 - 11   . Similarly, a global counter based approach may be implemented instead of individual ADC-specific counters. 
     Thus, as discussed above, the same image sensor (and all of the pixels in its pixel array) may be used as per teachings of the present disclosure for routine 2D imaging as well as for 3D depth measurements. In the 2D mode, the sensor may work in the linear mode as a regular 2D sensor. However, during the 3D depth measurements, the sensor may operate in a linear mode under moderate ambient light, but may switch to a logarithmic mode of signal detection under strong ambient light so as to be able to use the visible (or NIR) light source. Thus, the imaging approaches discussed herein may be compatible with existing 2D sensor designs because the same 4T PPD pixel may be used for both 2D and 3D imaging. This allows for the sensor design to be small in size (with smaller pixels), more versatile, and operable at low power. These attributes, in turn, save space and cost for mobile devices containing such an image sensor. Furthermore, in consumer mobile devices and certain other applications, the usage of visible light laser (in addition to the ambient light) for 3D depth measurements may be better for eye safety than conventional Near Infrared (NIR) sensors. At visible spectrum, the sensor may have higher quantum efficiency than at the NIR spectrum, leading to lower power consumption of the light source, which, in turn, conserves power in the mobile devices. 
       FIG.  12    depicts an overall layout of the system  15  in  FIGS.  1 - 2    according to one embodiment of the present disclosure. Hence, for ease of reference and discussion, the same reference numerals are used in  FIGS.  1 - 2  and  12    for the common system components/units. 
     As discussed earlier, the imaging module  17  may include the hardware shown in the exemplary embodiments of  FIGS.  2 ,  5 , and  6 A- 6 B  to accomplish 2D imaging and 3D depth measurements as per the inventive aspects of the present disclosure. The processor  19  may be configured to interface with a number of external devices. In one embodiment, the imaging module  17  may function as an input device that provides data inputs—in the form of pixel event data such as, for example, the processed data output  170  in  FIG.  6 A —to the processor  19  for further processing. The processor  19  may also receive inputs from other input devices (not shown) that may be part of the system  15 . Some examples of such input devices include a computer keyboard, a touchpad, a touch-screen, a joystick, a physical or virtual “clickable button,” and/or a computer mouse/pointing device. In  FIG.  12   , the processor  19  is shown coupled to the system memory  20 , a peripheral storage unit  265 , one or more output devices  267 , and a network interface unit  268 . In  FIG.  12   , a display unit is shown as an output device  267 . In some embodiments, the system  15  may include more than one instance of the devices shown. Some examples of the system  15  include a computer system (desktop or laptop), a tablet computer, a mobile device, a cellular phone, a video gaming unit or console, a machine-to-machine (M2M) communication unit, a robot, an automobile, a virtual reality equipment, a stateless “thin” client system, a car&#39;s dash-cam or rearview camera system, or any other type of computing or data processing device. In various embodiments, all of the components shown in  FIG.  12    may be housed within a single housing. Thus, the system  15  may be configured as a standalone system or in any other suitable form factor. In some embodiments, the system  15  may be configured as a client system rather than a server system. 
     In particular embodiments, the system  15  may include more than one processor (e.g., in a distributed processing configuration). When the system  15  is a multiprocessor system, there may be more than one instance of the processor  19  or there may be multiple processors coupled to the processor  19  via their respective interfaces (not shown). The processor  19  may be a System on Chip (SoC) and/or may include more than one Central Processing Units (CPUs). 
     As mentioned earlier, the system memory  20  may be any semiconductor-based storage system such as, for example, DRAM, SRAM, PRAM, RRAM, CBRAM, MRAM, STT-MRAM, and the like. In some embodiments, the memory unit  20  may include at least one 3DS memory module in conjunction with one or more non-3DS memory modules. The non-3DS memory may include Double Data Rate or Double Data Rate 2, 3, or 4 Synchronous Dynamic Random Access Memory (DDR/DDR2/DDR3/DDR4 SDRAM), or Rambus® DRAM, flash memory, various types of Read Only Memory (ROM), etc. Also, in some embodiments, the system memory  20  may include multiple different types of semiconductor memories, as opposed to a single type of memory. In other embodiments, the system memory  20  may be a non-transitory data storage medium 
     The peripheral storage unit  265 , in various embodiments, may include support for magnetic, optical, magneto-optical, or solid-state storage media such as hard drives, optical disks (such as Compact Disks (CDs) or Digital Versatile Disks (DVDs)), non-volatile Random Access Memory (RAM) devices, and the like. In some embodiments, the peripheral storage unit  265  may include more complex storage devices/systems such as disk arrays (which may be in a suitable RAID (Redundant Array of Independent Disks) configuration) or Storage Area Networks (SANs), and the peripheral storage unit  265  may be coupled to the processor  19  via a standard peripheral interface such as a Small Computer System Interface (SCSI) interface, a Fibre Channel interface, a Firewire® (IEEE 1394) interface, a Peripheral Component Interface Express (PCI Express™) standard based interface, a Universal Serial Bus (USB) protocol based interface, or another suitable interface. Various such storage devices may be non-transitory data storage media. 
     The display unit  267  may be an example of an output device. Other examples of an output device include a graphics/display device, a computer screen, an alarm system, a CAD/CAM (Computer Aided Design/Computer Aided Machining) system, a video game station, a smartphone display screen, or any other type of data output device. In some embodiments, the input device(s), such as the imaging module  17 , and the output device(s), such as the display unit  267 , may be coupled to the processor  19  via an I/O or peripheral interface(s). 
     In one embodiment, the network interface  268  may communicate with the processor  19  to enable the system  15  to couple to a network (not shown). In another embodiment, the network interface  268  may be absent altogether. The network interface  268  may include any suitable devices, media and/or protocol content for connecting the system  15  to a network—whether wired or wireless. In various embodiments, the network may include Local Area Networks (LANs), Wide Area Networks (WANs), wired or wireless Ethernet, telecommunication networks, or other suitable types of networks. 
     The system  15  may include an on-board power supply unit  270  to provide electrical power to various system components illustrated in  FIG.  12   . The power supply unit  270  may receive batteries or may be connectable to an AC electrical power outlet. In one embodiment, the power supply unit  270  may convert solar energy into electrical power. 
     In one embodiment, the imaging module  17  may be integrated with a high-speed interface such as, for example, a Universal Serial Bus 2.0 or 3.0 (USB 2.0 or 3.0) interface or above, that plugs into any Personal Computer (PC) or laptop. A non-transitory, computer-readable data storage medium, such as, for example, the system memory  20  or a peripheral data storage unit such as a CD/DVD may store program code or software. The processor  19  and/or the digital processing block  167  ( FIG.  6 A ) in the imaging module  17  may be configured to execute the program code, whereby the device  15  may be operative to perform the 2D imaging and 3D depth measurements as discussed hereinbefore—such as, for example, the operations discussed earlier with reference to  FIGS.  1 - 11   . The program code or software may be proprietary software or open source software which, upon execution by the appropriate processing entity—such as the processor  19  and/or the digital block  167 —may enable the processing entity to capture pixel events using their precise timing, process them, render them in a variety of formats, and display them in the 2D and/or 3D formats. As noted earlier, in certain embodiments, the digital processing block  167  in the imaging module  17  may perform some of the processing of pixel event signals before the pixel output data are sent to the processor  19  for further processing and display. In other embodiments, the processor  19  may also perform the functionality of the digital block  167 , in which case, the digital block  167  may not be a part of the imaging module  17 . 
     In the preceding description, for purposes of explanation and not limitation, specific details are set forth (such as particular architectures, waveforms, interfaces, techniques, etc.) in order to provide a thorough understanding of the disclosed technology. However, it will be apparent to those skilled in the art that the disclosed technology may be practiced in other embodiments that depart from these specific details. That is, those skilled in the art will be able to devise various arrangements which, although not explicitly described or shown herein, embody the principles of the disclosed technology. In some instances, detailed descriptions of well-known devices, circuits, and methods are omitted so as not to obscure the description of the disclosed technology with unnecessary detail. All statements herein reciting principles, aspects, and embodiments of the disclosed technology, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, such as, for example, any elements developed that perform the same function, regardless of structure. 
     Thus, for example, it will be appreciated by those skilled in the art that block diagrams herein (e.g., in  FIGS.  1 - 2   ) can represent conceptual views of illustrative circuitry or other functional units embodying the principles of the technology. Similarly, it will be appreciated that the flow chart in  FIG.  9    represents various processes which may be substantially performed by a processor (e.g., the processor  19  in  FIG.  12    and/or the digital block  167  in  FIG.  6 A ). Such processor may include, by way of example, a general purpose processor, a special purpose processor, a conventional processor, a digital signal processor (DSP), a plurality of microprocessors, one or more microprocessors in association with a DSP core, a controller, a microcontroller, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) circuits, any other type of integrated circuit (IC), and/or a state machine. Some or all of the functionalities described above in the context of  FIGS.  1 - 11    also may be provided by such processor, in the hardware and/or software. 
     When certain inventive aspects require software-based processing, such software or program code may reside in a computer-readable data storage medium. As noted earlier, such data storage medium may be part of the peripheral storage  265  or may be part of the system memory  20  or the processor&#39;s  19  internal memory (not shown). In one embodiment, the processor  19  or the digital block  167  may execute instructions stored on such a medium to carry out the software-based processing. The computer-readable data storage medium may be a non-transitory data storage medium containing a computer program, software, firmware, or microcode for execution by a general purpose computer or a processor mentioned above. Examples of computer-readable storage media include a ROM, a RAM, a digital register, a cache memory, semiconductor memory devices, magnetic media such as internal hard disks, magnetic tapes and removable disks, magneto-optical media, and optical media such as CD-ROM disks and DVDs. 
     Alternative embodiments of the imaging module  17  or the system  15  comprising such an imaging module according to inventive aspects of the present disclosure may include additional components responsible for providing additional functionality, including any of the functionality identified above and/or any functionality necessary to support the solution as per the teachings of the present disclosure. Although features and elements are described above in particular combinations, each feature or element can be used alone without the other features and elements or in various combinations with or without other features. As mentioned before, various 2D and 3D imaging functions discussed herein may be provided through the use of hardware (such as circuit hardware) and/or hardware capable of executing software/firmware in the form of coded instructions or microcode stored on a computer-readable data storage medium (mentioned above). Thus, such functions and illustrated functional blocks are to be understood as being either hardware-implemented and/or computer-implemented, and thus machine-implemented. 
     The foregoing describes a system and method in which the same image sensor—that is, all of the pixels in the image sensor—may be used to capture both a 2D image of a 3D object and 3D depth measurements for the object. The image sensor may be part of a camera in a mobile device such as, for example, a smartphone. A laser light laser source may be used to point scan the surface of the object with light spots, which may be then detected by a pixel array in the image sensor to generate the 3D depth profile of the object using triangulation. In the 3D mode, the laser may project a sequence of light spots on the surface of the object along a scan line. The illuminated light spots may be detected using a row of pixels in the pixel array such that the row forms an epipolar line of the scan line. The detected light spots may be timestamped to remove any ambiguity in triangulation and, hence, to reduce the amount of depth computation and system power. A timestamp may also provide a correspondence between the pixel location of a captured laser spot and the respective scan angle of the laser light source to determine depth using triangulation. The image signals in the 2D mode may be represented by a multi-bit output from an ADC unit in the image sensor, but the ADC unit may produce just a binary output to generate timestamp values for 3D depth measurements. To reject strong ambient light, the image sensor may be operated in a 3D logarithmic mode as opposed to a 3D linear mode. 
     As will be recognized by those skilled in the art, the innovative concepts described in the present application can be modified and varied over a wide range of applications. Accordingly, the scope of patented subject matter should not be limited to any of the specific exemplary teachings discussed above, but is instead defined by the following claims.