Patent Publication Number: US-2009236261-A1

Title: Electronic component accommodating device

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This patent application is based upon and claims the benefit of priority under 35 USC 120 and 365(c) of PCT application JP2007/55435 filed in Japan on Mar. 16, 2007, the entire contents of which are incorporated herein by reference. 
    
    
     FIELD 
     The embodiments discussed herein are related to electronic component accommodating devices. 
     BACKGROUND 
     As one of means for carrying electronic components such as semiconductor devices without damaging them, a method has been applied where plural electronic components are individually accommodated in a tray so as to be carried. 
       FIG. 1  is a view illustrating a related art semiconductor device accommodating tray.  FIG. 1(   a ) is a plan view of the tray and  FIG. 1(   b ) is a cross-sectional view taken along a line X-X in a state where two of the trays are stacked. 
     Referring to  FIG. 1 , a semiconductor device accommodating tray  10  is a molded article made of a material such as plastic. The semiconductor device accommodating tray  10  has, as discussed below, a step configuration. Therefore, plural semiconductor device accommodating trays  10  can be stacked in a vertical direction. In an example illustrated in  FIG. 1 , two semiconductor device accommodating trays  10 - 1  and  10 - 2  are stacked in the vertical direction. 
     Plural concave-shaped accommodating parts  1  are formed at an upper surface of the semiconductor device accommodating tray  10 , so that semiconductor devices are accommodated inside the concave-shaped accommodating parts  1 . 
       FIG. 2(   a ) is an expanded view of a part surrounded by a dotted line A in  FIG. 1 .  FIG. 2(   b ) is an expanded view of a part surrounded by a dotted line B in  FIG. 1 . 
     As illustrated in  FIG. 2 , flanges  2 - 1  and  2 - 1  are formed in the vicinities of side end parts at lower surfaces of the semiconductor device accommodating trays  10 - 1  and  10 - 2  so as to extend downward. Side surfaces at center sides of the semiconductor device accommodating trays  10 - 1  and  10 - 2  of the flanges  2 - 1  and  2 - 2  are formed so as to incline the side end parts of the semiconductor device accommodating trays  10 - 1  and  10 - 2  from the vertical direction. The side surfaces at the center sides of the semiconductor device accommodating trays  10 - 1  and  10 - 2  of the flanges  2 - 1  and  2 - 2  are inclined from a horizontal surface at approximately 83 degrees. 
     On the other hand, tray upper side surface side wall parts  3 - 1  and  3 - 2  are formed in the vicinities of the side end parts at the upper surfaces of the semiconductor device accommodating trays  10 - 1  and  10 - 2  so as to extend upward. The tray upper side surface side wall parts  3 - 1  and  3 - 2  form side wall parts of the concave-shaped accommodating parts  1  positioned at the outermost circumferential sides of upper surfaces of the semiconductor device accommodating trays  10 - 1  and  10 - 2 . In the example illustrated in  FIG. 2 , semiconductor devices  4  are accommodated in the concave-shaped accommodating parts  1  of the semiconductor device accommodating tray  10 - 2 . 
     A side surface of the tray upper side surface side wall part  3 - 2  of the semiconductor device accommodating tray  10 - 2  at the side end part side of the semiconductor device accommodating tray  10 - 2 , compared to the side surface of the flange  2 - 1  of the semiconductor device accommodating tray  10 - 1  at the center side of the semiconductor device accommodating tray  10 - 1  stacked right above the semiconductor device accommodating tray  10 - 2 , is positioned toward the center side of the semiconductor device accommodating tray  10 - 2 . 
     The side surfaces of the semiconductor device accommodating trays  10 - 1  and  10 - 2  at the side end part sides of the semiconductor device accommodating trays  10 - 1  and  10 - 2  are formed so as to incline toward the center side of the semiconductor device accommodating trays  10 - 1  and  10 - 2  from the vertical direction and incline from a horizontal surface at approximately 83 degrees. 
     In addition to the above-discussed structure, Japanese Laid-Open Patent Application Publication No. 6-72478 discloses a tray for a semiconductor device, the tray being equipped with a locking part to lock corner parts of a packaging main body, has been suggested. Surfaces extending from ends of L shaped locking surfaces of a locking part and constituting an end of lead storage parts form an acute angle with the locking surfaces. The surfaces are constituted by retracting the end of the lead storage parts. 
     The semiconductor device accommodating tray  10  having the above-discussed structure is, as discussed above, a molded article made of a material such as plastic. Accordingly, dimensional tolerance variation due to unevenness at the time of molding may be generated. Therefore, when the semiconductor device accommodating trays  10 - 1  and  10 - 2  are stacked, as illustrated in dotted lines C and D in  FIG. 2 , a gap of approximately 0.065 mm as a minimum may be formed between the side surface of the tray upper surface side wall part  3 - 2  at the side end part side of the semiconductor device accommodating tray  10 - 2  and the side surface of the flange  2 - 1  at the center side of the semiconductor device accommodating tray  10 - 1  stacked right above the semiconductor device accommodating tray  10 - 2 . 
     If the gap formed between the side surface of the tray upper surface side wall part  3 - 2  at the side end part side of the semiconductor device accommodating tray  10 - 2  and the side surface of the flange  2 - 1  at the center side of the semiconductor device accommodating tray  10 - 1  is little as discussed above, the following problem may occur. That is, when the semiconductor device accommodating tray  10 - 1  stacked above the semiconductor device accommodating tray  10 - 2  is separated from the semiconductor device accommodating tray  10 - 2 , due to the own weight of the semiconductor device accommodating tray  10 - 1 , the semiconductor device accommodating tray  10 - 1  may have configurations where the side end part sides are deformed downward. As a result of this, the gap formed between the side surface of the tray upper surface side wall part  3 - 2  at the side end part side of the semiconductor device accommodating trays  10 - 2  and the side surface of the flange  2 - 1  at the center side of the semiconductor device accommodating tray  10 - 1  becomes zero. 
     As a result of this, as indicated by a dotted line in  FIG. 3 , a warp occurs where the substantially center part of the semiconductor device accommodating tray  10 - 1  is bent upward. 
     In addition, during the manufacturing processes of the semiconductor devices  4  such as a baking process, heat is applied in a state where semiconductor elements are accommodated in the concave-shaped accommodating parts  1 . By performing cooling after the process where heat is applied, the semiconductor device accommodating trays  10 - 1  and  1 - 2  are in contact so that, as indicated by a dotted line in  FIG. 3 , the warp where the substantially center part of the semiconductor device accommodating tray  10 - 1  is bent upward may occur. 
     When the warp occurs where the substantially center part of the semiconductor device accommodating tray  10 - 1  is bent upward, a state where the semiconductor device accommodating tray  10 - 1  is engaged with the semiconductor device accommodating tray  10 - 2  is formed. This state is discussed with reference to  FIG. 4 .  FIG. 4(   a ) is an expanded view of a part surrounded by a dotted line A in  FIG. 3 .  FIG. 4(   b ) is an expanded view of a part surrounded by a dotted line B in  FIG. 3 . 
     Referring to  FIG. 4 , when the warp occurs where the substantially center part of the semiconductor device accommodating tray  10 - 1  is bent upward, the side surface at the center side of the semiconductor device accommodating tray  10 - 1  (which is stacked right above the semiconductor device accommodating tray  10 - 2 ) of the flange  2 - 1  comes in contact with the side surface of the tray upper surface side wall part  3 - 2  of the semiconductor device accommodating tray  10 - 2  at the side end part side of the semiconductor device accommodating tray  10 - 1 , so that interference is formed. 
     More specifically, due to the above-mentioned warp, when the end part of the semiconductor device accommodating tray  10 - 1  is bent at approximately 1 degree, the gap formed between the side surface of the tray upper surface side wall part  3 - 2  at the side end part side of the semiconductor device accommodating trays  10 - 2  and the side surface of the flange  2 - 1  at the center side of the semiconductor device accommodating tray  10 - 1  becomes zero. In addition, the side surface of the flange  2 - 1  at the center side of the semiconductor device accommodating tray  10 - 1  interferes approximately 0.1 mm with the side surface of the tray upper surface side wall part  3 - 2  of the side end part side of the semiconductor device accommodating tray  10 - 2 . 
     As a result of this, the semiconductor device accommodating tray  10 - 1  is engaged with the semiconductor device accommodating tray  10 - 2 , and thereby positional precision of the concave-shaped accommodating parts  1  of the semiconductor device accommodating trays  10 - 1  and  10 - 2  is degraded. 
     Especially, in a case where the semiconductor device accommodating trays  10  are stacked in a multistage manner, due to such a warp, positional shift from the semiconductor device accommodating trays  10  situated at a lower part to the semiconductor device accommodating trays  10  situated at an upper part is generated. Because of this, the positional precision of the concave-shaped accommodating parts  1  of each of the semiconductor device accommodating trays  10  is degraded so that the positional shift of the semiconductor devices  4  in the concave-shaped accommodating parts  1  may be caused. 
     As a result of this, such a positional shift of the semiconductor devices  4  in the concave-shaped accommodating parts  1  may become an obstacle when the semiconductor devices  4  are accommodated in or taken out from the concave-shaped accommodating parts  1 . 
     SUMMARY 
     According to an aspect of the invention, it is possible to provide an electronic component accommodating device which can be stacked in plural, the electronic component accommodating device including: an upper surface side wall part extending from an upper surface of the electronic component accommodating device, the upper surface side wall part being positioned close to a flange extending from a lower surface of another electronic component accommodating device stacked on the electronic component accommodating device, wherein a side surface of the upper surface side wall part a side end part of the electronic component accommodating device is formed in a taper shape and has an inclination angle from a horizontal surface, the inclination angle being equal to or less than 60 degrees. 
     According to another aspect of the invention, it is possible to provide an electronic component accommodating device which can be stacked in plural, the electronic component accommodating device including: an upper surface side wall part extending from an upper surface of the electronic component accommodating device, the upper surface side wall part being positioned close to a flange extending from a lower surface of another electronic component accommodating device stacked on the electronic component accommodating device, wherein the upper surface side wall part includes a side surface positioned at a side end part side of the electronic component accommodating device; and the side surface includes a first surface formed in a taper manner from the upper surface of the electronic component accommodating device, the first surface having an inclination angle from a horizontal surface equal to or less than 60 degrees. 
     The object and advantages of the invention may be realized and attained by means of the elements and combinations particularly pointed out in the appended claims. 
     It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention as claimed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a view illustrating a related art semiconductor device accommodating tray; 
         FIG. 2  is an expanded view of a part surrounded by a dotted line in  FIG. 1 ; 
         FIG. 3  is a view for explaining problems of the semiconductor device accommodating tray illustrated in  FIG. 1 ; 
         FIG. 4  is an expanded view of a part surrounded by a dotted line in  FIG. 3 ; 
         FIG. 5  is a view illustrating a semiconductor device accommodating tray of an embodiment; 
         FIG. 6  is an expanded view of a part surrounded by a dotted line in  FIG. 5 ; 
         FIG. 7  is a view showing a state where a warp is generated in the semiconductor device accommodating tray illustrated in  FIG. 5 ; 
         FIG. 8  is an expanded view of a part surrounded by a dotted line in  FIG. 7 ; 
         FIG. 9  is a view of a part surrounded by a dotted line C in  FIG. 7 ; 
         FIG. 10  is a view illustrating a first modified example of the semiconductor device accommodating tray illustrating in  FIG. 6  and  FIG. 8 ; 
         FIG. 11  is a view showing a state where a warp is generated in the semiconductor device accommodating tray illustrated in  FIG. 10 ; and 
         FIG. 12  is a view illustrating a second modified example of the semiconductor device accommodating tray illustrating in  FIG. 6  and  FIG. 8 . 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Preferred embodiments of the present invention will be explained with reference to accompanying drawings. 
     The embodiments of the present invention may provide a novel and useful electronic component accommodating device which can be stacked in plural, the electronic component accommodating device having a configuration whereby even if an upward warp of the substantially center part is generated in a state where the electronic component accommodating device is stacked on another electronic component accommodating device, it is possible to prevent the electronic component accommodating device from being engaged with the other electronic component accommodating device. 
     A semiconductor device accommodating device of an embodiment is discussed with reference to  FIG. 5  through  FIG. 12 . 
       FIG. 5  is a view illustrating a semiconductor device accommodating tray  50  of the embodiment.  FIG. 5(   a ) is a plan view of the tray  50  and  FIG. 5(   b ) is a cross-sectional view taken along a line X-X in a state where two of the trays  50  are stacked. 
     Referring to  FIG. 5 , the semiconductor device accommodating tray  50  is a molded article made of plastic resin such as polystyrene (PS) or polyphenylene ether (PPE). The semiconductor device accommodating tray  50  has, as discussed below, a step configuration. Therefore, plural semiconductor device accommodating trays  50  can be stacked in a vertical direction. In an example illustrated in  FIG. 5 , two semiconductor device accommodating trays  50 - 1  and  50 - 2  are stacked in the vertical direction. 
     Plural concave-shaped accommodating parts  41  are formed at an upper surface of the semiconductor device accommodating tray  50 , so that semiconductor devices are accommodated inside the concave-shaped accommodating parts  41 . 
       FIG. 6(   a ) is an expanded view of a part surrounded by a dotted line A in  FIG. 5 .  FIG. 6(   b ) is an expanded view of a part surrounded by a dotted line B in  FIG. 5 . 
     As illustrated in  FIG. 6 , flanges  42 - 1  and  42 - 2  are formed in the vicinities of side end parts at lower surfaces of the semiconductor device accommodating trays  50 - 1  and  50 - 2  so as to extend downward. Side surfaces of the flanges  42 - 1  and  42 - 2  at center sides of the semiconductor device accommodating trays  50 - 1  and  50 - 2  are formed so as to have the side end parts of the semiconductor device accommodating trays  50 - 1  and  50 - 2  inclined from the vertical direction. 
     On the other hand, tray upper side surface side wall parts  43 - 1  and  43 - 2  are formed in the vicinities of the side end parts at the upper surfaces of the semiconductor device accommodating trays  50 - 1  and  50 - 2  so as to extend upward. The tray upper side surface side wall parts  43 - 1  and  43 - 2  form side wall parts  41 - 1  and  41 - 2  of the concave-shaped accommodating parts  41  positioned at outermost circumferential sides of upper surfaces of the semiconductor device accommodating trays  50 - 1  and  50 - 2 . In the example illustrated in  FIG. 6 , semiconductor devices  44  are accommodated in the concave-shaped accommodating parts  41  of the semiconductor device accommodating tray  50 - 2 . 
     Side surfaces of the tray upper side surface side wall parts  43 - 2  of the semiconductor device accommodating tray  50 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2 , compared to the side surfaces of the flanges  42 - 1  of the semiconductor device accommodating tray  50 - 1  at the center side of the semiconductor device accommodating tray  50 - 1  stacked right above the semiconductor device accommodating tray  50 - 2 , are positioned at the center side of the semiconductor device accommodating tray  50 - 2 . 
     The side surface of the tray upper surface side wall part  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2  is formed so as to be inclined (in a taper state) from the vertical direction to the center side of the semiconductor device accommodating tray  50 - 2  and has an inclination angle from the horizontal surface equal to or less than approximately 60 degrees. 
     As discussed above, the semiconductor device accommodating tray  50  is a molded article made of plastic resin such as polystyrene (PS) or polyphenylene ether (PPE). Accordingly, the semiconductor device accommodating tray  50  may have dimensional tolerance variation due to unevenness at the time of molding or the like. Accordingly, when the semiconductor device accommodating tray  50 - 1  and the semiconductor device accommodating tray  50 - 2  are stacked, as illustrated in dotted lines C and D in  FIG. 6 , gaps having a length of approximately 0.065 mm as minimum can be generated between the side surfaces of the tray upper surface side wall parts  43 - 2  at the side end part sides of the semiconductor device accommodating tray  50 - 2  and the side surfaces of the flanges  42 - 1  at the lower edge part of the center side of the semiconductor device accommodating tray  50 - 1  stacked right above the semiconductor device accommodating tray  50 - 2 . 
     If the gaps formed between the side surfaces of the tray upper surface side wall parts  43 - 2  at the side end part sides of the semiconductor device accommodating tray  50 - 2  and the side surfaces of the flanges  42 - 1  at the center side of the semiconductor device accommodating tray  50 - 1  are each a little, the following state may happen. That is, when the semiconductor device accommodating tray  50 - 1  stacked above the semiconductor device accommodating tray  50 - 2  is separated from the semiconductor device accommodating tray  50 - 2 , due to the own weight of the semiconductor device accommodating tray  50 - 1 , the semiconductor device accommodating tray  50 - 1  may have configurations where the side end part sides are deformed downward. As a result of this, the gaps formed between the side surfaces of the tray upper surface side wall parts  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2  and the side surfaces of the flanges  42 - 1  at the center side of the semiconductor device accommodating tray  50 - 1  become zero. 
     As a result of this, as indicated by a dotted line in  FIG. 7 , a warp where the substantially center part of the semiconductor device accommodating tray  50 - 1  is bent upward occurs. 
     In addition, during the manufacturing processes of the semiconductor devices  44  such as a baking process, heat is applied in a state where semiconductor elements  44  are accommodated in the concave-shaped accommodating parts  41 . By performing cooling after the process where heat is applied, the semiconductor device accommodating trays  50 - 1  and  50 - 2  are in contact so that, as indicated by a dotted line in  FIG. 7 , the warp where the substantially center part of the semiconductor device accommodating tray  50 - 1  is bent upward may occur. 
     However, in the semiconductor device accommodating tray  50 - 2 , the side surfaces of the tray upper surface side wall parts  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2  are formed so as to be inclined (in a taper state) from the vertical direction to the center side of the semiconductor device accommodating tray  50 - 2  and have inclination angles from the horizontal surface equal to or less than approximately 60 degrees. Accordingly, in this example unlike the example illustrated in  FIG. 4 , even if the warp occurs where the substantially center part of the semiconductor device accommodating tray  50 - 1  is bent upward, the semiconductor device accommodating tray  50 - 1  is not engaged with the semiconductor device accommodating tray  50 - 2 . 
     This is discussed with reference to  FIG. 8  and  FIG. 9 .  FIG. 8(   a ) is an expanded view of a part surrounded by a dotted line A.  FIG. 8(   a ) is an expanded view of a part surrounded by a dotted line A in  FIG. 7 .  FIG. 8(   b ) is an expanded view of a part surrounded by a dotted line B in  FIG. 7 .  FIG. 9  is an expanded view of a part surrounded by a dotted line C in  FIG. 8 . 
     Referring to  FIG. 8  and  FIG. 9 , when the warp occurs where the substantially center part of the semiconductor device accommodating tray  50 - 1  is bent upward so that a lower edge part  42 - 1   a  of the flange  42 - 1  of the semiconductor device accommodating tray  50 - 1  at the center side of the semiconductor device accommodating tray  50 - 1  comes in contact with a side surface  43 - 2   a  of the tray upper surface side wall part  43 - 2  of the side end part side of the semiconductor device accommodating tray  50 - 2  and there is interference, a problem does not happen. That is, as indicated by white arrows in  FIG. 8  and  FIG. 9 , the lower edge parts  42 - 1   a  of the flanges  42 - 1  of the semiconductor device accommodating tray  50 - 1  at the center side of the semiconductor device accommodating tray  50 - 1  slide on the side surfaces  43 - 2   a  of the tray upper surface side wall parts  43 - 2  at the side end part sides of the semiconductor device accommodating tray  50 - 2  which have inclination angles from the horizontal surface equal to or less than approximately 60 degrees. 
     As indicated by a one dotted line in  FIG. 9 , in the related art semiconductor device accommodating tray  10 - 1  illustrated in  FIG. 1  through  FIG. 4 , the side surface of the tray upper surface side wall part  3 - 2  (corresponding to tray upper surface side wall part  43 - 2 ) at the side end part side of the semiconductor device accommodating tray  10 - 2  (corresponding to the semiconductor device accommodating tray  50 - 2 ) is formed so as to be inclined from the horizontal surface at approximately 83 degrees. Therefore, as discussed above, the side surface of the flange  2 - 1  at the center side of the semiconductor device accommodating tray  10 - 1  interferes approximately 0.1 mm with the side surface of the tray upper surface side wall part  3 - 2  of the side end part side of the semiconductor device accommodating tray  10 - 2 . 
     On the other hand, in the semiconductor device accommodating tray  50 - 2  of this example, the side surface  43 - 2   a  of the tray upper surface side wall part  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2  has an inclination angle from the horizontal surface equal to or less than approximately 60 degrees. 
     The inventors grasp through simulation that in a case where the inclination angle from the horizontal surface of the side surface  43 - 2   a  of the tray upper surface side wall part  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2  is greater than approximately 60 degrees, the lower edge part  42 - 1   a  of the flange  42 - 1  of the semiconductor device accommodating tray  50 - 1  at the center side of the semiconductor device accommodating tray  50 - 1  comes in contact with the side surface  43 - 2   a  of the tray upper surface side wall part  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2  so that the interference occurs. 
     Therefore, when the warp occurs where the substantially center part of the semiconductor device accommodating tray  50 - 1  is bent upward so that the lower edge parts  42 - 1   a  of the flanges  42 - 1  of the semiconductor device accommodating tray  50 - 1  at the center side of the semiconductor device accommodating tray  50 - 1  come in contact with the side surfaces  43 - 2   a  of the tray upper surface side wall parts  43 - 2  of the side end part sides of the semiconductor device accommodating tray  50 - 2  and there is interference, a problem does not happen. That is, as indicated the white arrow in  FIG. 9 , the lower edge part  42 - 1   a  of the flange  42 - 1  slides on the side surface  43 - 2   a  of the tray upper surface side wall part  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2 . 
     Accordingly, in this example unlike the example illustrated in  FIG. 4 , the semiconductor device accommodating tray  50 - 1  is not engaged with the semiconductor device accommodating tray  50 - 2 . Hence, it is possible to prevent positional precision of the concave-shaped accommodating parts  41  of the semiconductor device accommodating trays  50 - 1  and  50 - 2  from being degraded. 
     Even if the semiconductor device accommodating trays  50  are stacked in a multistage manner, it is possible to prevent the generation of the positional shift from the semiconductor device accommodating tray  50  situated at a lower position compared to the semiconductor device accommodating tray  50  situated at an upper position due to such a warp. Therefore, it is possible to prevent reduction of the positional precision of the concave-shaped accommodating parts  41  of each of the semiconductor device accommodating trays  50 . 
     In the meantime, in the above-discussed examples, as illustrated in  FIG. 6  and  FIG. 8 , the side surfaces of the flanges  42 - 1  and  42 - 2  of the semiconductor device accommodating trays  50 - 1  and  50 - 2  at the center sides of the semiconductor device accommodating trays  50 - 1  and  50 - 2  are formed so as to be inclined toward the side end parts of the semiconductor device accommodating trays  50 - 1  and  50 - 2  from the vertical direction. However, there is no limitation of the inclination angle. 
     Accordingly, for example, an example illustrated in  FIG. 10  can be applied. Here,  FIG. 10  illustrates a state where a semiconductor device accommodating tray  50 - 1 ′ which is a modified example of the semiconductor device accommodating tray  50 - 1  illustrated in  FIG. 6  is stacked on the semiconductor device accommodating tray  50 - 2  illustrated in  FIG. 6 .  FIG. 10(   a ) corresponds to  FIG. 6(   a ) and  FIG. 10(   b ) corresponds to  FIG. 6(   b ). In  FIG. 10 , parts that are the same as the parts depicted in  FIG. 6  are given the same reference numerals, and explanation thereof is omitted. 
     In the semiconductor device accommodating tray  50 - 1 ′ illustrated in  FIG. 10 , a flange  42 - 1 ′ is formed at a lower surface of the semiconductor device accommodating tray  50 - 1 ′ and in the vicinity of the side end part of the semiconductor device accommodating tray  50 - 1 ′ so as to extend downward. 
     The side surface of the flange  42 - 1 ′ at the center side of the semiconductor device accommodating tray  50 - 1 ′ is formed so as to be inclined (in a taper state) from the vertical direction to the side end part of the semiconductor device accommodating tray  50 - 1 ′ and has an inclination angle from the horizontal surface equal to or less than approximately 60 degrees, which is the same as the inclination angle of the tray upper surface side wall part  43 - 2 . 
     A state where the warp is generated where the substantially center part of the semiconductor device accommodating tray  50 - 1 ′ is curved upward is illustrated in  FIG. 11 .  FIG. 11(   a ) corresponds to  FIG. 10(   a ) and  FIG. 11(   b ) corresponds to  FIG. 10(   b ). 
     An inclination angle of the side surface of the flange  42 - 1 ′ at the center side of the semiconductor device accommodating tray  50 - 1 ′ from the horizontal surface is equal to or smaller than approximately 60 degrees which is substantially the same as the inclination angle of the tray upper surface side wall part  43 - 2 . Therefore, as indicated by a dotted line in  FIG. 11 , even if the warp occurs where the substantially center part of the semiconductor device accommodating tray  50 - 1 ′ is bent upward, the side surfaces  42 - 1   a ′ of the flanges  42 - 1 ′ at the center side of the semiconductor device accommodating tray  50 - 1 ′ are received on the side surfaces  43 - 2   a ′ of the tray upper surface side wall parts  43 - 2  at the side end part sides of the semiconductor device accommodating tray  50 - 2 . 
     Accordingly, sliding indicated by arrows in  FIG. 11  is generated in the semiconductor device accommodating trays  50 - 1 ′ and  50 - 2 . Hence, in this example unlike the example illustrated in  FIG. 4 , the semiconductor device accommodating tray  50 - 1 ′ is not engaged with the semiconductor device accommodating tray  50 - 2 . Therefore, it is possible to prevent positional precision of the concave-shaped accommodating parts  41  of the semiconductor device accommodating trays  50 - 1 ′ and  50 - 2  from being degraded. 
     In this example, the side surface  42 - 1   a ′ of the flange  42 - 1 ′ at the center side of the semiconductor device accommodating tray  50 - 1 ′ is received on the side surface  43 - 2   a ′ of the tray upper surface side wall part  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2 . Therefore, it is possible to prevent generation of a positional shift in a horizontal direction between the semiconductor device accommodating trays  50 - 1 ′ and  50 - 2 . 
     Even if the semiconductor device accommodating trays  50  are stacked in a multistage manner, it is possible to prevent the generation of the positional shift from the semiconductor device accommodating tray  50  situated at a lower position to the semiconductor device accommodating tray  50  situated at an upper position due to such a warp. Therefore, it is possible to prevent reduction of the positional precision of the concave-shaped accommodating parts  41  of each of the semiconductor device accommodating trays  50 . 
     Accordingly, there is no need to provide a special device for preventing the positional shift of the semiconductor devices  44  in the concave-shaped accommodating parts  41 . Hence, it is possible to simplify a mechanism for putting or removing the semiconductor devices  44  in or from the semiconductor device accommodating tray  50 . 
     An inclination angle of the side surface of the flange  42 - 1   a ′ of the flange  42 - 1 ′ of the semiconductor device accommodating tray  50 - 1  at the center side of the semiconductor device accommodating tray  50 - 1 ′ from the horizontal surface is equal to or smaller than approximately 60 degrees. Therefore, in this example compared to the examples illustrated in  FIG. 6  and  FIG. 8 , the width of the semiconductor device accommodating tray  50 - 1 ′ is increased so that rigidity of the semiconductor device accommodating tray  50 - 1 ′ is improved. Accordingly, it is possible to reduce generation of the warp where the substantially center part of the semiconductor device accommodating tray  50 - 1 ′ is curved upward. 
     In the meantime, in the examples illustrated in  FIG. 6  and  FIG. 8 , the side surface  43 - 2   a  of the tray upper side surface wall part  43 - 2  at the side end part of the semiconductor device accommodating tray  50 - 2  has a plane surface where any part has an inclination angle from the horizontal surface equal to or less than approximately 60 degrees (See  FIG. 9 ). However, the embodiment is not limited to such an example and an example illustrated in  FIG. 12  can be applied. 
       FIG. 12  illustrates a state where the semiconductor device accommodating tray  50 - 2  illustrated in  FIG. 6  is stacked on a semiconductor device accommodating tray  50 - 2 ′ which is a modified example of the semiconductor device accommodating tray  50 - 2  illustrated in  FIG. 6 .  FIG. 12(   a ) corresponds to  FIG. 6(   a ) and  FIG. 12(   b ) is an expanded view of a part surrounded by a dotted line in  FIG. 12(   a ). In  FIG. 12 , parts that are the same as the parts depicted in  FIG. 6  are given the same reference numerals, and explanation thereof is omitted. 
     In the example illustrated in  FIG. 12 , a tray upper side surface side wall part  43 - 2 ′ is formed at the upper surface of the semiconductor device accommodating tray  50 - 2 ′ in the vicinity of the side end part at the upper surfaces of the semiconductor device accommodating tray  50 - 2 ′ so as to extend upward. 
     The side surface of the tray upper surface side wall part  43 - 2 ′ at the side end part side of the semiconductor device accommodating tray  50 - 2 ′ is formed by a first side surface part  43 - 2 ′ b  extending from the upper surface of the semiconductor device accommodating tray  50 - 2 ′ formed obliquely upward with an inclination angle equal to or less than approximately 60 degrees and a second side surface part  43 - 2 ′ c  extending obliquely upward with a designated angle α from the first upper surface part  43 - 2 ′ b . In other words, the second side surface part  43 - 2 ′ c  extends from the first side surface part  43 - 2 ′ b  with an inclination angle from the upper surface of the semiconductor device accommodating tray  50 - 2 ′ which is a horizontal surface, the angle being different from an inclination angle of the first side surface part  43 - 2 ′ b  which is equal to or less than 60 degrees. 
     Accordingly, when the warp occurs where the substantially center part of the semiconductor device accommodating tray  50 - 1  is bent upward so that the curve-shaped lower edge part  42 - 1   a  of the flange  42 - 1  of the semiconductor device accommodating tray  50 - 1  at the center side of the semiconductor device accommodating tray  50 - 1  comes in contact with the first side surface  43 - 2   b ′ of the tray upper surface side wall part  43 - 2  at the side end part side of the semiconductor device accommodating tray  50 - 2 , a problem does not happen. That is, since the first side surface part  43 - 2 ′ b  is formed obliquely upward with the inclination angle from the horizontal surface which is equal to or less than approximately 60 degrees, as indicated by an arrow in  FIG. 12 , the lower edge part  42 - 1   a  of the flange  42 - 1  slides on the first side surface  43 - 2 ′ b  of the tray upper surface side wall part  43 - 2 . 
     Hence, in this example unlike the example illustrated in  FIG. 4 , the semiconductor device accommodating tray  50 - 1  is not engaged with the semiconductor device accommodating tray  50 - 2 . Therefore, it is possible to prevent positional precision of the concave-shaped accommodating parts  41  of the semiconductor device accommodating trays  50 - 1  and  50 - 2  from being degraded. 
     While the lower edge part  42 - 1   a  of the flange  42 - 1  slides on the first side surface  43 - 2 ′ b  of the tray upper surface side wall part  43 - 2 , the lower edge part  42 - 1   a  does not further slide on the second side surface part  43 - 2 ′ c.    
     In the example illustrated in  FIG. 12 , the side surface of the tray upper surface side wall part  43 - 2 ′ at the side end part side of the semiconductor device accommodating tray  50 - 2 ′ has a two surfaces structure formed by the first side surface part  43 - 2 ′ b  and the second side surface part  43 - 2 ′ c . However, the side surface at the side end part side of the semiconductor device accommodating tray  50 - 2 ′ may have a multi surfaces structure having at least three or more surfaces. 
     In other words, as long as a part (the first side surface part  43 - 2 ′ b ) is formed at the side surface of the tray upper surface side wall part  43 - 2 ′ at the side end part side of the semiconductor device accommodating tray  50 - 2 ′ so as to extend, obliquely upward, with an inclination angle equal to or less than approximately 60 degrees from the upper surface of the semiconductor device accommodating tray  50 - 2 ′, there is no limitation of a configuration of the side surface of the tray upper surface side wall part  43 - 2 ′ at the side end part side of the semiconductor device accommodating tray  50 - 2 ′. 
     The present invention is not limited to these embodiments, but variations and modifications may be made without departing from the scope of the present invention. 
     For example, although the semiconductor device accommodating tray configured to accommodate the semiconductor devices is discussed in the description above as an example, the electronic component accommodating device of the embodiment can be applied to a device configured to accommodate electronic components other than the semiconductor devices. 
     According to the embodiment, it is possible to provide an electronic components accommodating device which can be stacked in plural, the electronic component accommodating device having a configuration whereby even if an upward warp of the substantially center part is generated in a state where the electronic component accommodating device is stacked on another electronic component accommodating device, it is possible to prevent the electronic component accommodating device from being engaged with the other electronic component accommodating device. 
     The embodiment can be applied to an electronic component accommodating device configured to accommodate electronic components such as semiconductor devices so that the electronic components are carried. 
     All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a illustrating of the superiority or inferiority of the invention. Although the embodiments of the present invention have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.