Patent Publication Number: US-2021176866-A1

Title: Printed wiring board and method for manufacturing printed wiring board

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     The present application is based upon and claims the benefit of priority to Japanese Patent Application No. 2019-222027, filed Dec. 9, 2019, the entire contents of which are incorporated herein by reference. 
     BACKGROUND OF THE INVENTION 
     Field of the Invention 
     The present invention relates to a printed wiring board having metal posts, and a method for manufacturing the printed wiring board. 
     Description of Background Art 
     Japanese Patent Application Laid-Open Publication No. 2003-218286 describes a printed wiring board having solder bumps welded on a Cu layer and a Ni layer protruding from openings of an insulating layer. The entire contents of this publication are incorporated herein by reference. 
     SUMMARY OF THE INVENTION 
     According to one aspect of the present invention, a printed wiring board includes a resin insulating layer, via conductors formed in the resin insulating layer, metal posts formed on the via conductors, respectively, and a solder resist layer formed on the resin insulating layer such that the metal posts have lower portions embedded in the solder resist layer and upper portions exposed from the solder resist layer, respectively. The metal posts are formed such that each of the metal posts has a top portion having a diameter in a range of 0.8 to 0.9 times a diameter of a respective one of the lower portions of the metal posts. 
     According to another aspect of the present invention, a method for manufacturing a printed wiring board includes forming an electrolytic plating film on an electroless plating film exposed from a first plating resist layer such that via conductors are formed in openings in the outermost resin insulating layer and that a conductor circuit is formed on a surface of the outermost resin insulating layer, removing the first plating resist layer from the outermost resin insulating layer such that part of the electroless plating film covered by the first plating resist layer is exposed from the electrolytic plating; forming a second plating resist layer on the outermost resin insulating layer such that the second plating resist layer has openings on the via conductors, respectively; applying plating in the openings in the second plating resist layer such that metal posts are formed on the via conductors, respectively; removing the second plating resist layer from the outermost resin insulating layer such that the conductor circuit formed on the outermost resin insulating layer and the part of the electroless plating film exposed from the electrolytic plating are exposed; applying first etching on the part of the electroless plating film exposed from the electrolytic plating film such that the part of the electroless plating film exposed from the electrolytic plating film is removed from the outermost resin insulating layer; forming a solder resist layer on the outermost resin insulating layer such that the solder resist layer covers the conductor circuit and the metal posts formed on the outermost resin insulating layer; reducing a film thickness of the solder resist layer such that the metal posts have upper portions exposed from the solder resist layer and lower portions embedded in the solder resist layer, respectively; and applying second etching on the upper portions of the metal posts such that each of the metal posts has a top portion having a diameter in a range of 0.8 to 0.9 times a diameter of a respective one of the lower portions of the metal posts. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein: 
         FIGS. 1A-1D  are manufacturing process diagrams of a printed wiring board according to an embodiment of the present invention; 
         FIGS. 2A-2D  are manufacturing process diagrams of the printed wiring board of the embodiment; and 
         FIGS. 3A-3E  are manufacturing process diagrams of the printed wiring board of the embodiment. 
     
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
     Embodiments will now be described with reference to the accompanying drawings, wherein like reference numerals designate corresponding or identical elements throughout the various drawings. 
       FIG. 1A  illustrates a cross section of a printed wiring board  10  of an embodiment. The printed wiring board  10  includes a first resin insulating layer ( 50 A) having a first surface (F) and a second surface (S) on an opposite side with respect to the first surface (F), and a second resin insulating layer ( 50 B) formed on the second surface (S) side of the first resin insulating layer ( 50 A). A first conductor layer ( 58 A) is formed on the first surface (F) of the first resin insulating layer ( 50 A), and a second conductor layer ( 58 B) is formed on the second surface (S) of the first resin insulating layer ( 50 A). First via conductors ( 60 A) that penetrate the first resin insulating layer ( 50 A) and connect the first conductor layer ( 58 A) and the second conductor layer ( 58 B) to each other are formed in the first resin insulating layer ( 50 A). A third conductor layer ( 58 C) is formed on a surface of the second resin insulating layer ( 50 B) on an opposite side with respect to the second surface (S). Second via conductors ( 60 B) that penetrate the second resin insulating layer ( 50 B) and connect the second conductor layer ( 58 B) and the third conductor layer ( 58 C) to each other are formed in the second resin insulating layer ( 50 B). A solder resist layer  70  having openings  71  is formed on the first resin insulating layer ( 50 A), the first conductor layer ( 58 A) and the first via conductors ( 60 A). Metal posts  76  of which upper parts ( 76 U) are respectively exposed by the openings  71  are respectively formed on the first via conductors ( 60 A). 
     Lower parts ( 76 D) of the metal posts  76  are embedded in the solder resist layer  70 . The upper parts ( 76 U) of the metal posts  76  are exposed from the solder resist layer  70 . A surface treatment layer  78  formed of a Ni/Pd/Au layer is formed the exposed part of each of the metal posts  76  exposed from the solder resist layer. A diameter (d1) of a lowermost portion of the lower part ( 76 D) of each of the metal posts  76  is 40 μm-50 μm. A diameter (d2) of a top part (a flat part of a front end) ( 76 T) of each of the metal posts  76  is 0.8-0.9 times the diameter (d1) of the lower part ( 76 D). The exposed portion (upper part ( 76 U)) of each of the metal posts  76  exposed from the solder resist layer  70  has a height (t1) of 3 μm-10 μm. The surface treatment layer  78  has a thickness of 1 μm. A height of a surface of the surface treatment layer  78  provided on each of the metal posts  76  is 4 μm-11 μm relative to the solder resist layer. 
     According to the printed wiring board  10  of the embodiment, the diameter (d2) of the top part ( 76 T) of each of the metal posts is 0.8-0.9 times the diameter (d1) (40 μm-50 μm) of the lower part ( 76 D) of each of the metal posts  76  of which the lower parts ( 76 D) are embedded in the solder resist layer  70  and the upper parts ( 76 U) are exposed from the solder resist layer  70 . The height (t1) of the exposed portion (the upper part ( 76 U)) of each of the metal posts  76  exposed from the solder resist layer  70  is 3 μm or more. Since the diameter of the top part ( 76 T) of each of the metal posts  76  is not too small and the height is not too low, two terminals can be easily brought into contact with the metal posts  76  exposed from the solder resist layer, and a resistance can be accurately measured using a 4-terminal checker. Since the height (t1) of the exposed portion (upper part ( 76 U)) of each of the metal posts  76  exposed from the solder resist layer  70  is 10 μm or less, the metal posts  76  can be formed at a fine pitch. Since the front end of the exposed part ( 76 U) of each of the metal posts  76  exposed from the solder resist layer is thin, adhesion between the exposed part ( 76 U) and the surface treatment layer  78  can be increased. 
     Method for Manufacturing Printed Wiring Board 
     Using a known manufacturing method, the first resin insulating layer ( 50 A) is laminated on the second resin insulating layer ( 50 B) on or in which the second conductor layer ( 58 B), the third conductor layer ( 58 C), and the second via conductors ( 60 B) are formed, and via openings  51  are formed ( FIG. 1B ). 
     By electroless plating, an electroless plating film  52  is formed on the surface of the first resin insulating layer ( 50 A), and in the openings  51  ( FIG. 1C ). A first plating resist  54  of a predetermined pattern is formed on the electroless plating film  52  ( FIG. 1D ). By electrolytic plating, the (filled vias) first via conductors ( 60 A) formed of an electrolytic plating film  64  are formed in the openings  51  exposed from the first plating resist  54 , and the first conductor layer ( 58 A) is formed on the electroless plating film  52  on the first resin insulating layer ( 50 A) ( FIG. 2A ). 
     The first plating resist is peeled off ( FIG. 2B ). A second plating resist  80  having openings  81  on the first via conductors ( 60 A) is formed on the first conductor layer ( 58 A) and the electroless plating film  52 , and, by electrolytic plating, the metal posts  76  formed of an electrolytic plating film  82  are formed in the openings  81  ( FIG. 2C ). The second plating resist is removed ( FIG. 2D ). The electroless plating film  52  exposed from the first conductor layer  58  is removed by first etching ( FIG. 3A ). 
     A solder resist composition ( 70   a ) is formed so as to embed the first conductor layer ( 58 A) and the metal posts  76  ( FIG. 3B ). The solder resist composition is thinned by etching, the upper parts ( 76 U) of the metal posts  76  are exposed, and the solder resist composition is cured to form the solder resist layer  70  ( FIG. 3C ). 
     The exposed upper parts ( 76 U) of the metal posts  76  are subjected to a soft etching (second etching) treatment before the formation of the surface treatment layer ( FIG. 3D ). Due to the above-described first etching and this second etching, the diameter (d2) of the top part ( 76 T) (flat part of the front end) of each of the metal posts  76  is 0.8-0.9 times the diameter (d1) of the lower part ( 76 D). The height (t1) of the exposed portion (upper part ( 76 U)) of each of the metal posts  76  exposed from the solder resist layer  70  is 3 μm-10 μm. 
     The surface treatment layer  78  formed of a Ni/Pd/Au layer is formed on the exposed upper part ( 76 U) of each of the metal posts  76 , and the printed wiring board  10  is completed ( FIG. 1A ). The thickness of the surface treatment layer  78  is 1 μm, and the height of the surface of the surface treatment layer  78  provided on each of the metal posts  76  is 4 μm-11 μm relative to the solder resist layer. 
     In the method for manufacturing the printed wiring board of the embodiment, the lower parts ( 76 D) are embedded in the solder resist layer  70 , and, due to the first etching and the second etching, the diameter (d2) of the top part ( 76 T) of each of the metal posts  76  is 0.8-0.9 times the diameter (d1) of the lower part ( 76 D) of each of the metal posts  76 . Since the diameter of the top part ( 76 T) of each of the metal posts  76  is not too small, two terminals can be easily brought into contact with the metal posts  76  exposed from the solder resist layer, and a resistance can be accurately measured using a 4-terminal checker. Since the front end of the exposed part ( 76 U) of each of the metal posts  76  exposed from the solder resist layer is thin, adhesion between the exposed part ( 76 U) and the surface treatment layer  78  can be increased. 
     In Japanese Patent Application Laid-Open Publication No. 2003-218286, the solder bumps each have a small diameter, and it is thought to be difficult to bring two terminals into contact with the solder bumps at the same time and resistance measurement using a 4-terminal checker is difficult. Further, since the Cu layer and the Ni layer are formed in a cylindrical shape, it is thought that adhesion between the Cu layer and the Ni layer and the welded solder bumps is low. 
     A printed wiring board according to an embodiment of the present invention includes: via conductors that are formed in a resin insulating layer; metal posts that are respectively formed on the via conductors; and a solder resist layer that is formed on the resin insulating layer and embeds lower parts of the metal posts and exposes upper parts of the metal posts. A diameter of a top part of each of the metal posts is 0.8-0.9 times a diameter of the lower part of each of the metal posts. 
     A method for manufacturing a printed wiring board according to another embodiment of the present invention includes: forming multiple via openings in an outermost resin insulating layer; forming an electroless plating film on a surface of the outermost resin insulating layer and in the via openings; forming a first plating resist layer on the electroless plating film; forming via conductors and a conductor circuit by forming an electrolytic plating film on the electroless plating film exposed from the first plating resist layer; peeling off the first plating resist layer; forming a second plating resist layer having openings on the via conductors; forming metal posts by plating in the openings of the second plating resist layer; peeling off the second plating resist layer; removing the electroless plating film exposed from the electrolytic plating film by first etching; forming a solder resist layer on the electrolytic plating film and the metal posts; reducing a film thickness of the solder resist layer to expose upper portions of the metal posts; subjecting the upper portions of the metal posts to second etching; and providing a surface treatment layer on an exposed portion of each of the metal posts exposed from the solder resist layer. Due to the second etching, a diameter of a top part of each of the metal posts is 0.8-0.9 times a diameter of a lower part of each of the metal posts. 
     According to embodiments of the printed wiring board of the present invention and the method for manufacturing the printed wiring board, the diameter of the top part of each of the metal posts is 0.8-0.9 times the diameter of the lower part of each of the metal posts of which the lower parts are embedded in the solder resist layer and the upper parts are exposed from the solder resist layer. Since the diameter of the top part of each of the metal posts is not too small, two terminals can be easily brought into contact with the metal posts exposed from the solder resist layer, and a resistance can be accurately measured using a 4-terminal checker. Since the front end of the exposed part of each of the metal posts exposed from the solder resist layer is thin, adhesion between the exposed part and the surface treatment layer can be increased. 
     Obviously, numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.