Patent Publication Number: US-8975879-B2

Title: Switching converter having a plurality N of outputs providing N output signals and at least one inductor and method for controlling such a switching converter

Description:
This application claims benefit under 35 U.S.C. §119 to U.S. Provisional Patent Application Ser. No. 61/242,182, filed on Sep. 14, 2009, which is herein incorporated by reference in its entirety 
    
    
     TECHNICAL FIELD 
     The present invention relates to a switching converter having a plurality N of outputs providing N output signals and at least one inductor and to a method for controlling such a switching converter. In particular, the present invention relates to a single-inductor dual-output switching converter with low ripples and improved cross regulation. 
     BACKGROUND 
     Portable applications usually need different supply voltages for different functional modules to minimize power consumption. A more interesting and efficient solution is to use one converter with a single inductor to generate multiple outputs, which reduces the external components and saves cost. 
     There have been several kinds of single-inductor multiple-output (SIMO) switching converters reported in recent years. The converters in references [1] and [2] make use of time-multiplexing control, which suffer from large current ripples and dissipate energy during the freewheeling state. The solution in [3] employs the ordered power-distributive control which has a main channel for compensation and other sub-channels controlled just by comparators. This simplifies the control loop, but has larger ripples and is only suited for small load currents. The converter in [5] works in Continuous Conduction Mode (CCM) and adopts several Pulse Width Modulation (PWM) controllers driven by suitable linear combinations of output errors, which can sustain large load currents, but has large ripples (150 mV) and serious cross regulation (120 mV) problems. So, the existing SIMO converters realize multiple-output with some parasitic effects:
         Load currents are limited by the intrinsic requirement of Discontinuous Conduction Mode (DCM) and pseudo-CCM (PCCM) control.   Large ripples and spikes, resulting from discontinuous current change on filter capacitors with parasitic series inductors.   Cross regulation: the SIMO converter can be regarded as a multi-input multi-output system with cross regulation items.   Efficiency: more switches added in the power path result in more power loss. The efficiency gets worse especially under light loads.       

     In the following, considerations on SIDO switching converters are given. 
     A. Power Stage and Control Sequence 
     A conventional buck converter consists of two power switches and one inductor, which provide high efficiency power conversion. A dual-output converter is achieved by adding another two switches at the output node of the inductor, which is shown in  FIG. 1 . Hereby, a switch S 1  switches the VLX 1  terminal of the inductor L to the input voltage source Vg and a switch S 2  switches the VLX 1  node alternatively to ground GND. The switches S 1  and S 2  are controlled via signal D 1 . 
     Switches S 3  and S 4  are controlled via signal D 2  and connect one selected output node each, i.e. V 1  or V 2 , to the second VLX 2  terminal of the inductor L. 
     Output capacitors C 1  and C 2  are charged during the phases, where the terminal VLX 2  is connected to the respective output terminals, i.e. V 1  or V 2 , and are discharged via the output load, including R 1  and R 2 , during the phases where the respective output node is not connected to the terminal VLX 2 . 
       FIG. 2  illustrates the control sequence and the waveforms of the steady-state inductor current and output ripples in CCM. iL is a detail view of the inductor current flowing from node VLX 1  to node VLX 2 , D 1  and D 2  are the control signals as shown in  FIG. 1 . If D 1  is high, S 1  is closed and S 2  is opened (and vice versa), if D 2  is high, S 3  is closed and S 4  is opened (and vice versa). 
     V 1  and V 2  are detail views of the resulting voltages at the V 1  and V 2  output nodes that properties will be described in more detail under “C. Ripples”. 
     Differing from the comparator-based distributive structure in [3], the controller here employs both PWM generators on control signal D 1  and D 2 , which has the advantage of large load currents and comparatively low ripples. However, as pointed out in [1], there may occur serious cross regulation problems. 
     B. Cross Regulation 
     In a SIMO converter, variation of load current on one channel will affect the others, for all outputs that share a single inductor. This is the cross regulation problem, which is one of the severest challenges in SIMO converter design. To solve this problem, the converters in [1] and [2] work in DCM or PCCM with a freewheeling state of inductor current, which makes two channels independent of each other. However, this method is not suitable for the SIDO converter in CCM. 
     The converter in [4] regulates the common-mode voltage (V CM =(V 1 +V 2 )/2) and the differential-mode voltage (V DM =V 1 −V 2 ) instead of two outputs to partly suppress the cross regulation. As shown in  FIG. 3 , there are two main control loops in the system: the common-mode loop which regulates the total energy by D 1 , and the differential-mode loop which distributes the energy in the inductor by D 2 . It has been analyzed in [4] that the transfer functions G 21 (s) and G 12 (s) represent for the cross regulation items. 
     Based on the idea of decomposing this cross regulated multi-loop system into several single-loop sub-systems with weak interactions, a further adaptive common-mode control method is proposed. Here, V CM  is adjusted according to the load currents, which can be expressed as:
 
 V   CM   =D   2   V   1 +(1 −D   2 ) V   2 .  (1)
 
     The weighted coefficient of each channel is proportional to the load current. It is reasonable that the channel which draws more current should have a larger impact on the regulation of inductor current. According to the control sequence in  FIG. 2  and assuming the ripples are negligible, the small signal behavior of the SIDO power stage in  FIG. 1  can be described by state space equations as: 
                       ⅆ     ⅆ   t       ⁡     [           v   1               v   2               i   L           ]       =         [               -   1     /     R   1       ⁢     C   1           0           D   2     /     C   1               0             -   1     /     R   2       ⁢     C   2               (     1   -     D   2       )     /     C   2                   -     D   2       /   L             -     (     1   -     D   2       )       /   L         0         ]     ⁡     [           v   1               v   2               i   L           ]       +                 [         0           I   L     /     C   1               0           -     I   L       /     C   2                   V   g     /   L             (       V   2     -     V   1       )     /   L           ]     ⁡     [           d   1               d   2           ]       ⁢     
     [           v   CM               v   DM           ]     =         [             m   1     ⁢     D   2               m   2     ⁡     (     1   -     D   2       )           0             m   1           -     m   2           0         ]     ⁡     [           v   1               v   2               i   L           ]       +       [         0             m   1     ⁢     V   1       -       m   2     ⁢     V   2                 0       0         ]     ⁡     [           d   1               d   2           ]                       (   2   )               
where m 1  and m 2  are additional output voltage feedback coefficients (i.e. Vfb 1 =m 1 *V 1 , Vfb 2 =m 2 *V 2 ), as referred to in later figures.
 
     Within the state space equations (2), small letters (i.e. v 1 , d 1 ) refer to the small signal time dependent properties and are functions of time, wherein capital letters (i.e. V 1 , D 1 ), refer to the absolute (i.e. large signal) values. 
     The transfer functions of power stage can be solved from equations (2). The bode plot comparison of G 12 (s) in  FIG. 4  shows that the proposed adaptive common-mode control has about 20 dB improvement on the suppression of cross regulation in low frequency (when Vg=4 V, R 1 =3, R 2 =90Ω). 
     C. Ripples 
     A SIDO buck converter has larger output ripples than a conventional buck converter especially under heavy loads, for the current ripples of filter capacitors in SIDO converters are the total load currents. As shown in  FIG. 2 , the output ripples mainly consist of two parts: the charge of filter capacitors and the voltage drop on the equivalent series resistor (ESR) of capacitor. 
     Hereby, V 1  and V 2  show respective detail views of the voltages at the V 1  and V 2  output nodes. The voltage steps at the transition times of D 2  need to be seen in conjunction with the equivalent series resistors (ESR) of the output capacitors C 1  and C 2  when the respective capacitors change between charging and discharging operation and vice versa, wherein the time proportional increase and decrease in the output voltages between this voltage steps is affiliated with the actual charging and discharging operation of the output capacitors. 
     When the inductor current switches to one channel, the filter capacitor is charged while the other is discharged. So, the ripples of two outputs are always in inverse phase. 
     Another serious problem is large spikes, which are caused by the rapid current change on the equivalent series inductors (ESLs) of filter capacitors when switching S 3  and S 4 . They are even larger than output ripples in SIDO converters (e.g. about 100 mV in [6]). 
       FIG. 5  shows the output section of the power stage (see  FIG. 1 ) together with a visualization of the origin of switching spikes as well as the proposed enhanced SIDO structure by adding an additional fly capacitor Cf. 
     As shown in  FIG. 5 , when the inductor current switches between two outputs, there occur large undershot and overshot spikes on filter capacitors. 
     Based on the conclusion that the ripples and spikes of two outputs are inverse-phased, a fly capacitor across two outputs can be added to reduce the steady state ripples. The value of the fly capacitor needs to be careful selected, since it provides an AC path between two outputs, which would deteriorate the performance of cross regulation. Analysis and simulation show that C f =0.1C 1  is a good trade-off between ripples and cross regulation (e.g. for C 1 =C 2 ). 
     SUMMARY 
     According to an aspect of the invention, a switching converter is provided having a plurality N of outputs providing N output signals and at least one inductor, comprising:
     a first controlling device for controlling the total energy flowing over the inductor to the N outputs dependent on a first control signal,   at least a second controlling device for distributing the total energy between the N outputs by means of at least a second control signal,   wherein the first controlling device is coupled to all N outputs for receiving a number M of the respective feedback output signals of the N outputs, M≦N,   wherein the first controlling device comprises first means for weighting the M feedback output signals and second means for providing the first control signal dependent on the weighted M feedback output signals.   

     According to an embodiment, the switching converter comprises one single inductor. 
     According to a further embodiment, the first controlling device is a common mode controller and the second controlling device is a differential mode controller. 
     According to a further embodiment, the first means are adapted to weight the M feedback output signals by means of the at least one second control signal. 
     According to a further embodiment, the first means are adapted to weight the M feedback output signals by means of at least one output current of a respective output signal. 
     According to a further embodiment, the first means are adapted to weight the M feedback output signals by means of M output currents of the M output signals. 
     According to a further embodiment, the first means are adapted to weight the M feedback output signals by means of the at least one second control signal and of at least one output current of a respective output signal. 
     According to a further embodiment, a coupling capacitor is coupled between two respective outputs of a number T of selected outputs of the plurality N outputs, T≦N, such that the two respective outputs have reverse ripples and spikes. 
     According to a further embodiment, the switching converter has two outputs providing N output signals, N=2, wherein a coupling capacitor is coupled between the two outputs, wherein the switching of the two outputs is inverse-phased. 
     According to a further embodiment, controllable coupling capacitors are arranged between two respective outputs, which to be controlled effective during phases of inverse switching. 
     According to a further embodiment, said respective coupling capacitor is controllable in a resistive manner, in particular by a switch. 
     According to a further embodiment, said first means are configured to weight the respective feedback output signal of the M feedback output signals in dependence on the respective length of a time period in which the respective output providing said respective feedback output signal is connected to the inductor. 
     According to a further embodiment, said first means are configured to weight the M feedback output signals by using adjustable resistors arranged in a feedback path between said outputs and said first controlling device. Said adjustable resistors are particularly embodied as controllable resistors. 
     According to a further embodiment, said first means are configured to weight the M feedback output signals by using at least one transfer function. 
     According to a further embodiment, said transfer function is a linear transfer function, a quadratic transfer function, an exponential transfer function or a square route transfer function. Further, said transfer function may be a combination of these functions. 
     According to a further embodiment, said transfer function is controlled via at least one second control signal. 
     According to a further embodiment, said transfer function is controlled via at least one output current of a respective output signal. 
     According to a further embodiment, said transfer function is controlled in dependence on a respective length of a time period in which the respective output providing said output signal is connected to the inductor. 
     According to a further embodiment, said transfer function is controlled in dependence on a respective length of a time period in which a different output as the respective output providing said output signal is connected to the inductor. 
     According to further aspect of the invention, a method is provided for controlling a switching converter having a plurality N of outputs providing N output signals and at least one inductor. The method has the steps of controlling the total energy flowing over the inductor to the N outputs by means of a first controlling device dependent on a first control signal, distributing the total energy between the N outputs by means of at least a second controlling device and of at least a second control signal, receiving a number M of feedback output signals of the N output signals, M≦N, by means of the first controlling device, weighting the M feedback output signals, and providing the first control signal dependent on the weighted M feedback output signals 
     Further features of the method may be directly derived from the features of the switching converter. 
     According to a further aspect of the invention, a switching converter is provided having a plurality N of outputs providing N output signals and at least one inductor, comprising a first controlling device for controlling the total energy flowing over the inductor to the N outputs dependent on a first control signal, at least a second controlling device for distributing the total energy between the N outputs by means of at least a second control signal, wherein the first controlling device is coupled to all N outputs for receiving a respective feedback output signal and wherein the first controlling device comprises first means for weighting the N feedback output signals and second means for providing the first control signal dependent on the weighted N feedback output signals. 
     According to a further aspect of the invention, a switching converter is provided having a plurality N of outputs providing N output signals and at least one inductor, comprising:
     a first controlling device for controlling the total energy flowing over the inductor to the N outputs dependent on a first control signal,   at least a second controlling device for distributing the total energy between the N outputs by means of at least a second control signal,   wherein the first controlling device is coupled to all a number M of the N outputs for receiving a respective feedback output signal, M≦N,   wherein the first controlling device comprises first means for weighting the M feedback output signals and second means for providing the first control signal dependent on the weighted M feedback output signals.   

     The first controlling device may use the output signals of all N outputs (M=N). Further, the first controlling device may use the output signals of a subset M of the N outputs (M&lt;N). 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  shows a power stage structure of a SIDO buck converter, 
         FIG. 2  shows waveforms of output ripples and inductor current with control signals; 
         FIG. 3  shows a small signal structure of a SIDO system; 
         FIG. 4  shows a bode diagram comparison of transfer function G 12 (s); 
         FIG. 5  shows an output stage structure of a SIDO converter with a fly capacitor; 
         FIG. 6  shows an embodiment of a system block diagram of the proposed SIDO buck converter; 
         FIG. 7  shows an embodiment of a schematic of the adaptive common-mode PWM controller; 
         FIG. 8  shows options for weighting the feedback output signals to the common mode controller inputs; 
         FIG. 9  shows a first embodiment of a switching converter; 
         FIG. 10  shows a second embodiment of a switching converter; 
         FIG. 11  shows PWM mode measured waveforms of output ripples and nodes VLX 1  and VLX 2  at heavy loads I 1 =400 mA, I 2 =200 mA,  FIG. 11(   a ) without C f ,  FIG. 11(   b ) with C f ; 
         FIG. 12  shows PFM mode measured waveforms of output ripples and nodes VLX 1  and VLX 2  at light loads I 1 =33 mA, I 2 =10 mA,  FIG. 12(   a ) without C f ,  FIG. 12(   b ) with C f ; 
         FIG. 13  shows an embodiment of a method for controlling a switching converter; and Like or functionally alike elements in the figures have been allocated the same reference signs if not otherwise indicated. 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 6  illustrates an embodiment of a system block diagram of a SIDO buck converter with adaptive common-mode control and fly capacitor method. 
     The inductor current is sensed by filtering the voltage across the inductor (see reference [7]), which is implemented in the Current Filter block. The mode controller block selects the working mode (PWM or PFM) according to load currents which are detected by duty-ratio-based current estimation (see reference [8]). 
     Adaptive common mode control is implemented in the pulse-width modulation PWM block. In the visualized embodiment, the output feedback voltages Vfb 1  and Vfb 2  are derived from the output voltage nodes V 1  and V 2  via resistive voltage dividers. The DCM block includes a zero current detector to prevent the reverse flow of inductor current. The dead time and drivers block provides the control signals for the power switches. The control signal lines to the power switches are drawn in a simplified manner accordingly. The clock block provides the time base for the operation in PWM mode. For the illustrated SIDO buck converter, the fly capacitor Cf is directly added between the two output nodes. 
     All the power transistors, control circuits and compensation components may be monolithically implemented. Average current mode control is adopted in the PWM controller to achieve fast response and on-chip compensation. System analysis based on a decoupling small signal model of the SIDO converter has been given in [6]. 
       FIG. 7  shows the implementation of the PWM controller that provides the differential mode control signal D 2  as well as the common mode control signal D 1 . The error amplifiers EA 1 , EA 2  and EA 3  are implemented via operational amplifiers. 
     In this embodiment, adaptive common mode is implemented by switches that connect the output feedback voltages Vfb 1  and Vfb 2  depending on the D 2  signal state via inverse-phase controlled switches to the respective inputs of the common mode controller. 
     The output levels of the error amplifiers EA 1  and EA 3  are compared to the saw tooth waveform via comparators that generate the D 2  and D 1  control signals accordingly. A reference voltage is provided to the Vref input. A voltage proportional to the inductor current is provided to the current input. Compensation design of the common-mode and differential-mode loop is introduced in [6]. 
       FIG. 8  shows an example for possible implementations of the weighting of the output feedback signals Vfb 1  and Vfb 2  for the common mode controller inputs to EA 2 , i.e. adaptive sum by switching and adaptive sum via linear resistors. 
     As an example, and without loss in generality, said adaptive sum via linear resistors may refer to an adaptive sum via output current relations proportionally controlled resistors or via absolute output currents proportionally controlled resistors (depicted in  FIG. 8  alternative implementation without additional correction terms). 
     The control_ 1  and control_ 2  inputs may here be controlled via output current relations proportional or absolute output current proportional voltage values. Transistors M 1  and M 2  may be operated in the triode region. 
       FIG. 9  shows a first embodiment of a switching converter  901 . 
     The switching converter  901  of  FIG. 9  has two outputs, namely a first output  902  and a second output  903 . The first output  902  is configured to provide a first output signal  904 . Further, the second output  903  is configured to provide a second output signal  905 . Furthermore, the switching converter  901  has one single inductor  906 . 
     The switching converter  901  has a first controlling device  907 . Said first controlling device  907  is configured to control the total energy  908  flowing over the inductor  906  to the two outputs  902 ,  903  dependent on a first control signal  909 . 
     Moreover, the switching converter  901  has a second controlling device  910 . Said second controlling device  910  is configured to distribute the total energy  908  between the two outputs  902 ,  903  by means of at least one second control signal  911 . 
     As shown in  FIG. 9 , the first controlling device  907  is coupled to the two outputs  902 ,  903 . So, the first controlling device  907  is configured to receive the feedback output signals  904  and  905 . 
     Said first controlling device  907  has first means  912  and second means  913 . Said first means  912  are adapted to weight the two feedback output signals  904  and  905 . Said second means  913  are configured to provide the first control signal  909  dependent on the two weighted feedback output signals  914  as provided by said first means  912 . 
     For example, the first controlling device  907  is a common mode controller. The second controlling device  910  is exemplarily a differential mode controller. 
     For switching or distributing the total energy  908 , switching means  915  are coupled between the inductor  906  and the outputs  902 ,  903 . 
     The switching means  915  are configured to switch the total energy  908  to the outputs  902  and  903 . The second controlling device  910  controls said switching means  915  by means of the second control signal  911 . Exemplarily, said switching means  915  may have a first switch coupled to the output  902  and a second switch coupled to the output  903 . 
     In  FIG. 10 , a second embodiment of the switching converter is depicted. The switching converter  901  of  FIG. 10  has all features of the switching converter of  FIG. 9 . Additionally, the switching converter  901  of  FIG. 10  has a coupling capacitor  916 . The coupling capacitor  916  is coupled between the two outputs  902 ,  903 , such that the two outputs  902  and  903  have reverse ripples and spikes. 
       FIG. 11  shows PWM mode detail views of the output voltages V 1  and V 2  to visualize the voltage ripples and spikes together with the VLX 1  and VLX 2  voltages at the inductor terminals. 
     In particular,  FIG. 11(   a ) shows the measurement results without a fly capacitor, wherein  FIG. 11(   b ) shows the measurement results with a fly capacitor (Cf=3 μF) between the output voltage nodes. By adding a fly capacitor, the voltage ripples and spikes are reduced by around 50% in PWM mode. 
       FIG. 12  shows the PFM mode detail views of the output voltages V 1  and V 2  to visualize the voltage ripples and spikes together with the VLX 1  and VLX 2  voltages at the inductor terminals. 
       FIG. 12(   a ) shows the measurement results without a fly capacitor, wherein  FIG. 12(   b ) shows the measurement results with a fly capacitor (Cf=3 μF) between the output voltage nodes. By adding a fly capacitor, the voltage ripples and spikes may be reduced by 20 to 30% in PFM mode. 
     In  FIG. 13 , an embodiment of a method for controlling a switching converter is depicted. The switching converter comprises a plurality N of outputs providing N output signals and at least one inductor. 
     In step S1, the total energy flowing over the inductor to the N outputs is controlled dependent on a first control signal. The first control signal may be provided by a first controlling device. 
     In step S2, the total energy flowing over the inductor is distributed between the N outputs dependent on at least one second control signal. The at least one second control signal may be provided by a second controlling device. 
     In step S3, a number M of feedback output signals of the N output signals, M≦N, are received by means of the first controlling device the In step S4, the M feedback output signals are weighted. 
     In step S5, the first control signal is provided dependent on the weighted M feedback output signals. 
     The present application shows a novel fly capacitor method and adaptive common-mode control for SIDO switching converters. Both, PWM and PFM controls may be implemented. Measurements on a test chip demonstrate low ripples and spikes, suppressed cross regulations, fast response and improved efficiency. The proposed SIDO converter may be suitable for cost-effective power management of portable applications. 
     What may have been described herein is merely illustrative of the application of the principles of the present invention. Further arrangements and systems may be implemented by those skilled in the art without departing from the scope and spirit of this invention. 
     REFERENCES 
     
         
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         [2] D. Ma, W. H. Ki, C. Y. Tsui, “A pseudo-CCM/DCM SIMO switching converter with freewheel switching”, IEEE J. Solid-State Circuits, Vol. 38, No. 6, pp. 1007-1014, January 2003 
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