Patent Publication Number: US-10788873-B2

Title: Power control circuit

Description:
FIELD 
     The subject matter herein generally relates to a power supply circuit of a motherboard for controlling power supply to a universal serial bus. 
     BACKGROUND 
     When a motherboard is started up from an off state, if a startup voltage is too low, a USB of the motherboard may be damaged. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Implementations of the present disclosure will now be described, by way of example only, with reference to the attached figures. 
         FIG. 1  is a block diagram of a power control circuit in accordance with an embodiment of the present disclosure. 
         FIG. 2  is a circuit diagram of the power control circuit in  FIG. 1 . 
     
    
    
     DETAILED DESCRIPTION 
     It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. Additionally, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures and components have not been described in detail so as not to obscure the related relevant feature being described. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features. The description is not to be considered as limiting the scope of the embodiments described herein. 
     Several definitions that apply throughout this disclosure will now be presented. 
     The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently connected or releasably connected. The term “comprising” means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in a so-described combination, group, series and the like. 
       FIG. 1  shows a power control circuit  10  implemented in a motherboard (not shown). The power control circuit  10  is electrically coupled to a chipset  20 . 
     The chipset  20  outputs a first power supply signal and a second power supply signal. The power control circuit  10  outputs a power supply voltage to a universal serial bus (USB)  30 . 
     The power control circuit  10  includes a first power supply circuit  12 . The first power supply circuit  12  outputs the power supply voltage to the USB  30  when the motherboard is turned on. 
     The power control circuit  10  further includes a second power supply circuit  14 . The second power supply circuit  14  outputs the power supply voltage to the USB  30  when the motherboard is in a sleep mode. 
       FIG. 2  shows the first power supply circuit  12  including a double diode D 1 , a first electronic switch Q 1 , a first resistor R 1 , and a second resistor R 2 . 
     A first input terminal of the double diode D 1  is coupled through the first resistor R 1  to a first power supply V 1 . A second input terminal of the double diode D 1  is coupled through the second resistor R 2  to a second power supply V 2 . An output terminal of the double diode D 1  is coupled to a first terminal of the first electronic switch Q 1 . A second terminal of the first electronic switch Q 1  is coupled to a third power supply V 3 . A third terminal of the first electronic switch Q 1  outputs the power supply voltage to the USB  30 . 
     The chipset  20  includes a first signal output pin  5 V_ 3 V_PG and a second signal output pin  5 V_USB_CTRL. 
     The second power supply circuit  14  includes a second through fourth electronic switch Q 2 -Q 4 , a third through sixth resistor R 3 -R 6 , and a first capacitor C 1 . 
     A first terminal of the second electronic switch Q 2  is coupled through the third resistor R 3  to the first signal output pin  5 V_ 3 V_PG of the chipset  20 . The first terminal of the second electronic switch Q 2  is further coupled to ground through the first capacitor C 1 . A second terminal of the second electronic switch Q 2  is coupled to ground. A third terminal of the second electronic switch Q 2  is coupled to a fourth power supply V 4  through the fourth resistor R 4 . The third terminal of the second electronic switch Q 2  is further coupled to a first terminal of the third electronic switch Q 3 . The first terminal of the third electronic switch Q 3  is further coupled to ground through the fifth resistor R 5 . A second terminal of the third electronic switch Q 3  is coupled to a third terminal of the fourth electronic switch Q 4 . The third terminal of the third electronic switch Q 3  is further coupled to the output terminal of the double diode D 1 . A first terminal of the fourth electronic switch Q 4  is coupled to the second signal output pin  5 V_USB_CTRL of the chipset  20  through the sixth resistor R 6 . 
     The second power supply circuit  14  further includes a fifth electronic switch Q 5 . A first terminal of the fifth electronic switch Q 5  is coupled to the first terminal of the first electronic switch Q 1 . The first terminal of the fifth electronic switch Q 5  is further coupled to a public endpoint P of the output terminal of the double diode D 1  and the third terminal of the third electronic switch Q 3 . A second terminal of the fifth electronic switch Q 5  is coupled to the second power supply V 2 . A third terminal of the fifth electronic switch Q 5  outputs the power supply voltage to the USB  30 . 
     In at least one embodiment, when the motherboard is turned on, the first power supply V 1  outputs a 12V voltage, and the third voltage V 3  simultaneously outputs a 5V voltage through a power converter circuit (not shown). When the motherboard is turned on, voltages of the second power supply V 2  and the fourth power supply V 4  are 5V. 
     In at least one embodiment, each of the first through fourth electronic switches Q 1 -Q 4  is an n-type field-effect transistor. The first terminal of each of the first through fourth electronic switches Q 1 -Q 4  is a gate electrode of the n-channel field-effect transistor. The second terminal of each of the first through fourth electronic switches Q 1 -Q 4  is a source electronic of the n-channel field-effect transistor. The third terminal of each of the first through fourth electronic switches Q 1 -Q 4  is a drain electrode of the n-channel field-effect transistor. 
     In at least one embodiment, the fifth electronic switch Q 5  is a p-channel field-effect transistor. The first terminal of the fifth electronic switch Q 5  is a gate electrode of the p-channel field-effect transistor. The second terminal of the fifth electronic switch Q 5  is a source electrode of the p-channel field-effect transistor. The third terminal of the fifth electronic switch Q 5  is a drain electrode of the p-channel field-effect transistor. 
     When the motherboard is turned on, the first signal output pin  5 V_ 3 V_PG and the second signal output pin  5 V_USB_CTRL of the chipset  20  output the first power supply signal and the second power supply signal, respectively, at a high level voltage. When the motherboard is in the sleep mode, the first signal output pin  5 V_ 3 V_PG and the second signal output pin  5 V_USB_CTRL of the chipset  20  output the first power supply signal and the second power supply signal, respectively, at a low level voltage. 
     In use, when the motherboard is switched from the sleep mode to the turn-on mode, the first signal output pin  5 V_ 3 V_PG and the second signal output pin  5 V_USB_CTRL of the chipset  20  output the first power supply signal and the second power supply signal, respectively, at the high level voltage to the second electronic switch Q 2  and the fourth electronic switch Q 4 , thereby switching on the second electronic switch Q 2  and the fourth electronic switch Q 4 , and switching off the third electronic switch Q 3 . Simultaneously, the first power supply V 1  begins to output the 12V voltage and the second power supply V 2  outputs the 5V voltage, thereby switching on the double diode D 1 , switching off the fifth electronic switch Q 5 , and completely switching on the first electronic switch Q 1 . Thus, the third power supply V 3  outputs the 5V voltage through the first electronic switch Q 1  to the USB  30 . 
     When the motherboard is switched from the turn-on mode to the sleep mode, the first power supply V 1  does not output the 12V voltage, the third power supply V 3  does not output the 5V voltage, and the second power supply V 2  continues to output the 5V voltage. Simultaneously, when the motherboard is switched from the turn-on mode to the sleep mode, the first signal output pin  5 V_ 3 V_PG and the second signal output pin  5 V_USB_CTRL of the chipset  20  output the first power supply signal at a low level voltage to switch Q 3 , and causing the public endpoint P to be at a low level voltage. Thus, the output terminal of the double diode D 1  is disconnected from the third terminal of the third electronic switch Q 3 . Simultaneously, the public endpoint P having the low level voltage causes the fifth electronic switch Q 5  to be completely switched on and the first electronic switch Q 1  to be switched off. Thus, the second power supply V 2  is output through the fifth electronic switch Q 5  at 5V to the USB  30 . 
     When the motherboard is switched from an off state to the on state, the first power supply circuit  12  controls the first electronic switch Q 1  to be completely switched on, so that the third power supply V 3  outputs the power supply voltage through the first electronic switch Q 1 . When the motherboard is switched from the turn-on mode to the sleep mode, the second power supply circuit  14  controls the fifth electronic switch Q 5  to be completely switched on, so that the second power supply V 2  outputs the power supply voltage through the fifth electronic switch Q 5 . 
     The power control circuit  10  described above and the motherboard using the power control circuit  10  uses the first power supply circuit  12  and the second power supply circuit  14  to control the first electronic switch Q 1  and the fifth electronic switch Q 5  to be completely switched on, respectively. In this way, the USB  30  is protected from a low voltage output of a power source. 
     The embodiments shown and described above are only examples. Even though numerous characteristics and advantages of the present technology have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in the detail, including in matters of shape, size and arrangement of the parts within the principles of the present disclosure up to, and including, the full extent established by the broad general meaning of the terms used in the claims.