Patent Publication Number: US-2013235493-A1

Title: Protection circuit and power management circuit and electronic device

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure relates to a protection circuit; and more particularly, to an electronic device and a power management circuit having the protection circuit. 
     2. Description of Related Art 
     Interface circuits, such as High Definition Multimedia Interface (HDMI) circuit and Universal Serial BUS (USB) interface circuit are widely used in electronic devices, for example, in digital versatile disc (DVD) players, notebook computers and the like. Generally, an electronic device includes a power supply, a switch circuit and an interface circuit. The interface circuit is electrically connected to an external device. The switch circuit is connected between the power supply and the interface circuit for establishing or cutting off an electrical connection between the power supply and the interface circuit in response to user&#39;s operations. However, when the external device generates a reverse voltage which is transmitted to the switch circuit through the interface circuit and the reverse voltage is larger than the supply voltage, the reverse voltage may destroy the switch circuit. The reverse voltage may even destroy the power supply itself. 
     Therefore, there is room for improvement in the art. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Many aspects of the embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the two views. 
         FIG. 1  is a block diagram showing an electronic device in accordance with one embodiment. 
         FIG. 2  is a circuit diagram of the electronic device in  FIG. 1  in accordance with one embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Referring to  FIG. 1 , an electronic device  100  includes a power manager circuit  10 , a power supply  20  and an interface circuit  30 . The power manager circuit  10  is connected between the power supply  20  and the interface circuit  30 . The interface circuit  30  is connected to an external device  40 . The electronic device  100  can be a digital versatile disc (DVD) player or a notebook computer. The interface circuit  30  can be a high definition multimedia interface (HDMI) circuit, a universal serial bus (USB) interface circuit, or the like. In the embodiment, the electronic device  100  is a digital versatile disc (DVD) player. The interface circuit  30  is a high definition multimedia interface (HDMI) circuit. 
     The power manager circuit  10  includes a switch circuit  12  and a protection circuit  15 . The switch circuit  12  is connected between the power supply  20  and the protection circuit  15 . The protection circuit  15  is connected to the interface circuit  30 . 
     The switch circuit  12  is turned on or turned off to establish or cut off an electrical connection between the power supply  20  and the interface circuit  30 , according to an external signal. In the embodiment, the external signal may be generated in response to user&#39;s operations, for example, when a user presses or triggers a key disposed on the electronic device  100 , the external signal is generated and is transmitted to the switch circuit  12 . 
     When the switch circuit  12  is turned on and establishes an electrical connection between the power supply  20  and the interface circuit  30 , the switch circuit  12  transmits a supply voltage from the power supply  20  to the interface circuit  30  through the protection circuit  15  for powering the interface circuit  30 . When the switch circuit  12  is turned off and cuts off the electrical connection between the power supply  20  and the interface circuit  30 , the switch circuit  12  stops transmitting the supply voltage. 
     The protection circuit  15  is further connected to the power supply  20  for receiving the supply voltage. When the external device  40  generates a reverse voltage which is transmitted to the protection circuit  15  through the interface circuit  30  and the reverse voltage is larger than the supply voltage, the protection circuit  15  eliminates the reverse voltage. 
     In detail, the protection circuit  15  includes a first protection unit  151 , a second protection unit  152 , and a third protection unit  153 . The third protection unit  153  is connected between the switch circuit  12  and the interface circuit  30 . The first protection unit  151  is connected to the switch circuit  12  and the third protection unit  153 . The first protection unit  151  is connected to the second protection unit  152 . The first protection unit  151  is further connected to the power supply  20  for receiving the supply voltage. The second protection unit  152  is connected to the switch circuit  12  and the third protection unit  153 . The second protection unit  152  is further connected to the power supply  20  for receiving the supply voltage. 
     When the external device  40  generates a reverse voltage, it is transmitted to the second protection unit  152  and the first protection unit  151  through the interface circuit  30  and the third protection unit  153  and if the reverse voltage is larger than the supply voltage, the reverse voltage charges the second protection unit  152  to accumulate a charged voltage, and the first protection unit  151  discharges the charged voltage for the purpose of eliminating the charged voltage. Therefore, the protection circuit  15  eliminates the reverse voltage, and the switch circuit  12  and the power supply  20  are effectively protected. 
     In other embodiments, the second protection unit  152  is deleted from the protection circuit  15 , that is, the protection circuit  15  does not include the second protection unit  152 . In this situation, when the external device  40  generates a reverse voltage which is transmitted to the first protection unit  151  through the interface circuit  30  and the third protection unit  153 , and the reverse voltage is larger than the supply voltage, it is the first protection unit  151  which discharges and eliminates the reverse voltage. Therefore, the switch circuit  12  and the power supply  20  are also effectively protected in this other embodiment. 
     When the switch circuit  12  is turned on, the power supply  20  provides a supply voltage which is transmitted to the interface circuit  30  through the protection circuit  15 . In this state, the third protection unit  153  is capable of eliminating any overcurrent to protect the interface circuit  30 . Therefore, the interface circuit  30  is in a normal state and can exchange data with the external device  40 . When the external device  40  generates any overcurrent which flows to the third protection unit  153  through the interface circuit  30 , the third protection unit  153  eliminates the overcurrent for the purpose of protecting the switch circuit  12  and the power supply  20 . 
     Referring to  FIG. 2 , the switch circuit  12  includes a first transistor Q 1 , a first resistor R 1 , a second transistor Q 2 , a second resistor R 2 , a third resistor R 3 , and a fourth resistor R 4 . A base of the first transistor Q 1  is connected to the third resistor R 3 , a collector of the first transistor Q 1  is connected to the second protection unit  152 , and an emitter of the first transistor Q 1  is connected to the power supply  20 . One end of the first resistor R 1  is connected between the base of the first resistor R 1  and the third resistor R 3 , the other end of the first resistor R 1  is connected between the emitter of the first transistor Q 1  and the power supply  20 . In the embodiment, the first transistor Q 1  is a PNP type transistor. Abase of the second transistor Q 2  is grounded through the second resistor R 2 , an emitter of the second transistor Q 2  is grounded, and a collector of the second transistor Q 2  is connected to the base of the first transistor Q 1  through the third resistor R 3 . The base of the second transistor Q 2  receives the external signal through the fourth resistor R 4 . In the embodiment, the second transistor Q 2  is a NPN type transistor. 
     The first protection unit  151  includes a third transistor Q 3  and a fifth resistor R 5 . The second protection unit  152  includes a capacitor C 1  and a sixth resistor R 6 . A base of the third transistor Q 3  is connected to the power supply  20  through the sixth resistor R 6 , a collector of the third transistor Q 3  is grounded through the fifth resistor R 5 , and an emitter of the third transistor Q 3  is connected to one end of the first capacitor C 1 . The first capacitor C 1  is connected between the base and the emitter of the third transistor Q 3 . In the embodiment, the third transistor Q 3  is NPN type transistor. 
     The third protection unit  153  is a positive temperature coefficient thermistor P 1 . The thermistor P 1  is connected between the third transistor Q 3  and the interface circuit  30 . The interface circuit  30  is connected to the external device  40 . 
     The principle of the power manager circuit  10  is illustrated as follows: 
     When the base of the second transistor Q 2  receives an external signal which is high level through the fourth resistor R 4 , the second transistor Q 2  turns on, thus, the first transistor Q 1  also turns on. In this state, the supply voltage from the power supply  20  is transmitted to the interface circuit  30  through the protection unit  15 . Thus, the interface circuit  30  is in a normal state and can exchange data with the external device  40 . 
     When a reverse voltage from the external device  40  is transmitted to the emitter of the third transistor Q 3 , and the reverse voltage is larger than the voltage across the first capacitor C 1  with respect to the base of the third transistor Q 3 , the second protection unit  152  is charged with the reverse voltage. At the same time, the voltage of the emitter of the third transistor Q 3  is larger than the voltage at the base of the third transistor Q 3 , and the first capacitor C 1  is discharged through the fifth resistor R 5 . Therefore, the second protection unit  152  and the first protection unit  151  effectively eliminate any reverse voltage, for protecting the switch circuit  12  and the power supply  20 . 
     Although information and the advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only; changes may be made in detail, especially in the matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.