Patent Publication Number: US-4321428-A

Title: Acoustic monolithic power semiconductor integrated circuit and acoustic system using the same

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an acoustic monolithic power IC (or semiconductor integrated circuit) and an acoustic system using the same. 
     2. Description of the Prior Art 
     An acoustic system to be carried on a vehicle such as an automobile may be composed of front speakers and rear speakers. The sound volumes of the front and rear speakers can be changed as desired so that the acoustic reproduction can be accomplished under any desired conditions, e.g., mainly by the front speakers, mainly by the rear speakers, or in the same volume by the front and rear speakers. According to one prior art method, the front and rear speakers are driven by output amplifiers which have their levels adjusted at their input sides and which are made independent of one another. According to another prior art system, on the other hand, the front and rear speakers are connected with the output of one output amplifier through a plurlity of level adjusting variable attenuators so that they may be driven. The sound volumes of the front and rear speakers can be varied by adjusting the variable attenuators. The latter system has an advantage that the number of the output amplifiers can be minimized. 
     The aforementioned variable attenuators are, however, relatively expensive because they are required to admit relatively high currents. In case, moreover, a BTL (Balanced Transformer Less) amplifier is used as the output amplifier to increase the output power for an identical supply voltage, the variable attenuators, which are relatively expensive, as noted above, have to be connected with one pair of output terminals, respectively, with a view of adjusting the sound volumes of the front and rear speakers. For the stereophonic acoustic reproduction, it is necessary that two sets of the aforementioned output amplifiers and volumes be used. 
     SUMMARY OF THE INVENTION 
     It is therefore an object of the present invention to provide an acoustic monolithic power IC, which can be used for multiple purposes, and an acoustic system which has its production cost reduced. 
     Another object of the present invention is to provide an acoustic system of the type in which the number of output amplifiers is minimized and in which the sound volume adjustments of front and rear speakers can be accomplished at the input sides of the amplifiers. 
     According to a feature of the present invention, a righthand front speaker, a lefthand front speaker, a righthand rear speaker and a lefthand rear speaker are connected between the respective output terminals of two output BTL amplifiers, respectively. The sound volumes of the four speakers are adjusted by means of fader control variable attenuators which are disposed at the input sides of the aforementioned two output BTL amplifiers. 
     According to another feature of the present invention, the output BTL amplifiers are made of monolithic power ICs. 
     There are disposed at the inputs of the monolithic power amplifiers such differential amplifier circuits as have their inputs used as the non-inverting and inverting input terminals of the monolithic power ICs. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 shows a system block of an acoustic monolithic power IC according to one embodiment of the present invention; 
     FIG. 2 shows a four-amplifier and four-speaker acoustic system using two of the acoustic monolithic power ICs according to the embodiment shown in FIG. 1; 
     FIG. 3 shows in detail the internal circuit diagram of the acoustic monolithic power IC shown in FIG. 1; 
     FIG. 4 shows a circuit exemplifying the present invention, in which the acoustic monolithic power ICs according to the embodiment shown in FIG. 1 are used for amplification of stereophonic two-channel signals; and 
     FIG. 5 shows a circuit exemplifying the present invention, in which the acoustic monolithic power ICs according to the embodiment shown in FIG. 1 are used in a BTL amplifier. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The present invention will be described in detail in connection with the embodiments thereof with reference to the accompanying drawings. 
     FIG. 1 is a block diagram of a monolithic power IC showing one embodiment of the present invention. 
     In FIG. 1, the following circuits and external terminals are provided as the monolithic power IC which corresponds to the portion enclosed by broken lines. 
     There are provided two differential amplifier circuits 2a and 2b which have their outputs connected respectively with the non-inverting inputs (+) of amplifier output circuits 1a and 1b constituting the power IC. The non-inverting inputs (+) and inverting inputs (-) of those differential amplifier circuits 2a and 2b are used as the input terminals IN 1 (+), IN 1 (-), IN 2 (+) and IN 2 (-) of the monolithic power IC. 
     Incidentally, the inverting inputs (-) of the amplifier output circuits 1a and 1b are connected with external terminals FB 1  and FB 2  for constituting a feedback circuit. Moreover, the aforementioned amplifier output circuits 1a and 1b have their outputs connected with the outputs OUT 1  and OUT 2 , respectively, thereby to provide supply terminals V cc  and GND, respectively. 
     The differential amplifier circuits 2a and 2b, which are disposed at the input portion of the monolithic power IC are composed, as better seen from FIG. 3, of differential paired transistors Q 1 , Q 2 , Q 1  &#39; and Q 2  &#39;, load resistors R 3  and R 3  &#39;, and constant current source transistors Q 5   and Q 5  &#39;. A bias circuit is composed of a transistor Q 6  and a resistor R 4 . The base-emitter voltage of the transistor Q 6  having its collector and base connected is impressed between the base and emitter of the transistors Q 5  and Q 5  &#39; so that a substantially preset constant current will flow through the transistors Q 5  and Q 5  &#39;. 
     The base electrodes of the differential paired transistors Q 1  and Q 1  &#39; are connected as the non-inverting terminals (+) of the differential amplifier circuits 2a and 2b with the external terminals P 1  and P 3  of the monolithic power IC, respectively. The base electrodes of the other differential paired transistors Q 2  and Q 2  &#39; are connected as the inverting input terminals (-) of the differential amplifier circuits 2a and 2b with the external terminals P 2  and P 4  of the monolithic power IC, respectively. 
     The output signals of the differential amplifier circuits 2a and 2b are generated at the connections between the collector electrodes of the other transistors Q 2  and Q 2  &#39; and the load resistors R 3  and R 3  &#39;, respectively. 
     A zenor diode ZD, a resistor R 7  and a transistor Q 7  constitute together a constant voltage regulator. As a result, a substantially constant operating voltage is generated at the emitter of the transistor Q 7  independently of a voltage V cc  which is to be impressed upon the supply voltage terminal P 9  of the monolithic power IC. 
     The amplifier output circuits 1a and 1b are composed, as shown in FIG. 3, of modified type differential amplifier circuits, which are composed of transistors Q 10 , Q 10  &#39;, Q 11  and Q 11  &#39; and resistors R 9  and R 9  &#39;, and first amplifier stages which are composed of current mirror transistors Q 12 , Q 12  &#39;, Q 13  and Q 13  &#39;. 
     The base electrodes of the transistors Q 10  and Q 10  &#39; of the first amplifier stage are supplied with the output signals of the differential amplifier circuits 2a and 2b as the non-inverting inputs (+) of the amplifier output circuits 1a and 1b. 
     The first amplifier stages thus constructed are supplied with a substantially constant operating voltage from the aforementioned constant voltage regulator through the resistors R 5  and R 6 . The resistor R 5  has its one end connected through a terminal P 13  with a supply voltage ripple eliminating filter capacitor so that the differential amplifier circuits 2a and 2b and the first amplifier stages can be remarkably stably operated. 
     The base electrodes of the transistors Q 11  and Q 11  &#39; of the aforementioned first amplifier stages are supplied with the output signals OUT 1  and OUT 2  of output terminals P 5  and P 6  through DC and AC negative feedback circuits which are composed of resistors R 11 , R 11  &#39;, R 10  and R 10  &#39;, constant current transistors Q 14  and Q 14  &#39; and capacitors C 1  and C 2  connected with negative feedback external terminals P 7  and P 8 . As a result, the AC voltage gains of the amplifier output circuits 1a and 1b are determined, and the output DC levels of the output terminals P 5  and P 6  are maintained at a substantially half level of the supply voltage V cc . 
     Incidentally, constant current transistors Q 14  and Q 14  &#39; are biased by a bias circuit which is composed of a resistor R 18  and a transistor Q 8 . 
     The output signals of the first amplifier stages to be generated at the resistors R 9  and R 9  &#39; are amplified by means of drive amplifier stages which are composed of transistors Q 15 , Q 15  &#39;, Q 16  and Q 16  &#39; of Darlington connection type, resistors R 12  and R 12  &#39;, phase compensation capacitors C 10  and C 10  &#39;, transistors Q 17  and Q 17  &#39; and constant current load transistors Q 18  and Q 18  &#39;. The output signals of the drive amplifier stages thus constructed are fed both to the Darlington connection type transistors Q 20 , Q 20  &#39;, Q 21  and Q 21  &#39; and to the complementary connection type transistors Q 22 , Q 22  &#39;, Q 23  and Q 23  &#39; of the output amplifier stages. 
     The emitters of the transistors Q 22  and Q 22  &#39; are connected with the idling current adjusting circuits, which are composed of diodes D 1  to D 3  and D 1  &#39; to D 3  &#39; and transistors Q 24  and Q 24  &#39;, so that the crossover distorsion of the output amplifier stages can be reduced. 
     Moreover, a bootstrap capacitor C 11  is connected between the output terminal P 5  and an external terminal P 14  whereas a bootstop capacitor C 11  &#39; is connected between the output terminal P 6  and an external terminal P 15 . 
     The power IC thus constructed can be used not only as a stereophonic two-channel power IC but also as a BTL circuit, which is enabled to have a high output by using one of the amplifier circuits as a positive phase amplifier circuit and the other as a negative phase amplifier circuit, by supplying them with a common input, and by connected a load between their respective outputs. 
     FIG. 4 shows an embodiment, in which the power IC according to the present invention is used for amplifying the sterophonic two-channel signals. The left and right channel signals L and R of the stereophonic two-channel signals are impressed through input coupling capacitors C 101  and C 102 , respectively, upon the external terminals P 1  and P 3  which are the non-inverting input terminals of the differential amplifier circuits 2a and 2b. Those external terminals P 1  and P 3  are grounded to the earth through resistors R 101  and R 102 , respectively, so that their DC levels can be maintained at the earth potential. On the other hand, the external terminals P 2  and P 4  which are the inverting input terminals of the differential amplifier circuits 2a and 2b are also grounded to the earth. Moreover, the external terminals P 5  and P 6  which are the output terminals of the amplifier output circuits 1a and 1b are connected through output coupling capacitors C 103  and C 104  with speaker loads R L1  and R L2 . The speaker load R L1  is supplied with the left channel amplifier signals whereas the speaker load R L2  is supplied with the right channel amplifier signals. 
     FIG. 5 shows the embodiment, in which the power IC according to the present invention is used as the BTL circuit. Monaural signals V in  are impressed through the input coupling capacitor C 101  upon the external terminal P 1  acting as the non-inverting input terminal of the differential amplifier circuit 2a and the external terminal P 4  acting as the inverting input terminal of the differential amplifier circuit 2b. As a result, the output signals of both of the differential amplifier circuits 2a and 2b are in opposite phases to each other. As a result, the speaker load R L , which has its both ends connected directly with the output terminals of the amplifier output circuits 1a and 1b, is driven by the amplified monaural signals. 
     From the foregoing description, it is understood that the power IC according to the present invention can be applied to the stereophonic two-channel signal amplification and to the BTL circuit merely by simply modifying the external circuit. 
     As shown in FIG. 2, the embodiment circuit can also be used in a four-amplifier and four-speaker acoustic system. In this case, the fader control can be accomplished at the input until so that the production cost can be reduced. 
     In this embodiment circuit, more specifically, the aforementioned two-channel power integrated circuits IC and IC&#39; are used. A left channel front speaker LF is connected between the output terminals P 5  (OUT 1 ) and P 6  (OUT 2 ) of the power integrated circuit IC. A right channel front speaker RF is connected between the output terminals P 5  &#39;(OUT 1  &#39;) and P 6  &#39;(OUT 2  &#39;) of the power integrated circuit IC&#39;. A left channel back speaker LB is connected between the output terminal of P 5  (OUT 1 ) of the power integrated circuit IC and the output terminal P 5  &#39;(OUT 1  &#39;) of the power integrated circuit IC&#39;. Moreover, a right channel back speaker RB is connected between the output terminal P 6  (OUT 2 ) of the power integrated circuit IC and the output terminal P 6  &#39;(OUT 2  &#39;) of the power integrated circuit IC&#39;. 
     There are provided the input terminals of the aforementioned power integrated circuits IC and IC&#39; such fader control circuits as will be described in the following. 
     The aforementioned power integrated circuit IC has its input terminal P 1  (IN 1 (+)) supplied with the left channel input signals L and its other input terminal P 2  (IN 1 (-)) grounded to the earth. As a result, the amplifier circuits 2a and 1a are used as the positive phase amplifier output circuits. 
     On the other hand, the power integrated circuit IC&#39; has its input terminal P 4  &#39;(IN 2 (-)) supplied with the right channel input signals R and its other input terminal P 3  &#39;(IN 2 (+)) grounded to the earth. As a result, the amplifier circuits 2b&#39; and 1b&#39; are used as the opposite phase amplifier output circuits. 
     On the other hand, the other amplifier circuits have their inputs supplied through fader control attenuators VR 1  to VR 4  with the following input signals. 
     The attenuators VR 1  to VR 4  are of MN type, in which one is made of an conductor so that the attenuation is reduced to zero for an angle of rotation. More specifically, the attenuators VR 1  and VR 4  are made of a conductor at their sides to the fronts F from the center points M, whereas the attenuators VR 2  and VR 3  are made of a conductor at their sides to the backs B from the center points M such that all of them are made coactive with one another. 
     The power integrated circuit IC has its input terminal P 4  (IN 2 (-)) supplied with the left channel signals L through the attenuator VR 1 , which has its attenuation increased for the rotations from the aforementioned center point M to the side of the back B, and its input terminal P 3  (IN 2 (+)) supplied with the right channel signals R through the attenuator VR 3  which has its attenuation increased for the rotations from the aforementioned center point M to the side of the front F. As a result, the amplifier circuits 2b and 1b thus far described amplify the signals R-L at the center points M of the attenuator VR 1  and VR 3 . 
     On the other hand, the power integrated circuit IC, has its input terminal P 1  &#39;(IN 1 (+)) supplied with the right channel signals R through the attenuator VR 4 , which has its attenuation increased for the rotations from the aforementioned center point M to the side of the back B, and its input terminal P 2  &#39;(IN 1 (-)) supplied with the left channel signals through the attenuator VR 2  which has its attenuation increased for the rotations from the aforementioned center point M to the side of the front F. As a result, the amplifier circuits 2a&#39; and 1a&#39; thus far described amplify the signals R-L at the center points of the attenuators VR 2  and VR 4 . 
     The relationships among the rotational positions F, M and B of the attenuators VR 1  to VR 4 , the outputs of the respective amplifiers, and the inputs to the speakers of the acoustic system thus constructed will be tabulated in Table 1. 
     
                                           TABLE 1                                 
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Out put Signals of Each                                                   
                       Signals of Each                                    
Amplifier              Speaker                                            
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VR P.sub.5                                                                
      P.sub.6                                                             
             P.sub.5 &#39;                                                    
                    P.sub.6 &#39;                                             
                       LF      LB                                         
   (1a)                                                                   
      (1b)   (1a&#39;)  (1b&#39;)                                                 
                       RF      RB                                         
                       2L      L - R                                      
F  L  -L     R      -R                                                    
                       2R      R - L                                      
   L  R - L  R - L  -R 2L - R  2L - R                                     
                        ##STR1##                                          
                                ##STR2##                                  
       ##STR3##                                                           
              ##STR4##                                                    
                       2R - L  2R - L                                     
                        ##STR5##                                          
                                ##STR6##                                  
                       L - R   2L                                         
B  L  R      -L     -R                                                    
                       R - L   2R                                         
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     In Table 1, letters F, M and B indicate the front, the center point and the back of the attenuators VR 1  to VR 4 . Incidentally, the parenthesized numerals appearing in Table 1  indicate the case, in which a B curve, i.e., those having no conductor portion so that the attenuations are linearly varied in proportion to the angles of rotation are used as the attenuators VR 1  to VR 4 . 
     According to the embodiment thus far described, since the fader control of the four-amplifier and four-speaker acoustic system can be accomplished at the input unit, such attenuators of small power and size as could not be used in the prior art, in which the fader control has been carried out at the output of high current flow, can be used so that the production cost can be remarkably reduced. 
     It should be understood that the present invention be not limited to the foregoing embodiments but can be extended to modifications, in which a two channel type circuit is used as the power IC and in which a circuit having a differential amplifier circuit as its input unit is used as the one channel power IC.