Patent Publication Number: US-11037840-B2

Title: Method of manufacturing semiconductor apparatus including measuring a film thickness of an SOG film

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     The present application is a Continuation Application of U.S. patent application Ser. No. 15/772,102 filed Apr. 30, 2018, which is the U.S. National Phase under 35 U.S.C. § 371 of International Patent Application No. PCT/JP2016/056271 filed Mar. 1, 2016, the entire contents of which are incorporated herein by reference. 
    
    
     FIELD 
     The present invention relates to a method of manufacturing a semiconductor apparatus that forms an SOG film. 
     BACKGROUND 
     One of wafer process steps for manufacturing a semiconductor apparatus is an SOG (spin on glass) film formation step (e.g., see PTL 1). An SOG film is mainly used to reduce height differences of inter-layer insulating films formed on a wiring or embed inter-wire grooves. The SOG film has viscosity, and is applied while rotating a silicon wafer and formed by further rotating the silicon wafer after the application to adjust the film thickness. For quality management of the wafer process step, it is necessary to measure the film thickness of the SOG film. 
     The film thickness measurement of the SOG film is performed by calculating different light reflection factors of the wiring and the SOG film and measuring the film thickness of the SOG film on the wiring. A film thickness measurement wiring pattern is normally placed not in a chip but on a dicing line. A dicing line width needs to be kept to a minimum necessary for increasing the number of chips taken per wafer and increasing productivity. 
     CITATION LIST 
     Patent Literature 
     [PTL 1] JP 2007-329248 A 
     SUMMARY 
     Technical Problem 
     The film thickness of the SOG film is measured at a central part of a wiring pattern. However, the SOG film is moved to outside the pattern by a centrifugal force caused by rotation of a wafer when the SOG film is formed and the SOG film at a film thickness measurement point at the central part of the pattern is thinned. The central part of the wafer where the centrifugal force is weak becomes thick because the SOG film moves relatively less, whereas peripheral portions of the wafer where the centrifugal force is strong become thin because the SOG film moves more. For this reason, there is a problem that the SOG film has wafer in-plane dependency with the film thickness forming a concentric shape, making it impossible to stably measure the film thickness. 
     The present invention has been implemented to solve the aforementioned problem and it is an object of the present invention to provide a method of manufacturing a semiconductor apparatus that can stably measure a film thickness. 
     Solution to Problem 
     A method of manufacturing a semiconductor apparatus according to the present invention includes: forming a plurality of semiconductor devices on a semiconductor wafer; forming a film thickness measurement wiring pattern on a dicing line defining the plurality of semiconductor devices; forming an SOG film on the semiconductor devices and the film thickness measurement wiring pattern; and measuring a film thickness of the SOG film at a central part of the film thickness measurement wiring pattern, wherein the film thickness measurement wiring pattern is a rectangular pattern having long sides parallel to the dicing line. 
     Advantageous Effects of Invention 
     In the present invention, the film thickness measurement wiring pattern is a rectangular pattern having long sides parallel to the dicing line. Thus, as it is possible to suppress a reduction of film thickness in the longitudinal direction of the pattern, it is possible to stably measure the film thickness of the SOG film. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a plan view illustrating a semiconductor wafer according to Embodiment 1 of the present invention. 
         FIG. 2  is an enlarged plan view of one shot enclosed by a broken line in  FIG. 1 . 
         FIG. 3  is a cross-sectional view along I-II in  FIG. 2 . 
         FIG. 4  is an enlarged plan view of one shot of a semiconductor wafer according to the comparative example. 
         FIG. 5  is a cross-sectional view along I-II of  FIG. 4 . 
         FIG. 6  is a cross-sectional view illustrating a situation in which a centrifugal force is applied in the comparative example. 
         FIG. 7  is a plan view illustrating a film thickness in-plane tendency of the SOG film at the central part of the film thickness measurement wiring pattern in the comparative example. 
         FIG. 8  is a plan view illustrating a film thickness in-plane tendency of the SOG film at a central part of the first film thickness measurement wiring pattern according to Embodiment 1 of the present invention. 
         FIG. 9  is a plan view illustrating a film thickness in-plane tendency of the SOG film at a central part of the second film thickness measurement wiring pattern according to Embodiment 1 of the present invention. 
         FIG. 10  is an enlarged plan view of one shot of a semiconductor wafer according to Embodiment 2 of the present invention. 
         FIG. 11  is a plan view illustrating a film thickness in-plane tendency of an SOG film at a central part of the film thickness measurement wiring pattern according to Embodiment 2 of the present invention. 
     
    
    
     DESCRIPTION OF EMBODIMENTS 
     A method of manufacturing a semiconductor apparatus according to the embodiments of the present invention will be described with reference to the drawings. The same components will be denoted by the same symbols, and the repeated description thereof may be omitted. 
     Embodiment 1 
       FIG. 1  is a plan view illustrating a semiconductor wafer according to Embodiment 1 of the present invention. A plurality of shots  2  are arranged in a matrix form on a semiconductor wafer  1 .  FIG. 2  is an enlarged plan view of one shot enclosed by a broken line in  FIG. 1 . Configurations of the other shots  2  in  FIG. 1  are also similar to the configuration in  FIG. 2 .  FIG. 3  is a cross-sectional view along MI in  FIG. 2 .  FIG. 3  illustrates a cross section of a first film thickness measurement wiring pattern  3  and the same applies to a cross section of a second film thickness measurement wiring pattern  4 . A method of manufacturing a semiconductor apparatus according to the present embodiment will be described with reference to these drawings. 
     First, a plurality of semiconductor devices  5  are formed on the semiconductor wafer  1 . Here, first and second dicing lines  6  and  7  which are orthogonal to each other define a plurality of semiconductor devices  5 . Next, a first inter-layer insulating film  8  is formed on the semiconductor wafer  1 . Next, the first and second film thickness measurement wiring patterns  3  and  4  made of metal or the like are formed on the first and second dicing lines  6  and  7  respectively through film formation and machining steps. 
     Next, a second inter-layer insulating film  9  and an SOG film  10  are formed in that order on the semiconductor device  5  and the first and second film thickness measurement wiring patterns  3  and  4 . Next, different light reflection factors of the first and second film thickness measurement wiring patterns  3  and  4  and the SOG film  10  are calculated. Film thicknesses of the SOG films  10  at central parts of the first and second film thickness measurement wiring patterns  3  and  4  are measured respectively. After that, through steps such as cleavage along the first and second dicing lines  6  and  7 , the semiconductor apparatus of the present embodiment is manufactured. 
     Next, the method of measuring a film thickness according to the present embodiment will be described in further detail in comparison with a comparative example.  FIG. 4  is an enlarged plan view of one shot of a semiconductor wafer according to the comparative example.  FIG. 5  is a cross-sectional view along I-II of  FIG. 4 . In the comparative example, a film thickness measurement wiring pattern  11  is a square pattern.  FIG. 6  is a cross-sectional view illustrating a situation in which a centrifugal force is applied in the comparative example. The SOG film  10  is moved to outside the pattern by a centrifugal force caused by rotation of the wafer at the time of film formation and the SOG film  10  at a film thickness measurement point at a central part of the pattern is thinned.  FIG. 7  is a plan view illustrating a film thickness in-plane tendency of the SOG film at the central part of the film thickness measurement wiring pattern  11  in the comparative example. At the central part of the wafer where the centrifugal force is weak, the SOG film  10  moves relatively less and the thickness of the SOG film  10  increases, whereas at peripheral portions of the wafer where the centrifugal force is strong, the SOG film  10  moves widely and the thickness of the SOG film  10  decreases. 
     In contrast, the first and second film thickness measurement wiring patterns  3  and  4  in the present embodiment are rectangular patterns, the long sides of which are parallel to the first and second dicing lines  6  and  7  respectively. Since the length in the longitudinal direction of the wiring pattern is sufficiently large, an absolute amount of the SOG film  10  on the wiring pattern increases and an amount of the SOG film  10  remaining on the wiring pattern increases relative to an amount of the SOG film  10  flowing to outside the wiring pattern along the longitudinal direction due to the centrifugal force. For this reason, it is possible to suppress a reduction of film thickness in the longitudinal direction of the pattern. 
       FIG. 8  is a plan view illustrating a film thickness in-plane tendency of the SOG film at a central part of the first film thickness measurement wiring pattern according to Embodiment 1 of the present invention. The thicknesses of the SOG film  10  at central parts of the first film thickness measurement wiring patterns  3  increase in directions of 3 o&#39;clock and 9 o&#39;clock parallel to the first dicing line  6  from the central part of the semiconductor wafer  1 .  FIG. 9  is a plan view illustrating a film thickness in-plane tendency of the SOG film at a central part of the second film thickness measurement wiring pattern according to Embodiment 1 of the present invention. The thickness of the SOG film  10  at a central part of the second film thickness measurement wiring pattern  4  increases in directions of 12 o&#39;clock and 6 o&#39;clock parallel to the second dicing line  7  from the central part of the semiconductor wafer  1 . The thickness of the SOG film  10  does not decrease in these regions, but becomes uniform with respect to the thickness at the central part of the semiconductor wafer  1 . 
     Therefore, in the present embodiment, the film thicknesses of the SOG film  10  on the first film thickness measurement wiring pattern  3  are measured at a central part of the semiconductor wafer  1  and at peripheral portions of the semiconductor wafer  1  located in the directions of 3 o&#39;clock and 9 o&#39;clock. Then, the film thicknesses of the SOG film  10  on the second film thickness measurement wiring pattern  4  are measured at a central part of the semiconductor wafer  1  and at the peripheral portions of the semiconductor wafer  1  located in the directions of 12 o&#39;clock and 6 o&#39;clock. In this way, it is possible to stably measure the film thickness of the SOG film  10  at five in-plane points: the central part of the semiconductor wafer  1 , the peripheral portions in the directions of 12 o&#39;clock, 3 o&#39;clock, 6 o&#39;clock and 9 o&#39;clock. 
     Embodiment 2 
       FIG. 10  is an enlarged plan view of one shot of a semiconductor wafer according to Embodiment 2 of the present invention. In the present embodiment, a film thickness measurement wiring pattern  12  is a cross-like pattern positioned in a region where the first and second dicing lines  6  and  7  cross each other. 
       FIG. 11  is a plan view illustrating a film thickness in-plane tendency of an SOG film at a central part of the film thickness measurement wiring pattern according to Embodiment 2 of the present invention. The thicknesses of the SOG film  10  increase at central parts of the film thickness measurement wiring patterns  12  in the directions of 12 o&#39;clock and 6 o&#39;clock and in the directions of 3 o&#39;clock and 9 o&#39;clock. The thicknesses of the SOG film  10  do not decrease in these regions, but become uniform with respect to the thickness at the central part of the semiconductor wafer  1 . 
     Therefore, in the present embodiment, the film thicknesses of the SOG film  10  on the film thickness measurement wiring patterns  12  are measured at the central part of the semiconductor wafer  1 , at the peripheral portions of the semiconductor wafer  1  located in the directions of 12 o&#39;clock and 6 o&#39;clock and at the peripheral portions of the semiconductor wafer  1  located in the directions of 3 o&#39;clock and 9 o&#39;clock. In this way, it is possible to stably measure the film thicknesses of the SOG film  10  at five in-plane points: the central part of the semiconductor wafer  1 , the peripheral portions in the directions of 12 o&#39;clock, 3 o&#39;clock, 6 o&#39;clock and 9 o&#39;clock. Furthermore, since these film thicknesses can be measured in single measurement, steps can be simplified. 
     The semiconductor wafer  1  is not limited to a wafer formed of silicon, but instead may be formed of a wide-bandgap semiconductor having a bandgap wider than that of silicon. The wide-bandgap semiconductor is, for example, a silicon carbide, a gallium-nitride-based material, or diamond. A power semiconductor device formed of such a wide-bandgap semiconductor has a high voltage resistance and a high allowable current density, and thus can be miniaturized. The use of such a miniaturized semiconductor device enables the miniaturization and high integration of the semiconductor module in which the semiconductor device is incorporated. Further, since the semiconductor device has a high heat resistance, a radiation fin of a heatsink can be miniaturized and a water-cooled part can be air-cooled, which leads to further miniaturization of the semiconductor module. Further, since the semiconductor device has a low power loss and a high efficiency, a highly efficient semiconductor module can be achieved. 
     REFERENCE SIGNS LIST 
       1  semiconductor wafer;  5  semiconductor device;  6 , 7  dicing line;  3 , 4 , 12  film thickness measurement wiring pattern;  10  SOG film