Patent Publication Number: US-9899964-B2

Title: Class AB amplifier with bias control

Description:
FIELD OF THE INVENTION 
     The present invention relates to an auto bias class AB amplifier. 
     BACKGROUND OF THE INVENTION 
     In a Class AB amplifier the standing current through both transistors when there is no signal is referred to as idle current. The idle current decreases distortion in the cross-over region (the switch from one amplifier to the other). But the drawback is that it at the same time increases power consumption in the idle state. Another drawback is that the bias current applied to set the idle current has to be adjusted to the temperature. 
     Various attempts have been made to improve idle power consumption, without sacrificing high fidelity. For example, U.S. Pat. No. 4,077,013 discloses a system where the bias current is adjusted (down) when there is no input. 
     An attempt to overcome these problems is presented in the article: “Error correction and Non-Switching Power Amplifier Output Stages, by Hawksford, presented at the 102 nd  AES Convention, Mar. 22-25, 1997. With this approach, a high degree of linearity is achieved by current driving the output transistors and using a specific type of output transistors. However, as soon as the output leaves the class A condition the current in the branch not supplying current will turn off completely, i.e. running in pure class B operation. 
     Attempts have been made to actively monitor and control the bias current of each power transistor, for example U.S. Pat. No. 3,995,228 and U.S. Pat. No. 4,160,216 where the current is monitored by measuring the voltage across the emitter resistance, which causes problems especially when the idle current is small. 
     A solution is presented in U.S. Pat. No. 4,595,883. In this solution, the transistor which does not provide output will still remain active. This is achieved by a control loop that is misbalanced by the parasitic voltage dependent current of a transistor to keep an idle current running. However, this solution is not robust. The voltage dependent current which is referred to as the “Early voltage” is parasitic and normally a parameter with huge tolerances. The control circuit with local feedback of the audio signal further means that the audio signal has to pass several transistors before entering the output transistors. This feedback loop establishes a low impedance output at the emitters of the transistors. At this point there are two emitter resistors to measure the idle current. In order to have enough voltage across these transistors the emitter resistors have to be in the range of one Ohm, and the output stage would thus essentially have an output impedance of one Ohm. In a good amplifier, the output impedance must be at least 100 times lower. This can only be achieved by an external feedback control, in which case the one Ohm output resistor in combination with a reactive load may cause a phase shift and oscillation. 
     General Disclosure of the Invention 
     The object of the present invention is to provide an alternative solution to prior art solutions, providing a Class AB amplifier with controlled bias exhibiting low distortion and improved linearity. 
     According to the present invention, this and other objects are achieved by a method for controlling an idle current in an amplifier arrangement having a first and a second power amplifier, a positive voltage connected to a drain of the first power amplifier, a negative voltage connected to a drain of the second power amplifier, and an input signal connected to a gate of each power amplifiers, and wherein a source of the first power amplifier and a source of the second power amplifier are both connected to a load. The method comprises detecting a first drain current from the first power amplifier, detecting a second drain current from the second power amplifier, identifying an idle current as the smallest drain current of the first and second drain currents, comparing the idle current with a pre-set idle current set point, to provide an error signal, supplying the error signal to a bias control loop, to provide a feedback signal, driving a bias current proportional to the feedback signal through a resistor connected between the input signal and the gate of an inactive one of the first and second power amplifiers, the feedback signal thereby controlling a bias voltage on the gate to ensure that a drain current from the inactive power amplifier is equal to the pre-set idle current. 
     The objects are also obtained by an amplifier arrangement comprising a first power amplifier having a drain connected to a positive drive voltage and a gate connected to an input signal, a second power amplifier having a drain connected to a negative drive voltage and a gate connected to the input signal, wherein a source of the first power amplifier and a source of the second power amplifier are both connected to a load, a first current sensor detecting a first drain current from the first power amplifier, a second current sensor detecting a second drain current from the second power amplifier, processing circuitry adapted to identify an idle current as the smallest drain current of the first and second drain currents, a comparator for comparing the idle current with a pre-set idle current set point, to provide an error signal, a bias control loop providing a feedback signal based on the error signal, and means for driving a bias current dependent on the feedback signal through a resistor connected between the input signal and the gate of an inactive one of the first and second power amplifiers, so as to ensure that a drain current from the inactive power amplifier is equal to the pre-set idle current. 
     According to the invention a bias control loop will keep the idle current constant in the transistor with the lowest current (the inactive transistor). Thereby, the current running in the transistor which does not deliver current to the load will be fixed at a desired value. The value is fixed for all operation and signal conditions that might appear, and independent of the values of V in , V out , output current or a possible inductive load. 
     According to the invention, audio performance can be maintained with a lower idle current, thus leading to significant reductions in power consumption when idling. Alternatively, improved audio performance can be achieved without increasing the idle current. 
     Compared to a conventional class AB amplifier, the inactive transistor is still active, why an amplifier according to the present invention may be referred to as a “class ABA” amplifier. 
     It is noted that the expression “drain” implies that the transistors are MOS transistors. However, the present invention may also be implemented using bipolar transistors, in which case the collector current is detected, and the bias voltage is applied to the base. 
     The processing circuitry may be implemented by analogue circuitry or using a digital processor with suitable sampling. 
     According to a preferred embodiment, the bias current is applied to both transistors. This has a linearizing effect on the amplifier, and it can be shown that the non-linear component is reduced by 50%. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The present invention will be described in more detail with reference to the appended drawings, showing currently preferred embodiments of the invention. 
         FIG. 1  is a schematic block diagram of an amplifier according to an embodiment of the invention. 
         FIG. 2  is a flow chart of a method according to an embodiment of the invention. 
         FIG. 3  is a more detailed circuit diagram of an amplifier of an embodiment of the invention. 
         FIG. 4  is a diagram of output currents of the two branches in the circuit in  FIG. 3 . 
     
    
    
     DETAILED DESCRIPTION OF CURRENTLY PREFERRED EMBODIMENTS 
       FIG. 1  shows an amplifier arrangement according to an embodiment of the invention with two MOSFET transistors; a top transistor T 1  and a bottom transistor T 2 , delivering voltage V out  to a load RL. The top transistor T 1  is connected to a positive drive voltage, and its gate is connected to an input voltage via a resistor R 1 . The bottom transistor T 2  is connected to a negative drive voltage, and its gate is connected to an input voltage via a resistor R 2 . The drain current in the top transistor T 1  is referred to as i 1  and the drain current in the bottom transistor T 2  is referred to as i 2 . The drain of each transistor is connected to respective current sensors  1 ,  2 , arranged to detect the two drain currents i 1 , i 2 . 
     The arrangement further comprises processing circuitry arranged to rectify the signals from the current sensors  1 ,  2 , and to identify the smallest current of i 1  and i 2 . This smallest current, i represents the idle current running in the branch which does not deliver current to the output load RL. A bias control loop includes a comparator  4 , arranged to compare the value of the smallest current i r  with a value representing a desired idle current, i q . The control loop further comprises a loop gain  5  connected to two current sources C 1  and C 2 . The current sources are respectively connected to resistors R 1  and R 2 . 
     The operation of the arrangement in  FIG. 1  will now be briefly described with reference to  FIG. 2 . First, in step S 1 , the two drain currents i 1 , i 2  are detected by the current sensors  1 ,  2 , and signals representing the detected currents are supplied to the processing circuitry  3 . In step S 2 , the smallest current of i 1  and i 2  is identified by the processing circuitry  3 . In step S 3 , a feedback signal is formed by comparing the identified smallest current, ir, with the desired idle current, and amplifying the resulting error i e  by a constant gain A in the loop gain  5 . In step S 4 , the feedback signal is used to control the current sources C 1  and C 2  to draw a bias current through resistors R 1  and R 2 , thereby influencing a bias voltage across the resistors R 1 , R 2 . The drain current feedback acts as a bias control loop, and ensures that if the smallest drain current of i 1  or i 2  is less than i q , the current through R 1 /R 2  will increase until this smallest current becomes equal to i q . This ensures a constant idle current equal to i q  through T 1  and T 2  when they are inactive. 
     In addition, the feedback described above provides a linearizing effect as will be described in the following. 
       FIG. 1  can be seen as a unity gain voltage follower. The relation ideally is V out =V in . The relation between drain current and gate source voltage, on the other hand, is non-linear. 
     If T 1  and T 2  are perfectly matched, then the gate source voltage V GS1 =V GS2  for the same drain current and the same drain-source voltage. For simplicity, R 1  is assumed to be equal to R 2 . Under these conditions, the following holds:
 
 V   out   =V   in   +i   b   *R 1− V   GS1   1.
 
 V   out   =V   in   −i   b   *R 1 +V   GS2   V   out   =*V   in   −i   b   *R 1+ V   SG2 ,  2.
 
     where V in  is the input signal, V out  is the output voltage, i b *R 1  is the bias voltage and V GSx  is the gate-source voltage. If V in =0 then V out =0 and V GS =V GS1 =V Q =i bq *R 1 , where i bq  is the bias current through R 1 . In a conventional bias system the voltage difference between V G1  and V G2  is held constant. In  FIG. 1  this would correspond to breaking the control loop and consider the bias current i b  as a constant, so V G1 −V G2 =i bq *(R 1 +R 1 ). If V in  is positive, T 1  will increase the output current into the load RL. This means that V GS1  will increase by some amount. So we let V GS1 =V Q +ΔV GS1 V GS1 =V Q +ΔV GS1 , where the added amount depends of un-linear parameters in the transistor. Equation 1 now becomes:
 
 V   out   =V   in   +i   b   *R 1 −V   GS1   =V   in   +i   b   *R 1−( V   Q   +ΔV   GS1 ) V   out   =V   in   +i   b   *R 1 −V   GS1   =V   in   +i   bQ   *R 1− V   out   =V   in   −ΔV   GS1   3.
 
     In a system according to an embodiment of the invention as illustrated in  FIG. 1 , as mentioned, the bias control loop will keep the idle current constant in the branch with the lowest current. Therefore, in this case, when T 1  is driving the load, the control loop will increase i b  until the desired idle current is obtained through T 2 . 
     To simplify we choose to omit the very small change in idle current coming from the change in V SD2 , so the current in T 2  is only dependent of V SG2 . Then the gate-source voltage of T 2  is unchanged V SG2 =V Q . Equation 1 and 2 becomes:
 
 V   out   =V   in   +i   b   *R 1−( V   Q   +ΔV   GS1 )  4.
 
 V   out   =V   in   −i   b   *R 1+(( V   Q +0)  5.
 
     Adding two equations and dividing by two results in:
 
 V   out   =V   in   −ΔV   GS1 /2  6.
 
     The same result appears when the investigation is made on a negative voltage input. Clearly, in an amplifier according to this embodiment of the invention, the non-linear component is reduced to half the value compared to a conventional system. If we substitute the MOSFET&#39;s with a complementary set of bipolar transistors we will find the same improvement in performance. 
       FIG. 3  shows an example of a circuit realization of the schematic diagram in  FIG. 1 , with the processing circuitry  3  realized by analogue circuitry. Components in  FIG. 3  corresponding to similar components in  FIG. 1  have been given identical reference labels. 
     The output transistors T 1 , T 2  are here MOSFET transistors, which are complementary to the common source V in . The voltage drop across resistors R 1  and R 2  forms a bias voltage that generates gate-source voltages from the transistors. C 1  and C 2  are two current generators which track and input the same current as is drawn out so that the circuit is balanced. 
     The drain currents of T 1  and T 2  are measured by the following manner. A diode  11 ,  12  is provided in the forward direction of each drain. In parallel with the diode is a resistor  13 ,  14 . The resistor  13 ,  14  has a value which ensures that the voltage drop across the resistor is determined by the desired bias current, and not by the forward voltage of the diode. For example, at 10 mA there will be a voltage of about 100 mV across resistor  13  which is significantly below the forward voltage of the diode. When the output draws a lot of current, the diode takes over and ensure that the output stage continues to function, only with a diode forward voltage less in the supply voltage. 
     The voltage drop across resistor  13  is detected by means of transistors T 4 , T 5 , and the value is supplied as a current. Similarly for the other branch, where transistors T 6  and T 7  detect the voltage across resistor  14 . In the lower branch, the current signal is reversed by a current mirror  15 . The voltage across resistor  16  now represents the current in the lower branch and the voltage across resistor  17  the current of the upper branch. 
     Using diodes  18  and  19  the lower of the two voltages is found, and this represents the value to be maintained as a constant according to the invention. This signal passes an emitter follower  20  to be subsequently low-pass filtered in order to introduce a loop filter to ensure that the feedback system is stable. 
     The filtered signal is connected to a differential amplifier  21  including transistors  22 ,  23 . At the base of transistor  23  is provided a DC signal that corresponds to the desired minimum idle current, e.g. one Volt. 
     The differential amplifier  21  has its output connected to an amplifier  24  including transistors  25 ,  26 ,  27 ,  28 . The amplifier is designed to convert the output current from the differential amplifier  21  to the two current generators C 1 , C 2  that provide a voltage drop across R 1  and R 2 . 
     The circuit also includes a number of RC components which aim to make the system fast and stable. There are also interposed some 1 mohm resistors which are irrelevant to the function. They only serve to provide a measure resistance in the simulation of the circuit. 
       FIG. 4  shows a simulation of the current in the circuit in  FIG. 3 , showing the current through the top and bottom transistors T 1 , T 2 . It is evident that both output transistors T 1 , T 2  are constantly drawing current, and that a minimum flow of current is maintained at all times, in this case at around 8 mA. 
     The person skilled in the art realizes that the present invention by no means is limited to the preferred embodiments described above. On the contrary, many modifications and variations are possible within the scope of the appended claims. For example, the above description relates to an implementation with MOSFET transistors, but implementations with bipolar transistors are also possible. Further, the details of the circuit implementation may differ from that shown in  FIG. 3 , e.g. to include additional filters or feedback control. 
     The processing circuitry  3 , which above has been exemplified with analogue circuitry, can also be implemented by a digital processor. Such implementation would entail suitable sampling, e.g. using 10 bit A/D and D/A converters with a sampling rate of 20 MHz. Possible embodiments include an SAR converter or a flash converter.