Patent Publication Number: US-10333462-B2

Title: Measuring apparatus for solar cell

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application claims the priority benefit of Taiwan application serial no. 105135724, filed on Nov. 3, 2016. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification. 
     BACKGROUND 
     Technical Field 
     The disclosure relates to a measuring apparatus, and particularly relates to a measuring apparatus for solar cell with a high acquisition rate. 
     Description of Related Art 
     To use solar cells to convert solar energy into electrical energy is now a mainstream of a renewable energy market. In order to develop more cost-effective and more efficient devices, new materials and new composite structure-designed devices are consecutively provided in recent years. For example, compared with c-Si solar cell products, III-V group alloy mixed substrates, organic thin-film materials, metallization-wrap-through (MWT) solar cells, heterojunction with intrinsic thin-layer (HIT) solar cells, etc., all have advantages of low cost, flexibility and high power-generating efficiency, etc. 
     However, regarding many devices with high photoelectric conversion efficiency, such as the HIT solar cell, etc., the multi-layer structure thereof leads to a subsequent capacitance effect problem. For example, when an I-V curve measurement is performed to a solar photoelectric device, if a material of a substrate or a device structure does not belong to a single material, the capacitance effect may result in a measurement error of the I-V curve at a point close to a maximum-power-point (MPP). 
     Methods for resolving the aforementioned capacitance effect include steady state light source irradiation, resistance parameter model establishment or dark current measurement, etc., though these measurement methods are not only time-consuming, procedures of the measurement operations are also complicated. Therefore, how to provide faster and more accurate measurement for such type of the solar photoelectric devices becomes a target of the technicians of the field. 
     SUMMARY 
     The disclosure is directed to a measuring apparatus for solar cell, which is adapted to quickly and accurately capture characteristic curve data of the solar cell. 
     The disclosure provides a measuring apparatus for solar cell to obtain a characteristic curve thereof. The measuring apparatus includes a signal measurement control circuit and a signal transmitting control circuit. The signal measurement control circuit is configured to output at least one control signal for controlling a resistance circuit thereof to provide a measurement loading. The signal transmitting control circuit includes at least one path separating circuit, each path separating circuit is configured to provide at least two signal transmitting paths, and signal transmitting directions of the at least two signal transmitting paths are different. The signal measurement control circuit outputs the control signal to the resistance circuit by using the signal transmitting control circuit. 
     According to the above description, the measuring apparatus for solar cell of the disclosure outputs the control signal to the resistance circuit by using the signal transmitting control circuit, and separates a charging and discharging path of the control signal by using the path separating circuit during the process of transmitting the control signal. In this way, the measurement loadings provided by the resistance circuit can be quickly switched, and an oscillation effect caused by factors of an inbuilt capacitance of the component, etc., during the switching operation is avoided, so as to quickly and accurately capture the characteristic curve of the solar cell. 
     In order to make the aforementioned and other features and advantages of the disclosure comprehensible, several exemplary embodiments accompanied with figures are described in detail below. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the disclosure. 
         FIG. 1  is a schematic block diagram of a measuring apparatus for solar cell according to an embodiment of the disclosure. 
         FIG. 2  is a block circuit diagram of a measuring apparatus for solar cell according to an embodiment of the disclosure. 
         FIG. 3  is a block circuit diagram of a path separating circuit according to an embodiment of the disclosure. 
         FIG. 4  is a block circuit diagram of a measuring apparatus for solar cell according to an embodiment of the disclosure. 
         FIG. 5  is an equivalent circuit diagram of a solar cell according to an embodiment of the disclosure. 
         FIG. 6  is a flowchart illustrating a method for fitting characteristic curves according to an embodiment of the disclosure. 
         FIG. 7  is a schematic diagram of an I-V characteristic curve according to an embodiment of the disclosure. 
         FIG. 8  is an equivalent circuit diagram of a solar cell according to an embodiment of the disclosure. 
     
    
    
     DETAIL DESCRIPTION OF DISCLOSED EMBODIMENTS 
       FIG. 1  is a schematic block diagram of a measuring apparatus for solar cell according to an embodiment of the disclosure. Referring to  FIG. 1 , the measuring apparatus  100  of the present embodiment is configured to measure a solar cell SC to obtain a characteristic curve thereof. In the present embodiment, the characteristic curve is, for example, a current-voltage (I-V) characteristic curve of the solar cell SC. The measuring apparatus  100  includes a signal measurement control circuit and a signal transmitting control circuit. The signal measurement control circuit includes a controller  110  and a resistance circuit  120 . The controller  110  is configured to output a control signal for controlling the resistance circuit  120  to provide a measurement loading required for measuring the solar cell SC. The signal transmitting control circuit is electrically connected between the signal measurement control circuit and the solar cell SC, and includes at least one path separating circuit  130 , and each path separating circuit  130  is configured to provide at least two signal transmitting paths, and signal transmitting directions of the at least two signal transmitting paths are different. In this way, the signal measurement control circuit may output the control signal to the resistance circuit  120  by using the signal transmitting control circuit. 
     In the present embodiment, the controller  110  may output the control signal, and the control signal is transmitted to the resistance circuit  120  through the path separating circuit  130 . Generally, when the control signal is changed from a low level to a high level, a current flows into the resistance circuit  120 . Conversely, when the control signal is changed from the high level to the low level, the current may flow out from the resistance circuit  120 . Therefore, the path separating circuit  130  of the present embodiment provides a first signal transmitting path SP 1  and a second signal transmitting path SP 2 , such that the current may flow into the resistance circuit  120  through the first signal transmitting path SP 1 , and may flow out of the resistance circuit  120  through the second signal transmitting path SP 2 . 
     In the present embodiment, an impedance of the first signal transmitting path SP 1  is smaller than an impedance of the second signal transmitting path SP 2 . Namely, the impedance when the current flows into the resistance circuit  120  is smaller than the impedance when the current flows out of the resistance circuit  120 . However, the disclosure is not limited thereto, and in other embodiments, those skilled in the art may adjust the impedances of the first signal transmitting path SP 1  and the second signal transmitting path SP 2  according to an actual requirement. 
       FIG. 2  is a block circuit diagram of a measuring apparatus for solar cell according to an embodiment of the disclosure. Referring to  FIG. 2 , the signal measurement control circuit of the measuring apparatus  200  includes a controller  210 , a signal isolation circuit  240 , a signal amplification circuit  250  and a resistance circuit  220 . The signal transmitting control circuit of the measuring apparatus  200  includes a plurality of path separating circuits  230 _ 1  to  230 _ 16 . In the present embodiment, functions and configurations of the controller  210 , the resistance circuit  220  and the path separating circuit  230 _ 1  to  230 _ 16  are similar to that of the similar components in the embodiment of  FIG. 1 , and detail thereof is not repeated. 
     In the present embodiment, the signal isolation circuit  240  is electrically connected between the controller  210  and the signal amplification circuit  250 , and the signal amplification circuit  250  is electrically connected between the signal isolation circuit  240  and the signal transmitting control circuit. 
     In the present embodiment, the signal isolation circuit  240  is configured to respectively transmit control signals CS 1 -CS 16  output by the controller  210  to the path separating circuits  230 _ 1  to  230 _ 16 . Moreover, the signal isolation circuit  240  is further configured to isolate a reverse current flowing from the signal transmitting control circuit to the controller  210 , so as to prevent the reverse current from damaging the controller  210 . Those skilled in the art may understand a detailed implementation method of the signal isolation circuit  240  used for achieving the aforementioned effects, and detail thereof is not repeated. 
     It should be noted that the controller  210  of the present embodiment is to output  16  control signals to control the resistance circuit  220  to provide a signal measurement loading, though the disclosure is not limited thereto, and in other embodiments, the controller  210  may also output other number of the control signals according to an actual requirement (for example, a specification of the controller  210 , etc.), and control the resistance circuit  220  to provide the signal measurement loading through other number of the path separating circuits. 
     In the present embodiment, the signal amplification circuit  250  is configured to amplify the control signals CS 1  to CS 16  output by the controller  210 . For example, a voltage level of the control signals CS 1  to CS 16  output by the controller  210  is 3 volts, though in the present embodiment, the voltage level required for controlling the resistance circuit  220  is 12 to 15 volts. Therefore, the signal amplification circuit  250  may amplify the voltage level of the control signals CS 1  to CS 16  to 12 to 15 volts. Those skilled in the art may understand a detailed implementation method of the signal amplification circuit  250  used for achieving the aforementioned effects, and detail thereof is not repeated. Moreover, in other embodiments, the measuring apparatus  200  may also include the signal amplification circuit  250  with other magnification factor, or does not include the signal amplification circuit  250 , which is not limited by the disclosure. 
     In the present embodiment, the resistance circuit  220  includes a plurality of impedance circuits Im 1  to Im 16 . The impedance circuits Im 1  to Im 16  respectively include resistors R 1  to R 16  and transistor switches Q 1  to Q 16 , where the resistors R 1  to R 16  are respectively connected to the transistor switches Q 1  to Q 16  in parallel. Control terminals of the transistor switches Q 1  to Q 16  are electrically connected to the path separating circuits  230 _ 1  to  230 _ 16  in the signal transmitting control circuit respectively, and the transistor switches Q 1  to Q 16  determine whether to provide the measurement loadings through the resistors connected in parallel thereto according to the control signals CS 1  to CS 16  provided by the controller  210 . 
     Taking the impedance circuit Im 1  as an example, the impedance circuit Im 1  includes the resistor R 1  and the transistor switch Q 1  connected in parallel to each other, where the control terminal of the transistor switch Q 1  (for example, a gate of the transistor) is electrically connected to the path separating circuit  230 _ 1 . The control signal CS 1  provided by the controller  210  is transmitted to the control terminal of the transistor switch Q 1  through the path separating circuit  230 _ 1 , and when a gate source voltage of the transistor switch Q 1  is greater than a threshold voltage of the transistor switch Q 1 , the transistor switch Q 1  is turned on to short the resistor R 1 . In other words, the transistor switch Q 1  may determine whether to provide the measurement loading through the resistor R 1  according to the control signal CS 1 . Similarly, in the impedance circuits Im 2  to Im 16 , the transistor switches Q 2  to Q 16  may determine whether to provide the measurement loadings through the resistors R 2  to R 16  according to the control signals CS 2  to CS 16 . 
     In this way, when the controller  210  outputs the control signals CS 1  to CS 16  of different combinations, the resistance circuit  220  may provide different measurement loadings required for measuring the solar cell SC in a specific frequency corresponding to the control signals CS 1  to CS 16  by shorting the resistors R 1  to R 16  of different combinations. It should be noted that the present embodiment, the impedance circuits Im 1  to Im 16  correspond to the path separating circuits  230 _ 1  to  230 _ 16  in a one-to-one manner, though the disclosure is not limited thereto. 
     In the present embodiment, the transistor switches Q 1  to Q 16  are, for example, metal-oxide-semiconductor field-effect transistors (MOSFET), SiC-MOSFET or insulated gate bipolar transistors (IGBT), though the disclosure is not limited thereto. 
     Particularly, when the I-V characteristic curve of the solar cell is measured, it often needs to quickly switch the measurement loadings, so that it is required to quickly and frequently turn on/off the transistor switches Q 1  to Q 16 . Taking the transistor switch Q 1  as an example, when an inbuilt capacitor exists between a gate and a source of the transistor switch Q 1 , a current flowing through the resistor R 1  has an oscillation phenomenon, and the oscillation phenomenon is more obvious when a control terminal (i.e. the gate) of the transistor switch Q 1  is discharged. Therefore, the path separating circuits  230 _ 1  to  230 _ 16  are set in the measuring apparatus  200  of the present embodiment to mitigate the aforementioned oscillation phenomenon. 
     In the present embodiment, the signal transmitting control circuit includes a plurality of the path separating circuits  230 _ 1  to  230 _ 16 . In view of configuration, the path separating circuits  230 _ 1  to  230 _ 16  are connected to the impedance circuits Im 1  to Im 16  in the one-to-one manner. The path separating circuit  230 _ 1  is taken as an example to describe the path separating circuit of the disclosure. 
       FIG. 3  is a block circuit diagram of a path separating circuit according to an embodiment of the disclosure. Referring to  FIG. 3 , the path separating circuit  230 _ 1  of the present embodiment provides a first signal transmitting path SP 1 , a second signal transmitting path SP 2  and a third signal transmitting path SP 3 . 
     In the present embodiment, the first signal transmitting path SP 1  includes a first diode D 1 , which is used for limiting a current from flowing into the impedance circuit Im 1  of the resistance circuit  220 . The second signal transmitting path SP 2  includes a second diode D 2  and a first resistor Re 1 , which is used for limiting a current from flowing out of the impedance circuit Im 1  of the resistance circuit  220 . A control terminal of the impedance circuit Im 1  of the resistance circuit  220  is electrically connected to an output terminal of the first diode D 1  and an input terminal of the second diode D 2 . Therefore, regarding the currents flowing into and out of the resistance circuit  220 , an impedance of the first signal transmitting path SP 1  is smaller than an impedance of the second signal transmitting path SP 2 . 
     It should be noted that when the gate of the transistor switch Q 1  in the impedance circuit Im 1  is discharged, the discharge is implemented through the second signal transmitting path SP 2  including the first resistor Re 1 . In this way, a discharge rate of the gate of the transistor switch Q 1  is slowed down, so as to mitigate the oscillation of the current flowing through the resistor R 1  in case of discharging. On the other hand, when the gate of the transistor switch Q 1  in the impedance circuit Im 1  is charged, the charging is implemented through the first signal transmitting path SP 1  without any resistor. In this way, the gate of the transistor switch Q 1  can be quickly charged. 
     However, the commonly used diode (for example, a silicon diode) has a barrier voltage (for example, 0.7 volt), and if only the second signal transmitting path SP 2  is provided to serve as the path for the current to flow out of the resistance circuit  220 , the gate of the transistor switch Q 1  cannot be sufficiently discharged. 
     Therefore, in the present embodiment, the path separating circuit  230 _ 1  further provides the third signal transmitting path SP 3  including a second resistor Re 2 , so as to provide another path for the current to flow out of the resistance circuit  220 . Namely, in the present embodiment, the current flows out of the resistance circuit  220  through the second signal transmitting path SP 2  and the third signal transmitting path SP 3 . It should be noted that a resistance of the second resistor Re 2  is greater than a resistance of the first resistor Re 1 , so that regarding the currents flowing into and out of the resistance circuit  220 , the impedance of the third signal transmitting path SP 3  is greater than the impedance of the first signal transmitting path SP 1  and the impedance of the second signal transmitting path SP 2 . 
     In another embodiment, the path separating circuit  230 _ 1  may not include the third signal transmitting path SP 3 , but only provides the second signal transmitting path SP 2  to serve as the path for the current to flow out of the resistance circuit  220 . In still another embodiment, the path separating circuit  230 _ 1  may further include a fourth signal transmitting path to provide another path for the current to flow out of the resistance circuit  220 . In other words, the path separating circuit  230 _ 1  of the embodiment of the disclosure at least includes the first signal transmitting path SP 1  and the second signal transmitting path SP 2 , and those skilled in the art may add other current paths according to an actual requirement. 
     In the present embodiment, the first signal transmitting path SP 1  and the second signal transmitting path SP 2  are connected in parallel. However, the disclosure is not limited thereto. In other embodiments, the first signal transmitting path SP 1  and the second signal transmitting path SP 2  may not be connected in parallel with each other. For example, as shown in  FIG. 8 , an output terminal of the second diode D 2  of the second signal transmitting path SP 2  may not be electrically connected to an input terminal of the first diode D 1 , but is connected to the ground or other circuit. 
     In this way, through the measuring apparatus  200  of the embodiment of  FIG. 2  and the path separating circuit  230 _ 1  of the embodiment of  FIG. 3 , charging and discharging paths of the control terminal of the transistor switch Q 1  can be separated, so as to simultaneously achieve fast switch switching and avoid oscillation of the current flowing through the resistor R 1 . 
       FIG. 4  is a block circuit diagram of a measuring apparatus for solar cell according to an embodiment of the disclosure. Referring to  FIG. 2  to  FIG. 4 , the path separating circuit  230 _ 1  to  230 _ 16  of the embodiment of  FIG. 2  are all implemented by the path separating circuit  230 _ 1  of the embodiment of  FIG. 3 , and the measuring apparatus  200  is electrically connected to a data acquisition circuit DAQC and a processing circuit PROC to implement the measuring apparatus  400  of  FIG. 4 . In an embodiment, the data acquisition circuit DAQC is configured to obtain a plurality of characteristic curves of the solar cell SC, and the processing circuit PROC is configured to fit the plurality of characteristic curves obtained by the data acquisition circuit DAQC into an optimal characteristic curve. 
     In the present embodiment, the data acquisition circuit DAQC is electrically connected to the solar cell SC and the resistance circuit  220 , and the processing circuit PROC is coupled to the data acquisition circuit DAQC. In the present embodiment, during the measurement, a power source is further connected to the resistance circuit  220  and the solar cell SC. When the controller  210  outputs the control signals CS 1  to CS 16  of different combinations, the resistance circuit  220  respectively determines whether to provide the measurement loadings through the resistors R 1  to R 16  according to the control signals CS 1  to CS 16 . According to one measurement loading, the data acquisition circuit DAQC may obtain one data point (for example, an I-V data point) corresponding to the solar cell SC. According to a plurality of incremental or decremental measurement loading, the data acquisition circuit DAQC may obtain one characteristic curve (for example, an I-V characteristic curve) of the solar cell SC. 
     For example, the controller  210  may output a set of control signals CS 1  to CS 16  with a forward-sweep bias to change the combination of the resistors R 1  to R 16  for providing the measurement loadings in a specific frequency, such that the measurement loadings of the resistance circuit  220  are progressively increased in the specific frequency. In this way, the data acquisition circuit DAQC may obtain a plurality of data points corresponding to the incremental measurement loads, so as to obtain a forward-sweep characteristic curve of the solar cell SC. 
     On the other hand, the controller  210  may output another set of control signals CS 1  to CS 16  with a backward-sweep bias to change the combination of the resistors R 1  to R 16  for providing the measurement loadings in a specific frequency, such that the measurement loadings of the resistance circuit  220  are progressively decreased in the specific frequency. In this way, the data acquisition circuit DAQC may obtain a plurality of data points corresponding to the decremental measurement loads, so as to obtain a backward-sweep characteristic curve of the solar cell SC. 
       FIG. 5  is an equivalent circuit diagram of a solar cell according to an embodiment of the disclosure. Generally, when the solar cell without an inbuilt capacitor is measured, the forward-sweep characteristic curve is almost the same to the backward-sweep characteristic curve. When the solar cell has a inbuilt capacitor C, the capacitor C is regarded to be connected in parallel in the equivalent circuit, as that shown in  FIG. 5 , where I is an output current, V is an output voltage, I ph  is a photo-converted current, R s  is a series resistance, R sh  is a shunt resistance, I d  is a dark current, and C is the inbuilt capacitance. Since those skilled in the art may learn enough instructions and recommendations for detail description of each of the parameters in the equivalent circuit of  FIG. 5  from general knowledge of the field, detail thereof is not repeated. 
     Influenced by the aforementioned inbuilt capacitance C, the forward-sweep characteristic curve of the solar cell SC is projected upward at a point close to the maximum-power-point, and the backward-sweep characteristic curve of the solar cell SC is bended downward at the point close to the maximum-power-point. In other words, due to the inbuilt capacitor, there is a great error when using the measured characteristic curve to determine the maximum-power-point. 
     Therefore, in the present embodiment, after the data acquisition circuit DAQC obtains the forward-sweep characteristic curve and the backward-sweep characteristic curve of the solar cell SC, the processing circuit PROC fits the forward-sweep characteristic curve and the backward-sweep characteristic curve into the optimal characteristic curve. 
       FIG. 6  is a flowchart illustrating a method for fitting the characteristic curves according to an embodiment of the disclosure.  FIG. 7  is a schematic diagram of an I-V characteristic curve according to an embodiment of the disclosure. The method for fitting the characteristic curves of the present embodiment is adapted to the measure apparatus  400  of  FIG. 4 , and the steps of the method for fitting the characteristic curves of the present embodiment are described below with reference of the various components of the measuring apparatus  400 . 
     Referring to  FIG. 4 ,  FIG. 6  and  FIG. 7 , in step S 610 , the processing circuit PROC obtains a plurality of I-V characteristic curves of the solar cell SC from the data acquisition circuit DAQC, and the I-V characteristic curves include a forward-sweep characteristic curve FSC and a backward-sweep characteristic curve BSC. 
     Generally, an intersection of the I-V characteristic curve and a current axis is a short circuit current, and an intersection of the I-V characteristic curve and a voltage axis is an open circuit voltage, a series resistance can be obtained according to a slope of the intersection (i.e. the open circuit voltage) of the I-V characteristic curve and the voltage axis, and a shunt resistance can be obtained according to a negative reciprocal of a slope of the intersection (i.e. the short circuit current) of the I-V characteristic curve and the current axis. 
     Therefore, the processing circuit PROC may obtain a plurality of first characteristic parameters of the forward-sweep characteristic curve FSC from the obtained forward-sweep characteristic curve FSC, where the first characteristic parameters include a series resistance Rs 1 , a shunt resistance Rsh 1 , a short circuit current Ioc 1  and an open circuit voltage Voc 1 , and the processing circuit PROC may obtain a plurality of second characteristic parameters of the backward-sweep characteristic curve BSC from the obtained backward-sweep characteristic curve BSC, where the second characteristic parameters include a series resistance Rs 2 , a shunt resistance Rsh 2 , a short circuit current Ioc 2  and an open circuit voltage Voc 2 . 
     Then, in step S 620 , the processing circuit PROC respectively determines whether the first characteristic parameters are the same to the second characteristic parameters. To be specific, the processing circuit PROC determines whether a difference between the series resistance Rs 1  and the series resistance Rs 2  is smaller than a tolerance value. If yes, the series resistance Rs 1  and the series resistance Rs 2  are regarded to be equivalent. Methods for the processing circuit PROC compares the other characteristic parameters can be deduced by analogy. It should be noted that when the characteristic parameters are compared, the tolerance values set by the processing circuit PROC can be the same or different, and those skilled in the art may adjust the tolerance values according to an actual requirement. 
     If each of the first characteristic parameters is respectively equal to each of the second characteristic parameters, it represents that an error between the forward-sweep characteristic curve FSC and the backward-sweep characteristic curve BSC is rather small or the two curves are almost the same. In this way, in step S 630 , the processing circuit PROC takes the forward-sweep characteristic curve FSC or the backward-sweep characteristic curve BSC as the optimal characteristic curve. 
     On the other hand, if the first characteristic parameters are not equal to the second characteristic parameters, a step S 640  is executed, by which the processing circuit PROC corrects the first characteristic parameters in iteration according to a diode characteristic formula, so as to obtain the optimal characteristic curve. 
     In detail, the solar cell without the inbuilt capacitor is generally equivalent to a p-n diode, and a measured current-voltage relation can be represented by a following diode characteristic formula: 
     
       
         
           
             I 
             = 
             
               
                 I 
                 
                   p 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   h 
                 
               
               - 
               
                 
                   I 
                   0 
                 
                 [ 
                 
                   
                     e 
                     
                       
                         q 
                         ⁡ 
                         
                           ( 
                           
                             V 
                             + 
                             
                               IR 
                               s 
                             
                           
                           ) 
                         
                       
                       AkT 
                     
                   
                   - 
                   1 
                 
                 ] 
               
               - 
               
                 
                   ( 
                   
                     V 
                     + 
                     
                       IR 
                       s 
                     
                   
                   ) 
                 
                 
                   R 
                   sh 
                 
               
             
           
         
       
     
     Where, I is an output current, V is an output voltage, I ph  is a photo-converted current, R s  is a series resistance, R sh  is a shunt resistance, A is a p-n interface constant, I 0  is a p-n reverse saturation current, q is a charge quantity, k is a Bozeman constant, and T is a temperature. Since those skilled in the art may learn enough instructions and recommendations for detail description of each of the parameters from general knowledge of the field, detail thereof is not repeated. 
     If the aforementioned equation is spread by using a power series, the diode characteristic formula can be presented as a following polynomial curve equation:
 
 f ( V )= a   0   +a   1   V+a   2   V   2   + . . . +a   n   V   n  
 
     Where, the output current I can be represented as a function f(V) of the output voltage V, and a 0 -a n  are coefficients of power series spreading. By using the aforementioned polynomial curve equation, the processing circuit PROC may correct the first characteristic parameters and the second characteristic parameters in iteration to obtain the optimal characteristic curve. 
     In detail, the processing circuit PROC takes a power of the polynomial curve equation to serve as a basis for correcting the first characteristic parameters and the second characteristic parameters in iteration. For example, at a first iteration, the processing circuit PROC corrects the first characteristic parameters and the second characteristic parameters according to f(V)=a 0 +a 1 V; and at a second iteration, the processing circuit PROC corrects the first characteristic parameters and the second characteristic parameters according to f(V)=a 0 +a 1 V+a 2 V 2 , and the others are deduced by analogy. Steps that the processing circuit PROC corrects the first characteristic parameters and the second characteristic parameters in iteration are described below. 
     In the present embodiment, the step S 640  of iterative correction further includes steps S 641  to S 647 . In the step S 641 , the processing circuit PROC corrects the first characteristic parameters and the second characteristic parameters according to the diode characteristic formula, so as to obtain a plurality of first corrected parameters of the forward-sweep characteristic curve and a plurality of second corrected parameters of the backward-sweep characteristic curve, where the first corrected parameters correspond to a first simulation curve, and the second corrected parameters correspond to a second simulation curve. 
     In detail, the processing circuit PROC may correct the first characteristic parameters by using the spread diode characteristic formula according to the method described in the preceding paragraph, and simulates the first simulation curve. According to the method described in the preceding paragraph, the processing circuit PROC may obtain a plurality of the first corrected parameters corresponding to the first simulation curve, where the first corrected parameters at least include a series resistance Rs 1 ′ and a shunt resistance Rsh 1 ′. On the other hand, the processing circuit PROC may simulate the second simulation curve in the similar manner, and obtain a plurality of second corrected parameters, where the second corrected parameters at least include a series resistance Rs 2 ′ and a shunt resistance Rsh 2 ′. 
     Then, in step S 643 , the processing circuit PROC compares whether the first characteristic parameters are equal to the first corrected parameters, and whether the second characteristic parameters are equal to the second corrected parameters. 
     In detail, the processing circuit PROC determines whether a difference between the series resistance Rs 1  and the series resistance Rs 1 ′ is smaller than a first tolerance value. If yes, the processing circuit PROC determines that the series resistance Rs 1  is equal to the series resistance Rs 1 ′. The processing circuit PROC also determines whether a difference between the shunt resistance Rsh 1  and the shunt resistance Rsh 1 ′ is smaller than a second tolerance value. If yes, the processing circuit PROC determines that the shunt resistance Rsh 1  is equal to the shunt resistance Rsh 1 ′. 
     On the other hand, the processing circuit PROC determines whether a difference between the series resistance Rs 2  and the series resistance Rs 2 ′ is smaller than the first tolerance value. If yes, the processing circuit PROC determines that the series resistance Rs 2  is equal to the series resistance Rs 2 ′. The processing circuit PROC also determines whether a difference between the shunt resistance Rsh 2  and the shunt resistance Rsh 2 ′ is smaller than a second tolerance value. If yes, the processing circuit PROC determines that the shunt resistance Rsh 2  is equal to the shunt resistance Rsh 2 ′. 
     It should be noted that the first tolerance value and the second tolerance value can be the same or different, which is not limited by the disclosure. 
     Moreover, in the present embodiment, whether two parameters are equivalent is determined according to whether a difference between the parameters is smaller than a tolerance value. However, the detailed implementation for determining whether two parameters are equivalent is not limited by the disclosure. 
     In another embodiment, the processing circuit PROC may calculate a quotient of the series resistance Rs 1  and the series resistance Rs 1 ′, and determines whether a difference between the quotient and 1 is smaller than a third tolerance value. If yes, it is determined that the series resistance Rs 1  is equal to the series resistance Rs 1 ′. The processing circuit PROC may also calculate a quotient of the shunt resistance Rsh 1  and the shunt resistance Rsh 1 ′, and determines whether a difference between the quotient and 1 is smaller than a fourth tolerance value. If yes, it is determined that the shunt resistance Rsh 1  is equal to the shunt resistance Rsh 1 ′. 
     On the other hand, the processing circuit PROC may calculate a quotient of the series resistance Rs 2  and the series resistance Rs 2 ′, and determines whether a difference between the quotient and 1 is smaller than the third tolerance value. If yes, it is determined that the series resistance Rs 2  is equal to the series resistance Rs 2 ′. The processing circuit PROC may also calculate a quotient of the shunt resistance Rsh 2  and the shunt resistance Rsh 2 ′, and determines whether a difference between the quotient and 1 is smaller than the fourth tolerance value. If yes, it is determined that the shunt resistance Rsh 2  is equal to the shunt resistance Rsh 2 ′. 
     If the first characteristic parameters are equal to the first corrected parameters, and the second characteristic parameters are equal to the second corrected parameters, it represents that the iterative correction is completed, and a step S 645  is executed, by which the processing unit PROC takes the first simulation curve or the second simulation curve as the optimal characteristic curve. In the present embodiment, if the series resistance Rs 1  is equal to the series resistance Rs 1 ′, the shunt resistance Rsh 1  is equal to the shunt resistance Rsh 1 ′, the series resistance Rs 2  is equal to the series resistance Rs 2 ′, and the shunt resistance Rsh 2  is equal to the shunt resistance Rsh 2 ′, it represents that the iterative correction is completed. 
     On the other hand, if the first characteristic parameters are equal to the first corrected parameters, or the second characteristic parameters are equal to the second corrected parameters, a step S 647  is executed, by which the processing circuit PROC takes the first corrected parameters as the first characteristic parameters, and takes the second corrected parameters as the second characteristic parameters. Then, in step S 641 , the processing unit PROC again corrects the first characteristic parameters and the second characteristic parameters according to the diode characteristic formula until the optimal characteristic curve is obtained. 
     As shown in  FIG. 7 , after the processing PROC corrects the first characteristic parameters and the second characteristic parameters in iteration, the forward-sweep characteristic curve FSC and the backward-sweep characteristic curve BSC are fit into an optimal characteristic curve OPC. In this way, the accurate I-V characteristic curve (i.e. the optimal characteristic curve OPC) of the solar cell SC is obtained, so as to accurately determine a position of the maximum-power-point. 
     In summary, the measuring apparatus for solar cell of the disclosure outputs the control signal to the resistance circuit by using the signal transmitting control circuit, and separates a charging and discharging path of the control signal by using the path separating circuit during the process of transmitting the control signal. In this way, the measurement loadings provided by the resistance circuit can be quickly switched, and an oscillation effect caused by factors of an inbuilt capacitance of the component, etc., during the switching operation is avoided, so as to quickly and accurately capture the characteristic curve of the solar cell. On the other hand, when the measured solar cell has the inbuilt capacitance to cause a measurement error, the measuring apparatus for the solar cell of the disclosure may fit the forward-sweep characteristic curve and the backward-sweep characteristic curve into the optical characteristic curve by using the iteration correction method. In this way, the I-V characteristic curve not containing the capacitance effect is obtained through correction, and the position of the maximum-power-point is obtained, so as to perform more accurate analysis to the measured solar cell. 
     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the disclosure without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the disclosure cover modifications and variations of this disclosure provided they fall within the scope of the following claims and their equivalents.