Patent Publication Number: US-2012043951-A1

Title: Switching Regulator and Constant On-time Module

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a switching regulator and constant on-time module, and more particularly, to a switching regulator and constant on-time module capable of adjusting off-time of a control signal according to a resistance of a load. 
     2. Description of the Prior Art 
     Power supply devices play an essential role in modern information technology. Among all the power supply devices, DC-DC switching regulators are very popular and are widely used for providing regulated DC power sources to electronic components. Please refer to  FIG. 1 , which is a schematic diagram of a DC-DC switching regulator  10  with a constant on-time structure in the prior art. The DC-DC switching regulator  10  provides a steady output voltage Vout 1  to a load Ld 1  to generate a load current ILd 1 , and includes an upper gate switch  100 , a lower gate switch  102 , a constant time trigger circuit  104 , a comparator  106 , an inductor L 1 , a capacitor C 1 , and an inverter INV 1 . The upper gate switch  100 , the lower gate switch  102 , the inductor L 1  and the capacitor C 1  can be seen as a power stage circuit  108 , for outputting the output voltage Vout 1  to the load Ld 1  according to a control signal Con. The constant time trigger circuit  104  can output the control signal Con with each on-time of a constant on-time period Ton to control operations of the upper gate switch  100  and the lower gate switch  102 . 
     In short, when the output voltage Vout 1  is less than a reference voltage Vref 1 , the comparator  106  outputs a comparing result Com, to control the constant time trigger circuit  104  to trigger the outputted control signal Con with an on-time of the on-time period Ton, such that the DC-DC switching regulator  10  can turn on the upper gate switch  100  and turn off the lower gate switch  102  during the on-time period Ton. Thus, an external voltage source Vin 1  can deliver electrical energy to the inductor L 1  via the upper gate switch  100  to output a charging current IL to charge the capacitor C 1 , such that the output voltage Vout 1 , i.e. a voltage across the capacitor C 1 , is outputted to the load Ld 1  increases. When the output voltage Vout 1  is greater than the reference voltage Vref 1 , the upper gate switch  100  is turned off and the lower gate switch  102  is turned on, such that the output voltage Vout 1  starts falling. In other words, when the upper gate switch  100  is turned off, the output voltage Vout 1  of the DC-DC switching regulator  10  starts falling, and then the upper gate switch  100  is turned on again until the output voltage Vout 1  is less than the reference voltage Vref 1 . As a result, the DC-DC switching regulator  10  can adjust the electrical energy delivered to the load Ld 1  by controlling operations of the upper gate switch  100  to provide the steady output voltage Vout 1 . 
     Besides, when resistance of the load Ld 1  varies, a frequency of the control signal Con being triggered with an on-time of the on-time period Ton varies as well, such that the output voltage Vout 1  can be steady. In other words, every time the control signal Con is triggered with an on-time of the on-time period Ton, off-time of the control signal Con is variable, such that the frequency of the control signal Con being triggered with an on-time of the on-time period Ton varies as the resistance of the load Ld 1  varies. However, in the prior art, although the frequency of the control signal Con being triggered with an on-time of the on-time period Ton varies as the resistance of the load Ld 1  varies, the response is too slow to provide the steady output voltage Vout 1 . 
     Please refer to  FIG. 2A  to  FIG. 2F .  FIG. 2A  to  FIG. 2C  are schematic diagrams of signals of the DC-DC switching regulator  10  shown in  FIG. 1  when the load current ILd 1  decreases, i.e. light load or the resistance of the Load Ld 1  increases, and  FIG. 2D  to  FIG. 2F  are schematic diagrams of signals of the DC-DC switching regulator  10  shown in  FIG. 1  when the load current ILd 1  increases, i.e. heavy load or the resistance of the Load Ld 1  decreases. When the resistance of the load Ld 1  remains constant, every time the output voltage Vout 1  is less than the reference voltage Vref 1 , the constant time trigger circuit  104  triggers the control signal Con with an on-time of the on-time period Ton. As a result, the control signal Con can be triggered with an on-time of the on-time period Ton at a constant frequency, to provide the steady output voltage Vout 1 . 
     However, as shown in  FIG. 2A  to  FIG. 2C , when the load current ILd 1  decreases, the output voltage Vout 1  increases due to decrease of the resistance load current ILd 1 , such that the output voltage Vout 1  stays greater than the reference voltage Vref 1 , and thus the comparing result Com stops the constant time trigger circuit  104  to trigger the control signal Con with an on-time of the constant on-time period Ton, such that the output voltage Vout 1  falls to an original steady level. However, in a worst case, i.e. the load current ILd 1  decreases just when an on-time of the constant on-time period Ton is triggered, the output voltage Vout 1  increases due to decrease of the load current ILd 1  as well as the triggered on-time of the on-time period Ton, such that the output voltage Vout 1  overshoots, and cannot fall to the original steady level quickly. 
     On the other hand, as shown in  FIG. 2D  to  FIG. 2F , when the load current ILd 1  increases, the output voltage Vout 1  decreases due to increase of the load current ILd 1 , such that the output voltage Vout 1  stays lower than the reference voltage Vref 1 , and thus the comparing result Com keeps indicating the constant time trigger circuit  104  to trigger the control signal Con with an on-time of the on-time period Ton, such that the output voltage Vout 1  rises to an original steady level. Since the lower gate switch  102  is required to be turned on to detect overcurrent, every time the control signal Con is triggered with an on-time of the on-time period Ton, an interval of a minimum off-time Tmoff is required in between. However, as shown in  FIG. 2D  to  FIG. 2F , although a frequency of triggering the control signal Con with an on-time of the on-time period Ton increases as the load current ILd 1  increases, the output voltage Vout 1  can not rise to the original steady level quickly. 
     In other words, the frequency of the control signal Con being triggered with an on-time of the on-time period Ton can be adjusted when the load current ILd 1  varies, such that the steady output voltage Vout 1  is provided. However, the response to variation of the load current ILd 1  is too slow to provide the steady output voltage Vout 1 . Thus, there is a need for improvement of the prior art. 
     SUMMARY OF THE INVENTION 
     It is therefore an objective of the present invention to provide a switching regulator and constant on-time module. 
     The present invention discloses a switching regulator with a constant on-time structure. The switching regulator includes a power stage circuit, for outputting an output voltage to a load according to a control signal; and a constant on-time module, coupled to the power stage circuit, for adjusting off-time of the control signal according to a resistance of the load. 
     The present invention further discloses a constant on-time module, for adjusting off-time of a control signal according to a resistance of a load. The constant on-time module includes a pulse width modulation (PWM) comparator, for outputting a comparing result according to an output voltage and a reference voltage; a on-time generator, for generating an on-time period according to an input voltage and a comparing voltage; and an off-time adjusting device, for adjusting and outputting off-time of the control signal according to the comparing result, the on-time period and a minimum off-time. 
     These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a schematic diagram of a DC-DC switching regulator with a constant on-time structure in the prior art. 
         FIG. 2A  to  FIG. 2C  are schematic diagrams of signals of the DC-DC switching regulator shown in  FIG. 1  when a load current decreases. 
         FIG. 2D  to  FIG. 2F  are schematic diagrams of signals of the DC-DC switching regulator shown in  FIG. 1  when a load current increases. 
         FIG. 3  is a schematic diagram of a DC-DC switching regulator with constant on-time structure according to an embodiment of the present invention. 
         FIG. 4  is a schematic diagram of the constant on-time module shown in  FIG. 3 . 
         FIG. 5A  is a schematic diagram of a reference voltage adjustor shown in  FIG. 4 . 
         FIG. 5B  is a schematic diagram of a comparing voltage adjustor shown in  FIG. 4 . 
         FIG. 5C  is a schematic diagram of an on-time generator shown in  FIG. 4 . 
         FIG. 6A  to  FIG. 6C  are schematic diagrams of signals of the DC-DC switching regulator shown in  FIG. 3  when a load current increases. 
         FIG. 6D  to  FIG. 6E  are schematic diagrams of signals of the DC-DC switching regulator shown in  FIG. 3  optionally including a comparing voltage adjustor shown in  FIG. 4  when a load current increases. 
         FIG. 7  is a schematic diagram of an off-time adjusting device shown in  FIG. 4  including a threshold-low comparator circuit. 
         FIG. 8A  to  FIG. 8C  are schematic diagrams of signals of the DC-DC switching regulator shown in  FIG. 3  optionally including the threshold-low comparator circuit shown in  FIG. 7  when a resistance of a load increases. 
     
    
    
     DETAILED DESCRIPTION 
     Please refer to  FIG. 3 , which is a schematic diagram of a DC-DC switching regulator  30  with constant on-time structure according to an embodiment of the present invention. The structure and operating principles of the DC-DC switching regulator  30  are similar to those of the DC-DC switching regulator  10 , such that elements and signals with similar functions are denoted with the same symbols for simplicity. Differences between the DC-DC switching regulator  30  and the DC-DC switching regulator  10  are that the DC-DC switching regulator  30  includes a constant on-time (COT) module  304  to replace the constant time trigger circuit  104  and the comparator  106  of the DC-DC switching regulator  10 . The constant on-time module  304  adjusts off-time of the control signal Con according to the load current of ILd 1  of the load Ld 1 , i.e. the resistance of the load Ld 1 . 
     Pease refer to  FIG. 4 , which is a schematic diagram of the constant on-time module  304  shown in  FIG. 3 . The constant on-time module  304  includes a reference voltage adjustor  400 , a pulse width modulation (PWM) comparator  402 , a comparing voltage adjustor  404 , an on-time generator  406  and an off-time adjusting device  408 . The reference voltage adjustor  400  reduces a reference voltage Vref 3  when the output voltage Vout 1  rises and increases the reference voltage Vref 3  when the output voltage Vout 1  falls. The PWM comparator  402  outputs a comparing result Com 4  according to the output voltage Vout 1  and the reference voltage Vref 3 . The comparing voltage adjustor  404  adjusts and outputs a comparing voltage Vcom according to the comparing result Com 4  and a supply voltage Vs. The on-time generator  406  generates an on-time period Ton 4  according to an input voltage VIN and the comparing voltage Vcom, such that the off-time adjusting device  408  adjusts and outputs off-time of the control signal Con. The off-time adjusting device  408  includes an AND gate  416  and a minimum off-time inserter  414 . The minimum off-time inserter  414  inserts the minimum off-time Tmoff in the control signal Con to avoid overcurrent. 
     In short, when the load current ILd 1  increases, i.e. heavy load or the resistance of the Load Ld 1  decreases, since the comparing result Com 4  stays at a high level, the comparing voltage adjustor  404  adjusts the comparing voltage Vcom according to the comparing result Com 4  and thus the on-time generator  406  outputs the longer on-time period Ton 4 . Therefore, the off-time adjusting device  408  can keep triggering the control signal Con with an on-time of the longer on-time period Ton 4  and an interval of the minimum off-time Tmoff in between. As a result, the on-time period Ton 4  increases as the load current ILd 1  increases, so as to reduce off-time of the control signal Con, such that the output voltage Vout 1  can rise to an original steady level quickly. 
     In detail, please refer to  FIG. 5A  to  FIG. 5C .  FIG. 5A  is a schematic diagram of the reference voltage adjustor  400  shown in  FIG. 4 ,  FIG. 5B  is a schematic diagram of the comparing voltage adjustor  404  shown in  FIG. 4 , and  FIG. 5C  is a schematic diagram of the on-time generator  406  shown in  FIG. 4 . As shown in  FIG. 5A , differences between the PWM comparator  402  and the comparator  106  are that the reference voltage adjustor  400  can adjust the reference voltage Vref 3  according to the output voltage Vout 1 , such that the reference voltage Vref 3  decreases when the output voltage Vout 1  rises and increases when the output voltage Vout 1  falls. Thus, noise margin between the output voltage Vout 1  and the reference voltage Vref 3  is widened, such that the PWM comparator  402  can perform comparing operations more steadily and correctly. 
     As shown in  FIG. 5B , the comparing voltage adjustor  404  includes a logic circuit  410  and a comparing voltage generator  412 . The logic circuit  410  outputs a trigger signal Ena according to the comparing result Com 4 , and the comparing voltage generator  412  adjusts resistance of a resistor  508  according to the trigger signal Ena, to generate the comparing voltage Vcom. 
     As shown in  FIG. 5C , the on-time generator  406  includes a current source  502 , a capacitor  504 , a switch  506  and a comparator  510 . The current source  502  receives the input voltage VIN to charge the capacitor  504 , so as to generate a capacitor voltage Vc to the comparator  510 . Thus, the comparator  510  can generate the on-time period Ton 4  according to the capacitor voltage Vc and the comparing voltage Vcom. Noticeably, every time after triggering the control signal Con with an on-time of the on-time period Ton 4 , the off-time adjusting device  408  sends a reset signal Reset to turn on the switch  506  to discharge the capacitor voltage Vc to 0V. Therefore, the on-time period Ton 4  outputted by the on-time generator  406  equals a period during which the current source  502  charges the capacitor voltage Vc from 0V to the comparing voltage Vcom. In such a situation, when the load current ILd 1  increases, the comparing result Com 4  stays at a high level, and thus the logic circuit  410  increases the resistance of the resistor  508  via the trigger signal Ena when a period during which the comparing result Com 4  stays at the high level is greater than the original on-time period Ton 4 , for ensuring the load current ILd 1  really increases, so as to increase the comparing voltage Vcom as well as the on-time period Ton 4 . As a result, the off-time adjusting device  408  can keep triggering the control signal Con with an on-time of the longer on-time period Ton 4  and an interval of the minimum off-time Tmoff in between, to reduce off-time of the control signal Con, so as to increase the output voltage Vout 1  to the original steady level quickly. 
     Please refer to  FIG. 6A  to  FIG. 6E .  FIG. 6A  to  FIG. 6C  are schematic diagrams of signals of the DC-DC switching regulator  30  shown in  FIG. 3  when the load current ILd 1  increases, and  FIG. 6D  to  FIG. 6E  are schematic diagrams of signals of the DC-DC switching regulator  30  shown in  FIG. 3  optionally including the comparing voltage adjustor  404  shown in  FIG. 4  when the load current ILd 1  increases, wherein solid lines indicate the comparing voltage adjustor  404  is included, and dotted lines indicate the comparing voltage adjustor  404  is not included, where operations are similar to those of the constant on-time period Ton in the prior art. As shown in  FIG. 6A  to  FIG. 6E , when the load current ILd 1  increases, since the output voltage Vout 1  decreases, the reference voltage Vref 3  increases, such that the comparing result Com 4  stays at a high level. In such a situation, the trigger signal Ena is switched to a high level to increase the comparing voltage Vcom, so as to increase the on-time period Ton 4 . Thus, the off-time adjusting device  408  can trigger the control signal Con with an on-time of the longer on-time period Ton 4 , and an interval of the minimum off-time Tmoff is in between to reduce off-time of the control signal Con, so as to increase the output voltage Vout 1  to the original steady level quickly. Compared with the constant on-time period Ton 4  shown by the dotted lines, the DC-DC switching regulator  30  including the comparing voltage adjustor  404  can increase the output voltage Vout 1  by 30 mV from a lowest level, so as to increase the output voltage Vout 1  to the original steady level quickly, and reduce the charging current IL to avoid overcurrent (e.g. 15A). 
     On the other hand, as shown in  FIG. 7 , the off-time adjusting device  408  can further include a threshold-low comparator circuit  700 , for controlling the control signal Con to only include off-time via a shutdown signal SD when the reference voltage Vref 3  is less than a threshold-low voltage VCL (e.g. 0.9V), to reduce the output voltage Vout 1  to the original steady level quickly when the load current ILd 1  decreases, i.e. light load or the resistance of the Load Ld 1  increases. In detail, please refer to  FIG. 8A  to  FIG. 8C , which are schematic diagrams of signals of the DC-DC switching regulator  30  shown in  FIG. 3  optionally including the threshold-low comparator circuit  700  shown in  FIG. 7  when the load current ILd 1  increases, wherein a solid line shown in  FIG. 8C  indicates the threshold-low comparator circuit  700  is included, and a dotted line indicates the threshold-low comparator circuit  700  is not included, where operations are similar to those of the constant on-time period Ton in the prior art. When the load current ILd 1  decreases, the output voltage Vout 1  increases due to decrease of the load current ILd 1 , such that the reference voltage adjustor  400  adjusts the reference voltage Vref 3  to decrease. In such a situation, when the reference voltage Vref 3  is less than the threshold-low voltage VCL, the threshold-low comparator circuit  700  switches the shutdown signal SD to a high level, to control the control signal Con to only include off-time, so as to reduce the output voltage Vout 1  to the original steady level quickly. In the prior art, the control signal Con is required to be triggered with an on-time of the whole on-time period Ton, such that the output voltage Vout 1  may overshoot. In comparison, the threshold-low comparator circuit  700  can immediately control the control signal Con to only include off-time when the load current ILd 1  decreases, so as to reduce the output voltage Vout 1  to the original steady level quickly. As a result, as shown in  FIG. 8C , the DC-DC switching regulator  30  including the threshold-low comparator circuit  700  can reduce the output voltage Vout 1  by 37 mV from a highest level, so as to reduce the output voltage Vout 1  to the original steady level quickly. 
     Noticeably, the spirit of the present invention is that the constant on-time module  304  can adjust off-time of the control signal Con according to, the load current ILd 1 , i.e. the resistance of the load Ld 1 . That is, the constant on-time module  304  increases the on-time period Ton 4  to reduce off-time of the control signal Con when the load current ILd 1  increases while immediately controlling the control signal Con to only include off-time when the load current ILd 1  decreases, such that the output voltage Vout 1  can recover to the original steady level quickly when the load current ILd 1  varies. Those skilled in the art should make modifications or alterations according to the spirit of the present invention. For example, the comparing voltage adjustor  404  is not limited to the above structure as long as the comparing voltage adjustor  404  can increase the on-time period Ton 4  to reduce off-time of the control signal Con if a period during which the output voltage Vout 1  is greater than the reference voltage Vref 3  exceeds the original on-time period Ton 4 . The threshold-low comparator circuit  700  is also not limited to the above structure as long as the threshold-low comparator circuit  700  can control the control signal Con to only include off-time when the reference voltage Vref 3  is less than the threshold-low voltage VCL. Moreover, a method for the trigger signal Ena to increase the resistance of the resistor  508  is to utilize the trigger signal Ena to control conduction of a transistor, to decide whether a portion of the resistor  508  is connected in series to increase resistance. 
     In addition, the structure of the comparing voltage adjustor  404  is not shown in  FIG. 7 , which means the constant on-time module  304  can reduce off-time of the control signal Con and increase off-time of the control signal Con via the comparing voltage adjustor  404  and the threshold-low comparator circuit  700 , respectively. Those skilled in the art can apply the comparing voltage adjustor  404  and the threshold-low comparator circuit  700  as a whole or separately according to practical requirements to stabilize the output voltage Vout 1 . Noticeably, when the load current ILd 1  increases and the output voltage Vout 1  falls, and the on-time period Ton 4  is lengthened too much, if the reference voltage Vref 3  falls too fast, the comparing result Com 4  is switched to a low level, and stops triggering the control signal Con with on-time. At this moment, the output voltage Vout 1  keeps pumping the load Ld 1  and falls again, which causes the reference voltage Vref 3  to rise, such that the comparing result Com 4  is switched to a high level, and the control signal Con is triggered with an on-time of the longer on-time period Ton 4  again. The above operations repeat until the output voltage Vout 1  falls to a lowest level due to increase of the load current ILd 1 , causing the ripple of the output voltage Vout 1  to be too large. To solve the above problem, the on-time period Ton 4  is required to be less than a specific value, which avoids the reference voltage Vref 3  falling too fast, and avoids the charging current IL being too large. Moreover, when the power stage circuit  108  starts operating from an initial state, the output voltage Vout 1  is supposed to rise from a low level to the steady level (e.g. 3V to 5V). At this moment, the comparing voltage adjustor  404  does not operate to avoid the output voltage Vout 1  from overshooting and causing too much input energy. 
     In the prior art, when the load current ILd 1  decreases, the triggered on-time of the control signal Con is still equal to the constant on-time period Ton, such that the output voltage Vout 1  overshoots and can not reduce to the original steady level quickly; when the load current ILd 1  increases, although the frequency of triggering the control signal Con with an on-time of the on-time period Ton increases, the output voltage Vout 1  still can not increase to the original steady level quickly. In comparison, the present invention can increase the on-time period Ton 4  to reduce off-time of the control signal Con when the load current ILd 1  increases, and immediately controls the control signal Con to only include off-time when the load current ILd 1  decreases, such that the output voltage Vout 1  can recover to the original steady level quickly when the load current ILd 1  varies. 
     To sum up, the present invention can adjusts off-time of the control signal according to the resistance of the load, such that the output voltage can recover to the original steady level quickly. 
     Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.