Patent Publication Number: US-6704554-B1

Title: Frequency modulation receiver in particular for an RDS application

Description:
The present invention concerns the field of frequency modulation receivers (hereinafter “FM receivers”) able to receive a signal at a high frequency from a transmitter, particularly for a Radio Data System (RDS) application. 
     With reference to FIG. 1 of the present description, French Patent No. 2705,176 discloses a conventional FM receiver  1  which includes an antenna  2 , a high frequency stage (RF)  3 , a mixer  4 , a local oscillator  5 , an intermediate frequency (IF) filter  6 , an amplifier/limiter  7 , an FM demodulation stage  8  and an automatic frequency control (AFC) stage  9 . 
     Antenna  2  receives a signal having a frequency comprised within the FM transmission band (i.e. between 88 and 108 MHz), and supplies the corresponding electric signal to RF stage  3 . 
     RF stage  3  is tuned onto the carrier frequency fc of a predetermined transmitter so as to provide, in response to the electric signal originating from the antenna, an amplified signal having a frequency comprised within a frequency band centred on frequency fc. 
     Mixer  4  receives the signal originating from RF stage  3 , as well as a signal originating from local oscillator  5 , multiplies these signals, and supplies to IF filter  6  a signal modulated at an intermediate frequency f IF , the latter being generally chosen to be equal to approximately 70 kHz. 
     IF filter  6  is arranged to receive the signal modulated at frequency f IF  and, in response to provide a signal located within a frequency band centred around intermediate frequency F IF . 
     Amplifier/limiter  7  receives the signal originating from IF filter  6 , limits its amplitude to eliminate any amplitude modulation (AM) component and, in response, provides this amplified/limited signal. 
     FM demodulation stage  8  demodulates the signal originating from amplifier/limiter  7 , and provides the demodulated signal to an audio amplifier (not shown in FIG.  1 ). 
     AFC stage  9  allows fine tuning to be performed between frequency f LO  of the signal from local oscillator  5  as a function of the continuous output of demodulator  8  in order to keep intermediate frequency f IF  constant. 
     One problem of an FM radio receiver such as that shown in FIG. 1 consists in the fact that considerable distortion can appear by aliasing, when the modulation frequency (i.e. that of the message signal) is greater than half of intermediate frequency f IF . 
     The problem of aliasing distortion arises particularly in transmission systems using frequency division multiplexing, as is the case in Europe with FM broadcasting, in particular for an RDS application. Indeed, the effect of such distortion can be that decoding the RDS data becomes impossible. 
     FIG. 2 of the present description shows the frequency spectral distribution of the signals present in FM receiver  1 , during an RDS application. Audio data are modulated in stereophony on a sub-carrier of 38 kHz, while other data corresponding to the RDS data are present in the form of low amplitude signals modulated on a sub-carrier of 57 kHz by phase shift (PSK modulation). In order to allow the RDS data to be decoded, and with reference once more to FIG. 1, the output bandwidth of FM demodulation stage  8  would have to be at least 60 kHz. Indeed, assuming that the intermediate frequency f IF  used is of the order of 70 kHz, the audio data and the RDS data can be mixed by aliasing. 
     A first conventional solution to the problem of frequency aliasing consists in using a higher frequency f IF . U.S. Pat. No. 4,885,802 discloses an FM receiver implementing such a solution. 
     One drawback of such an FM receiver lies in the fact that it requires the use of additional means to filter the response of the image frequency of the RF signal, which also increases the electric power consumption. 
     Another drawback of such an FM receiver lies in the fact that the maximum intermediate frequency which can be used is imposed by the image frequency rejection and by the spacing of the channels or transmitters in the FM broadcasting band. Consequently, the audio bandwidth of the demodulated signals cannot thus simply be improved by increasing intermediate frequency f IF  of the FM receiver. 
     A second conventional solution to the problem of frequency aliasing consists in providing a signal having a higher frequency than intermediate frequency f IF  to the demodulation stage. 
     With reference to FIG. 3 of the present description, U.S. Pat. No. 5,483,695 discloses an FM receiver implementing such a solution. It will be noted in FIG. 3 that similar objects to those in FIG. 1 have been designated by the same references. FM receiver  20  further includes a signal generator circuit  24  able to generate n signals at intermediate frequency f IF , and a multiplier circuit  28  able to multiplier between them the n signals to provide a signal modulated at a frequency equal to n times intermediate frequency f IF . 
     One drawback of FM receiver  20  lies in the fact that it is necessary to generate signals in phase quadrature and having a frequency equal to intermediate frequency f IF , which considerably increases the electric power consumption. 
     One object of the present invention is to provide an FM radio receiver for an RDS application which overcomes the aliasing problem, in particular an FM radio receiver able to extract the RDS data present in a radio-frequency signal received by said receiver. 
     Another object of the present invention is to provide an FM radio receiver answering the usual criteria in the semiconductor industry as to low electric power consumption. 
     Another object of the present invention is to provide an FM radio receiver in the form of an integrated circuit answering the usual criteria in the semiconductor industry as to rationality and surface occupation. 
     These objects, in addition to others, are achieved by the FM receiver according to claim 1. 
     One advantage of the arrangement of the locked loop of such a receiver is that intermediate frequency f IF  is enslaved to a predetermined value so that the aliasing phenomenon does not prevent decoding of the RDS data present in a radio-frequency signal received by the receiver. 
     Another advantage of such an arrangement is that the receiver may operate with low intermediate frequencies f IF , without it being necessary to use high frequency values, or frequency multiplication. This results in low electric power consumption, which allows an FM receiver of this type to be used for an RDS application, for example. 
    
    
     These objects, features and advantages of the present invention in addition to others, will appear more clearly upon reading the detailed description of a preferred embodiment of the invention, given solely by way of example, with reference to the annexed drawings, in which: 
     FIG. 1, which has already been cited, shows a first conventional FM receiver; 
     FIG. 2, which has already been cited, shows the spectral frequency distribution of the signals present in the FM receiver of FIG. 1, during an RDS application; 
     FIG. 3, which has already been cited, shows a second conventional FM receiver; 
     FIG. 4 shows a preferred embodiment of an FM receiver according to the present invention; 
     FIG. 5 shows in detail a circuit of the FM receiver of FIG. 4; 
     FIG. 6 shows in detail another circuit of the FM receiver of FIG. 4; 
     FIGS. 7A to  7 C show the spectral frequency distributions of signals present in the FM receiver of FIG. 4, during an RDS application, for three different predetermined values respectively; and 
     FIG. 8 shows an improvement of the circuit of FIG.  6 . 
    
    
     With reference to FIG. 4, a preferred embodiment of an FM receiver according to the present invention will be described. It will be noted in FIG. 4 that the reference  29  designates such a receiver, and that similar objects to those of FIG. 1 have been designated by the same references. 
     FM receiver  29  includes an antenna  2 , a local oscillator  5 , a mixer unit  30 , a demodulation stage  8  and an automatic frequency control (AFC) stage  36 . It will be noted that a receiver of this type is able to be made in a device requiring the supply of RDS data, for example in a timepiece such as a wristwatch. 
     Antenna  2  includes an output terminal  2   a  connected to RF stage  3 . Antenna  2  is arranged to be able to receive a signal having a frequency comprised within the FM transmission band (i.e. between 88 and 108 MHz) and, in response, to supply an electrical signal S 1  representative of the received signal via terminal  2   a.    
     Local oscillator  5  includes two input terminals  5   a  and  5   b  and an output terminal  5   c  connected to mixer unit  30 . Local oscillator  5  is arranged to provide an electric signal S 3 , as is described in more detail hereinafter. 
     Mixer unit  30  includes an input terminal  30   a  connected to output terminal  3   b  of RF stage  3 , an input terminal  30   b  connected to output terminal  5   c  of local oscillator  5 , and an output terminal  30   c  connected to demodulation stage  8 . Mixer unit  30  is arranged to supply, in response to signals S 2  and S 3 , an electric signal S 6  at an intermediate frequency f IF . 
     Preferably, mixer unit  30  is made by connecting in series a mixer  4 , an IF filter  6  and an amplifier/limiter  7 , as shown in FIG.  5 . 
     Mixer  4  includes two input terminals  4   a  and  4   b  connected to the respective terminals  30   a  and  30   b  of mixer unit  30 , and an output terminal  4   c  connected to IF filter  6 . Mixer  4  is arranged to be able to: receive, via terminal  4   a , signal S 2 , and via terminal  4   b ; electric signal S 3 ; multiply signals S 2  and S 3  by each other; and supply, via terminal  4   c , an electric signal S 4  so that the latter is modulated at intermediate frequency f IF . By way of example, intermediate frequency f IF  is selected to be equal to approximately 70 kHz. 
     IF filter  6  includes an input terminal  6   a  connected to output terminal  4   c  of mixer  4 , and an output terminal  6   b  connected to a amplifier/limiter  7 . IF filter  6  is arranged to be able to receive, via terminal  6   a , signal S 4  and, in response, to supply an electric signal S 5  located within a frequency band centred around intermediate frequency f IF . 
     Amplifier/limiter  7  includes an input terminal  7   a  connected to output terminal  6   b  of IF filter  6 , and an output terminal  7   b  connected to output terminal  30   c  of mixer unit  30 . Amplifier/limiter  7  is arranged to be able to receive, via terminal  7   a , signal S 5 , limit the amplitude of this signal to eliminate any AM component therefrom and, in response, to supply signal S 6  via terminal  7   b.    
     With reference once more to FIG. 4, FM demodulation stage  8  includes an input terminal  8   a  connected to output terminal  7   b  of amplifier/limiter  7 , and an output terminal  8   b  connected to an audio amplifier (not shown in FIG.  4 ). FM demodulation stage  8  is arranged to be able to receive, via terminal  8   a , signal S 6 , demodulate this signal and, in response, supply an electric signal S 7  representing demodulated signal S 6 . 
     It is to be noted that an embodiment of demodulation stage  8  is disclosed in U.S. Pat. No. 5,808,510. 
     AFC stage  36  includes an input terminal  36   a  connected to output terminal  7   b  of amplifier/limiter  7 , and an output terminal  36   c  connected to input terminal  5   b  of local oscillator  5 . AFC stage  36  is arranged to allow fine tuning to be performed between frequency f LO  of signal S 3  of local oscillator  5 , in order to keep intermediate frequency f IF  constant, as is described in more detail hereinafter. 
     FM receiver  29  further includes a locked loop  32  arranged to enslave intermediate frequency f IF  from a pilot frequency fp. It will be recalled that such a frequency is always available in an FM multiplex signal, and allows reconstitution of the carrier which is removed in a stereophonic FM receiver. Within the scope of the present description, pilot frequency fp is present in signal S 7 , and is typically equal to 19 kHz. 
     For this purpose, locked loop  32  includes a phase locked loop (PLL) filter  34  and AFC stage  36 . 
     Filter  34  includes an input terminal  34   a  connected to output terminal  8   b  of demodulation stage  8 , and an output terminal  34   b  connected to AFC stage  36 . Filter  34  is arranged to receive, via terminal  34   a , signal S 7  and, in response, supply, via terminal  34   b , an electric signal S 8  having a substantially equal frequency to pilot frequency fp. 
     Filter  34  may be made from a phase locked loop (PLL) having a bandwidth determined so as to be able to supply the signal at pilot frequency fp and with a high signal to noise ratio (SNR). This allows a stable reference frequency to be provided, capable of performing the AFC function, without it being necessary to use additional means able to provide a reference frequency. 
     AFC stage  36  further includes an input terminal  36   b  connected to output terminal  34   b  of filter  34 . AFC stage  36  is arranged to be able to receive signal S 6  at intermediate frequency f IF  and signal S 8  at pilot frequency fp and, in response, provide an electric signal S 9  able to control local oscillator  5  (i.e. the supply of signal S 3  at frequency f LO ) so that intermediate frequency f IF  has a mean value enslaved to a predetermined value, as is described hereinafter. 
     FIG. 6 shows in detail an embodiment of AFC stage  36  which includes a first frequency divider  38 , a phase and frequency comparator  40  and a loop filter  42 . 
     Divider  38  includes an input terminal  38   a  connected to input terminal  36   a  of AFC stage  36 , and an output terminal  38   b  connected to comparator  40 . Divider  38  is arranged to be able to receive, via terminal  38   a , signal S 6  at frequency f IF  and, in response, supply, via terminal  38   b , an electric signal S 11  at a frequency equal to:f IF /N, N being an integer number. 
     Comparator  40  includes an input terminal  40   a  connected to output terminal  38   b  of divider  38 , an input terminal  40   b  connected to input terminal  36   b  of AFC stage  36 , and an output terminal  40   c  connected to filter  42 . Comparator  40  is arranged to be able to receive, via terminals  40   a  and  40   b , signal S 11  at frequency f IF /N and signal S 8  at pilot frequency fp, to compare signals S 11  and S 8  with each other and, in response, to supply, via terminal  40   c , an error signal S 12  which is proportional to the frequency difference between frequencies f IF /N and fp. 
     Filter  42  includes an input terminal  42   a  connected to output terminal  40   c  of comparator  40 , and an output terminal  42   b  connected to output terminal  36   c  of AFC stage  36 . Filter  42  is arranged to be able to receive, via terminal  42   a , signal S 12  and, in response, to supply via terminal  42   b , signal S 9  representative of the difference between frequencies f IF /N and fp. 
     Essentially, with reference to FIGS. 4 to  6 , when loop  32  is locked, intermediate frequency f IF  then has a mean value which is substantially equal to:N·fp, this value corresponding to said predetermined value which allows the signals containing the RDS data to be decoded. 
     Three cases representative of three frequency ranges in which said predetermined value can be chosen so as to allow decoding of the signals containing the RDS data, will now be described, purely by way of example. These three cases will be described with reference once more to FIG. 2, and in relation to the respective FIGS. 7A to  7 C which show the spectral distributions of the signals containing the RDS data and frequency f IF  for three different predetermined values respectively. 
     With reference to FIG. 7A, let us consider the first case wherein said predetermined value is chosen so that frequency f IF  is enslaved to 76 kHz, taking the values cited in relation to FIG.  2 . 
     With reference to FIG. 7B, let us consider the second case wherein said predetermined value is chosen so that frequency f IF  is comprised between 72 and 73.5 kHz, taking the value cited in relation to FIG.  2 . 
     With reference to FIG. 7C, let us consider the third case wherein said predetermined value is chosen so that frequency f IF  is comprised between 78.5 and 80 kHz, taking the values cited in relation to FIG.  2 . 
     Thus, in the aforementioned three cases, there is no overlap between the spectral distribution of the signals containing the RDS data and those of the audio data, so that the aliasing phenomenon does not prevent demodulation of the signals containing the RDS data. 
     It goes without saying for those skilled in the art that the above description may undergo various modifications without departing from the scope of the present invention. 
     By way of improvement, and with reference once again to FIG. 4, receiver  29  may include a high frequency (RF) stage  3 , including an input terminal  3   a  connected to output terminal  2   a  of antenna  2 , and an output terminal  3   b  connected to mixer unit  30 . RF stage  3  is arranged to be able to receive, via terminal  3   a , signal S 1  and, in response, to supply, via terminal  3   b , an amplified electric signal S 2  having a frequency comprised within a frequency band centred on a carrier frequency fc of a predetermined transmitter. 
     One advantage of such an arrangement of RF stage  3  is that it substantially increases the sensitivity of receiver  29 , so that the latter can then operate with RF signals of low amplitude. 
     Also by way of improvement, and with reference once more to FIG. 4, receiver  29  can include a frequency locked loop (FLL)  31  including an input terminal  31   a  connected to output terminal  8   b  of demodulation stage  8 , to receive signal S 7 , and an output terminal  31   b  connected to input terminal  5   a  of local oscillator  5 , to supply a signal S 10 . 
     One advantage of such an arrangement of FLL filter  31  is that the deviation of signal S 6  can be reduced. 
     Also by way of improvement, and with reference to FIG. 8, AFC stage  36  can further include a second frequency divider  44 . It is to be noted in FIG. 8 that similar objects to those of FIG. 6 have been designated by the same references. 
     As FIG. 8 shows, divider  44  includes an input terminal  44   a  connected to input terminal  36   b  of AFC stage  36 , and an output terminal  44   b  connected to input terminal  40   b  of comparator  40 . Divider  44  is arranged to be able to receive, via terminal  44   a , signal S 8  at pilot frequency fp and, in response, to supply via terminal  44   b , an electric signal S 13  at a frequency equal to: fp/M, M being an integer number. 
     Essentially, and with reference to FIGS. 4 and 8, when loop  32  is locked, intermediate frequency f IF  then has a mean value which is substantially equal to N/M·fp. 
     One advantage of such an arrangement of divider  44  is that the resolution of locked loop  32  is increased. By way of example, in the event that M=19, intermediate frequency f IF  may then be adjusted by steps of 1 kHz.