Patent Publication Number: US-2021164832-A1

Title: Device and method for measuring of a flickering frequency

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application claims the benefit of French Application No. 1913542, filed on Nov. 29, 2019, which application is hereby incorporated herein by reference. 
     TECHNICAL FIELD 
     The present disclosure relates generally to electronic devices and methods, and more particularly to devices and methods suitable for measuring the frequency of a signal. The present disclosure more specifically applies to a method and device configured to measure the frequency of a flicker of a light source. 
     BACKGROUND 
     Unlike natural light, most devices producing artificial light do not emit this light continuously, but rather alternatingly, for example periodically. The radiation of a light source therefore has a succession of variable light intensity states, called flicker. 
     For certain technical applications, it may be useful to measure the frequency of this flicker. This frequency can be useful in the case of image captures or a video. 
     It would be desirable to be able to improve, at least in part, certain aspects of devices suitable for measuring a frequency of a flicker of a light source. 
     SUMMARY 
     There is a need for devices suitable for measuring a frequency of a flicker of a light source with a better performance. 
     There is a need for devices suitable for measuring a frequency of a flicker of a light source more quickly. 
     One embodiment addresses all or some of the drawbacks of the known devices suitable for measuring a frequency of a flicker of a light source. 
     One embodiment provides a device configured to measure a frequency of a flicker of a light source with a better performance. 
     One embodiment provides a device configured to measure a frequency of a flicker of a light source more quickly. 
     One embodiment provides a device for measuring a flicker frequency of a light source configured to implement at least one phase lock loop. 
     According to one embodiment, the device comprises at least one processor and at least one flicker detector of the light source. 
     According to one embodiment, the processor and the flicker detector exchange data by means of a data bus. 
     According to one embodiment, the data bus is a bus of type I2C. 
     According to one embodiment, the processor is configured to implement an algorithm of the at least one phase lock loop. 
     According to one embodiment, the processor is configured to implement at least two algorithms of phase lock loops. 
     According to one embodiment, the processor is further configured to implement a spectral analysis using a Fourier transform function. 
     According to one embodiment, the spectral analysis using a Fourier transform function is suitable for configuring an algorithm of the at least one phase lock loop. 
     According to one embodiment, the flicker detector comprises a component configured to implement the at least one phase lock loop. 
     According to one embodiment, the component is a processor configured to implement an algorithm of the at least one phase lock loop. 
     According to one embodiment, the component is configured to implement the at least one phase lock loop physically. 
     Another embodiment provides a method for measuring a flicker frequency of a light source using a device previously described. 
     According to one embodiment, the method uses an algorithm of a phase lock loop. 
     According to one embodiment, the method uses a circuit implementing a phase lock loop. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The foregoing features and advantages, as well as others, will be described in detail in the following description of specific embodiments given by way of illustration and not limitation with reference to the accompanying drawings, in which: 
         FIG. 1  shows, schematically and in block diagram form, an embodiment of a device for measuring a flicker frequency of a light source; 
         FIG. 2  shows, schematically and in block diagram form, another embodiment of a device for measuring a flicker frequency of a light source; 
         FIG. 3  shows, schematically and in block diagram form, another embodiment of a device for measuring a flicker frequency of a light source; and 
         FIG. 4  shows, schematically and in block diagram form, another embodiment of a device for measuring one or several flicker frequencies of a light source. 
     
    
    
     DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS 
     Like features have been designated by like references in the various figures. In particular, the structural and/or functional features that are common among the various embodiments may have the same references and may dispose identical structural, dimensional and material properties. 
     For the sake of clarity, only the operations and elements that are useful for an understanding of the embodiments described herein have been illustrated and described in detail. In particular, the methods and devices used to detect a flicker will not be described in detail in the remainder of the description. Indeed, the described embodiments and modes of implementation are compatible with the typical methods and devices for detecting a flicker of a light source. 
     Unless indicated otherwise, when reference is made to two elements connected together, this signifies a direct connection without any intermediate elements other than conductors, and when reference is made to two elements coupled together, this signifies that these two elements can be connected or they can be coupled via one or more other elements. 
     In the following disclosure, unless indicated otherwise, when reference is made to absolute positional qualifiers, such as the terms “front”, “back”, “top”, “bottom”, “left”, “right”, etc., or to relative positional qualifiers, such as the terms “above”, “below”, “higher”, “lower”, etc., or to qualifiers of orientation, such as “horizontal”, “vertical”, etc., reference is made to the orientation shown in the figures. 
     Unless specified otherwise, the expressions “around”, “approximately”, “substantially” and “in the order of” signify within 10%, and preferably within 5%. 
       FIG. 1  shows, schematically and in block diagram form, an embodiment of a device  10  for measuring a flicker frequency of a light source  1 . 
     The light source  1  is an artificial light source having a flicker, for example, periodic. As an example, the light source  1  is powered by an AC electrical power source characterized by a frequency, for example, of about 50 Hz or about 60 Hz. The flicker frequency of the source  1  is generally in the order of the frequency of the power supply by which the source  1  is powered, for example about 50 Hz or about 60 Hz. According to one variant, the frequency of the power supply by which the source  1  is powered is different from about 50 or about 60 Hz. 
     The device  10  comprises a flicker detector  12  (F. Det) and a processor  14  (CPU). The detector  12  and the processor  14  exchange data by means of a communication bus  16 . As an example, the bus  16  is a bus of type I2C (Inter Integrated Circuit), type I3C (Improved Inter Integrated Circuit), or type SPI (Serial Peripheral Interface). According to another embodiment, the communication bus  16  can be a device configured to transmit an analog signal, the processor  14  in this case being configured to recover data from this analog signal by means of an analog digital converter. 
     The flicker detector  12  is a device configured to detect the light radiation from the light source  1 , that is to say, its flicker, and to supply regular measurements of the amplitude of this flicker, hereinafter called sample Ech 10 . The detector  12  sends the samples Ech 10  to the processor  14  by means of the bus  16 . 
     The processor  14  comprises different components  18  (HW) and is configured to implement an algorithm of a phase lock loop shown in  FIG. 1  by a block  19  (PLL). More particularly, the processor  14  is configured to receive instructions implementing an algorithm of a phase lock loop. 
     The components  18  comprise one or several integrated circuits suitable for receiving and sending the samples Ech 10 . As an example, the components  18  comprise at least one interface suitable for receiving information from the bus  16 , for example an I2C interface, and one or several memories suitable for storing instructions implementing an algorithm of a phase lock loop. According to an embodiment variant, the components  18  can comprise an analog digital converter in the case where the samples Ech 10  are sent in the form of an analog signal. 
     The processor  14  uses the algorithm of the phase lock loop to determine a frequency F 10  of the samples Ech 10 . The phase lock loop algorithm receives, as input, the samples Ech 10 , and supplies, as output, the frequency F 10  and a digital signal Sig 10 . The digital signal Sig 10  is a digital signal with frequency equal to the frequency F 10  and synchronized in phase with the samples Ech 10 . 
     The operation of the device  10  is as follows. As previously described, the flicker detector  12  is configured to detect the light radiation from the source  1 , in other words its flicker, and to supply the successive samples Ech 10  representative of this flicker. The samples Ech 10  are supplied, by the detector  12 , to the processor  14  by means of the bus  16 . The processor  14  receives the samples Ech 10  by using the different electronic components  18 . The samples Ech 10  are next used by the algorithm of the phase lock loop. 
     The algorithm of the phase lock loop makes it possible to have the frequency of one signal governed by the frequency of another signal, in the case at hand the frequency of the periodic digital signal Sig 10  is governed by the frequency of the samples Ech 10 . At the beginning of governing, the digital signal Sig 10  has an initial frequency Fini 10  set by the algorithm. As an example, the initial frequency Fini 10  can be set during the manufacturing of the device  10 , or can be a parameter able to be modified by a builder or a user of the device  10 . As an example, when the expected frequency of the samples Ech 10  is in the order of 50 Hz or 60 Hz, the initial frequency Fini 10  can be set at about 50 Hz or at about 60 Hz. The closer the initial frequency is to the frequency of the samples Ech 10 , the less time the algorithm will need to govern the signal Sig 10 . The frequency F 10  corresponds to the frequency of the signal Sig 10  once its frequency is governed by the samples Ech 10 . 
     One advantage of this embodiment is that the use of the algorithm of the phase lock loop allows a fast measurement of the frequency of a light flicker of the light source  1 , for example, faster than a device using a spectral analysis with a Fourier transform function. As an example, with the use of the phase lock loop  19 , the measurement of a frequency of a signal, such as a flicker, can be done in a duration for example shorter than 100 ms. 
     Another advantage of this embodiment is that the implementation of an algorithm of a phase lock loop requires a lower computing power of a processor than the implementation, by this same processor, of a spectral analysis with a Fourier transform function. 
     Another advantage of this embodiment is that the processor can choose the moment during which it will process the samples Ech 10 . Indeed, the samples Ech 10  can be stored in a memory of the components  18  of the processor  14  until they are processed. 
     Another advantage of this embodiment is that the signal Sig 10  synchronized on the samples Ech 10  can be used by other components and/or other circuits of the device  10 . As an example, such a signal Sig 10  can be used by a camera of the ISP type (Image Signal Processor), or a processor of a camera. 
       FIG. 2  shows, schematically and in block diagram form, another embodiment of a device  20  able to measure a flicker frequency of the light source  1 . 
     The device  20  comprises a flicker detector  22  (F. Det) and a processor  24  (CPU). The detector  22  sends data to the processor  24 , by means of a data bus  26 . The bus  26  is similar to the data bus  16  described in relation with  FIG. 1 . 
     The flicker detector  22  is made up of a detector  27  and a component  28  (PLL) configured to implement a phase lock loop. 
     The detector  27  is similar to the flicker detector  12  described in relation with  FIG. 1 . The detector  27  sends samples Ech 10  representative of the flicker of the light source  1  to the circuit  28 . 
     The component  28  configured to implement a phase lock loop is for example a processor configured to implement an algorithm of a phase lock loop, similar to the processor  14  described in relation with  FIG. 1 , or a circuit physically implementing a phase lock loop. The component  28  supplies, as output, a digital signal Sig 20 , and a frequency F 20 . The digital signal Sig 20  is a digital signal with frequency equal to the frequency F 20  and synchronized in phase with the samples Ech 20 . 
     The processor  24  receives the digital signal Sig 20  and the frequency F 20  by means of the bus  26 . The processor  24  makes it possible to process these data. 
     One advantage of this embodiment is that the samples Ech 20  are processed directly after they are detected by the component  28 , which does not require an additional memory circuit. 
     Another advantage of this embodiment is that the implementation of an algorithm of a phase lock loop requires a lower computing power of a processor than the implementation, by this same processor, of a spectral analysis with a Fourier transform function. 
     Another advantage of this embodiment is that the signal Sig 20  synchronized on the samples Ech 20  can be used by other components and/or other circuits of the device  20 . As previously stated, as an example, such a signal Sig 20  can be used by a camera of the ISP type (Image Signal Processor), or a processor of a camera. 
       FIG. 3  shows, schematically and in block diagram form, an embodiment of a device  30  able to measure a flicker frequency of the light source. 
     The device  30  is similar to the device  10  described in relation with  FIG. 1 . The devices  10  and  30  comprise like elements. In the remainder of the description, these like elements will not be described in detail again, and only the differences between the two devices will be highlighted. 
     Like the device  10 , the device  30  comprises a light flicker detector  12  and a processor  14  that communicate by means of a bus  16 . The processor  14  comprises the different components  18  and is configured to implement the algorithm of a phase lock loop shown in  FIG. 3  by the block  19 . 
     The processor  14  is further configured to implement a Fourier transform function, and a spectral analysis using this Fourier transform function, shown in  FIG. 3  by a block  31  (FFT). In particular, the processor  14  may comprise a memory including instructions implementing a spectral analysis using a Fourier transform function. 
     The operation of the device  30  is as follows. The flicker detector  12  is configured to detect the light radiation from the source  1 , in other words its flicker, and to supply successive samples Ech 30  representative of this flicker. The samples Ech 30  are supplied, by the detector  12 , to the processor  14  by means of the bus  16 . The processor  14  receives the samples Ech 30  by using the different electronic components  18 . The samples Ech 30  are next used by the algorithm of the phase lock loop, as described in relation with  FIG. 1 . 
     The processor can further perform a spectral analysis of the samples Ech 30  in order to obtain a first estimate of its frequency. As an example, to perform this spectral analysis, the processor can use a part of the samples Ech 30 , for example, a duration portion of between 0.5 and 2 s, for example 1 s. This first estimate of the frequency of the samples Ech 30  can for example be used to configure the initial frequency of the phase lock loop algorithm. 
       FIG. 4  shows, schematically and in block diagram form, an embodiment of a device  40  able to measure a flicker frequency of the light source. 
     The device  40  is similar to the devices  10  and  30  described in relation with  FIGS. 1 and 3 . The devices  40 ,  10  and  30  comprise like elements. Hereinafter, these like elements will not be described in detail again, and only the differences between these devices will be highlighted. 
     Like the devices  10  and  30 , the device  40  comprises a flicker detector  12  and a processor  14  that communicate by means of a bus  16 . The bus  16  communicates samples Ech 40  representative of the light flicker of the source  1 . The processor  14  comprises the different components  18 . The components  18  receive and send the samples Ech 40 . 
     The device  40  is configured to detect several frequencies of the samples Ech 40 . The device  40  described in relation with  FIG. 4  is more specifically configured to detect two frequencies of the samples Ech 40 , for example a primary frequency and a secondary frequency. As an example, the samples Ech 40  can have several frequencies when they represent the flicker emitted by two separate light sources. 
     The processor  14  is configured to implement two phase lock loop algorithms shown, in  FIG. 4 , by blocks  41  and  42  (PLL). As an example, the algorithms of the blocks  41  and  42  can be implemented in parallel or successively. The algorithm of the block  41  makes it possible to govern the frequency of a signal Sig 41 , the signal Sig 41  having, at the beginning of governing, an initial frequency Fini 41 . The algorithm of the block  42  makes it possible to govern the frequency of a signal Sig 42 , the signal Sig 42  having, at the beginning of governing, an initial frequency Fini 42 . The initial frequencies Fini 41  and Fini 42  are different from one another. As an example, the deviation between the frequencies Fini 41  and Fini 42  is greater than 100 Hz, preferably greater than 100 Hz. As an example, the initial frequency Fini 41  can be close to a primary frequency of the samples Ech 40 , and the initial frequency Fini 42  can be close to a secondary frequency of the samples Ech 40 . 
     The operation of the device  40  is as follows. The flicker detector  12  is configured to detect the flicker of the source  1 , and to supply the successive samples Ech 40  representative of this flicker. The samples Ech 40  are supplied, by the detector  12 , to the processor  14 , by means of the bus  16 . The processor  14  receives the samples Ech 40  by using the different electronic components  18 . The samples Ech 40  are next used by the phase lock loop algorithms of the blocks  41  and  42  in order to determine the primary and secondary frequencies thereof. The algorithms of the blocks  41  and  42  are implemented independently, and supply, at the output, frequencies F 41  and F 42  and the signals Sig 41  and Sig 42  governed by these frequencies. 
     One advantage of this embodiment is that is makes it possible to measure several frequencies of a flicker. 
     Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these embodiments can be combined and other variants will readily occur to those skilled in the art. In particular, it is possible to adjust the initial frequencies of the algorithms of the blocks  41  and  42  of the device  40  by using a spectral analysis using a Fourier transform function. 
     Furthermore, the flicker detector  22 , for example its component  28  could be configured to implement a spectral analysis using a Fourier transform function, so as to configure the phase lock loop as described in relation with  FIG. 3 . 
     Finally, the practical implementation of the embodiments and variants described herein is within the capabilities of those skilled in the art based on the functional description provided hereinabove.