Patent Publication Number: US-11033978-B2

Title: Arc voltage sensing and control for a welding apparatus

Description:
TECHNICAL FIELD 
     Embodiments described herein are related to sensing and controlling an arc voltage generated by a welding apparatus. 
     BACKGROUND 
     In modern welding switched mode power supplies an output inductor&#39;s purpose is mainly to reduce ripple of the output current. This is in contrast to conventional power supplies in which the inductor not only reduces the ripple of the output current, but also creates the necessary dynamic response. Since a switch mode power supply operates at ultra-acoustic frequencies (e.g., 20 kHz, 50 kHz, 100 kHz), the required inductance of the output inductor is relatively small compared to the inductance of the external power (or welding) cables. And, in very high frequency applications using a switch mode power supply, the inductance of the cables may be significantly higher than that of the output inductor such that the output inductor may be effectively ignored as part of the circuit, or even removed as a component of the power supply. 
     The inductance of the welding cables can be variable and thus difficult to characterize. For example, cables may be of varying lengths, cable extenders and/or aftermarket cables may be employed, and/or cables may be in the vicinity of ferromagnetic materials. Thus, when the arc voltage is changing rapidly, the voltage measured on the output of the power supply is significantly less than or higher than the actual arc voltage, not only because of the resistance of the cables, but much more because of the presence of the inductance in the external circuit, namely the welding cables. That is, there is an undesirable lag between the actual arc voltage and the sensed arc voltage, leading to, possibly, sub-optimal power supply control for a given welding method. 
     BRIEF SUMMARY 
     Described herein is a method for determining a value of arc voltage in a welding system without voltage sensing cables in the vicinity of a welding arc, the welding system including a switch mode power supply and a controller that controls operation of the switch mode power supply, the switch mode power supply including an internal inductor having a predetermined inductance value, the method comprising: sensing a first internal voltage (V 20 ) within the switch mode power supply prior to the internal inductor during an active power delivery stage of the switch mode power supply; sensing a first output voltage (V 21 ) of the switch mode power supply during the active power delivery stage of the switch mode power supply; sensing a second internal voltage (V F ) within the switch mode power supply prior to the internal inductor during a freewheeling stage of the switch mode power supply; sensing a second output voltage (V 22 ) of the switch mode power supply during a freewheeling stage of the switch mode power supply; and determining the value of arc voltage based on the first internal voltage, the first output voltage, the second internal voltage, and the second output voltage. 
     Also described herein is a welding power supply configured to determine a value of arc voltage in a welding system without voltage sensing cables in the vicinity of a welding arc during the termination of the power delivery lasting more than one period of the operation cycle of the welding power supply including a switch mode power supply and a controller that controls operation of the switch mode power supply, the switch mode power supply including an internal inductor (L 1 ) having a predetermined, in general, current dependent inductance, the welding power supply including a processor that, when executing logic instructions, is configured to: sense a first internal voltage (V 20 ) within the switch mode power supply prior to the internal inductor during an active power delivery stage of the switch mode power supply; sense a first output voltage (V 21 ) of the switch mode power supply during the active power delivery stage of the switch mode power supply; sense a second internal voltage (V F ) within the switch mode power supply prior to the internal inductor during a freewheeling stage of the switch mode power supply; sense a second output voltage (V 22 ) of the switch mode power supply during a freewheeling stage of the switch mode power supply; sense an output current (I 2 ); and determine the value of arc voltage based on the first internal voltage, the first output voltage, the second internal voltage, the second output voltage, the output current and the predetermined inductance of the internal inductor. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a schematic diagram of a prior art welding system. 
         FIG. 2  is a schematic diagram of a welding system and several relevant measures when a switch mode power supply is in a power delivery stage in accordance with an example embodiment. 
         FIG. 3  is a schematic diagram of a welding system and several relevant measures when the switch mode power supply is in a freewheeling stage in accordance with an example embodiment. 
         FIG. 4  depicts a plot of voltage versus time on the output of the welding system power supply and a load voltage. 
         FIG. 5  depicts a timing diagram for the switch mode power supply and instances in time when samples may be taken, in accordance with an example embodiment. 
         FIG. 6  illustrates a simplified schematic diagram of the welding system in a freewheeling stage in accordance with an example embodiment. 
         FIG. 7  is a flow chart illustrating a series of steps for determining arc voltage without sensing cables deployed at a power receiver in accordance with an example embodiment. 
         FIG. 8  shows an example of voltage and current transitions of output current and arc voltage corrected by the approach described herein in accordance with an example embodiment. 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 1  is a schematic diagram of a prior art welding system. The welding system includes power supply  100  that comprises a switch mode power supply (SMPS)  110  that is controlled by a welding and power supply control circuit (hereinafter “control circuit”)  120 . An electrode cable  130  and return cable  131  are connected to respective output terminals of welding power supply  100 . As indicated in the figure, each of these cables includes inductance and resistance characteristics denoted as L Cable1 , R Cable1 , L Cable2 , R Cable2 . A power receiver  140  comprising, e.g., an electrode, electric arc, and welding bath completes the electrical circuit including the welding power supply  100  and cables  130 ,  131 . 
     Control circuit  120  is configured to receive several inputs including a vector of reference physical measures of the welding process  121  (e.g., voltages, currents, power), a voltage of a workpiece V workplace    122 , a voltage of the electrode (e.g., at the torch) V electrode    123 , and the output welding current I out    124 , generated from a current sensor  125 . V workplace    122  and V electrode    123  are fed back to control circuit  120  via voltage sense cables whose endpoints are connected as close as possible to power receiver  140 . While this arrangement is possible, it is actually not practical to connect the voltage sense cables in the manner shown in view of the energy being delivered at the power receiver  140 , and users typically find additional cabling inconvenient. 
     As will be explained in detail below, in accordance with the embodiments described herein, a controller is configured to sample various voltages internal to a welding power supply during successive power delivery and freewheeling stages of an SMPS and thereby obtain an accurate measure of the arc voltage. The disclosed approach eliminates the need, and the inconvenience, of outside voltage sensing cables returning to the power supply. 
     The methodology described herein is applicable to a switch mode power supply having inductive character at the output, that operates in continuous current mode and is equivalent to a buck converter, with two stages of operation: an energy delivery stage (stage I) and freewheeling stage (stage II) that successively cycle at a high frequency. 
     In an embodiment, the methodology also comprises sensing arc voltage at a time when current is still present in the output while the switch mode power supply has stopped power delivery and the output continues to operate only in accordance with its freewheeling stage. This instance may occur, for example, during pulse skipping or upon the completion of the welding operation. 
     In another embodiment, the methodology still further comprises sensing arc voltage when current is terminated, but the power supply continues to deliver voltage. This instance is called open-circuit operation. 
       FIG. 2  is a schematic diagram of a welding system and several relevant measures when the switch mode power supply is in a power delivery stage in accordance with an example embodiment. The welding system includes power supply  200  that comprises a switch mode power supply (SMPS)  210  that is controlled by welding and power supply control circuit logic (hereinafter “controller”)  220 . Controller  220  may include memory  285  and a processor  286 . An electrode cable  230  and return cable  231  are connected to respective output terminals of welding power supply  200 . As indicated in the figure, cables  230 ,  231  have a combined resistance R 2 , and a combined inductance L 2 . A power receiver  240  comprising, e.g., an electrode, electric arc, and welding bath completes the electrical circuit including the welding power supply  200  and cables  230 ,  231 . As further shown, SMPS  210  includes an internal inductor having inductance L 1 . 
     Controller  220  is configured to receive several inputs including: 
     a vector of reference physical measures of the welding process  221  (e.g., voltages, currents, power); 
     V out_1    222 —electrical potential of the output of power supply  200  connected to electrode (i.e., torch (not shown)); 
     V int_1    223 —electrical potential of the output of power supply  200  taken prior to L 1 ; 
     V gnd    224 —electrical potential of the output connected to workpiece; and 
     V cs    225 —output (welding) current I out , obtained via current sensor  226 . 
     The following additional values are defined, and shown in  FIG. 2 : 
     V arc —arc voltage 
     V′ arc —arc voltage increased by the voltage drop related to cable resistance R 2 ; 
     V 21 =V out_1 −V gnd  during stage I—output voltage during power delivery phase of SMPS  210 ; and 
     V 20 =V int_1 −V gnd  during stage I—output voltage sensed before internal inductor L 1  during power delivery phase of SMPS  210 . 
       FIG. 3  is a schematic diagram of a welding system and several relevant measures when the switch mode power supply is in a freewheeling stage in accordance with an example embodiment.  FIG. 3  is substantially the same as  FIG. 2 , but indicates several additional values that are relevant, for purposes of the instant discussion, during the power supply&#39;s freewheeling operation stage. 
     V out    322 —electrical potential of the output of power supply  200  connected to electrode (i.e., torch (not shown)); and 
     V int    323 —electrical potential of the output of power supply  200  taken prior to L 1 . 
     The following additional values are defined, and shown in  FIG. 3 : 
     V′ arc =V arc −I 2 R 2 =arc voltage increased by the voltage drop related to cable resistance R 2 ; 
     V 22 =V out −V g nd during stage II—output voltage during freewheeling phase of SMPS  210 ; and 
     V F =V int −V gnd  during stage II—output voltage sensed before internal inductor L 1  during freewheeling phase of SMPS  210 . 
     The several values defined above in connection with  FIGS. 2 and 3  are employed in a methodology applicable to a switch mode power supply using pulse width modulation (PWM). Welding switch mode power supplies differ from typical switch mode power supplies in that they have only an inductor (L 1 ,  FIGS. 2 and 3 ) and no capacitor on the output. As noted,  FIG. 2  and  FIG. 3  present several values of voltage, current, and inductance, etc. in the power delivery and freewheeling stages of switch mode power supply  200 . These several values are relied upon in the discussion below. 
       FIG. 4  depicts a plot of voltage versus time on the output of power supply  200  and a load voltage, i.e., V arc . As is seen, the power supply output voltage having pulse character with peak values V 21 , and the bottom values V 22  follows the load voltage V arc . To illustrate this, two changes of the load, at about t1=0.5 ms and t2=1 ms, are shown. At the moment t0=0 ms the power supply starts to deliver power and the output voltage reaches its final approximately constant value. In the moment of time t1, the output voltage was instantly lowered by the connection of a low voltage clamp. Then in the moment t2, the clamp is disconnected, which causes a transitional process with visible voltage surge and consequent return to the value before the moment t1. 
     The discussion below explains how the ratio of inductances L 1 , L 2  in the welding system can be derived from several of the voltage values indicated in  FIGS. 2 and 3  (and shown in  FIG. 4 ), and how the actual arc voltage can be obtained without the need for arc voltage sense cables, or even knowing the values of L 1  and L 2 . 
     Relevant equation for Stage I—power delivery 
     
       
         
           
             
               
                 
                   
                     
                       
                         V 
                         20 
                       
                       - 
                       
                         V 
                         21 
                       
                     
                     
                       
                         V 
                         21 
                       
                       - 
                       
                         V 
                         arc 
                         ′ 
                       
                     
                   
                   = 
                   
                     
                       L 
                       1 
                     
                     
                       L 
                       2 
                     
                   
                 
               
               
                 
                   ( 
                   1 
                   ) 
                 
               
             
           
         
       
     
     Relevant equation for Stage II—freewheeling 
     
       
         
           
             
               
                 
                   
                     
                       
                         - 
                         
                           V 
                           F 
                         
                       
                       - 
                       
                         V 
                         22 
                       
                     
                     
                       
                         V 
                         22 
                       
                       - 
                       
                         V 
                         arc 
                         ′ 
                       
                     
                   
                   = 
                   
                     
                       L 
                       1 
                     
                     
                       L 
                       2 
                     
                   
                 
               
               
                 
                   ( 
                   2 
                   ) 
                 
               
             
           
         
       
     
     Solving the system of equations (1) (2), it may be derived that: 
     
       
         
           
             
               
                 
                   
                     V 
                     arc 
                     ′ 
                   
                   = 
                   
                     
                       
                         
                           V 
                           20 
                         
                         · 
                         
                           V 
                           22 
                         
                       
                       + 
                       
                         
                           V 
                           F 
                         
                         · 
                         
                           V 
                           21 
                         
                       
                     
                     
                       
                         V 
                         22 
                       
                       + 
                       
                         V 
                         20 
                       
                       + 
                       
                         V 
                         F 
                       
                       - 
                       
                         V 
                         21 
                       
                     
                   
                 
               
               
                 
                   ( 
                   3 
                   ) 
                 
               
             
           
         
       
     
     The methodology implements a delay in the voltage sensing, since the result may be created only after completing of the voltage measurements in both stages I and II. The delay in arc voltage sense may be defined as:
 
Δ t =( D [ n ]+δ) T , or
 
Δ t =(1− D [ n ]+δ) T , and
 
Δ t&lt;T  
 
     where D[n]−duty cycle on the period n 
     T—period of the operation of power supply, for instance 
     T=1/fsw for a buck converter, single forward converter 
     T=2/fsw for a full bridge converter, half-bridge converter, double forward converter 
     δT—intentional, additional delay in measurement. 
     Thus the value of the arc voltage delay can be reached within one period of the output voltage ripple. Such a delay is much less than the delay implemented by a conventional filter applied to an arc voltage sense. In accordance with an embodiment, the sensed voltage measures are updated in discrete moments of time and they remain constant up to the next update. 
       FIG. 5  depicts a timing diagram for the switch mode power supply  210  and instances in time when samples may be taken, in accordance with an example embodiment. In the figure, n represents the number of the period and the period includes stage I and stage II timeframes. 
     It can be noted that equation (3), derived from equations (1) and (2), is valid for both stages. Thus, the arc voltage during a given stage may be defined as a derivative of the present stage voltages and the voltages captured during the previous stage. Referring again to  FIG. 5 , calculations can be performed based on samples taken during two consecutive stages, where either stage I or stage II is first. 
     In this regard, referring to periods of the operation of the power supply the arc voltage V′ arc  may be derived as: 
     For t=(n−1)T (n−1+D(n))T (stage I) 
     
       
         
           
             
               
                 
                   
                     V 
                     arc 
                     ′ 
                   
                   = 
                   
                     
                       
                         
                           
                             V 
                             20 
                           
                           ⁡ 
                           
                             [ 
                             n 
                             ] 
                           
                         
                         · 
                         
                           
                             V 
                             22 
                           
                           ⁡ 
                           
                             [ 
                             
                               n 
                               - 
                               1 
                             
                             ] 
                           
                         
                       
                       + 
                       
                         
                           
                             V 
                             F 
                           
                           ⁡ 
                           
                             [ 
                             
                               n 
                               - 
                               1 
                             
                             ] 
                           
                         
                         · 
                         
                           
                             V 
                             21 
                           
                           ⁡ 
                           
                             [ 
                             n 
                             ] 
                           
                         
                       
                     
                     
                       
                         
                           V 
                           20 
                         
                         ⁡ 
                         
                           [ 
                           n 
                           ] 
                         
                       
                       + 
                       
                         
                           V 
                           F 
                         
                         ⁡ 
                         
                           [ 
                           
                             n 
                             - 
                             1 
                           
                           ] 
                         
                       
                       - 
                       
                         Δ 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           
                             V 
                             1 
                           
                           ⁡ 
                           
                             [ 
                             n 
                             ] 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   
                     3 
                     ⁢ 
                     a 
                   
                   ) 
                 
               
             
           
         
       
     
     where ΔV 1 [n]=V 21 [n]−V 22  [n−1], 
     While for t=(n−1+D(n))T . . . (n)T (stage II) 
     
       
         
           
             
               
                 
                   
                     V 
                     arc 
                     ′ 
                   
                   = 
                   
                     
                       
                         
                           
                             V 
                             20 
                           
                           ⁡ 
                           
                             [ 
                             n 
                             ] 
                           
                         
                         · 
                         
                           
                             V 
                             22 
                           
                           ⁡ 
                           
                             [ 
                             n 
                             ] 
                           
                         
                       
                       + 
                       
                         
                           
                             V 
                             F 
                           
                           ⁡ 
                           
                             [ 
                             n 
                             ] 
                           
                         
                         · 
                         
                           
                             V 
                             21 
                           
                           ⁡ 
                           
                             [ 
                             n 
                             ] 
                           
                         
                       
                     
                     
                       
                         
                           V 
                           20 
                         
                         ⁡ 
                         
                           [ 
                           n 
                           ] 
                         
                       
                       + 
                       
                         
                           V 
                           F 
                         
                         ⁡ 
                         
                           [ 
                           n 
                           ] 
                         
                       
                       - 
                       
                         Δ 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           
                             V 
                             2 
                           
                           ⁡ 
                           
                             [ 
                             n 
                             ] 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   
                     3 
                     ⁢ 
                     b 
                   
                   ) 
                 
               
             
           
         
       
     
     where ΔV 2 [n]=V 21 [n]−V 22 [n]. 
     The arc voltage on the particular cycle of the power supply operation value may be calculated once using one of equations (3a) or (3b) or twice using both equations. 
     In order to reduce probability of distortion of the result caused by time coincidence of the transition between stages and a rapid voltage change, sampling may be performed, as shown in  FIG. 5 , in a moment just before and sometime after transition between stages I and II. However, in practice, controller  220  may take many samples, depending on system capacity. Different methods of filtering, which can reduce noise, cancel ripple and exclude instances of rapid voltage change may also be employed. If a filtering process is employed, then the values in the equations may be replaced, for instance, by the average values calculated for a given state. In  FIG. 5 , averaging was applied to V 21  (V 21av ) and V 22  (V 22av ). However, to reduce noise, averaging can also be applied to V 20  and V F . 
     Limitations 
     During the fast transitions, voltages V 21  and V 22  may be measured at different arc voltage V′ arc . The present method though, is based on the assumption of equality of V′ arc  in adjacent stages I and II. Moreover, both values are placed in the denominator of the formulas. As a result, the arc voltage derived according to formulas (3), (3a), (3b) may be significantly different from the real value. 
     An assumption of constant V′ arc  in adjacent stages leads to the equation: 
     
       
         
           
             
               
                 
                   
                     
                       V 
                       21 
                     
                     - 
                     
                       V 
                       22 
                     
                   
                   = 
                   
                     
                       ( 
                       
                         
                           V 
                           20 
                         
                         + 
                         
                           V 
                           F 
                         
                       
                       ) 
                     
                     ⁢ 
                     
                       
                         L 
                         2 
                       
                       
                         
                           L 
                           1 
                         
                         + 
                         
                           L 
                           2 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   4 
                   ) 
                 
               
             
           
         
       
     
     Oppositely to the fast changing arc voltage V arc ’ the output current I 2 , both internal and external inductances, respectively, L 1  and L 2 , the first internal voltage V 20  and the second internal voltage V F  do not change instantly and can be assumed invariant within two consecutive stages of the operation. 
     Consequently as long as the difference V 21 −V 22  in consecutive steps of sampling is not changing rapidly, the assumption of the equality, or similarity of arc voltage during two steps of sampling id fulfilled and the method of calculation is valid. 
     Thus reversely, the limitations can be imposed on the differences V 21 −V 22  to keep the method valid.
 
Δ V   1 [ n ]&gt;Δ V   2 [ n− 1]·(1−∂), if not Δ V   1 [ n ]=Δ V   2 [ n− 1]·(1−∂)  (5)
 
Δ V   1 [ n ]&lt;Δ V   2 [ n− 1]·(1+∂), if not Δ V   1 [ n ]=Δ V   2 [ n− 1]·(1+∂)  (6)
 
Δ V   2 [ n ]&gt;Δ V   1 [ n ]·(1−∂), if not set Δ V   2 [ n ]=Δ V   1 [ n ]·(1−∂)  (7)
 
Δ V   2 [ n ]&lt;Δ V   1 [ n ]·(1+∂), if not set Δ V   2 [ n ]=Δ V   1 [ n ]·(1+∂)  (8)
 
     where ∂ is margin of change, assumed as low as 0.01 . . . 0.1. 
     Alternatively, when only one voltage per period is calculated the following limitations may be applied:
 
Δ V   2 [ n ]&gt;Δ V   2 [ n− 1]·(1−∂), if not Δ V   2 [ n ]=Δ V   2 [ n− 1]·(1−∂)  (9)
 
Δ V   2 [ n ]&lt;Δ V   2 [ n− 1]·(1+∂), if not Δ V   2 [ n ]=Δ V   2 [ n− 1]·(1+∂)  (10).
 
     During the start of the welding process or in a case of disturbances in welding, especially open circuit states, the initial reference values of ΔV 1 , ΔV 2  are preferably used. The values can be memorized based on previous measurements or calculated according to parameters of the power supply according to equation (4). 
     Open Circuit and High Load Resistance Stages 
     In an open circuit stage all previous assessments are false. In this stage, the output current is zero and voltage before the inductor L 1  is the same as the voltage after the inductor L 1 , and the same as arc voltage. 
     Thus when an open circuit (OC) state is detected the arc voltage measurement should be switched to a continuous measurement of the voltage on the output of the power supply. 
     Then,
 
 V   arc ( t )= V   2 ( t ); for  I   2 ( t )&lt; I   20   (11)
 
     where I 20 —minimum current level for OC detection. 
     Low-pass filtering is preferably applied to the voltage measured on the output of the power supply. An analog filter with a corner frequency a few times lower than the output voltage ripple frequency is preferably applied. A digital low pass filter can also applied in this state. 
     Then the arc voltage in discrete moments of time may be defined as average value within the period: 
                       V   arc     ⁡     [   n   ]       =       1   T     ⁢       ∫   nT       (     n   +   1     )     ⁢   T       ⁢         V   2     ⁡     (   t   )       ⁢           ⁢   dt                 (   12   )               
Freewheeling Phase/Pulse Skipping Phase
 
     The method described above derives values from the two stages of operation of the SMPS  210 . However, during constant operation and during the switch-off phase, the SMPS  210  does not deliver power and there is only the freewheeling stage (stage II) which normally lasts a time span equal to tens of SMPS operation periods. The control system may also command to suspend power delivery state, for one or few periods, which is considered pulse skipping. 
       FIG. 6  illustrates a simplified schematic diagram of the welding system in a freewheeling stage (and without a controller that controls the switch mode power supply) in accordance with an example embodiment. 
     The external inductance L 2 , however unspecified, may be treated as linear. On the other hand, L 1  is a particular component having the inductance roughly pre-defined as the function of the current:
 
 L   1   =F ( I   2 );  (13)
 
     Then, when the first pulse skipping stage is detected (no signal at the beginning of the period) it is possible to define L 2 , and, with reference to  FIG. 6 : 
     
       
         
           
             
               
                 
                   
                     
                       L 
                       2 
                     
                     = 
                     
                       
                         
                           
                             
                               V 
                               arc 
                               ′ 
                             
                             ⁡ 
                             
                               [ 
                               0 
                               ] 
                             
                           
                           - 
                           
                             
                               V 
                               2 
                             
                             ⁡ 
                             
                               [ 
                               0 
                               ] 
                             
                           
                         
                         
                           
                             
                               V 
                               2 
                             
                             ⁡ 
                             
                               [ 
                               0 
                               ] 
                             
                           
                           + 
                           
                             
                               V 
                               F 
                             
                             ⁡ 
                             
                               [ 
                               0 
                               ] 
                             
                           
                         
                       
                       · 
                       
                         
                           L 
                           1 
                         
                         ⁡ 
                         
                           ( 
                           
                             
                               I 
                               2 
                             
                             ⁡ 
                             
                               [ 
                               0 
                               ] 
                             
                           
                           ) 
                         
                       
                     
                   
                   ; 
                 
               
               
                 
                   ( 
                   14 
                   ) 
                 
               
             
           
         
       
     
     Then, 
     
       
         
           
             
               
                 
                   
                     
                       
                         V 
                         arc 
                         ′ 
                       
                       ⁡ 
                       
                         ( 
                         t 
                         ) 
                       
                     
                     = 
                     
                       
                         
                           
                             
                               
                                 V 
                                 arc 
                                 ′ 
                               
                               ⁡ 
                               
                                 [ 
                                 0 
                                 ] 
                               
                             
                             - 
                             
                               
                                 V 
                                 2 
                               
                               ⁡ 
                               
                                 [ 
                                 0 
                                 ] 
                               
                             
                           
                           
                             
                               
                                 V 
                                 2 
                               
                               ⁡ 
                               
                                 [ 
                                 0 
                                 ] 
                               
                             
                             + 
                             
                               
                                 V 
                                 F 
                               
                               ⁡ 
                               
                                 [ 
                                 0 
                                 ] 
                               
                             
                           
                         
                         · 
                         
                           
                             
                               L 
                               1 
                             
                             ⁡ 
                             
                               ( 
                               
                                 
                                   I 
                                   2 
                                 
                                 ⁡ 
                                 
                                   [ 
                                   0 
                                   ] 
                                 
                               
                               ) 
                             
                           
                           
                             
                               L 
                               1 
                             
                             ⁡ 
                             
                               ( 
                               
                                 
                                   I 
                                   2 
                                 
                                 ⁡ 
                                 
                                   ( 
                                   t 
                                   ) 
                                 
                               
                               ) 
                             
                           
                         
                         · 
                         
                           { 
                           
                             
                               
                                 V 
                                 2 
                               
                               ⁡ 
                               
                                 ( 
                                 t 
                                 ) 
                               
                             
                             + 
                             
                               
                                 V 
                                 F 
                               
                               ⁡ 
                               
                                 ( 
                                 t 
                                 ) 
                               
                             
                           
                           } 
                         
                       
                       + 
                       
                         
                           V 
                           2 
                         
                         ⁡ 
                         
                           ( 
                           t 
                           ) 
                         
                       
                     
                   
                   ; 
                 
               
               
                 
                   ( 
                   15 
                   ) 
                 
               
             
           
         
       
     
     In discrete moments of time the arc voltage function is defined as: 
     
       
         
           
             
               
                 
                   
                     
                       
                         V 
                         arc 
                         ′ 
                       
                       ⁡ 
                       
                         [ 
                         n 
                         ] 
                       
                     
                     = 
                     
                       
                         
                           
                             
                               
                                 V 
                                 arc 
                                 ′ 
                               
                               ⁡ 
                               
                                 [ 
                                 0 
                                 ] 
                               
                             
                             - 
                             
                               
                                 V 
                                 2 
                               
                               ⁡ 
                               
                                 [ 
                                 0 
                                 ] 
                               
                             
                           
                           
                             
                               
                                 V 
                                 2 
                               
                               ⁡ 
                               
                                 [ 
                                 0 
                                 ] 
                               
                             
                             + 
                             
                               
                                 V 
                                 F 
                               
                               ⁡ 
                               
                                 [ 
                                 0 
                                 ] 
                               
                             
                           
                         
                         · 
                         
                           
                             
                               L 
                               1 
                             
                             ⁡ 
                             
                               ( 
                               
                                 
                                   I 
                                   2 
                                 
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     In order to complete the voltage measurement the compensation of the voltage drop on the external resistance R 2  may be applied according to equation:
 
 V   arc [ n ]= V′   arc [ n ]− R   2   ·I   2 [ n ]  (17)
 
     where the resistance of the external cables R 2  is predetermined. The resistance R 2  may be measured during procedure of calibration or assessed based on the derived characteristics of the cables. Derivation may be based on constant or temperature dependent assumptions. In the latter case the characteristics may be derived from a thermal model, utilizing different input data such as temperatures, current and time. 
     In this way, the method of definition of the momentary arc voltage without influence of inductance of the connecting cables includes all three possible instances of the switch mode power supply operation: switching operation, open circuit operation and free-wheeling operation. 
     The method describe herein relies on fast voltage sampling in the well-defined moments in relation to changes of the stage of the convertor. In particular, the sampling preferably precedes the switching and also is preferably slightly delayed in relation to the switching moment. Therefore, and as an example, a first-in-first-out (FIFO) buffer (implemented, e.g., within memory  285 ) may be applied to choose the right samples. The buffer can be also used for intelligent filtering. It is also possible to apply synchronized timing to the control system of the PWM converter and the voltage measurements. In a preferred implementation, a combination of both approaches may be applied. 
     If an analog system is applied, at least for simulation, it preferably implements a plurality of sample and hold circuits (S/H) synchronously operated with the SMPS  210 , with respect to required precedencies and delays that would exclude false sampling during the transition between the phases of the operation. 
       FIG. 7  is a flow chart illustrating a series of steps or operations for determining arc voltage without sensing cables deployed at a power receiver, in accordance with an example embodiment. The operations may be performed by, e.g., controller  220  via hardware, firmware and or software, or combinations thereof. The hardware may comprises logic circuits implemented by an integrated circuit such as an application specific integrated circuit (ASIC) i.e., processor  286 ). Memory  285  for storing logic instructions (i.e., software) and data (e.g., voltage, current and inductance measures) may be provided within controller  220  and processor  286  may be configured to execute the logic instructions to perform the operations outlined in  FIG. 7 . 
     At  710 , an initial ΔV 21  is loaded. At  712 , current I 2 [n] is read or sampled. At  714 , it is determined whether I 2 [n] is greater than 120, a minimum current level for open circuit detection. If I 2 [n] is not greater than that threshold, then at  716 , Varc[n] is calculated in accordance with equation (15). 
     If at  714 , it is determined whether I 2 [n] is greater than I 20 , then operation  718  forces the process to delay until the beginning of a period. At  720  it is determined whether the state of the system is active at the beginning of the period. That is, it is determined whether the switch mode power supply is in a freewheeling or pulse skipping phase. If yes (i.e., not active), then at  734 , Varc′ is calculated in accordance with equation (16). Varc is then, at  730 , calculated at operation  730 , and at  732 , Varc is output from controller  220  and provided to switch mode power supply  210  to complete the feedback loop to control the switch mode power supply accordingly. 
     If at  720  the switch mode power supply was active, e.g., in a power delivery stage, then at 722 voltages V 21 [n], V 22 [n] and V 22 [n−1] are read, e.g., from memory. At  724 , it is determined whether ΔV 21  is within acceptable limits as discussed above. If not, then at  726  ΔV 21  is modified to, e.g., within 95%-105%. At  728 , Varc′[n] is then calculated in accordance with equations (3a) and (3b). The calculated value of Varc′[n] is then used in operation  730  to calculate Varc, which is output from controller  220  and provided to switch mode power supply  210  to complete the feedback loop to control the switch mode power supply accordingly. 
     Operation  730  subtracts the voltage drop attributable to the welding cables&#39; (i.e., external) resistance at the given period&#39;s current I 2 . Resistance of the cables may be, for instance, measured before the welding operation, without application of special measurement equipment, but by means of the equipment itself. For example, a special operation mode may be selected by the operator, whereby the operator short circuits the conductors on the end of supplying cables, for instance by pressing the tip of the welding torch to the workpiece. The power supply may then deliver a current of a particular value and the control system may thus derive the resistance from measured output voltage. A default value may also be employed. In this instance, the operator may be asked to input parameters of the cables via equipment interface. An example input might be: 25 m of 95 square millimeter cable and 5 m of water cooled torch with 25 square millimeter conductor. 
     The arc voltage and the welding current and their derivatives in time deliver information about the physical state of the welding. For instance, very low voltage means a short circuit between an electrode and a welding bath. A rapid growth of voltage preceded by the low voltage indicates end of the short circuit phase. The high voltage and lowering current indicate open circuit. In an effort to achieve high quality welding such states are preferably identified precisely and without delay. Dependent on the identification of the state of welding, the control system may employ different ways of regulation. In particular, constant arc length mode may be employed where constant arc voltage must be kept, which can be accomplished only by having an accurate and fast response arc voltage sense signal. The constant power or any other output volt−amp characteristic different from constant current characteristic also requires that the voltage sense signal be delivered in a fast and accurate way. 
       FIG. 8  shows an example graph of measures of voltage and current for current transitions of output current and arc voltage corrected by the approach described herein. Assumptions in connection with the graph of  FIG. 8  are that the switch mode power supply  210  starts its operation with constant 50% duty cycle and 50V amplitude, and only the load changes: first at 0.5 ms, then at 1 ms. 
     As shown, when the output current is more or less constant, the voltage measured on the output Vout (filtered 2-nd order filter τ1=τ2=10 μs), is the same as the voltage on the resistive load (the arc voltage+resistive voltage drop on cables, V′ arc). When current is changing, the filtered voltage on the output significantly differs from the voltage on the load (differences marked by two headed arrows). 
     The voltage, Varc, restored by the methodology described herein is much more accurate, although delayed for one period, which is well-seen in moments of rapid changes of the voltage. In a particular example, a second order filter creates a delay that two times larger. In a high frequency device, however, one ripple period delay is insignificant. 
     The above description is intended by way of example only. Various modifications and structural changes may be made therein without departing from the scope of the concepts described herein and within the scope and range of equivalents of the claims.