Patent Publication Number: US-2002003590-A1

Title: Liquid crystal display device and fabrication method thereof

Description:
BACKGROUND OF THE INVENTION  
       [0001] 1. Field of the Invention  
       [0002] The present invention relates to a liquid crystal display device and, more particularly, to a liquid crystal display device capable of solving problems due to disconnection of signal line wiring by effectively connecting a repair line of an array substrate with a repair line of a printed circuit board (hereinafter referred to as PCB), thereby increasing yield and fabrication method thereof.  
       [0003] A conventional liquid crystal display device and fabrication method thereof will be described in conjunction with FIG. 1.  
       [0004]FIG. 1 is a drawing for showing a conventional PCB having a repair redundancy line thereon.  
       [0005] Referring to FIG. 1, when signal line wring is disconnected, a repair redundancy line  15  is formed on a PCB to eliminate problems.  
       [0006] However, according to the conventional method, a capacitor is formed between the redundancy line on the PCB and a ground, thereby causing repair line delay. As a result, a repair coverage area is decreased.  
       SUMMARY OF THE INVENTION  
       [0007] The present invention has been made to solve the above problems of conventional method. The object of the present invention is to provide a liquid crystal display device and fabrication method thereof capable of effectively improving repair by eliminating parasitic capacitor between the repair redundancy line and the ground.  
       [0008] In order to achieve the above objects, the liquid crystal display device of the present invention comprises: a data PCB substrate having a data pad block and a gate PCB substrate having a gate pad block; a data dummy pad and a gate dummy pad formed on the data PCB substrate and on the gate PCB substrate, respectively; and a repair redundancy line formed on the gate pad block and the data pad block to form a redundancy line path between them.  
       [0009] And, the method of fabricating the liquid crystal display device according to the present invention comprises the steps of: forming a data dummy pad and a gate dummy pad on the data PCB substrate having the data pad block and the gate PCB substrate having the gate pad block, respectively; forming a first repair redundancy line forming a redundancy line path with the data dummy pad on the gate pad block; forming an insulating layer and a thin film transistor on the array substrate; forming a second repair redundancy line forming the redundancy line path with the gate dummy pad on the data pad block; forming a protective layer on the resulting structure including the thin film transistor; and forming a current path interconnecting the first and the second repair redundancy lines on the resulting structure.  
       [0010] In the above, in order to solve the problems from signal line disconnection, the number of repair redundancy lines on the edge of the active area in a panel is one or more to be connected into the PCB by TCP.  
       [0011] And, the current path of the repair redundancy line is connected through a dummy pad of a source pad.  
       [0012] In order to eliminate the parasitic capacitor between the repair redundancy line and the ground, the repair redundancy line is formed on the edge of the PCB and a ground is not formed thereon.  
       [0013] A current path of the repair redundancy line is not formed to data PCB by FPC but by a gate dummy pad bonded to gate PCB and by a data dummy pad bonded to data PCB. 
     
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0014] The above objects, and other features and advantages of the present invention will become more apparent after a reading of the following detailed description when taken in conjunction with the drawings, in which:  
     [0015]FIG. 1 is a drawing for showing a conventional PCB having a repair redundancy line thereon.  
     [0016]FIG. 2 is a drawing for showing a PCB having a repair redundancy line thereon, according to the present invention.  
     [0017]FIG. 3 is a detailed drawing of A part in FIG. 2 according to the present invention.  
     [0018]FIG. 4 is a detailed drawing of B part in FIG. 2 according to the present invention.  
     [0019]FIG. 5 is a flow chart for showing a fabrication method of array substrate of liquid crystal display device according to the present invention.  
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
     [0020] The preferred embodiment of the present invention will be described in detail with reference to accompanying drawings.  
     [0021]FIG. 2 is a drawing for showing a PCB having a repair redundancy line thereon, according to the present invention.  
     [0022]FIG. 3 is a detailed drawing of A part in FIG. 2 according to the present invention.  
     [0023]FIG. 4 is a detailed drawing of B part in FIG. 2 according to the present invention.  
     [0024]FIG. 5 is a flow chart for showing a fabrication method of array substrate of liquid crystal display device according to the present invention.  
     [0025] Referring to FIG. 2, according to the present invention, a repair redundancy line  35  is formed differently from the repair redundancy line  15  according to a conventional method as shown in FIG. 1.  
     [0026] Referring to FIG. 3, a drawing number  17  is a current path of repair redundancy line according to a conventional method and a drawing number  37  is that according to the present invention.  
     [0027] Referring to FIG. 4, a repair redundancy line  35  is formed on a part wherein capacitor is not generated with a ground in a PCB substrate.  
     [0028] On the other hand, according to the present invention, an array substrate is fabricated by forming an address wiring on an array substrate and at the same time forming a repair line to form a redundancy line path with a data dummy pad on a gate dummy pad.  
     [0029] Then, an insulating layer is formed on the array substrate and a-Si layer is formed as a channel layer of thin film transistor.  
     [0030] Subsequently, in forming signal line wiring, a repair line to form the redundancy line path with the gate dummy pad is formed on the data dummy pad.  
     [0031] And, a protective layer made of SiNx is formed on the thin film transistor in order to protect the thin film transistor.  
     [0032] And then, a pixel electrode made of ITO and additional capacitor are formed at the same time and a current path is formed to interconnect the repair lines.  
     [0033] The liquid crystal display device having the above array substrate has a thin film display device on one substrate and a color filter on the other substrate. And, in order to solve problems from signal line disconnection, the repair redundancy line  35  is formed on the edge of active area in the panel.  
     [0034] And, the number of the repair redundancy line  35  formed on the edge of the active area  41  in the panel is one or more to be connected into the PCB through TCP  80 .  
     [0035] Additionally, the current path  37  of the repair redundancy line  35  is connected to that of a dummy pad of the gate pad through a dummy pad of the data pad and the repair redundancy line  35  is formed on the edge of PCB to eliminate capacitor with ground.  
     [0036] And, in the repair redundancy line  35 , the current path  37  is formed through the data dummy pad bonded to data PCB and through the gate dummy pad  50  bonded to gate PCB unlike the conventional method in that the current path  17  is formed on the gate PCB by FPC  90 .  
     [0037] Referring to FIGS. 2 and 3, repair redundancy lines  35  are formed on a gate dummy pad  50   b  of the closest gate pad block  31   a  transferring from the data PCB substrate  21  to the gate PCB substrate  31  and on a data dummy pad  50   a  of the data pad  21 . Here, the gate pad  31  and the data pad  21  has different metal formation process. Therefore, via hole is formed and a current path  37  is formed by connecting each other in formation of ITO.  
     [0038] If the data PCB substrate and the gate PCB are interconnected by a FPC  90  as in a conventional method, capacitor is formed between ground and repair line, thereby causing repair line delay. And, if the repair current path  37  is formed in order to prevent generation of capacitor, the structures of X and Y PCBs become complicated.  
     [0039] Accordingly, as shown in FIG. 4, instead of ground, a plurality of repair redundancy lines are formed on the edge of PCB pad of PCB substrate.  
     [0040] If a ground pattern is formed on the part wherein the repair redundancy line may be formed, capacitor is formed, thereby causing repair line delay. Therefore, it is essential not to form the ground pattern in the process of forming PCB.  
     [0041] As described above, according to the present invention, the repair redundancy line is formed on the edge of PCB, wherein the ground pattern is not formed. Therefore, capacitor is not generated between the ground and the repair redundancy line and thereby repair line delay is prevented.  
     [0042] Moreover, a circuit diagram of PCB substrate is simplified since the current path is formed in a cell, not in the FPC.