Patent Publication Number: US-7595264-B2

Title: Fabrication method of semiconductor device

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
   This application is a continuation-in-part of a prior application Ser. No. 11/160,233, filed on Jun. 15, 2005, which is allowed. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of specification. 

   BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention relates to a semiconductor device and a fabrication method thereof, and more particularly to a semiconductor device comprising at least one conductive structure which has a refractory metal salicide layer, and a fabrication method thereof. 
   2. Description of the Related Art 
   In semiconductor technology, a metal-oxide-semiconductor (MOS) transistor is composed of three electrodes: a gate, a source and a drain. The early MOS transistor is composed of a metal layer, a silicon oxide layer and a silicon substrate. However, most of metals have bad adhesion to silicon oxide. Polysilicon with good adhesion to silicon oxide is provided to replace the metal layer. Polysilicon, however, has high resistance. Even if being doped, resistance of doped polysilicon is still too high, and the doped polysilicon cannot replace the metal layer of the MOS transistor in this aspect. A solution is provided later. A metal salicide layer with a thickness similar to that of the polysilicon layer is disposed on the polysilicon layer. The low-resistance metal salicide layer and the polysilicon layer constitute a conductive layer. 
   Metal salicide has high melting point, thermal stability and low resistance so driving current and operational speed of the device are improved. Therefore, metal salicide technology gradually has been applied in integrated circuit processes. Additionally, due to the shrinkage of the integrated circuit technology, a gate width of a device is also reduced. If the metal salicide is titanium salicide, the narrow-line-width effect may occur. It means that if the line width is reduced, the sheet resistance of the gate dramatically increases. Therefore, other materials, such as cobalt salicide (CoSi 2 ) or nickel salicide (NiSi 2 ), have been used to replace titanium salicide. 
   Since nickel salicide has low resistance, low process temperature and minor narrow-line-width effect, it has been widely used in the 65-nm MOS field effect transistor (MOSFET) technology. The thermal stability of nickel salicide, however, is poor. For the time being, nickel/platinum alloy salicide with high thermal stability has replaced nickel salicide. 
   Due to its high chemical stability, platinum is hard to be removed. Though a selected etch solution can remove nickel/platinum alloy, the etch solution may damage nickel/platinum alloy salicide. Accordingly, how to remove nickel/platinum alloy without damaging other parts of the device becomes an issue in this field. 
   SUMMARY OF THE INVENTION 
   Accordingly, the present invention is directed to a method of fabricating a semiconductor device. Before the etch process, a protection layer is formed over the metal alloy salicide layer, which effectively prevents damage of the metal alloy salicide layer. 
   The present invention is also directed to a semiconductor device. Its metal alloy salicide replaces the metal salicide of the prior art technology. 
   The present invention is further directed to a semiconductor device. Its metal salicide has low resistance, low process temperature and minor narrow-line-width effect. 
   The present invention provides a method of fabricating a semiconductor device. First, a silicon-containing conductive layer is provided. A refractory metal alloy is then formed over the silicon-containing conductive layer, wherein the refractory metal alloy comprising a first refractory metal and a second refractory metal. A cap layer is formed over the refractory metal alloy layer. A thermal process is performed so that the refractory metal alloy reacts with silicon of the silicon-containing conductive layer to form a refractory metal alloy salicide layer. An etch process with an etch solution is performed. The etch solution removes the un-reacted refractory metal alloy layer and the cap layer thereon and to form a protection layer on the refractory metal alloy salicide layer. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, each of the first refractory metal and the second refractory metal is selected from at least a group consisting of nickel, cobalt, tantalum, tungsten, titanium, molybdenum, palladium and platinum. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the second refractory metal is less than 10% weight of the refractory metal alloy layer. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the exposed metal alloy salicide layer is oxidized by the etch solution when performing the etch process. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the etch solution includes a mixed solution of sulfuric acid (H 2 SO 4 ) and hydrogen peroxide (H 2 O 2 ), a mixed solution of ammonia hydroxide (NH 4 OH) and hydrogen peroxide, a mixed solution of hydrogen fluoride (HF) and hydrochloric acid (HCl), or a mixed solution of nitric acid (HNO 3 ) and hydrochloric acid. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the protection layer is constituted of silicon, oxygen, refractory metal or combination thereof. The material of the protection layer includes refractory metal oxide or silicon-contained refractory metal oxide. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the refractory metal oxide includes nickel oxide, tantalum oxide, tungsten oxide, titanium oxide or molybdenum oxide, and the silicon-contained refractory metal oxide comprises silicon-contained nickel oxide, silicon-contained tantalum oxide, silicon-contained tungsten oxide, silicon-contained titanium oxide or silicon-contained molybdenum oxide. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the material of the cap layer includes refractory metal nitride. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the refractory metal nitride includes nickel nitride, cobalt nitride, tantalum nitride, tungsten nitride, titanium nitride or molybdenum nitride. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the thickness of the protection layer over the refractory metal alloy salicide layer is from 3 Å to 50 Å. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the thermal process comprises a rapid thermal process (RTP). 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the silicon-containing conductive layer comprises a gate, a source region, a drain region or a conductive line. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the silicon-containing conductive layer comprises a gate of a metal-oxide-semiconductor transistor, a silicon-containing doped region or a silicon-containing conductive line. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, after the step of performing the etch process, a surface treatment is performed to increase the thickness of the protection layer. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the surface treatment includes an O 2  plasma treatment. 
   According to the method of fabricating the semiconductor device of an embodiment of the present invention, the surface treatment includes an O 3  plasma treatment. 
   In the present invention, the refractory metal alloy salicide replaces the prior art refractory metal salicide so as to enhance the thermal stability of the metal salicide. In addition, the protection layer is formed over the refractory metal alloy salicide layer in the present invention. Since a protection layer is formed on the exposed refractory metal alloy salicide layer, the damage caused by the acid etch solution to the refractory metal alloy salicide layer is effectively avoided while the un-reacted refractory metal alloy layer is removed. 
   The above and other features of the present invention will be better understood from the following detailed description of the preferred embodiments of the invention that is provided in communication with the accompanying drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  is a cross sectional view showing a semiconductor device according to an embodiment of the present invention. 
       FIGS. 2A-2E  are cross sectional views showing progress of a method of fabricating a semiconductor device according to an embodiment of the present invention. 
   

   DESCRIPTION OF SOME EMBODIMENTS 
   Following are descriptions of an embodiment of semiconductor device, for example, a metal-oxide-semiconductor (MOS) transistor. The present invention, however, is not limited thereto. The method of the present invention can be applicable to other silicon-containing structures. 
     FIG. 1  is a cross sectional view showing a semiconductor device according to an embodiment of the present invention. Referring to  FIG. 1 , the semiconductor device  10  comprises a silicon substrate  100 , a gate  102 , a gate oxide layer  104 , source/drain regions  106 , spacers  108 , isolation structures  110 , a refractory metal salicide layer  112  and a protection layer  114 . The gate  102  and the source/drain regions  106  are called silicon-containing conductive layers. The isolation structures  110  are disposed in the silicon substrate  100  to define an active area. The gate  102 , the gate oxide layer  104 , the source/drain regions  106 , the spacers  108 , the refractory metal salicide layer  112  and the protection layer  114  are within the active area. In addition, the gate oxide layer  104  is disposed over the silicon substrate  100 . The gate  102  is disposed over the gate oxide layer  104 . The source/drain regions  106  are disposed in the silicon substrate  100  adjacent to sidewalls of the gate  102 . The spacers  108  are disposed on the sidewalls of the gate  102 . The refractory metal salicide layer  112  is disposed over the gate  102  and the source/drain regions  106 . The protection layer  114  is disposed over the refractory metal salicide layer  112 . 
   In an embodiment, the material of the refractory metal salicide layer  112  can be, for example, nickel salicide, cobalt salicide, tantalum salicide, tungsten salicide, titanium salicide, molybdenum salicide, palladium salicide or platinum salicide. The material of the protection layer  114  can be constituted of silicon, oxygen, refractory metal or combination thereof. The material of the protection layer  114  can be, for example, refractory metal oxide, such as nickel oxide, cobalt oxide, tantalum oxide, tungsten oxide, titanium oxide, molybdenum oxide or palladium oxide. The material of the protection layer  114  also can be, for example, silicon-contained refractory metal oxide, such as silicon-contained nickel oxide, silicon-contained cobalt oxide, silicon-contained tantalum oxide, silicon-contained tungsten oxide, silicon-contained titanium oxide, silicon-contained molybdenum oxide or silicon-contained palladium oxide. The thickness of the protection layer  114  is from about 3 å to 50 å. 
   In another embodiment, a refractory metal alloy salicide layer replaces the refractory metal salicide layer of the semiconductor device  10  described above. The refractory metal alloy salicide layer is formed from the reaction of silicon of the silicon-containing conductive layer and the refractory metal alloy layer which comprises a first refractory metal and a second refractory metal. Each of the first refractory metal and the second refractory metal is selected from at least a group consisting of nickel, cobalt, tantalum, tungsten, titanium, molybdenum, palladium and platinum, for example. In an embodiment, the first refractory metal is nickel and the second refractory metal is platinum, and the second refractory metal is less than 10% weight of the refractory metal alloy layer. By replacing the refractory metal salicide layer with the refractory metal alloy salicide layer, the thermal stability of the metal salicide layer is enhanced. 
     FIGS. 2A-2E  are cross sectional views showing progress of a method of fabricating a semiconductor device according to an embodiment of the present invention. First, referring to  FIG. 2A , a silicon substrate  200  is provided. Isolation structures  210  are formed in the silicon substrate  200  to define an active area. The isolation structures  210  can be, for example, a field oxide layer formed by LOCOS process or a shallow trench isolation (STI) structure formed by an STI process. An MOS transistor is then formed in the active area. The MOS transistor comprises a gate  202 , a gate oxide layer  204  formed under the gate  202 , and source/drain regions  206 . In addition, spacers  208  are formed on sidewalls of the gate  202 . The gate  202  and the source/drain regions  206  are called silicon-containing conductive layers. 
   Referring to  FIG. 2B , a refractory metal alloy layer  212  is formed over the substrate  200 . The refractory metal alloy layer  212  comprises a first refractory metal and a second refractory metal. Each of the first refractory metal and the second refractory metal is selected from at least a group consisting of nickel, cobalt, tantalum, tungsten, titanium, molybdenum, palladium and platinum, for example. In this embodiment, the first refractory metal is nickel and the second refractory metal is platinum, and the second refractory metal is less than 10% weight of the refractory meal alloy layer  212 . 
   Referring to  FIG. 2C , a cap layer  213  is formed over the refractory metal alloy layer  212 . The material of the cap layer  213  can be, for example, refractory metal nitride, such as nickel nitride, cobalt nitride, tantalum nitride, tungsten nitride, titanium nitride or molybdenum nitride. 
   Referring to  FIG. 2D , a thermal annealing process is performed so that the refractory metal alloy layer  212  react with silicon of the silicon-containing conductive layer and form the refractory metal alloy salicide layer  214 . The thermal process can be, for example, a rapid thermal process (RTP). The refractory metal alloy layer  212  over the spacers  208  and the isolation structures  210  is not involved in the reaction. 
   Referring to  FIG. 2E , an etch process with an etch solution is performed to remove the un-reacted refractory metal alloy layer  212  and the cap layer  213  and to form a protection layer  230  simultaneously. When the surface of the refractory metal alloy salicide layer  214  is exposed, simultaneously, the exposed refractory metal alloy salicide layer  214  reacts with the etch solution to form a protection layer  230 . The protection layer  230  can avoid the underlying refractory metal alloy salicide layer  214  suffers form damage during the etch process and the subsequence etch process or the subsequence cleaning process. 
   The etch solution of the etch process comprises a mixed solution of sulfuric acid (H 2 SO 4 ) and hydrogen peroxide (H 2 O 2 ), a mixed solution of ammonia hydroxide (NH 2 OH) and hydrogen peroxide, a mixed solution of hydrogen fluoride (HF) and hydrochloric acid (HCl), or a mixed solution of nitric acid (HNO 3 ) and hydrochloric acid. The material of the protection layer  230  can be constituted of silicon, oxygen, refractory metal or combination thereof. The material of the protection layer  230  can be, for example, refractory metal oxide, such as nickel oxide, cobalt oxide, tantalum oxide, tungsten oxide, titanium oxide, molybdenum oxide or palladium oxide. The material of the protection layer  230  also can be, for example, silicon-contained refractory metal oxide, such as silicon-contained nickel oxide, silicon-contained cobalt oxide, silicon-contained tantalum oxide, silicon-contained tungsten oxide, silicon-contained titanium oxide, silicon-contained molybdenum oxide or silicon-contained palladium oxide. The thickness of the protection layer  230  on the refractory metal alloy salicide layer  214  is from about 3 Å to 50 Å. In an embodiment, the ratio of nitric acid/hydrochloric acid of the mixed solution is from 1/1 to 1/6. In a specific embodiment, the refractory metal alloy layer is a nickel and platinum alloy metal layer and protection layer is titanium nitride. The ratio nitric acid/hydrochloric acid of the mixed solution is about 1/3. If the titanium nitride protection layer  213  has a thickness about 150 Å, the etch process time is about 240 seconds. 
   Optionally, after the etch process with the etch solution is performed, a surface treatment is performed to increase the thickness of the protection layer  230 . The surface treatment is an O 2  plasma treatment or an O 3  plasma treatment, for example. 
   Note that the present invention can be applicable to other silicon-containing structures, such as silicon-containing conductive lines. The method applied to a silicon-containing conductive line is similar to that applied to the above-mentioned MOS transistor. Detailed descriptions are not repeated. 
   In the present invention, the refractory metal alloy salicide replaces the prior art refractory metal salicide. After the formation of the refractory metal alloy salicide, the thermal stability of the metal salicide is enhanced. In addition, during removing the un-reacted refractory metal alloy layer and the cap layer, the etch solution reacts with the surface of the refractory metal alloy salicide layer to form a protection layer on the exposed refractory metal alloy salicide layer simultaneously. Therefore, the damage caused by the acid etch solution to the refractory metal alloy salicide layer is effectively avoided while the un-reacted refractory metal alloy layer is removed. Further, the thickness of the protection layer is increased via the surface treatment to prevent the underlying refractory metal alloy salicide layer form damage during the subsequence etch process or the subsequence cleaning process. 
   Although the present invention has been described in terms of exemplary embodiments, it is not limited thereto. Rather, the appended claims should be constructed broadly to include other variants and embodiments of the invention which may be made by those skilled in the field of this art without departing from the scope and range of equivalents of the invention.