Patent Publication Number: US-2023137323-A1

Title: Coil component

Description:
FIELD OF THE ART 
     The present disclosure relates to a coil component and, more particularly, to a coil component having a structure in which a plurality of interlayer insulating films and a plurality of conductor layers are alternately stacked. 
     DESCRIPTION OF RELATED ART 
     JP 2020-088330A discloses a coil component having a structure in which a plurality of interlayer insulating films and a plurality of conductor layers are alternately stacked. In the coil component described in JP 2020-088330A, two terminal electrodes are arranged in the stacking direction of the plurality of conductor layers, one of which is connected to one end of a coil pattern positioned in the lowermost layer, and the other one of which is connected to one end of a coil pattern positioned in the uppermost layer. 
     In the coil component described in JP 2020-088330A, however, one of the two terminal electrodes is connected to a coil pattern positioned in the lowermost layer as described above and has thus a higher connection resistance than the other one thereof. 
     SUMMARY 
     It is therefore an object of the present disclosure to reduce a difference between a connection resistance between one terminal electrode and its corresponding coil pattern and a connection resistance between the other terminal electrode and its corresponding coil pattern. 
     A coil component according to the present disclosure includes: a coil part in which a plurality of interlayer insulating films and a plurality of conductor layers each having a coil pattern are alternately stacked; and first and second terminal electrodes stacked on the coil part. The plurality of conductor layers includes: a first conductor layer positioned in the lowermost layer; a second conductor layer positioned in the uppermost layer; and one or more third conductor layers positioned between the first and second conductor layers. The second and third conductor layers each include a first terminal pattern overlapping one end of the coil pattern positioned in the first conductor layer and the first terminal electrode. The first and third conductor layers each include a second terminal pattern overlapping one end of the coil pattern positioned in the second conductor layer and the second terminal electrode. The one end of the coil pattern positioned in the first conductor layer and the first terminal patterns positioned in the respective second and third conductor layers are connected to one another through via conductors penetrating the interlayer insulating films. The first terminal pattern positioned in the second conductor layer and the first terminal electrode are connected to each other through a via conductor penetrating the interlayer insulating film. The one end of the coil pattern positioned in the second conductor layer and the second terminal electrode are connected to each other through a via conductor penetrating the interlayer insulating film. The width in the radial direction of the first terminal pattern positioned in the third conductor layer is larger than the width in the radial direction of the second terminal pattern positioned in the third conductor layer. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The above features and advantages of the present disclosure will be more apparent from the following description of certain embodiments taken in conjunction with the accompanying drawings, in which: 
         FIG.  1    is a schematic perspective view illustrating the outer appearance of a coil component  1  according to an embodiment of the present disclosure; 
         FIG.  2    is a schematic cross-sectional view of the coil component  1 ; 
         FIG.  3    is a plan view illustrating the conductor layer L 1 ; 
         FIG.  4    is a plan view illustrating the conductor layer L 2 ; 
         FIG.  5    is a plan view illustrating the conductor layer L 3 ; 
         FIG.  6    is a plan view illustrating the conductor layer L 4 ; 
         FIG.  7    is a plan view illustrating the conductor layer L 2  according to a first embodiment; and 
         FIG.  8    is a plan view illustrating the conductor layer L 2  according to a second embodiment. 
     
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
     Some embodiments of the present disclosure will be explained below in detail with reference to the accompanying drawings. 
       FIG.  1    is a schematic perspective view illustrating the outer appearance of a coil component  1  according to an embodiment of the present disclosure.  FIG.  2    is a schematic cross-sectional view of the coil component  1 . 
     As illustrated in  FIGS.  1  and  2   , the coil component  1  according to the present embodiment includes a magnetic element member  2 , a coil part  3 , and bump terminal electrodes B 1  and B 2 . The coil part  3  and bump terminal electrodes B 1  and B 2  are embedded in the magnetic element member  2 . The magnetic element member  2  is positioned in the inner diameter area of the coil part  3  and is also positioned in the outside area of the coil part  3  so as to sandwich the coil part  3  in the z-direction (coil axis direction). The magnetic element member  2  is a composite magnetic member containing magnetic metal filler made of iron (Fe) or a permalloy-based material and a resin binder and forms a magnetic path for magnetic flux generated by a current flowing in the coil part  3 . The magnetic element member  2  has an upper surface  2   a  constituting the xy plane which is perpendicular to the z-direction (coil axis direction) and a pair of side surfaces  2   b  and  2   c  constituting the yz plane which is perpendicular to the upper surface  2   a.  The surface of the terminal electrode B 1  is exposed from the upper surface  2   a  and side surface  2   b  of the magnetic element member  2 . The surface of the terminal electrode B 2  is exposed from the upper surface  2   a  and side surface  2   c  of the magnetic element member  2 . Upon mounting of the coil component  1 , the terminal electrodes B 1  and B 2  are soldered onto a circuit board such that the upper surface  2   a  of the magnetic element member  2  faces the circuit board. 
     The coil part  3  includes interlayer insulating films  50  to  54  and conductor layers L 1  to L 4  which are alternately stacked in the coil axis direction. The conductor layers L 1  to L 4  have coil patterns  10 ,  20 ,  30 , and  40 , respectively. 
       FIGS.  3  to  6    are plan views illustrating the conductor layers L 1  to L 4 , respectively. 
     As illustrated in  FIG.  3   , the conductor layer L 1  is formed on the surface of the interlayer insulating film  50  and includes the coil pattern  10  and a terminal pattern  12 . An outer peripheral end  11  of the coil pattern  10  has an enlarged area and overlaps the terminal electrode B 1  as viewed in the z-direction. The terminal pattern  12  is separated from the coil pattern  10  within the surface and overlaps the terminal electrode B 2  as viewed in the z-direction. The width in the x-direction of the outer peripheral end  11  of the coil pattern  10  is W 0 , and the width of the terminal pattern  12  in the x-direction is W 2 . The width W 0  is larger than the width W 2 . The thus configured conductor layer L 1  is covered with the interlayer insulating film  51 . 
     As illustrated in  FIG.  4   , the conductor layer L 2  is formed on the surface of the interlayer insulating film  51  and includes the coil pattern  20  and the terminal patterns  21  and  22 . The terminal patterns  21  and  22  are separated from the coil pattern  20  within the surface and overlap the terminal electrodes B 1  and B 2 , respectively, as viewed in the z-direction. The width of the terminal pattern  21  in the x-direction is W 1 , and the width of the terminal pattern  22  in the x-direction is W 2 . The width W 1  is larger than the width W 2 . The terminal pattern  21  is connected to the outer peripheral end  11  of the coil pattern  10  through a via conductor  61  penetrating the interlayer insulating film  51 . The inner peripheral end of the coil pattern  20  is connected to the inner peripheral end of the coil pattern  10  through a via conductor  62  penetrating the interlayer insulating film  51 . The thus configured conductor layer L 2  is covered with the interlayer insulating film  52 . 
     As illustrated in  FIG.  5   , the conductor layer L 3  is formed on the surface of the interlayer insulating film  52  and includes the coil pattern  30  and the terminal patterns  31  and  32 . The terminal patterns  31  and  32  are separated from the coil pattern  30  within the surface and overlap the terminal electrodes B 1  and B 2 , respectively, as viewed in the z-direction. The width of the terminal pattern  31  in the x-direction is W 1 , and the width of the terminal pattern  32  in the x-direction is W 2 . The width W 1  is larger than the width W 2 . The terminal pattern  31  is connected to the terminal pattern  21  through a via conductor  63  penetrating the interlayer insulating film  52 . The plane position of the via conductor  63  differs from the plane position of the via conductor  61 , thus preventing a recess of the conductor layer which may be caused due to stacking of via conductors. The outer peripheral end of the coil pattern  30  is connected to the outer peripheral end of the coil pattern  20  through a via conductor  64  penetrating the interlayer insulating film  52 . The thus configured conductor layer L 3  is covered with the interlayer insulating film  53 . 
     As illustrated in  FIG.  6   , the conductor layer L 4  is formed on the surface of the interlayer insulating film  53  and includes the coil pattern  40  and a terminal pattern  41 . An outer peripheral end  42  of the coil pattern  40  has an enlarged area and overlaps the terminal electrode B 2  as viewed in the z-direction. The terminal pattern  41  is separated from the coil pattern  40  within the surface and overlaps the terminal electrode B 1  as viewed in the z-direction. The width in the x-direction of the outer peripheral end  42  of the coil pattern  40  is W 3 , and the width in the x-direction of the terminal pattern  41  is W 1 . The width W 3  is larger than the width W 2 . The terminal pattern  41  is connected to the terminal pattern  31  through a via conductor  65  penetrating the interlayer insulating film  53 . The plane position of the via conductor  65  differs from the plane position of the via conductor  63 , thus preventing a recess of the conductor layer which may be caused due to stacking of via conductors. The inner peripheral end of the coil pattern  40  is connected to the inner peripheral end of the coil pattern  30  through a via conductor  66  penetrating the interlayer insulating film  53 . The thus configured conductor layer L 4  is covered with the interlayer insulating film  54 . 
     The bump terminal electrodes B 1  and B 2  are provided on the interlayer insulating film  54 . The terminal electrode B 1  is connected to the terminal pattern  41  through a via conductor  67  penetrating the interlayer insulating film  54 . The terminal electrode B 2  is connected to the outer peripheral end  42  of the coil pattern  40  through a via conductor  68  penetrating the interlayer insulating film  54 . The plane position of the via conductor  67  differs from the plane position of the via conductor  65 , thus preventing a recess of the conductor layer which may be caused due to stacking of via conductors. The plane size of the terminal electrode B 1  is larger than those of the terminal patterns  21 ,  31 , and  41 , and the plane size of the terminal electrode B 2  is larger than those of the terminal patterns  12 ,  22 , and  32 . 
     With the above configuration, the terminal electrode B 1  is connected to the outer peripheral end  11  of the coil pattern  10  through the terminal patterns  41 ,  31 , and  21 . The outer peripheral end  11  of the coil pattern  10  and the terminal patterns  21 ,  31 , and  41  are exposed from the side surface  2   b  of the magnetic element member  2 . The terminal electrode B 2  is connected to the outer peripheral end  42  of the coil pattern  40 . The terminal patterns  12 ,  22 , and  32  and the outer peripheral end  42  of the coil pattern  40  are exposed from the side surface  2   c  of the magnetic element member  2 . 
     In the present embodiment, the width W 1  of the terminal patterns  41 ,  31 , and  21  is larger than the width W 2  of the terminal patterns  32 ,  22 , and  12 , so that a resistance value between the terminal electrode B 1  and the outer peripheral end  11  of the coil pattern  10  is reduced. To further reduce this resistance value, the via conductors  61 ,  63 ,  65 , and  67  connecting the terminal electrode B 1  and the outer peripheral end  11  may be made larger in diameter than the other via conductors  62 ,  64 ,  66 , and  68 . For example, when the via conductors  61 ,  63 ,  65 , and  67  are made larger in diameter than the via conductor  68 , a difference between a resistance value between the terminal electrode B 1  and the coil pattern  10  and a resistance value between the terminal electrode B 2  and the coil pattern  40  is reduced. Further, the width W 1  of the terminal patterns  41 ,  31 , and  21  is enlarged, so that even if warpage occurs in a circuit board on which the coil component  1  is mounted, stress to be applied to the via conductors  61 ,  63 ,  65 , and  67  is relaxed, thereby increasing connection reliability. 
     In addition, a sufficient distance can be ensured between the via conductors  61 ,  63 ,  65 ,  67  and the side surface  2   b  in the x-direction, so that when misalignment occurs upon dicing of the coil component  1  for singulation, the via conductors  61 ,  63 ,  65 ,  67  are not exposed to the side surface  2   b.  The same point is valid in respect of the via conductor  68 . That is, the width W 3  of the outer peripheral end  42  of the coil pattern  40  is larger than the width W 2  of the terminal patterns  12 ,  22 , and  32 , so that the via conductor  68  is not exposed to the side surface  2   c  upon dicing. This increases connection reliability of the via conductors. 
     Further, the terminal patterns  12 ,  22 , and  32  are not connected to but isolated from one another. That is, via conductors need not be provided, so that a reduction in the width W 2  can be easily achieved. This can suppress an increase in chip size due to an increase in the width in the x-direction of the outer peripheral end  11  of the coil pattern  10  and terminal patterns  21 ,  31 , and  41 . The width W 2  of the terminal patterns  12 ,  22 , and  32  may be smaller than the pattern width of each of the coil patterns  10 ,  20 ,  30 , and  40 . The terminal patterns  12 ,  22 , and  32  may be omitted; however, in a case where the magnetic element member  2  is formed after formation of the bump terminal electrodes B 1  and B 2  in the manufacturing process of the coil component  1 , the terminal patterns  12 ,  22 , and  32  are required to be present to ensure the flatness of the outer peripheral end  42  of the coil pattern  40  serving as the underlayer of the terminal electrode B 2 . 
     The terminal patterns  12 ,  22 , and  32  each may not necessarily be a completely independent pattern but may be connected respectively to the coil patterns  10 ,  20 , and  30  within the respective surfaces. For example, as illustrated in  FIG.  7   , when both ends of the terminal pattern  22  in the y-direction are connected to the coil pattern  20 , current flows also in the terminal pattern  22 , thereby reducing the DC resistance of the coil part  3 . Similarly, the terminal patterns  12  and  32  may be connected at their both ends to the coil patterns  10  and  30 , respectively. In this case, as illustrated in  FIG.  8   , the terminal pattern  22  ( 12 ,  32 ) may not be exposed from the magnetic element member  2 . This increases the volume of the magnetic element member  2  and makes a short-circuit failure due to exposure of the terminal patterns  12 ,  22 , and  32  less likely to occur. 
     When the widths W 0  to W 3  vary depending on the position in the y-direction, they may each be defined by an average width. Further, the width W 1  may not necessarily be the same among the terminal patterns  21 ,  31 , and  41  and may vary thereamong as long as it is larger than the width W 2 . Similarly, the width W 2  may not necessarily be the same among the terminal patterns  12 ,  22 , and  32  and may vary thereamong as long as it is smaller than the width W 1 . The width W 0  of the outer peripheral end  11  of the coil pattern  10  and the width  3  of the outer peripheral end  42  of the coil pattern  40  may be the same as the width W 1 . 
     While the one embodiment of the present disclosure has been described, the present disclosure is not limited to the above embodiment, and various modifications may be made within the scope of the present disclosure, and all such modifications are included in the present disclosure. 
     For example, although the four conductor layers L 1  to l 4  are stacked through the interlayer insulating films in the above embodiment, the number of conductor layers to be stacked is not limited to this, and a three-layer structure or a five or more-layer structure can be employed. 
     The technology according to the present disclosure includes the following configuration examples but not limited thereto. 
     A coil component according to the present disclosure includes: a coil part in which a plurality of interlayer insulating films and a plurality of conductor layers each having a coil pattern are alternately stacked; and first and second terminal electrodes stacked on the coil part. The plurality of conductor layers includes: a first conductor layer positioned in the lowermost layer; a second conductor layer positioned in the uppermost layer; and one or more third conductor layers positioned between the first and second conductor layers. The second and third conductor layers each include a first terminal pattern overlapping one end of the coil pattern positioned in the first conductor layer and the first terminal electrode. The first and third conductor layers each include a second terminal pattern overlapping one end of the coil pattern positioned in the second conductor layer and the second terminal electrode. The one end of the coil pattern positioned in the first conductor layer and the first terminal patterns positioned in the respective second and third conductor layers are connected to one another through via conductors penetrating the interlayer insulating films. The first terminal pattern positioned in the second conductor layer and the first terminal electrode are connected to each other through a via conductor penetrating the interlayer insulating film. The one end of the coil pattern positioned in the second conductor layer and the second terminal electrode are connected to each other through a via conductor penetrating the interlayer insulating film. The width in the radial direction of the first terminal pattern positioned in the third conductor layer is larger than the width in the radial direction of the second terminal pattern positioned in the third conductor layer. 
     According to the present disclosure, the first terminal pattern poisoned in the third conductor layer is enlarged in area, so that the resistance value between the one end of the coil pattern positioned in the first conductor layer and the first terminal electrode can be reduced. Further, the second terminal pattern positioned in the third conductor layer is reduced in area, so that increase in the plane size of the entire coil component can be suppressed. Furthermore, when the coil component is diced for singulation, it is possible to ensure a sufficient margin between the via conductor connected to the first terminal pattern and a dicing line. 
     In the present disclosure, the width in the radial direction of the one end of the coil pattern positioned in the second conductor layer may be larger than the widths in the radial direction of the second terminal patterns positioned in the respective first and third conductor layers. Thus, when the coil component is diced for singulation, it is possible to ensure a sufficient margin between the via conductors connected to the second terminal patterns and a dicing line. 
     In the present disclosure, the one end of the coil pattern positioned in the second conductor layer and the second terminal patterns positioned in the respective first and third conductor layers may be isolated without being connected to one another through via conductors. This eliminates the need to provide via conductors for connecting them, which in turn eliminates the need to ensure a margin between the via conductors and a dicing line. 
     The coil component according to the present disclosure may further include a magnetic element member embedding therein the coil part and the first and second terminal electrodes, and the first and second terminal patterns may be exposed from the magnetic element member. This improves heat dissipation performance. 
     As described above, according to the present disclosure, it is possible to reduce a difference between a connection resistance between one terminal electrode and its corresponding coil pattern and a connection resistance between the other terminal electrode and its corresponding coil pattern.