Patent Publication Number: US-2003227341-A1

Title: Voltage-controlled oscillator and frequency synthesizer

Description:
BACKGROUND OF THE INVENTION  
       [0001] The present invention relates to voltage-controlled oscillators, which are used for semiconductor integrated circuits in the radio communications field for generating local frequencies necessary for transmission/reception of radio waves, and to frequency synthesizers including such voltage-controlled oscillators. More particularly, the invention relates to expansion of the oscillation frequency range and improvement of the characteristics of the frequency synthesizers required for broadband radio frequencies used in digital TV broadcasting and the like.  
       [0002]FIG. 11 shows a conventional voltage-controlled oscillator. The conventional voltage-controlled oscillator shown in the figure is a circuit example presented in 2001 ISSCC Digest of Technical Paper pp. 364-365, and includes tank circuits  1  and a negative resistance generating circuit  4  that generates a negative resistance.  
       [0003] Each of the tank circuits  1  is formed by an inductor  2  and a variable capacitor circuit group  3 . The variable capacitor circuit group  3  is formed by a first variable capacitor circuit  31  having a variable capacitor element C v1  whose capacitance varies continuously in accordance with a voltage V cont  of a frequency control signal CONT, and a second variable capacitor circuit  50 . The second variable capacitor circuit  50  is formed by switching transistors S 50  and S 51  controlled by two-bit frequency band control signals BIT 0  and BIT 1 , and fixed capacitors C f0  and C f1  connected in series to the switching transistors S 50  and S 51 . The capacitances of the fixed capacitors C f0  and C f1  are set to satisfy the relationship C f1 =2·C f0 . The negative resistance generating circuit  4  is formed by two cross-coupled transistors M 1  and a current source transistor M 2  that determines the current that passes though the circuit.  
       [0004] In the conventional voltage-controlled oscillator having such a configuration, a current is supplied by applying a predetermined bias to the current source transistor M 2 , and a pair of output terminals OUTA and OUTB start to oscillate at mutually inverted electric potentials when the value of this current exceeds a predetermined value. The oscillation frequency at this time is given by the following Equation (1):  
             f   =       1     2      π       ·     1       L   ·     (       C   V     +     C     f                 all       +     C   p       )                     (   1   )                       
 
       [0005] where L is the inductance of the inductor  2 , C v  is the capacitance of the variable capacitor element C v1  of the first variable capacitor circuit  31 , C f all  is the total capacitance of the fixed capacitors C f0  and C f1  additionally connected to the output terminals OUTA and OUTB by the frequency band control signals BIT 0  and BIT 1 , and C p  is the total parasitic capacitance associated with the wiring and the gate capacitance and drain capacitance of the cross-coupled transistors M 1 .  
       [0006] The oscillation frequency characteristics of this conventional voltage-controlled oscillator are show in FIG. 12. When the frequency band control signals BIT 0  and BIT 1  are BIT [1:0]=0, 0, the fixed capacitors C f0  and C f1  are disconnected from the output terminals, so that the voltage-controlled oscillator oscillates in the highest oscillation frequency band. When the frequency band control signals BIT 0  and BIT 1  are BIT [1:0]=0, 1, BIT [1:0]=1, 0, and BIT [1:0]=1, 1, the total value of the fixed capacitors that are added as offset capacitors connected to the output terminals OUTA and OUTB increases, so that the voltage-controlled oscillator oscillates in a lower oscillation frequency band.  
       [0007] However, in the above-described conventional voltage-controlled oscillator, the oscillation frequency band is reduced. That is, the relative capacitance of the variable capacitor element C v1  of the first variable capacitor circuit  31  to the whole capacitance decreases with an increase in the total value C f all  of the fixed capacitors added by the second variable capacitor circuit  50 , so that when the variable capacitor element C v1  of the first variable capacitor circuit  31  is varied over a predetermined amount, the variable bandwidth of the oscillation frequency corresponding to this capacitance variation decreases in the lower frequency bands. Consequently, it has been impossible to achieve a large oscillation frequency range for the voltage-controlled oscillator as a whole.  
       [0008] Furthermore, the above-described reduction in oscillation frequency range in the lower frequency bands leads to a decrease in the ratio (VCO gain) of the change in the oscillation frequency with respect to the change of the voltage V cont  of the frequency control signal CONT. This causes a decrease in the VCO gain in lower oscillation frequency bands with respect to the VCO gain in higher oscillation frequency bands, resulting in a problem of increased variations in the VCO gain between two oscillation frequency bands. Consequently, when a phase-locked frequency synthesizer is configured by using such a voltage-controlled oscillator, the loop characteristics of the phase-locked frequency synthesizer vary depending on the oscillation frequency band, causing variations in phase noise characteristics, spurious characteristics, lock-up time and other characteristics of the phase-locked frequency synthesizer and thus resulting in a deterioration of the characteristics.  
       SUMMARY OF THE INVENTION  
       [0009] Therefore, with the foregoing in mind, it is an object of the present invention to ensure a sufficiently broad variable range of the oscillation frequency of a voltage-controlled oscillator according to a capacitance change even in lower oscillation frequency bands, while increasing the VCO gain in lower oscillation frequency bands to reduce variations in the VCO gain between higher and lower oscillation frequency bands to a low level.  
       [0010] In order to achieve the above-described object, the present invention adopts a configuration in which a variable capacitance, which varies in accordance with a change in electric potential of a frequency control signal, is changed to a larger capacitance in lower oscillation frequency bands.  
       [0011] Specifically, the present invention provides a voltage-controlled oscillator comprising: a tank circuit including an inductor and a variable capacitor circuit group, wherein a capacitance of the variable capacitor circuit group is selected based on N-bit frequency band control signals in such a manner that an oscillation frequency band is controlled; a negative resistance generating circuit for generating a negative resistance; and a capacitor selecting circuit that performs logical processing of the N-bit frequency band control signals and outputs a result of the processing as capacitor selecting signals, wherein the variable capacitor circuit group comprises: a first variable capacitor circuit including a first variable capacitor element whose capacitance varies continuously in accordance with a voltage of a frequency control signal; and a second variable capacitor circuit including a unit variable capacitor circuit having a switching circuit controlled by the capacitor selecting signal and a second variable capacitor element connected in series to the switching circuit and whose capacitance varies continuously in accordance with the voltage of the frequency control signal.  
       [0012] Additionally, in the above-described voltage-controlled oscillator according to the present invention, the second variable capacitor circuit includes N unit variable capacitor circuits and the capacitances of the second variable capacitor elements of the respective unit variable capacitor circuits are different from one another; and the capacitor selecting circuit outputs logic levels of the N-bit frequency band control signals directly as the capacitor selecting signals.  
       [0013] Further, in the above-described voltage-controlled oscillator according to the present invention, the second variable capacitor circuit includes 2 N -1 unit variable capacitor circuits; the capacitor selecting circuit outputs a number of activated capacitor selecting signals that is equal to a decimal value of the N-bit frequency band control signals; and a total capacitance of the second variable capacitor elements selected via the switching circuits by the capacitor selecting signal is set to vary for different capacitor selecting signals.  
       [0014] The present invention also provides a frequency synthesizer comprising: the above-described voltage-controlled oscillator; a frequency divider circuit that divides an oscillation frequency signal of the voltage-controlled oscillator at a frequency division ratio set by a frequency division ratio determining signal; a phase difference detecting circuit that detects a phase difference between a frequency signal divided by the frequency divider circuit and a reference frequency signal; a charge pump circuit that outputs an electric charge corresponding to an output of the phase difference detecting circuit; and a low-pass filter that passes only low frequency components of an output of the charge pump circuit and outputs these components as the frequency control signal to the voltage-controlled oscillator.  
       [0015] The present invention also provides a voltage-controlled oscillator comprising: a tank circuit including an inductor and a variable capacitor circuit group, wherein a capacitance of the variable capacitor circuit group is selected based on N-bit frequency band control signals in such a manner that an oscillation frequency band is controlled; a negative resistance generating circuit for generating a negative resistance; and a capacitor selecting circuit that performs logical processing of the N-bit frequency band control signals and outputs a result of the processing as capacitor selecting signals, wherein the variable capacitor circuit group comprises: a first variable capacitor circuit including a first variable capacitor element whose capacitance varies continuously in accordance with a voltage of a frequency control signal; a second variable capacitor circuit including a unit variable capacitor circuit having a first switching circuit controlled by the capacitor selecting signal and a second variable capacitor element connected in series to the first switching circuit and whose capacitance varies continuously in accordance with the voltage of the frequency control signal; and a third variable capacitor circuit including a unit fixed capacitor circuit having a second switching circuit controlled by the capacitor selecting signal and a fixed capacitor element connected to an analog ground wire via the second switching circuit.  
       [0016] Further, in the above-described voltage-controlled oscillator according to the present invention, the second variable capacitor circuit includes N unit variable capacitor circuits and the capacitances of the second variable capacitor elements of the respective unit variable capacitor circuits are different from one another; the third variable capacitor circuit includes N unit fixed capacitor circuits and the capacitances of the unit fixed capacitor elements of the respective unit fixed capacitor circuits are different from one another; and the capacitor selecting circuit outputs logic levels of the N-bit frequency band control signals directly as the capacitor selecting signals.  
       [0017] Additionally, in the above-described voltage-controlled oscillator according to the present invention, the second variable capacitor circuit includes 2 N -1 unit variable capacitor circuits; the third variable capacitor circuit includes 2 N -1 unit fixed capacitor circuits; the capacitor selecting circuit outputs a number of activated capacitor selecting signals that is equal to a decimal value of the N-bit frequency band control signals; a total capacitance of the second variable capacitor elements selected via the first switching circuits by the capacitor selecting signal is set to vary for different capacitor selecting signals; and a total capacitance of the fixed capacitor elements selected via the second switching circuits by the capacitor selecting signal is set to vary for different capacitor selecting signals.  
       [0018] Furthermore, the present invention provides a frequency synthesizer comprising: the above-described voltage-controlled oscillator; a frequency divider circuit that divides an oscillation frequency signal of the voltage-controlled oscillator at a frequency division ratio set by a frequency division ratio determining signal; a phase difference detecting circuit that detects a phase difference between a frequency signal divided by the frequency divider circuit and a reference frequency signal; a charge pump circuit that outputs an electric charge corresponding to an output of the phase difference detecting circuit; and a low-pass filter that passes only low frequency components of an output of the charge pump circuit and outputs these components as the frequency control signal to the voltage-controlled oscillator.  
       [0019] As described above, in the voltage-controlled oscillator according to the present invention, the capacitance is changed only with a first variable capacitor circuit having a first variable capacitor element in the higher oscillation frequency bands. In the lower oscillation frequency bands, on the other hand, the capacitance is changed also with a second variable capacitor circuit having a second variable capacitor element, as well as with the first variable capacitor circuit. The oscillation frequency band can therefore be changed with a larger capacitance in the lower oscillation frequency bands than in the higher oscillation frequency bands, so that a sufficiently broad variable range of oscillation frequencies can be ensured, which in turn increases the VCO gain in the lower oscillation frequency bands, thereby reducing variations in the VCO gain between higher and lower oscillation frequency bands to a low level.  
       [0020] Moreover, the voltage-controlled oscillator according to the present invention further includes a third variable capacitor circuit having a fixed capacitor element, in addition to the second variable capacitor circuit having the second variable capacitor element. Therefore, it can appropriately adjust the relationship between offset capacitance components and variable capacitance components in lower oscillation frequency bands, thereby reducing variations in the VCO gain between higher and lower oscillation frequency bands to an even lower level.  
       [0021] Furthermore, the frequency synthesizer according to the present invention is configured by using the above-described voltage-controlled oscillator that has broad variable oscillation frequency bands and smaller variations in the VCO gain between higher and lower oscillation frequency bands. Therefore, its loop characteristics are substantially the same in higher and lower oscillation frequency bands, so that it is possible to obtain a high-performance frequency synthesizer with smaller variations in phase noise characteristics, spurious characteristics, lock-up time and the like. 
     
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0022]FIG. 1 is a diagram showing a circuit configuration of a voltage-controlled oscillator according to Embodiment 1 of the present invention.  
     [0023]FIG. 2 is a graph showing the oscillation frequency characteristics of the same voltage-controlled oscillator.  
     [0024]FIG. 3 is a diagram showing a circuit configuration of a voltage-controlled oscillator according to Embodiment 2 of the present invention.  
     [0025]FIG. 4 is a graph showing the oscillation frequency characteristics of the same voltage-controlled oscillator.  
     [0026]FIG. 5 is a diagram showing a circuit configuration of a voltage-controlled oscillator according to Embodiment 3 of the present invention.  
     [0027]FIG. 6 is a graph showing the oscillation frequency characteristics of the same voltage-controlled oscillator.  
     [0028]FIG. 7 is a diagram showing a circuit configuration of a voltage-controlled oscillator according to Embodiment 4 of the present invention.  
     [0029]FIG. 8 is a graph showing the oscillation frequency characteristics of the same voltage-controlled oscillator.  
     [0030]FIG. 9 is a graph showing results of comparison of the VCO gain characteristics of the voltage-controlled oscillators according to Embodiments 1 and 3 of the present invention with the VCO gain characteristics of a conventional voltage-controlled oscillator.  
     [0031]FIG. 10 is a diagram showing a block configuration of a frequency synthesizer according to Embodiment 5 of the present invention.  
     [0032]FIG. 11 is a diagram showing a circuit configuration of a conventional voltage-controlled oscillator.  
     [0033]FIG. 12 is a graph showing the oscillation frequency characteristics of the same conventional voltage-controlled oscillator. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION  
     [0034] Hereinbelow, preferred embodiments of the present invention are described with reference to the appended drawings.  
     Embodiment 1  
     [0035]FIG. 1 shows a circuit configuration of a voltage-controlled oscillator according to Embodiment 1 of the present invention.  
     [0036] The voltage-controlled oscillator shown in the figure is formed by tank circuits  1  that determine the oscillation frequency, a negative resistance generating circuit  4  and a capacitor selecting circuit  5 . The negative resistance generating circuit  4  generates a negative resistance to compensate any loss of the tank circuits  1 , thereby enabling oscillation.  
     [0037] Each of the tank circuits  1  is formed by an inductor  2  and a variable capacitor circuit group  3 . The negative resistance generating circuit  4  is formed by two cross-coupled transistors M 1  and a current source transistor M 2 . The capacitor selecting circuit  5  performs logical processing of N-bit (two-bit, in the figure) frequency band control signals BIT 0  and BIT 1 , and outputs the result of the processing as capacitor selecting signals SEL 0  and SEL 1 . Specifically, in this embodiment, the capacitor selecting circuit  5  has buffers  5   a  and  5   b  that receive the frequency band control signals BIT 0  and BIT 1 , respectively, and outputs the logic levels of the received frequency band control signals BIT 0  and BIT 1  from the buffers  5   a  and  5   b  directly as the capacitor selecting signals SEL 0  and SEL 1 .  
     [0038] The variable capacitor circuit group  3  of the tank circuit  1  is formed by a first variable capacitor circuit  31  and a second variable capacitor circuit  32 . The first variable capacitor circuit  31  has a first variable capacitor element C v1  whose capacitance varies continuously in accordance with a voltage V cont  of the frequency control signal CONT. The second variable capacitor circuit  32  includes switching circuits S 20  and S 21  controlled by the capacitor selecting signals SEL 0  and SEL 1 , and N (N=2 in this embodiment) unit variable capacitor circuits  32   a  that are formed by second variable capacitor elements C v20  and C v21  connected in series to the switching circuits S 20  and S 21 , respectively. Like the first variable capacitor element C v1 , also the capacitances of the second variable capacitor elements C v20  and C v21  vary continuously in accordance with a voltage V cont  of the frequency control signal CONT.  
     [0039] Specifically, the first variable capacitor element C v1  of the first variable capacitor circuit  31  can be realized by connecting an accumulation-mode MOS varactor between the frequency control signal CONT and the output terminals OUTA and OUTB. The switching circuits S 20  and S 21  of the second variable capacitor circuit  32  are formed by: CMOS switching circuits having an NMOS transistor whose gate is connected to the frequency band control signal BIT 0  or BIT 1  and a PMOS transistor whose gate is connected to the inverted signal of the frequency band control signal BIT 0  or BIT 1 ; and a PMOS transistor and a resistor for fixing the electric potential at the node that leads to the second variable capacitor elements C v20  and C v21  when the CMOS switching circuit is OFF. The second variable capacitor elements C v20  and C v21  are formed by accumulation-mode varactors connected between the CMOS switching circuits and the output terminals OUTA and OUTB.  
     [0040] Here, the capacitances of the second variable capacitor elements C v20  and C v21  (hereinafter, denoted by the same reference symbols as the capacitor elements) are different from one another, and are set to C v20 &lt;C v21 .  
     [0041] Next, the operation of the voltage-controlled oscillator shown in FIG. 1 is described. When a predetermined constant voltage is applied to the gate of the current source transistor M 2 , a current corresponding to that voltage is passed through the current source transistor M 2  and the cross-coupled transistors M 1 . When this current exceeds a predetermined current value, an oscillation having mutually inverted electric potentials at the output terminals OUTA and OUTB is generated.  
     [0042] The oscillation frequency at this time is given by the following Equation (2):  
             f   =       1     2      π       ·     1       L   ·     (       C   V1     +     C     V2                 all       +     C   p       )                     (   2   )                       
 
     [0043] where L is the inductance of the inductor  2 , C v1  is the capacitance of the first variable capacitor element C v1 , C v2 all  an is the total capacitance of the second variable capacitor elements C v20  and C v21  additionally connected to the output terminals OUTA and OUTB by the second variable capacitor circuit  32 , and C p  is the total parasitic capacitance at the output terminals OUTA and OUTB due to the wiring and the gate capacitance and drain capacitance of the cross-coupled transistors M 1 .  
     [0044] When the frequency band control signals BIT 0  and BIT 1  are BIT [1:0]=0, 0, the capacitor selecting signals SEL 0  and SEL 1  are SEL [1:0]=0, 0. At this time, the second variable capacitor elements C v20  and C v21  are not selected, and C v2 all =0. Accordingly, only the capacitance of the first variable capacitor element C v1  serves as the variable capacitance that determines the oscillation frequency.  
     [0045] Likewise, only the second variable capacitor element C v20  is selected when the frequency band control signals BIT 0  and BIT 1  are BIT [1:0]=0, 1; only the second variable capacitor element C v21  is selected when BIT [1:0]=1, 0; and both of the second variable capacitor elements C v20  and C v21  are selected when BIT [1:0]=1, 1, with the variable capacitances in these cases being C v1 +C v20 , C v1 +C v21  (&gt;C v1 +C v20 ) and C v1 +C v20 +C v21  (&gt;C v1 +C v21 ), respectively. As is clear from this, it is possible to realize a voltage-controlled oscillator in which the variable capacitance used for changing the oscillation frequency band is increased as the bit value of the frequency band control signals BIT 0  and BIT 1  increases.  
     [0046]FIG. 2 shows results of simulating the relationship between the oscillation frequency and the voltage V cont  of the frequency control signal CONT of the voltage-controlled oscillator according to this embodiment. Here, in the voltage-controlled oscillator according to this embodiment, the capacitance is changed with variable capacitors having increasingly larger variable ranges in lower oscillation frequency bands, so that the lower oscillation frequency bands are not reduced as in the conventional voltage-controlled oscillator shown in FIG. 12. Instead, the lower oscillation frequency bands are expanded, making it possible to achieve a variable range of oscillation frequencies that is broader than that of the conventional voltage-controlled oscillator. Moreover, since the variable range of oscillation frequencies is expanded in the lower oscillation frequency bands, variations in the VCO gain between higher and lower oscillation frequency bands are reduced.  
     Embodiment 2  
     [0047]FIG. 3 shows a circuit configuration of a voltage-controlled oscillator according to Embodiment 2 of the present invention.  
     [0048] The voltage-controlled oscillator shown in the figure differs from Embodiment 1 shown in FIG. 1 in that one unit variable capacitor circuit  32   a  has been added in the second variable capacitor circuit  32 , i.e., the second variable capacitor circuit  32  is formed by three (2 N -1, N=2) unit variable capacitor circuits  32   a.  Also the added unit variable capacitor circuit  32   a  is formed by a switching circuit S 22  and a second variable capacitor element C v22  connected in series to the switching circuit S 22 , like the other unit variable capacitor circuits  32   a.    
     [0049] A capacitor selecting circuit  5 ′ outputs a number of the capacitor selecting signals SEL 0 , SEL 1  and SEL 2  that is equal to the number (three) of unit variable capacitor circuits  32   a  of the second variable capacitor circuit  32 . The capacitor selecting circuit  5 ′ contains an OR circuit  5 ′ a  and an AND circuit  5 ′ b.  The OR circuit  5 ′ a  and the AND circuit  5 ′ b  receive the frequency band control signals BIT 0  and BIT 1  and output the capacitor selecting signals SEL 0  and SEL 2 , respectively. The logic level of the frequency band control signal BIT 1  is taken directly as the capacitor selecting signal SEL 1 .  
     [0050] That is, the capacitor selecting circuit  5 ′ is configured so as to inactivate (set to 0 level) all the capacitor selecting signals SEL 0 , SEL 1  and SEL 2  when the frequency band control signals are BIT [1:0]=0, 0 (0 in decimal value), to activate (set to 1 level) only the one capacitor selecting signal SEL 0  when BIT [1:0]=0, 1 (1 in decimal value), to activate the two capacitor selecting signals SEL 0  and SEL 1  when BIT [1:0]=1, 0 (2 in decimal value), and to activate all the (three) capacitor selecting signals SEL 0 , SEL 1  and SEL 2  when BIT [1:0]=1, 1 (3 in decimal value).  
     [0051] Accordingly, the total capacitances when the frequency band control signals are BIT [1:0]=0, 0, BIT [1:0]=0, 1, BIT [1:0]=1, 0, and BIT [1:0]=1, 1 are C v1 , C v1 +C v20 , C v1 +C v20 +C v21 , and C v1 +C v20 +C 21 +C 22 , respectively, with the capacitances increasing in this order. The variable capacitance is the same as that of the voltage-controlled oscillator according to Embodiment 1 shown in FIG. 1 when the frequency band control signals are BIT [1:0]=0, 0 and BIT [1:0]=0, 1. However, when the frequency band control signals are BIT [1:0]=1, 0 and BIT [1:0]=1, 1, the variable capacitance is larger than that of the voltage-controlled oscillator according to Embodiment 1. That is, the variable capacitance is larger than that of Embodiment 1 by the capacitance of the variable capacitor element C v20  when the frequency band control signals are BIT [1:0]=1, 0, and by the capacitance of the variable capacitor C v22  device when they are BIT [1:0]=1, 1.  
     [0052] Therefore, as is clear from results of simulating the oscillation frequency characteristics of the voltage-controlled oscillator according to Embodiment 2 shown in FIG. 4, the lower oscillation frequency bands are more expanded than those of Embodiment 2 shown in FIG. 2, expanding the variable range of the oscillation frequency of the voltage-controlled oscillator further.  
     Embodiment 3  
     [0053]FIG. 5 shows a circuit configuration of a voltage-controlled oscillator according to Embodiment 3 of the present invention. The voltage-controlled oscillator according to this embodiment differs from the voltage-controlled oscillator according to Embodiment 1 shown in FIG. 1 in that a third variable capacitor circuit  33  is provided in the third variable capacitor circuit group  3 , in addition to the first and second variable capacitor circuits  31  and  32 . The first variable capacitor circuit  31  has the first variable capacitor element C v1  whose capacitance varies continuously in accordance with a voltage V cont  of the frequency control signal CONT. The second variable capacitor circuit  32  has N (=2) switching circuits (first switching circuits) S 20  and S 21 , and N (=2) second variable capacitor elements C v20  and C v21  connected in series to the switching circuits S 20  and S 21 . The capacitances of the variable capacitor elements C v20  and C v21  are different from one another, and are set to satisfy the relationship C v20 &lt;C v21 .  
     [0054] The third variable capacitor circuit  33  includes N (=2) unit fixed capacitor circuits  33   a.  The unit fixed capacitor circuits  33   a  each have a switching circuit (second switching circuit) S 30  or S 31  controlled by the N (=2) bit capacitor selecting signals SEL 0  and SEL 1 , and a fixed capacitor element C f0  or C f1  connected to an analog ground wire, via the switching circuits S 30  and S 31 . The capacitances of the fixed capacitor elements C f0  and C f1  are set to be different from one another. The internal configuration of the capacitor selecting circuit  5  is identical to that of the capacitor selecting circuit  5  according to the voltage-controlled oscillator of Embodiment 1 shown in FIG. 1.  
     [0055] In the voltage-controlled oscillator according to this embodiment, the oscillation frequency band is set by the combination of the fixed capacitor elements C f0  and C f1  with the variable capacitor elements C v20  and C v21 . In this case, the oscillation frequency is given by the following Equation (3):  
             f   =       1     2      π       ·     1       L   ·     (       C   V1     +     C     V2                 all       +     C     f                 all       +     C   p       )                     (   3   )                       
 
     [0056] where C f all  is the total capacitance of the fixed capacitor element C f0  and C f1  additionally connected to the output terminals OUTA and OUTB.  
     [0057] In this embodiment, it is therefore possible to adjust the relationship between the capacitance C v1 +C v2 all  serving as a variable capacitance component and the capacitance C f all +C p  serving as a fixed capacitance component. Accordingly, as is clear from results of simulating the oscillation frequency characteristics of the voltage-controlled oscillator according to this embodiment shown in FIG. 6, it is possible to expand the oscillation frequency range in lower oscillation frequency bands, while further reducing variations in the VCO gain between higher and lower oscillation frequency bands to a lower level than in the voltage-controlled oscillator shown in FIG. 1.  
     Embodiment 4  
     [0058]FIG. 7 shows a circuit configuration of a voltage-controlled oscillator according to Embodiment 4 of the present invention.  
     [0059] In the voltage-controlled oscillator according to this embodiment, the second variable capacitor circuit  32  is formed by three (2 N -1, N=2) unit variable capacitor circuits  32   a,  and the third variable capacitor circuit  33  is formed by three (2 N -1, N=2) unit fixed capacitor circuits  33   a  , each including fixed capacitor elements C f0 , C n  and C f2  having capacitances different from one another. Additionally, like the voltage-controlled oscillator according to Embodiment 2 shown in FIG. 3, the capacitor selecting circuit  5 ′ has a configuration identical to that of the capacitor selecting circuit  5 ′, which outputs three (2 N -1, N=2) capacitor selecting signals SEL 0  to SEL 2 .  
     [0060] The voltage-controlled oscillator according to this embodiment can therefore have a larger variable capacitance as a variable capacitance component in the lower oscillation frequency bands. Accordingly, as is clear from results of simulating the oscillation frequency characteristics of the voltage-controlled oscillator according to this embodiment shown in FIG. 8, the lower oscillation frequency bands are more expanded, making it possible to achieve a broader variable range of oscillation frequencies of the voltage-controlled oscillator as a whole, as compared with Embodiment 3 shown in FIG. 5. At the same time, like the above-described Embodiment 3, it is possible to adjust the relationship between the variable capacitance components and the fixed capacitance components. Accordingly, it is possible to effectively reduce variations in the VCO gain between higher and lower oscillation frequency bands to a low level.  
     [0061]FIG. 9 shows the maximum values of the VCO gain in the oscillation frequency bands of the voltage-controlled oscillators of the above-described Embodiments 1 and 3 and the conventional example. It should be noted that the figure shows the maximum values normalized to the maximum values of the VCO gain obtained when the frequency band control signals are BIT [1:0]=0, 0. As is evident from the figure, variations in the VCO gain decrease in the following order: conventional example shown in FIG. 12 &gt;Embodiment 1&gt;Embodiment 3.  
     [0062] Although the frequency band control signals BIT 1  and BIT 2  were composed of two bits in the above descriptions of the voltage-controlled oscillators according to Embodiments 1 to 4, the present invention is not limited thereto, and they may of course be composed of one bit or three or more bits.  
     [0063] Although the negative resistance generating circuit  4  was formed by the NMOS cross-coupled transistors M 1  and the NMOS current source transistor M 2 , it may of course be formed by, for example, PMOS cross-coupled transistors or cross-coupled transistors using both PMOS and NMOS transistors and a PMOS current source transistor. Alternatively, it may use bipolar transistors. In addition, it is not necessary that the negative resistance generating circuit  4  be formed by cross-coupled transistors and a current source transistor.  
     [0064] Further, although accumulation-mode MOS varactors were used as the variable capacitor elements C v1 , C v20 , C v21  and C v22 , any other device whose capacitance varies in accordance with a voltage difference between two terminals, for example, NMOS transistors, PMOS transistors or PN junctions may be used.  
     Embodiment 5  
     [0065]FIG. 10 shows a block diagram of a frequency synthesizer using the voltage-controlled oscillator according to the present invention.  
     [0066] In the frequency synthesizer shown in the figure, VCO denotes the voltage-controlled oscillators according to the above-described Embodiments 1 to 4. DV denotes a frequency divider circuit, whose frequency division ratio 1/N is set by a frequency division ratio determining signal S D , and an oscillation frequency signal f OUT  of the voltage-controlled oscillator VCO is divided at the set frequency division ratio 1/N. PD denotes a phase difference detecting circuit, which detects a phase difference between the oscillation frequency signal divided by the frequency divider circuit DV and a reference frequency signal f REF . CP denotes a charge pump circuit, which outputs an electric charge corresponding to an output of the phase difference detecting circuit PD. LPF denotes a low-pass filter, which passes only low frequency components of the output of the charge pump circuit CP and outputs these components as the frequency control signal CONT to the voltage-controlled oscillator VCO.  
     [0067] As described above, in the frequency synthesizer according to this embodiment, the voltage-controlled oscillator VCO has a very broad oscillation frequency band, so that it is possible to configure a frequency synthesizer that covers this broad frequency band.  
     [0068] Moreover, since it uses the voltage-controlled oscillator VCO in which variations in the VCO gain between higher and lower frequency, bands are small, it is possible to reduce variations in the loop characteristics of the frequency synthesizer itself, thereby configuring a high-performance frequency synthesizer with smaller variations in phase noise characteristics, reference spurious characteristics, lock-up time and the like.  
     [0069] The invention may be embodied in other forms without departing from the spirit or essential characteristics thereof The embodiments disclosed in this application are to be considered in all respects as illustrative and not limiting. The scope of the invention is indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are intended to be embraced therein.