Patent Publication Number: US-10311784-B2

Title: Pixel driver circuit, display device and pixel driving method

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is the U.S. national phase of PCT Application No. PCT/CN2016/089922 filed on Jul. 13, 2016, which claims priority to Chinese Patent Application No. 201610157872.8 filed on Mar. 18, 2016, the disclosures of which are incorporated in their entirety by reference herein. 
     TECHNICAL FIELD 
     The present disclosure relates to the field of pixel driving technology, in particular to a pixel driver circuit, a display device and a pixel driving method. 
     BACKGROUND 
     In the related art, for a pixel driver circuit which controls a working current through a current source, a turning-on degree of a driving transistor is usually controlled by a capacitor structure at a display stage. After a grayscale value of a subpixel has been determined, a target current I target  flowing through the driving transistor is determined too. However, at a charging stage, a current generated by the current source is equal to I target . In this way, it is impossible for the driver circuit to be applied to a display panel having a high resolution. In addition, in the case that this driver circuit is applied to a display panel having a low resolution, an effective display time period is reduced as well as a display effect may be deteriorated. 
     SUMMARY 
     An object of the present disclosure is to provide a pixel driver circuit, a display device and a pixel driving method, so as to improve the display effect. 
     In one aspect, the present disclosure provides in some embodiments a pixel driver circuit for driving a light-emitting element in a pixel structure, including: a driving transistor T 1  connected in series to the light-emitting element, a drain electrode of which is connected to a first power source signal input end VDD; a capacitor C, a first end of which is connected to a gate electrode of the driving transistor T 1 , and a second end of which is connected to a source electrode of the driving transistor T 1 ; and a charging circuit at least including a current source and configured to charge the capacitor C at a charging stage. Within at least a part of time period of the charging stage, an intensity of a charging current for charging the capacitor C is greater than an intensity of a target current, and after the charging stage, a voltage difference across the capacitor C is equal to a target voltage difference. The target voltage difference is a gate-to-source voltage difference of the driving transistor T 1  in the case that the light-emitting element emits light at a preset brightness value at a light-emitting stage. The target current is a current flowing through the driving transistor T 1  in the case that the light-emitting element emits the light at the preset brightness value at the light-emitting stage. 
     In a possible embodiment of the present disclosure, the charging circuit includes: at least one current control transistor T 2  connected in parallel to the driving transistor T 1 , a gate electrode of which is connected to the first end of the capacitor C and a source electrode of which is connected to the second end of the capacitor C; the current source capable of generating a current at an intensity greater than the target current and arranged between a second power source signal input end VSS and a first common node N 1  connected to the source electrode of the driving transistor T 1 , the source electrode of the current control transistor T 2  and the second end of the capacitor C; and a control unit configured to control the current control transistor T 2  and the current source to charge the capacitor C at the charging stage, and control the current control transistor T 2  and the current source to stop charging the capacitor C at a display stage. 
     In a possible embodiment of the present disclosure, the control unit includes: a first switching unit configured to turned on at the charging stage so as to electrically connect the first power source signal input end VDD to the source electrode and a drain electrode of the current control transistor T 2  to the first end of the capacitor C, and configured to be turned off at the light-emitting stage; and a second switching unit arranged between the second power source signal input end VSS and the first common node N 1 , connected in series to the current source, and configured to be turned on at the charging stage and turned off at the light-emitting stage. 
     In a possible embodiment of the present disclosure, the first switching unit includes a first thin film transistor (TFT) M 1  configured to be turned on at the charging stage and turned off at the light-emitting stage, a drain electrode of which is connected to the first power source signal input end VDD, and a source electrode of which is connected to a second common node N 2  connected to the drain electrode and the gate electrode of the current control transistor T 2  and the first end of the capacitor C. 
     In a possible embodiment of the present disclosure, the first switching unit includes: a second TFT M 2  configured to be turned on at the charging stage and turned off at the light-emitting stage, a drain electrode of which is connected to the first power source signal input end VDD, and a source electrode of which is connected to the drain electrode of the current control transistor T 2 ; and a second TFT M 3  configured to be turned on at the charging stage and turned off at the light-emitting stage, a drain electrode of which is connected to the first power source signal input end VDD, and a source electrode of which is connected to a third common node N 3  connected to the gate electrode of the current control transistor T 2  and the first end of the capacitor C. 
     In a possible embodiment of the present disclosure, the light-emitting element is arranged between the second power source signal input end VSS and the first common node N 1 . The pixel driver circuit further includes a third switching unit arranged between the second power source signal input end VSS and the first common node N 1 , connected in series to the light-emitting element, and configured to be turned off at the charging stage and turned on at the light-emitting stage. 
     In another aspect, the present disclosure provides in some embodiments a display device including at least one pixel structure including a light-emitting element. Each pixel structure further includes the above-mentioned pixel driver circuit, and the light-emitting element is connected to a source electrode or a drain electrode of a driving transistor of the pixel driver circuit. 
     In yet another aspect, the present disclosure provides in some embodiments a pixel driving method for driving a light-emitting element of a pixel structure which is connected in series to a driving transistor T 1 , including a charging step of, at a charging stage, charging a capacitor C, a first end of which is connected to a gate electrode of the driving transistor T 1  and a second end of which is connected to a source electrode of the driving transistor T 1 . A drain electrode of the driving transistor T 1  is connected to a first power source signal input end VDD. Within at least a part of time period of the charging stage, an intensity of a charging current for charging the capacitor C is greater than an intensity of a target current, and after the charging stage, a voltage difference across the capacitor C is equal to a target voltage difference. The target voltage difference is a gate-to-source voltage difference of the driving transistor T 1  in the case that the light-emitting element emits light at a preset brightness value at a light-emitting stage. The target current is a current flowing through the driving transistor T 1  in the case that the light-emitting element emits the light at the preset brightness value at the light-emitting stage. 
     In a possible embodiment of the present disclosure, the charging step includes a control step of, controlling at least one current control transistor T 2  connected in parallel to the driving transistor T 1 , and a current source connected between a second power source signal input end VSS and a first common node N 1 , to charge the capacitor C at the charging stage and stop charging the capacitor (C) at the display stage. The current source is capable of generating a current having an intensity greater than that of the target current. The first common node N 1  is connected to the source electrode of the driving transistor T 1 , a source electrode of the current control transistor T 2  and the second end of the capacitor C. 
     In a possible embodiment of the present disclosure, the control step includes: a first control step of controlling a first switching unit, which is arranged among the first power source signal input end VDD, a gate electrode and the source electrode of the current control transistor T 2  and the first end of the capacitor C, to be turned on at the charging stage and turned off at the light-emitting stage; and a second control step of controlling a second switching unit, which is connected in series to the current source and arranged between the second power source signal input end VSS and the first common node N 1 , to be turned on at the charging stage and turned off at the light-emitting stage. 
     In a possible embodiment of the present disclosure, the first control step includes controlling a first TFT M 1 , a drain electrode of which is connected to the first power source signal input end VDD and a source electrode of which is connected to a second common node N 2 , to be turned on at the charging stage and turned off at the light-emitting stage. The second common node N 2  is connected to a drain electrode and the gate electrode of the current control transistor T 2  and the first end of the capacitor C. 
     According to the embodiments of the present disclosure, the charging circuit is capable of maintaining the voltage difference across the capacitor that has been charged to be the target voltage difference, so it is able to ensure the light-emitting element to emit light at a preset brightness value. As compared with the related art where a charging current is equal to a working current, the charging current in the embodiments of the present disclosure is greater than the working current within at least a part of time period of the charging stage. Through the increased charging current, it is able to increase a charging speed, thereby to apply the scheme in the embodiments of the present disclosure to a display panel having a high resolution. In the case that the scheme is applied to a display panel having a low resolution, a charging time period may be reduced, so it is able to prolong a display time period and improve a display effect. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a circuit diagram of a driver circuit in the related art; 
         FIG. 2  is a schematic view showing a pixel driver circuit according to at least one embodiment of the present disclosure; 
         FIG. 3  is a schematic view showing a charging circuit of the pixel driver circuit according to at least one embodiment of the present disclosure; 
         FIG. 4  is a schematic view showing a control unit of the pixel driver circuit according to at least one embodiment of the present disclosure; 
         FIG. 5  is a schematic view showing a first switching unit according to at least one embodiment of the present disclosure; 
         FIG. 6  is another schematic view showing the first switching unit according to at least one embodiment of the present disclosure; 
         FIG. 7  is another schematic view showing the pixel driver circuit according to at least one embodiment of the present disclosure; and 
         FIG. 8  is a schematic view showing a switching unit, which is implemented by N-type TFTs, according to one embodiment of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     It is found by the inventor that there are the problems in the related art, which will be described hereinafter at first. 
     As shown in  FIG. 1 , which is a schematic view showing a pixel driver circuit in the related art, a working current is controlled by a current source, and at a display stage, a turning-on degree of a driving transistor T 1  is controlled by a capacitor C. After a grayscale value of a subpixel has been determined, a target current I target  flowing through the driving transistor may be determined too. The target current I target , an non-adjustable parameters (including μ, W/L and Vth) and adjustable Vgs of the driving transistor may satisfy the following equation: I target =0.5μ*(W/L)*(V gs −V th ) 2 , where μ represents a product of carrier mobility and an equivalent capacitance of the driving transistor, W/L represents a width-to-length ratio of the driving transistor, Vgs represents a gate-to-source voltage difference of the driving transistor, and Vth represents a threshold voltage of the driving transistor. 
     In order to ensure an organic light-emitting diode (OLED) to emit light as required at a light-emitting stage, a capacitor C needs to be charged, so as to enable a voltage difference across the capacitor to satisfy the following equation:
 
 V   gs =√{square root over (2* I   target /[μ*( W/L )])}+ V   th .
 
     As shown in  FIG. 1 , a first end of the capacitor is connected to a gate electrode of the driving transistor T 1 , and a second end thereof is connected to a source electrode of the driving transistor T 1 . The target current is generated by the current source, and through circuit design, the target current may be stabilized and then flow through the driving transistor. At this time, the capacitor may be charged by using the gate-to-source voltage difference of the driving transistor, so as to enable the voltage difference across the charged capacitor to be equal to a target voltage difference √{square root over (2*I target /[μ*(W/L)])}+V th . 
     It can thus be found that, the current generated by the current source at the charging stage is equal to the target current I target . 
     An operation procedure of the pixel driver circuit in the related art at the charging stage will be described hereinafter in conjunction with  FIG. 1 . 
     At the charging stage, a first control node S 1  may output a low level signal and a second control node S 2  may output a high level signal, so as to turn off a transistor controlled by the first control node S 1  and turn on a transistor controlled by the second control node S 2 . 
     At the beginning of the charging stage, a voltage difference across the capacitor C is very small, so the driving transistor T 1  is in an off state. At this time, all the current generated by the current source may flow through a path the capacitor C, so as to charge the capacitor C with a relatively large current (i.e., having a current intensity equal to that of I target ). 
     After a certain time period, the voltage difference across the capacitor may reach a threshold voltage of the driving transistor T 1 , and at this time, a channel may be formed in the driving transistor T 1 . A part of the current generated by the current source may by pass to a path including the driving transistor T 1 , so the current flowing through the path including the capacitor C may be weakened, i.e., smaller than I target . With the elapse of time, the current flowing through the path including the capacitor C may be reduced gradually. 
     After another time period, a stable state may be achieved, and the voltage difference across the capacitor may be maintained at the target voltage difference. All the current generated by the current source at the charging stage may flow through the driving transistor, and an intensity of the current flowing through the path including the capacitor C may be 0. 
     It can thus be found that, the charging stage may include the following three sub-stages. At an initial sub-stage, the voltage difference across the capacitor C is smaller than the threshold voltage, and at this time, an intensity of the charging current is equal to an intensity of the working current I target . At an intermediate sub-stage, the voltage difference across the capacitor C is greater than or equal to the threshold voltage, and at this time, the intensity of the charging current may be reduced gradually from a maximum value (I target ). At a stable sub-stage, the voltage difference across the capacitor C may be maintained at the target voltage difference, and the intensity of the charging current is approximately 0. 
     In other words, at the entire charging stage, for the charging circuit in  FIG. 1 , the intensity of the charging current flowing through the capacitor may be maintained at the maximum value (I target ) for a certain time period, then gradually reduced, and finally maintained at the stable state (at this time, the intensity of the current is approximately 0). 
     A charging efficiency of the capacitor depends on both a voltage and a current intensity of a charging signal. However, for the charging circuit in  FIG. 1 , the current intensity of the charging signal decreases gradually from I target . In the case that I target  is small, the current intensity of the charging current may be smaller than I target , so the charging speed may be too small. For the display panel having a high resolution, a charging time allocated for each pixel is very limited, so it is impossible for the above-mentioned scheme to meet the requirement of the display panel having a high resolution. Even in the case that the scheme is applied to a display panel having a relative low resolution, an effective display time may be reduced and a display effect may be deteriorated. 
     In order to overcome the above defects found by the inventor, the present disclosure provides in some embodiments a pixel driver circuit, a display device and a pixel driving method, so as to charge the capacitor at a large charging current and shorten the charging time while meeting the requirement on the voltage difference across the capacitor, thereby to apply the schemes in the embodiments of the present disclosure to a display panel having a high resolution. In addition, even in the case that the schemes are applied to a display panel at a relative low resolution, it is able to improve a display effect. 
     In order to make the objects, the technical solutions and the advantages of the present disclosure more apparent, the present disclosure will be described hereinafter in conjunction with the drawings and embodiments. 
     The present disclosure provides in some embodiments a pixel driver circuit for driving a light-emitting element of a pixel structure. As shown in  FIG. 2 , the pixel diver circuit includes a driving transistor T 1  connected in series to the light-emitting element, a capacitor C and a charging circuit at least including a current source. 
     A drain electrode of the driving transistor T 1  is connected, directly or indirectly, to a first power source signal input end VDD. In  FIG. 2 , the drain electrode of the driving transistor T 1  may be directly connected to, or connected via the light-emitting element to, the first power source signal input end VDD. 
     In  FIG. 2 , dotted boxes are used to represent possible positions of the light-emitting element, rather than to show two light-emitting elements. Unless otherwise specified, in the subsequent drawings and description, the light-emitting element is arranged between a drain electrode of the driving transistor T 1  and a second power source signal input end VSS. 
     A first end of the capacitor C is connected to a gate electrode of the driving transistor T 1 , and a second end thereof is connected to a source electrode of the driving transistor T 1 . The charging circuit is configured to charge the capacitor C at a charging stage. Within at least a time period of the charging stage, an intensity of a charging current for charging the capacitor C is greater than an intensity of a target current I target , and after the charging stage, a voltage difference across the capacitor C is equal to a target voltage difference. The target voltage difference is a gate-to-source voltage difference of the driving transistor T 1  in the case that the light-emitting element emits light at a preset brightness value at a light-emitting stage. The target current is a current flowing through the driving transistor T 1  in the case that the light-emitting element emits the light at the preset brightness value at the light-emitting stage. 
     A charging speed for the capacitor C is closely related to the charging current. In the related art, the intensity of the charging current is smaller than that of the target current I target . In the case that I target  is very small (e.g., in the case that a target grayscale value corresponding to the pixel structure is very small), a very long charging time is required, so it is impossible to apply the pixel driver circuit to a display panel having a high resolution, or an effective display time may be reduced. 
     In the embodiments of the present disclosure, after the capacitor has been charged by the charging circuit, the voltage difference across the capacitor is equal to the target voltage difference, so as to enable the light-emitting element to emit light at a preset brightness value. As compared with the related art where the intensity of the charging current decreases from I target , in the embodiments of the present disclosure, within a certain time period of the charging stage, the intensity of the charging current of the charging circuit is greater than the intensity of the target current I target . In other words, in the embodiments of the present disclosure, the intensity of the charging current may decrease from a current greater than I target , so as to increase the intensity of the charging current and reduce the charging time, thereby enable to apply the pixel driver circuit to the display panel having a high resolution. In the case that the pixel driver circuit is applied to the display panel at a low resolution, because the charging time is reduced, it is able to provide a longer display time within one frame, thereby to improve a display effect. 
     As shown in  FIG. 1 , in the related art, the current generated by the current source may flow through two branches at the charging stage, i.e., the branch including the driving transistor T 1  and the branch including the capacitor C. Finally, all the current generated by the current source may flow through the branch including the driving transistor T 1 . Because the capacitor needs to be charged, the intensity of the current generated by the current source must be equal to that of the target current I target . 
     However, in the embodiments of the present disclosure, the intensity of the current generated by the current source is greater than that of the target current I target , and a current control transistor T 2  connected in series to the driving transistor T 1  is provided. A connection mode between the current control transistor T 2  and the capacitor is identical to that between the driving transistor and the capacitor. At a latter half of the charging stage, a part of the current generated by the current source that is larger than the target current I target  may flow through the current control transistor T 2 . 
     At an initial charging stage, the voltage difference across the capacitor is relatively small, so the driving transistor T 1  and the current control transistor T 2  are both in the off state. At this time, the current generated by the current source whose intensity is greater than that of the target current I target  may flow through the branch including the capacitor C, so as to charge the capacitor with a relative large current. 
     The present disclosure further provides in some embodiments another pixel driver circuit for driving a light-emitting element of a pixel structure. The pixel driver circuit includes a driving transistor T 1  connected in series to the light-emitting element, a capacitor C and a charging circuit. A drain electrode of the driving transistor T 1  is connected to a first power source signal input end VDD. A first end of the capacitor C is connected to a gate electrode of the driving transistor T 1 , and a second end thereof is connected to a source electrode of the driving transistor T 1 . 
     As shown in  FIG. 3 , the charging circuit includes at least one current controlled transistor T 2  connected in series to the driving transistor T 1 , a current source configured to generate a current whose intensity is greater than that of a target current I target , and a control unit (not shown). 
     A gate electrode of the current control transistor T 2  is connected to the first end of the capacitor C, and a source electrode thereof is connected to the second end of the capacitor C. 
     The current source is arranged between a second power source signal input end VSS and a first common node N 1  which is connected to the source electrode of the driving transistor T 1 , the source electrode of the current control transistor T 2  and the second end of the capacitor C. 
     The control unit is configured to control the current control transistor T 2  and the current source to charge the capacitor C at a charging stage, and control the current control transistor T 2  and the current source to stop charging the capacitor C at a display stage. 
     An operation procedure of the charging circuit will be described hereinafter in conjunction with  FIG. 3 . 
     At the beginning of the charging stage, a voltage difference across the capacitor C is very small, so the driving transistor T 1  and the current control transistor T 2  are both in an off state. At this time, all the current generated by the current source may flow through a path including the capacitor C, so as to charge the capacitor C with a relative large current (an intensity of which is greater than that of the target current I target ). 
     After a certain time period, the voltage difference across the capacitor may be equal to a threshold voltage of the driving transistor T 1  and/or the current control transistor T 2 . At this time, a channel may be formed in the driving transistor T 1  and/or the current control transistor T 2 , and a part of the current generated by the current source may flow through a path including the driving transistor T 1  and/or the current control transistor T 2 , so as to reduce the current flowing through the path including the capacitor C. Along with the elapse of time, the intensity of the current flowing through the path including the capacitor C may decrease gradually. 
     After a certain time period again, a stable state may be achieved, and the voltage difference across the capacitor may be maintained at a target voltage difference. All the current generated by the current source at the charging stage may flow through the driving transistor T 1  and the current control transistor T 2 , and the intensity of the current flowing through the path including the capacitor C may be 0. 
     It can thus be found that, the charging stage may also include the following three sub-stages. At an initial sub-stage, the voltage difference across the capacitor C is relatively small, and at this time, the intensity of the charging current is equal to the intensity of the current generated by the current source and greater than the intensity of the target current I target . At an intermediate sub-stage, the voltage difference across the capacitor C may increase gradually, and at this time, the intensity of the charging current may be reduced gradually from a maximum value (the intensity of the current generated by the current source). At a stable sub-stage, the voltage difference across the capacitor C may be maintained at the target voltage difference, and the intensity of the charging current is approximately 0. 
     As compared with the related art, for the pixel driver circuit in the embodiments of the present disclosure, the capacitor may be charged with the charging current having a larger intensity at the initial sub-stage, so as to reduce the duration of the initial sub-stage. 
     At the intermediate sub-stage, the intensity of the charging current may gradually decrease in the related art and the embodiments of the present disclosure. However, in the embodiments of the present disclosure, the intensity of the charging current may decrease from a larger value (the intensity of the current generated by the current source), so it is able for the charging circuit in the embodiments of the present disclosure to provide the charging current at a larger average intensity, thereby to reduce the duration of the intermediate sub-stage. 
     In a word, it is able for the pixel driver circuit in the embodiments of the present disclosure to remarkably reduce the duration of the initial sub-stage and the intermediate sub-stage of the charging stage, thereby to reduce the charging time and enable to apply the pixel driver circuit to a display panel having a high resolution. In the case that the pixel driver circuit is applied to a display panel having a low resolution, due to the reduction of the charging time, it is able to prolong a display time within one frame, thereby to improve a display effect. 
     The above description is given by taking one current control transistor T 2  as an example. It should be appreciated that, the more the current control transistors are, the larger the current capable of being outputted by the current source and the larger the charging speed are. 
     In a possible embodiment of the present disclosure, the control unit needs to control the current control transistor T 2  and the current source to charge the capacitor C at the charging stage, and control the current control transistor T 2  and the current source to stop charging the capacitor C at the display stage. 
     In a possible embodiment of the present disclosure, two switching units may be provided so as to control the current control transistor T 2  and the current source respectively. As shown in  FIG. 4 , the control unit includes a first switching unit and a second switching unit. 
     The first switching unit is configured to be turned on at the charging stage so as to electrically connect the first power source signal input end VDD to the gate electrode and the drain electrode of the current control driving transistor T 2  and the first end of the capacitor C, and turned off at the light-emitting stage. The second switching unit is arranged between the second power source signal input end VSS and the first common node N 1 , connected in series to the current source, and configured to be turned on at the charging stage and turned off at the light-emitting stage. 
     As shown in  FIG. 4 , the dotted boxes represent that the second switching unit may be arranged at an end of the current source adjacent to, or away from, the second power source signal input end VSS. 
     In the embodiments of the present disclosure, the first switching unit may include one or two TFTs. 
     As shown in  FIG. 5 , when the first switching unit includes one TFT, the first switching unit includes a first TFT M 1  which is configured to be turned on at the charging stage and turned off at the light-emitting stage. A drain electrode of the first TFT M 1  is connected to the first power source signal input end VDD, and a source electrode thereof is connected to the second common node N 2  which is connected to the drain electrode and the gate electrode of the current control transistor T 2  and the first end of the capacitor C. 
     As shown in  FIG. 6 , when the first switching unit includes two TFTs, the first switching unit includes a second TFT M 2  and a third TFT M 3 . The second TFT M 2  is configured to be turned on at the charging stage and turned off at the light-emitting stage. A drain electrode of the second TFT M 2  is connected to the first power source signal input end VDD, and a source electrode thereof is connected to the drain electrode of the current control transistor T 2 . The third TFT M 3  is configured to be turned on at the charging stage and turned off at the light-emitting stage. A drain electrode of the third TFT M 3  is connected to the first power source signal input end VDD, and a source electrode thereof is connected to a third common node N 3  which is connected to the gate electrode of the current control transistor T 2  and the first end of the capacitor C. 
     In the embodiments of the present disclosure, the light-emitting element may be arranged between the drain electrode of the driving transistor T 1  and the first power source signal input end VDD, or between the source electrode of the driving transistor T 1  and the second power source signal input end VSS. 
     In the case that the light-emitting element is arranged between the second power source signal input end VSS and the first common node N 1 , as shown in  FIG. 7 , the pixel driver circuit in some embodiments of the present disclosure may further include a third switching unit, so as to ensure the light-emitting element to emit light at the preset brightness value at the charging stage. The third switching unit is arranged between the second power source signal input end VSS and the first common node N 1 , connected in series to the light-emitting element, and configured to be turned off at the charging stage and turned on at the light-emitting stage. 
     As shown in  FIG. 7 , the dotted boxes represent that the third switching unit may be arranged at an end of the light-emitting element adjacent to, or away from, the second power source signal input end VSS. 
     In the case that the light-emitting element is arranged between the drain electrode of the driving transistor T 1  and the first power source signal input end VDD, an additional fourth switching unit needs to be provided. The fourth switching unit is connected in series to the light-emitting element, and configured to be turned on at the charging stage and turned off at the light-emitting stage. 
     An operation procedure of the pixel driver circuit will be described hereinafter by taking a circuit where the first, second and third switching units are all N-type TFTs as an example. 
     As shown in  FIG. 8 , at the charging stage, a first control node S 1  may output a high level signal and a second control node S 2  may output a low level signal, so the second TFT M 2 , the second TFT M 3  and a fourth TFT M 4  which are controlled by the first control node S 1  may be each in an on state, and a fifth TFT M 5  controlled by the second control node S 2  may be in an off state. 
     At an initial sub-stage of the charging stage, both the driving transistor T 1  and the current control transistor T 2  are in the off state, so all the current generated by the current source may flow through the capacitor C. At this time, the capacitor C may be charged with a large charging current, until T 1  and/or T 2  are turned on due to the voltage difference across the capacitor C. 
     In the case that a threshold voltage of the driving transistor T 1  is different from that of the current control transistor T 2 , channels may be formed sequentially in the driving transistor T 1  and the current control transistor T 2 . In the case that the threshold voltage of the driving transistor T 1  is identical to that of the current control transistor T 2 , the channels may be formed in the driving transistor T 1  and the current control transistor T 2  simultaneously. 
     After the formation of the channels in the driving transistor T 1  and the current control transistor T 2 , the voltage difference across the capacitor C may increase continuously. At this time, an intensity I 1  of the current flowing through the driving transistor T 1  and an intensity I 2  of the current flowing through the current control transistor T 2  may be calculated using the following equations: I 1 =0.5μ 1 *(W 1 /L 1 )*(V gs −V th1 ) 2 , and I 2 =0.5μ 2 *(W 2 /L 2 )*(V gs −V th2 ) 2 , where μ 1  represents a product of carrier mobility of the driving transistor T 1  and an equivalent capacitance of the driving transistor T 1 , μ 2  represents a product of carrier mobility of the current control transistor T 2  and an equivalent capacitance of the current control transistor T 2 , W 1 /L 1  represents a width-to-length ratio of the driving transistor T 1 , W 2 /L 2  represents a width-to-length ratio of the current control transistor T 2 , V gs  represents a gate-to-source voltage difference between the driving transistor T 1  and the current control transistor T 2 , i.e., the voltage difference across the capacitor C, V th1  represents a threshold voltage of the driving transistor T 1 , and V th2  represents a threshold voltage of the current control transistor T 2 . 
     In the case that the voltage different across the capacitor C increases continuously to a target voltage difference V, a stable state may be achieved. At this time, an intensity I 1  of the current flowing through the driving transistor T 1  and an intensity I 2  of the current flowing through the current control transistor T 2  may be calculated using the following equations: I 1 =0.5μ 1 *(W 1 /L 1 )*(V target −V th1 ) 2 , and I 2 =0.5μ 2 *(W 2 /L 2 )*(V target −V th2 ) 2 . 
     After the current control transistor T 2  has been determined, it is able to calculate the intensity I 2  of the stable current flowing through the current control transistor T 2 . The intensity I 1  depends on a display brightness value of the light-emitting element within a current frame. Hence, the intensity of the current generated by the current source within the current frame may be a sum of the intensity I 1  and the intensity I 2  at a stable state. 
     At the light-emitting stage, the first control node S 1  may output a low level signal and the second control node S 2  may output a high level signal, so the second TFT M 2 , the third TFT M 3  and the fourth TFT M 4  which are controlled by the first control node S 1  may be each in the off state, and the fifth TFT M 5  controlled by the second control node S 2  may be in the on state. 
     Due to maintenance capability of the capacitor C, the driving transistor T 1  and the current control transistor T 2  may be maintained in their respective states. Because the TFT M 2  is in the off state, no current flows through the current control transistor T 2 . At this time, the driving transistor T 1  may be in the on state, and the current flowing through the driving transistor T 1  may be calculated using the following equation: I 1 =0.5μ 1 *(W 1 /L 1 )*(V target −V th1 ) 2 . 
     Before the next frame, the above-mentioned state may be maintained, so the light-emitting element may emit light in a stable manner. 
     In the embodiments of the present disclosure, the light-emitting element may be any light-emitting unit driven by a current, e.g., an OLED. 
     In addition, in the embodiments of the present disclosure, the current generated by the current source may flow through the circuits connected in parallel to each other, so as to ensure that the current flowing through the driving transistor is just the target current. However, as mentioned above, regardless of the intensity of the current initially generated by the current source, the current may not flow through the branch including driving transistor before the capacitor is charged to a certain extent (i.e., before the voltage difference across the capacitor is equal to the threshold voltage of the driving transistor). 
     Hence, in some embodiments of the present disclosure, at the initial sub-stage of the charging stage, the current having an intensity greater than that of the target current I target  may be generated by the current source, and at the intermediate sub-stage of the charging stage, i.e., after the voltage difference across the capacitor is greater than the threshold voltage of the driving transistor, the current having an intensity identical to that of the target current I target  may be generated by the current source. 
     In this case, as compared with the related art, it is able for the pixel driver circuit in the embodiments of the present disclosure to remarkably reduce the duration of the initial sub-stage and reduce the charging time, and thus it is able to apply the pixel driver circuit to a display panel having a high resolution. In the case that the pixel driver circuit is applied to a display panel having a low resolution, due to the reduction in the charging time, it is able to prolong a display time within one frame, thereby to improve a display effect. 
     The present disclosure further provides in some embodiments a display device including at least one pixel structure. Each pixel structure includes a light-emitting element and the above-mentioned pixel driver circuit. The light-emitting element is connected to the source electrode or the drain electrode of the driving transistor of the pixel driver circuit. 
     The present disclosure further provides in some embodiments a pixel driving method for driving the light-emitting element of the pixel structure which is connected in series to the driving transistor T 1 . The pixel driving method includes a charging step of, at the charging stage, controlling the charging circuit at least including a current source to charge the capacitor C, a first end of which is connected to the gate electrode of the driving transistor T 1  and a second end of which is connected to the source electrode of the driving transistor T 1 . During the charging state, within at least a part time period of the charging stage, a current intensity of the charging current for charging the capacitor C is greater than a current intensity of the target current, and after the charging stage, a voltage difference across the capacitor C is equal to the target voltage difference. The target voltage difference is a gate-to-source voltage difference of the driving transistor T 1  in the case that the light-emitting element emits light at a preset brightness value at the light-emitting stage. The target current is a current flowing through the driving transistor T 1  in the case that the light-emitting element emits the light at the preset brightness value at the light-emitting stage. 
     In a possible embodiment of the present disclosure, the charging step includes a control step of, controlling at least one current control transistor T 2  connected in series to the driving transistor T 1 , and the current source connected between the second power source signal input end VSS and the first common node N 1 , to charge the capacitor C at the charging stage and stop charging the capacitor C at the display stage. The current source generates a current having an intensity greater than that of the target current. The first common node N 1  is connected to the source electrode of the driving transistor T 1 , a source electrode of the current control transistor T 2  and the second end of the capacitor C. 
     In a possible embodiment of the present disclosure, the control step includes: a first control step of controlling the first switching unit, which is arranged among the first power source signal input end VDD, the gate electrode and the source electrode of the current control transistor T 2 , and the first end of the capacitor C, to be turned on at the charging stage and turned off at the light-emitting stage; and a second control step of controlling the second switching unit, which is connected in series to the current source and arranged between the second power source signal input end VSS and the first common node N 1 , to be turned on at the charging stage and turned off at the light-emitting stage. 
     In a possible embodiment of the present disclosure, the first control step includes controlling the first TFT M 1 , a drain electrode of which is connected to the first power source signal input end VDD and a source electrode of which is connected to the second common node N 2 , to be turned on at the charging stage and turned off at the light-emitting stage. The second common node N 2  is connected to the drain electrode and the gate electrode of the current control transistor T 2  and the first end of the capacitor C. 
     All the transistors adopted in the embodiments of the present disclosure may be TFTs, or field effect transistors (FETs) or any other diode having a similar characteristic. A source electrode and a drain electrode of each transistor are provided symmetrically, so they may be replaced with each other. 
     The above description is given by taking an N-type TFT as an example, and at this time, in the case that a high level is applied to its gate electrode, its source electrode may be electrically connected to its drain electrode. Of course, a P-type TFT may also be used, and at this time, in the case that a low level is applied to its gate electrode, its source electrode may be electrically connected to its drain electrode. 
     The above are merely the preferred embodiments of the present disclosure. Obviously, a person skilled in the art may make further modifications and improvements without departing from the spirit of the present disclosure, and these modifications and improvements shall also fall within the scope of the present disclosure.