Patent Publication Number: US-8988810-B1

Title: Track measurement for data storage device

Description:
CROSS-REFERENCE TO RELATED APPLICATION(S) 
     This application claims the benefit of U.S. Provisional Application No. 61/980,472, filed on Apr. 16, 2014, which is hereby incorporated by reference in its entirety. 
    
    
     BACKGROUND 
     Data Storage Devices (DSDs) are often used to record data onto or to reproduce data from a storage media. One type of storage media includes a rotating magnetic disk. A magnetic head of the DSD can magnetically read and write data in tracks on a surface of the disk. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The features and advantages of the embodiments of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the disclosure and not to limit the scope of what is claimed. 
         FIG. 1  is a block diagram depicting a Data Storage Device (DSD) according to an embodiment. 
         FIG. 2A  is a conceptual diagram of examples of a test track and an adjacent track without Track Mis-Registration (TMR) according to an embodiment. 
         FIG. 2B  is a conceptual diagram illustrating rewriting of the adjacent track of  FIG. 2A  at a decreased offset distance from the test track of  FIG. 2A  according to an embodiment. 
         FIG. 2C  is a conceptual diagram of examples of a test track and an adjacent track that include TMR according to an embodiment. 
         FIG. 2D  is a conceptual diagram illustrating rewriting of the adjacent track of  FIG. 2C  at a decreased offset distance from the test track of  FIG. 2C  according to an embodiment. 
         FIG. 3A  is a conceptual diagram of an initial position of a test track and an adjacent track with the reading of a plurality of sectors of the test track at varying Off-Track Read Capability (OTRC) positions according to an embodiment. 
         FIG. 3B  is a conceptual diagram illustrating the rewriting of the adjacent track of  FIG. 3A  with the reading of the plurality of sectors of the test track at varying OTRC positions according to an embodiment. 
         FIG. 3C  is a conceptual diagram illustrating the rewriting of the adjacent track of  FIG. 3B  and the reading of the plurality of sectors of the test track at varying OTRC positions according to an embodiment. 
         FIG. 4  depicts three graphs of OTRC values corresponding to the diagrams of  FIGS. 3A ,  3 B and  3 C according to an embodiment. 
         FIG. 5  is a flowchart for a track measurement process for a system squeeze setting according to an embodiment. 
         FIG. 6  is a flowchart for a track measurement process for a head-media squeeze setting according to an embodiment. 
         FIG. 7  is a graph depicting a correlation between different average OTRC values and their respective offset values according to an embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     In the following detailed description, numerous specific details are set forth to provide a full understanding of the present disclosure. It will be apparent, however, to one of ordinary skill in the art that the various embodiments disclosed may be practiced without some of these specific details. In other instances, well-known structures and techniques have not been shown in detail to avoid unnecessarily obscuring the various embodiments. 
     Shingled Magnetic Recording (SMR) has recently been introduced as a way of increasing the amount of data that can be stored in a given area on the disk by increasing the number of Tracks Per Inch (TPI) with narrower tracks. SMR increases TPI by using a relatively wide write element of the head with a stronger magnetic field to overlap tracks like roof shingles. The non-overlapping portion then serves as a narrow track that can be read by a read element of the head. 
     Although a higher number of TPI is ordinarily possible with SMR, the stronger magnetic field of the write element and the closer proximity of tracks can worsen Adjacent Track Interference (ATI) which occurs when data already stored on the disk becomes corrupted due to the magnetic field from writing new data in adjacent tracks. During a product development phase or as part of a manufacturing process, certain track measurement tests may be performed to determine how much encroachment a track on the disk can sustain from an adjacent track without compromising the integrity of the data stored in the track. However, as the proximity of tracks increases, the results of such track placement tests become less reliable. In addition, the closer proximity of tracks makes it more difficult to determine whether the head and disk meet particular specifications. 
       FIG. 1  illustrates a block diagram of DSD  106  according to an embodiment. In the example of  FIG. 1 , DSD  106  is part of computer system  100  which includes host device  101  and DSD  106 . Computer system  100  can be, for example, a computer system (e.g., desktop, mobile/laptop, tablet, smartphone, etc.) or other electronic device such as a digital video recorder (DVR). In this regard, computer system  100  may be a stand-alone system or part of a network, which can, for example, be a local or wide area network or the Internet. 
     In the example of  FIG. 1 , host device  101  can interface with DSD  106  as part of a manufacturer&#39;s product design or quality control process. One part of the testing can include a track measurement test to tune the placement of tracks on a disk of DSD  106  or to determine whether certain components of DSD  106  meet specifications. However, conventional track placement tests such as current “squeeze to death” or “Off-Track Read Capability (OTRC)” tests often fail to provide reliable results when tracks are in close proximity to each other or when tracks overlap each other as in a Shingled Magnetic Recording (SMR) application. 
     In view of the foregoing, the disclosed processes for track measurement ordinarily improve the accuracy and repeatability of track measurement tests by accounting for variations in track placement caused by Track Mis-Registration (TMR), which is discussed in more detail below with reference to  FIGS. 2A to 2D . 
     The disclosed track measurement processes may be performed by DSD  106  or by host device  101 , or by a combination of both host device  101  and DSD  106 . In addition, those of ordinary skill in the art will appreciate that computer system  100  and DSD  106  can include more or less than those elements shown in  FIG. 1  and that the processes disclosed for track measurement may be implemented in other environments. 
     As shown in  FIG. 1 , DSD  106  includes controller  120  which can include circuitry such as one or more processors for executing instructions and can include a microcontroller, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), hard-wired logic, analog circuitry and/or a combination thereof. In one implementation, controller  120  can include a System on a Chip (SoC). 
     Host interface  126  is configured to interface DSD  106  with host device  101  and may interface according to a standard such as, for example, PCI express (PCIe), Serial Advanced Technology Attachment (SATA), or Serial Attached SCSI (SAS). Although  FIG. 1  depicts the co-location of host device  101  and DSD  106 , in other embodiments the two need not be physically co-located. In such embodiments, DSD  106  may be located remotely from host device  101  and interface with host device  101  via a network interface. 
     DSD  106  also optionally includes solid state memory  128  for storing data, which stores data that can be retained across power cycles (i.e., after turning DSD  106  off and on). In this regard, DSD  106  can be considered a “hybrid drive” in that it includes multiple types of storage media. However, as will be appreciated by those of ordinary skill in the art, other embodiments may not include solid state memory  128 , and may instead only include rotating magnetic disks such as disk  200  as a non-volatile memory. 
     While the description herein refers to solid state memory generally, it is understood that solid state memory may comprise one or more of various types of memory devices such as flash integrated circuits, Chalcogenide RAM (C-RAM), Phase Change Memory (PC-RAM or PRAM), Programmable Metallization Cell RAM (PMC-RAM or PMCm), Ovonic Unified Memory (OUM), Resistance RAM (RRAM), NAND memory (e.g., Single-Level Cell (SLC) memory, Multi-Level Cell (MLC) memory, or any combination thereof), NOR memory, EEPROM, Ferroelectric Memory (FeRAM), Magnetoresistive RAM (MRAM), other discrete Non-Volatile Memory (NVM) chips, or any combination thereof. 
     In the example of  FIG. 1 , disk  200  is rotated by a spindle motor (not shown). DSD  106  also includes head  136  connected to the distal end of actuator  130  which is rotated by Voice Coil Motor (VCM)  132  to position head  136  in relation to disk  200 . Servo controller  122  includes circuitry to control the position of head  136  and the rotation of disk  200  using VCM control signal  30  and SM control signal  34 , respectively. Read/write channel  124  includes circuitry for encoding data to be written to disk  200  and for decoding data read from disk  200 . 
     As understood by those of ordinary skill in the art, disk  200  may form part of a disk pack with additional disks radially aligned below disk  200 . In addition, head  136  may form part of a head stack assembly including additional heads with each head arranged to read data from and write data to a corresponding surface of a disk in a disk pack. 
     Disk  200  includes a number of radially spaced, concentric tracks  202  with each track  202  divided into a plurality of sectors that are spaced circumferentially along track  202 . The sectors may be used to store user data or other information. 
     Disk  200  also includes a plurality of angularly spaced servo wedges  204   0 - 204   N , each of which may include embedded servo information that can be read by head  136  to determine a position of head  136  over disk  200 . For example, each servo wedge  204   0 - 204   N  may include a pattern of alternating magnetic transitions (servo burst), which may be read by head  136  and used by servo controller  122  to estimate the position of head  136  relative to disk  200 . 
     Volatile memory  134  can include, for example, a Dynamic Random Access Memory (DRAM) which can be used by DSD  106  to temporarily store data. Data stored in volatile memory  134  can include data read from NVM media (e.g., disk  200  or solid state memory  128 ) and data to be written to NVM media. As shown in  FIG. 1 , volatile memory  134  can also store DSD firmware  10  which includes computer-executable instructions that control operation of DSD  106  when executed by controller  120 . 
     In operation, host interface  126  receives commands from host device  101  via host interface  126  for reading data from and writing data to non-volatile memory such as solid-state memory  128  or disk  200 . In response to a write command from host device  101 , controller  120  may buffer the data to be written for the write command in volatile memory  134 . 
     For data to be written to disk  200 , read/write channel  124  encodes the buffered data into write signal  32  which is provided to head  136  for magnetically writing data in sectors on disk  200 . 
     In response to a read command for data stored on disk  200 , controller  120  positions head  136  via servo controller  122  to magnetically read the data stored in sectors on disk  200 . Head  136  sends the read data as read signal  32  to read/write channel  124  for decoding and the data is buffered in volatile memory  134  for transferring to host device  101  via host interface  126 . 
       FIG. 2A  provides an idealized diagram of test track  206  and adjacent track  208  written without TMR, while  FIG. 2C  illustrates a more realistic view of test track  210  and adjacent track  212  written with TMR. When writing data in a track  202 , servo controller  122  attempts to keep head  136  positioned over a center of the track (e.g., center lines  211  and  213  in  FIG. 2A ) using information from servo wedges  204   0 - 204   N . In practice, numerous variables such as, for example, system noise, characteristics of head  136 , flight dynamics of head  136  floating over disk  200 , or resonant frequencies of the servo system can result in position errors when attempting to keep head  136  positioned over a center of the track. This position error can generally be referred to as write TMR and is conceptually illustrated in  FIGS. 2C and 2D  by the wavy boundaries of test track  210  and adjacent track  212 . 
     The write TMR can contribute to errors when performing track measurements where the offset between a test track and an adjacent track are gradually decreased, such as in a squeeze to death test or a zero OTRC test. In such tests, data is read from a test track with the adjacent track at various offset distances from the test track. In addition to the variance caused by the write TMR discussed above, a read TMR caused by similar factors when reading data from the test track can exacerbate the reliability of conventional track measurement tests. 
     In a conventional squeeze to death test, the offset between the adjacent track and the test track is gradually decreased until an error has been confirmed for one of the sectors in the track. The error may be detected using an Error Correcting Code (ECC) of the sector or by other methods known in the art. This conventional way of performing a squeeze to death test generally measures the amount of encroachment or squeeze a track can handle without errors. This test will indicate an acceptable encroachment distance based on the sector in the test track that is the most prone to an error from the interference of the adjacent track (i.e., the “dead sector”). The repeatability of such a test is typically poor since the dead sector may change from one run of the test to the next. Moreover, the foregoing test does not account for position error caused by write TMR and read TMR which have a greater effect on results when tracks are to be located in close proximity to or partially overlapping each other (i.e., an SMR application). 
     In a conventional OTRC test, the amount of encroachment or squeeze from an adjacent track that a test track can handle is determined by gradually decreasing the offset distance between the adjacent track and the test track while reading data from the test track from an OTRC position outside the test track. The amount of encroachment or squeeze that the test track can handle is set at the point where no data can be read from the test track from the OTRC position. In other words, the distance the adjacent track is offset from the test track is gradually decreased until all of the sectors of the test track have a zero OTRC where no data can be read from the sectors from the OTRC position. 
     As with the conventional squeeze to death test discussed above, the conventional OTRC test does not account for TMR when reading and writing data. As a result, the conventional OTRC test often provides inaccurate results because not all of the sectors in the test track reach a zero OTRC at the same time due to TMR. The results of a conventional OTRC test are therefore usually artificially high since read errors will be encountered for many of the sectors before the adjacent track is positioned such that all of the sectors have a zero OTRC. 
     With reference to  FIG. 2A , test track  206  is initially offset from adjacent track  208  by offset distance  209  which is measured between the center of test track  206  at centerline  211  and the center of adjacent track  208  at centerline  213 . In  FIG. 2B , the offset distance between test track  206  and adjacent track  208  has been decreased to offset distance  215  between centerline  211  and centerline  213 . 
     In some implementations, an offset value may be used to represent the change in offset between the test track and the adjacent track as, for example, a percentage of a track pitch change between the test track and the adjacent track or an amount of overlap of the adjacent track onto the test track. 
     In the example of  FIG. 2C  with the effects of write TMR, test track  210  and adjacent track  212  are initially separated by an offset distance  221  between centerlines  223  and  225 . In  FIG. 2D , the offset distance between test track  210  and adjacent track  212  has been decreased to offset distance  227  between centerline  223  and centerline  225 . 
     As shown by the differences in distances A and B in  FIG. 2D , the amount of test track  210  not overlapped by adjacent track  212  varies depending on the particular location along the tracks. In addition, the amount of test track  210  subjected to a magnetic field from writing adjacent track  212  varies. Such variances can generally reduce the accuracy and repeatability of conventional track measurements, such as in the conventional squeeze to death test or conventional zero OTRC test discussed above. 
       FIGS. 3A to 3C  illustrate the rewriting of adjacent track  218  and the reading of a plurality of sectors in test track  216  at varying OTRC positions according to an embodiment. As shown in  FIG. 3A , the plurality of sectors of test track  216  are indicated by the stacked rectangles forming test track  216 . Adjacent track  218  similarly includes a plurality of sectors. 
     Test track  216  and adjacent track  218  are initially located with adjacent track  218  partially overlapping test track  216 . Such an initial overlap may be used to tune a track format in an SMR implementation. In this example, an amount of overlap can be gradually increased to determine an amount of track overlap for SMR tracks to better utilize an area of the disk surface. 
     As indicated in  FIG. 3A , head  136  reads data from three different OTRC positions outside of test track  216  at OTRC positions  300 ,  302  and  304 . Generally, more errors are encountered as head  136  reads data from OTRC positions farther from test track  216 . The order of OTRC positions from which head  136  reads data can vary. In addition, other embodiments may include a different number of OTRC positions. 
     An OTRC value for each sector can be determined based on whether the sector meets a criterion for correctly reading data from the sector at the different OTRC positions. Such a criterion can include whether head  136  can correctly read data from the sector in a certain number of read attempts or revolutions of disk  200 . In one implementation, a sector meets the criterion if data can be correctly read from the sector when head  136  is at the OTRC position three out of five times. Other criterion for correctly reading data from the sector may be used in other embodiments. The correctness of the data read from the sector can be determined by evaluating an ECC of the sector or by other methods known in the art for checking data. 
     After determining whether each of the plurality of sectors passes or fails the criterion at a first OTRC position, such as OTRC position  300 , head  136  is moved to a second OTRC position such as OTRC position  302  and the processes of determining whether each of the plurality of sectors in test track  216  meet the criterion repeats for the new location of adjacent track  218 . Head  136  is then moved to a third OTRC position such as OTRC position  304  where it is determined whether data can be correctly read from each sector in test track  216 . In general, the farther the OTRC position is from test track  216 , the more likely that read errors will occur when attempting to read test track  216  from the OTRC position. 
     As noted above, the order of the OTRC positions can vary such that head  136  may move from OTRC position  304  to OTRC position  300  in other examples. In addition, other embodiments may include more or less OTRC positions than those shown in  FIGS. 3A to 3C . 
     An OTRC value is determined for each sector in test track  216  by evaluating whether the sector met the criterion for correctly reading data at the different OTRC positions. In one example implementation, the OTRC value can include a ratio of the number of successful reads to the total number of read attempts from the different OTRC distances. 
       FIG. 3B  illustrates a second iteration of the test performed in  FIG. 3A  where the offset distance of adjacent track  218  has been decreased such that more of adjacent track  218  overlaps test track  216 . When the offset distance of adjacent track  218  decreases, it is generally more likely that reading data from test track  216  from the OTRC positions will not meet the criterion for correctly reading data. This can be due to the effect of Adjacent Track Interference (ATI) where the magnetic field from writing the data of adjacent track  218  affects or corrupts the data stored in test track  216 . In addition, in the SMR example of  FIGS. 3A to 3C , the overlap of adjacent track  218  onto test track  216  decreases the area of test track  216  available for reading such that reading test track  216  from an off-track position becomes more error prone. 
       FIG. 3C  shows a third iteration where the offset distance of adjacent track  218  has been further decreased from that of  FIG. 3B . With the track placement of  FIG. 3C , the OTRC for the sectors of test track  216  further declines. This is shown by the progressive decline in OTRC values in  FIG. 4  as the offset distance is decreased from  FIG. 3A  to  FIG. 3C . 
       FIG. 4  depicts three graphs of OTRC values corresponding to the track placements of  FIGS. 3A ,  3 B and  3 C. As shown in  FIG. 4 , the OTRC values are highest for the arrangement of  FIG. 3A , which is shown by line  400  extending across the sector numbers of the x-axis. 
     As the offset distance of adjacent track  218  is decreased to that of  FIG. 3B , the corresponding OTRC values for the sectors in test track  216  fall to line  406  in  FIG. 4 . The OTRC values for the sectors decrease even further with the arrangement of  FIG. 3C  as shown by line  412  in  FIG. 4 . 
       FIG. 4  also depicts the average OTRC value and a predetermined multiple of the standard deviation of OTRC values of the sectors for each of the track arrangements of  FIGS. 3A to 3C . Specifically, the average OTRC values for the track placements of  FIGS. 3A ,  3 B and  3 C are shown by lines  402 ,  408  and  414 , respectively. The predetermined multiple of standard deviations for the OTRC values are shown at  404 ,  410  and  416 . The predetermined multiple can vary in different implementations based on design considerations. In some implementations, the predetermined multiple can be 1 such that the predetermined multiple of the standard deviation is simply the standard deviation. 
     In one embodiment, adjacent track  218  is repeatedly rewritten at decreasing offset distances from test track  216  until the average OTRC value for the sectors in the test track are not greater than or equal to a predetermined multiple of the standard deviation of the OTRC values. This track positioning is shown in  FIG. 3C  where the average OTRC value (i.e., line  414  in  FIG. 4 ) is less than the predetermined multiple of the standard deviation of the OTRC values (i.e.,  416  in  FIG. 4 ). As will be discussed in more detail with reference to  FIG. 7  below, considering the standard deviation of the OTRC values allows for more accurate and repeatable results than conventional tests by accounting for track variances such as TMR. In addition, consideration of the average OTRC value allows the track positioning to be based on a plurality of sectors in the test track rather than only on a worst case dead sector in the test track. 
       FIG. 5  is a flowchart for a track measurement process that can be performed by controller  120  in executing DSD firmware  10  according to an embodiment. In other embodiments, the process of  FIG. 5  may be performed by host device  101  or by a combination of controller  120  and host device  101 . The process of  FIG. 5  may also be performed for a particular disk surface or for a number of zones of tracks on a disk surface. 
     In block  502 , controller  120  controls head  136  via servo controller  122  to write test data in a plurality of sectors in a test track (e.g., test track  216  in  FIG. 3A ) on disk  200 . Controller  120  also controls head  136  in block  504  to write an adjacent track (e.g., adjacent track  218  in  FIG. 3A ) offset from the test track by an offset distance. 
     In block  506 , controller  120  controls head  136  to read data from the plurality of sectors in the test track from an OTRC position outside of the test track. An OTRC value is determined for each of the plurality of sectors in block  508  by varying the OTRC position and determining whether the sector meets a criterion for correctly reading data from the sector. The OTRC positions may include a series of steps or distances from the test track or its centerline. As noted above, the criterion for correctly reading data from the test track can include determining whether data can be read from a particular sector without errors for a predetermined number of read attempts. The OTRC value can represent the OTRC for the particular sector in the test track. In one implementation, the OTRC value can include a ratio of the number of successful reads to the total number of read attempts at the different OTRC positions. Other known methods of calculating an OTRC value can be used in other implementations. 
     In block  510 , controller  120  calculates an average OTRC value for the plurality of sectors in the test track. In the example track placement of  FIG. 3A , this can correspond to the average OTRC value at line  402  in  FIG. 4 . 
     In block  512 , controller  120  calculates a standard deviation of the OTRC values for the plurality of sectors in the test track. Controller  120  in block  514  determines whether the average OTRC value is greater than or equal to a predetermined multiple of the standard deviation calculated in block  512 . The predetermined multiple can be based on design criteria such as, for example, to adjust the sensitivity to variations in track boundaries from TMR. In some implementations, the predetermined multiple can be 1 so that the comparison in block  514  determines whether the average OTRC value is greater than or equal to the standard deviation of the OTRC values. 
     If it is determined in block  514  that the average OTRC value is greater than or equal to the predetermined multiple of the standard deviation, controller  120  in block  516  controls head  136  via servo controller  122  to rewrite the adjacent track at a decreased offset distance from the test track. The process of  FIG. 5  then returns to block  506  to perform blocks  506  to  514  with the rewritten adjacent track. 
     On the other hand, if it is determined in block  514  that the average OTRC value is not greater than or equal to the predetermined multiple of the standard deviation, controller  120  in block  518  sets a system squeeze setting based on the current offset distance for the adjacent track. In some embodiments, controller  120  may set the system squeeze setting using a curve fit or linear interpolation using the current offset distance. In block  520 , the system squeeze setting can be optionally used, as indicated by the dashed box, to tune a track format for disk  200  or to determine whether components of DSD  106  fail a quality assurance test. 
       FIG. 6  is a flowchart for a track measurement process that can be performed by controller  120  in executing DSD firmware  10  to identify a head-media squeeze setting according to an embodiment. In other embodiments, the process of  FIG. 6  may be performed by host device  101  or by a combination of controller  120  and host device  101 . The process of  FIG. 6  may also be performed for a particular disk surface or for a number of zones of tracks on a disk surface. 
     The head-media squeeze setting can be used to determine whether head  136  and disk  200  meet particular specifications without most of the influence of TMR caused by the servo system. In addition, the following process of  FIG. 6  uses statistics from the plurality of sectors in the test track so as not to have its results dominated by a worst case dead sector. The process of  FIG. 6  can occur after the process of  FIG. 5  in order to use the average OTRC values calculated in block  510  as discussed above. 
     In block  602 , controller  120  correlates different average OTRC values calculated in block  510  of  FIG. 5  with their respective offset distances or corresponding offset values. Controller  120  in block  602  may optionally include an additional average OTRC value for a decreased offset distance. In such an implementation, blocks  516 ,  506 ,  508 , and  510  of  FIG. 5  are performed to rewrite an additional adjacent track and calculate an additional average OTRC value after it is determined that the previous average OTRC value is not greater than or equal to the predetermined multiple of the standard deviation in block  514 . The additional average OTRC value can then be included in the correlation between the different average OTRC values and their respective offset distances or offset values. 
     An example of such a correlation is depicted in the graph of  FIG. 7 . As shown in  FIG. 7 , the average OTRC values are plotted as curve  418  for different offset values corresponding to offset distances for the adjacent track. In the example of  FIG. 7 , the offset values along the x-axis represent a percentage of squeeze or encroachment by the adjacent track toward the test track. 
     The predetermined multiple of the standard deviations of the OTRC values are also plotted as curve  420  in  FIG. 7  for the different offset values. The intersection of curve  420  and curve  418  can indicate a system squeeze setting where the average OTRC value is less than or equal to the predetermined multiple of the standard deviation of the OTRC values. In the example of  FIG. 7 , this occurs at an offset value or percent of squeeze of 13%. As noted above, an offset value can be represented in different ways such as a percentage of a certain offset distance, as an amount of overlap by the adjacent track, or as a change in position of the adjacent track. An additional average OTRC value  428  is also shown in  FIG. 7  at a decreased offset value or percent of squeeze of 14%. 
     Returning to the process of  FIG. 6 , controller  120  in block  604  estimates an offset value or offset distance for an average OTRC value of zero using at least a portion of the correlation of block  602 . This estimation may be performed by interpolation, a linear curve fit, or by approximating curve  418  with a polynomial function (e.g., a quadratic function) to estimate where curve  418  would reach an average OTRC value of zero. Such an estimation is depicted graphically in  FIG. 7  with curve  422  approximating the average OTRC values curve  418  using a quadratic fit of all of the average OTRC values including additional average OTRC value  428 . 
     In other embodiments, controller  120  may estimate where curve  418  would reach an average OTRC value of zero using a linear fit of a portion of the correlation between the average OTRC values and their respective offset distances or offset values. For example, controller  120  may use a linear fit of the last three average OTRC values including additional OTRC value  428  to estimate the offset distance or offset value for an average OTRC value of zero. 
     The point at which curve  422  reaches the x-axis with an average OTRC value of zero at offset value  426  represents an offset value that can be achieved without significant influence of TMR from the servo system. By reducing the influence of servo TMR, it is ordinarily possible to more accurately determine specifications for head  136  and disk  200 . 
     In block  606  of  FIG. 6 , controller  120  sets the estimated offset distance or offset value (e.g., offset value  426  in  FIG. 7 ) as a head-media squeeze setting. In block  608 , a performance of DSD components such as head  136  or disk  200  can optionally be determined based on the head-media setting. As noted above, the head-media setting can be used to test head  136  and disk  200  while reducing the effects of TMR in the results. In this regard, the difference between the system squeeze setting (e.g., approximately 13 in  FIG. 7 ) and the head-media squeeze setting (e.g., approximately 15.5 in  FIG. 7 ) can represent the effect of track variation such as TMR in the track measurements. 
     Tests conducted using the foregoing track measurement processes have shown a significant reduction in study variation when comparing the above-described track measurement processes to a conventional squeeze to death test. 
     Those of ordinary skill in the art will appreciate that the various illustrative logical blocks, modules, and processes described in connection with the examples disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. Furthermore, the foregoing processes can be embodied on a computer readable medium which causes a processor or computer to perform or execute certain functions. 
     To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, and modules have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Those of ordinary skill in the art may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure. 
     The various illustrative logical blocks, units, modules, and controllers described in connection with the examples disclosed herein may be implemented or performed with a general purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. 
     The activities of a method or process described in connection with the examples disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The steps of the method or algorithm may also be performed in an alternate order from those provided in the examples. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable media, an optical media, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. 
     The foregoing description of the disclosed example embodiments is provided to enable any person of ordinary skill in the art to make or use the embodiments in the present disclosure. Various modifications to these examples will be readily apparent to those of ordinary skill in the art, and the principles disclosed herein may be applied to other examples without departing from the spirit or scope of the present disclosure. The described embodiments are to be considered in all respects only as illustrative and not restrictive and the scope of the disclosure is, therefore, indicated by the following claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.