Patent Publication Number: US-11663950-B2

Title: Display apparatus and driving method thereof

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application claims priority to and benefits of Korean Patent Application No. 10-2020-0100735, filed in the Korean Intellectual Property Office on Aug. 11, 2020, the disclosure of which is incorporated herein by reference in its entirety. 
     BACKGROUND 
     (a) Field 
     The present disclosure relates to a display device and a driving method thereof. 
     (b) Description of the Related Art 
     Research is being conducted to optimize battery consumption of various electronic devices that are widely used in our lives, such as smartphones, laptop computers, and tablet personal computers (PCs). 
     Many electronic devices may include a display panel. Battery consumption of the electronic device may be optimized by minimizing power consumption of the display panel. For example, the display panel may be driven in a low frequency driving mode to reduce its power consumption. 
     When the display panel is driven in the low frequency driving mode, one frame period may be increased thereby increasing a leakage current in a pixel, and this leakage current may cause a difference in luminance of the pixel between two subsequent frames, causing a flickering phenomenon. 
     The above information disclosed in this background section is only for enhancement of understanding of the present disclosure, and it may contain information that may not form a prior art that is already known to a person of ordinary skill in the art. 
     SUMMARY 
     The present disclosure provides a display device that is capable of preventing a flicker phenomenon that may occur during low frequency driving and a method of driving the display device. 
     The display device may be driven at various driving frequencies and is capable of providing improved display quality. 
     According to an embodiment of the present disclosure, a display device includes: a display panel including a plurality of pixels and configured to display an image; a signal controller configured to determine whether an input image signal is a still image signal, determine color coordinates using data values of one frame data of the input image signal, and generate compensated image data by compensating image data of the one frame data based on the color coordinates; and a data driver configured to generate a data signal based on the compensated image data and output the compensated image data to the display panel through a data line. 
     The signal controller may include an image determiner that is configured to compare at least two frame data of the input image signal to determine whether the input image signal is the still image signal. 
     The image determiner may determine a driving frequency at which one frame data is displayed based on determination that the input image signal is the still image signal. 
     The image determiner may calculate at least one of a first representative gray value for each pixel, a second representative gray value for each area, and a third representative gray value of an image, using gray values of the plurality of pixels in the one frame data based on determination that the input image signal is the still image signal. 
     The signal controller may further include an image compensator that is configured to generate the compensated image data based on at least one of the driving frequency, the first representative gray value for each pixel, the second representative gray value for the area, and the third representative gray value of the image. 
     The image compensator may compensate the image data depending on the one frame data using compensation data stored in a look-up table (LUT). 
     The driving frequency may be lower than 60 Hz. 
     The image determiner may receive a panel self refresh (PSR) control signal for controlling a PSR mode in which the display panel displays a still image together with the input image signal, and may determine whether the input image signal is the still image signal based on the PSR control signal. 
     Each of the plurality of pixels may include: a first transistor connected to the data line providing the data signal based on a scan signal received through a scan line; a capacitor connected to the first transistor and configured to store a voltage corresponding to the data signal; and a second transistor providing a driving current based on the voltage. 
     According to another embodiment of the present disclosure, a driving method of a display device includes: determining whether an input image signal is a still image signal; based on determination that the input image signal is the still image signal, determining color coordinates using data values of one frame data of the input image signal, and generating compensated image data by compensating image data of the one frame data based on the color coordinates; and generating a data signal based on the compensated image data and outputting the compensated image data to a display panel through a data line. 
     The determining whether the input image signal is the still image signal may include comparing at least two frame data of the input image signal to determine whether the input image signal is the still image signal. 
     The method may further include determining a driving frequency at which the one frame data is displayed based on determination that the input image signal is the still image signal. 
     The method may further include calculating at least one of a first representative gray value for each pixel of a plurality of pixels, a second representative gray value for each area, and a third representative gray value of an image, using gray values of the plurality of pixels in the one frame data based on determination that the input image signal is the still image signal. 
     The method may further include generating the compensated image data based on at least one of the driving frequency, the first representative gray value for each pixel of the plurality of pixels, the second representative gray value for each area, and the third representative gray value of the image. 
     The compensated image data may be generated based on compensation data stored in a look-up table (LUT). 
     The driving frequency may be lower than 60 Hz. 
     The determining of whether the input image signal is the still image signal may include: receiving a panel self refresh (PSR) control signal for controlling a PSR mode displaying a still image together with the input image signal; and determining whether the input image signal is the still image signal based on the PSR control signal. 
     According to another embodiment of the present disclosure, a display device includes: a display panel including a pixel that includes a light emitting element that is configured to emit light according to a driving current that corresponds to a data signal applied to a data line; a signal controller configured to generate image data depending on an input image signal; and a data driver configured to generate the data signal using the image data, wherein the display panel displays an image corresponding to the input image signal at a driving frequency, and wherein voltage values of data signals corresponding to a same gray are different from each other based on the driving frequency. 
     The signal controller may determine whether the driving frequency is lower than 60 Hz, and compensate one frame data of the input image signal to generate the image data. 
     The signal controller may determine whether the frequency is lower than 60 Hz based on the input image signal being a still image signal. 
     The display device is capable of providing improved image quality when it is driven at a low frequency. 
     According to the embodiments, the display device is capable of providing an image with consistent image quality even when the display device is driven at various driving frequencies. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    illustrates a block diagram of a display device according to an embodiment. 
         FIG.  2    illustrates a circuit diagram showing an example of a pixel in the display device of  FIG.  1    according to one embodiment. 
         FIGS.  3 A and  3 B  illustrate a graph showing a change in luminance depending on a driving frequency. 
         FIG.  4    illustrates a block diagram of a signal controller included in the display device of  FIG.  1    according to one embodiment. 
         FIG.  5    shows a look-up table (LUT) stored in a display device according to an embodiment. 
         FIG.  6    illustrates an example of color coordinates. 
         FIG.  7    is a flowchart showing a driving method of a display device according to an embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments of the present disclosure are shown. As those skilled in the art would realize, the embodiments described herein may be modified in variously different ways, without departing from the spirit or scope of the present disclosure. 
     To clearly describe the present disclosure, parts that are irrelevant to the description may be omitted, and like numerals refer to like or similar constituent elements throughout the specification. 
     Further, sizes and thicknesses of constituent members may be arbitrarily shown in the accompanying drawings for better understanding and ease of description, but the present disclosure is not limited to the illustrated sizes and thicknesses. In the drawings, the thicknesses of layers, films, panels, regions, etc., may be exaggerated for clarity for better understanding and ease of description. 
     It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” another element, it can be directly on the other element or one or more intervening elements may also be present therebetween. In contrast, when an element is referred to as being “directly on” another element, there may be no intervening elements present therebetween. Further, in the specification, the word “on” or “above” means positioned on or below the object portion, and does not necessarily mean positioned on an upper side of the object portion based on a gravitational direction. 
     In addition, unless explicitly described to the contrary, the word “comprise” and its variations such as “comprises” or “comprising” will be understood to imply an inclusion of stated elements but not an exclusion of any other elements. 
       FIG.  1    illustrates a block diagram of a display device according to an embodiment. 
     The display device  10  includes a display panel  100 , a scan driver  110 , a data driver  120 , an emission driver  130 , a voltage supplier  140 , and a signal controller  150 . In addition, the display device  10  may be connected to an application processor  160 , or the display device  10  may include the application processor  160 . Some of the constituent elements illustrated in  FIG.  1    may not be essential for implementing the display device  10 , so the display device  10  described in the present disclosure may include more or less constituent elements than the foregoing listed constituent elements. 
     The display  100  includes a plurality of pixels PX connected to corresponding scan lines of a plurality of scan lines SL 1  to SLn, corresponding data lines of a plurality of data lines DL 1  to DLm, and corresponding emission control lines of a plurality of emission control lines EM 1  to EMn. Each of the pixels PX emits light corresponding to a data signal that is transferred to the corresponding pixel PX via the data lines DL 1  to DLm, and the display panel  100  may display an image accordingly. 
     The scan lines SL 1  to SLn may extend substantially in a row direction of the pixels PX to be substantially parallel to each other. The emission control lines SL 1  to SLn may also extend substantially in the row direction to be substantially parallel to each other. The data lines SL 1  to DLm may extend substantially in a column direction of the pixels PX to be substantially parallel to each other. 
     Each of the plurality of pixels PX may receive a high power supply voltage ELVDD and a low power supply voltage ELVSS and an initialization voltage Vint from the voltage supplier  140 . 
     Herein, supply wires of an (i−1)-th scan line SL(i−1) and an i-th scan line SLi, the emission control line EMi, and the initialization voltage Vint of a pixel PX(i,j) may be disposed in the same layer, and supply wires of the data line DLi and the power supply voltages ELVDD and ELVSS of the pixel PX(i,j) may be disposed in the same layer. The supply wires of the scan lines SL(i−1) and SLi, the emission control line EMi, the initialization voltage Vint, the data line DLi, and the power supply voltages ELVDD and ELVSS may include a same material or different materials, and may be disposed in the same layer or different layers on a substrate (not shown). 
     The scan driver  110  is connected to the display panel  100  through the scan lines SL 1  to SLn. The scan driver  110  may generate a plurality of scan signals based on a second control signal CONT 2  and transfer them to a corresponding scan line among the scan lines SL 1  to SLn. The second control signal CONT 2  may include an operation control signal of the scan driver  110  that is generated and transferred by the signal controller  150 . 
     The data driver  120  is connected to each pixel PX of the display panel  100  through the data lines DL 1  to DLm. The data driver  120  may receive an image data signal DATA and transmit a data signal to a corresponding one of the data lines DL 1  to DLm based on a first control signal CONT 1 . The first control signal CONT 1  may include an operation control signal of the data driver  120  that is generated and transferred by the signal controller  150 . 
     The data driver  120  may select a gray voltage based on the image data signal DATA and transfer it to the data lines DL 1  to DLm as a data signal. For example, the data driver  120  may sample and hold the image data signal DATA based on the first control signal CONT 1 , and may transfer a plurality of data signals to the data lines DL 1  to DLm. The data driver  120  may apply the data signal having a predetermined voltage level to the data lines DL 1  to DLm while scan signal having a low level is applied. 
     The emission driver  130  may generate a plurality of emission control signals based on a third control signal CONT 3 . The third control signal CONT 3  may include an emission start signal, an emission clock signal switching to a low level at different times, a holding control signal, and/or the like. The emission start signal may generate a first emission control signal for displaying an image of one frame. The emission clock signal included in the third control signal CONT 3  may include synchronization signals for applying the emission control signal to the emission control lines EM 1  to EMn. The holding control signal may control the emission driver  130  to continuously output an emission signal during low frequency driving. 
     The signal controller  150  may receive an external image signal IS and an input control signal that controls display of an image on the display panel  100 . The image signal IS may include luminance information that is divided by gray values of each pixel PX of the display panel  100 . 
     The input control signal that is transferred to the signal controller  150  may include a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a main clock signal MCLK, a data enable signal DE, a panel self refresh (PSR) control signal PSC, and the like. 
     The signal controller  150  may generate the control signals (e.g., CONT 1 , CONT 2 , CONT 3 , CONT 4 ) and the image data signal DATA based on the image signal IS, the horizontal synchronizing signal Hsync, the vertical synchronization signal Vsync, the main clock signal MCLK, the data enable signal DE, and the like. 
     The signal controller  150  may process the image signal IS in accordance with an operating condition of the display panel  100  and the data driver  120  based on the input image signal IS and the input control signal. Specifically, the signal controller  150  may generate the image data signal DATA through an image processing process such as gamma correction and luminance compensation on the image signal IS. 
     The signal controller  150  may transfer the first control signal CONT 1  for controlling an operation of the data driver  120  to the data driver  120  together with the image data signal DATA that may have been processed. In addition, the signal controller  150  may transfer the second control signal CONT 2  for controlling an operation of the scan driver  110  to the scan driver  110 . The signal controller  150  may also transfer the third control signal CONT 3  for controlling an operation of the emission driver  130  to the emission driver  130 . 
     In addition, the signal controller  150  may control driving of the voltage supplier  140 . The power supplier  140  may supply the power supply voltages ELVDD and ELVSS for driving each of the pixels PX of the display panel  100  and the initialization voltage Vint. For example, the signal controller  150  may transfer a fourth control signal CONT 4  for controlling an operation of the voltage supplier  140  to the voltage supplier  140 . The voltage supplier  140  may be connected to a voltage supply line that may be formed in the display panel  100 . 
       FIG.  2    illustrates a circuit diagram showing an example of a pixel PX in the display device  10  of  FIG.  1    according to one embodiment. 
     The pixel PX disposed in an i-th row and a j-th column, (also referred to as pixel PX (i,j)) includes a plurality of T 1 , T 2 , T 3 - 1 , T 3 - 2 , T 4 - 1 , T 4 - 2 , T 5 , T 6 , and T 7 , a capacitor Cst, and an organic light emitting diode OLED that are selectively connected to each of the i-th scan line SLi to which an i-th scan signal SL[i] is supplied, an (i−1)-th scan line SL(i−1) to which an (i−1)-th scan signal SL[i−1] is supplied, an emission control line EMi to which an emission control signal EM[i] is supplied, a supply wire of the initialization voltage Vint, a data line DLj to which a data signal Data is supplied, and supply wires of the high and low power supply voltages ELVDD and ELVSS. 
     A gate of the first transistor T 1  is connected to a drain of the third transistor T 3 , the drain of the fourth transistor T 4 - 2 , and a first electrode of the capacitor Cst at a first node N 1 , a source of the first transistor T 1  is connected to a drain of the second transistor T 2  and a drain of the fifth transistor T 5  at a second node N 2 , and a drain of the first transistor T 1  is connected to a source of the third transistor T 3 - 1  and a source of the sixth transistor T 6  at a third node N 3 . 
     A gate of the second transistor T 2  is connected to the scan line SLi, a source of the second transistor T 2  is connected to the data line DLj, and a drain of the second transistor T 2  is connected to the source of the first transistor T 1  at the second node N 2 . 
     A gate of the third transistor T 3  is connected to the scan line SLi, a source of the third transistor T 3  is connected to the drain of the first transistor T 1  at the third node N 3 , and the drain of the third transistor T 3  is connected to the gate of the first transistor T 1  at the first node N 1 . 
     The third transistor T 3  may be formed as double gate transistor including transistors T 3 - 1  and T 3 - 2 . Gates of the third transistors T 3 - 1  and T 3 - 2  are connected to the scan line SLi, a source of the third transistor T 3 - 1  is connected to the drain of the first transistor T 1  and connected to an anode of an organic light emitting diode OLED via the sixth transistor T 6  at the third node N 3 , and a drain of the third transistor T 3 - 2  is connected to the first electrode of the capacitor Cst, a drain of the fourth transistor T 4 - 2 , and a gate of the first transistor T 1  at the first node N 1 . In addition, a drain of the third transistor T 3 - 1  and a source of the third transistor T 3 - 2  may be connected to each other. 
     A gate of the fourth transistor T 4  is connected to the (i−1)-th scan line SL(i−1), a source of the fourth transistor T 4  is connected to the supply wire of the initialization voltage Vint, and a drain of the fourth transistor T 4  is connected to the gate of the first transistor T 1  at the first node N 1 . 
     The fourth transistor T 4  may be formed as double gate transistor including transistors T 4 - 1  and T 4 - 2 . A gate of the fourth transistor T 4 - 1  is connected to the scan line SL(i−1), a drain of the fourth transistor T 4 - 1  is connected to the supply wire of the initialization voltage Vint, and a source of the fourth transistor T 4 - 1  is connected to a drain of the fourth transistor T 4 - 2 . 
     A gate of the fourth transistor T 4 - 2  is connected to the scan line SL(i−1), the drain of the fourth transistor T 4 - 2  is connected to the source of the fourth transistor T 4 - 1 , and a source of the fourth transistor T 4 - 2  is connected to the first electrode of the capacitor Cst, the drain of the third transistor T 3 - 2 , and the gate of the first transistor T 1  at the first node N 1 . 
     The fourth transistor T 4  may be turned on according to the signal received through the scan line SL(i−1) to transfer the initialization voltage Vint to the gate of the first transistor T 1 , thereby performing an initialization operation for initializing a voltage of the gate of the first transistor T 1 . 
     A gate of the fifth transistor T 5  is connected to the emission control line EMi, a source of the fifth transistor T 5  is connected to the supply wire of the high power voltage ELVDD, and a drain of the fifth transistor T 5  is connected to the source of the first transistor T 1  at the second node N 2 . 
     A gate of the sixth transistor T 6  is connected to the emission control line EMi, a source of the sixth transistor T 6  is connected to the drain of the first transistor T 1  at the third node N 3 , and a drain of the sixth transistor T 6  is connected to the first electrode of the organic light emitting diode OLED. The first transistor T 1  is connected to the organic light emitting diode OLED through the sixth transistor T 6 . 
     A gate of the seventh transistor T 7  is connected to the scan line SL(i−1), a source of the seventh transistor T 7  is connected to the first electrode of the organic light emitting diode OLED, and a drain of the seventh transistor T 7  is connected to the drain of the fourth transistor T 4  and the supply wire of the initialization voltage Vint. 
     The capacitor Cst has the first electrode that is connected to the gate of the first transistor T 1  and the drain of the third transistor T 3  at the first node N 1 , and a second electrode that is connected to the supply wire of the high power supply voltage ELVDD. 
     The organic light emitting diode OLED has the first electrode, a second electrode disposed on the first electrode, and an organic emission layer disposed between the first electrode and the second electrode. The first electrode of the organic light emitting diode OLED is connected to the source of the seventh transistor T 7  and the drain of the sixth transistor T 6 , and the second electrode of the organic light emitting diode OLED is connected to the supply wire of the low power supply voltage ELVSS. 
       FIGS.  3 A and  3 B  illustrate a graph showing a change in luminance depending on a driving frequency of the display device  10 . 
     Specifically,  FIG.  3 A  illustrates a graph showing luminance that changes in each frame when the driving frequency of the display device  10  is 60 Hz, and  FIG.  3 B  illustrates a graph showing luminance that changes in each frame when the driving frequency of the display device  10  is 30 Hz. 
     As illustrated in  FIG.  3 B , when the driving frequency is low, that is, when an image is displayed on the display device  10  at 30 Hz, the luminance decreases by about 8.43% from 420 nit to 384.6 nit. In comparison, as illustrated in  FIG.  3 A , when the image is displayed on the display device  10  at 60 Hz, the luminance decreases by 0.71% from 420 nit to 417. 
     In the case of driving the display device  10  at the low driving frequency, e.g., 30 Hz compared to 60 Hz, one frame period is longer, so a driving current flowing through the first transistor T 1  may change due to a leakage current of the third transistor T 3  and the fourth transistor T 4 , thereby decreasing the luminance. Therefore, among two consecutive frames expressing a same luminance, a difference between the luminance at the end of a preceding frame and the luminance at the start of a following frame may be large. Flicker caused by such a large difference in luminance may be visually recognized by a viewer. 
     The flicker phenomenon may be differently recognized by the viewer depending on colors even when the same luminance is expressed. Table 1 shows a flicker recognition index depending on colors, and the larger the flicker perception index, the more easily may the viewer recognize the flicker. 
     
       
         
           
               
               
             
               
                 TABLE 1 
               
             
            
               
                   
               
               
                 Luminance 
                 Flicker recognition index by colors 
               
            
           
           
               
               
               
               
               
               
               
               
            
               
                 (nit) 
                 White 
                 Red 
                 Green 
                 Blue 
                 Yellow 
                 Magenta 
                 Cyan 
               
               
                   
               
               
                 100 
                 1.63 
                 0.65 
                 1.18 
                 0.57 
                 1.31 
                 0.79 
                 1.35 
               
               
                  60 
                 1.40 
                 0.65 
                 1.35 
                 0.65 
                 1.42 
                 0.95 
                 1.37 
               
               
                  10 
                 1.51 
                 0.63 
                 0.70 
                 0.71 
                 1.09 
                 1.02 
                 1.19 
               
               
                  2 
                 0.90 
                 0.35 
                 0.01 
                 0.68 
                 0.76 
                 0.72 
                 0.51 
               
               
                   
               
            
           
         
       
     
     As shown in Table 1 above, it can be seen that the flicker recognition index differs depending on luminance and colors, and the flicker recognition characteristic is generally low in red and blue colors. The display device  10  may reduce recognition of flicker when it is driven at a low driving frequency by compensating the image data signal DATA with a color having a low flicker recognition characteristic depending on luminance by considering at least one of a representative gray value and a color for each area, a representative gray value and a color of an entire image in the image data of one frame. 
       FIG.  4    illustrates a block diagram of the signal controller  150  included in the display device  10  of  FIG.  1    according to one embodiment. 
     The signal controller  150  of the display device  10  includes an image determiner  151 , an image compensator  153 , and a frame memory  155 . 
     The image determiner  151  receives the image signal IS. The image determiner  151  may determine whether the inputted image signal IS displays a still image or a motion picture (or a video). In an embodiment, the image determiner  151  may compare data of at least two frames of the input image signal IS to determine whether the input image signal IS is a still image signal or a motion picture signal. The image determiner  151  may store at least two frame data of the image signal IS in the frame memory  155 , and may compare them to determine whether the image signal IS displays a still image or a motion picture. Herein, at least two frame data may be temporally adjacent (or consecutive) to each other. According to an embodiment, the image determiner  151  may determine that the image signal IS displays a still image when two same adjacent frame data are the same or the substantially the same in succession during a predetermined frame (time) or longer. 
     For example, the image determiner  151  may compare at least two temporally adjacent frame data among the frame data of the image signal IS. Specifically, the image determiner  151  may compare first data values (e.g., first data values of a specific region) included in the first frame data and second data values (e.g., second data values of the specific region) included in the second frame data. If a difference (or an amount of the difference) between the first data values and the second data values is smaller than or equal to a predetermined reference value, the image determiner  151  may determine that the input image signal IS is a still image signal, and if the difference exceeds the predetermined reference value, the image determiner  151  may determine that the input image signal IS is a motion picture signal. 
     As another example, the image determiner  151  may compare data values of some regions within at least two temporally adjacent frame data among the frame data of the image signal IS. For example, the image determiner  151  may compare data values of one or more arbitrary regions corresponding to each other within the first and second frame data. Specifically, the image determiner  151  may compare first data values corresponding to a specific region among the first frame data and second data values corresponding to the specific region among the second frame data. If a difference (or an amount of the difference) between the first data values and the second data values is smaller than or equal to a predetermined reference value, the image determiner  151  may determine that the specific region of the input image signal IS displays a still image, and if the difference exceeds the predetermined reference value, the image determiner  151  may determine that the specific region of the input video signal IS displays a motion picture signal. 
     According to one embodiment, in response to the PSR control signal PSC, the image determiner  151  may determine that a PSR mode section is started based on a PSR start signal included in the PSR control signal PSC, and may determine that the received input image signal IS is a still image signal. The image determiner  151  may store frame data of the input image signal IS received when the PSR start signal is received in the frame memory  155 . 
     The image determiner  151  may determine a driving frequency for displaying an image of one frame when the image signal IS or a region thereof is determined to display a still image. For example, the image determiner  151  may determine the driving frequency based on a period during which a data enable signal DE is inputted. The image determiner  151  may also determine the driving frequency in consideration of a period during which a still image is maintained (e.g., a period from which the still image is started and until the still image is converted). The image determiner  151  may determine the driving frequency so that an image of one frame is displayed with a lower driving frequency as the period during which the still image is maintained is longer. In this case, the driving frequency (also referred to as a low driving frequency) may be 60 Hz or less, for example, 30 Hz, 20 Hz, 15 Hz, or 10 Hz. 
     The image determiner  151  may use gray values of the pixels in image data of one frame of the image signal IS to calculate at least one of a representative gray value for each pixel of the image data of one frame, a representative gray value for each area of the image data of one frame, and a representative gray value of the image data of one frame. 
     For example, the image determiner  151  may calculate a representative gray value of one pixel as follows.
 
Gray px   =a*R+b*G+c*B   (Equation 1)
 
     Herein, R, G, and B may respectively indicate gray values of red, green, and blue (R, G, and B) of the corresponding pixel, while a, b, and c are constants, and a color with a higher flicker recognition index may have a greater representative gray value. In Equation 1, red, green, and blue R, G, and B values have been described as an example, but cyan, magenta, yellow, and black (CMYK) values may be used. It is understood that the present disclosure is not limited to these examples. 
     The image determiner  151  may divide the image data into a plurality of regions, and may calculate an average representative gray value of pixels included in each of the regions. For example, the image determiner  151  may calculate an average representative gray value of all pixels included in the image data. 
     The image compensator  153  may compensate the image data received from the image determiner  151  to display color coordinates corresponding to the determined driving frequency and the representative gray value. For example, the image compensator  153  may include a predetermined compensation look-up table (LUT)  1530  based on a physical characteristic of the display panel  100 . The image compensator  153  may compensate the image data by referring to the compensation LUT  1530 . The compensation LUT  1530  includes a plurality of LUTs  1531 ,  1533 , and  1535  corresponding to the representative gray value and the driving frequency. Even though the image compensator  153  may have the same representative gray value, the image compensator  153  may compensate the image data by reading a different LUT based on the driving frequency. 
       FIG.  5    shows a look-up table (LUT) stored in the display device  10  according to an embodiment, and  FIG.  6    illustrates an example of color coordinates. 
     The image compensator  153  of  FIG.  4    may read an LUT according to color coordinates corresponding to the representative gray value of a pixel, and may compensate the grayscale value of the image data accordingly. For example, as illustrated in  FIG.  6   , in a case where the color coordinates of the display device  10  are 0.305 and 0.321 ({circle around (1)}), and the representative gray value is 223, the color coordinates may be moved to 0.299 and 0.312 ({circle around (5)}) referring to the LUT of  FIG.  5   . To this end, the image compensator  153  may compensate a gray value of the image data using a compensation value stored in the LUT. The compensation value depending on the color coordinates may be different according to a physical characteristic of the display panel  100 . In addition, one LUT stores one or more compensation values corresponding to a plurality of gray values. 
     Each LUT may have a compensation value corresponding to the representative gray value and the driving frequency. In  FIG.  5   , when the representative gray values are 191 to 255, the image compensator  153  applies the compensation value stored in LUT #1 ( 1531  in  FIG.  4   ), but when the driving frequencies are different, the image compensator  153  may apply a compensation value stored in another LUT even when they have a same representative gray value. 
     Referring back to  FIG.  4   , the image compensator  153  may output the compensated image data DATA to the data driver  120 . 
     In  FIG.  4   , the image determiner  151  and the frame memory  155  are shown to be included in the signal controller  150 , but the image determiner  151  and the frame memory  155  may be included in a different element, for example, the application processor  160 . In this case, steps S 100 , S 110 , S 120 , and S 130  in  FIG.  7    to be described below may be performed by the application processor  160 . 
       FIG.  7    is a flowchart showing a driving method of the display device  10  according to an embodiment. 
     The image determiner  151  of  FIG.  4    receives an image signal IS (S 100 ). 
     Next, the image determiner  151  determines whether the inputted image signal IS displays a still image or a motion picture (S 110 ). 
     If the image determiner  151  determines that the image signal IS or a region thereof displays a still image, the image determiner  151  determines a driving frequency for displaying an image of one frame (S 120 ). If the image determiner  151  determines that the image signal IS or a region thereof displays a motion picture, the image compensator  153  may output the image data DATA to the data driver  120  without compensating the image data DATA (S 170 ). The image determiner  151  may compare data of at least two frames of the input image signal IS to determine whether the input image signal IS is a still image signal or a motion picture signal. Alternatively, the image determiner  151  may receive the PSR control signal PSC and determine that a PSR mode section is started based on a PSR start signal included in the PSR control signal PSC, and may determine that the received input image signal IS is a still image signal. 
     Next, the image determiner  151  may use gray values of pixels in image data of one frame of the image signal IS and calculate at least one of a representative gray value for each pixel, a representative gray value for each area, and a representative gray value for the entire image (S 130 ). The image determiner  151  may calculate a representative gray value using the gray values and weight values of red, green, blue R, G, and B of pixels. 
     The image compensator  153  may determinate color coordinates corresponding to the driving frequency that is determined in S 120  and the representative gray value that is calculated in S 130  (S 140 ). 
     The image compensator  153  may look up the compensation LUT  1530  based on the corresponding color coordinates (S 150 ). 
     The image compensator  153  may compensate the image data using the compensation value stored in the compensation LUT  1530  (S 160 ). 
     The image compensator  153  may output the compensated image data DATA to the data driver  120  (S 170 ). 
     As described above, the display device  10  may reduce recognition of flicker when it is driven at a low driving frequency by compensating the image data DATA with a color having a low flicker recognition characteristic based on luminance by considering at least one of a representative gray value and a color for each area, and a representative gray value and a color of an entire image in the image data of one frame. 
     While the present disclosure has been described in connection with some embodiments, it is to be understood that the present disclosure is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the present disclosure including the appended claims.