Patent Publication Number: US-8526412-B2

Title: Frequency division multiplexing of multiple data streams in a wireless multi-carrier communication system

Description:
This application claims the benefit of U.S. application Ser. No. 10/932,586, entitled “A Method for Multiplexing and Transmitting Multiple Multimedia Streams to Mobile Terminals over Terrestrial Radio,” filed Sep. 1, 2004, provisional U.S. Application Ser. No. 60/559,740, entitled “Multiplexing and Transmission of Multiple Data Streams in a Wireless Multi-Carrier Communication System,” filed Apr. 5, 2004, and provisional U.S. Application Ser. No. 60/514,315, entitled “A Method for Frequency-Division Multiplex Various Multimedia Streams for Multicast Wireless Transmission to Mobile Devices,” filed Oct. 24, 2003. 
    
    
     BACKGROUND 
     I. Field 
     The present invention relates generally to communication, and more specifically to techniques for multiplexing multiple data steams in a wireless multi-carrier communication system. 
     II. Background 
     A multi-carrier communication system utilizes multiple carriers for data transmission. These multiple carriers may be provided by orthogonal frequency division multiplexing (OFDM), some other multi-carrier modulation techniques, or some other construct. OFDM effectively partitions the overall system bandwidth into multiple (N) orthogonal frequency subbands. These subbands are also referred to as tones, carriers, subcarriers, bins, and frequency channels. With OFDM, each subband is associated with a respective subcarrier that may be modulated with data. 
     A base station in a multi-carrier communication system may simultaneously transmit multiple data streams. Each data stream may be processed (e.g., coded and modulated) separately at the base station and may thus be recovered (e.g., demodulated and decoded) independently by a wireless device. The multiple data streams may have fixed or variables data rates and may use the same or different coding and modulation schemes. 
     Multiplexing multiple data streams for simultaneous transmission may be challenging if these streams are variable in nature (e.g., have data rates and/or coding and modulation schemes that change over time). In one simple multiplexing scheme, the multiple data streams are allocated different time slots or symbol periods using time division multiplexing (TDM). For this TDM scheme, only one data stream is sent at any given moment, and this data stream uses all subbands available for data transmission. This TDM scheme has certain undesirable characteristics. First, the amount of data that may be sent in the smallest time unit allocable to a given data stream, which may be viewed as the “granularity” for the data stream, is dependent on the coding and modulation scheme used for the data stream. Different coding and modulation schemes may then be associated with different granularities, which may complicate the allocation of resources to the data streams and may result in inefficient resource utilization. Second, if the granularity for a given coding and modulation scheme is too large relative to the decoding capability of a wireless device, then a large input buffer may be required at the wireless device to store received symbols. 
     There is therefore a need in the art for techniques to efficiently multiplex multiple data streams in a multi-carrier communication system. 
     SUMMARY 
     Techniques for multiplexing multiple data streams using frequency division multiplexing (FDM) in a wireless multi-carrier (e.g., OFDM) communication system are described herein. In an embodiment, M disjoint or non-overlapping “interlaces” are formed with U subbands usable for transmission, where M&gt;1 and U&gt;1. The interlaces are non-overlapping in that each usable subband is included in only one interlace. Each interlace is a different set of S subbands, where U=M·S. The S subbands in each interlace may be selected from S′ subbands that are uniformly distributed across the N total subbands and are evenly spaced apart by M subbands, where N=M·S′ and S′≧S. This interlaced subband structure can provide frequency diversity and simplify processing at a receiver. For example, the receiver may perform a “partial” S′-point fast Fourier transform (FFT) for each interlace of interest, instead of a full N-point FFT. The M interlaces may be used to transmit the multiple data streams in an FDM manner. In an embodiment, each interlace is used by only one data stream in each symbol period, and up to M data streams may be sent on the M interlaces in each symbol period. 
     In an embodiment, the multiple data streams are allocated “slots”, where each slot is a unit of transmission that may be equal to one interlace in one symbol period. M slots are then available in each symbol period and may be assigned slot indices 1 through M. Each slot index may be mapped to one interlace in each symbol period based on a slot-to-interlace mapping scheme. One or more slot indices may be used for an FDM pilot, and the remaining slot indices may be used for data transmission. The slot-to-interlace mapping may be such that the interlaces used for pilot transmission have varying distances to the interlaces used for each slot index in different OFDM symbol periods. This allows all slot indices used for data transmission to achieve similar channel estimation performance. 
     Each data stream may be processed as data packets of a fixed size. In this case, different numbers of slots may be used for each data packet depending on the coding and modulation scheme used for the data packet. Alternatively, each data stream may be processed as data packets of variable sizes. For example, the packet sizes may be selected such that an integer number of data packets is sent in each slot. In any case, if multiple data packets are sent in a given slot, then the data symbols for each data packet may be distributed across all subbands used for the slot, so that frequency diversity is achieved for each data packet sent in the slot. 
     Various aspects and embodiments of the invention are described in further detail below. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The features and nature of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout and wherein: 
         FIG. 1  shows a block diagram of a base station and a wireless device; 
         FIG. 2  shows an exemplary super-frame structure; 
         FIG. 3  shows an interlaced subband structure; 
         FIGS. 4A and 4B  show “staggered” and “cycled” FDM pilots, respectively; 
         FIG. 5  shows an exemplary mapping of slot indices to interlaces; 
         FIG. 6  illustrates coding of a data block with an outer code; 
         FIGS. 7A and 7B  show transmission of packets for different modes; 
         FIGS. 8A and 8B  show partitioning of different numbers of packets into slots; 
         FIG. 9A  shows a block diagram of a transmit (TX) data processor; 
         FIG. 9B  shows a block diagram of a modulator; 
         FIG. 10A  shows a block diagram of a demodulator; and 
         FIG. 10B  shows a block diagram of a receive (RX) data processor. 
     
    
    
     DETAILED DESCRIPTION 
     The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any embodiment or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments or designs. 
     The multiplexing techniques described herein may be used for various wireless multi-carrier communication systems. These techniques may also be used for the downlink as well as the uplink. The downlink (or forward link) refers to the communication link from the base stations to the wireless devices, and the uplink (or reverse link) refers to the communication link from the wireless devices to the base stations. For clarity, these techniques are described below for the downlink in an OFDM-based system. 
       FIG. 1  shows a block diagram of a base station  110  and a wireless device  150  in a wireless system  100  that utilizes OFDM. Base station  110  is generally a fixed station and may also be referred to as a base transceiver system (BTS), an access point, a transmitter, or some other terminology. Wireless device  150  may be fixed or mobile and may also be referred to as a user terminal, a mobile station, a receiver, or some other terminology. Wireless device  150  may also be a portable unit such as a cellular phone, a handheld device, a wireless module, a personal digital assistant (PDA), and so on. 
     At base station  110 , a TX data processor  120  receives multiple (T) data streams (or “traffic” data) and processes (e.g., encodes, interleaves, and symbol maps) each data stream to generate data symbols. As used herein, a “data symbol” is a modulation symbol for traffic data, a “pilot symbol” is a modulation symbol for pilot (which is data that is known a priori by both the base station and wireless devices), and a modulation symbol is a complex value for a point in a signal constellation for a modulation scheme (e.g., M-PSK, M-QAM, and so on). TX data processor  120  also multiplexes the data symbols for the T data streams and pilot symbols onto the proper subbands and provides a composite symbol stream. A modulator  130  performs OFDM modulation on the multiplexed symbols in the composite symbol stream to generate OFDM symbols. A transmitter unit (TMTR)  132  converts the OFDM symbols into analog signals and further conditions (e.g., amplifies, filters, and frequency upconverts) the analog signals to generate a modulated signal. Base station  110  then transmits the modulated signal from an antenna  134  to wireless devices in the system. 
     At wireless device  150 , the transmitted signal from base station  110  is received by an antenna  152  and provided to a receiver unit (RCVR)  154 . Receiver unit  154  conditions (e.g., filters, amplifies, and frequency downconverts) the received signal and digitizes the conditioned signal to generate a stream of input samples. A demodulator  160  performs OFDM demodulation on the input samples to obtain received symbols for one or more data streams of interest, and further performs detection (e.g., equalization or matched filtering) on the received symbols to obtain detected data symbols, which are estimates of the data symbols sent by base station  110 . An RX data processor  170  then processes (e.g., symbol demaps, deinterleaves, and decodes) the detected data symbols for each selected data stream and provides decoded data for that stream. The processing by demodulator  160  and RX data processor  170  is complementary to the processing by modulator  130  and TX data processor  120 , respectively, at base station  110 . 
     Controllers  140  and  180  direct operation at base station  110  and wireless device  150 , respectively. Memory units  142  and  182  provide storage for program codes and data used by controllers  140  and  180 , respectively. Controller  140  or a scheduler  144  may allocate system resources for the T data streams. 
     Base station  110  may transmit the T data streams for various services such as broadcast, multicast, and/or unicast services. A broadcast transmission is sent to all wireless devices within a designated coverage area, a multicast transmission is sent to a group of wireless devices, and a unicast transmission is sent to a specific wireless device. For example, base station  110  may broadcast a number of data streams for multimedia (e.g., television) programs and for multimedia content such as video, audio, teletext, data, video/audio clips, and so on. A single multimedia program may be broadcast as three separate data streams for video, audio, and data. This allows for independent reception of the video, audio, and data portions of the multimedia program by a wireless device. 
       FIG. 2  shows an exemplary super-frame structure  200  that may be used for system  100 . The T data streams may be transmitted in super-frames, with each super-frame having a predetermined time duration. A super-frame may also be referred to as a frame, a time slot, or some other terminology. For the embodiment shown in  FIG. 2 , each super-frame includes a field  212  for one or more TDM pilots, a field  214  for overhead/control data, and a field  216  for traffic data. The TDM pilot(s) may be used by a wireless device for synchronization (e.g., frame detection, frequency error estimation, timing acquisition, and so on). The overhead/control data may indicate various parameters for the T data streams (e.g., the coding and modulation scheme used for each data stream, the specific location of each data stream within the super-frame, and so on). The T data streams are sent in field  216 . Although not shown in  FIG. 2 , each super-frame may be divided into multiple (e.g., four) equal-sized frames to facilitate data transmission. Other frame structures may also be used for system  100 . 
       FIG. 3  shows an interlaced subband structure  300  that may be used for system  100 . System  100  utilizes an OFDM structure having N total subbands. U subbands may be used for data and pilot transmission and are called “usable” subbands, where U≦N. The remaining G subbands are not used and are called “guard” subbands, where N=U+G. As an example, system  100  may utilize an OFDM structure with N=4096 total subbands, U=4000 usable subbands, and G=96 guard subbands. 
     The U usable subbands may be arranged into M interlaces or disjoint subband sets. The M interlaces are disjoint or non-overlapping in that each of the U usable subbands belongs to only one interlace. Each interlace contains S usable subbands, where U=M·S. Each interlace may be associated with a different group of S′=N/M subbands that are uniformly distributed across the N total subbands such that consecutive subbands in the group are spaced apart by M subbands. For example, group  1  may contain subbands  1 , M+1, 2M+1, and so on, group  2  may contain subbands  2 , M+2, 2M+2, and so on, and group M may contain subbands M, 2M, 3M, and so on. For each group, S of the S′ subbands are usable subbands and the remaining S′-S subbands are guard subbands. Each interlace may then contain the S usable subbands in the group associated with the interlace. For the exemplary OFDM structure described above, M=8 interlaces may be formed, with each interlace containing S=500 usable subbands selected from among S′=512 subbands that are evenly spaced apart by M=8 subbands. The S usable subbands in each interlace are thus interlaced with the S usable subbands in each of the other M−1 interlaces. 
     In general, the system may utilize any OFDM structure with any number of total, usable, and guard subbands. Any number of interlaces may also be formed. Each interlace may contain any number of usable subbands and any one of the U usable subbands. The interlaces may also contain the same or different numbers of usable subbands. For simplicity, the following description is for the interlaced subband structure shown in  FIG. 3  with M interlaces and each interlace containing S uniformly distributed usable subbands. This interlaced subband structure provides several advantages. First, frequency diversity is achieved since each interlace contains usable subbands taken from across the entire system bandwidth. Second, a wireless device may recover data/pilot symbols sent on a given interlace by performing a partial S′-point FFT instead of a full N-point FFT, which can simplify the processing by the wireless device. 
     Base station  110  may transmit an FDM pilot on one or more interlaces to allow the wireless devices to perform various functions such as, for example, channel estimation, frequency tracking, time tracking, and so on. Base station  110  may transmit the FDM pilot and traffic data in various manners. 
       FIG. 4A  shows a data and pilot transmission scheme  400  with a “staggered” FDM pilot. In this example, M=8, one interlace is used for the FDM pilot in each symbol period, and the remaining seven interlaces are used for traffic data. The FDM pilot is sent on two designated interlaces in an alternating manner such that pilot symbols are sent on one interlace (e.g., interlace  3 ) in odd-numbered symbol periods and on another interlace (e.g., interlace  7 ) in even-numbered symbol periods. The two interlaces used for the FDM pilot are staggered or offset by M/2=4 interlaces. This staggering allows the wireless devices to observe the channel response for more subbands, which may improve performance. 
       FIG. 4B  shows a data and pilot transmission scheme  410  with a “cycled” FDM pilot. In this example, M=8, one interlace is used for the FDM pilot in each symbol period, and the remaining seven interlaces are used for traffic data. The FDM pilot is sent on all eight interlaces in a cycled manner such that pilot symbols are sent on a different interlace in each M-symbol period duration. For example, the FDM pilot may be sent on interlace  1  in symbol period  1 , then interlace  5  in symbol period  2 , then interlace  2  in symbol period  3 , and so on, then interlace  8  in symbol period  8 , then back to interlace  1  in symbol period  9 , and so on. This cycling allows the wireless devices to observe the channel response for all usable subbands. 
     In general, an FDM pilot may be sent on any number of interlaces and on any one of the M interlaces in each symbol period. The FDM pilot may also be sent using any pattern, two of which are shown in  FIGS. 4A and 4B . 
     Base station  110  may transmit the T data streams on the M interlaces in various manners. In a first embodiment, each data stream is sent on the same one or more interlaces in each symbol period in which the data stream is sent. For this embodiment, the interlaces are statically assigned to each data stream. In a second embodiment, each data stream may be sent on different interlaces in different symbol periods in which the data stream is sent. For this embodiment, the interlaces are dynamically assigned to each data stream, which may improve frequency diversity and also ensure that the quality of the channel estimate is independent of the slot index or indices assigned to the data stream. The second embodiment may be viewed as a form of frequency hopping and is described in further detail below. 
     To average out channel estimation and detection performance for all T data streams, transmission scheme  410  may be used for the first embodiment with statically assigned interlaces, and either transmission scheme  400  or  410  may be used for the second embodiment with dynamically assigned interlaces. If the FDM pilot is sent on the same one interlace (which is called the pilot interlace) in each symbol period and is used to obtain channel estimates for all M interlaces, then the channel estimate for an interlace that is closer to the pilot interlace is typically better than the channel estimate for an interlace that is further away from the pilot interlace. Detection performance for a data stream may be degraded if the stream is consistently allocated interlaces that are far away from the pilot interlace. The allocation of interlaces with varying distances (or spacing or offset) to the pilot interlace can avoid this performance degradation due to channel estimation bias. 
     For the second embodiment, M slots may be defined for each symbol period, and each slot may be mapped to one interlace in one symbol period. A slot usable for traffic data is also called a data slot, and a slot usable for the FDM pilot is also called a pilot slot. The M slots in each symbol period may be given indices  1  through M. Slot index  1  may be used for the FDM pilot, and slot indices  2  through M may be used for data transmission. The T data streams may be allocated slots with indices  2  through M in each symbol period. The use of slots with fixed indices can simplify the allocation of slots to data streams. The M slot indices may be mapped to the M interlaces in each symbol period based on any mapping scheme that can achieve the desired frequency diversity and channel estimation performance. 
     In a first slot-to-interlace mapping scheme, the slot indices are mapped to interlaces in a permutated manner. For transmission scheme  400  with M=8 and one pilot slot and seven data slots in each symbol period, the mapping may be performed as follows. The eight interlaces may be denoted by an original sequence {I 1 , I 2 , I 3 , I 4 , I 5 , I 6 , I 7 , I 8 }. A permutated sequence may be formed as {I 1 , I 5 , I 3 , I 7 , I 2 , I 6 , I 4 , I 8 }. The i-th interlace in the original sequence is placed in the i br -th position in the permutated sequence, where iε{1 . . . 8}, i br ε{1 . . . 8}, and (i br −1) is a bit-reverse index of (i−1). An offset of −1 is used for i and i br  because these indices start from 1 instead of 0. As an example, for i=7, (i−1)=6, the bit representation is ‘110’, the bit-reverse index is ‘011’, (i br −1)=3, and i br =4. The 7-th interlace in the original sequence is thus placed in the 4-th position in the permutated sequence. The two interlaces used for the FDM pilot are then combined in the permutated sequence to form a shortened interlace sequence {I 1 , I 5 , I 3/7 , I 2 , I 6 , I 4 , I 8 }. The k-th slot index used for data transmission (or the k-th data slot index), for kε{2 . . . 8}, is then mapped to the (k−1)-th interlace in the shortened interlace sequence. For each symbol period thereafter, the shortened interlace sequence is circularly shifted to the right by two positions and wraps around to the left. The k-th data slot index is again mapped to the (k−1)-th interlace in the circularly shifted shortened interlace sequence. 
       FIG. 5  shows the mapping of slot indices to interlaces for the first mapping scheme described above. Slot index  1 , which is used for the FDM pilot, is mapped to interlaces  3  and  7  on alternating symbol periods for transmission scheme  400 . Data slot indices  2  through  8  are mapped to the seven interlaces in the shortened interlace sequence {I 1 , I 5 , I 3/7 , I 2 , I 6 , I 4 , I 8 } for the first symbol period, to the circularly or cyclically shifted shortened interlace sequence {I 4 , I 8 , I 1 , I 5 , I 3/7 , I 2 , I 6 } for the second symbol period, and so on. As shown in  FIG. 5 , each data slot index is mapped to seven different interlaces in seven consecutive symbol periods, where one of the seven interlaces is either interlace  3  or  7 . All seven data slot indices should then achieve similar performance. 
     In a second slot-to-interlace mapping scheme, the slot indices are mapped to interlaces in a pseudo-random manner. A pseudo-random number (PN) generator may be used to generate PN numbers that are used to map slot indices to interlaces. The PN generator may be implemented with a linear feedback shift register (LFSR) that implements a particular generator polynomial, e.g., g(x)=x 15 +x 14 +1. For each symbol period j, the LFSR is updated and the V least significant bits (LSBs) in the LFSR may be denoted as PN (j), where j=1, 2, . . . and V=log 2  M. The k-th data slot index, for kε{2 . . . M}, may be mapped to interlace [(PN(j)+k) mod M]+1, if this interlace is not used for the FDM pilot, and to interlace [(PN(j)+k+1) mod M]+1, otherwise. 
     In a third slot-to-interlace mapping scheme, the slot indices are mapped to interlaces in a circular manner. For each symbol period j, the k-th data slot index, for kε{2 . . . M}, may be mapped to interlace [(j+k)mod M]+1, if this interlace is not used for the FDM pilot, and to interlace [(j+k+1)mod M]+1, otherwise. 
     The M slot indices may thus be mapped to the M interlaces in various manners. Some exemplary slot-to-interlace mapping schemes have been described above. Other mapping schemes may also be used, and this is within the scope of the invention. 
     The slots may be allocated to the T data streams in various manners. In a first slot allocation scheme, each data stream is allocated a sufficient number of slots in each super-frame to transmit a non-negative integer number of data packets (i.e., zero or more data packets). For this scheme, the data packets may be defined to have a fixed size (i.e., a predetermined number of information bits), which can simplify the coding and decoding for the data packets. Each fixed-size data packet may be coded and modulated to generate a coded packet having a variable size that is dependent on the coding and modulation scheme used for the packet. The number of slots needed to transmit the coded packet is then dependent on the coding and modulation scheme used for the packet. 
     In a second slot allocation scheme, each data stream may be allocated a non-negative integer number of slots in each super-frame, and an integer number of data packets may be sent in each allocated slot. The same coding and modulation scheme may be used for all data packets sent in any given slot. Each data packet may have a size that is dependent on (1) the number of data packets being sent in the slot and (2) the coding and modulation scheme used for that slot. For this scheme, the data packets may have variable sizes. 
     The slots may also be allocated to the data streams in other manners. For clarity, the following description assumes that the first slot allocation scheme is used by the system. 
     Each data stream may be coded in various manners. In an embodiment, each data stream is coded with a concatenated code comprised of an outer code and an inner code. The outer code may be a block code such as a Reed-Solomon (RS) code or some other code. The inner code may be a Turbo code, a convolutional code, or some other code. 
       FIG. 6  shows an exemplary outer coding scheme using a Reed-Solomon outer code. A data stream is partitioned into data packets. In an embodiment, each data packet has a fixed size and contains a predetermined number of information bits or L information bytes (e.g., 1000 bits or 125 bytes). The data packets for the data stream are written into rows of a memory, one packet per row. After K rs  data packets have been written into K rs  rows, block coding is performed column-wise, one column at a time. In an embodiment, each column contains K rs  bytes (one byte per row) and is coded with an (N rs , K rs ) Reed-Solomon code to generate a corresponding codeword that contains N rs  bytes. The first K rs  bytes of the codeword are data bytes (which are also called systematic bytes) and the last N rs -K rs  bytes are parity bytes (which may be used by a wireless device for error correction). The Reed-Solomon coding generates N rs -K rs  parity bytes for each codeword, which are written to rows N rs -K rs  through N rs  of the memory after the K rs  rows of data. An RS block contains K rs  rows of data and N rs -K rs  rows of parity. In an embodiment, N rs =16 and K rs  is a configurable parameter, e.g., K rs ε{12, 14, 16}. The Reed-Solomon code is disabled when K rs =N rs . Each data/parity packet (or each row) of the RS block is then coded by the Turbo inner code to generate a corresponding coded packet. A code block contains N rs  coded packets for the N rs  rows of the RS block. 
     The N rs  coded packets for each code block may be sent in various manners. For example, each code block may be transmitted in one super-frame. Each super-frame may be partitioned into multiple (e.g., four) frames. Each code block may then be partitioned into multiple (e.g., four) sub-blocks, and each sub-block of the code block may be sent in one frame of the super-frame. The transmission of each code block in multiple parts across a super-frame can provide time diversity. 
     Each data stream may be transmitted with or without hierarchical coding, where the term “coding” in this context refers to channel coding rather than data coding at a transmitter. A data stream may be comprised of two substreams, which are called a base stream and an enhancement stream. The base stream may carry base information and may be sent to all wireless devices within the coverage area of the base station. The enhancement stream may carry additional information and may be sent to wireless devices observing better channel conditions. With hierarchical coding, the base stream is coded and modulated to generate a first modulation symbol stream, and the enhancement stream is coded and modulated to generate a second modulation symbol stream. The same or different coding and modulation schemes may be used for the base stream and enhancement stream. The two modulation symbol streams may then be scaled and combined to obtain one data symbol stream. 
     Table 1 shows an exemplary set of eight “modes” that may be supported by system  100 . These eight modes are given indices of  1  through  8 . Each mode is associated with a specific modulation scheme (e.g., QPSK or 16-QAM) and a specific inner code rate (e.g., 1/3, 1/2, or 2/3). The first five modes are for “regular” coding with only the base stream, and the last three modes are for hierarchical coding with the base and enhancement streams. For simplicity, the same modulation scheme and inner code rate are used for both the base and enhancement streams for each hierarchical coding mode. 
     
       
         
           
               
               
               
               
             
               
                 TABLE 1 
               
               
                   
               
               
                 Mode 
                 Modulation Scheme 
                 Inner Code Rate 
                 Number Slots/Packet 
               
               
                   
               
             
            
               
                   
               
            
           
           
               
               
               
               
            
               
                 1 
                 QPSK 
                 1/3 
                 3 
               
               
                 2 
                 QPSK 
                 1/2 
                 2 
               
               
                 3 
                 16-QAM 
                 1/3 
                 1.5 
               
               
                 4 
                 16-QAM 
                 1/2 
                 1 
               
               
                 5 
                 16-QAM 
                 2/3 
                 0.75 
               
               
                 6 
                 QPSK/QPSK 
                 1/3 
                 3 
               
               
                 7 
                 QPSK/QPSK 
                 1/2 
                 2 
               
               
                 8 
                 QPSK/QPSK 
                 2/3 
                 1.5 
               
               
                   
               
            
           
         
       
     
     The fourth column of Table 1 indicates the number of slots needed to transmit one fixed-size data packet for each mode. Table 1 assumes a data packet size of 2·S information bits and S usable subbands per slot (e.g., S=500). Each slot has a capacity of S data symbols since the slot is mapped to one interlace with S usable subbands and each subband can carry one data symbol. For mode  1 , a data packet with 2·S information bits is coded with a rate 1/3 inner code to generate 6·S code bits, which are then mapped to 3·S data symbols using QPSK. The 3·S data symbols for the data packet may be sent in three slots, with each slot carrying S data symbols. Similar processing may be performed for each of the other modes in Table 1. 
     Table 1 shows an exemplary design. Data packets of other sizes (e.g., 500 information bits, 2000 information bits, and so on) may also be used. Multiple packet sizes may also be used, for example, so that each packet may be sent in an integer number of slots. For example, a packet size of 1000 information bits may be used for modes  1 ,  2  and  4 , and a packet size of 1333 information bits may be used for modes  3  and  5 . In general, the system may also support any number of modes for any number of coding and modulation schemes, any number of data packet sizes, and any packet size. 
       FIG. 7A  shows transmission of a minimum integer number of data packets, using one slot in each of an integer number of symbol periods, for each of the first five modes listed in Table 1. One data packet may be sent using one slot in (1) three symbol periods for mode  1 , (2) two symbol periods for mode  2 , and (3) one symbol period for mode  4 . Two data packets may be sent using one slot in three symbol periods for mode 3, since each data packet takes 1.5 slots to send. Four data packets may be sent using one slot in three symbol periods for mode  5 , since each data packet takes 0.75 slots to send. 
       FIG. 7B  shows transmission of a minimum integer number of data packets, using an integer number of slots in one symbol period, for each of the first five modes listed in Table 1. One data packet may be sent in one symbol period using (1) three slots for mode  1 , (2) two slots for mode  2 , and (3) one slot for mode  4 . Two data packets may be sent in one symbol period using three slots for mode  3 . Four data packets may be sent in one symbol period using three slots for mode  5 . 
     As shown in  FIGS. 7A and 7B , the minimum number of data packets may be transmitted in several manners for each mode (except for mode  4 ). Transmitting the minimum number of data packets in a shorter time period reduces the amount of ON time required to receive the data packets but provides less time diversity. The converse is true for transmitting the minimum number of data packets over a longer time period. 
       FIG. 8A  shows the partitioning of a single coded packet into three slots for mode  1 . The three slots may be for three different interlaces in one symbol period or one interlace in three different symbol periods. The three slots may observe different channel conditions. The bits in the coded packet may be interleaved (i.e., reordered) prior to the partitioning into three slots. The interleaving for each coded packet can randomize the signal-to-noise ratios (SNRs) of the bits across the coded packet, which may improve decoding performance. The interleaving may be performed in various manners, as is known in the art. The interleaving may also be such that adjacent bits in the coded packet are not sent in the same data symbol. 
       FIG. 8B  shows the partitioning of four coded packets into three slots for mode  5 . The three slots may be sequentially filled by the four coded packets, as shown in  FIG. 8B . When multiple coded packets share a slot (such as for modes  3  and  5 ), all of the bits to be sent in the slot may be interleaved such that the bits for each coded packet sent in the slot are distributed across the subbands used for the slot. The interleaving across each slot provides frequency diversity for each coded packet sent in the slot and may improve decoding performance. 
     The interleaving across a slot may be performed in various manners. In an embodiment, the bits for all coded packets to be sent in a given slot are first mapped to data symbols, and the data symbols are then mapped to the subbands used for the slot in a permutated manner. For the symbol-to-subband mapping, a first sequence with S′ sequential values, 0 through S′−1, is initially formed. A second sequence of S′ values is then created such that the i-th value in the second sequence is equal to the bit reverse of the i-th value in the first sequence. All values that are equal to or greater than S′ in the second sequence are removed to obtain a third sequence with S values ranging from 0 through S−1. Each value in the third sequence is then incremented by one to obtain a sequence of S permutated index values ranging from 1 through S, which is denoted as F (j). The j-th data symbol in the slot may be mapped to the F (j)-th subband in the interlace used for the slot. For example, if S=500 and S′=512, then the first sequence is {0, 1, 2, 3, . . . , 510, 511}, the second sequence is {0, 256, 128, 384, . . . , 255, 511}, and the third sequence is {0, 256, 128, 384, . . . 255}. The sequence F (j) only needs to be computed once and may be used for all slots. Other mapping schemes may also be used for the symbol-to-subband mapping to achieve interleaving across each slot. 
     In general, each data stream may carry any number of data packets in each super-frame, depending on the data rate of the stream. Each data stream is allocated a sufficient number of slots in each super-frame based on its data rate, subject to the availability of slots and possibly other factors. For example, each data stream may be constrained to a specified maximum number of slots in each symbol period, which may be dependent on the mode used for the data stream. Each data stream may be limited to a specified maximum data rate, which is the maximum number of information bits that may be transmitted in each symbol period for the data stream. The maximum data rate is typically set by the decoding and buffering capabilities of the wireless devices. Constraining each data stream to be within the maximum data rate ensures that the data stream can be recovered by wireless devices having the prescribed decoding and buffering capabilities. The maximum data rate limits the number of data packets that may be transmitted in each symbol period for the data stream. The maximum number of slots may then be determined by the maximum number of data packets and the mode used for the data stream. 
     In an embodiment, each data stream may be allocated an integer number of slots in any given symbol period, and multiple data streams do not share an interlace. For this embodiment, up to M−1 data streams may be sent on the M−1 data slots in each symbol period, assuming that one slot is used for the FDM pilot. In another embodiment, multiple data streams may share an interlace. 
       FIG. 9A  shows a block diagram of an embodiment of TX data processor  120  at base station  110 . TX data processor  120  includes T TX data stream processors  910   a  through  910   t  for the T data streams, a TX overhead data processor  930  for overhead/control data, a pilot processor  932  for the TDM and FDM pilots, and a multiplexer (Mux)  940 . Each TX data stream processor  910  processes a respective data stream {d i } to generate a corresponding data symbol stream {Y i }, for iε{1 . . . T}. 
     Within each TX data stream processor  910 , an encoder  912  receives and encodes data packets for its data stream {d i } and provides coded packets. Encoder  912  performs encoding in accordance with, for example, a concatenated code comprised of a Reed-Solomon outer code and a Turbo or convolutional inner code. In this case, encoder  912  encodes each block of K rs  data packets to generate N rs  coded packets, as shown in  FIG. 6 . The encoding increases the reliability of the transmission for the data stream. Encoder  912  may also generate and append a cyclic redundancy check (CRC) value to each coded packet, which may be used by a wireless device for error detection (i.e., to determine whether the packet is decoded correctly or in error). Encoder  912  may also shuffle the coded packets. 
     An interleaver  914  receives the coded packets from encoder  912  and interleaves the bits in each coded packet to generate an interleaved packet. The interleaving provides time and/or frequency diversity for the packet. A slot buffer  916  is then filled with interleaved packets for all the slots allocated to the data stream, e.g., as shown in  FIG. 8A  or  8 B. 
     A scrambler  918  receives and scrambles the bits for each slot with a PN sequence to randomize the bits. M different PN sequences may be used for the M slot indices. The M PN sequences may be generated, for example, with a linear feedback shift register (LFSR) that implements a particular generator polynomial, e.g., g(X)=x 15 +x 14 +1. The LFSR may be loaded with a different 15-bit initial value for each slot index. Furthermore, the LFSR may be reloaded at the start of each symbol period. Scrambler  918  may perform an exclusive-OR on each bit in a slot with a bit in the PN sequence to generate a scrambled bit. 
     A bit-to-symbol mapping unit  920  receives the scrambled bits for each slot from scrambler  918 , maps these bits to modulation symbols in accordance with a modulation scheme (e.g., QPSK or 16-QAM) selected for the data stream, and provides data symbols for the slot. The symbol mapping may be achieved by (1) grouping sets of B bits to form B-bit binary values, where B≧1, and (2) mapping each B-bit binary value to a complex value for a point in a signal constellation for the modulation scheme. The outer and inner codes for encoder  912  and the modulation scheme for mapping unit  920  are determined by the mode used for the data stream. 
     If the data stream is sent using hierarchical coding, then the base stream may be processed by one set of processing units  912  through  920  to generate a first stream of modulation symbols, and the enhancement stream may be processed by another set of processing units  912  through  920  to generate a second stream of modulation symbols (not shown in  FIG. 9  for simplicity). The same coding and modulation scheme may be used for both the base stream and the enhancement stream, as shown in Table 1, or different coding and modulation schemes may be used for the two streams. A combiner may then receive and combine the first and second modulation symbol streams to generate the data symbols for the data stream. The hierarchical coding may also be performed in other manners. For example, the scrambled bits for both the base stream and enhancement stream may be provided to a single bit-to-symbol mapping unit that provides the data symbols for the data stream. 
     A slot-to-interlace mapping unit  922  maps each slot assigned to data stream {d i } to the proper interlace based on the slot-to-interlace mapping scheme used by the system (e.g., as shown in  FIG. 5 ). A symbol-to-subband mapping unit  924  then maps the S data symbols in each slot to the proper subbands in the interlace to which the slot is mapped. The symbol-to-subband mapping may be performed in a manner to distribute the S data symbols across the S subbands used for the slot, as described above. Mapping unit  924  provides data symbols for data stream {d i }, which are mapped to the proper subbands used for the data stream. 
     TX overhead data processor  930  processes overhead/control data in accordance with a coding and modulation scheme used for overhead/control data and provides overhead symbols. Pilot processor  932  performs processing for the TDM and FDM pilots and provides pilot symbols. Multiplexer  940  receives the mapped data symbols for the T data streams from TX data stream processors  910   a  through  910   t , the overhead symbols from TX overhead data processor  930 , the pilot symbols from pilot processor  932 , and guard symbols. Multiplexer  940  provides the data symbols, overhead symbols, pilot symbols, and guard symbols onto the proper subbands and symbol periods based on a MUX_TX control from controller  140  and outputs a composite symbol stream, {Y C }. 
       FIG. 9B  shows a block diagram of an embodiment of modulator  130  at base station  110 . Modulator  130  includes an inverse fast Fourier transform (IFFT) unit  950  and a cyclic prefix generator  952 . For each symbol period, IFFT unit  950  transforms the N symbols for the N total subbands to the time domain with an N-point IFFT to obtain a “transformed” symbol that contains N time-domain samples. To combat intersymbol interference (ISI), which is caused by frequency selective fading, cyclic prefix generator  952  repeats a portion (or C samples) of each transformed symbol to form a corresponding OFDM symbol that contains N+C samples. The repeated portion is often called a cyclic prefix or guard interval. For example, the cyclic prefix length may be C=512 for N=4096. Each OFDM symbol is transmitted in one OFDM symbol period (or simply, symbol period), which is N+C sample periods. Cyclic prefix generator  952  provides an output sample stream {y} for the composite symbol stream {Y C } 
       FIG. 10A  shows a block diagram of an embodiment of demodulator  160  at wireless device  150 . Demodulator  160  includes a cyclic prefix removal unit  1012 , a Fourier transform unit  1014 , a channel estimator  1016 , and a detector  1018 . Cyclic prefix removal unit  1012  removes the cyclic prefix in each received OFDM symbol and provides a sequence of N input samples, {x(n)}, for the received OFDM symbol. Fourier transform unit  1014  performs a partial Fourier transform on the input sample sequence {x(n)} for each selected interlace m and provides a set of S received symbols, {X m (k)}, for that interlace, where m=1 . . . M. Channel estimator  1016  derives channel gain estimate {Ĥ m (k)} for each selected interlace m based on the input sample sequence {x(n)}. Detector  1018  performs detection (e.g., equalization or matched filtering) on the set of S received symbols {X m (k)} for each selected interlace with the channel gain estimate {Ĥ m (k)} for that interlace and provides S detected data symbols {Ŷ m (k)} for the interlace. 
       FIG. 10B  shows a block diagram of an embodiment of RX data processor  170  at wireless device  150 . A multiplexer  1030  receives the detected data symbols for all interlaces from detector  1018 , performs multiplexing of the detected data and overhead symbols for each symbol period based on the MUX_RX control, provides each detected data symbol stream of interest to a respective RX data stream processor  1040 , and provides a detected overhead symbol stream to an RX overhead data processor  1060 . 
     Within each RX data stream processor  1040 , a subband-to-symbol demapping unit  1042  maps the received symbol on each subband in a selected interlace to the proper position within a slot. An interlace-to-slot demapping unit  1044  maps each selected interlace to the proper slot. A symbol-to-bit demapping unit  1046  maps the received symbols for each slot to code bits. A descrambler  1048  descrambles the code bits for each slot and provides descrambled data. A slot buffer  1050  buffers one or more slots of descrambled data, performs reassembly of packets as needed, and provides descrambled packets. A deinterleaver  1052  deinterleaves each descrambled packet and provides a deinterleaved packet. A decoder  1054  decodes the deinterleaved packets and provides decoded data packets for data stream {d i }. In general, the processing performed by the units within RX data stream processor  1040  is complementary to the processing performed by the corresponding units within TX data stream processor  910  in  FIG. 9A . The symbol-to-bit demapping and the decoding are performed in accordance with the mode used for the data stream. RX overhead data processor  1060  processes the received overhead symbols and provides decoded overhead data. 
     Because of the periodic structure of the M interlaces, Fourier transform unit  1014  may perform a partial S′-point Fourier transform for each selected interlace m to obtain the set of S received symbols {X m (k)} for that interlace. The Fourier transform for the S′ subbands that include all S subbands of interlace m, where m=1 . . . M, may be expressed as: 
                                     X   ⁡     (       M   ·   k     +   m     )       =       ⁢       ∑     n   =   1     N     ⁢           ⁢       x   ⁡     (   n   )       ·     W   N       (       M   ·   k     +   m     )     ⁢   n             ,                 =       ⁢       ∑     n   =   1     N     ⁢           ⁢       x   ⁡     (   n   )       ·     W   N   mn     ·     W     S   ′     kn           ,           ⁢           ⁢   for   ⁢           ⁢   k     =     1   ⁢           ⁢   …   ⁢           ⁢     S   ′         ,     ⁢                   Eq   ⁢           ⁢     (   1   )                 
where x(n) is the input sample for sample period n,
 
                 W   N   αβ     =     ⅇ       -   j     ⁢       2   ⁢   π   ⁢     (     α   -   1     )     ⁢     (     β   -   1     )       N           ,         
and N=M·S′. The following terms may be defined:
 
     
       
         
           
             
               
                 
                   
                       
                   
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       g m (n) is a time-domain value obtained by accumulating M rotated samples that are spaced apart by S′ samples.   
     
       
    
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     A partial S′-point Fourier transform for interlace m may be performed as follows. Each of the N input samples in the sequence {x(n)} for one symbol period is first rotated by W N   mn , as shown in equation (2), to obtain a sequence of N rotated samples {{tilde over (x)} m (n)}. The rotated samples are then accumulated, in S′ sets of M rotated samples, to obtain S′ time-domain values {g m (n)}, as shown in equation (3). Each set contains every S′-th rotated sample in the sequence {{tilde over (x)} m (n)}, with the S′ sets being associated with different starting rotated samples in the sequence {{tilde over (x)} m (n)}. A normal S′-point Fourier transform is then performed on the S′ time-domain values {g m (n)} to obtain the S′ received symbols for interlace m. The received symbols for the S usable subbands are retained, and the received symbols for the S′-S unused subbands are discarded. 
     For channel estimation, a partial S′-point Fourier transform may be performed on the N input samples for interlace p used for the FDM pilot to obtain a set of S received pilot symbols, {X p (k)} or X(M·k+p). The modulation on the received pilot symbols is then removed to obtain channel gain estimates {Ĥ p (k)} for the subbands in interlace p, as follows:
 
 Ĥ   p ( k )= Ĥ ( M·k+p )= X ( M·k+p )· P *( M·k+p ), for k=1 . . . S′,  Eq (5)
 
where P(M·k+p) is the known pilot symbol for the k-th subband in interlace p and “*” is a complex conjugate. Equation (5) assumes that all S′ subbands are used for pilot transmission. An S′-point IFFT is then performed on the channel gain estimates {Ĥ p (k)} to obtain a sequence of S′ modulated time-domain channel gain values, {h p (n)}, which may be expressed as: h p (n)=h(n)·W N   pn , for n=1 . . . S′. The channel gain values in the sequence {h p (n)} are then derotated by multiplication with W N   −pn  to obtain a sequence of S′ derotated time-domain channel gain values, h(n)=h p (n)·W N   −pn , for n=1 . . . S′.
 
     The channel gain estimates for the subbands in interlace m may then be expressed as: 
                                   H   ^     m     ⁡     (   k   )       =       ⁢       H   ^     ⁡     (       M   ·   k     +   m     )         ,                 =       ⁢       ∑     n   =   1       S   ′       ⁢           ⁢       h   ⁡     (   n   )       ·     W   N       (       M   ·   k     +   m     )     ⁢   n             ,           ⁢       for   ⁢           ⁢   k     =     1   ⁢           ⁢   …   ⁢           ⁢       S   ′     .                       =       ⁢       ∑     n   =   1       S   ′       ⁢           ⁢       h   ⁡     (   n   )       ·     W   N   mn     ·     W     S   ′     kn           ,           ⁢                   Eq   ⁢           ⁢     (   6   )                 
As indicated in equation (6), the channel gain estimates for the subbands in interlace m may be obtained by first multiplying each derotated time-domain channel gain value in the sequence {h(n)} by W N   mn  to obtain a sequence of S′ rotated channel gain values, {{tilde over (h)} m (n)}. A normal S′-point FFT is then performed on the sequence {{tilde over (h)} m (n)} to obtain S′ channel gain estimates for the subbands in interlace m. The derotation of h p (n) by W −pn  and the rotation of h(n) by W N   mn  may be combined, so that the rotated channel gain values for interlace m may be obtained as h m (n)=h p (n)·W N   (m−p)n , for n=1 . . . S′.
 
     An exemplary channel estimation scheme has been described above. The channel estimation may also be performed in other manners. For example, the channel estimates obtained for different interlaces used for pilot transmission may be filtered (e.g., over time) and/or post-processed (e.g., based on a least square estimate of the impulse response {h(n)}) to obtain a more accurate channel estimate for each interlace of interest. 
     The multiplexing techniques described herein may be implemented by various means. For example, these techniques may be implemented in hardware, software, or a combination thereof. For a hardware implementation, the processing units used to perform the multiplexing at a base station may be implemented within one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, micro-controllers, microprocessors, other electronic units designed to perform the functions described herein, or a combination thereof. The processing units used to perform the complementary processing at a wireless device may also be implemented within one or more ASICs, DSPs, and so on. 
     For a software implementation, the multiplexing techniques may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described herein. The software codes may be stored in a memory unit (e.g., memory unit  142  or  182  in  FIG. 1 ) and executed by a processor (e.g., controller  140  or  180 ). The memory unit may be implemented within the processor or external to the processor, in which case it can be communicatively coupled to the processor via various means as is known in the art. 
     The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.