Patent Publication Number: US-2013236030-A1

Title: Mute drive circuit

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure relates to mute drive circuits, and more particularly to a mute drive circuit for eliminating noise generated by plugging or unplugging into/out of an AC power source or implementing a turning on/off operation. 
     2. Description of Related Art 
     Noise such as a popping sound and/or static is familiar to people during plugging in or out power supply and implementing turning on or off operation on multimedia electronic devices, such as MP3 and mobile phones. A method to eliminate or suppress such noise is using a tank circuit connected to the power supply for releasing energy when the power is suddenly decreased or increased, thereby a mute mode could be performed for a period to eliminate the POP noise. However, the tank circuit needs two transistors and an electrolytic capacitor, and so is costly. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Many aspects of the present embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. 
       The drawing is a schematic circuit diagram of one embodiment of mute drive circuit in accordance with the present disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     Embodiments of the present disclosure will be described below, with reference to the accompanying drawings. 
     The mute circuit  10  can be applied in multimedia electronic devices, such as MP3 and mobile phones. Referring to the drawing, the mute drive circuit  10  includes a micro-controller  12 , a switch such as an npn transistor  14 , a mute circuit  16 , a first voltage-dividing resistance  181 , a second voltage-dividing resistance  182 , and a current-limiting resistance  183 . 
     The micro-controller  12  includes an I/O port  122 . The I/O port  22  is a GPRO port. When the electronic device using the mute circuit  10  is plugged into an AC power source, a system voltage Vcc is connected and the I/O port  22  is set to a logic low (low voltage). When the electronic device is turned on, the I/O port  22  is controlled by the micro-controller  12  through software to be logic low for a period and then pulled up to a logic high (high voltage). When the electronic device is turned off, the I/O port  22  is controlled by the micro-controller  12  through software to be logic low. When the electronic device using the mute circuit  10  is unplugged from the AC power source, as a decreasing rate of voltage of the I/O port  22  is faster than a decreasing rate of voltage of the system voltage Vcc, therefore the system voltage Vcc is read as logic high and the I/O port  22  as logic low. The system voltage Vcc can be considered as logic high and the I/O port  22  is logic low when, for example, the voltage of the system voltage Vcc is above 0.7V. 
     A base of the npn transistor  14  is connected with the I/O port  22  of the micro-controller  12  via the first voltage-dividing resistance  183 , and is grounded via the second voltage-dividing resistance  181 . An emitter of the npn transistor  14  is grounded. A connector of the npn transistor  14  is connected with the system voltage Vcc via the current-limiting resistance  183 , and connected with the mute circuit  16  forming the control port O of the mute circuit  16 . 
     When the I/O port  22  is pulled down to a logic low, the npn transistor  14  is turned off, which makes the control port O of the mute circuit  16  connect to the system voltage Vcc, that is to say, the control port O is set to the logic high. When the I/O port  22  is pulled up to a logic high, the npn transistor  14  is turned on, which makes the control port O of the mute circuit  16  connect to ground, that is to say, the control port O is set to the logic low. 
     The mute circuit  16  performs the mute mode when the control port O is set to a logic high, and performs the normal mode when the control port O is set to the logic low. 
     When the electronic device using the mute circuit  10  is plugged into an AC power source , the I/O port  122  is pulled down to the logic low, that is to say, the control port O is set to the logic high, and the mute circuit  16  performs the mute mode. When the electronic device is turned on, the I/O port  122  is controlled by the micro-controller  12  to keep to be logic low for a period and then be pulled up to the logic high, that is to say, the control port O is set to the logic low for a period and then pulled up to the logic high, the mute circuit  16  performs the mute mode for a period and then enters into the normal mode. When the electronic device is turned off, the I/O port  122  is controlled by the micro-controller  12  to be logic low, that is to say, the control port  0  is set to the logic high, and the mute circuit  16  performs the mute mode. When the electronic device using the mute circuit  10  is unplugged from the AC power source, the system voltage Vcc is pulled up to the logic high, and the I/O port  122  is pulled down to the logic low, that is to say, the control port O is pulled down to the logic high, the mute circuit  16  performs the mute mode. 
     The mute drive circuit  10  uses hardware characteristics of the micro-controller, the system voltage VCC, and the I/O port to control the mute circuit  16  to perform the mute mode, thereby eliminating noise generated by plugging or unplugging into/out of the AC power source or implementing the turning on/off operation. 
     Although the features and elements of the present disclosure are described as embodiments in particular combinations, each feature or element can be used alone or in other various combinations within the principles of the present disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.