Patent Publication Number: US-7898832-B2

Title: RV converter with current mode and voltage mode switching

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 12/370,142, filed on Feb. 12, 2009, which, in turn, is a continuation of U.S. patent application Ser. No. 11/590,158, filed on Oct. 31, 2006, now U.S. Pat. No. 7,515,444, which in turn, claims priority to and the benefit of U.S. Provisional Patent Application No. 60/732,169, filed on Nov. 1, 2005, hereby incorporated by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a switched mode power supply and more particularly to a switched mode power supply that can be used in AC/DC converters and DC/DC converters which incorporates both voltage mode and current mode logic to provide a multi-mode switched mode power supply which optimizes the transient response time and output regulation relative to known switched mode power supplies. 
     2. Description of the Prior Art 
     Both linear and switched mode power supplies are known in the art. Such power supplies are normally known as converters and are used to provide a regulated source of DC power to a DC device. AC/DC converters are used to convert an unregulated source of AC power to a regulated source of DC power. DC/DC converters are used to convert an unregulated source of DC power to a regulated source of DC power. 
     AC linear converters provide linear output power as a function of input power. Such linear converters normally include a step down transformer, a half or full wave rectifier and a voltage regulator. DC linear converters simply include a regulator. Although such linear power supplies are able to provide a fairly stable source of DC electrical power, such power supplies are relatively heavy, bulky and inefficient. 
     As such, switched mode power supplies have been developed. Such switched mode power supplies normally have lighter weight and are more efficient than linear power supplies. Such switched mode power supplies may include a high frequency transformer, a high frequency switching circuit and a pulse width modulation (PWM) controller for controlling the switching circuit. 
     A switched mode power supply or converter should maintain its specified performance (i.e regulated output voltage) during any changes in the input source and/or output load. By sensing those changes, the control logic of a converter generates and adjusts a train of high frequency pulses from the PWM controller to regulate the performance of the converter based those changes. Examples of such switched mode converters are disclosed in US Patent Application Publication Nos.: US 2003/0026115 A1; US 2003/0034762 A1; US 2003/0090246 A1; US 2003/0151928 A1; US 2004/0263139 A1; US 2005/0116695; US 2005/0212500 A1; US 2005/0219870 A1; and US 2005/0231984 A1; all hereby incorporated by reference. 
     Different control circuits are known to be used to control such switched mode converters. Voltage-mode and current-mode control methods are the most popular ones. US Patent Application Publication No. US 2003/00347762 A1 discloses a voltage controlled switched mode converter. In such voltage controlled switched mode converters, the output voltage of the converter is typically sensed and compared with a reference voltage. The difference between the converter output voltage and the reference voltage is used to control the duty cycle of the PWM, which, in turn, is applied to a switching circuit. As such, any changes in the output voltage due to load current and/or input voltage changes are utilized to adjust the PWM width of the drive pulses in order to regulate the output voltage. 
     Voltage controlled converters are known to have excellent voltage regulation in order to provide a regulated output voltage in response to changes in the input voltage and the output load. Such voltage controlled converters can also maintain good regulation even at no load. Unfortunately, such voltage controlled converters manifest a slow transient response to input and output load changes. Moreover, such voltage controlled converters are generally not suitable for power converters configured with a push-pull topology due to the possible flux imbalance of the high frequency transformer. 
     As mentioned above, current controlled switched mode converters are also known. US Patent Application Publication US 2004/0263139 discloses such a current controlled switched mode converter. In general, such current controlled switched mode converters include two feedback loops: an outer feedback loop, which senses the DC output voltage and delivers a DC control voltage to an inner loop which senses the peak power switcher current and keeps them constant on a pulse-by-pulse basis. Such current controlled switched mode converter offer many advantages over voltage controlled switched mode converters, such as, solving the flux imbalance problem in converters configured with push-pull topology. Such current controlled switched mode converters also have relatively faster transient response times to both input voltage and output load changes relative to voltage controlled switched mode converters. Finally, such current controlled switched mode converters simplify feedback-loop stabilization relative to voltage controlled switched mode converters. 
     Unfortunately, such current controlled switched mode converters have relatively poor output regulation compared to voltage controlled switched mode converters, especially during light load conditions. As such, current controlled switched mode converters normally need a fixed minimum load to stabilize the control loop and maintain output regulation during light load conditions. In some applications, such as during conditions when the converter is connected to a battery as a load, the battery may be damaged and lose its recharge capability permanently due to it being discharged to an extreme low voltage for a long time by the minimum load when the input power to the converter is lost. 
     Another problem with such switched mode converters relates to electromagnetic compatibility (EMC) and thermal management. In particular, even though such switched mode converters are relatively more efficient than linear power supplies, such switched mode converters are noisy due to the switching and thus can result in electromagnetic interference. In addition, in certain applications, such as recreational vehicle (RV) applications, the output power requirements of the such switched mode converter is designed to provide all of the power to the DC loads in an RV vehicle including cabin lighting, furnace fan motors and the like. The power requirement of such loads is relatively substantial. As such, such switched mode converters generate a significant amount of heat that must be dissipated. As such, electromagnetic compatibility (EMC) and thermal management are also very important considerations in the design and implementation of a switched mode converter. 
     Thus, there is a need to combine the advantages of both the voltage controlled and current controlled switched mode converters to provide a switched mode converter with better performance than a voltage controlled or current controlled switched mode converter individually while at the same time takes into account EMC as well as thermal management. 
     SUMMARY OF THE INVENTION 
     Briefly, the present invention relates to a switched mode converter that includes both voltage mode and current mode control. The switched mode converter also includes mode logic for switching between a voltage mode and a current mode. The converter includes current sensing circuitry for sensing the switcher current on the primary side of the transformer and the load current on the secondary side as well as voltage sensing circuitry for sensing the converter output voltage. When the load current is less than a predetermined value, the converter operates in a voltage mode. During the voltage mode, the output voltage of the voltage mode controller is used to control the duty cycle of a pulse width modulation (PWM) controller. When the load current is greater than a predetermined value, the converter operates in a current mode. In a current mode, the primary switcher current is used to control the PWM controller. As such, during a light load in which the converter is voltage controlled, there is no need for a minimum load to stabilize the control loop. In a current-mode, the control loop will have a relatively faster transient response and avoid flux imbalance in push-pull topology. As such, the converter provides the advantages of both known voltage controlled and current controlled switched mode converters. In addition, by the careful arrangement of the locations of a EMC filter, a primary heat sink, a secondary heat sink, a power transformer T 1  and other power devices as well as a cooling fan, a smaller EMC filter can be used due to the primary heat sink performing a dual function of thermal management and additionally providing EMC shielding to prevent the noise, for example, the noise generated by the transformer, from reaching the filter. In addition, the primary heat sink is configured to face the air flow while the secondary heat sink is placed close to the fan with its fin direction the same as the direction of the air flow. As such, both the primary and the secondary heat sink get maximum air flow, allowing smaller heat sinks to be used in order to provide a reliable and cost-effective switched mode converter. 
    
    
     
       DESCRIPTION OF THE DRAWING 
       These and other advantages of the present invention will be readily understood with reference to the following description and attached drawing, wherein: 
         FIG. 1  is a block diagram of the switched mode converter in accordance with the present invention. 
         FIG. 2 . is a schematic diagram of the switched mode converter illustrated in  FIG. 1 . 
         FIG. 3  is a top view of an exemplary power board for the switched mode converter illustrated in  FIGS. 1 and 2 , illustrating the EMC filter and primary and secondary side heat sinks. 
         FIG. 4  is a front isometric view of the power board illustrated in  FIG. 3 , shown mounted on a chassis. 
         FIG. 5  is similar to  FIG. 4  but illustrating a side isometric view. 
         FIG. 6A  is a front isometric view of an exemplary housing for the power board and chassis illustrated in  FIGS. 4 and 5 , shown with an exemplary cover attached. 
         FIG. 6B  is similar to  FIG. 6A , but shown with the cover removed. 
         FIG. 7A  is a side elevational view of an exemplary primary heat sink for use with the present invention. 
         FIG. 7B  is a front elevational view of the primary heat sink illustrated in  FIG. 7A . 
         FIG. 8A  is a front elevational view of an exemplary secondary heat sink for use with the present invention. 
         FIG. 8B  is a side elevational view of the secondary heat sink illustrated in  FIG. 8A . 
     
    
    
     DETAILED DESCRIPTION 
     The present invention relates to a switched mode converter that includes both voltage mode and current mode control. The switched mode converter also includes mode logic for switching between a voltage mode and a current mode to combine the advantages of both current controlled and voltage controlled switched mode converters. The principles of the present invention are applicable to both AC to DC converters as well as DC to DC converters. 
     Exemplary Block Diagram 
     Referring to  FIG. 1 , the switched mode converter in accordance with the present invention is generally identified with the reference numeral  20 . The switched mode converter  20  includes a power source  22 , a high frequency transformer  24  and an output terminal  26 . AC power sources are rectified by a rectifier  23 . EMC filtering is also provided. The output of the high frequency transformer  24  is rectified and further filtered by an output rectification and output filter  25 . 
     The high frequency transformer  24  is driven by a PWM controller  28  that is coupled thereto by way of a high frequency switching circuit  30 . The switched mode converter  20  includes a multi-mode controller configured to operate the converter  20  in both a current controlled mode and a voltage controlled mode. In a voltage controlled mode, a first voltage sensor  32  monitors the output voltage of the converter  20 . The output voltage from the first voltage sensor  32  is applied to a voltage mode controller  34  forming a voltage feedback loop. The voltage mode controller  34  is used to reduce the duty cycle of the output pulses of the PWM controller  28  when the output voltage of the converter  20  is greater than the voltage preset by the voltage sensor  32  and a reference voltage to provide regulation of the voltage at the converter output terminals  26 . 
     A current mode controller  33  includes a second voltage sensor  36 , an outer voltage controller  38 , an optical coupler  42 , an inner current controller  39 , and a current feedback and switching point of voltage mode vs current mode device  48 . The output voltage is sensed by a second voltage sensor  36  and applied to the outer voltage controller  38  forming a current setting for the inner current loop. The inner current controller  39  is also used to control the duty cycle of the output pulses from the PWM controller  28  by comparing the feedback current from a current sense circuit  46  with the current setting from the outer voltage controller  38 . 
     Various sensors and protection circuitry, such as thermal, over-current and under-voltage protection, generally identified by the reference numerals  40  and  41 , may be optionally applied to the voltage mode  34  and current mode  33  controllers. Additional sensors and features, such as a soft start circuit, generally identified with the reference numerals  50  and  51  can also be used to control the PWM controller  28  directly. 
     The voltage mode and current mode feed back loops from the voltage and current mode controllers  34  and  33 , respectively, are applied to a mode switching device  44 , either directly or alternatively by way of optical couplers  42 . The mode switching device  44  switches the control of the PWM controller  28  between the voltage mode controller  34  and the current mode controller  33 . The selection of voltage mode or current mode control is determined as a function of a predetermined current value sensed by the current sense circuitry  46  and the output of the outer voltage controller  38 . To ensure current mode control taking place, the output voltage setting of the outer voltage controller  34  is set slightly lower than the output voltage setting of the voltage mode controller  34 . As such, the voltage sensing point of outer voltage controller  34  is located closer to an output inductor than the voltage sensing point of the voltage mode controller  34 . Accordingly, the voltage sensor  36  always senses a higher voltage than the voltage sensor  32 , especially at high output current conditions. As such, when current mode controller  33  takes control, the output voltage becomes lower than when the voltage mode controller  34  is in control does, which ensures that the voltage mode controller  34  is effectively removed from the control loop of the converter  20 . The mode switching device  44  decides which PWM control signals from the voltage mode controller  34  or the current mode controller  33  is connected to the PWM controller  28  by letting the higher voltage signal pass and blocking the lower voltage signal. In particular, when the load current is less than the predetermined value, for example, 3 amperes, the converter  20  operates in a voltage controlled mode. In this mode, the mode switching device  44  connects the feed back loop of the voltage mode controller  34  to the PWM controller  28 . When the load current is at or greater than the predetermined value, the mode switching device  44  connects the feed back loop of the current mode controller  33  to the PWM controller  28 . 
     With such a configuration, during a light load condition in which the converter  20  is voltage controlled, there is no need for a minimum load to stabilize the control loop. In a current-controlled mode, as the load increases to certain level, the current control loop will result in a relatively faster transient response and thus avoid flux imbalance in a converter with push-pull topology. As such, the converter  20  provides the advantages of both known voltage controlled and current controlled switched mode converters. An exemplary schematic diagram is illustrated in  FIG. 2  for the switched mode converter illustrated in  FIG. 1 . 
     Exemplary Schematic 
       FIG. 2  is an exemplary schematic diagram of the switched mode converter  20  in accordance with the present invention. As mentioned above, two embodiments of the invention are contemplated; namely an AC to DC converter, as shown in  FIGS. 1 and 2  and a DC to DC converter. A DC to DC converter operates in a similar manner but simply includes a DC power source, electrically coupled to the high frequency transformer T 1  and would not include a bridge rectifier D 1 . 
     Referring to  FIG. 2  the AC to DC converter  20  includes three (3) terminals L, N and an earth ground terminal G for receiving a three-wire 120 volt AC power supply. In order to protect the AC to DC converter  20  from power surges a varactor V 1  may be connected across the L and N terminals. Electromagnetic interference (EMI) protection may also be provided. The EMI protection may be provided by an exemplary circuit, shown within the box  23 . As shown, the EMI circuit  23  may include several capacitors CX 1 , CX 2 , CY 1  and CY 2 , a pair of common mode chokes L 1  and L 2  and an inductance L 3 , configured as generally shown in  FIG. 2 . The EMI circuit  23  functions to filter electromagnetic noise from the power source  22 . 
     The output of the EMI circuit  23  is connected to the input terminals  1  and  3  of the bridge rectifier D 1  by way of a parallel resistor R 2 . A negative temperature coefficient thermistor RT 1 , may be connected between the EMI circuit  23  and one input leg of the bridge rectifier D 15 . The negative temperature coefficient thermistor RT 1  limits the surge line current when the converter is power on. 
     The bridge rectifier D 15  provides full wave rectification of the input AC power, connected to the converter input terminals L and N. The output terminals  2  and  4  of the bridge rectifier D 15  are connected the high frequency transformer T 1  and system ground, respectively. A capacitor C 20  is used to reduce the EMI noise which radiates out from a primary heat sink HS 1  ( FIG. 3 ). 
     The exemplary high frequency transformer T 1  is used to step down the rectified 170 volt output from the bridge rectifier to about 24 volts. As shown, the high frequency transformer T 1  may include dual primary windings P 1  and P 2  and dual secondary windings S 1  and S 2 , wound on a single core, configured, for example, as shown in  FIG. 2 . The primary winding P 1  may be formed from 4 turns of 28 AWG copper. The primary winding P 2  may be wound with 56 turns of dual 24 AWG copper wires in parallel and center tapped. The secondary winding S 1  may be wound with 8 turns of 0.3 mm×8 mm copper foil and center tapped. Finally, the secondary winding S 2  may be wound with 4 turns of 28 AWG copper wire. 
     One output terminal  2  of the bridge rectifier D 15  is coupled to the center tap leg of the primary winding P 2  by way of a fuse F 2 . The other output terminal  4  is connected to the primary circuitry ground. A filtering capacitor C 14  may be connected between the output terminals  2  and  4  to smooth out the output voltage from the bridge rectifier D 15 . Both ending legs of the winding P 2  are connected to the primary circuitry ground by way of a high frequency switching circuit, shown within the box  30 . As will be discussed in more detail below, the high frequency switching circuit  30  switches the input voltage applied to the high frequency transformer T 1  from the bridge rectifier D 15 . The battery terminals BAT+ and BAT− are coupled to the secondary winding S 1  of the high frequency transformer T 1  by way of an output rectification and an output filter circuit discussed below. For the exemplary turns ratios for the high frequency transformer T 1  shown, the output voltage available at the secondary winding S 1  is [120×1.414 volts×( 8/56)] about 24 volts DC. 
     The primary winding P 1  provides a bias power source by way of a rectification diode D 8  and a filtering capacitor C 11 . The start-up circuitry formed by R 18 , R 28 , Q 2 , D 22 , D 7  and D 24  provides a initial bias power to start the primary winding circuits, including those circuits identified within the boxes  30 ,  51 ,  28 ,  50  and  44 , when the converter is powered on. After the converter  20  is started up, the primary winding P 1  along with the rectification diode D 8  and resistor R 13  are used to supply the bias power for the primary circuitries instead of the start-up circuitry. 
     As mentioned above, the battery output terminals BAT+ and BAT− are connected to the secondary winding S 1 ; specifically between the two ending legs of the secondary winding S 1  and the center tap. The output rectification and output filter circuitry, shown within the box  25 , includes two diode pairs D 25  and D 26 , coupled to the respective legs of the secondary winding S 1 , which provide further rectification of the output voltage from the secondary winding S 1 . The capacitors C 29 , C 39  and C 40  and an inductor L 8  form a LC filter for filtering the output signal from the secondary winding S 1 . The capacitor C 23  and the resistor R 37 , as well as the capacitor C 24  and the resistor R 36  form snubbers to protect the rectification diode D 25  and D 26 , respectively. The capacitors C 13 , C 31 , C 32 , C 33 , CY 4  and CY 5  along with the common mode choke L 9  form a EMI filter. The diode D 27  and the fuses F 3  and F 4  form a circuitry to protect the converter from damage by reverse polarities of a battery. 
     As mentioned above, the output voltage from the bridge rectifier D 15  is connected to the center tap of the primary winding P 2  of the high frequency transformer T 1 . Both ending legs of the of the primary winding P 2  of the high frequency transformer T 1 , which forms the return path are coupled to system ground by way of the high frequency switchers and drive circuitry, shown within the box  30 . The high frequency switcher circuitry applies the output voltage of the bridge rectifier D 15  to the high frequency transformer T 1  in the form of high frequency pulses under the control of a pulse width modulator (PWM) controller  28 . 
     The high frequency switcher  30  includes a pair of identical switcher circuits connected to the two legs of the primary winding P 2 . As mentioned above, the output of the bridge rectifier D 15  is connected to the center tap of the primary winding P 2 . The legs of the primary winding P 2  form the return paths and are connected to primary ground. The switcher circuits  30  selectively connect the legs of the primary winding P 2  to primary ground to form a return path under the control of the PWM controller  28 . In particular, the top leg (i.e leg shown with the dot) of the winding P 2  is connected to a first switcher which includes a MOSFET Q 3 , a transistor Q 5 , several resistors R 24 , R 26  and R 29 , a capacitor C 17 , a diode D 16 , a Zener diode D 21  and an inductor L 4 . The bottom leg of the primary winding P 2  is connected to an identical switcher which includes a MOSFET  43  Q 4 , a transistor Q 6 , several resistors R 25 , R 27  and R 30 , a capacitor C 18 , a diode D 20 , a Zener diode D 23  and an inductor L 7 . Both switchers operate in the same manner and selectively connect the legs of the primary winding P 2  to primary ground under the control of a PWM Controller  28 . In particular, when the output voltages from the PWM controller U 4  at pins E 1  and E 2 , respectively, are low, the transistors Q 5  and Q 6  are on, and the transistors Q 3  and Q 4  are off, causing the legs of the primary winding P 2  to be disconnected from the primary ground, thus interrupting the return path of the primary winding P 2 . When the voltage at pins E 1  and E 2  goes high, the transistors Q 5  and Q 6  turn off, thus the high voltages through D 16  and R 26 , D 2 O and R 27  causing the transistors Q 3  and Q 4  to turn on respectively, and connect the legs of the primary winding P 2  to primary ground and complete the return path. 
     The resistors R 24  and R 25  act as biasing resistors for the transistors Q 5  and Q 6 . The resistors R 26  and R 27  act as biasing resistors for the transistors Q 3  and Q 4 , respectively. The diodes D 16  and D 20  turn off the transistors Q 5  and Q 6  when E 1  and E 2  of U 4  are high. The Zener diodes D 21  and D 23  are used to limit the voltage across the gate and the source terminals of the transistors Q 3  and Q 4 , also to limit the voltage across the base emitter terminals of the transistors Q 5  and Q 6 . 
     The legs of the primary winding P 2  are connected to the switchers by way of a transformer T 2 . In particular, the upper leg of the primary winding P 2  is connected to one leg of one winding of the transformer T 2 . The other leg of the one winding of the transformer T 2  is coupled to one switcher by way of a filter that includes a pair of serially coupled inductors L 4  and L 5 , a capacitor C 17  and a resistor R 29 . Similarly, the other r leg of the primary winding P 2  is connected to one leg of another winding of the transformer T 2 . The other leg of the other winding of the transformer T 2  is coupled to the other switcher by way of a filter that includes a pair of serially coupled inductors L 6  and L 7 , a capacitor C 18  and a resistor R 30 . 
     The PWM Controller  28  may be, for example, a Texas Instruments Model TL494 integrated circuit, as described in detail in publications entitled: “TL494 PULSE-WIDTH-MODULATION CONTROL CIRCUITS, publication no. SLVS074E, January 1983, revised February 2005, by Texas Instruments, “Designing Switching Voltage Regulators with the TL494”, Application Report SLVA001D, December 2003, revised February 2005, by Texas Instruments, both available at www.ti.com, hereby incorporated by reference. The PWM controller  28 , as implemented by the integrated circuit described above, is configured with two output transistors (not shown), each having a collector C 1 , C 2  and an emitter E 1 , E 2  terminal. As shown in  FIG. 2 , the collector pins C 1  and C 2  pins are coupled to the supply voltage Vcc and the emitter pins E 1 , E 2  are used to control the switchers, described above. 
     A soft start circuit  50  may be provided which includes various resistors R 32 , R 53  and R 59 , a transistor Q 10 , several capacitors C 3  and C 5  and a diode D 19  and D 18 . The soft start circuit  50  allows the output pulse width at the PWM output to increase slowly during the power-on period, as such, reduces the voltage and current stress on the transistor Q 3  and Q 4 . 
     The frequency of oscillation of the PWM Controller  28  is fixed by the circuitry attached to the oscillator pins RT and CT. In this case, the frequency of oscillation is set by the circuit which includes a resistor R 19  and a capacitors C 10 . For the exemplary values indicated in  FIG. 2 , the oscillation frequency will be around 40 KHz. 
     The PWM Controller  28  integrated circuit includes two error amplifiers  1  and  2  and are brought out as pins 1 IN+1IN− and 2 IN+2 IN−. These error amplifiers may be used to control the output voltage and monitor input AC voltage, and can also be used to monitor the output current and provide current limiting to the load. The circuit that includes the resistor R 3 , R 5  and R 12 , the diode D 1  and the capacitor C 1  is used to monitor the input AC voltage, and sends it to 1NI−, whenever the input AC voltage is less than a predetermined value, for example, 88 Vac, the error amplifier  1  will shut down the PWM. In other hand, when the input voltage is greater than a predetermined value, for example, 100 Vac, the output of the error amplifier  1  becomes low, then allows turning-on the PWM. This hysteresis for the AC line voltage is set by resistors R 17  which one side is connected to the output of the amplifier in U 4 , and another side is connected to pint of U 4 , as such forming a positive feedback, therefore forming the hysteresis. 
     In accordance with an important aspect of the invention, the PWM Controller  28  is controlled in a voltage controlled mode under light load conditions by way of a voltage controller  34  and a current controlled mode under all other loading conditions by way of a current mode controller  33 . The outputs of the voltage mode controller  34  and the current mode controller  33  are applied to a dead time control (DTC) pin, which controls the amount of off-time of the output pulse (i.e. duty cycle) of the output pulses of the PWM controller  28 , available at pins E 1  and E 2  as a function of the voltage applied to the DTC pin. As discussed above, the output pins E 1  and E 2  are used to drive the switchers which, in turn, are used to control the connection and disconnection of the primary side of the high frequency transformer T 1  in the circuit 
     The output of the voltage mode controller  34  and the current mode controller are connected to a mode switching device, configured, for example, as a diode D 17  and the transistor in the opto-coupler U 5 . In particular, the output signal of the voltage mode controller  34  is connected to the cathode of the diode D 17 . The output of the current mode controller  33  is connected to the anode of the diode D 17  through the emitter of U 5 . As mentioned above, the mode is selected as a function of current load of the converter  20  and the output voltage. During light loading conditions, the output voltage of the voltage controller  34  will be greater than the output voltage of the current controller  33 , thus causing the diode D 17  to block the output signal from the current mode controller  33  and causing the output voltage of the voltage controller  34  to be coupled to the DTC pin. As will be discussed in more detail below, as the current loading increases, the output voltage of the current controller  33  exceeds the output voltage of the voltage controller  34  causing the diode D 17  to conduct, thus causing the output voltage of the current controller  33  to be coupled to the DTC pin of the PWM controller  28  integrated circuit. During this condition, the voltage output of the voltage controller  34  floats since it is lower than the output voltage of the current mode controller  33 . 
     The voltage mode controller  34  includes an amplifier U 2 B, for example a Fairchild Semiconductor LM 358M, several capacitors C 25  and C 27  and several resistors R 10 , R 41  and R 49 . The voltage mode controller  34  measures the voltage to the battery terminal BAT+ and compares it with a reference value, applied to the inverting input by way of the input resistor R 10 . The voltage to the battery is dropped across a voltage divider formed from the resistors R 41  and R 49 . During light load conditions, for example, 3 amps or less, the output of the amplifier U 1 B in the current controller  33  will be low due to the load current less than the switching set point, as discussed in detail below, while the output of the amplifier U 2 B will be active. Its output is applied to the DTC pin of the PWM controller  28  by way of an opto-coupler U 5 . The output of the amplifier U 2 B is applied to the opto-coupler U 5  by way of a diode D 10 , a current limiting resistor R 34  and a voltage stabilizing capacitor C 21 . As mentioned above, the output of the coupler U 5  is applied to the cathode of the diode D 17  and the DTC pin of the PWM controller  28 . 
     Under heavier current loading conditions, for example, loading conditions greater than 3 amps, the PWM controller  28  is current controlled under the control of a current mode controller  33 . The current mode controller  33  includes an outer control loop  38  and an inner control loop  39 . The outer voltage control loop  38  and the inner current control loop  39  are separated by an optical opto-coupler U 6 . 
     The outer voltage control loop  39  includes a difference amplifier U 2 A, several resistors R 4 , R 8 , R 9 , R 35 , R 40 , R 42 , R 43 , R 48 , R 50 , several capacitors C 8 , C 9 , C 26 , C 28  and C 30 , a voltage reference U 7  and a drive transistor Q 8 . As the load current of the converter  20  increases, the voltage of the inductor L 8  will increase as a function of the rate of change of the load current through the inductor L 8 . This voltage is indicated as Vo. As the load current increases Vo will increase also. When Vo is greater than a predetermined value which is determined by resistors R 4 , R 48  and R 50 , and the load current of converter  20  is greater than a value representative of 3 amps, for example, the output of the difference amplifier U 2 A will go low, causing the transistor Q 8  to turn-on. Then, a control current is applied to the optical opto-coupler U 6  by way of the resistors R 8  and R 35 . 
     The output of the optical opto-coupler U 6  is applied to the inner current control loop  39 , whose output, in turn, is applied to the anode of the diode D 17 . The inner current control loop  39  includes an amplifier U 1 B, several resistors R 15  and R 22  and several capacitors C 4 , C 12  and C 15 . In order to provide sufficient isolation between voltage mode set point and the current mode set point, the voltage set point of the inner current loop is set to be lower than the voltage set point for the voltage mode control. In particular, the output of the opto-coupler U 6 , applied to voltage divider which includes the resistors R 6 , R 20  and R 31 . The minimum voltage across the resistor R 20 , which is decided by resistors R 20 , R 31 , voltage reference +5 Vref and the saturation voltage of the transistor in U 6 , is the voltage set point for switching between a voltage mode and a current mode. The voltage switching point is compared with the primary switching current which represents the output load current of converter  20  and comes from the current sensing transformer T 2  by way of the resistors R 13 , R 11 , R 16 , diodes D 2 , D 3 , D 4 , D 6  and a capacitor C 2 . When the output of the optical opto-coupler U 6  is high, indicative of a heavy current loading condition, the primary switching current will be high to match with the setting current. By careful selection of the components, the voltage at the anode of the diode D 17  will be greater than the voltage from the voltage controller  34 , applied to the cathode of the diode D 17 , thus turning on the diode D 17  and connecting the inner current mode control loop to the DTC pin on the PWM Controller  28  integrated circuit, thus placing the PWM Controller  28  in a current control mode. There is a hysteresis between the voltage mode and the current mode by way of selecting the voltage drop across resistor R 49  slightly lower than the voltage drop across resistor R 4  and R 50 , so that when the output current of converter  20  is greater than, for example, 3 A, the converter  20  works at the current mode, when the output current of converter  20  is back to less than, for example, 2 A, the converter  20  will switch back to voltage mode. Thus avoiding the converter  20  jump in and back between the two modes when the output current is set at the switching point. 
     Optional under-voltage and over-temperature protection  41  may be provided. The under-voltage and over-temperature protection  41  includes a comparator U 3 A, several resistors R 1 , R 38 , R 39 , R 46 , R 47  and R 64 , a diode D 11  and several capacitors C 7 , C 41  and C 44 .]. A current signal from the return path of the secondary side of the high frequency transformer T 1  is sampled and dropped across a resistor R 51  and R 52 , which function as current sense resistors The voltage across these resistor R 51  and R 52  is applied to pin 3  of U 3 A through resistors R 61  and R 39 , and compared with the voltage across R 47  which is proportional to Vo divided by resistors R 46  and R 47 . If the voltage across the resistor R 51  and R 52  is greater than the voltage across R 47 , the output of the comparator U 3 A goes high. When the comparator U 3 A is high, it forces the pulse width to be zero. 
     The circuitry for the over-temperature protection is formed by several resistors R 56 , R 58  and R 62 , a transistor Q 9 , a thermistor RT 2 , a capacitor C 35  and a voltage reference U 8 . When the temperature of secondary heat sink HS 2  ( FIG. 3 ) sensed by RT 2  is higher than a predetermined value, for example, 80° C., transistor Q 9  will turn on, causing the voltage of pin 3  higher. Then it will follow the same principle as the over-current protection to force the pulse width of the PWM controller  28  to be zero 
     The circuit may also include over-current limit and over temperature fold-back limiting control  40 . The over-current limit and over temperature fold-back limiting control  40  includes a comparator U 3 B, a transistor Q 1 , several resistors R 21 , R 44 , R 45 , R 57  and R 60  and several capacitors C 19 , and C 36  In this case, the voltage across the resistor R 51  and R 52  and the voltage from the collector of transistor Q 9  are combined together at a resistor R 61 , and the combined voltage is applied to pin  5  of the amplifier U 3 B. If the combined voltage at pin  5  of the amplifier U 3 B is higher than the predetermined value decided by the voltage divider form by resistors R 44  and R 60 , the output of the amplifier U 3 B becomes high, causing transistor Q 1  turn-on, then reduce the current setting point at pin  6  of the amplifier U 1 B, reduce the pulse width of the PWM controller  28 , so limit the output current to a predetermined value, for example 60 A, and meantime rolling down the output voltage. 
     Both ending terminals of primary winding P 2  of transformer T 1  go through the core of the current sensing transformer T 2  in opposite directions, as such, the opposite flux densities created by the two currents from the both terminals of the primary winding P 2  of T 1  will be cancelled each other to avoid saturating the core of T 2 . The primary switching current in the winding P 2  of T 1  is proportional to the output current of converter  20 . The primary switching current is sensed by T 2 , and is applied to the full waveform bridge rectifier form by diodes D 2 , D 3 , D 4  and D 6 , and is converted to a voltage drop across resistor R 13 . Then this voltage drop across resistor R 13  is applied to pin  5  of the amplifier U 1 B after it passes through a RC filter formed by a resistor R 11  and a capacitor C 2 . 
     The sensors and protections circuitry  51  is formed by way of several resistors R 65 , R 66  and R 67 , a thermistor RT 3 , and a transistor Q 11 . When the temperature of HS 1  sensed by RT 3  is higher than a predetermined value, for example, 80° C., transistor Q 11  will turn on, causing the voltage of DTC of PWM controller  28  higher, then reduce the pulse width of the PWM controller  28 , and cut back the output power of the converter  20 . 
     The converter  20  may also be provided with a cooling fan for thermal management. The cooling fan M 1  is connected to a 12 volt DC voltage regulator circuit which includes a voltage regulator U 9 , various capacitors C 6 , C 22 , C 38  and C 43 , a diode D 9 . The input to the regulator circuit is connected to the secondary winding S 2  of the high voltage transformer T 1 . The output of the regulator circuit is connected to the anode of a diode D 29 . The cathode of the diode D 29  is connected to the +terminal of the fan motor. The +terminal of fan motor is also attached to the cathode of another diode D 30  whose anode is attached to the positive DC rail. The cathodes of the diodes D 29  and D 30  are tied together. The configuration provides dual power supplies for the fan motor M 1 ; one supply from the regulator circuit and one from the battery itself. The voltage regulator U 9  also provides power for secondary control circuitry. 
     The negative terminal of the fan motor M 1  is connected to ground by way of a transistor Q 2 . Drive circuitry is also provided for driving the transistor Q 2 . The drive circuitry includes various resistors R 56 , R 58 , R 62 , R 63 , a transistor Q 9 , a thermistor RT 2  and an adjustable shunt regulator U 8 . The shunt voltage regulator works as a comparator, when the voltage drop across thermistor RT 2  is higher than the reference voltage of U 8 , for example 2.5 Vdc, the voltage of pin 3  of U 8  is low, the fan is off. When the voltage drop across the thermistor RT 2  due to high temperature sensed by RT 2  is lower than the reference voltage of U 8 , the voltage of pin 3  of U 8  will become high, causing transistor Q 2  turn-on, then turn on the fan. The resistor R 63  is used to create a hysteretic-type ON-OFF control of the fan. The biasing circuit for the transistor Q 9  is tied to the 12 volt output of the regulator U 9  and as such prevents the transistor Q 2  from connecting the—terminal of the fan motor to ground when the converter is disconnected from the AC power supply to prevent discharge of the battery during such a condition. 
     Thermal Design 
     In addition to the above, the EMC and thermal management of the converter  20  is addressed together in the design and implementation of the converter  20  to provide a reliable and cost-effective switched mode converter. In particular, by the careful arrangement of the locations of an EMC filter  23 , a primary heat sink  54  for the primary side power components Q 3 , Q 4  and D 15  ( FIG. 2 ), a secondary heat sink  58  for secondary side power components D 25  and D 26  ( FIG. 2 ), a power transformer  24  and other secondary side power devices, such as L 8 , L 9  and C 29  ( FIG. 2 ) as well as a cooling fan  68 , a smaller EMC filter  23  can be used due to the primary heat sink  54  performing a dual function of thermal management and additionally providing EMC shielding to prevent the noise, for example, the noise generated by the transformer  24 , from reaching the filter  23 . In addition, the primary heat sink  54  is configured to face the air flow. A secondary heat sink  58  is also provided and placed close to the cooling fan  68  with its fin direction the same as the direction of the air flow  56 . As such, both the primary and the secondary heat sinks  54  and  58 , respectively get maximum air flow, allowing smaller heat sinks to be used in order to provide a reliable and cost-effective switched mode converter  20   
       FIG. 3  illustrates an exemplary power board layout for the switched mode converter illustrated in  FIGS. 1 and 2 . The power board, generally identified with the reference numeral  52 , is configured with primary side power devices, such as the high frequency transformer  24 , segregated from secondary side power devices. The primary side power devices refer to the high frequency transformer  24  and devices connected to the primary side. The secondary side power devices refer to devices connected to the secondary side of the high frequency transformer  24 . The EMC filter  23  performs noise filtering function so that the converter  20  will comply with known EMC standards. As shown, a primary heat sink  54  is used to segregate the EMC filter from the balance of the primary side power devices, the transformer and the secondary circuitry, which all generate high frequency noise. As such, the primary heat sink  54  is configured to additionally provide EMC shielding to reduce EMC noise. As shown, the primary heat sink  54  is disposed on the power board  52  so that the longitudinal axis of the heat sink  54  is generally perpendicular to the direction of air flow, as indicated by the arrow  56 . Optional holes  59  ( FIG. 7B ) may be provided in the primary heat sink  54  to allow the air flow to pass through it and transfer heat away from it. By segregating the EMC filter  23  from the balance of the primary side power devices, the primary heat sink  54  can be located fairly closely to the primary side power devices which generate the greatest amount of heat and get maximum air flow. 
     A secondary heat sink  58  is provided for the secondary side power components. As shown in  FIG. 3 , the secondary heat sink  58  is located close to the cooling fan  68  along one edge of the power board  52  so as not to interfere with the air flow across the entire power board  52  in the direction of the arrow  56 . The secondary heat sink  58  is disposed such that its longitudinal axis  58  is generally parallel to the direction of air flow  56  and perpendicular to the longitudinal axis of the primary heat sink  54 . 
     The primary heat sink  54  may be configured such that it spans the width of the power board  52 . The primary heat sink  54  is disposed such that its longitudinal axis is generally perpendicular to a longitudinal axis of the power board  52 . An exemplary configuration for the primary heat sink  54  is illustrated in  FIGS. 7A and 7B . 
     The secondary heat sink  58  is configured to span the length of that section of the power board  52  which carries secondary side components. The secondary heat sink  58  is configured such that its longitudinal axis is generally parallel to the longitudinal axis of the power board  52 . An exemplary configuration for the secondary heat sink  58  is illustrated in  FIGS. 8A and 8B . 
     Turning to  FIGS. 4 and 5 , the power board  52  is shown mounted to a chassis  60 . The chassis  60  is formed with a base  62  and spaced apart sidewalls  64  and  66 . A cooling fan  68  is optionally disposed adjacent one sidewall  66 . The cooling fan  68  is oriented to cause air flow in the direction of the arrow  56 . As shown best in  FIG. 5 , the sidewall  66  is formed with a plurality of apertures  70  and thus acts as an intake for the fan  66 . Similarly, as best shown in  FIG. 4 , the sidewall  64  is also formed with a plurality of apertures  72  to enable the air flow caused by the fan  68  to exhaust to the outside. 
     As mentioned above, the converter  20  is provided with a pair of outlet terminals  26 . These outlet terminals  26  are spaced away from the chassis  60  and are used to connect external DC loads to the converter  20 . 
     Housing 
     An exemplary housing  74  for the chassis  60  and power board  52 . The housing  74  is configured to allow the converter be mounted in a recreational vehicle (RV), for example, as disclosed in U.S. Pat. No. 5,600,550, hereby incorporated by reference. The housing  74  is configured to be mounted flush with an exterior wall of an RV (not shown) and includes an exterior removable cover  76 . The housing  74  includes a rectangular housing portion  78 , formed with a pair of spaced apart vertical flanges  80  and  82 . The dimensions of the rectangular housing portion  78  are selected to enable the rectangular housing portion  78  to be received in an opening (not shown) in an exterior wall of an RV. The spaced apart vertical flanges  80  and  82  enable the housing to be secured to the exterior wall of the RV. As shown in  FIGS. 6A and 6B , the sidewalls  64  and  66  of the chassis  60  are secured to the backside of the rectangular housing portion  78  and covered with a cover  84 , secured thereto. 
     As shown in  FIG. 6B , the rectangular housing portion  78  defines a pair of cavities  86  and  88 . When the housing  74  is installed to an exterior wall of an RV, the cavities  86  and  88  will be accessible from the outside of the RV. The cavity  86  may be used for an AC power cord, for example a 220V/120V power cord used to connect the converter  20  to an external source of AC. The cavity  86  may also be used for mounting AC circuit broker blocks. The cavity  88  may be used a junction box for connecting the various DC loads to enable them to be connected to the output terminals  26  ( FIGS. 3 and 4 ). 
     The cover  76  is used to close the cavities  86  and  88 . Many conventional methods may be used to secure the cover  76  to the rectangular housing portion including fasteners, a snap fit and others. 
     Obviously, many modifications and variations of the present invention are possible in light of the above teachings. Thus, it is to be understood that, within the scope of the appended claims, the invention may be practiced otherwise than is specifically described above. 
     What is claimed and desired to be secured by a Letters Patent of the United States is: