Patent Publication Number: US-10333465-B2

Title: VCO tuning range extension using parasitic diode capacitance control

Description:
BACKGROUND 
     The present invention relates to techniques for extending the tuning range of a voltage-controlled oscillator (VCO) using parasitic capacitance of semiconductor devices in the VCO circuit. 
     Modern phase-locked loops (PLLs) used for communications need to cover wide frequency ranges while maintaining phase noise performance. Enlarging the tuning range using conventional techniques typically causes deterioration of the circuit quality factor, leading to a deterioration in the phase noise performance. Likewise, some conventional techniques, such as banded design and adding switchable varactors, may degrade the maximum operational frequency and still produce some degradation in phase noise. 
     Accordingly, a need arises for techniques for extending the tuning range of a VCO that does not degrade VCO circuit performance. 
     SUMMARY 
     Embodiments of methods and apparatuses may provide the capability to extend the tuning range of a VCO in a way that does not degrade VCO circuit performance. For example, the parasitic capacitance of semiconductor devices in the VCO circuit may be utilized to extend the tuning range of a VCO without significant degradation of VCO circuit performance. 
     For example, in an embodiment, a method voltage-control of an oscillator may comprise receiving a first signal for control of a frequency of an output signal from the oscillator, deriving a second signal from the first signal, controlling the frequency of the output signal from the oscillator using the first signal, and extending a frequency range of the oscillator using the second signal. 
     The second signal may be derived from the first signal by performing signal conditioning on the first signal. The signal conditioning may comprise frequency filtering the first signal. The frequency of the output signal may be controlled by controlling a capacitance of at least one voltage-variable capacitance with the first signal and the frequency range of the oscillator may be extended by controlling a parasitic capacitance of at least one amplifying element or a parasitic capacitance of the at least one voltage-variable capacitance with the second signal. At least one of the at least one amplifying element or the at least one voltage-variable capacitance may comprise a MOS device and the parasitic capacitance may be a drain to bulk diode parasitic capacitance of the MOS device. The signal conditioning may comprise analog signal conditioning. The signal conditioning may comprise digital signal conditioning. 
     For example, in an embodiment, a voltage-controlled oscillator may comprise voltage-controlled oscillator circuitry having a first input for receiving a first signal and configured to control of a frequency of an output signal from the oscillator using the first signal, and having a second input for receiving a second signal and configured to extend a frequency range of the oscillator using the second signal and signal conditioning circuitry configured to derive the second signal from the first signal. 
     For example, in an embodiment, an apparatus may comprise a voltage-controlled oscillator having a first input for receiving a first signal and configured to control of a frequency of an output signal from the oscillator using the first signal, and having a second input for receiving a second signal and configured to extend a frequency range of the oscillator using the second signal and signal conditioning circuitry configured to derive the second signal from the first signal. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The details of the present invention, both as to its structure and operation, can best be understood by referring to the accompanying drawings, in which like reference numbers and designations refer to like elements. 
         FIG. 1  is an exemplary block diagram and circuit diagram of an embodiment of a VCO in accordance with the present apparatuses and methods. 
         FIG. 2  is a simplified exemplary circuit diagram of a signal conditioner as shown in  FIG. 1 . 
         FIG. 3  is an exemplary diagram of extension of the VCO tuning range and linearization of the gain for the circuit examples shown in  FIGS. 1 and 2 . 
     
    
    
     DETAILED DESCRIPTION 
     Embodiments of methods and apparatuses may provide the capability to extend the tuning range of a voltage-controlled oscillator (VCO) in a way that does not degrade VCO circuit performance. For example, the parasitic capacitance of semiconductor devices in the VCO circuit may be utilized to extend the tuning range of a VCO without significant degradation of VCO circuit performance. 
     An exemplary block diagram and circuit diagram  100  of an embodiment of a VCO is shown in  FIG. 1 . In this example, a block diagram includes a VCO  102  and a signal conditioner  104 . VCO  102  is shown in more detail in circuit diagram  120 . A tuning voltage, V Tune    106  may be applied to a tuning input  110  of VCO  102  to control the frequency of the output signal  108  from VCO  102 . Likewise, V Tune    106  may be applied to signal conditioner  104 , which may shape V Tune    106  to form a conditioned drain parasitic capacitance tuning signal V D    112 , which may be applied to drain parasitic capacitance tuning input  114 . 
     Circuit diagram  120  illustrates a simplified exemplary circuit configuration for VCO  102 . In this example, VCO  102  includes amplifying elements  122 A, B, voltage-variable capacitances  124 A, B, inductance  126 , and current sink  128 . In this exemplary circuit diagram, amplifying elements  122 A, B may typically be MOS devices, such as MOS-FET transistors, while voltage-variable capacitances  124 A, B, may typically be varactor or varicap diodes, which may be implemented, for example, using MOS devices. Inductance  126  may typically be an on-chip or external inductor. Current sink  128  may absorb current from amplifying elements  122 A, B. In this example, VCO  102  output frequency may be controlled by one or more voltage-variable capacitances  124 A, B connected to the LC tank. V Tune    106  may be applied to tuning input  110 , and V D    112  may be applied to drain parasitic capacitance tuning inputs  114 . Typically, V Tune    106  may be used to control the frequency of the output signal  108  from VCO  102 . 
     The frequency of the output signal  108  from VCO  102  may also be controlled by changing the parasitic capacitance of the drain/bulk diodes of amplifying elements  122 A, B, which are connected to the tank circuitry (here LC). Drain parasitic capacitance tuning inputs  114  are connected to the bulk terminals or connections of amplifying elements  122 A, B. When applied to drain parasitic capacitance tuning inputs  114 , V D    112  biases the drain/bulk diodes of amplifying elements  122 A, B, which alters the parasitic capacitances  128 A, B of the drain/bulk diodes  122 A, B. The parasitic capacitances  128 A, B may change according to 
               C   diode     =         c   jo         1   +       V   BD       V   bi             .           
Utilizing the parasitic capacitances of the drain/bulk diodes of amplifying elements  122 A, B in VCO  102  may provide the capability to extend the tuning range of VCO  102  with little or no performance degradation.
 
     In the example shown in  FIG. 1 , V D    112  is applied to the bulk terminals or connections of amplifying elements  122 A, B. In some embodiments, voltage-variable capacitances  124 A, B may be varactor or varicap diodes that have bulk terminals or connections as well. For example, varactor or varicap diodes may be implemented as MOS devices having gate, source, drain, and bulk terminals or connections. In such embodiments, V D    112  may be applied to the bulk terminals or connections of the varactor or varicap diodes instead of, or in addition to, being applied to the bulk terminals or connections of amplifying elements  122 A, B. 
     A simplified exemplary circuit diagram of a signal conditioner  104  is shown in  FIG. 2 . In this example, signal conditioner  104  may include an input V In    202  and an output V Out    204 . As shown in  FIG. 1 , the signal V Tune    106  may be applied to input V In    202  and output V Out    204  may output the signal V D    112 , which may be applied to drain parasitic capacitance tuning input  114 . In this example, signal conditioner  104  may produce a signal V D    112  having the characteristics shown. With such signal conditioning, V D    112  may be used to extend the VCO tuning range and linearize the gain in a broader V Tune    106  region. 
     In this exemplary embodiment, signal conditional  104  operates as a non-linear amplifier. Use of such a signal conditioner may provide extension of the tuning range of the VCO and may prevent gain degradation at the band edges. In this example, signal conditioner  104  may include a n-channel transistor  206 , an p-channel transistor  208 , a first resistor  210 , a second resistor  212 , and a capacitor  214 . 
     The transistors should have sufficient transconductance so that: (g m ) −1 &lt;&lt;R/2 for |V GS |&gt;V T , where g m  is the nmos/pmos transconductance, V GS  is gate source voltage, and V T  is the transistor threshold voltage. Then for V in &lt;V CC /2−V T    216 : p-channel transistor operates as a source follower and the n-channel transistor is off. For V CC /2+V T &gt;V in &gt;V CC /2−V T   218 , both transistors are off. For V in &gt;V CC /2+V T    220 , the n-channel transistor operates as a source follower and the p-channel transistor is off. This may produce a transfer function  222  as shown in  FIG. 2 . Capacitor  214  may be selected or designed such that: 1/RC will be low as possible while g m /C is still higher than the input frequency bandwidth. This may provide filtering of the resistor noise at the circuit output when both transistors are off. Accordingly, for |V in −V CC /2|&gt;V T : the output noise PSD is 
                 V   N   2     ⁡     (   f   )       =         KT   ⁢           ⁢   γ       g   m       .           
Likewise, for |V in −V CC /2|&lt;V T : the output noise PSD is
 
     
       
         
           
             
               
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     In the example shown in  FIG. 2 , an analog signal conditioner is shown. In embodiments, other analog signal conditioner configurations may be used. Likewise, in embodiments, digital signal conditioner configurations may be used. Any and all configurations of analog or digital signal conditioners may be applicable to the present methods and apparatuses. 
     An example of extension of the VCO tuning range  300  and linearization of the gain  302  for the circuit examples shown in  FIGS. 1 and 2  is shown in  FIG. 3 . An exemplary tuning range  304  and gain  306  for a conventional VCO are shown, as an exemplary tuning range  308  and gain  310  for the circuit examples shown in  FIGS. 1 and 2 . As may be seen, the tuning range  308  has been extended relative to the conventional VCO tuning range  304 . Likewise, the gain  310  has been linearized relative to the conventional VCO gain  306 . 
     The present invention may be a system and/or a method at any possible technical detail level of integration. Although specific embodiments of the present invention have been described, it will be understood by those of skill in the art that there are other embodiments that are equivalent to the described embodiments. Accordingly, it is to be understood that the invention is not to be limited by the specific illustrated embodiments, but only by the scope of the appended claims.