Patent Publication Number: US-5425389-A

Title: Method and apparatus for contiguous valve control

Description:
BACKGROUND OF THE INVENTION 
     This invention relates to a method and apparatus for contiguous valve control. Typically, the time required to activate a valve is known as firing time. Firing time typically comprises of a portion of a machine cycle. Machine cycle is defined as the amount of time which is required for an electrical device such as a valve to perform its intended function. Typically, there is usually a small amount of dead time between firing times to allow the valves to turn off. In a contiguous valve system, there is no dead time between firing time cycles with the firing time equivalent to the machine cycle. With systems of this type, valves must be turned on and off in accordance with pattern data. 
     A major problem with this system is that some valves may already be activated so that the excess energy is dissipated in the valves that are already activated in the form of heat. This not only wastes energy but can cause serious damage to the valves. 
     The present invention solves this problem in a manner not disclosed in known prior art. 
     SUMMARY OF THE INVENTION 
     The apparatus and method for contiguous valve control. This involves the inputting of data for each of a series of valves then comparing that digital valve activation data in a one to one correspondence to the digital valve activation data that was inputted to that same series of valves in the previous machine cycle. If a particular valve was turned on in the previous machine cycle, then this valve will not be applied with voltage for a percentage of the valve&#39;s machine cycle time. 
     It is an advantage of this invention not to reactivate valves that are already turned on. 
     Still another advantage of this invention is not to require the dissipation of excess energy in the form of heat. 
     Another advantage of this invention is the avoidance of damage to valves due to re-activation when they are already activated. 
     These and other advantages will be a part of apparent and in part pointed out below. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The above as well as other objects of the invention will become more apparent from the following detailed description of the preferred embodiments of the invention when taken together with the accompanying drawings, in which: 
     FIG. 1 is a block diagram disclosing, an overview, the novel contiguous valve control system disclosed herein; 
     FIG. 2 is a diagram of a clock voltage pulse, shift data in voltage pulse, high voltage pulse, block voltage pulse, and valve drive pulse that represents when a valve that is turned on from the previous machine cycle; and 
     FIG. 3 is a diagram of clock voltage pulse, shift data in voltage pulse, high voltage pulse, block voltage pulse, valve drive voltage pulse, corresponding to FIG. 2 that represents a valve that was not turned on in the previous machine cycle. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring now to the accompanying drawings, and initially to FIG. 1, which shows a contiguous valve control in which each valve is controlled by a single control line. The firing time of each valve is initiated by activating a control line associated with a particular valve for a pre-determined period of time. In a contiguous valve system, the firing time and machine cycle are synonymous. Solenoid valves that are already activated dissipate excess energy in the form of heat which can result in damage to the solenoid valves. In the beginning of each machine cycle, valves may be turned on and off in accordance with computer pattern data. An excellent example of this type of technology is the pattern application of dye on a substrate wherein continuously flowing streams of liquid normally directed in paths to impinge upon the substrate are selectively deflected from contact with the substrate in accordance with pattern information. The substrate is thus dyed in a desired pattern and the deflected dye is collected and recirculated for use. Each continuously flowing liquid stream is selectively deflected by a stream of air that is discharged, in accordance with pattern information, from an air outlet located adjacent each liquid discharge outlet. The air outlet is positioned to direct the air stream into intersecting relation with the liquid stream and to deflect the liquid into a collection chamber or trough for recirculation. Each individual air stream is controlled by a solenoid valve. Therefore, for intricate patterns, the number of solenoids utilized can be extensive. The solenoid valves that are typically used in the above application normally operate at fifteen (15) volts. By increasing the voltage to 100 volts for a short period of time, just as the solenoid valve is activated, the time required to activate the valve is reduced substantially. This technique works well, however, this vast increase in voltage also results in significant power loss in the electrical conductor extending between the power source and the plurality of solenoid valves. The voltage loss in the electrical conductor is directly proportional to the number of valves activated. Therefore, when just a few solenoid valves are activated, the response time is significantly shorter then when a large number of valves are activated. The solution to the problem of voltage drop due to load variance is solved by anticipating the load and supplying additional energy by lengthening the time energy is applied. The electrical components presented in this Application are solenoid valves, however, relays, coils, resistors, and any other type of electrical component that operates as a voltage load may be utilized with this technology. In addition, any type of solenoid valve may be utilized with the fifteen volt solenoid valve illustrated as a non-limiting example. 
     An example of means of automatically and electronically changing from one set of pattern data to another is disclosed in U.S. Pat. No. 4,170,883, issued Oct. 16, 1979, which is hereby incorporated by reference. Other commonly assigned patents which relate to patterning substrate by utilizing the activation of valves include U.S. Pat. No. 5,208,592 issued May 4, 1993, which is hereby incorporated by reference; U.S. Pat. No. 5,140,686, issued Aug. 18, 1992, which is hereby incorporated by reference; U.S. Pat. No. 5,136,520 issued Aug. 4, 1992, which is hereby incorporated by reference; U.S. Pat. No. 4,984,169 issued Jan. 8, 1991, which is hereby incorporated by reference; U.S. Pat. No. 5,142,481, issued Aug. 25, 1992, which is hereby incorporated by reference; and U.S. Pat. No. 5,128,876, issued Jul. 7, 1992, which is hereby incorporated by reference. 
     As shown in FIG. 1, serial data is inputted into a current shift register 30 by means of a data input 32. A non-limiting example of current shift registers of this type would include 74HC4094. This data is actually sequentially clocked into this register by means of clock line 34. Data input line 32 is electrically connected to data input terminal 36 of current shift register 30. Clock line 34 is electrically connected to clock input terminal 38 of current shift register 30. A representative clock pulse that can be found on clock line 34 is pictorially represented by numeral 41 in FIG. 2 and numeral 44 in FIG. 3. A data input voltage pulse that can be found on data input 32 is pictorially represented by numerals 42 in FIG. 2 and numeral 45 in FIG. 3. Although, there can be any number of output terminals associated with current register 30, in a preferred embodiment there are eight output terminals represented as Q1, Q2, Q3, Q4, Q5, Q6, Q7 and Q8 designated by numerals 50, 51, 52, 53, 54, 55, 56, and 57, respectively. Output terminals 50, 51, 52, 53, 54, 55, 56, and 57 of current register 30 are electrically connected to one of two inputs of a series of AND gates numerically designated as 26, 24, 22, 20, 18, 16, 14 and 12, respectively. A non-limiting example of AND gates of this type would include 74H08. The valve activation data leaves current register 30 by means of serial output S02 designated by numeral 60 which is electrically connected to data input terminal 62 of a previous shift register as generally indicated by numeral 65. A nonlimiting example of a shift register of this type is 74HC4094. This serial data is clocked into previous register 65 by means of electrical connection between clock line 34 and clock input terminal 67. Once again, the clock voltage pulse representations are indicated by numerals 41 and 44 on FIGS. 2 and 3, respectively, and the data shift in voltage pulses are indicated by numerals 42 and 45 on FIGS. 2 and 3, respectively. The preferred embodiment of previous shift register 65 also has eight output terminals. Output terminal Q1 is designated by numeral 70, output terminal Q2 is designated by numeral 71, output terminal Q3 is designated by numeral 72, output numeral Q4 is designated by numeral 73, output terminal Q5 is designated by numeral 74, output terminal Q6 is designated by numeral 75, output terminal Q7 is designated by numeral 76, and output terminal Q8 is designated by numeral 77. These output lines 70, 71, 72, 73, 74, 75, 76 and 77 are electrically connected to one of two inputs to a series of preferably eight NAND gates numerically designated as 80, 81, 82, 83, 84, 85, 86 and 87, respectively. A non-limiting example of NAND gates 80, 81, 82, 83, 84, 85, 86, and 87 at this type would include 74HC00. The remaining second input connections to NAND gates 80, 81, 82, 83, 84, 85, 86, and 87 are connected to block line 90. Block line 90 is a voltage pulse which is on for a percentage of time of the total time in which the high voltage pulse is applied to the valve. As shown in FIG. 2, the high voltage pulse is designated by numeral 92. In FIG. 3, the high voltage pulse is designated by numeral 93. A block voltage pulse is preferably a significant period of time in relation to the total period of time in which the high voltage pulse is applied to the valve. In the preferred embodiment the high voltage pulse is in a high state for 125 microseconds while the block voltage pulse is activated in a high state for 100 microseconds. Block voltage pulse is shown in FIG. 2 as numeral 94 and is shown in FIG.3 as numeral 95. 
     Therefore, the output of NAND gates 80, 81, 82, 83, 84, 85, 86 and 87 will always be in a digital &#34;one&#34; state unless there is a positive block voltage pulse 94, 95 at the same time the output terminal of either 70, 71, 72, 73, 74, 75, 76 or 77 of previous register 75 is in a digital &#34;one&#34; state or high state. Otherwise, in all remaining conditions of the output of NAND gates 80 through 87 will be in a digital &#34;one&#34; state. The outputs from NAND gates 80 through 87 are inputted to respective AND gates 26, 24, 22, 20, 18, 16, 14 and 12 in conjunction with the digital output terminals 50, 51, 52, 53, 54, 55, 56 and 57. The output from AND gates 26, 24, 22, 20, 18, 16, 14 and 12 are outputted to control lines 27, 25, 23, 21, 19, 17, 15 and 13, respectively. These control lines actuate the valves. 
     Therefore, according to FIG. 2, the valve drive will be continually activated except when there is a block voltage pulse 94 in conjunction with a digital &#34;one&#34; state on one of the output terminals 70 through 77. This will result in voltage pulse 98 in which the respective valve drive will be off for the initial 100 microseconds and then on for the last 25 seconds of a total of 125 microsecond activation time. This is shown by high voltage 92, block voltage 94 and valve drive voltage 98, respectively, in FIG. 2. 
     FIG. 3 represents the condition when there are no digital &#34;ones&#34; states present on any one of outputs 70 through 77 of previous shift register 65. The valve drive voltage 99 will then be on continually and there will not be a period of time in which the valve drive voltage 99 will be turned off. It is because high voltage pulse 93 is turning on the valve for the first time and this valve was not on during the previous machine cycle. 
     The digital components presented throughout this application are exemplary and illustrative and are not deemed to be limiting in any way. Therefore, it is not intended the scope of the invention be limited to specific embodiments illustrated and described. Rather, it is intended that the scope of the invention be defined by the independent claims and their equivalence.