Patent Publication Number: US-2023156352-A1

Title: Image sensor

Description:
CROSS-REFERENCE TO RELATED APPLICATION(S) 
     This application is a continuation of U.S. application Ser. No. 17/142,652, filed on Jan. 6, 2021, which claims the benefit under 35 USC 119(a) of Korean Patent Application No. 10-2020-0053244 filed on May 4, 2020 in the Korean Intellectual Property Office, the entire disclosure of each of which is incorporated herein by reference for all purposes. 
    
    
     BACKGROUND 
     Some example embodiments relate to an image sensor. 
     Image sensors that capture an image of an object and convert the image into an electrical signal are not only used in consumer electronics such as digital cameras, mobile phone cameras, and portable camcorders, but also in cameras mounted in automobiles, security devices, and/or robots. Such an image sensor includes a pixel array, and each pixel included in the pixel array may include a light sensing element. 
     To increase the resolution of the image sensor, the size of the pixel is continuously reduced, and the sensitivity of the light sensing element of each pixel may be reduced due to the reduction in the pixel size. As a result, the image quality of the image may deteriorate. 
     SUMMARY 
     Some example embodiments provide an image sensor in which a dynamic range (DR) and/or a signal-to-noise ratio (SNR) may be improved by compensating for low sensitivity of color pixels. 
     According to some example embodiments, an image sensor includes a Bayer pattern-type pixel array including a plurality of Bayer pattern-type extended blocks each having first to fourth pixel blocks arranged in a big 2×2 matrix, each of the first to fourth pixel blocks including first to fourth pixels arranged in a small 2×2 matrix, the first and fourth pixels of the first and fourth pixel blocks configured to sense green light, the first and fourth pixels of the second and third pixel blocks configured to sense red light and blue light, respectively, and the second and third pixels of the first to fourth pixel blocks configured to sense white light; and, a signal processing circuitry configured to generate Bayer pattern color information by binning signals of the first and fourth pixels of the first to fourth pixel blocks, to generate Bayer pattern illuminance information by binning signals of the second and third pixels of the first to fourth pixel blocks, and to generate a color image by merging the Bayer pattern color information and the Bayer pattern illuminance information. 
     According to some example embodiments, an image sensor includes a pixel array including a plurality of Bayer pattern-type extended blocks each having first to fourth pixel blocks, the first to fourth pixel blocks respectively including a plurality of pixels arranged in a plurality of rows and a plurality of columns, the plurality of pixels being divided into first and second groups each having at least two pixels, pixels of a first group of the first and fourth pixel blocks respectively configured to sense first color light, pixels of a first group of the second pixel block configured to sense second color light, pixels of a first group of the third pixel configured to sense third color light, and pixels of a second group of the first to fourth pixel blocks respectively configured to sense light of a wavelength band wider than a wavelength band of each of at least second and third color light, respectively, and a signal processing circuitry configured to generate Bayer pattern color information by binning signals of pixels of the first group of the first to fourth pixel blocks, to generate Bayer pattern illuminance information by binning signals of pixels of a second group of the first to fourth pixel blocks, and to generate a color image by merging the Bayer pattern color information and the Bayer pattern illuminance information. 
     According to some example embodiments, an image sensor includes a pixel array including a plurality of Bayer pattern-type extended blocks each having first to fourth pixel blocks arranged in a big 2×2 matrix, each of the first to fourth pixel blocks including first to fourth pixels arranged in a small 2×2 matrix, the first and fourth pixels of the first and fourth pixel blocks configured to receive light of a first color, the first and fourth pixels of the second and third pixel blocks configured to receive light of second and third colors, respectively, and the second and third pixels of the first to fourth pixel blocks configured to receive white light, and a signal processing circuitry configured to generate Bayer pattern color information by binning signals of the first and fourth pixels of the first to fourth pixel blocks, and to generate the Bayer pattern illuminance information by binning signals of the second and third pixels of the first to fourth pixel blocks. The first and fourth pixel blocks are arranged in a first diagonal direction, the second and third pixel blocks are arranged in a second diagonal direction, the first and fourth pixels are arranged in one of the first diagonal direction and the second diagonal direction, and the second and third pixels are arranged in the other of the first diagonal direction and the second diagonal direction. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
       The above and other aspects, features, and advantages of the example embodiments will be more clearly understood from the following detailed description, taken in conjunction with the accompanying drawings, in which: 
         FIG.  1    is a block diagram illustrating the structure of an image sensor according to some example embodiments; 
         FIG.  2    is a block diagram schematically illustrating an image sensor according to some example embodiments; 
         FIG.  3    is a plan view illustrating a pixel array employable in an image sensor according to some example embodiments; 
         FIGS.  4 A and  4 B  respectively illustrate Bayer pattern color (e.g., RGB) information and illuminance information generated by signal processing of an image sensor according to some example embodiments; 
         FIG.  5    illustrates a Bayer pattern color image in which a color array pattern illustrated in  FIG.  4 A  and the illuminance information illustrated in  FIG.  4 B  are merged. 
         FIG.  6    is a partial plan view illustrating a pixel array illustrated in  FIG.  1   . 
         FIG.  7    illustrates an example of a driving circuit corresponding to the pixel array illustrated in  FIG.  6   . 
         FIG.  8    is a plan view illustrating a pixel array (including autofocusing pixels) according to some example embodiments; 
         FIG.  9    is a cross-sectional view illustrating an autofocusing pixel of the pixel array illustrated in  FIG.  8   . 
         FIG.  10    is a plan view illustrating a pixel array (including an autofocusing pixel) according to some example embodiments; 
         FIG.  11    is a cross-sectional view illustrating an autofocusing pixel of the pixel array illustrated in  FIG.  10   . 
         FIG.  12    is a plan view illustrating a pixel array employable in an image sensor according to some example embodiments; and 
         FIGS.  13 A and  13 B  respectively illustrate Bayer pattern color information and illuminance information generated by signal processing of an image sensor according to some example embodiments. 
     
    
    
     DETAILED DESCRIPTION OF SOME EXAMPLE EMBODIMENTS 
     Hereinafter, various example embodiments will be described in detail with reference to the accompanying drawings. 
       FIG.  1    is a block diagram illustrating the structure of an image sensor according to some example embodiments. 
     Referring to  FIG.  1   , an image sensor  500  according to some example embodiments may include a pixel array  100 , a signal processing unit  200 , and a control unit  300 . The image sensor  500  may further include a memory  400 . 
     As illustrated in  FIG.  3    to be discussed below in more detail, the pixel array  100  employed in some example embodiments may have a plurality of pixels PX constituting/included in an extended Bayer pattern block EB. The extended Bayer pattern block EB may be respectively comprised of four pixel blocks PB 1 , PB 2 , PB 3  and PB 4 , e.g. arranged adjacently as illustrated. Each of the plurality of pixels PX may include an optical sensing element that converts an optical signal into an electrical signal. For example, the light sensing element may be or include or correspond to a photodiode. 
     The plurality of pixels PX may include red, green, and blue pixels R, G and B configured to receive red, green, and blue light, respectively, and white pixels W, configured to receive white light. The white pixel W may have higher sensitivity than the red, green, and blue pixels R, G, and B. The red, green and blue pixels R, G, and B include red, green, and blue filters, respectively to receive light in a specific wavelength band (e.g. the wavelength band of red, green, and blue light, respectively), whereas the white pixel W may receive the light covering the wavelength band of red, green, and blue without a filter. The red, green, and blue pixels R, G, and B and the white pixel W receive light of one of red, green, blue, and white in the unit of a pixel through a micro lens (see, e.g., micro lens  109  in  FIG.  8   ), and the optical sensing element may generate and output electrical signals corresponding to the intensity of light received by photoelectric conversion. 
     In some example embodiments, the plurality of pixels PX constituting/included in the pixel array  100  may be arranged in a plurality of rows and a plurality of columns. For example,  FIG.  3    illustrates a form in which 64 pixels PX are arranged in an 8×8 matrix for convenience of description, but the form may have an array (e.g., 1920×1080) of one million or more pixels. In detail, as described above, the arrangement as described above may constitute/be included in a pixel block (PB 1 , PB 2 , PB 3 , PB 4 ) unit and an extended Bayer pattern block (EB) unit. 
     In detail, the pixel array  100  may include a plurality of extended Bayer pattern blocks EB respectively having first to fourth pixel blocks PB 1 , PB 2 , PB 3  and PB 4  arranged in a 2×2 matrix (e.g. in a larger matrix), e.g. arranged adjacently as illustrated. The first to fourth pixel blocks PB 1 , PB 2 , PB 3  and PB 4  may be arranged in a larger matrix, and may each include first to fourth pixels PX 1 , PX 2 , PX 3  and PX 4  arranged in a smaller 2×2 matrix, e.g. arranged adjacently as illustrated. 
     In each of the plurality of extended Bayer pattern blocks EB employed in some example embodiments, the first and fourth pixel blocks PX 1  and PX 4  may be arranged in a first diagonal (DL 1 ) direction, and the second and three pixel blocks PX 2  and PX 3  may be arranged in a second diagonal (DL 2 ) direction. 
     Further, the first and fourth pixels PX 1  and PX 4  of the first and fourth pixel blocks PB 1  and PB 4  may be green pixels G configured to sense green light. The first and fourth pixels PX 1  and PX 4  of the second and third pixel blocks PB 2  and PB 3  may be red and green pixels R and G configured to sense red light and blue light, respectively. The second and third pixels PX 2  and PX 3  of the first to fourth pixel blocks PB 1 , PB 2 , PB 3  and PB 4  may be white pixels W configured to sense white light. 
     In some example embodiments, in each of the first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4 , the first and fourth pixels PX 1  and PX 4  may be arranged in the direction of the first diagonal DL 1 , and the second and third pixel blocks PX 2  and PX 3  may be arranged in the direction of the second diagonal DL 2  direction. In some example embodiments, the first to fourth pixel blocks PB 1 , PB 2 , PB 3  and PB 4  may be arranged in a direction opposite to the direction in this example embodiment. For example, the first and fourth pixels PX 1  and PX 4  are arranged in the second diagonal DL 2  direction, and the second and third pixel blocks PX 2  and PX 3  may be arranged in the first diagonal DL 1  direction. 
     As such, in some example embodiments, the first and fourth pixels PX 1  and PX 4  are provided as color pixels indicated by R, G, and B, and the second and third pixels PX 2  and PX 3  may be provided as illuminance sensing pixels to improve sensitivity. The illuminance sensing pixel may be configured to receive light in a band wider than the wavelength band of the color pixel, and may include, for example, a yellow pixel and/or a white pixel W. 
     According to some example embodiments, a “pixel block” refers to a unit in which a plurality of color pixels (e.g., PX 1  and PX 4 ) and a plurality of luminance sensing pixels (e.g., PX 2  and PX 3 ) are combined and arranged, and “extended Bayer pattern block” refers to a unit in which four pixel blocks PB are arranged in a Bayer pattern. In some example embodiments, in terms of color pixels of the first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4 , the extended Bayer pattern block EB may be understood to implement a Bayer array pattern of R-G-G-B. In addition, the Bayer pattern color pattern information BP 1  illustrated in  FIG.  4 A  may have a Bayer array pattern of R-G-G-B corresponding to such a Bayer array. 
     As illustrated in  FIG.  1   , output signals of the pixel array  100  are input to a binning pattern generation unit  240  of the signal processing unit  200 . The binning pattern generation unit  240  may bin RGBW array data obtained from the pixel array  100  into a color signal comprised of RGB and an illuminance signal comprised of W, and may generate color pattern information BP 1  and illuminance pattern information BP 2  generated from the binned color signal and illuminance signal, respectively. Since the color pattern information BP 1  and the illuminance pattern information BP 2  are respectively generated through such binning, signal processing such as gain and/or offset may be independently performed on the two pattern information BP 1  and BP 2 . 
     The color pattern information BP 1  and the illuminance pattern information BP 2  generated by the binning pattern generation unit  240  have a Bayer pattern as illustrated in  FIGS.  4 A and  4 B . The respective patterns constituting the color pattern information BP 1  and the illuminance pattern information BP 2  may be or correspond to or be based on data based on/associated with signals obtained from one pixel block PB of the pixel array  100 . 
     For example, green pattern information of a first row and a first column of the color pattern information BP 1  may be obtained from the signals of the two green pixels PX 1  and PX 4  of the first pixel block PB 1 . White pattern information of a first row and a first column of the illuminance pattern information BP 2  may be obtained from signals of the remaining two white pixels PX 2  and PX 3  of the first pixel block PB 1 . 
     As described above, since respective patterns of the color pattern information BP 1  and the illuminance pattern information BP 2  are generated from one pixel block PB comprised of four pixels PX, the resolution (m×n) of the Bayer pattern color information may be ¼ (one quarter) of the resolution (2m×2n) of the pixel array  100 . The illuminance pattern information BP 2  may also have a Bayer pattern in the same arrangement as the color pattern information BP 1 . 
     In the binning pattern generation unit  240 , the color pattern information BP 1  and the illuminance pattern information BP 2  having the same Bayer pattern are input to a pattern merging unit  280  of the signal processing unit  200 . The color pattern information BP 1  and the illuminance pattern information BP 2  may be merged to provide a color image MCI having the same resolution as the color pattern information BP 1  (as illustrated in  FIG.  5   ). The merging process may be performed in such a manner that patterns in positions corresponding to each other in the color pattern information BP 1  and the illuminance pattern information BP 2  one-to-one merge with each other (e.g. are overlaid with each other). The respective colors R, G, and B of the color pattern information BP 1  may have improved sensitivity characteristics by the illuminance data at the corresponding position of the illuminance pattern information BP 2 , thereby providing a color image MCI having converted colors R′, G′ and B′. 
     As described above, according to some example embodiments, the color pattern information BP 1  obtained from the respective first and fourth pixels PX 1  and PX 4  is improved, e.g. greatly improved in sensitivity characteristics such as SNR and/or DR by binned illumination information BP 2 , and as a result, since respective pattern data of the illuminance pattern information BP 2  is information obtained from white pixels located/arranged adjacent in the same pixel block PB as that of the first and fourth pixels PX 1  and PX 4  associated with the color signal to be merged, the sensitivity may be appropriately improved according to the environment, e.g. neighborhood, of relevant pixels. 
     In some example embodiments, a corrected color image MIC may be stored in the memory  400 . The control unit  300  may control the signal processing unit  200  to perform a series of processes. For example, a program including machine-readable instructions that executes a series of processes may be stored in the memory  400 , and the control unit  300  may control the series of processes by executing a program read from the memory  400 . 
     According to some example embodiments, the color pattern information BP 1  and the illuminance pattern information BP 2  have a resolution of ¼ (one quarter) of the resolution (2m×2n) of the physical pixel array, and the color image MCI has a form of the same resolution (m×n) as that of the color pattern information BP 1 , but example embodiments are not limited thereto, and the configuration may be configured to have a different resolution. 
     For example, the color pattern information BP 1 , the illuminance pattern information BP 2 , and the color image MCI may be implemented to have a different resolution from that in other example embodiments, by differently configuring digital signal processing. In some example embodiments, the color pattern information BP 1  and the illuminance pattern information BP 2  may have the same resolution as that of the physical pixel array (2m×2n). 
     In some embodiments, the color pattern information BP 1  has the same resolution as that of the pixel array (2m×2n), but the illuminance pattern information BP 2  may have a resolution of ¼ of the resolution of the pixel array (2m×2n). In this case, the color image MCI has the same resolution as the color pattern information BP 1 , and the merging process of the color pattern information BP 1  and the illuminance pattern information BP 2  may be performed as a merging process of 4:1 (color pattern:illuminance pattern) rather than one-to-one correspondence. 
     As illustrated in  FIG.  2   , the image sensor  500  according to some example embodiments may include a row driver  340  driven by a control unit  300 ′ together with the pixel array  100 , the signal processing unit  200 , and the control unit  300 ′. 
     As described above, the pixel array  100  may include a plurality of pixels PX arranged in the unit of an extended Bayer pattern block EB and a plurality of pixel blocks PB. Each of the pixels PX may include a corresponding light sensing element. For example, the light sensing element may be or include a photodiode. The plurality of pixels PX absorb light to generate charge, and may provide an electrical signal (output voltage) to the signal reader  350 , according to the generated charge may be. 
     The control unit  300 ′ may control the row driver  340  to enable the pixel array  100  to absorb light to accumulate charge, temporarily store accumulated charge, and output an electrical signal according to the stored charge to the outside of the pixel array  100 . Alternatively or additionally, the control unit  300 ′ may control the signal reader  350  to measure the output voltage provided by the pixel array  100 . The control unit  300 ′ illustrated in  FIG.  2    is/corresponds to a control unit responsible for a control function configured to drive the pixel array  100  and read signals, and may be understood as the control unit  300  responsible for a portion of functions of the control unit illustrated in  FIG.  1   . 
     The row driver  340  may generate signals such as RSs, TXs, and SELSs for controlling the pixel array  100 , and provide the signals to the plurality of pixels PX included in the pixel array  100 . The row driver  340  may determine activation and deactivation timings of reset control signals RSs, transmission control signals TXs, and/or selection signals SELSs for the plurality of pixels PX, and may provide other signals to the plurality of pixels PX included in the pixel array  100 . 
     The signal reader  350  may include a correlated double sampler (CDS)  351 , an analog-to-digital (A/D) converter (ADC)  353 , and/or a buffer  355 . The correlated double sampler  351  may sample and hold the output voltage provided by the pixel array  100 . The correlated double sampler  351  may double-sample a level according to a specific noise level and the generated output voltage, and may output a level corresponding to the difference. Alternatively or additionally, the correlated double sampler  351  may receive ramp signals generated by a ramp signal generator  357 , and may compare the signals to output a comparison result. The A/D converter  353  may convert an analog signal corresponding to a level received from the correlated double sampler  351  into a digital signal. The buffer  355  may latch digital signals, and the latched signals may be sequentially output to the signal processing unit  200  and/or the outside of the image sensor  500 . 
     The signal processing unit  200  may perform signal processing on the received data of the plurality of pixels PX. In addition to the process of generating a Bayer pattern color image by combining a color pattern and an illuminance pattern obtained through the above-described binning, the signal processing unit  200  may perform various image signal processing for image quality improvement, such as array interpolation, other noise reduction processing, gain adjustment, waveform shaping processing, and/or color filter array interpolation, white balance processing, gamma correction, edge emphasis processing, and/or the like. Alternatively or additionally, the signal processing unit  200  may output information regarding a plurality of pixels PX to a processor (not illustrated) during phase difference auto-focusing to perform phase difference calculation (see  FIGS.  8  to  11   ). 
     In some example embodiments, the signal processing unit  200  is illustrated as being implemented in a portion of the image sensor  500 , in detail, in a logic circuit, but may also be implemented in a processor (not illustrated) separately provided outside of the image sensor  500 . 
       FIG.  6    is a partial plan view illustrating the pixel array illustrated in  FIG.  1   . 
     Referring to  FIG.  6   , a portion of the pixel array  100  illustrated in  FIG.  1   , for example, one extended Bayer pattern block EB is illustrated. 
     The extended Bayer pattern block EB includes first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4  arranged in a 2×2 matrix (e.g. arranged adjacently as illustrated and as described above), and the first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4  include first and fourth pixels PX 1  and PX 4  arranged diagonally, each of the first and fourth pixels PX 1  and PX 4  included in different pixel blocks PB 1  to PB 4  receiving light of different colors, and second and third pixels PX 2  and PX 3  receiving white light, respectively. 
     The first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4  employed in some example embodiments may include one floating diffusion FD shared by the first to fourth pixels PX 1 , PX 2 , PX 3 , and PX 4 , and transistors M 1 , M 2 , M 3 , and M 4  (e.g. transfer transistors) disposed between the first to fourth pixels PX 1 , PX 2 , PX 3 , and PX 4  and the floating diffusion FD. The charges accumulated in photodiodes PD 1 , PD 2 , PD 3 , and PD 4  of the first to fourth pixels PX 1 , PX 2 , PX 3 , and PX 4  may be transmitted to the floating diffusion FD, through the transistors M 1 , M 2 , M 3 , and M 4  connected to the photodiodes PD 1 , PD 2 , PD 3  and PD 4 , respectively. As such, the four pixels PX 1 , PX 2 , PX 3 , and PX 4  located in the same pixel block PB 1 , PB 2 , PB 3 , and PB 4  may share one floating diffusion FD. When one floating diffusion FD is shared as in some example embodiments, the same color information may be read with a time difference. For example, some transistors M 1  and M 4  may simultaneously be turned ON to store and read green information from the photodiodes PD 1  and PD 4  in floating diffusion FD, and subsequently, some other transistors M 2  and M 3  may be simultaneously turned ON to store and read the illuminance (e.g., white) information from the photodiodes PD 2  and PD 3  in the floating diffusion FD. 
     In some example embodiments, the floating diffusion FD may be disposed to be shared by two adjacent same color pixels, such that two floating diffusions FD may be provided in one pixel block. For example, the green pixels PX 1  and PX 4  may share one floating diffusion FD, and the white pixels PX 2  and PX 3  may share the other floating diffusion FD. In this case, all the transistors M 1  to M 4  are simultaneously turned ON to store information in two floating diffusions FD, and green information and white information may be simultaneously read. 
       FIG.  7    illustrates a circuit of the pixel block PB 1  including four pixels PX 1 , PX 2 , PX 3 , and PX 4  illustrated in  FIG.  6   , as a portion of a pixel circuit corresponding to a pixel array. 
     The process of generating an image signal in each pixel will be described with reference to  FIG.  7   . 
     When light enters the pixel, charges depending on the amount of light are generated in (within) the photodiodes PD 1 , PD 2 , PD 3 , and PD 4  by photoelectric conversion. The charges accumulated in the photodiodes PD 1 , PD 2 , PD 3  and PD 4  are transmitted to the floating diffusion FD through the transistors (transfer transistors) M 1 , M 2 , M 3  and M 4 . The transistors M 1 , M 2 , M 3  and M 4  may be controlled by control signals of transmission signal lines TR 1 , TR 2 , TR 3 , and TR 4 , respectively. The operation process may be described in detail with reference to  FIG.  7   . 
     First, a reset signal RS is applied to the (reset) transistor M 5  and the charge accumulated in the floating diffusion FD is reset. When the charge amount sufficiently reaches the reset level, a row select signal SL is applied to the transistor M 4 , and a source current of the transistor M 3  based on the charge amount of the floating diffusion FD flows to a column signal line SIG, and may be transmitted to an A/D converter  353  (see  FIG.  6   ) as a reset level. 
     Next, the reset signal RS and the row select signal SL are turned OFF, a transmission signal TS is applied to the transistor M 5 , and the charge generated by the photodiode PD 1  is transmitted to the floating diffusion FD. When the transmission is sufficiently completed, the column select signal SL is applied to the transistor M 7 , and a source current of the transistor M 6  based on the amount of charge of the floating diffusion FD flows to a row signal line SIG, and may be transmitted to the A/D converter (see A/D converter  313  in  FIG.  2   ) as a pixel signal level. In the A/D converter, the correct pixel signal may obtain the correct pixel signal by detecting a difference between the reset level and the pixel signal level. 
     As such, in the pixel circuit according to some example embodiments, the transistors M 5 , M 6  and M 7  together with the floating diffusion FD may be shared by the pixels PX 1 , PX 2 , PX 3 , and PX 4  in (within) the same pixel block. 
     In some example embodiments, in the pixel block PB of a 2×2 matrix, the exposure time of some pixels may be adjusted differently from the exposure time of other pixels. For example, the pixels PX 1  and PX 4  of the same color of the first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4  may be controlled with different exposure times. Similarly, the same white pixels PX 2  and PX 3  in each pixel block may be controlled with different exposure times. This control may be performed by the control unit  300 ′ illustrated in  FIG.  2   ; however, example embodiments are not limited thereto. 
     For example, the control unit ( 300  in  FIG.  2   ) may control the pixels PX 1  and PX 3  located in the 2m−1 (m≥1)-th row among the first to fourth pixels PX 1 , PX 2 , PX 3  and PX 4  by a first exposure time, and may control the pixels PX 2  and PX 4  positioned in the 2m-th row by a second exposure time shorter than the first exposure time. 
     As such, the signal of the pixel by the first exposure time (e.g., a long time) and the signal of the pixel by the second exposure time (a short time) are synthesized by enabling the same color pixels of the same pixel block to be different by the first and second exposure times, a wide dynamic range (WDR) may be provided, and the final color image (MCI) may be expressed in detail with light and dark areas. 
       FIG.  8    is a plan view illustrating a pixel array (including autofocusing pixels) according to an example embodiment, and  FIG.  9    is a cross-sectional view illustrating an autofocusing pixel of the pixel array illustrated in  FIG.  8   . 
     Referring to  FIGS.  8  and  9   , a pixel array  100 A according to some example embodiments may be understood to be similar to the pixel array  100  of  FIG.  3    except that it has a pixel (or a shared pixel for phase detection) for autofocusing. Alternatively or additionally, the components of this example embodiment may be understood by referring to the description of the same or similar components of the pixel array  100  described in  FIGS.  1  to  3   , unless specifically stated to the contrary. 
     The pixel array  100 A according to this example embodiment includes a plurality of pixels PXs disposed in a plurality of rows and a plurality of columns, and may be arranged in the unit of a pixel block (PB) and an extended Bayer patterned block (EB) similarly to the pixel array  100  illustrated in  FIG.  3   . The plurality of pixels PX may include a shared pixel AF for phase detection, for autofocusing. 
     The shared pixel AF for phase detection each includes first and second phase detection pixels FD 1  and FD 2  for sensing light of the same color. For example, the first and second phase detection pixels FD 1  and FD 2  may include pixels for sensing green light. Unlike the other pixels for obtaining image information, the first and second phase detection pixels FD 1  and FD 2  may be used not only for an autofocusing function using a phase difference, but also for measurement of a distance between an object and an image sensor. 
     Since the first and second phase detection pixels FD 1  and FD 2  are disposed adjacent to each other and configured to sense the same color, the first and second phase detection pixels FD 1  and FD 2  may partially deviate from the regularity of the arrangement employed in the pixel array according to this example embodiment. The information of pixels outside the regularity of the arrangement may be replaced with information of other adjacent pixels in the case of a signal processing process. For example, in the signal processing process, a second phase detection pixel FD 2  may be replaced with information of other white pixels located in the same pixel block. 
     A plurality of shared pixels AF for phase detection may be disposed in different areas. In some example embodiments, the first and second phase detection pixels FD 1  and FD 2  may include a pair arranged in a row direction and a pair arranged in a column direction. 
     In detail, referring to  FIG.  9   , the first and second phase detection pixels PD 1  and PD 2  include light sensing elements PD 1  and PD 2 , light shielding layers  108 , an insulating layer  106 , a color filter layer  107 , and a micro lens  109 , respectively. The light shielding layer  108  employed in this example embodiment is disposed in the insulating layer  106  and may include a reflective metal material. The light shielding layer  108  employed in this example embodiment may have a shape spanning between two pixels FD 1  and FD 2 . 
     The light shielding layer  108  may block a portion of light incident to the light sensing elements PD 1  and PD 2 . A difference in the amount of light received by the light sensing elements PD 1  and PD 2  may occur depending on the incident direction of light. As described above, it may be determined whether focusing is obtained based on the difference in the amount of light received by the first and second phase detection pixels FD 1  and FD 2 . Based on this, a lens (not illustrated) may be adjusted to automatically focus. The shared pixel AF for phase detection in which the first and second phase detection pixels FD 1  and FD 2  are arranged in the row direction are used to adjust the focusing in the horizontal direction, and the shared pixel AF for phase detection in which the first and second phase detection pixels FD 1  and FD 2  are arranged in the column direction may be used to adjust the focus in the vertical direction. 
       FIG.  10    is a plan view illustrating a pixel array (including autofocusing pixels) according to an example embodiment, and  FIG.  11    is a cross-sectional view illustrating an autofocusing pixel of the pixel array illustrated in  FIG.  10   . 
     Referring to  FIGS.  10  and  11   , a pixel array  100 A′ according to some example embodiments may be understood to be similar to the pixel array  100 A of  FIGS.  8  and  9    except that the pixel structure for autofocusing is different. In addition, the components of these example embodiments may be understood by referring to the descriptions of the same or similar components of the pixel arrays  100  and  100 A described in  FIGS.  1  to  3    and  FIGS.  8  and  9   , unless otherwise specified. 
     The shared pixel AF for phase detection, used in the previous embodiment, is illustrated in the form of using the light shielding layer  108 , but a shared pixel AF&#39; for phase detection according to this example embodiment may include one micro lens  109 ′ configured to be shared by first and second phase detection pixels FD 1 ′ and FD 2 ′, rather than the light shielding layer  108 . 
     The micro lenses  109 ′ shared by the first and second phase detection pixels FD 1 ′ and FD 2 ′ may adjust incident light directed to respective light sensing elements PD 1  and PD 2 . The first and second phase detection pixels FD 1  and FD 2  may output different phase signals depending on the shape and/or refractive index of the micro lens  109 ′ employed in this example embodiment. Focus may be adjusted based on different phase signals. Similar to some example embodiments, the shared pixel AF for phase detection in which the first and second phase detection pixels FD 1  and FD 2  are arranged in the row direction is used to adjust the focus in the horizontal direction, and the shared pixel AF for phase detection in which the first and second phase detection pixels FD 1  and FD 2  are arranged in the column direction may be used to adjust the focus in the vertical direction. 
       FIG.  12    is a plan view illustrating a pixel array employable in an image sensor according to some example embodiments, and  FIGS.  13 A and  13 B  illustrate color information and illuminance information generated by signal processing of an image sensor according to an example embodiment, respectively. 
     Referring to  FIG.  12   , a pixel array  100 B according to this example embodiment may be understood to be similar to the pixel array  100  of  FIG.  3    except that the pixel (or a shared pixel for phase detection) is provided for autofocusing. In addition, the components of some example embodiments may be understood by referring to the descriptions of the same or similar components of the pixel array  100  described in  FIGS.  1  to  3   , unless specifically stated to the contrary. 
     The pixel array  100 B includes a plurality of pixels PX arranged in a plurality of rows and a plurality of columns, and similar to the previous embodiment, may be arranged in the unit of the pixel blocks PB 1 , PB 2 , PB 3 , and PB 4  and the extended Bayer pattern blocks (EB). 
     Referring to  FIG.  12   , similar to the pixel array  100  illustrated in  FIG.  3   , the pixel array  100 B includes a plurality of extended Bayer pattern block (EB) having first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4 , respectively arranged in a 2×2 matrix, but unlike the some example embodiments, the first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4  may each include nine pixels PX arranged in a 3×3 matrix. 
     In each of the pixel blocks PB 1 , PB 2 , PB 3  and PB 4 , 5 pixels PX arranged in two diagonal directions DL 1  and DL 2  are configured to detect light of color, and the remaining four pixels may be configured to detect white light. In detail, the five color pixels PX of the first and fourth pixel blocks PB 1  and PB 4  may be green pixels G configured to sense green light. The five color pixels PX of the second and third pixel blocks PB 2  and PB 3  may be red and green pixels R and G configured to sense red light and blue light, respectively. The four white pixels PX of the first to fourth pixel blocks PB 1 , PB 2 , PB 3  and PB 4  may be/correspond to white pixels W configured to sense white light. 
     As described above, the “pixel block (PB 1 , PB 2 , PB 3 , PB 4 )” employed in some example embodiments may have various pixel arrangements in which a plurality of color pixels and a plurality of illuminance detection pixels are combined, while an “extended Bayer pattern block (EB)” may have an R-G-G-B Bayer pattern in which four pixel blocks PB 1 , PB 2 , PB 3  and PB 4  are arranged, similar to the previous embodiment. 
     Output signals of the pixel array  100  are binned into a color signal comprised of RGB and an illuminance signal comprised of W in the binning pattern generation unit ( 240  in  FIG.  1   ), and as illustrated in  FIGS.  13 A and  13 B , color pattern information BP 1 ′ and illuminance pattern information BP 2 ′ are generated from the binned color and illuminance signals, respectively. Subsequently, the color pattern information BP 1 ′ and the illuminance pattern information BP 2 ′ may be merged in a pattern merging unit (see  280  of  FIG.  1   ) to provide a color image having the same resolution as the color pattern information BP 1 ′. 
     Since one pixel block of the pixel array  100  generates one pattern information of the color pattern information BP 1 ′ and the illuminance pattern information BP 2 ′, the color pattern information BP 1 ′, the illuminance pattern information BP 2 ′, and the final color image may have a resolution corresponding to an arrangement of pixel blocks. For example, when the number of the first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4  in the pixel array  100  in the row direction and the number of the first to fourth pixel blocks PB 1 , PB 2 , PB 3 , and PB 4  in the pixel array  100  in the column direction are m and n, respectively, the Bayer pattern type color and illuminance information (BP 1 ′, BP 2 ′) and the final color image may each have a resolution of m×n. 
     The merging process may be performed in such a manner that patterns in positions corresponding to each other in the color pattern information BP 1  and the illuminance pattern information BP 2  are one-by-one merged with each other. Respective colors R, G, and B of the color pattern information BP 1 ′ may provide a color image having improved sensitivity characteristics by illuminance data at a corresponding position of the illuminance pattern information BP 2 . 
     As described above, according to some example embodiments, the color pattern information BP 1 ′ obtained from five pixels PX in each pixel block improves, e.g. greatly improves sensitivity characteristics such as SNR and DR by the binned illuminance pattern information BP 2 ′, and as a result, a Bayer pattern color image having improved, or excellent, image quality may be output. Since respective pattern data of the illuminance pattern information BP 2 ′ is information obtained from four white pixels PX positioned adjacent in the same pixel block as the five color pixels PX associated with the color signal to be merged, the sensitivity may be appropriately improved in accordance with the environment/neighborhood of the corresponding pixel. 
     In the above-described embodiment, although a pixel array provided as a combination of color pixels indicated by R, G and B, and illuminance sensing pixels indicated by W is illustrated, color pixels and/or illuminance sensing pixels may be partially changed. In some example embodiments, at least a portion of the color pixels may be changed to other colors. For example, pixels (in detail, filters) for detecting yellow, cyan, and/or magenta colors may be included. Alternatively or additionally, the illuminance sensing pixel may be configured to detect light in a wider band than the wavelength band of the color pixel. For example, the illuminance sensing pixel may include another pixel, for example, a yellow pixel, in addition to the white pixel W. Alternatively or additionally, the illuminance sensing pixel may be configured to detect light in a band larger than visible wavelength. 
     As set forth above, according to some example embodiments, a pixel array is constructed by appropriately combining color pixels that receive color (e.g., RGB) and an illuminance sensing pixel (e.g., white) for improving sensitivity, and color pattern information and/or illuminance pattern information may be respectively generated by binning a signal obtained from the pixel array. The color pattern information may be provided as a Bayer pattern, and the illuminance pattern information may be configured as a pattern having illuminance information corresponding to respective pixel information one to one. The color pattern and the illuminance pattern may be merged to output a Bayer pattern color image having improved image quality in terms of SNR and/or Dynamic Range (DR). 
     Each of, or at least some of, the elements described above, such as but not limited to elements described as “units” or “devices”, such as the pattern merging unit  280 , the control unit  300 , the memory  400 , and/or elements ending in “-er” or “-or”, may include processing circuitry such as hardware including logic circuits; a hardware/software combination such as a processor executing software; or a combination thereof. For example, the processing circuitry more specifically may include, but is not limited to, a central processing unit (CPU) , an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a System-on-Chip (SoC), a programmable logic unit, a microprocessor, application-specific integrated circuit (ASIC), etc. 
     While some example embodiments have been illustrated and described above, it will be apparent to those of ordinary skill in the art that modifications and variations could be made without departing from the scope of example embodiments as defined by the appended claims.