Patent Publication Number: US-2004048473-A1

Title: Method for producing an integrated circuit, at least partially transforming an oxide layer into a conductive layer

Description:
[0001] The present invention relates to a method for fabricating an integrated circuit with partial conversion of an oxide layer into a conductive layer.  
       [0002] JP 2000-124175 A discloses a method for fabricating an integrated circuit, an insulating layer being applied to a first metalization plane, contact holes being formed in said layer. On the resulting structure, a metal layer for the contacts is applied and is subsequently polished back, so that it remains only in the contact holes. Afterward, an oxide layer produced by the polishing is cleaned from the top sides of the contacts by etching.  
       [0003] JP 3-76632 A and JP 2000-91556 A disclose the conversion of tungsten oxide layers and the suppression of their arising.  
       [0004] DE 199 01 210 A1 discloses the etching of a layer made of tungsten oxide by means of a halogen compound in an oxidizing atmosphere.  
       [0005] Although applicable to arbitrary integrated circuits, in principle, the present invention and the problem area on which it is based are explained with regard to integrated circuits using silicon technology.  
       [0006]FIGS. 3 a - d  show diagrammatic illustrations of different process steps of a known method for fabricating an integrated circuit using silicon technology.  
       [0007] In FIG. 3 a , reference symbol  1  designates a circuit substrate made of silicon dioxide, into which two metalization regions  10   a ,  10   b  made of tungsten are introduced. This introduction of the metalization regions  10   a ,  10   b  can be effected for example by a procedure in which, after a trench etching, tungsten is deposited over the whole area of the circuit substrate  1  and is then removed by chemical mechanical polishing in such a way that the separate metalization regions  10   a ,  10   b  are produced.  
       [0008] What is intended to be achieved by the method shown is that, in addition to standard tungsten contacts on the first metalization region  10   a , a second type of contacts is also created in which an intermediate layer  15  lies on the second metalization region, contact being made with said intermediate layer from above by means of a contact. In the present case, the intermediate layer serves as a fusible link and comprises SiN/WSi x . However, it could also be a metallic barrier layer.  
       [0009] As shown in FIG. 3 b , in a subsequent process step, the intermediate layer  15  made of SiN/WSi x  is deposited over the resulting structure, so that it covers the first and second metalization regions  10   a ,  10   b . In a subsequent process step, a photomask  20  is formed in such a way that it covers the intermediate layer  15  above the second metalization region  10   b , but leaves free the intermediate layer  15  above the first metalization region  10   a.    
       [0010] With reference to FIG. 3 b , an etching process and a resist stripping then take place, for example in an NF 3 -containing plasma, in order to remove the intermediate layer  15  above the first metalization region  10   a . During this etching operation and also during the resist stripping, an oxide film  100  made of WO x  forms above the tungsten of the first metalization region  10   a . It is disadvantageous that the formation of such a WO x  layer cannot be avoided.  
       [0011] In accordance with FIG. 3 d , after the preceding process step, an insulating layer  25 , e.g. made of silicon dioxide, is deposited over the whole area of the resulting structure. Afterward, contact holes  12   a ,  12   b  are formed above the first and second metalization regions  10   a ,  10   b , respectively, and they are filled with contacts  11   a ,  11   b  made of tungsten. This last process of filling with the contacts can be accomplished analogously to the formation of the first and second metalization regions  10   a ,  10   b  by tungsten being deposited over the whole area of the structure with the contact holes  12   a ,  12   b  and then being partially removed again by means of chemical mechanical polishing.  
       [0012] As can be gathered from FIG. 3 d , the oxide film  100  is preserved in the case of the known process, for which reason the contact resistance between the contact  11   a  and the first metalization region  10   a  is undesirably increased.  
       [0013] Thus, the general problem area on which the present invention is based is that the surfaces of specific metal layers or tracks can oxidize, e.g. when using tungsten as metal, under the action of specific etching gases at the surface.  
       [0014] By way of example, such WO x  layers have the disadvantage that they have a significantly higher resistance than pure tungsten, which means that the contact resistance with respect to overlying planes connected thereto by means of a contact is increased. Furthermore, part of the tungsten is consumed when the WO x  layers are produced, as a result of which the sheet resistance of the tungsten track is increased and the planarity is disrupted.  
       [0015] Therefore, it is an object of the present invention to provide a method for fabricating an integrated circuit, it being possible to counteract a contact impairment and bulk resistance increase through the etching of the intermediate layer or the resist stripping.  
       [0016] According to the invention, this object is achieved by means of the fabrication method specified in claim 1.  
       [0017] The idea on which the present invention is based consists in at least partially converting the oxide film above the first metalization region in such a way that a conductive compound is produced from the first metal by means of the oxide film and forms a connection to the first metalization region at the surface of the resulting structure.  
       [0018] The fabrication method according to the invention has the advantage, inter alia, over the known solution approach that the contact resistance in the case of the contact without an intermediate layer is considerably reduced and the bulk resistance is reduced.  
       [0019] A further advantage is that the process step for converting the oxide film can be carried out in situ directly after the process step for etching the intermediate layer, preferably in the same process reactor.  
       [0020] A further advantage is that the conversion has the effect of at least partially reversing the increase in volume and hence change in topology as a result of the formation of the oxide film.  
       [0021] Advantageous developments and improvements of the fabrication method specified in claim 1 are found in the subclaims.  
       [0022] In accordance with one preferred development, the intermediate layer is patterned in such a way that it forms a connection to the second metalization region at the surface of the resulting structure.  
       [0023] In accordance with a further preferred development, the first metal is tungsten, the gas comprising WF 6 .  
       [0024] In accordance with a further preferred development, an insulation layer is deposited over the resulting structure and a first contact for making contact with the first metalization region and a second contact for making contact with the intermediate layer above the second metalization region are provided in said insulation layer.  
       [0025] In accordance with a further preferred development, the material of the intermediate layer is SiN/WSi x . The intermediate layer is thus formed as a fusible link.  
       [0026] An exemplary embodiment of the invention is illustrated in the drawings and explained in more detail in the description below. 
     
    
    
     [0027] In the figures:  
     [0028]FIGS. 1 a - e  show diagrammatic illustrations of different process steps of a method for fabricating an integrated circuit using silicon technology as an embodiment of the present invention;  
     [0029]FIG. 2 shows an enlarged diagrammatic illustration of the region  100 ′ in FIG. 1 e ; and  
     [0030]FIGS. 3 a - d  show diagrammatic illustrations of different process steps of a known method for fabricating an integrated circuit using silicon technology. 
    
    
     [0031] In the figures, identical reference symbols designate identical or functionally identical component parts.  
     [0032]FIGS. 1 a - e  show diagrammatic illustrations of different process steps of a method for fabricating an integrated circuit using silicon technology as an embodiment of the present invention, and FIG. 2 shows an enlarged diagrammatic illustration of the region  100 ′ in FIG. 1 e.    
     [0033] The process steps illustrated in FIGS. 1 a  to  1   c  correspond to the process steps in accordance with FIGS. 3 a  to  3   c  already described in the introduction. A repeated description is therefore dispensed with.  
     [0034] The crux of the embodiment described lies in the process step which is illustrated in connection with FIG. 1 d . In this process step, the oxide film  100  made of WO x  is at least partially converted by means of a CVD process using the gas WF 6  and optionally Ar at a temperature of 400 to 500° C. In this connection, at least partially converted means that the oxide film  100  is converted into a film  100 ′ having insulating small tungsten oxide islands  105  and conductive small tungsten islands  110 , connected small tungsten islands forming shunts which constitute a connection from the first metalization region  10   a  to the surface of the film  100 ′.  
     [0035] This is clearly discernible in FIG. 2, which illustrates an enlarged diagrammatic illustration of the region  100 ′.  
     [0036] The following reactions are used to elucidate this conversion phenomenon:  
     3WO 3+/−x +H 2 O+WF 6 =4WO 3 +6HF; 2HF+WO 3 =WO 2 F 2 +H 2 O  
     [0037] In the subsequent process step illustrated in conjunction with FIG. 1 e , analogously to FIG. 3 d , an insulation film  25  is formed on the surface of the resulting structure, after which contact holes  12   a ,  12   b  are etched. Said contact holes  12   a ,  12   b  are subsequently filled with tungsten contacts  11   a ,  11   b  in order to make contact with the first metalization region directly by means of the contact  11   a  and to make contact with the second metalization region  10   b  by means of the contact  11   b  with the interposition of the (slightly incipiently etched) intermediate layer  15 ′.  
     [0038] What is achieved, then, with this process step according to the invention is that the WO x  is at least partially converted back to W and, as a result, contact is made with the first metalization region  10   a  with a reduced contact resistance and bulk resistance in comparison with the prior art.  
     [0039] Although the present invention has been described above using a preferred exemplary embodiment, it is not restricted thereto, but rather can be modified in diverse ways.  
     [0040] In particular, the selection of the layer materials and etchants is only by way of example and can be varied in many different ways.  
     [0041] List of Reference Symbols  
                                                      10a   First metalization region           10b   Second metalization region           1   Circuit substrate           15, 15′   Intermediate layer           20   Photomask           100   Oxide film           100′   Oxide film with shunts made of metal           25   Insulation layer           12a, 12b   Contact holes           11a, 11b   Contacts           105   Oxide region           110   Metallic shunt