Patent Publication Number: US-2002000888-A1

Title: Low phase noise variable frequency oscillator

Description:
BACKGROUND  
       [0001] 1. Field  
       [0002] The present invention relates generally to RF oscillators and more particularly to voltage control oscillators designed to provide low phase noise.  
       [0003] 2. Prior Art  
       [0004] There a number of U.S. patent references relating to variable frequency oscillator circuits which exhibiting low phase noise including U.S. Pat. Nos. 5,357,218, 5,185,583, 5,512,862, 5,268,657, 5,625,327, and 4,593,256. One of the principle methods of producing low phase noise in a variable frequency oscillator that is found in all of these references is the use of a resonator circuit with a high loaded Q. The principal way of obtaining a high loaded Q is to tap into the resonator rather than connect directly across it. This method transforms the impedance placed across the tap to a higher impedance across the entire resonator, thereby raising the loaded Q of the resonator. All of the reference patents use a tapped resonator in one form or another. Most connect into a direct tap on an inductor; however, in U.S. Pat. No. 5,625,327 the tap is made by a capacitive divider across the resonator. 
     
    
    
     BRIEF DESCRIPTION OF THE DRAWING  
     [0005]FIG. 1 is a schematic drawing of the present invention. 
    
    
     SUMMARY  
     [0006] A low phase noise variable frequency oscillator which reduces phase noise by decoupling resonator in three ways. The oscillator is coupled to the resonator by way of a tap on the resonator to reduce the oscillator load on the resonator. An impedance is placed between the oscillator and ground. The oscillator is lightly coupled to the output load.  
     [0007] The principal element in the resonator of the present invention is a printed circuit transmission line which is tapped to make a connection to the oscillator circuit that only lightly loads the resonator. To further reduce the loading of the oscillator circuit on the resonator, the only other connection made to the resonator is the varactor which is connected across the entire resonator to maximize the tuning ability The impedance of the circuit and the load are raised by placing a additional impedance between the base of the transistor and the ground and also between the output of the oscillator and output load. The combination of all these load reducing techniques provides an oscillator with superior phase noise characteristics of −88 dBc/Hz at 1 kHz offset and −110 dBc/Hz at 10kHz offset at 14 GHz carrier frequency, which is 10 to 15 dBc/Hz better than most comparable available oscillators  
     DETAIL DESCRIPTION OF THE INVENTION  
     [0008] The variable frequency oscillator circuit  1  shown in FIG. 1 includes a resonator  17 , inductors  2 , 3  and  4 , varactor diode  5 , transistor  6 , capacitors  7  through  11 , resistors  12  through  14 , tuning voltage input port  15 , supply voltage input port  16 , and RF output port  18 . The resonator  17  is a printed circuit transmission line having a first and second end. The second end of resonator  17  is grounded and the first end is connected to the varactor  5  which is connected to ground at its opposite end through capacitor  7 . One end of inductor  2  is connected to the junction of the varactor  5  and the capacitor  7 . The opposite end of inductor  2  is connected to the tuning voltage input port  15 . The resonator  17  has a tap near its ground end which is connected to a first end of a network consisting of resistor  12  and capacitor  8  connected in parallel. The opposite end of this network is connected to the emitter of transistor  6 . The collector of transistor  6  is connected to the output port  17  by way of capacitor  11 . The base of transistor  6  is connected through inductor  3  to the parallel combination of resistor  13  and capacitor  9  which are both connected at their opposite ends to ground. The supply voltage input port  16  is connected to one end of the inductor  4 . The other end of that inductor is connected to the collector of the transistor  6 . The supply voltage input port  16  is RF bypassed to ground through capacitor  10 . The bias for the base of the transistor is provided by a resistive divider consisting of resistors  13  and  14 . One end of resistor  14  is connected to port  16  while the other end is connected to the junction of resistor  13  capacitor  9  and inductor  3 .  
     [0009] The DC connections for transistor  6  are conventional. The DC power flows from supply voltage input port  16  through collector choke  4  to the collector of the transistor. The emitter of transistor  6  is DC connected to ground by way of resistor  12  and the resonator  17 . The resistor  13  and  14  form a voltage divider between the supply voltage input port  6  and ground for the base of transistor  6 . The bias is fed from the tap between the resistors  13  and  14  through choke  3  to the base. Capacitor  9  is an RF return to ground for the base circuit. Capacitor  8  provides an RF connection for the emitter of transistor  6  to the resonator  17 . Capacitor  11  serves as the RF connection to the output port while blocking DC from either entering or leaving this port.  
     [0010] The varactor  5  is placed across resonator  17  by a direct connection to the first end of the resonator. The opposite end of the varactor is connected to RF ground by way of the RF coupling capacitor  7 . Inductor  2  serves to block the flow of RF out to the varactor control voltage line, but still allows the flow of DC into the varactor circuit. The DC return for the varactor is through the resonator  17  which has its second end grounded.  
     [0011] In the operation of this circuit, the resonator  17  forms a parallel resonant circuit with the varactor  5 . The varactor can be tuned by varying the voltage on the varactor which is applied through the tuning voltage input port  15 . Transistor  6  is fundamentally configured as a common base amplifier The resonator circuit provides the RF return for the emitter of transistor  6  to ground.  
     [0012] Phase noise is reduced by maintaining a high loaded Q in the resonator circuit. This is accomplished by lightly loading the resonator in three ways. The load placed by oscillator on the resonator is reduced by connecting the oscillator to a tap on the resonator rather than across the whole resonator. The load presented by the oscillator is further reduced by returning the oscillator to ground through a relatively high impedance in the base of the transistor  6 . The load placed by the external oscillator load at port  18  is reduced by the relatively high impedance of capacitor  11 .  
     [0013] The relative magnitude and the effect of the components used to reduce the load on the resonator can be seen by examining a practical example of an oscillator operating in accordance with the present invention at a frequency of 1.4 GHz. The practical values used in this circuit are listed below.  
                                                           Component   Value   Impedance at   MHz                          C8   6.8 pF   −j17 ohm   1400           L3   2.2 nH     j20 ohm   1400           C11   2.2 pF   −j52 ohm   1400                      
 
     [0014] The resonator tap is made at 30 to 50% of the total resonator. What is claimed to be new and desired to be protected by letters patent is set forth in the appended claims: