Patent Publication Number: US-10324114-B2

Title: Semiconductor integrated circuit device and electronic device for driving a power semiconductor device

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. application Ser. No. 15/216,859 filed Jul. 22, 2016, now U.S. Pat. No. 9,835,658, patented on Dec. 5, 2017, which claims priority from Japanese Patent Application No. 2015-172625 filed on Sep. 2, 2015, the disclosures of which are incorporated by reference herein in their entirety. 
    
    
     BACKGROUND 
     The present disclosure relates to a semiconductor integrated circuit device, and is applicable to a semiconductor integrated circuit device that drives a power semiconductor device, such as an insulated gate bipolar transistor (IGBT). 
     An electric motor (a motor) is used as a power source of a hybrid electric vehicle (HEV), in which the electric motor is combined with an internal-combustion engine (a gasoline engine), or an electric vehicle (EV), for example. When the electric motor is driven, a power conversion device (an inverter) that performs DC to AC conversion is used for obtaining a predetermined torque and a predetermined power-supply frequency. In the inverter, a driving signal is controlled while a driving current of the motor is monitored by a current detector (see Japanese Unexamined Patent Application Publication No. 2011-97812, for example). 
     In a case of detecting a normal current from the motor driving current of each phase by means of the current detector such as a transformer, and an A/D converter of a control circuit, for example, and using the normal current for motor-driving control, it is difficult to achieve high-speed processing because current detection requires a loop time in which an output voltage of the transformer is subjected to A/D conversion in the control circuit and the driving control is adjusted based on that result. 
     Other problems and novel features will become apparent from the description of this specification and the accompanying drawings. 
     SUMMARY 
     The summary of a typical one of the present disclosures is briefly described below. 
     A semiconductor integrated circuit device includes a driving capability control circuit that controls a driving capability of a driving circuit based on a normal current detected from a sense current of a power semiconductor device. 
     According to the above semiconductor integrated circuit device, high-speed processing can be achieved. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block diagram for explaining an electric motor system according to a comparative example. 
         FIG. 2  is a diagram for explaining a sense current of an IGBT. 
         FIG. 3  is a block diagram for explaining an electric motor system according to a first example. 
         FIG. 4  is a block diagram showing an electronic device that is a portion of the electric motor system of  FIG. 3 . 
         FIG. 5  is a block diagram for explaining a driver IC in  FIG. 4 . 
         FIG. 6  is a circuit diagram for explaining a current mirror circuit in  FIG. 5 . 
         FIG. 7  is a block diagram for explaining a configuration of a driving capability control circuit in  FIG. 5 . 
         FIG. 8  is a timing chart for explaining control of the driving capability control circuit in  FIG. 5 . 
         FIG. 9  is a block diagram for explaining an IGBT and a driver IC according to a second example. 
         FIG. 10  is a diagram for explaining the IGBT in  FIG. 9 . 
         FIG. 11  is a block diagram for explaining a driver IC and a control circuit according to a third example. 
         FIG. 12  is a block diagram for explaining the driving capability control circuit in  FIG. 11 . 
         FIG. 13  is a block diagram for explaining the driving capability control circuit in  FIG. 11 . 
         FIG. 14  is a block diagram for explaining a semiconductor integrated circuit device according to an embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     An embodiment, examples, and a modified example are described below, referring to the drawings. In the following description, the same components are labeled with the same reference signs and the redundant description may be omitted. 
     First, a technique studied by the inventors of the present invention prior to this disclosure (hereinafter, referred to as a comparative example) is described. 
       FIG. 1  is a block diagram showing a portion of an electric motor system according to the comparative example.  FIG. 2  is a diagram for explaining a sense current of an IGBT. The electric motor system  1 R includes a three-phase motor  10 , an inverter circuit  20 , a driver IC  30 R, and a control circuit  40 R. The three-phase motor  10  includes three transformers (coils)  11 . The transformers may be two, because current calculation for each phase is possible as long as two phase currents can be detected. The inverter circuit  20  has a three-phase bridge configuration by six power semiconductor devices  21 . As shown in  FIG. 2 , the power semiconductor device  21  includes an IGBT  22  that is a switching transistor. The IGBT  22  includes a gate terminal G, a collector terminal C, an emitter terminal E that allows a driving current to flow, and a current sensing terminal SE that allows a sense current to flow. The driver IC  30 R drives the power semiconductor device  21 , and the control circuit  40 R controls the driver IC  30 R. 
     For driving the motor, in the inverter circuit using the IGBT  22 , it is necessary to control a driving signal (a PWM signal) that drives the IGBT  22 , while monitoring the driving current. As the monitoring of the current, the following two are performed.
     (1) A motor-driving current of each phase is monitored by means of the transformer  11  and an A/D converter of the control circuit  40 R, for example, and is used for detection of a normal current in control of driving the motor.   (2) The sense current is monitored by means of a voltage comparison circuit and an A/D converter in the driver IC  30 R for example, and is used mainly for detection of an overcurrent to cut off the driving signal when an abnormal current flows.   

     The driving current of the IGBT  22  is an emitter current (Ie), and the sense current is called a current mirror current (Iγ) because it is a current of a current mirror circuit in the IGBT  22 . A ratio (Ie/Iγ) of the emitter current (Ie) and the current mirror current (Iγ) is called a current mirror ratio. The current mirror ratio is chosen to be about 1000 to about 10000. Assuming that a normal driving current of the motor is about 400 A, a rated current is about 1600 A. Therefore, in a case of using the sense current for determination of an abnormality exceeding the value of the rated current, a current detection voltage (Vab) in the detection of an abnormal current is as follows, assuming that the current mirror ratio is 4000 and a resistance (Rab) for current detection is 5Ω.
 
 Vab =(1600 A/4000)×5Ω=2 V
 
     Meanwhile, a current detection voltage (Vn) in a normal operation is as follows.
 
 Vn =(400/4000)×5Ω=0.5 V
 
Further, in a low-speed range of the motor, a dynamic range is very small because the driving current is small.
 
     At the start of rotation of the motor or in the low-speed range of the motor, it is desirable to increase not only the PWM signal that is the driving signal but also a current of the driving signal in order to improve a driving capability. However, in the current detection described in (1), an output voltage of the transformer is subjected to A/D conversion in the control circuit  40 R and the driving control is adjusted based on the A/D conversion result, so that a loop time is required and therefore high-speed processing is difficult. Further, in a case of performing the control by the sense current as described in (2), because a loopback suitable for detection of the abnormal current is employed, it is difficult to obtain a sufficient gain. 
     &lt;Embodiment&gt; 
       FIG. 14  is a block diagram for explaining a semiconductor integrated circuit device according to an embodiment. The semiconductor integrated circuit device  30  includes a driving circuit  31  that drives the power semiconductor device  21 , and a driving capability control circuit  34  that controls a driving capability of the driving circuit  31 . The driving circuit  31  stops driving of the power semiconductor device  21  based on an abnormal current detected from a sense current of the power semiconductor device  21 . The driving capability control circuit  34  controls the driving capability of the driving circuit  31  based on a normal current detected from the sense current of the power semiconductor device  21 . 
     A driving capability of the power semiconductor device is improved, making it possible to drive a motor with a high torque, for example. 
     FIRST EXAMPLE 
     (Electric Motor System) 
       FIG. 3  is a block diagram showing a configuration of an electric motor system according to a first example. The electric motor system  1  of  FIG. 3  includes the three-phase motor  10 , the inverter circuit  20  using six power semiconductor devices, six driver ICs  30 , a control circuit  40 , and a DC power source  50 . A portion formed by the inverter circuit  20 , the six driver ICs  30 , and the control circuit  40  is called an electronic device  2 . When driving a vehicle or the like, the inverter circuit  20  controls on and off of the switching transistors  22  in the inverter circuit  20  to allow a current to flow to each phase of the three-phase motor  10  from a voltage of the DC power source (DC)  50 , so that a speed of the vehicle or the like is changed by a frequency of this switching. When braking the vehicle or the like, the inverter circuit  20  controls on and off of the switching transistors  22  in synchronization with a voltage generated in each phase of the three-phase motor  10  to perform a so-called rectification operation that obtains a DC voltage, so that regeneration is performed. 
     The three-phase motor  10  includes a permanent magnet as a rotor and a coil as an armature. The armature windings of three phases (a U-phase, a V-phase, and a W-phase) are spaced at 120 degrees in delta connection. A current always flows through three coils of the U-, V-, and W-phases. The three-phase motor  10  includes a current detector  11 , e.g. a transformer, and an angular-velocity and position detector  12 . 
     The inverter circuit  20  forms bridge circuits of the U-, V-, and W-phases by power semiconductor devices. The U-phase bridge circuit is coupled to the three-phase motor  10  at a coupled point between a power semiconductor device  21 U and a power semiconductor device  21 X. The V-phase bridge circuit is coupled to the three-phase motor  10  at a coupled point between a power semiconductor device  21 V and a power semiconductor device  21 Y. The W-phase bridge circuit is coupled to the three-phase motor  10  at a coupled point between a power semiconductor device  21 W and a power semiconductor device  21 Z. Because the power semiconductor devices  21 U,  21 V,  21 W,  21 X,  21 Y, and  21 Z are the same in configuration, they may be collectively called power semiconductor devices  21 . The power semiconductor device  21  is formed by a semiconductor chip including the switching transistor configured by an IGBT (hereinafter, simply referred to as the IGBT)  22  and a temperature-detecting diode D 1  and a semiconductor chip including a flywheel diode D 2  coupled between an emitter and a collector of the IGBT  22  in parallel. The flywheel diode D 2  is coupled to allow a current to flow in an opposite direction to that of the current flowing through the IGBT  22 . It is preferable that the semiconductor chip on which the IGBT  22  and the temperature-detecting diode D 1  are formed and the semiconductor chip on which the flywheel diode D 2  is formed are sealed in the same package. The flywheel diode D 2  may be formed on the same chip as the IGBT  22  and the temperature-detecting diode D 1 . 
     The driver IC  30  that is a first semiconductor integrated circuit device includes, on one semiconductor substrate, the driving circuit (DRIVER)  31  that generates a signal driving a gate of the IGBT  22 , a current detection circuit (CURRENT DETECTION)  32 , a protection detection circuit (PROTECTION DETECTION)  33 , and the driving capability control circuit (DRIVING CAPABILITY CONTROLLER)  34 . The control circuit  40  that is a second semiconductor integrated circuit device includes a CPU  41 , a PWM circuit (PWM)  42 , and an I/O interface (I/O IF)  43  on one semiconductor substrate, and is formed by a microcomputer unit (MCU), for example. The CPU  41  operates in accordance with a program stored in a non-volatile memory that is electrically erasable and rewritable, such as a flash memory (not shown). 
     (Driver IC, Control Circuit) 
       FIG. 4  is a block diagram showing an electronic device that is a portion of the electric motor system of  FIG. 3 . The driver IC  30  includes the driving circuit  31 , the current detection circuit  32 , the protection detection circuit  33 , an isolator  34 , and the driving capability control circuit  35 . The current detection circuit  32  includes a current amplification circuit (CURRENT AMP)  32 - 1  that detects an abnormal current and a current amplification circuit  32 - 2  that detects a normal current. The current amplification circuit (CURRENT AMP)  32 - 1  converts a sense current to a voltage (V 1 ), and the protection detection circuit  33  detects the abnormal current based on that voltage. The detection result is sent to the driving circuit  31 , so that a driving signal of the IGBT  22  is cut off. Also, the detection result is sent to the CPU  41  via the isolator  34  and the I/O interface  44  of the control circuit  40 . The current amplification circuit  32 - 2  converts the normal current to a voltage (V 2 ). The voltage is sent to the driving capability control circuit  35 , so that the driving capability control circuit  35  controls a driving capability of the driving circuit  31 . The isolator  34  transmits a signal to be transmitted between the driver IC  30  and the control circuit  40 , via magnetic coupling. The isolator  34  is formed by insulating an on-chip transformer formed by wirings with an interlayer film. 
       FIG. 5  is a block diagram showing the driver IC in  FIG. 4 . The current detection circuit  32  is formed by a current mirror circuit (CURRENT MIRROR)  321 , and resistors  322  and  323  respectively coupled to terminals T 1  and T 2 . The current mirror circuit  321  divides a current (Iγ) flowing thereto from a current sensing terminal NE of the IGBT  22  via a terminal T 3  into an abnormal current (Iγ 1 ) and a normal current (Iγ 2 ). Current mirror ratios and detection resistances, which are appropriate for detection of the abnormal current and detection of the normal current, are set. Assuming that a resistance value of the resistor  322  for detecting the abnormal current is RS 1 , a resistance value of the resistor  323  for detecting the normal current is RS 2 , the voltage for detecting the abnormal current is V 1 , and the voltage for detecting the normal current is V 2 ,
 
 V 1= Iγ 1× RS 1
 
 V 2= Iγ 2× RS 2
 
     The protection detection circuit  33  includes a comparator  331 , a reference voltage generation circuit  332 , and a filter  333 . The comparator  331  compares the abnormal-current detection voltage (V 1 ) input to its non-inverting input terminal via the filter (FILTER)  333  and a reference voltage (VREF 1 ) of the reference voltage generation circuit  332  input to its inverting input terminal with each other and, when V 1  is larger than VREF 1 , detects the abnormal current and outputs an abnormal-current signal (ABN). 
     The driving circuit  31  includes a driver  311 , an AND gate  312 , and a status retaining circuit  313 . The status retaining circuit  313  retains the abnormal-current signal (ABN) detected by the protection detection circuit  33 . In a case where the abnormal-current signal (ABN) indicates occurrence of an abnormality, the status retaining circuit  313  sets an output of the AND gate  312  to be LOW to cut off a drive signal (DRV) input from a terminal T 4 . In a case where the abnormal-current signal (ABN) indicates that no abnormality occurs, the status retaining circuit  313  allows the AND gate  312  to pass the drive signal (DRV) therethrough. The driver  311  sends the drive signal (DRV) to the gate terminal G of the IGBT  22  via a terminal T 5  based on voltage control or current control by the driving capability control circuit  35 . The abnormal-current signal (ABN) is sent to the control circuit  40  via a terminal T 6 . 
       FIG. 6  is a circuit diagram of the current mirror circuit in  FIG. 5 . The current mirror circuit  321  includes an operational amplifier  324 , a filter capacitor  325 , transistors Q 1 , Q 2 , and Q 3 , and resistors  322 ,  323 ,  326 ,  327 ,  328 ,  329 , and  32 A. When a receiving buffer circuit is configured by the input operational amplifier  324  to which the current mirror current (Iγ) of the IGBT  22  flows and the transistor Q 1 , the same voltage as a base voltage of the transistor Q 1  is input to the other transistors Q 2  and Q 3 , and current amplification in the transistors Q 2  and Q 3  is designed to obtain expected values, respectively, the current of the transistor Q 2  can be set to Iγ×1 and the current of the transistor Q 3  can be set to Iγ×10, for example. 
       FIG. 7  is a block diagram of the driving capability control circuit in  FIG. 5 . The driving capability control circuit  35  includes an amplification circuit  351 , a reference voltage generation circuit  355 , a switching circuit  356 , and a voltage or current control circuit (V/I CONTROLLER)  357 . The amplification circuit  351  is an inverting differential amplification circuit formed by an operational amplifier  352  and resistors  353  and  354 , and performs amplification to a voltage (V 3 ) that is obtained by multiplying a difference between a reference voltage (VREF 2 ) of the reference voltage generation circuit  355  and the normal-current detection voltage (V 2 ) by a ratio of a resistance value (R 2 ) of the resistor  353  and a resistance value (R 1 ) of the resistor  354 .
 
 V 3=( V REF2− V 2)× R 2/ R 1
 
When V 2  is small, V 3  is large. When V 2  is large, V 3  is small.
 
     The switching circuit  356  performs switching between a basic setting voltage (VB) and the voltage (V 3 ) based on a driving-capability control signal (DRBC) input via a terminal T 7  from the control circuit  40 , to supply the voltage to the voltage or current control circuit  357 . 
     The voltage or current control circuit  357  controls a voltage or a current of the driver  311  to control an output voltage or an output current of the driver  311 . The voltage (V 3 ) is higher than the basic setting voltage (VB), and when the basic setting voltage (VB) is switched to the voltage (V 3 ), the output voltage or the output current of the driver  311  increases. 
       FIG. 8  is a timing chart for explaining control by the driving capability control circuit in  FIG. 5 . In a low-speed (high-torque) range of a motor, 1 power source cycle is set to be longer and a duty of a PWM signal is set to be larger than in a medium/high-speed range. Also, in the low-speed range, switching to the voltage (V 3 ) is caused by the driving-capability control signal (DRBC) input from the terminal T 7 , in order to set a driving capability of the driver  311  to be higher. In the medium/high-speed range, switching to the basic setting voltage (VB) is caused by the driving-capability control signal (DRBC). 
     According to this example, in order to improve the driving capability, not only the PWM signal that is the drive signal but also the current of the drive signal can be increased at the start of rotation of the motor or during rotation at low speeds. Further, current detection is performed by using the sense current, but does not use a transformer. Therefore, no loop time is required in which an output voltage of the transformer is subjected to A/D conversion in the control circuit  40  and drive control is adjusted based on the result of A/D conversion. Thus, it is easy to achieve high-speed processing. Furthermore, there are employed both a loop back suitable for detection of the abnormal current and a loop back suitable for detection of the normal current. Therefore, a sufficient gain can be obtained. 
     SECOND EXAMPLE 
       FIG. 9  is a block diagram of an electronic device according to a second example. The electronic device according to the second example includes two current mirrors in one IGBT, but omits the current mirror circuit in the driver IC according to the first example. The other configuration is the same as that in the first example. 
     The IGBT  22  in the first example is formed by several thousands to several tens of thousands of cells having the same configuration. A portion of the cells is used as cells for detecting the sense current (the abnormal current), a region formed by the cells for detecting the sense current is referred to as an “abnormal-current detection region”, and a region formed by the other cells are referred to as a “main region”. A ratio (Nm/Ns) of the number of the cells in the main region (Nm: an integer) and the number of the cells in the abnormal-current detection region (Ns: an integer) is set to be several thousands. An IGBT  22 A in the second example further includes cells for detecting the sense current (the normal current), and a region formed by those cells is referred to as a normal-current detection region. Assuming that the number of the cells in the normal-current detection region is Nns (an integer), Nns/Ns is set to be 10, for example. 
     As shown in  FIG. 10 , a collector terminal in the IGBT  22 A is common to the main region, the abnormal-current detection region, and the normal-current detection region, whereas an emitter terminal is separated into a main emitter terminal E (hereinafter, referred to as a main terminal), an emitter terminal SE for abnormal current detection (hereinafter, referred to as a sense terminal), and an emitter terminal NSE for normal current detection (hereinafter, referred to as a normal sense terminal). A gate terminal G for driving each region is common. 
     A current mirror current (Iγ 1 ) from the sense terminal SE generates an abnormal-current detection voltage (V 1 ) by the resistor  322  for detecting the abnormal current coupled to the terminal T 1 . The current mirror circuit of the IGBT  22 A and the resistor  322  for detecting the abnormal current form an abnormal-current detection circuit. A current mirror current (Iγ 2 ) from the normal sense terminal NSE generates a normal-current detection voltage (V 2 ) by the resistor  323  for detecting the normal current coupled to the terminal T 2 . The current mirror circuit of the IGBT  22 A and the resistor  323  for detecting the normal current form a normal-current detection circuit. 
     Because no current mirror circuit is required in the driver IC according to this example, the driver IC can have a simpler configuration than in the first example, thus reducing a chip area. 
     THIRD EXAMPLE 
       FIG. 11  is a block diagram of an electronic device according to a third example. The electronic device according to the third example further includes an A/D converter in the driver IC of the first example and can perform feed-back to the driving capability control circuit. The other configuration is the same as that in the first example. 
     A driver IC  30 B includes the A/C converter (ADC)  36  for informing a control circuit  40 B of the abnormal-current detection voltage (Va) and the normal-current detection voltage (Vn) that are the outputs of the current detection circuit  32  (the current amplification circuits  32 - 1  and  32 - 2 ). An output of the A/D converter  36  is sent to the control circuit  40 B via an isolator  34 B and a terminal T 9 . 
       FIG. 12  is a block diagram for explaining a driving capability control circuit in  FIG. 11 . The driving capability control circuit in the third example has a function of allowing a resistance value of a loop resistor in an amplification circuit to be adjusted, and the other configuration is the same as that in the first example. The control circuit  40 B generates a control signal (AGC) based on the voltage (Vn) obtained through the A/D converter  36 . A resistor  354 B of the amplification circuit  351 B of the driving capability control circuit  35 B is a variable resistor having a resistance value adjustable based on the control signal (AGC) input from a terminal T 8 . Because a function of allowing a feed-back gain of the normal-current detection voltage (Vn) to be adjusted (the function of allowing the loop resistor  354 B of the amplification circuit  351 B to be adjusted) is provided, it is possible to control the driving capability with a high accuracy by adjusting that gain in accordance with a variation of the resistance value (RS 2 ) of the resistor  323  for detecting the normal current. 
     MODIFIED EXAMPLE 
       FIG. 13  is a block diagram for explaining the driving capability control circuit in  FIG. 11 . The driving capability control circuit of this example has a function of allowing the reference voltage (VREF 2 ) of the first example to be adjusted, and the other configuration is the same as that in the first example. The control circuit  40 B generates a control signal (RVC) based on the voltage (Vn) obtained through the A/D converter  36 . The reference voltage (VREF 2 ) of a reference voltage generation circuit  355 C of the driving capability control circuit  35 C is variable, and can be adjusted based on the control signal (RVC) input from the terminal T 8 . Because the function of allowing the feed-back gain of the normal-current detection voltage (Vn) to be adjusted (the function of allowing the reference voltage (VREF 2 ) of the reference voltage generation circuit  355 C to be adjusted) is provided, it is possible to control the driving capability with a high accuracy by adjusting that gain in accordance with the variation of the resistance value (RS 2 ) of the resistor  323  for detecting the normal current. 
     The invention made by the inventors has been specifically described above, based on the embodiment, the examples, and the modified example. However, it should be noted that the present invention is not limited thereto, but can be changed in various ways.