Patent Publication Number: US-8995518-B1

Title: Equalizer for heavily clipped or compressed communications signals

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application is a continuation application of U.S. application Ser. No. 12/359,046, filed Jan. 23, 2009, now U.S. Pat. No. 8,428,113, the entirety of which is incorporated by reference herein. 
    
    
     BACKGROUND 
     1. Field of the Invention 
     The invention generally relates to wired digital communications systems. In particular, the invention relates to the equalization of signals that can be severely distorted by non-linearities. 
     2. Description of the Related Art 
     Any of a variety of physical impairments can limit the effective transmission of data signals over communications channels. For example, the frequency selective nature of the channels can cause different frequency components of the input signal to be attenuated and phase-shifted differently. This can cause the impulse response of the channel to span several symbol intervals, resulting in time-smearing and interference between successive transmitted input symbols, commonly known as intersymbol interference (ISI). The ISI resulting from the channel distortion, if left uncompensated, can cause high error rates. The solution to the ISI problem is to design a receiver that compensates for the ISI in the received signal. The compensator for ISI is known as an equalizer. 
     A number of equalization techniques to mitigate ISI exist, including: (a) maximum likelihood sequence estimation (MLSE), in which a dynamic programming algorithm is used to determine the most likely transmitted sequence given observations of the received noisy and ISI-corrupted sequence and knowledge of the channel impulse response coefficients; (b) sub-optimal equalizer structures such as a linear equalizer (LE), wherein one simple finite impulse response (FIR) filter is used to mitigate ISI, or a non-linear decision feedback equalizer (DFE) that, in addition to the feed-forward FIR filter, employs a feedback filter (FBF) on the previously detected symbols; and (c) multi-carrier modulation (MCM), wherein the spectrum of the frequency-selective channel is divided into a large number of parallel, independent and approximately flat sub-channels using an orthogonal transformation. 
     MLSE uses a sequence of received signal samples over successive symbol intervals to make decisions about the transmitted symbols, and can be considered to be optimal from a bit error rate (BER) perspective. However, MLSE has a computational complexity that grows exponentially with the length of the channel time dispersion, and is typically prohibitively expensive to implement. In sub-optimal structures such as LE and DFE, data detection is done on a symbol-by-symbol basis and hence is much simpler to implement than the optimal MLSE. Linear equalization uses a linear filter with adjustable coefficients. Decision feedback equalization exploits a FBF to suppress that part of the ISI from the present estimate that was caused by previously detected symbols. 
     Advanced equalization techniques are usually too complex to be implemented using analog circuit design. Furthermore, even in the case of plain baseband communications that employ a simple LE, digital implementations are advantageous because of easy scalability to integrated circuit (IC) technologies of smaller dimensions. For this reason, most of the modern data receiver designs are digital, and a high-level description is illustrated in  FIG. 1 . 
     The received signal passes through the analog-front-end (AFE) block  102  that may include functions such as analog filtering, variable gain amplification (VGA), analog demodulation etc., depending on the application. Then, the signal is digitized in an analog-to-digital (ADC) conversion block  104 . Finally, the digital signal samples are processed in a DSP receiver  106  that may include timing recovery, equalization and other types of advanced signal processing techniques. 
     Non-linearity of the overall communications channel from the data source to the DSP receiver  106  is one of the problems that can severely distort the signal and hence degrade the overall system performance. Examples of severe non-linearity are harsh signal compression and clipping. 
     A digital equalizer is typically very sensitive to a harsh non-linear distortion of the received signal. As an illustration, clipping can significantly reduce an equalizer&#39;s performance unless clipping occurs relatively infrequently, such as in less than 1% of the data transmission. 
     When dealing with the problem of equalizing clipped signals in MCM systems, some techniques are used to remove the effect of clipping by restoring the signal linearity through interpolation (see U.S. Pat. No. 6,606,047 to Borjesson, et al.). Or, some other algorithms are proposed to reduce the signal peak-to-average power ratio (PAPR) (see U.S. Pat. No. 7,340,006 to Yun, et al.). 
     In a wire-line application, one technique uses an equalizer on the transmit side and clips the transmit signal when overshoot occurs due to filtering (see U.S. Pat. No. 6,452,975 to Hannah). 
     Many digital communication systems attempt to avoid signal clipping. Examples of those approaches can be found in U.S. Pat. No. 7,336,729 to Agazzi and U.S. Pat. No. 7,346,119 to Gorecki, et al., both of which are applicable to high-speed serializer-deserializer (SerDes) digital designs. 
     One application of SerDes is to transfer data over backplane channels in chip-to-chip communications. An example of a channel impulse response (CIR) of a typical backplane at 6 Gbit/s is illustrated in  FIG. 2 . 
     The cursor level of the illustrated CIR is at 486.1 millivolts (mV), while its dominant post-cursor component is at 183.7 mV. 
     The following illustrative example is based on non-return to zero (NRZ) signaling that is relatively popular in SerDes applications. Under the assumptions of no correlations among the transmitted data, a Gaussian noise environment, and no non-linear distortions, the illustrated channel can be readily equalized with a linear minimum mean-squared-error (MMSE) equalizer because the MMSE equalizer is designed to minimize the slicer error variance and consequently bit-error-rate (BER). 
     The channel described earlier in connection with  FIG. 2  does not introduce a severe ISI distortion, and hence, a relatively simple 2-tap equalizer having values as computed from CIR using the formulas can be used: 
     
       
         
           
             
               
                 
                   
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     In Equations 1 and 2 above, h n  represent samples of CIR at baud rate, with h 0  being the cursor and h -1  the precursor. 
     The optimal tap values of the example channel are [c 0 , c 1 ]=[2.12, −0.80]. 
     In high-speed SerDes designs, the equalizer taps are usually normalized so that the first tap is equal to 1. Then, a 2-tap post-cursor equalizer is usually called a single tap equalizer. 
     This normalization does not change the equalizer shape or overall system performance. In the following example, a normalized equalizer, but this does not limit the equalizer does not need to be normalized. 
     As a result, the normalized tap C 1  can be found from Equations 1 and 2 as: 
     
       
         
           
             
               
                 
                   
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     The optimal single tap post-cursor equalizer of the foregoing example is [1, −0.38]. 
     If the received and equalized signal samples are denoted as x n  and y n  respectively, their relation in the normalized equalizer form is given in Equation 4: 
     
       
         
           
             
               
                 
                   
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       FIG. 3  illustrates received and equalized signal traces.  FIG. 3  illustrates that equalizing clipped signals can be ineffective. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       These drawings and the associated description herein are provided to illustrate specific embodiments of the invention and are not intended to be limiting. 
         FIG. 1  illustrates an example of a digital data receiver. 
         FIG. 2  illustrates an impulse response of a typical backplane channel. 
         FIG. 3  illustrates received and equalized signal traces. 
         FIG. 4  illustrates an equalizer for non-linear signals with eye diagnostic monitoring. 
         FIG. 5  illustrates an embodiment of a pipelined equalizer for non-linear signals. 
     
    
    
     SUMMARY OF THE DISCLOSURE 
     It can be difficult to equalize signals that have been distorted by severe non-linearities such as clipping or harsh compression. Harsh compression can occur with an input-output transfer characteristic of at least 1 decibel (dB) of compression in an operating range. For example, severe non-linearity occurs when signal compression or signal clipping occurs at rates above 20% of the data transmission interval. Severe non-linearities may significantly reduce system performance. Disclosed techniques selectively apply digital signal processing (DSP) equalization based on the detection of non-linearity for a present sample or one or more samples prior to the present sample. These techniques can be implemented in relatively low-cost high-speed SerDes designs to improve eye openings and reduce sensitivity to Inter-Symbol Interference (ISI) and to improve bit error rate (BER). 
     DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS 
     Signals that are distorted by non-linearities can be ineffectively compensated by existing techniques. Examples of sources for such non-linearities include compression and clipping. Disclosed techniques determine when such non-linearities are present and adjust the compensation for intersymbol interference (ISI). The disclosed techniques can be used in high-speed SerDes designs that are based on low-cost DSP approaches. These improvements can be incorporated into the DSP receiver  106  ( FIG. 1 ). 
     Disclosed techniques can be implemented relatively simply and inexpensively in a high-speed SerDes because they can be used with relatively low resolution for the analog-to-digital converter (ADC)  104  ( FIG. 1 ). Despite the use of a relatively low resolution ADC  104 , the SerDes should be able to tolerate severe non-linear distortion of the received signals, such as heavy clipping (not just occasional clips of less than 1%). For example, typically an ADC  104  having 3-5 bits of resolution, depending on the application, can be used. Because a low resolution ADC can be used, the disclosed techniques can be significantly less complex and hence more cost effective than the conventional designs that rely on keeping or restoring the signal linearity. Of course, higher resolution ADCs can be used. In one embodiment, the ADC  104  quantizes its soft symbol output to at least 3 bits. 
     Although particular embodiments are described herein, other embodiments of the invention, including embodiments that do not provide all of the benefits and features set forth herein, will be apparent to those of ordinary skill in the art. 
     Returning now to  FIG. 3 , the worst case ISI data sequences for an equalizer are those which reduce a current sample x n  to be relatively small, when the prior sample x n-1  was relatively large. As a result, the current sample x n  may be within the linear range, while the prior sample x n-1  can be in a severely non-linear range of the input/output transfer characteristic. Depending on the AFE and ADC design, it is possible that the prior sample x n-1  is significantly modified and rather than being described by the Equation 4, the behavior follows Equation 5: 
     
       
         
           
             
               
                 
                   
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     A variable nl_level of Equation 5 depends on the communications channel input/output transfer. When the non-linearity is described by a limiter, nl_level=clip_level. 
     The signal traces  302 ,  304 ,  306 ,  308  illustrate Equations 4 and 5 when the signal non-linearity is described by a simple limiter. The clip level of the example is set to 500 mV, which results in a clipping rate of 50%. The signal traces correspond to a channel having the channel impulse response (CIR) described earlier in connection with  FIG. 2 . 
     Without clipping, the received worst-case ISI signal trace (described earlier in connection with Equation 4 and Equation 5) produces an eye opening of only 34.2 mV. When the linear equalizer is applied to the non-clipped signal  302 , the eye opening of the equalized signal  306  is improved to 346.1 mV. 
     When clipping is applied to the received signal  304  at 500 mV and above, the eye opening of the equalized signal  308  is only 222.0 mV (obtained via Equation 5). In other words, there is a loss of 124.1 mV in the eye opening as a consequence of clipping. This scenario results in less immunity to noise and therefore increases the bit error rate (BER) of the receiver. 
     While the problems with clipping have been described in the context of a single tap post-cursor equalizer, similar problems exist with more complex equalizers and other types of non-linearities. Accordingly, the solutions to these problems are not limited to single tap post-cursor equalizers. Moreover, while described in the context of high-speed SerDes devices, the principles and advantages described herein are applicable to any communications or other system that employs similar DSP techniques and has a signal clipping problem. In addition, while illustrated in the context of clipped signals, the principles and advantages described herein are also applicable to other sources of non-linearities, such as compressed signals. 
     When a received signal is heavily clipped, such as clipping rates that can be well above 20%, the soft information that is needed for proper application of equalization in accordance with Equation 4 is destroyed. In that case, some way to retrieve the soft information to increase the reliability of the soft sample and consequently to reduce BER is desirable. The following observations should be noted in handling a clipped signal. 
     One observation is that the probability of making a bit error on a clipped sample itself is very low because the signal for the clipped sample is already strong enough to be significantly above the slicer threshold level of 0 V in NRZ signaling. Thus, the corruption of the clipped sample by adjacent ISI symbols is not a concern. Thus, the clipped samples themselves do not need to be equalized. 
     When a current sample is relatively low in magnitude and is thus not clipped, the sample can be corrupted by a significant amount of ISI. For example, the current sample can be very low in magnitude. In this case, the equalizer should be applied to increase the system immunity to wrong decisions. That is, the small ISI-corrupted sample should be pushed away from the slicer threshold level so that it is more resistant to noise. 
     When the previous sample had not been clipped, normal linear equalization can be applied to the current sample. By contrast, when the previous sample had been clipped, there is a loss in the eye opening for the current sample as discussed earlier in connection with  FIG. 3 . 
     One solution is to modify the behavior of the equalizer from that characterized by Equation 5 to that characterized by Equation 6 via a weighting factor w.
 
 y   —   nl   n   =x   n   +w·c   1 ·sign( x   n-1 )· nl _level
 
 nl _level=clip_level  Eq. 6
 
     Weighting factor w can be determined from the clipping conditions and it is bounded between the following limits: 
     
       
         
           
             
               
                 
                   
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     In Equation 7, num_ADC_bits represents a number of bits quantized by an analog-to-digital converter for the soft symbol samples and in Equations 6 and 7, clip_level represents a magnitude level wherein a soft symbol is clipped. 
     The choice of a value for the weighting factor w is critical for the overall performance as too small values do not improve the eye opening for the worst-case sequences, while too large values can cause an error in the sequences where the current sample is just below the clipping level, while the previous one was clipped. Furthermore, a large weighting factor w can severely destroy horizontal eye opening which is crucial for the jitter tolerance behavior. 
     Depending on the channel conditions and application, the weighting factor w can be easily determined in advance by adjusting the weighting factor w until the optimal performance is reached in means of the eye opening or bit error rate (BER). Then, the weighting factor w can be fixed for the particular application. Alternatively, the weighting factor w can be adapted during operation if, in the context of SerDes, monitoring of the eye opening is available. 
     Table 1 illustrates an example of behavior of an embodiment of a single tap post-cursor equalizer for non-linear signals. 
     
       
         
           
               
               
               
             
               
                 TABLE I 
               
               
                   
               
               
                 x n−1   
                 x n   
                 y n   
               
               
                   
               
             
            
               
                 don&#39;t care 
                 above non-linear threshold 
                 x n   
               
               
                 below non- 
                 below non-linear threshold 
                 x n  + c 1A x n−1   
               
               
                 linear threshold 
                   
                 (normal equalization Eq. 4) 
               
               
                 above non- 
                 below non-linear threshold 
                 x n  + w n  c 1B  sign(x n−1 ) ·  
               
               
                 linear threshold 
                   
                 nl_level 
               
               
                   
                   
                 (weighted equalization  
               
               
                   
                   
                 Eq. 6) 
               
               
                   
               
            
           
         
       
     
     For the case of simple limiter non-linearity, in Table 1 “above non-linear threshold” means that the signal is clipped, while “below non-linear threshold” means that it is not clipped. Although described for the case in which there are three distinct cases with respect to a hard non-linear threshold, the principle can be extended to more cases, and in the continuous as well as discrete domain. 
     As illustrated in Table 1, equalization is not applied when the current sample is clipped, but is applied in a normal way when both the current and the previous samples are not clipped. When the current sample is not clipped and the previous sample is clipped, equalization is applied with the weighted value of c 1B . 
     The two weight values c 1A  and c 1B  in the first approximation can be made equal to the linear MMSE solution determined from Equation 3. However, as each of them is applied to different portions of the transmitted sequence, their optimization can be done by using Equation 3 twice if the linear MMSE solutions that include information about two portions of data sequence can be obtained in advance. 
     An optimal linear MMSE equalizer with a limited number of taps includes all spectral characteristics in the data path. The process of data sub-selection for the application of equalization introduces data correlations that compensate different parts of the channel spectrum. In other words, two MMSE equalizers, each of which is applied to one of the sub-sequences (smaller subset than the whole sequence), perform better than a single MMSE equalizer that deals with the whole sequence at once. 
     The weighting factor w n  can be determined based on the clipping conditions. One way of making a decision on the amount of tap weighting to be used is to use a non-linear threshold (NLT) processing block that finds the number of previously clipped samples (or more generally, samples above a non-linear threshold) over time. For example, if only one previous sample is clipped, a weight w 1  may be used. While, for two previously clipped samples, a weight w 2  may be used, where 1&lt;=w 1 &lt;=w 2 &lt;=w_max. This may be further generalized for n previously clipped samples. 
     One embodiment of the NLT processing block that uses the non-linear threshold (NLT) indicator of the two previous samples is described by Table 2 and can be extended to more than two previous samples. Other types of NLT processors that determine the level of tap weighting are possible. 
     
       
         
           
               
             
               
                 TABLE 2 
               
             
            
               
                   
               
               
                 NLT Processor of the Equalizer for Non-linear Signals 
               
            
           
           
               
               
               
               
            
               
                 NLT_ 
                 NLT_ 
                 NLT_ 
                 Equalizer 
               
               
                 indicator −2   
                 indicator −1   
                 indicator 0   
                 Application 
               
               
                   
               
               
                 0 
                 0 
                 0 
                 normal equalization 
               
               
                 0 
                 0 
                 1 
                 disable 
               
               
                 0 
                 1 
                 0 
                 w 1  equalization 
               
               
                 0 
                 1 
                 1 
                 disable 
               
               
                 1 
                 0 
                 0 
                 normal equalization 
               
               
                 1 
                 0 
                 1 
                 disable 
               
               
                 1 
                 1 
                 0 
                 w 2  equalization 
               
               
                 1 
                 1 
                 1 
                 disable 
               
               
                   
               
            
           
         
       
     
     One implementation applied to high speed SerDes uses fixed taps obtained from the linear MMSE receiver with two stages of tap weighting equal to 1.1 and 1.2, respectively. 
     One embodiment of the invention uses a single tap post-cursor equalizer with 2 levels of tap weighting. However, the single tap pre-cursor equalizer or DFE may be modified to extend the technique to more taps. The disclosed technique is also not limited to the non-linearity caused by a simple limiter. The disclosed technique can be generalized to different types of non-linearities such as compression and others. In the case of compression, clip_level can be substituted with compr_level while clip_indicator can be substituted with compr_indicator. 
     In other words, start of compression point defines the range below which the equalizer application is bypassed whereas the compression indicator, in the same way as the clip indicator, determines when the weighted or linear equalizer is employed. Different ranges of tap weighting may be defined according to one or more different criteria such as clipping, compression and other non-linearities. In addition, the described method can be applied to other types of non-linearities. 
       FIG. 4  illustrates an equalizer  402  for non-linear signals with eye diagnostic monitoring. The embodiment illustrated in  FIG. 4  includes the equalizer  402 , an eye diagnostic or monitoring block  404 , and a non-linear threshold (NLT) processor  406 . The eye diagnostic or monitoring block  404  provides information to the NLT processor  406  to make a more intelligent decision about the tap weights. 
     The eye diagnostic block  404  captures information regarding signal transitions that are affected by equalizer operation. This information is passed to the NLT processor  406  which is then able to determine if the applied tap weights are appropriate by evaluating the horizontal or vertical eye opening and, if necessary, adapt them to achieve better performance. A one-dimensional optimization algorithm can be used to improve the eye by adjusting the weight w. The complexity of this solution is compensated by an increase in the flexibility and efficiency of the equalizer for non-linear signals. 
       FIG. 5  illustrates an embodiment of the invention implemented in a hardware integrated circuit, such as an application specific integrated circuit (ASIC), field programmable gate array (FPGA), or the like. The illustrated embodiment can be considered to be a pipelined architecture because each equalizer segment  506  of the DSP receiver  502  takes some outputs from the previous segments (signals x n , k An  and k Bn-1 , where n=0, . . . , 8 mod (6, 7, or 8) depending on the Add_Drop signal). In  FIG. 5 , x refers to the equalizer input samples and k corresponds to the NLT_indicator from Table 2, while A and B designate 1 and 2 symbols earlier in time, respectively, and n is a segment index corresponding to the symbol time. Notice also that k Bn =k An-1 . So, in normal operation, when there are no frequency offsets between the transmit and received data clocks, a serial input data stream is paralleled into 8 parallel streams which are then passed to 8 identical equalizer segments  506 . This means that n=0, . . . , 7. However, as will be explained later, 9 parallel streams are used in the illustrated embodiment. 
     In the equalization process, the input sample of segment 0 represents the previous input sample of segment 1, while the input sample of segment 1 represents the previous input sample of segment 2 and so on up to the last segment 7. The input sample x7 of segment 7 should be delayed by one symbol and passed to the next block of parallel data to be used as a previous input sample of segment 0. 
     The same process is applied to the clip output of NLT detector  520 , where NLT indicator (clip) for the input sample of segment 0 is passed to the segments 1 and 2 for which it represents the previous and the two previous symbols indicator (reference Table 2 that is implemented in the EQ Ctrl block  522  of each segment). Obviously, the NLT indicators of segment 0 are obtained from the previous block of parallel input data from segments 6 and 7. However, the illustrated embodiment assumes that the receiver is clocked with a free running clock that is close, but not identical to the transmit clock. 
     Since a frequency offset between those two clock signals can exist, it is possible for one bit to be dropped or to be duplicated depending on the direction of the frequency offset. To mitigate this problem, the data can be paralleled into 9 streams rather than the minimum 8 streams. During normal operation, the signal Add_Drop controls multiplexers  510 ,  512  and  514  so that the middle inputs kA7, kB7, and ×7, respectively, which correspond to the outputs of equalizer segment 7, are passed to equalizer segment 0. However, when a timing control block (not shown) determines the direction of the clock frequency offset and that a bit has been dropped or duplicated, it activates the signal ADD_DROP so that either the outputs of equalizer segment 6 or equalizer segment 8 are passed instead. It will be apparent that the amount of paralleling or pipelining can vary depending on the application. Such paralleling or pipelining reduces clock speeds. The illustrated embodiment uses 8 parallel equalizer slices. 
     In the illustrated embodiment, the input samples x are quantized to 5 bits, although they may alternatively be provided by one or more analog-to-digital converters with fewer bits (not shown), such as 3 or 4 bits. For example, [4:0] indicates 5 bits of data for a particular sample. 
     An equalizer tap computation block  504  generates tap values that correspond to the linear equalizer case and two weighted cases. The equalizer tap computation block  504  can be implemented in hardware and/or in software, including firmware. For example, a processor coupled to a memory can execute instructions to generate tap values. In one embodiment, for linear equalizer operation (not clipped or compressed), computation of the tap values is performed in accordance with Equation 3, and for non-linear equalizer operation, computation may be done using a known training sequence. After computation, the linear equalizer tap value c 1  can be fixed, the equalizer operates in data transmission mode, and the NLT indicator signal clip from one or more equalizer segments  506  is used to select the required tap weighting. The same tap values are provided to the multiplexers  508  of each of the equalizer segments  506 . The multiplexers  508  select which tap value is to be applied to a particular prior sample to perform equalization. Thus, for example, sample x[9:5] can be equalized by multiplying the prior sample x[4:0] with a selected tap value, which, in the illustrated example, can vary from 0, c 1  (normal equalization), and two weighted tap values equal to w 1 c 1  and w 2 c 1 . 
     The particular tap value to be selected by the multiplexer  508  is determined by the equalizer control block  522  of each segment  506 . For example, if the NLT indicator signal clip for the data sample x n  indicates that the magnitude is above the non-linear threshold, then equalization can be bypassed for the data sample by, for example, multiplying the prior sample x n-1  by a tap value of 0. 
     The particular tap value is selected depending on the NLT indicator status, which is then multiplied with the prior sample x n-1  and summed with the present sample x n  to generate an equalized sample y. The equalized sample y is then sliced by a slicer  518  to generate a hard decision for the sample, which is the output data. 
     Alternative embodiments can be developed both in software, firmware and/or hardware. For example, the context of a relatively slow communication system, such as a telephone modem, ISDN modem, DSL modem, cable modem, or the like, the digital signal processing techniques can be implemented for a communications receiver by firmware or software executed by a processor in real time. In one application, tap computation can be performed in software with varying degrees of hardware-assist. Yet, in other applications, one or more dedicated processors may be used to implement the tap computations. 
     The disclosed equalizer for non-linear signals offers a solution to the problem of reduced system performance when the received signal is severely distorted by non-linearities such as compression or in extreme cases, by heavy clipping. As a result, the disclosed equalizer enables flexible designs of low-cost digital SerDes that can be easily scaled in IC technologies of smaller dimensions. The disclosed techniques are also applicable to other areas of digital communications systems in which similar problems are encountered. 
     Various embodiments have been described above. Although described with reference to these specific embodiments, the descriptions are intended to be illustrative and are not intended to be limiting. Various modifications and applications may occur to those skilled in the art.