Patent Publication Number: US-2021193649-A1

Title: Electrostatic protection circuit and semiconductor device

Description:
RELATED APPLICATIONS 
     This application claims priority to Japanese Patent Application No. 2019-233133, filed on Dec. 24, 2019, the entire content of which is incorporated herein by reference. 
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an electrostatic protection circuit of a semiconductor device. 
     2. Description of the Related Art 
     A conventional electrostatic protection circuit of a semiconductor device includes a PNP transistor having an emitter terminal connected to a signal terminal and a collector terminal connected to a GND terminal. Even if the potential at a signal terminal drops under the potential of the GND terminal, no operational problem arises in the semiconductor device having the electrostatic protection circuit explained above (for example, see Japanese Patent Application Laid-Open No. 2000-223499). 
     As illustrated in  FIG. 6 , the base of an electrostatic protection PNP transistor (indicated by a solid line) of an electrostatic protection circuit  60  fabricated in a CMOS process is generally formed from an N-well. 
     The PNP transistor thus formed can be regarded as a series connection of a diode D 1  with a P-type region  61  as an anode and the N-well as a cathode, and a diode D 2  with a P-type region  62  as an anode and the N-well as a cathode. Further, the anode of the diode D 1 , the N-well, and the P-type substrate can be respectively regarded as the emitter, the base, and the collector of a parasitic PNP transistor (indicated by a dashed line). 
     Leak current of the diode D 2  flows through the diode D 1  at high temperature. The parasitic PNP transistor allows a collector current which is amplified from the leak current by the current amplification factor to flow. Since the collector current of the parasitic PNP transistor in the conventional electrostatic protection circuit, accordingly, flows from the signal terminal to the GND terminal at high temperature, the input current of the signal terminal increases. 
     SUMMARY OF THE INVENTION 
     It is an object of the present invention to provide an electrostatic protection circuit and a semiconductor device in which the amount of increase in input current of a signal terminal is small at high temperature. 
     An electrostatic protection circuit according to an embodiment of the present invention includes: a first diode whose anode is connected to a signal terminal; a second diode whose cathode is connected to a cathode of the first diode and whose anode is connected to a GND terminal; and a depletion type MOS transistor connected in parallel with the first diode. 
     Further, a semiconductor device according to an embodiment of the present invention includes the above electrostatic protection circuit between the signal terminal and an internal circuit. 
     According to the electrostatic protection circuit of the present invention, since the depletion type MOS transistor is provided in parallel with the first diode, there can be provided the electrostatic protection circuit and the semiconductor device in which the amount of increase in the input current of the signal terminal is small at high temperature. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a circuit diagram illustrating a semiconductor device including an electrostatic protection circuit according to a first embodiment. 
         FIG. 2  is a circuit diagram illustrating another example of an electrostatic protection circuit according to the first embodiment. 
         FIG. 3  is a circuit diagram illustrating a semiconductor device including an electrostatic protection circuit according to a second embodiment. 
         FIG. 4  is a circuit diagram illustrating another example of an electrostatic protection circuit according to the second embodiment. 
         FIG. 5  is a circuit diagram illustrating a still another example of an electrostatic protection circuit according to the first embodiment. 
         FIG. 6  is a sectional view of a semiconductor device including a conventional electrostatic protection circuit. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Embodiments of the present invention will be described below with reference to the accompanying drawings. 
     A semiconductor device according to the embodiments of the present invention includes a signal terminal which supplies and receives signals, an internal circuit connected to the signal terminal, and an electrostatic protection circuit provided between the signal terminal and the internal circuit. The detailed description of the internal circuit of the semiconductor device will be omitted. 
     First Embodiment 
       FIG. 1  is a circuit diagram illustrating a semiconductor device including an electrostatic protection circuit according to the first embodiment. 
     A semiconductor device  100  includes an electrostatic protection circuit  10  and an internal circuit  40 . The electrostatic protection circuit  10  includes diodes  11  and  12 , a depletion type p-channel MOS transistor (hereinafter pMOS transistor)  13 , and a resistor  14 . The resistor  14  is a gate protection resistor for protecting the gate of a transistor of the internal circuit  40 . 
     The diode  11  has an anode connected to a signal terminal and a cathode connected to the cathode of the diode  12 . The anode of the diode  12  is connected to a GND terminal. The pMOS transistor  13  has a drain connected to the internal circuit  40 , and gate, source, and bulk connected to the cathode of the diode  11 . The resistor  14  is connected between the anode of the diode  11  and the drain of the pMOS transistor  13 . 
     The operation of the electrostatic protection circuit  10  of the first embodiment will be described next. A parasitic PNP transistor is formed from the anode and cathode of the diode  11  and the P-type substrate in the electrostatic protection circuit  10  as in the conventional art. 
     &lt;Steady State in which Voltage at Signal Terminal is Higher than Voltage at GND Terminal&gt; 
     Though the gate and source of the pMOS transistor  13  are connected to each other, there is a channel between the drain and the source since the pMOS transistor  13  is depletion type. By the current supply capability of the pMOS transistor  13  which is sufficiently larger than the leak current flowing through the diode  12 , a voltage drop due to the on-resistance of the pMOS transistor  13  is close to 0 V. This causes most of the leak current of the diode  12  to flow through the pMOS transistor  13  and not to flow into the diode  11 . Since no current flows into the parasitic PNP transistor, the current flowing into the signal terminal accordingly can be made small. 
     &lt;Reverse Connection State in which Voltage at Signal Terminal is Lower than Voltage at GND Terminal&gt; 
     The pMOS transistor  13  operates as a constant current source with an overdrive voltage |VTPD| (threshold voltage). Although reverse current flows into the signal terminal from the GND terminal through the diode  12  and the pMOS transistor  13 , the reverse current can be reduced to a current admitted by the pMOS transistor  13 . There is thus no problem for the operation of the semiconductor device even in the reverse connection state even though the pMOS transistor  13  is connected in parallel with the diode  11 . 
     As described above, in the electrostatic protection circuit  10  according to the first embodiment, the amount of increase in the input current of the signal terminal can be reduced by the addition of the pMOS transistor  13  provided in parallel with the diode  11  since no current flows into the parasitic transistor at high temperature. 
       FIG. 2  is a circuit diagram illustrating another example of an electrostatic protection circuit according to the first embodiment. The same effect can also be obtained even by replacing the pMOS transistor  13  with a depletion type n-channel MOS transistor  23  connected as illustrated in  FIG. 2 . 
     Second Embodiment 
       FIG. 3  is a circuit diagram illustrating a semiconductor device including an electrostatic protection circuit according to the second embodiment. 
     An electrostatic protection circuit  20  of  FIG. 3  further includes a resistor  15  compared to the electrostatic protection circuit  10  of  FIG. 1 . The same components as those in the electrostatic protection circuit  10  illustrated in  FIG. 1  are given the same reference numerals to omit redundant description as appropriate. 
     &lt;Steady State in which Voltage at Signal Terminal is Higher than Voltage at GND Terminal&gt; 
     The resistor  15  is connected between the source of the pMOS transistor  13  and the cathode of the diode  12 . Since the resistance of the resistor  15  is set to be sufficiently small, the electrostatic protection circuit  20  can operate in the same manner as the electrostatic protection circuit  10  of  FIG. 1 . 
     &lt;Reverse Connection State in which Voltage at Signal Terminal is Lower than Voltage at GND Terminal&gt; 
     In the reverse connection state, the current flowing through the pMOS transistor  13  is approximately determined by |VTPD|/R. Here, R is the resistance of the resistor  15 . In other words, this current may be set to a current value acceptable as a reverse current, reducing the size of the pMOS transistor  13  more than that in the electrostatic protection circuit  10  of the first embodiment. 
     As described above, in the electrostatic protection circuit  20  of the embodiment, the amount of increase in the input current of the signal terminal can be reduced by the addition of the pMOS transistor  13  and the resistor  15   e  provided in parallel with the diode  11  since no current flows into the parasitic transistor at high temperature. 
       FIG. 4  is a circuit diagram illustrating another example of an electrostatic protection circuit according to the second embodiment. 
     The same effect can also be obtained by replacing the pMOS transistor  13  and the resistor  15  with a depletion type n-channel MOS transistor  23  and a resistor  25  connected as illustrated in  FIG. 4 . 
     While the embodiments of the present invention have been described, the present invention is not limited to the aforementioned embodiments, and various changes can be made without departing from the scope of the present invention. 
     For example, the diode  11  and the diode  12  may be replaced with electrostatic protection elements such as MOS transistors. As an example, an electrostatic protection circuit  30  in which the diodes in the electrostatic protection circuit  10  of  FIG. 1  are replaced with enhancement type n-channel MOS transistors  31 ,  32  is illustrated in  FIG. 5  which shows a still another example of an electrostatic protection circuit according to the first embodiment. 
     Further, for example, the resistor  14  may be connected between the drain of the pMOS transistor  13  (the source of the nMOS transistor  23 ) and the internal circuit  40 . In this case, for example, a resistor may be provided for protection between the connection point of the gate, source, and bulk of the pMOS transistor  13 , and the cathode of the diode  11  in series with the path through the drain of the pMOS transistor  13  (the source of the nMOS transistor  23 ) and the bulk.