Patent Publication Number: US-2007124643-A1

Title: Method, encoder and communication device for encoding parallel concatenated data

Description:
This invention relates to forward error correction coding schemes, and is particularly applicable in communication systems where reliable transmission of data is required to overcome errors introduced by noise or interference.  
      Forward error correction (FEC) schemes are widely used in communication systems to increase the reliability of information transmission. Some popular FEC codes are convolutional codes, turbo codes, Reed-Solomon codes, or low-density parity-check codes as known for instance from instance from S. Lin, D. J. Costello Jr., “Error Control Coding: Fundamentals and Applications”, Prentice-Hall 1983.  
      Forward error correction coding can be generally defined as a systematic scheme for the replacement of the original information symbol sequence by a sequence of code symbols, in such a way as to permit its reconstruction by a properly designed decoding scheme.  
      Usually a major division is between block coding and convolutional coding. In block coding, the information sequence is split into blocks of fixed length. Each of these blocks is then independently encoded using the block code, which usually is represented by a coding polynomial or coding matrix.  
      In contrast thereto, a convolutional code does not treat each code block independently, but adds dependence between successive blocks. Thus the current output block depends not only on information bits in the current input block, but also on those of one or more previous Input blocks.  
      Typically convolutional codes are realised by using a shift register mechanism. Graphically a convolutional code can be represented by a state transition diagram or a trellis.  
      While in theory it is possible to extend the dependencies into infinity, in communication systems it Is common practice to define a block length for convolutional codes as well.  
      This makes it possible to have a code structure which starts at the beginning of each block in a well-known state, and which ends at the end of each block in a well-known state, which is usually referred to as trellis termination. This will make the decoding scheme in the receiver more efficient.  
      To achieve a better protection of the information to be transmitted, several coding schemes can be employed simultaneously. This means that the information sequence is encoded several times, and the information sequence at the input of the encoders is identical. An obvious graphical representation is reminding of the parallel connection of electrical resistors to an electrical current, therefore such an approach Is often called parallel coding scheme.  
      In a simple form, a parallel coding scheme can consist of two identical encoders, for example convolutional encoders. Other forms can make use of two different encoders, such as a convolutional encoder and a block encoder.  
      A popular parallel coding scheme widely known as turbo coding is e.g. available from Heegard, Chris; Wicker, Stephen B., “Turbo coding” chapter 4, Kluwer Academic Publishers 1999, ISBN 0-7923-8378-8. Illustrated in exemplary form in  FIG. 5  is the structure of a prior art turbo encoder. Typically, two identical convolutional encoders with an additional interleaver are employed. The interleaver is used to de-correlate the input to the second encoder from the input of the first encoder.  
      A data source is generating an Information word which consists of k information bits forming a code block. The resulting code word consists of three elements: The systematic word, first parity, word and second parity word. The systematic word (length k bits) is identical to the information to be transmitted. The first parity information is generated employing a recursive systematic encoder (RSC). In the second encoder branch, an interleaver is employed to decorrelate the input sequences of both encoders. Both encoders use a generator polynomial to define the coding algorithm.  
      US 2003/0041293 A1 discloses methods to interleave a sequence of symbols. To this end the interleaver performs inter-block and intra-block permutations. Even though the sequence of symbols Is segmented into blocks, these blocks are used solely for the purpose of interleaving, but not for generating blocks that are independently encoded.  
      US 2002/0150167 A1 discloses a configurable encoder which may operate In any of a variety of forward error correction codes. In each mode a variety of encoding parameters may be configured.  
      In the prior art, measures have been proposed, such as adding redundancy or diversity to the transmit signal to increase the receiver&#39;s possibility to correctly decode the transmitted data.  
      The object of the present invention is to effectively exploit coding properties and to allow a simple but effective method to increase the protection of the transmitted information, especially in wireless communication systems with unreliable transmission due to noise or interference.  
      The present invention provides a method comprising the steps of claim  1  and is also directed to a correspondingly adapted encoder and communication device.  
      The general idea underlying the invention is to distribute the information word having a length into a plurality of subsets of information bits, each subset forming a code block segment, respectively. Then at least one of the code block segments is supplemented With information bits, which have also been distributed to at least one different code block segment. The result of that is that the sum of the lengths of the code block segments is larger than the total code block length. In this way, an information overlap is generated, where a part of the information at the input is propagated to at least two outputs. Hence, the sum of the Information bits over all subbranches at the output of the distributor is greater than the number of information bits at the input of the distributor.  
      According to a preferred embodiment, the distribution is done across a plurality of parallel coding subbranches and within each coding subbranch, a distinct error correction coding method can be employed. However, the distributor does not necessarily need to assign an identical number of information bits to the coding subbranches involved.  
      Hence, each of the subbranches can use distinct error correction coding methods and the block length within each subbranch can be distinct as well.  
      In order to realize time diversity, it may be necessary to buffer at least a portion of either the complete code block or one or more of the code block segments prior to encoding same.  
      Preferably, the encoding of the code block segments or code blocks is performed using different encoding methods, which furthermore increases the effectiveness in protecting the data bits.  
      According to a preferred embodiment of the invention, the distribution of the code blocks is performed into code block segments of equal length. This facilitates a simple encoding operation and increases the processing speed.  
      It further increases the performance of the encoding method, if the step of interleaving the information bits is performed in the coding branches or subbranches, preferably with different interleaving patterns.  
      According to further preferred embodiments of the invention, the distribution of the information bit sequence is performed either by periodically switching the input bit sequence to one of the subbranches and subsequently repeated to another subbranch or a transition/puncturing vector or matrix determines which bits are forwarded to which subbranches or removed. 
    
    
      The invention will become apparent from the following description of the preferred embodiments with reference to the accompanying drawings.  
       FIG. 1  shows a block diagram which illustrates the general idea of the present invention;  
       FIG. 2  is an embodiment of the invention illustrating Its application to a turbo encoder;  
       FIG. 3  shows an encoder according to the present invention with additional elements involved in the coding operation;  
       FIG. 4  gives an alternative embodiment of the present invention using identical coding methods within the subbranches of one coding branch;  
       FIG. 5  shows a prior art turbo encoder in simplified form. 
    
    
      The following is a definition of important terms, used in the context of the invention referring to  FIG. 1 .  
      Information Word or Information Bit Sequence  
      Block codes are defined in line with S. Lin, D. J. Costello Jr., “Error Control Coding: Fundamentals and Applications”, Prentice-Hall 1983, chapter 1.2. A message block is represented by the k-tuple u=(u 1 , u 2  . . . , U k ) called an information word or information bit sequence. For convolutional codes, we use a different definition. An information word is the k-tuple u=(u 1 , u 2  . . . , u k ), where the convolutional encoder memory is cleared before u 1  enters the encoder.  
      Coding Branch  
      Coding branch is defined by a branch where the full information word is available to subsequent entities.  
      Coding Subbranch  
      A coding subbranch is a portion of a coding branch, wherein only a subset of the information bits are available to the blocks within the coding subbranch.  
      Code Block  
      A code block is a logical unit of information symbols which are affected by a coding process.  
      Subset  
      A subset denotes a part of a set, where the empty set and the original set are by definiton also subsets of the original set.  
       FIG. 1  shows a block diagram of an encoder as comprised in a communication device of the present invention. At the input of the encoder, an information word having k bits is applied as a code block to two coding branches. In the first coding branch, a method I is used to obtain a code word  1  having a length of n 1  bits with n 1  being larger than k. Generally, the coding operation serves for adding redundancy In order to protect the information bits better against losses over the transmission path.  
      In the second branch, the k bits of the information word are distributed over two distinct subbranches, so t hat a first subset of the information bits (also referred to a s a code block segment) is encoded in the first subbranch using method  2   a  and a second subset of the information bits is encoded in the second subbranch using method  2   b . These bit subsets shall be fashioned in such a way that at least a part of the subsets carries identical information from the original information word, which will be referred to as “information overlap” in the following. For simplicity, it is assumed here that the code block segments in the subbranches are of equal length, which implies that k is an even number. The results of the encoding operation are two code words  2   a ,  2   b  having a length of n 2a  and n 2b  bits, respectively.  
      It is important to note that the information bit subsets are encoded separately and independently in each subbranch. In a simple implementation, the encoding method in the subbranches is identical, such that their generator polynomials are identical as well. The encoded bit sequences of each subbranch then constitute jointly a parity word which replaces the second parity word of the prior art encoder shown in  FIG. 5 .  
      The information overlap allows the designer of a communication system where the present invention is employed to specifically fine-tune the degree of FEC protection. Clearly the information overlap bits are better protected by FEC coding than other bits, which usually results in a better error resilience after properly decoding the Information. By choosing the length of the information overlap a communication system designer can directly influence the overall protection of an information word. By choosing which parts of an information word are part of the information overlap, a designer can influence which part of the information word benefits most from the FEC coding. This can be particularly applicable if it is known that a certain part of the information word has a higher priority than other parts with respect to the content that is delivered.  
      It should be obvious to those skilled in the art that the generated parity sequences can be further manipulated or assembled to obtain a complete code word for the information word. While those are necessary or desired operations, they are not required for explaining the present invention and are consequently not described in further detail.  
      The coding method does not need to be identical in all the coding branches or subbranches. The difference can be fundamental, such as convolutional code in one branch and block code in another. On the other hand there could also be differences within the same coding family, such as different generator polynomials in convolutional encoders In the branches, or for example a different coding matrix which Is used in different branches. The type or nature of the employed encoders in the branches Is not restricted by the present invention. As an example the encoders in  FIG. 1  labelled “Coding Method  1 ”, “Coding Method  2   a ” and “Coding Method  2   b ” can be chosen freely and independently within the limits imposed by the communication system design for which the present invention is used.  
       FIG. 2  shows an embodiment of the invention illustrating its application to a turbo encoder. As can be seen when comparing this figure with  FIG. 1 , the essential difference can be seen in the fact that the information word is directly provided as systematic word to be output. Further, parity word  1  is obtained by employing a recursive systematic encoder RSC, thereby constituting the coding branch having a parity word  1  at its output. The second coding branch is further divided into two coding subbranches to obtain a parity word  2   a  and parity  2   b , as explained above in connection with  FIG. 1 . When compared with  FIG. 5 , the prior art turbo encoder is modified in respect to the second encoder branch with the result that the two parity words  2   a  and  2   b  jointly constitute parity word  2 .  
      For improved performance, one or more optional interleavers may be introduced within a coding branch or subbranch, see  FIG. 3 . This can be necessary to further improve the properties and performance of the employed coding schemes.  
      Another embodiment not explicitly shown in  FIG. 3 , but is apparent to those skilled in the art, would be obtained by modifying the position of interleavers  2   a ,  2   b  by placing an interleaver  2  just prior to the separation unit.  
      For both embodiments, it has been proven that using a different interleaving pattern for either the different coding subbranches or between the coding branch at the coding subbranches improves the performance of the coding operation.  
      The distribution of the code block into two or more code block segments can be implemented in several forms. Simple forms Include a switch which periodically switches the Input to one or more of the subbranches, a transition vector or matrix which signifies which input bit shall be forwarded to which output or a puncturing vector or matrix for each subbranch that determines which bits can pass through and which bits are removed for that particular subbranch.  
      A further implementation is formed by a combination of a switch and a repeater. The switch periodically propagates an information bit to only one of the connected outputs. This is the data which is not part of the information overlap. The repeater propagates an information bit to multiple connected outputs. This is the data which is part of the information overlap.  
      It should be obvious to those skilled in the art that the information overlap can be designed for each branch independently, if multiple branches employ the method of the present invention. In other words the information overlap of a first coding branch can be different, partly equal, or equal to the information overlap of a second coding branch.  
      In case the encoding methods within subbranches of a branch are identical, an alternative layout is possible. An example is given in  FIG. 4 . Instead of distributing the information bit sequence into distinct parallel subbranches, it is distributed Into two or more segments, which are then individually encoded in a time diversity manner using the encoder method chosen for that branch.  
      In more detail, the information bits of the code block are used to form a systematic word and parity word  1  using a coding method  1  as explained above. Further, the original information word constituted by k bits is buffered and undergoes block segmentation using one of the methods described above. Hence, the code block is separated into two code block segments, each containing a segmented information word of k 2a  bits and k 2b  bits, respectively. Subsequently, by using coding method  2 , the first segment is encoded resulting in a first portion of the segmented parity word with n 2a  bits. This portion of the segmented parity word may be stored again In a buffer for later use. As the next step, a second segmented information word having k 2b  bits is encoded using the same coding method  2  to obtain the second portion of the parity word comprised by n 2b  bits. The two parity word segments may then be combined to form the complete parity word  2  having a length of n 2  bits.  
      It is dear to a person skilled in the art that other than the above described segmentation in two halves of substantially equal length can be chosen depending on the actual encoder design. In particular, a partitioning in more than two segments might be a favorable option.  
      Preferably the segmentation Is done such that the segments are of identical length. If this is not possible, then well-known techniques may be employed so that the resulting segments are of equal length. Possible solutions for this are zero-stuffing or partial repetition of the information bit sequence. Alternatively the segments may have different lengths provided that the length is not a criterion for the encoding scheme. For example in convolutional coding the block length is Irrelevant for the design of most encoders.  
      In case of convolutional coding for an encoder, some sort of trellis termination can be desirable. This means that certain bits are appended either to the encoder input or the encoder output, which makes the state of the encoder at the end of a codeblock to be independent of the information bit sequence which is encoded. Preferably this termination state is the all-zero state. Further details about termination can be found in S. Lin, D. J. Costello Jr., “Error Control Coding: Fundamentals and Applications”, Prentice-Hall 1983.  
      If so-called termination bits are appended, there are two options. Either termination bits are appended to the information bit sequence within the respective coding branch or subbranch only or termination bits are appended to the information bit sequence In several or all coding branches or subbranches. It should be obvious for those skilled in the art how either option can be implemented.  
      To facilitate efficient decoding methods, it can be desirable to include an error detection code, such as a cyclic redundancy checksum (CRC). Such a code can be freely inserted prior to either the distributor or the encoder in a branch or subbranch. In rare cases it might also be useful to attach an error detection code to the code word or parts of it, i.e. to systematic or parity words or subsets of these.  
      The embodiments explained above showed a case where there are two coding branches, and the second branch is further divided into two subbranches. However the present invention can be easily extended to a by theory unlimited number of branches as well as reduced to one branch which Is further divided into subbranches. It is also open how many and which of the branches should be further divided into subbranches.  
      Likewise the number of subbranches can be more than two, and can also be different In case several branches are divided into subbranches.  
      Puncturing or Repetition can be employed In several phases of the method of the present invention to improve the performance or make fine adjustments to the amount of coding protection which is desired in the system.  
      With reference to  FIG. 3 , it can be seen that firstly, the length of the information word which Is at the input of a coding branch can be adjusted by puncturing or repetition of bits. Preferably this is done prior to distribution of the information word Into coding subbranches. Alternatively such adjustments can also be implemented after distribution but prior to encoding. It should be apparent to those skilled in the art that both forms are equivalent in effect and can be transformed into each other.  
      Secondly, an adjustment is possible for the resultant code word. Preferably this is done after the systematic and parity parts have been joined together. Alternatively the adjustments can be done within each coding branch or subbranch after the encoding but prior to joining. Again those skilled in the art will recognise that these forms can be transformed into each other.  
      In the foregoing description and the drawings, the terms “Systematic” and “Parity” have been used along how they are usually referred to in public literature related to turbo coding. This has been done to keep the description of the invention simple and easy to follow.  
      However the present Invention can also be used in parallel coding schemes which do not make such a distinction between systematic and parity bits or words, but generally simply refer to code bits or words as illustrated and described above with reference to  FIG. 1 .