Patent Publication Number: US-11393856-B2

Title: Image sensing device

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This patent document claims the priority and benefits of Korean patent application No. 10-2018-0139605 filed on Nov. 14, 2018, which is hereby incorporated in its entirety by reference. 
     TECHNICAL FIELD 
     The technology and implementations disclosed in this patent document relate to an image sensing device. 
     BACKGROUND 
     An image sensing device is a device for capturing light from at least one optical image or objects using photosensitive semiconductors that react to light and converts the captured light into electrical signals. In recent times, with the development of automotive, medical, computer and communication industries, demand for high-speed, high-performance image sensors is rapidly increasing in various technical fields, for example, digital cameras, camcorders, personal communication systems (PCSs), game consoles, surveillance cameras, medical micro-cameras, robots, etc. 
     One very common type of image sensing device is a charge coupled device (CCD), which has dominated the field of image sensors for a long time. Another common type of image sensing device is a complementary metal oxide semiconductor (CMOS) image sensing device. Therefore, image sensing devices may be broadly classified into CCD-based image sensing devices and CMOS-based image sensing devices. The CMOS image sensing devices are now widely used because they can provide certain advantages over the CD counterparts, including, e.g., combining an analog control circuit and a digital control circuit onto a single integrated circuit (IC). 
     Cameras with image sensors such as CMOS image sensors can suffer from an image artifact resulting from flare effects. When light is incident upon a metal film such as a metal pad within the image sensing device, there is a possibility that such flare effects can be caused by light reflected from the metal film having a high light reflectivity. 
     Therefore, there is a need to minimize reflection of light incident upon the metal film. 
     SUMMARY 
     This patent document provides, among others, designs of an image sensing device that can minimize unwanted reflection of incident light, thereby improving image quality. 
     An embodiment of the present disclosure relates to an image sensing device having a structure that is capable of minimizing light reflected from a metal film in the structure. 
     In accordance with an aspect of the present disclosure, an image sensing device includes a semiconductor substrate, a pixel region formed at the semiconductor substrate to include photosensing pixels that convert light into pixel signals, an adjacent region formed at the semiconductor substrate adjacent to the pixel region and structured to include one or more grooves, a reflection prevention layer formed in the adjacent region over the semiconductor substrate to fill in the one or more grooves, the reflection prevention layer configured to reduce reflection of light incident thereon to reduce light from the adjacent region to the pixel region, and a metal layer formed in the adjacent region over the reflection prevention layer, and structured to include one or more through-holes spatially corresponding to the one or more grooves, respectively. 
     In accordance with another embodiment, an image sensing device includes a pixel region including a plurality of unit pixels structured to convert light into an electrical signal, a logic region including a plurality of logic circuits, each of which is in communication with one or more of the unit pixels to receive the electrical signal from the pixel region and perform signal processing of the received electrical signal, and a pad region including a pad configured to electrically couple the logic circuits to an external circuit. The pad includes at least one through-hole and a light absorption structure. The at least one through-hole is structured to provide a light reflection path to direct light to the light absorption structure and the light absorption structure is formed to absorb the light received through the at least one through-hole. 
     In another embodiment of the disclosed technology, an image sensing device includes a semiconductor substrate in which at least one groove is formed, a reflection prevention film formed over the semiconductor substrate in a manner that the at least one groove is buried by the reflection prevention film, and a metal film formed over the reflection prevention film, and provided with at least one through-hole corresponding to the at least one groove. 
     In another embodiment of the disclosed technology, an image sensing device includes a pixel region in which a plurality of unit pixels formed to convert light into an electrical signal is formed, a logic region in which a plurality of logic circuits, each of which receives the electrical signal from the pixel region and performs signal processing of the received electrical signal, is formed, and a pad region in which a pad configured to electrically couple the logic circuits to an external circuit is formed. The pad includes at least one through-hole, and the pad region includes a light absorption structure formed to absorb incident light received through the at least one through-hole. 
     In another embodiment of the disclosed technology, an image sensing device includes a semiconductor substrate, a pixel region formed on the semiconductor substrate to include photosensing pixels that convert light into pixel signals; an adjacent region formed on the semiconductor substrate adjacent to the pixel region and structured to include one or more grooves, a reflection prevention layer formed in the adjacent region over the semiconductor substrate to fill in the one or more grooves, the reflection prevention layer configured to reduce reflection of light incident thereon to reduce light from the adjacent region to the pixel region, and a metal layer formed in the adjacent region over the reflection prevention layer, and structured to include one or more through-holes spatially corresponding to the one or more grooves, respectively. 
     In another embodiment of the disclosed technology, A method of forming an image sensing device including a pad region in which pads are formed to electrically couple logic circuits of the image sensing device to an external circuit outside the image sensing device, includes providing a substrate, forming a plurality of grooves in the pad region on the substrate, forming a reflection prevention layer over the plurality of grooves including inside the plurality of grooves, forming a conductive layer over the reflection prevention layer, coating a photoresist on the conductive layer, patterning the photoresist to define a region in which one or more through-holes are to be formed, such that the one or more through-holes are aligned with one or more of the plurality of grooves, etching the conductive layer using the patterned photoresist covering the conductive layer, thereby exposing the reflection prevention layer through the one or more through-holes, and stripping the photoresist. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The above and other features and advantages of the disclosed technology will become readily apparent by reference to the following detailed description when considered in conjunction with the accompanying drawings wherein: 
         FIG. 1  illustrates an example of an image sensing device based on an embodiment of the disclosed technology; 
         FIG. 2  is a plan view illustrating an example of a light absorption structure and a pad based on an embodiment of the disclosed technology; 
         FIG. 3  is a cross-sectional view illustrating an example of the light absorption structure and the pad taken along the line A-A′ shown in  FIG. 2 ; 
         FIG. 4  illustrates an example path of light incident upon a pad shown in  FIG. 3 . 
         FIGS. 5 to 8  illustrate processes for forming the structures shown in  FIGS. 2 and 3 ; and 
         FIG. 9  illustrates an example of a light absorption structure based on another embodiment of the disclosed technology. 
     
    
    
     DESCRIPTION OF EMBODIMENTS 
       FIG. 1  illustrates an example of an image sensing device based on an embodiment of the disclosed technology. 
     Referring to  FIG. 1 , the image sensing device may include a pixel region PX, a logic region (or logic area) LA, and a pad region (or pad area) PA. 
     The pixel region PX may be located at an area that can receive light including, for example, the center of the image sensing device, and may include a plurality of unit pixels. The unit pixels may convert light into electrical signals, and may be arranged in a two-dimensional (2D) matrix form. The unit pixels may include photoelectric conversion elements (e.g., photodiodes), color filters, micro-lenses, and pixel transistors. In an implementation of the disclosed technology where the photoelectric conversion elements is formed in a semiconductor substrate, the color filters and the micro-lenses may be formed over a first surface of the semiconductor substrate, and the pixel transistors may be formed over a second surface arranged to face against the first surface of the semiconductor substrate. 
     The logic region LA may be located near the pixel region PX to make it easier to receive the electrical signals converted from the light incident on the pixel region PX. For example, the logic region LA may be located outside the pixel region PX. The logic region LA may include a plurality of logic circuits to receive electrical signals from the pixel region PX and process the received electrical signal. This logic region LA may include various logic circuits, for example, a correlated double sampler (CDS), an analog-to-digital converter (ADC), a ramp signal generator, and an image processor. The pad region PA may be located near the logic region LA so that the logic region LA can communicate with external devices via the pad region PA. For example, the pad region PA may be located outside the logic region LA, and may include a plurality of pads  20  to electrically couple the logic circuits of the logic region LA to an external circuit. Each pad  20  may include a metal film, and the metal film may be formed either as a single metal film or as a stacked structure of different metal films. For example, each pad may be formed of aluminum (Al) or may be formed as a stacked structure of aluminum (Al) and tungsten (W). 
     The presence of the pad region PA near the pixel region PX may cause undesired scattering or reflection of incident light in the pad region PA to be directed to the pixel region PA so that the presence of such scattered or reflected light from the pad region PA can adversely impact the imaging detection by the pixel region PA. For example, such scattered or reflected light from the pad region PA may appear as a flare that degrades the imaging detection. To reduce this undesired scattering or reflection of incident light in the pad region PA, the disclosed technology provides structures in the pad region PA to absorb incident light in the pad region PA. In an embodiment of the disclosed technology, each of the pads  20  may include a structure that can provide a light reflection path in a direction from outside the structure to inside the structure. For example, the pads  20  may include a structure including at least one through-hole. In addition, a light absorption structure  10  configured to absorb light received via through-holes of each pad  20  may be formed below the pads  20 . 
     Each pad  20  may be formed over the semiconductor substrate in a manner that some regions of the pad  20  may be coupled to a through substrate via (TSV). For example, one end of each pad  20  may be coupled to the TSV, and may be formed in a flat plate shape horizontally extending from the connection part coupled to the TSV. 
     Although  FIG. 1  illustrates an example implementation in which the pad region PA is located only at both sides of the pixel region PX for convenience of description, it should be noted that the pad region PA may also be arranged to surround the pixel region PX. 
       FIGS. 2 and 3  illustrate the light absorption structure  10  and the pad  20  formed in the pad region PA shown in  FIG. 1 . Specifically,  FIG. 2  is a plan view illustrating an example of the light absorption structure  10  and the pad  20 , and  FIG. 3  is a cross-sectional view illustrating the light absorption structure  10  and the pad  20  taken along the line A-A′ shown in  FIG. 2 . Here, the pad region OA may include the light absorption structure  10  and the pad  20  formed over the light absorption structure  10 . 
     The light absorption structure  10  may include a semiconductor substrate  12  in which a plurality of grooves  14  is formed in an array, and a reflection prevention layer  16  formed over the semiconductor substrate  12  in a manner that the reflection prevention layer  16  is buried in the plurality of grooves  14 . 
     The grooves  14  may be formed by etching the semiconductor substrate  12  to a predetermined depth. In forming the grooves on the semiconductor substrate  12 , any etching techniques including wet etching or dry etching can be used. In an embodiment of the disclosed technology, each groove  14  may be formed in a manner that an upper cross-sectional area (e.g., upper portions in a cross-sectional view in  FIG. 3 ) of each groove  14  is larger in size than a lower cross-sectional area (e.g., lower portions in a cross-sectional view in  FIG. 3 , including a bottom surface of each groove) of each groove  14 . That is, each of the grooves  14  may be formed to taper towards the bottom surface in a manner that a horizontal cross-sectional area of each groove  14  gradually decreases in size in a downward direction (i.e., in proportion to a gradually decreasing height). 
     The grooves  14  may be formed to vertically overlap the through-holes  26  formed in each pad  20 . The grooves  14  may be identical or similar in shape to the through-holes  26 . For example, each of the grooves  14  may be formed in a manner that a horizontal cross-sectional area of each groove  14  is formed in a circular shape, an oval shape, or any other suitable shape. That is, the grooves  14  may be patterned along with the through-holes  26  within the semiconductor substrate  12  of the pad region PA. In this case, the grooves  14  and the through-holes  26  may be patterned to have the same or similar shapes at the same planar positions when viewed from above. 
       FIG. 2  illustrates the bottom region of each groove  14  smaller in size than a bottom region of each through-hole  26  by way of example and not by limitation. Thus, for example, the bottom region of each groove  14  may be identical to or larger than the bottom region of each through-hole  26  in terms of their size. 
     The reflection prevention layer  16  may be used to absorb light received through through-holes  26  of each pad  20 , and may be formed between the semiconductor substrate  12  and each pad  20  in a manner that a material capable of sufficiently absorbing light is buried in each groove  14  formed between the semiconductor substrate  12  and each pad  20 . A top surface of the reflection prevention layer  16  is planarized such that the reflection prevention layer  16  may be used as a planarization film. The reflection prevention layer  16  may be formed to extend not only to the pixel region PX but also to the logic region LA. The reflection prevention film  16  may include silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiOxNy), or any two or more of silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiOxNy) with or without others. For example, the reflection prevention layer  16  may be formed as a monolayer structure formed of only one material, or may be formed as a multilayer structure in which different materials are stacked. 
     The pads  20  may be formed over the reflection prevention layer  16 , and may include a conductive film in which the plurality of through-holes  26  is formed. In this case, each of the through-holes  26  may be formed in a manner that an upper cross-sectional area (i.e., upper portions in a cross-sectional view in  FIG. 3 ) of each through-hole  26  is larger in size than a lower cross-sectional area of each through-hole  26 . That is, each of the through-holes  26  may be formed to taper towards the lower portions thereof in a manner that a horizontal cross-sectional area of each through-hole  26  gradually decreases in size in a downward direction (i.e., in proportion to a gradually decreasing height) in the same manner as in the grooves  14 . 
     The through-holes  26  may be formed to vertically overlap the grooves  14  formed in the semiconductor substrate  14 . For example, the through-holes  26  and the grooves  14  may be arranged in a manner that a center point of each through-hole  26  is located at the same vertical line as a center point of a groove  14  to be aligned with through-hole  26 . 
     The pad  20  may include at least one metal film pattern  22  and  24 . For example, the pad  20  may include a stacked structure of a tungsten (W) film pattern  22  and the aluminum (Al) film pattern  24 . In some embodiments of the disclosed technology, the tungsten (W) film pattern  22  may be formed in parallel with the formation of other layers. For example, the fabrication process of the image sensing device may include forming a through silicon via (TSV) and/or a shielding film for shielding the logic region LA from incident light. In this case, the tungsten (W) film pattern  22  may be formed simultaneously with the formation of the TSV and/or the shielding film. 
     By the way of example and not by limitation,  FIG. 2  illustrates through-holes  26  formed over the entirety of the pads  20 . Thus, the through-holes  26  may be formed only at some regions of each pad  20 . For example, in an example implementation where some of the plurality of pads  20  or some portions of each pad  20  are coupled to the TSV, through-holes  26  may be formed in the remaining regions other than those pads or those portions that are connected to the TSV. 
       FIG. 4  illustrates an example path of light incident upon the pad shown in  FIG. 3 . 
     Referring to  FIG. 4 , through-holes  26  may be formed in the pads  20 , such that most light incident upon the pads  20  may arrive at the reflection prevention layer  16  through the through-holes  26  without being reflected to outside the pads  20 . In this case, the reflection prevention layer  16  may be located below the pads  20 . Moreover, the plurality of grooves  14 , each of which is formed by etching the semiconductor substrate  12  to a predetermined depth, may be formed below the through-holes  26 , and the reflection prevention film  16 , which is thick enough to prevent a light reflection is buried in the groove  14 , such that light having passed through the through-holes  26  and arrived at the reflection prevention layer  16  formed in the grooves  14  can be absorbed by the reflection prevention layer  16 . 
     In conclusion, light incident upon the pads  20  may be mostly absorbed into the reflection prevention layer  16 , such that the amount of light reflected from the pads  20  may be minimized. 
       FIGS. 5 to 8  illustrate processes for forming the structures shown in  FIGS. 2 and 3 . 
     Referring to  FIG. 5 , a plurality of grooves  14  arranged in an array may be formed in a region to include the pads  20  within the pad region PA of the semiconductor substrate  12 . 
     In some embodiments of the disclosed technology, the structures illustrated in  FIGS. 2 and 3  may be fabricated using a photolithography process. For example, a photoresist film is formed over the pad region PA of the semiconductor substrate  12 , and exposure and development processes are performed on the photoresist film, forming a photoresist pattern (not shown) defining a specific region in which the plurality of grooves  14  will be formed. In this case, the photoresist pattern may be patterned in a manner that groove patterns are arranged in an array. For example, the groove patterns may have a circular shape, an oval shape, or any other suitable shape. 
     Subsequently, the semiconductor substrate  12  of the pad region PA may be etched to a predetermined depth using the photoresist pattern as an etch mask, forming the plurality of grooves  14 . 
     Referring to  FIG. 6 , the reflection prevention layer  16  may be formed over the semiconductor substrate  12 . 
     For example, after a reflection prevention material is formed over the semiconductor substrate  12  in a manner that the reflection prevention material is buried in the grooves  14 , a top surface of the reflection prevention material may be planarized, resulting in formation of the reflection prevention layer  16 . The reflection prevention layer  16  may include silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiOxNy), or a combination thereof. 
     By the way of example and not by limitation,  FIG. 6  illustrates the reflection prevention film  16  formed only in the region in which the pads  20  are formed, and thus the reflection prevention layer  16  may also be formed to extend not only to the pixel region PX but also to the logic region LA as necessary. 
     Referring to  FIG. 7 , a metal layer to be used for such pad (hereinafter referred to as a pad metal layer) may be formed over the reflection prevention layer  16 . The metal layer to be used as the pad (i.e., the pad metal film) may be formed as a stacked structure of the tungsten (W) film  17  and the aluminum (Al) film  18 . For example, the tungsten film  17  may be deposited over the reflection prevention layer  16 , and the aluminum film  18  may be deposited over the tungsten film  17 , resulting in formation of the pad metal film. The fabrication process of the image sensing device based on some embodiments of the disclosed technology may include forming a TSV and/or a shielding film for shielding the logic region LA from incident light. In this case, the tungsten film  17  may be formed simultaneously with the formation of the TSV and/or the shielding film. 
     Subsequently, a photoresist film is formed over the aluminum (Al) film  18 , and then the photoresist film is processed by exposure and development, such that a photoresist pattern  19  defining a specific region in which the plurality of through-holes  26  will be formed. For example, the photoresist pattern  19  may include a plurality of through-hole patterns arranged in an array. The through-hole patterns may be arranged to be aligned with the grooves  14  formed in the semiconductor substrate  12 . In this case, the through-hole patterns may be formed in a manner that a center point of each through-hole pattern is located at the same vertical line as a center point of each groove  14  formed in the semiconductor substrate  12 . 
     Referring to  FIG. 8 , the aluminum film  18  and the tungsten film  17  are sequentially etched, using the photoresist pattern  19  as an etch mask, until the reflection prevention layer  16  is exposed, forming a plurality of pad structures, each including the aluminum film pattern  24  and the tungsten film pattern  22 , with the through-holes  26  being formed in the pad structure. 
       FIG. 9  illustrates an example of a light absorption structure based on another embodiment of the disclosed technology. 
     In the above-mentioned embodiment, the grooves  14  are not formed under the through-holes  26  that are partially formed as illustrated at the right-hand side and the left-hand side of the vertical cross-sectional view of  FIG. 8 . 
     In contrast, as shown in  FIG. 9 , grooves  14  may be formed in a manner that the reflection prevention layer  16  having a large thickness can also be formed under such partially formed through-holes. In other words, the grooves  14  of the light absorption structure may be formed under all the through-holes  26  on a one to one basis. 
     In some embodiments of the disclosed technology, a method of forming an image sensing device including a pad region in which pads are formed to electrically couple logic circuits of the image sensing device to an external circuit outside the image sensing device, includes providing a substrate, forming a plurality of grooves in the pad region on the substrate, forming a reflection prevention layer over the plurality of grooves including inside the plurality of grooves, forming a conductive layer over the reflection prevention layer, coating a photoresist on the conductive layer, patterning the photoresist to define a region in which one or more through-holes are to be formed, such that the one or more through-holes are aligned with one or more of the plurality of grooves, etching the conductive layer using the patterned photoresist covering the conductive layer, thereby exposing the reflection prevention layer through the one or more through-holes, and stripping the photoresist. 
     Here, forming the plurality of grooves in the pad region includes coating a photoresist on the substrate, patterning the photoresist to define a region in which the plurality of grooves is to be formed, and etching the substrate using the patterned photoresist covering the substrate. The conductive layer includes aluminum (Al) or tungsten (W) or a combination of aluminum (Al) and tungsten (W) with or without others. The reflection prevention layer includes silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiOxNy), or any two or more of silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiOxNy) with or without others. Each through-hole is formed to taper towards the exposed reflection prevention layer to provide a light reflection path to direct light to the reflection prevention layer. 
     As is apparent from the above description, the image sensing device implemented based on various embodiments of the disclosed technology may allow most of light incident upon the metal film to be absorbed by a reflection prevention layer without being reflected from the metal film to outside the pads, thereby reducing/minimizing flare effects that can be caused by light reflected from the metal film. 
     Only a few implementations and examples are described for the disclosed technology. Other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.