Patent Publication Number: US-9425613-B2

Title: Current limiting circuit

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a current limiting circuit, and especially relates to a current limiting circuit having a metal-oxide-semiconductor filed-effect transistor (MOSFET) for reducing power loss. 
     2. Description of the Related Art 
     With reference to  FIG. 3 , a conventional current limiting circuit has an input positive terminal I/P 4 , an input negative terminal I/P 5 , an output positive terminal O/P 4 , an output negative terminal O/P 5 , a MOSFET Q 4 , a current limiting resistor R limit , an error amplifier  50 , and a PNP common collector amplifier  60 . A drain of the MOSFET Q 4  is electronically connected to the input positive terminal I/P 4 , a source of the MOSFET Q 4  is electronically connected through the current limiting resistor R limit  to be grounded, and a gate of the MOSFET Q 4  is electronically connected to an output terminal O/P 6  of the PNP common collector amplifier  60 . The error amplifier  50  has a positive input, a negative input, and an output. A voltage dividing circuit  51  is electronically connected between a reference voltage source V ref  and the output negative terminal O/P 5 , and has a first resistor R 4  and a second resistor R 5 . The first resistor R 4  and the second resistor R 5  are electronically connected in series, and a node between the first resistor R 4  and the second resistor R 5  is electronically connected to the positive input of the error amplifier  50 . The negative input of the error amplifier  50  is grounded, and the output of the error amplifier  50  is electronically connected to an input terminal I/P 6  of the PNP common collector amplifier  60 . The input negative terminal I/P 5  is electronically connected to the output negative terminal O/P 5 , and the output positive terminal O/P 4  is grounded. 
     When the conventional current limiting circuit is operated, the input positive terminal I/P 4  and the input negative terminal I/P 5  are connected to a power source  30 , and the output positive terminal O/P 4  and the output negative terminal O/P 5  are connected to a load  40 . A drain current of the MOSFET Q 4  is controlled by a gate voltage of the MOSFET Q 4 . The gate voltage of the MOSFET Q 4  is an output voltage of the PNP common collector amplifier  60 , and an input voltage of the PNP common collector amplifier  60  is an output voltage of the error amplifier  50 . The drain current of the MOSFET Q 4  flows through the current limiting resistor R limit  and the load  40 . 
     When the drain current of the MOSFET Q 4  suddenly rises up, a voltage through the current limiting resistor R limit  also rises up. One end of the current limiting resistor R limit  is grounded, and the other end of the current limiting resistor R limit  is electronically connected to the source of the MOSFET Q 4 . Further, a voltage of the source of the MOSFET Q 4  also rises up, but the rising drain current of the MOSFET Q 4  does not cause the voltage of the gate of the MOSFET Q 4  to rise up. Then, a gate-to-source voltage of the MOSFET Q 4  decreases. A maximum of the drain current is limited by the gate-to-source voltage of the MOSFET Q 4 . When the gate-to-source voltage of the MOSFET Q 4  decreases, the maximum of the drain current also decreases. Therefore, the maximum of the drain current of the MOSFET Q 4  can be decreased by the current limiting resistor R limit . Then the limited drain current of the MOSFET Q 4  can protect the MOSFET Q 4  from damages when the drain current of the MOSFET Q 4  suddenly rises up. 
     The current limiting resistor R limit  is mounted on a power transmission route of the conventional current limiting circuit. When the conventional current limiting circuit is in normal use, the current limiting resistor R limit  has the drain current flowing through, and causes power consumption. Therefore, the conventional current limiting circuit needs to be further improved for reducing the power consumption under normal use. 
     SUMMARY OF THE INVENTION 
     An objective of the present invention is to provide a current limiting circuit having no current limiting resistor mounted on a power transmission route, and the current limiting circuit can limit a maximum of a drain current of the MOSFET. 
     To achieve the foregoing objective, the current limiting circuit is mounted between a power source and a load, and has an input positive terminal, an input negative terminal, an output positive terminal, an output negative terminal, a MOSFET, a voltage dividing circuit, a first amplifier, a voltage-limiting circuit, and a first transistor. 
     The input positive terminal and the input negative terminal are adapted to be electronically connected to the power source, and the output positive terminal and the output negative terminal are adapted to be electronically connected to the load. 
     The MOSFET has a drain, a source, and a gate. The drain is electronically connected to the input positive terminal, and the source is grounded and electronically connected to the output positive terminal. The input negative terminal is electronically connected to the output negative terminal. 
     The voltage dividing circuit is electronically connected between a reference voltage source and the output negative terminal, and comprises a first resistor and a second resistor. The first resistor and the second resistor are electronically connected in series. The first operational amplifier comprises a first positive input, a first negative input, and a first output. The first positive input is electronically connected to a node between the first resistor and the second resistor, and the first negative input is grounded. 
     The voltage-limiting circuit has a fixed-current output, and the fixed-current output is electronically connected to the gate of the MOSFET. The first transistor comprises an emitter, a base, and a collector. The emitter is electronically connected to the gate of the MOSFET, the base is electronically connected to the first output of the first amplifier, and the collector is grounded. 
     The current limiting circuit limits a maximum voltage of the gate of the MOSFET by the voltage-limiting circuit, and then limits the maximum of the drain current of the MOSFET. The fixed-current output of the voltage-limiting circuit outputs a fixed current to the emitter of the first transistor for fixing a voltage of the emitter of the first transistor, and the voltage of the gate of the MOSFET can be limited. Then, a gate-to-source voltage of the MOSFET is limited, and the maximum of the drain current of the MOSFET is limited to protect the MOSFET. The current limiting circuit has no current limiting resistor mounted on the power transmission route, and therefore power consumption under normal use can be reduced. 
     Other objectives, advantages and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is an electronic circuit diagram of an embodiment of the present invention; 
         FIG. 2  is a curve chart of a gate-to-source voltage and a maximum drain current of a MOSFET; 
         FIG. 3  is an electronic circuit diagram of a conventional current limiting circuit. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     With reference to  FIG. 1 , the present invention is a current limiting circuit, and the current limiting circuit has an input positive terminal I/P 1 , an input negative terminal I/P 2 , a MOSFET Q 1 , a first operational amplifier  10 , a voltage dividing circuit  11 , a voltage-limiting circuit  20 , a first transistor Q 2 , an output positive terminal O/P 1 , and an output negative terminal O/P 2 . 
     The MOSFET Q 1  has a drain, a source, and a gate. The drain is electronically connected to the input positive terminal I/P 1 , and the source is grounded and electronically connected to the output positive terminal O/P 1 . The input negative terminal I/P 2  is electronically connected to the output negative terminal O/P 2 . 
     The voltage dividing circuit  11  is electronically connected between a reference voltage source V ref  and the output negative terminal O/P 2 , and comprises a first resistor R 1  and a second resistor R 2 . The first resistor R 1  and the second resistor R 2  are electronically connected in series. 
     The first operational amplifier  10  comprises a first positive input, a first negative input, and a first output. The first positive input is electronically connected to a node between the first resistor R 1  and the second resistor R 2 , and the first negative input is grounded. 
     The voltage-limiting circuit  20  has a fixed-current output O/P 3 , and the fixed-current output O/P 3  is electronically connected to the gate of the MOSFET Q 1 . 
     The first transistor Q 2  comprises an emitter, a base, and a collector. The emitter is electronically connected to the gate of the MOSFET Q 1  and the fixed-current output O/P 3  of the voltage-limiting circuit  20 , and the base is electronically connected to the first output of the first operational amplifier  10 , and the collector is grounded. 
     When the current limiting circuit is operated, the input positive terminal I/P 1  and the input negative terminal I/P 2  are electronically connected to a power source  30  for receiving power, and the output positive terminal O/P 1  and the output negative terminal O/P 2  are electronically connected to a load  40  for providing the load  40  with the electrical power. 
     Further with reference to  FIG. 2 , according to a characteristic of the MOSFET Q 1 , when a gate-to-source voltage (V GS ) of the MOSFET Q 1  exceeds a threshold voltage and is fixed, a maximum of a drain current I D  of the MOSFET Q 1  is also limited at a fixed value. The fixed value of the maximum of the drain current I D  is determined by a manufacturing procedure of the MOSFET Q 1  and an ambient temperature (T J ). For example, when the ambient temperature (T J ) is 25° C. and the gate-to-source voltage (V GS ) is 4 volts, the maximum of the drain current is limited at 9 amperes. The source of the MOSFET Q 1  is grounded, and the voltage of the gate of the MOSFET Q 1  is limited by the voltage-limiting circuit  20 . Then, a gate-to-source voltage of the MOSFET is fixed. Therefore, the drain current can be limited under the maximum of the drain current to protect the MOSFET Q 1  from being overloaded. 
     The current limiting circuit has no current limiting resistor provided at the power transmission route, and therefore power consumption under normal use can be reduced. In the embodiment, the current limiting circuit can be adapted to a low-dropout regulator to be an inner circuit of the low-dropout regulator. 
     Further, the voltage-limiting circuit  20  comprises a second operational amplifier  21  and a second transistor Q 3 . The second operational amplifier  21  has a second positive input, a second negative input, and a second output. The second transistor Q 3  has an emitter, a base, and a collector. 
     The second positive input of the second operational amplifier  21  receives a limiting voltage (V X ). The second negative input of the second operational amplifier  21  is electronically connected to the emitter of the second transistor Q 3 , and the second negative input of the second operational amplifier  21  is further electronically connected to receive a positive voltage (V P ) through a third resistor R 3 . The second output of the second operational amplifier  21  is electronically connected to the base of the second transistor Q 3 . 
     The collector of the second transistor Q 3  is electronically connected to the gate of the MOSFET Q 1  to be the fixed-current output O/P 3  of the voltage-limiting circuit  20 . In the embodiment, the first transistor Q 2  and the second transistor Q 3  are PNP transistors. 
     The current limiting circuit further comprises an output capacitor C. The output capacitor C is electronically connected between the output positive terminal O/P 1  and the output negative terminal O/P 2  to stabilize a voltage between the output positive terminal O/P 1  and the output negative terminal O/P 2 . 
     According to a characteristic of an imaginary short of an operational amplifier, a voltage of the positive input is equal to a voltage of the negative input. Therefore, a voltage of the second negative input of the second operational amplifier  21  is equal to the limiting voltage (V X ), and a voltage of the emitter of the second transistor Q 3  is also equal to the limiting voltage (V X ). Then, an emitter current I E  of the second transistor Q 3  can be determined by the Ohm&#39;s Law. 
     
       
         
           
             
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     When the positive voltage (V P ) and the limiting voltage (V X ) are fixed, the emitter current I E  is also fixed, and the fixed-current output O/P 3  of the voltage-limiting circuit  20  outputs a fixed current. 
     Because the voltage of the emitter of the second transistor Q 3  is equal to the limiting voltage (V X ), the voltage of the emitter of the first transistor Q 2  and the voltage of the gate of the MOSFET Q 1  are smaller than the limiting voltage V X . Further, the source of the MOSFET Q 1  is grounded, and the gate-to-source voltage (V GS ) is smaller than the limiting voltage (V X ). Therefore, the drain current of the MOSFET Q 1  can be limited when the gate-to-source voltage (V GS ) of the MOSFET is limited under the limiting voltage (V X ). 
     The voltage-limiting circuit  20  fixes the voltage of the gate of the MOSFET Q 1 , and then limits the maximum of the drain current of the MOSFET Q 1 . Therefore, the MOSFET Q 1  can be protected by the voltage-limiting circuit  20  from being overloaded. 
     Even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and function of the invention, the disclosure is illustrative only. Changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.