Patent Publication Number: US-2023163061-A1

Title: Semiconductor package

Description:
FIELD OF THE INVENTION 
     This invention relates to a semiconductor package, and more particularly to a semiconductor package with an improved reliability by helping a filling material to squeeze out air between chip and flexible substrate. 
     BACKGROUND OF THE INVENTION 
     In conventional technology, conductive pads are arranged around a chip&#39;s surface and the chip is electrically connected to a substrate by bumps disposed on the conductive pads. In order to enhance the bonding strength of the chip to the substrate and prevent oxidation of the bumps, an underfill is dispensed along the chip&#39;s edge to flow by capillarity and fill the space between the chip and the substrate. However, an area without bumps between the chip and the substrate may slow down the flow of the underfill, fail to squeeze out the air between the chip and the substrate and lead the air to be covered by the underfill between the chip and the substrate. Furthermore, the area without the bumps may cause uncontrollable deformation of the substrate, such as warpage. While the deformed substrate contacts the chip, the underfill may be blocked to cover the air between the chip and the substrate and reduce filling rate and package reliability. 
     SUMMARY 
     One object of the present invention is to provide a semiconductor package which has flow guiding strips disposed on a guiding area of a flexible substrate. Because of the flow guiding strips, a filling material flowing between a chip and the flexible substrate can squeeze out the air between the chip and the flexible substrate to improve reliability of the semiconductor package. 
     A semiconductor package of the present invention includes a chip, bumps and a flexible substrate. The chip includes conductive pads which are visible from the chip&#39;s first surface. A first area and a second area are defined on the first surface, the first area is located between an edge of the first surface and the second area, the conductive pads are arranged on the first area. The bumps are disposed on the conductive pads respectively. The flexible substrate includes conductive lines and flow guiding strips. A chip mounting area, a guiding area and a wire area are defined on a second surface of the flexible substrate, the guiding area is located inside the chip mounting area. Each of the conductive lines includes an inner lead and a wire which are connected with each other. Along a first direction, the inner lead is located on the chip mounting area, the wire is located on the wire area, and the flow guiding strips are located on the guiding area. The flow guiding strips are extended toward the inner lead of each of the conductive lines along the first direction and not connected to the conductive lines. A first guiding channel is located between the adjacent flow guiding strips along the first direction, a second guiding channel is located between the adjacent flow guiding strips along a second direction which intersects the first direction, and the second guiding channel is communicated with the first guiding channel. The chip is mounted on the chip mounting area and bonded to the inner lead of each of the conductive lines by the bumps, the first surface of the chip is faced toward the second surface of the flexible substrate. The second area is located above the guiding area, the flow guiding strips are located between the second area and the guiding area and provided to separate the first surface of the chip and the second surface of the flexible substrate. 
     Owing to the flow guiding strips disposed on the guiding area and the first and second guiding channels located between the adjacent flow guiding strips, the flowing filling material can squeeze out the air between the chip and the flexible substrate to increase filling rate of the filling material. 
    
    
     
       DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a cross-section view diagram illustrating a semiconductor package in accordance with one embodiment of the present invention. 
         FIG.  2    is a top view diagram illustrating a chip of a semiconductor package in accordance with one embodiment of the present invention. 
         FIG.  3    is a top view diagram illustrating a part of a flexible substrate of a semiconductor package in accordance with one embodiment of the present invention. 
         FIG.  4    is a top view diagram illustrating a part of a flexible substrate of a semiconductor package in accordance with another embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     With reference to  FIGS.  1  to  3   , a semiconductor package  100  in accordance with one embodiment of the present invention includes a chip  110 , a plurality of bumps  120 , a flexible substrate  130  and a filling material  140 . The chip  110  includes a first surface  111  and a plurality of conductive pads  112  which are visible from the first surface  111 . A first area  111   b  and a second area  111   c  are defined on the first surface  111 , the first area  111   b  is located between an edge  111   a  of the first surface  111  and the second area  111   c . The conductive pads  112  are located on the first area  111   b , and the bumps  120  are disposed on the conductive pads  112 , respectively. 
     With reference to  FIGS.  1  and  3   , the flexible substrate  130  includes a second surface  131 , a plurality of conductive lines  132  and a plurality of flow guiding strips  133 . A chip mounting area  131   a , a guiding area  131   b  and a wire area  131   c  are defined on the second surface  131 , the guiding area  131   b  is located inside the chip mounting area  131   a . Each of the conductive lines  132  includes an inner lead  132   a , a wire  132   b  and an outer lead (not shown), the inner lead  132   a  and the outer lead are respectively located on both ends of the wire  132   b  and connected to the wire  132   b . Preferably, the flexible substrate  130  further includes a soler resist layer  150  used to cover the second surface  131  of the flexible substrate  130  and the wire  132   b  of each of conductive lines  132 . The inner lead  132   a  and the outer lead of each of the conductive lines  132 , the guiding area  131   b  and the chip mounting area  131   a  on the second surface  131  of the flexible substrate  130  are not covered by the solder resist layer  150 . 
     With reference to  FIG.  3   , the guiding area  131   b  has a length L greater than or equal to 300 μm along a first direction Y and has a width W greater than or equal to 300 μm along a second direction X which intersects the first direction Y. Preferably the width W of the guiding area  131   b  is greater than 500 μm. 
     With reference to  FIGS.  1  and  3   , the inner leads  132   a  of the conductive lines  132  are located on the chip mounting area  131   a  and close to the guiding area  131   b , the wires  132   b  of the conductive lines  132  are located on the wire area  131   c , the flow guiding strips  133  are located on the guiding area  131   b  and extended toward the inner leads  132   a  of the conductive lines  132  along the first direction Y, but the flow guiding strips  133  are not connected to the conductive lines  132 . Preferably, there is a distance D between each of the flow guiding strips  133  and the inner lead  132   a  of each of the conductive lines  132 , the distance D is greater than or equal to 50 μm and is less than or equal to 100 μm along the first direction Y (50 μm≤D≤100 μm). In this embodiment, the flow guiding strips  133  and the conductive lines  132  are made of the same material owing to they are formed together after patterning a metal layer. In other embodiments, the flow guiding strips  133  and the solder resist layer  150  are made of the same material and formed by screen printing. 
     With reference to  FIG.  3   , each of the flow guiding strips  133  has a length L 3  greater than or equal to 100 μm and less than or equal to 300 μm along the first direction Y (100 μm≤L 3 ≤300 μm), and each of the flow guiding strips  133  has a width W 3  greater than or equal to 7 μm and less than or equal to 30 μm along the second direction X (7 μm≤W 3 ≤30 μm). Along the first direction Y, a first guiding channel R 1  exists between the two adjacent flow guiding strips  133  and it has a first width W 1  greater than or equal to 50 μm and less than or equal to 100 μm (50 μm≤W 1 ≤100 μm). And along the second direction X, a second guiding channel R 2  exists between the two adjacent flow guiding strips  133  and it has a second width W 2  greater than or equal to 100 μm and less than or equal to 500 μm (100 μm≤W 2 ≤500 μm). The second guiding channel R 2  is communicated with the first guiding channel R 1 . 
     With reference to  FIGS.  1  to  3   , the chip  110  is mounted on the chip mounting area  131   a  and its first surface  111  faces toward the second surface  131  of the flexible substrate  130 . The chip  110  is bonded to the inner leads  132   a  of the conductive lines  132  by the bumps  120 . After bonding, the second area  111   c  of the first surface  111  of the chip  110  is located above the guiding area  131   b  of the second surface  131  of the flexible substrate  130 , and the flow guiding strips  133  are located between the second area  111   c  and the guiding area  131   b . The flow guiding strips  133  are provided to separate the first surface  111  of the chip  110  and the second surface  131  of the flexible substrate  130 . In this embodiment, a gap G exists between the first surface  111  of the chip  110  and each of the flow guiding strips  133 . While dispensing the filling material  140  along the edge of the chip  110 , the filling material  140  can flow by capillarity to fill the space between the first surface  111  of the chip  110  and the second surface  131  of the flexible substrate  130 . The filling material  140  is guided by the flow guiding strips  133 , the first guiding channel R 1  and the second guiding channel R 2  to flow through the guiding area  131   b  and squeeze the air between the chip  110  and the flexible substrate  130  out of the chip mounting area  131   a . As a result, the filling material  140  can flow in the first guiding channel R 1 , the second guiding channel R 2  and the gap G smoothly to increase filling rate. 
     With reference to  FIG.  1   , while the flexible substrate  130  has a deformation due to material property or temperature variation, the flow guiding strips  133  on the flexible substrate  130  may contact the first surface  111  of the chip  110  so as to prevent the second surface  131  of the flexible substrate  130  from contacting the first surface  111  of the chip  110 , thus the flow of the filling material  140  between the chip  110  and the flexible substrate  130  will not be blocked. The filling material  140  can smoothly fill the space between the first surface  111  of the chip  110  and the second surface  131  of the flexible substrate  130 , squeeze out the air between the chip  110  and the flexible substrate  130  and fill in the first guiding channel R 1  and the second guiding channel R 2 , consequently, the reliability of the semiconductor package  100  can be improved. 
       FIG.  4    shows another embodiment of the present invention. In this embodiment, the flexible substrate  130  further includes at least one connective line  134  which is located on the chip mounting area  131   a , both ends  134   a  of the conductive line  134  are used to bridge two of the conductive lines  132 . The connective line  134  and the inner leads  132   a  of the conductive lines  132  surround the guiding area  131   b . While dispensing the filling material  140  along the edge of the chip  110 , the filling material  140  can flow by capillarity to fill the space between the first surface  111  of the chip  110  and the second surface  131  of the flexible substrate  130 . By the guiding of the flow guiding strips  133 , the first guiding channel R 1  and the second guiding channel R 2 , the filling material  140  can flow through the guiding area  131   b  to squeeze the air between the chip  110  and the flexible substrate  130  out of the chip mounting area  131   a , fill in the first guiding channel R 1  and the second guiding channel R 2  and cover the connective line  134  to enhance the reliability of the semiconductor package  100 . 
     Because of the flow guiding strips  133  and the first and second guiding channels R 1  and R 2  located between the two adjacent flow guiding strips  133 , the filling material  140  can squeeze out the air between the chip  110  and the flexible substrate  130  and smoothly fill the space between the chip  110  and the flexible substrate  130  to increase filling rate. Moreover, the flow guiding strips  133  are provided to separate the first surface  111  of the chip  110  and the second surface  131  of the flexible substrate  130  such that the contacting between the first surface  111  of the chip  110  and the second surface  131  of the flexible substrate  130  and the flow blocking of the fill material  140  between the chip  110  and the flexible substrate  130  are preventable. 
     While this invention has been particularly illustrated and described in detail with respect to the preferred embodiments thereof, it will be clearly understood by those skilled in the art that is not limited to the specific features shown and described and various modified and changed in form and details may be made without departing from the scope of the claims.