Patent Publication Number: US-9843358-B2

Title: Device, system, and method for communicating with a power inverter using power line communications

Description:
CROSS-REFERENCE TO RELATED U.S. PATENT APPLICATIONS 
     The present application is a continuation application of U.S. application Ser. No. 13/538,723, entitled “Device, System, and Method for Communicating with a Power Inverter Using Power Line Communications” by Philip Rothblum et al., which was filed on Jun. 29, 2012, the entirety of which is hereby incorporated by reference. 
    
    
     TECHNICAL FIELD 
     The present disclosure relates, generally, to power inverters for converting direct current (DC) power to alternating current (AC) power and, more particularly, to systems and methods for controlling and communicating with such power inverters. 
     BACKGROUND 
     Power inverters convert a DC input power to an AC output power. Some power inverters are configured to convert the DC input power to an AC output power suitable for supplying energy to an AC grid and, in some cases, an AC load coupled to the AC grid. One particular application for such power inverters is the conversion of DC power generated by an alternative energy source, such as photovoltaic cells (“PV cells” or “solar cells”), fuel cells, DC wind turbine, DC water turbine, and other DC power sources, to a single-phase AC power for delivery to the AC grid at the grid frequency. 
     In an effort to increase the amount of AC power generated, a large number of power inverters may be used in a single application to form an array of power inverters. In some implementations, each power inverter of the array is incorporated or otherwise associated with an alternative energy source (e.g., solar cell panel) to form an alternative energy source module such as a photovoltaic module. Such power inverters are generally referred to as “microinverters.” Communication with each power inverter used in the application is often desirable to, for example, monitor the health or energy output of the power inverters. In some applications, a power inverter controller or manager may be used to control and manage the array of inverters. 
     SUMMARY 
     According to on aspect, an inverter array controller for maintaining and communicating with an array of power inverters configured to convert direct current (DC) power generated by an alternative energy source to alternating current (AC) power may include a power line communication circuitry, a processing circuitry, and a memory device. The power line communication circuit may communicate with the array of power inverters over a power line connecting the inverter array controller to each of the power inverters of the array of power inverters. The memory device may have stored therein a plurality of instructions, which when executed by the processing circuitry, result in the inverter array controller transmitting, using the power line communication circuitry, a first message to a power inverter of the array of power inverters; determining whether a response was received from the power inverter; transmitting, in response to failing to receive the response from the power inverter, a relay message to another power inverter of the array of power inverters, the relay message including the first message and instructing the another inverter to transmit the first message to the power inverter; and receiving a response message, transmitted by the another power inverter, from the power inverter. 
     In some embodiments, the first message is a broadcast message to each power inverter of the array of power inverters that requests each power inverter to respond to the broadcast message. Additionally, in some embodiments, the plurality of instructions further result in the inverter array controller selecting the another power inverter to receive the relay message from the array of power inverters. In some embodiments, selecting the another power inverter may include selecting the another power inverter from the array of power inverters based on a signal characteristic of a communication received from the another power inverter. Additionally, in some embodiments, selecting the another power inverter from the array of power inverters based on signal characteristic of the communication received from the another power inverter in response to the test communication. In some embodiments, the signal characteristic may included, for example, a signal amplitude, a signal integrity, a signal-to-noise ratio, and/or a response time of the communication received from the another power inverter. 
     Additionally or alternatively, selecting the another power inverter may include identifying the power inverter that did not respond to the first message and selecting the another power inverter based on the identity of the power inverter. For example, in some embodiments, identifying the power inverter may include identifying the location of the power inverter, relative to the other power inverters, within the array of power inverters. Further in some embodiments, transmitting the relay message may include transmitting a first relay message it the another power inverter that instructs the another power inverter to echo the next received message and transmitting a second relay message, including the first message, to the another power inverter. 
     According to another aspect, a power inverter of an array of power configured to convert direct current (DC) power generated by an alternative energy source to alternating current (AC) power may include a power line communication circuitry, an inverter circuit to convert the DC power to the AC power, and an inverter controller to control operation of the inverter circuit. The power line communication circuit may communicate with an inverter array controller over a power line connecting the power inverter to the inverter array controller and other power inverters of the array of power inverters. The inverter controller may receive a message from the inverter array controller using the power line communication circuit, determine whether the message is a relay message, retransmit, in response to determining the message is a relay message, the relay message to a non-responsive power inverter of the array of power inverters that has not responded to a previous communication from the inverter array controller, and receive, in response to retransmitting the relay message, a response from the non-responsive power inverter; and transmit the response, using the power line communication circuit, to the inverter array controller. 
     In some embodiments, to determine whether the message received from the inverter array controller is a relay message may include to determine whether the message instructs the power inverter to transmit a message to the non-responsive power inverter. Additionally, in some embodiments, to retransmit the relay message comprises to identify the non-responsive power inverter as a function of the relay message. Further in some embodiments, to retransmit the relay message includes to extract a first message from the relay message, the first message having been previously sent by the inverter array controller and transmit the first message to the non-responsive power inverter. 
     In some embodiments, the relay message is a second relay message and the inverter controller is further to receive a first relay message from the inverter array controller that instructs the power inverter to echo the next received message from the inverter array controller and receive the second relay message from the inverter array controller. In such embodiments, to retransmit the relay message may include to retransmit, in response to receiving the first and second relay messages, the second relay message to the non-responsive power inverter of the array of power inverter. 
     According to a further aspect, a method for communicating with an array of power inverters configured to convert direct current (DC) power generated by an alternative energy source to alternating current (AC) power may include transmitting a first message to a power inverter of the array of power inverters; transmitting, in response to failing to receive a response from the power inverter, a relay message to another power inverter of the array of power inverters, the relay message including the first message and instructing the another inverter to transmit the first message to the power inverter; and receiving a response message, transmitted by the another power inverter, from the power inverter. In some embodiments, transmitting the first message and transmitting the relay message may include transmitting the first message and relay message using a power line communications protocol. Additionally, in some embodiments, transmitting the first message comprises transmitting a broadcast message to each power inverter of the array of power inverters that requests each power inverter to respond to the broadcast message. 
     In some embodiments, the method may further include selecting the another power inverter to receive the relay message from the array of power inverters. In such embodiment, selecting the another power inverter may include selecting the another power inverter from the array of power inverters based on a signal characteristic of a communication received from the another power inverter. For example, in some embodiments, selecting the another power inverter from the array of power inverters based on signal characteristic of the communication received from the another power inverter in response to the test communication. Additionally or alternatively, selecting the another power inverter may include identifying the power inverter that did not respond to the first message and selecting the another power inverter based on the identity of the power inverter. In such embodiments, identifying the power inverter may include identifying the location of the power inverter, relative to the other power inverters, within the array of power inverters. Further, in some embodiments, transmitting the relay message may include transmitting a first relay message to the another power inverter that instructs the another power inverter to echo the next received message and transmitting a second relay message, including the first message, to the another power inverter. 
     According to yet a further aspect, a method for handling communications in an array of power inverters may include determining, on a power inverter, whether a message received from a inverter array controller is a relay message; retransmitting, in response to determining the message is a relay message, the relay message to a non-responsive power inverter of the array of power inverters that has not responded to a previous communication from the inverter array controller; receiving, in response to retransmitting the relay message, a response from the non-responsive power inverter; and transmitting the response, from the power inverter, to the inverter array controller. In some embodiments, determining whether the message received from the inverter array controller is a relay message may include determining whether the message instructs the power inverter to transmit a message to the non-responsive power inverter. 
     In some embodiments, retransmitting the relay message may include identifying the non-responsive power inverter as a function of the relay message. For example, in some embodiments, retransmitting the relay message may include extracting a first message from the relay message, the first message having been previously sent by the inverter array controller and transmitting the first message to the non-responsive power inverter. Additionally, in some embodiment, the relay message may be embodied as a second relay message and the method may further include receiving, on the power inverter, a first relay message from the inverter array controller that instructs the power inverter to echo the next received message from the inverter array controller and receiving the second relay message from the inverter array controller. In such embodiments, retransmitting the relay message may include retransmitting, in response to receiving the first and second relay messages, the second relay message to the non-responsive power inverter of the array of power inverter. 
    
    
     
       DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a simplified block diagram of one embodiment of a photovoltaic system for generating alternative energy including an array of power inverters and an inverter array controller; 
         FIG. 2  is a simplified block diagram of the system of  FIG. 1  showing the interconnection of the array of power inverters and the inverter array controller to an AC grid; 
         FIG. 3  is a simplified electrical schematic of one embodiment of an equivalent circuit of the array of power inverters of  FIG. 2 ; 
         FIG. 4  is a simplified graph of one embodiment of power inverter communications that can occur in the system of  FIGS. 1-3  and illustrates a normalized voltage level of the received communications by the inverter array controller verses the position of the communication-transmitting power inverter; 
         FIG. 5  is a simplified flow diagram of one embodiment of a method for communication with an array of power inverters that may be executed by the inverter array controller of  FIG. 1 ; 
         FIG. 6  is a simplified flow diagram of one embodiment of a method for determining a relay inverter of the array of power inverters that may be executed by the inverter array controller of  FIG. 1 ; and 
         FIG. 7  is a simplified flow diagram of one embodiment of a method to relay communications between the inverter array controller and at least one power inverter, which may be executed by a relay inverter of the array of power inverters. 
     
    
    
     DETAILED DESCRIPTION OF THE DRAWINGS 
     While the concepts of the present disclosure are susceptible to various modifications and alternative forms, specific exemplary embodiments thereof have been shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that there is no intent to limit the concepts of the present disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives consistent with the present disclosure and the appended claims. 
     In the following description, numerous specific details such as logic implementations, opcodes, means to specify operands, resource partitioning/sharing/duplication implementations, types and interrelationships of system components, and logic partitioning/integration choices are set forth in order to provide a more thorough understanding of the present disclosure. It will be appreciated, however, by one skilled in the art that embodiments of the disclosure may be practiced without such specific details. In other instances, control structures, gate level circuits and full software instruction sequences have not been shown in detail in order not to obscure the invention. Those of ordinary skill in the art, with the included descriptions, will be able to implement appropriate functionality without undue experimentation. 
     References in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described. 
     Embodiments of the invention may be implemented in hardware, firmware, software, or any combination thereof. Embodiments of the invention implemented in a computer system may include one or more bus-based interconnects between components and/or one or more point-to-point interconnects between components. Embodiments of the invention may also be implemented as instructions carried by or stored on a transitory or non-transitory machine-readable (e.g., computer-readable) medium, which may be read and executed by one or more processors. A machine-readable medium may be embodied as any device, mechanism, or physical structure for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium may be embodied as read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; mini- or micro-SD cards, memory sticks, electrical signals, and others. 
     In the drawings, specific arrangements or orderings of schematic elements, such as those representing devices, modules, instruction blocks and data elements, may be shown for ease of description. However, it should be understood by those skilled in the art that the specific ordering or arrangement of the schematic elements in the drawings is not meant to imply that a particular order or sequence of processing, or separation of processes, is required. Further, the inclusion of a schematic element in a drawing is not meant to imply that such element is required in all embodiments or that the features represented by such element may not be included in or combined with other elements in some embodiments. 
     In general, schematic elements used to represent instruction blocks may be implemented using any suitable form of machine-readable instruction, such as software or firmware applications, programs, functions, modules, routines, processes, procedures, plug-ins, applets, widgets, code fragments and/or others, and that each such instruction may be implemented using any suitable programming language, library, application programming interface (API), and/or other software development tools. For example, some embodiments may be implemented using Java, C++, and/or other programming languages. Similarly, schematic elements used to represent data or information may be implemented using any suitable electronic arrangement or structure, such as a register, data store, table, record, array, index, hash, map, tree, list, graph, file (of any file type), folder, directory, database, and/or others. 
     Further, in the drawings, where connecting elements, such as solid or dashed lines or arrows, are used to illustrate a connection, relationship or association between or among two or more other schematic elements, the absence of any such connecting elements is not meant to imply that no connection, relationship or association can exist. In other words, some connections, relationships or associations between elements may not be shown in the drawings so as not to obscure the disclosure. In addition, for ease of illustration, a single connecting element may be used to represent multiple connections, relationships or associations between elements. For example, where a connecting element represents a communication of signals, data or instructions, it should be understood by those skilled in the art that such element may represent one or multiple signal paths (e.g., a bus), as may be needed, to effect the communication. 
     Referring now to  FIG. 1 , in one embodiment, a system  100  for generating alternative energy includes an array  102  of alternative energy source module  104  and an inverter array controller  106  electrically coupled to each alternative energy source module  104  via an alternating current (“AC”) power line(s)  108 . The alternative energy source modules  104  are configured to convert direct current (“DC”) power from an alternative energy source to AC power, which may be supplied to an AC power grid  110  (and/or a load coupled to the grid  110 ) via the power line(s)  108 . In the illustrative embodiment, the alternative energy source modules  104  are embodied as photovoltaic modules configured to convert solar energy to AC power. However, in other embodiments, other types of alternative energy sources may be used such as, for example, fuel cells, DC wind turbines, DC water turbines, and/or other alternative energy sources. Additionally, although only two alternative energy source modules  104  are illustrated in  FIG. 1 , it should be appreciated that the array  102  may, and in many applications will, include a greater number of modules  104  as indicated by the ellipses in  FIG. 1 . For example, in some embodiments, the array  102  may include ten, fifty, one hundred, or more alternative energy source modules  104 . 
     The array  102  of alternative energy source modules  104  may be located remotely from the inverter array controller  106 . For example, each module of the array  102  may be located on a roof of a building or at a designated location (e.g., at a solar panel “farm”), while the inverter array controller  106  is located in a separate location. Additionally, the alternative energy source modules  104  may or may not be located near each other. For example, the array  102  may be embodied as a plurality of sub-arrays, each located apart from each other and having a plurality of alternative energy source modules  104 . Additionally, although a single AC power line  108  is illustrated as coupling the modules  104  to the controller  106  in  FIG. 1 , it should be appreciated that the AC power line  108  may be embodied as a plurality of AC power lines in other embodiments. 
     As discussed above, each of the illustrative alternative energy source modules  104  is embodied as a photovoltaic module configured to convert solar energy to an AC power. As such, in the illustrative embodiment, each module  104  includes a DC photovoltaic module  120  and an inverter  122 . The DC photovoltaic module  120  may be embodied as one or more photovoltaic cells and is configured to deliver DC power to the inverter  122  in response to receiving an amount of sunlight. Of course, the DC power delivered by DC photovoltaic module  120  is a function of environmental variables, such as, e.g., sunlight intensity, sunlight angle of incidence and temperature. The inverter  122  is configured to convert the DC power generated by the DC photovoltaic module  120  to AC power. In some embodiments, the inverter  122  and the DC photovoltaic module  120  are located in a common housing. Alternatively, the inverter  122  may include its own housing secured to the housing of the DC photovoltaic module  120 . Additionally, in some embodiments, the inverter  122  is separate from the housing of the DC photovoltaic module  120 , but may be located nearby. 
     Each of the illustrative inverters  122  includes a DC-to-AC inverter circuit  124  and an inverter controller  126 . The DC-to-AC inverter circuit  124  is configured to convert the DC power generated by the DC photovoltaic module  120  to AC power at the grid frequency of the power grid  110 . One of a number of various inverter topologies and devices may be used in the DC-to-AC inverter circuit  124 . Examples of inverter topologies that may be used in the inverter circuit  124  are described in, for example, U.S. patent application Ser. No. 12/563,499, entitled “Apparatus for Converting Direct Current to Alternating Current” by Patrick L. Chapman et al., filed on Sep. 21, 2009 and in U.S. patent application Ser. No. 12/563,495, entitled “Apparatus and Method for Controlling DC-AC Power Conversion” by Patrick L. Chapman et al., filed on Sep. 21, 2009. 
     The operation of the inverter circuit  124  is controlled and monitored by the inverter controller  126 . The illustrative inverter controller  126  includes a processor  130 , a memory  132 , and a power line communication circuit  214 . Additionally, the inverter controller  126  may include other devices commonly found in controllers, which are not illustrated in  FIG. 2  for clarity of description. Such additional devices may include, for example, peripheral devices, data storage devices, input/output ports, and/or other devices. 
     The processor  130  of the inverter controller  126  may be embodied as any type of processor capable of executing software/firmware, such as a microprocessor, digital signal processor, microcontroller, or the like. The processor  130  is illustratively embodied as a single core processor, but may be embodied as a multi-core processor having multiple processor cores in other embodiments. Additionally, the inverter controller  126  may include additional processors  130  having one or more processor cores in other embodiments. 
     The memory  132  of the inverter controller  126  may be embodied as one or more memory devices or data storage locations including, for example, dynamic random access memory devices (DRAM), synchronous dynamic random access memory devices (SDRAM), double-data rate synchronous dynamic random access memory device (DDR SDRAM), flash memory devices, and/or other volatile memory devices. The memory  132  is communicatively coupled to the processor  130  via a number of signal paths, such as a data bus, point-to-point interconnection, or other interconnection. Although only a single memory device  132  is illustrated in  FIG. 1 , in other embodiments, the inverter controller  126  may include additional memory devices. Various data and software may be stored in the memory device  132 . For example, applications, programs, libraries, and drivers that make up the firmware executed by the processor  130  may reside in memory  132 . 
     The power line communication circuit  134  may be embodied as any number of devices and circuitry for enabling communications between the inverter  122  (i.e., the inverter controller  126 ) and the controller  106 . In the illustrative embodiment, the communication circuit  134  is configured to communicate with the controller  106  over the AC power line(s)  108  and may use any suitable power line communication protocol to effect such communication. 
     As discussed above, the inverter array controller  106  is configured to monitor and/or control the operation of the alternative energy source modules  104  (i.e., the inverters  122 ). The illustrative inverter array controller  106  includes a processing circuit  150 , a memory  152 , and a power line communication circuit  154 . Additionally, the inverter array controller  106  may include other devices commonly found in controllers, which are not illustrated in  FIG. 2  for clarity of description. Such additional devices may include, for example, peripheral devices, data storage devices, input/output ports, and/or other devices. 
     The processing circuit  150  of the inverter array controller  106  may be embodied as any type of processor or processing circuit capable of executing software/firmware, such as a microprocessor, digital signal processor, microcontroller, or the like. The processing circuit  150  is illustratively embodied as a single core processor, but may be embodied as a multi-core processor having multiple processor cores in other embodiments. Additionally, the processing circuit  150  may be embodied as additional processors and associated circuits in other embodiments. 
     The memory  152  of the inverter array controller  106  may be embodied as one or more memory devices or data storage locations including, for example, dynamic random access memory devices (DRAM), synchronous dynamic random access memory devices (SDRAM), double-data rate synchronous dynamic random access memory device (DDR SDRAM), flash memory devices, and/or other volatile memory devices. The memory  152  is communicatively coupled to the processing circuit  150  via a number of signal paths, such as a data bus, point-to-point interconnection, or other interconnection. Although only a single memory device  152  is illustrated in  FIG. 1 , in other embodiments, the inverter array controller  106  may include additional memory devices. Various data and software may be stored in the memory device  152 . For example, applications, programs, libraries, and drivers that make up the software/firmware executed by the processing circuit  150  may reside in memory  152 . 
     Similar to the communication circuit  134 , the communication circuit  154  may be embodied as any number of devices and circuitry for enabling communications between the controller  106  and the inverters  122 . In the illustrative embodiment, the communication circuit  154  is configured to communicate with the communication circuit  134  of the inverters  122  over the AC power line(s)  108  and may use any suitable power line communication protocol to effect such communication. For example, in some embodiments a frequency shift keying (FSK) modulation protocol using a half-duplex communication link may be used. In one particular embodiment, the communication circuit  154  is configured to use the CENELEC B power line communication protocol but may be use other protocols in other embodiments such as those protocols including a form of error detection and/or correction. 
     In use, the inverter array controller  106  may control the operation of the inverter controllers  126 , request information and data from the inverter controllers  126 , and provide instructions and data to the inverter controllers  126 . To do so, the inverter array controller  106  communicates with the inverters  122  over the AC power line(s)  108  as discussed above. However, depending on the configuration of the array  102  and/or the location of the individual inverter  122  in the array  102 , communications between the inverter  122  and the inverter array controller  106  may be adversely affected. As such, as discussed in more detail below, the inverter array controller  106  may utilize another inverter  122  of the array  102  as a “relay inverter” to relay messages to a non-responsive inverter  122 . 
     Referring now to  FIGS. 2 and 3 , in the illustrative embodiments, the inverter array controller  106  and each of the inverters  122  of the corresponding alternative energy source module  104  are coupled in parallel with each other to the AC power line  108 , which may be coupled to the power grid  110 . Again, although the illustrative array  102  of  FIG. 2  includes only three inverters  122 , the array  102  may include a larger number of inverters in other embodiments (i.e., the inverter array controller  106  may control a larger number of inverters). Additionally, the array  102  may form a sub-array of a larger array in some embodiments. In such embodiments, the additional sub-arrays may be coupled in parallel with the array  102  to the inverter array controller  106  and the power grid  110  such that a single inverter array controller  106  may control multiple arrays  102 . Alternatively, in other embodiments, each sub-array may include its own inverter array controller  106 . 
     The illustrative power grid AC power line  108  is embodied as a three-wire cable including a pair of line wires  200 ,  204  and a neutral wire  204 . Power is delivered from the inverters  122  to the power grid  110  via the line wires  200 ,  204 . As shown in  FIG. 2 , the inverter array controller  106  is coupled to one of the line wires  200  and the neutral wire  204 . As such, power line communications between the inverter array controller  106  and the inverters  122  occur via the line-to-neutral (L-N) coupling. 
     An equivalent circuit  300  of the array  102  of inverters  122  is shown in  FIG. 3 . The equivalent circuit  300  is embodied as a distributed impedance network formed from the circuit characteristics of the inverters  122  of the array  102  and the interconnecting power line cable  108 . For example, in  FIG. 3 , each inverter  122  is represented by a corresponding inductor-capacitor (LC) network including an inductor  302  and a capacitor  304 . Each inductor  302  represents the inductance of the cable connector, and associated wiring, through which the corresponding inverter  122  is coupled to the power line cable  108  and the inductance of the power line cable  108  section associated with the corresponding inverter  122 . The capacitor  304  represents the input capacitance of the corresponding inverter  122  and the capacitance of the power line cable  108  section associated with the corresponding inverter  122 . Illustratively, each inductor  302  is embodied as a 1 mH inductor and each capacitor  304  is embodied as a 1 nF capacitor. Of course, it should be appreciated that in some embodiments, arrays  102  of inverters  122  having a more complex structure (and, therefore, a more complex equivalent circuit  300 ) may be used in the system  100 . 
     In alternative energy generation systems having arrays  102  of inverters  122  similar to the configurations shown in  FIGS. 1-3 , the effectiveness of the power line communication between the inverters  122  and the inverter array controller  106  has been determined to be a function of the location of the individual inverter  122  within the array  102 . That is, the magnitude of the voltage of a power line communication sent from an inverter  122  and received by the inverter array controller  106  may vary, generally non-linearly, with the distance between the inverter  122  and the inverter array controller  106 . For example, a graph  400  showing a normalized voltage level of a power line communication message received from inverters  122  of an array  102  versus the position within the array of each inverter  122  is shown in  FIG. 4 . As shown in the graph  400 , a power line communication received by the inverter array controller  106  from the middle inverters  122  (e.g., inverter numbers  13 - 17 ) has a much lower voltage level relative to inverters  122  nearer or farther away from the associated inverter array controller  106 . That is, the middle inverters are located in a communication “null” in which the power line communications from those middle inverters  122  to the inverter array controller  106  are adversely attenuated. Additionally, such communication “nulls” can occur between inverters  122  of an array  102 . For example, in the embodiment of  FIG. 4 , two inverters  122  located fifteen nodes (i.e., inverters  122 ) apart may receive power line communications from each other having the low normalized voltage level as shown for inverter number “ 15 ” in  FIG. 4 . 
     Depending on the severity of the communication null, communications between the inverter  122  within the null and the inverter array controller  106  (or other inverter  122 ) may have such a reduced voltage level that such communications are simply not received by each other. The communication null illustrated in  FIG. 4  is due to the configuration of the array  102 , the resultant equivalent LC circuit, and the frequency of the communication, which can cause attenuation of signals over particular distances. It should be appreciated that a single array may have one or more communication nulls and that such communication nulls may occur at various locations within the array (i.e., centered on various inverters  122  of the array  102 ) depending on the configuration, layout, communication frequency, and surrounding conditions of the array  102 . Although the inverter array controller  106  may utilize a re-try algorithm to attempt communicating with the inverters  122  located in a communication null, such re-try attempts are likely not to be successful due to the consistent attenuation of the power line communication between the inverter array controller  106  and the affected inverters  122 . 
     Referring now to  FIG. 5 , in one embodiment, a method  500  for communicating with the inverters  122  of the array  102  may be executed by the inverter array controller  106 . The method  500  begins with block  502  in which the inverter array controller  106  is initialized. During the initialization procedure, the inverter array controller  106  may perform various system checks, such as memory validations, load executable software/firmware, and/or otherwise prepare for controlling and communicating with the inverters  122  of the array  102 . 
     Subsequently, or as part of the initialization of block  502 , the inverter array controller  106  may determine which power inverters  122  of the array  102  are to be used as relay inverters. As discussed in more detail below, a relay inverter is a power inverter  122  of the array  102  selected to relay communications from the inverter array controller  106  to inverters  122  located in communication nulls. In some embodiments, the relay inverters are pre-selected and identification data that identifies the relay inverters may be stored in the inverter array controller  106  (e.g., in memory  152 ). In such embodiments, the relay inverters may be selected based on, for example, the location of the inverter  122  within the array  102 , the location of the inverter  122  relative to the inverter array controller  106 , the configuration of the array  102 , and/or other criteria or factors useable to select at least one inverter  122  of the array  102  that is not located in a communication null relative to the inverter array controller  106 . 
     Alternatively, in some embodiments, the inverter array controller  106  is configured to dynamically or automatically determine, or otherwise select, one or more power inverters  122  as the relay inverter(s)  122 . To do so, for example, the inverter array controller  106  may execute a method  600  for determining at least one relay inverter from the array  102  of power inverters  122  as shown in  FIG. 6 . The method  600  begins with block  602  in which the inverter array controller  106  transmits a request for a test communication from each power inverter  122  of the array  102 . Such request communication may be embodied as, for example, a broadcast communication from the inverter array controller  106 , which is to be received by each power inverter  122  of the array  102  (assuming no communication nulls). In block  604 , the inverter array controller  106  receives the test communication responses from each responding power inverter  122  of the array  102 . Such test communication response may be embodied as any type of power line communication message, such as a simple acknowledgement. Of course, those power inverters  122  located in a communication null may not receive, or otherwise be able to interpret, the original request communication transmitted by the inverter array controller  106  due to the voltage attenuation occurring at the communication null. Similarly, even if an inverter  122  located in a communication null did receive the request communication from the inverter array controller  106 , the test communication response from that inverter  122  may not be received, or otherwise be properly interpreted, by the inverter array controller  106 . 
     Accordingly, in block  606 , the inverter array controller  106  records one or more signal characteristics of the test communication response received from each responding inverter  122  of the array  102 . Subsequently, in block  608 , the inverter array controller  106  selects one or more inverters  122  of the array  102  to be the relay inverter based on the recorded signal characteristic (e.g. having the best signal characteristic). The signal characteristic recorded and compared in blocks  606 ,  608  may be embodied as any characteristic of the test communication response signal received from each responding inverter  122  that may be compared to each other to determine the relay inverter(s). For example, in some embodiments, the signal characteristic may be embodied as the signal amplitude, the signal integrity, the signal-to-noise ratio, the response time, or other characteristic of the test communication response signal received from each of the responding inverters  122 . Of course, in other embodiments, other criteria may be used in place of, or in addition to, the signal characteristic(s) of the test communication responses such as, for example, the number of inverters in the array  102 , the configuration of the array  102 , historical communication data, and/or the like. 
     Of course, in other embodiments, other methodologies for determining or selecting the relay inverter(s) from the array  102  of power inverters  122  may be used. For example, it has been determined that the last inverter in an array  102  of power inverters  122  (i.e., the inverter  122  having the greatest communication distance to the inverter array controller  106 , such as the inverter  210  of  FIG. 2 ) may exhibit the most effective communication with the inverter array controller  106 . That is, the communication from the last inverter  210  of the array  102  received by the inverter array controller  106  may have the largest amplitude, best signal-to-noise-characteristic, or other signal characteristic relative to the other inverters  122  of the array  102 . Conversely, it has been determined that the inverters  122  closest to the inverter array controller  106  (e.g., the inverter  122  having the least communication distances to the inverter array controller  106 ) may be located in a communication null and exhibit the least effective communication with the inverter array controller  106 . As such, in those embodiments in which the configuration or structure of the array  102  is known, predetermined, or otherwise discoverable by the inverter array controller  106 , the controller  106  may select the last inverter  210  of the array  102  as the relay inverter or one of the relay inverters. 
     Referring back to  FIG. 5 , after the relay inverter(s)  122  has been selected or otherwise determined, the inverter array controller  106  may, periodically or occasionally, request communication from one or more power inverters  122  of the array  102  in block  506 . Such requested communication may be embodied as any type of request such as, without limitation, a request for operational data, a request to acknowledge instructions, a heartbeat request, and/or the other types of communications. In block  508 , the inverter array controller  106  determines whether a response was received from each power inverter  122  from which a communication was requested in block  506 . For example, in some embodiments, the inverter array controller  106  may transmit a broadcast requests in block  506  that request each power inverter  122  of the array  102  to respond (e.g., with particular operational data). In such embodiments, the inverter array controller  106  determines whether a response was received from each power inverter  122  of the array  102 . If so, the method  500  loops back to block  506  in which the inverter array controller  106  may request additional communications at some later time. 
     However, if a response was not received from one or more of the inverters  122  to which the request was directed in block  506 , the method  500  advances to block  510  in which the inverter array controller  106  retransmits the request for communication to the non-responsive inverter(s)  122 . That is, the inverter array controller  106  retransmits the request to any inverter  122  that did not respond to the request transmitted in block  506  or otherwise responded with a communication that was not received or cannot be interpreted by the inverter array controller  106  (e.g., the voltage level of the response communication is too low to be received or interpreted by the controller  106 ). In block  512 , the inverter array controller  106  again determines whether a response to the retransmitted request is received from each of the non-responsive inverters  122 . If so, the method  500  loops back to block  506  in which the inverter array controller  106  may request additional communications at some later time. 
     In some embodiments, the inverter array controller  106  may be configured to adjust the frequency of the power line communication between the controller  106  and the inverter  122  (or just the non-responding inverter  122 ) prior to retransmitting the request in block  510 . As discussed above, the existence and location of a communication null is dependent upon the circuit characteristics (i.e., the circuit impedance as discussed above with regard to  FIG. 3 ) of the array  102  and the frequency of the power line communication transmission. As such, by adjusting the frequency of the power line communication transmission, the location of the null may be adjusted (i.e., which inverter  122  is located in the communication null). Accordingly, in some embodiments, the inverter array controller  106  may be configured to adjust the frequency of the power line communication transmission and re-attempt to communicate with the non-responsive inverter in block  510 . Such additional communication may include instructions to the non-responding inverter  122  to likewise adjust the frequency of the its power line communication transmission when responding back to the inverter array controller  106 . In this way, the inverter array controller  106  may be able to establish communications with the non-responding inverter  122  by changing the location of the communication null using a different communication frequency. Such frequency adjustments may be implemented in place of or in addition to the use of a relay inverter as discussed below. 
     If, however, no response to the request retransmitted in block  508  is received from one or more of the non-responsive inverters  122 , the method  500  advances to block  514 . In block  514 , the inverter array controller  106  transmits a relay message to the identified or selected relay inverter(s)  122 . In embodiments in which multiple power inverters  122  have been identified as relay inverters, the inverter array controller  106  may select one of the identified relay inverters  122  to receive the relay message. For example, in one embodiment, the inverter array controller  106  selects one of the identified relay inverters  122  to receive the relay message based on the identity of the non-responsive inverter(s)  122  in block  516 . The identify of the non-responsive inverter(s)  122  may be embodied as any type of data capable of identifying the non-responsive inverter(s)  122  including, but not limited to, a virtual or machine address such as a globally unique identifier (GUID), the location of the non-responsive inverter  122  within the array  102 , the location of the non-responsive inverter  122  relative to the inverter array controller  106 , and/or other data or criteria. 
     The relay message transmitted by the inverter array controller  106  in block  514  may be embodied as any type of communication message that instructs the relay inverter  122  to retransmit a message from the inverter array controller  106 . For example, in some embodiments, the relay message may include the original request message transmitted in block  506  (e.g., the relay message may “wrap” the original request message). Alternatively, the relay message may be embodied as a first relay message that instructs the relay inverter  122  to echo the next message received from the inverter array controller  106 , followed by a second relay message that is a retransmission of the original request message transmitted in block  506 . 
     As discussed in more detail below, the relay inverter(s)  122  is used to relay the messages from the inverter array controller  106  to the non-responsive inverter(s)  122 , as well as from the non-responsive inverter(s)  104  to the inverter array controller  106 . As such, the inverter array controller  106  determines whether a response was received from the relay inverter(s)  122  in block  518 . If not, the method  500  advances to block  520  in which an error is generated. Such error may include storing the identity of the non-responsive inverter  122  and/or relay inverter  122 , storing additional information related to the non-responsive inverter  122  and/or relay inverter  122 , generating a visual or audio alter, and/or providing an error message to a remote computer or server. 
     If, however, a response is received from the relay inverter  122 , the method  500  advances to block  522  in which the inverter array controller  106  determines whether the response is an error message from the relay inverter  122 . That is, although a response may be received from the relay inverter  122 , such response may be an error message indicating that the relay inverter  122  did not receive a response from the non-responsive inverter  122 . If so, the method  500  advances to block  520  in which an error is generated as discussed above. However, if a non-error response is received from the relay inverter(s)  122 , the method  500  advances to block  524  in which the inverter array controller  106  processes the message received from the from the non-responsive inverter(s)  122  via the response from the relay inverter(s)  122 . In this way, the inverter array controller  106  is capable of communicating with any inverter  122  within the array  102 , even those inverters located in an communication null, via use of a relay inverter  122 . 
     Referring now to  FIG. 7 , in one embodiment, each relay inverter  122  of the array  102  may execute a method  700  to relay communications between the inverter array controller  106  and one or more non-responsive inverters  122 . The method  700  begins with block  702  in which the relay inverter  122  determines whether a communication has been received from the inverter array controller  106 . If so, the method  700  advances to block  704  in which the inverter array  102  determines whether the received communication is a relay message. To do so, the inverter array  102  may analyze the received communication to determine whether the received communication is a relay message. Such determination may be based on the metadata of the received communication, instructions included in the received communication, the type of communications, and/or other aspects of the received communication. If the received communication is determine not to be a relay message, the method  700  advances to block  706  in which the relay inverter  122  responds (if required) to the received communication as normal. If, however, the received communication is determined to be a relay message, the method  700  advances to block  708 . 
     In block  708 , the relay inverter  122  retransmits a message from the inverter array controller  106  to one or more non-responsive inverters  122 . As discussed above, the message retransmitted by the relay inverter  122  may be included in the relay message received in block  704 . As such, in some embodiments, the relay inverter  122  identifies the non-responsive inverter  122  based on the relay message in block  710 . To do so, for example, the relay inverter  122  may retrieve identification data from the relay message that identifies the non-responsive inverter  122 . Such identification data may be embodied may be embodied as any type of data capable of identifying the non-responsive inverter  122  such as, for example, a virtual or machine address (e.g., a GUID). 
     After the non-responsive inverter  122  has been identified by the relay inverter  122 , the relay inverter  122  retransmits the message from the inverter array controller  106  to the non-responsive inverter  122  in block  712 . To do so, in some embodiments, the relay inverter  122  may simply retransmit the relay message received from the inverter array controller  106  in block  704 . Alternatively, the relay inverter  122  may extract a message included in the relay message (e.g., wrapped by the relay message) and retransmit only the extracted message to the non-responsive inverter  122  in block  712 . 
     In some embodiments, the message to be retransmitted by the relay inverter is embodied as a subsequent message received from the inverter array controller  106 , which is to be echoed to the non-responsive inverter(s)  122 . In such embodiments, the relay message received in block  704  instructs the relay inverter  122  to echo the next message received from the inverter array controller  106 . As such, the relay inverter  122  prepares to echo the next message received from the inverter array controller  106  in block  714  and subsequently receives the next message from the inverter array controller  106  in block  716 . In block  718 , the relay inverter retransmits the subsequent message received from the inverter array controller  106  in block  716  to the non-responsive inverter  122 . As discussed above, the relay inverter  122  may identify the non-responsive inverter  122  based on metadata or other data associated with the first or second relay messages received from the inverter array controller  106 . 
     After the relay inverter  122  has retransmitted the message from the inverter array controller  106  to the non-responsive inverter  122 , the method  700  advances to block  720 . In block  720 , the relay inverter determines whether a reply has been received from the non-responsive inverter  122 . For example, in some embodiments, the relay inverter  122  is configured to wait a predetermined amount of time for such a reply. The reply may be embodied as a simple acknowledgement or a message including, for example, data requested by the inverter array controller. If no reply is received from the non-responsive inverter  122  in block  720 , the relay inverter  122  transmits an error message to the inverter array controller  106  in block  722  to inform the controller  106  that the non-responsive inverter  122  has failed to reply to the relay inverter. However, if a reply is received from the non-responsive inverter  122 , the method  700  advances to block  724  in which the relay inverter  122  retransmits the reply message received from the non-responsive inverter  122  to the inverter array controller  106 . In this way, non-responsive inverter  122  is capable of communicating with the inverter array controller  106  via the relay inverter  122 . 
     It should be appreciated that, although the methods  500 ,  600 , and  700  have been described above with regard to DC-to-AC power inverters, the concepts described therein are equally applicable to DC-to-DC and AC-to-DC converters. That is, although the power line communication is carried by the power line cable  108 , the power line communication has a signal frequency (e.g., about 110 kHz) different from the AC power line frequency, which is typically 50 Hz or 60 Hz. As such, the techniques described above can be implemented on a system in which the power line frequency has a different frequency from the power line communication including, for example, a frequency of about 0 Hz (e.g., embodiments in which the converters generate a DC output). Similar to AC output systems, such DC output systems may also exhibit communication nulls based on the circuit characteristics, the configuration of the converters, and other factors. 
     While the concepts of the present disclosure have been illustrated and described in detail in the drawings and foregoing description, such an illustration and description is to be considered as exemplary and not restrictive in character, it being understood that only illustrative embodiments have been shown and described and that all changes and modifications consistent with the disclosure and recited claims are desired to be protected.