Patent Publication Number: US-2020294873-A1

Title: Semiconductor device

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2019-044004, filed on Mar. 11, 2019; the entire contents of which are incorporated herein by reference. 
     FIELD 
     Embodiments relate to a semiconductor device. 
     BACKGROUND 
     Semiconductor devices for power control may include semiconductor elements such as MOSFETs, IGBTs (Insulated Gate Bipolar Transistors), diodes, etc., disposed in parallel between two electrode plates. For example, the semiconductor elements are pressed in contact with the two electrode plates and are electrically connected to the two electrode plates to perform a switching control of a large current flowing between the two electrode plates. However, when the heat dissipation under the high-temperature operation becomes nonuniform between the two electrode plates, the pressure that is applied to the semiconductor elements becomes nonuniform due to the thermal expansion difference inside the respective electrode plates. Thus, the semiconductor elements may be broken under the high-temperature operation; and the reliability decreases in the semiconductor device. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIGS. 1A and 1B  are schematic views showing a semiconductor device according to an embodiment; 
         FIG. 2  is a schematic view showing components of the semiconductor device according to the embodiment; 
         FIG. 3  is a schematic view showing a semiconductor device according to a comparative example; 
         FIG. 4  is a schematic view showing components of a semiconductor device according to a modification of the embodiment; 
         FIG. 5  is a schematic view showing components of a semiconductor device according to other modification of the embodiment; 
         FIGS. 6A and 6B  are schematic views showing components of semiconductor devices according to yet other modifications of the embodiment; and 
         FIG. 7  is a schematic view showing a semiconductor device according to a modification of the embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     According to an embodiment, a semiconductor device includes an upper electrode plate, a lower electrode plate opposing the upper electrode plate, a plurality of semiconductor elements disposed between the upper electrode plate and the lower electrode plate, and a plurality of metal plates disposed respectively between the upper electrode plate and the plurality of semiconductor elements. The plurality of semiconductor elements are connected in parallel between the upper electrode plate and the lower electrode plate. The upper electrode plate includes a plurality of upper poles on the lower electrode plate side, the plurality of upper poles being electrically connected to the plurality of semiconductor elements, respectively, via the plurality of metal plates. The plurality of semiconductor elements includes a first semiconductor element and a second semiconductor element. The first semiconductor element is disposed between a central portion of the upper electrode plate and a central portion of the lower electrode plate. The second semiconductor element is disposed further outward than the first semiconductor element. The plurality of metal plates include a first metal plate and a second metal plate, the first metal plate being disposed between the upper electrode plate and the first semiconductor element, the second metal plate being disposed between the upper electrode plate and the second semiconductor element. The plurality of upper poles include a first upper pole electrically connected to the first semiconductor element with the first metal plate interposed and second upper pole electrically connected to the second semiconductor element with the second metal plate interposed. The first upper pole has a first height along the first direction directed from the upper electrode plate toward the lower electrode plate. The second upper pole has a second height along the first direction. The first semiconductor element and the first metal plate each have a thickness along the first direction. A first total length is a sum of the thickness of the first semiconductor element, the thickness of the first metal plate and the first height of the first upper pole. The second semiconductor element and the second metal plate each have a thickness along the first direction. A second total length is a sum of the thickness of the second semiconductor element, the thickness of the second metal plate, and the second height of the second upper pole. The second total length is longer than the first total length. 
     Embodiments will now be described with reference to the drawings. The same portions inside the drawings are marked with the same numerals; a detailed description is omitted as appropriate; and the different portions are described. The drawings are schematic or conceptual; and the relationships between the thicknesses and widths of portions, the proportions of sizes between portions, etc., are not necessarily the same as the actual values thereof. The dimensions and/or the proportions may be illustrated differently between the drawings, even in the case where the same portion is illustrated. 
     There are cases where the dispositions of the components are described using the directions of XYZ axes shown in the drawings. The X-axis, the Y-axis, and the Z-axis are orthogonal to each other. Hereinbelow, the directions of the X-axis, the Y-axis, and the Z-axis are described as an X-direction, a Y-direction, and a Z-direction. Also, there are cases where the Z-direction is described as upward and the direction opposite to the Z-direction is described as downward. 
       FIGS. 1A and 1B  are schematic views showing a semiconductor device  1  according to an embodiment.  FIG. 1A  is a schematic cross-sectional view; and  FIG. 1B  is a schematic plan view.  FIG. 1A  is a schematic view illustrating a cross section along line A-A shown in  FIG. 1B . 
     As shown in  FIG. 1A , the semiconductor device  1  includes an electrode plate  10 , an electrode plate  20 , and multiple semiconductor elements  30 . The semiconductor elements  30  are disposed between the electrode plate  10  and the electrode plate  20  and electrically connected in parallel between the electrode plate  10  and the electrode plate  20 . 
     The electrode plate  10  and the electrode plate  20  include, for example, a material having a low electrical resistivity and a high thermal conductivity such as copper, aluminum, etc. The multiple semiconductor elements  30  include, for example, IGBTs and diodes. 
     The semiconductor device  1  further includes metal plates  33 , metal plates  35 , a pressure plate  40 , a pressure plate  50 , an insulating plate  45 , and an insulating plate  55 . The electrode plate  10  and the electrode plate  20  are disposed between the pressure plate  40  and the pressure plate  50 . The insulating plate  45  is disposed between the electrode plate  10  and the pressure plate  40 . The insulating plate  55  is disposed between the electrode plate  20  and the pressure plate  50 . 
     The pressure plates  40  and  50  include, for example, aluminum, iron, etc. The insulating plates  45  and  55  include, for example, a resin. The insulating plate  45  electrically insulates the pressure plate  40  from the electrode plate  10 . The insulating plate  55  electrically insulates the pressure plate  50  from the electrode plate  20 . 
     For example, the electrode plate  10  includes multiple inner poles  13 ; and the electrode plate  20  includes multiple inner poles  23 . The semiconductor elements  30  are disposed respectively between the inner poles  13  and the inner poles  23 . The metal plates  33  are disposed between the inner poles  13  and the semiconductor elements  30 . The metal plates  35  are disposed between the inner poles  23  and the semiconductor elements  30 . 
     The inner poles  13  have a height H 1  in the direction (e.g., the Z-direction) from the electrode plate  10  toward the electrode plate  20 . The inner poles  23  have a height H 2  in the direction (e.g., the −Z direction) from the electrode plate  20  toward the electrode plate  10 . For example, the height H 1  is lower than the height H 2 . 
     For example, the metal plates  33  and the metal plates  35  have higher hardnesses than the hardnesses of the electrode plate  10  and the electrode plate  20 . The metal plates  33  and the metal plates  35  include, for example, molybdenum. 
     The metal plates  33  are pressed in contact with the semiconductor elements  30  and the electrode plate  10  by pressure applied between the pressure plate  40  and the pressure plate  50 . The metal plates  35  are pressed in contact with the semiconductor elements  30  and the electrode plate  20  by the pressure applied between the pressure plate  40  and the pressure plate  50 . Thereby, the semiconductor elements  30  are electrically connected to the electrode plate  10  and the electrode plate  20 . 
     The electrode plate  10  includes a connection terminal  15 ; and the electrode plate  20  includes a connection terminal  25 . The semiconductor device  1  is configured to perform switching control of a large current supplied from the outside via the connection terminals  15  and  25  by the multiple semiconductor elements  30  connected in parallel. 
       FIG. 1B  is a plan view illustrating the arrangement of the semiconductor elements  30  on the electrode plate  10 . The multiple semiconductor elements  30  include a first semiconductor element  30   a  and a second semiconductor element  30   b.  The first semiconductor element  30   a  is disposed at the center of the electrode plate  10 . The second semiconductor element  30   b  is disposed at a position most proximal to the outer edge in a direction from the center toward the outer edge of the electrode plate  10 . Hereinbelow, there are cases where the first semiconductor element  30   a  and the second semiconductor element  30   b  are described by being differentiated and cases where the first semiconductor element  30   a  and the second semiconductor element  30   b  are generally called the semiconductor element  30 . This is similar for the other components as well. 
       FIG. 2  is a schematic view showing components of the semiconductor device  1  according to the embodiment.  FIG. 2  is a schematic view illustrating the arrangement of the electrode plate  10 , the electrode plate  20 , the semiconductor elements  30 , the metal plates  33 , and the metal plates  35  before the pressure is applied between the pressure plate  40  and the pressure plate  50 . 
     As shown in  FIG. 2 , the first semiconductor element  30   a  is disposed between the metal plate  33  and a metal plate  35   a.  The metal plate  35   a  is one of the multiple metal plates  35 . The second semiconductor element  30   b  is disposed between the metal plate  33  and a second metal plate  35   b.  The metal plate  35   b  is one of the multiple metal plates  35 . 
     The thicknesses in the Z-direction of the metal plates  33  are uniform. The thicknesses in the Z-direction of the semiconductor elements  30  also are uniform. The heights H 1  and H 2  of the inner poles  13  and  23  also are uniform. 
     The metal plate  35   a  has a thickness T S1  in the Z-direction. The metal plate  35   b  has a thickness T S2  in the Z-direction. The metal plate  35   b  is provided so that the thickness T S2  is thicker than the thickness T S1 . The thicknesses in the Z-direction of the metal plates  35  that are positioned between the metal plate  35   a  and the metal plate  35   b  are, for example, the same as the thickness T S1 , or thicker than the thickness T S1  and thinner than the thickness T S2 . 
     The metal plate  35   b  is provided so that all of the metal plates  35  contact the inner poles  23  when the pressure is applied between the pressure plate  40  and the pressure plate  50 . In other words, for example, the metal plate  35   b  is provided so that all of the metal plates  35  contact the inner poles  23  by a deformation of an inner pole  23   b  contacting the metal plate  35   b.  In other words, the difference between the thickness T S2  and the thickness T S1  is set not to exceed a range in which all of the metal plates  35  can contact the inner poles  23 . 
       FIG. 3  is a schematic view showing a semiconductor device  2  according to a comparative example.  FIG. 3  is a schematic view illustrating a cross section along line A-A shown in  FIG. 1B .  FIG. 3  also shows the pressure applied to the semiconductor elements  30  at a high temperature (when operating). In the semiconductor device  2 , the thicknesses in the Z-direction of the metal plates  35  also are uniform. In  FIG. 3 , the lengths of the inner poles  23  are illustrated as being different to show the thermal expansion difference of the inner poles  23 . Although the electrode plate  20  and a portion of the metal plates  35  are illustrated as being separated, neither are actually separated. 
     For example, in the case where the semiconductor elements  30  are disposed at high density between the electrode plate  10  and the electrode plate  20 , the heat from the first semiconductor element  30   a  disposed at the center of the electrode plate  10  and the electrode plate  20  is not dissipated easily compared to the heat from the second semiconductor element  30   b  disposed outward from the first semiconductor element  30   a.  Accordingly, the temperature at the center of the electrode plate  10  and the electrode plate  20  is high compared to the temperature at the outer perimeter portion. Therefore, the thermal expansion at the center of the electrode plate  10  and the electrode plate  20  is larger than the thermal expansion at each of the outer perimeter portions. Accordingly, the pressure that is applied to the semiconductor elements  30  at a high temperature becomes nonuniform; for example, the pressure that is applied to the first semiconductor element  30   a  and the metal plate  35   a  becomes larger than the pressure applied to the second semiconductor element  30   b  and the metal plate  35   b.    
     Also, when the high-temperature state (the ON-state) and the low-temperature state (the OFF-state) are repeated by the switching operation of the semiconductor elements  30 , thermal fatigue, e.g., plastic deformation of the metal plate  35   a  to which the high pressure is applied at a high temperature becomes large. Thereby, the uniformity of the pressure applied to the semiconductor elements  30  may degrade; and the semiconductor elements  30  may be broken. 
     In the semiconductor device  1 , the thickness in the Z-direction of the metal plate  35   b  positioned between the inner pole  23   b  and the second semiconductor element  30   b  is set to be thicker than the thickness in the Z-direction of the metal plate  35   a  positioned between an inner pole  23   a  and the first semiconductor element  30   a.  Thereby, the thermal expansion difference at a high temperature (when operating) is absorbed by the thickness difference of the metal plate  35   a  and the metal plate  35   b;  and the pressure can be applied uniformly to the semiconductor elements  30 . As a result, for example, the plastic deformation due to the thermal fatigue of the metal plate  35   a  can be suppressed; and the reliability of the semiconductor device  1  can be improved. 
       FIG. 4  is a schematic view showing components of a semiconductor device  3  according to a modification of the embodiment.  FIG. 4  is a schematic view illustrating the arrangement of the electrode plate  10 , the electrode plate  20 , the semiconductor elements  30 , the metal plates  33 , and the metal plates  35  before the pressure is applied between the pressure plate  40  and the pressure plate  50 . 
       FIG. 4  shows a third semiconductor element  30   c  in addition to the first semiconductor element  30   a  and the second semiconductor element  30   b.  The third semiconductor element  30   c  is one of the multiple semiconductor elements  30  and is disposed between the first semiconductor element  30   a  and the second semiconductor element  30   b.  The multiple metal plates  35  further include a metal plate  35   c.  The third semiconductor element  30   c  is positioned between the metal plate  33  and the metal plate  35   c.    
     In the example as well, the thicknesses in the Z-direction of the metal plates  33  are uniform. The thicknesses in the Z-direction of the semiconductor elements  30  also are uniform. The heights H 1  and H 2  of the inner poles  13  and  23  also are uniform. 
     The metal plate  35   a  is disposed between the inner pole  23   a  and the first semiconductor element  30   a  and has the thickness T S1  in the Z-direction. The metal plate  35   b  is disposed between the inner pole  23   b  and the second semiconductor element  30   b  and has the thickness T S2  in the Z-direction. The metal plate  35   c  is disposed between an inner pole  23   c  and the third semiconductor element  30   c  and has a thickness T S3  in the Z-direction. 
     The thicknesses of the metal plates  35  have the relationship T S1 &lt;T S3 &lt;T S2 . In other words, the metal plates  35  are disposed so that the thickness in the Z-direction increases in the directions (e.g., the X-direction and the Y-direction) from the center toward the outer edge of the electrode plate  20 . Thereby, it is possible to improve the uniformity of the pressure applied to the semiconductor elements  30  when operating and the reliability of the semiconductor device  3 . 
       FIG. 5  is a schematic view showing components of a semiconductor device  4  according to other modification of the embodiment.  FIG. 5  is a schematic view illustrating the arrangement of the electrode plate  10 , the electrode plate  20 , the semiconductor elements  30 , the metal plates  33 , and the metal plates  35  before the pressure is applied between the pressure plate  40  and the pressure plate  50 . 
     In the example, the thicknesses in the Z-direction of the metal plates  33  are uniform. The thicknesses in the Z-direction of the metal plates  35  also are uniform. The heights H 1  and H 2  of the inner poles  13  and  23  also are uniform. 
     As shown in  FIG. 5 , the first semiconductor element  30   a  has a thickness T C1  in the Z-direction; and the second semiconductor element  30   b  has a thickness T C2  in the Z-direction. The second semiconductor element  30   b  is disposed so that T C2 &gt;T C1 . The difference between the thickness T C2  and the thickness T C1  is set not to exceed a range in which all of the metal plates  35  can contact the inner poles  23  when the pressure is applied between the pressure plate  40  and the pressure plate  50 . 
     The third semiconductor element  30   c  is disposed between the first semiconductor element  30   a  and the second semiconductor element  30   b  and has a thickness in the Z-direction that is thinner than the thickness T C2 . The thickness in the Z-direction of the third semiconductor element  30   c  may be the same as the thickness T C1  in the Z-direction of the first semiconductor element  30   a.    
     In the semiconductor device  4 , by disposing the second semiconductor element  30   b  which is thicker than the first semiconductor element  30   a,  it is possible to improve the uniformity of the pressure applied to the semiconductor elements  30  when operating and the reliability of the semiconductor device  4 . 
       FIGS. 6A and 6B  are schematic views showing components of semiconductor devices  5  and  6  according to modifications of the embodiment.  FIGS. 6A and 6B  are schematic views illustrating the arrangement of the electrode plate  10 , the electrode plate  20 , the semiconductor elements  30 , the metal plates  33 , and the metal plates  35  before the pressure is applied between the pressure plate  40  and the pressure plate  50 . 
     In  FIGS. 6A and 6B , the thicknesses in the Z-direction of the semiconductor elements  30  disposed between the electrode plate  10  and the electrode plate  20  are the same; and the thicknesses in the Z-direction of the metal plates  35  are the same. In the examples, the electrode plate  20  is provided so that the height H 2  in the Z-direction is different between the inner poles  23 . 
     In the semiconductor device  5  shown in  FIG. 6A , for example, the inner pole  23   b  disposed at a position most proximal to the outer edge of the electrode plate  20  in a direction parallel to the upper surface of the electrode plate  20  (the surface positioned on the side opposite to the surface where the inner poles  23  are disposed) has a height H 2b  in the Z-direction. The inner poles  23  that are positioned further inward than the inner pole  23   b  have a height H 2a  in the Z-direction. In the example, the heights in the Z-direction of the inner poles  23  have the relationship H 2b &gt;H 2a . 
     In the semiconductor device  6  shown in  FIG. 6B , the electrode plate  20  includes the inner pole  23   a  disposed at the center of the electrode plate  20 , the inner pole  23   b,  and the inner pole  23   c.  The inner pole  23   a  is disposed at the center of the lower surface of the electrode plate  20 . The inner pole  23   c  is positioned between the inner pole  23   a  and the inner pole  23   b.  The inner pole  23   a  has a height H 2a  in the Z-direction; and the inner pole  23   c  has a height H 2c  in the Z-direction. In the example, the heights in the Z-direction of the inner poles  23  have the relationship H 2b &gt;H 2c &gt;H 2a . 
     In the semiconductor devices  5  and  6 , by changing the height in the Z-direction between the inner poles  23  of the electrode plate  20 , it is possible to improve the uniformity of the pressure applied to the semiconductor elements  30  when operating and the reliability of the semiconductor devices  5  and  6 . The embodiment is not limited to the examples; and the heights of the inner poles  13  provided in the electrode plate  10  may be changed. 
       FIG. 7  is a schematic view showing a semiconductor device  7  according to a modification of the embodiment. The semiconductor device  7  has a configuration in which multiple semiconductor modules M 1  to M 3  are stacked between the pressure plate  40  and the pressure plate  50 . A large-current switching control under high voltage can be performed in the semiconductor device  7 . 
     The semiconductor modules M 1  to M 3  each include the electrode plate  10 , the electrode plate  20 , the semiconductor elements  30 , the metal plates  33 , and the second metal plates  35 . The semiconductor modules M 1  to M 3  are stacked with cooling plates  60  interposed. For example, the material of the cooling plate  60  is aluminum; and the cooling plate  60  includes a flow channel  63  through which a cooling medium circulates. 
     The semiconductor modules M 1  to M 3  each include the metal plate  35   a,  the metal plate  35   b,  and the metal plate  35   c.  The metal plate  35   a  has the thickness T S1  in the Z-direction; and the metal plate  35   b  has the thickness T S2  in the Z-direction. The metal plate  35   c  has the thickness T S3  in the Z-direction (referring to  FIG. 4 ). The thicknesses of the metal plates  35  have the relationships T S1  and T S3 &lt;T S2 . 
     Alternately, the semiconductor modules M 1  to M 3  include the first semiconductor element  30   a,  the second semiconductor element  30   b,  and the third semiconductor element  30   c  (referring to  FIG. 5 ) and may be configured so that the thickness T C2  in the Z-direction of the second semiconductor element  30   b  is thicker than the thickness T C1  in the Z-direction of the first semiconductor element  30   a  and a thickness T C3  in the Z-direction of the third semiconductor element  30   c.    
     Thereby, the pressure that is applied to the semiconductor elements  30  when operating may have higher uniformity; and the reliability of the semiconductor device  7  can be improved. 
     While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the invention.