Patent Publication Number: US-7586315-B2

Title: System and method for testing voltage endurance

Description:
BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention generally relates to a test system and, particularly, to a system and method for testing voltage endurance. 
   2. Description of Related Art 
   Electronic devices usually include many kinds of electronic components, such as diodes, bipolar junction transistors, MOSFETs, and capacitors. Breakdown voltage is an important parameter when evaluating performance of the electronic components. Take a diode as an example, if the breakdown voltage of the diode is below a certain minimum as required by the electronic device, the diode will conduct reversely, which can causes unexpected results. 
   A voltage endurance of an electronic component is tested before assembling the electronic component into the electronic device so as to make sure the electronic component will not be damaged by a largest voltage in the electronic device. Referring to  FIG. 5 , a traditional test apparatus  500  includes a microcontroller  510 , a digital to analog (D/A) converter  520 , a power amplifier  530 , and a transformer  540 . The microcontroller  510  generates a digital signal and transmits the digital signal to the D/A converter  520 . The digital signal is converted into an analog signal by the D/A converter  520 . The analog signal is then amplified and transmitted to the transformer  540  by the power amplifier  530 . The transformer  540  transforms voltage of the amplified analog signal to generate an alternating current (AC) voltage. The AC voltage is transmitted to the electronic component as a test signal for testing the electronic component. 
   However, a negative voltage in the test signal will affect precision of a test result. For example, a negative electric potential generated by the negative voltage and stored in capacitors will counteract a part of the test signal in positive voltage. 
   Therefore, an improved system and method for testing voltage endurance is desired. 
   SUMMARY OF THE INVENTION 
   A system for testing voltage endurance of an electronic component, includes a signal generator, a power amplifier, a transform unit, a signal adjust unit, and a voltage reading module. The signal generator is used for generating an oscillating signal. The power amplifier is connected to the signal generator for receiving and amplifying the oscillating signal. The transform unit is coupled to the power amplifier for transforming the amplified oscillating signal to generate a transformed signal. The signal adjust unit is constructed and arranged for blocking a negative voltage of the transformed signal to generate a test signal to be transmitted to the electronic component. The voltage reading module is coupled to the electronic component for detecting electrical characteristics of the electronic component to generate result data. 
   A method for testing voltage endurance of an electronic component, includes: generating an oscillating signal; amplifying the oscillating signal; transforming the amplified oscillating signal to generate a transformed signal; blocking a negative voltage of the transformed signal to generate a test signal to be transmitted to the electronic component; and detecting electrical characteristics of the electronic component to generate result data. 
   Other advantages and novel features will become more apparent from the following detailed description of preferred embodiments when taken in conjunction with the accompanying drawings, in which: 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Many aspects of the system and method for testing voltage endurance can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale, the emphasis instead being placed upon clearly illustrating the principles of the present system. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views. 
       FIG. 1  is a block diagram of a test system in accordance with an exemplary embodiment; 
       FIG. 2  is a detailed block diagram of the test system of  FIG. 1 ; 
       FIG. 3  is a schematic diagram of an exemplary circuit; and 
       FIG. 4  is a flow chart illustrating a procedure of a method for testing voltage endurance in accordance with an exemplary embodiment. 
       FIG. 5  is a diagram of a conventional test apparatus. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   Reference will now be made to the drawings to describe a preferred embodiment of the present system and method for testing voltage endurance. 
   Referring to  FIG. 1 , a block diagram of a test system  100  for testing voltage endurance of an electronic component  200  in accordance with an exemplary embodiment is illustrated. The test system  100  includes a signal module  110 , a voltage reading module  120 , a control module  130 , a display apparatus  140 , and a clamp apparatus  150 . 
   The signal module  110  is configured to connected to the electronic component  200  and to transmit a test signal to the electronic component  200 . 
   The voltage reading module  120  is used for detecting the electronic component  200  while the test signal is transmitted to the electronic component  200 . 
   The control module  130  is coupled to the voltage reading module  120 , the display apparatus  140 , and the clamp apparatus  150  respectively. The control module  130  is configured for receiving result data from the voltage reading module  120 , controlling information displayed on the display apparatus  140 , and signaling the clamp apparatus  150  to clamp or release the electronic component  200 . Before testing the voltage endurance of the electronic component  200 , the clamp apparatus  150  clamps the electronic component to be connected to the test system  100 . 
   Referring to  FIG. 2 , a detailed block diagram of the test system  100  is illustrated. The signal module  110  includes a signal generator  112 , a power amplifier  114 , a transform unit  116 , and a signal adjust unit  118 . 
   The signal generator  112  is configured for outputting an oscillating signal. The signal generator  112  can be selected from a group consisting of a resistor-capacitor (RC) oscillator, a timer circuit, and any other sine wave or square wave signal generating circuits. 
   The power amplifier  114  is connected to the signal generator  112  for receiving and amplifying the oscillating signal. The power amplifier  114  can be selected from a group consisting of a transistor amplifier and an integrated circuit amplifier. 
   The transform unit  116  is coupled to the power amplifier  114  for transforming the amplified oscillating signal to a transformed signal. 
   The signal adjust unit  118  is configured for receiving and adjusting the transformed signal to generate the test signal, such as blocking negative voltages in the transformed signal. 
   The test signal is transmitted to the electronic component  200  for testing the electronic component  200 . The voltage reading module  120  is coupled to the electronic component  200  for detecting electrical characteristics of the electronic component  200 , such as a voltage of the electronic component  200 . The result data outputted by the voltage reading module  120  based on the electrical characteristics is transmitted to the control module  130  for further analyzing. Generally, if the electronic component  200  is damaged, a resistance of the electronic component  200  drops near to zero rapidly. Thus the voltage of the electronic component  200  drops accordingly. 
   The control module  130  includes a processor  132  and a storage unit  134 . The storage unit  134  is used for storing a predetermined value. The processor  132  is configured for comparing the result data with the predetermined value, so as to determine whether the electronic component  200  meets a predefined design requirement, in a preferred embodiment the design requirement represent a voltage endurance value that indicates the electronic component  200  is eligible for being assembled in an electronic device. If the electronic component  200  is eligible for being assembled in the electronic device, the processor  132  sends a first instruction to the display apparatus  140  and the clamp apparatus  150 . In response to the first instruction, the display apparatus  140  displays eligible information of the electronic component  200  on the display apparatus  140 , and the clamp apparatus  150  releases the electronic component  200  to a first area that stores eligible tested electronic components and clamps a next electronic component  200 . If the electronic component  200  is not eligible for being assembled in the electronic device, the processor  132  sends a second instruction to the display apparatus  140  and the clamp apparatus  150 . In response to the second instruction, the display apparatus  140  displays that the electronic component  200  is not eligible for being assembled in the electronic device on the display apparatus  140 , and the clamp apparatus  150  releases the electronic component  200  to a second area that stores ineligible electronic components and clamps the next electronic component. Exemplarily, the clamp apparatus  150  is a pneumatic clamp. 
   Referring to  FIG. 3 , a schematic diagram of an exemplary circuit is illustrated. In the exemplary circuit, a test diode D is employed as an example of the electronic component  200 . The signal generator  112  includes a timer Integrated Circuit (IC) U 1 , a variable resistor W 1 , five resistors R 1 ˜R 5 , five capacitors C 1 ˜C 5 , and a switch S 1 . The power amplifier  114  includes a MOSFET Q 1  and a resistor R 6 . The transform unit  116  includes a transformer T 1 . The signal adjust unit  118  includes a blocking diode D 1  and resistors R 7 ˜R 9 . The voltage reading module  120  includes a digital multimeter  122 . The control module  130  is a computer  136  connected to the digital multimeter  122  via a RS-232 interface. The display module  140  is a LCD monitor  142  coupled to the computer  136  for displaying information. 
   The timer IC U 1  includes a ground port GND, a control port CONT, a trigger port TRIG, a reset port REST, a voltage supply port VCC, an output port OUT, a discharge port DISCH, and a threshold port THRES. The ground port GND and the control port CONT are connected to the ground. The trigger port TRIG is connected to a common node  302  of the capacitors C 1 ˜C 5  via the resistor R 1  and the variable resistor W 1 . The threshold port THRES is connected to the common node  302 . The discharge port DISCH is connected to one end of the switch S 1  via the resistor R 3 , another end of the switch S 1  can be selectively connected to the capacitors C 1 ˜C 5 . The output port OUT is connected to ground via the resistor R 4  and the resistor R 5 . The reset port REST is connected to a voltage source terminal  310  via the resistor R 2 . The voltage supply port VCC is connected to the voltage source terminal  310  directly. 
   An end of a primary winding of the transformer T 1  is connected to the voltage source terminal  310 , another end of the primary winding of the transformer T 1  is connected to the drain terminal of the MOSFET Q 1 . The source terminal of the MOSFET Q 1  is grounded via the resistor R 6 . The gate terminal of the MOSFET Q 1  is connected to the interconnection between the resistor R 4  and the resistor R 5 . An end of a secondary winding of the transformer T 1  is grounded; another end of the secondary winding of the transformer T 1  is connected to the anode of the blocking diode D 1 . The cathode of the blocking diode D 1  is connected to the cathode of the test diode D via the resistor R 7  and the resistor R 8 . The anode of the test diode D is grounded. The resistor R 9  and the digital multimeter  122  are connected in serial and then are parallel to the resistor R 8  and the test diode D. 
   In operation, the oscillating signal is generated by the timer IC U 1  and outputted from the output port OUT. A frequency and duty of the oscillating signal can be adjusted by adjusting the variable resistor W 1  and selecting one of the capacitors C 1 ˜C 5 . The oscillating signal is amplified by the MOSFET Q 1 . The gate terminal of the MOSFET Q 1  is connected to the interconnection between the resistor R 4  and the resistor R 5 , thus a voltage inputted to the gate terminal can be adjusted by setting resistance values of the resistor R 4  and the resistor R 5 . 
   The drain terminal of the MOSFET Q 1  is connected to the primary winding of the transformer T 1 , the amplified oscillating signal is transmitted to the transformer T 1 . The transformer T 1  transforms the amplified oscillating signal to generate the transformed signal and output the transformed signal from the secondary winding. The transformed signal is transmitted to the blocking diode D 1 . The blocking diode D 1  is configured for blocking the negative voltage in the transformed signal and generating the test signal. The resistors R 7  and R 8  are serially connected to the test diode D for dividing the voltage applied on the test diode D. The digital multimeter  122  generates the result data according to the voltage detected from the test diode D. The result data is transmitted to the computer  136  via the RS-232 interface. The computer  136  determines whether the test diode D is eligible or not eligible for being assembled in the electronic device. Generally, the test signal is configured to output the largest voltage to be applied to the test diode. If the test diode D is not breakdown under the largest voltage, thus the digital multimeter  122  will detect a voltage value close to the largest voltage, and the test diode D is eligible for being assembled in the electronic device. If the test diode D is breakdown under the largest voltage, the resistance of the test diode D drops rapidly to almost zero and the voltage of the test diode D drops accordingly. Thus the test diode D is not eligible for being assembled in the electronic device. 
   The test system  100  blocks the negative voltage by the blocking diode D 1 , thus an effect of the negative voltage is avoided. The oscillating signal is generated by the timer IC U 1 , thus the microcontroller and digital to analog converter are not required by the test system  100 . The clamp apparatus  150  clamps and releases the electronic component  200  automatically under the control of the control module  130 . Therefore, prevention actions for electrostatic discharge of manually operation are not required. 
   Referring to  FIG. 4 , an exemplary method for testing the voltage endurance of the electronic component  200  is illustrated. First, in step  402 , the clamp apparatus  150  clamps the electronic component  200  and connects the electronic component  200  to the test system  100 . 
   Then in step  404 , the signal generator  112  outputs the oscillating signal. 
   In step  406 , the power amplifier  114  receives and amplifies the oscillating signal. 
   In step  408 , the transform unit  116  transforms the amplified oscillating signal to generate the transformed signal that includes the largest voltage to test the electronic component  200 . 
   In step  410 , the signal adjust unit  118  receives and adjusts the transformed signal to generate the test signal. 
   In step  412 , the voltage reading module  120  detects the electrical characteristics of the electronic component  200 , such as the voltage of the electronic component  200 . The result data generated by the voltage reading module  120  based on the electrical characteristics is transmitted to the control module  130  for further analyzing. 
   In step  414 , the control module  130  determines whether the electronic component  200  is eligible or not eligible for being assembled in the electronic device. If the electronic component  200  is eligible for being assembled in the electronic device, the first instruction is sent to the display apparatus  140  and the clamp apparatus  150 . In response to the first instruction, the display apparatus  140  displays the eligible information on the display apparatus  140 , and the clamp apparatus  150  releases the electronic component  200  to the first area for storing the eligible electronic components and clamps the next electronic component (step  416 ). If the electronic component  200  is not eligible for being assembled in the electronic device, the second instruction is sent to the display apparatus  140  and the clamp apparatus  150 . In response to the second instruction, the display apparatus  140  displays the ineligible information on the display apparatus  140 , and the clamp apparatus  150  releases the electronic component  200  to the second area for storing the ineligible electronic components and clamps the next electronic component (step  418 ). 
   The embodiments described herein are merely illustrative of the principles of the present invention. Other arrangements and advantages may be devised by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, the present invention should be deemed not to be limited to the above detailed description, but rather by the spirit and scope of the claims that follow, and their equivalents.