Patent Publication Number: US-2017364424-A1

Title: Hardware assist mechanisms for alive detection of redundant devices

Description:
TECHNICAL FIELD 
     This disclosure relates generally to the use of redundant devices in industrial process control and automation systems and other systems. More specifically, this disclosure relates to hardware assist mechanisms for alive detection of redundant devices. 
     BACKGROUND 
     Industrial process control and automation systems are often used to automate large and complex industrial processes. These types of systems routinely include sensors, actuators, and controllers. Some of the controllers receive measurements from the sensors and generate control signals for the actuators. Other controllers perform higher-level functions, such as planning, scheduling, and optimization operations. 
     Equipment redundancy and fault tolerance are often desired in an industrial process control and automation system. For example, controllers that receive sensor measurements and generate actuator control signals are often arranged in redundant pairs. One controller in a redundant pair typically operates in a primary mode and actively controls an industrial process (or portion thereof). Another controller in the redundant pair typically operates in a backup or secondary mode and, upon a fault or other problem with the primary controller, transitions to the primary mode. 
     SUMMARY 
     This disclosure provides hardware assist mechanisms for alive detection of redundant devices. 
     In a first embodiment, an apparatus includes a first hardware assist device and at least one processing device. The first hardware assist device includes at least one transmitter configured to transmit at least one first signal to a second hardware assist device of a redundant second apparatus. The at least one first signal indicates to the second hardware assist device that the apparatus is functional. The first hardware assist device also includes at least one receiver configured to receive at least one second signal from the second hardware assist device. The at least one second signal indicates to the first hardware assist device that the second apparatus is functional. The first hardware assist device further includes a timer configured to control a driver in order to block transmission of the at least one first signal in response to a fault associated with the apparatus. The at least one processing device is configured to perform one or more actions in response to a loss of the at least one second signal from the second apparatus. 
     In a second embodiment, a system includes first and second devices forming at least part of a redundant set of devices. The first device includes a first hardware assist device and at least one processing device. The first hardware assist device includes at least one transmitter configured to transmit at least one first signal to a second hardware assist device of the second device. The at least one first signal indicates to the second hardware assist device that the first device is functional. The first hardware assist device also includes at least one receiver configured to receive at least one second signal from the second hardware assist device. The at least one second signal indicates to the first hardware assist device that the second device is functional. The first hardware assist device further includes a timer configured to control a driver in order to block transmission of the at least one first signal in response to a fault associated with the first device. The at least one processing device configured to perform one or more actions in response to a loss of the at least one second signal from the second device. 
     In particular embodiments, the second device includes the second hardware assist device and at least one second processing device. The second hardware assist device includes at least one second transmitter configured to transmit the at least one second signal to the first hardware assist device. The second hardware assist device also includes at least one second receiver configured to receive the at least one first signal from the first hardware assist device. The second hardware assist device further includes a second timer configured to control a second driver in order to block transmission of the at least one second signal in response to a fault associated with the second device. The at least one second processing device is configured to perform one or more actions in response to a loss of the at least one first signal from the first device. 
     In a third embodiment, a method includes, at a first hardware assist device associated with a first apparatus, transmitting at least one first signal to a second hardware assist device of a redundant second apparatus. The at least one first signal indicates to the second hardware assist device that the first apparatus is functional. The method also includes, at the first hardware assist device associated with the first apparatus, receiving at least one second signal from the second hardware assist device. The at least one second signal indicates to the first hardware assist device that the second apparatus is functional. The method further includes, at the first hardware assist device associated with the first apparatus, controlling a driver in order to block transmission of the at least one first signal in response to a fault associated with the first apparatus. In addition, the method includes performing one or more first actions in response to a loss of the at least one second signal from the second apparatus. 
     In particular embodiments, the method also includes, at the second hardware assist device, transmitting the at least one second signal to the first hardware assist device, receiving the at least one first signal from the first hardware assist device, and controlling a second driver in order to block transmission of the at least one second signal in response to a fault associated with the second apparatus. The method further includes performing one or more second actions in response to a loss of the at least one first signal from the first apparatus. 
     Other technical features may be readily apparent to one skilled in the art from the following figures, descriptions, and claims. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       For a more complete understanding of this disclosure, reference is now made to the following description, taken in conjunction with the accompanying drawings, in which: 
         FIG. 1  illustrates an example industrial process control and automation system according to this disclosure; 
         FIGS. 2A and 2B  illustrate example systems with redundant devices supporting hardware assist mechanisms for alive detection according to this disclosure; 
         FIGS. 3A and 3B  illustrate example signaling between hardware assist mechanisms for alive detection according to this disclosure; 
         FIGS. 4 and 5  illustrate example hardware assist mechanisms for alive detection of redundant devices according to this disclosure; 
         FIG. 6  illustrates an example communication protocol used by a hardware assist mechanism for alive detection according to this disclosure; and 
         FIG. 7  illustrates an example method for alive detection using a hardware assist mechanism according to this disclosure. 
     
    
    
     DETAILED DESCRIPTION 
       FIGS. 1 through 7 , discussed below, and the various embodiments used to describe the principles of the present invention in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the invention. Those skilled in the art will understand that the principles of the invention may be implemented in any type of suitably arranged device or system. 
     It is often necessary or desirable to provide redundant components in an industrial process control and automation system or other system. For example, pairs of redundant process controllers could be used in an industrial process control and automation system to provide more reliable process control operations in the system. In some instances, it may be necessary or desirable for each device in a redundant pair to detect if the other device in the redundant pair is active and functioning correctly. This allows a device functioning in a backup or secondary mode to transition into a primary mode under appropriate circumstances. This also allows a device functioning in the primary mode to identify a fault or other problem with a device operating in the secondary mode and to generate a warning that redundancy is no longer available. 
     The ability of one device to detect if another device is available may be referred to as “alive detection.” Each device in a redundant pair could perform alive detection to verify whether the other device in the redundant pair is active and available. In some conventional approaches, each device relies on a communication timeout to detect the absence of a redundant device. Communication timeouts typically occur after a prolonged period without communication from a redundant device, such as about 500 or 600 milliseconds. This may not be suitable for industrial process control and automation systems or other systems where redundant devices need to assume a primary mode more quickly, such as within about 10 or 20 milliseconds. 
     Also, in some conventional approaches, it is difficult to distinguish between a fault in a communication path between redundant devices and an absence of a redundant device due to a fault with the redundant device. The absence of a redundant device could be due to a number of reasons, such as user removal of the redundant device from service, a hardware fault, or a power loss. If a primary device becomes absent, a secondary device should transition into the primary mode in order to compensate for the loss of the primary device. However, when a fault in a communication path between redundant devices occurs, signals cannot be transported between the redundant devices. The primary device may still be operating correctly, but the secondary device may be unable to determine if the primary device is active. In those cases, it may not be desirable to have the secondary device transition into the primary mode since there would then be two devices operating in the primary mode. If that occurs with process controllers, for example, the process controllers could interfere with each other&#39;s operations. 
     This disclosure provides various hardware assist mechanisms for alive detection of redundant devices. The hardware assist mechanisms facilitate faster detection of a missing or unavailable redundant device. Among other things, this allows a secondary device to transition into a primary mode more quickly. Moreover, the hardware assist mechanisms could provide support for redundant signaling between redundant devices, reducing the likelihood that a single communication path fault will prevent the redundant devices from detecting one another. 
       FIG. 1  illustrates an example industrial process control and automation system  100  according to this disclosure. As shown in  FIG. 1 , the system  100  includes various components that facilitate production or processing of at least one product or other material. For instance, the system  100  is used here to facilitate control over components in one or multiple industrial plants  101   a - 101   n . Each plant  101   a - 101   n  represents one or more processing facilities (or one or more portions thereof), such as one or more manufacturing facilities for producing at least one product or other material. In general, each plant  101   a - 101   n  may implement one or more processes and can individually or collectively be referred to as a process system. A process system generally represents any system or portion thereof configured to process one or more products or other materials in some manner. 
     In  FIG. 1 , the system  100  is implemented using the Purdue model of process control. In the Purdue model, “Level 0” may include one or more sensors  102   a  and one or more actuators  102   b . The sensors  102   a  and actuators  102   b  represent components in a process system that may perform any of a wide variety of functions. For example, the sensors  102   a  could measure a wide variety of characteristics in the process system, such as temperature, pressure, or flow rate. Also, the actuators  102   b  could alter a wide variety of characteristics in the process system. The sensors  102   a  and actuators  102   b  could represent any other or additional components in any suitable process system. Each of the sensors  102   a  includes any suitable structure for measuring one or more characteristics in a process system. Each of the actuators  102   b  includes any suitable structure for operating on or affecting one or more conditions in a process system. 
     At least one network  104  is coupled to the sensors  102   a  and actuators  102   b . The network  104  facilitates interaction with the sensors  102   a  and actuators  102   b . For example, the network  104  could transport measurement data from the sensors  102   a  and provide control signals to the actuators  102   b . The network  104  could represent any suitable network or combination of networks. As particular examples, the network  104  could represent an Ethernet network, an electrical signal network (such as a HART or FOUNDATION FIELDBUS network), a pneumatic control signal network, or any other or additional type(s) of network(s). 
     In the Purdue model, “Level 1” may include controllers  106   a - 106   b , which are coupled to the network  104 . Among other things, each of the controllers  106   a - 106   b  may use the measurements from one or more sensors  102   a  to control the operation of one or more actuators  102   b . For example, each controller  106   a - 106   b  could receive measurement data from one or more sensors  102   a  and use the measurement data to generate control signals for one or more actuators  102   b . Each controller  106   a - 106   b  includes any suitable structure for interacting with one or more sensors  102   a  and controlling one or more actuators  102   b . Each controller  106   a - 106   b  could, for example, represent a multivariable controller, such as a Robust Multivariable Predictive Control Technology (RMPCT) controller or other type of controller implementing model predictive control (MPC) or other advanced predictive control (APC). As a particular example, each controller  106   a - 106   b  could represent a computing device running a real-time operating system. 
     Two networks  108  are coupled to the controllers  106   a - 106   b . The networks  108  facilitate interaction with the controllers  106   a - 106   b , such as by transporting data to and from the controllers  106   a - 106   b . The networks  108  could represent any suitable networks or combination of networks. As particular examples, the networks  108  could represent a pair of Ethernet networks or a redundant pair of Ethernet networks, such as a FAULT TOLERANT ETHERNET (FTE) network from HONEYWELL INTERNATIONAL INC. 
     At least one switch/firewall  110  couples the networks  108  to two networks  112 . The switch/firewall  110  may transport traffic from one network to another. The switch/firewall  110  may also block traffic on one network from reaching another network. The switch/firewall  110  includes any suitable structure for providing communication between networks, such as a HONEYWELL CONTROL FIREWALL (CF9) device. The networks  112  could represent any suitable networks, such as a pair of Ethernet networks or an FTE network. 
     In the Purdue model, “Level 2” may include one or more machine-level controllers  114  coupled to the networks  112 . The machine-level controllers  114  perform various functions to support the operation and control of the controllers  106   a - 106   b , sensors  102   a , and actuators  102   b , which could be associated with a particular piece of industrial equipment (such as a boiler or other machine). For example, the machine-level controllers  114  could log information collected or generated by the controllers  106   a - 106   b , such as measurement data from the sensors  102   a  or control signals for the actuators  102   b . The machine-level controllers  114  could also execute applications that control the operation of the controllers  106   a - 106   b , thereby controlling the operation of the actuators  102   b . In addition, the machine-level controllers  114  could provide secure access to the controllers  106   a - 106   b . Each of the machine-level controllers  114  includes any suitable structure for providing access to, control of, or operations related to a machine or other individual piece of equipment. Each of the machine-level controllers  114  could, for example, represent a server computing device running a MICROSOFT WINDOWS operating system. Although not shown, different machine-level controllers  114  could be used to control different pieces of equipment in a process system (where each piece of equipment is associated with one or more controllers  106   a - 106   b , sensors  102   a , and actuators  102   b ). 
     One or more operator stations  116  are coupled to the networks  112 . The operator stations  116  represent computing or communication devices providing user access to the machine-level controllers  114 , which could then provide user access to the controllers  106   a - 106   b  (and possibly the sensors  102   a  and actuators  102   b ). As particular examples, the operator stations  116  could allow users to review the operational history of the sensors  102   a  and actuators  102   b  using information collected by the controllers  106   a - 106   b  and/or the machine-level controllers  114 . The operator stations  116  could also allow the users to adjust the operation of the sensors  102   a , actuators  102   b , controllers  106   a - 106   b , or machine-level controllers  114 . In addition, the operator stations  116  could receive and display warnings, alerts, or other messages or displays generated by the controllers  106   a - 106   b  or the machine-level controllers  114 . Each of the operator stations  116  includes any suitable structure for supporting user access and control of one or more components in the system  100 . Each of the operator stations  116  could, for example, represent a computing device running a MICROSOFT WINDOWS operating system. 
     At least one switch/firewall  118  couples the networks  112  to two networks  120 . The switch/firewall  118  includes any suitable structure for providing communication between networks, such as a secure switch or combination switch/firewall. The networks  120  could represent any suitable networks, such as a pair of Ethernet networks or an FTE network. 
     In the Purdue model, “Level 3” may include one or more unit-level controllers  122  coupled to the networks  120 . Each unit-level controller  122  is typically associated with a unit in a process system, which represents a collection of different machines operating together to implement at least part of a process. The unit-level controllers  122  perform various functions to support the operation and control of components in the lower levels. For example, the unit-level controllers  122  could log information collected or generated by the components in the lower levels, execute applications that control the components in the lower levels, and provide secure access to the components in the lower levels. Each of the unit-level controllers  122  includes any suitable structure for providing access to, control of, or operations related to one or more machines or other pieces of equipment in a process unit. Each of the unit-level controllers  122  could, for example, represent a server computing device running a MICROSOFT WINDOWS operating system. Although not shown, different unit-level controllers  122  could be used to control different units in a process system (where each unit is associated with one or more machine-level controllers  114 , controllers  106   a - 106   b , sensors  102   a , and actuators  102   b ). 
     Access to the unit-level controllers  122  may be provided by one or more operator stations  124 . Each of the operator stations  124  includes any suitable structure for supporting user access and control of one or more components in the system  100 . Each of the operator stations  124  could, for example, represent a computing device running a MICROSOFT WINDOWS operating system. 
     At least one router/firewall  126  couples the networks  120  to two networks  128 . The router/firewall  126  includes any suitable structure for providing communication between networks, such as a secure router or combination router/firewall. The networks  128  could represent any suitable networks, such as a pair of Ethernet networks or an FTE network. 
     In the Purdue model, “Level 4” may include one or more plant-level controllers  130  coupled to the networks  128 . Each plant-level controller  130  is typically associated with one of the plants  101   a - 101   n , which may include one or more process units that implement the same, similar, or different processes. The plant-level controllers  130  perform various functions to support the operation and control of components in the lower levels. As particular examples, the plant-level controller  130  could execute one or more manufacturing execution system (MES) applications, scheduling applications, or other or additional plant or process control applications. Each of the plant-level controllers  130  includes any suitable structure for providing access to, control of, or operations related to one or more process units in a process plant. Each of the plant-level controllers  130  could, for example, represent a server computing device running a MICROSOFT WINDOWS operating system. 
     Access to the plant-level controllers  130  may be provided by one or more operator stations  132 . Each of the operator stations  132  includes any suitable structure for supporting user access and control of one or more components in the system  100 . Each of the operator stations  132  could, for example, represent a computing device running a MICROSOFT WINDOWS operating system. 
     At least one router/firewall  134  couples the networks  128  to one or more networks  136 . The router/firewall  134  includes any suitable structure for providing communication between networks, such as a secure router or combination router/firewall. The network  136  could represent any suitable network, such as an enterprise-wide Ethernet or other network or all or a portion of a larger network (such as the Internet). 
     In the Purdue model, “Level 5” may include one or more enterprise-level controllers  138  coupled to the network  136 . Each enterprise-level controller  138  is typically able to perform planning operations for multiple plants  101   a - 101   n  and to control various aspects of the plants  101   a - 101   n . The enterprise-level controllers  138  can also perform various functions to support the operation and control of components in the plants  101   a - 101   n . As particular examples, the enterprise-level controller  138  could execute one or more order processing applications, enterprise resource planning (ERP) applications, advanced planning and scheduling (APS) applications, or any other or additional enterprise control applications. Each of the enterprise-level controllers  138  includes any suitable structure for providing access to, control of, or operations related to the control of one or more plants. Each of the enterprise-level controllers  138  could, for example, represent a server computing device running a MICROSOFT WINDOWS operating system. In this document, the term “enterprise” refers to an organization having one or more plants or other processing facilities to be managed. Note that if a single plant  101   a  is to be managed, the functionality of the enterprise-level controller  138  could be incorporated into the plant-level controller  130 . 
     Access to the enterprise-level controllers  138  may be provided by one or more operator stations  140 . Each of the operator stations  140  includes any suitable structure for supporting user access and control of one or more components in the system  100 . Each of the operator stations  140  could, for example, represent a computing device running a MICROSOFT WINDOWS operating system. 
     Various levels of the Purdue model can include other components, such as one or more databases. The database(s) associated with each level could store any suitable information associated with that level or one or more other levels of the system  100 . For example, a historian  142  can be coupled to the network  136 . The historian  142  could represent a component that stores various information about the system  100 . The historian  142  could, for instance, store information used during production scheduling and optimization. The historian  142  represents any suitable structure for storing and facilitating retrieval of information. Although shown as a single centralized component coupled to the network  136 , the historian  142  could be located elsewhere in the system  100 , or multiple historians could be distributed in different locations in the system  100 . 
     In particular embodiments, the various controllers and operator stations in  FIG. 1  may represent computing devices. For example, each of the controllers and operator stations could include one or more processing devices and one or more memories for storing instructions and data used, generated, or collected by the processing device(s). Each of the controllers and operator stations could also include at least one network interface, such as one or more Ethernet interfaces or wireless transceivers. 
     Various components in the system  100  could be arranged in a redundant configuration. For example, the controllers  106   a - 106   b  could operate in a redundant configuration, such as when one controller  106   a  operates as a primary controller while another controller  106   b  operates as a backup controller. The backup controller can synchronize with the primary controller and can take over for the primary controller in the event of a fault or other problem with the primary controller. To support alive detection for redundant devices, each of the controllers  106   a - 106   b  could include a hardware assist device  144 , which can be used at each controller  106   a - 106   b  to detect the presence of the other controller  106   a - 106   b . Different implementations of the hardware assist device  144  are described below. Note that while shown here as being used in redundant process controllers, hardware assist devices  144  could be used in any other suitable redundant devices, and those redundant devices need not be used for process control or automation. 
     Although  FIG. 1  illustrates one example of an industrial process control and automation system  100 , various changes may be made to  FIG. 1 . For example, a control system could include any number of sensors, actuators, controllers, servers, operator stations, networks, and hardware assist devices. Also, the makeup and arrangement of the system  100  in  FIG. 1  is for illustration only. Components could be added, omitted, combined, or placed in any other suitable configuration according to particular needs. Further, particular functions have been described as being performed by particular components of the system  100 . This is for illustration only. In general, process control systems are highly configurable and can be configured in any suitable manner according to particular needs. In addition, while  FIG. 1  illustrates one example environment in which a hardware assist mechanism for alive detection can be used, this functionality can be used in any other suitable device or system (whether or not that device or system is used for process control and automation). 
       FIGS. 2A and 2B  illustrate example systems  200  and  250  with redundant devices supporting hardware assist mechanisms for alive detection according to this disclosure. The redundant devices shown here could denote the process controllers  106   a - 106   b  in the system  100  of  FIG. 1 . However, the redundant devices could denote any other suitable redundant devices in any suitable system. 
     In  FIG. 2A , redundant devices  202   a - 202   b  denote any suitable redundant devices that perform any desired functionality in a system. For example, the redundant devices  202   a - 202   b  could denote redundant programmable logic controllers (PLCs) or other process controllers or redundant remote terminal units (RTUs) (also sometimes referred to as remote telemetry units). The redundant devices  202   a - 202   b  could reside in a common structure, such as when the redundant devices  202   a - 202   b  are connected to different slots of a common backplane  204 . Alternatively, the redundant devices  202   a - 202   b  could be separated from one another by more significant distance. 
     Each device  202   a - 202   b  includes one or more communication interfaces  206   a - 206   b , respectively. The communication interfaces  206   a - 206   b  support communications with one or more external devices or systems. For example, the communication interfaces  206   a - 206   b  could allow the devices  202   a - 202   b  to transmit or receive data over one or more external networks or communication links. Each communication interface  206   a - 206   b  includes any suitable structure configured to transmit or receive information, such as a 10/100/1000 Ethernet interface. While four communication interfaces  206   a - 206   b  are shown in each device  202   a - 202   b , each device  202   a - 202   b  could include any suitable number of communication interfaces  206   a - 206   b.    
     Each device  202   a - 202   b  also includes an additional communication interface  208   a - 208   b , respectively. The communication interfaces  208   a - 208   b  support the transport of data between the devices  202   a - 202   b , such as data used to synchronize one device in the secondary mode with another device in the primary mode. Each communication interface  208   a - 208   b  includes any suitable structure configured to transmit or receive information, such as a 10/100/1000 Ethernet interface. While a single communication interface  208   a - 208   b  is shown in each device  202   a - 202   b , each device  202   a - 202   b  could include any suitable number of communication interfaces  208   a - 208   b . At least one communication link  210  couples the communication interfaces  208   a - 208   b . The communication link  210  denotes any suitable communication medium, such as a communication link embedded within the backplane  204 . 
     Each device  202   a - 202   b  further includes a hardware assist device  212   a - 212   b , respectively. The hardware assist devices  212   a - 212   b  denote hardware components used to facilitate faster identification of the loss of a redundant device. For example, as described in more detail below, the hardware assist devices  212   a - 212   b  can transmit signals to one another during normal operation. Upon a fault or other problem with a first device  202   a - 202   b , the hardware assist device  212   a - 212   b  in a second device  202   a - 202   b  can detect the lack of signals from the hardware assist device in the first device. This can occur very quickly, typically much faster than waiting for a communication timeout associated with the communication interfaces  208   a - 208   b.    
     The hardware assist device  212   a  includes one or more “alive” transmitters  214   a - 214   b  and one or more “alive” receivers  216   a - 216   b . Similarly, the hardware assist device  212   b  includes one or more “alive” transmitters  218   a - 218   b  and one or more “alive” receivers  220   a - 220   b . Each transmitter  214   a - 214   b ,  218   a - 218   b  in one device  202   a - 202   b  can transmit one or more signals to a corresponding receiver  216   a - 216   b ,  220   a - 220   b  in the other device  202   a - 202   b . The presence of these signals can be used by each device  202   a - 202   b  as an indication that the other device  202   a - 202   b  is active and operating as expected. The absence of these signals can be used by each device  202   a - 202   b  as an indication that the other device  202   a - 202   b  has experienced some type of problem. 
     Each transmitter  214   a - 214   b ,  218   a - 218   b  includes any suitable structure for transmitting one or more signals. Each receiver  216   a - 216   b ,  220   a - 220   b  includes any suitable structure for receiving one or more signals. In some embodiments, a transmitter and a receiver could be combined into a single transceiver. In particular embodiments, each transmitter-receiver pair in a hardware assist device  212   a - 212   b  could be implemented using a Universal Asynchronous Receiver/Transmitter (UART) engine. 
     In this example, there is redundancy in the communications between the hardware assist devices  212   a - 212   b . Namely, there are two transmitters and two receivers in each hardware assist device  212   a - 212   b . The transmitters  214   a ,  218   a  and the receivers  216   a ,  220   a  communicate over one or more first communication links  222 , and the transmitters  214   b ,  218   b  and the receivers  216   b ,  220   b  communicate over one or more second communication links  224 . Each of the communication links  222 - 224  denotes any suitable communication medium. In some embodiments, the communication links  222 - 224  could be embedded within the backplane  204 . However, there need not be redundancy in the communications between the hardware assist devices  212   a - 212   b , and each hardware assist device  212   a - 212   b  could include a single alive transmitter and a single alive receiver. 
     It is also possible to include one or more additional interfaces between the redundant devices  202   a - 202   b .  FIG. 2B  illustrates an example in which each redundant device  202   a - 202   b  includes an additional interface  252   a - 252   b , respectively, which are coupled by a communication link  254 . The additional interfaces  252   a - 252   b  could be used to transport any suitable data between the redundant devices  202   a - 202   b . In some embodiments, the additional interfaces  252   a - 252   b  could be used to transport signals indicating which device  202   a - 202   b  is or will be operating in the primary mode and which device  202   a - 202   b  is or will be operating in the secondary mode. Each additional interface  252   a - 252   b  includes any suitable structure configured to transmit or receive information, such as a UART interface. 
     Although  FIGS. 2A and 2B  illustrate examples of systems  200  and  250  with redundant devices  202   a - 202   b  supporting hardware assist mechanisms  212   a - 212   b  for alive detection, various changes may be made to  FIGS. 2A and 2B . For example, the hardware assist devices  212   a - 212   b  could be used in any other suitable devices having any other or additional structural components. Also, a set of redundant devices could include more than two devices, in which case a hardware assist mechanism  212   a - 212   b  could communicate with more than one other device. 
       FIGS. 3A and 3B  illustrate example signaling between hardware assist mechanisms for alive detection according to this disclosure. For ease of explanation,  FIGS. 3A and 3B  are described as illustrating example signaling that could be sent between the hardware assist devices  212   a - 212   b  in the systems  200  and  250  of  FIGS. 2A and 2B . 
     As shown in  FIG. 3A , four signals  302 - 308  are sent between the hardware assist devices  212   a - 212   b . For example, the signals  302  and  304  could be sent by the transmitters  214   a - 214   b , and the signals  306  and  308  could be sent by the transmitters  218   a - 218   b . As noted above, however, only two signals (such as signals  302  and  306 ) may be sent between the hardware assist devices  212   a - 212   b  if redundant communication paths are not used between the hardware assist devices  212   a - 212   b . In this example, each signal  302 - 308  is merely meant to indicate that one device is currently active and available, so each signal  302 - 308  could have the same pattern  310 . The receipt of a signal  302 - 308  is indicative that a device is currently active and available, while the absence of a signal  302 - 308  is indicative that a device may not be currently active or available. In some embodiments with redundant communication paths, only one of multiple signals sent from a first device  202   a - 202   b  may need to be received by a second device  202   a - 202   b  to ensure proper identification of the first device&#39;s status. 
     In particular embodiments, the signaling pattern shown in  FIG. 3A  could be used in the system  250  of  FIG. 2B  or other systems where identical signals can be used. In  FIG. 2B , there are multiple communication paths that could be used by the devices  202   a - 202   b  to exchange information about their modes (namely via the communication interfaces  208   a - 208   b  and  252   a - 252   b ). The alive signals need not be modulated with different patterns to overload the alive signals in order to exchange information about the devices&#39; modes because there are alternate interfaces that can be used to exchange mode information. However, while the same pattern  310  is used in each signal  302 - 308  here, this need not be the case, and any suitable pattern could be used for each signal  302 - 308 . 
     As shown in  FIG. 3B , four signals  352 - 358  are again sent between the hardware assist devices  212   a - 212   b . For example, the signals  352  and  354  could be sent by the transmitters  214   a - 214   b , and the signals  356  and  358  could be sent by the transmitters  218   a - 218   b . Again, however, only two signals (such as signals  352  and  356 ) may be sent between the hardware assist devices  212   a - 212   b  if redundant communication paths are not used. In this example, each signal  352 - 358  indicates that one device is currently active and available. The receipt of a signal  352 - 358  is indicative that a device is currently active and available, while the absence of a signal  352 - 358  is indicative that a device may not be currently active or available. In some embodiments with redundant communication paths, only one of multiple signals sent from a first device  202   a - 202   b  may need to be received by a second device  202   a - 202   b  to ensure proper identification of the first device&#39;s status. 
     Each signal  352 - 358  also conveys additional information, such as the mode of operation in which each device  202   a - 202   b  would like to operate or is operating. For example, a pattern  360  could be used by a device  202   a - 202   b  to indicate that the device is preparing to enter the primary mode, while a pattern  362  could be used by a device  202   a - 202   b  to indicate that the device is operating in the primary mode. Similarly, a pattern  364  could be used by a device  202   a - 202   b  to indicate that the device is preparing to enter the secondary mode, while a pattern  366  could be used by a device  202   a - 202   b  to indicate that the device is operating in the secondary mode. 
     In some embodiments, the signaling pattern shown in  FIG. 3B  could be used in the system  200  of  FIG. 2A  or other systems where non-identical signals can be used. In  FIG. 2A , there may not be multiple communication paths that could be used by the devices  202   a - 202   b  to exchange information about their modes since the communication interfaces  252   a - 252   b  are absent. The alive signals can be modulated with different patterns to overload the alive signals in order to exchange information about the devices&#39; modes. The alive signals could therefore be used to exchange mode information even in the presence of a fault on the communication interfaces  208   a - 208   b.    
     Although  FIGS. 3A and 3B  illustrate examples of signaling between hardware assist mechanisms for alive detection, various changes may be made to  FIGS. 3A and 3B . For example, the specific patterns shown in  FIGS. 3A and 3B  are for illustration only. Any suitable patterns could be used to convey any suitable information between hardware assist mechanisms or between devices. Also, more or fewer unique signal patterns can be used, depending on the amount of information to be exchanged between devices. 
       FIGS. 4 and 5  illustrate example hardware assist devices  212   a - 212   b  for alive detection of redundant devices according to this disclosure. For ease of explanation, the hardware assist devices  212   a - 212   b  shown in  FIGS. 4 and 5  are described as being used in the systems  200  and  250  of  FIGS. 2A and 2B . However, the hardware assist devices  212   a - 212   b  shown in  FIGS. 4 and 5  could be used in any suitable devices and systems. 
     In  FIG. 4 , the hardware assist devices  212   a - 212   b  do not support redundant communication paths, so only the first communication links  222  are present. The communication links  222  support communications between the transmitters  214   a ,  218   a  and the receivers  216   a ,  220   a.    
     Each hardware assist device  212   a - 212   b  includes a memory, such as in the form of a register set  402   a - 402   b . The register sets  402   a - 402   b  are accessible by central processing units (CPUs) or other processing devices  404   a - 404   b , respectively. The processing devices  404   a - 404   b  could denote processing devices used to execute software or firmware instructions of the devices  202   a - 202   b  to perform some desired functionality. Each processing device  404   a - 404   b  denotes any suitable processing or computing device(s), such as one or more microprocessors, microcontrollers, digital signal processors, application specific integrated circuits, field programmable gate arrays, or discrete logic devices. 
     Each register set  402   a - 402   b  here stores a “local role” value that defines the role (primary or secondary) of the redundant device  202   a - 202   b  associated with the register set  402   a - 402   b . The “local role” values in the register sets  402   a  and  402   b  can be used to define or control the alive signals transmitted by the transmitters  214   a  and  218   a , respectively. Each register set  402   a - 402   b  also stores a “partner role” value that identifies the role (primary or secondary) of the other device  202   a - 202   b . The “partner role” values in the register sets  402   a  and  402   b  can be based on the signals received by the receivers  216   a  and  220   a , respectively. 
     Interfaces  405   a - 405   b  can be used to support access to and from the register sets  402   a - 402   b  by the processing devices  404   a - 404   b . Any suitable interfaces  405   a - 405   b  can be used in the hardware assist devices  212   a - 212   b . For example, the interfaces  405   a - 405   b  could denote interfaces supporting an Advanced eXtensible Interface (AXI) protocol. 
     Interrupt signals  406   a - 406   b  can be generated when the associated “partner role” values in the register sets  402   a - 402   b  change, thereby letting the associated processing devices  404   a - 404   b  know of the status changes. As a result, each processing device  404   a - 404   b  could determine whether to initiate a mode change of the associated device  202   a - 202   b , such as when a secondary device is transitioned to the primary mode in response to detecting a loss of a primary device. Each processing device  404   a - 404   b  could also determine whether to generate a notification, such as when a primary device initiates a warning or alarm in response to detecting a loss of a secondary device. The interrupt signals  406   a - 406   b  could be generated by logic  407   a - 407   b , which may denote one or more logic gates, program code, or other functionality implemented within the hardware assist devices  212   a - 212   b.    
     Each register set  402   a - 402   b  further stores a watchdog timer input value (WDT_IN), which is used to control a watchdog timer  408   a - 408   b , respectively. The watchdog timers  408   a - 408   b  control the operations of drivers  410   a - 410   b , respectively. The drivers  410   a - 410   b  can selectively block transmissions from the transmitters  214   a ,  218   a  over the communication links  222 . For example, each watchdog timer  408   a - 408   b  could be regularly reset by the associated processing device  404   a - 404   b  (such as by the processing device  404   a - 404   b  writing a value to the associated WDT_IN register). As long as each processing device  404   a - 404   b  resets its associated watchdog timer  408   a - 408   b , the watchdog timers  408   a - 408   b  allow signals from the transmitters  214   a ,  218   a  to flow over the communication links  222  through the drivers  410   a - 410   b . If one of the processing devices  404   a - 404   b  fails, the processing device stops resetting its watchdog timer  408   a  or  408   b , which then times out and causes the driver  410   a  or  410   b  to block signals from the associated transmitter  214   a  or  218   a  from flowing over the communication links  222 . This allows the watchdog timers  408   a - 408   b  to block the transmissions of alive signals when their associated processing devices  404   a - 404   b  fail. Moreover, this can be done quickly, such as within about 10 milliseconds in some embodiments. 
     Note that the watchdog timers  408   a - 408   b  could also be controlled in other ways. For example, firmware or software instructions could alter the watchdog timer input values stored in the register sets  402   a - 402   b  to disable the transmissions of the alive signals. This could occur, for instance, during an intention shutdown or reboot of a device. 
     In particular embodiments, each hardware assist device  212   a - 212   b  can be implemented using an FPGA, possibly with an associated processing device  404   a - 404   b  formed on an integrated circuit chip. For example, devices such as the ZYNQ-7000 family of devices from XILINX INC. can include a programmable FPGA used in conjunction with a multipoint control unit (MCU) or other processing device. 
     In  FIG. 5 , the hardware assist devices  212   a - 212   b  support redundant communications, so the first and second communication links  222 - 224  are present. The first communication links  222  support communications between the transmitters  214   a ,  218   a  and the receivers  216   a ,  220   a . The second communication links  224  support communications between the transmitters  214   b ,  218   b  and the receivers  216   b ,  220   b.    
     The register sets  402   a - 402   b  in  FIG. 5  have been expanded to store two “local role” values and two “partner role” values. The “local role” values in each register set  402   a - 402   b  control the signals transmitted by the transmitters  214   a - 214   b  or  218   a - 218   b . However, each device  202   a - 202   b  could operate in only a single local role, so each register set  402   a - 402   b  could alternatively store a single “local role” value that is shared by multiple transmitters  214   a - 214   b  or  218   a - 218   b . The “partner role” values in each register set  402   a - 402   b  are based on signals received by the receivers  216   a - 216   b  or  220   a - 220   b . In some embodiments, an interrupt signal  406   a  or  406   b  could be asserted whenever both “partner role” values in the associated register set  402   a - 402   b  indicate that a partner device is absent. The hardware assist devices  212   a - 212   b  in  FIG. 5  have also been expanded to include additional drivers  410   c - 410   d , respectively. The drivers  410   c - 410   d  control whether transmissions from the transmitters  214   b  and  218   b  are allowed to pass onto the second communication links  224 . 
     The remainder of  FIG. 5  is similar in structure to that of  FIG. 4  discussed above. For simplicity, the same watchdog timer  408   a - 408   b  in each hardware assist device  212   a - 212   b  could be used to control the multiple drivers  410   a ,  410   c  or  410   b ,  410   d  in that hardware assist device. However, it is also possible to use separate watchdog timers for the separate drivers in each hardware assist device  212   a - 212   b.    
     In some embodiments, testing the hardware assist devices  212   a - 212   b  can occur, such as at a specified interval or at other times. For example, one of the hardware assist devices  212   a - 212   b  could intentionally disable its alive transmission over one of the communication links  222  and  224 . The other hardware assist device  212   a - 212   b  could then determine whether the loss of the alive signal on that communication link is detected (such as by verifying whether one “partner role” value changes while the other “partner role” value does not change). This may allow, for example, verification that each hardware assist device  212   a - 212   b  is operating correctly and that the communication links  222 - 224  are not shorted together. This type of test could occur in one or both directions on each communication link  222 - 224 . 
     In this way, the hardware assist devices  212   a - 212   b  can use the transmitters  214   a - 214   b ,  218   a - 218   b  to generate alive signals (possibly continuously) in order to indicate to one another that the devices  202   a - 202   b  are active and available. In response to a fault or other problem, one or more transmitters  214   a - 214   b  or  218   a - 218   b  cease to generate alive signals, rapidly providing an immediate and explicit notification that one of the redundant devices  202   a - 202   b  has faulted or powered-off. The transmitted alive signals can be dynamic in nature to be immune from short or open faults on the signal paths, and the alive signals can be periodically and individually tested to ensure that there are no latent faults (such as a short across redundant signal paths). As can be seen above, the hardware assist devices  212   a - 212   b  can employ “negative logic” in that the transmitted signals may be continuously sent unless and until there is a fault, at which point the transmission(s) can stop. 
     Although  FIGS. 4 and 5  illustrate examples of hardware assist devices  212   a - 212   b  for alive detection of redundant devices, various changes may be made to  FIGS. 4 and 5 . For example, any other suitable hardware components could be used to implement the functions of the hardware assist devices  212   a - 212   b  described above. Also, alive transmitters and alive receivers in two hardware assist devices  212   a - 212   b  could be configured to share a single communication link, such as when switches are used to reverse the direction of communications over a communication link. In addition, while certain components are shown in  FIGS. 4 and 5  as being implemented within FPGAs, various components could also be implemented outside of the FPGAs. For instance, it may be considered a “best practice” to implement a watchdog timer outside of an FPGA, so the watchdog timers  408   a - 408   b  could be coupled to the FPGAs. 
       FIG. 6  illustrates an example communication protocol used by a hardware assist mechanism for alive detection according to this disclosure. In particular,  FIG. 6  illustrates an example timing diagram  600  for communications between two hardware assist mechanisms, such as hardware assist devices  212   a - 212   b.    
     As shown in  FIG. 6 , the timing diagram  600  defines a repeating pattern frame, where each frame includes at least one start bit  602 , a payload  604 , and at least one stop bit  606 . In this particular example, there is one start bit  602  having a low logic value, an eight-bit payload  604 , and two stop bits  606  having a high logic value. At a rate of 115,200 bits per second and a pattern frame size 11 bits, each pattern frame could be transmitted between the hardware assist devices  212   a - 212   b  in about 95.5 microseconds. 
     As noted above, in some embodiments, signals sent between the hardware assist devices  212   a - 212   b  could define four patterns. Those patterns could identify whether a device is preparing to enter the primary mode, in the primary mode, preparing to enter the secondary mode, or in the secondary mode. These four patterns can be defined using different bit patterns within the payload  604  of the repeating pattern frame. In particular embodiments, the different bit patterns that could be sent within the payload  604  could be defined as follows. 
                         TABLE 1               Bit Pattern Code   Definition                  0b1010_1111   Pending Primary Role       0b1001_1111   Pending Secondary Role       0b1010_1010   Primary Role       0b1100_1100   Secondary Role       Other value, bad frame, or no signal   Partner is not alive                    
The payload  604  in two consecutive frames can be received and compared to identify a change in the status of a partner device. A change in payload values could cause an interrupt  406   a - 406   b  to be asserted. Also, a lack of a signal or the receipt of one or more bad frames could cause the interrupt  406   a - 406   b  to be asserted.
 
     Although  FIG. 6  illustrates one example of a communication protocol used by a hardware assist mechanism for alive detection, various changes may be made to  FIG. 6 . For example, any other suitable communication protocol could be used by the hardware assist devices  212   a - 212   b.    
       FIG. 7  illustrates an example method  700  for alive detection using a hardware assist mechanism according to this disclosure. For ease of explanation, the method  700  is described with respect to the hardware assist devices  212   a - 212   b  implemented as shown in  FIGS. 4 and 5 . However, the method  700  could be used with any other suitable devices and in any suitable system. 
     As shown in  FIG. 7 , devices in a redundant set are operated after initial role determinations at step  702 . This could include, for example, the devices  202   a - 202   b  operating to select initial operating modes, such as one device in primary mode and another device in secondary mode. This could also include the devices  202   a - 202   b  performing control operations in an industrial process control and automation system. This could further include the devices  202   a - 202   b  synchronizing with one another so that the secondary device can enter the primary mode if and when needed. 
     Alive signals are generated and transmitted between hardware assist devices of the redundant devices at step  704 . This could include, for example, one or more transmitters  214   a - 214   b ,  218   a - 218   b  in each of the hardware assist devices  212   a - 212   b  transmitting one or more alive signals over one or more communication links  222  and  224 . This could also include the watchdog timers  408   a - 408   b  being reset periodically in order to allow the drivers  410   a - 410   b  (or  410   a - 410   d ) to pass the alive signals over the communication links  222  and  224 . One or more alive signals are received and monitored at each device at step  706 . This could include, for example, one or more receivers  216   a - 216   b ,  220   a - 220   b  in each of the hardware assist devices  212   a - 212   b  receiving one or more alive signals over one or more communication links  222  and  224 . 
     A determination is made at each device whether the received alive signal or signals are lost or otherwise negated at step  708 . This could include, for example, an FPGA in each hardware assist device  212   a - 212   b  determining whether one or more alive signals are no longer being received or contain invalid values or bad frames. This could occur repeatedly at a defined interval (such as every 10 milliseconds) or at any other suitable times. If the received alive signals are lost or otherwise negated at one device, it may be indicative of the other device suffering from a fault or otherwise becoming absent. In that case, a determination is made whether the device that is absent is in the primary mode at step  710 . 
     If the absent device is a primary device, a redundancy role change occurs in the secondary device at step  712 . This could include, for example, the processing device  404   a  or  404   b  in the secondary device causing the secondary device to enter the primary mode. If the device represents a process controller, the mode change could cause a secondary process controller to enter the primary mode and begin actively controlling one or more industrial processes. This could also include the secondary device blindly sending a role change command to the other device in step  712 . If the loss of the alive signal(s) is due to a communication fault between the devices  202   a - 202   b  and not due to a fault in the absent device, the absent device may still be functioning, and the role change command can cause the absent device to switch to the secondary mode. 
     If the absent device is not a primary device and is therefore a secondary device, synchronization with the absent device stops at step  714 . This could include, for example, the processing device  404   a  or  404   b  in the primary device causing the primary device to stop sending synchronization information to the absent secondary device. This could also include the primary device sending at least one alarm, warning, or other notification in step  714 . The notification(s) could inform appropriate personnel, a maintenance system, or other destination(s) that redundancy is no longer available with the primary device. 
     At specified intervals (such as every five minutes) or at other times, testing of the hardware assist devices is initiated and occurs at step  716 . This could include, for example, the hardware assist device  212   a - 212   b  of one device  202   a - 202   b  intentionally stopping the transmission of the alive signal(s) to the hardware assist device  212   a - 212   b  of the other device  202   a - 202   b  on one (but not all) communication links  222 - 224 . This could also include the other device  202   a - 202   b  determining whether the hardware assist device  212   a - 212   b  of the other device  202   a - 202   b  accurately detects the lack of the alive signal(s). This could further include the other device  202   a - 202   b  determining whether the hardware assist device  212   a - 212   b  of the other device  202   a - 202   b  continues to accurately detect the alive signal(s) sent over other communication link(s). If a problem is detected in the test at step  718 , a notification identifying the problem is generated at step  720 . This could include, for example, the device  202   a - 202   b  at which the error is noted sending at least one alarm, warning, or other notification. The notification(s) could inform appropriate personnel, a maintenance system, or other destination(s) that accurate alive detection may no longer be possible with the redundant devices. 
     Although  FIG. 7  illustrates one example of a method  700  for alive detection using a hardware assist mechanism, various changes may be made to  FIG. 7 . For example, while shown as a series of steps, various steps in  FIG. 7  could overlap, occur in parallel, occur in a different order, or occur any number of times. 
     In some embodiments, various functions described in this patent document are implemented or supported by a computer program that is formed from computer readable program code and that is embodied in a computer readable medium. The phrase “computer readable program code” includes any type of computer code, including source code, object code, and executable code. The phrase “computer readable medium” includes any type of medium capable of being accessed by a computer, such as read only memory (ROM), random access memory (RAM), a hard disk drive, a compact disc (CD), a digital video disc (DVD), or any other type of memory. A “non-transitory” computer readable medium excludes wired, wireless, optical, or other communication links that transport transitory electrical or other signals. A non-transitory computer readable medium includes media where data can be permanently stored and media where data can be stored and later overwritten, such as a rewritable optical disc or an erasable storage device. 
     It may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The terms “application” and “program” refer to one or more computer programs, software components, sets of instructions, procedures, functions, objects, classes, instances, related data, or a portion thereof adapted for implementation in a suitable computer code (including source code, object code, or executable code). The term “communicate,” as well as derivatives thereof, encompasses both direct and indirect communication. The terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation. The term “or” is inclusive, meaning and/or. The phrase “associated with,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, have a relationship to or with, or the like. The phrase “at least one of,” when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one item in the list may be needed. For example, “at least one of: A, B, and C” includes any of the following combinations: A, B, C, A and B, A and C, B and C, and A and B and C. 
     The description in the present application should not be read as implying that any particular element, step, or function is an essential or critical element that must be included in the claim scope. The scope of patented subject matter is defined only by the allowed claims. Moreover, none of the claims invokes 35 U.S.C. §112(f) with respect to any of the appended claims or claim elements unless the exact words “means for” or “step for” are explicitly used in the particular claim, followed by a participle phrase identifying a function. Use of terms such as (but not limited to) “mechanism,” “module,” “device,” “unit,” “component,” “element,” “member,” “apparatus,” “machine,” “system,” “processor,” or “controller” within a claim is understood and intended to refer to structures known to those skilled in the relevant art, as further modified or enhanced by the features of the claims themselves, and is not intended to invoke 35 U.S.C. §112(f). 
     While this disclosure has described certain embodiments and generally associated methods, alterations and permutations of these embodiments and methods will be apparent to those skilled in the art. Accordingly, the above description of example embodiments does not define or constrain this disclosure. Other changes, substitutions, and alterations are also possible without departing from the spirit and scope of this disclosure, as defined by the following claims.