Patent Publication Number: US-2007096294-A1

Title: Semiconductor device and manufacturing method of the same

Description:
CROSS-REFERENCE OF THE INVENTION  
      This invention is based on Japanese Patent Application No. 2003-161634, the content of which is incorporated herein by reference in its entirety.  
     BACKGROUND OF THE INVENTION  
      1. Field of the Invention:  
      The invention relates to a semiconductor device and a manufacturing method thereof, particularly to a semiconductor device in which devices to be sealed are sealed in a package and a manufacturing method thereof.  
      2. Description of the Related Art:  
      In recent years, a device using a micro electromechanical system (hereafter, referred to as an MEMS device), a charge coupled device (hereafter, referred to as a CCD) used as an image sensor and so on, and a sensor electrically detecting infrared radiation (hereafter, referred to as an IR sensor) are being developed.  
      These electronic devices or micro-sized mechanical devices (hereafter, referred to as electronic devices) are formed on a semiconductor chip and packaged. Such a package includes a can package in which the electronic devices are sealed with a metal cap and a ceramic package in which the electronic devices are sealed with a ceramic cap.  
      Relating technologies are disclosed in the Japanese Patent Application Publications Nos. Hei 11-351959, Hei 11-258055 and 2001-13156.  
      In a conventional package, however, a semiconductor chip formed with devices to be sealed such as electronic devices and a cap for sealing the devices to be sealed are independently prepared and then assembled. This makes a mass-manufacturing procedure complex, and accordingly increases a manufacturing cost. Furthermore, a package size becomes large, resulting in an increase in a mounting area of the package on a printed board.  
     SUMMARY OF THE INVENTION  
      The invention provides a semiconductor device and a manufacturing method thereof which simplifies a manufacturing procedure to reduce a manufacturing cost and reduces a package size when electronic devices are packaged.  
      In a semiconductor device of the invention, a semiconductor chip formed with devices to be sealed on its front surface is attached with a sealing cap, the devices to be sealed being sealed in a cavity formed of a space between the semiconductor chip and the sealing cap. Here, the device to be sealed is an electronic device such as an MEMS device, an IR sensor, and a CCD, or a micro-sized mechanical device.  
      The semiconductor chip is formed with via-holes penetrating therethrough. These via-holes are formed with embedded electrodes. The embedded electrodes are connected with the devices to be sealed through wiring. The embedded electrodes are connected with electrodes for external connection.  
      In the invention, a plurality of sealing caps and semiconductor chips of the semiconductor device are formed on wafers, attached to each other, and divided into a plurality of packages. This procedure can simplify a mass-manufacturing procedure, and reduce a manufacturing cost of each of the packages.  
      Furthermore, via-holes are provided penetrating through the semiconductor chip of each of the packages and embedded electrodes are formed therein, so that bump electrodes can be formed on a bottom of the semiconductor chip. This can miniaturize the package and reduce a mounting area of the package on a printed board.  
      Furthermore, a cavity for sealing devices to be sealed is filled with an inert gas or kept vacuum so that life and reliability of the sealed devices can be extended and improved.  
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       FIG. 1A  is a plan view of a semiconductor device of a first embodiment of the invention, and  FIG. 1B  is a cross-sectional view of line X-X of  FIG. 1A .  
       FIGS. 2A and 2B  are plan views of a semiconductor wafer and a cap arrayed wafer of the first embodiment of the invention.  
       FIGS. 3A, 3B  and  3 C are cross-sectional views for explaining a manufacturing method of the semiconductor device of the first embodiment of the invention.  
       FIG. 4A  is a plan view of a semiconductor device of a second embodiment of the invention, and  FIG. 4B  is a cross-sectional view of line Y-Y of  FIG. 4A . 
    
    
     DETAILED DESCRIPTION OF THE INVENTION  
      Next, a structure of a semiconductor device of a first embodiment of the invention will be described with reference to drawings.  
       FIG. 1A  is a plan view of a semiconductor device of this embodiment.  FIG. 1B  is a cross-sectional view along line X-X of  FIG. 1A .  
      A plurality of MEMS devices  11 A as devices to be sealed (e.g., a relay, a condenser, a coil or a motor) is formed in a region SA (indicated by a dotted line) on a front surface of a semiconductor chip  10 A (e.g., silicon chip). This region SA includes the MEMS devices  11 A that function as a single device. That is, these MEMS devices  11 A are electronic and mechanical components of a micro-sized mechanism such as a micro-machine.  
      Wiring  12  (e.g. made of Cu, Al, or Al alloy) connected with these MEMS devices  11 A is formed extending to a periphery of the region SA. The wiring  12  is formed in a procedure of forming the MEMS devices  11 A on the semiconductor chip  10 A, having a thickness of about 1 μm.  
      A plurality of via-holes  13  is formed right under end portions of the wiring  12  formed extending to the periphery of the region SA, penetrating through the semiconductor chip  10 A. Each of these via-holes  13  is formed with an embedded electrode  14  (e.g., made of Cu, Al or Al alloy) therein. The embedded electrodes  14  are formed by a plating method or a sputtering method, and connected with the wiring  12  of the MEMS devices  11 A. Although the embedded electrodes  14  are completely embedded in the via holes  13  in  FIG. 1B , the embedded electrodes  14  can be partially embedded therein by adjusting a plating time or a sputtering time.  
      The embedded electrodes  14  are formed with bump electrodes  15  (e.g. made of solder) on a back surface of the semiconductor chip  10 A. Accordingly, leads of the packaged semiconductor chip  10 A are not necessary to be drawn from sides of the semiconductor chip  10 A, but can be drawn from the bottom of the semiconductor chip  10 A, thereby realizing miniaturization of the package. This can prevent increasing of a mounting area of the package on a printed board.  
      The front surface of the semiconductor chip  10 A is attached with a sealing cap  20 A made of a glass, a silicon, a ceramic or a resin. The semiconductor chip lOA and the sealing cap  20 A are attached to each other with an adhesive made of an epoxy resin and the like, with the front surface of the semiconductor chip  10 A and a concave portion  21 A of the sealing cap  20 A (inner surface of the sealing cap  20 A) facing each other.  
      A cavity CV is formed in a space between the front surface of the semiconductor chip  10 A and the concave portion  21 A of the sealing cap  20 A. The MEMS devices  11 A are sealed in this cavity CV. The thickness d of the sealing cap  20 A is approximately several ten to several hundred μm, the height h of the cavity CV is approximately several to several ten μm, although the embodiment is not limited to these values.  
      The MEMS devices  11 A formed on the front surface of the semiconductor chip  10 A are sealed in the cavity CV which is filled with an inert gas (e.g., N 2 ) or kept vacuum. This makes the sealed MEMS devices  11 A mechanically protected with the sealing cap  20 A, and prevents the MEMS devices  11 A from being exposed to air, thereby preventing corrosion or degradation with oxidation thereof. Therefore, life and reliability of the MEMS devices  11 A formed on the semiconductor chip  10 A can be extended and improved.  
      When the sealing cap  20 A is made of a glass or a silicon, a surface of the concave portion  21 A can be formed with a metal thin film  22 A having a filter function of blocking or transmitting light having a predetermined wave length. Handling of such a filter made of a metal thin film, which has been difficult to handle with its low strength, can be facilitated by utilizing the cavity CV for forming such a filter  22 A on the surface of the concave portion  21 A of the sealing cap  20 A.  
      Next, a description will be made on a structure formed with the above described semiconductor chips  10 A and sealing caps  20 A with reference to drawings.  
       FIG. 2A  is a plan view of a semiconductor wafer  30 A formed of the plurality of the seinconductor chips  10 A disposed in a matrix.  
      The semiconductor wafer  30 A is made of a semiconductor material such as silicon. The plurality of the semiconductor chips  10 A is partitioned with scribe lines L extending in row and column directions. The MEMS devices  11 A are formed in the region SA, in each of the semiconductor chips  10 A.  
      Although not shown, the wiring  12  is connected with each of the MEMS devices  11 A, extending to the periphery of the region SA.  
       FIG. 2B  is a plan view of a cap arrayed wafer  40 A formed of the above described sealing caps  20 A disposed in a matrix.  
      The cap arrayed wafer  40 A is made of a glass, a silicon, a ceramic or a resin. Each of regions partitioned with scribe lines L′ is to face each of the semiconductor chips  10 A when attached thereto. These scribe lines L′ of the cap arrayed wafer  40 A are formed in accordance with the scribe lines L of the semiconductor wafer  30 A. The two wafers  30 A and  40 A are attached so that the scribe lines L′ of the cap arrayed wafer  40 A are aligned with the scribe lines L of the semiconductor wafer  30 A.  
      Furthermore, the concave portions  21 A are formed on the cap arrayed wafer  40 A in the regions corresponding to the regions SA of the semiconductor chips  10 A. When the cap arrayed wafer  40 A is made of a glass, a silicon or a ceramic, the concave portion  21 A is formed by etching.  
      Alternatively, when the cap arrayed wafer  40 A is made of a resin, the cap arrayed wafer  40 A is formed by injection molding to have the plurality of the concave portions  21 A.  
      Although the embedded electrodes  14  and the bump electrodes  15  serving as electrodes for external connection are connected with the MEMS devices through the wiring  12  in the above described semiconductor chips  10 A and the semiconductor wafer  30 A, the embedded electrodes  14  and the bump electrodes  15  can be directly connected with the MEMS devices  11 A without through the wiring  12 . This is applied to a second embodiment described below.  
      Next, a semiconductor device manufacturing method of this embodiment will be described with reference to drawings.  
      As shown in  FIG. 3A , the semiconductor wafer  30 A formed with the MEMS devices and the wiring  12  (not shown) on its front surface is prepared. The structure of the semiconductor wafer  30 A is the same as the structure shown in  FIG. 2A .  
      Then, the cap arrayed wafer  40 A having the plurality of the concave portion  21 A is prepared. The structure of the cap arrayed wafer  40 A is the same as the structure shown in  FIG. 2B . When the cap arrayed wafer  40 A is made of a glass or a silicon, the surface of the concave portion  21 A can be formed with the metal thin film  22 A having a filter fuiction of blocking or transmitting light having a predetermined wavelength.  
      Then, the cap arrayed wafer  40 A and the semiconductor wafer  30 A are disposed to face the concave portions  21 A of the cap arrayed wafer  40 A and the front surface of the semiconductor wafer  30 A.  
      Next, as shown in  FIG. 3B , the cap arrayed wafer  40 A and the semiconductor wafer  30 A are attached with an adhesive made of an epoxy resin or the like. At this time, each of the concave portions  21 A of the cap arrayed wafer  40 A faces each of the regions SA of the semiconductor wafer  30 A.  
      That is, the cavity CV is formed in a space between each of the concave portions  21 A of the cap arrayed wafer  40 A and the front surface of the semiconductor wafer  30 A, and the MEMS devices  11 A are sealed in this cavity. At this time, the cap arrayed wafer  40 A and the semiconductor wafer  30 A are attached in a vacuum atmosphere to maintain the cavity CV in vacuum. Alternatively, the cap arrayed wafer  40 A and the semiconductor wafer  30 A can be attached in an inert gas (e.g., N 2 ) atmosphere to fill the cavity CV with the inert gas.  
      Then, the semiconductor wafer  30 A is ground on its back surface to make a thickness of the semiconductor wafer  30 A several ten to several hundred μm, for example. Alternatively, this back-grinding can be performed to the cap arrayed wafer  40 A or both the semiconductor wafer  30 A and the cap arrayed wafer  40 A.  
      Next, as shown in  FIG. 3C , the plurality of the via-holes  13  is formed penetrating from the back surface to the front surface of the semiconductor wafer  30 A. An etching method or a laser beam irradiating method can be used for forming these via-holes  13 .  
      The embedded electrodes  14  (e.g., made of Cu, Al or Al alloy) are formed in these via-holes  13  by a plating method or a sputtering method. Furthermore, the embedded electrodes  14  on the back surface of the semiconductor wafer  30  are formed with the bump electrodes  15  (e.g., made of a solder). Although the bump electrodes  15  are formed right under the embedded electrodes  14  in the embodiment shown in  FIG. 3C , the bump electrodes  15  can be formed on a back-surface wiring connected with the embedded electrodes  14 .  
      After the above procedure, the attached cap arrayed wafer  40 A and semiconductor wafer  30 A are cut along the scribe lines L by a dicing blade or laser beams to be divided into each of packages.  
      As described above, the plurality of the packages is formed from the cap arrayed wafer  40 A and the semiconductor wafer  30 A simultaneously, thereby simplifying a mass-manufacturing procedure. This reduces a manufacturing cost of each of the packages.  
      Although the MEMS device  11 A is used as a device to be sealed in the above described embodiment, an electronic device of other kind (e.g. IR, sensor) can be used as a device to be sealed.  
      Next, a structure of a semiconductor device of a second embodiment of the invention will be described with reference to drawings.  
       FIG. 4A  is a plan view of the semiconductor device of this embodiment.  FIG. 4B  is a cross-sectional view along line Y-Y of  FIG. 4A .  
      A CCD  11 B as a device to be sealed is formed in a region SB (indicated by a dotted line) for formation of a device to be sealed on a front surface of a semiconductor chip  10 B. The CCD  11 B is used as, for example, an image sensor. A logic circuit LGC for controlling the CCD  11 B is formed in other region for formation of a device to be sealed, which is adjacent to the region SB, on the semiconductor chip  10 B.  
      Wiring  12  (e.g., made of Cu, Al or Al alloy) connected with the CCD  11 B and its logic circuit LGC is formed extending to a periphery of the region SB and the logic circuit LGC. This wiring  12  is formed in a procedure of forming the CCD  11 B and the logic circuit LGC on the semiconductor chip  10 B, having a thickness of about 1 μm.  
      Furthermore, a plurality of via-holes  13  is formed right under end portions of the wiring  12  formed extending to the periphery of the region SB, penetrating through the semiconductor chip  10 B. Each of the via-holes  13  is formed with an embedded electrode  14  (e.g., made of Cu, Al or Al alloy). The embedded electrodes  14  are formed by a plating method or a sputtering method, and connected with the wiring  12  of the CCD  11 B and the logic circuit LGC.  
      The embedded electrodes  14  are formed with bump electrodes  15  (e.g., made of solder) on a back surface of the semiconductor chip  10 B. Accordingly, leads of the packaged semiconductor chip  10 B are not necessary to be drawn from sides of the semiconductor chip  10 B, but can be drawn from the bottom of the semiconductor chip  10 B, thereby realizing miniaturization of the package. This can prevent increasing of a mounting area of the package on a printed board.  
      A sealing cap  20 B (e.g., made of glass, silicon, or resin) is attached to the front surface of the semiconductor chip  10 B. The semiconductor chip  10 B and the sealing cap  20 B are attached, with the region SB on the front surface of the semiconductor chip  10 B and the concave portion  21 B of the sealing cap  20 B facing each other.  
      A cavity CV is formed in a space between the region SB on the front surface of the semiconductor chip  10 B and the concave portion  21 B of the sealing cap  20 B. The CCD  12 B is sealed in this cavity CV. Here, the CCD  11 B formed on the front surface of the semiconductor chip  10 B is sealed in the cavity CV which is filled with an inert gas or kept in vacuum. This prevents the CCD  11 B from being exposed to air, thereby preventing corrosion or degradation with oxidation thereof. Therefore, life and reliability of the CCD  11 B formed on the semiconductor chip  10 B can be extended and improved.  
      On the region formed with the logic circuit LGC, a convex portion (not shown) of the sealing cap  20 B is attached without forming the cavity CV.  
      The CCD  11 B is thus sealed in the cavity CV in order to prevent stresses generated by a difference in coefficient of thermal expansion between a material of the sealing cap  20 B and a material of the semiconductor chip  10 B from affecting the CCD  11 B. On the other hand, the logic circuit LGC is thus attached with the convex portion of the sealing cap  20 B thereon in order to increase an attachment area of the sealing cap  20 B for obtaining high attachment strength.  
      When the sealing cap  20 B is made of a glass or a silicon, a surface of the concave portion  21 B can be formed with a metal thin film  22 B having a filter function of blocking or transmitting light having a predetermined wave length. Handling of such a filter made of a metal thin film, which has been difficult to handle with its low strength, can be facilitated by utilizing the cavity CV for forming such a filter  22 B on the surface of the concave portion  21 B of the sealing cap  20 B.  
      Next, a structure formed with the plurality of the semiconductor chips  10 B and the sealing caps  20 B on wafers will be described with reference to  FIGS. 2A and 2B .  
      The semiconductor chips  10 B of this embodiment are partitioned with scribe lines L and disposed in a matrix (not shown), in a similar manner as in the semiconductor wafer  30 A shown in  FIG. 2A . However, in this embodiment, the CCDs  11 B are formed in the region SB (corresponding to approximately a half of the regions SA in  FIG. 2A ), and the logic circuits LGC (corresponding to approximately another half of the regains SA in  FIG. 2A ) are formed in positions adjacent the CCDs  11 B. The wiring  12  (not shown) is connected with each of the CCDs  11 B and the logic circuits LGC, extending to the periphery of the region SB and the region formed with the logic circuit LGC.  
      The sealing caps  20 B of this embodiment are partitioned with scribe lines L′ and disposed in a matrix similarly to the cap arrayed wafer  40 A shown in  FIG. 2B  (not shown). However, the concave portions  21 B are formed on the cap arrayed wafer  40 A only in regions corresponding to the regions SB (not shown) provided for formation of a device to be sealed of the semiconductor chip  10 B, in each of the regions partitioned by the scribe lines L′.  
      The concave portion  21 B is formed by etching when the cap arrayed wafer  40 A of this embodiment is made of a glass or silicon. Alternatively, the concave portion  21 B can be formed simultaneously when the cap arrayed wafer  40 A is formed by injection molding if the cap arrayed wafer  40 A is made of a resin.  
      The above described semiconductor wafer and cap arrayed wafer of this embodiment are finally divided in each of the packages through the same procedure of the manufacturing method as that of the first embodiment.  
      Although the CCD  11 B is used as a device to be sealed in the above described embodiment, an electronic device of other kind can be used as a device to be sealed.