Patent Publication Number: US-6661280-B2

Title: Electronic filter circuit with feed back loop

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates to an electronic filter circuit comprising a controllable transconductance. 
     A typical application area of such known filters is a Digital Access Arrangement (DAA) for modems. Such an application like some other applications requires on-chip filters which fulfil the conditions of an adjustable cut-off frequency, a low distortion, a small chip area, and a low current consumption. Filters are in such applications required for synthesizing a line-impedance for correct termination of the telephone line and as part of the trans hybrid for sidetone cancellation. Particularly in the latter case, low distortion figures are of prime importance while different country regulations or various telephone line conditions impose requirements with respect to tunability of the filter. 
     From literature an abundance of filter varieties is known. They can be categorized in time discrete and time continuous realizations. In spite of their accuracy a serious disadvantage of discrete time implementations, like switched capacitor and digital implementations like IIR and FIR structures, is the necessity of additional anti-aliasing filtering which has consequences for chip area. 
     Time continuous filters which feature frequency adjustability, inherently excluding opamp active filters since the cut-off frequency is fixed, usually suffer from non-linearities due to the applied voltage to current converter with variable transconductance. 
     BRIEF SUMMARY OF THE INVENTION 
     It is the object of the present invention to provide a solution overcoming the previously mentioned disadvantages while favourably realising a relatively easily manufacturable low pass on chip filter within the constraints of the earlier mentioned conditions. 
     According to the invention, such is favourably realized by an implementation according to the characterising portion of claim  1 . 
    
    
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
     The invention will now be further elucidated in accordance with a drawing in which: 
     FIG. 1 is a block diagram illustrating the operating principle of the filter according to the invention; 
     FIG. 2 depicts the circuit implementation of the highly linear transconductance amplifier. 
     FIG. 3 is a complete filter circuit diagram implementing the principle provided by FIG.  1 . 
     FIG. 4 is a representation in accordance with FIG. 1 for an application of the invented principle in the voltage domain. 
    
    
     In the Figures identical reference signs relate to corresponding parts or components. In the following the “_n” addition to a reference symbol shall mean the inverse form of the same current or voltage as the case may be. 
     DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1 provides a fully differential symmetrical implementation of the filter circuit according to the invention, comprising a circuit block having signal current in- and output terminals Ii, Ii_n and Io, Io_n respectively. Despite this implementation in the current domain, this is not a prerequisite of the proposed principle. 
     In this Figure the signal input is on the left and the filtered signal output is on the right. 
     Four different elements are distinguished in the diagram of FIG.  1 : 
     a current-current conveyor T which acts as an input buffer and which is characterized by a current transfer T:              T   =       I                   o   T         I                 i                   n   T                 (   1   )                         
      a capacitor C which is in fact the frequency dependent element 
     a linear V to I converter circuit portion G, here alternatively denoted transconductance element G, which converts the voltage across the capacitor to a current. 
     The transfer is:              G   =       I                   o   G         V                 i                   n   G                 (   2   )                         
     two current mirrors M to split the converter current in an output current Io and a feedback current. 
     Because of this feedback current the DC gain of the filter is independent of transfers T and G. 
     In accordance with the invention it is safely assumed that the input resistance of the V-I converter Ri&gt;&gt;1/GT. Thus the frequency dependent filter transfer H(jω) is written as:                H        (   jω   )       =         I                 o       I                 i                 n       =     1     1   +     j                 ω        C     G                 T                       (   3   )                         
     Hence in accordance with the invention the cut-off frequency f −3 dB  is proportional to G and T:                f   -     3                 d                 B       =       G                 T       2      π                 C               (   4   )                         
     FIG. 2 is a circuit diagram with the measure according to the invention of the filter may consist of a current amplifier with frequency independent transfer, a transconductance amplifier means, e.g. V/I converter, with frequency independent transfer and a capacitor C. Because of a feedback loop in this arrangement the DC gain is independent of the current transfer and of the transfer of the transconductance amplifier. The circuit favourably realises an analog filter with a very low distortion and with a continuously variable cut-off frequency for a symmetrical and linear V-I converter to be applied in the complete filter circuit provided by FIG. 3; and 
     FIG. 2, in configurative sense shows a transistor T_ 11  having main conduction path between a VEE supply line and current output terminal Io and a control input connected to the control input of a transistor T_ 9  which has a main conduction path between the VEE line and a feedback output terminal If. 
     The common control input of transistors T_ 11  and T_ 9  is connected to the main connection path of a transistor T_ 7  connected between a VCC supply line and the VEE supply line. Between the connection with said common control input line of transistors T_ 11  and T_ 9 , and said VEE supply line, the main conduction path of transistor T_ 7  is provided with a current source J_ 5 . The control input of transistor T_ 7  is connected to the control input of a transistor T_ 5  which again is connected with the main conduction path of a transistor T_ 1 . Transistor T_ 5  is, like transistor T_ 7 , connected between the VCC supply line and the VEE supply line. The main conduction path of transistor T 5  comprises a current source J_ 3  provided at the downstream side of transistor T 5 , in the same manner as current source J_ 5  in the main conduction path of transistor T_ 7 . 
     Between the current source J_ 3  and the transistor T_ 5  the main conduction path thereof is split so as to form a control input for a transistor T_ 3  provided in the downstream side of the main conduction path of said transistor T_ 1 , connected between the VCC supply line and the VEE supply line. In the upstream side of the main conduction path of transistor T 1  between the connection with the control input of transistors T_ 5  and T_ 7  and the VCC supply line the conduction path comprises a current source J_ 1 . 
     Between the transistors T_ 1  and T_ 3  the main conduction path is connected to a resistor R_c. The control path of transistor T_ 1  is formed by a voltage input line in the form of terminal Vin. The remainder of the circuit is a configuration mirrored over the resistance R_c, such that each mirrored component has a reference of which the number part is one (1) higher than the mirrored component reference to the left of the Figure, e.g. J_ 1  is mirrored as J_ 2  and T_ 7  as T_ 8 . With respect to the current output terminal Io, the feedback terminal If and the voltage input terminal Vin, these are referred to on the mirrored side by the addition of _n, indicating the same signal, however having an inverted form, since mirrored. 
     Functionally, FIG. 2 provides the circuit which converts the voltage across the capacitor into an output and feedback current, being the essence of the filter. A possible implementation of the complete filter on transistor level is given in FIG. 3. A fully differential structure like in the current application offers the advantage of implementation of a common mode loop for DC biasing of the input stage (T_ 1  and T_ 2 ), not shown in the Figure) and suppression of even order harmonics. 
     In this circuit, by forcing a constant current (J_ 1 /J_ 2 ) through the input transistors T_ 3 /T_ 2  the input voltage on terminals Vin_n and Vin_n, which is identical to the voltage across the filter capacitor is copied across R_c. The input voltage is converted into a current by this resistor. 
     This conversion current flows through T_ 3 /T_ 4 . Except as part of a feedback loop to realize a constant current through the input transistors, T_ 3 /T_ 4  are also part of a translinear loop consisting of T_ 3 /T_ 4 , T_ 5 /T_ 6 , T_ 7 /T_ 8 , T_ 9 /T_ 10  and T —11/T _ 12 . This loop multiplies the conversion current with a factor J_ 3 /J_ 5  (assuming J_ 3 =J_ 4  and J_ 5 =J_ 6 ). 
     The transfer G (transconductance) of this V-I converter can be written as:              G   =         I                 o       V                 i                 n       =     J3       J5   .   R                   c                 (   5   )                         
     In an alternative embodiment where R_c is an on chip resistor, the conversion inaccuracy due to this resistor is in accordance with the invention compensated by deriving current J_ 5  from a voltage source and an on-chip resistor and J_ 3  from the same voltage source and an accurate (external) resistor. 
     In FIG. 3, in order to realize the filter of FIG. 1, a capacitor C and a current conveyor CC are added to the circuit of FIG.  2 . The output and feedback current is already available by copying the converter output current directly, hereby T_ 9 /T_ 10  and T_ 11 /T_ 12 . Therefore the current mirrors M of FIG. 1 are omitted. 
     The complete transistor level circuit of FIG. 3 is split up in two parts: a V-I converter part VIC described in the previous paragraph and a current conveyor part CC which acts as input buffer. In the implementation of FIG. 3, in the V_i converter part, relative to the circuit of FIG. 2 the resistance R_c has been replaced by resistors R_c 1  and R_c 2 , the connection between which two resistors is copied to a common control input of transistors T_ 13  and T_ 14  of the current conveyor CC. The current conveyor part CC comprises said transistors T_ 13  and T_ 14  of which the main conduction paths are each connected between the VCC and VEE lines, wherein the upstream part of the conduction path current sources J_ 7  and J_ 8  respectively are provided. Downstream to the transistors T 13  and T 14  the conduction paths are provided with resistances R_in 1  and R_in 2  respectively. 
     The VIC and CC parts are apart from said connection between resistances R_c 1  and R_c 2  on the one hand and the control input between transistors T_ 13  and T_ 14  on the other hand, via a connection of a control input of transistor T_ 1  to the main conduction path of transistor T_ 13 , while the control input of transistor T_ 2  is connected to the main conduction path of transistor T_ 14 . In each case the connection to the main conduction path is made between the transistor and the current source, i.e. between T_ 13  and J_ 7  and between T_ 14  and J_ 8 , respectively. In the implementation, the control input of transistors T_ 1  and T_ 2  are interconnected by a connection comprising the capacitor C. Further, the main conduction path of the transistors T_ 9  and T_ 10  is connected to input terminals Ii_n and Ii respectively, which terminals are connected to the main conduction path of transistors T_ 14  and T_ 13  respectively between the transistor and the resistor R_in 2  and R_in 1  respectively. 
     Assuming in accordance with the idea underlying the present invention that R_in 1 /R_in 2  are sufficiently large compared to the input resistance of the common base stage the transfer T is approximately equal to one (1), i.e. virtually. 
     The conversion resistor R_c is split up and in this way a common mode point is created. By connecting this common mode point to the input buffer T_ 13 /T_ 14  the input stage T_ 1 /T_ 2  is properly biased. The resulting filter transfer can be written as:                H        (     j                 ω     )       =         I                 o       I                 i                 n       =     1     1   +     j                 ω                       J5   .   R                   c                 C     J3                     (   6   )                         
     Thus, by adding a feedback loop to a very linear voltage to current converter with controllable transconductance a filter is created with a continuously tunable cut-off frequency and very low distortion. 
     FIG. 4, by way of an alternative block diagram illustrates the manner in which the same, above explained principle, in accordance with the invention is implemented in the voltage domain. To the left of the diagram, the voltage supply lines Vi and Vi_n form the input of the circuit, while to the right of the diagram the output lines Vo and Vo_n form the output. The voltage input is, via voltage substractors S lead to a linear voltage V to current I convertor G, which outputs a current via current lines Ig to a voltage-to-voltage conveyor T, which outputs a voltage via a connection to the voltage lines Vo and Vo_n. A capacitor C is incorporated interconnected between the respective leads from the linear V_i convertor G and the voltage-voltage conveyor T, providing the required voltage input for the latter. 
     It may be derived from this alternative embodiment in accordance with the invention that 
     
       
           Vin=Vi−Vi   —   n   (7) 
       
     
     
       
           Vout=Vo−Vo   —   n   (8) 
       
     
     Considering that              G   =     Ig   Vg             (   9   )                         
     and 
     
       
           Ig=jωVt    (10) 
       
     
     while              T   =     Vo   Vt             (   11   )                         
     it may be rewritten that              Vo   =       GT     jω                 c       ·   Vg             (   12   )                         
     Since also 
     
       
           Vg=Vi−Vo    (13) 
       
     
     it shows that              Vo   =       GT     jω                 c            (     Vi   -   Vo     )               (   14   )                         
     which provides that                H        (   jω   )       =       Vo   Vi     =     1     1   +     jω                     c     GT                     (   15   )                         
     which demonstrates that the alternative embodiment according to the invention has an identical transfer in the voltage domain compared to the earlier current domain. It will be appreciated by those skilled in the art that the present voltage domain arrangement according to the invention may be readily transformed into circuitry, in analogy to the described transformation in the current-current domain. 
     The present invention, apart from the above description and all details of the pertaining drawing, further relates to the characterising features provided by the following claims.