Patent Publication Number: US-10768229-B2

Title: Glitch detection of a DC voltage

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application claims priority to French Patent Application No. 1758750, filed on Sep. 21, 2017, which application is hereby incorporated herein by reference. 
     TECHNICAL FIELD 
     The present disclosure generally relates to electronic circuits, and more particularly to the detection of glitches of a DC voltage. 
     BACKGROUND 
     A glitch of a DC voltage of a circuit, particularly of the power supply voltage thereof, may cause a malfunctioning of the circuit. In particular, when the circuit comprises confidential data, the glitch may be intentionally caused by a pirate who attempts to access the confidential data. 
     To prevent circuit malfunctions resulting from glitches on their power supply voltages, certain circuits are equipped with countermeasures. 
     SUMMARY 
     Thus, an embodiment overcomes at least certain disadvantages of existing circuits of detection of glitches of a DC voltage, particularly of a power supply voltage. 
     An embodiment provides a circuit for detecting a glitch of a DC voltage, wherein a detection threshold is a function of said DC voltage. 
     According to an embodiment, the threshold varies proportionally to a voltage obtained by low-pass filtering of said DC voltage. 
     According to an embodiment, a first current varying proportionally to said voltage obtained by filtering conditions the detection threshold. 
     According to an embodiment, the detection circuit comprises, between a first terminal and a second terminal of application of said DC voltage, a low-pass filter configured to supply said voltage obtained by filtering. 
     According to an embodiment, the detection circuit further comprises, in series between the first terminal and the second terminal: a first branch comprising a first transistor and a first current source; a second branch comprising a resistive element, a second transistor mirror-assembled with the first transistor, and a second current source supplying the first current. 
     According to an embodiment, the detection circuit further comprises: a third transistor, the second current source comprising a fourth transistor mirror-assembled with the third transistor; and a control circuit configured to supply the third transistor with a second current varying proportionally to said voltage obtained by filtering. 
     According to an embodiment, the first current source comprises a fifth transistor mirror-assembled with the third transistor. 
     According to an embodiment, the control circuit comprises another resistive element and is further configured to impose said voltage obtained by filtering across said other resistive element, the second current varying proportionally to a third current running through said other resistive element. 
     According to an embodiment, the control circuit comprises: a sixth transistor in series with the third transistor between the first terminal and the second terminal; and a seventh transistor in series with said other resistive element between the first terminal and the second terminal, a control terminal of the seventh transistor being coupled to a control terminal of the sixth transistor. 
     According to an embodiment, the control circuit comprises an operational amplifier having a first input connected to an output of the low-pass filter, having a second input connected to the junction point of the seventh transistor and of said other resistive element, and having an output connected to the control terminals of the sixth and seventh transistors. 
     According to an embodiment, the first input of the amplifier is the inverting input and the second input of the amplifier is the non-inverting input. 
     According to an embodiment, the detection circuit comprises another low-pass filter connected to a control terminal of each of the first and second transistors. 
     According to an embodiment, the detection circuit comprises another low-pass filter coupling the first terminal to said resistive element. 
     According to an embodiment, the transistors are MOS transistors. 
     According to an embodiment, the transistors are bipolar transistors. 
     The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  shows an embodiment of a circuit for detecting positive glitches of a DC voltage; 
         FIG. 2  shows an embodiment of a circuit for detecting negative glitches of a DC voltage; and 
         FIG. 3  shows an embodiment of a circuit for detecting positive and negative glitches of a DC voltage.  FIG. 3  also shows a capacitor C 8  coupled between VCC and the gate of transistor  27 , a resistor R 8  coupled between the gate of transistor  27  and the gate of transistor  25 , and a capacitor C 7  in parallel with resistor R 7 . 
     
    
    
     DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS 
     The same elements have been designated with the same reference numerals in the various drawings and, further, the various drawings are not to scale. For clarity, only those steps and elements which are useful to the understanding of the described embodiments have been shown and are detailed. In particular, the electronic circuits where a glitch detection circuit may be provided have not been described, the described embodiments being compatible with the usual operation of such electronic circuits. Further, the countermeasures implemented during a detection of a DC voltage glitch have not been described, the described embodiments being compatible with usual countermeasures. 
     In the following description, unless otherwise specified, expressions “approximately”, “substantially”, and “in the order of” mean to within 10%, preferably to within 5%. 
     Unless otherwise specified, when reference is made to two elements connected together, this means directly connected with no intermediate element other than conductors, and when reference is made to two elements coupled together, this means that the two elements may be directly coupled (connected) or coupled via one or a plurality of other elements. 
       FIG. 1  shows an embodiment of a circuit for detecting positive glitches of a DC voltage. 
     The circuit is intended to receive, between a terminal  1  of application of a potential, for example, positive with respect to ground GND, and a terminal  3  of connection to ground GND, a DC voltage VCC where glitches are likely to appear. 
     A low-pass filter  5  is connected between terminals  1  and  3 . Filter  5  supplies, based on voltage VCC, a filtered voltage V 0  between an output terminal  6  of the filter and terminal  3 . More particularly, voltage V 0  is substantially proportional to a voltage VCC f  equal to voltage VCC, where frequency disturbances greater than the cut-off frequency of low-pass filter  5  have been suppressed by filtering. In this embodiment, filter  5  comprises a voltage dividing bridge comprising, in series between terminals  1  and  3 , a resistor  7  of value R 1  and a resistor  9  of value R 2 , as well as a capacitor  11  of value C 1  having a terminal connected to terminal  3  and having its other terminal, corresponding to output terminal  6  of filter  5 , connected to the junction point of resistors  7  and  9 . Voltage V 0  is, in this example, substantially equal to (R 2 /(R 1 +R 2 ))*VCC f . 
     An operational amplifier  13  has its power supply terminals coupled to terminals  1  and  3 . An input terminal of amplifier  13 , here the inverting input (−), is coupled to output terminal  6  of filter  5 . A MOS transistor  15  and a resistor  17  of value R 3  are series-connected between terminals  1  and  3 , the control terminal of transistor  15  being coupled to the output of amplifier  13 . Resistor  17  couples the drain of transistor  15  and the other input of amplifier  13 , here, the non-inverting input (+), to terminal  3 . Thus, a voltage of value V 0  is imposed across resistor  17 , whereby a current I 0  varying proportionally to voltage V 0  flows through resistor  17  and transistor  15 . In this example, current I 0  is substantially equal to (R 2 /(R 1 +R 2 ))*(VCC f /R 3 ). A MOS transistor  19  is series-connected with a MOS transistor  21 , between terminals  1  and  3 , a control terminal of transistor  19  being coupled to the control terminal of transistor  15 . Due to the fact that transistors  15  and  19  are both controlled by the output of amplifier  13 , a current I 1  proportional to current I 0  flows through transistor  19 , and thus through transistor  21 . In this example, transistors  15  and  19  have a same dimension ratio W/L (W and L being respectively the width and the length of the gate) and current I 1  is equal to current I 0 . Thus, amplifier  13 , resistor  17 , and transistors  15  and  19  form a control circuit  23  of transistor  21 , control circuit  23  supplying transistor  21  with a current I 1  varying proportionally to voltage V 0 . 
     The detection circuit further comprises a MOS transistor  25  mirror-assembled with a MOS transistor  27  having its source coupled to terminal  1 . The drain of transistor  27  is coupled to the drain of a MOS transistor  29 , mirror-assembled with transistor  21 . The drain of transistor  25  is coupled to the drain of a transistor  31 , mirror-assembled with transistor  21 . The sources of transistors  29  and  31  are coupled to terminal  3 . Due to the fact that transistors  29  and  31  are mirror-assembled with transistor  21 , transistor  29  supplies a current Iref 1  proportional to current I 1 , and transistor  31  tends to supply a current Iref 2  proportional to current I 1 . In this example, transistors  29  and  31  have a same dimension ratio W/L, and currents Iref 1  and Iref 2  are substantially equal. A capacitor  33  of value C 2  couples the gate of transistor  25  and the gate of transistor  27  to terminal  3 . A resistor  35  of value R 4  couples the source of transistor  25  to terminal  1 . An output terminal OUT 1  of the circuit is connected to the drain of transistor  25 . 
     In operation, voltage Vgs 27  between the gate and the source of diode-assembled transistor  27  is imposed by current Iref 1  supplied by transistor  29 . In order for current I 25  in transistor  25  to be equal to current Iref 2  which tends to be delivered by transistor  31 , which is in this example equal to Iref 1 , voltage Vgs 25  between the gate and the source of transistor  25  is equal to Vgs 27 . 
     In the absence of glitch, this is not possible due to the voltage drop equal to R 4 *Iref 2  which would then occur in resistor  35 . Transistor  25  is thus off. As a result, output OUT 1  is at a value capable of being interpreted as a first logic state, for example, the low state, indicating the absence of a glitch. 
     During a positive glitch of voltage VCC, the potential increase of terminal  1  resulting from this glitch can be observed on the source of transistor  25 . Further, transistor  27  is equivalent, as a first approximation in small signal model, to the inverse of its conductance gm, that is, to a resistor of value R 5 . Resistor R 5  and capacitor  33  form a low-pass filter having its cut-off frequency 1/(2πR 5 C 2 ) determining the minimum frequency of the glitches detectable by the circuit. 
     If the glitch frequency is smaller than cut-off frequency 1/(2πR 5 C 2 ) of the filter, the potential increase of terminal  1  can be observed on the gate of transistor  25 . Voltage Vgs 25  does not change and keeps the same value as in the absence of a glitch. Output OUT 1  remains in the first logic state indicating the absence of a glitch. 
     If the glitch frequency is greater than cut-off frequency 1/(2πR 5 C 2 ) of the filter, the potential increase of terminal  1  cannot be observed on the gate of transistor  25 , whereby voltage Vgs 25  increases. As long as the amplitude of the glitch is smaller than R 4 *Iref 2 , the increase of voltage Vgs 25  is not sufficient to compensate for voltage drop R 4 *Iref 2  in resistor  35  and output OUT 1  remains in the first logic state. However, if the amplitude of the glitch is greater than R 4 *Iref 2 , the increase of voltage Vgs 25  is sufficient to compensate for voltage drop R 4 *Iref 2  in resistor  35 . Transistor  25  is then conductive and output OUT 1  changes value, which may be interpreted as a switching from the first logic state to a second logic state, for example, the high logic state, indicating the detection of a glitch. 
     A circuit for detecting positive glitches of voltage VCC where the detection threshold is equal to R 4 *Iref 2  is thus obtained. Due to the fact that current Iref 2  supplied by transistor  31  varies proportionally to voltage V 0 , the threshold varies proportionally to voltage V 0  and is thus a function of voltage VCC. More particularly, the detection threshold is here equal to α*VCC f , a being a proportionality factor. In the example described herein, current Iref 2  is equal to k times current I 1 , and thus to k times current I 0 , and factor α is then equal to R 2 *k*R 4 /((R 1 +R 2 )*R 3 ), the value of factor α being selected by appropriately setting values k, R 1 , R 2 , R 4 , and R 3 . 
     An advantage of the circuit of  FIG. 1  is that its detection threshold remains substantially equal to a same factor of voltage VCC, whatever the value of voltage VCC, this factor being determined by proportionality factor α. Advantage is here taken from the fact that the detection threshold is proportional to voltage V 0  obtained by low-pass filtering of voltage VCC. 
     As an example, for α=0.1, if voltage VCC is equal to 1.62 V, voltage VCC f  is substantially equal to 1.62 V, whereby the detection threshold is substantially equal to 0.162 V, and thus to 0.1*VCC. If voltage VCC is equal to 5.5 V, voltage VCC f  is equal to 5.5 V, whereby the detection threshold is substantially equal to 0.55 V, and thus to 0.1*VCC. 
     As an example, voltage VCC is a power supply voltage, for example, of an electronic circuit comprising the detection circuit of  FIG. 1 , and has a value for example in the range from 1.62 to 5.5 V. 
     An alternative embodiment provides an additional resistor connected between the gate of transistor  27  and the terminal of capacitor  33  connected to the gate of transistor  25 . The value of this additional resistor provides an additional parameter to set the cut-off frequency of the low-pass filter comprising capacitor  33  and resistor R 5  of transistor  27 . 
     Another alternative embodiment provides an additional capacitor in parallel with resistor  35  and/or an additional capacitor between the source and the gate of transistor  27 . This results in improving the detection of positive disturbances having high frequencies, for example, greater than 100 MHz. 
     Another alternative embodiment comprises providing a same proportionality factor between the dimension ratio W/L of transistor  27  and that of transistor  25  and between the dimension ratio W/L of transistor  29  and that of transistor  31 , this factor for example being selected to minimize the power consumption in the branch comprising transistors  27  and  29 . More generally, the current ratios between two branches of the circuit may be modified by adapting the W/L ratios of the transistors of these branches, for example, to minimize the power consumption in the circuit. 
     Another alternative embodiment comprises using bipolar transistors rather than MOS transistors. Similarly, the current ratios may be varied by having different emitter surface area ratios between two branches. 
     Another alternative embodiment provides that at least one of resistors  7 ,  9 ,  17 , and  35  is settable to be able to adapt, for example during a calibration phase, proportionality factor α, and thus the detection threshold. 
     Each of the above variations may be combined with one or a plurality of other ones of these variations. 
       FIG. 2  shows an embodiment of a circuit for detecting a negative glitch of a DC voltage. 
     The circuit of  FIG. 2  comprises filter  5  and control circuit  23 , connected together and to terminals  1  and  3  in the same way as in  FIG. 1 . Similarly to the circuit of  FIG. 1 , transistor  19  is series-connected with a MOS transistor  41 , between terminals  1  and  3 , the drain of transistor  19  being coupled to the drain of MOS transistor  41  having its source coupled to terminal  3 . Control circuit  23  thus supplies current I 1  to transistor  41 , based on output voltage V 0  of filter  5 . The detection circuit further comprises a resistor  43  of value R 6  and a capacitor  45  of value C 3 , series-connected between terminals  1  and  3 . A MOS transistor  47  is mirror-assembled with a MOS transistor  51  having its source coupled to terminal  1 . The drain of transistor  47  is coupled to the drain of a MOS transistor  53 , mirror-assembled with transistor  41 . The drain of transistor  51  is coupled to the drain of a MOS transistor  55 , mirror-assembled with transistor  41 . The sources of transistors  53  and  55  are coupled to terminal  3 . Similarly to what has been described for the circuit of  FIG. 1 , due to the fact that transistors  53  and  55  are mirror-assembled with transistor  41 , transistor  55  supplies a current Iref 3  proportional to current I 1 , and transistor  53  tends to supply a current Iref 4  proportional to current I 1 . In this example, transistors  53  and  55  have a same dimension ratio W/L, and currents Iref 3  and Iref 4  are substantially equal. The source of transistor  47  is coupled to a terminal of a resistor  57  of value R 7 , the other terminal of this resistor being coupled to the junction point of resistor  43  and of capacitor  45 . An output terminal OUT 2  of the circuit is connected at the level of the drain of transistor  47 . 
     In the circuit of  FIG. 2 , resistor  43  and capacitor  45  form a low-pass filter having a cut-off frequency 1/(2πR 6 C 3 ) which determines the minimum frequency of the glitch detectable by the circuit. 
     The operation of this circuit is similar to that of  FIG. 1  with the difference that during a glitch of voltage VCC, the glitch is now followed by the gate of the current mirror comprising transistors  47  and  51  rather than by the source, which is then common. Indeed, during a negative glitch of voltage VCC, the potential of terminal  1  decreases and this decrease is propagated on the gate of transistor  51 , and thus on the gate of transistor  47 . 
     If the glitch frequency is smaller than cut-off frequency 1/(2πR 6 C 3 ) of the filter, the potential decrease of terminal  1  can be observed on the source of transistor  47 , but this does not induce a change in voltage Vgs 47  between the gate and the source of transistor  47  due to the fact that this potential decrease can also be observed on the gate of transistor  47 . Voltage Vgs 47  keeps the same value as in the absence of a glitch and is not sufficient to compensate for the voltage drop equal to R 7 *Iref 4  which would occur in resistor  57  if transistor  47  was conductive. As a result, transistor  47  is non-conductive and output OUT 2  is in the first logic state indicating the absence of a glitch. 
     However, if the frequency of the glitch is greater than cut-off frequency 1/(2πR 6 C 3 ) of the filter, due to the action of the low-pass filter, the potential decrease of terminal  1  cannot be observed on the source of transistor  47  while it is propagated on its gate. This results in a change in voltage Vgs 47 . From the moment when the amplitude of the glitch is greater than or equal to R 7 *Iref 4 , voltage Vgs 47  is sufficient for transistor  47  to be conductive. As a result, the output switches from the first logic state to the second logic state, which indicates the detection of a glitch. 
     A circuit for detecting negative glitches of voltage VCC where the detection threshold is equal to R 7 *Iref 4  is thus obtained. Due to the fact that current Iref 4  supplied by transistor  53  varies proportionally to voltage V 0 , the threshold varies proportionally to voltage V 0  and is thus a function of voltage VCC. More particularly, the detection threshold is equal to β*VCC f , β being a proportionality factor, for example, equal to 0.1. In the example described herein, current Iref 4  is equal to z times current I 1 , and thus to z times current I 0 , and factor β is then equal to (R 2 *z*R 7 /(R 1 +R 2 )*R 3 ), the value of factor β being selected by appropriately setting values z, R 1 , R 2 , R 3 , and R 7 . 
     The circuit of  FIG. 2  benefits from the same advantages as the circuit of  FIG. 1 . Further, the variations described for the circuit of  FIG. 1 , as well as their different combinations, can be transposed to the circuit of  FIG. 2 . 
     An embodiment, not shown, provides a circuit or device for detecting negative and positive glitches of a DC voltage. This device comprises the circuit of  FIG. 1 . This device further comprises transistors  47 ,  51 ,  53 , and  55 , resistors  43  and  57 , and capacitor  45  of the circuit of  FIG. 2 , connected together and to terminals  1  and  3  in the same way as in  FIG. 2 . However, conversely to the circuit of  FIG. 2 , in this device, transistors  53  and  55  are mirror-assembled with transistor  21  of the circuit of  FIG. 1 . 
     A circuit for detecting positive and negative glitches of a same DC voltage VCC by providing a single filter  5  and a single control circuit  23  is thus obtained. As previously, the positive and negative glitch detection thresholds vary proportionally to voltage V 0 , obtained by low-pass filtering of voltage VCC, and thus depend on the value of this voltage VCC. 
     The advantages of the circuits of  FIGS. 1 and 2  are still obtained in this embodiment. Further, the variations described for the circuits of  FIGS. 1 and 2 , as well as their different combinations, can be transposed to this embodiment. 
     In a preferred embodiment of the above-described detection circuits, term coupled means directly connected, as shown in the corresponding drawings. 
     Specific embodiments have been described. Various alterations, modifications and improvements will readily occur to those skilled in the art. In particular, term “capacitor” should be understood as more generally meaning “capacitive element” and term “resistor” should be understood as more generally meaning “resistive element”. 
     Operational amplifier  13  may comprise an inner device filtering the glitch of the voltage applied between its power supply terminals, which enables to avoid for glitches of the VCC voltage to have a direct influence on the output potential of the amplifier. A (LDO—“Low Drop Out”) voltage regulator may also be provided to supply the power supply voltage of amplifier  13  from voltage VCC. 
     The conversion circuitry connected at the level of each of the output terminals of the above-described circuits to provide a logic equivalent 1 or 0 according to whether a glitch is detected or not has not been described, it being within the abilities of those skilled in the art to design such a circuitry. An example of such a circuitry comprises a first inverter having its input terminal connected to an output terminal of one of the previously-described circuits, and a second inverter having its input terminal connected to the output terminal of the first inverter, the first and second inverters being for example powered with an output voltage of a voltage regulator (LDO). 
       FIG. 3  shows an embodiment of a circuit for detecting positive and negative glitches of a DC voltage. 
     In one or more embodiments, the embodiments described in  FIG. 1  and  FIG. 2  may be combined together as illustrated in  FIG. 3 , which also shows the conversion circuitry mentioned above to generate a digital output (DOUT 1  and DOUT 2 ). An additional logic OR gate may be used to achieve a common digital output (DOUT) that indicates the occurrence of a glitch. 
     Various embodiments with various variations have been described hereabove. It should be noted that those skilled in the art may combine various elements of these various embodiments and variations without showing any inventive step. 
     Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and the scope of the present invention. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. The present invention is limited only as defined in the following claims and the equivalents thereto.