Patent Publication Number: US-9414455-B2

Title: Systems and methods for dimming control with capacitive loads

Description:
1. CROSS-REFERENCES TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 13/105,780, filed May 11, 2011, which claims priority to Chinese Patent Application No. 201110103130.4, filed Apr. 22, 2011, both of the above-referenced applications being commonly assigned and incorporated by reference herein for all purposes. 
    
    
     2. BACKGROUND OF THE INVENTION 
     The present invention is directed to integrated circuits. More particularly, the invention provides systems and methods for dimming control. Merely by way of example, the invention has been applied for dimming control using a light dimmer with capacitive loads. But it would be recognized that the invention has a much broader range of applicability. 
     Light emitting diodes (LEDs) have been widely used in various electronics applications, such as architectural lighting, automotive lighting, and backlighting of liquid crystal display (LCD). LEDs have been recognized to have significant advantages over other lighting sources, such as incandescent lamps, and the advantages include at least high efficiency and long lifetime. But, significant challenges remain for LEDs to widely replace incandescent lamps. The LED light systems need to be made compatible with conventional light dimmers that often operate with a phase-cut dimming method, such as leading edge dimming or trailing edge dimming. 
     Specifically, a conventional light dimmer usually includes a Triode for Alternating Current (TRIAC), and is used to drive pure resistive loads, such as incandescent lamps. But such conventional light dimmer may not function properly when connected to capacitive loads, such as LEDs and/or associated circuits. When the light dimmer starts conduction, internal inductance of the light dimmer and the capacitive loads may cause low frequency oscillation. Hence, the Alternate Current (AC) waveforms of the light dimmer often becomes unstable, resulting in flickering, undesirable audible noise, and/or even damages to other system components.  FIG. 1  shows simplified signal waveforms of a conventional light dimmer that is connected to capacitive loads. The waveform  110  represents a rectified input waveform, and the waveform  120  represents a signal generated from a light dimmer. 
     In attempt to solve the above problems in using a conventional light dimmer with capacitive loads such as LEDs and/or associated circuits, a power resistor (e.g., with a resistance of several hundred Ohms) may be connected in series in an AC loop to dampen initial current surge when the light dimmer starts conduction. 
       FIG. 2  is a simplified diagram of a conventional light dimmer circuit. The light dimmer circuit  200  includes an AC input  210 , a light dimmer  220 , a capacitive load  230 , and a power resistor  240 . Additionally,  FIG. 3  shows simplified conventional signal waveforms of the light dimmer circuit  200 . As shown in  FIGS. 2 and 3 , the waveform  310  represents a rectified input signal received by the light dimmer  220 . In response, the light dimmer  220  generates an output signal that is represented by the waveform  320  and received by the capacitive load  230 . Comparing the waveforms of  FIG. 3  with those in  FIG. 1 , using the resistor  240  in the light dimmer circuit  200  can reduce low frequency oscillation. But, for the light dimmer circuit  200 , a current would flow through the resistor  240  even under normal working conditions, causing excessive heating of resistor and other system components. Such heating often leads to low efficiency and high energy consumption. 
     Therefore, some conventional techniques would short the power resistor through peripheral circuits when the AC input is stabilized after a light dimmer conducts for a predetermined period of time.  FIG. 4  is a simplified conventional diagram showing a system for dimming control. As an example, a TRIAC (not shown in  FIG. 4 ) is used as a light dimmer. The system  400  includes input terminals  422  and  424 , a capacitor  430 , a TRIAC dimming control circuit  440 , and output terminals  452 ,  454 . The TRIAC dimming control circuit  440  includes a power transistor  460 , and resistors  472 ,  474 ,  476  and  478 . As shown in  FIG. 4 , the TRIAC sends an input signal  410  to the input terminals  422  and  424 . When the TRIAC is turned off, there is no input signal  410 . In response, the transistor  460  is turned off by the voltage divider including the resistors  472 ,  474  and  476 . When the TRIAC is turned on, the transistor  460  remains off, but the resistor  478  can dampen an initial surge current. After a predetermined period of time, the transistor  460  is turned on, and hence the resistor  478  is shorted. Therefore, the above noted approach can improve the system efficiency. 
     But the system  400  still suffers from significant deficiencies. For example, in a BUCK topology, when the TRIAC is turned off, the voltage on the capacitor  430  may not become lower than the output voltage (e.g., VOUT) at output terminals  452  and  454 . If the output voltage and/or the threshold voltage of the transistor  460  changes, the transistor  460  may not be turned off properly and thus the resistor  478  may always be shorted. Thus, the system  400  would not operate properly under these circumstances. 
     Hence it is highly desirable to improve techniques of dimming control. 
     3. BRIEF SUMMARY OF THE INVENTION 
     The present invention is directed to integrated circuits. More particularly, the invention provides systems and methods for dimming control. Merely by way of example, the invention has been applied for dimming control using a light dimmer with capacitive loads. But it would be recognized that the invention has a much broader range of applicability. 
     According to one embodiment, a system for dimming control includes a system controller including a first controller terminal and a second controller terminal, a transistor including a first transistor terminal, a second transistor terminal and a third transistor terminal, and a resistor including a first resistor terminal and a second resistor terminal. The system controller is configured to generate a first signal at the first controller terminal based on at least information associated with an input signal and to generate a second signal at the second controller terminal based on at least information associated with the first signal. Moreover, the first transistor terminal is coupled, directly or indirectly, to the second controller terminal. The second transistor terminal is biased at a first voltage. Additionally, the first resistor terminal is coupled to the second transistor terminal, and the second resistor terminal is coupled to the third transistor terminal. Furthermore, the transistor is configured to receive the second signal at the first transistor terminal and to change between a first condition and a second condition in response to the second signal. The first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time. Additionally, the second signal keeps at the second logic level during the first period of time and the third period of time, and the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time. 
     According to another embodiment, a system for dimming control includes a system controller including a first controller terminal, a second controller terminal, and a third controller terminal, a first transistor including a first transistor terminal, a second transistor terminal and a third transistor terminal, and a first resistor including a first resistor terminal and a second resistor terminal. The system controller is configured to generate a first signal at the first controller terminal based on at least information associated with an input signal and to generate a second signal at the second controller terminal based on at least information associated with the first signal. Moreover, the first transistor terminal is coupled, directly or indirectly, to the second controller terminal. The second transistor terminal is coupled, directly or indirectly, to the third controller terminal, the third controller terminal being biased at a first voltage. Additionally, the first resistor terminal is coupled to the second transistor terminal, and the second resistor terminal is coupled to the third transistor terminal. Furthermore, the first transistor is configured to receive the second signal at the first transistor terminal and to change between a first condition and a second condition in response to the second signal. 
     According to yet another embodiment, a method for dimming control includes receiving an input signal, processing information associated with the input signal, and generating a first signal based on at least information associated with the input signal. Additionally, the method includes processing information associated with the first signal, generating a second signal based on at least information associated with the first signal, receiving the second signal at a transistor, and changing the transistor between a first condition and a second condition based on at least information associated with the second signal. The first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time. The second signal keeps at the second logic level during the first period of time and the third period of time. Additionally, the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time. 
     According to yet another embodiment, a system controller for dimming control includes a first controller terminal, a second controller terminal, and a third controller terminal. The system controller is configured to receive an input signal at the first controller terminal, generate a first signal at the second controller terminal based on at least information associated with the input signal, and process information associated with the first signal. Additionally, the system controller is configured to generate a second signal based on at least information associated with the first signal, and output the second signal at the third controller terminal. The first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time. The second signal keeps at the second logic level during the first period of time and the third period of time. Additionally, the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time. 
     According to yet another embodiment, a method for dimming control includes receiving an input signal, and generating a first signal based on at least information associated with the input signal, the first signal being at a first logic level during a first period of time and changing between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time. Additionally, the method includes processing information associated with the first signal, generating a second signal based on at least information associated with the first signal, and outputting the second signal, the second signal keeping at the second logic level during the first period of time and the third period of time, the second signal changing from the second logic level to the first logic level after the third period of time and remaining at the first logic level during the fourth period of time. 
     Many benefits are achieved by way of the present invention over conventional techniques. For example, some embodiments of the present invention provide an input signal of which each period includes a first part and a second part. As an example, during the first part, the input signal changes with time in magnitude, and during the second part, the input signal does not change with time in magnitude. In another example, the input signal is generated by a TRIAC. Certain embodiments of the present invention provide a system controller configured to generate a first signal at a first logic level during a first period of time and to change the first signal between the first logic level and a second logic level during a second period of time. Some embodiments of the present invention provide a system controller including a sensing component configured to receive a first signal and to generate a logic signal based on at least information associated with the first signal, and a control and driver component configured to detect the logic signal and to generate a second signal based on at least information associated with the logic signal. Certain embodiments of the present invention provide one or more transistors to be used for dimming control. For example, a transistor is configured to be turned on under a first condition in response to a signal, and to be turned off under a second condition in response to the signal. In yet another example, two first transistors are configured to be turned on under a first condition in response to a signal in order to turn off a second transistor. In another example, the two first transistors are configured to be turned off under a second condition in response to the signal in order to turn on the second transistor. 
     Depending upon embodiment, one or more benefits may be achieved. These benefits and various additional objects, features and advantages of the present invention can be fully appreciated with reference to the detailed description and accompanying drawings that follow. 
    
    
     
       4. BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  shows simplified signal waveforms of a conventional light dimmer that is connected to capacitive loads; 
         FIG. 2  is a simplified diagram of a conventional light dimmer circuit; 
         FIG. 3  shows simplified conventional signal waveforms of a light dimmer circuit; 
         FIG. 4  is a simplified conventional diagram showing a system for dimming control; 
         FIG. 5  is a simplified diagram showing a system for dimming control according to an embodiment of the present invention; 
         FIG. 6  is a simplified diagram of a system controller according to an embodiment of the present invention; 
         FIG. 7  is a simplified diagram of a dimming control circuit according to an embodiment of the present invention; 
         FIG. 8  shows simplified timing diagrams for a dimming control circuit as part of a system for dimming control according to an embodiment of the present invention; 
         FIG. 9  shows simplified timing diagrams for a dimming control circuit as part of a system for dimming control according to an embodiment of the present invention; 
         FIG. 10  is a simplified diagram showing a system for dimming control according to another embodiment of the present invention; 
         FIG. 11  is a simplified diagram showing certain components of a system controller according to an embodiment of the present invention. 
     
    
    
     5. DETAILED DESCRIPTION OF THE INVENTION 
     The present invention is directed to integrated circuits. More particularly, the invention provides systems and methods for dimming control. Merely by way of example, the invention has been applied for dimming control using a light dimmer with capacitive loads. But it would be recognized that the invention has a much broader range of applicability. 
       FIG. 5  is a simplified diagram showing a system for dimming control according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The system  500  includes at least input terminals  512  and  514 , and a dimming control circuit  520 . For example, the dimming control circuit  520  includes at least a system controller  530 , a transistor  540 , and a resistor  550 . 
     According to one embodiment, a light dimmer (e.g., a TRIAC not shown in  FIG. 5 ) sends an input signal  510  (e.g., the signal VAC) to the input terminals  512  and  514 . In response, the system controller  530  generates one or more control signals to affect operating status of the transistor  540  and the resistor  550 . As an example, the transistor  540  and the resistor  550  are connected in parallel as shown in  FIG. 5 . According to another embodiment, the control signals turn the transistor  540  off, allowing the resistor  550  to dampen initial current surge to one or more capacitive loads. After the light dimmer conducts for a predetermined period of time, the control signals then, for example, turn on the transistor  540 , thus shorting the resistor  550  in order to improve the system efficiency. In another example, the system  500  operates with a broad range of inputs and outputs, such as an input range of AC 90V˜264V, and an output range of 20V˜50V/350 mA. 
       FIG. 6  is a simplified diagram of a system controller according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. In one embodiment, the system controller  600  is the same as the system controller  530 . In another embodiment, different pins of the system controller  600  are used for different purposes. Table 1 shows, as an example, description of eight pins in the system controller  600 . 
     
       
         
           
               
               
               
             
               
                 TABLE 1 
               
               
                   
               
               
                 Pin No. 
                 Pin Name 
                 Description 
               
               
                   
               
             
            
               
                 1 
                 CS 
                 MOSFET current detection input signal 
               
               
                 2 
                 VDD 
                 Internal circuit supply voltage 
               
               
                 3 
                 GND 
                 On-chip ground 
               
               
                 4 
                 LD 
                 Linear dimming input signal 
               
               
                 5 
                 VIN 
                 Input signal (e.g., 20 V~500 V) 
               
               
                 6 
                 TRIAC 
                 Dimming control output (e.g., for TRIAC) 
               
               
                 7 
                 TOFF 
                 GATE off time 
               
               
                 8 
                 GATE 
                 GATE output (e.g., for BUCK circuit) 
               
               
                   
               
            
           
         
       
     
       FIG. 7  is a simplified diagram of a dimming control circuit according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. 
     According to one embodiment, the dimming control circuit  700  includes a system controller  720 , a transistor  730 , and a resistor  740 . For example, the dimming control circuit  700  is used as the dimming control circuit  520 . In another example, the system controller  720 , the transistor  730 , and the resistor  740  are the same as the system controller  530 , the transistor  540 , and the resistor  550 , respectively. In yet another example, the system controller  720  is the same as the system controller  600 . In yet another example, the transistor  730  is a field effect transistor (FET), such as an N-channel FET. In yet another example, the system controller  720  includes a terminal  750  (e.g., a GND terminal), a terminal  752  (e.g., a VDD terminal), a terminal  754  (e.g., a GATE terminal), a terminal  756  (e.g., a TRIAC terminal), and a terminal  758  (e.g., a VIN terminal). 
     According to another embodiment, the resistor  740  is coupled in parallel with the transistor  730 . A terminal  742  of the resistor  740  is biased to an on-chip ground of the system controller  720 . For example, the terminal  742  is connected to the terminal  750  of the system controller  720  (e.g., the GND terminal). In another example, the voltage of the on-chip ground of the system controller  720  may change with time. In another example, another terminal  744  of the resistor  740  is biased to the ground (e.g., an off-chip ground and/or an external ground). 
     Although the above has been shown using a selected group of components for the circuit  700 , there can be many alternatives, modifications, and variations. For example, some of the components may be expanded and/or combined. Other components may be inserted to those noted above. For example, the dimming control circuit  700  also includes two additional transistors  760  and  770 . These transistors may be bipolar transistors, such as N-P-N and/or P-N-P bipolar transistors. 
     As an example, a terminal  762  of the transistor  760  is coupled, directly or indirectly through a resistor  780 , to the terminal  752  of the system controller  720  (e.g., the VDD terminal). For example, the internal circuit supply voltage of the terminal  752  may change with time. In another example, a terminal  764  of the transistor  760  is coupled directly or indirectly through a resistor  782 , to the terminal  756  of the system controller  720  (e.g., the TRIAC terminal). In yet another example, a terminal  766  of the transistor  760  is coupled directly to a terminal  774  of the transistor  770 . In yet another example, a terminal  772  of the transistor  770  is coupled directly to a terminal  732  of the transistor  730 . In yet another example, a terminal  776  is biased to the ground. In yet another example, the terminal  772  is coupled indirectly through a resistor  784 , to the terminal  776 . In yet another example, the terminal  764  is coupled indirectly through a resistor  786 , to the terminal  762 . In yet another example, the terminal  764  is coupled indirectly through the resistor  782  and a resistor  788 , to the terminal  732 . 
     According to one embodiment, before a light dimmer (e.g., a TRIAC not shown in  FIG. 7 ) starts conduction, the system controller  720  generates a gate signal  790  at the terminal  754  (e.g., the GATE terminal). The gate signal  790  is at a logic high level or at a logic low level. Additionally, the system controller  720  generates a dimming control signal  792  at the terminal  756  (e.g., the TRIAC terminal). The dimming control signal  792  is at the logic high level or at the logic low level. 
     In one embodiment, in response to an input signal at the terminal  758  (e.g., the VIN terminal), the system controller  720  changes the gate signal  790  from being at the logic high level to being a pulse signal that changes between the logic high level and the logic low level. In the meantime, the dimming control signal  792  remains at the logic low level in order to turn on the transistors  760  and  770 . Hence, according to one embodiment, the transistor  730  remains off and the resistor  740  is used to dampen any initial surge current to one or more capacitive loads. After a predetermined period of time, the system controller  720  changes the dimming control signal from the logic low level to the logic high level, causing the transistors  760  and  770  to be turned off. In response, the transistor  730  is turned on and the resistor  740  is shorted to improve system efficiency according to one embodiment. For example, the predetermined period of time is equal to one or more periods (e.g., 4, 6, 8, or 10 periods) of the pulse signal for the gate signal  790 . 
       FIG. 8  shows simplified timing diagrams for the dimming control circuit  700  as part of the system  500  according to an embodiment of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. 
     As shown in  FIG. 8 , curves  802 ,  804 ,  806  and  808  represent the timing diagrams for an output current  560  (as shown in  FIG. 5 ), the input signal  510 , the gate signal  790 , and the dimming control signal  792 , respectively. 
     According to one embodiment, between t 0  and t 1 , the input signal  510  (corresponding to the curve  804 ) is constant in magnitude. During this period of time, the gate signal  790  (corresponding to the curve  806 ) keeps at the logic high level, and the dimming control signal  792  (corresponding to the curve  808 ) keeps at the logic low level. 
     According to anther embodiment, at t 1 , the input signal  510  (corresponding to the curve  804 ) starts changing with time in magnitude. In response, the gate signal  790  (corresponding to the curve  806 ) becomes a pulse signal. During the period of time between t 1  and t 2 , the dimming control signal  792  (corresponding to the curve  808 ) remains at the logic low level. For example, during this period of time, the transistor  730  is turned off and the resistor  740  is used to dampen any initial surge current. In another example, the period of time between t 1  and t 2  equals one or more periods (e.g., 4, 6, 8, or 10 periods) of the pulse signal for the gate signal  790 . After t 2 , the dimming control signal  792  (corresponding to the curve  808 ) rises from the logic low level to the logic high level, and then remains at the logic high level for a period of time according to one embodiment. In response, the transistor  730  is turned on and thus the resistor  740  is shorted. 
       FIG. 9  shows simplified timing diagrams for the dimming control circuit  700  as part of the system  500  according to an embodiment of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example,  FIG. 8  is an enlarged representation of a portion of  FIG. 9 . In another example, curves  802 ,  804 ,  806  and  808  represent a part of the curves  902 ,  904 ,  906  and  908 , respectively. 
     As shown in  FIG. 9 , the curves  902 ,  904 ,  906  and  908  represent the timing diagrams for the output current  560 , the input signal  510 , the gate signal  790 , and the dimming control signal  792 , respectively. 
     According to one embodiment, when the input signal  510  (corresponding to the curve  904 ) is constant in magnitude, the output current  560  (corresponding to the curve  902 ) decreases with time. According to another embodiment, when the input signal  510  (corresponding to the curve  904 ) changes with time in magnitude, the output current  560  (corresponding to the curve  902 ) increases to a peak value and then decreases. 
     As shown in  FIG. 9 , the gate signal  790  (corresponding to the curve  906 ) changes between being at the logic high level and being a pulse signal over time. In response, the dimming control signal  792  (corresponding to the curve  908 ) changes with a delay. Specifically, as shown in  FIG. 8 , the dimming control signal  792  (corresponding to the curves  908  and  808 ) changes from the logic low level to the logic high level after a first delay (e.g., the first delay equal to a time period from t 1  to t 2 ) after the gate signal  790  (corresponding to the curves  906  and  806 ) has become the pulse signal according to one embodiment. According to another embodiment, after the gate signal  790  (corresponding to the curve  906 ) changes from being a pulse signal back to being at the logic high level, the dimming control signal  792  (corresponding to the curve  908 ) changes from the logic high level to the logic low level with a second delay. The first delay and the second delay are the same or different in magnitude. 
       FIG. 10  is a simplified diagram showing a system for dimming control according to another embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The system  1000  includes at least input terminals  1012  and  1014 , and a dimming control circuit  1020 . For example, the dimming control circuit  1020  includes a system controller  1030 , a transistor  1040  and a resistor  1050 . In another example, the system controller  530  is the same as the system controller  1030 . In yet another example, the operations of the system  1000  is described by  FIG. 8  and/or  FIG. 9 . 
     According to one embodiment, a light dimmer (e.g., a TRIAC not shown in  FIG. 10 ) sends an input signal  1010  (e.g., the signal VAC) to the input terminals  1012  and  1014 . In response, the system controller  1030  generates one or more control signals to affect operating status of the transistors  1040  and the resistor  1050 . As an example, the transistor  1040  and the resistor  1050  are connected in parallel as shown in  FIG. 10 . The control signals turns off the transistor  1040 , allowing the resistor  1050  to dampen initial current surge to one or more capacitive loads. After the light dimmer conducts for a predetermined period of time, the control signals then, for example, turn on the transistor  1040 , thus shorting the resistor  1050  in order to improve the system efficiency. 
       FIG. 11  is a simplified diagram showing certain components of a system controller according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The system controller  1100  includes at least a gate sense module  1110 , a control module  1120 , and a driver module  1130 . For example, the system controller  1100  is the same as the system controller  530 , the system controller  600 , the system controller  720 , and/or the system controller  1030 . 
     In one embodiment, the gate sense module  1110  receives a gate signal  1131  (e.g., the gate signal  790 ), and transforms the gate signal  1131  to an internal logic signal  1112  (e.g., the GS signal). For example, the gate signal  1131  is received and used by one or more components that are internal to the system controller  1100 . In another embodiment, the control module  1120  detects the logic signal  1112  and in response generates a signal  1122  (e.g., the Tri signal). In yet another embodiment, the driver module  1130  receives the signal  1122  and outputs a dimming control signal  1132  (e.g., the dimming control signal  792 ). 
     According to another embodiment, a system for dimming control includes a system controller including a first controller terminal and a second controller terminal, a transistor including a first transistor terminal, a second transistor terminal and a third transistor terminal, and a resistor including a first resistor terminal and a second resistor terminal. The system controller is configured to generate a first signal at the first controller terminal based on at least information associated with an input signal and to generate a second signal at the second controller terminal based on at least information associated with the first signal. Moreover, the first transistor terminal is coupled, directly or indirectly, to the second controller terminal. The second transistor terminal is biased at a first voltage. Additionally, the first resistor terminal is coupled to the second transistor terminal, and the second resistor terminal is coupled to the third transistor terminal. Furthermore, the transistor is configured to receive the second signal at the first transistor terminal and to change between a first condition and a second condition in response to the second signal. The first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time. Additionally, the second signal keeps at the second logic level during the first period of time and the third period of time, and the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time. For example, the system is implemented according to at least  FIG. 5 ,  FIG. 7 , and/or  FIG. 10 . 
     According to another embodiment, a system for dimming control includes a system controller including a first controller terminal, a second controller terminal, and a third controller terminal, a first transistor including a first transistor terminal, a second transistor terminal and a third transistor terminal, and a first resistor including a first resistor terminal and a second resistor terminal. The system controller is configured to generate a first signal at the first controller terminal based on at least information associated with an input signal and to generate a second signal at the second controller terminal based on at least information associated with the first signal. Moreover, the first transistor terminal is coupled, directly or indirectly, to the second controller terminal. The second transistor terminal is coupled, directly or indirectly, to the third controller terminal, the third controller terminal being biased at a first voltage. Additionally, the first resistor terminal is coupled to the second transistor terminal, and the second resistor terminal is coupled to the third transistor terminal. Furthermore, the first transistor is configured to receive the second signal at the first transistor terminal and to change between a first condition and a second condition in response to the second signal. For example, the system is implemented according to at least  FIG. 5 ,  FIG. 7 , and/or  FIG. 10 . 
     According to yet another embodiment, a method for dimming control includes receiving an input signal, processing information associated with the input signal, and generating a first signal based on at least information associated with the input signal. Additionally, the method includes processing information associated with the first signal, generating a second signal based on at least information associated with the first signal, receiving the second signal at a transistor, and changing the transistor between a first condition and a second condition based on at least information associated with the second signal. The first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time. The second signal keeps at the second logic level during the first period of time and the third period of time. Additionally, the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time. For example, the method is performed according to at least  FIG. 5 ,  FIG. 7 ,  FIG. 8 ,  FIG. 9 , and/or  FIG. 10 . 
     According to yet another embodiment, A system controller for dimming control includes a first controller terminal, a second controller terminal, and a third controller terminal. The system controller is configured to receive an input signal at the first controller terminal, generate a first signal at the second controller terminal based on at least information associated with the input signal, and process information associated with the first signal. Additionally, the system controller is configured to generate a second signal based on at least information associated with the first signal, and output the second signal at the third controller terminal. The first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time. The second signal keeps at the second logic level during the first period of time and the third period of time. Additionally, the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time. For example, the system controller is implemented in at least  FIG. 5 ,  FIG. 6 ,  FIG. 7 ,  FIG. 10 , and/or  FIG. 11 . 
     According to yet another embodiment, a method for dimming control includes receiving an input signal, and generating a first signal based on at least information associated with the input signal, the first signal being at a first logic level during a first period of time and changing between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time. Additionally, the method includes processing information associated with the first signal, generating a second signal based on at least information associated with the first signal, and outputting the second signal, the second signal keeping at the second logic level during the first period of time and the third period of time, the second signal changing from the second logic level to the first logic level after the third period of time and remaining at the first logic level during the fourth period of time. For example, the method is performed in at least  FIG. 5 ,  FIG. 6 ,  FIG. 7 ,  FIG. 8 ,  FIG. 9 ,  FIG. 10 , and/or  FIG. 11 . 
     Many benefits are achieved by way of the present invention over conventional techniques. For example, some embodiments of the present invention provide an input signal of which each period includes a first part and a second part. As an example, during the first part, the input signal changes with time in magnitude, and during the second part, the input signal does not change with time in magnitude. In another example, the input signal is generated by a TRIAC. Certain embodiments of the present invention provide a system controller configured to generate a first signal at a first logic level during a first period of time and to change the first signal between the first logic level and a second logic level during a second period of time. Some embodiments of the present invention provide a system controller including a sensing component configured to receive a first signal and to generate a logic signal based on at least information associated with the first signal, and a control and driver component configured to detect the logic signal and to generate a second signal based on at least information associated with the logic signal. Certain embodiments of the present invention provide one or more transistors to be used for dimming control. For example, a transistor is configured to be turned on under a first condition in response to a signal, and to be turned off under a second condition in response to the signal. In another example, two first transistors are configured to be turned on under a first condition in response to a signal in order to turn off a second transistor. In yet another example, the two first transistors are configured to be turned off under a second condition in response to the signal in order to turn on the second transistor. 
     For example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components. In another example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented in one or more circuits, such as one or more analog circuits and/or one or more digital circuits. In yet another example, various embodiments and/or examples of the present invention can be combined. 
     Although specific embodiments of the present invention have been described, it will be understood by those of skill in the art that there are other embodiments that are equivalent to the described embodiments. Accordingly, it is to be understood that the invention is not to be limited by the specific illustrated embodiments, but only by the scope of the appended claims.