Patent Publication Number: US-2021193041-A1

Title: Pixel driving circuit and display device

Description:
CROSS-REFERENCE TO RELATED APPLICATION(S) 
     The present application claims priority to Chinese Patent Application No. 201911329067.9, filed on Dec. 20, 2019, the content of which is incorporated herein by reference in its entirety. 
     TECHNICAL FIELD 
     The present disclosure relates to the field of display technology and, in particular, to a pixel driving circuit and a display device. 
     BACKGROUND 
     Organic light-emitting display devices are also named as organic light-emitting diode (OLED) display devices and have advantages of lightweight, thinness, and large viewing angles compared with liquid crystal display devices. Pixel driving circuits are provided in the organic light-emitting display panel and are configured to control light emission of the light-emitting devices to realize image display. 
     However, in the current pixel driving circuit, due to process limitations, a voltage amplitude provided to the pixel driving circuit is limited, which may lead to low contrast of the light-emitting devices. 
     SUMMARY 
     Embodiments of the present disclosure provide a pixel driving circuit and a display device, which can improve the contrast of the light-emitting device. 
     In one aspect, an embodiment of the present disclosure provides a pixel driving circuit, including: 
     a driving transistor connected in series between a first power supply terminal and a second power supply terminal and including a control terminal electrically connected to a first node, a first terminal electrically connected to a second node, and a second terminal electrically connected to a third node, wherein the second node is located between the first power supply terminal and the driving transistor, and the third node is located between the second power supply terminal and the driving transistor; 
     a light-emitting device connected in series between the third node and the second power supply terminal; 
     a first capacitor having a first terminal electrically connected to the first node and a second terminal electrically connected to a fourth node; 
     a second capacitor having a first terminal electrically connected to the first node and a second terminal electrically connected to a first fixed potential terminal; 
     a first switch unit having a first terminal electrically connected to a data signal terminal and a second terminal electrically connected to the fourth node; 
     a second switch unit having a first terminal electrically connected to a second fixed potential terminal and a second terminal electrically connected to the fourth node; and 
     a third switch unit having a first terminal electrically connected to the data signal terminal and a second terminal electrically connected to the first node. 
     In another aspect, an embodiment of the present disclosure further provides a display device including the pixel driving circuit above. 
     The pixel driving circuit and the display device in the embodiments of the present disclosure change the gate voltage of the driving transistor through a principle of capacitive coupling, so that a gate voltage range of the driving transistor becomes larger with respect to a data voltage value range directly provided in the pixel driving circuit, that is, the driving transistor can generate a corresponding driving current under the control of the gate voltage having a larger voltage range, thereby improving the contrast of the light-emitting device. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
       In order to better illustrate the technical solutions in embodiments of the present disclosure or of the related art, accompanying drawings used in the embodiments or the related art are described below. It is apparent that, the drawings described below are merely some embodiments of the present disclosure. Based on these drawings, those of ordinary skill in the art can obtain other drawings without any creative effort. 
         FIG. 1  is an equivalent circuit diagram of a pixel driving circuit according to an embodiment of present disclosure; 
         FIG. 2  is an equivalent circuit diagram of another pixel driving circuit according to an embodiment of the present disclosure; 
         FIG. 3  is a signal sequence diagram of the pixel driving circuit in  FIG. 2 . 
     
    
    
     DESCRIPTION OF EMBODIMENTS 
     In order to better illustrate objectives, technical solutions, and advantages of the embodiments of the present disclosure, the technical solutions in the embodiments of the present disclosure will be described clearly and completely in conjunction with the drawings in the embodiments of the present disclosure. It is apparent that, the embodiments described only show a part of the embodiments of the present disclosure, but not all the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without any creative effort fall within the protection scope of the present disclosure. 
     The terms used in the embodiments of the present disclosure are merely for the purpose of describing particular embodiments and not intended to limit the present disclosure. 
     Unless the context clearly indicates other meanings, the singular form expressions “a”, “an”, “the” and “said” used in the embodiments and appended claims of the present disclosure are also intended to represent the plural form thereof. 
     As shown in  FIG. 1 ,  FIG. 1  is an equivalent circuit diagram of a pixel driving circuit according to an embodiment of the present disclosure. An embodiment of the present disclosure provides a pixel driving circuit, the pixel driving circuit includes: a driving transistor T connected in series between a first power supply terminal ELVDD and a second power supply terminal ELVSS, a light-emitting device D, a first capacitor C 1 , a second capacitor C 2 , a first switch unit  1 , a second switch unit  2 , and a third switch unit  3 . A control terminal of the driving transistor T is electrically connected to a first node N 1 , that is, a gate of the driving transistor T is electrically connected to the first node N 1 , a first terminal of the driving transistor T is electrically connected to a second node N 2 , a second terminal of the driving transistor T is electrically connected to a third node N 3 , the second node N 2  is located between the first power supply terminal ELVDD and the driving transistor T, and the third node N 3  is located between the second power supply terminal ELVSS and the driving transistor T. The light-emitting device D is connected in series between the third node N 3  and the second power supply terminal ELVSS. The first capacitor C 1  has a first terminal electrically connected to the first node N 1  and a second terminal electrically connected to a fourth node N 4 . The second capacitor C 2  has a first terminal electrically connected to the first node N 1  and a second terminal electrically connected to a first fixed potential terminal V 1 . The first switch unit  1  has a first terminal electrically connected to a data signal terminal Vdata and a second terminal electrically connected to the fourth node N 4 . The second switch unit  2  has a first terminal electrically connected to a second fixed potential terminal V 2  and a second terminal electrically connected to the fourth node N 4 . The third switch unit  3  has a first terminal electrically connected to the data signal terminal Vdata and a second terminal electrically connected to the first node N 1 . 
     Specifically, a working time sequence of the pixel driving circuit sequentially includes an initialization phase tl, a data writing phase t 2 , and a light-emitting phase t 3 : in the initialization phase tl, the first switch unit  1  is controlled to be turned off, the second switch unit  2  is controlled to be turned on, so that a voltage V 2  of the second fixed potential terminal V 2  is transmitted to the fourth node N 4  through the second switch unit  2 , and at this time, a voltage at the fourth node N 4  is the voltage V 2 , the third switch unit  3  is controlled to be turned on, so that a voltage V data  of the data signal terminal Vdata is transmitted to the first node N 1  through the third switch unit  3 , and at this time, a voltage at the first node N 1  is the voltage V data ; in the data writing phase t 2 , the first switch unit  1  is controlled to be turned on, so that the voltage V data  of the data signal terminal Vdata is transmitted to the fourth node N 4  through the first switch unit  1 , and at this time, the voltage at the fourth node N 4  changes from the voltage V 2  to the voltage V data , an amount of change of the voltage at the fourth node N 4  is V data −V 2 , the second switch unit  2  and the third switch unit  3  are controlled to be turned off, due to a coupling effect between the first capacitor C 1  and the second capacitor C 2 , a potential at the first node N 1  changes from the voltage V data  to the voltage 
     
       
         
           
             
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     where C 1  is a capacitance value of the first capacitor C 1 , and C 2  is a capacitance value of the second capacitor C 2 ; in the light-emitting phase t 3 , the first switch unit  1 , the second switch unit  2  and the third switch unit  3  are controlled to be turned off, the driving transistor T generates a corresponding driving current based on the voltage at the first node N 1 , to drive the light-emitting device D to emit light. For example, it is assumed that V 2 =6V, the minimum voltage value that the data signal terminal Vdata can provide is 0V, then correspondingly the voltage at the first node 
     
       
         
           
             
               
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     and the maximum voltage value that the data signal terminal Vdata can provide is 6V, then correspondingly the voltage at the first node N 1  is 6V. It can be seen that, relative to a voltage value range provided by the data signal terminal Vdata, a voltage value range at the first node N 1  is larger, that is, the driving transistor T can generate a corresponding driving current under control of a gate voltage having a larger voltage range, thereby improving contrast of the light-emitting device D. 
     The pixel driving circuit in the embodiments of the present disclosure, through cooperation of the first switch unit, the second switch unit, the third switch unit and the first capacitor, and through the principle of capacitive coupling, changes the gate voltage of the driving transistor, to facilitate the gate voltage range of the driving transistor become larger with respect to the data voltage value range directly provided in the pixel driving circuit, that is, the driving transistor can generate a corresponding driving current under the control of the gate voltage having a larger voltage range, thereby improving the contrast of the light-emitting device. 
     Optionally, as shown in  FIGS. 2 and 3 ,  FIG. 2  is an equivalent circuit diagram of another pixel driving circuit according to an embodiment of the present disclosure, and  FIG. 3  is a signal sequence diagram of the pixel driving circuit in  FIG. 2 . The second switch unit  2  includes a first transistor M 1 , a first terminal of the first transistor M 1  is electrically connected to the second fixed potential terminal V 2 , a second terminal of the first transistor M 1  is electrically connected to the fourth node N 4 , and a control terminal of the first transistor M 1  is electrically connected to a scan signal terminal SCAN. The third switch unit  3  includes a second transistor M 2 , a first terminal of the second transistor M 2  is electrically connected to the data signal terminal Vdata, a second terminal of the second transistor M 2  is electrically connected to the first node N 1 , and a control terminal of the second transistor M 2  is electrically connected to the scan signal terminal SCAN. 
     Specifically, the first transistor M 1  and the second transistor M 2  may be transistors of the same type, for example, both are N-type transistors, or both are P-type transistors, and controlling of the first transistor M 1  and the second transistor M 2  can be achieved by the same scan signal terminal SCAN. 
     Optionally, as shown in  FIGS. 2 and 3 , the first switch unit  1  includes: a third transistor M 3  and a fourth transistor M 4 . The third transistor M 3  is an N-type transistor, a first terminal of the third transistor M 3  is electrically connected to the data signal terminal Vdata, a second terminal of the third transistor M 3  is electrically connected to the fourth node N 4 , and a control terminal of the third transistor M 3  being electrically connected to a first control signal terminal SW 1 . The fourth transistor M 4  is a P-type transistor, a first terminal of the fourth transistor M 4  is electrically connected to the data signal terminal Vdata, a second terminal of the fourth transistor M 4  is electrically connected to the fourth node N 4 , and a control terminal of the fourth transistor M 4  is electrically connected to a second control signal terminal SW 2 . 
     Specifically, the third transistor M 3  and the fourth transistor M 4  form a transmission gate, and both are turned off and turned on at the same time, so as to improve the transmission effect of the data signal. 
     Optionally, as shown in  FIGS. 2 and 3 , the pixel driving circuit further includes: a fifth transistor M 5 , a first terminal of the fifth transistor M 5  is electrically connected to a reference voltage terminal Vref, a second terminal of the fifth transistor M 5  is electrically connected to the third node N 3 , and a control terminal of the fifth transistor M 5  is connected to a reset control terminal RST. The fifth transistor M 5  is configured to achieve reset of the anode of the light-emitting device D to improve the display effect. 
     Optionally, the driving transistor T is an N-type transistor, the source of the driving transistor T is electrically connected to the third node N 3 , the driving current value of the driving transistor T is related to a gate-source voltage difference, that is, related to a voltage difference between the first node N 1  and the third node N 3 , so that the problem that the voltage difference between the first node N 1  and the third node N 3  is small is more likely to occur. 
     As shown in  FIGS. 2 and 3 , an embodiment of the present disclosure provides a pixel driving circuit, the pixel driving circuit includes: a driving transistor T connected in series between a first power supply terminal ELVDD and a second power supply terminal ELVSS, a light-emitting device D, a first capacitor C 1 , a second capacitor C 2 , a first transistor M 1 , a second transistor M 2 , a third transistor M 3 , and a fourth transistor M 4 . A control terminal of the driving transistor T is electrically connected to a first node N 1 , a first terminal of the driving transistor T is electrically connected to a second node N 2 , a second terminal of the driving transistor T is electrically connected to a third node N 3 , the second node N 2  is located between the first power supply terminal ELVDD and the driving transistor T, and the third node N 3  is located between the second power supply terminal ELVSS and the driving transistor T. The light-emitting device D is connected in series between the third node N 3  and the second power supply terminal ELVSS. The first capacitor C 1  has a first terminal electrically connected to the first node N 1  and having a second terminal electrically connected to the fourth node N 4 ; a second capacitor C 2  having a first terminal electrically connected to the first node N 1  and a second terminal electrically connected to a first fixed potential terminal V 1 . The first transistor M 1  has a first terminal electrically connected to a second fixed potential terminal V 2 , a second terminal electrically connected to the fourth node N 4 , and a control terminal electrically connected to a scan signal terminal SCAN. The second transistor M 2  has a first terminal electrically connected to a data signal terminal Vdata, a second terminal electrically connected to the first node N 1 , and a control terminal electrically connected to the scan signal terminal SCAN. The third transistor M 3  is an N-type transistor, a first terminal of the third transistor M 3  is electrically connected to the data signal terminal Vdata, a second terminal of the third transistor M 3  is electrically connected to the fourth node N 4 , and a control terminal of the third transistor M 3  is electrically connected to a first control signal terminal SW 1 . The fourth transistor M 4  is a P-type transistor, a first terminal of the fourth transistor M 4  is electrically connected to the data signal terminal Vdata, a second terminal of the fourth transistor M 4  is electrically connected to the fourth node N 4 , and a control terminal of the fourth transistor M 4  is electrically connected to a second control signal terminal SW 2 . The working time sequence of the pixel driving circuit sequentially includes the initialization phase t 1 , the data writing phase t 2  and the light-emitting phase t 3 : in the initialization phase t 1 , a turn-on level is provided to the scan signal terminal SCAN, taking the case that the first transistor M 1  and the second transistor M 2  are P-type transistors as an example, the turn-on level is a low level, the first transistor M 1  and the second transistor M 2  are controlled to be turned on, so that the voltage V 2  of the second fixed potential terminal V 2  is transmitted to the fourth node N 4  through the first transistor M 1 , and at this time, the voltage at the fourth node N 4  is the voltage V 2 , so that the voltage V data  of the data signal terminal Vdata is transmitted to the first node N 1  through the second transistor M 2 , and at this time, the voltage at the first node N 1  is the voltage V data , a low level is provided to the first control signal terminal SW 1 , to control the third transistor M 3  to be turned off, and a high level is provided to the second control signal terminal SW 2 , to control the fourth transistor M 4  to be turned off; in the data writing phase t 2 , a turn-off level is provided to the scan signal terminal SCAN, taking the case that the first transistor M 1  and the second transistor M 2  are P-type transistors for example, the turn-off level is a high level, to control the first transistor M 1  and the second transistor M 2  to be turned off, a high level is provided to the first control signal terminal SW 1 , to control the third transistor M 3  to be turned on, and a low level is provided to the second control signal terminal SW 2 , to control the fourth transistor M 4  to be turned on, so that the voltage V data  of the data signal terminal Vdata is transmitted to the fourth node N 4  through the third transistor M 3  and the fourth transistor M 4 , and an amount of change of the voltage at the fourth node N 4  is V data −V 2 , due to the coupling effect of the first capacitor C 1  and the second capacitor C 2 , the potential at the first node N 1  changes from V data  to V data +ΔV, 
     
       
         
           
             
               
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     in the light-emitting phase t 3 , a turn-off level is provided to the scan signal terminal SCAN, to control the first transistor M 1  and the second transistor M 2  to be turned off, a low level is provided to the first control signal terminal SW 1 , to control the third transistor M 3  to be turned off, and a high level is provided to the second control signal terminal SW 2 , to control the fourth transistor M 4  to be turned off. It is assumed that the minimum voltage value that the data signal terminal Vdata can provide is 0V, then correspondingly the voltage at the first node 
     
       
         
           
             
               
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     the maximum voltage value that the data signal terminal Vdata can provide is the voltage V 2 , then correspondingly the voltage at the first node N 1  is the voltage V 2 . Thus, it can be seen that, relative to a voltage value range provided by the data signal terminal Vdata, a voltage value range at the first node N 1  is larger, that is, the driving transistor T can generate a corresponding driving current under the control of the gate voltage having a larger voltage range, thereby improving the contrast of the light-emitting device D. 
     The pixel driving circuit in the embodiments of the present disclosure, through cooperation of the first transistor, the second transistor, the third transistor and the first capacitor, and through the principle of capacitive coupling, changes the gate voltage of the driving transistor, to facilitate the gate voltage range of the driving transistor become larger with respect to the data voltage value range directly provided in the pixel driving circuit, that is, the driving transistor can generate a corresponding driving current under the control of the gate voltage having a larger voltage range, thereby improving the contrast of the light-emitting device. 
     Optionally, the pixel driving circuit further includes: a fifth transistor M 5 , a first terminal of the fifth transistor M 5  is electrically connected to a reference voltage terminal Vref, a second terminal of the fifth transistor M 5  is electrically connected to the third node N 3 , and a control terminal of the fifth transistor M 5  is electrically connected to a reset control terminal RST. In the initialization phase tl, the turn-on level is provided to the reset control terminal RST, taking the case that the fifth transistor M 5  is an N-type transistor for example, the turn-on level is a high level, to control the fifth transistor M 5  to be turned on, such that the voltage of the reference voltage terminal Vref is transmitted to the third node N 3  through the fifth transistor M 5 , to reset the anode of the light-emitting device D; in the data writing phase t 2 , a turn-on level is provided to the reset control terminal RST, to control the fifth transistor M 5  to be turned on, such that the voltage of the reference voltage terminal Vref is transmitted to the third node N 3  through the fifth transistor M 5 ; in the light-emitting phase t 3 , a turn-off level is provided to the reset control terminal RST, to control the fifth transistor M 5  to be turned off. 
     An embodiment of the present disclosure further provides a display device, and it includes the above pixel driving circuit. 
     The specific structure and principle of the pixel driving circuit are the same as those in the above embodiments and will not be repeated here. The display device may be any electronic device having a display function, such as a touch screen, a mobile phone, a tablet computer, a laptop, or a television. 
     The display device in the embodiments of the present disclosure can keep the voltage of the node between the driving transistor and the light-emitting device unchanged during the light-emitting phase, so that the driving current generated by the driving transistor will not be affected by the change of the voltage across the two terminals of the light-emitting device, thereby solving the problem of uneven display due to the change in the voltage across the two terminals of the light-emitting device. 
     Optionally, the display device is a silicon-based micro display device, a size of the silicon-based micro display device is generally smaller than  1  inch, and an area of a single pixel is dozens of square microns. 
     Finally, it should be noted that the various embodiments above are only preferred embodiments used to illustrate the technical solutions of the present disclosure, rather than providing any limitation. Although the present disclosure has been described in detail with reference to the various embodiments above, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the various embodiments above or equivalently replace some or all of the technical features, while these modifications or replacements do not cause the essence of the corresponding technical solutions to depart from the scope of the technical solutions of the various embodiments of the present disclosure.