Patent Publication Number: US-10323910-B2

Title: Methods and apparatuses for eliminating a missile threat

Description:
TECHNICAL FIELD 
     Some embodiments relate to missile defense. Some embodiments relate to methods for identifying and exploiting vulnerabilities in missile threats. 
     BACKGROUND 
     Currently-available techniques for missile defense performance assessment focus on kinetic solutions to counter ballistic missile threats. Such techniques are incomplete because they do not account for all available types of countermeasures. Ongoing efforts are directed to improving techniques for missile defense performance enhancement, including techniques that account for all available types of countermeasures. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  illustrates some phases in which example embodiments can be implemented; 
         FIG. 2  is a block diagram of a computer for implementing methods to eliminate a missile threat according to example embodiments; 
         FIG. 3  is an example chart of vulnerability-technique (VT) pairs as can be generated in accordance with some embodiments; 
         FIG. 4  is an illustrative example of graphical representations for PDFs in accordance with some embodiments as what would be presented to a subject matter expert for each VT pair; and 
         FIG. 5  illustrates an example procedure for eliminating a missile threat in accordance with some embodiments. 
     
    
    
     DETAILED DESCRIPTION 
     The following description and the drawings sufficiently illustrate specific embodiments to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. Portions and features of some embodiments may be included in, or substituted for, those of other embodiments. Embodiments set forth in the claims encompass all available equivalents of those claims. 
     Current-available analytical techniques for missile defense performance assessment focus on kinetic solutions to counter ballistic missile threats. The term “kinetic” in the context of describing example embodiments refers to actions or countermeasures to threats taken through physical, material means, such as nuclear bombs, rockets, and other munitions. Some available analytical techniques focus on measures of effectiveness (MOE) that include probability of engagement success (Pes), which takes into account multiple kinetic interceptor shots each with a probability of single shot engagement kill (Pssek). Currently-available analytical techniques derive Pssek from measurements or estimations of several factors along the kinetic kill chain. These factors can include reliability of the combat system, communications system, and interceptor and the ability of the interceptor to intercept the re-entry vehicle of the ballistic missile. 
     However, currently-available methods for determining Pes do not consider non-kinetic means to counter ballistic missile threats and are thus incomplete. Currently-available methods may only consider expensive kinetic actions to be taken starting from a boost phase of a ballistic missile threat, when the ballistic missile threat has already been deployed. Non-kinetic solutions in the context of example embodiments are logical, electromagnetic, or behavioral. One easily-understood example would be a cyber-attack on an enemy computer system. Unlike most kinetic solutions, such non-kinetic solutions are typically used before the boost phase. 
     Currently available methods may be unable to calculate engagement success for non-kinetic countermeasures. It may be more difficult, relative to kinetic countermeasures, to calculate engagement success for non-kinetic countermeasures because physical measurements for success for these countermeasures may be difficult to define. When a non-kinetic measure is taken against a threat, it may be relatively difficult to ascertain that the non-kinetic measure did, in fact, directly cause a failure of the threat because it may be difficult or impossible to observe the non-kinetic countermeasures taking place inside the enemy system. Calculation of engagement success for non-kinetic countermeasures, therefore, can require calculation of probability of placement, and the probability that the non-kinetic countermeasure can actually be activated, in addition to the probability that the non-kinetic countermeasure will be successful in destroying or disabling the threat. Calculation of engagement success for non-kinetic countermeasures is further complicated by the fact that some non-kinetic countermeasures may be in place for months or years. In contrast, kinetic countermeasures are typically very visible and observable, in a relatively short time frame that can be measured in minutes or even seconds. 
     Furthermore, currently-available systems may not provide an indication of the level of confidence that operators can have in the predicted success of countermeasures, which can make it difficult for agencies to justify large expenditures for kinetic countermeasures. Finally, available methods do not consider the use of confidence levels in the effectiveness of various techniques in eliminating threats when determining whether to apply those various techniques. Accordingly, it may be difficult to optimize and coordinate usage of multiple countermeasure techniques against enemy vulnerabilities. 
     Methods, apparatuses, and systems described herein for implementing various embodiments provide more comprehensive ways to provide analytic assessment of missile defense operations, by considering mitigation of ballistic missile threats before launch (e.g., “left of launch”) of such threats, in addition to assessment of certain countermeasures during and after the boost phase of a ballistic missile threat. Embodiments implement a stochastic mathematical model (SMM) for computation of Probability of Ballistic Missile Negation (P n ), for left of launch techniques implemented against missile production, fielding and deployment, and boost vulnerabilities. In addition, systems, methods, and apparatuses of some embodiments can provide a quantifiable indicator of the level of confidence that governmental and military agencies can take in these probability computations. 
       FIG. 1  illustrates some phases in which example embodiments can be implemented. For example, as shown in  FIG. 1 , embodiments can consider non-kinetic countermeasures implemented in manufacturing, product, and test phases  110 . Such countermeasures can include the inducing of kinetic material defects within materials used in ballistic missile manufacturing, or causing failures within the design and specification process for the threat. Such countermeasures can cause defects in materials early in manufacturing phases such that the defects propagate throughout the missile&#39;s entire life cycle. 
     Some embodiments can consider countermeasures implemented in fielding and deployment phases  120 . Such countermeasures can include disrupting launch, further degradation of material integrity, disrupting logistics, inducing failures during hardware and software upgrades, affecting the calibration and maintenance of the threat, etc. Phases  110  and  120  can be understood as being left of launch  130 . 
     Some embodiments can analyze the success of countermeasures implemented in a boost phase  140 . Such countermeasures can include disrupting or degrading material integrity, disrupting uplinks  150 , initiating self-destruction of missiles, disrupting guidance systems or communication systems  160 , etc. 
       FIG. 2  is a block diagram of a computer  200  for implementing methods to eliminate a missile threat according to example embodiments. 
     The computer  200  will include a communication interface  210 . The communication interface  210  will receive identification information identifying a vulnerability associated with a missile threat. Further, the communication interface  210  will receive identification information identifying a technique for exploiting the vulnerability. The communication interface  210  can retrieve this information from memory  220  or store such received information into memory  220 . 
     The computer  200  includes at least one processor  230 . The processor  230  will generate at least one vulnerability-technique (VT) pair based on information received by the communication interface  210 .  FIG. 3  is an example chart  300  of VT pairs as can be generated in accordance with some embodiments. The upper row  302  lists various vulnerabilities  304  that can occur at various phases of a threat&#39;s life cycle. The illustrated phases include a manufacturing and production phase  306 , a test phase  308 , a fielding phase  310 , and a boost phase  312 , although embodiments are not limited to any particular number of phases and phase identifiers are not limited to any particular identifiers. Missile design and manufacturing engineers or other experts or computer systems can assess and identify these vulnerabilities. 
     Column  314  lists various techniques  318  for exploiting and manipulating each vulnerability. Cyber-engineers, electronic warfare experts, or other experts or computer systems can identify these techniques. The techniques  318  can include cyber weapons, directed energy, electronic warfare, etc. Cyber weapons can include digital techniques that can disrupt or destroy hardware or software components of a computerized system or network. Directed energy techniques can include targeted electromagnetic pulse (EMP). Electronic warfare techniques can exploit wireless vulnerabilities. The multiple techniques  318  may be independent such that the desired effect is achieved if one or more of the techniques  318  are successfully implemented. Conversely, the multiple techniques  318  may only result in the desire effect when all of the techniques  318  are successfully implemented. 
     Subject matter experts (SMEs) can then identify one or more VT pairs  316 . SMEs can assign a score (not shown in  FIG. 3 ) to each VT pair  316  representing the likelihood that the given technique  318  can exploit the given vulnerability  304 . In embodiments, this score includes a judgment based on the experience of the SME. While scoring systems provide a relative ranking for the VT pairs  316  versus a probability of engagement success, apparatuses and methods described herein with respect to various embodiments further allow experts to associate probability distributions, derived as described later herein, with the confidence levels that these experts have in the likelihood that a technique will negate a vulnerability. 
     The processor  230  will apply an SMM to generate a negation value P n  that represents the probability that techniques  318  of respective VT pairs  316  will eliminate the threat by exploiting the respective vulnerability  304 . 
     The negation value P n  can be decomposed into several components as described below with reference to Equations (1)-(30). In embodiments, the negation value P n  will include four components, but other embodiments can include more or fewer components. There is no theoretical limit on the number of components used, but computational time will typically be faster when the negation value P n  includes fewer, rather than more, components. Confidence levels in results may be higher, however, when the negation value P n  includes more, rather than fewer, components. 
     Each component represents a different criterion or combination of criteria for estimating the probability that implementation of the respective technique  318  will eliminate the missile threat. These criteria can be selected from a list including, but not limited to: a placement criterion to represent whether an instrumentality for executing the technique  318  can be placed in a manner to exploit the vulnerability  304 ; an activation criterion to represent whether the technique  318  can be activated subsequent to placement of the instrumentality for executing the technique  318 ; a success criterion to represent whether implementation of the technique  318  can exploit the corresponding vulnerability  304 ; and a severity criterion to represent the severity with which the vulnerability  304  affects operation of the missile threat. 
     Success is defined in the context of example embodiments to refer to a measure of whether the technique  318  performed as the technique  318  was designed to perform. Severity is defined in the context of example embodiments to refer to a measure of whether the technique  318  had a significant impact on threat performance. For example, a first technique  318  when successful may have the effect of changing the color of a piece of hardware, whereas a second technique  318  when successful causes the hardware to break apart under acoustic loads. Even if the probability of success for each of the first technique  318  and the second technique  318  were the same, the probability of being severe is much higher for the second technique  318  than for the first technique  318 . Accordingly, given the same probability of success for each technique  318 , the probability of effectiveness would be higher for the second technique  318  than for the first technique  318 . 
     In embodiments, the processor  230  will decompose the negation value P n  according to at least the following equations and principles. 
     First, it will be appreciated that, in order to eliminate a threat, a VT pair  316  must be both deployed and effective:
 
 P   n   =P ( e,d )  (1)
 
     where P(e,d) is the probability of a technique  318  being both deployed d and effective e against a given vulnerability  304 . If a technique  318  is not deployed or not effective, then the missile will not be negated. 
     Also, since a technique  318  cannot be effective if it is not deployed:
 
 P ( e|˜d )=0  (2)
 
Likewise:
 
 P (˜ e|d )=1  (3)
 
Therefore:
 
 P ( e,˜d )= P ( e|˜d ) P ( d )=0  (4)
 
Likewise:
 
 P (˜ e,˜d )= P (˜ e|˜d ) P (˜ d )= P (˜ d )=1− P ( d )  (5)
 
     Based on the law of total probability, for a given VT pair, V i T j :
 
 P ( d )= P ( e,d )+ P (˜ e,d )  (6)
 
 P (˜ d )= P ( e,˜d )+ P (˜ e,˜d )=1− P ( d )  (7)
 
 P ( e )= P ( e,d )+ P ( e,˜d )= P ( e,d )= P   n ( V   i   T   j )  (8)
 
 P (˜ e )= P (˜ e,d )+ P (˜ e,˜d )=1− P ( e )  (9)
 
     Applying Bayes&#39; theorem gives:
 
 P ( e,d )= P ( e|d )× P ( d )  (10)
 
     In turn, for a VT pair  316  to be effective, the technique  318  must be successful su and severe sv:
 
 P ( e|d )= P ( sv,su )  (11)
 
     Equation (11) signifies that if a VT pair  316  is not successful or not severe, then the VT pair  316  will not be effective given it is deployed. 
     Also, since a VT pair  316  cannot be severe if it is not successful:
 
 P ( sv|˜su )=0  (12)
 
Likewise:
 
 P (˜ sv|˜su )=1  (13)
 
Therefore:
 
 P (˜ su,sv )= P ( sv|˜su ) P (˜ su )=0  (14)
 
Likewise,
 
 P (˜ su,˜sv )= P (˜ sv|˜su ) P (˜ su )= P (˜ su )=1− P ( su )  (15)
 
     Based on the law of total probability:
 
 P ( su )= P ( su,sv )+ P ( su,˜sv )  (16)
 
 P (˜ su )= P ( ˜su,sv )+ P (˜ su,˜sv )=1− P ( su )  (17)
 
 P ( sv )= P ( su,sv )+ P (˜ su,sv )= P ( su,sv )= P ( e|d )  (18)
 
 P (˜ sv )= P ( su,˜sv )+ P (˜ su,˜sv )= P ( su )− P ( su,sv )+1− P ( su )=1− P ( su,sv )  (19)
 
     Applying Bayes&#39; theorem gives:
 
 P ( e|d )= P ( sv|su )× P ( su )  (20)
 
     Equation (20) signifies that the processor  230  will receive inputs representative of the probability of a VT pair  316  being severe given that it is successful (e.g., P(sv|su)), and the probability of a VT pair  316  being successful (e.g., P(su)). The processor  230  will receive inputs of these probabilities from an SME, for example, or a computer system, as described in more detail herein with reference to  FIG. 4 . 
     Finally, in order for a VT pair  316  to be deployed d, the VT pair  316  must be placed pl and activated a:
 
 P ( d )= P ( a,pl )  (21)
 
     where P(a,pl) is the probability of a VT pair  316  being both placed and activated, and therefore deployed. 
     If a VT pair  316  is not placed or not activated, then the VT pair  316  will not be deployed. Also, since a VT pair  316  cannot be activated if it is not placed:
 
 P ( a|˜pl )=0  (22)
 
Likewise:
 
 P (˜ a|˜pl )=1  (23)
 
Therefore,
 
 P ( a,˜pl )= P ( a|˜pl ) P (˜ pl )=0  (24)
 
Likewise,
 
 P (˜ a,˜pl )= P (˜ a|˜pl ) P (˜ pl )= P (˜ pl )=1− P ( pl )  (25)
 
     Based on the law of total probability,
 
 P ( a )= P ( a,pl )+ P ( a,˜pl )= P ( a,pl )= P ( d )  (26)
 
 P (˜ a )= P (˜ a,pl )+ P (˜ a,˜pl )=1− P ( a )=1− P ( d )  (27)
 
 P ( pl )= P ( a,pl )+ P (˜ a,pl )  (28)
 
 P (˜ pl )= P ( a,˜pl )+ P (˜ a,˜pl )=1− P ( pl )  (29)
 
     Applying Bayes&#39; theorem gives:
 
 P ( d )= P ( a|pl )× P ( pl )  (30)
 
     Equation (30) signifies that the processor  230  will receive inputs representative of the probability of a VT pair  316  being activated given that it is placed (e.g., P(a|pl)) and the probability of a VT pair  316  being placed (e.g., P(pl)). The processor  230  will receive inputs of these probabilities from an SME, for example, or a computer system, as described in more detail herein with reference to  FIG. 4 . 
     By combining Equations (10), (20), and (30) for each technique T j  against vulnerability V i , the probability of negation P n  for VT pair V i T j  can be written:
 
 P   n ( V   i   T   j )= P ( sv   ij   |su   ij ) P ( su   ij )× P ( a   ij   |pl   ij ) P ( pl   ij )  (31)
 
     The processor  230  will treat each component of Equation (31) as a random variable, with probability distribution functions (PDFs) provided by user input or through automated systems. For example, the processor  230  can treat a first component of Equation (31) as a random variable RV 1 :
 
RV 1   =sv   ij   |su   ij   (32)
 
     A PDF for RV 1  can be expressed as:
 
 f   1 ( sv   ij   |su   ij )  (33)
 
     The processor  230  can treat a second component of Equation (31) as a random variable RV 2 :
 
RV 1   =su   ij   (34)
 
     A PDF for RV 2  can be expressed as:
 
 f   2 ( su   ij )  (35)
 
     The processor  230  can treat a third component of Equation (31) as a random variable RV 3 :
 
RV 3   =a   ij   |pl   ij   (36)
 
     A PDF for RV 3  can be expressed as:
 
 f   3 ( a   ij   |pl   ij )  (37)
 
     The processor  230  can treat a fourth component of Equation (31) as a random variable RV 4 :
 
RV 4   =pl   ij   (38)
 
     A PDF for RV 4  can be expressed as:
 
 f   4 ( pl   ij )  (39)
 
     The computer  200  further includes a user display  245  to display graphical representations of the PDFs given by Equations (33), (35), (37) and (39).  FIG. 4  is an illustrative example of graphical representations for PDFs in accordance with some embodiments as what would be presented to an SME for each VT pair  316 . Each PDF represents a different confidence level associated with the corresponding component. For example, each PDF represents how confident an SME is in that component. While four components (and PDFs) are shown and described, embodiments are not limited to any particular number of components and PDFs. 
     As shown in  FIG. 4 , each component  400  has an associated five PDFs representative of different confidence levels. The processor  220  can receive selections of one PDF from each set of PDFs, to generate a set of selected PDFs. The confidence levels can represent how much confidence an operator, such as a SME or analyst, has in that particular component  400 . 
     In the illustrative example, the SME is ambivalent as to whether the corresponding technique  318  ( FIG. 3 ) was placed, so the SME has selected the “Ambivalent” PDF  402  for the relevant component. Similarly, the SME can be relatively more confident that the technique  318  was either activated or placed, and the SME may select PDF  404 . The SME may be relatively non-confident that the technique  318  will be successful, and the SME may select PDF  406  to correspond to that component. Similarly, the SME may be relatively confident that the technique  318  will be successful or severe, and the SME may select PDF  408  to correspond to that component. 
     The processor  230  can generate any number of negation values P n  based on any number of corresponding VT pairs  316 . The processor  230  may combine the negation values P n  in several ways to compute the probability that execution of at least one of the techniques  318  of the plurality of VT pairs  316  will successfully exploit the vulnerability  304  to eliminate the threat. For example, in some embodiments, several techniques, T 1 , T 2 , . . . , T m , can be deployed to exploit a single vulnerability, V i . These techniques may be independent of each other, that is, any one of them, if effective, will negate the missile. Likewise, the techniques may be highly dependent on one another, that is, the missile will only be negated if all of the techniques are effective. 
     The processor  230  can calculate a composite technique, T j  that includes m techniques applied to the vulnerability V i , under the assumption that all of the techniques are independent of one other. Then the composite probability of negation is the probability that all m techniques will not be ineffective, or the probability of at least one technique will be effective:
 
 P   n ( V   i )=1−Π s=1   m (1− P   n ( V   i   T   s ))  (40)
 
     The processor  230  can also calculate a composite technique, T j , comprised of m techniques applied to the vulnerability V i , under the assumption that all of the techniques are dependent on one other. Then the composite probability of negation is the probability that all m techniques are effective:
 
 P   n ( V   i )=Π s=1   m   P   n ( V   i   T   s )  (41)
 
     Likewise, if techniques against q different vulnerabilities must be effective to negate the missile, then the processor  230  calculates the overall probability of negation according to:
 
 P   n =Π t=1   q   P   n ( V   t )  (42)
 
     Finally, if techniques against q different vulnerabilities are deployed such that any one of them can negate the missile, then the processor  230  calculates the overall probability of negation according to:
 
 P   n =1−Π t=1   q (1− P   n ( V   t ))  (43)
 
     In each of Equations (41)-(43), P n (V i T s ) is calculated using Eq 31. 
     In reality, the actual case could be a combination of dependent and independent techniques against a single vulnerability and several dependent and independent vulnerabilities against a certain missile. 
     Once the processor  230  has received the appropriate PDFs for each outcome for each VT pair  316 , the processor  230  or other system such as simulator, can model a “kill chain,” where a kill chain defines each step of the missile life cycle where the threat may be negated (i.e., “killed”). For example, the kill chain could include the following steps: system engineering design, supply chain, manufacturing, quality assurance, operations and maintenance, fielding and deployment, and flight (e.g., boost, mid-course, terminal), or any other steps. The processor  230  can use the model to determine the correct composite form for Equations (31) and (41)-(43) for a specific missile under attack and specific VT pairs  316 . The processor  230  can execute the model using random numbers or other values from the PDFs that were provided to the processor  230 . The processor  230  can combine PDFs to determine probability of eliminating the missile threat using the corresponding technique, wherein the combining can include performing a logical AND operation, a logical OR operation, or both a logical AND and a logical OR operation. The processor  230  can combine the PDFs using at least two combination methods, each of the at least two combination methods including different combinations of logical operations, and the processor  230  can provide a sensitivity analysis that compares probabilities using at least two combination methods. 
     The processor  230  can calculate various values or generate other data, for example the processor  230  can calculate the mean and confidence interval for P n , as well as the PDF for P n . The processor  230  can determine which parameters are driving P n  to determine the sensitivity of each element on P n . Operators or governmental agencies can use the models, data, and calculations generated using methods and apparatuses in accordance with various embodiments to make a determination to perform additional research into vulnerabilities, techniques, etc. 
     While some embodiments are described with respect to input devices, some embodiments allow for selection to be performed in an automated fashion by the processor  230 , instead of or in addition to being performed through a user input. The selection provides an indication of the confidence level associated with the corresponding component to generate a set of selected PDFs. The processor  230  will combine selected PDFs to determine probability of eliminating the missile threat using the corresponding technique. The processor  230  may perform this combination according to various methods, including by performing a logical AND operation, a logical OR operation, or both a logical AND and a logical OR operation, although embodiments are not limited thereto. In some embodiments, the processor  230  may combine the PDFs using at least two combination methods, each of the at least two combination methods including different combinations of logical operations, to perform a sensitivity analysis to compare probabilities using each of the at least two combination methods. 
     The computer  200  includes memory  220 . In one embodiment, the memory  220  includes, but is not limited to, random access memory (RAM), dynamic RAM (DRAM), static RAM (SRAM), synchronous DRAM (SDRAM), double data rate (DDR) SDRAM (DDR-SDRAM), or any device capable of supporting high-speed buffering of data. The memory  220  can store, for example, accumulated images and at least a subset of frames of the video data. 
     The computer  200  can include computer instructions  240  that, when implemented on the computer  200 , cause the computer  200  to implement functionality in accordance with example embodiments. The instructions  240  can be stored on a computer-readable storage device, which can be read and executed by at least one processor  230  to perform the operations described herein. In some embodiments, the instructions  240  are stored on the processor  230  or the memory  220  such that the processor  230  or the memory  220  acts as computer-readable media. A computer-readable storage device can include any non-transitory mechanism for storing information in a form readable by a machine (e.g., a computer). For example, a computer-readable storage device can include ROM, RAM, magnetic disk storage media, optical storage media, flash-memory devices, and other storage devices and media. 
     The instructions  240  can, when executed on the computer  200 , cause the computer  200  to identify a vulnerability  304  ( FIG. 3 ) associated with a missile threat, as described earlier herein. The instructions can cause the computer  200  to identify a technique  318  ( FIG. 3 ) for exploiting the vulnerability  304  ( FIG. 3 ) to generate a vulnerability-technique (VT) pair  316  ( FIG. 3 ). The instructions  240  can cause the computer  200  to apply an SMM to generate a negation value P n , the negation value P n  being representative of a probability that the technique  318  of the respective VT pair  316  will eliminate the threat by exploiting the vulnerability  304 . The instructions  240  can cause the computer  200  to provide a recommendation for implementing the technique  318  to eliminate the missile threat responsive to receiving a selection of the technique  318 , where the selection is based on the generated negation value P n . Various portions of embodiments can be implemented, concurrently or sequentially, on parallel processors using technologies such as multi-threading capabilities. 
       FIG. 5  illustrates an example procedure  500  for eliminating a missile threat in accordance with some embodiments. The method may be performed by, for example, the processor  230  as described above and can be based on techniques  318 , vulnerabilities  304 , and VT pairs  316  as described above. 
     In operation  510 , the processor  230  identifies a vulnerability  304  associated with the missile threat. As described earlier with reference to  FIG. 2 , information identifying the vulnerability  304  may be received through a communication interface  210  or retrieved from memory in some embodiments, although embodiments are not limited thereto. 
     In operation  520 , the processor  230  identifies a technique  318  for exploiting the vulnerability  304  to generate a VT pair  316 , as described earlier herein with reference to  FIG. 3 . There technique  318  can be selected from a set of non-kinetic techniques that include directed energy (DE) techniques, electronic warfare (EW) techniques, and cyber warfare techniques, although embodiments are not limited thereto. 
     In operation  530 , the processor  230  applies an SMM to generate a negation value P n . The negation value P n  may represent a probability that the technique  318  of the respective VT pair  316  will eliminate the threat by exploiting the vulnerability  304 . The negation value P n  may be generated as described earlier herein with reference to Equations (1)-(7) and can include a plurality of components. 
     The processor  230  will generate a set of PDFs for each of the plurality of components. Each PDF in one set will represent a different confidence level associated with the corresponding component. The processor  230  will provide graphical representations for each set of PDFs. The graphical representations may be similar to those described earlier herein with reference to  FIG. 4 . As described earlier herein with reference to  FIG. 4 , the processor  230  will receive a selection of one PDF from each set of PDFs, wherein the selection provides an indication of the confidence level associated with the corresponding component. The processor  230  will combine the selected PDFs, according to one of the methods described earlier herein, to determine probability of eliminating the missile threat using the corresponding technique  318 . 
     In operation  540 , the processor  230  provides a recommendation for implementing the technique  318  to eliminate the missile threat responsive to receiving a selection of the technique  318 . The selection may be selected based on the generated negation value P n . 
     The Abstract is provided to comply with 37 C.F.R. Section 1.72(b) requiring an abstract that will allow the reader to ascertain the nature and gist of the technical disclosure. It is submitted with the understanding that it will not be used to limit or interpret the scope or meaning of the claims. The following claims are hereby incorporated into the detailed description, with each claim standing on its own as a separate embodiment.