Patent Publication Number: US-11656266-B2

Title: Method and system for online monitoring of health status of insulated-gate bipolar transistor module

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application claims the priority benefit of China application serial no. 202010286330.7, filed on Apr. 13, 2020. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification. 
     BACKGROUND 
     Technical Field 
     The disclosure relates to the field of insulated-gate bipolar transistor (IGBT) status monitoring, and more specifically relates to a method and a system for online monitoring of an IGBT health status based on a collector current imbalance rate. 
     Description of Related Art 
     Power electronic equipment has become one of the key assemblies in various equipment. Such equipment is mainly composed of IGBT. A single IGBT chip may withstand a maximum current of 200 A, which is far from satisfying the current level requirements in current power conversion devices. If the current continues to rise, the modules are required to be connected in parallel to form a system, or the modules are required to be directly connected in parallel. There are many occasions where IGBT modules are required to be connected in parallel, which all play a very important role in the applications of IGBT parallel connection. For example, when the IGBT module of the required current level does not exist; although the IGBT module may satisfy the current level requirements, the packaging thereof cannot satisfy the requirements of rated parameters; or for many mass-produced equipment, the mechanical structures thereof are relatively fixed, modules of specific packaging are required. During the operation process of parallel modules, the most important indicator is whether each module can share the same current, which is not only related to the life-span and reliability of each module, but is also related to the efficiency of the entire system, and is the key to ensuring the stable operation of the system. 
     There are many failure types of the IGBT. In general, failures may be divided into two main types: sudden failure and gradual failure. The sudden failure is an unpredictable failure that may occur at any stage during the usage process of the device. The gradual failure is a failure from quantitative change to qualitative change due to the working status of the device over time, which is predictable in terms of time. At the same time, the main form of failure of the gradual failure is packaging failure, which is divided into two failure modes: solder layer failure and bonding wire failure. 
     The solder layer failure mainly causes the junction temperature to increase. For most of the current IGBT devices, the positive temperature coefficient technology which is basically adopted ensures that the modules have current sharing ability when connected in parallel. That is, the module with the higher temperature receives less current in parallel branches, thereby forming negative feedback to ensure that the aging process of the module with solder layer aging will not further accelerate. However, such self-adjusting ability of temperature is not very effective. After the solder layer aging begins, unless the heat dissipation ability of the system is increased, the aging process will gradually accelerate until the chip falls off or other problems arise to cause module failure. 
     The bonding wire failure mainly causes the increase of on-resistance of the module, and the increase of external on-state voltage drop. Although the resistance of a single bonding wire is less than the on-resistance of the chip, when multiple bonding wires fall off together, the increased resistance cannot be neglected. For each branch of the parallel modules, the falling off of the bonding wires causes a more serious problem of uneven current distribution. When the current value passing through an aged module decreases, more current will pass through other normal modules, which may even cause other modules to be overloaded, thereby accelerating the failure of other modules. Therefore, there is necessity to properly derate the entire system. 
     Regardless of the failure mode, the manifestation of the potential failure thereof is different from the manifestation of a single transistor, which has become a blind spot for online health monitoring. 
     SUMMARY 
     The disclosure provides a method and a system for online monitoring of a health status of an insulated-gate bipolar transistor (IGBT) based on a collector current imbalance rate. Through a real-time online manner, the health status of each parallel IGBT module is assessed and monitored without historical data. 
     In order to achieve the above objective, according to an aspect of the disclosure, a method for online monitoring of a health status of an IGBT module is provided, which includes the following steps. 
     An abnormal IGBT module is determined according to a collector current value of each IGBT module among parallel IGBT modules. 
     The collector current value of each abnormal IGBT module is extracted and compared with a maximum value among measured collector current values of normal IGBT modules to obtain a current imbalance rate of each abnormal IGBT module. 
     An abnormal type of an IGBT module is determined according to a case temperature of each IGBT module among the parallel IGBT modules. 
     For any abnormal IGBT module, the current imbalance rate and the case temperature of the abnormal IGBT module are brought into a parallel IGBT health status detection model, and whether the abnormal IGBT module fails is determined according to the abnormal type of the abnormal IGBT module. 
     Preferably, the step of determining the abnormal IGBT module according to the collector current value of each IGBT module among the parallel IGBT modules includes the following step. 
     The collector current value of each IGBT module among the parallel IGBT modules is compared, and an IGBT module with the collector current value less than a preset current value is regarded as the abnormal IGBT module. 
     The step of determining the abnormal type of the IGBT module according to the case temperature of each IGBT module among the parallel IGBT modules includes the following step. 
     The case temperature of each IGBT module among the parallel IGBT modules is compared, an IGBT module with the case temperature less than a preset case temperature value is regarded as an abnormal bonding wire IGBT module, and an IGBT module with the case temperature equal to the preset case temperature value is regarded as an abnormal solder layer IGBT module. 
     Preferably, the current imbalance rate of each abnormal IGBT module is determined 
     
       
         
           
             
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     from where I C  is the maximum value among the measured collector current values of the normal IGBT modules, and I C ′ is the collector current of the abnormal IGBT module. 
     Preferably, the parallel IGBT health status detection model is: 
     
       
         
           
             
               
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     where V dc  is the external voltage of the main circuit, V o  is the on voltage of the IGBT module when the temperature is at a room temperature of 25° C., R is the on-resistance of the IGBT module when the temperature is at a room temperature of 25° C., ΔV is the increment of the on voltage at different temperatures, ΔR is the increment of the on-resistance at different temperatures, ΔR′ is the increment of the on-resistance when a bonding wire within the IGBT module is broken, R load  is the load resistance, V o   max  is the on voltage value at a maximum temperature T max  given in a data sheet, V o   typ  is the on voltage value at a typical temperature T typ  given in the data sheet, R max  is the on-resistance value at the maximum temperature T max  given in the data sheet, R typ  is the on-resistance value at the typical temperature T typ  given in the data sheet, T j  is the real-time working temperature of the internal chip of the IGBT module, n represents the parallel module format, k 1  and b 1  represent the function coefficients of the on voltage changing with temperature, k 2  and b 2  represent the function coefficients of the on-resistance changing with temperature, ΔT j  represents the increment of the junction temperature caused by different failure processes, P loss  represents the power loss of the IGBT module, which includes a switching power loss P sw  and a conduction power loss P cond , r jc  represents the thermal resistance of the IGBT module from the chip to the case, T C  represents the case temperature of the IGBT module, and Δr jc  represents the increment of the thermal resistance caused by different failure processes. 
     Preferably, the step of determining whether the abnormal IGBT module fails according to the abnormal type of the abnormal IGBT module includes the following steps. 
     If the abnormal type of the abnormal IGBT module is bonding wire breakage abnormality, the increment of the on-resistance of the abnormal IGBT module at different temperatures is obtained from the parallel IGBT health status detection model. Whether the increment of the on-resistance of the abnormal IGBT module at different temperatures is greater than a preset resistance increment value is determined. If the increment is greater than the preset resistance increment value, it is determined that the abnormal IGBT module fails due to bonding wire breakage. Otherwise, it is determined that the abnormal IGBT module does not fail. 
     If the abnormal type of the abnormal IGBT module is solder layer aging abnormality, the increment of the thermal resistance of the abnormal IGBT module is obtained from the parallel IGBT health status detection model. Whether the increment of the thermal resistance of the abnormal IGBT module is greater than a preset thermal resistance increment value is determined. If the increment is greater than the preset thermal resistance increment value, it is determined that the IGBT module fails due to solder layer aging. Otherwise, it is determined that the IGBT module does not fail. 
     According to another aspect of the disclosure, a system for online monitoring of a health status of an IGBT module is provided, which includes the following. 
     An abnormality determination module is configured to determine an abnormal IGBT module according to a collector current value of each IGBT module among parallel IGBT modules. 
     A current imbalance rate calculation module is configured to extract the collector current value of each abnormal IGBT module to be compared with a maximum value among measured collector current values of normal IGBT modules to obtain a current imbalance rate of each abnormal IGBT module. 
     An abnormal type determination module is configured to determine an abnormal type of an IGBT module according to a case temperature of each IGBT module among the parallel IGBT modules. 
     A failure determination module is configured to bring the current imbalance rate and the case temperature of the abnormal IGBT module into a parallel IGBT health status detection model for any abnormal IGBT module, and determine whether the abnormal IGBT module fails according to the abnormal type of the abnormal IGBT module. 
     Preferably, the abnormality determination module is configured to compare the collector current value of each IGBT module among the parallel IGBT modules, and regard an IGBT module with the collector current value less than a preset current value as the abnormal IGBT module. 
     The abnormal type determination module is configured to compare the case temperature of each IGBT module among the parallel IGBT modules, regard an IGBT module with the case temperature less than a preset case temperature value as an abnormal bonding wire IGBT module, and regard an IGBT module with the case temperature equal to the preset case temperature value as an abnormal solder layer IGBT module. 
     Preferably, the current imbalance rate of each abnormal IGBT module is determined from 
               α   =       I   C   ′       I   C         ,         
where I C  is the maximum value among the measured collector current values of the normal IGBT modules, and I C ′ is the collector current of the abnormal IGBT module.
 
     Preferably, the parallel IGBT health status detection model is: 
     
       
         
           
             
               
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     where V dc  is the external voltage of the main circuit, V o  is the on voltage of the IGBT module when the temperature is at a room temperature of 25° C., R is the on-resistance of the IGBT module when the temperature is at a room temperature of 25° C., ΔV is the increment of the on voltage at different temperatures, ΔR is the increment of the on-resistance at different temperatures, ΔR′ is the increment of the on-resistance when a bonding wire within the IGBT module is broken, R load  is the load resistance, v o   max  is the on voltage value at a maximum temperature T max  given in a data sheet, V o   typ  is the on voltage value at a typical temperature T typ  given in the data sheet, R max  is the on-resistance value at the maximum temperature T max  given in the data sheet, R typ  is the on-resistance value at the typical temperature T typ  given in the data sheet, T j  is the real-time working temperature of the internal chip of the IGBT module, n represents the parallel module format, k 1  and b 1  represent the function coefficients of the on voltage changing with temperature, k 2  and b 2  represent the function coefficients of the on-resistance changing with temperature, ΔT j  represents the increment of the junction temperature caused by different failure processes, P loss  represents the power loss of the IGBT module, which includes a switching power loss P sw  and a conduction power loss P cond , r jc  represents the thermal resistance of the IGBT module from the chip to the case, T C  represents the case temperature of the IGBT module, and Δr jc  represents the increment of the thermal resistance caused by different failure processes. 
     Preferably, the failure determination module is configured to obtain the increment of the on-resistance of the abnormal IGBT module at different temperatures from the parallel IGBT health status detection model when the abnormal type of the abnormal IGBT module is bonding wire breakage abnormality, and determine whether the increment of the on-resistance of the abnormal IGBT module at different temperatures is greater than a preset resistance increment value. If the increment is greater than the preset resistance increment value, it is determined that the abnormal IGBT module fails due to bonding wire breakage. Otherwise, it is determined that the abnormal IGBT module does not fail. 
     When the abnormal type of the abnormal IGBT module is solder layer aging abnormality, the increment of the thermal resistance of the abnormal IGBT module is obtained from the parallel IGBT health status detection model. Whether the increment of the thermal resistance of the abnormal IGBT module is greater than a preset thermal resistance increment value is determined. If the increment is greater than the preset thermal resistance increment value, it is determined that the IGBT module fails due to solder layer aging. Otherwise, it is determined that the IGBT module does not fail. 
     According to another aspect of the disclosure, a computer-readable storage medium is provided, which is stored with a program instruction. When the program instruction is executed by a processor, the method for online monitoring of the health status of the IGBT module is implemented. 
     In general, compared with the prior art, the above technical solutions conceived by the disclosure can achieve the following beneficial effects. 
     According to the current state of IGBT module application development, the disclosure conducts a detailed research on electrical characteristics of the most commonly used parallel connection of the IGBT modules, and analyzes the changing trend of electrical signal with changes in the health status of each IGBT module in detail. Based on the horizontal comparison of the electrical characteristics of each module, a method for online monitoring of a health status of parallel IGBT modules is established. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a schematic flowchart of a method according to an embodiment of the disclosure. 
         FIG.  2    is an equivalent circuit diagram of parallel modules according to an embodiment of the disclosure. 
         FIG.  3    is a schematic diagram of changes in each branch of a parallel current distribution according to an embodiment of the disclosure. 
         FIG.  4 A  is a simulation diagram of the current distribution of each module when 2 bonding wires fall off. 
         FIG.  4 B  is a simulation diagram of the current distribution of each module when 4 bonding wires fall off. 
         FIG.  4 C  is a simulation diagram of the current distribution of each module when 6 bonding wires fall off. 
         FIG.  5    is an experimental verification diagram of the collector current distributions of the faulty module and the normal module according to an embodiment of the disclosure, where the left drawing shows the current value of 9.7 A of a module with 6 bonding wires fallen off, and the right drawing shows the current value of 10.8 A of the normal module. 
         FIG.  6    is a block diagram of a system according to an embodiment of the disclosure. 
     
    
    
     DETAILED DESCRIPTION OF DISCLOSED EMBODIMENTS 
     In order for the objectives, technical solutions, and advantages of the disclosure to be clearer, the disclosure is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the disclosure, but not to limit the disclosure. In addition, the technical features involved in the various embodiments of the disclosure described below may be combined with each other as long as there is no conflict therebetween. 
       FIG.  1    is a schematic flowchart of a method according to an embodiment of the disclosure. The method shown in  FIG.  1    includes the following steps. 
     Step S 1 : An abnormal IGBT module is determined according to a collector current value of each IGBT module among parallel IGBT modules. 
     In the embodiment of the disclosure, after all the current values of each IGBT module are measured, the current value of the abnormal module will be less than the current value of a normal module. The module with the smaller current value is the abnormal module. 
     Specifically, through comparing the collector current value of each IGBT module among the parallel IGBT modules, an IGBT module with the collector current value less than a preset current value is regarded as the abnormal IGBT module. 
     The preset current value may be determined according to actual requirements, and is not uniquely limited by the embodiment of the disclosure. 
     Step S 2 : A collector current value I c ′ of each abnormal IGBT module is extracted and compared with a maximum value I c  among measured collector current values of normal IGBT modules to obtain a current imbalance rate α. 
     Step S 3 : An abnormal type of an IGBT module is determined according to a case temperature of each IGBT module among the parallel IGBT modules. 
     Through comparing the case temperature of each IGBT module among the parallel IGBT modules, an IGBT module with the case temperature less than a preset case temperature value is regarded as an abnormal bonding wire IGBT module, and an IGBT module with the case temperature equal to the preset case temperature value is regarded as an abnormal solder layer IGBT module. 
     The preset case temperature value may be determined according to actual requirements, and is not uniquely limited by the embodiment of the disclosure. 
     Step S 4 : For any abnormal IGBT module, the current imbalance rate and the case temperature of the abnormal IGBT module are brought into a parallel IGBT health status detection model, and whether the abnormal IGBT module fails is determined according to the abnormal type of the abnormal IGBT module. 
     If the abnormal IGBT module fails, an IGBT device is replaced. If the abnormal IGBT module does not fail, according to the aging method of the abnormal IGBT module, heat dissipation is required to be increased for a solder layer failure, and derating is required for bonding wire breakage. 
     In the embodiment of the disclosure, a calculation method of the current imbalance rate in Step S 2  is: 
     
       
         
           
             
               α 
               = 
               
                 
                   I 
                   C 
                   ′ 
                 
                 
                   I 
                   C 
                 
               
             
             , 
           
         
       
     
     where I C  is the maximum value among the measured collector current values of the normal IGBT modules, and I C ′ is the collector current of the abnormal IGBT module. 
     In the embodiment of the disclosure, the parallel IGBT health status detection model in Step S 4  is as follows: 
     
       
         
           
             
               
                 I 
                 C 
                 ′ 
               
               
                 I 
                 C 
               
             
             = 
             
               
                 
                   
                     [ 
                     
                       
                         V 
                         dc 
                       
                       - 
                       
                         ( 
                         
                           
                             V 
                             o 
                           
                           + 
                           
                             Δ 
                             ⁢ 
                             V 
                           
                         
                         ) 
                       
                     
                     ] 
                   
                   ⁢ 
                   R 
                 
                 - 
                 
                   
                     
                       ( 
                       
                         n 
                         - 
                         1 
                       
                       ) 
                     
                     · 
                     
                       R 
                       load 
                     
                     · 
                     Δ 
                   
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   V 
                 
               
               
                 
                   
                     ( 
                     
                       
                         V 
                         dc 
                       
                       - 
                       
                         V 
                         o 
                       
                     
                     ) 
                   
                   ⁢ 
                   
                     ( 
                     
                       R 
                       + 
                       
                         Δ 
                         ⁢ 
                         R 
                       
                       + 
                       
                         Δ 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           R 
                           ′ 
                         
                       
                     
                     ) 
                   
                 
                 + 
                 
                   
                     
                       R 
                       load 
                     
                     · 
                     Δ 
                   
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   V 
                 
               
             
           
         
       
       
         
           
             
               
                 If 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 Δ 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 V 
               
               = 
               0 
             
             , 
             
               
                 then 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 α 
               
               = 
               
                 R 
                 
                   R 
                   + 
                   
                     Δ 
                     ⁢ 
                     R 
                   
                   + 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       R 
                       ′ 
                     
                   
                 
               
             
           
         
       
       
         
           
             { 
             
               
                 
                   
                     
                       
                         
                           Δ 
                           ⁢ 
                           V 
                         
                         = 
                         
                           
                             
                               
                                 
                                   
                                     V 
                                     o 
                                     max 
                                   
                                   - 
                                   
                                     V 
                                     o 
                                     
                                       t 
                                       ⁢ 
                                       y 
                                       ⁢ 
                                       p 
                                     
                                   
                                 
                                 
                                   
                                     T 
                                     max 
                                   
                                   - 
                                   
                                     T 
                                     
                                       t 
                                       ⁢ 
                                       y 
                                       ⁢ 
                                       p 
                                     
                                   
                                 
                               
                               ⁢ 
                               
                                 ( 
                                 
                                   
                                     T 
                                     j 
                                   
                                   - 
                                   
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                                       ⁢ 
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                                       ⁢ 
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                                 ) 
                               
                             
                             + 
                             
                               V 
                               o 
                               
                                 t 
                                 ⁢ 
                                 y 
                                 ⁢ 
                                 p 
                               
                             
                           
                           = 
                           
                             
                               
                                 k 
                                 1 
                               
                               ⁢ 
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                               ⁢ 
                               
                                 T 
                                 j 
                               
                             
                             + 
                             
                               b 
                               1 
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         
                           Δ 
                           ⁢ 
                           R 
                         
                         = 
                         
                           
                             
                               
                                 
                                   
                                     R 
                                     max 
                                   
                                   - 
                                   
                                     R 
                                     
                                       t 
                                       ⁢ 
                                       y 
                                       ⁢ 
                                       p 
                                     
                                   
                                 
                                 
                                   
                                     T 
                                     max 
                                   
                                   - 
                                   
                                     T 
                                     
                                       t 
                                       ⁢ 
                                       y 
                                       ⁢ 
                                       p 
                                     
                                   
                                 
                               
                               ⁢ 
                               
                                 ( 
                                 
                                   
                                     T 
                                     j 
                                   
                                   - 
                                   
                                     T 
                                     
                                       t 
                                       ⁢ 
                                       y 
                                       ⁢ 
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                                 ) 
                               
                             
                             + 
                             
                               R 
                               
                                 t 
                                 ⁢ 
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                                 ⁢ 
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                           = 
                           
                             
                               
                                 k 
                                 2 
                               
                               ⁢ 
                               Δ 
                               ⁢ 
                               
                                 T 
                                 j 
                               
                             
                             + 
                             
                               b 
                               2 
                             
                           
                         
                       
                     
                   
                 
                 ⁢ 
                 
                   
 
                 
                 ⁢ 
                 
                   T 
                   j 
                 
               
               = 
               
                 
                   
                     
                       P 
                       
                         l 
                         ⁢ 
                         o 
                         ⁢ 
                         s 
                         ⁢ 
                         s 
                       
                     
                     · 
                     
                       r 
                       
                         j 
                         ⁢ 
                         c 
                       
                     
                   
                   + 
                   
                     T 
                     C 
                   
                 
                 = 
                 
                   
                     
                       
                         ( 
                         
                           
                             P 
                             
                               s 
                               ⁢ 
                               w 
                             
                           
                           + 
                           
                             P 
                             cond 
                           
                         
                         ) 
                       
                       · 
                       
                         r 
                         
                           j 
                           ⁢ 
                           c 
                         
                       
                     
                     + 
                     
                       
                         T 
                         C 
                       
                       ⁢ 
                       
                         
 
                       
                       ⁢ 
                       Δ 
                       ⁢ 
                       
                         T 
                         j 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           
                             P 
                             
                               l 
                               ⁢ 
                               o 
                               ⁢ 
                               s 
                               ⁢ 
                               s 
                             
                           
                           · 
                           Δ 
                         
                         ⁢ 
                         
                           r 
                           
                             j 
                             ⁢ 
                             c 
                           
                         
                       
                       + 
                       
                         T 
                         C 
                       
                     
                     = 
                     
                       
                         
                           
                             ( 
                             
                               
                                 P 
                                 
                                   s 
                                   ⁢ 
                                   w 
                                 
                               
                               + 
                               
                                 P 
                                 cond 
                               
                             
                             ) 
                           
                           · 
                           Δ 
                         
                         ⁢ 
                         
                           r 
                           
                             j 
                             ⁢ 
                             c 
                           
                         
                       
                       + 
                       
                         T 
                         C 
                       
                     
                   
                 
               
             
           
         
       
     
     where V dc  is the external voltage of the main circuit, V o  is the on voltage of the IGBT module when the temperature is at a room temperature of 25° C., R is the on-resistance of the IGBT module when the temperature is at a room temperature of 25° C., ΔV is the increment of the on voltage at different temperatures, ΔR is the increment of the on-resistance at different temperatures, ΔR′ is the increment of the on-resistance when a bonding wire within the IGBT module is broken, R load  is the load resistance, V o   max  is the on voltage value at a maximum temperature T max  given in a data sheet, V o   typ  is the on voltage value at a typical temperature T typ  (room temperature is normally taken as 25° C.) given in the data sheet, R max  is the on-resistance value at the maximum temperature T max  given in the data sheet, R typ  is the on-resistance value at the typical temperature T typ  (room temperature is normally taken as 25° C.) given in the data sheet, T j  is the real-time working temperature of the internal chip of the IGBT module, n represents the parallel module format, k 1  and b 1  represent the function coefficients of the on voltage changing with temperature, k 2  and b 2  represent the function coefficients of the on-resistance changing with temperature, ΔT j  represents the increment of the junction temperature caused by different failure processes, P loss  represents the power loss of the IGBT module, which includes a switching power loss P sw  and a conduction power loss P cond , r jc  represents the thermal resistance of the IGBT module from the chip to the case, T C  represents the case temperature of the IGBT module, and Δr jc  represents the increment of the thermal resistance caused by different failure processes. According to current manufacturing processes, the ΔV of most IGBT modules may be considered to be equal to zero. 
     The data book in the embodiment of the disclosure refers to the data book corresponding to the IGBT module used. 
     In the embodiment of the disclosure, Step S 4  of determining whether the abnormal IGBT module fails according to the abnormal type of the abnormal IGBT module may be implemented through the following manner. 
     If the abnormal type of the abnormal IGBT module is bonding wire breakage abnormality, the increment of the on-resistance of the abnormal IGBT module at different temperatures is obtained from the parallel IGBT health status detection model. Whether the increment of the on-resistance of the abnormal IGBT module at different temperatures is greater than a preset increment value is determined. If the increment is greater than the preset increment value, it is determined that the abnormal IGBT module fails due to bonding wire breakage. Otherwise, it is determined that the abnormal IGBT module does not fail. 
     If the abnormal type of the abnormal IGBT module is solder layer aging abnormality, the increment of the thermal resistance of the abnormal IGBT module is obtained from the parallel IGBT health status detection model. Whether the increment of the thermal resistance of the abnormal IGBT module is greater than a preset increment value is determined. If the increment is greater than the preset increment value, it is determined that the IGBT module fails due to solder layer aging. Otherwise, it is determined that the IGBT module does not fail. 
     The IGBT device failure standard is based on the general standard of the IGBT industry. The increment of the thermal resistance or the on-resistance of each abnormal IGBT module at different temperatures may be obtained from the parallel IGBT health status detection model, and the thermal resistance or conduction of each abnormal IGBT module can be determined. Whether the increment of the thermal resistance or the on-resistance of each abnormal IGBT module is greater than the preset increment value is determined. If the increment is greater than the preset increment value, it is determined that the current IGBT module fails according to the abnormal type. Otherwise, it is determined that the current IGBT module does not fail. 
     The preset increment value may be determined according to actual requirements, and is not uniquely limited by the embodiment of the disclosure. At present, according to relevant standards: it may be determined that the IGBT module fails if the thermal resistance or the on-resistance increases by 20% (that is, when the thermal resistance or the on-resistance increases to 1.2 times the original resistance value). It may be inferred that the device fails when the current imbalance rate is less than 83%. 
     The equivalent circuit of each branch in parallel is as shown in  FIG.  2   . The electrical characteristics of each IGBT module may be represented by a resistor and a voltage source respectively simulating the on-resistance and on voltage drop, and the bonding wires may be represented by multiple resistors in parallel. When one of the bonding wires falls off, the total resistance of the branch thereof rises, causing uneven current distribution, which is the basic principle of the disclosure. 
     The principle of parallel current distribution is as shown in  FIG.  3   . When the solder layer melts, the junction temperature rises. Due to the positive temperature effect of the module, the collector current decreases, which causes the current of other modules to increase, resulting in unbalanced current distribution. The decreased current weakens the effect of the junction temperature rise, thereby forming a dynamic balance in the negative feedback. The falling off of the bonding wire directly causes the on-resistance to rise, thereby decreasing the collector current of the corresponding branch. 
       FIGS.  4 A- 4 C  are simulation result diagrams of collector current distributions of a faulty module and a normal module according to an embodiment of the disclosure. Specifically,  FIG.  4 A  is the simulation diagram of the current distribution of each module when 2 bonding wires fall off.  FIG.  4 B  is the simulation diagram of the current distribution of each module when 4 bonding wires fall off.  FIG.  4 C  is the simulation diagram of the current distribution of each module when 6 bonding wires fall off.  FIG.  5    is an experimental verification diagram of the collector current distributions of the faulty module and the normal module according to an embodiment of the disclosure, where the left drawing shows the current value of 9.7 A of a module with 6 bonding wires fallen off, and the right drawing shows the current value of 10.8 A of the normal module. In  FIG.  4    and  FIG.  5   , the falling off of different numbers of bonding wires is used to simulate different degrees of aging of the modules. 
     As shown in  FIG.  6   , in another embodiment of the disclosure, a system for online monitoring of a health status of an IGBT module is also provided, which includes the following. 
     An abnormality determination module  201  is configured to determine an abnormal IGBT module according to a collector current value of each IGBT module among parallel IGBT modules. 
     A current imbalance rate calculation module  202  is configured to extract the collector current value of each abnormal IGBT module to be compared with a maximum value among measured collector current values of normal IGBT modules to obtain a current imbalance rate of each abnormal IGBT module. 
     An abnormal type determination module  203  is configured to determine an abnormal type of an IGBT module according to a case temperature of each IGBT module among the parallel IGBT modules. 
     A failure determination module  204  is configured to bring the current imbalance rate and the case temperature of the abnormal IGBT module into a parallel IGBT health status detection model for any abnormal IGBT module, and determine whether the abnormal IGBT module fails according to the abnormal type of the abnormal IGBT module. 
     For the specific implementation of each module, reference may be made to the descriptions of the foregoing embodiment of the method, and the embodiment of the disclosure will not be reiterated. 
     In another embodiment of the disclosure, a computer-readable storage medium stored with a program instruction is also provided. When the program instruction is executed by a processor, the method for online monitoring of the health status of the IGBT module as described above is implemented. 
     Through real-time current monitoring, the health status of each module may be effectively evaluated. At the potential failure stage, the health status of the device is real-time monitored to prevent the loss of the entire system due to the device failure. 
     The disclosure is simple to implement, has relatively high monitoring precision, has relatively high monitoring sensitivity especially for falling off of internal bonding wires of a module, has relatively good real-time performance, and can online monitor the health status of the IGBT. 
     It should be pointed out that according to the implementation requirements, each step/component described in the present application may be split into more steps/components, or two or more steps/components or partial operations of a step/component may be combined into a new step/component to implement the objectives of the disclosure. 
     The method according to the disclosure may be implemented in hardware or firmware, implemented as software or computer code that may be stored in a recording medium (such as CD ROM, RAM, floppy disk, hard disk, or magneto-optical disk), or implemented as computer code that is originally stored in a remote recording medium or a non-transitory machine-readable medium that is downloaded through the network and is stored in a local recording medium, so that the method may be stored in such software processing on a recording medium using a general-purpose computer, a special-purpose processor, or a programmable or special-purpose hardware (such as an application-specific integrated circuit, ASIC or field programmable gate array, FPGA). It may be understood that a computer, processor, microprocessor controller, or programmable hardware includes a storage assembly (such as RAM, ROM, flash memory, etc.) that may store or receive software or computer code. When the software or computer code is accessed and executed by the computer, processor, or hardware, the processing method described here is implemented. In addition, when a general-purpose computer accesses the code for implementing the processing shown here, the execution of the code converts the general-purpose computer into a special-purpose computer for executing the processing shown here. 
     Persons skilled in the art may easily understand that the above descriptions are only preferred embodiments of the disclosure and are not intended to limit the disclosure. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the disclosure should be included in the protection scope of the disclosure.