Patent Publication Number: US-3875536-A

Title: Method for gain control of field-effect transistor

Description:
United States Patent Hayashi et al.  
 METHOD FOR GAIN CONTROL OF FIELD-EFFECT TRANSISTOR Inventors: Yutaka Hayashi; Yasuo Tarui, both of Tokyo, Japan Assignee: Kogyo Gyutsuin (also known as Agency of Industrial Science and Technology, Ministry of International Trade and Industry). Tokyo-To. Japan Filed: June 21, 1972 Appl. No.: 264,965  
 Related US. Application Data Continuationin-part of Ser. No. 24,166, March 3|, 1970. abandoned.  
 Foreign Application Priority Data [451 Apr. 1, 1975 [56] References Cited UNITED STATES PATENTS 3,290,613 l2/l966 Theriautt 307/25l X 331L756 3/1967 Nagata et al 330/35 X 3,39l,354 7/1968 Ohashi et al.......... 307/25l X 3,5l3,405 5/1970 Carlson 330/29 Primary E.taminerAlfred L. Brody Attorney. Agent, or Firm Robert E. Burns. Emmanuel J. Lobato. Bruce L. Adams [57] ABSTRACT The gain of a fieldeffect transistor having a single insulated gate is controlled by varying the forward current between the base and the source. Amplitude modulation is obtained by applying an AF signal together with a forward bias to a terminal connected to the base through a resistor. An RF signal is applied to the gate, for example through a transformer, and the Nov. 24 [969 Japan 44-93595 amplified Signal appears at a load coupled to a reso nant circuit connected to the drain and one terminal (3| 332/31 307/251 307/305&#34; of a resistor which is decoupled by a capacitor. The 330/29 330/35 other terminal of the resistor is connected to a power Int. Cl H03c 1/36 source Field of Search 331/3! T&#34;, 330/29, 35;  
 307/25l, 304 8 Claims, 11 Drawing Figures 30 I-l: Z6  
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 f i B vi/v G CONTROL SIGN/4L. 5011 (E Ski-LU 1 HF 24 6 BKJIZMIG N) FIG.3  
 magma 1197s 3,875.536  
 Sam 2 BF 3 m&#39;t mggma H375 3.875.536  
 sxamaqga Reduced Gain Output Signal (No Distortion) Input Signal FIG. 5  
 1 Amplified and Rectified n Signal}! Reference Level METHOD FOR GAIN CONTROL OF FIELD-EF F ECT TRANSISTOR This is a continuation-in-part application of our earlier U.S. Pat. application Ser. no. 24,166, filed Mar. 31, 1970, now abandoned.  
 BACKGROUND OF THE INVENTION This invention relates to a method for gain control of a field-effect transistor, more particularly, to a method for gain control which provided for a minimum of distortion due to cross modulation in a field-effect transistor which does not have a tetrode configuration (i.e., does not have two insulated gates).  
 Methods employed heretofore for the gain control,  
  amplitude modulation, etc., of field-effect transistors an input signal drives the gate from the turn-on region to the cut-off region if the signal voltage is high when the gain of the field-effect transistor is decreased. This means that the device operates under a time variable transfer transconductance. The resultant increased distortion due to cross modulation renders the methods virtually impracticable. An attempt to circumvent this undesirable effect has been made by the use of tetrode field-effect transistors having two insulated gate electrodes, which, however, have also given rise to various difficulties in their operation at high frequencies.  
  On the other hand, conventional efforts to make use of field-effect transistors in the high frequency band by shortening their channel length have materialized, to give one example, in the development of a method wherein the channel length is determined in accordance with a difference in the lengths over which two impurities are diffused. Yet, at the present, this method is also not free from drawbacks in that the production of such tetrode field-effect transistors according to the method requires co&#39;rnplex proceses.  
 SUMMARY OF THE INVENTION Therefore, it is a principal object of the invention to provide an improved method for gain control ofa fieldeffect transistor wherein all deficiencies attendant to the prior methods mentioned above are overcome.  
  It is another object of the invention to provide an improved method for gain control of an ordinary fieldeffect transistor having only one insulated gate with a minimum of distortion due to cross modulation.  
  It is a further object of the invention to provide an improved method for gain control of an ordinary fieldeffect transistor having only one insulated gate, which does not need an extra bias of reverse polarity, that is, with a gain control voltage of the same polarity as that of the drain bias voltage.  
  It is another object of the invention to provide an improved and excellent method for gain control ofa fieldeffect transistor using very simple circuits.  
  Characteristic features and functions ofthe invention will be further described in connection with the accompanying drawings, in which the same or equivalent members are indicated by the same numerals and characters.  
 BRIEF DESCRIPTION OF THE DRAWING FIG. I shows an equivalent circuit of a short channel field-effect transistor with means for effecting gain control in accordance with the invention;  
  FIG. 2 graphically represents the output characteristics of the field-effect transistor due to base current;  
  FIG. 3 graphically represents a characteristic example of variation in gm due to a forward bias applied between a current limiting resistor of the base and the source;  
  FIG. 4 is a schematic diagram of a circuit for providing a controlled gain by the method of this invention;  
  FIG. 5 is a diagram illustrating control of amplification of a field-effect transistor in accordance with the invention, and  
  FIGS. 6 to 11 illustrate schematically various gain control circuits that can be used in the field-effect transistor circuit of the present invention.  
 DETAILED DESCRIPTION OF THE INVENTION In a field-effect transistor with a sufficiently short channel, as illustrated in FIG. 1, a current between the drain D, and source S, electrodes increases as the device acts as a bipolar transistor when the base 8, is forward-biased with respect to the source by means of a gain control 10 and when a base current flows due to such forward bias. Actual examples of the above phenomenon are schematically shown in FIG. 2, wherein the curve (a) represents an output characteristic between drain and source when the base is kept forwardbiased by the gain control 10 up to the instant at which current begins to flow, whereas the curves (b), (c) and (d) respectively denote the output characteristics when the forward current is increased.  
  When utilized as a tuned amplifier, the field-effect transistor has its drain connected with an LC resonance circuit 12; in this case, the point of operation undergoes a series of changes as indicated by A, B, C and D in FIG. 2 along with increases in the base current after further connecting a resistance &#39;14 with a bypass capacitor 16 in series with the LC resonance circuit 12. Accordingly, the drain voltage gradually decreases. On the other hand, since the value gm relative to the fieldeffect transistor itself decreases substantially in proportion to a decrease in the drain voltage when the drain voltage is less than a pinch-off voltage, the signal am plification factor measured across a load coupled to the resonant circuit decreases along with decrease in gm and, further increase in the output conductance.  
  In the above instance, the gate bias voltage applied by a gate bias circuit 18 is not changed, and the bias voltage between base and source electrodes due to the gain control 10 is also kept almost unvaried, so that the change in the threshold voltage of the field-effect transistor is only negligible and the effective gate voltage, obtained by subtracting the threshold voltage from the gate voltage, is kept nearly at a constant level. It is accordingly possible to decrease only the gain without any corresponding increase in distortion due to cross modulation even though the amplitude of the signal applied to the gate G, by an input signal source device 20 may be large.  
  Shown in FIG. 3 is an example of a characteristic curve indicated by the value gm with regard to the forward voltage present between base and source when a high resistance is connected in series with the base.  
  Further, at frequencies in excess of the upper limit of frequencies acceptable in a bipolar transistor, without varying the drain voltage, the output conductance increases due to a charge injected to the base, so that the desired gain control is made possible by the base forward voltage or current. For the purpose of amplitude modulation, a carrier wave may be applied to the insulated gate (indicated by G, in FIG. 1), and a signal of a frequency lower than that of the carrier wave may be applied to the base terminal.  
  in the circuit shown in FIG. 4, in which the method of this invention is applied, an n-channel MOS transistor capable of operating in bipolar fashion is indicated at 40. The gate, drain, base and source electrodes are indicated at G, D, B, and S respectively. An input RF signal from a signal source 22 is passed to the gate electrode G by means of a transformer 23, the secondary of which forms part of a resonant circuit with a variable capacitor 24. The amplified signal appears at the resonant circuit 25 connected to the drain, and is passed through a transformer 26, the primary of which forms part of the resonant circuit 25, to a load represented by the resistor 27. A bias voltage V decoupled by a capacitor 28 is applid to the gate electrode as shown. A positive supply voltage V decoupled by a resistor 29 having resistance R and capacitor 30 is applied through resonant circuit 25 to the drain electrode. The gain control signal represented by a controlled positive voltage supplied by the gain control means 31, is applied through a resistor 32 to the base electrode.  
  The gain control obtained with the circuit of FIG. 4 is illustrated by FIG. 5 in which curves M and N represent I vs. V with different gains. it will be seen that the curve is merely changed in inclination so that variation in gain is obtained without distortion.  
  Amplitude modulation can be obtained with the circuit by applying an AF signal together with a positive bias to the base B by means of the circuit 31.  
  The gain control circuit which is indicated by the block in FIG. 1 is a circuit which can supply variable and controllable forward current between the base and source of the field-effect transistor (FET). Thus, it can be either a variable voltage source with a resistor in series as illustrated by way of example in FIG. 6 or a variable current source as illustrated in FIG. 7. The value of the voltage or current is controlled by hand in the case of manual control by a control signal in the case of automatic gain control (AGC) or by an AF signal in the case of amplitude modulation. Simple and practical ways of providing controlled base forward current are illustrated in FIGS. 8 and 9 where the gain of the amplifier is manually controlled by adjusting a potentiometer R,.. A circuit for control by amplitude modulation is shown in FIG. 10 where DC bias current can be adjusted by a potentiometer R, and modulation efficiency can be determined by a resistance R, Automatic gain control (AGC) can be achieved by a circuit as illustrated in FIG. 11 where an amplified and rectified rfsignal is compared with a reference level and the difference between them is amplified by a differential amplifier A. The output voltage from the amplifier A is the control signal. if the amplifier A has a low output resistance the output is supplied to the base terminal through a series resistor R,. If the amplifier A is of high output resistance or current source type, the output can be directly supplied to the base terminal of the FET.  
  The control circuits illustrated in FIGS. 6 to 11 are also applicable to the field-effect transistor circuit illustrated in FIG. 4 where the gain control is represented by the block 31. In this event the series resistor R, is the resistor 32 shown in H0. 4.  
  As herein used the term forward bias means a positive bias for the p-type base of an n-channel lGFET with reference to the source and a negative bias for the n-type base of a p channel lGFET with reference to the source. The polarity shown in all figures of the drawings is for an n-channel FET. The polarity must be re versed for a p channel FET.  
  While preferred embodiments of the invention have been shown by way of example in the drawings, it will be understood that the invention is in no way limited to these embodiments.  
 What we claim and desire to secure by letters patent l. A method for gain control and amplitude modulation of a field effect transistor device provided with at least a gate electrode, a gate insulator, a source, a base and a drain, which device is capable of performing as a bipolar transistor when said source, base and drain are used as an emitter, a base and a collector respectively, comprising the steps of providing a resistor, a resonant circuit and a power source in series with the source-drain circuit, capacitively decoupling the resistor, coupling a load to said resonant circuit, applying a bias voltage to said gate electrode, applying a first signal to said gate electrode, applying a second signal between said base and source electrodes comprising a forward base-source current, and increasing and decreasing the forward base-source current by altering said second signal to provide gain control and amplitude modulation.  
  2. A field effect transistor circuit comprising a field effect transistor having a gate electrode, a gate insulator, a source, a base and a drain, and being capable of operating as a bipolar transistor when said source, base and drain are used as an emitter, a base and a collector, respectively, a resistor, a resonant circuit, a load coupled to said resonant circuit and a power source connected in series with the source-drain circuit, capacitor means decoupling said resistor, a bias voltage source connected to said gate electrode, a first signal source coupled with said gate electrode, a second signal source comprising a forward base-source current connected between said base and source electrodes and including means for selectively increasing and decreasing the forward base-source current to provide gain control and amplitude modulation.  
  3. A circuit according to claim 2 in which said source-drain circuit comprises an LC resonant circuit connected to said drain electrode in series with said resister.  
  4. A circuit according to claim 3, in which said LC resonant circuit includes the primary of a transformer, the secondary of which is connected to a load resistance.  
  5. A circuit according to claim 4, in which said decoupling means comprises a capacitor connected to said source-drain circuit between said LC resonant circuit and said resistor.  
  6. A circuit according to claim 2. in which said first signal source is connected with the primary of a trans- 8. A circuit according to claim 6, in which said source is connected to ground and a capacitor has one terminal connected to ground and another terminal connected between said bias voltage source and the secondary of said transformer.  
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