Patent Publication Number: US-7716515-B2

Title: Method for updating the timing of a baseboard management controller

Description:
FIELD OF THE INVENTION 
   The invention relates to a method for updating timing, and more particularly, to a method for updating the timing of a baseboard management controller in a computer system. 
   DESCRIPTION OF PRIOR ART 
   The Intelligent Platform Management Interface; or IPMI, is a hardware management interface specification with open standards, and it is a method particularly used to define embedded management subsystems for the purpose of communication. IPMI information is exchanged via the baseboard management controller (abbreviated as BMC hereafter). Therefore, the management of hardware is achieved via low level methods without the need of the operation system, which is advantageous because such configuration allows the management of out-of-band system servers, and it takes the burden of status data transportation away from the operating system. 
   When the BMC of a computer system is initialized, the Basic Input/Output System (abbreviated as BIOS hereafter) of the computer system gets the current time from a real-time clock (abbreviated as RTC hereafter) of a motherboard in the computer system during the Power On Self Test process (abbreviated as POST hereafter), and then the current time is sent to the BMC to allow itself to update its own timing according to the current time. Subsequently, the BMC continuously accumulates time by using the clock signal generated in the BMC, in an attempt to synchronize the timing of the BMC with the time of RTC in the motherboard. However, such method leads to the following problems: 
   First of all, the BMC starts its timing in accordance with the clock signal in the BMC after getting an initial time, but since the clock signal of the BMC can vary from the clock signal of the RTC in motherboard, it could lead differences between the timing of the BMC and the current time of the motherboard. Moreover, such a difference increases with time, thus making the difference between the timing and the current time ever greater, and consequently affecting the accuracy of the time events are recorded. 
   Second, the BMC is equipped with the function of time regulation, which regulates the timing of the BMC after a period of time, in an attempt to synchronize the timing of the BMC with the current time. However, the value used to regulate timing is set by the manufacturer&#39;s engineers after conducting statistical analyses, which does not necessarily apply to the usage and working environment of general users. In addition, since the timing could be either greater than or less than the current time, so if the BMC is configured to regulate the timing by subtracting time from it, and keeps on subtracting more time from the timing even when it is actually less than the current time, the timing of the BMC would only become more and more inaccurate. 
   Thirdly, some manufacturers have tried to manage the timing of the BMC by using SMS (System Management Software) under the operating system, but because different versions of SMS are utilized in motherboards designed by different manufacturers or with different operating systems, it is difficult to create a universal SMS program. More importantly, the use of SMS to configure the timing does not guarantee that errors in synchronization can be prevented. 
   Fourthly, the use of SMS to manage the timing may not be practical due to the fact that not every user would spend more money beyond their budget on purchasing a SMS; or the fact that the user already has SMS, but cannot update the timing of the BMC simultaneously. 
   Therefore, the most urgent issue now is to propose a method for updating the timing of the BMC that effectively deals with the aforesaid problems. 
   SUMMARY OF THE INVENTION 
   In light of the problems mentioned above, a method for updating the timing of a BMC has been disclosed in this invention, which allows the BMC to have accurate timing. 
   A primary objective of the invention is to provide a method for updating the timing of a BMC, which is applied to a computer system; comprising: a management unit in a motherboard of the computer system transmits a current time from a RTC in the motherboard to a BMC in the motherboard, so that the timing of the BMC is updated according to the current time; subsequently, the BMC sends out a synchronous signal to the management unit at regular intervals, and when the management unit receives the synchronous signal, the current time provided by the RTC is transmitted to the BMC, which is again used to update the timing of the BMC. Therefore, the timing of the BMC is identical to the current time of the motherboard, which achieves the aim of maintaining the timing of the BMC accurately. 
   Another objective of the invention is to provide a method for updating the timing of a BMC, which updates the timing of the BMC according to the synchronous signal after a regular interval in the computer system, thereby realizing the goal of allowing computer systems to be updated without the need of manual updating from system administrators. 
   To allow further understanding towards the purpose and effects of the invention, the invention has been particularly shown and described with reference to the preferred embodiments and the accompanying drawings, wherein: 

   
     BRIEF DESCRIPTION OF DRAWINGS 
       FIG. 1  shows the connection between a motherboard and a BMC according to the invention. 
       FIG. 2  is a flow chart that shows a method according to the invention. 
       FIG. 3  shows the stepwise method for the BMC to transmit synchronous signals, according to the invention. 
   

   DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
   The invention discloses a method for updating the timing of a BMC. As indicated in  FIG. 1 , this method is applied in a computer system  20 , which comprises a motherboard  30 , and a BMC  80  that is electrically connected to the motherboard  30 . The BMC  80  obtains a current time from the motherboard  30  and updates the timing recorded in BMC  80  at regular intervals. As a result, the computer system  20  simultaneously updates the timing of BMC  80  and the current time of motherboard  30  every time it configures its time, thus ensuring the time of BMC  80  is maintained accurately without the need for system administrators to update the time manually. According to the invention, the computer system  20  updates time by the method indicated in  FIG. 2 : 
   ( 101 ) The BIOS hereafter of the motherboard  30  obtains a current time from a real-time clock  50  (abbreviated as RTC hereafter) of the motherboard  30  (for example, 00 hour 00 minute 00 second, 1 st  of Jan., 1970 A.D.); 
   ( 102 ) A management unit  60  (for example, an Intelligent Platform Management Interface, or IPMI) of the motherboard  30  obtains the current time from the BIOS  40 , and then converts the current time into a timing (for instance, 0x00000000) that can be saved into BMC  80  according to a timestamp format disposed in the management unit  60 ; 
   ( 103 ) The management unit  60  packs the timing as a transmission signal (for example, IPMI MESSAGE), and subsequently transmits the transmission signal through a transmission channel  70  (for instance, the Keyboard Controller Style Interface, or KCS Interface, of the system bus disposed on the motherboard) that connect the motherboard  30  and the BMC  80 ; 
   ( 104 ) The BMC  80  obtains the transmission signal transmitted from the management unit  60  and through the transmission channel  70 ; 
   ( 105 ) The BMC  80  obtains the timing from reading the transmission signal, and uses this timing to update the current timing of the BMC  80 ; and 
   ( 106 ) The management unit  60  determines whether a synchronous signal has been obtained from the BMC  80  or not; if it has, the process is continued from step ( 101 ); if it has not, step ( 106 ) is repeated. 
   In an embodiment of the invention, as indicated in  FIG. 1 ; a pin for a first transmission connector  65  (for instance, the General Purpose Input Output, or GPIO) is disposed in the management unit  60 , and a second transmission connector  85  (for example, the GPIO PIN) that matches the first transmission connector  65  is disposed in the BMC  80 ; the first transmission connector  65  is electrically connected to the second transmission connector  85 . By detecting the change of voltage at the first transmission connector  65 , the management unit  60  can determine the change of voltage (for example, change between low voltage and high voltage) transmitted from the second transmission connector  85  in the BMC  80 . These changes can be used as the events for determining different statuses or interrupts (such as System Management Interrupt, or SMI), and thus can be used as a binary on-off control. Therefore, in the aforesaid step ( 104 ), the management unit  60  determines whether the BMC  80  has transmitted a synchronous signal (such as a change from low voltage to high voltage, or a change from high voltage to low voltage) by the change of voltage transmitted from the second transmission connector  85  and received at the first transmission connector  65 . In addition, the timestamp format can represent Greenwich Mean Time (GMT) from 00 hour 00 minute 00 second, 1 st  of Jan., 1970 A.D. to 00 hour 00 minute 00 second, 1 st  of Jan., 2100 A.D. in the form of 0x00000000 to 0x20000000, in order to facilitate the calculation of low level algorithms that take place inside of the BMC  80 . 
   Referring to  FIG. 1  and  FIG. 3 , after the timing of the BMC  80  in the computer system  20  has been updated, the step of generating a synchronous signal at the BMC  80  comprising: 
   ( 201 ) A timing value recorded in an interrupt register  90  of the BMC  80  is cleared (that is, the interrupt register  90  is initialized); 
   ( 202 ) Counts are added individually to the timing value recorded in the interrupt register  90  according to a clock signal generated from a clock-generating unit  95  of the BMC  80 ; 
   ( 203 ) Determining whether the timing value recorded in the interrupt register  90  equals to a configured time set by the users or the manufacturer (for instance, a configuration of 2 hours); if it does, the process is continued from step ( 204 ); if it does not, the step ( 202 ) is repeated. 
   ( 204 ) A synchronous signal is transmitted from the second transmission connector  85  of the BMC  80  to the first transmission connector  65 , and then the process is repeated from step ( 201 ). 
   In accordance with the methods described above, every time the computer system  20  starts, the timing of BMC  80  is updated in the way described in step ( 101 ) to step ( 105 ), and the computer system  20  also automatically and repetitively updates the timing of BMC  80  at a regular interval, thereby making the timing of BMC  80  become more accurate, which effectively solves the problems resulted from the prior arts. 
   While the invention herein disclosed has been described by means of specific embodiments, numerous modifications and variations could be made thereto by those skilled in the art without departing from the scope and spirit of the invention set forth in the claims.