Patent Publication Number: US-7709946-B2

Title: Micro universal serial bus (USB) memory package

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application claims the benefit of Korean Patent Application No. 2006-0058209, filed on Jun. 27, 2006, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. 
     FIELD OF THE INVENTION 
     The present invention relates to a micro USB memory package and a method for manufacturing the same, and more particularly, to a micro USB memory package and a method for manufacturing the same, which can meet the established USB standard specification, can have light, thin, short and small configuration, can have various applications, and can simply expand the memory capacity thereof. 
     BACKGROUND OF THE INVENTION 
     Generally, an USB memory package comprises: a substrate with an USB plug formed on one end thereof; a flash memory electrically connected with the substrate of one end of the USB plug; a controller electrically connected with the substrate of the other end of the USB plug and controlling the flash memory and so on; a passive element electrically connected with the substrate of the other end of the USB plug; and a case coupled with the substrate and protecting the flash memory, the controller and the passive element. 
     The USB memory package, as is well known, is manufactured and sold in various forms. However, the USB plug commonly assumes the form of being protruded outwardly from the substrate or the case by a certain length. Of course, the USB plug assumes the form of being coupled with an USB receptacle mounted on a computer and so on, and any of the flash memory, the controller or the passive element cannot be mounted on the region on which the USB plug is formed. 
     Accordingly, the USB plug acts as an obstacle to reduce the size and the weight of a conventional USB memory package. That is, due to the USB plug, it is difficult to reduce the size and the weight of the USB memory package. 
     Furthermore, according to the conventional USB memory package, in case of the flash memory, a semiconductor package preformed in the form of TSOP (Thin Small Outline Package) or FBGA (Fine Ball Grid Array) is mounted on the substrate, and in case of the controller, a semiconductor package preformed in the form of QFP (Quad Flat Package) or FBGA is mounted on the substrate. Accordingly, since the memory capacity of the conventional USB memory package is already fixed in the form of TSOP or FBGA (In other words, it is not possible to expand the memory capacity.), it is difficult to expand the memory capacity. Moreover, since the already finished semiconductor package is mounted on the substrate, a problem of high manufacturing cost is arisen. 
     Furthermore, according to the conventional USB memory package, there is a problem that an LED element indicating the operating state is mounted on the substrate and a case should be formed so as to expose the LED element to the outside of the case. Of course, there is also a problem that moisture or a foreign substance can be easily penetrated into a gap between the LED element and the case. 
     Furthermore, according to the conventional USB memory package, there is a problem that since the USB plug is formed on only one end of the USB memory package, the user has to exactly couple the USB receptacle with the corresponding side of the USB memory package. 
     SUMMARY OF THE INVENTION 
     The present invention is conceived to solve the aforementioned problems of the conventional USB memory package. An object of the present invention is to provide a micro USB memory package and a method for manufacturing the same, which make possible to have light, thin, short and small configuration by forming USB lands meeting the USB standard specification on one surface of a substrate instead of removing an USB plug coupled with an USB receptacle, and mounting various kinds of elements on the USB lands. 
     Another object of the present invention is to provide a micro USB memory package and a method for manufacturing the same, which make possible to maximize the memory capacity and simplify the manufacturing method by mounting a flash memory on the substrate not in the form of a package but in the form of a die, applying a stack technology and a wire bonding technology thereto, mounting a controller and so on in the form of a die, and encapsulating the flash memory and controller by an encapsulant. 
     Another object of the present invention is to provide a micro USB memory package and a method for manufacturing the same, which make possible to easily see the operating state from the outside and actively prevent the penetration of moisture or an external foreign substance by mounting an LED element on the substrate and encapsulating it together with other elements by a transparent encapsulant. 
     Another object of the present invention is to provide a micro USB memory package and a method for manufacturing the same, which make possible to couple the micro USB memory package with the receptacle irrespective of the coupling direction by symmetrically forming and arranging USB lands meeting the USB standard specification on one surface of the substrate. 
     Another object of the present invention is to provide a micro USB memory package and a method for manufacturing the same, which make possible to safely protect the various internal elements from the external mechanical, electrical and chemical environment by encapsulating the substrate and the encapsulation part by means of an external case. 
     According to a micro USB memory package of the present invention for accomplishing the aforementioned objects, the micro USB memory package comprises a substrate with a plurality of circuit patterns formed on the top surface thereof, at least one of passive elements connected with the circuit patterns of the substrate, at least one of controllers connected with the circuit patterns of the substrate, at least one of flash memories connected with the circuit patterns of the substrate, and an encapsulation part encapsulating the passive elements, the controllers and the flash memories on the substrate, and at least one of USB lands connected with the circuit patterns by a conducting via is formed on the under surface of one side of the substrate. 
     At least one of the passive elements, the controllers or the flash memories can be connected with the circuit patterns on the top surface corresponding to the USB lands of the substrate. 
     An LED element can be further connected with the circuit patterns of the substrate. 
     The encapsulation part can be formed of a transparent material so as to see the LED element from the outside. 
     At least one of further USB lands can be additionally formed on the under surface of the other side corresponding to the USB lands formed on the under surface of one side of the substrate. 
     The USB lands formed on one side and the USB lands formed on the other side can be arranged in reverse order with respect to each other, and both USB lands can be interconnected by the circuit patterns and the conducting via. 
     The controllers can be attached to the substrate by an adhesive and can be connected with the circuit patterns of the top surface of the substrate by a wire. 
     The flash memories can be attached to the substrate by an adhesive and can be connected with the circuit patterns of the top surface of the substrate by a wire. 
     At least two of the flash memories can be stacked by the adhesive. 
     The wire connecting the flash memories with the circuit patterns can be formed by a forward loop mode process or a forward folded loop mode process in which one end of the wire is firstly ball-bonded to the flash memories and the other end of the wire is secondly stitch-bonded to the circuit patterns. 
     The wire connecting the flash memories with the circuit patterns can be formed by a reverse loop mode process in which one end of the wire is firstly ball-bonded to the circuit patterns and the other end of the wire is secondly stitch-bonded to a conducting bump (stud bump) preformed on the flash memories. 
     The substrate and the encapsulation part can be coupled with an external case. 
     The external case can comprise an upper section covering the encapsulation part, a lower section covering the substrate, a side section covering the both side surfaces of the substrate and the encapsulation part, and a rear section covering the rear surfaces of the substrate and the encapsulation part. 
     The USB lands formed on the substrate can be exposed to the outside by the external case. 
     According to a method for manufacturing a micro USB memory package of the present invention for accomplishing the aforementioned objects, the method comprises: the step of providing a substrate with at least one of circuit patterns formed on the top surface thereof and connecting at least one of passive elements with the circuit patterns of the substrate; the step of attaching at least one of controllers and flash memories to the top surface of the substrate; the step of connecting the controllers and the flash memories with the circuit patterns of the substrate by a wire; and the step of forming an encapsulation part by encapsulating the passive elements, the controllers, the flash memories and the wire on the substrate by an encapsulant. 
     At least one of USB lands connected with the circuit patterns by a conducting via can be further formed on the under surface of one side of the substrate. 
     At least one of the passive elements, the controllers or the flash memories can be connected with the circuit patterns on the top surface corresponding to the USB lands of the substrate. 
     The wire connecting the flash memories with the circuit patterns can be formed by a forward loop mode process or a forward folded loop mode process in which one end of the wire is firstly ball-bonded to the flash memories and the other end of the wire is secondly stitch-bonded to the circuit patterns. 
     The wire connecting the flash memories with the circuit patterns can be formed by a reverse loop mode process in which one end of the wire is firstly ball-bonded to the circuit patterns and the other end of the wire is secondly stitch-bonded to a conducting bump preformed on the flash memories. 
     At least two of the flash memories can be stacked by an adhesive. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: 
         FIGS. 1   a  and  1   b  are sectional and bottom views illustrating a micro USB memory package according to an embodiment of the present invention; 
         FIG. 2  is a sectional view illustrating a micro USB memory package according to another embodiment of the present invention; 
         FIGS. 3   a  and  3   b  are sectional and bottom views illustrating a micro USB memory package according to another embodiment of the present invention; 
         FIGS. 4   a  and  4   b  are sectional views illustrating a micro USB memory package according to another embodiment of the present invention; 
         FIGS. 5   a  and  5   b  are sectional views illustrating the coupling state of a micro USB memory package according to the present invention with a receptacle; 
         FIG. 6   a  is a perspective view illustrating a micro USB memory package according to another embodiment of the present invention,  FIG. 6   b  is a cross sectional view of  FIG. 6   a  and  FIG. 6   c  is a sectional view illustrating the coupling state of the micro USB memory package of  FIG. 6   a  with a receptacle; 
         FIG. 7  is a flow chart illustrating a method for manufacturing a micro USB memory package according to the present invention; 
         FIGS. 8   a  to  8   g  are sequential schematic views illustrating a method for manufacturing a micro USB memory package according to the present invention; 
         FIGS. 9   a  to  9   c  are schematic views illustrating a wire bonding method using a forward loop mode process or a forward folded loop mode process among methods for manufacturing a micro USB memory package according to the present invention; and 
         FIGS. 10   a  to  10   d  are schematic views illustrating a wire bonding method using a reverse loop mode process among methods for manufacturing a micro USB memory package according to the present invention. 
     
    
    
     Common reference numerals are used throughout the drawings and the detailed description to indicate the same elements. 
     DETAILED DESCRIPTION OF THE INVENTION 
     Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. 
       FIGS. 1   a  and  1   b  are sectional and bottom views illustrating a micro USB memory package  100  according to an embodiment of the present invention. 
     As shown in  FIG. 1   a , a micro USB memory package  100  according to an embodiment of the present invention is characterized in that the micro USB memory package  100  comprises a substrate  110  with a plurality of circuit patterns  112   a  formed on the top surface thereof, at least one of passive elements  120  connected with the circuit patterns  112   a  of the substrate  110 , at least one of controllers  130  connected with the circuit patterns  112   a  of the substrate  110 , at least one of flash memories  140  connected with the circuit patterns  112   a  of the substrate  110 , and an encapsulation part  150  encapsulating the at least one passive elements  120 , the at least one controllers  130  and the at least one flash memories  140  on the substrate  110 , and at least one of USB lands  113  connected with the circuit patterns  112   a  by a conducting via  114  is formed on the under surface of one side of the substrate  110 . 
     A plurality of circuit patterns  112   a  and  112   b  are formed on the top and under surfaces of the substrate  110  about an approximately plate-shaped insulating layer  111 , and a plurality of USB lands  113 , which are electrically connected and disconnected with an USB receptacle (not shown), are formed on one side of the under surface. Of course, the circuit patterns  112   a  of the top surface and the USB lands  113  of the under surface are electrically interconnected by the conducting via  114 . The insulating layer  111  can be selected from typical epoxy resin, polyimide resin, BT (bismalemide triazine) resin, FR-4 (fiberglass reinforced), FR5, ceramic, silicon, glass or their equivalents, but the material of the insulating layer is not limited to these materials thereto. Furthermore, the insulating layer  111  is shown in the drawing as having a single layer structure, but the present invention is not limited thereto. That is, the insulating layer  111  can have multi-layer structure with circuit patterns formed between the layers. The circuit patterns  112   a  and  112   b  can be selected from typical copper (Cu), gold (Au), silver (Ag), nickel (Ni), palladium (Pd), metal alloy or their equivalents, but the material of the circuit patterns is not limited to these materials thereto. The USB lands  113  connected with the circuit patterns  112   a  by the conducting via  114  can also be selected from copper, gold, silver, nickel, palladium, metal alloy or their equivalents, but the material of the USB lands is not limited to these materials thereto. Of course, it is preferred that since the USB lands  113  are exposed to the outside, the surface thereof is plated with gold (Au), so as to prevent the oxidization and minimize the contact resistance. Furthermore, solder masks  115   a  and  115   b  (insulating polymer resin) of a predetermined thickness are coated on the surface of the insulating layer  111  and protect the circuit patterns  112   a  and  112   b , and the USB lands  113  are exposed to the outside through the solder masks. Of course, a certain area of the circuit patterns  112   a  is exposed to the outside through the solder mask  115   a  for electrical connection of the at least one passive elements  120 , the at least one controllers  130  or the at least one flash memories  140 . 
     The at least one passive elements  120  are electrically connected with the circuit patterns  112   a  formed on the top surface of the substrate  110 . For example, the at least one passive elements  120  are soldered to the circuit patterns  112   a . These passive elements  120  may be a resistor, inductor or capacitor, but they are not limited thereto. Furthermore, the at least one passive elements  120  are connected to an area corresponding to the USB lands  113 . That is, the passive elements  120  are formed on the top surface corresponding to the USB lands  113  formed on the under surface of the substrate  110 , and thus the size of the micro USB memory package  100  is reduced as compared to the prior art. Of course, the controllers  130  or the flash memories  140  can be electrically connected with the top surface of the substrate  110  corresponding to the USB lands  113 . In other words, no elements could be formed on the region corresponding to a USB plug in the prior art. However, according to the present invention, the size of the micro USB memory package  100  can be reduced as compared to the prior art by forming the USB lands  113  on the under surface of the substrate  110  and connecting various kinds of elements (the passive elements  120 , the controllers  130  or the flash memories  140 ) to the top surface of the substrate  110  corresponding to the USB lands  113 . 
     The controllers  130  are attached to the top surface of the substrate  110  by an adhesive  132  and electrically connected with the circuit patterns  112   a  formed on the top surface by a wire  131 . As is generally known, these controllers  130  control the communication between a computer having a receptacle and the micro USB memory package  100 , and control the operation of reading, deleting or writing the data from the flash memories  140 . The controllers  130  assume the form of a package, such as TSOP or FBGA, in the prior art. However, the controllers  130  of the present invention assume the form of a semiconductor die. That is, the controllers  130  are attached in the form of the die to the top surface of the substrate  110  by the adhesive  132  and are bonded by the wire  131 . 
     The flash memories  140  are also attached to the top surface of the substrate  110  by an adhesive  143  and electrically connected with the circuit patterns  112   a  formed on the top surface by a wire  141 . As is generally known, these flash memories  140  are storage devices capable of storing a predetermined data. Furthermore, the flash memories  140  assume the form of a package, such as QFP or FBGA, in the prior art, however, the flash memories of the present invention assume the form of a semiconductor die. That is, the flash memories  140  are attached in the form of the die to the top surface of the substrate  110  by the adhesive  143  and are bonded by the wire  141 . Here, the wires  131  and  141  connecting the controllers  130  and flash memories  140  with the circuit patterns  112   a  can be selected from typical gold wire, copper wire, aluminum wire or their equivalents, but the material of the wires is not limited thereto. Of course, the controllers  130  and the flash memories  140  can be connected with the substrate  110  in the form of a flip chip by the wire as well as a solder bump or a gold bump, etc, but the form of the electrical connection between the controllers  130  and the flash memories  140  and the substrate  110  is not limited thereto. 
     The encapsulation part  150  encapsulates the passive elements  120 , the controllers  130 , the flash memories  140  and the wires  131  and  141  on the substrate  110  so as to protect them against the external environment. Here, the width of the encapsulation part  150  is nearly the same as the width of the substrate  110 . The encapsulation part  150  can be selected from typical epoxy resin, silicon resin or their equivalents, but the material of the encapsulant is not limited thereto. Anyway, whichever encapsulant may be used to encapsulate the passive elements  120 , the controllers  130 , the flash memories  140  and the wires  131  and  141  on the substrate  110 , they can be completely encapsulated, and thus external moisture or foreign substance cannot be penetrated into them. Furthermore, since the encapsulation part  150  is formed with a predetermined thickness and has a relatively high stiffness, the stiffness of the micro USB memory package  100  is also improved as compared to the prior art. 
     Meanwhile, as shown in  FIG. 1   b , the USB lands  113  can be collectively formed on one side of the under surface of the substrate  110 . Practically, the USB lands  113  have the same design as that formed on the inside of the conventional USB plug, and thus they meet the USB standard specification. For example, there may be GND, D+, D−, Vbus terminals from the above in the drawing. Of course, differently from the prior art, the passive elements  120 , the controllers  130  or the flash memories  140  can be formed on the substrate  110  above the USB lands  113 , and thus the micro USB memory package  100  can be formed to have light, thin, short and small configuration. Furthermore, the controllers  130  and the flash memories  140  can be mounted on the substrate  110  not in the form of a package but in the form of a semiconductor die, and thus excellent memory expandability, for example, can be accomplished. 
       FIG. 2  is a sectional view illustrating a micro USB memory package  200  according to another embodiment of the present invention. 
     As shown in the drawing, the micro USB memory package  200  according to another embodiment of the present invention is almost identical with the aforementioned micro USB memory package  100 . Accordingly, only the difference between the micro USB memory package  200  and the micro USB memory package  100  will be described hereinafter. 
     As shown in  FIG. 2 , an LED element  260  can be further connected with the circuit patterns  112   a  formed on the top surface of the substrate  110  by a solder  261 . As is generally known, the LED element  260  serves for indicating the operating state of the micro USB memory package  100  to the user. 
     Here, the LED element  260  is also in the form of being completely encapsulated by the encapsulation part  150 . Accordingly, in case that the encapsulation part  150  is formed by a black encapsulant, the user cannot see the operating state of the LED. Accordingly, the encapsulation part  150  is formed by a transparent encapsulant in the present invention. As is generally known, the transparent encapsulant can be formed by a transparent epoxy encapsulant for a light emitting diode or its equivalent, but the material of the transparent encapsulant is not limited thereto. Of course, although there is exemplarily illustrated in the drawing that all of the encapsulation part  150  is formed by the transparent encapulant, the transparent encapsulant can be applied only to the peripheral portion of the LED element  260 . That is, since a semiconductor integrated circuit, such as typical controllers  130  or the flash memories  140 , is reacted to a light and thus its property can be deteriorated, the semiconductor integrated circuit can be encapsulated by the black encapsulant and only the LED element  260  can be encapsulated by the transparent encapsulant. 
       FIGS. 3   a  and  3   b  are sectional and bottom views illustrating a micro USB memory package  300  according to another embodiment of the present invention. 
     As shown in the drawings, the micro USB memory package  300  according to another embodiment of the present invention is almost identical with the aforementioned micro USB memory package  100 . Accordingly, only the difference between the micro USB memory package  300  and the micro USB memory package  100  will be described hereinafter. 
     As shown in  FIGS. 3   a  and  3   b , according to the micro USB memory package  300  of another embodiment of the present invention, at least one of further USB lands  113   b  (right portion of the drawing) is additionally formed on the under surface of the other side corresponding to the USB lands  113   a  (left portion of the drawing; which are the same as those illustrated in  FIGS. 1   a  and  1   b ) formed on the under surface of one side of the substrate  110 . For example, as shown in  FIG. 3   b , GND, D+, D− and Vbus form USB lands  113   a  from the top of the left portion of the drawing, while Vbus, D−, D+ and GND form USB lands  113   b  from the top of the right portion of the drawing. In this way, whichever directions the micro USB memory package  100  according to the present invention is coupled with the USB receptacle  500 , the micro USB memory package can be normally operated. Of course, for this purpose, the left USB lands  113   a  and the right USB lands  113   b  should be interconnected in somewhat complex way. 
     That is, the USB lands  113   a  and  113   b  formed on the under surfaces of one side (left portion) and the other side (right portion) of the substrate  110  are electrically interconnected by the circuit patterns  112   b  and the conducting via  114 . For example, the GND of the left USB lands  113  is connected with the GND of the right USB lands  113   b  by the circuit patterns  112   b  and the conducting via  114 . The left D+, D− and Vbus are alternately connected with the right D+, D− and Vbus by the circuit patterns  112   b  and the conducting via  114  in the same way as stated above. 
       FIGS. 4   a  and  4   b  are sectional views illustrating micro USB memory packages  410  and  402  according to another embodiment of the present invention. 
     As shown in the drawings, the micro USB memory packages  401  and  402  are almost identical with the aforementioned micro USB memory package  100 . Accordingly, only the difference between the micro USB memory packages  401  and  402  and the micro USB memory package  100  will be described hereinafter. 
     As shown in  FIGS. 4   a  and  4   b , at least two of the flash memories  140  are stacked by the adhesive  143 , and all of the flash memories  140  are electrically connected with the substrate  110  by the wire  141 . Although there is illustrated in the drawing that four flash memories  140  are stacked, the number of the flash memories to be stacked is more or less than four. In this way, the expansion of the memory capacity is facilitated. 
     Meanwhile, the structure of the micro USB memory package  401  of  FIG. 4   a  is somewhat different from that of the micro USB memory package  402  of  FIG. 4   b . Considering the manufacturing cost, the micro USB memory package  401  of  FIG. 4   a  is preferred, however, considering the reliability and workability, the micro USB memory package  402  of  FIG. 4   b  is preferred. The difference between the micro USB memory packages  401  and  402  of  FIGS. 4   a  and  4   b  will be described hereinafter. 
     In the micro USB memory package  401  of  FIG. 4   a , the wire  141  connecting the plurality of flash memories  140  to the circuit patterns  112   a  of the substrate  110  is formed in a forward folded loop mode process. That is, one end of the wire  141  is firstly ball-bonded to the flash memories  140  and then is outwardly folded to minimize the loop height, and the other end of the wire is secondly stitch-bonded to the circuit patterns  112   a . There is an advantageous effect for the manufacturing cost that the flash memories  140  can be electrically connected with the substrate  110  by controlling a capillary track without employing a separate structure or method. However, since the wire  141  has a certain degree of stiffness in practice, it is difficult to control the capillary track of a wire bonder. Anyway, after the wire  141  of a first flash memory  140  is bonded to the substrate  110 , a second flash memory  140  is attached and stacked thereon and then wire-bonded. Of course, the insulating adhesive  143  (or adhesive film) is interposed between the first flash memory  140  and the second flash memory  140 . 
     Here, the controllers  130  are also connected with the substrate  110  by the wire  131 . This is carried out by firstly ball-bonding one end of the wire  131  to the controllers  130  and secondly stitch-bonding the other end of the wire to the circuit patterns  112   a . This type of ball-bonding is also called as a normal wire bonding. 
     Furthermore, in the micro USB memory package  402  of  FIG. 4   b , the wire  141  connecting the plurality of flash memories  140  to the circuit patterns  112   a  of the substrate  110  is formed in a reverse loop mode process. That is, one end of the wire  141  is firstly ball-bonded to the circuit patterns  112   a  of the substrate  110 , and then the other end of the wire is secondly stitch-bonded to a conducting bump  142   b  preformed on the flash memories  140 . Here, the conducting bump  142   b  should be preformed on the flash memories  140  as stated above. The conducting bump  142   b  can be formed in various ways and may be, for example, a solder bump, an Au stud bump, an Au plated bump, etc. The solder bump or Au plated bump can be formed in a wafer state, and the stud bump can be formed by the capillary of the wire bonder during the ball-bonding process of the wire. That is, the stud bump can be formed by cutting the wire immediately after the ball-bonding process of the wire. In the reverse loop mode process, the conducting bump  142   b  should be preformed on the flash memories  140 , and thus the manufacturing cost tends to be increased, but the reliability and the workability are improved. Anyway, after the wire bonding of the first flash memory  140  is completed, the second flash memory  140  is attached and stacked thereon and then wire-bonded. Of course, the insulating adhesive  143  (or adhesive film) is interposed between the first flash memory  140  and the second flash memory  140 . 
       FIGS. 5   a  and  5   b  are sectional views illustrating the coupling state of the micro USB memory package  100  according to the present invention with a receptacle  500 . 
     As shown in the drawings, the receptacle  500 , which is mounted on a computer, etc., is provided between an upper metal case  501  and a lower metal case  503  with an insulating protrusion  505  protruded by a certain length, and a plurality of USB contacts  506  are formed on the under surface of the insulating protrusion  505 . Of course, elastic retaining projections  502  and  504  are formed on the upper metal case  501  and the lower metal case  503  so that the connected micro USB memory package  100  cannot be easily separated to the outside. Furthermore, predetermined spaces  507  and  508  are formed between the upper metal case  501  and the insulating protrusion  505  and between the lower metal case  503  and the insulating protrusion  505 . Typically, the space  508  formed between the lower metal case  503  and the insulating protrusion  505  is larger than the space  507  formed between the upper metal case  501  and the insulating protrusion  505 . 
     Meanwhile, differently from the prior art, all of the micro USB memory package  100  according to the present invention is coupled to the space  508  between the lower metal case  503  and the insulating protrusion  505 . Of course, in the aforementioned connected state, the plurality of USB lands  113  provided on the USB memory package  100  is connected with the plurality of USB contacts  506  provided on the receptacle  500 . Furthermore, as stated above, since the passive elements  120 , the controllers  130  or the flash memories  140  are also positioned in a predetermined region of the substrate  110  corresponding to the USB lands  113 , the entire width and the thickness of the micro USB memory package  100  are very small as compared to the prior art. That is, according to the prior art, since the micro USB memory package  100  is inserted into the space  508  between the lower metal case  503  and the insulating protrusion  505  as well as the space  507  between the upper metal case  501  and the insulating protrusion  505 , the length and the thickness thereof are much larger than those of the micro USB memory package  100  according to the present invention. 
     Furthermore, only the coupling state of the micro USB memory package  100  with the receptacle  500  is illustrated in the drawings, however, all of the micro USB memory packages  200 ,  300 ,  401  and  402  can be coupled and separated in practice. 
       FIG. 6   a  is a perspective view illustrating a micro USB memory package according to another embodiment of the present invention,  FIG. 6   b  is a cross sectional view of  FIG. 6   a  and  FIG. 6   c  is a sectional view illustrating the coupling state of the micro USB memory package of  FIG. 6   a  with a receptacle. 
     As shown in the drawings, the micro USB memory package  101  is almost identical with the aforementioned micro USB memory package  100 . Accordingly, only the difference between the micro USB memory packages  101  and the micro USB memory package  100  will be described hereinafter. 
     As shown in  FIGS. 6   a  and  6   b , the substrate  110  and the encapsulation part  150  are covered with an external case  160 . The external case  160  can comprise an upper section  161  covering the top surface of the encapsulation part  150 , a lower section  162  covering the substrate  110 , a side section  163  covering the both side surfaces of the substrate  110  and the encapsulation part  150 , and a rear section  164  covering the rear surfaces of the substrate  110  and the encapsulation part  150 . Furthermore, the external case  160  can be formed by typical resin, metal or their equivalents, but the material of the external case is not limited thereto. The micro USB memory package according to the present invention can be protected from the external environment more effectively by the external case  160 . 
     Furthermore, a partial section of the external case  160 , which is a section corresponding to the USB lands  113  formed on the substrate  110 , is opened. In other words, the USB lands  113  formed on the substrate  110  can be exposed to the outside through the external case  160 . Accordingly, the micro USB memory package  101  can also be easily coupled with the receptacle. 
     Specifically, as shown in  FIG. 6   c , the micro USB memory package  101  according to the present invention can be mechanically coupled and electrically connected with the receptacle  500 . More specifically, the micro USB memory package  101  is coupled to the space  508  between the insulating protrusion  505  and the lower metal case  503 . Of course, in the aforementioned coupled state, the plurality of USB lands  113  provided on the micro USB memory package  101  are electrically connected with the plurality of USB contacts  506  provided on the receptacle  500 . Of course, the micro USB memory package  101  coupled with the receptacle  500  cannot be easily separated to the outside by the elastic retaining projection  504 . 
     Meanwhile, the external case  160  coupled with the micro USB memory package  100  is exemplarily described, but the external case  160  can be coupled with and separated from all of the micro USB memory packages  200 ,  300 ,  401  and  402 . 
       FIG. 7  is a flow chart illustrating a method for manufacturing the micro USB memory packages  401  and  402  according to the present invention. Of course, since a method for manufacturing the micro USB memory packages  100 ,  200  and  300  is similar to the method for manufacturing the micro USB memory packages  401  and  402 , the explanation about the method for manufacturing the micro USB memory packages  100 ,  200  and  300  will be omitted. 
     As shown in  FIG. 7 , a method for manufacturing the micro USB memory packages  401  and  402  according to the present invention comprises: the step of surface mounting the passive elements S 1 ; the step of backgrinding the wafer/attaching the adhesive film/sawing the wafer S 2 ; the step of baking the substrate/cleaning the first plasma S 3 ; the step of attaching the semiconductor die S 4 ; the step of cleaning the second plasma S 5 ; the step of wire bonding S 6 ; the step of cleaning the third plasma S 7 ; the step of molding S 8 ; the step of marking S 9 ; and the step of package singulation S 10 . 
     Here, the step of baking the substrate/cleaning the first plasma S 3 , the step of cleaning the second plasma S 5  and the step of cleaning the third plasma S 7  are processes for drying at a high temperature or removing various organic matters by a plasma gas so as to improve the product reliability and the adhesive strength, and can be skipped or omitted according to circumstances. Accordingly, the explanation about the aforementioned processes will be omitted. 
       FIGS. 8   a  to  8   g  are sequential schematic views illustrating a method for manufacturing the micro USB memory packages  401  and  402  according to the present invention. With reference to the drawings, a method for manufacturing the micro USB memory packages  401  and  402  according to the present invention will be described sequentially. 
     As shown in  FIG. 8   a , the step of surface mounting the passive elements S 1  is performed. In the step S 1 , after providing the substrate  110 , which is provided on the top and under surfaces thereof with the plurality of circuit patterns  112   a  and  112   b  and on one side of the under surface thereof with the plurality of USB lands  113 , at least one of passive elements  120  are mounted on the circuit patterns  112   a  formed on the substrate. For example, after screen-printing of a solder paste  121  (Sn/Pb or lead free solder) to the circuit patterns  112   a  of the substrate  110 , the passive elements  120  are mounted on the circuit patterns. Then, the substrate  110  is introduced into a high temperature (150˜250° C.) furnace and is refluxed and cooled, and thus the passive elements  120  are rigidly connected with the substrate  110 . Of course, thereafter, the remainder of the solder paste  121  is properly classified according to its fat-soluble or water-soluble property and is cleaned. By means of the aforementioned cleaning operation, the wire is accurately bonded to the circuit patterns during the wire bonding operation. Meanwhile, at this time, it is important that the passive elements  120 , the controllers  130  or the flash memories  140  are electrically connected with the top region corresponding to the USB lands  113  provided on the substrate  110 . That is, a predetermined element can also be mounted on the region corresponding to the USB lands  113  without wasting the space due to the USB plug as in the prior art, and thus the micro USB memory package having light, thin, short and small configuration is realized. 
     Thereafter, as shown in  FIG. 8   b , the step of backgrinding the wafer/attaching the adhesive film/sawing the wafer S 2  is performed. The process for backgriding the wafer is a process for grinding and polishing the rear surface of the wafer W so as to make the thickness of the wafer thin. Furthermore, the process for attaching the adhesive film  143  is a process for attaching the adhesive (adhesive film)  143  so as to easily stack two or more layers of the semiconductor die. Finally, the process for sawing the wafer is a process for separating each semiconductor die (the controller  130  or the flash memory  140 ) to each piece using a diamond blade wb, etc. At this time, the adhesive  143  is attached to the under surface of each semiconductor die. Hereinafter, the semiconductor die is defined as the controller  130  or the flash memory  140 . 
     Thereafter, as shown in  FIG. 8   c , the step of attaching the semiconductor die S 4  is performed. That is, the controllers  130  and the flash memories  140  are attached to the top surface of the substrate  110  by the adhesives  143  and  132 . Of course, instead of the adhesives  143  and  132 , typical adhesive film can be used. 
     Thereafter, as shown in  FIG. 8   d , the step of wire bonding S 6  is performed. That is, the controllers  130  and the circuit patterns  112   a  of the substrate  110  are interconnected by the wire  131 , and the flash memories  140  and the circuit patterns  112   a  of the substrate  110  are interconnected by the wire  141 . Here, a plurality of flash memories  140  can be stacked, and in order to stack the flash memories  140 , a wire bonding process can be performed by a forward loop mode process, a forward folded loop mode process or a reverse loop mode process. 
     According to the forward loop mode process, one end of the wire  141  is firstly ball-bonded to the flash memories  140  and then is outwardly folded to have a predetermined loop, and the other end of the wire is secondly stitch-bonded to the circuit patterns  112   a.    
     According to the forward folded loop mode process, one end of the wire  141  is firstly ball-bonded to the flash memories  140  and then is outwardly folded to minimize the loop height, and the other end of the wire is secondly stitch-bonded to the circuit patterns  112   a . This process will be described in more detail. 
     According to the reverse loop mode process, one end of the wire  141  is firstly ball-bonded to the circuit patterns  112   a , and then the other end of the wire is secondly stitch-bonded to the conducting bump  142   b  preformed on the flash memories  140 . This process will also be described in more detail. 
     Meanwhile, there is illustrated in the drawing a state where the wire  141  is bonded by the forward folded loop mode process. 
     Thereafter, as shown in  FIG. 8   e , the step of molding S 8  is performed. In the step of molding S 8 , the passive elements  120 , the controllers  130 , at least one of flash memories  140  and the wires  131  and  141  on the substrate  110  are encapsulated by the encapsulant, such as an epoxy resin or a silicon resin, and thus the encapsulation part  150  of a predetermined shape is formed. Of course, the encapsulation part  150  can be formed by a molding process using a transfer mold or an encapsulation process using a dispenser. 
     Thereafter, as shown in  FIG. 8   f , the step of marking S 9  is performed. In the step of marking S 9 , various information, such as the product name and the manufacturing company, is marked on the surface of the encapsulation part  150  using a marking element m, such as ink or laser. 
     Finally, as shown in  FIG. 8   g , the step of singulation S 10  is performed. In the step of singulation S 10 , the encapsulation part  150  and the substrate  110  are cut together by a sawing punch or a sawing blade sb, etc., and thus each micro USB memory package  100  is obtained. 
       FIGS. 9   a  to  9   c  are schematic views illustrating a wire bonding method using the forward folded loop mode process among methods for manufacturing the micro USB memory package  401  according to the present invention. 
     As shown in  FIG. 9   a , the controllers  130  and the flash memories  140  are bonded to the top surface of the substrate  110 . 
     Thereafter, as shown in  FIG. 9   b , the controllers  130  and the substrate  110  are electrically interconnected by the wire  131  using the typical forward loop mode process, and the flash memories  140  and the substrate  110  are electrically interconnected by the wire  141  using the forward folded loop mode process. That is, one end of the wire  131  is firstly ball-bonded to the controllers  130  and the other end of the wire is secondly stitch-bonded to the circuit patterns  112   a , and thus the controllers  130  and the substrate  110  are electrically interconnected. Thereafter, one end of the wire  141  is firstly ball-bonded to the flash memories  140  and then is outwardly folded to minimize the loop height, and the other end of the wire is secondly stitch-bonded to the circuit patterns  112   a . In doing so, the loop height of the wire  141  formed on the flash memories  140  is minimized. 
     Of course, after these wire bonding operations, a further flash memory  140 , which is provided on the under surface thereof with the adhesive (adhesive film)  143 , is stacked, and then wire bonding operations using the forward folded loop mode process are performed sequentially as shown in  FIG. 9   c.    
     According to the forward folded loop mode process, the wire bonding operations can be completed by properly controlling only the capillary track of the wire bonder without employing a separate structure or method. Accordingly, there is an advantageous effect that the manufacturing cost is reduced when stacking the plurality of flash memories  140 . 
       FIGS. 10   a  to l 0   d  are schematic views illustrating a wire bonding method using the reverse loop mode process among methods for manufacturing the micro USB memory package  401  and  402  according to the present invention. 
     As shown in  FIG. 10   a , the controllers  130  and the flash memories  140  are bonded to the top surface of the substrate  110 . 
     Thereafter, as shown in  FIG. 10   b , the controllers  130  and the substrate  110  are electrically interconnected by the wire  131  using the typical normal wire bonding method, and the conducting bump  142   a  is preformed on the flash memories  140  for the reverse loop mode process. The conducting bump  142   a  can be formed by several methods, and, for example, a solder bump or an Au plated bump is formed in a wafer state. Otherwise, a stud bump can be formed using the capillary of the wire bonder. There is illustrated in the drawing a stud bump formed by using the wire and capillary as the conducting bump  142   a.    
     Thereafter, as shown in  FIG. 10   c , one end of the wire is firstly ball-bonded to the circuit patterns  112   a  of the substrate  110 , and the other end of the wire is secondly stitch-bonded to the conducting bump  142   a  preformed on the flash memories  140 . That is, the wire bonding operations are performed by using the reverse loop mode process. 
     Similarly, after these wire bonding operations, a further flash memory  140 , which is provided on the under surface thereof with the adhesive  143  (adhesive film), is stacked, and then wire bonding operations are performed sequentially by using the reverse loop mode process as shown in  FIG. 10   d.    
     According to the reverse loop mode process, the manufacturing cost tends to be increased, but the reliability and the workability are improved. 
     According to the present invention, there is an advantageous effect that new USB lands meeting the USB standard specification are formed on the under surface of the substrate instead of removing the conventional USB plug coupled with the USB receptacle, and various kinds of elements (the passive elements, the controllers and the flash memories) can be mounted on the top surface of the substrate corresponding to the USB lands, and thus there is provided a micro USB memory package having much lighter, thinner, shorter and smaller configuration than that of the prior art. 
     Furthermore, according to the present invention, there is an advantageous effect that the controllers and the flash memories are electrically connected with the substrate not in the form of a package but in the form of a die and an encapsulation technology using a stack technology, a wire bonding technology and the encapsulant is employed, and thus there is provided a micro USB memory package enabling to easily expand the memory capacity and simplify the manufacturing method thereof. 
     Furthermore, according to the present invention, there is an advantageous effect that the LED element indicating the operating state is mounted on the substrate and is encapsulated together with other elements by the transparent encapsulant, and thus there is provided a micro USB memory package enabling to easily see the operating state from the outside and actively prevent the penetration of moisture or foreign substance. 
     Furthermore, according to the present invention, there is an advantageous effect that USB lands meeting the USB standard specification are symmetrically formed and arranged on the under surface of the substrate, and thus there is provided a micro USB memory package enabling to be normally used whichever directions the micro USB memory package is coupled with the receptacle. 
     Furthermore, according to the present invention, there is an advantageous effect that the external case almost covering the substrate and the encapsulation part is further provided, and thus a micro USB memory package enabling to protect more safely from the external mechanical, electrical and chemical environment. 
     This disclosure provides exemplary embodiments of the present invention. The scope of the present invention is not limited by these exemplary embodiments. Numerous variations, whether explicitly provided for by the specification or implied by the specification, such as variations in structure, dimension, type of material and manufacturing process, may be implemented by one skilled in the art in view of this disclosure.