Patent Publication Number: US-2017350935-A1

Title: Electrical branch circuit deterioration test system

Description:
BACKGROUND 
     The present invention relates generally to electrical systems, and in particular to a system and method for testing building electrical systems. 
     Residential and commercial buildings, for example, often include complex electrical wiring systems that include several branch circuits. These wiring systems may, over time, develop loose connections and/or deteriorated junctions. At these deteriorated junctions, heat may be produced which may form an oxide when a copper wire heats and cools. Copper oxide has semiconductor characteristics and may behave as a p-n junction possessing a forward conducting voltage and a reverse breakdown voltage. When line currents pass through the deteriorated junction, the built up oxide causes further heating and cooling, which in turn, generates further oxide buildup. It is desirable to detect these deteriorated junctions early and effectively so as to facilitate repair of the junction prior to it evolving into a more serious electrical issue. 
     SUMMARY 
     A system for detecting deteriorated junctions within an electrical circuit includes a voltage channel circuit, a load circuit, and a microcontroller. The voltage channel circuit is connectable to the electrical circuit and includes a multiplier circuit, a peak detector circuit, and a filter circuit. The multiplier circuit is configured to square a channel voltage indicative of the line voltage of the electrical circuit. The peak detector circuit is configured to detect a peak voltage of the channel voltage based on an output of the multiplier circuit. The filter circuit is configured to provide a direct current (DC) output voltage based on the output of the multiplier circuit. The load circuit is connectable to the voltage channel and includes a plurality of resistors and a plurality of switches. The microcontroller is configured to control the plurality of switches to enable current to flow through the plurality of resistors to measure the channel voltage of the electrical circuit, and wherein the microcontroller is configured to detect a deteriorated junction based upon a comparative shift of the output of the peak detector circuit and/or the DC output voltage. 
     A method of testing for deteriorated junctions within an electrical circuit includes connecting, by a microcontroller, a first set of resistors across a line voltage of the electrical circuit to draw a first current; outputting, by a peak detector circuit, a peak voltage of the line voltage based on the draw of the first current; connecting, by the microcontroller, a second set of resistors across the line voltage to draw a second current greater than the first current; outputting, by a first filter circuit, a direct current (DC) output voltage based on the line voltage and the draw of the second current; and detecting, by the microcontroller, a deteriorated junction of the electrical circuit based on the peak voltage and the DC output voltage. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block diagram illustrating an electrical system that includes a plug-in test device for detecting deteriorated junctions. 
         FIG. 2  is a block diagram illustrating a plug-in test device for detecting deteriorated junctions in a branch circuit of an electrical system. 
         FIGS. 3A and 3B  are a block diagram and circuit schematic, respectively, of a voltage channel utilized to detect deteriorated junctions in a branch circuit of an electrical system. 
         FIGS. 4A and 4B  are a block diagram and circuit schematic, respectively, of a current channel utilized to detect deteriorated junctions in a branch circuit of an electrical system. 
         FIG. 5  is a flowchart illustrating a method of detecting deteriorated junctions in electrical circuits utilizing a plug-in test device. 
     
    
    
     DETAILED DESCRIPTION 
     A system and method is disclosed herein for detecting deteriorated junctions in electrical circuits. The system includes a plug-in device that attaches to electrical branch circuits, for example, through outlets and/or other receptacles. The plug-in device includes circuits configured to perform, for example, two test protocols. The first test protocol includes detection of a peak voltage. The peak voltage is detected, for example, by squaring the sinusoidal channel voltage on the branch circuit under test. The detected peak voltage may be provided to a microcontroller for further processing. If the peak voltage indicates a significant voltage alteration from the circuit breaker panel to the test device, a deteriorated junction may be indicated. 
     The second test protocol includes monitoring direct current (DC) and low frequency components of the channel voltage on the branch circuit under test over an extended time period of three minutes, for example, while also monitoring the current in the branch circuit for random disturbances. This second test protocol allows the branch circuit to heat up, causing a deteriorated junction to act as a modulating entity. This modulation may be detected by monitoring the DC and low frequency components of the channel voltage on the branch circuit under test. The deteriorated junction may also produce random disturbances in the current on the branch circuit under test. During the second test protocol, the current channel compares or correlates a voltage indicative of the line current to a reference voltage indicative of the undisturbed line current to detect random disturbances in line current. In this way, deteriorated junctions may be detected by both a peak voltage and low frequency components of a heated circuit using the voltage channel and by random disturbances in line current using the current channel. 
       FIG. 1  is a block diagram illustrating electrical circuit  10  that includes plug-in test device  12  for detecting deteriorated junctions. Circuit  10  includes circuit breaker panel  14  and branch circuits  16   a - 16   n . Each branch circuit  16   a - 16   n  includes any number of outlets  18 . Plug-in test device  12  may connect to, for example, any of outlets  18 . In other embodiments, plug-in test device  12  may be configured to attach to other end-points of a branch circuit  16   a - 16   n  such as, for example, plugged into receptacles or attached to switches. Circuit breaker panel  14  may be utilized to control, through individual circuit breakers, the distribution of mains power  20  to each respective branch circuit  16   a - 16   n.    
     With continued reference to  FIG. 1 ,  FIG. 2  is a block diagram illustrating plug-in test device  12  for detecting deteriorated junction  30  in any of branch circuits  16   a - 16   n . Test device  12  may be connected to outlet  18  and is configured to monitor lines  32   a  and  32   b  of the respective branch circuit  16   a - 16   n  to detect, for example, deteriorated junction  30 . Deteriorated junction  30  may be, for example, any junction in the respective branch circuit  16   a - 16   n  that has become loose, corroded, oxidized, or deteriorated in any other way. 
     Test device  12  includes voltage channel  34 , first resistor circuit  38 , second resistor circuit  40 , current channel  42 , microcontroller  44 , display  46 , switches  48   a - 48   n , relay  50 , relay control switch  52 , attenuator  54  and current sensor  56 . Microcontroller  44  may be any circuit capable of, for example, executing software or other programmed instructions. First resistor circuit  38  may be a load circuit that includes resistors R 1 -R 4 , and second resistor circuit  40  may be a load circuit that includes resistors R 5 -R 8 . Microcontroller  44  receives input from voltage channel  34  and current channel  42 , and provides output to control display  46 , switches  48   a - 48   n , and relay  50 . Display  46  may be any display capable of providing visual and/or audio output, such as a light-emitting diode (LED) display. Display  46  may be utilized, for example, to provide visual indications regarding a tested branch circuit  16   a - 16   n  such as, but not limited to, detected arc faults, detected deteriorated junctions, successful tests, internal faults and any other desirable information. 
     In an embodiment, voltage channel  34  and current channel  42  may be implemented on the same circuit board, for example. This circuit board may be located in a first housing, along with first resistor circuit  38  (which may be implemented on a separate circuit board, for example). Second resistor circuit  40  may be implemented within a second housing, apart from the first housing. This may be advantageous due to the power drawn, and thus, the heat generated by second resistor circuit  40 . The two housings may be connected by wiring, for example. 
     Plug-in test device  12  may perform, for example, two tests for a respective branch circuit  16   a - 16   n . The first test may be referred to as a “cold junction test.” During the cold junction test, switches  48   a - 48   n  are controlled by microcontroller  44  to enable current flow through respective resistors R 1 -R 4 . Resistors R 1 -R 4  are sized, for example, to not draw an excessive amount of current so as not to heat the respective branch circuit  16   a - 16   n . However, resistors R 1 -R 4  may be sized such that the current draw is great enough to establish a baseline peak voltage for the cold junction test. 
     Upon beginning the cold junction test, all cord and plug appliances may be disconnected from wall receptacles and outlets  18  of the respective branch circuit  16   a - 16   n . This ensures that the respective branch circuit  16   a - 16   n  is sufficiently isolated from any equipment that may influence the test of the respective branch circuit  16   a - 16   n . This test may be performed, for example, for each outlet  18  of the respective branch circuit  16   a - 16   n . Test device  12  may be configured to connect directly to outlets  18 . In other embodiments, test device  12  may be configured to plug into other receptacles or other portions of a respective branch circuit  16   a - 16   n.    
     Switches  48   a - 48   n  may be controlled, for example, in succession to enable a greater current draw over several line cycles. For example, switch  48   a  may be enabled for a short time period, such as several cycles of current on line  32   a , to enable a first current draw through resistor R 1 . This may be repeated for each switch  48   a - 48   n  to gradually increase the current over several cycles. By drawing current through resistors R 1 -R 4  for a short time, microcontroller  44  is able to determine peak voltages using voltage channel  34  for the respective branch circuit  16   a - 16   n  while the circuit is at a relatively cool temperature. Switches  48   a - 48   n  may be implemented as thyristors, for example, or as any other type of switch controllable to provide current to resistors R 1 -R 4 . 
     Microcontroller  44  may utilize the determined peak voltage to detect a deteriorated junction within the respective branch circuit  16   a - 16   n . For example, the maximum amplitude of the voltage coming into circuit breaker panel  14  from mains power  20  may be 170 volts. If the peak voltage detected by voltage channel  34  during the cold junction test is 150 volts, for example, microcontroller  44  may indicate a deteriorated junction for the respective branch circuit  16   a - 16   n . Microcontroller  44  may be configured to indicate a deteriorated junction for any selected voltage drop such as, for example, a five percent voltage drop. Microcontroller  44  may utilize a calibrated voltage from current channel  42  and the determined peak voltage to determine the impedance of the branch circuit  16   a - 16   n . Microcontroller  44  may be configured to indicate a deteriorated junction for any selected impedance shift such as, for example, a five percent shift or from an absolute impedance value, for example, of 0.5 Ohms. 
     The second test may be referred to as the “extended time test.” In the extended time test, second resistor circuit  40  may be utilized to draw significant current from line  32   a  for an extended period of time such as, for example, several minutes. Resistors R 5 -R 8  may be power resistors implemented, for example, as glass fired resistors mounted on fan cooled heat sinks. In other embodiments, any other linear load capable of handling large currents may be utilized in place of resistors R 5 -R 8 . Switch  52  may be controlled by microcontroller  44  to control relay  50 . Relay  50  is closed during the extended time test to enable current flow to resistors R 5 -R 8 . Switch  52  may be implemented as a metal-oxide-semiconductor field-effect transistor (MOSFET) or any other switch controllable by microprocessor  44 . 
     Heat is a product of deteriorated junction  30 . When a copper wire, for example, heats and cools, oxides may be formed on the wire. As the thickness of the oxide increases, more heat may be produced at the junction, which in turn results in even greater oxide formation. Copper oxides, for example, have semiconductor properties and act as a resistive p-n junction. A p-n junction is a non-linear, rectifying device possessing a forward conducting voltage and a reverse breakdown voltage. When a line current of 60 Hz, for example, passes through deteriorated junction  30 , heating and cooling effects may occur (i.e., the circuit heats as the line voltage reaches its maximum amplitude, and cools as the line voltage passes through zero volts) and deteriorated junction  30  may amplitude modulate the line voltage as well as produce additional frequency components on lines  32   a  and  32   b . The extended time test is utilized to detect the amplitude modulation and additional frequency components. 
     Another product of a deteriorated junction may be random pulse-like disturbances in the current on lines  32   a  and  32   b . These disturbances may be indicative of charge build-up and air breakdown of the junction, for example. These random disturbances in line current can generate further heat, which may exacerbate the deterioration of junction  30 . The extended time test is further utilized to detect these random disturbances in current on lines  32   a  and  32   b  using current channel  42 . 
     Prior art methods of detecting deteriorated junction  30  include monitoring the line voltage on lines  32   a  and  32   b  solely to observe a voltage drop. For example, a device may be connected to one of outlets  18  for a short time period to detect a voltage drop from breaker panel  14  to outlet  18 . If the voltage drop is greater than a given amount, a deteriorated junction may be indicated. This method does not allow the circuit to generate any significant heat, which might prevent deteriorated junction  30  from modulating or producing any other additional frequency components. Because of this, deteriorated junctions  30  may go undetected. By heating each branch circuit  16   a - 16   n  and monitoring for modulation and other frequency components, such as random disturbances in current, deteriorated junctions  30  may be detected and repaired in a sooner, more efficient manner. 
     Current channel  42  may be utilized to detect random disturbances in current on the respective branch circuit  16   a - 16   n . Current channel  42  may generate a reference voltage indicative of the undisturbed line current that may be compared to a voltage indicative of the current on lines  32   a  and  32   b . Load current may be sensed by current sensor  56  and provided to current channel  42 . Current channel  42  may condition the sensed current to generate a reference voltage indicative of the expected current on lines  32   a  and  32   b  in the absence of any random disturbances. Current channel  42  may compare the generated reference voltage to a voltage indicative of the actual sensed current on lines  32   a  and  32   b  to detect random disturbances in the current. Deteriorated junction  30  may cause the current on lines  32   a  and  32   b  to display random, pulse-like disturbances indicative of charge build-up and air breakdown at junction  30 . These disturbances may generate significant heat, which may cause further breakdown of deteriorated junction  30 . By detecting any random disturbances in current, current channel  42  allows plug-in device  12  to effectively detect deteriorated junction  30 . 
     With continued reference to  FIGS. 1 and 2 ,  FIGS. 3A and 3B  are a block diagram and circuit schematic, respectively, of voltage channel  34 . Voltage channel  34  includes differential amplifier  60 , multiplier circuit  62 , amplifier  64 , low pass filter  66 , peak detector circuit  68 , direct current (DC) processing circuit  70  and zero-cross detection circuit  72  (which receives a reference voltage input illustrated as reference circuit  71  in  FIG. 3B ). Differential amplifier  60  may be implemented to receive and condition the signals on lines  32   a  and  32   b  through attenuator  54 . Attenuator  54  may be implemented as a transformer, for example, to adjust the voltage from lines  32   a  and  32   b  to a desirable voltage for voltage channel  34 . 
     A simple model of the line voltage in the presence of a heat-induced modulating deteriorated junction is illustrated by equation [1]: 
     
       
         
           
             
               
                 
                   
                     V 
                     L 
                   
                   = 
                   
                     
                       ( 
                       
                         V 
                         P 
                       
                       ) 
                     
                      
                     
                       ( 
                       
                         1 
                         + 
                         
                           
                             - 
                             
                               r 
                                
                               
                                 ( 
                                 t 
                                 ) 
                               
                             
                           
                           
                             R 
                             + 
                             
                               r 
                                
                               
                                 ( 
                                 t 
                                 ) 
                               
                             
                           
                         
                       
                       ) 
                     
                      
                     
                       cos 
                        
                       
                         ( 
                         wt 
                         ) 
                       
                     
                   
                 
               
               
                 
                   [ 
                   1 
                   ] 
                 
               
             
           
         
       
     
     where:
         V L  is the line voltage;   t is time;   V p  is the peak line voltage (e.g., one hundred seventy volts);       

     
       
         
           
             
               - 
               
                 r 
                  
                 
                   ( 
                   t 
                   ) 
                 
               
             
             
               R 
               + 
               
                 r 
                  
                 
                   ( 
                   t 
                   ) 
                 
               
             
           
         
       
     
     is the modulating mechanism (i.e. deteriorated junction  30 ); and 
     
       
         
           
             w 
             = 
             
               2 
                
               π 
                
               
                   
               
                
               f 
                
               
                 
                   rad 
                   sec 
                 
                 . 
               
             
           
         
       
     
     For amplitude modulation, direct current (DC) and low frequency components are not considered to provide useful information and are traditionally discarded. However, in the case of a deteriorated junction, the modulation frequency may be of the same order as the carrier signal and thus, the information regarding deteriorated junction  30  may be contained only within the DC and low frequency components of the line voltage. 
     To process this information, multiplier circuit  62  is utilized to “square” the signal received through differential amplifier  60 . When squaring the signal, the result may be modeled as a square of equation [1], as illustrated by equation [2]: 
     
       
         
           
             
               
                 
                   
                     
                       
                         ( 
                         
                           
                             V 
                             P 
                           
                           n 
                         
                         ) 
                       
                       2 
                     
                      
                     
                       
                         ( 
                         
                           1 
                           + 
                           
                             
                               - 
                               
                                 r 
                                  
                                 
                                   ( 
                                   t 
                                   ) 
                                 
                               
                             
                             
                               R 
                               + 
                               
                                 r 
                                  
                                 
                                   ( 
                                   t 
                                   ) 
                                 
                               
                             
                           
                         
                         ) 
                       
                       2 
                     
                      
                     
                       
                         cos 
                         2 
                       
                        
                       
                         ( 
                         wt 
                         ) 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           
                             ( 
                             
                               
                                 V 
                                 P 
                               
                               n 
                             
                             ) 
                           
                           2 
                         
                          
                         
                           
                             ( 
                             
                               1 
                               + 
                               
                                 
                                   - 
                                   
                                     r 
                                      
                                     
                                       ( 
                                       t 
                                       ) 
                                     
                                   
                                 
                                 
                                   R 
                                   + 
                                   
                                     r 
                                      
                                     
                                       ( 
                                       t 
                                       ) 
                                     
                                   
                                 
                               
                             
                             ) 
                           
                           2 
                         
                       
                       2 
                     
                      
                     
                       ( 
                       
                         1 
                         + 
                         
                           cos 
                            
                           
                               
                           
                            
                           2 
                            
                           wt 
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   [ 
                   2 
                   ] 
                 
               
             
           
         
       
     
     where n is the attenuation produced by attenuator  54 , for example. 
     The 2 nd  harmonic may be filtered from equation [2] (e.g., using low pass filter  66 ) and the result, illustrated in equation [3], provides DC and low frequency information about deteriorated junction  30 . 
     
       
         
           
             
               
                 
                   
                     V 
                     
                       D 
                        
                       
                           
                       
                        
                       C 
                        
                       
                           
                       
                        
                       and 
                        
                       
                           
                       
                        
                       Low 
                        
                       
                           
                       
                        
                       Freq 
                     
                   
                   = 
                   
                     
                       
                         
                           ( 
                           
                             
                               V 
                               P 
                             
                             n 
                           
                           ) 
                         
                         2 
                       
                        
                       
                         
                           ( 
                           
                             1 
                             + 
                             
                               
                                 - 
                                 
                                   r 
                                    
                                   
                                     ( 
                                     t 
                                     ) 
                                   
                                 
                               
                               
                                 R 
                                 + 
                                 
                                   r 
                                    
                                   
                                     ( 
                                     t 
                                     ) 
                                   
                                 
                               
                             
                           
                           ) 
                         
                         2 
                       
                     
                     2 
                   
                 
               
               
                 
                   [ 
                   3 
                   ] 
                 
               
             
           
         
       
     
     Where V DC and Low Freq  is the output, for example, of low pass filter  66 . 
     The output of low pass filter circuit  66 , as modeled by equation [3], may be processed by DC processing circuit  70  and provided to microcontroller  44 . This processing may include, for example, conditioning of the signal, further filtering of unwanted components, and any other desired conditioning of the DC and low-frequency analog components provided to microcontroller  44 . 
     As described above, deteriorated junction  30  acts as a modulating entity when the respective branch circuit  16   a - 16   n  is heated. DC and low frequency components are produced, and are a result of line voltage amplitude modulation as the respective branch circuit  16   a - 16   n  heats and cools. Thus, low pass filter circuit  66  and DC processing circuit  70  may be utilized during the extended time test to detect deteriorated junctions  30  while the circuit is heating up through the use of second resistor circuit  40 . Microprocessor  44  detects the modulations within the DC and low frequency components provided by voltage channel  34  to detect deteriorated junction  30 . 
     For the cold junction test, voltage channel  34  further includes peak detection of the channel voltage, which is also processed from the output of multiplier circuit  62 , as modeled in equation [2]. Amplifier circuit  64  receives the output of multiplier circuit  62  and provides signal conditioning. This may include, for example, amplification of the signal to provide ease of processing for peak detector circuit  68 . Peak detector circuit  68  may provide an output to microcontroller  44  indicative of a peak voltage seen on lines  32   a  and  32   b  for a given time period. 
     As illustrated in  FIG. 3B , peak detection circuit  68  may include reset line  74  from microcontroller  44 . This reset line may allow microcontroller  44  to “reset” the peak voltage output of peak detector circuit  68  to a baseline value, such as zero volts, in order to start tracking a new peak voltage based on switch configuration  48   a - 48   n  as controlled by microcontroller  44 . This way, the output of peak detector circuit  68  will be a voltage value indicative of the peak voltage on lines  32   a  and  32   b  during the duration of each respective switch configuration  48   a - 48   n.    
     Zero-cross detection circuit  72  may be utilized to provide an indication to microcontroller  44  that the line voltage on lines  32   a  and  32   b  is at a zero-crossing (i.e. the voltage is passing from positive to negative or negative to positive). This may be useful for microcontroller  44  when controlling, for example, switches  48   a - 48   n  and  52  of test device  12 . By switching at zero-crossing of the line voltage, the electromagnetic interference (EMI) that may be generated during that switching is reduced, providing better performance for test device  12 . 
     With continued reference to  FIGS. 1-3B ,  FIGS. 4A and 4B  are a block diagram and circuit schematic, respectively, of current channel  42 . Current channel  42  includes input amplifier circuit  80 , square wave circuit  82 , phase locked loop (PLL) circuit  84 , low pass filter  86 , DC block and phase correction circuit  88 , absolute value circuit  90 , constant amplitude circuit  92 , DC block and absolute value circuit  94 , and signal comparison circuit  96 . The output of constant amplitude circuit  92  is a positive voltage reference signal that is indicative of the undisturbed line current and provided to signal comparison circuit  96  and microcontroller  44 . The output of DC block and absolute value circuit  94  is a positive voltage value indicative of the current on lines  32   a  and  32   b  and is provided to signal comparison circuit  96  and microcontroller  44 . 
     The reference signal is a value that may be indicative of an expected current on lines  32   a  and  32   b  in the absence of any deteriorated junctions within the respective branch circuit  16   a - 16   n . Input amplifier circuit  80  provides a single-ended output based on the differential input from current sensor  56 . Square wave circuit  82  converts the input signal (i.e., the sine wave signal) into a non-sinusoidal periodic signal. This signal is provided to PLL circuit  84 . PLL circuit  84  may be utilized to lock onto the line frequency of the square wave signal from circuit  82  to control the phase and/or frequency of the reference signal. The output of PLL circuit  84  is provided to low pass filter  86 , which may be implemented to pass the line frequency while rejecting higher order harmonics of the PLL output. DC block and phase correction circuit  88  may be configured to filter DC components of the reference signal and correct the phase of the reference signal from low pass filter circuit  86  to match the phase of the line current. The phase may need to be corrected due to phase shifts caused by low pass filter  86  and/or other analog delay components of current channel  42 . Absolute value circuit  90  may be configured to provide a unidirectional signal indicative of the magnitude of the input signal. Absolute value circuit  90  may also provide zero cross-over distortion, for example, which may flatten the reference signal at zero crossings. The output of absolute value circuit  90  may be provided to constant amplitude circuit  92  which may be configured to provide automatic gain control, for example, to control the amplitude of the reference signal. For example, amplitude circuit  92  may include a divider feedback circuit utilized to maintain a desired amplitude of the reference single when the line signal, for example, decreases unexpectedly based on random disturbances in the line current. The reference signal  98  output by constant amplitude circuit  92  may be conditioned and provided to signal comparison circuit  96  as a first input. 
     DC block and absolute value circuit  94  may be configured to filter any DC components from amplifier circuit  80  and provide a unidirectional signal (of the same direction as the reference signal) indicative of the magnitude of the line current on lines  32   a  and  32   b . The output of DC block and absolute value circuit  94  may be provided to signal comparison circuit  96  as a second input. 
     Signal comparison circuit  96  may be configured to compare reference signal  98  to the conditioned line signal  100 . During normal operation of the respective branch circuit  16   a - 16   n , the conditioned line signal will be greater than the reference signal. In the event of random disturbances in the line current of the respective branch circuit  16   a - 16   n , the line signal will decrease toward zero, while the reference signal does not. Therefore, signal comparison circuit  96  may be configured to provide indication to microprocessor  44  whenever the line signal falls below the reference signal. Microprocessor  44  may utilize this indication to detect deteriorated junction  30  and/or other disturbances on respective branch circuit  16   a - 16   n . The line signal and reference signal may also be provided directly to microprocessor  44  in order to allow microprocessor to perform further monitoring and correlation. 
     With continued reference to  FIGS. 1-4B ,  FIG. 5  is a flowchart illustrating method  120  for testing branch circuits  16   a - 16   n  for deteriorated junction  30  utilizing test device  12 . All steps may be performed by any combination of software or other programmed instructions implemented on microcontroller  44 , other circuit components, and a technician performing a test utilizing test device  12 . 
     At step  122 , all cord and plug appliances may be disconnected from wall receptacles and outlets  18  of the respective branch circuit  16   a - 16   n . This ensures that the respective branch circuit  16   a - 16   n  under test is sufficiently isolated from any equipment that may influence the test of the respective branch circuit  16   a - 16   n.    
     At step  124 , the cold junction test is started by enabling thyristors  48   a - 48   n  in succession, for example, to enable current to flow to first resistor circuit  38 . Microcontroller  44  resets peak voltage detector circuit  68 . At step  126 , peak detector circuit  68  is utilized to provide a voltage to microcontroller  44  that is indicative of the peak voltage on lines  32   a  and  32   b . At step  128 , microcontroller  44  determines if a deteriorated junction  30  is present based upon the peak voltage provided by peak detector circuit  68 . For example, if the peak voltage from the utility company on mains power input  20  is 170 volts, microcontroller  44  may check to verify that the peak voltage provided by peak detector circuit  68  is no less than five percent lower, for example, than one hundred and seventy volts. If it is, method  120  may proceed to step  130  and indicate that a deteriorated junction has been detected in the respective branch circuit  16   a - 16   n  under test. If no deteriorated junction is detected at step  128 , method  120  proceeds to step  132 . 
     At step  132 , the “cold junction test” is over and the “extended time test” begins. Microcontroller  44  disables current flow to first resistor circuit  38  by controlling thyristors  48   a - 48   n . Microcontroller  44  enables switch  52  to close relay  50  to enable current flow to second resistor circuit  40 . Second resistor circuit  40  draws significantly more power than first resistor circuit  38  and thus, heats up the respective branch circuit  16   a - 16   n.    
     At step  134 , voltage channel  34  provides DC and low frequency components of the line voltage to microcontroller  44 . Microcontroller  44  monitors the DC and low frequency components to determine if a deteriorated junction is detected in the respective branch circuit  16   a - 16   n . Simultaneously to step  134 , at step  136 , microcontroller  44  monitors the output of current channel  42  to monitor, for example, any random disturbances in the line current apart from the utility frequency generated on lines  32   a  and  32   b.    
     At step  138 , it is determined if the DC and low frequency components provided by voltage channel  34  are indicative of a deteriorated junction. If so, method  120  proceeds to step  130  and a warning is indicated. The deteriorated junction warning may be indicated to a technician, for example, using display  46 . At step  140 , it is determined, by microcontroller  44 , if the output of current channel  42  is indicative of random disturbances in the line current. If so, method  120  proceeds to step  130  and a warning is indicated. If no modulation is detected at step  138  and no random disturbances are detected at step  140 , method  120  proceeds to step  142 . 
     At step  142 , it is determined if the extended time test has completed. If it is not completed (e.g., the test has not been run for the full time, for example, of three minutes), method  120  returns to step  132  and continues to run the extended time test. If the test is completed, method  120  proceeds to step  144  and a successful test is indicated. Method  120  may be repeated for all outlets  18  of each respective branch circuit  16   a - 16   n.    
     While the invention has been described with reference to an exemplary embodiment(s), it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment(s) disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.