Patent Publication Number: US-2023154788-A1

Title: Semiconductor device structure with protection cap

Description:
CROSS REFERENCE 
     This application is a Continuation of U.S. application Ser. No. 16/994,091, filed on Aug. 14, 2020, which is a Divisional of U.S. application Ser. No. 15/991,523, filed on May 29, 2018, the entirety of which is incorporated by reference herein. 
    
    
     BACKGROUND 
     The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs. Each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs. 
     In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometric size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling-down process generally provides benefits by increasing production efficiency and lowering associated costs. 
     However, since feature sizes (e.g., diameters of conductive via structures) continue to decrease, fabrication processes continue to become more difficult to perform. Therefore, it is a challenge to form reliable semiconductor devices at smaller and smaller sizes. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, in accordance with standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. 
         FIGS.  1 A- 1 P  are top views of various stages of a process for forming a semiconductor device structure, in accordance with some embodiments. 
         FIG.  1 A- 1    to  FIG.  1 K- 1    are cross-sectional views illustrating the semiconductor device structure along a sectional line I-I′ in  FIGS.  1 A- 1 K , in accordance with some embodiments. 
         FIG.  1 L- 1    to  FIG.  1 P- 1    are cross-sectional views illustrating the semiconductor device structure along a sectional line II-II′ in  FIGS.  1 L- 1 P , in accordance with some embodiments. 
         FIG.  1 P- 2    is a cross-sectional view illustrating the semiconductor device structure along a sectional line I-I′ in  FIG.  1 P , in accordance with some embodiments. 
         FIG.  2    is a top view of a semiconductor device structure, in accordance with some embodiments. 
         FIG.  3    is a top view of a semiconductor device structure, in accordance with some embodiments. 
         FIG.  4    is a cross-sectional view of a semiconductor device structure, in accordance with some embodiments. 
     
    
    
     DETAILED DESCRIPTION 
     The following disclosure provides many different embodiments, or examples, for implementing different features of the subject matter provided. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. 
     Furthermore, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature&#39;s relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. It should be understood that additional operations can be provided before, during, and after the method, and some of the operations described can be replaced or eliminated for other embodiments of the method. 
       FIGS.  1 A- 1 P  are top views of various stages of a process for forming a semiconductor device structure, in accordance with some embodiments.  FIG.  1 A- 1    to  FIG.  1 K- 1    are cross-sectional views illustrating the semiconductor device structure along a sectional line I-I′ in  FIGS.  1 A- 1 K , in accordance with some embodiments. 
       FIG.  1 L- 1    to  FIG.  1 P- 1    are cross-sectional views illustrating the semiconductor device structure along a sectional line II-II′ in  FIGS.  1 L- 1 P , in accordance with some embodiments.  FIG.  1 P- 2    is a cross-sectional view illustrating the semiconductor device structure along a sectional line I-I′ in  FIG.  1 P , in accordance with some embodiments. 
     As shown in  FIGS.  1 A and  1 A- 1   , a substrate  110  is provided, in accordance with some embodiments. In some embodiments, the substrate  110  is a bulk semiconductor substrate, such as a semiconductor wafer. For example, the substrate  110  is a silicon wafer. In some other embodiments, the substrate  110  is a chip. 
     The substrate  110  may include silicon or another elementary semiconductor material such as germanium. In some other embodiments, the substrate  110  includes a compound semiconductor. The compound semiconductor may include silicon germanium, gallium arsenide, silicon carbide, indium arsenide, indium phosphide, another suitable compound semiconductor, or a combination thereof. 
     In some embodiments, the substrate  110  includes a semiconductor-on-insulator (SOI) substrate. The SOI substrate may be fabricated using a wafer bonding process, a silicon film transfer process, a separation by implantation of oxygen (SIMOX) process, another applicable method, or a combination thereof. 
     In some embodiments, various device elements are formed in and/or over the substrate  110 . The device elements are not shown in figures for the purpose of simplicity and clarity. Examples of the various device elements include transistors, diodes, another suitable element, or a combination thereof. 
     For example, the transistors may be metal oxide semiconductor field effect transistors (MOSFET), complementary metal oxide semiconductor (CMOS) transistors, bipolar junction transistors (BJT), high-voltage transistors, high-frequency transistors, p-channel and/or n-channel field effect transistors (PFETs/NFETs), etc. Various processes are performed to form the various device elements. The processes may include deposition, etching, implantation, photolithography, annealing, planarization, one or more other applicable processes, or a combination thereof. 
     In some embodiments, isolation features (not shown) are formed in the substrate  110 . The isolation features are used to define active regions and electrically isolate various device elements formed in and/or over the substrate  110  in the active regions. In some embodiments, the isolation features include shallow trench isolation (STI) features, local oxidation of silicon (LOCOS) features, other suitable isolation features, or a combination thereof. 
     As shown in  FIGS.  1 A and  1 A- 1   , a passivation layer  120  is formed over the substrate  110 , in accordance with some embodiments. The passivation layer  120  is made of an insulating material, in accordance with some embodiments. The passivation layer  120  is made of a polymer material, silicon nitride, or silicon oxide, in accordance with some embodiments. The passivation layer  120  is formed using a coating process, a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, or another suitable process. 
     As shown in  FIGS.  1 A and  1 A- 1   , conductive lines  130  are formed over the passivation layer  120 , in accordance with some embodiments. In some embodiments, the conductive lines  130  are made of copper. In some other embodiments, the conductive lines  130  are made of aluminum, cobalt, nickel, tungsten, or another suitable metal or alloy. The conductive lines  130  are formed using a plating process (or a deposition process) and an etching process, in accordance with some embodiments. 
     Each conductive line  130  has two end portions  132  and  134  and a main portion  136 , in accordance with some embodiments. The main portion  136  is connected to the end portions  132  and  134 , in accordance with some embodiments. In some embodiments, a linewidth W 1  of each end portion  132  or  134  is greater than a linewidth W 2  of the main portion  136 . In some other embodiments, the linewidth W 1  of each end portion  132  or  134  is substantially equal to the linewidth W 2  of the main portion  136 . 
     As shown in  FIGS.  1 B and  1 B- 1   , a protection layer  140  is formed over the conductive lines  130  and the passivation layer  120 , in accordance with some embodiments. The protection layer  140  conformally covers the conductive lines  130  and the passivation layer  120 , in accordance with some embodiments. The protection layer  140  and the conductive lines  130  are made of different conductive materials, in accordance with some embodiments. 
     In some cases, the conductive material of the conductive lines  130  may tend to react with sulfur and oxygen in subsequent processes and form a Cu x O y S z  layer over the conductive lines  130 , wherein x, y, and z are all positive integers. The Cu x O y S z  layer may increase the contact resistance between the conductive lines  130  and conductive via structures subsequently formed on the conductive lines  130 . 
     In some embodiments, the protection layer  140  is made of a conductive material having less reactivity with sulfur and oxygen than the conductive material of the conductive lines  130 . Therefore, the protection layer  140  may prevent the conductive material of the conductive lines  130  from reacting with sulfur and oxygen in subsequent processes and therefore prevent the Cu x O y S z  layer from forming over the conductive lines  130 . As a result, the protection layer  140  may reduce the contact resistance between the conductive lines  130  and conductive via structures subsequently formed on the conductive lines  130 . 
     In some embodiments, the protection layer  140  is made of titanium (Ti). In some other embodiments, the protection layer  140  is made of gold (Au), silver (Ag), vanadium (V), chromium (Cr), tantalum (Ta), molybdenum (Mo), iron (Fe), palladium (Pd), indium (In), or gallium (Ga). The protection layer  140  is formed using a plating process (e.g., an electroplating process) or a deposition process (e.g., a physical vapor deposition process or a chemical vapor deposition process), in accordance with some embodiments. 
     As shown in  FIGS.  1 C and  1 C- 1   , a mask layer  150  is formed over the protection layer  140 , in accordance with some embodiments. The mask layer  150  covers the protection layer  140 , which is directly over the end portions  132  and  134 , in accordance with some embodiments. The mask layer  150  is made of a photoresist material, such as a polymer material, in accordance with some embodiments. 
     As shown in  FIGS.  1 C and  1 D , the protection layer  140 , which is not covered by the mask layer  150 , is removed, in accordance with some embodiments. The remaining protection layer  140  forms protection caps  142  and  144 , in accordance with some embodiments. The removal process includes an etching process such as a dry etching process or a wet etching process, in accordance with some embodiments. Thereafter, as shown in  FIGS.  1 D and  1 D- 1   , the mask layer  150  is removed, in accordance with some embodiments. 
     The thickness T 1  of the protection cap  142  or  144  is less than the thickness T 2  of the conductive line  130  thereunder, in accordance with some embodiments. The thickness T 1  ranges from about 5 nm to about 5 μm, in accordance with some embodiments. The thickness T 2  ranges from about 4 μm to about 30 μm, in accordance with some embodiments. The protection caps  142  are directly over the end portions  132  respectively, in accordance with some embodiments. The protection caps  144  are directly over the end portions  134  respectively, in accordance with some embodiments. 
     The size of the protection cap  142  or  144  is less than the size of the end portions  132  or  134  thereunder, in accordance with some embodiments. For example, the maximum width W 3  of the protection cap  142  or  144  is less than the maximum width W 4  of the end portions  132  or  134  thereunder, in accordance with some embodiments. 
     The protection cap  142  does not cover the edge  132   e  of the end portion  132  thereunder, in accordance with some embodiments. The protection cap  142  is spaced apart from the entire edge  132   e  of the end portion  132  thereunder, in accordance with some embodiments. The protection cap  144  does not cover the edge  134   e  of the end portion  134  thereunder, in accordance with some embodiments. The protection cap  144  is spaced apart from the entire edge  134   e  of the end portion  134  thereunder, in accordance with some embodiments. 
     As shown in  FIGS.  1 E and  1 E- 1   , a photosensitive dielectric layer  160  is formed over the passivation layer  120 , the conductive lines  130 , and the protection caps  142  and  144 , in accordance with some embodiments. The photosensitive dielectric layer  160  is in direct contact with the conductive lines  130  and the protection caps  142  and  144 , in accordance with some embodiments. 
     The photosensitive dielectric layer  160  is in direct contact with top surfaces  138  and sidewalls  139  of the conductive lines  130 , top surfaces  142   a  and sidewalls (or edges)  142   b  of the protection caps  142 , and top surfaces  144   a  and sidewalls (or edges)  144   b  of the protection caps  144 , in accordance with some embodiments. 
     The photosensitive dielectric layer  160  is made of a photosensitive polymer material, in accordance with some embodiments. The photosensitive polymer material includes polybenzoxazole (PBO), in accordance with some embodiments. The photosensitive polymer material includes sulfur, in accordance with some embodiments. The photosensitive polymer material includes 2,3,4-Trihydroxybenzophenone tris(1,2-naphthoquinonediazide-5-sulfonate), which includes sulfur, in accordance with some embodiments. The structure of 2,3,4-Trihydroxybenzophenone tris(1,2-naphthoquinonediazide-5-sulfonate) is shown as follows. 
     
       
         
         
             
             
         
       
     
     As shown in  FIGS.  1 F and  1 F- 1   , portions of the photosensitive dielectric layer  160  directly over the protection caps  142  and  144  are removed, in accordance with some embodiments. The removal process includes a photolithography process, in accordance with some embodiments. 
     The removal process forms openings  162  and  164  in the photosensitive dielectric layer  160 , in accordance with some embodiments. The openings  162  are over the protection caps  142  respectively, in accordance with some embodiments. Each opening  162  partially exposes the protection cap  142  thereunder, in accordance with some embodiments. 
     The openings  164  are over the protection caps  144  respectively, in accordance with some embodiments. Each opening  164  partially exposes the protection cap  144  thereunder, in accordance with some embodiments. The photosensitive dielectric layer  160  covers peripheral portions  142   p  and  144   p  of the top surfaces  142   a  and  144   a , in accordance with some embodiments. The peripheral portions  142   p  and  144   p  of the top surfaces  142   a  and  144   a  have a ring shape, in accordance with some embodiments. 
     In some embodiments, a width W 5  of the peripheral portion  142   p  of the top surface  142   a  ranges from about 1 μm to about 50 μm, in accordance with some embodiments. The width W 5  is equal to a distance between the inner wall  162   a  of the opening  162  and the sidewall  142   b  of the protection cap  142 , in accordance with some embodiments. 
     In some embodiments, a width W 6  of the peripheral portion  144   p  of the top surface  144   a  ranges from about 1 μm to about 50 μm, in accordance with some embodiments. The width W 6  is equal to a distance between the inner wall  164   a  of the opening  164  and the sidewall  144   b  of the protection cap  144 , in accordance with some embodiments. The photosensitive dielectric layer  160  covers the entire sidewalls (or edges)  142   b  and  144   b , in accordance with some embodiments. 
     The photosensitive dielectric layer  160  over the conductive lines  130  has a thickness T 3 , in accordance with some embodiments. The thickness T 3  is greater than the thickness T 1  of the protection cap  142  or  144 , in accordance with some embodiments. The thickness T 3  ranges from about 3 μm to about 50 μm, in accordance with some embodiments. The photosensitive dielectric layer  160  over the passivation layer  120  has a thickness T 4 , in accordance with some embodiments. The thickness T 4  ranges from about 7 μm to about 80 μm, in accordance with some embodiments. 
     The angle θ 1  between the top surfaces  142   a  and an inner wall  162   a  of the opening  162  ranges about 5° to about 90°, in accordance with some embodiments. The angle θ 2  between the top surfaces  144   a  and an inner wall  164   a  of the opening  164  ranges about 5° to about 90°, in accordance with some embodiments. 
     After the removal process, a curing process is performed over the photosensitive dielectric layer  160 , in accordance with some embodiments. The process temperature of the curing process ranges from about 300° C. to about 350° C., in accordance with some embodiments. 
     Since the conductive material of the protection caps  142  and  144  has less reactivity with sulfur (coming from the photosensitive dielectric layer  160 ) and oxygen (coming from the environment and/or the photosensitive dielectric layer  160 ) than the conductive material of the conductive lines  130 , the protection caps  142  and  144  prevent the conductive lines  130  thereunder from reacting with sulfur and oxygen and therefore prevent the Cu x O y S z  layer from forming over the conductive lines  130 , in accordance with some embodiments. Therefore, the formation of the protection caps  142  and  144  improves the electrical properties of the conductive lines  130 , in accordance with some embodiments. 
     In some embodiments, the protection caps  142  and  144  have a round shape (as shown in  FIG.  1 F ). In some other embodiments, the protection caps  142  and  144  have a polygonal shape. For example, as shown in  FIG.  2   , the protection caps  142  and  144  have a rectangle shape or a square shape. As shown in  FIG.  3   , the protection caps  142  and  144  have a hexagonal shape. 
     As shown in  FIGS.  1 G and  1 G- 1   , an etching stop layer  170  is formed over the photosensitive dielectric layer  160  and the protection caps  142  and  144 , in accordance with some embodiments. The etching stop layer  170  is made of a dielectric material, in accordance with some embodiments. The dielectric material includes silicon nitride, in accordance with some embodiments. The etching stop layer  170  is formed using a chemical vapor deposition process or a physical vapor deposition process, in accordance with some embodiments. 
     As shown in  FIGS.  1 G and  1 G- 1   , a magnetic layer  180   a  is formed over the etching stop layer  170 , in accordance with some embodiments. In some embodiments, the magnetic layer  180   a  is made of a ferromagnetic material. In some embodiments, the magnetic layer  180   a  is made of Co x Zr y Ta z  (CZT), where x, y, and z represents the atomic percentage of cobalt (Co), zirconium (Zr), and tantalum (Ta), respectively. In some embodiments, x is in a range from about 0.85 to about 0.95, y is in a range from about 0.025 to about 0.075, and z is in a range from about 0.025 to about 0.075. In some embodiments, x=0.915, y=0.04, and z=0.045 for the CZT material. 
     In some embodiments, the magnetic layer  180   a  is made of Ni x Zn y Cu z , where x, y, and z represents the atomic percentage of nickel (Ni), zinc (Zn), and copper (Cu), respectively. In some embodiments, x is in a range from about 0.4 to about 0.6, y is in a range from about 0.2 to about 0.4, and z is in a range from about 0.1 to about 0.2. [0047] 
     In some embodiments, the magnetic layer  180   a  is made of Co x Zr y Nb z , where x, y, and z represents the atomic percentage of cobalt (Co), zirconium (Zr), and niobium (Nb), respectively. In some embodiments, x is in a range from about 0.7 to about 0.9, y is in a range from about 0.01 to about 0.05, and z is in a range from about 0.01 to about 0.07. 
     In some embodiments, the magnetic layer  180   a  is made of Fe x (TaN) y , where x and y represents the atomic percentage of iron (Fe) and tantalum nitride (TaN), respectively. In some embodiments, x is in a range from about 0.7 to about 0.9, and y is in a range from about 0.05 to about 0.2. 
     In some embodiments, the magnetic layer  180   a  is made of Fe x Co y B z , where x, y, and z represents the atomic percentage of iron (Fe), cobalt (Co), and boron (B), respectively. In some embodiments, x is in a range from about 0.1 to about 0.3, y is in a range from about 0.1 to about 0.3, and z is in a range from about 0.4 to about 0.6. 
     In some embodiments, the magnetic layer  180   a  is made of Ni x Zn y Fe z O w , where x, y, z, and w represents the atomic percentage of nickel (Ni), zinc (Zn), iron (Fe), and oxygen (O), respectively. In some embodiments, x is in a range from about 0.3 to about 0.4, y is in a range from about 0.1 to about 0.2, z is in a range from about 0.2 to about 0.5, and w is in a range from about 0.15 to about 0.25. In some embodiments, the magnetic layer  180   a  includes a multilayer structure, which is made of a combination of the ferromagnetic materials mentioned above such as CoZrTa—FeCoB. 
     In some embodiments, the magnetic layer  180   a  is formed using a physical vapor deposition (PVD) process, a chemical vapor deposition (CVD) process, a combination thereof, or another suitable deposition process. 
     In some embodiments, the magnetic layer  180   a  includes films stacked together. In some embodiments, the magnetic layer  180   a  is formed by repeating a deposition process (e.g., a physical vapor deposition process or a chemical vapor deposition process) multiple times. 
     As shown in  FIGS.  1 G and  1 G- 1   , a mask layer  190  is formed over the magnetic layer  180   a , in accordance with some embodiments. The mask layer  190  covers the magnetic layer  180   a , which is between the protection cap  142  or  144  (or the openings  162  and  164 ), in accordance with some embodiments. The mask layer  190  is made of a photoresist material, such as a polymer material, in accordance with some embodiments. 
     As shown in  FIGS.  1 G- 1  and  1 H- 1   , the magnetic layer  180   a  and the etching stop layer  170 , which are not directly under the mask layer  190 , are removed, in accordance with some embodiments. The removal process includes an etching process such as a wet etching process or a dry etching process, in accordance with some embodiments. After the removal process, the remaining magnetic layer  180   a  forms a magnetic core  180 , in accordance with some embodiments. 
     As shown in  FIGS.  1 H and  1 H- 1   , the magnetic core  180  is formed over the photosensitive dielectric layer  160 , in accordance with some embodiments. The magnetic core  180  is formed between protection cap  142  or  144  (or the openings  162  and  164 ), in accordance with some embodiments. The magnetic core  180  extends across the conductive lines  130 , in accordance with some embodiments. 
     As shown in  FIGS.  1 I and  1 I- 1   , a photosensitive dielectric layer  210  is formed over the photosensitive dielectric layer  160 , the protection caps  142  and  144 , the magnetic core  180 , and the etching stop layer  170 , in accordance with some embodiments. The photosensitive dielectric layer  210  is in direct contact with the photosensitive dielectric layer  160 , the protection caps  142  and  144 , the magnetic core  180 , and the etching stop layer  170 , in accordance with some embodiments. The photosensitive dielectric layer  210  covers the entire magnetic core  180 , in accordance with some embodiments. 
     The photosensitive dielectric layer  210  is made of a photosensitive polymer material, in accordance with some embodiments. The photosensitive polymer material includes sulfur, in accordance with some embodiments. The photosensitive polymer material includes polybenzoxazole (PBO), in accordance with some embodiments. The photosensitive polymer material includes 2,3,4-Trihydroxybenzophenone tris(1,2-naphthoquinonediazide-5-sulfonate), which includes sulfur, in accordance with some embodiments. 
     As shown in  FIGS.  1 J and  1 J- 1   , portions of the photosensitive dielectric layer  210  directly over the protection caps  142  and  144  are removed, in accordance with some embodiments. The removal process includes a photolithography process, in accordance with some embodiments. The removal process forms openings  212  and  214  in the photosensitive dielectric layer  210 , in accordance with some embodiments. The openings  212  are over the protection caps  142  respectively, in accordance with some embodiments. 
     Each opening  212  partially exposes the protection cap  142  thereunder, in accordance with some embodiments. Each opening  212  is connected to the opening  162  thereunder, in accordance with some embodiments. The opening  212  has an inner wall  212   a , in accordance with some embodiments. 
     The inner wall  212   a  is aligned with (or coplanar with) the inner wall  162   a  of the opening  162  thereunder, in accordance with some embodiments. The photosensitive dielectric layer  210  covers ring-shaped peripheral portions  142   p  of the top surfaces  142   a  of the protection caps  142 , in accordance with some embodiments. 
     The openings  214  are over the protection caps  144  respectively, in accordance with some embodiments. Each opening  214  partially exposes the protection cap  144  thereunder, in accordance with some embodiments. Each opening  214  is connected to the opening  164  thereunder, in accordance with some embodiments. The opening  214  has an inner wall  214   a , in accordance with some embodiments. The inner wall  214   a  is aligned with (or coplanar with) the inner wall  164   a  of the opening  164  thereunder, in accordance with some embodiments. 
     The photosensitive dielectric layer  210  covers ring-shaped peripheral portions  144   p  of the top surfaces  144   a  of the protection caps  144 , in accordance with some embodiments. After the removal process, a curing process is performed over the photosensitive dielectric layer  210 , in accordance with some embodiments. The process temperature of the curing process ranges from about 300° C. to about 350° C., in accordance with some embodiments. 
     Since the conductive material of the protection caps  142  and  144  has less reactivity with sulfur (coming from the photosensitive dielectric layer  210 ) and oxygen (coming from the environment and/or the photosensitive dielectric layer  210 ) than the conductive material of the conductive lines  130 , the protection caps  142  and  144  prevent the conductive lines  130  thereunder from reacting with sulfur and oxygen, in accordance with some embodiments. Therefore, the formation of the protection caps  142  and  144  improves the electrical properties of the conductive lines  130 , in accordance with some embodiments. 
     As shown in  FIGS.  1 K and  1 K- 1   , conductive via structures  222  are formed in the openings  162  and  212 , in accordance with some embodiments. The conductive via structures  222  fills the openings  162  and  212 , in accordance with some embodiments. The conductive via structures  222  pass through the photosensitive dielectric layers  160  and  210 , in accordance with some embodiments. 
     The conductive via structures  222  are over the protection caps  142  respectively, in accordance with some embodiments. The conductive via structures  222  are electrically connected to the conductive lines  130  through the protection caps  142 , in accordance with some embodiments. The protection caps  142  physically separate the conductive lines  130  from the conductive via structures  222 , in accordance with some embodiments. 
     As shown in  FIGS.  1 K and  1 K- 1   , conductive via structures  224  are formed in the openings  164  and  214 , in accordance with some embodiments. The conductive via structures  224  fills the openings  164  and  214 , in accordance with some embodiments. The conductive via structures  224  pass through the photosensitive dielectric layers  160  and  210 , in accordance with some embodiments. 
     The conductive via structures  224  are over the protection caps  144  respectively, in accordance with some embodiments. The conductive via structures  224  are electrically connected to the conductive lines  130  through the protection caps  144 , in accordance with some embodiments. The protection caps  144  physically separate the conductive lines  130  from the conductive via structures  224 , in accordance with some embodiments. 
     Since the protection caps  142  and  144  prevent the conductive lines  130  from reacting with sulfur and oxygen, the protection caps  142  and  144  reduce the resistance between the conductive via structures  222  and the conductive lines  130  and the resistance between the conductive via structures  224  and the conductive lines  130 , in accordance with some embodiments. 
     As shown in  FIGS.  1 K and  1 K- 1   , conductive lines  226  are formed over the conductive via structures  222  and  224 , in accordance with some embodiments. The conductive lines  226  are electrically connected to the conductive via structures  222  and  224 , the protection caps  142  and  144 , and the conductive lines  130 , in accordance with some embodiments. 
     The conductive lines  226  are over the magnetic core  180 , in accordance with some embodiments. The conductive lines  226  extend across the magnetic core  180 , in accordance with some embodiments. The conductive lines  130  and  226 , the conductive via structures  222  and  224 , and the protection caps  142  and  144  together form a coil structure C, in accordance with some embodiments. 
     The coil structure C surrounds the magnetic core  180 , in accordance with some embodiments. The coil structure C and the magnetic core  180  together form an inductor D, in accordance with some embodiments. Since the protection caps  142  and  144  reduce the resistance between the conductive via structures  222  and  224  and the conductive lines  130 , the resistance of the coil structure C is reduced as well, in accordance with some embodiments. Therefore, the protection caps  142  and  144  improve the efficiency of the inductor D, in accordance with some embodiments. The photosensitive dielectric layers  160  and  210  separate the magnetic core  180  from the conductive lines  130  and  226 , the protection caps  142  and  144 , and the conductive via structures  222  and  224 , in accordance with some embodiments. 
     The conductive material of the protection caps  142  and  144  is different from the conductive material of the conductive via structures  222  and  224 , in accordance with some embodiments. The conductive via structures  222  and  224  and the conductive lines  130  and  226  are made of the same conductive material, in accordance with some embodiments. 
     The conductive via structures  222  and  224  and the conductive lines  226  are made of copper, in accordance with some embodiments. In some other embodiments, the conductive via structures  222  and  224  and the conductive lines  226  are made of aluminum, cobalt, nickel, tungsten, or another suitable metal or alloy. 
     The formation of the conductive via structures  222  and  224  and the conductive lines  226  includes: forming a seed layer in the openings  162 ,  164 ,  212 , and  214  and over the photosensitive dielectric layer  210 ; forming a photoresist layer over the seed layer, where the photoresist layer has trenches exposing portions of the seed layer; electroplating a conductive layer in the trenches; removing the photoresist layer; and removing the seed layer originally under the photoresist layer, in accordance with some embodiments. 
     As shown in  FIGS.  1 L and  1 L- 1   , a protection cap  230  is formed over the conductive line  226 , in accordance with some embodiments. The protection cap  230  and the conductive lines  226  are made of different conductive materials, in accordance with some embodiments. In some embodiments, the protection cap  230  is made of a conductive material having less reactivity with sulfur and oxygen than the conductive material of the conductive lines  226 . 
     In some embodiments, the protection cap  230  is made of titanium (Ti). In some other embodiments, the protection cap  230  is made of gold (Au), silver (Ag), vanadium (V), chromium (Cr), tantalum (Ta), molybdenum (Mo), iron (Fe), palladium (Pd), indium (In), or gallium (Ga). The protection cap  230  is formed using a plating process (e.g., an electroplating process) or a deposition process (e.g., a physical vapor deposition process or a chemical vapor deposition process), in accordance with some embodiments. 
     As shown in  FIGS.  1 M and  1 M- 1   , a photosensitive dielectric layer  240  is formed over the photosensitive dielectric layer  210 , the conductive lines  226 , and the protection cap  230 , in accordance with some embodiments. The photosensitive dielectric layer  240  is in direct contact with the photosensitive dielectric layer  210 , the conductive lines  226 , and the protection cap  230 , in accordance with some embodiments. 
     The photosensitive dielectric layer  240  is in direct contact with top surfaces  226   a  and sidewalls  226   b  of the conductive lines  226 , a top surfaces  232  and sidewalls (or edges)  234  of the protection cap  230 , and a top surface  216  of the photosensitive dielectric layer  210 , in accordance with some embodiments. 
     The photosensitive dielectric layer  240  is made of a photosensitive polymer material, in accordance with some embodiments. The photosensitive polymer material includes sulfur, in accordance with some embodiments. The photosensitive polymer material includes 2,3,4-Trihydroxybenzophenone tris(1,2-naphthoquinonediazide-5-sulfonate), which includes sulfur, in accordance with some embodiments. The photosensitive polymer material includes polybenzoxazole (PBO), in accordance with some embodiments. 
     As shown in  FIGS.  1 N and  1 N- 1   , a portion of the photosensitive dielectric layer  240  directly over the protection cap  230  is removed, in accordance with some embodiments. The removal process includes a photolithography process, in accordance with some embodiments. The removal process forms an opening  242  in the photosensitive dielectric layer  240 , in accordance with some embodiments. The opening  242  is over the protection cap  230 , in accordance with some embodiments. The opening  242  partially exposes the protection cap  230  thereunder, in accordance with some embodiments. 
     The photosensitive dielectric layer  240  covers a ring-shaped peripheral portion  232   p  of a top surface  232  of the protection cap  230 , in accordance with some embodiments. The photosensitive dielectric layer  240  covers entire sidewalls (or edges)  234  of the protection cap  230 , in accordance with some embodiments. After the removal process, a curing process is performed over the photosensitive dielectric layer  240 , in accordance with some embodiments. The process temperature of the curing process ranges from about 300° C. to about 350° C., in accordance with some embodiments. 
     Since the conductive material of the protection cap  230  has less reactivity with sulfur (coming from the photosensitive dielectric layer  240 ) and oxygen (coming from the environment and/or the photosensitive dielectric layer  240 ) than the conductive material of the conductive lines  226 , the protection cap  230  prevents the conductive lines  226  thereunder from reacting with sulfur and oxygen, in accordance with some embodiments. Therefore, the formation of the protection cap  230  improves the electrical properties of the conductive lines  226 , in accordance with some embodiments. 
     As shown in  FIGS.  1 O and  1 O- 1   , an under-bump metallization (UBM) structure  250  is formed over the protection cap  230 , in accordance with some embodiments. The under-bump metallization structure  250  conformally covers the top surface  232  of the protection cap  230 , inner walls  242   a  of the opening  242 , and a top surface  244  of the photosensitive dielectric layer  240 , in accordance with some embodiments. 
     The under-bump metallization structure  250  includes a first metallization layer (not shown), a second metallization layer (not shown), and a third metallization layer (not shown) sequentially stacked over the protection cap  230 , in accordance with some embodiments. The first metallization layer includes copper or copper alloy, in accordance with some embodiments. The first metallization layer is formed using an electroplating process, in accordance with some embodiments. 
     The second metallization layer includes tin or tin alloy, in accordance with some embodiments. The second metallization layer is formed using an electroplating process or an immersion process, in accordance with some embodiments. The third metallization layer includes nickel or nickel alloy, for example nickel-palladium-gold (NiPdAu), nickel-gold (NiAu), nickel-palladium (NiPd) or another similar alloy, in accordance with some embodiments. The third metallization layer is formed using an electroless process or an immersion process, in accordance with some embodiments. 
     As shown in  FIGS.  1 P,  1 P- 1 , and  1 P- 2   , a conductive bump  260  is formed over the under-bump metallization structure  250 , in accordance with some embodiments. The conductive bump  260  is made of Sn, SnAg, SnPb, SnAgCu, SnAgZn, SnZn, SnBiln, Snln, SnAu, SnPb, SnCu, SnZnln, SnAgSb, or another suitable conductive material. In some embodiments, the conductive bump  260  is made of a lead-free solder material. In this step, a semiconductor device structure  100  is substantially formed, in accordance with some embodiments. 
       FIG.  4    is a cross-sectional view of a semiconductor device structure  400 , in accordance with some embodiments. As shown in  FIG.  4   , the semiconductor device structure  400  is similar to the semiconductor device structure  100  of  FIG.  1 P- 1   , except that the semiconductor device structure  400  does not have the etching stop layer  170 , the magnetic core  180 , and the photosensitive dielectric layer  210  of the semiconductor device structure  100  of  FIG.  1 P- 1   , in accordance with some embodiments. The photosensitive dielectric layer  240  and the conductive line  226  are in direct contact with the photosensitive dielectric layer  160 , in accordance with some embodiments. 
     In accordance with some embodiments, semiconductor device structures and methods for forming the same are provided. The methods (for forming the semiconductor device structures) form a protection cap over a conductive line to prevent the conductive line under the protection cap from reacting with sulfur (coming from a subsequent formed photosensitive dielectric layer) and oxygen (coming from the environment and/or the subsequent formed photosensitive dielectric layer). Therefore, the formation of the protection cap improves the electrical properties of the conductive line. 
     In accordance with some embodiments, a semiconductor device structure is provided. The semiconductor device structure includes a first conductive line over a substrate. The first conductive line has a main portion and an end portion, the end portion is connected to the main portion, and a first line width of the end portion is greater than a second line width of the main portion. The semiconductor device structure includes a first protection cap over the end portion. The first protection cap and the first conductive line are made of different conductive materials, and the first protection cap exposes a peripheral region of a top surface of the end portion. The semiconductor device structure includes a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The semiconductor device structure includes a conductive via structure passing through the first photosensitive dielectric layer and connected to the first protection cap. 
     In accordance with some embodiments, a semiconductor device structure is provided. The semiconductor device structure includes a conductive line over a substrate. The conductive line has a main portion and an end portion, the end portion is connected to the main portion, and a line width of the end portion decreases toward the main portion. The semiconductor device structure includes a protection cap over the end portion. The protection cap and the conductive line are made of different conductive materials. The semiconductor device structure includes a first photosensitive dielectric layer over the substrate, the conductive line, and the protection cap. The semiconductor device structure includes a conductive via structure passing through the first photosensitive dielectric layer and connected to the protection cap. The protection cap has a top end and a bottom end, the top end is in contact with the conductive via structure, the bottom end is in contact with the end portion of the conductive line, and a first average width of the top end is substantially equal to a second average width of the bottom end. 
     In accordance with some embodiments, a semiconductor device structure is provided. The semiconductor device structure includes a first conductive line over a substrate. The first conductive line has a main portion and a rounded end portion, and the rounded end portion is connected to the main portion. The semiconductor device structure includes a first protection cap over the rounded end portion. The first protection cap and the first conductive line are made of different conductive materials. The semiconductor device structure includes a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The semiconductor device structure includes a conductive via structure passing through the first photosensitive dielectric layer and connected to the first protection cap. The first photosensitive dielectric layer is in contact with a first sidewall of the first protection cap, a second sidewall of the rounded end portion, and a third sidewall of the conductive via structure, and the first sidewall is between the second sidewall and the third sidewall. 
     The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.