Patent Publication Number: US-2020301457-A1

Title: Temperature limited current driver

Description:
RELATED APPLICATION 
     This application is a continuation of U.S. application for Pat. No. 16/361,545, filed Mar. 22, 2019, the contents of which are incorporated by reference in their entirety. 
    
    
     TECHNICAL FIELD 
     This disclosure is related to the field of driver circuits used in integrated circuits and, in particular, to a driver circuit for use in an integrated circuit and that has self-protection features incorporated therein to protect against exceeding safe operating temperatures. 
     BACKGROUND 
     Driver circuits may be used in integrated circuits. For example, International Electrotechnical Commission (IEC) standard 61131-2 defines communications between sensors and activators and programmable logic controllers (PLC) in industrial applications. This standard allows both ends of the communications link between sensors and activators and PLCs to manage bus contention or driving high loads by defining a current limit in short circuit conditions. In such short circuit or overcurrent conditions, the driver circuits within the integrated circuits of either the sensors and activators or the PLCs would otherwise dissipate excessive current, exceeding safe operating temperatures and damaging the integrated circuits. Therefore, such driver circuits incorporate self-protection features to help ensure that safe operating temperatures are not exceeded, during short circuit conditions or otherwise. 
     Typically, such known self-protection features impose a fixed safe duty cycle on the output stage of the driver circuit during short circuit or overcurrent situations, with this fixed safe duty cycle being known to keep operating temperatures in a safe region. There may also be a fixed reduction of the value of the current limit in such conditions. While these self-protection features may be adequate to protect the integrated circuits from damage, they are inherently overly conservative to ensure they work in all conditions, meaning that average load current is lower than it could be. It would be desirable to be able to deliver a higher average load current than provided by driver circuits incorporating known self-protection features. Therefore, further development in this area is required. 
     SUMMARY 
     In an embodiment, a driver circuit includes: a temperature sensor configured to generate a first voltage representative of current operating temperature of the driver circuit; an amplifier configured to compare the first voltage to a second voltage representative of an upper threshold operating temperature, and to generate a control signal based upon the comparison; and a variable current source configured to generate a load current as a function of the control signal; wherein the amplifier generates the control signal so as to cause the variable current source to generate the load current as having a magnitude equal to an upper threshold, when the first voltage is less than the second voltage. 
     The amplifier may generate the control signal so as to cause the variable current source to generate the load current as having a magnitude that is a function of the first and second voltages. 
     The amplifier may generate the control signal so as to cause the variable current source to generate the load current as having a variable magnitude that is a function of the first and second voltages. The amplifier may generate the control signal so as to cause the variable current source to generate the load current as having a magnitude that is decreasing until the first and second voltages are equal. In addition, amplifier may generate the control signal so as to cause the variable current source to generate the control signal so as cause the variable current source to maintain the magnitude of the load current at a level at which the first and second voltages are equal. 
     In a further embodiment, a method of generating a load current for driving a load includes: generating a first voltage representative of a current operating temperature; comparing the first voltage to a second voltage representative of an upper threshold operating temperature; and generating the load current having a magnitude depending upon a relationship between the first voltage and the second voltage. 
     The load current may be generated as having a magnitude equal to an upper threshold when the first voltage is less than the second voltage. 
     The load current may be generated as having a magnitude with a decreasing slope when the first voltage is greater than the second voltage. 
     When the first and second voltages are equal, the load current may be generated as having a magnitude that remains at a level at which the first and second voltages are equal. Generating the load current as having a magnitude that remains at a level at which the first and second voltages are equal may include continuously varying a magnitude of the load current such that the first and second voltages remain equal. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a schematic block diagram of a driver circuit incorporating self-protection features to maintain operating temperature at a safe level, in accordance with this disclosure. 
         FIG. 2  is a graph showing the load current provided by the driver circuit of  FIG. 1  over temperature as represented by the voltage Tj output by the temperature sensor. 
         FIG. 3  is a schematic diagram of another driver circuit incorporating self-protection features to maintain operating temperature at a safe level, in accordance with this disclosure. 
         FIG. 4  is a graph showing the load current provided by the driver circuit of  FIG. 3  as well as voltage across the load, over time and temperature, in a first operating condition. 
         FIG. 5  is a graph showing the load current provided by the driver circuit of  FIG. 3  as well as voltage across the load, over time and temperature, in a second operating condition. 
         FIG. 6  is a graph showing the load current provided by the driver circuit of  FIG. 3  as well as voltage across the load, over time and temperature, in a third operating condition. 
         FIG. 7  is a graph showing the load current provided by the driver circuit of  FIG. 3  as well as voltage across the load, over time and temperature, in a fourth operating condition. 
     
    
    
     DETAILED DESCRIPTION 
     The following disclosure enables a person skilled in the art to make and use the subject matter disclosed herein. The general principles described herein may be applied to embodiments and applications other than those detailed above without departing from the spirit and scope of this disclosure. This disclosure is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed or suggested herein. 
     This disclosure, in general, is directed to a driver circuit for use in an integrated circuit (IC) that incorporates self-protection features to help ensure that safe operating temperatures are maintained. In particular, rather than use duty cycling as with conventional designs, this driver circuit uses current regulation to maintain operating temperature in short circuit or overcurrent conditions while still maintaining continuous load current delivery. 
     With reference to  FIG. 1 , a first embodiment of the driver plus temperature regulation circuit  50  is now described. The driver circuit  50  is incorporated within an integrated circuit, and includes an amplifier  51 , a temperature sensor  52 , and a continuously controllable current source  53 . The amplifier  51  has a non-inverting terminal connected to a voltage Tmax that correlates to a maximum safe operating temperature for the driver circuit  50  and/or the integrated circuit into which the driver circuit  50  is incorporated, and an inverting terminal connected to a voltage Tj output by the temperature sensor  52 . The voltage Tj output by the temperature sensor  52  is representative of the current operating temperature of the driver circuit  50  and/or the integrated circuit into which the driver circuit  50  is incorporated. The output of the amplifier  51  produces a control signal  55  that is fed to a control input of the current source  53 . The current source  53  provides a load current Iload to a load  54 . The output voltage Vout is the voltage across the load  54 . The driver circuit  50  may be used in any suitable environment, such as a so-called IO-Link interface or SIO interface within an integrated circuit, as well as any suitable output stage for any input/output interface. 
     Referring additionally to  FIG. 2 , operation of the driver circuit  50  is now described. In operation, while Tj is below Tmax, the control signal  55  is generated by the amplifier  51  so as to instruct the current source  53  to output the load current Iload as being equal to a maximum safe current Imax. When Tj reaches Tmax, the control signal  55  is generated by the amplifier  51  so as to instruct the current source  53  to output the load current Iload at a regulated value at which Tj will be equal to Tmax. This is seen in  FIG. 2 , where the magnitude of Iload is equal to Imax where Tj is between an initial value Ti and Tmax, and then falls to the regulated value Ireg once Tj is equal to or greater than Tmax. The regulated value Ireg can be as low as zero, yet Tj can continue to rise due to external heating, for example. Note that this is not a set drop in load current Iload, but is a continuous regulation of the load current Iload, meaning that Iload is continuously variable and continuously adjusted by the current source  53  at instruction of the amplifier  51  as a result of the feedback from the temperature sensor  52 . Note also that the load current Iload is continuous, and is not discontinuous, as would occur with duty cycling. Thus, duty cycling is not performed by the driver circuit  50 , and instead the load current Iload is continuously delivered while being continuously adjusted as a function of feedback from the temperature sensor  52  in a fashion so as to cause Tj to settle at, or be substantially equal to, Tmax. Therefore, as conditions change (e.g., ambient temperature changes), then Iload will be adjusted (e.g., increased or decreased) so as to maintain Tj at Tmax. 
     A more detailed embodiment of the driver circuit  100  is now described with reference to  FIG. 3 . The driver circuit  100  includes a bandgap voltage generator  103  that generates a bandgap voltage Vbg that is temperature independent, and a temperature sensing circuit  110  that receives the bandgap voltage Vbg as input and generates the voltage Tj representative of the current operating temperature of the driver circuit  100  and/or the integrated circuit into which the driver circuit  100  is incorporated as output. 
     In greater detail, the temperature sensing circuit  110  is comprised of an NPN transistor Q 0  having its collector connected to Vdd and its base connected to the bandgap voltage Vbg. A resistor R 1  is connected between the emitter of the NPN transistor Q 0  and ground, and the voltage Tj is generated across the resistor R 1 . Note the thermal coupling between NPN transistor Q 0  and PMOS current mirror  124 , which may be present due to proximity between the NPN transistor Q 0  and the PMOS current mirror  124  in the layout of the temperature sensing circuit  100  as fabricated. 
     A resistive divider formed from resistor R 2  and R 3  is connected between the bandgap voltage Vbg and ground, and the voltage Tmax that correlates to a maximum safe operating temperature for the driver circuit  100  and/or the integrated circuit into which the driver circuit  100  is incorporated is generated at the central tap of the resistive divider. 
     An amplifier  101 , which is an operational transconductance amplifier and therefore operates as a voltage controlled current source, has its non-inverting terminal connected to the center tap of the voltage divider formed from resistors R 2  and R 3  to receive Tmax and its inverting terminal connected to the emitter of NPN transistor Q 0  to receive Tj. The amplifier  101  generates the control signal  105  at its output. 
     An output stage  120  receives the control signal  105  and continuously variably generates the load current Iload as a function of the control signal  105 . The voltage Vout is generated across the load  103  as a function of the load current Iload. The load current Iload is continuously generated, not discontinuously generated, and not generated using duty cycling. 
     In greater detail, the output stage  120  includes a current amplifier  102  which receives the control signal  105  as input, amplifies the magnitude of its current, and outputs it as amplified control signal  107  to an NMOS current mirror  122 . The NMOS current mirror  122  may have a unity mirroring ratio (or other suitable mirroring ratio) and mirrors the amplified control signal  107  to its output for receipt by a PMOS current mirror  124 . The PMOS current mirror  124  has its input connected to the output of the NMOS current mirror  122 , may have a non-unity mirroring ratio (such as, for example, 1:1000), and generates the load current Iload at its output, ultimately as a function of the control signal  105 . 
     In greater detail, the NMOS current mirror is comprised of NMOS transistor MN 1  receiving the amplified control signal  107  at its drain, having its gate connected to its drain, and having its source connected to ground. The NMOS current mirror  122  also includes NMOS transistor MN 2  having its gate connected to the gate of NMOS transistor MN 1 , its source connected to ground, and its drain connected to the PMOS current mirror  124 . 
     In addition, also in greater detail, the PMOS current mirror  124  is comprised of PMOS transistor MP 1  having its drain connected to the drain of NMOS transistor MN 2 , its source connected to Vcc, and its gate connected to its drain. The PMOS current mirror  124  also includes PMOS transistor MP2 having its source connected to Vcc, its gate connected to the gate of PMOS transistor MP 1 , and its drain connected to the load  103  to provide the load current Iload. 
     In general, in operation, the amplifier  101  compares Tmax to Tj and generates the control signal  105  based upon the comparison. Where Tj is below Tmax (indicating a safe operating temperature), the amplifier  101  generates the control signal  105  so as to result in the load current Iload being equal to the maximum load current Imax. As Tj approaches Tmax, such as may occur in the presence of a short across the load  103 , the amplifier  101  generates the control signal  105  so as to result in the load current Iload decreasing in magnitude, thereby lowering the operating temperature (and thus Tj). Once Tj falls to (or ceases rising) be equal to Tmax, regulation is performed, with the control signal  105  being varied by the amplifier  101  so as to maintain Iload at a level at which Tj is no greater than Tmax. Note that at this point (where Tj is equal to Tmax), Iload is less than Imax, as Iload being equal to Imax would result in excess power dissipation and therefore an operating temperature greater than a maximum safe operating temperature. If Tj falls to be less than Tmax, then the amplifier  101  will generate the control signal  105  so as to increase the load current Iload until it becomes once again equal to Imax (operating temperature permitting), and will maintain the load current Iload at Imax provided Tj remains less than Tmax. 
     A first example of this operation can be seen in  FIG. 4 . In this scenario, the drain of PMOS transistor MP2 is effectively shorted to ground (and thus a short across the load  103  is present), and therefore Vout remains within a threshold of zero. Also in this example, Vcc is set at 35 V and remains steady. At time  0  (the beginning), the voltage Tj indicates an operating temperature of 27.38° C., which is well below Tmax as set for this scenario (which represents an operating temperature of 133° C.). As a result, the load current Iload is generated as being equal to Imax for this scenario (the magnitude of which is 145.5 mA). However, as time begins to pass, the operating temperature begins to rise (and Tj therefore rises), and the magnitude of load current Iload as a result falls. As Tj approaches Tmax, indicating that the operating temperature approaches 133° C., the magnitude of the load current Iload approches the regulated value Ireg (the magnitude of which is set to 16.6 mA for this scenario). Regulation maintains Iload at Ireg, which in turn maintains Tj at Tmax (and thus maintains the operating temperature at of 133° C.). 
     A second example of this operation can be seen in  FIG. 5 . In this scenario, the drain of PMOS transistor MP2 is effectively shorted to ground, and therefore Vout remains within a threshold of zero. However, in this example, Vcc is set at 35 V, but at time 0.5s, begins to fall until it reaches 20 V. At time 0 (the beginning), the voltage Tj indicates an operating temperature of 27.38° C., which is well below Tmax as set for this scenario (which represents an operating temperature of 133° C.). As a result, the load current Iload is generated as being equal to Imax for this scenario (the magnitude of which is 145.5 mA). However, as time begins to pass, the operating temperature begins to rise (and Tj therefore rises), and the magnitude of load current Iload as a result falls. As Tj approaches Tmax, indicating that the operating temperature approaches 133° C., the magnitude of the load current Iload approaches the regulated value Ireg (the magnitude of which is set to 16.6 mA for this scenario). Regulation maintains Iload at Ireg, which in turn maintains Tj at Tmax (and thus maintains the operating temperature at of 133° C.). Notice here that time 0.5s, as stated, Vcc begins to fall. As Vcc falls, the magnitude of the load current Iload increases accordingly, as an increased load current Iload is required to maintain Tj at Tmax. 
     A third example of this operation can be seen in  FIG. 6 . In this scenario, the load  103  is modeled as a 1mF capacitor. Also in this example, Vcc is set at 35 V and remains steady. At time 0 (the beginning), the voltage Tj indicates an operating temperature of 27.38° C., which is well below Tmax as set for this scenario (which represents an operating temperature of 133° C.). As a result, the load current Iload is generated as being equal to Imax for this scenario (the magnitude of which is 145.5 mA). However, as time begins to pass, the operating temperature begins to rise (and Tj therefore rises), and the magnitude of load current as a result falls. As Tj approaches Tmax, indicating that the operating temperature approaches 133° C., the magnitude of the load current Iload approaches the regulated value Ireg (the magnitude of which is set to around 30 mA for this scenario). Regulation initially maintains Iload at Ireg, which in turn maintains Tj at Tmax (and thus maintains the operating temperature at of 133° C.). 
     Here, understand that as the capacitor of the load  103  charges to 35 V, Vout begins to rise until at time 0.67s, the capacitor is fully charged and Vout nears Vcc. Notice that as Vout rises, Tj (and thus the operating temperature) begins to fall, and the magnitude of the load current Tout begins to increase accordingly, until at time 0.67s, the magnitude of the load current Tout has increased to 121.32 mA. After this time, the load  103  (here, a capacitor) has charged such that Vout is near Vcc, and therefore the load current Iload quickly falls approximately to zero, despite the fact that Tj continues to fall. 
     As previously pointed out, if Tj falls to be less than Tmax, then the amplifier  101  will generate the control signal  105  so as to increase the load current Iload until it becomes once again equal to Imax (operating temperature permitting), and will maintain the load current 
     Iload at Imax provided Tj remains less than Tmax. An example of this operation can be seen in  FIG. 7 . In this scenario, the drain of PMOS transistor MP2 is effectively shorted to ground, and therefore Vout remains within a threshold of zero. However, in this example, Vcc is set at 35 V, but approximately at a time of 5s after start, Vcc begins to fall asymptomatically to zero. 
     At time 0 (the beginning), the voltage Tj indicates an operating temperature of −79.6° C., which is well below Tmax as set for this scenario (which represents an operating temperature of approximately 130° C.). As a result, the load current Iload is generated as being equal to Imax for this scenario (the magnitude of which is 147.2 mA). However, the operating temperature (and thus Tj) quickly increases to a Tmax of approximately 130° C. As Tj approaches Tmax, the magnitude of the load current Iload approaches the regulated value Ireg (the magnitude of which is set to approximately 30 mA for this scenario), and is then maintained at this level so as to maintain Tj at Tmax. Note that here, the operating temperature begins to fall at a time of 12s after start (and Tj therefore falls), and the magnitude of load current Iload is thus increased to −126.9 mA. At a time of approximately 13.5s after start, the magnitude of the load current Iload quickly drops because the transistor MP2 enters into the linear operation region due to VCC falling sufficiently, and therefore the transistor MP2 acts as a resistor at this point. 
     The advantages provided by the driver circuits described above are evident. Driver performance is maximized due to the regulation, meaning operation is kept safe yet is not overly conservative, meaning that the maximum possible current (up to Imax) for the given operating temperature is provided at all times. In addition, the driver circuits require no duty cycle control circuits or control software, employ no duty cycle control circuits, and provide a continuous load current during operation. Still further, the regulation and the use of the thermal feedback adapts to PVT variation, external voltage and temperature variation, and IC junction to ambient thermic resistance variation. 
     While the disclosure has been described with respect to a limited number of embodiments, those skilled in the art, having benefit of this disclosure, will appreciate that other embodiments can be envisioned that do not depart from the scope of the disclosure as disclosed herein. Accordingly, the scope of the disclosure shall be limited only by the attached claims.