Patent Publication Number: US-2009240859-A1

Title: Automatic address setting system

Description:
BACKGROUND 
     1. Field of the Invention 
     The present invention relates to an automatic address setting system. 
     2. Description of Related Art 
     In communication between a master device and slave devices, the master device transmits data to a slave device by using a number of the slave device. A slave device receives data corresponding to its own number and transmits response data to the master device. 
     In earlier control systems, the process of setting addresses is achieved through the use of two rotary address switches. The two rotary address switches use a decimal format to set the addresses of the slave devices of the control system. When the control system includes up to several thousand slave devices, setting the addresses of the slave devices is time consuming, and the possibility of mistakes is increased. 
     What is desired, therefore, is to provide an automatic address setting system for automatically setting respective identification numbers for a plurality of slave devices constituting a network. 
     SUMMARY 
     An exemplary automatic address setting system includes a master device, a first slave device, and a second slave device. Each of the slave devices includes a peripheral interface controller (PIC), a counter, and a pulse generator. The counter is connected to the corresponding PIC. The pulse generator is connected to the corresponding counter. When the first slave device is connected to the master device, the pulse generator of the first slave device generates a first pulse signal to the master device and the counter of the first slave device. The counter of the first slave device receives the first pulse signal and sends an address signal to the PIC of the first slave device as an identification address of the first slave device. When the second slave device is subsequently connected to the master device, the pulse generator of the second slave device generates a second pulse signal to the master device, and the counters of the first and second slave devices. The counter of the second slave device receives the second pulse signal and sends an address signal to the PIC of the second slave device as an identification address of the second slave device. At the same time, the counter of the first slave device changes the identification address of the PIC of the first slave device. 
     Other advantages and novel features of the present invention will become more apparent from the following detailed description of exemplary embodiment when taken in conjunction with the accompanying drawing, in which: 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The drawing is a schematic diagram of an automatic address setting system in accordance with an exemplary embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     Referring to the drawing, an automatic address setting system in accordance with an exemplary embodiment of the present invention includes a master device  10 , such as a central processor unit, and a plurality of slave devices  100 ,  200 ,  300 , etc. Each slave device includes a peripheral interface controller (PIC) and an identification address startup apparatus. The identification address startup apparatus includes a pulse generator, a counter, and a plurality of light-emitting diodes (LEDs). The master device  10  is connected to the PIC of each slave device through a bus  20 , and connected to the pulse generator of each slave device through a signal line  30 . The pulse generator of each slave device is connected to the corresponding counter. The counter is connected to the corresponding PIC and the corresponding LED. 
     In this embodiment, the slave device  100  includes a PIC  110  and an identification address startup apparatus  120 . The identification address startup apparatus  120  includes a pulse generator  121 , a counter  122 , and a set of LEDs  123 . The slave device  200  includes a PIC  210  and an identification address startup apparatus  220 . The identification address startup apparatus  220  includes a pulse generator  221 , a counter  222 , and a set of LEDs  223 . The slave device  300  includes a PIC  310  and an identification address startup apparatus  320 . The identification address startup apparatus  320  includes a pulse generator  321 , a counter  322 , and a set of LEDs  323 . The elements and structures of the other slave devices are the same as the slave devices  100 ,  200 , and  300 . 
     When the slave device  100  is connected to the master device  10 , the pulse generator  121  of the slave device  100  sends a pulse signal to the master device  10  and the counter  122  of the slave device  100 . The master device  10  receives the pulse signal and confirms a slave device is connected. The counter  122  receives the pulse signal, and then sends an address signal to the PIC  110  of the slave device  100 . The address signal acts as an identification address of the PIC  110 . The set of LEDs  123  respectively receives the bits of the address signal. The number of LEDs in the set of LEDs is equal to the bits of the address signal. 
     When the slave device  200  is connected to the master device  10 , the pulse generator  221  of the slave device  200  sends a pulse signal to the master device  10 , the counter  222  of the slave device  200 , and the counter  122  of the slave device  100 . The master device  10  receives the pulse signal and confirms a slave device is connected. The counter  222  receives the pulse signal, and then sends an address signal to the PIC  210 . The address signal acts as an identification address of the PIC  210 . The LED  223  displays the address signal. At the same time, the pulse signal from the pulse generator  221  of the slave device  200  is sent to the counter  122  of the slave device  100 . The address signal from the counter  122  of the slave device  100  is increased by one, and acts as the identification address of the PIC  110 . Therefore, the identification addresses of the slave devices  100  and  200  are different. 
     When the slave device  300  is connected to the master device  10 , the pulse generator  321  of the slave device  300  sends a pulse signal to the master device  10 , the counter  322  of the slave device  300 , the counter  222  of the slave device  200 , and the counter  122  of the slave device  100 . The master device  10  receives the pulse signal and confirms a slave device is connected. The counter  322  of the slave device  300  receives the pulse signal, and then sends an address signal to the PIC  310 . The address signal acts as an identification address of the PIC  310 . The LED  323  displays the address signal. At the same time, the pulse signal from the pulse generator  321  of the slave device  300  is sent to the counter  122  of the slave device  100  and the counter  222  of the slave device  200 . The address signal from the counter  122  of the slave device  100  is, once again, increased by one and acts as the identification address of the PIC  110 . The address signal from the counter  222  of the slave device  200  is increased by one and acts as the identification address of the PIC  210 . Therefore, the identification addresses of the slave devices  100 ,  200 , and  300  are different. The master device  10  according to a value of the pulse signal selects an identification address of a corresponding slave device, and communicates with the slave device. Other slave devices are managed and behave in the same manner. 
     When a slave device is connected to the master device  10 , power from the master device  10  is provided to the slave device, and the pulse generator of the slave device generates a pulse signal. When the slave device  100  is initially connected to the master device  10 , the counter  122  of the slave device  100  sends an address ID=000 as an identification address of the slave device  100 . The master device  10  receives the count of the pulse signal K=1. When the slave device  200  is subsequently connected to the master device  10 , the counter  222  of the slave device  200  sends an address ID=000 as an identification address of the slave device  200 . The master device  10  receives the count of the pulse signal K=2. At the same time, the identification address of the slave device  100  is changed to ID=001 as the identification address of the slave device  100 . When the slave device  300  is connected to the master device  10 , the counter  322  of the slave device  300  sends an address ID=000 as an identification address of the slave device  300 . The master device  10  receives the count of the pulse signal K=3. At the same time, the identification address of the slave device  200  is changed to ID=001 as the identification address of the slave device  200 . The identification address of the slave device  100  is changed to ID=010 as the identification address of the slave device  100 . 
     In this embodiment, the slave devices are connected to the master device  10  in sequence. The pulse generator of each slave device sends a pulse signal to the corresponding counter. The counter receives the pulse signal, and then generates an address signal to the corresponding PIC. The address signal acts as an identification address of the PIC. When the second slave device is connected to the master device  10 , it is managed and behaves the same as the first slave device. At the same time, the identification address of the first slave device is increased by one and acts as the identification address of the first slave device. The master device  10 , according to a value of the pulse signal, selects an identification address of a corresponding slave device, and communicates with the slave device. The automatic address setting system is simple and cost-effective. The system can be used with vast numbers of slave devices as indicated by  400 . 
     It is to be understood, however, that even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and function of the invention, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.