Patent Publication Number: US-8989684-B1

Title: Voltage regulator for providing a regulated voltage to subcircuits of an RF frequency circuit

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     The present disclosure is a continuation of U.S. patent application Ser. No. 13/709,627 (non U.S. Pat. No. 8,639,201), filed on Dec. 10, 2012, which is a continuation of U.S. patent application Ser. No. 12/893,604 (now U.S. Pat. No. 8,331,884), filed on Sep. 29, 2010, which is a continuation of U.S. patent application Ser. No. 11/715,027 (now U.S. Pat. No. 7,809,339), filed on Mar. 7, 2007, which is a continuation of U.S. patent application Ser. No. 10/747,522 (now U.S. Pat. No. 7,190,936), filed Dec. 29, 2003, which claims the benefit of U.S. Provisional Application No. 60/470,620, filed on May 15, 2003. The entire disclosures of the applications referenced above are incorporated herein by reference. 
    
    
     FIELD 
     The present invention relates to voltage regulators, and more particularly to voltage regulators for high performance radio frequency (RF) systems. 
     BACKGROUND 
     Circuits in high performance radio frequency (RF) systems such as but not limited to wireless communications devices often require a regulated supply voltage. Voltage regulators are typically used to regulate the supply voltage. In some RF systems, more than one voltage regulator may be required. In other applications with spatial limitations, multiple circuits may share the same voltage regulator. For example, a voltage-controlled oscillator (VCO) circuit and a mixer circuit may share the same regulated supply. In this configuration, noise from the mixer circuit often appears at the output of the VCO circuit and vice-versa. 
     Referring now to  FIG. 1 , an exemplary voltage regulator  10  includes an operational amplifier (opamp)  12  and a PMOS transistor  14 . An inverting input of the opamp  12  receives a reference voltage signal  16  and a non-inverting input of the opamp  12  receives a feedback signal  18 . The opamp  12  generates an output voltage signal  20  that is based on a difference between the reference voltage signal  16  and the feedback signal  18 . 
     The output voltage signal  20  is input to a gate of the PMOS transistor  14 . A source of the PMOS transistor  14  is connected to a supply voltage  22 . A drain of the PMOS transistor  14  is connected to the non-inverting input of the opamp  12  to provide the feedback signal  18 . The voltage regulator  10  outputs a regulated signal  26  to an RF subcircuit  28  of a RF system  30 . When supplying a single RF subcircuit  28 , the regulated signal  26  is stable and constant. When a single voltage regulator supplies more than one RF subcircuit, noise or crosstalk from one of the RF sub-circuits may appear in the output of the other RF sub-circuit. 
     Referring now to  FIG. 2 , separate voltage regulators may be used for each subcircuit to eliminate the noise. The RF circuit  30  includes n RF subcircuits  28 - 1 , . . . ,  28 - n  that require voltage regulation. Voltage regulators  10 - 1 , . . . ,  10 - n  are provided for each RF subcircuit  28 - 1 , . . . ,  28 - n , respectively. The voltage regulators  10 - 1 , . . . ,  10 - n  include opamps  12 - 1 , . . . ,  12 - n , and transistors  14 - 1 , . . . ,  14   n , respectively. Feedback signals  18 - 1 , . . . ,  18 - n  are generated as described above. When multiple voltage regulators  10 - 1 , . . . ,  10   n  are used, the spatial requirements and current dissipation of the RF system  30  increase. 
     SUMMARY 
     A voltage regulator according to the present invention includes a master regulator circuit that receives a reference signal, that generates a master bias signal and that includes a transistor having a first gain. A first slave regulator circuit includes a first transistor having a second gain that is substantially equal to unity gain, a control terminal that receives the master bias signal from the master regulator circuit, a first terminal and a second terminal that outputs a first regulated output signal. A second slave regulator circuit includes a second transistor having a third gain that is substantially equal to unity gain, a control terminal that receives the master bias signal from the master regulator circuit, a first terminal, and a second terminal that outputs a second regulated output signal. 
     In other features, the master regulator circuit includes an opamp having a non-inverting input that receives the reference signal, an inverting input and an output. The output of the opamp generates the master bias signal, which is output to a control terminal of the transistor. 
     In yet other features, the master regulator circuit includes a current source. A second terminal of the transistor communicates with the current source and the inverting input of the opamp. The transistor includes a first terminal. The first terminals of the transistor, the first transistor and the second transistor are biased by a first voltage potential. 
     In still other features, the transistor, the first transistor and the second transistor are NMOS transistors. The first gain is greater than unity gain. 
     In still other features, a Radio Frequency (RF) circuit includes the voltage regulator, a first RF subcircuit that receives the first regulated output signal, and a second RF subcircuit that receives the second regulated output signal. The RF circuit is a wireless communications device. 
     Further areas of applicability of the present invention will become apparent from the detailed description provided hereinafter. It should be understood that the detailed description and specific examples, while indicating the preferred embodiment of the invention, are intended for purposes of illustration only and are not intended to limit the scope of the invention. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
       The present invention will become more fully understood from the detailed description and the accompanying drawings, wherein: 
         FIG. 1  is a schematic of an exemplary voltage regulator according to the prior art; 
         FIG. 2  is a schematic of an RF circuit with multiple RF subcircuits and voltage regulators with feedback circuits according to the prior art; 
         FIG. 3  is a functional block diagram of a voltage regulator with a master and multiple slave regulator circuits according to the present invention; 
         FIG. 4  is an electric schematic of the voltage regulator of  FIG. 3 ; and 
         FIG. 5  is a functional block diagram of the voltage regulator of  FIG. 3  implemented in an RF transceiver of a wireless communications device. 
     
    
    
     DESCRIPTION 
     The following description of the preferred embodiment(s) is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses. For purposes of clarity, the same reference numbers will be used in the drawings to identify similar elements. 
     Referring now to  FIG. 3 , a voltage regulator  40  includes a master regulator circuit  44  and one or more slave regulator circuits  46 - 1 ,  46 - 2 , . . . , and  46 - m  (collectively identified as slave regulator circuits  46 ). The master regulator circuit  44  receives a reference voltage signal  48  and generates a master bias signal  50 , as will be described below. The slave regulator circuits  46  receive the master bias signal  50  from the master regulator circuit  44 . The slave regulator circuits  46  output a regulated signal  54  based on the master bias signal  50 . RF subcircuits  56 - 1 ,  56 - 2 , . . . , and  56 - m  (collectively identified as RF subcircuits  56 ) receive the regulated signal  54 . Because the desired supply voltage for the RF subcircuit  56  is sensed and adjusted at the master regulator circuit  44 , the slave regulator circuits  46  operate as level shifters and unity gain buffers and have feedback. The slave regulator circuits  46  have a second gain that is substantially equal to unity gain. As used herein, the term substantially equally to unity gain means a gain that is greater than 0.5 and less than 2. 
     Referring now to  FIG. 4 , the master regulator circuit  44  includes an opamp  60 , a first NMOS transistor  62 , and a current source  64 . The reference voltage signal  48  communicates with a non-inverting input  66  of the opamp  60 . The opamp  60  outputs the master bias signal  50 , which biases a gate terminal  70  of the first NMOS transistor  62 . A drain terminal  72  of the first NMOS transistor  62  communicates with a supply voltage  74 . A source terminal  78  of the first NMOS transistor  62  communicates with an inverting input  68  of the opamp  60  to provide a feedback signal  52  and with the current source  64 , which is referenced to a ground potential  80 . 
     The master bias signal  50  is regulated based on a difference between the reference voltage signal  48  and the feedback signal  52 . The master bias signal  50  is output to slave regulator circuits  82 - 1 ,  82 - 2 , . . . ,  82 - m . The slave regulator circuits  82 - 1 ,  82 - 2 , . . . ,  82 - m  include second NMOS transistors  84 - 1 ,  84 - 2 , . . . ,  84 - m . The slave regulator circuits  82 - 1 ,  82 - 2 , . . . ,  82 - m  provide a regulated signal to RF subcircuits  86 - 1 ,  86 - 2 , . . . ,  86 - m  of the RF system  30 . The master bias signal  50  biases gates  88 - 1 ,  88 - 2 , . . . ,  88 - m  of the second NMOS transistors  84 - 1 ,  84 - 2 , . . . ,  84 - m . Drain terminals  90 - 1 ,  90 - 2 , . . . ,  90 -N of the second NMOS transistors  84 - 1 ,  84 - 2 , . . . ,  84 - m  communicate with a supply voltage  74 - 1 ,  74 - 2 , . . . ,  74 - m . Source terminals  92 - 1 ,  92 - 2 , . . . ,  92 - m  of the second NMOS transistors  84 - 1 ,  84 - 2 , . . . ,  84 - m  output a regulated supply voltage signal  94 - 1 ,  94 - 2 , . . . ,  94 - m  to the RF subcircuits  86 - 1 ,  86 - 2 , . . . ,  86 - m . In this arrangement, the second NMOS transistors  84 - 1 ,  84 - 2 , . . . ,  84 - m  act as source followers. 
     The regulated supply voltage  94 - 1 ,  94 - 2 , . . . ,  94 - m  is based on a difference between the reference voltage signal  48  and the feedback signal  52 , which is generated in the master regulator circuit  44 . Because the second NMOS transistors  84 - 1 ,  84 - 2 , . . . ,  84 - m  have substantially unity gain, the slave regulator circuits  82 - 1 ,  82 - 2 , . . . ,  82 - m  act as unity gain buffers for the master control voltage signal  50 . In conventional regulator circuits shown in  FIGS. 1 and 2 , a small change in the output signal  20  can significantly impact the regulated signal  26  that is input to the circuit blocks  28  because the PMOS transistor  14  does not have unity gain. 
     Referring now to  FIG. 5 , the master regulator  44  and slave regulators  46 - 1 ,  46 - 2 , . . . ,  46 - m  can be used in wireless communication devices. In one implementation, a wireless communications device  100  is connected to a host device  102  such as but not limited to a desktop computer, a personal digital assistant (PDA), a laptop computer, a gaming console, an access point and the like. The wireless communications device  100  further includes a medium access control (MAC) device  104  and an RF transceiver  108 . The master regulator  44  and slave regulators  46 - 1 ,  46 - 2 , . . . , and  46 - m  supply regulated outputs to RF subcircuits  110 - 1 ,  110 - 2 , . . . , and 110-m of the RF transceiver  108 . In one implementation, the wireless communications device is compliant with at least one of IEEE 802.11, 802.11a, 802.11g, 802.11n, and/or 802.16, which are hereby incorporated by reference in their entirety, although other existing and future wireless standards may be used. 
     Those skilled in the art can now appreciate from the foregoing description that the broad teachings of the present invention can be implemented in a variety of forms. Therefore, while this invention has been described in connection with particular examples thereof, the true scope of the invention should not be so limited since other modifications will become apparent to the skilled practitioner upon a study of the drawings, the specification and the following claims.