Patent Publication Number: US-9905357-B2

Title: Integrated circuit

Description:
RELATED APPLICATIONS 
     This application claims priority to Taiwanese Application Serial Number 104135797, filed Oct. 30, 2015, which is herein incorporated by reference. 
     BACKGROUND 
     Field of Invention 
     The present disclosure relates to an electronic circuitry. More particularly, the present disclosure relates to an integrated circuit. 
     Description of Related Art 
     Coupling phenomena is often relevant to inductors and wires of integrated circuits. For example, coupling phenomena may occur between two inductors, between two wires or between an inductor and a wire. Coupling phenomena are particularly problematic in high-frequency ranges, e.g., frequencies between 5 GHz-10 GHz or frequencies higher than 10 GHz, which severely affects the performance of the integrated circuits. 
     With respect to the coupling phenomenon occurring between two inductors, since the trend of development in integrated circuit manufacturing processes is miniaturization of the integrated circuits, the distances respectively between pairs of inductors in an integrated circuit are becoming smaller. Therefore, the coupling phenomenon occurring between pairs of inductors is getting more apparent. 
     In view of the foregoing, problems and disadvantages are associated with existing products that require further improvement. However, those skilled in the art have yet to find a solution. 
     SUMMARY 
     The following presents a simplified summary of the disclosure in order to provide a basic understanding to the reader. This summary is not an extensive overview of the disclosure and it does not identify key/critical elements of the present disclosure or delineate the scope of the present disclosure. 
     One aspect of the present disclosure is directed to an integrated circuit. The integrated circuit includes a first inductor, a second inductor, and a blocker. The first inductor is disposed in a metal layer. The second inductor is disposed in the metal layer. The blocker is disposed on the metal layer, and between the first inductor and the second inductor. The blocker is configured to block coupling occurring between the first inductor and the second inductor. 
     Another aspect of the present disclosure is directed to an integrated circuit. The integrated circuit includes a first inductor, a second inductor, and a current ring. The first inductor is disposed in a metal layer. The second inductor is disposed in the metal layer. The current ring is disposed on the metal layer, and between the first inductor and the second inductor. The current ring is located on a plane, and the plane is approximately perpendicular to the metal layer. 
     In view of the foregoing, embodiments of the present disclosure provide an integrated circuit to improve coupling phenomenon problems occurring between inductors and thereby enhance the performance of the integrated circuit. 
     These and other features, aspects and advantages of the present disclosure, as well as the technical means and embodiments employed by the present disclosure, are better understood with reference to the following description in connection with the accompanying drawings and appended claims. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The disclosure can be more fully understood by reading the following detailed description of the embodiments, with reference made to the accompanying drawings as follows: 
         FIG. 1  is a schematic diagram of an integrated circuit according to embodiments of the present disclosure; 
         FIG. 2  is a schematic diagram of an integrated circuit according to embodiments of the present disclosure; 
         FIG. 3  is a schematic diagram of an integrated circuit according to embodiments of the present disclosure; 
         FIG. 4  is a schematic diagram of a rail of an integrated circuit in  FIG. 3  according to embodiments of the present disclosure; 
         FIG. 5  is an experimental data diagram of an integrated inductor structure according to embodiments of the present disclosure; 
         FIG. 6  is an experimental data diagram of an integrated inductor structure according to embodiments of the present disclosure; and 
         FIG. 7  is an experimental data diagram of an integrated inductor structure according to embodiments of the present disclosure. 
     
    
    
     In accordance with common practice, the various described features/elements are not drawn to scale but instead drawn to best illustrate specific features/elements relevant to the present disclosure. Also, wherever possible, like or the same reference numerals are used in the drawings and the description to refer to the same or like parts. 
     DETAILED DESCRIPTION 
     The detailed description provided below in connection with the appended drawings is intended as a description of the present examples and is not intended to represent the only forms, in which the present example may be constructed or utilized. The description sets forth the functions of the example and the sequence of steps for constructing and operating the example. However, the same or equivalent functions and sequences may be accomplished by different examples. 
     Unless otherwise defined herein, scientific and technical terminologies employed in the present disclosure shall have the meanings that are commonly understood and used by one of ordinary skill in the art. Unless otherwise required by context, it will be understood that singular terms shall include plural forms of the same and plural terms shall include singular forms of the same. 
       FIG. 1  is a schematic diagram of an integrated circuit according to embodiments of the present disclosure. As shown in the figure, the integrated circuit  100  comprises an inductor  110  and an inductor  120 . The inductor  110  and the inductor  120  are disposed on a metal layer  500 . When the integrated circuit  100  operates, coupling  600  occurs between the inductor  110  and the inductor  120  in the Z-axis direction and thereby affects the performance of the integrated circuit  100 . 
       FIG. 2  is a schematic diagram of an integrated circuit according to embodiments of the present disclosure. Compared with the integrated circuit  100  as shown in  FIG. 1 , the integrated circuit  100 A in  FIG. 2  further comprises a blocker  130 . The blocker  130  is disposed on the metal layer  500  and between the inductor  110  and the inductor  120 . The blocker  130  blocks coupling occurring between the inductor  110  and the inductor  120 . For example, the blocker  130  may be configured to block coupling  600  occurring between the inductor  110  and the inductor  120  of  FIG. 1 . 
     In one embodiment, the blocker  130  may be a current ring. As shown in  FIG. 2 , the current ring  130  is located on a plane, e.g., the YZ plane. The plane is approximately perpendicular to the metal layer  500 . Through such a configuration, when the integrated circuit  100 A operates, coupling occurring between the inductor  110  and the inductor  120  in the Z-axis direction is blocked by the current ring  130  so as to improve the problem of lowered performance of the integrated circuit  100 A caused by inductor coupling. Since the current ring  130  forms a closed loop, a magnetic field generated by the inductors  110 ,  120  passing through the current ring  130  generates an induced magnetic field in the current ring  130  to resist the magnetic field generated by the inductors  110 ,  120 . Therefore, the problem of the coupling phenomenon occurring between the inductor  110  and the inductor  120  can be resolved so as to enhance the performance of the integrated circuit  100 A. 
     In some embodiments, the current ring  130  may be coupled to ground or may be floating depending on actual requirements. In some embodiments, the current ring  130  may be a polygon current ring. The height H of the polygon current ring  130  is from the metal layer  500  to the top  139  of the polygon current ring  130 . The height H is about 50 μm to 200 μm. In another embodiment, the height H is about 80 μm to 135 μm. 
     In some embodiments, the diameter of the polygon current ring  130  is about 15 μm to 35 μm. In another embodiment, the diameter of the polygon current ring  130  is about 18 μm to 25 μm. 
     As shown in  FIG. 2 , the current ring  130  comprises a pad  132 , a wire  134  and a pad  136 . The pad  132  is coupled to the pad  136 . For example, the pad  132  may be coupled to the pad  136  through a connection line  138 . In addition, the wire  134  comprises a first terminal  131  and a second terminal  133 . The first terminal  131  is coupled to the pad  132 , and the second terminal  133  is coupled to the pad  136 . 
     In one embodiment, the height H of the wire  134  is from the pad  136  to the top  139  of the wire  134 . The height H is about 50 μm to 200 μm. In another embodiment, the height H is about 80 μm to 135 μm. 
     In some embodiments, the distance D between the pad  132  and the pad  136  is about 71 μm to 171 μm. In some embodiments, the first terminal  131  of the wire  134  and the pad  132  are coupled at a first point, the second terminal  133  of the wire  134  and the pad  136  are coupled at a second point, and a distance between the first point and the second point is about 71 μm to 171 μm. 
     In an optional embodiment, the diameter of the wire  134  is about 15 μm to 35 μm. In another embodiment, the diameter of the wire  134  is about 18 μm to 25 μm. 
       FIG. 3  is a schematic diagram of an integrated circuit according to embodiments of the present disclosure. Compared with the integrated circuit  100 A of  FIG. 2 , the integrated circuit  100 B of  FIG. 3  further comprises a rail  140 . The rail  140  is disposed under the metal layer  500 , and between the inductor  110  and the inductor  120 . As a result, when the integrated circuit  100 B operates, coupling occurring between the inductor  110  and the inductor  120  is not only blocked by the current ring  130 , but also blocked by the rail  140 , such that the problem of reduced performance of the integrated circuit  100 B caused by inductor coupling can be resolved. 
     In some embodiments, the rail  140  may be regarded as a vertical patterned ground shielding (PGS). 
       FIG. 4  is a schematic diagram of a rail of an integrated circuit in  FIG. 3  according to embodiments of the present disclosure. In this embodiment, another implementation of the rail  140  in  FIG. 3  is illustrated. As shown in the figure, the rail  140  comprises a pillar  141  and a plurality of strip portions  142 ˜ 146 . Each of the strip portions  142 ˜ 146  is coupled to the pillar  141 . For example, the center part of the strip portion  142  and the center part of the strip portion  143  are coupled to the pillar  141 , and the strip portion  142  and the strip portion  143  are spaced apart by a distance. The manner in which the strip portions  144 ˜ 146  are disposed is similar to that of the strip portions  142 ˜ 143 , and a detailed description related to the strip portions  144 ˜ 146  is omitted herein. In some embodiments, the pillar  141  is disposed in a first direction, e.g., a Z-axis direction, the strip portions  142 ˜ 146  are disposed in a second direction, e.g., a Y direction, and the first direction is approximately perpendicular to the second direction. As shown in  FIG. 4 , the pillar  141  and the strip portions  142 ˜ 146  of the rail  140  form a fishbone structure, and the fishbone structure may interfere with coupling occurring between the inductor  110  and the inductor  120 . Therefore, the problem of lowered performance of the integrated circuit  100 B caused by inductor coupling can be further resolved. 
       FIG. 5  is an experimental data diagram of an integrated circuit according to embodiments of the present disclosure. This experimental data diagram is used for describing the insertion loss among the inductors in the integrated circuit when the integrated circuit operates in different frequencies. As shown in the figure, the curve m 1  represents experimental data if the blocker, e.g., a current ring, is not used in the integrated circuit. The curves m 2 ˜m 4  represent experimental data if the blocker is used in the integrated circuit of embodiments of the present disclosure. Specifically, the curve m 2  represents experimental data if the blocker with a height of 80 μm is used in the integrated circuit. The curve m 3  represents experimental data if the blocker with a height of 200 μm is used in the integrated circuit. The curve m 4  represents experimental data if the blocker with a height of 135 μm is used in the integrated circuit. As can be seen from  FIG. 5 , coupling values of curves m 2 ˜m 4  are lower than the coupling value of the curve m 1 . As a result, the experimental data shows that the integrated circuit of embodiments of the present disclosure indeed can reduce coupling values among inductors, in which the maximum reduced coupling value is 3.5 dB. Therefore, the problem of lowered performance of the integrated circuit caused by inductor coupling can be resolved. However, the present disclosure is not limited to the foregoing embodiments, and a person skilled in the art may change parameters, e.g., the height of the blocker, of the integrated circuit for achieving the best performance. 
       FIG. 6  is an experimental data diagram of an integrated inductor structure according to embodiments of the present disclosure. This experimental data diagram is used for describing the insertion loss among the inductors in the integrated circuit when the integrated circuit operates in different frequencies. As shown in the figure, the curves m 5 ˜m 6  represent experimental data if the blocker, e.g., the current ring, is used in the integrated circuit of embodiments of the present disclosure. Specifically, the curve m 5  represents experimental data if the integrated circuit adopts a blocker in which a distance between the two terminals of the wire is 71 μm. The curve m 6  represents experimental data if the integrated circuit adopts a blocker in which a distance between the two terminals of the wire is 171 μm. As can be seen from  FIG. 6 , coupling values of curves m 5 ˜m 6  are lower than the coupling value of the curve m 1 . As a result, the experimental data shows that the integrated circuit of embodiments of the present disclosure indeed can reduce coupling values among inductors. Therefore, the problem of lowered performance of the integrated circuit caused by inductor coupling can be resolved. However, the present disclosure is not limited to the foregoing embodiments, and a person skilled in the art may change parameters, e.g., the height of the blocker, of the integrated circuit for achieving the best performance. 
       FIG. 7  is an experimental data diagram of an integrated inductor structure according to embodiments of the present disclosure. This experimental data diagram is used for describing the insertion loss among the inductors in the integrated circuit when the integrated circuit operates in different frequencies. As shown in the figure, the curves m 7 ˜m 9  represent experimental data if the blocker, e.g., the current ring, is used in the integrated circuit of embodiments of the present disclosure. Specifically, the curve m 7  represents experimental data if the integrated circuit adopts a blocker in which its diameter is 18 μm. The curve m 8  represents experimental data if the integrated circuit adopts a blocker in which its diameter is 25 μm. The curve m 9  represents experimental data if the integrated circuit adopts a blocker in which its diameter is 35 μm. As can be seen from  FIG. 7 , coupling values of curves m 7 ˜m 9  are lower than the coupling value of the curve m 1 . As a result, the experimental data shows that the integrated circuit of embodiments of the present disclosure indeed can reduce coupling values among inductors. Therefore, the problem of lowered performance of the integrated circuit caused by inductor coupling can be resolved. However, the present disclosure is not limited to the foregoing embodiments, and a person skilled in the art may change parameters, e.g., the height of the blocker, of the integrated circuit for achieving the best performance. 
     In view of the above embodiments of the present disclosure, it is apparent that the application of the present disclosure has a number of advantages. Embodiments of the present disclosure provide an integrated circuit to improve coupling phenomenon problems occurring among inductors and thereby enhance the performance of integrated circuits. 
     Although the present disclosure has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. 
     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present disclosure without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the present disclosure cover modifications and variations of this disclosure provided they fall within the scope of the following claims.