Patent Publication Number: US-11042203-B1

Title: Regulator circuit and front-end module

Description:
CROSS-REFERENCE TO RELATED APPLICATION(S) 
     This application claims the benefit under 35 USC § 119(a) of Korean Patent Application No. 10-2020-0049337 filed on Apr. 23, 2020 in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes. 
     BACKGROUND 
     1. Field 
     The following description relates to a regulator circuit and a front-end module. 
     2. Description of Related Art 
     A W-Fi front-end module integrated circuit (Wi-Fi FEM IC) that is implemented in mobile communication devices, etc., is currently being widely developed. This development is being conducted in accordance with the trend for miniaturization of communication devices, and the demand for low power consumption with regard to communication devices. 
     Recently, in the Wi-Fi front-end module, in accordance with the trend for miniaturization and low power consumption, the task of excluding the existing power management integrated circuit (PMIC) and forming a direct connection to the battery of the communication device is implemented. 
     Accordingly, it may be beneficial to implement a manner of preventing damage to circuits and components inside the Wi-Fi front-end module. 
     SUMMARY 
     This Summary is provided to introduce a selection of concepts in simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter. 
     In a general aspect, a regulation circuit includes a first current regulating circuit, connected between a power supply voltage terminal and a first connection node, and configured to regulate a level of a first current, a first voltage regulating circuit, connected between the first connection node and a ground node, and configured to receive the first current to regulate a level of a first voltage, a second voltage regulating circuit, connected between the power supply voltage terminal and an output node, and configured to generate an output voltage based on the first voltage; and a second current regulating circuit, connected between the output node and the ground node, and configured to stabilize the output voltage. 
     The first current regulating circuit may include a first resistor connected between the power supply voltage terminal and the first connection node. 
     The first voltage regulating circuit may be connected between the first connection node and the ground node, and may include a first transistor of which a drain and a gate are commonly connected. 
     The first voltage regulating circuit may include a first transistor, respectively connected to the first connection node and the second voltage regulating circuit, and configured to have a drain and a gate commonly connected to each other; a second transistor, connected to a source of the first transistor, and configured to have a drain and a gate commonly connected to each other; and a third transistor connected to a source of the second transistor, configured to have a drain and a gate commonly connected to each other, and configured to have a source connected to the ground node. 
     The second voltage regulating circuit may include an output transistor having a drain connected to the power supply voltage terminal, a gate connected to the first connection node, and a source connected to the output node. 
     The second current regulating circuit may include a ground resistor connected between the output node and the ground node. 
     The second current regulating circuit may include a ground transistor, configured to have a drain connected to the output node, and a source and a gate connected to the first voltage regulating circuit; and a ground resistor connected between the source of the ground transistor and the ground node. 
     A resistance value of the first resistor may be higher than a resistance value of the ground resistor. 
     In a general aspect, a front-end module includes a regulation circuit, configured to generate a regulated voltage based on a power supply voltage; and a decoder, configured to receive the regulated voltage from the regulation circuit, wherein the regulation circuit includes a first current regulating circuit, connected between a power supply voltage terminal and a first connection node, and configured to regulate a level of a first current, a first voltage regulating circuit, connected between the first connection node and a ground node, and configured to receive the first current to regulate a level of a first voltage, a second voltage regulating circuit, connected between the power supply voltage terminal and an output node, and configured to generate an output voltage based on the first voltage, and a second current regulating circuit, connected between the output node and the ground node, and configured to stabilize the output voltage. 
     The first current regulating circuit may include a first resistor connected between the power supply voltage terminal and the first connection node. 
     The first voltage regulating circuit may be connected between the first connection node and the ground node, and may include a first transistor having a drain and a gate commonly connected to each other. 
     The first voltage regulating circuit may include a first transistor, respectively connected to the first connection node and the second voltage regulating circuit and configured to have a drain and a gate commonly connected to each other; a second transistor, connected to a source of the first transistor, and configured to have a drain and a gate commonly connected to each other; and a third transistor connected to a source of the second transistor, and configured to have a drain and a gate commonly connected to each other, and a source connected to the ground node. 
     The second voltage regulating circuit may include an output transistor having a drain connected to the power supply voltage terminal, a gate connected to the first connection node, and a source connected to the output node. 
     The second current regulating circuit may include a ground resistor connected between the output node and the ground node. 
     The second current regulating circuit may include a ground transistor, configured to have a drain connected to the output node, and a source and a gate connected to the first voltage regulating circuit; and a ground resistor connected between the source of the ground transistor and the ground node. 
     In a general aspect, a communication device includes a front-end module comprising a regulation circuit and a decoder, wherein the regulation circuit includes a first current regulator, connected to a power supply voltage, and configured to regulate a level of a first current; a first voltage regulator, connected between the first regulator and a ground, and configured to receive the first current, and regulate a level of a first voltage; a second voltage regulator, connected to the power supply voltage, and configured to generate an output voltage based on the first voltage; and a second current regulator, connected between the second voltage regulator and the ground, and configured to stabilize the output voltage. 
     The first current regulator may include a first resistor, and the second current regulator may include a ground resistor, and a resistance value of the first resistor is greater than a resistance value of the ground resistor. 
     Other features and aspects will be apparent from the following detailed description, the drawings, and the claims. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         FIG. 1  illustrates an example front-end module, in accordance with one or more embodiments. 
         FIG. 2  illustrates an example regulator circuit, in accordance with one or more embodiments. 
         FIG. 3  illustrates an example regulator circuit, in accordance with one or more embodiments. 
         FIG. 4  illustrates an example regulator circuit, in accordance with one or more embodiments. 
         FIG. 5  illustrates an example of current consumption according to a power supply voltage, in accordance with one or more embodiments. 
         FIG. 6  illustrates an example of an output voltage according to a power supply voltage, in accordance with one or more embodiments. 
     
    
    
     Throughout the drawings and the detailed description, unless otherwise described or provided, the same drawing reference numerals will be understood to refer to the same elements, features, and structures. The drawings may not be to scale, and the relative size, proportions, and depiction of elements in the drawings may be exaggerated for clarity, illustration, and convenience. 
     DETAILED DESCRIPTION 
     The following detailed description is provided to assist the reader in gaining a comprehensive understanding of the methods, apparatuses, and/or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatuses, and/or systems described herein will be apparent after an understanding of the disclosure of this application. For example, the sequences of operations described herein are merely examples, and are not limited to those set forth herein, but may be changed as will be apparent after an understanding of the disclosure of this application, with the exception of operations necessarily occurring in a certain order. Also, descriptions of features that are known in the art may be omitted for increased clarity and conciseness. 
     The features described herein may be embodied in different forms, and are not to be construed as being limited to the examples described herein. Rather, the examples described herein have been provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to one of ordinary skill in the art. 
     Herein, it is noted that use of the term “may” with respect to an embodiment or example, e.g., as to what an embodiment or example may include or implement, means that at least one embodiment or example exists in which such a feature is included or implemented while all examples and examples are not limited thereto. 
     Throughout the specification, when an element, such as a layer, region, or substrate, is described as being “on,” “connected to,” or “coupled to” another element, it may be directly “on,” “connected to,” or “coupled to” the other element, or there may be one or more other elements intervening therebetween. In contrast, when an element is described as being “directly on,” “directly connected to,” or “directly coupled to” another element, there can be no other elements intervening therebetween. 
     As used herein, the term “and/or” includes any one and any combination of any two or more of the associated listed items. 
     Although terms such as “first,” “second,” and “third” may be used herein to describe various members, components, regions, layers, or sections, these members, components, regions, layers, or sections are not to be limited by these terms. Rather, these terms are only used to distinguish one member, component, region, layer, or section from another member, component, region, layer, or section. Thus, a first member, component, region, layer, or section referred to in examples described herein may also be referred to as a second member, component, region, layer, or section without departing from the teachings of the examples. 
     Spatially relative terms such as “above,” “upper,” “below,” and “lower” may be used herein for ease of description to describe one element&#39;s relationship to another element as illustrated in the figures. Such spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, an element described as being “above” or “upper” relative to another element will then be “below” or “lower” relative to the other element. Thus, the term “above” encompasses both the above and below orientations depending on the spatial orientation of the device. The device may also be oriented in other ways (for example, rotated 90 degrees or at other orientations), and the spatially relative terms used herein are to be interpreted accordingly. 
     The terminology used herein is for describing various examples only, and is not to be used to limit the disclosure. The articles “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms “comprises,” “includes,” and “has” specify the presence of stated features, numbers, operations, members, elements, and/or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, operations, members, elements, and/or combinations thereof. 
     Due to manufacturing techniques and/or tolerances, variations of the shapes illustrated in the drawings may occur. Thus, the examples described herein are not limited to the specific shapes illustrated in the drawings, but include changes in shape that occur during manufacturing. 
     The features of the examples described herein may be combined in various ways as will be apparent after gaining an understanding of the disclosure of this application. Further, although the examples described herein have a variety of configurations, other configurations are possible as will be apparent after an understanding of the disclosure of this application. 
     The drawings may not be to scale, and the relative sizes, proportions, and depiction of elements in the drawings may be exaggerated for clarity, illustration, and convenience. 
       FIG. 1  illustrates an example front-end module, in accordance with one or more embodiments. 
     Referring to  FIG. 1 , a front-end module  10 , according to an example, may directly receive a power supply voltage VDD, and may include a regulation circuit  100  and a decoder  200 . In an example, the front-end module  10  may be a Wi-Fi front-end module, but is not limited thereto. 
     The regulation circuit  100  may generate a regulated voltage Vreg using the power supply voltage VDD. In an example, the power supply voltage VDD may be a battery voltage, and the battery voltage may, for example, vary within a range of 3.0V to 4.6V, but is not limited thereto. 
     The decoder  200  may receive the regulated voltage Vreg from the regulation circuit  100 . In an example, the decoder  200  may be an internal circuit of the front-end module  10 , and may be a control circuit, but is not limited thereto. 
       FIG. 2  illustrates an example regulator or regulation circuit  100 , in accordance with one or more embodiments,  FIG. 3  illustrates an example regulator or regulation circuit  100 , in accordance with one or more embodiments, and  FIG. 4  illustrates an example regulator or regulation circuit  100 , in accordance with one or more embodiments. 
     Referring to  FIGS. 2 to 4 , the regulation circuit  100  may include a first current regulating circuit  110 , a first voltage regulating circuit  120 , a second voltage regulating circuit  130  and a second current regulating circuit  140 . 
     The first current regulating circuit  110  is connected between a terminal N 0  of the power supply voltage (VDD) and a first connection node N 1 , and may regulate a level of a first current I 1 . 
     The first voltage regulating circuit  120  is connected between the first connection node N 1  and a ground node NG to receive the first current I 1  and regulate a level of a first voltage V 1 . 
     The second voltage regulating circuit  130  may be connected between the power supply voltage (VDD) terminal N 0  and an output node Nout, and may generate an output voltage Vout based on the first voltage V 1 . 
     The second current regulating circuit  140  is connected between the output node Nout and the ground node NG, and may stabilize the output voltage Vout. 
     On the other hand, in an example of a Complementary Metal-oxide Semiconductor (CMOS) process, considering that a source-drain breakdown voltage (BVds) of a MOS field-effect transistor (MOSFET) may be approximately 3.5V, in an example in which the battery voltage is directly received, a more stable voltage may be supplied. 
     In this example, the battery voltage may be more stably supplied through an internal regulator circuit without a power management IC (PMIC) disposed outside of the front-end module. 
     For respective drawings according to examples, unnecessary duplicate descriptions may be omitted for the same reference numerals and components having the same function, and details of differences for respective drawings may be described. 
     Referring to  FIG. 2 , in a non-limiting example, the first current regulating circuit  110  may include a first resistor R 11  connected between the power supply voltage (VDD) terminal N 0  and the first connection node N 1 . In this example, the first resistor R 11  may regulate a level of the first current I 1 . 
     The first voltage regulating circuit  120  may be connected between the first connection node N 1  and the ground node NG, and may include a first transistor M 10  of which a drain and a gate are connected to each other. 
     The second voltage regulating circuit  130  may include an output transistor M 31  having a drain connected to the power supply voltage (VDD) terminal N 0 , a gate connected to the first connection node (N 1 ), and a source connected to the output node Nout. 
     The second current regulating circuit  140  may include a ground resistor R 41  connected between the output node Nout and the ground node NG. 
     In an example, the second current regulating circuit  140  may provide a current bypass path between the output node Nout and the ground node, which may reduce a change in transient response characteristics at the output node Nout, thereby contributing to the stability of the output node. 
     Referring to  FIG. 3 , the first current regulating circuit  110  may include a first resistor R 11  connected between the power supply voltage (VDD) terminal N 0  and the first connection node N 1 . 
     The first voltage regulating circuit  120  may be connected between the first connection node N 1  and the ground node NG, and may include a first transistor M 10  of which a drain and a gate are connected to each other. 
     The second voltage regulating circuit  130  may include the output transistor M 31  having a drain connected to the power supply voltage (VDD) terminal N 0 , a gate connected to the first current regulating circuit  110  through the first connection node N 1 , and a source connected to the output node Nout. 
     In a non-limiting example, the second current regulating circuit  140  may include a ground transistor M 41  and the ground resistor R 41 . 
     The ground transistor M 41  may include a drain connected to the output node Nout, and a source and a gate connected to the first voltage regulating circuit  120 . 
     The ground resistor R 41  may be connected between the source of the ground transistor M 41  and the ground node NG. In this example, the ground resistor R 41  may regulate a level of a second current I 2 . 
     Referring to  FIG. 4 , the first voltage regulating circuit  120  may include a first transistor M 11 , a second transistor M 12 , and a third transistor M 13 . 
     The first transistor M 11  may include a drain connected to each of the first connection node N 1  and the second voltage regulating circuit  130 , a gate connected to the drain, and a source connected to a drain of the second transistor M 12 . 
     The second transistor M 12  may include a drain connected to the source of the first transistor M 11 , a gate connected to the drain of the second transistor M 12 , and a source connected to the drain of the third transistor M 13 . 
     The third transistor M 13  may include a drain connected to the source of the second transistor M 12 , a gate connected to the drain of the third transistor M 13  and the second current regulating circuit  140 , and a source connected to the ground node NG. 
     In an example, the first transistor M 11 , the second transistor M 12 , and the third transistor M 13  may regulate a level of the first voltage V 1 . 
     In an example, in  FIG. 4 , in an example in which drain-source voltages Vds of the first transistor M 11 , the second transistor M 12  and the third transistor M 13  are the same, the first voltage V 1  may be 3×Vds, and in this example, when Vds is 0.53V, the voltage V 1  is 1.59 (V). 
     In this example, when Vgs of the output transistor M 31  is 0.15(V), the output voltage (Vout=V 1 −Vgs) may be 1.44(V) (1.59(V)−0.15(V)). 
     As described above, it can be seen that the output voltage may be constantly supplied regardless of variations in the power supply voltage VDD, which is the voltage of the battery. 
     On the other hand, in  FIGS. 2 to 4 , a resistance value of the first resistor R 11  may be higher than a resistance value of the ground resistor R 41 . 
     In an example, the higher the resistance values of the first resistor R 11  and the ground resistor R 41  are, the greater the current (I 1 +I 2 ) consumption of the first current I 1  and the second current I 2  may be reduced. Therefore, it may be preferable that a resistance value is as high as possible. However, if the resistance value is too high, it may take a longer time for the first voltage to rise to the normal voltage, and thus, it may be necessary to set an appropriate value in consideration of the characteristics of the transient response. 
     In an example, the resistance value of the first resistor R 11  may be 500K0, and the resistance value of the ground resistor R 41  may be 250 KΩ. 
       FIG. 5  illustrates an example of current consumption according to a power supply voltage, and  FIG. 6  illustrates an example of an output voltage according to a power supply voltage. 
     Referring to  FIG. 5 , when the current summing of the first current I 1  and the second current I 2  is referred to as a consumed current I 1 +I 2 , the consumed current I 1 +I 2  is approximately 3.4 uA to 7.5 uA depending on a change in the power supply voltage VDD as illustrated in  FIG. 5 . Specifically, when an inverter performs on-off switching (an on/off operation), the inverter operates by receiving the output current supplied through the output node, and when maintained in one of the on/off switching operations (when in an idle mode), the current of 3.4 uA to 7.5 uA (=I 1 +I 2 ) is consumed, which shows that the system design specification satisfies the current of 10 uA or less in the idle mode. 
     Referring to  FIG. 6 , the output voltage Vout shows a small change of about 0.23 V with respect to a change of 1.33 V to 1.56 V, in a range of 3 V to 5 V of the power supply voltage VDD, and thus, it can be seen that a more stable voltage is supplied. 
     As set forth above, according to examples, the Wi-Fi front-end module directly receives a battery voltage having a voltage variation to generate a regulated voltage therein, thereby preventing damage to internal circuits and components or devices. In addition, there is an advantage that the power consumption in the standby state may be reduced. 
     While this disclosure includes specific examples, it will be apparent after an understanding of the disclosure of this application that various changes in form and details may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered in a descriptive sense only, and not for purposes of limitation. Descriptions of features or aspects in each example are to be considered as being applicable to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed to have a different order, and/or if components in a described system, architecture, device, or circuit are combined in a different manner, and/or replaced or supplemented by other components or their equivalents. Therefore, the scope of the disclosure is defined not by the detailed description, but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents are to be construed as being included in the disclosure.