Patent Publication Number: US-2022224365-A1

Title: Signal analysis device, control circuit, and storage medium

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application is a continuation application of International Application PCT/JP2019/048529, filed on Dec. 11, 2019, and designating the U.S., the entire contents of which are incorporated herein by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present disclosure relates to a signal analysis device that analyzes a signal of interest, a control circuit, and a storage medium. 
     2. Description of the Related Art 
     A multi-coset sampling (MCS) system has a configuration in which a plurality of analog-to-digital converters (ADCs) operating at a sampling rate lower than a Nyquist rate are arranged in parallel, and a delay difference is provided between systems of the ADCs. A method has recently been considered in which a signal is received in an MCS system and from the signal folded in a sub-Nyquist zone, a frequency of an original signal is estimated. With the use of such a method, a broadband signal can be detected and analyzed. 
     For example, WO2014/191712 discloses a method in which a digital fractional delay (DFD) process for canceling a delay difference between systems of an MCS system and a time-frequency conversion process are collectively performed in a time domain using a finite impulse response (FIR) filter, and then phase compensation corresponding to each sub-Nyquist zone is performed in a frequency domain. In the method, the frequency of an original signal is estimated by determining from which sub-Nyquist zone the original signal has been folded. 
     However, according to the above-described conventional technique, in order to increase frequency resolution, it is necessary to increase the number of stages of the FIR filters, and thus the circuit scale is significantly increased, which is a problem. 
     The present disclosure has been made in view of the above, and an object thereof is to obtain a signal analysis device capable of increasing frequency resolution while preventing a circuit scale from increasing. 
     SUMMARY OF THE INVENTION 
     In order to solve the above-mentioned problem and achieve the object, a signal analysis device according to the present disclosure includes: a plurality of time-frequency conversion units each provided corresponding to one of a plurality of sampling sequences to convert a corresponding sampling sequence from a signal in a time domain into a signal in a frequency domain, the plurality of sampling sequences having been subjected to sampling performed at a sampling rate lower than a Nyquist rate from a plurality of signal systems generated by branching a signal of interest, and having received addition of delay times different from each other; signal processing units each provided corresponding to one of the plurality of time-frequency conversion units to collectively perform a phase compensation process corresponding to a sub-Nyquist zone of the sampling sequence that is a signal in a frequency domain output by a corresponding time-frequency conversion unit and a process of canceling phase rotation caused by a delay time difference between the plurality of sampling sequences; and a frequency estimation unit to estimate a frequency of the signal of interest by determining from which sub-Nyquist zone the signal of interest has been folded. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a diagram illustrating a configuration of a signal analysis device according to a first embodiment; 
         FIG. 2  is a diagram illustrating a configuration of a signal analysis device according to a second embodiment; 
         FIG. 3  is a diagram illustrating an example of a spectrogram according to a comparative example; 
         FIG. 4  is a diagram illustrating an example of a spectrogram obtained by the signal analysis device illustrated in  FIG. 2 ; 
         FIG. 5  is a diagram illustrating a configuration of an MCS receiver according to a sixth embodiment; 
         FIG. 6  is a diagram for comparing effects of the first embodiment and a third embodiment with those of comparative examples #1 and #2; 
         FIG. 7  is a diagram for comparing effects of the second embodiment and a fourth embodiment with those of comparative examples #1 and #2; 
         FIG. 8  is a diagram illustrating dedicated hardware for realizing functions of time-frequency conversion units, signal processing units, a frequency estimation unit, and windowing processing units according to each of first to seventh embodiments; and 
         FIG. 9  is a diagram illustrating a configuration of a control circuit for realizing the functions of the time-frequency conversion units, the signal processing units, the frequency estimation unit, and the windowing processing units according to each of the first to seventh embodiments. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Hereinafter, a signal analysis device, a control circuit, and a storage medium according to each embodiment of the present disclosure will be described in detail with reference to the drawings. 
     First Embodiment 
       FIG. 1  is a diagram illustrating a configuration of a signal analysis device  100  according to a first embodiment. The signal analysis device  100  includes an antenna  10 , an amplifier  20 , an MCS receiver  30 , time-frequency conversion units  40 - 1  to  40 - 4 , signal processing units  50 - 1  to  50 - 4 , and a frequency estimation unit  60 . The MCS receiver  30  includes delay time addition units  31 - 2  to  31 - 4  and sampling units  32 - 1  to  32 - 4 . 
     Hereinafter, in a case where it is not necessary to distinguish the delay time addition units  31 - 2  to  31 - 4  from each other, each thereof is simply referred to as a delay time addition unit  31 , in a case where it is not necessary to distinguish the sampling units  32 - 1  to  32 - 4  from each other, each thereof is simply referred to as a sampling unit  32 , in a case where it is not necessary to distinguish the time-frequency conversion units  40 - 1  to  40 - 4  from each other, each thereof is simply referred to as a time-frequency conversion unit  40 , and in a case where it is not necessary to distinguish the signal processing units  50 - 1  to  50 - 4  from each other, each thereof is simply referred to as a signal processing unit  50 . 
     When the antenna  10  receives a signal, the signal analysis device  100  outputs the received signal to the amplifier  20 . The amplifier  20  amplifies the received signal, and then branches the received signal into a plurality of signal systems. In the example illustrated in  FIG. 1 , the received signal is branched into four signal systems, i.e, first to fourth signal systems. The first signal system is connected to the sampling unit  32 - 1 . The second signal system is connected to the delay time addition unit  31 - 2 . The third signal system is connected to the delay time addition unit  31 - 3 . The fourth signal system is connected to the delay time addition unit  31 - 4 . 
     Each of the delay time addition units  31 - 2  to  31 - 4  adds a delay time to the corresponding signal system. At that time, the delay times each added by one of the delay time addition units  31 - 2  to  31 - 4  have values different from each other. Since the delay time addition unit  31  is not connected to the first signal system, delay times different from each other are added to the first to fourth signal systems. The delay time addition unit  31 - 2  outputs, to the sampling unit  32 - 2 , the second signal system to which the delay time has been added. The delay time addition unit  31 - 3  outputs, to the sampling unit  32 - 3 , the third signal system to which the delay time has been added. The delay time addition unit  31 - 4  outputs, to the sampling unit  32 - 4 , the fourth signal system to which the delay time has been added. Each of the delay time addition units  31 - 2  to  31 - 4  can be configured using, for example, a delay element. 
     Each of the sampling units  32 - 1  to  32 - 4  performs sampling from the corresponding signal system to generate a sampling sequence. At that time, each of the sampling units  32 - 1  to  32 - 4  uses a sampling rate lower than a Nyquist rate. The sampling unit  32 - 1  outputs the generated sampling sequence to the time-frequency conversion unit  40 - 1 . The sampling unit  32 - 2  outputs the generated sampling sequence to the time-frequency conversion unit  40 - 2 . The sampling unit  32 - 3  outputs the generated sampling sequence to the time-frequency conversion unit  40 - 3 . The sampling unit  32 - 4  outputs the generated sampling sequence to the time-frequency conversion unit  40 - 4 . Each of the sampling units  32 - 1  to  32 - 4  can be configured using, for example, an ADC that converts an analog signal into a digital signal. 
     With the configuration described above, the MCS receiver  30  generates a plurality of sampling sequences that have been subjected to sampling performed at a sampling rate lower than a Nyquist rate from a plurality of signal systems generated by branching a signal of interest, and have received addition of delay times different from each other. 
     The time-frequency conversion units  40 - 1  to  40 - 4  are provided corresponding to the first to fourth signal systems, respectively, and each convert the corresponding sampling sequence from a signal in a time domain into a signal in a frequency domain. The converted signal is a signal folded in the frequency domain. The time-frequency conversion unit  40 - 1  outputs the sampling sequence converted into the signal in the frequency domain to the signal processing unit  50 - 1 . The time-frequency conversion unit  40 - 2  outputs the sampling sequence converted into the signal in the frequency domain to the signal processing unit  50 - 2 . The time-frequency conversion unit  40 - 3  outputs the sampling sequence converted into the signal in the frequency domain to the signal processing unit  50 - 3 . The time-frequency conversion unit  40 - 4  outputs the sampling sequence converted into the signal in the frequency domain to the signal processing unit  50 - 4 . 
     The signal processing units  50 - 1  to  50 - 4  are provided corresponding to the plurality of time-frequency conversion units  40 - 1  to  40 - 4 , respectively, and each perform a signal process of the sampling sequence which is the signal in the frequency domain output by the corresponding time-frequency conversion unit  40 . In this signal process, a phase compensation process corresponding to a sub-Nyquist zone of the sampling sequence and a process of canceling phase rotation caused by a delay time difference between the plurality of sampling sequences are collectively performed. 
     Specifically, the signal processing units  50 - 1  to  50 - 4  perform multiplication processes using coefficients C 1,k  to C 4,k , respectively. By multiplying sampling sequences by the coefficients C 1,k  to C 4,k , it is possible to collectively perform the phase compensation process corresponding to respective sub-Nyquist zones of K number of sub-Nyquist folds corresponding to a ratio between a sub-Nyquist rate and a Nyquist rate and the process of canceling the phase rotation due to the delay time difference. Here, a sub-Nyquist zone number k is a number assigned to each of the plurality of sub-Nyquist zones, and takes an integer from 1 to K. In the present embodiment, K is set to 20. Each of the signal processing units  50 - 1  to  50 - 4  outputs K multiplication results to the frequency estimation unit  60 . 
     The frequency estimation unit  60  estimates the frequency of the received signal on the basis of the multiplication results output from each of the signal processing units  50 - 1  to  50 - 4 . Specifically, the frequency estimation unit  60  estimates the frequency of the received signal by calculating the sum of the multiplication results for each sub-Nyquist zone number k and estimating that the received signal is folded from a sub-Nyquist zone in which the largest sum is obtained. For example, the frequency estimation unit  60  calculates the sum of multiplication results in a case of k=1, that is, a result obtained by the signal processing unit  50 - 1  multiplying the sampling sequence by the coefficient C 1,1 , a result obtained by the signal processing unit  50 - 2  multiplying the sampling sequence by the coefficient C 2,1 , a result obtained by the signal processing unit  50 - 3  multiplying the sampling sequence by the coefficient C 3,1 , and a result obtained by the signal processing unit  50 - 4  multiplying the sampling sequence by the coefficient C 4,1 . Regarding each of cases of k=2 to k=K, the frequency estimation unit  60  repeats a process similar to that in the case of k=1 to obtain K sum values. The frequency estimation unit  60  selects a sum having a value largest among the K sum values, estimates that the received signal is folded from a sub-Nyquist zone corresponding to the selected sum, and estimates the frequency of the received signal on the basis of the frequency of the sub-Nyquist zone. 
     Note that, in the above description, the signal analysis device  100  is a reception device that receives a wireless signal, and the signal to be analyzed is a received signal, but the present embodiment is not limited to such an example. The signal analysis device  100  may be any device that analyzes a signal of interest. The received signal is an example of the signal of interest. 
     As described above, according to the first embodiment, in the signal analysis device  100  that estimates the frequency of a signal of interest, each of the plurality of sampling sequences that have been subjected to sampling performed at a sampling rate lower than a Nyquist rate from the plurality of signal systems generated by branching the signal of interest, and have received addition of delay times different from each other is converted from the signal in the time domain signal into the signal in the frequency domain, and then the phase compensation process and the process of canceling the phase rotation caused by the delay time difference are collectively performed in the frequency domain. Therefore, as compared with a case where the phase compensation process is performed in the time domain, it is possible to increase frequency resolution while preventing a circuit scale from increasing. 
     Second Embodiment 
       FIG. 2  is a diagram illustrating a configuration of a signal analysis device  200  according to a second embodiment. The signal analysis device  200  includes windowing processing units  70 - 1  to  70 - 4  between the MCS receiver  30  and the time-frequency conversion units  40 - 1  to  40 - 4 , respectively, of the signal analysis device  100  illustrated in  FIG. 1 . Hereinafter, portions different from those of the signal analysis device  100  will be mainly described, and detailed description of functional configurations similar to those of the signal analysis device  100  will be omitted. 
     The windowing processing units  70 - 1  to  70 - 4  are provided corresponding to the sampling units  32 - 1  to  32 - 4 , respectively. Each of the windowing processing units  70 - 1  to  70 - 4  performs a windowing process on the corresponding sampling sequence. The windowing processing units  70 - 1  to  70 - 4  are provided at preceding stages of the time-frequency conversion units  40 - 1  to  40 - 4 , respectively, and signals to be processed by the windowing processing units  70 - 1  to  70 - 4  are each a signal in a time domain. The windowing processes performed by the windowing processing units  70 - 1  to  70 - 4  are each a process of multiplying a window function. The window function used by the windowing processing units  70 - 1  to  70 - 4  only needs to be able to reduce side lobes, and is, for example, a Hann window or a Hamming window. As a condition of a practical window function, a finite length is desirable. In a case where a window function having an infinite length is used, the windowing processing units  70 - 1  to  70 - 4  are only required to terminate the calculation at an appropriate length. A value of a signal after the windowing process is zero outside a finite interval. 
     The windowing processing unit  70 - 1  is provided at the preceding stage of the time-frequency conversion unit  40 - 1 , and multiplies the sampling sequence which is the signal in the time domain by a coefficient W 2,1 . The windowing processing unit  70 - 1  outputs the processed sampling sequence to the time-frequency conversion unit  40 - 1 . The windowing processing unit  70 - 2  is provided at the preceding stage of the time-frequency conversion unit  40 - 2 , and multiplies the sampling sequence which is the signal in the time domain by a coefficient W 2,1 . The windowing processing unit  70 - 2  outputs the processed sampling sequence to the time-frequency conversion unit  40 - 2 . The windowing processing unit  70 - 3  is provided at the preceding stage of the time-frequency conversion unit  40 - 3 , and multiplies the sampling sequence which is the signal in the time domain by a coefficient W 3,1 . The windowing processing unit  70 - 3  outputs the processed sampling sequence to the time-frequency conversion unit  40 - 3 . The windowing processing unit  70 - 4  is provided at the preceding stage of the time-frequency conversion unit  40 - 4 , and multiplies the sampling sequence which is the signal in the time domain by a coefficient W 4,1 . The windowing processing unit  70 - 4  outputs the processed sampling sequence to the time-frequency conversion unit  40 - 4 . The coefficients W 1,1 , W 2,1 , W 3,1 , and W 4,1  are coefficients corresponding to the window function. 
       FIG. 3  is a diagram illustrating an example of a spectrogram according to a comparative example. The spectrogram illustrated in  FIG. 3  is obtained when a signal in which a continuous wave (CW) signal, a pulse signal, and a chirp signal are superimposed is received, and sampling at a sampling rate equal to a Nyquist rate and a signal process by FFT are performed. In  FIG. 3 , the horizontal axis represents time, the vertical axis represents frequency, and a difference in color density in the graph represents an amplitude absolute value. 
       FIG. 4  is a diagram illustrating an example of a spectrogram obtained by the signal analysis device  200  illustrated in  FIG. 2 . In  FIG. 4 , the horizontal axis represents time, the vertical axis represents frequency, and a difference in color density in the graph represents an amplitude absolute value. The spectrogram illustrated in  FIG. 4  is obtained by the signal analysis device  200  when the same signal as that of the comparative example of  FIG. 3  is received. By comparing  FIG. 3  with  FIG. 4 , it can be seen that the spectrogram obtained by the signal analysis device  200  has a high degree of coincidence with the spectrogram obtained in the comparative example in which the sampling at the sampling rate equal to the Nyquist rate and the signal process by FFT have been performed. 
     As described above, according to the second embodiment, in the signal analysis device  200  that estimates the frequency of the signal of interest, the windowing process is performed on the sampling sequence in the preceding stage of each of the time-frequency conversion units  40 - 1  to  40 - 4 . Therefore, in addition to the effect that “it is possible to increase frequency resolution while preventing a circuit scale from increasing” described in the first embodiment, an effect that side lobes of a spectrogram are reduced and thus a dynamic range can be expanded is achieved. 
     Third Embodiment 
     A signal analysis device  300  according to a third embodiment has a functional configuration similar to that of the signal analysis device  100  according to the first embodiment. Therefore, the functional configuration of the signal analysis device  300  will not be described here in detail, and will be described using reference numerals in  FIG. 1 . In the signal analysis device  300 , the signal processing units  50 - 1  to  50 - 4  each perform a signal process limitedly on a sub-Nyquist zone in which a valid signal may be present. The signal analysis device  300  receives electromagnetic waves using the antenna  10 . In that case, the fractional bandwidth of the antenna  10  is, for example, only about 0.5, and among the K sub-Nyquist zones, there are a limited number of sub-Nyquist zones in which a valid signal may be present. Therefore, the signal processing units  50 - 1  to  50 - 4  can each limit sub-Nyquist zones to be subjected to the signal process depending on the characteristics of the antenna  10 . 
     As described above, according to the third embodiment, the signal analysis device  300  having a configuration similar to that in the first embodiment performs the signal process limitedly on a sub-Nyquist zone in which a valid signal may be present among the K sub-Nyquist zones. Therefore, a processing load of the signal process can be reduced. Also in the present embodiment, similarly to the first and second embodiments, it is possible to increase frequency resolution while preventing a circuit scale from increasing. 
     Fourth Embodiment 
     A signal analysis device  400  according to a fourth embodiment has a functional configuration similar to that of the signal analysis device  200  according to the second embodiment. Therefore, the functional configuration of the signal analysis device  400  will not be described here in detail, and will be described using reference numerals in  FIG. 2 . In the signal analysis device  400 , the signal processing units  50 - 1  to  50 - 4  each perform a signal process limitedly on a sub-Nyquist zone in which a valid signal may be present. The signal analysis device  400  receives electromagnetic waves using the antenna  10 . In that case, the fractional bandwidth of the antenna  10  is, for example, only about 0.5, and among the K sub-Nyquist zones, there are a limited number of sub-Nyquist zones in which a valid signal may be present. Therefore, the signal processing units  50 - 1  to  50 - 4  can each limit sub-Nyquist zones to be subjected to the signal process depending on the characteristics of the antenna  10 . 
     As described above, according to the fourth embodiment, the signal analysis device  400  having a configuration similar to that in the second embodiment performs the signal process limitedly on a sub-Nyquist zone in which a valid signal may be present among the K sub-Nyquist zones. Therefore, a processing load of the signal process can be reduced. Also in the present embodiment, similarly to the first to third embodiments, it is possible to increase frequency resolution while preventing a circuit scale from increasing. 
     Fifth Embodiment 
     In the above-described first to fourth embodiments, the delay time addition units  31 - 2  to  31 - 4  are each configured using the delay element, but in a fifth embodiment, the delay time addition units  31 - 2  to  31 - 4  are each configured using a track-and-hold circuit. Even in the case of using the track-and-hold circuit, a delay time can be added to each signal system similarly to the case of using the delay element. Note that the delay time addition units  31 - 2  to  31 - 4  each using the track-and-hold circuit can be applied to any of the configurations of the first to fourth embodiments. 
     Sixth Embodiment 
       FIG. 5  is a diagram illustrating a configuration of an MCS receiver  30 A according to a sixth embodiment. In the above-described first to fifth embodiments, the MCS receiver  30  is configured with the sampling units  32 - 1  to  32 - 4  and the delay time addition units  31 - 2  to  31 - 4  provided at the preceding stages of the sampling units  32 - 2  to  32 - 4 . On the other hand, in the sixth embodiment, the MCS receiver  30 A includes one sampling unit  33  and decimation units  34 - 1  to  34 - 4 . Hereinafter, in a case where it is not necessary to distinguish the decimation units  34 - 1  to  34 - 4  from each other, each thereof is simply referred to as a decimation unit  34 . 
     The sampling unit  33  samples a received signal which is a signal of interest to be input at a sampling rate equal to the Nyquist rate to generate a sampling sequence, branches the generated sampling sequence into four systems, and outputs each of the branched sampling sequences to one of the decimation units  34 - 1  to  34 - 4 . The sampling unit  33  can be configured using an ADC. The decimation units  34  each decimate the signal from the sampling sequence output by the sampling unit  33 , thereby giving different delay times to the respective systems. 
     With the configuration described above, similarly to the MCS receiver  30 , the MCS receiver  30 A generates a plurality of sampling sequences that have been subjected to sampling performed at a sampling rate lower than a Nyquist rate from a plurality of signal systems generated by branching a signal of interest, and have received addition of delay times different from each other. 
     Note that the MCS receiver  30 A described here may be used in place of the MCS receiver  30  of the signal analysis device  100  according to the first embodiment, in place of the MCS receiver  30  of the signal analysis device  200  according to the second embodiment, or in place of the MCS receiver  30  of the signal analysis device  300  according to the third embodiment. 
     Seventh Embodiment 
     In the above-described first to sixth embodiments, the frequency estimation unit  60  has estimated the frequency of the received signal by calculating the sum of the multiplication results for each sub-Nyquist zone number k and estimating that the received signal is folded from a sub-Nyquist zone in which the largest sum is obtained. On the other hand, in a seventh embodiment, the frequency of a received signal is estimated by estimating that the received signal is folded from a sub-Nyquist zone having the smallest variation in the multiplication results for each sub-Nyquist zone number k. 
     Here, effects of the above-described first to fourth embodiments will be verified.  FIG. 6  is a diagram for comparing effects of the first and third embodiments with those of comparative examples #1 and #2.  FIG. 7  is a diagram for comparing effects of the second and fourth embodiments with those of comparative examples #1 and #2. 
     The horizontal axis in each of  FIGS. 6 and 7  represents point length of time-frequency conversion obtained by conversion using a Nyquist rate, and the larger the point length, the higher the frequency resolution. The vertical axis in each of  FIGS. 6 and 7  represents arithmetic circuit scale. Regarding comparative example #1 in each of  FIGS. 6 and 7 , sampling at the Nyquist rate and a signal process by FFT have been performed. Regarding comparative example #2 in each of  FIGS. 6 and 7 , a signal process using an FIR filter has been performed. 
     It can be seen from  FIGS. 6 and 7  that the arithmetic circuit scale can be reduced as compared with comparative examples #1 and #2 by performing the phase compensation process and the process of canceling the phase rotation in the frequency domain as illustrated in the first to fourth embodiments. In particular, when the frequency resolution is increased, it is possible to prevent an increase in the arithmetic circuit scale in the first to fourth embodiments. 
     In addition, when comparing the first and third embodiments in  FIG. 6  with each other, it can be seen that the arithmetic circuit scale is further reduced in the third embodiment. When comparing the second and fourth embodiments in  FIG. 7  with each other, it can be seen that the arithmetic circuit scale is further reduced in the fourth embodiment. As a result, it can be seen that by the windowing processes performed in the time domain and the processes performed thereafter by the signal processing units  50 , the arithmetic circuit scale can be further reduced. 
     Next, hardware configurations of the time-frequency conversion units  40 , the signal processing units  50 , the frequency estimation unit  60 , and the windowing processing units  70  according to each of the first to seventh embodiments will be described. The time-frequency conversion units  40 , the signal processing units  50 , the frequency estimation unit  60 , and the windowing processing units  70  are realized by processing circuitries. The processing circuitries may be realized by dedicated hardware, or may be each a control circuit using a central processing unit (CPU). 
     In a case where the above-described processing circuitries are realized by dedicated hardware, these processing circuitries are each realized by a processing circuitry  90  illustrated in  FIG. 8 .  FIG. 8  is a diagram illustrating dedicated hardware for realizing functions of the time-frequency conversion units  40 , the signal processing units  50 , the frequency estimation unit  60 , and the windowing processing units  70  according to each of the first to seventh embodiments. The processing circuitry  90  is a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or a combination thereof. 
     In a case where the above-described processing circuitries are each realized by a control circuit using a CPU, the control circuit is a control circuit  91  configured as illustrated in  FIG. 9 , for example.  FIG. 9  is a diagram illustrating a configuration of the control circuit  91  for realizing the functions of the time-frequency conversion units  40 , the signal processing units  50 , the frequency estimation unit  60 , and the windowing processing units  70  according to each of the first to seventh embodiments. As illustrated in  FIG. 9 , the control circuit  91  includes a processor  92  and a memory  93 . The processor  92  is a CPU, and also referred to as a processing device, an arithmetic device, a microprocessor, a microcomputer, a digital signal processor (DSP), or the like. The memory  93  is, for example, a non-volatile or volatile semiconductor memory such as a random access memory (RAM), a read only memory (ROM), a flash memory, an erasable programmable ROM (EPROM), or an electrically EPROM (EEPROM (registered trademark)), a magnetic disk, a flexible disk, an optical disk, a compact disc, a mini disk, or a digital versatile disk (DVD). 
     In a case where the above-described processing circuitries are each realized by the control circuit  91 , each processing circuitry is realized by the processor  92  reading and executing a program corresponding to a process of each component stored in the memory  93 . The memory  93  is also used as a temporary memory in each process executed by the processor  92 . The program may be provided via a communication path or may be provided in a state of being stored in a storage medium. 
     The signal analysis device according to the present disclosure achieves an effect that frequency resolution can be increased while preventing a circuit scale from increasing. 
     The configurations described in the embodiments above are merely examples and can be combined with other known technology, and part thereof can be omitted or modified without departing from the gist.