Patent Publication Number: US-10332475-B2

Title: Gate voltage driving device, method, driving circuit, and liquid crystal display panel

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application claims the priority of Chinese patent application CN 201610794373.X, entitled “Gate voltage driving device, method, driving circuit, and liquid crystal display panel” and filed on Aug. 31, 2016, the entirety of which is incorporated herein by reference. 
     FIELD OF THE INVENTION 
     The present disclosure relates to the technical field of display, and in particular, to a gate voltage driving device, a gate voltage driving method, a driving circuit, and a liquid crystal display panel. 
     BACKGROUND OF THE INVENTION 
     Chinese patent application CN 105070243A has disclosed a gate turn-on voltage compensation circuit, a display panel, a driving method, and a display device. The patent application relates to a gate voltage driving method. In the gate voltage driving method, a clock control module is used for controlling a chamfering module to output corresponding chamfered voltage signals in corresponding time periods, so as to obtain different chamfering depths. Control logic of the method is complicated, and the driving circuit is not improved sufficiently. 
     SUMMARY OF THE INVENTION 
     The object of the present disclosure is to solve the problem of complicated control logic of a gate voltage driving device and insufficient improvement to a driving circuit in the prior art. 
     According to a first aspect, the present disclosure provides a gate voltage driving device of a liquid crystal display device. The gate voltage driving device comprises a voltage input module, a control module, and a voltage output module. The control module comprises a first control unit and a second control unit. The first control unit has a first voltage division part and a first switching part connected in series with each other. The second control unit has a second voltage division part. The first control unit and the second control unit are connected in parallel with each other. The voltage input module is configured to receive a driving voltage. The first switching part is configured to receive a switching quantity signal which is used for controlling a turn-on or a turn-off of the first switching part. When the first switching part is turned on, a turn-on voltage is output from the voltage output module to a gate. 
     Preferably, the second voltage division part is a voltage division resistor, and the first switching part is an N-MOS transistor. 
     Preferably, the switching quantity signal is a high-level signal or a low-level signal. 
     Preferably, the control module further comprises a third control unit connected in parallel with the first control unit, and the third control unit comprises a third switching part and a third voltage division part. When the switching quantity signal of the first switching part and a switching quantity signal of the third switching part both are at a high level, the voltage output module outputs a first voltage. When one of the switching quantity signal of the first switching part and the switching quantity signal of the third switching part is at a low level and the other is at the high level, the voltage output module outputs a second voltage. When the switching quantity signal of the first switching part and the switching quantity signal of the third switching part both are at the low level, the voltage output module outputs a third voltage. The first voltage is larger than the second voltage, and the second voltage is larger than the third voltage. 
     According to a second aspect, the present disclosure provides a driving method based on the first aspect of the present disclosure. The method comprises steps of: determining a turn-on voltage to be output according to a requirement for a turn-on voltage at a control terminal; determining a switching quantity signal according to the turn-on voltage to be output at the control terminal; outputting the switching quantity signal at the control terminal; receiving the switching quantity signal at a driving terminal, and outputting the turn-on voltage to a gate according to the switching quantity signal at the driving terminal. 
     Preferably, the step of outputting the turn-on voltage to the gate of according to the switching quantity signal may further comprise a step of dividing a voltage for adjusting a value of the turn-on voltage. 
     Preferably, the switching quantity signal is a high-level signal or a low-level signal. 
     Preferably, the control module further comprises a third control unit connected in parallel with the first control unit, and the third control unit comprises a third switching part and a third voltage division part. When a switching quantity signal of the first switching part and a switching quantity signal of the third switching part both are at a high level, a first turn-on voltage is output. When one of the switching quantity signal of the first switching part and the switching quantity signal of the third switching part is at a low level and the other is at the high level, a second turn-on voltage is output. When the switching quantity signal of the first switching part and the switching quantity signal of the third switching part both are at the low level, a third turn-on voltage is output. The first turn-on voltage is larger than the second turn-on voltage, and the second turn-on voltage is larger than the third turn-on voltage. 
     According to a third aspect, the present disclosure provides a gate voltage driving circuit of a liquid crystal display device. The gate voltage driving circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first field effect transistor, a second field effect transistor, a voltage input terminal, and a voltage output terminal. The first resistor and the first field effect transistor are connected in series with each other as a first subcircuit. The second resistor and the second field effect transistor are connected in series with each other as a second subcircuit. The third resistor, the fourth resistor, and the fifth resistor are connected in parallel with one another as a third subcircuit. The first subcircuit, the second subcircuit, and the third subcircuit are connected in parallel with one another, and then are connected between the voltage input terminal and the voltage output terminal. A gate of the first field effect transistor and a gate of the second field effect transistor are configured to receive a first switching quantity signal and a second switching quantity signal, respectively. The first switching quantity signal is configured to control a turn-on and a turn-off of the first field effect transistor, and when the first field effect transistor is turned on, a turn-on voltage is output from the voltage output module to a gate. The second switching quantity signal is configured to control a turn-on and a turn-off of the second field effect transistor, and when the second field effect transistor is turned on, a turn-on voltage is output from the voltage output module to the gate. 
     According to a fourth aspect, the present disclosure provides a liquid crystal display panel which comprises a gate driving device and a printed circuit board connected to the gate driving device. The printed circuit board comprises a gate voltage driving circuit as described in the third aspect of the present disclosure. 
     The present disclosure has following technical effects. A scanning signal is enabled to have different chamfers by improving a structure of a gate driving circuit, and only two control terminals are needed. Control logic is simple, and improvement costs are relatively low. 
     Other features and advantages of the present disclosure will be further explained in the following description, and partially become self-evident therefrom, or be understood through the embodiments of the present disclosure. The objectives and advantages of the present disclosure will be achieved through the structure specifically pointed out in the description, claims, and the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The drawings necessary for explaining the embodiments are introduced briefly below to illustrate the technical solutions of the embodiments of the present disclosure more clearly. In the drawings: 
         FIG. 1  schematically shows a structure of a gate voltage driving device according to an embodiment of the present disclosure; 
         FIG. 2  is a flowing chart showing a gate voltage driving method according to an embodiment of the present disclosure; 
         FIG. 3  schematically shows a structure of a gate voltage driving circuit according to an embodiment of the present disclosure; and 
         FIG. 4  schematically shows a structure of a liquid crystal display panel according to an embodiment of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
     The present disclosure will be explained in details with reference to the embodiments and the accompanying drawings, whereby it can be fully understood how to solve the technical problem by the technical means according to the present disclosure and achieve the technical effects thereof, and thus the technical solution according to the present disclosure can be implemented. It should be noted that, as long as there is no conflict, all the technical features mentioned in all the embodiments can be combined together in any manner, and the technical solutions obtained in this manner all fall within the scope of the present disclosure. 
     A chamfering circuit of the present disclosure is configured to adjust chamfering resistance thereof according to a control signal to reduce a received DC voltage to different chamfering voltages, so that scanning signals have different chamfers. Hence, a uniformity ratio of each area of a liquid crystal display panel can be kept the same. 
     Embodiment 1 
       FIG. 1  schematically shows a structure of a gate voltage driving device of a liquid crystal display device according to the present embodiment. The gate voltage driving device comprises a voltage input module  10 , a control module, and a voltage output module  30 . The control module comprises a first control unit  20  and a second control unit  25 . The first control unit  20  has a first voltage division part  21  and a first switching part  22  connected in series with each other. The second control unit  25  has a second voltage division part  26 . The first control unit  20  and the second control unit  25  are connected in parallel with each other. The voltage input module  10  is configured to receive a driving voltage. The first switching part  22  is configured to receive a switching quantity signal. The switching quantity signal is configured to control a turn-on or a turn-off of the first switching part  22 . When the first switching part  22  is turned on, a turn-on voltage is output from the voltage output module  30  to a gate. The gate herein refers to a gate of a switching element (e.g., a thin film transistor) of a liquid crystal display device. 
     Specifically, the second voltage division part  26  can be a voltage division resistor, and the first switching part  22  can be an N-MOS transistor. The second voltage division part  26  also can be a slide rheostat, a potentiometer, or a variable resistance box. The first switching part  22  also can be an optically-coupled switch. The voltage input module  10  and the voltage output module  30  can be interface circuits, or wires used for transmitting electric signals. The switching quantity signal can be a high-level signal or a low-level signal. Generally, a logic voltage 3.3 V is a high level, and a logic voltage 0 V is a low level. More voltage signals can be arranged according to the logic voltages, and limitations are not made to the switching quantity signal in the present disclosure. 
     The gate voltage driving device of a liquid crystal display device can further comprise a third control unit which comprises a third voltage division part and a third switching part. When a switching quantity signal of the first switching part and a switching quantity signal of the third switching part (i.e., the switching quantity signal used for controlling the first switching part, and the switching quantity signal used for controlling the third switching part) both are at a high level, the voltage output module outputs a first voltage. When one of the switching quantity signal of the first switching part and the switching quantity signal of the third switching part is at a low level and the other is at the high level, the voltage output module outputs a second voltage. When the switching quantity signal of the first switching part and the switching quantity signal of the third switching part both are at the low level, the voltage output module outputs a third voltage. The first voltage is larger than the second voltage, and the second voltage is larger than the third voltage. 
     Specifically, a switching part (the first switching part or the third switching part) can be turned off when it receives a low-level signal, and can be turned on when it receives a high-level signal. Based on an On state and an Off state of a circuit, signals input or output by a device of the circuit would also change. For example, when a voltage division part, i.e., a resistor, is connected in series with a switching part, if the switching part receives a low-level signal, it would be turned off, i.e., a circuit would be disconnected. Since control units are connected in parallel with one another, disconnection of a subcircuit would result in an increase of overall resistance, thereby reducing an output voltage. 
     Embodiment 2 
     The present disclosure further comprises a driving method based on Embodiment 1. As shown in  FIG. 2 , the method comprises steps as follows. 
     In step SA 1 , at a control terminal, a turn-on voltage to be output is determined according to a requirement for a turn-on voltage. 
     In step SA 2 , at the control terminal, a switching quantity signal is determined according to the turn-on voltage to be output. 
     In step SA 3 , at the control terminal, the switching quantity signal is output. 
     In step SB 1 , at a driving terminal, the switching quantity signal is received. 
     In step SB 2 , at the driving terminal, the turn-on voltage is output to a gate according to the switching quantity signal. 
     The step of outputting the turn-on voltage to the gate according to the switching quantity (i.e., step SB 2 ) can further comprise a step of dividing a voltage for adjusting a value of the turn-on voltage. The switching quantity signal is a high level signal or a low level signal. 
     In an embodiment, the number of switching quantity signals is 2, and the number of turn-on voltages to be output and the number of turn-on voltages both are 3. Specifically, when a switching quantity signal input to a first switching part and a switching quantity signal input to a third switching part both are at a high level, a first turn-on voltage is output. When one of the two switching quantity signals is at the high level and the other is at a low level, a second turn-on voltage is output. When the two switching quantity signals both are at the low level, a third turn-on voltage is output. Herein, the first turn-on voltage is larger than the second turn-on voltage, and the second voltage is larger than the third turn-on voltage. A gate driving device of the present embodiment is the same as that of Embodiment 1, and will not be described in detail herein. 
     Specifically, the control terminal can be provided at a system terminal of a liquid crystal display device, and the driving terminal can be provided at a printed circuit board of the liquid crystal display device. 
     In a specific embodiment, an operator selects a desired turn-on voltage, i.e., the turn-on voltage to be output according to needs. The desired turn-on voltage may have various optional voltage values. It should be noted that it is not necessary to manually select the desired turn-on voltage, and that it is also impossible to automatically select the gate desired turn-on voltage according to a voltage state in a detection circuit. Then, a switching quantity signal is determined according to the turn-on voltage to be output. For example, in the present embodiment, there are two switching parts (i.e., the first switching part and the third switching part). A voltage output by a circuit when the two switching parts are turned off (i.e., when the two switching parts both receive a low-level signal) is required. Therefore, at this time, two switching quantity signals both are determined as a low level. Next, the two switching quantity signals are output from the control terminal to the driving terminal. More specifically, a switching quantity signal is output from the system terminal to the printed circuit board, and the driving circuit receives the switching quantity signal. Finally, a turn-on voltage is output to a gate according to a driving signal. 
     Embodiment 3 
     The present disclosure further provides a gate voltage driving circuit of a liquid crystal display device. As shown in  FIG. 3 , the gate voltage driving circuit comprises a first resistor R 1 , a second resistor R 2 , a third resistor R 3 , a fourth resistor R 4 , a fifth resistor R 5 , a first field effect transistor M 1 , a second field effect transistor M 2 , a voltage input terminal, and a voltage output terminal. The first resistor R 1  and the first field effect transistor M 1  are connected in series with each other as a first subcircuit. The second resistor R 2  and the second field effect transistor M 2  are connected in series with each other as a second subcircuit. The third resistor R 3 , the fourth resistor R 4 , and the fifth resistor R 5  are connected in parallel with one another as a third subcircuit. The first subcircuit, the second subcircuit, and the third subcircuit are connected in parallel with one another, and then are connected between the voltage input terminal and the voltage output terminal. A gate of the first field effect transistor M 1  and a gate of the second field effect transistor M 2  are configured to receive a first switching quantity signal and a second switching quantity signal, respectively. The first switching quantity signal is configured to control a turn-on and a turn-off of the first field effect transistor M 1 , and when the first field effect transistor M 1  is turned on, a turn-on voltage is output from the voltage output module to the gate of the first field effect transistor. The second switching quantity signal is configured to control a turn-on and a turn-off of the second field effect transistor, and when the second field effect transistor is turned on, the turn-on voltage is output from the voltage output module to the gate of the second field effect transistor. 
     Specifically, in the present disclosure, a turn-on or a turn-off of the first field effect transistor M 1  and the second field effect transistor M 2  is adjusted by controlling levels of a first switching quantity signal A and a second switching quantity signal B, thereby changing an overall resistance of a circuit. Thus, a uniformity ratio of each area of a liquid crystal display panel can be kept the same. 
     In the present embodiment, voltage division resistors of the gate voltage driving circuit of the liquid crystal device (i.e., the third resistor R 3 , the fourth resistor R 4 , and the fifth resistor R 5 ) have a same resistance which is set to P; a resistance of the first resistor R 1  is set to M; and a resistance of the second resistor R 2  is set to N. 
     When the first switching quantity signal A is at a low level and the second switching quantity signal B is at a low level, the first field effect transistor M 1  and the second field effect transistor M 2  both are in an Off state, and the first subcircuit where the first field effect transistor M 1  is arranged and the second subcircuit where the second field effect transistor M 2  is arranged both are in an Off state. An overall resistance of a chamfering circuit is P/3. 
     When the first switching quantity signal A is at a high level and the second switching quantity signal B is at a low level, the first field effect transistor M 1  is in an On state, and the first subcircuit where the first field effect transistor M 1  is arranged is turned on. Meanwhile, the second field effect transistor M 2  is in an Off state, and the second subcircuit where the second field effect transistor M 2  is arranged is turned on. The overall resistance of the chamfering circuit is (P×M)/(P×3M). 
     When the first switching quantity signal A is at a low level and the second switching quantity signal B is at a high level, the first field effect transistor M 1  is in an Off state, and the first subcircuit where the first field effect transistor M 1  is arranged is turned off. Meanwhile, the second field effect transistor M 2  is in an On state, and the second subcircuit where the second field effect transistor M 2  is arranged is turned on. The overall resistance of the chamfering circuit is (P×N)/(P×3N). 
     When the first switching quantity signal A is at a high level and the second switching quantity signal B is at a high level, the first field effect transistor M 1  and the second field effect transistor M 2  both are in an On state, and the first subcircuit where the first field effect transistor M 1  is arranged and the second subcircuit where the second field effect transistor M 2  is arranged both are in an On state. The overall resistance of the chamfering circuit is (P×M×N)/(3MP+3NP+9MN). 
     In the above described process, four different resistances in a same hardware are achieved by means of the chamfering circuit merely through control of levels of the first switching quantity signal A and the second switching quantity signal B. 
     It should be understood that the present embodiment is merely exemplary and that resistances of the resistors in the figure can be varied to form other variations based on specific conditions. In the present embodiment, the third resistor R 3 , the fourth resistor R 4 , and the fourth resistor R 5  are configured to have a same resistance in order to facilitate calculation, and if resistances thereof are different, four different overall resistances of the chamfering circuit can also be obtained according to levels of the first switching quantity signal A and the second switching quantity signal B. 
     Embodiment 4 
     The present disclosure further provides a liquid crystal panel. As show in  FIG. 4 , the liquid crystal panel comprises a gate driving device  44  and a printed circuit board  43  connected with the gate driving device  44 . The printed circuit board  43  comprises a gate voltage driving circuit as described in Embodiment 3. 
     In  FIG. 4 , a liquid crystal panel  46 , a system terminal  41  of a display device, a PCB connector  42 , and a source driving device  45  are further included. 
     The above embodiments are described only for better understanding, rather than restricting, the present disclosure. Any person skilled in the art can make amendments to the implementing forms or details without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure shall be determined by the scope as defined in the claims.