Patent Publication Number: US-2023152655-A1

Title: Driving thin film switchable optical devices

Description:
INCORPORATION BY REFERENCE 
     An Application Data Sheet is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed Application Data Sheet is incorporated by reference herein in its entirety and for all purposes. 
     BACKGROUND 
     Electrochromic (EC) devices typically comprise a multilayer stack including (a) at least one electrochromic material, that changes its optical properties, such as visible light transmitted through the layer, in response to the application of an electrical potential, (b) an ion conductor (IC), which allows ions (e.g. Li + ) to move through it, into and out from the electrochromic material to cause the optical property change, while insulating against electrical shorting, and (c) transparent conductor layers (e.g. transparent conducting oxides or TCOs), over which an electrical potential is applied. In some cases, the electric potential is applied from opposing edges of an electrochromic device and across the viewable area of the device. The transparent conductor layers are designed to have relatively high electronic conductances. Electrochromic devices may have more than the above-described layers, e.g., ion storage layers that color, or not. 
     Due to the physics of the device operation, proper function of the electrochromic device depends upon many factors such as ion movement through the material layers, the electrical potential required to move the ions, the sheet resistance of the transparent conductor layers, and other factors. As the size of electrochromic devices increases, conventional techniques for driving electrochromic transitions fall short. For example, in conventional driving profiles, the device is driven carefully, at sufficiently low voltages so as not to damage the device by driving ions through it too hard, which slows the switching speed, or the device is operated at higher voltages to increase switching speed, but at the cost of premature degradation of the device. 
     What are needed are improved methods for driving electrochromic devices. 
     SUMMARY 
     Aspects of this disclosure concern controllers and control methods for applying a drive voltage to bus bars of a large electrochromic device. Such devices are often provided on windows such as architectural glass. In certain implementations, a method of transitioning an optically switchable device between two optical states, includes applying a ramp function to a voltage applied to drive the optically switchable device until one or more regions of the optically switchable device achieves a predetermined voltage. The method of transitioning also includes, after the one or more regions of the optically switchable device achieves the predetermined voltage, (a) reducing the voltage to generate a reduced magnitude voltage and (b) reducing a current delivered to the optically switchable device, in which a profile of the current as a function of time is shaped in accordance with a profile of the reduced magnitude voltage applied to the optically switchable device. 
     Certain implementations may include one or more of the following features. A method in which an optically switchable device is provided in an insulated glass unit. A method in which an optically switchable device includes an ion conducting layer disposed between two electrically conductive layers. A method in which an ion conducting layer includes silicon. A method in which the ion conducting layer includes an oxide. A method in which the two electrically conductive layers include a transparent conductive oxide. A method in which the transparent conductive oxide includes indium oxide, indium tin oxide, doped indium oxide, tin oxide, doped tin oxide, zinc oxide, aluminum zinc oxide, doped zinc oxide, ruthenium oxide, or doped ruthenium oxide. A method in which the reduced magnitude voltage includes a value of about 1 volt or less. 
     Certain implementations may include a method of transitioning an optically switchable device between two optical states, including applying a ramp function to a voltage to drive the optically switchable device until one or more regions of the optically switchable device achieves a predetermined voltage. A method of transitioning also includes, after the one or more regions of the optically switchable device achieves the predetermined voltage, reducing a magnitude of the voltage to generate a reduced magnitude voltage, such that a current delivered to the optically switchable device has a profile that is shaped in accordance with a profile of the reduced magnitude voltage, in which the profile is shaped as a function of time. 
     Some implementations may include a method where the optically switchable device is provided between two lites of an insulated glass unit. The optically switchable device may include an ion conducting layer bounded on one or more opposing sides by conductive electrode layers. The conducting layer of the method may include a thickness of between about one hundredth (0.01) μm to about one (1) micrometer (μm). A method may involve the ion conducting layer including silicon. A method may include the conductive electrode layers include a transparent oxide. A method may involve the transparent oxide including indium oxide, indium tin oxide, doped indium oxide, tin oxide, doped tin oxide, zinc oxide, aluminum zinc oxide, doped zinc oxide, ruthenium oxide, or doped ruthenium oxide. A method may include the reduced magnitude voltage having a value of at most about one (1) volt (v). 
     In some implementations a method of transitioning between two optical states in an optically switchable device may include, during a first phase, controlling current conducted to the optically switchable device. A method of transitioning may also include terminating the first phase responsive to one or more regions of the optically switchable device attaining a predetermined voltage magnitude; and, after the first phase, controlling a voltage applied to the optically switchable device, in which a profile of a current conducted to the optically switchable device is in accordance with a profile of the applied voltage. 
     A method may include the current conducted during the first phase conducting from a first conductive layer to a second conductive layer, the conducted current causing movement of ions in the optically switchable device to bring about an electrochromic phenomenon. A method may include the current conducted in the first phase causing movement of one or more lithium ions. A method may include the first and the second conductive layer each include indium oxide, indium tin oxide, doped indium oxide, tin oxide, doped tin oxide, zinc oxide, aluminum zinc oxide, doped zinc oxide, ruthenium oxide, or doped ruthenium oxide. A method may also include driving thin film switchable optical devices 
     Implementations of the described techniques may include hardware, a method or process, or computer software on a computer-accessible medium. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1 A  schematically depicts a planar bus bar arrangement. 
         FIG.  1 B  presents a simplified plot of the local voltage value on each transparent conductive layer as a function of position on the layer 
         FIG.  1 C  presents a simplified plot of V eff  as a function of position across the device 
         FIG.  2    depicts voltage profiles for various device dimensions (bus bar separation) with a fixed value of V app . 
         FIG.  3    depicts voltage profiles for various device dimensions with V app  supplied at different values as necessary to maintain V eff  at suitable levels. 
         FIG.  4    presents device coloration profiles (V eff  versus position) for various device dimensions using fixed and variable V app . In each set of four curves, the upper curve is for the smallest device (10 inches) and the lowest curve is for the largest device (40 inches). 
         FIG.  5    shows V TCL  and V eff  as a function of device position for three different device dimensions when using a fixed conventional value of V app . 
         FIG.  6    shows V TCL  and V eff  as a function of device position for three different device dimensions when using variable values of V app  optimized for driving transitions while maintaining safe V eff . 
         FIG.  7    is a graph depicting voltage and current profiles associated with driving an electrochromic device from bleached to colored and from colored to bleached. 
         FIG.  8    is a graph depicting certain voltage and current profiles associated with driving an electrochromic device from bleached to colored. 
         FIG.  9    is a cross-sectional axonometric view of an example electrochromic window that includes two lites. 
         FIG.  10    is a schematic representation of a window controller and associated components. 
         FIGS.  11 A and  11 B  show current and voltage profiles resulting from a control method in accordance with certain embodiments. 
         FIG.  11 C  is a flow chart depicting control of current during an initial stage of an optical state transition. 
     
    
    
     DETAILED DESCRIPTION 
     Driving a color transition in a typical electrochromic device is accomplished by applying a defined voltage to two separated bus bars on the device. In such a device, it is convenient to position bus bars perpendicular to the smaller dimension of a rectangular window (see  FIG.  1 A ). This is because transparent conducting layers have an associated sheet resistance and this arrangement allows for the shortest span over which current must travel to cover the entire area of the device, thus lowering the time it takes for the conductor layers to be fully charged across their respective areas, and thus lowering the time to transition the device. 
     While an applied voltage, V app , is supplied across the bus bars, essentially all areas of the device see a lower local effective voltage (V eff ) due to the sheet resistance of the transparent conducting layers and the ohmic drop in potential across the device. The center of the device (the position midway between the two bus bars) frequently has the lowest value of V eff . This frequently results in an unacceptably small optical switching range and/or an unacceptably slow switching time in the center of the device. These problems may not exist at the edges of the device, nearer the bus bars. This is explained in more detail below with reference to  FIGS.  1 B and  1 C . 
     As used herein, V app  refers the difference in potential applied to two bus bars of opposite polarity on the electrochromic device. As explained below, each bus bar is electronically connected to a separate transparent conductive layer. Between the transparent conductive layers are sandwiched the electrochromic device materials. Each of the transparent conductive layers experiences a potential drop from a bus bar to which it is connected and a location remote from the bus bar. Generally, the greater the distance from the bus bar, the greater the potential drop in a transparent conducting layer. The local potential of the transparent conductive layers is often referred to herein as the V TCL . As indicated, bus bars of opposite polarity are typically laterally separated from one another across the face of the electrochromic device. The term V eff  refers to the potential between the positive and negative transparent conducting layers at any particular location on the electrochromic device (x,y coordinate in Cartesian space). At the point where V eff  is measured, the two transparent conducting layers are separated in the z-direction (by the EC device materials), but share the same x,y coordinate. 
     Aspects of this disclosure concern controllers and control methods in which a voltage applied to the bus bars is at a level that drives a transition over the entire surface of the electrochromic device but does not damage or degrade the device. This applied voltage produces an effective voltage at all locations on the face of the electrochromic device that is within a bracketed range. The upper bound of this range is associated with a voltage safely below the level at which the device may experience damage or degradation impacting its performance in the short term or the long term. At the lower boundary of this range is an effective voltage at which the transition between optical states of the electrochromic device occurs relatively rapidly. The level of voltage applied between the bus bars is significantly greater than the maximum value of V eff  within the bracketed range. 
       FIG.  1 A  shows a top-down view of an electrochromic lite,  100 , including bus bars having a planar configuration. Electrochromic lite  100  includes a first bus bar,  105 , disposed on a first conductive layer,  110 , and a second bus bar,  115 , disposed on a second conductive layer,  120 . An electrochromic stack (not shown) is sandwiched between first conductive layer  110  and second conductive layer  120 . As shown, first bus bar  105  may extend substantially across one side of first conductive layer  110 . Second bus bar  115  may extend substantially across one side of second conductive layer  120  opposite the side of electrochromic lite  100  on which first bus bar  105  is disposed. Some devices may have extra bus bars, e.g. on all four edges, but this complicates fabrication. A further discussion of bus bar configurations, including planar configured bus bars, is found in U.S. patent application Ser. No. 13/452,032 filed Apr. 20, 2012, which is incorporated herein by reference in its entirety. 
       FIG.  1 B  is a graph showing a plot of the local voltage in first transparent conductive layer  110  and the voltage in second transparent conductive layer  120  that drives the transition of electrochromic lite  100  from a bleached state to a colored state, for example. Plot  125  shows the local values of V TCL  in first transparent conductive layer  110 . As shown, the voltage drops from the left-hand side (e.g., where first bus bar  105  is disposed on first conductive layer  110  and where the voltage is applied) to the right-hand side of first conductive layer  110  due to the sheet resistance and current passing through first conductive layer  110 . Plot  130  also shows the local voltage V TCL  in second conductive layer  120 . As shown, the voltage increases from the right-hand side (e.g., where second bus bar  115  is disposed on second conductive layer  120  and where the voltage is applied) to the left-hand side of second conductive layer  120  due to the sheet resistance of second conductive layer  120 . The value of V app  in this example is the difference in voltage between the right end of potential plot  130  and the left end of potential plot  125 . The value of V eff  at any location between the bus bars is the difference in values of curves  130  and  125  the position on the x-axis corresponding to the location of interest. 
       FIG.  1 C  is a graph showing a plot of V eff  across the electrochromic device between first and second conductive layers  110  and  120  of electrochromic lite  100 . As explained, the effective voltage is the local voltage difference between the first conductive layer  110  and the second conductive layer  120 . Regions of an electrochromic device subjected to higher effective voltages transition between optical states faster than regions subjected to lower effective voltages. As shown, the effective voltage is the lowest at the center of electrochromic lite  100  and highest at the edges of electrochromic lite  100 . The voltage drop across the device is an ohmic drop due to the current passing through the device (which is a sum of the electronic current between the layers capable of undergoing redox reactions in the electrochromic device and ionic current associated with the redox reaction). The voltage drop across large electrochromic windows can be alleviated by configuring additional bus bars within the viewing area of the window, in effect dividing one large optical window into multiple smaller electrochromic windows which can be driven in series or parallel. However, this approach is not aesthetically preferred due to the contrast between the viewable area and the bus bar(s) in the viewable area. That is, it is much more pleasing to the eye to have a monolithic electrochromic device without any distracting bus bars in the viewable area. 
     As described above, as the window size increases, the resistance of the TCO layers between the points closest to the bus bar (referred to as edge of the device in following description) and in the points furthest away from the bus bars (referred to as the center of the device in following description) increases. For a fixed current passing through a TCO the effective voltage drop across the TCO increases and this reduces the effective voltage at the center of the device. This effect is exacerbated by the fact that typically as window area increases, the leakage current density for the window stays constant but the total leakage current increases due to the increased area. Thus, with both of these effects the effective voltage at the center of the electrochromic window falls substantially, and poor performance may be observed for electrochromic windows which are larger than, for example, about 30 inches across. Some of the poor performance can be alleviated by using a higher V app  such that the center of the device reaches a suitable effective voltage; however, the problem with this approach is that typical higher voltages at the edge of the window, needed to reach the suitable voltage at the center, can degrade the electrochromic device in the edge area, which can lead to poor performance. 
     Typically, the range of safe operation for solid state electrochromic-device based windows is between about 0.5V and 4V, or more typically between about 1V and about 3V, e.g. between 1.1V and 1.8V. These are local values of V eff . In one embodiment, an electrochromic device controller or control algorithm provides a driving profile where V eff  is always below 3V, in another embodiment, the controller controls V eff  so that it is always below 2.5V, in another embodiment, the controller controls V eff  so that it is always below 1.8V. Those of ordinary skill in the art will understand that these ranges are applicable to both transitions between optical states of the devices (e.g. transitions from bleached (clear) to tinted and from tinted to bleached in an absorptive device) and that the value of V eff  for a particular transition may be different. The recited voltage values refer to the time averaged voltage (where the averaging time is of the order of time required for small optical response, e.g. few seconds to few minutes). Those of ordinary skill in the art will also understand that this description is applicable to various types of drive mechanism including fixed voltage (fixed DC), fixed polarity (time varying DC) or a reversing polarity (AC, MF, RF power etc. with a DC bias). 
     An added complexity of electrochromic windows is that the current drawn through the window is not fixed over time. Instead, during the initial transition from one state to the other, the current through the device is substantially larger (up to 30× larger) than in the end state when the optical transition is complete. The problem of poor coloration in center of the device is further exacerbated during this initial transition period, as the V eff  at the center is even lower than what it will be at the end of the transition period. 
     Electrochromic device controllers and control algorithms described herein overcome the above-described issues. As mentioned, the applied voltage produces an effective voltage at all locations on the face of the electrochromic device that is within a bracketed range, and the level of voltage applied between the bus bars is significantly greater than the maximum value of V eff  within the bracketed range. 
     In the case of an electrochromic device with a planar bus bar, it can be shown that the V eff  across a device with planar bus bars is generally given by: 
       Δ V (0)= V   app   −RJL   2 /2
 
       Δ V ( L )= V   app   −RJL   2 /2
 
       Δ V ( L/ 2)= V   app −3 RJL   2 /4  Equation 1
 
     where:
 
V app  is the voltage difference applied to the bus bars to drive the electrochromic window;
 
ΔV(0) is V eff  at the bus bar connected to the first transparent conducting layer (in the example below, TEC type TCO);
 
ΔV(L) is V eff  at the bus bar connected to the second transparent conducting layer (in the example below, ITO type TCO);
 
ΔV(L/2) is V eff  at the center of the device, midway between the two planar bus bars;
 
R=transparent conducting layer sheet resistance;
 
J=instantaneous local current density; and
 
L=distance between the bus bars of the electrochromic device.
 
     The transparent conducting layers are assumed to have substantially similar, if not the same, sheet resistance for the calculation. However, those of ordinary skill in the art will appreciate that the applicable physics of the ohmic voltage drop and local effective voltage s 
     apply even if the transparent conducting layers have dissimilar sheet resistances. 
     As noted, certain embodiments pertain to controllers and control algorithms for driving optical transitions in devices having planar bus bars. In such devices, substantially linear bus bars of opposite polarity are disposed at opposite sides of a rectangular or other polygonally shaped electrochromic device. In some embodiments, devices with non-planar bus bars may be employed. Such devices may employ, for example, angled bus bars disposed at vertices of the device. In such devices, the bus bar effective separation distance, L, is determined based on the geometry of the device and bus bars. A discussion of bus bar geometries and separation distances may be found in U.S. patent application Ser. No. 13/452,032, entitled “Angled Bus Bar”, and filed Apr. 20, 2012, which is incorporated herein by reference in its entirety. 
     As R, J or L increase, V eff  across the device decreases, thereby slowing or reducing the device coloration during transition and even in the final optical state. As shown in  FIG.  2   , as the bus bar distance increases from 10 inches to 40 inches the voltage drop across the TEC and ITO layers (curves in upper plot) increases and this causes the V eff  (lower curves) to fall across the device. 
     Thus, using conventional driving algorithms, 10 inch and 20-inch electrochromic windows can be made to switch effectively, while 30-inch windows would have marginal performance in the center and 40-inch windows would not show good performance across the window. This limits scaling of electrochromic technology to larger size windows. 
     Again, referring to Equation 1, the V eff  across the window is at least RJL 2 /2 lower than V app . It has been found that as the resistive voltage drop increases (due to increase in the window size, current draw etc.) some of the loss can be negated by increasing V app  but doing so only to a value that keeps V eff  at the edges of the device below the threshold where reliability degradation would occur. In other words, it has been recognized that both transparent conducting layers experience ohmic drop, and that drop increases with distance from the associated bus bar, and therefore V TCL  decreases with distance from the bus bar for both transparent conductive layers and as a consequence V eff  decreases across the whole electrochromic window. 
     While the applied voltage is increased to a level well above the upper bound of a safe V eff , V eff  in fact never actually approaches this high value of the applied voltage. At locations near the bus bars, the voltage of the attached transparent conductive layers contacting the bus bars is quite high, but at the same location, the voltage of the opposite polarity transparent conductive layers falls reasonably close to the applied potential by the ohmic drop across the faces of the conductive layers. The driving algorithms described herein take this into account. In other words, the voltage applied to the bus bars can be higher than conventionally thought possible. A high V app  provided at bus bars might be assumed to present too high of a V eff  near the bus bars. However, by employing a V app  that accounts for the size of the window and the ohmic drop in the transparent conducting layers, a safe but appropriately high V eff  results over the entire surface of the electrochromic device. The appropriate V app  applied to the bus bars is greater in larger devices than in smaller devices. This is illustrated in more detail in  FIG.  3    and the associated description. 
     Referring to  FIG.  3   , the electrochromic device is driven using control mechanisms that apply V app  so that V eff  remains solidly above the threshold voltage of 1.2V (compare to  FIG.  2   ). The increase in V app  required can be seen in the maximum value of V TCL  increasing from about 2.5V to about 4V. However, this does not lead to increase in the V eff  near the bus bars, where it stays at about 2.4V for all devices. 
       FIG.  4    is a plot comparing a conventional approach in V app  is fixed for devices of different sizes a new approach in which V app  varies for devices of different sizes. By adjusting V app  for device size, the drive algorithms allow the performance (switching speed) of large electrochromic windows to be improved substantially without increasing risk of device degradation, because V eff  is maintained above the threshold voltage in all cases but within a safe range. Drive algorithms tailored for a given window&#39;s metrics, e.g. window size, transparent conductive layer type, Rs, instantaneous current density through the device, etc., allow substantially larger electrochromic windows to function with suitable switching speed not otherwise possible without device degradation. 
     V eff  and V app  Parameters 
     Controlling the upper and lower bounds of the range of V eff  over the entire surface of the electrochromic device will now be further described. As mentioned, when V eff  is too high it damages or degrades the electrochromic device at the location(s) where it is high. The damage or degradation may be manifest as an irreversible electrochromic reaction which can reduce the optical switching range, degradation of aesthetics (appearance of pinholes, localized change in film appearance), increase in leakage current, film delamination etc. For many devices, the maximum value of V eff  is about 4 volts or about 3 volts or about 2.5 volts or about 1.8 volts. In some embodiments, the upper bound of V eff  is chosen to include a buffer range such that the maximum value of V eff  is below the actual value expected to produce degradation. The difference between this actual value and the maximum value of V eff  is the size of the buffer. In certain embodiments, the buffer value is between about 0.2 and 0.6 volts. 
     The lower boundary of the range of effective voltages should be chosen to provide an acceptable and effective transition between optical states of the electrochromic device. This transition may be characterized in terms of the speed at which the transition occurs after the voltage is applied, as well as other effects associated with the transition such as curtaining (non-uniform tinting across the face of the electrochromic device). As an example, the minimum value of V eff  may be chosen to effect a complete optical transition (e.g., fully bleached to fully tinted) over the face of the device of about 45 minutes or less, or about 10 minutes or less. For many devices, the maximum value of V eff  is about 0.5 volts or about 0.7 volts or about 1 volt or about 1.2 volts. 
     For devices having 3 or more states, the target range of V eff  typically will not impact attaining and maintaining intermediate states in a multi-state electrochromic device. Intermediate states are driven at voltages between the end states, and hence V eff  is always maintained within a safe range. 
     As mentioned, for large electrochromic devices the value of V app  may be greater than the maximum acceptable value of V eff . Thus, in some embodiments, V app  is greater (by any amount) than the maximum value of V eff . However, in some implementations, the difference between V app  and the maximum value of V eff  has at least a defined magnitude. For example, the difference may be about 0.5 volts or about 1 volt, or about 1.5 volts, or about 2 volts. It should be understood that the difference between the value of V app  and the maximum value of V eff  is determined in part by the separation distance between the bus bars in the device and possibly other parameters such as the sheet resistance of the device&#39;s transparent conductive layers and leakage current. As an example, if the leakage current of the device is quite low, then the difference between V eff  and V app  may be smaller than it otherwise might be. 
     As noted, the disclosed control algorithms are particularly useful in devices having large dimensions: e.g., large electrochromic windows. Technically, the size is determined by the effective separation distance between bus bars, L. In some embodiments, the devices have a value of L of at least about 30 inches, or at least about 40 inches, or at least about 50 inches or at least about 60 inches. The separation distance is not the only parameter that impacts the need for using an appropriately large value of V app  to drive a transition. Other parameters include the sheet resistances of the transparent conductive layers and the current density in the device during optical switching. In some embodiments, a combination of these and/or other parameters is employed to determine when to apply the large value of V app . The parameters interoperate and collectively indicate whether or not there is a sufficiently large ohmic voltage drop across the face of a transparent conductive layer to require a large applied voltage. 
     In certain embodiments, a combination of parameters (e.g., a dimensionless number) may be used to determine appropriate operating ranges. For example, a voltage loss parameter (V loss ) can be used to define conditions under which a typical control algorithm would not work and the disclosed approach would be well suited to handle. In certain embodiments, the V loss  parameter is defined as RJL 2  (where L is the separation distance between bus bar, and R is the sheet resistance of a transparent conductive layer). In some implementations, the approaches described herein are most useful when V loss  is greater than about 3V or more specifically greater than about 2V or more specifically greater than about 1V. 
     V app  Profile During Transition. 
     The current responsible for the ohmic voltage drop across the face of the transparent conductive layers has two components. It includes ionic current used to drive the optical transition and parasitic electronic current through the electrolyte or ion conducting layer. The parasitic electronic current should be relatively constant for a given value of the applied voltage. It may also be referred to as leakage current. The ionic current is due to the lithium ions moving between the electrochromic layer and a counter electrode layer to drive the optical transition. For a given applied voltage, the ionic current will undergo change during the transition. Prior to application of any V app , the ionic current is small or non-existent. Upon application of V app , the ionic current may grow and may even continue to after the applied voltage is held constant. Eventually, however, the ionic current will peak and drop off as all of the available ions move between the electrodes during the optical transition. After the optical transition is complete, only leakage current (electronic current through the electrolyte) continues. The value of this leakage current is a function of the effective voltage, which is a function of the applied voltage. As described in more detail below, by modifying the applied voltage after the optical transition is complete, the control technique reduces the amount of leakage current and the value of V eff . 
     In some embodiments, the control techniques for driving optical transitions are designed with a varying V app  that keeps the maximum V eff  below a particular level (e.g., 2.5V) during the entire course of the optical transition. In certain embodiments, V app  is varied over time during transition from one state to another of the electrochromic device. The variation in V app  is determined, at least in part, as a function of V eff . In certain embodiments, V app  is adjusted over the time of transition in a manner that maintains an acceptable V eff  so as not to degrade device function. 
     Without adjusting V app  during the optical transition, V eff  could grow too large as the ionic current decays over the course of the transition. To maintain V eff  at a safe level, V app  may be decreased when the device current is largely leakage current. In certain embodiments, adjustment of V app  is accomplished by a “ramp to hold” portion of a drive voltage profile as described below. 
     In certain embodiments, V app  is chosen and adjusted based on the instantaneous current draw (J) during an optical transition. Initially, during such transition, V app  is higher to account for the larger voltage draw.  FIG.  5    shows impact of current draw on V eff  for a fixed window size (40 inches) using conventional drive algorithms. In this example, the drive profile accounts for a medium current draw scenario (25 □A/cm 2 ) which leads to very low V eff  during initial switching when the current draw is high (42 □A/cm 2 ) which leads to substantially longer switching times. In addition, after the transition is complete and the window reaches the low current draw configuration (5 □A/cm 2 ), V eff  is much higher (3.64V) than during transition. Since this is above the voltage threshold of safe operation this would be a long-term reliability risk. 
       FIG.  6    illustrates certain voltage control techniques that consider the instantaneous current draw. In the depicted embodiment, the low current draw and high current draw conditions are now robustly within the required voltage window. Even for the high current draw condition, a large fraction of the device is now above the voltage threshold improving the switching speed of this device. Drive profiles can be simplified by choosing a voltage ramp rate that allows the instantaneous voltage to be close to the desired set point rather than requiring a feedback loop on the voltage. 
       FIG.  7    shows a complete current profile and voltage profile for an electrochromic device employing a simple voltage control algorithm to cause an optical state transition cycle (coloration followed by bleaching) of an electrochromic device. In the graph, total current density (I) is represented as a function of time. As mentioned, the total current density is a combination of the ionic current density associated with an electrochromic transition and electronic leakage current between the electrochemically active electrodes. Many different types electrochomic device will have the depicted current profile. In one example, a cathodic electrochromic material such as tungsten oxide is used in conjunction with an anodic electrochromic material such as nickel tungsten oxide in counter electrode. In such devices, negative currents indicate coloration of the device. In one example, lithium ions flow from a nickel tungsten oxide anodically coloring electrochromic electrode into a tungsten oxide cathodically coloring electrochromic electrode. Correspondingly, electrons flow into the tungsten oxide electrode to compensate for the positively charged incoming lithium ions. Therefore, the voltage and current are shown to have a negative value. 
     The depicted profile results from ramping up the voltage to a set level and then holding the voltage to maintain the optical state. The current peaks  701  are associated with changes in optical state, i.e., coloration and bleaching. Specifically, the current peaks represent delivery of the ionic charge needed to color or bleach the device. Mathematically, the shaded area under the peak represents the total charge required to color or bleach the device. The portions of the curve after the initial current spikes (portions  703 ) represent electronic leakage current while the device is in the new optical state. 
     In the figure, a voltage profile  705  is superimposed on the current curve. The voltage profile follows the sequence: negative ramp ( 707 ), negative hold ( 709 ), positive ramp ( 711 ), and positive hold ( 713 ). Note that the voltage remains constant after reaching its maximum magnitude and during the length of time that the device remains in its defined optical state. Voltage ramp  707  drives the device to its new the colored state and voltage hold  709  maintains the device in the colored state until voltage ramp  711  in the opposite direction drives the transition from colored to bleached states. In some switching algorithms, a current cap is imposed. That is, the current is not permitted to exceed a defined level in order to prevent damaging the device. The coloration speed is a function of not only the applied voltage, but also the temperature and the voltage ramping rate. 
       FIG.  8    describes a voltage control profile in accordance with certain embodiments. In the depicted embodiment, a voltage control profile is employed to drive the transition from a bleached state to a colored state (or to an intermediate state). To drive an electrochromic device in the reverse direction, from a colored state to a bleached state (or from a more colored to less colored state), a similar but inverted profile is used. In some embodiments, the voltage control profile for going from colored to bleached is a mirror image of the one depicted in  FIG.  8   . 
     The voltage values depicted in  FIG.  8    represent the applied voltage (V app ) values. The applied voltage profile is shown by the dashed line. For contrast, the current density in the device is shown by the solid line. In the depicted profile, V app  includes four phases: a ramp to drive phase  803 , which initiates the transition, a V drive  phase  811 , which continues to drive the transition, a ramp to hold phase  815 , and a V hold  phase  817 . The ramp phases are implemented as variations in V app  and the V drive  and V hold  phases provide constant or substantially constant V app  magnitudes. 
     The ramp to drive phase is characterized by a ramp rate (increasing magnitude) and a magnitude of V drive . When the magnitude of the applied voltage reaches V drive , the ramp to drive phase is completed. The V drive  phase is characterized by the value of V drive  as well as the duration of V drive . The magnitude of V drive  may be chosen to maintain V eff  with a safe but effective range over the entire face of the electrochromic device as described above. 
     The ramp to hold phase is characterized by a voltage ramp rate (decreasing magnitude) and the value of V hold  (or optionally the difference between V drive  and \Thom). V app  drops according to the ramp rate until the value of V hold  is reached. The V hold  phase is characterized by the magnitude of V hold  and the duration of V hold . Actually, the duration of V hold  is typically governed by the length of time that the device is held in the colored state (or conversely in the bleached state). Unlike the ramp to drive, V drive , and ramp to hold phases, the V hold  phase has an arbitrary length, which is independent of the physics of the optical transition of the device. 
     Each type of electrochromic device will have its own characteristic phases of the voltage profile for driving the optical transition. For example, a relatively large device and/or one with a more resistive conductive layer will require a higher value of V drive  and possibly a higher ramp rate in the ramp to drive phase. Larger devices may also require higher values of V hold . U.S. patent application Ser. No. 13/449,251, filed Apr. 17, 2012, and incorporated herein by reference discloses controllers and associated algorithms for driving optical transitions over a wide range of conditions. As explained therein, each of the phases of an applied voltage profile (ramp to drive, V drive , ramp to hold, and V hold , herein) may be independently controlled to address real-time conditions such as current temperature, current level of transmissivity, etc. In some embodiments, the values of each phase of the applied voltage profile is set for a particular electrochromic device (having its own bus bar separation, resistivity, etc.) and does vary based on current conditions. In other words, in such embodiments, the voltage profile does not consider feedback such as temperature, current density, and the like. 
     As indicated, all voltage values shown in the voltage transition profile of  FIG.  8    correspond to the V app  values described above. They do not correspond to the V eff  values described above. In other words, the voltage values depicted in  FIG.  8    are representative of the voltage difference between the bus bars of opposite polarity on the electrochromic device. 
     In certain embodiments, the ramp to drive phase of the voltage profile is chosen to safely but rapidly induce ionic current to flow between the electrochromic and counter electrodes. As shown in  FIG.  8   , the current in the device follows the profile of the ramp to drive voltage phase until the ramp to drive portion of the profile ends and the V drive  portion begins. See current phase  801  in  FIG.  8   . Safe levels of current and voltage can be determined empirically or based on other feedback. U.S. Pat. No. 8,254,013, filed Mar. 16, 2011, issued Aug. 28, 2012 and incorporated herein by reference, presents examples of algorithms for maintaining safe current levels during electrochromic device transitions. 
     In certain embodiments, the value of V drive  is chosen based on the considerations described above. Particularly, it is chosen so that the value of V eff  over the entire surface of the electrochromic device remains within a range that effectively and safely transitions large electrochromic devices. The duration of V drive  can be chosen based on various considerations. One of these ensures that the drive potential is held for a period sufficient to cause the substantial coloration of the device. For this purpose, the duration of V drive  may be determined empirically, by monitoring the optical density of the device as a function of the length of time that V drive  remains in place. In some embodiments, the duration of V drive  is set to a specified time period. In another embodiment, the duration of V drive  is set to correspond to a desired amount of ionic charge being passed. As shown, the current ramps down during V drive . See current segment  807 . 
     Another consideration is the reduction in current density in the device as the ionic current decays as a consequence of the available lithium ions completing their journey from the anodic coloring electrode to the cathodic coloring electrode (or counter electrode) during the optical transition. When the transition is complete, the only current flowing across device is leakage current through the ion conducting layer. As a consequence, the ohmic drop in potential across the face of the device decreases and the local values of V eff  increase. These increased values of V eff  can damage or degrade the device if the applied voltage is not reduced. Thus, another consideration in determining the duration of V drive  is the goal of reducing the level of V eff  associated with leakage current. By dropping the applied voltage from V drive  to V hold , not only is V eff  reduced on the face of the device but leakage current decreases as well. As shown in  FIG.  8   , the device current transitions in a segment  805  during the ramp to hold phase. The current settles to a stable leakage current  809  during V hold . 
     Electrochromic Devices and Controllers 
       FIG.  9    shows a cross-sectional axonometric view of an embodiment of an IGU  102  that includes two window panes or lites  216 . In various embodiments, IGU  102  can include one, two, or more substantially transparent (e.g., at no applied voltage) lites  216  as well as a frame,  218 , that supports the lites  216 . For example, the IGU  102  shown in  FIG.  9    is configured as a double-pane window. One or more of the lites  216  can itself be a laminate structure of two, three, or more layers or lites (e.g., shatter-resistant glass similar to automotive windshield glass). In IGU  102 , at least one of the lites  216  includes an electrochromic device or stack,  220 , disposed on at least one of its inner surface,  222 , or outer surface,  224 : for example, the inner surface  222  of the outer lite  216 . 
     In multi-pane configurations, each adjacent set of lites  216  can have an interior volume,  226 , disposed between them. Generally, each of the lites  216  and the IGU  102  as a whole are rectangular and form a rectangular solid. However, in other embodiments other shapes (e.g., circular, elliptical, triangular, curvilinear, convex, concave) may be desired. In some embodiments, the volume  226  between the lites  116  is evacuated of air. In some embodiments, the IGU  102  is hermetically-sealed. Additionally, the volume  226  can be filled (to an appropriate pressure) with one or more gases, such as argon (Ar), krypton (Kr), or xenon (Xn), for example. Filling the volume  226  with a gas such as Ar, Kr, or Xn can reduce conductive heat transfer through the IGU  102  because of the low thermal conductivity of these gases. The latter two gases also can impart improved acoustic insulation due to their increased weight. 
     In some embodiments, frame  218  is constructed of one or more pieces. For example, frame  218  can be constructed of one or more materials such as vinyl, PVC, aluminum (Al), steel, or fiberglass. The frame  218  may also include or hold one or more foam or other material pieces that work in conjunction with frame  218  to separate the lites  216  and to hermetically seal the volume  226  between the lites  216 . For example, in a typical IGU implementation, a spacer lies between adjacent lites  216  and forms a hermetic seal with the panes in conjunction with an adhesive sealant that can be deposited between them. This is termed the primary seal, around which can be fabricated a secondary seal, typically of an additional adhesive sealant. In some such embodiments, frame  218  can be a separate structure that supports the IGU construct. 
     Each lite  216  includes a substantially transparent or translucent substrate,  228 . Generally, substrate  228  has a first (e.g., inner) surface  222  and a second (e.g., outer) surface  224  opposite the first surface  222 . In some embodiments, substrate  228  can be a glass substrate. For example, substrate  228  can be a conventional silicon oxide (SO x )-based glass substrate such as soda-lime glass or float glass, composed of, for example, approximately 75% silica (SiO 2 ) plus Na 2 O, CaO, and several minor additives. However, any material having suitable optical, electrical, thermal, and mechanical properties may be used as substrate  228 . Such substrates also can include, for example, other glass materials, plastics and thermoplastics (e.g., poly(methyl methacrylate), polystyrene, polycarbonate, allyl diglycol carbonate, SAN (styrene acrylonitrile copolymer), poly(4-methyl-1-pentene), polyester, polyamide), or mirror materials. If the substrate is formed from, for example, glass, then substrate  228  can be strengthened, e.g., by tempering, heating, or chemically strengthening. In other implementations, the substrate  228  is not further strengthened, e.g., the substrate is untempered. 
     In some embodiments, substrate  228  is a glass pane sized for residential or commercial window applications. The size of such a glass pane can vary widely depending on the needs of the residence or commercial enterprise. In some embodiments, substrate  228  can be formed of architectural glass. Architectural glass is typically used in commercial buildings, but also can be used in residential buildings, and typically, though not necessarily, separates an indoor environment from an outdoor environment. In certain embodiments, a suitable architectural glass substrate can be at least approximately 20 inches by approximately 20 inches, and can be much larger, for example, approximately 80 inches by approximately 120 inches, or larger. Architectural glass is typically at least about 2 millimeters (mm) thick and may be as thick as 6 mm or more. Of course, electrochromic devices  220  can be scalable to substrates  228  smaller or larger than architectural glass, including in any or all of the respective length, width, or thickness dimensions. In some embodiments, substrate  228  has a thickness in the range of approximately 1 mm to approximately 10 mm. In some embodiments, substrate  228  may be very thin and flexible, such as Gorilla Glass® or Willow™ Glass, each commercially available from Corning, Inc. of Corning, N.Y., these glasses may be less than 1 mm thick, as thin as 0.3 mm thick. 
     Electrochromic device  220  is disposed over, for example, the inner surface  222  of substrate  228  of the outer lite  216  (the pane adjacent the outside environment). In some other embodiments, such as in cooler climates or applications in which the IGUs  102  receive greater amounts of direct sunlight (e.g., perpendicular to the surface of electrochromic device  220 ), it may be advantageous for electrochromic device  220  to be disposed over, for example, the inner surface (the surface bordering the volume  226 ) of the inner pane adjacent the interior environment. In some embodiments, electrochromic device  220  includes a first conductive layer (CL)  230  (often transparent), an electrochromic layer (EC)  232 , an ion conducting layer (IC)  234 , a counter electrode layer (CE)  236 , and a second conductive layer (CL)  238  (often transparent). Again, layers  230 ,  232 ,  234 ,  236 , and  238  are also collectively referred to as electrochromic stack  220 . 
     A power source  240  operable to apply an electric potential (V app ) to the device and produce Very across a thickness of electrochromic stack  220  and drive the transition of the electrochromic device  220  from, for example, a bleached or lighter state (e.g., a transparent, semitransparent, or translucent state) to a colored or darker state (e.g., a tinted, less transparent or less translucent state). In some other embodiments, the order of layers  230 ,  232 ,  234 ,  236 , and  238  can be reversed or otherwise reordered or rearranged with respect to conductive layer  238 . 
     In some embodiments, one or both of first conductive layer  230  and second conductive layer  238  is formed from an inorganic and solid material. For example, first conductive layer  230 , as well as second conductive layer  238 , can be made from a number of different materials, including conductive oxides, thin metallic coatings, conductive metal nitrides, and composite conductors, among other suitable materials. In some embodiments, conductive layers  230  and  238  are substantially transparent at least in the range of wavelengths where electrochromism is exhibited by the electrochromic layer  232 . Transparent conductive oxides include metal oxides and metal oxides doped with one or more metals. For example, metal oxides and doped metal oxides suitable for use as first or second conductive layers  230  and  238  can include indium oxide, indium tin oxide (ITO), doped indium oxide, tin oxide, doped tin oxide, zinc oxide, aluminum zinc oxide, doped zinc oxide, ruthenium oxide, doped ruthenium oxide, among others. As indicated above, first and second conductive layers  230  and  238  are sometimes referred to as “transparent conductive oxide” (TCO) layers. 
     In some embodiments, commercially available substrates, such as glass substrates, already contain a transparent conductive layer coating when purchased. In some embodiments, such a product can be used for both conductive layer  238  and conductive layer  230  collectively. Examples of such glass substrates include conductive layer-coated glasses sold under the trademark TEC Glass™ by Pilkington, of Toledo, Ohio and SUNGATE™ 300 and SUNGATE™ 500 by PPG Industries of Pittsburgh, Pa. Specifically, TEC Glass™ is, for example, a glass coated with a fluorinated tin oxide conductive layer. 
     In some embodiments, first or second conductive layers  230  and  238  can each be deposited by physical vapor deposition processes including, for example, sputtering. In some embodiments, first and second conductive layers  230  and  238  can each have a thickness in the range of approximately 0.01 μm to approximately 1 μm. In some embodiments, it may be generally desirable for the thicknesses of the first and second conductive layers  230  and  238  as well as the thicknesses of any or all of the other layers described below to be individually uniform with respect to the given layer; that is, that the thickness of a given layer is uniform and the surfaces of the layer are smooth and substantially free of defects or other ion traps. 
     A primary function of the first and second conductive layers  230  and  238  is to spread an electric potential provided by a power source  240 , such as a voltage or current source, over surfaces of the electrochromic stack  220  from outer surface regions of the stack to inner surface regions of the stack. As mentioned, the voltage applied to the electrochromic device experiences some Ohmic potential drop from the outer regions to the inner regions as a result of a sheet resistance of the first and second conductive layers  230  and  238 . In the depicted embodiment, bus bars  242  and  244  are provided with bus bar  242  in contact with conductive layer  230  and bus bar  244  in contact with conductive layer  238  to provide electric connection between the voltage or current source  240  and the conductive layers  230  and  238 . For example, bus bar  242  can be electrically coupled with a first (e.g., positive) terminal  246  of power source  240  while bus bar  244  can be electrically coupled with a second (e.g., negative) terminal  248  of power source  240 . 
     In some embodiments, IGU  102  includes a plug-in component  250 . In some embodiments, plug-in component  250  includes a first electrical input  252  (e.g., a pin, socket, or other electrical connector or conductor) that is electrically coupled with power source terminal  246  via, for example, one or more wires or other electrical connections, components, or devices. Similarly, plug-in component  250  can include a second electrical input  254  that is electrically coupled with power source terminal  248  via, for example, one or more wires or other electrical connections, components, or devices. In some embodiments, first electrical input  252  can be electrically coupled with bus bar  242 , and from there with first conductive layer  230 , while second electrical input  254  can be coupled with bus bar  244 , and from there with second conductive layer  238 . The conductive layers  230  and  238  also can be connected to power source  240  with other conventional means as well as according to other means described below with respect to a window controller. For example, as described below with reference to  FIG.  10   , first electrical input  252  can be connected to a first power line while second electrical input  254  can be connected to a second power line. Additionally, in some embodiments, third electrical input  256  can be coupled to a device, system, or building ground. Furthermore, in some embodiments, fourth and fifth electrical inputs/outputs  258  and  260 , respectively, can be used for communication between, for example, a window controller or microcontroller and a network controller. 
     In some embodiments, electrochromic layer  232  is deposited or otherwise formed over first conductive layer  230 . In some embodiments, electrochromic layer  232  is formed of an inorganic and solid material. In various embodiments, electrochromic layer  232  can include or be formed of one or more of a number of electrochromic materials, including electrochemically cathodic or electrochemically anodic materials. For example, metal oxides suitable for use as electrochromic layer  232  can include tungsten oxide (WO 3 ), molybdenum oxide (MoO 3 ), niobium oxide (Nb 2 O 5 ), titanium oxide (TiO 2 ), copper oxide (CuO), iridium oxide (Ir 2 O 3 ), chromium oxide (Cr 2 O 3 ), manganese oxide (Mn 2 O 3 ), vanadium oxide (V 2 O 5 ), nickel oxide (Ni 2 O 3 ), and cobalt oxide (Co 2 O 3 ), among other materials. In some embodiments, electrochromic layer  232  can have a thickness in the range of approximately 0.05 μm to approximately 1 μm. 
     During operation, in response to a voltage generated across the thickness of electrochromic layer  232  by first and second conductive layers  230  and  238 , electrochromic layer  232  transfers or exchanges ions to or from counter electrode layer  236  resulting in the desired optical transitions in electrochromic layer  232 , and in some embodiments, also resulting in an optical transition in counter electrode layer  236 . In some embodiments, the choice of appropriate electrochromic and counter electrode materials governs the relevant optical transitions. 
     In some embodiments, counter electrode layer  236  is formed of an inorganic and solid material. Counter electrode layer  236  can generally include one or more of a number of materials or material layers that can serve as a reservoir of ions when the electrochromic device  220  is in, for example, the transparent state. In some embodiments, counter electrode layer  236  is a second electrochromic layer of opposite polarity as electrochromic layer  232 . For example, when electrochromic layer  232  is formed from an electrochemically cathodic material, counter electrode layer  236  can be formed of an electrochemically anodic material. Examples of suitable materials for the counter electrode layer  236  include nickel oxide (NiO), nickel tungsten oxide (NiWO), nickel vanadium oxide, nickel chromium oxide, nickel aluminum oxide, nickel manganese oxide, nickel magnesium oxide, chromium oxide (Cr 2 O 3 ), manganese oxide (MnO 2 ), and Prussian blue. In some embodiments, counter electrode layer  236  can have a thickness in the range of approximately 0.05 μm to approximately 1 μm. 
     During an electrochromic transition initiated by, for example, application of an appropriate electric potential across a thickness of electrochromic stack  220 , counter electrode layer  236  transfers all or a portion of the ions it holds to electrochromic layer  232 , causing the optical transition in the electrochromic layer  232 . In some embodiments, as for example in the case of a counter electrode layer  236  formed from NiWO, the counter electrode layer  236  also optically transitions with the loss of ions it has transferred to the electrochromic layer  232 . 
     When charge is removed from a counter electrode layer  236  made of NiWO (e.g., ions are transported from the counter electrode layer  236  to the electrochromic layer  232 ), the counter electrode layer  236  will transition in the opposite direction (e.g., from a transparent state to a darkened state). 
     In some embodiments, ion conducting layer  234  serves as a medium through which ions are transported (e.g., in the manner of an electrolyte) when the electrochromic device  220  transitions between optical states. In some embodiments, ion conducting layer  234  is highly conductive to the relevant ions for the electrochromic and the counter electrode layers  232  and  236 , but also has sufficiently low electron conductivity such that negligible electron transfer occurs during normal operation. A thin ion conducting layer  234  with high ionic conductivity permits fast ion conduction and hence fast switching for high performance electrochromic devices  220 . Electronic leakage current passes through layer  234  during device operation. In some embodiments, ion conducting layer  234  can have a thickness in the range of approximately 0.01 μm to approximately 1 μm. 
     In some embodiments, ion conducting layer  234  also is inorganic and solid. For example, ion conducting layer  234  can be formed from one or more silicates, silicon oxides, tungsten oxides, tantalum oxides, niobium oxides, and borates. The silicon oxides include silicon-aluminum-oxide. These materials also can be doped with different dopants, including lithium. Lithium-doped silicon oxides include lithium silicon-aluminum-oxide. 
     In some other embodiments, the electrochromic and the counter electrode layers  232  and  236  are formed immediately adjacent one another, sometimes in direct contact, without separately depositing an ion conducting layer. For example, in some embodiments, electrochromic devices having an interfacial region between first and second conductive electrode layers rather than a distinct ion conducting layer  234  can be utilized. Such devices, and methods of fabricating them, are described in U.S. patent application Ser. Nos. 12/772,055 and 12/772,075, each filed 30 Apr. 2010, and in U.S. patent application Ser. Nos. 12/814,277 and 12/814,279, each filed 11 Jun. 2010, all four of which are titled ELECTROCHROMIC DEVICES and name Zhongchun Wang et al. as inventors. Each of these four applications is incorporated by reference herein in its entirety. 
     In some embodiments, electrochromic device  220  also can include one or more additional layers (not shown), such as one or more passive layers. For example, passive layers used to improve certain optical properties can be included in or on electrochromic device  220 . Passive layers for providing moisture or scratch resistance also can be included in electrochromic device  220 . For example, the conductive layers  230  and  238  can be treated with anti-reflective or protective oxide or nitride layers. Other passive layers can serve to hermetically seal the electrochromic device  220 . 
     Additionally, in some embodiments, one or more of the layers in electrochromic stack  220  can contain some amount of organic material. Additionally, or alternatively, in some embodiments, one or more of the layers in electrochromic stack  220  can contain some amount of liquids in one or more layers. Additionally, or alternatively, in some embodiments, solid state material can be deposited or otherwise formed by processes employing liquid components such as certain processes employing sol-gels or chemical vapor deposition. 
     Additionally, transitions between a bleached or transparent state and a colored or opaque state are but one example, among many, of an optical or electrochromic transition that can be implemented. Unless otherwise specified herein (including the foregoing discussion), whenever reference is made to a bleached-to-opaque transition (or to and from intermediate states in between), the corresponding device or process described encompasses other optical state transitions such as, for example, intermediate state transitions such as percent transmission (% T) to % T transitions, non-reflective to reflective transitions (or to and from intermediate states in between), bleached to colored transitions (or to and from intermediate states in between), and color to color transitions (or to and from intermediate states in between). Further, the term “bleached” may refer to an optically neutral state, for example, uncolored, transparent or translucent. Still further, unless specified otherwise herein, the “color” of an electrochromic transition is not limited to any particular wavelength or range of wavelengths. 
     Generally, the colorization or other optical transition of the electrochromic material in electrochromic layer  232  is caused by reversible ion insertion into the material (for example, intercalation) and a corresponding injection of charge-balancing electrons. Typically, some fraction of the ions responsible for the optical transition is irreversibly bound up in the electrochromic material. Some or all of the irreversibly bound ions can be used to compensate “blind charge” in the material. In some embodiments, suitable ions include lithium ions (Li+) and hydrogen ions (H+) (i.e., protons). In some other embodiments, however, other ions can be suitable. Intercalation of lithium ions, for example, into tungsten oxide (WO 3-y  (0&lt;y≤˜0.3)) causes the tungsten oxide to change from a transparent (e.g., bleached) state to a blue (e.g., colored) state. 
     In particular embodiments described herein, the electrochromic device  220  reversibly cycles between a transparent state and an opaque or tinted state. In some embodiments, when the device is in a transparent state, a potential is applied to the electrochromic stack  220  such that available ions in the stack reside primarily in the counter electrode layer  236 . When the magnitude of the potential on the electrochromic stack  220  is reduced or its polarity reversed, ions are transported back across the ion conducting layer  234  to the electrochromic layer  232  causing the electrochromic material to transition to an opaque, tinted, or darker state. In certain embodiments, layers  232  and  236  are complementary coloring layers; that is, for example, when ions are transferred into the counter electrode layer it is not colored. Similarly, when or after the ions are transferred out of the electrochromic layer it is also not colored. But when the polarity is switched, or the potential reduced, however, and the ions are transferred from the counter electrode layer into the electrochromic layer, both the counter electrode and the electrochromic layers become colored. 
     In some other embodiments, when the device is in an opaque state, a potential is applied to the electrochromic stack  220  such that available ions in the stack reside primarily in the counter electrode layer  236 . In such embodiments, when the magnitude of the potential on the electrochromic stack  220  is reduced or its polarity reversed, ions are transported back across the ion conducting layer  234  to the electrochromic layer  232  causing the electrochromic material to transition to a transparent or lighter state. These layers may also be complementary coloring. 
     The optical transition driving logic can be implemented in many different controller configurations and coupled with other control logic. Various examples of suitable controller design and operation are provided in the following patent applications, each incorporated herein by reference in its entirety: U.S. patent application Ser. No. 13/049,623, filed Mar. 16, 2011; U.S. patent application Ser. No. 13/049,756, filed Mar. 16, 2011; U.S. Pat. No. 8,213,074, filed Mar. 16, 2011; U.S. patent application Ser. No. 13/449,235, filed Apr. 17, 2012; U.S. patent application Ser. No. 13/449,248, filed Apr. 17, 2012; U.S. patent application Ser. No. 13/449,251, filed Apr. 17, 2012; and U.S. patent application Ser. No. 13/326,168, filed Dec. 14, 2011. The following description and associated figures,  FIGS.  9  and  10   , present certain non-limiting controller design options suitable for implementing the drive profiles described herein. 
     In some embodiments, electrical input  252  and electrical input  254  receive, carry, or transmit complementary power signals. In some embodiments, electrical input  252  and its complement electrical input  254  can be directly connected to the bus bars  242  and  244 , respectively, and on the other side, to an external power source that provides a variable DC voltage (e.g., sign and magnitude). The external power source can be a window controller (see element  114  of  FIG.  10   ) itself, or power from a building transmitted to a window controller or otherwise coupled to electrical inputs  252  and  254 . In such an embodiment, the electrical signals transmitted through electrical inputs/outputs  258  and  260  can be directly connected to a memory device to allow communication between the window controller and the memory device. Furthermore, in such an embodiment, the electrical signal input to electrical input  256  can be internally connected or coupled (within IGU  102 ) to either electrical input  252  or  254  or to the bus bars  242  or  244  in such a way as to enable the electrical potential of one or more of those elements to be remotely measured (sensed). This can allow the window controller to compensate for a voltage drop on the connecting wires from the window controller to the electrochromic device  220 . 
     In some embodiments, the window controller can be immediately attached (e.g., external to the IGU  102  but inseparable by the user) or integrated within the IGU  102 . For example, U.S. patent application Ser. No. 13/049,750 (Attorney Docket No. SLDMP008) naming Brown et al. as inventors, titled ONBOARD CONTROLLER FOR MULTISTATE WINDOWS and filed 16 Mar. 2011, incorporated by reference herein, describes in detail various embodiments of an “onboard” controller. In such an embodiment, electrical input  252  can be connected to the positive output of an external DC power source. Similarly, electrical input  254  can be connected to the negative output of the DC power source. As described below, however, electrical inputs  252  and  254  can, alternately, be connected to the outputs of an external low voltage AC power source (e.g., a typical 24 V AC transformer common to the HVAC industry). In such an embodiment, electrical inputs/outputs  258  and  260  can be connected to the communication bus between the window controller and a network controller. In this embodiment, electrical input/output  256  can be eventually (e.g., at the power source) connected with the earth ground (e.g., Protective Earth, or PE in Europe) terminal of the system. 
     Although the voltages plotted in  FIGS.  7  and  8    may be expressed as DC voltages, in some embodiments, the voltages actually supplied by the external power source are AC voltage signals. In some other embodiments, the supplied voltage signals are converted to pulse-width modulated voltage signals. However, the voltages actually “seen” or applied to the bus bars  242  and  244  are effectively DC voltages. Typically, the voltage oscillations applied at terminals  246  and  248  are in the range of approximately 1 Hz to 1 MHz, and in particular embodiments, approximately 100 kHz. In various embodiments, the oscillations have asymmetric residence times for the darkening (e.g., tinting) and lightening (e.g., bleaching) portions of a period. For example, in some embodiments, transitioning from a first less transparent state to a second more transparent state requires more time than the reverse; that is, transitioning from the more transparent second state to the less transparent first state. As will be described below, a controller can be designed or configured to apply a driving voltage meeting these requirements. 
     The oscillatory applied voltage control allows the electrochromic device  220  to operate in, and transition to and from, one or more states without any necessary modification to the electrochromic device stack  220  or to the transitioning time. Rather, the window controller can be configured or designed to provide an oscillating drive voltage of appropriate wave profile, considering such factors as frequency, duty cycle, mean voltage, amplitude, among other possible suitable or appropriate factors. Additionally, such a level of control permits the transitioning to any state over the full range of optical states between the two end states. For example, an appropriately configured controller can provide a continuous range of transmissivity (% T) which can be tuned to any value between end states (e.g., opaque and bleached end states). 
     To drive the device to an intermediate state using the oscillatory driving voltage, a controller could simply apply the appropriate intermediate voltage. However, there can be more efficient ways to reach the intermediate optical state. This is partly because high driving voltages can be applied to reach the end states but are traditionally not applied to reach an intermediate state. One technique for increasing the rate at which the electrochromic device  220  reaches a desired intermediate state is to first apply a high voltage pulse suitable for full transition (to an end state) and then back off to the voltage of the oscillating intermediate state (just described). Stated another way, an initial low frequency single pulse (low in comparison to the frequency employed to maintain the intermediate state) of magnitude and duration chosen for the intended final state can be employed to speed the transition. After this initial pulse, a higher frequency voltage oscillation can be employed to sustain the intermediate state for as long as desired. 
     In some embodiments, each IGU  102  includes a component  250  that is “pluggable” or readily-removable from IGU  102  (e.g., for ease of maintenance, manufacture, or replacement). In some particular embodiments, each plug-in component  250  itself includes a window controller. That is, in some such embodiments, each electrochromic device  220  is controlled by its own respective local window controller located within plug-in component  250 . In some other embodiments, the window controller is integrated with another portion of frame  218 , between the glass panes in the secondary seal area, or within volume  226 . In some other embodiments, the window controller can be located external to IGU  102 . In various embodiments, each window controller can communicate with the IGUs  102  it controls and drives, as well as communicate to other window controllers, the network controller, BMS, or other servers, systems, or devices (e.g., sensors), via one or more wired (e.g., Ethernet) networks or wireless (e.g., WiFi) networks, for example, via wired (e.g., Ethernet) interface  263  or wireless (WiFi) interface  265 . See  FIG.  10   . Embodiments having Ethernet or WiFi capabilities are also well-suited for use in residential homes and other smaller-scale non-commercial applications. Additionally, the communication can be direct or indirect, e.g., via an intermediate node between a master controller such as network controller  112  and the IGU  102 . 
       FIG.  10    depicts a window controller  114 , which may be deployed as, for example, component  250 . In some embodiments, window controller  114  communicates with a network controller over a communication bus  262 . For example, communication bus  262  can be designed according to the Controller Area Network (CAN) vehicle bus standard. In such embodiments, first electrical input  252  can be connected to a first power line  264  while second electrical input  254  can be connected to a second power line  266 . In some embodiments, as described above, the power signals sent over power lines  264  and  266  are complementary; that is, collectively they represent a differential signal (e.g., a differential voltage signal). In some embodiments, line  268  is coupled to a system or building ground (e.g., an Earth Ground). In such embodiments, communication over CAN bus  262  (e.g., between microcontroller  274  and network controller  112 ) may proceed along first and second communication lines  270  and  272  transmitted through electrical inputs/outputs  258  and  260 , respectively, according to the CANopen communication protocol or other suitable open, proprietary, or overlying communication protocol. In some embodiments, the communication signals sent over communication lines  270  and  272  are complementary; that is, collectively they represent a differential signal (e.g., a differential voltage signal). 
     In some embodiments, component  250  couples CAN communication bus  262  into window controller  114 , and in particular embodiments, into microcontroller  274 . In some such embodiments, microcontroller  274  is also configured to implement the CANopen communication protocol. Microcontroller  274  is also designed or configured (e.g., programmed) to implement one or more drive control algorithms in conjunction with pulse-width modulated amplifier or pulse-width modulator (PWM)  276 , smart logic  278 , and signal conditioner  280 . In some embodiments, microcontroller  274  is configured to generate a command signal V COMMAND , e.g., in the form of a voltage signal, that is then transmitted to PWM  276 . PWM  276 , in turn, generates a pulse-width modulated power signal, including first (e.g., positive) component V PW1  and second (e.g., negative) component V PW2 , based on V COMMAND . Power signals V PW1  and V PW2  are then transmitted over, for example, interface  288 , to IGU  102 , or more particularly, to bus bars  242  and  244  in order to cause the desired optical transitions in electrochromic device  220 . In some embodiments, PWM  276  is configured to modify the duty cycle of the pulse-width modulated signals such that the durations of the pulses in signals V PW1  and V PW2  are not equal: for example, PWM  276  pulses V PW1  with a first 60% duty cycle and pulses V PW2  for a second 40% duty cycle. The duration of the first duty cycle and the duration of the second duty cycle collectively represent the duration, t PWM  of each power cycle. In some embodiments, PWM  276  can additionally or alternatively modify the magnitudes of the signal pulses V PW1  and V PW2 . 
     In some embodiments, microcontroller  274  is configured to generate V COMMAND  based on one or more factors or signals such as, for example, any of the signals received over CAN bus  262  as well as voltage or current feedback signals, V FB  and I FB  respectively, generated by PWM  276 . In some embodiments, microcontroller  274  determines current or voltage levels in the electrochromic device  220  based on feedback signals I FB  or V FB , respectively, and adjusts V COMMAND  according to one or more rules or algorithms to effect a change in the relative pulse durations (e.g., the relative durations of the first and second duty cycles) or amplitudes of power signals V PW1  and V PW2  to produce voltage profiles as described above. Additionally, or alternatively, microcontroller  274  can also adjust V COMMAND  in response to signals received from smart logic  278  or signal conditioner  280 . For example, a conditioning signal V CON  can be generated by signal conditioner  280  in response to feedback from one or more networked or non-networked devices or sensors, such as, for example, an exterior photosensor or photodetector  282 , an interior photosensor or photodetector  284 , a thermal or temperature sensor  286 , or a tint command signal V TC . For example, additional embodiments of signal conditioner  280  and V CON  are also described in U.S. patent application Ser. No. 13/449,235, filed 17 Apr. 2012, and previously incorporated by reference. 
     In certain embodiments, V TC  can be an analog voltage signal between 0 V and 10 V that can be used or adjusted by users (such as residents or workers) to dynamically adjust the tint of an IGU  102  (for example, a user can use a control in a room or zone of building  104  similarly to a thermostat to finely adjust or modify a tint of the IGUs  102  in the room or zone) thereby introducing a dynamic user input into the logic within microcontroller  274  that determines V COMMAND . For example, when set in the 0 to 2.5 V range, V TC  can be used to cause a transition to a 5% T state, while when set in the 2.51 to 5 V range, V TC  can be used to cause a transition to a 20% T state, and similarly for other ranges such as 5.1 to 7.5 V and 7.51 to 10 V, among other range and voltage examples. In some embodiments, signal conditioner  280  receives the aforementioned signals or other signals over a communication bus or interface  290 . In some embodiments, PWM  276  also generates V COMMAND  based on a signal V SMART  received from smart logic  278 . In some embodiments, smart logic  278  transmits V SMART  over a communication bus such as, for example, an Inter-Integrated Circuit (I 2 C) multi-master serial single-ended computer bus. In some other embodiments, smart logic  278  communicates with memory device  292  over a 1-WIRE device communications bus system protocol (by Dallas Semiconductor Corp., of Dallas, Tex.). 
     In some embodiments, microcontroller  274  includes a processor, chip, card, or board, or a combination of these, which includes logic for performing one or more control functions. Power and communication functions of microcontroller  274  may be combined in a single chip, for example, a programmable logic device (PLD) chip or field programmable gate array (FPGA), or similar logic. Such integrated circuits can combine logic, control and power functions in a single programmable chip. In one embodiment, where one lite  216  has two electrochromic devices  220  (e.g., on opposite surfaces) or where IGU  102  includes two or more lites  216  that each include an electrochromic device  220 , the logic can be configured to control each of the two electrochromic devices  220  independently from the other. However, in one embodiment, the function of each of the two electrochromic devices  220  is controlled in a synergistic fashion, for example, such that each device is controlled in order to complement the other. For example, the desired level of light transmission, thermal insulative effect, or other property can be controlled via a combination of states for each of the individual electrochromic devices  220 . For example, one electrochromic device may be placed in a colored state while the other is used for resistive heating, for example, via a transparent electrode of the device. In another example, the optical states of the two electrochromic devices are controlled so that the combined transmissivity is a desired outcome. 
     In general, the logic used to control electrochromic device transitions can be designed or configured in hardware and/or software. In other words, the instructions for controlling the drive circuitry may be hard coded or provided as software. In may be said that the instructions are provided by “programming”. Such programming is understood to include logic of any form including hard coded logic in digital signal processors and other devices which have algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may be executed on a general-purpose processor. In some embodiments, instructions for controlling application of voltage to the bus bars are stored on a memory device associated with the controller or are provided over a network. Examples of suitable memory devices include semiconductor memory, magnetic memory, optical memory, and the like. The computer program code for controlling the applied voltage can be written in any conventional computer readable programming language such as assembly language, C, C++, Pascal, Fortran, and the like. Compiled object code or script is executed by the processor to perform the tasks identified in the program. 
     As described above, in some embodiments, microcontroller  274 , or window controller  114  generally, also can have wireless capabilities, such as wireless control and powering capabilities. For example, wireless control signals, such as radio-frequency (RF) signals or infra-red (IR) signals can be used, as well as wireless communication protocols such as WiFi (mentioned above), Bluetooth, Zigbee, EnOcean, among others, to send instructions to the microcontroller  274  and for microcontroller  274  to send data out to, for example, other window controllers, a network controller  112 , or directly to a BMS  111 . In various embodiments, wireless communication can be used for at least one of programming or operating the electrochromic device  220 , collecting data or receiving input from the electrochromic device  220  or the IGU  102  generally, collecting data or receiving input from sensors, as well as using the window controller  114  as a relay point for other wireless communications. Data collected from IGU  102  also can include count data, such as a number of times an electrochromic device  220  has been activated (cycled), an efficiency of the electrochromic device  220  over time, among other useful data or performance metrics. 
     The window controller  114  also can have wireless power capability. For example, window controller can have one or more wireless power receivers that receive transmissions from one or more wireless power transmitters as well as one or more wireless power transmitters that transmit power transmissions enabling window controller  114  to receive power wirelessly and to distribute power wirelessly to electrochromic device  220 . Wireless power transmission includes, for example, induction, resonance induction, RF power transfer, microwave power transfer, and laser power transfer. For example, U.S. patent application Ser. No. 12/971,576 (Attorney Docket No. SLDMP003) naming Rozbicki as inventor, titled WIRELESS POWERED ELECTROCHROMIC WINDOWS and filed 17 Dec. 2010, incorporated by reference herein, describes in detail various embodiments of wireless power capabilities. 
     In order to achieve a desired optical transition, the pulse-width modulated power signal is generated such that the positive component V PW1  is supplied to, for example, bus bar  244  during the first portion of the power cycle, while the negative component V PW2  is supplied to, for example, bus bar  242  during the second portion of the power cycle. 
     In some cases, depending on the frequency (or inversely the duration) of the pulse-width modulated signals, this can result in bus bar  244  floating at substantially the fraction of the magnitude of V PW1  that is given by the ratio of the duration of the first duty cycle to the total duration t PWM  of the power cycle. Similarly, this can result in bus bar  242  floating at substantially the fraction of the magnitude of V PW2  that is given by the ratio of the duration of the second duty cycle to the total duration t PWM  of the power cycle. In this way, in some embodiments, the difference between the magnitudes of the pulse-width modulated signal components V PW1  and V PW2  is twice the effective DC voltage across terminals  246  and  248 , and consequently, across electrochromic device  220 . Said another way, in some embodiments, the difference between the fraction (determined by the relative duration of the first duty cycle) of V PW1  applied to bus bar  244  and the fraction (determined by the relative duration of the second duty cycle) of V PW2  applied to bus bar  242  is the effective DC voltage V EFF  applied to electrochromic device  220 . The current IEFF through the load—electrochromic device  220 — is roughly equal to the effective voltage VEFF divided by the effective resistance (represented by a resistor network comprising resistor  418 ,  422 , and  448 ) or impedance of the load. 
       FIGS.  11 A and  11 B  show current and voltage profiles resulting from a control method in accordance with certain embodiments.  FIG.  11 C  provides an associated flow chart for an initial portion (the controlled current portion) of the control sequence. For purposes of discussion, the negative current shown in these figures, as in  FIG.  7   , is assumed to drive the bleached to colored transition. Of course, the example could apply equally to devices that operate in reverse, i.e., devices employing anodic electrochromic electrodes. 
     In an example, the following procedure is followed: 
     1. At time  0 —Ramp the voltage at a rate intended to correspond to a current level “I target”  301 . See block  1151  of  FIG.  11 C . See also a voltage ramp  1103  in  FIG.  11 A . I target may be set a priori for the device in question—independent of temperature. As mentioned, the control method described here may be beneficially implemented without knowing or inferring the device&#39;s temperature. In alternative embodiments, the temperature is detected and considered in setting the current level. In some cases, temperature may be inferred from the current-voltage response of the window. 
     In some examples, the ramp rate is between about 10 μV/s and 100V/s. In more other examples, the ramp rate is between about 1 mV/s_and_500 mV/s. 
     2. Immediately after to, typically within a few milliseconds, the controller determines the current level resulting from application of voltage in operation  1  and compares it against a range of acceptable currents bounded by I slow  at the lower end and I safe  at the upper end. I safe  is the current level above which the device can become damaged or degraded. I slow  is the current level below which the device will switch at an unacceptably slow rate. As an example, I target  in an electrochomic window may be between about 30 and 70 μA/cm 2 . Further, typical examples of I slow  range between about 1 and 30 μA/cm 2  and examples of I safe  range between about 70 and 250 μA/cm 2 . 
     The voltage ramp is set, and adjusted as necessary, to control the current and typically produces a relatively consistent current level in the initial phase of the control sequence. This is illustrated by the flat current profile  1101  as shown in  FIGS.  11 A and  11 B , which is bracketed between levels I safe    1107  and I slow    1109 . 
     3. Depending upon the results of the comparison in step  2 , the control method employs one of the operations (a)-(c) below. Note that the controller not only checks current level immediately after to, but it frequently checks the current level thereafter and makes adjustments as described here and as shown in  FIG.  11 C . 
     a. The measured current is between I slow  and I safe →Continue to apply a voltage that maintains the current between I slow  and I safe . See the loop defined by blocks  1153 ,  1155 ,  1159 ,  1169 , and  1151  of  FIG.  11 C . 
     b. The measured current is below I slow  (typically because the device temperature is low)→continue to ramp the applied voltage in order to bring the current above I slow  but below I safe . See the loop of block  1153  and  1151  of  FIG.  11 C . If the current level is too low, it may be appropriate to increase the rate of increase of the voltage (i.e., increase the steepness of the voltage ramp). 
     As indicated, the controller typically actively monitors current and voltage to ensure that the applied current remains above I slow . In one example, the controller checks the current and/or voltage every few milliseconds. It may adjust the voltage on the same time scale. The controller may also ensure that the new increased level of applied voltage remains below V safe . V safe  is the maximum applied voltage magnitude, beyond which the device may become damaged or degraded. 
     c. The measured current is above I safe  (typically because the device is operating at a high temperature)→decrease voltage (or rate of increase in the voltage) in order to bring the current below I safe  but above I slow . See block  1155  and  1157  of  FIG.  11 C . As mentioned, the controller may actively monitor current and voltage. As such, the controller can quickly adjust the applied voltage to ensure that the current remains below I safe  during the entire controlled current phase of the transition. Thus, the current should not exceed I safe . 
     As should be apparent, the voltage ramp  303  may be adjusted or even stopped temporarily as necessary to maintain the current between I slow  and I safe . For example, the voltage ramp may be stopped, reversed in direction, slowed in rate, or increased in rate while in the controlled current regime. 
     In other embodiments, the controller increases and/or decreases current, rather than voltage, as desired. Hence the above discussion should not be viewed as limiting to the option of ramping or otherwise controlling voltage to maintain current in the desired range. Whether voltage or current is controlled by the hardware (potentiostatic or galvanostatic control), the algorithm attains the desired result. 
     4. Maintain current in the target range, between I slow  and I safe  until a specified criterion is met. In one example, the criterion is passing current for a defined length of time, t 1 , at which time the device reaches a defined voltage V 1 . Upon achieving this condition, the controller transitions from controlled current to controlled voltage. See blocks  1159  and  1161  of  FIG.  11 C . Note that V 1  is a function of temperature, but as mentioned temperature need not be monitored or even detected in accordance with various embodiments. 
     In certain embodiments t 1  is about 1 to 30 minutes, and in some examples, t 1  is about 2 to 5 minutes. Further, in some cases the magnitude of V 1  is about 1 to 7 volts, and more specifically about 2.5 to 4 volts. 
     As mentioned the controller continues in the controlled current phase until a specified condition is met such as the passing of a defined period of time. In this example, a timer is used to trigger the transition. In other examples, the specified condition is reaching a defined voltage (e.g., a maximum safe voltage) or passing of a defined amount of charge. 
     Operations  1 - 4  correspond to regime  1  in the above general algorithm—controlled current. The goal during this phase is to prevent the current from exceeding a safe level while ensuring a reasonably rapid switching speed. It is possible that during this regime, the controller could supply a voltage exceeding the maximum safe voltage for the electrochromic device. In certain embodiments, this concern is eliminated by employing a control algorithm in which the maximum safe value is much greater than V 1  across the operational temperature range. In some examples, I target  and t 1  are chosen such that V 1  is well below the maximum voltage at lower temperatures while not degrading the window due to excessive current at higher temperatures. In some embodiments, the controller includes a safety feature that will alarm the window before the maximum safe voltage is reached. In a typical example, the value of the maximum safe voltage for an electrochromic window is between about 5 and 9 volts. 
     5. Maintain the voltage at a defined level V 2  until another specified condition is met such as reaching a time t 2 . See voltage segment  1113  in  FIG.  11 A . Typically, the time t 2  or other specified condition is chosen such that a desired amount charge is passed sufficient to cause the desired change in coloration. In one example, the specified condition is passage of a pre-specified amount of charge. During this phase, the current may gradually decrease as illustrated by current profile segment  1115  in  FIGS.  11 A and  11 B . In an embodiment, V 2 =V 1 , as is shown in  FIG.  11 A . 
     This operation  5  corresponds to the regime  2  above—controlled voltage. A goal during this phase is to maintain the voltage at V 1  for a sufficient length to ensure a desired coloration speed. 
     In certain embodiments t 2  is about 2 to 30 minutes, and in some instances, t 2  is about 3 to 10 minutes. Further, in some cases V 2  is about 1 to 7 volts, and more specifically about 2.5 to 4 volts. 
     6. After the condition of step  5  is reached (e.g., after sufficient charge has passed or a timer indicates t 2  has been reached), the voltage is dropped from V 2  to a level V 3 . This reduces leakage current during while the coloration state is held. In one or more embodiments, the transition time t 2  is predetermined and chosen based on the time required for the center of the part, which is the slowest to color, to reach a certain percent transmissivity. In some embodiments, the t 2  is between about 4 and 6 minutes. This operation  6  corresponds to regime  3  above. 
     The following table presents an example of the algorithm described above. 
     
       
         
           
               
               
               
               
               
               
               
             
               
                   
               
               
                   
                   
                   
                 Variable 
                 Fixed 
                   
                 End 
               
               
                 Time 
                 Current 
                 Voltage 
                 parameter 
                 parameter 
                 Constraints 
                 Condition 
               
               
                   
               
             
            
               
                 0 
                 0 
                 0 
                   
                   
                 None 
                   
               
               
                 t 0  to t 1   
                 I 0  =  
                 V 0  to V 1   
                 V 0 , V 1   
                 t 1 , I target   
                 I slow  &lt;  
                 t &gt; t 1   
               
               
                   
                 I target   
                   
                   
                   
                 I 0  &lt; I safe   
                   
               
               
                 t 1  to t 2   
                 I 1  to I 2   
                 V 2  = V 1   
                 I 2   
                 t 2 , V 2   
                 None 
                 t &gt; t 2   
               
               
                 t 2  to t 3   
                 I 2  to I 3   
                 V 3   
                 I 3   
                 V 3   
                 None 
                 State change 
               
               
                   
                   
                   
                   
                   
                   
                 request 
               
               
                   
               
            
           
         
       
     
     Definition of Parameters: 
     I 0 —targeted current value between I slow  and I safe    
     V 0 —voltage corresponding to current I 0    
     T 0 —time at which current=I 0 . 
     I 1 —current at time t 1 . I 1 =I 0    
     V 1 —voltage at time t 1 . Voltage ramps from V 0  to V 1  between t 0  and t 1  and is a function of temperature. 
     t 1 —time for which current is maintained between I slow  and I safe  (e.g., about 3-4 minutes) 
     I 2 —current at time t 2 . Current decays from I 1  to I 2  when voltage is maintained at V 1 . 
     V 2 —voltage at time t 2 . V 1 =V 2 . 
     t 2 —time until which voltage V 1  is maintained. May be between about 4 to 6 min from t 1 . After t 2  the voltage is dropped from V 2  to V 3    
     V 3 —hold voltage between t 2  and t 3 . 
     I 3 —current corresponding to voltage V 3 . 
     t 3 —time at which state change request is received. 
     OTHER EMBODIMENTS 
     Although the foregoing embodiments have been described in some detail to facilitate understanding, the described embodiments are to be considered illustrative and not limiting. It will be apparent to one of ordinary skill in the art that certain changes and modifications can be practiced within the scope of the appended claims. For example, while the drive profiles have been described with reference to electrochromic devices having planar bus bars, they apply to any bus bar orientation in which bus bars of opposite polarity are separated by distances great enough to cause a significant ohmic voltage drop in a transparent conductor layer from one bus bar to another. Further, while the drive profiles have been described with reference to electrochromic devices, they can be applied to other devices in which bus bars of opposite polarity are disposed at opposite sides of the devices.