Patent Publication Number: US-11649796-B2

Title: Ignition drive module, ignition drive circuit and ignition control system

Description:
FIELD OF THE INVENTION 
     The present invention relates to an ignition drive module. 
     BACKGROUND OF THE INVENTION 
     In the automobile engine ignition system, the ignition coil is an executive component that provides ignition energy for igniting the air and fuel mixture in the engine cylinder. It is a special pulse booster based on the principle of electromagnetic induction. The low voltage is turned on and off according to the set frequency to make the secondary produce a voltage of 20-40 KV through the spark plug to produce an electric spark. Due to the precise nature of ignition coils, ignition coils with different performances need to be matched with dedicated drive circuits to meet functional requirements. 
     SUMMARY OF THE INVENTION 
     The object of the invention is to provide an ignition drive module with stable performance and reliable function. 
     To obtain one or more of these objects, the present invention provides an ignition drive module, comprising a module signal input end, a voltage input end, a module signal output end, and a comparator, one end of which is connected to the module signal input end, and the other end is connected to a comparison resistance R that is grounded; and the ignition drive module further comprises a maximum dwell timer module connected to the comparator, a logical judgment module connected to the comparator, and an IGBT module connected to the logical judgment module which receives the signals from the maximum dwell timer module and the comparator to determine whether to activate the IGBT module whose output end is connected to the module signal output end. 
     Preferably, it comprises a peak filter connected to the output end of the comparator to filter the input positive or negative peak value less than preset time Ts. 
     Preferably, it comprises a dwell time input end connected to the maximum dwell timer module, the maximum dwell time of which can be modified by setting the dwell time capacitor. 
     Preferably, the dwell time input end is provided with a dwell time capacitor. 
     Preferably, a hard-off switch is arranged between the maximum dwell timer module and the dwell time input end, one end of which is connected to the IGBT module so that the hard-off switch is turned on to turn off the IGBT module. 
     Preferably, the value of the comparison resistance R is 450Ω. 
     According to another aspect, the present invention provides an ignition drive circuit comprising the ignition drive module, and a triode connected to the module signal output end, wherein the base of the triode is connected to the module signal output end and the collector of the triode is connected to an ignition coil. 
     Preferably, the emitter of the triode is grounded through a sensing resistor and the ignition drive module is provided with a sensing voltage input end which is connected to the emitter of the triode. 
     Preferably, the ignition coil comprises a primary coil and a secondary coil, and one end of the primary coil is connected to the base of the triode, and the other end is connected to the voltage input ends. 
     According to yet another aspect, the present invention provides an ignition control system, comprising an ECU and the ignition drive circuit, and one port of the ECU is connected to the module signal input end, and another port of the ECU is connected to the collector of the IGBT module. 
     By adopting the technical scheme, the present invention is an ignition drive module with stable performance and reliable function. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Other aspects and advantages of the present invention will become clear from the following detailed description taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the invention. 
         FIG.  1    is a block diagram of the preferred embodiment of the circuit structure of the ignition drive module according to the invention. 
         FIG.  2    is a schematic diagram of a typical application of an ignition drive circuit. 
         FIG.  3    is a schematic diagram of the ignition drive module of PIN connection. 
         FIG.  4    is a schematic diagram of the relationship between the dwell time and the hard shutdown (HSD) of the ignition drive circuit. 
         FIG.  5    is a schematic diagram of the current flag output of the ignition drive circuit according to the invention. 
         FIG.  6    is a schematic diagram of the relationship between the CSSD capacitor and the maximum dwell time of the ignition driving circuit. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The detailed description of the preferred embodiment according to the invention is given below with the accompanying drawings so that the benefits and features of the present invention are understood for those skilled in the art. 
     Referring to  FIG.  1    and  FIG.  2   ,  FIG.  1    is a block diagram of the preferred embodiment of the circuit structure of the ignition drive module according to the invention, and  FIG.  2    is a schematic diagram of a typical application of an ignition drive circuit. An ignition control system with stable performance and reliable function comprises an ECU and an ignition drive circuit. One port of the ECU is connected to a module signal input end, and another port of the ECU is connected to a collector of the IGBT module. 
     The ignition drive circuit comprises an ignition drive module and a triode connected to the module signal output end. The base of the triode is connected to the module signal output end and the collector of the triode is connected to an ignition coil. The emitter of the triode is grounded through a sensing resistor and the ignition drive module is provided with a sensing voltage input end which is connected to the emitter of the triode. The ignition coil comprises a primary coil and a secondary coil. One end of the primary coil is connected to the base of the triode and the other end is connected to the voltage input ends. 
     The ignition drive module (CIM2001) comprises a module signal input end, a voltage input end, a module signal output end, a comparator connected to the module signal input end, a maximum dwell timer module connected to the comparator, a logical judgment module connected to the comparator, and an IGBT module connected to the logical judgment module. The logical judgment module receives signals from the maximum dwell timer module and the comparator to determine whether to activate the IGBT module. The output end of the IGBT module is connected to the module signal output end, and the other end of the comparator is connected to a comparison resistance R that is grounded. 
     The ignition drive module comprises a peak filter connected to the output end of the comparator so as to filter the input positive or negative peak value less than preset time Ts. 
     The ignition drive module comprises a dwell time input end connected to the maximum dwell timer module, the maximum dwell time of which can be modified by setting the dwell time capacitor. Preferably, the dwell time input end is provided with a dwell time capacitor. A hard-off switch is arranged between the maximum dwell timer module and the dwell time input end, one end of which is connected to the IGBT module so that the hard-off switch is turned on to turn off the IGBT module. 
     The ignition drive module (CIM2001) is designed to directly drive an ignition IGBT and control the current and spark event of the coil. The coil current is controlled via the input pin. When the single-end input is driven high, the output of the CIM2001 is enabled to turn on the IGBT and start charging the coil. The CIM2001 input pin is provided with a 450 Ω internal pull-down resistor to GND. The advantages of the ignition drive module include supporting single-end input for ground shift disturbances suppression, signal line input buffer, input spike filter, operation from the ignition or battery line, ground shift tolerance: −1.5V to 16V, programmable maximum dwell time, current signal output, IGBT current limiting through Vsense pin, hard shutdown the following maximum dwell time out, SOP-8 packages and RoHS compliant. 
     A maximum dwell timer is included in the CIM2001 which will turn off the IGBT if the input remains active longer than the programmed time. The input spike filter will suppress single-end input signal(s) of less than 7 μsec in duration. The time interval can be modified through an external capacitor. When exceeding the maximum dwell time, the CIM2001 will enter a Hart-Shut-Down (HSD) mode of turning off the ignition IGBT immediately. The CIM2001 will also limit the collector current of the IGBT to Ic (lim) during charging. This is also achieved through the sense resistor in the emitter leg of the ignition IGBT by developing an input signal to the Vsense pin of CIM2001. The collector current level is relayed to the ECU via a current flag output. 
     Refer to  FIG.  3   , which is a schematic diagram of the ignition drive module of PIN connection. The CIM2001 is an advanced Ignition IGBT controlled IC which is available in a SOP8 package or die sales. This full-featured smart ignition IGBT driver is particularly advantageous in “switch on coil” applications where the size and system performance of the ignition driver are important. 
     
       
         
           
               
               
               
               
             
               
                 TABLE 1 
               
               
                   
               
               
                 PIN 
                 PIN 
                 CIM2001 
                   
               
               
                 NAME 
                 TYPE 
                 PIN # 
                 PIN FUNCTION DESCRIPTION 
               
               
                   
               
             
            
               
                 GND 
                 P 
                 1 
                 Ground reference 
               
               
                 Input 
                 I, A 
                 2 
                 Signal-end input signal 
               
               
                 IGF 
                 O, A 
                 3 
                 Collector current flag diagnosis and  
               
               
                   
                   
                   
                 feedback signal 
               
               
                 NC 
                 — 
                 4 
                 Connect to GND or floating 
               
               
                 CSSD 
                 I/O, A 
                 5 
                 Adjust maximum dwell time and soft-  
               
               
                   
                   
                   
                 shutdown current output (to external 
               
               
                   
                   
                   
                 capacitor) 
               
               
                 Vsense 
                 I, A 
                 6 
                 Sense input used for Ilim function 
               
               
                 Output 
                 O, A 
                 7 
                 Gate drive to the IGBT 
               
               
                 Vbat 
                 P 
                 8 
                 Supply voltage 
               
               
                   
               
               
                 PIN TYPE Note: 
               
               
                 “P” denotes power supply pin. 
               
               
                 “G” denotes ground pins. All VSS pins are internally shorted resistively. 
               
               
                 “O”, “I/O”, “A” denotes output only, input/output, and analog types. 
               
               
                 “PU” or “PD” denotes pins with internal pull-up or pull-down. 
               
            
           
         
       
     
     Functional Description 
     1. Input and Spike Filter for Single-End Input Signal 
     When the input signal voltage reaches V INH , the IGBT will be switched on to charge the coil. When the input voltage goes below V INL , the coil current through the IGBT will be turned off. Positive and negative peak values less than the duration of tspike at the input line will be filtered out and the IGBT will not be turned on/off. 
     2. Maximum Dwell Time and Hard-Shutdown (HSD) 
     Referring to  FIG.  4   ,  FIG.  4    is a schematic diagram of the relationship between the dwell time of the ignition drive circuit and hard shutdown (HSD). When the IGBT is turned on, a delay timer, depending on the value of the external CSSD capacitor, is started. If a valid falling edge is not received after the time Tdmax, the IGBT will be turned off immediately. 
     3. Current Flag Output 
     Referring to  FIGS.  5  and  6   ,  FIG.  5    is a schematic diagram of the current flag output of the ignition drive circuit according to the invention, and  FIG.  6    is a schematic diagram of the relationship between the CSSD capacitor and the maximum dwell time of the ignition driving circuit. When the input signal is active, CIM2001 will provide a flag feedback signal as shown in examples, IGFH and IGFL are set internally at 5.8 A and 2.6 A respectively sense resistor 18 mohm. 
     Electrical Characteristics 
     1. Absolute Maximum Ratings 
     Stresses exceeding the absolute maximum ratings may damage the device. It is not recommended to apply such level stress to the parts, or the device may not work or operate under the operating conditions. In addition, long-term exposure to stress higher than recommended operating conditions may affect the reliability of the equipment. The absolute maximum ratings are stress ratings only. 
     
       
         
           
               
               
               
               
               
             
               
                 TABLE 2 
               
               
                   
               
               
                 Symbol 
                 Parameter 
                 Min. 
                 Max. 
                 Unit 
               
               
                   
               
             
            
               
                   
               
            
           
           
               
               
               
               
               
            
               
                 V bat   
                 Voltage at V bat  pin (excl. EMC transients) 
                 −0.3 
                 28 
                 V 
               
               
                 V IN   
                 Voltage at single-end Input pin with external Rin 
                 −2 
                 16 
                 V 
               
               
                 V CSSD   
                 Voltage at C SSD   
                 −0.3 
                 5 
                 V 
               
               
                 V OUTPUT   
                 Voltage at Gate Output 
                 −0.3 
                 6.5 
                 V 
               
               
                 Vsense 
                 Voltage on Vsense pin 
                 0 
                 400 
                 mV 
               
               
                 T J , T STG   
                 Operating and Storage Temperature Range 
                 −40 
                 150 
                 ° C. 
               
               
                 P max   
                 Maximum power dissipation (continuous) at TC = 25° C. 
                   
                 0.625 
                 W 
               
               
                 R θJA   
                 Thermal Resistance junction-case (typical) 
                   
                 200 
                 ° C./W 
               
               
                 V ESD1 (pin to 
                 Electrostatic Discharge Voltage (Human Body Model) 
                   
                 2 
                 kV 
               
               
                 pin) 
                 according to MIL STD 883D, method 3015.7 and  
                   
                   
                   
               
               
                   
                 EOS/ESD Assn. standard S5.1-1993 
               
               
                   
               
            
           
         
       
     
     2. Electrical Characteristics 
     
       
         
           
               
               
               
               
               
               
               
             
               
                 TABLE 3 
               
               
                   
               
               
                 Symbol 
                 Parameter 
                 Conditions 
                 Min. 
                 Typ. 
                 Max. 
                 Unit 
               
               
                   
               
             
            
               
                   
               
            
           
           
               
            
               
                 Power Supply Conditions Vbat = 6 to 28 V; T J  = −40° C. to 150° C. (unless otherwise specified) 
               
            
           
           
               
               
               
               
               
               
               
            
               
                 V bat1   
                 Operating voltage 
                 Coil switching function 
                 4 
                   
                 28 
                 V 
               
               
                 V bat2   
                 Operating voltage 
                 All functions 
                 6 
                   
                 28 
                 V 
               
               
                 I bat   
                 Supply current 
                 TJ = 150° C., Vbat = 28 V, 
                   
                   
                 5 
                 mA 
               
               
                   
                   
                 Input = 5 V 
               
               
                 V clamp   
                 Vbattery clamp 
                 Ibatt = 10 mA 
                 35 
                 40 
                 50 
                 V 
               
            
           
           
               
            
               
                 Sense Pin Conditions Vbat = 6 to 28 V; T J  = −40° C. to 150° C. (unless otherwise specified) 
               
            
           
           
               
               
               
               
               
               
               
            
               
                 V limt   
                 Sense Voltage at 
                 TJ = −40° C. to 150° C. 
                 185 
                 200 
                 215 
                 mV 
               
               
                   
                 current limit 
                 (6 v &lt; Vbat &gt; 8 v) 
               
               
                 VGFH 
                 Collector Current 
                   
                 94 
                 104 
                 114 
                 mV 
               
               
                   
                 flag High Sense 
               
               
                   
                 Trigger Voltage 
               
               
                 VGFL 
                 Collector Current 
                   
                 42 
                 47 
                 52 
                 mV 
               
               
                   
                 flag Low Sense 
               
               
                   
                 Trigger Voltage 
               
               
                 IGFH 
                 Collector Current 
                 Sense Resistor 18 mΩ 
                 5.2 
                 5.8 
                 6.3 
                 A 
               
               
                   
                 flag High 
                 (resistance tolerance not 
               
               
                   
                   
                 calculated) 
               
               
                 IGFL 
                 Collector Current 
                 Sense Resistor 18 mΩ 
                 2.3 
                 2.6 
                 2.9 
                 A 
               
               
                   
                 flag Low 
                 (resistance tolerance not 
               
               
                   
                   
                 calculated) 
               
               
                 T D1   
                 Turn on delay time 
                 (Time from Input = 4.0 V to 
                   
                 7 
                   
                 us 
               
               
                   
                   
                 Vout = 4.0 V) 
               
               
                 T D2   
                 Turn off delay time 
                 (Time from Input = 0.5 V to 
                   
                 7 
                   
                 us 
               
               
                   
                   
                 Vout = 1.0 V) 
               
            
           
           
               
            
               
                 Single-end Input Control Conditions Vbat = 6 to 28 V; T J  = −40° C. to + 150° C. (unless otherwise specified) 
               
            
           
           
               
               
               
               
               
               
               
            
               
                 V INL   
                 Input low voltage 
                   
                 1.0 
                   
                 2.0 
                 V 
               
               
                 V INH   
                 Input high voltag 
                   
                 1.3 
                   
                 2.3 
                 V 
               
               
                 V INHys   
                 Input voltage hysteresis 
                   
                 0.25 
                   
                   
                 V 
               
               
                 R IN   
                 Input impedance 
                 Vin = 0 to 5 V 
                 350 
                 450 
                 550 
                 Ω 
               
               
                 T spike   
                 Input spike filter 
                 Delay on rising and 
                   
                 7 
                   
                 us 
               
               
                   
                   
                 falling edge of Input 
               
            
           
           
               
            
               
                 Get Output Voltage Max Vbat = 6 to 28 V; T J  = −40° C. to 150° C. (unless otherwise specified) 
               
            
           
           
               
               
               
               
               
               
               
            
               
                 V gmax   
                 Vgate max 
                 16KΩ pulldown resistor 
                 4.5 
                 5.25 
                 6 
                 V 
               
               
                 V glow   
                 Vgate low 
                 (0 mA &lt; Igate &lt; 0.4 mA @T = 25° C.) 
                 0.0 
                   
                 0.2 
                 V 
               
            
           
           
               
            
               
                 Diagnostic Functions and Protection Vbat = 6 to 28 V; T J  = −40° C. to 150° C. (unless otherwise specified) 
               
            
           
           
               
               
               
               
               
               
               
            
               
                 CSSD MIN   
                 Minimum dwell time 
                   
                 2.3 
                   
                   
                 nF 
               
               
                   
                 capacitor 
               
               
                 T D1   
                 Turn on delay time 
                 (Time from Input = 4.0 V to 
                   
                 7 
                   
                 us 
               
               
                   
                   
                 Vout = 4.0 V) 
               
               
                 T D2   
                 Turn off delay time 
                 (Time from Input = 0.5 V to 
                   
                 7 
                   
                 us 
               
               
                   
                   
                 Vout = 1.0 V) 
               
               
                 ICSSD 
                 CSSD Pin current for 
                   
                 0.8 
                 1.2 
                 1.6 
                 uA 
               
               
                   
                 TDMAX 
               
               
                 V ovs   
                 Over voltage shutdown 
                   
                   
                 33 
                   
                 V 
               
               
                   
               
            
           
         
       
     
     The above descriptions are meant to be exemplary only and are not limited to the examples shown in the drawings and described hereinbefore, and those skilled in the art will recognize that changes may be made to the embodiments described without department from the scope of the invention disclosed. Still, other modifications varied in efficient manners within the scope of the present invention, and their technical equivalents will be apparent to those skilled in the art, in light of a review of this disclosure, and such modifications are intended to fall within the appended claims.