Patent Publication Number: US-5153536-A

Title: Suppressed carrier modulator formed from two partial modulators each including a phase delay path

Description:
DESCRIPTION 
     TECHNICAL FIELD 
     The invention relates to a modulator formed from two partial modulators each having a phase delay path and its use as a mixer. 
     CLAIM FOR PRIORITY 
     This application is based on and claims priority from related German Patent Applications No. 40 28 370.4 dated 7 Sep. 1990 and No. 39 41 281.4 dated 14 Dec. 1989. To the extent such prior applications may contain any additional information that might be of any assistance in the use and understanding of the invention claimed herein, they are hereby incorporated by reference. 
     BACKGROUND ART 
     For transmission of digital messages, signals are modulated by means of a modulator onto a carrier. A known transmission scheme uses a direct modulator in which a carrier and a signal input and a signal output are coupled as follows. The carrier input and the signal output are coupled to each other via two paths with a phase delay line disposed on one of the paths. Furthermore, on each of the two paths a nonlinear semiconductor component is disposed in such a way that the nonlinear semiconductor components, because of their polarity and the arrangement of the phase delay line, which has a nominal phase delay of 180°, are rendered conductive in unison, as a function of the carrier. Thus, the carrier is suppressed at the signal output. If a signal in the form of a modulation voltage is applied to the delay path, one or the other of the nonlinear semiconductor components are rendered conductive, as a function of the modulation voltage, which causes modulation of the carrier at the signal output. Such a modulator can also be used as a mixer. A particular embodiment of a modulator operating according to the above-mentioned principle and its use as a mixer is described in German patent DE-PS 29 44 642. The phase delay line of the modulator described in that patent consists of a conductive element having a length λ/2 of the center frequency of the carrier. 
     DISCLOSURE OF INVENTION 
     The known amplitude modulator has limited carrier suppression because of the different layout of the two transmission paths, one via the electrically short path and one via the phase delay path, and can only be used for lower level forms of modulation. 
     The objective of the invention is to provide a modulator in which the carrier voltage is more strongly suppressed. 
     This objective is met with a gatelike arrangement in which two partial modulators are coupled together. 
     Additional embodiments of the invention can be found in the description section which follows. 
     The advantages obtained with the invention consist particularly in that the temperature dependence of the carrier suppression of the modulator for the temperature ranges present in radio link systems is negligible, amplitude linearity is improved, and the frequency dependence of the connection is reduced. 
    
    
     BRIEF DESCRIPTION OF DRAWINGS 
     The detailed description of the invention describes exemplary embodiments of modulators with reference to FIGS. 1 through 4. How the invention may be utilized as a mixer is explained at the end of that description. 
     FIG. 1 a schematic representation of the double modulator according to the invention, 
     FIG. 2 a first exemplary embodiment in the form of a double modulator designed in microstrip technology, for high carrier frequencies, 
     FIG. 3 a second exemplary embodiment in the form of a double modulator constructed with discrete components, for low frequencies, and 
     FIG. 4 a schematic representation of a 16 QAM modulator. 
    
    
     BEST MODE FOR CARRYING OUT THE INVENTION 
     For the description of the basic structure of the double modulator 1 shown in FIG. 1, the known partial modulators 1&#39; and 1&#34; are explained first with their mode of operation, followed by the double modulator 1 according to the invention. 
     The description of the partial modulators 1&#39;,1&#34; specifically references only the partial modulator 1&#39; but also applies to the partial modulator 1&#34;, since the two partial modulators 1&#39; and 1&#34; have the same structure and also the same operation. 
     The partial modulator 1&#39; includes a carrier input 2&#39;, a signal input 4&#39;, and a signal output 3&#39;. The carrier with the voltage U c  &#39; is present at the carrier input 2&#39;; the modulated carrier with the voltage U mc  &#39; is present at the signal output 3&#39;, and a digital signal with the modulation voltage U m  &#39; is present at the signal input 4&#39;. Two paths lead from the carrier input 2&#39; to the signal output 3&#39; of the partial modulator 1&#39;: an electrically short path 7&#39;, and a phase delay path 6&#39; on which is located a phase delay line 39&#39; for shifting the phase of the carrier U c  by 180° or by an odd integer multiple of 180°. From the carrier input 2&#39;, the same power having the same phase is applied to each of the two paths. A semiconductor diode D 1  &#39;, D 2  &#39; is disposed on each of the two paths, with the two diodes having opposite polarities relative to the signal output 3&#39;. 
     The semiconductor diode D 2  &#39; on the phase delay path 7&#39; is disposed after the phase delay line 39&#39; relative to the propagation direction of the carrier so that the two semiconductor diodes D 1  &#39; and D 2  &#39; operate in unison relative to the carrier. In the previously described portion of the partial modulator 1&#39;, ideally, because of the disposition of the semiconductor diodes D 1  &#39; and D 2  &#39; and the layout of the two transmission paths 6&#39;,7&#39;, carrier voltage suppression prevails at the signal output 3&#39;, since the circuit acts as a bridge. In actuality, optimization of the carrier voltage suppression is required. For this, the modulator has a regulable resistor R R  &#39; for balancing in the unmodulated state, which resistor is applied to the potential U g  &#39; and coupled to the signal input 4&#39;. 
     The input signal 4&#39;, on which the modulation voltage U m  &#39; is applied, is coupled to the phase delay path 6&#39; so as to alternately render conductive one or the other of the two semiconductor diodes D 1  &#39; and D 2  &#39;. The description of the exemplary embodiments clarifies how this is accomplished. As shown in FIG. 2, the signal input 4&#39; is preferably provided with a low-pass filter 18&#39;,19&#39;, and the signal output with a high-pass filter 20&#39;. 
     If a modulation voltage U m  &#39; with sufficiently high amplitude to control the semiconductor diodes D 1  &#39; and D 2  &#39; is applied to the signal input 4&#39;, the first semiconductor diode D 1  &#39; is nonconductive and the other semiconductor diode D 2  &#39; is conductive, whereby the full carrier voltage U c  is applied to the signal output 3&#39;. If the sign of U m , is changed, the sign of U mc , also changes, which is in effect a phase reversal. 
     To obtain amplitude linearity, relatively small modulation voltages U m  &#39; are applied to the signal input 4&#39;, whereby one of the semiconductor diodes, e.g., D 1  &#39;, conducts less than the other semiconductor diode, e.g., D 2  &#39;. The balance at the signal output 3&#39; is thereby shifted and a resulting, modulated carrier voltage U mc  &#39; is thus generated. The amplitude of the modulated carrier voltage U mc  &#39; depends on the magnitude of the modulation voltage U m  &#39; and the phase depends on the sign of the modulation voltage U m  &#39;. If a positive modulation voltage U m  &#39;, for example, is applied to the signal input 4&#39;, the semiconductor diode D 1  &#39; is more conductive than the semiconductor diode D 2  &#39;, whereby the electrically short path 7&#39; has lower impedance than the phase delay path 6&#39;, and the transmission over the electrically short path 7&#39; dominates. If the modulation voltage U m  &#39; is negative, the action is exactly the opposite. 
     Since the partial modulators previously described do not consist of ideal components, a resultant carrier voltage U mc  &#39; is present at the signal output 3&#39; even in the absence of any modulation voltage U m  &#39;. 
     The above-described partial modulator 1&#39; thus constitutes a simple transmission mode phase switch, which may function as part of a digital direct modulator. 
     In the implementation of such a modulator, it is easy to imagine that the bridge balance necessary for carrier suppression and amplitude linearity are both disrupted by, for example, the imbalance of the semiconductor diodes and their parasitic components, which leads to deviation from the ideal behavior of the modulator. Furthermore, the transmission takes place in one case via the electrically short path 7 and in the other case via the phase delay path 6. Since the two paths are also electrically unequal in structure, the group delays are also unequal in the two paths and lead to high frequency dependencies which must be compensated for by means of other measures. 
     The problem of carrier suppression when no modulation voltage U m  &#39; is applied is solved in accordance with one aspect of the invention by means of the regulatable resistor R R  &#39; and in accordance with another aspect of the invention by means of the symmetric structure of the double modulator 1 depicted in FIG. 1. 
     In the double modulator 1, the two carrier inputs 2&#39;,2&#34; are connected via a 0°-power divider 37 to a common carrier input 2 of the double modulator 1 and galvanically isolated by the capacitors C K1  &#39;,C K1  &#34;. The two signal outputs 3&#39;,3&#34; are combined in a power combiner, e.g., a transformer 11, whose secondary winding forms the output 3 of the push-pull modulator 1. The two signal inputs 4&#39;,4&#34; are supplied with the same modulation signal, whereby a signal invertor (not shown) is disposed before one of the two signal inputs 4&#39; or 4&#34;, whose purpose is to guarantee that modulation voltage U m  &#39;, U m  &#34; in equal amount and with opposite signs is applied to each of the two signal inputs. Instead of inverting the modulation signals, it is also possible to apply modulation signals with the same sign to the signal inputs 4&#39; and 4&#34; but with the polarity of the diode pairs D 1  &#39;,D 2  &#39; of the partial modulator 1&#39; relative to the carrier input 2 being reversed with respect to the diode pairs D 1  &#34;,D 2  &#34; of the partial modulator 1&#34;. 
     The carrier input 2 of the double modulator 1 is coupled, in accordance with the amplitude of the modulation voltage U m , to the signal output 3 via the transformer 11 and, assuming a positive modulation voltage U m  &#39; at the signal input 4&#39; and a negative modulation voltage U m  &#34; at the signal input 4&#34;, via the electrically short path 7&#39; of the partial modulator 1&#39; and via the phase delay path 6&#34; of the partial modulator 1&#34;. With opposite signs of the modulation voltage U m  &#39;, U m  &#34; at the signal inputs 4&#39;,4&#34;, the connection is made via the phase delay path 6&#39; of the partial modulator 1&#39; and the electrically short path 7&#34; of the partial modulator 1&#34;. 
     In any case, the transmission always takes place via both one of the electrically short paths 7&#39;,7&#34; and a respective one of the phase delay paths 6&#34;,6&#39;. In this manner, technical inadequacies of the partial modulator 1&#39;,1&#34; are compensated for, the group delay times are virtually equal in either case, and the double modulator 1 demonstrates good temperature stability and amplitude linearity within the carrier frequencies typically provided for radio link systems, and is frequency-independent. 
     A first exemplary embodiment of a double modulator 1 is illustrated in FIG. 2. It has the same functional units as shown in FIG. 1 but is physically designed for a carrier U c  with a frequency in the gigahertz range and for a modulation voltage U m  with a frequency in the megahertz range, using planar microstrip technology. The arrangement of the functional units corresponds to that in FIG. 1. In the following only the functional units specific to exemplary embodiment 1 are explained in detail. The same functional units are provided with the same reference symbols as in FIG. 1. 
     The double push-pull modulator 1 has two partial modulators 1&#39;,1&#34; with a common carrier input 2 and a common signal output 3. The carrier voltage U c  is applied to the carrier input 2&#39;,2&#34; of the two partial modulators 1&#39;,1&#34; via a so-called &#34;Wilkinson coupler&#34; 12. The two carrier inputs 2&#39;,2&#34; are respectively galvanically isolated via a capacitor C K1  &#39;, C K1  &#34; of the Wilkinson coupler 12. The signal outputs 3&#39;,3&#34; are combined via a 180° power combiner 50 in the form of a so-called &#34;rat race ring&#34;. 
     The rat race ring 50 has as input the two signal outputs 3&#39;,3&#34; of the partial modulator 1&#39;,1&#34;, as output the output 3 of the double push-pull modulator 1 and a 50-ohm connection 13 against ground; it effects repeated 180° shifting of the phases of the modulated carrier voltage U mc  &#39; emerging from the partial modulator 1&#39; relative to the carrier voltage U mc  &#34; emerging from the partial modulator 1&#34; and thus combines these in proper phase relation. 
     In FIG. 2 each of the two partial modulators 1&#39;,1&#34; has four strips 14&#39;,14&#34;, 15&#39;,15&#34;, 16&#39;,16&#34;, 17&#39;(17a&#39;,17b&#39;),17&#34;(17a&#34;, 17b&#34;) enclosing the surface of a rectangle, wherein the three outer corners between the strips 14&#39;,15&#39;; 15&#39;,16&#39;; and 16&#39;,17b&#39; corresponding to 14&#34;,15&#34;; 15&#34;,16&#34;; and 16&#34;,17b&#34; are trimmed at a 45° angle. The strip 17&#39;,17&#34; is interrupted in the center and has two strip sections 17a&#39;,17a&#34; and 17b&#39;,17b&#34;. The carrier input 2&#39;,2&#34; is disposed at the ends between the strips 14&#39;,17a&#39;; 14&#34;,17a&#34;. Between the strip section 17a&#39;,17a&#34; and the signal output 3&#39;,3&#34;, a semiconductor diode D 1  &#39;,D 1  &#34; is disposed in the pn-direction viewed from the strip section 17a&#39;,17a&#34; and between the strip section 17b&#39;,17b&#34;  and the signal output 3&#39;,3&#34;, a semiconductor diode D 2  &#39;,D 2  &#34; is disposed in the np-direction viewed from the strip section 17b&#39;,17b&#34;. 
     The strip section 17a&#39;,17a&#34; and the semiconductor diode D 1  &#39;, D 1  &#34; form the electrically short path 7&#39;,7&#34;; and the strip sections 14&#39;,15&#39;,16&#39;, the strip section 17b&#39;, and the semiconductor diode D 2  &#39; (and analogously 14&#34;, 15&#34;, 16&#34;, 17b&#34; and D 2  &#34; form) the phase delay path 6&#39;,6&#34;; whereby the strips 14, 15, 16, and the strip section 17b minus the length of the strip section 17a have a length of one-half the wavelength of the center frequency of the carrier and thus represent the phase delay line 9&#39;,9&#34;. Here, it is not essential that the strips 14&#39;,14&#34; through 17&#39;,17&#34; enclose the surface of a rectangle, but that the difference of the path lengths between the phase delay path 6&#39;,6&#34; and the electrically short path 7&#39;,7&#34; corresponds to one-half the length of the center wavelength of the carrier or to odd integer multiples of this half wavelength. The difference in length between the two paths causes the desired phase delay of 180°.  The signal input 4&#39;,4&#34; is disposed in the center of strip 15 relative to its length. It is advantageous to position the signal input 4&#39;,4&#34; symmetric to the signal output 3&#39;,3&#34;. It is also possible to have two or more signal inputs instead of one signal input. The signal inputs 4&#39;,4&#34; are provided with filter elements 18&#39;,18&#34;, 19&#39;,19&#34; which prevent escape of the carrier to the modulation voltage source. The signal outputs 3&#39;,3&#34; are coupled to ground via the lines 20&#39;,20&#34; for the modulation signal U m  &#39;, U m  &#34;. The regulatable resistors R R  applied to the signal inputs 4&#39;,4&#34; for control of the partial modulators 1&#39;,1&#34; are not shown in FIG. 2. 
     The double modulator 1 according to a first exemplary embodiment may thus be constructed in simple planar microstrip technology upon which the diodes D 1  &#39;,D 1  &#34;,D 2  &#39;, D 2  &#34; are mounted. 
     A second exemplary embodiment of a double modulator 1 is illustrated in FIG. 3. As was the case for the double modulator 1 of the first exemplary embodiment, the second exemplary embodiment also has the same functional units as those shown in FIG. 1. The same features are therefore provided with the same reference symbols. Physically, the FIG. 3 embodiment is designed for a carrier U c  with a wavelength in the megahertz range and a correspondingly lower frequency of the modulation signal U m . 
     The double modulator 1 has two partial modulators 1&#39;,1&#34; with a common signal output 3. The carrier U c  is generated in the oscillator 21 which is coupled to the ground 22 on one side and on the other side to the carrier inputs 2&#39;,2&#34;. Between the oscillator 21 and the carrier inputs 2&#39;,2&#34; is an autotransformer 23. Herein, the oscillator 21 is applied to the tap 24 and the two coil ends 25&#39; and 25&#34; are coupled via coupling capacitors C K1  &#39; and C K1  &#34; to the carrier inputs 2&#39;,2&#34;. The autotransformer 23 represents a 0° power divider and the resistor R 21  the internal resistance of the oscillator 21. 
     The signal outputs 3&#39;,3&#34; are coupled to the two coil ends of the primary winding 26 of a transformer 27, which functions as the above-described transformer 11. The coil ends of the secondary winding represent the signal output 3 of the double push-pull modulator 1. For suppression of the modulation voltage U m  at the signal output 3, high-impedance parallel resonant circuits 29&#39;,29&#34; are disposed respectively between the coil ends of the primary winding 26 and the signal outputs 3&#39; and 3&#34; for the modulation signal U m . 
     Each of the two partial modulators 1&#39;,1&#34; has a phase delay path 6&#39;,6&#34; and an electrically short path 7&#39;,7&#34;. The phase delay path 6&#39;,6&#34; has an autotransformer 30&#39;,30&#34; and a semiconductor diode D 2  &#39;,D 2  &#34;. The autotransformer 30&#39;,30&#34; forms the phase delay line 39&#39;, 39&#34; (FIG. 1) in which the phase of the carrier undergoes a 180° inversion. The electrically short path 7&#39;,7&#34; has a semiconductor diode D 1  &#39;,D 1  &#34;. The polarity of the diodes corresponds to that of the exemplary embodiment 1. 
     Between the signal output 3&#39;, 3&#34; and the tap 33&#39;,33&#34;, the modulation signal is generated in a generator 34&#39;,34&#34;, which is applied to the output 3&#39;,3&#34; and coupled to the tap 33&#39;,33&#34; via a parallel resonant circuit 35&#39;,35&#34;. The resistors R 34  &#39;, R 34  &#34; represent the internal resistances of the generators 34&#39;,34&#34;. The parallel resonant circuit 35&#39;,35&#34; has high impedance for the carrier U c . 
     The two winding sections 31&#39;,32&#39;; 31&#34;, 32&#34; of the autotransformer 30&#39;,30&#34; and the two semiconductor diodes D 1  &#39;,D 2  &#39;; D 1  &#34;,D 2  &#34; act as a Wheatstone bridge, wherein balance prevails between the output 3&#39;,3&#34; and the tap 33&#39;,33&#34; as long as no modulation voltage U m  is applied. However, if a modulation voltage U m  is applied, the bridge is no longer balanced and the modulated carrier voltage U mc  is applied to the output 3&#39;,3&#34;. 
     Since the autotransformer 30&#39;,30&#34; cannot be produced with ideal characteristics, the phase of the carrier U c  actually does not undergo a 180° inversion, but is given a specific phase error which ultimately prevents total carrier voltage suppression at output 3&#39;,3&#34; in the absence of modulation voltage U m . This residual carrier voltage is largely suppressed by means of the likewise symmetric arrangement of the two partial modulators 1&#39;,1&#34;. 
     FIG. 4 illustrates in conventional schematic form a 16 QAM (quadrature amplitude modulation) modulator 49 having a bit rate frequency of 140 mbps. It consists essentially of two double modulators 40,41 wherein the first double modulator 40 delivers the signal for the I components and the double modulator 41 delivers the signal for the Q components. The two components are orthogonally combined in the power combiner 42. 
     The output 43 of the power combiner 42 forms the output of the 16 QAM modulator 49. The carrier U c  is applied to the carrier inputs 2 of the two modulators 40,41 via a so-called &#34;Wilkinson coupler&#34; 45. The modulator signals for the I or Q components are applied respectively to the signal inputs 46,47 of the two double modulators 40,41, whereby in each case a modulation signal U m  of the same amount but with the opposite sign is applied to a double modulator 40,41 for the I or Q components. 
     Particularly suitable as semiconductor diodes D 1  &#39;, D 1  &#34;, D 2  &#39;, D 2  &#34; are Schottky diodes, which, for example, have shorter delay times than pin diodes. The temperature dependence of the diodes is compensated for by means of the pairwise arrangement in the bridge circuit. Fabrication-related differences in the diodes must be balanced, for example, by application of dc voltage via the regulatable resistor on the signal input and the carrier suppression must be thus optimized. The isolating resistor is adjusted so that when the modulation voltage U m  is not applied, bridge balance prevails. 
     The modulator 1 described can also be operated as a transmitting mixer or a receiving mixer (not shown). The application of the modulator 1 of the first exemplary embodiment is used as an example of a transmitting mixer. The signal inputs 4&#39; and 4&#34; described in the first exemplary embodiment are provided here for coupling of the signal whose frequency is to be converted. When the polarity of the diode pair D 1  &#39;,D 2  &#39; relative to the carrier input 2&#34;, as shown in FIG. 2, matches that of the diode pair D 1  &#34;,D 2  &#34;, the signal whose frequency is to be converted must be inverted at one of the two signal inputs. When the polarity of the diode pair D 1  &#39;,D 2  &#39;, relative to the carrier input 2&#34;, does not match that of the diode pair D 1  &#34;,D 2  &#34;, the two signal inputs can be directly coupled to each other. 
     The same is also true for the application of the 16 QAM modulator 49 as a mixer which can be operated on the reception side as an image suppression mixer and on the transmission side as a single-sideband mixer. However, for this, with the utilization of the two coupling branches I and Q, it is necessary to couple them to each other via a 90° power combiner. 
     The application of a modulator as a mixer is known in principle and therefore needs no further explanation.