Patent Publication Number: US-8970635-B2

Title: Liquid crystal display with brightness extractor and driving method thereof for modulating image brightness by controlling the average picture level to reduce glare and eye fatigue

Description:
This application claims the benefit of Korea Patent Application No. 10-2008-0078942, filed on Aug. 12, 2008, which is incorporated herein by reference for all purposes as if fully set forth herein. 
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present disclosure is related to the liquid crystal display device and the driving method for selectively controlling the average picture level (or “APL”). 
     2. Discussion of the Related Art 
     Nowadays, in the display device market, for replacing cathode ray tube (or “CRT”) having heavy and large volume, various flat panels are developed. For these flat panel display device, there are liquid crystal display (or “LCD”) device, field emission display (or “FED”), plasma display panel (or “PDP”), electroluminescence device (or “EL”) and so on. 
     Thanks to the light weight, the thin thickness, the low power consumption, and the low power driving, the liquid crystal display device is progressively applied to various applications. For example, the liquid crystal display device is applied to the portable computer such as notebook PC, the office automation devices, the audio/video devices, the advertizing devices. The liquid crystal display device represents the video images by controlling the electric field supplied to the liquid crystal layer to modulate the light entering from the backlight unit. 
     As shown in the  FIG. 1 , as the LCD device has the driving characteristics in which the video image is represented with maximum brightness always regardless of the condition of the image contents, the peak brightness is almost equal to the full white brightness. The peak brightness is the brightness detected at the central portion of the LCD panel when the LCD panel is driven such that the back ground image of the LCD is represented with the black gray-scale and the central portion surrounded by the back ground is represented with the maximum brightness. The full white brightness is the brightness detected from the screen when the overall screen of the LCD panel is represented with the maximum brightness. 
     If the peak brightness is closely equal to the full white brightness, it is advantage for the computer monitor in which the exact brightness and color representation are important. However, for the television monitor of which video images are changed dynamically, this monitor may make a bad effect to the observer&#39;s eyes. Especially, when a person watches a snowy background of which most peak brightness is the white gray-scale, due to excessive high brightness, eye glare is getting severely and then eye fatigue will be accumulated. 
     On the contrarily, for the PDP or CRT, the full white brightness is generally lower than the peak brightness. Therefore, when watching high brightness image contents of the PDP or CRT, the brightness of each pixel will be naturally down so that the eye glare phenomenon is not occurred and the eye fatigue is lowered. 
     As a result, required are the method for reducing eye glare and eye fatigue when an LCD device shows a high brightness image contents. 
     SUMMARY OF THE INVENTION 
     The purpose of the present disclosure, for solve the disadvantages and problems according to the related art, is to provide the liquid crystal display device and driving method of the LCD device for reducing the eye glare and eye fatigue. 
     To achieve the above purposes and advantages, the liquid crystal display device according to one embodiment of the present disclosure comprises: a brightness extractor separating a brightness and a color difference information from an input image; an user interface receiving a limit APL; an APL restrictor calculating an average APL of the input image based on the brightness from the brightness extractor, modulating the brightness of the input image such that the average APL is restricted lower than the limit APL when the average APL of input image is higher than the limit APL, and converting the modulated brightness and the color difference information into a RGB data; and a driving circuit representing the RGB data from the APL restrictor on a liquid crystal display panel. 
     The liquid crystal display device according to another embodiment of the present disclosure comprises: a brightness extractor separating a brightness and a color difference information from an input image; an APL restrictor calculating an average APL of the input image based on the brightness from the brightness extractor, modulating the brightness of the input image by lowering with a predetermined modulating width when the average APL of input image is higher than the limit APL, and converting the modulated brightness and the color difference information into a RGB data; and a driving circuit representing the RGB data from the APL restrictor on a liquid crystal display panel. 
     The driving circuit comprises a gate drive IC, a source drive IC and a timing controller of a control board which are explained in following embodiments in detail. 
     The method for driving a liquid crystal display device according to one embodiment of the present disclosure comprises steps of: separating a brightness and a color difference information from an input image; receiving a limit APL through an user interface; calculating an average APL of the input image based on the brightness; modulating the brightness of the input image such that the average APL is lower than the limit APL when the average APL of input image is higher than the limit APL; converting the modulated brightness and the color difference information into a RGB data; and representing the RGB data from the APL restrictor on a liquid crystal display panel. 
     The method for driving a liquid crystal display device according to another embodiment of the present disclosure comprises steps of: separating a brightness and a color difference information from an input image; calculating an average APL of the input image based on the brightness; modulating the brightness of the input image to lower the average APL with a predetermined modulating width when the average APL of input image is higher than a reference APL; converting the modulated brightness and the color difference information into a RGB data; and representing the RGB data from the APL restrictor on a liquid crystal display panel. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. 
       In the drawings: 
         FIG. 1  is a brief drawing illustrating the peak brightness and the full white brightness in LCD, PDP and CRT, respectively. 
         FIG. 2  is a block diagram illustrating the liquid crystal display device according to one embodiment of the present disclosure. 
         FIG. 3  is a block diagram illustrating circuit configuration of the system board according to the first embodiment of the present disclosure. 
         FIG. 4  is a flow diagram illustrating the video data processing steps of the brightness extractor and the APL restrictor shown in  FIG. 3 , step by step. 
         FIG. 5  is the graph illustrating the gamma calculation in S 3  step and S 7  step of  FIG. 4 . 
         FIG. 6  is the diagram illustrating the experience result of the-first stop video image. 
         FIG. 7  is the diagram illustrating the experience result of the second stop video image. 
         FIG. 8  is the diagram illustrating the experience result of the moving video image. 
         FIG. 9  is a block diagram illustrating the circuit configuration of the system board according to the second embodiment of the present disclosure. 
         FIG. 10  is a flow chart illustrating the image data processing steps of the brightness extractor and the APL restrictor shown in  FIG. 9 , step by step. 
     
    
    
     DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS 
     Advantages and features of the present disclosure and a method of achieving the advantages and the features will be apparent by referring to embodiments described below in detail in connection with the accompanying drawings. Like reference numerals designate like elements throughout the detailed description. 
     Referring to  FIGS. 2 to 10 , the preferred embodiments according to the present disclosure will be explained. 
     Referring to  FIG. 2 , the liquid crystal display device according to the embodiment of the present disclosure comprises a liquid crystal display panel  10 , a plurality of gate drive ICs (or “integrated circuits”)  151  to  153 , a plurality of source drive ICs  131  to  136 , a system board (SB), an interface board (INTB), and a control board (CTRB). In the  FIG. 2 , a back light unit and a driving circuit of the backlight are not shown. 
     The liquid crystal display panel  10  includes two glass substrates joining each other and a liquid crystal layer therebetween. The liquid crystal cells of the LCD panel  10  are arrayed in matrix pattern by the crossed structure of the data lines  14  and the gate lines  16 . 
     On the lower glass substrate of the liquid crystal display panel  10 , data lines  14 , gate lines  16 , TFTs, liquid crystal cells (Clc) connected to the TFTs and driven by the electric field between the pixel electrodes  1  and the common electrode  2 , and storage capacitors (Cst). On the upper glass substrate of the liquid crystal display panel  10 , a black matrix, a color filter and a common electrode  2  are formed. The common electrode  2  is formed on the upper glass substrate for the vertical electric field driving type such as TN mode (Twisted Nematic mode) and VA mode (Vertical Alignment mode). On the contrary, for the horizontal electric field driving type such as IPS mode (In-Plane Switching mode) and FFS mode (Fringe Field Switching mode), the common electrode  2  is formed on the lower glass substrate with the pixel electrode  1 . On the outer surfaces of the upper and lower glass substrates of the liquid crystal display panel  10 , polarization plates are attached. On the inner surface of the upper and lower glass substrate of the liquid crystal display panel  10 , alignment layers for pre-tilt angle of the liquid crystal material are formed. 
     The source drive ICs  131  to  136  receive the digital video data transmitted in mini LVDS method from the control board (CTRB), converts the digital video data into analog data voltages in response to the data timing control signal from the control board (CTRB), and then supplies them to the data lines  14  of the liquid crystal display panel  10 . Each of the source drive IC is equipped with a mini LVDS receiving circuit for receiving and demodulating the mini LVDS data. 
     Each of the gate drive IC  151  to  153  generate the gate pulse in response to the gate timing control signal from the control board (CTRB) and sequentially supplies the gate pulse to the gate lines  16 . 
     In the first embodiment of the present disclosure, the system board (SB) converts the resolution of the digital video data to be proper to the resolution of the liquid crystal display panel  10 . The system board (SB) modulates each pixel brightness of the input images such that the average APL of the image currently inputted is restricted under the limit average picture level received through the user interface. The user interface includes a user input device such as On-Screen-Display, remote controller, touch panel, key board, and mouse, and a decoder for decoding the data from the input device. Further, the system board (SB) sends the digital video data and the timing signals with the LVDS clock to the interface board (INTB) using the LVDS interfacing method. The timing signals include Vsynch signal, Hsynch signal, the data enable signal and Dot clock. 
     In the second embodiment of the present disclosure, the system board (SB) changes the resolution of the digital video data to be proper to the resolution of the LCD panel, using a scaler. The system board (SB) compares the average picture lever of the input frame image with a predetermined reference APL. If the average APL of the frame image currently inputted is higher than the reference APL, the system board (SB) modulates the pixel brightness of the frame image to actively lower the average APL. Here, the adjusting width of the average APL can be varied according to the average APL of the frame image currently inputted. 
     The interface board (INTB) receives the digital video data, the timing signals and the LVDS clocks from the system board (SB) through the LVDS interface receiving circuit. The interface board (INTB) transmits these signals to the control board (CTRB) through the LVDS interface transmitting circuit. 
     The control board (CTRB) receives the digital video data, the timing signals and LVDS clocks from the interface board (INTB) through the LVDS interface receiving circuit. The timing controller equipped into the control board (CTRB) converts the received digital video data into the mini LVDS data, and sends the mini LVDS data with the mini LVDS clock to the source drive ICs  131  to  136 . Further, the control board (CTRB) generates the data timing control signal for controlling the operating timing of the source drive ICs  131  to  136  and the gate timing control signal for controlling the operating timing of the gate drive ICs  151  to  153 . 
       FIG. 3  illustrates the system board according to the first embodiment of the present disclosure, in detail. 
     Referring to  FIG. 3 , the system board (SB) includes a scaler  31 , a brightness extractor  32 , and an APL restrictor  33 . 
     The scaler  31  adjusts the resolution of the image signal received from external devices or TV tuners to the resolution of the LCD panel  10 . 
     The brightness extractor  32  extracts the brightness value (Y) and the color difference information (CbCr) from the RGB digital video data, and supplies them to the APL restrictor  33 . 
     The APL restrictor  33  calculates the average APL of one frame image inputted from the brightness extractor  32 , and modulates each brightness (Y) lower than limit APL inputted from the user interface. Further, the APL restrictor  33  converts the modulated brightness (Y) and the color difference information (CbCr) from the brightness extractor  32  into the digital video data, reversely. The RGB digital video data outputted from the APL restrictor  33  is supplied to the timing controller of the control board (CTRB) via the interface board (INTB). 
       FIG. 4  is a flow chart illustrating the image data processing steps of the brightness extractor  32  and the APL restrictor  33  according to the first embodiment of the present disclosure, step by step. 
     Referring to  FIG. 4 , the brightness extractor  32  calculates each brightness (Y) and each color difference information (CbCr) of each RGB digital video data using the Equations (1) to (3) accepting the input RGB digital video data as variations (steps S 1  and S 2 ).
 
 Y= 0.299 R+ 0.589 G+ 0.114 B   (1)
 
 Cb= 0.564( B−Y )  (2)
 
Here,  B−Y=B −(0.3 R+ 0.59 G+ 0.11 B )=−0.3 R− 0.59 G+ 0.89 B  
 
 Cr= 0.713( R−Y )  (3)
 
Here,  R−Y=R −(0.3 R+ 0.59 G+ 0.11 B )=0.7 R− 0.59 G− 0.11 B  
 
     For linearizing the brightness of the input image having non-linear gamma characteristics as shown in  FIG. 5 , the APL restrictor  33  performs the degamma calculation for each brightness (Y) of one frame image, as shown in Equation (4) (Step S 3 ). 
     
       
         
           
             
               
                 
                   Y 
                   = 
                   
                     
                       
                         ( 
                         
                           Y 
                           255 
                         
                         ) 
                       
                       2.2 
                     
                     × 
                     255 
                   
                 
               
               
                 
                   ( 
                   4 
                   ) 
                 
               
             
           
         
       
     
     The APL restrictor  33  calculates the average picture level of overall of one frame using Equation (5) accepting the brightness calculated by degamma as the variations (step S 4 ). The APL may have one value of 0˜100. As the average APL value is higher, the relevant frame image is getting brighter. On the contrary, as the average APL value is lower, the relevant frame image is getting darker. 
     
       
         
           
             
               
                 
                   AverageAPL 
                   = 
                   
                     
                       AverageY 
                       255 
                     
                     × 
                     100 
                   
                 
               
               
                 
                   ( 
                   5 
                   ) 
                 
               
             
           
         
       
     
     Here, the average Y, as the average brightness of one frame image calculated by degamma, is gotten by dividing the total summation of brightnesses (Y) of one frame image by the number of pixels of LCD panel  10 . 
     The APL restrictor  33  compares the limit APL inputted through the user interface with the average APL of one frame image. If the average APL of the one frame image currently inputted is higher than the limit APL (step S 5 ), the APL restrictor  33  modulates each brightness (Y) of the pixels as shown in Equation (6) so that the average APL of the image shown on the LCD panel  10  is not over the limit APL (step S 6 ). If the APL of one frame image currently inputted is lower than the limit APL (step S 5 ), then the APL restrictor  33  does not modulate the pixel brightness of one frame image currently inputted but performs the step S 7  to convert the gamma characteristics of inputted image into original status. 
     
       
         
           
             
               
                 
                   Y 
                   = 
                   
                     
                       Y 
                       255 
                     
                     × 
                     
                       ( 
                       
                         
                           Limit 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           APL 
                         
                         
                           AverageY 
                           × 
                           255 
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   6 
                   ) 
                 
               
             
           
         
       
     
     The APL restrictor  33  substitutes the unmodulated original brightness (Y) or the modulated brightness (Y) in step S 6  into Equation (7) which is the 2.2 gamma encoding calculating equation to reversely convert the linearized gamma characteristics into the original gamma characteristics (step S 7 ). 
     
       
         
           
             
               
                 
                   Y 
                   = 
                   
                     
                       
                         ( 
                         
                           Y 
                           255 
                         
                         ) 
                       
                       
                         1 
                         2.2 
                       
                     
                     × 
                     255 
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
           
         
       
     
     The APL restrictor  33  calculates the RGB digital video data which will be shown on the LCD panel  10  by substituting the color difference information (CbCr) inputted from the brightness extractor  32  and the brightness (Y) converted by the 2.2 gamma characteristics in step S 7  into the following Equations (8) to (10) which are the RGB reversing equation (steps S 8  and S 9 ). The RGB digital video data outputted from the APL restrictor  33  is supplied to the source drive ICs  131  to  136  through the timing controller of the control board (CTRB).
 
 R=Y+ 1.402 Cr   (8)
 
 G=Y− 0.334 Cb− 0.713 Cr   (9)
 
 B=Y+ 1.772 Cb   (10)
 
     In the interim, the RGB to YCbCr conversion of step S 2  and the YCbCr to RGB conversion of step S 8  in the image data processing shown in  FIG. 4  can be shared with the image engine performing other image processings. For example, the patent applications such as KR 10-2003-0099334, KR 10-2004-0030334, KR 10-2003-0041127, KR 10-2004-0078112, KR 10-2003-0099330, KR 10-2004-0115740, KR 10-2004-0049637, KR 10-2003-0040127, KR 10-2003-0081171, KR 10-2004-0030335, KR 10-2004-0049305, KR 10-2003-0081174, KR 10-2003-0081175, KR 10-2003-0081172, KR 10-2003-0080177, KR 10-2003-0081173, and KR 10-2004-0030336, extracts the brightness of the input image, analyzes the histogram based on the brightness, controls the brightness of the backlight according to the analyzing result, modulates the brightness of the input image, and then converts the brightness and the color different information into the RGB digital video data. Therefore, as the image engine which was filed prior to this disclosure includes substantially same process as the steps S 2  and S 8  shown in  FIG. 4  can be shared with other image engines, they cannot be performed. 
       FIGS. 6 to 8  are the experience results representing the modulated data to the LCD panel  10  after modulating the data of relatively bright stop image and moving image data using the image data processing of  FIG. 4 . 
       FIG. 6  is the experiment result to the first still image of which APL is 69.5. It illustrates that the average APL of the image is changed according to the limit APL when the limit APL is controlled with 100, 50 or 40.  FIG. 7  is the experiment result to the second still image of which APL is 66.5. It illustrates that the average APL of the image is changed according to the limit APL when the limit APL is controlled with 100, 50 or 40.  FIG. 8  illustrates the original video image of “Snowboard Training (9 min. 41 sec.)” not modulated and the APL changes of the modulated image in which the video data is modulated with the limit APL of ‘50’. As shown in the experiment results, as the limit APL is getting lower, the overall brightness is also getting lower but the eye glare and fatigue are reduced. 
     As a result, the liquid crystal display device and the driving method according to the first embodiment of this disclosure controls the APL of the input image under the limit APL decided by the user, according to the eye glare and fatigue of the user. 
       FIG. 9  illustrates a system board (SB) according to the second embodiment of the present disclosure. 
     Referring to  FIG. 9 , the system board (SB) includes a scaler  91 , a brightness extractor  92 , and a APL restrictor  93 . 
     The scaler  91  adjusts the resolution of the image signal inputted from the external appliances or TV tuner properly to the resolution of the liquid crystal display panel  10 . 
     The brightness extractor  92  extracts the brightness (Y) and the color difference information (CbCr) of each RGB digital video data from the scaler  91  and then supplies them to the APL restrictor  93 . 
     The APL restrictor  93  calculates the average APL of each one frame image inputted from the brightness extractor  32 . Comparing the average APL with a reference APL stored in advance, the APL restrictor  93  controls down the average APL of the inputted image-by lowering the brightness (Y) of each pixel when the average APL of the inputted frame image is higher than the reference APL. Further, the APL restrictor  93  reversely converts the modulated brightness (Y) and the color difference information (CbCr) from the brightness extractor  92  into the RGB digital video data. The RGB digital video data outputted from the APL restrictor  93  is supplied to the timing controller of the control board (CTRB) via the interface board (INTB). 
       FIG. 10  is a flow chart illustrating image data processing steps of the brightness extractor  92  and the APL restrictor  93  according to the second embodiment of the present disclosure, step by step. 
     Referring to  FIG. 10 , the brightness extractor  92  calculates the brightness (Y) and the color difference information (CbCr) of each RGB digital video data using the Equations 1 to 3 adapting the inputted RGB digital video data as the variations (steps S 101  and  102 ). 
     The APL restrictor  93  performs the degamma calculation for each brightness (Y) of each one frame image using Equation 4 in order to linearize the brightness of the input image having non-linear gamma characteristics as shown in  FIG. 5  (step S 103 ). 
     The APL restrictor  93  calculates the average APL of overall one frame using Equation 5 (step S 104 ). The APL restrictor  93  compares the average APL of inputted one frame image with a reference APL stored in advance. According to the comparing result, if the average APL of the inputted one frame image is higher than the reference APL, the APL restrictor  93  decreases the brightness of each pixel to lower the average APL of inputted one frame image. The reference APL may be decided by an experience of eye glare and fatigue. For example, it can be selected any one value between 50 and 90. The adjusting width of the average APL can be varied by the average APL of the input image. For example, as the average APL of the input image is higher, the adjusting width of the average APL can be getting larger (step S 106 ). When the average APL of the currently inputted one frame image is less than the reference APL (step S 105 ), then the APL restrictor  93  does not modulate the pixel brightness of the inputted one frame image, but performs the step  107  to reversely convert the gamma characteristics of the inputted image into original condition. 
     The APL restrictor  93  reversely converts the linearized gamma characteristics into the original gamma characteristics by substituting the unmodulated brightness (Y) or the modulated brightness (Y) in step S 106  into the Equation 7 (step S 107 ). Further, the APL restrictor  93  calculates the RGB digital video data which will be-shown on the liquid crystal display panel  10  by substituting the color difference information (CbCr) inputted form the brightness extractor  92  and the brightness (Y) modulated to 2.2 gamma characteristics in step S 107  into the Equations 8 to 10 (steps S 108  and  109 ). The RGB digital video data outputted from the APL restrictor  93  is supplied to the source drive ICs  131  to  136  via the timing controller of the control board (CTRB). 
     In the interim, in the image data processing steps of  FIG. 10 , the steps of S 102  and S 108  can be use some of the image engine conducting other kinds of image processing. 
     As a result, the liquid crystal display device and the driving method of the LCD according to the second embodiment of the present disclosure detects the image contents which can cause eye glare and fatigue of observer, that is, the input image of which average APL is higher than the reference APL, and controls the average brightness to be lowered actively. 
     As mentioned above, the liquid crystal display device and the driving method of the LCD according to the embodiments of the present disclosure analyzes the APL of the input image and restricts the APL of the input image not to be larger than a predetermined limit APL value. Therefore, the brightness of the image having high brightness can be lowered so that the eye glare and fatigue are reduced. 
     While the embodiment of the present invention has been described in detail with reference to the drawings, it will be understood by those skilled in the art that the invention can be implemented in other specific forms without changing the technical spirit or essential features of the invention. For example, even though the embodiment of the present disclosure explains the liquid crystal display device mainly, the algorithm of these embodiments can be applied to plasma display panel (or “PDP”), electroluminescence device (or “EL”) and other flat panel display devices within the scope of the present disclosure. Therefore, it should be noted that the forgoing embodiments are merely illustrative in all aspects and are not to be construed as limiting the invention. The scope of the invention is defined by the appended claims rather than the detailed description of the invention. All changes or modifications or their equivalents made within the meanings and scope of the claims should be construed as falling within the scope of the invention.