Patent Publication Number: US-6211735-B1

Title: RF power amplifier having improved power supply for RF drive circuits

Description:
BACKGROUND OF THE INVENTION 
     1. Technical Field 
     This invention relates to the art of AM radio broadcasting and, more particularly, to an RF power amplifier system of the type employed in AM radio broadcasting having an improved power supply. 
     2. Description of the Prior Art 
     The U.S. Patents to H. I. Swanson 4,580,111 and 4,949,050 disclose an amplitude modulator for use in AM radio broadcasting and wherein the modulator serves to generate an amplitude modulated signal by selectively turning on and off a plurality of RF amplifiers in a digital manner to produce amplitude modulation. Each of the RF amplifiers includes a plurality of switching transistors, each of which may take the form of a MOSFET transistor, connected together in a bridge circuit. This bridge circuit provides output signals to an output combiner. Each of the MOSFET transistors has a gate which is driven by properly phased RF frequency signals that allow the proper MOSFET transistors to be turned on at the correct times. 
     The drive system for driving the RF amplifier MOSFET switching transistors includes a transformer having a secondary winding for driving each MOSFET switching transistor. This provides a low impedance source of drive for the gate of each MOSFET switching transistor. This also provides the correct out-of-phase drive to the MOSFET switching transistors. Thus, the bridge arrangement includes upper MOSFET switching transistors and lower MOSFET switching transistors. The correct out-of-phase drive to the MOSFET transistors provides the proper gate voltage with respect to the source voltage. 
     With the onset of digital radio operations, a direct drive operation of the switching transistors is desirable. Such a circuit has been disclosed in the U.S. Pat. to J. N. Malec 5,612,647. The present invention is directed towards improvements over those shown in the Swanson patents and the Malec patent. 
     The present invention is directed toward a direct drive RF power amplifier system that employs a buffer amplifier in the gate circuit of each of the MOSFET switching transistors and wherein the power supply for the buffer amplifiers includes a DC to DC converter operating in synchronism with the carrier frequency employed so that the DC supply voltage for the buffer amplifiers will have a DC ripple voltage which is same as the amplifier carrier frequency. This will minimize intermodulation products because the ripple frequency is locked to the carrier frequency. 
     SUMMARY OF THE INVENTION 
     The invention herein contemplates the provision of a RF power amplifier system employing an RF source for providing a train of RF pulses exhibiting RF cycles of a fixed frequency and wherein each pulse is of a fixed amplitude and duration. A bridge circuit includes a first transistor switch which, when on, connects a DC voltage source across a load for DC current flow therethrough in a first direction and a second transistor switch which, when on, connects the DC voltage source across the load for DC current flow therethrough in a second direction. A switch driver operates, when enabled, to pass the RF pulses for purposes of driving the first and second transistor switches on and off at a frequency dependent upon that of the RF pulses and in such a manner that current from the DC voltage source alternately flows in the first and second directions through the load. A driver controller provides turn on signals and selectively applies them to the switch driver for enabling the switch driver to pass the RF pulses to the transistor switches. 
     In accordance with the present invention, a driver amplifier is interposed between the switch driver and each transistor switch in the bridge circuit and a DC to DC power supply is provided for supplying DC drive voltage to each of the driver amplifiers wherein the power supply includes a second DC voltage source and a transformer having a primary winding and a plurality of secondary windings together with a switching transistor which, when turned on, connects the primary winding across the second DC voltage source. The switching transistor is turned on and off in synchronism with the frequency of the RF pulses so that any DC supply ripple voltage at the secondary windings has a ripple frequency equal to that of the frequency of the RF pulses. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The foregoing and other objects and advantages of the present invention will become more readily apparent from the following description as taken in conjunction with the accompanying drawings, wherein: 
     FIG. 1 is a prior art schematic-block diagram illustration of one application to which the present invention may be applied; 
     FIG. 2 is a prior art schematic-circuit illustration of one of the power amplifiers employed in FIG. 1; 
     FIG. 3 is a schematic-block diagram illustration of one embodiment of the present invention; 
     FIG. 4 is a schematic-block diagram illustration of a power amplifier incorporating circuitry in accordance with the preferred embodiment of the present invention; 
     FIG. 5 is a schematic-block diagram illustration of an improved power supply; 
     FIG. 6 is a schematic-block diagram of a prior art MOSFET drive circuit; 
     FIG. 7 is a schematic-circuit illustrating a an inductive steering drive circuit; 
     FIG. 8 is a graphical illustration of voltage amplitude with respect to time illustrating an RF drive waveform employing inductive steering; and, 
     FIG. 9 is a plurality of waveforms illustrating the timing diagram for the amplifier herein with the waveforms being illustrated as amplitude with respect to time. 
    
    
     DESCRIPTION OF PREFERRED EMBODIMENT 
     One application of the present invention is in conjunction with RF power amplifiers employed in an AM broadcast transmitter. An example of such a transmitter is presented in FIG.  1  and takes the form of a digital amplitude modulator such as that illustrated and described in the aforesaid U.S. Pat. No. 4,580,111, which is assigned to the same assignee as the present invention, the disclosure of which is herein incorporated by reference. 
     The discussion which follows is directed to an explanation of the operation of the circuitry shown in FIG. 1 followed by a detailed description of a power amplifier as illustrated in FIG. 2 herein as background for the discussion of the invention presented with respect to the embodiment illustrated herein in FIG.  3 . 
     Referring now to FIG. 1, the amplitude modulator  10  is illustrated as receiving an input signal from input source  12  which may be the source of an audio signal. Modulator  10  generates an RF carrier signal which is amplitude modulated as a function of the amplitude of the input signal from source  12 . The amplitude modulated carrier signal is provided on an output line connected to a load  14 , which may take the form of an RF transmitting antenna. This output line includes an output network  11  including an inductor  13  and a capacitor  15 . A digitizer  16  provides a plurality of digital control signals D 1  through DN. The control signals are binary signals each having a binary 1 or a binary 0 level. The number of signals having binary 1 or binary 0 levels is dependent upon the instantaneous level of the input signal. 
     Each of the output control signals D 1 -DN is supplied to one of a plurality of N RF power amplifiers PA 1 -PA N . The control signals serve to turn associated power amplifiers either on or off. Thus, if the control signal has a binary 0 level, then its associated amplifier is inactive and no signal is provided at its output However, if the control signal is of a binary 1 level, then the power amplifier is active and an amplified carrier signal is provided at its output. Each power amplifier has an input connected to single common RF source  20 . The RF source  20  serves as the single source of an RF carrier signal which is supplied by way of an RF splitter  22  so that each amplifier PA 1 -PA N  receives a signal of like amplitude and phase and frequency. The carrier signal is amplitude modulated in accordance with the control signals D 1 -DN and the amplitude modulated carrier signals will be of like frequency and phase. These signals are supplied to a combiner circuit  24  comprised of a plurality of transformers T 1 , T 2 , . . . , T N . The secondary windings act as an independent signal source, whereby the signals provided by the various transformers additively combine with one another to produce a combined signal which is supplied to the load  14 . This combined signal has the same frequency as the RF signal supplied by the RF source  20 , but the amplitude of the combined signal is modulated in accordance with the input signal supplied by the input source  12 . 
     As is conventional in such a system, the RF source  20  includes an RF oscillator  21  having a frequency on the order of 60 to 1600 KHz. This oscillator feeds an RF driver  23 , the output of which is supplied to the power amplifiers PA 1 -P N . The RF driver provides power amplification of the RF signal obtained from oscillator  21  prior to the signal being supplied to the power amplifiers at which modulation also takes place. The RF driver  23  may include several stages of amplification and may be configured similar to the power amplifiers PA 1 -P N . 
     FIG. 2 illustrates one form which the power amplifier PA 1  of FIG. 1 may take, the other power amplifiers PA 2 -P N  being similar. The power amplifier illustrated includes four MOSFET switching transistors  70 ,  72 ,  74  and  76  connected together in a bridge arrangement across a DC power supply voltage B+, which may have a magnitude on the order of 250 volts. The primary winding  44  of an associated transformer T 1  is connected across the bridge junctions J 1  and J 2 . 
     More particularly, the semiconductor amplifier elements are metal oxide semiconductor, field effect transistors (MOSFETs) having three electrodes, conventionally identified as the gate, drain, and source. The drain-source paths of the transistors  70  and  72 , representing their primary current paths, are connected in series across the DC power supply, as are the drain-source current paths of transistors  74  and  76 . The primary winding  44  of the corresponding combiner transformer T 1  is connected in series with a DC blocking capacitor  78  across the common junctions J 1  and J 2  between transistors  70  and  72  and transistors  74  and  76 . 
     The transistors  70 ,  72 ,  74  and  76  effectively operate as switches to connect the two sides of the primary winding  44  to either the DC voltage source or to ground. By proper operation of these transistors, the transformer winding  44  can be connected in either direction across the DC power supply. 
     Referring back to FIG. 2, the transistor switches  70 ,  72 ,  74  and  76  are controlled by signals applied to their gate electrodes. The gate signals for all four transistors are derived from individual secondary transformer windings. This transformer has a toroidal ferrite core with a primary winding  82  and four secondary windings  84 ,  86 ,  88  and  90  wound around it. The turns ratio of the transformer is 1:1, whereby the same signal appearing at the primary is applied to each of the circuits connected to the four secondary windings. 
     Each of the four secondary windings is connected between the gate and source electrodes of an associated one of the MOSFETs  70 - 76 . The secondary  84  is directly connected between the gate of MOSFET  70  and junction J 1 , while secondary  88  is similarly directly connected between the gate of MOSFET  74  and junction J 2 . The secondary windings  86  and  90  are in like manner connected between the gate and source electrodes of MOSFETs  72  and  76 . 
     The primary winding  82  of the toroidal transformer is connected to the output of the RF source  20 , which provides a sinusoidal RF driving voltage to the power amplifier. Each MOSFET turns “on” when the RF signal applied to its gate is on its positive half cycle and “off” when the applied signal is on its negative half cycle. The MOSFETs therefore cyclically turn on and off at a frequency and phase of the applied RF gate signal. The windings  84  and  90  are connected across MOSFETs  70  and  76  in similar directions whereby the signals appearing at the gates of these transistors are in phase with one another. MOSFETs  70  and  76  therefore turn on and off in unison. Windings  86  and  88 , on the other hand, are connected across MOSFETs  72  and  74  in a direction opposite to the direction of connection of the windings  84  and  90 . The signals applied to the gates of MOSFETs  70  and  76  are therefore 180° out of phase with respect to the signals applied to the gates of transistors  74  and  72 . Consequently, when transistors  70  and  76  are “on”, transistors  72  and  74  are “off”, and vice versa. 
     It is seen from the discussion presented above that each of the RF power amplifiers PA 1  through PA N  requires a transformer having a secondary winding associated with the gate of each MOSFET transistor. Thus, as is seen in FIG. 2, the secondary windings  84 ,  86 ,  88 , and  90  provide the sinusoidal RF driving voltage to the gate electrodes of the MOSFET transistor switches. The driving voltages are required to have the proper phasing so that MOSFET transistors  70  and  76  are on while transistors  72  and  74  are off and vice versa. In addition to the proper phasing of these RF signals, the RF driver  23  (see FIG. 1) includes several stages of amplification. In each of these stages there are losses in the amplifiers, tuner circuits, and coupling circuits. 
     In addition to the foregoing, it is to be noted that the bridge amplifier of FIG. 2 employs a buffer amplifier  100  and a tuning circuit including a capacitor  102  and an inductor  104 . Drive signals are tuned and create sinusoidal drive signals which have slow rise and fall times during the transitions. Such an amplifier has a narrow bandwidth and thus requires tuning for each operating frequency. Also, the drive method shown in FIG. 2 requires a higher drive power because the signal is a bipolar level and thus the drive signal is an AC signal that swings between positive and negative levels. Such a sinusoidal drive signal results in slow dv/dt. It is difficult to switch such an RF drive on and off at a high switching rate because of the increase in switching losses due to the slow dv/dt operation from using a sinusoidal drive signal. Thus during each ON-OFF transition, the RF drive tuning circuit is de-tuned due to the dynamic loading changes which can cause unwanted phase modulation to the output of the transmitter. 
     In accordance with the present invention there is provided a direct MOSFET transistor drive as will be described in detail herein with reference to FIG.  4 . One application of the present invention is represented by the circuit of FIG. 3 which employs circuitry similar to that of FIG.  1  and consequently like components are identified with like character references. In this embodiment however, the RF oscillator  20 ′ provides an RF frequency signal which is made up of a train of square wave RF pulses exhibiting RF cycles of a fixed frequency and each positive pulse being of a fixed magnitude and fixed width. The RF pulses are supplied to a pair of one shot circuits including a one shot circuit  200  and by way of an inverter  202  to a second one shot circuit  204 . These provide bridge phase A and bridge phase B square wave signals or pulses to the power amplifiers PA 1 -PA N  with the bridge phase A and bridge phase B signals being 180 degrees out of phase from each other as is shown in FIG. 9 with a dead time DT between the pulses. 
     Each of the power amplifiers PA 1 -PA N  in FIG. 3 takes the form of power amplifier PA 1  illustrated in greater detail in FIG.  4 . In FIG. 4, the four MOSFET transistors  70 ,  72 ,  74  and  76  are illustrated in the same manner as that as shown in FIG. 2 with the drain electrodes of transistors  70  and  74  being connected to the B+voltage supply source. A direct drive is obtained with the circuitry illustrated in FIG.  4  and wherein only logic level signals are employed and no bipolar signals are employed. 
     The drive circuits for the various MOSFET transistors  70 ,  72 ,  74  and  76  each include a MOSFET driver amplifier serving as a buffer amplifier and these include buffer amplifiers  210 ,  212 ,  214  and  216 . Each is supplied with power from a synchronous isolated RF drive power supply (SIPS)  220 . This power supply is a DC to DC power supply and provides low voltage outputs to operate the MOSFET buffer amplifiers and the DC supply voltage may exhibit a ripple voltage wherein the ripple is of the same frequency as the carrier frequency F c  (as taken from the output of the RF oscillator  20 ′ FIG.  3 ). The power supply  220  of FIG. 4 is illustrated in greater detail in FIG. 5 to which attention is now directed. 
     In FIG. 5, the input signal at frequency F c is taken from the output of the one shot circuit  204  (FIG. 3) and is inverted by an inverter  222  with the square wave pulse train being supplied to a divide by two circuit  224  which may take the form of a flip flop having a Q and {overscore (Q)} outputs. These outputs are 180 degrees out of phase and each exhibits a frequency of F c /2. The pulses obtained from the Q output of divider circuit  224  are supplied to a one shot circuit  226  and those from the {overscore (Q)} output are supplied to a one shot circuit  228 . The output pulses obtained from the one shot circuits are 180 degrees out of phase with respect to each other and are respectively applied to the gates of MOSFET transistors  230  and  232 . The pulses obtained from one shot circuits  226  and  228  are also provided with a deadband to ensure that transistors  230  and  232  are not turned on at the same time. These transistors are each connected in series with the primary winding  240  of a transformer T 10  having a plurality of secondary windings  242 ,  244  and  246 . When transistor  230  is on it connects the upper end of winding  240  to a DC source V 1  whereas when transistor  232  is on it connects the upper end of the winding  240  to ground. As noted, each secondary winding is provided with a full wave diode bridge to produce a DC supply voltage for the associated MOSFET buffer amplifiers. The rectified DC voltage from secondary winding  244  is applied across the buffer amplifier  210  whereas that across secondary winding  246  is applied across buffer amplifier  214 . These amplifiers are floating relative to ground. The full wave diode bridge connected across winding  242  is referenced to ground and consequently a single output taken from the upper end of this full wave diode bridge is supplied to the buffer amplifiers  212  and  216 . This is a half bridge switching power supply that operates at one-half of the transmitter carrier frequency (F c /2). The DC ripple voltage obtained from each of the three full wave diode bridge circuits on the secondary windings  242 ,  244  and  246  exhibits a ripple frequency equal to the amplifier carrier frequency (F c ) and therefore no intermodulation products will be created. If the power supply operates at a different frequency it would result in unwanted intermodulation products due to the mixing between the amplifier carrier frequency and the switching power supply frequency. 
     As noted in FIG. 4, an inductive steering drive (ISD) circuit is provided between each buffer amplifier and the associated MOSFET transistor. Thus, inductive steering drive circuits  250 ,  252 ,  254  and  256  are respectively located in the gate drive circuits of transistors  70 ,  72 ,  74  and  76 . Each of these circuits takes the form of the inductive steering drive circuit  250  as illustrated in FIG. 6 to which attention is now directed. A typical MOSFET starts to turn-on at 2 Vdc and is completely on at 4 Vdc. The threshold for turn-off is going in the reverse direction, it starts to turn-off at 4 Vdc and is completely off at 2 Vdc. 
     In order to achieve the best efficiency as a class D amplifier, fast turn-off is essential. On the other hand, turn-on slope is not as important because during each turn-on cycle, the current through each MOSFET is zero and hence no dissipation. During turn-off, the current is still flowing through the bridge amplifier, interruption of the current can cause dissipation and low overall efficiency if the fall time is slower. 
     The input drive signal “x” is an ideal square-wave shown by waveform  260  in FIG.  8 . The input capacitance of the MOSFET and the output impedance of the MOSFET driver limit the signal&#39;s rise and fall slopes. 
     To explain the drive function of the circuit, reference is made to the prior art circuit  251  of FIG.  6 . The output impedance of the MOSFET driver is Ro and the input gate capacitance for the MOSFET  70  is Ciss is shown in FIG.  6 . The standard driving circuit can be simplified as two-element circuit consists of Ro and Ciss, where the transient response waveform  262  is shown in FIG. 8, which has the characteristic of the log function. The rise time is relatively fast but the fall time is much slower with a trailing off slope, which increases MOSFET dissipation because the MOSFET current is not zero during switch off period from 4 V to 2 V. 
     On the other hand, the ISD circuit  250  (FIG. 7) with added components L 1 , R 1 , CR 1  and R 3 , has a trapezoidal drive signal with a linear rise and fall times as seen in waveform  264  in FIG.  8 . As the input drive signal “x” goes from low to high, the voltage at the gate of the MOSFET is delayed allowing energy to store in the series inductor L 1 . Gate voltage waveform is then overshot by the energy returned from the inductor. Similar transient response under turn-off condition. 
     A correct inductor L 1  value is when the slopes of the rise and fall times are maximized (highest dv/dt) to minimize any transition switching losses. Some overshot and undershoot are necessary to provide over damp transient characteristic to ensure a linear slope of rise and fall times. Snubber circuit including CR 1  and R 3  is only active if the negative undershoot is greater than the diode drop voltage of the CR 1 . These two components are transparent during the overshoot condition. 
     With such a fast fall time, the MOSFET dissipation is minimized and, hence, maximum output efficiency is achieved permitting this bridge amplifier to operate at very high frequencies suitable for use with digital radio operation. Using this inductive drive circuit, a diode snubbing circuit including capacitor C 1 , resistor R 2 , diode CR 1  and resistor R 3  is added to prevent any oscillation created by the series inductor in combination with the gate capacitance of the MOSFET. It is to be noted that this steering drive permits elimination of the RF drive tuning circuit including capacitor  102  and  104  (see FIG.  2 ). 
     A switch driver arrangement is provided for passing bridge phase B pulses or bridge phase A pulses to drive the MOSFET transistors such that transistors  70  and  76  are turned on as a pair by bridge phase B pulses and then turned off and transistors  72  and  74  are turned on as a pair by bridge phase A pulses. The phase B pulses are passed by a logic switch driver AND gate  300  when enabled from a Q output of a D type flip flop  302 . Phase B pulses passed by AND gate  300  are applied to a pulse transformer. The output of the pulse transformer  304  is rectified by a diode  306  and then buffered by the buffer amplifier  210 . 
     Similarly, a switch driver logic gate taking the form of AND gate  310 , when enabled by flip-flop  302 , passes the bridge phase A pulses to the gate of transistor  74  by way of a pulse transformer  312  and a diode  314  and buffered by buffer amplifier  214 . 
     Whenever transistor  70  is turned on, a phase B pulse is also passed by an OR gate  320  to turn on transistor  76  by way of buffer amplifier  216  and the inductive steering drive circuit  256 . Similarly, whenever transistor  74  is turned on, a phase A pulse is passed by an OR gate  330  and the buffer amplifier  212  and the inductive steering drive circuit  252  to the gate electrode of transistor  72  to turn this transistor on. 
     Reference is now made to the waveforms of FIG. 9 which provide a timing diagram for the operation of the power amplifier depicted in FIG.  4 . The module turn on signal obtained from the D 1  output of digitizer  16  is supplied to the clock CLK input of flip flop  302  in FIG.  4 . This flip flop serves as a driver controller for providing turn on or enabling signals to enable AND gates  300  and  310  for purposes of passing the bridge phase B pulses and the bridge phase A pulses to drive transistors  70  and  74 . As seen in FIG. 8, the Q output of flip flop  302  is raised providing a binary “1” signal upon the falling edge of the bridge phase B signal and this serves as an enabling signal to enable AND gates  300  and  310 . Using flip flop  302  to synchronously control the amplifier ensures that the turn on and turn off of the amplifier takes place at the start and end of an RF cycle. The waveforms  400 ,  402 ,  404 ,  406 ,  408  and  410  of FIG. 9 show a timing diagram for the amplifier operating over two complete clock cycles. The amplifier output is synchronized to the Q and the {overscore (Q)} outputs. This is an important factor to maintain reliable operation. If the switching timing is not synchronized, damage to the MOSFETs may occur and cause a high dv/dt secondary breakdown of the transistors. 
     The pulse transformers  304  and  312  provide isolated drive signals (bridge phase A and bridge phase B pulses) to the floating MOSFET transistors  70  and  74 . The rectified RF drive signals from the secondary of pulse transformers T 1  and T 2  are buffered by the MOSFET drivers  210  and  214  to switch the floating transistors on and off to produce an amplified output signal. 
     Although the invention has been described in conjunction with a preferred embodiment, it is to be appreciated that various modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims.