Patent Publication Number: US-7586471-B2

Title: Drive circuit and drive method for panel display device

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a drive circuit and a drive method for a panel display device, and particularly to a drive circuit and a drive method for a panel display device which are capable of charging light-emitting devices at high speed. 
     2. Description of the Related Art 
       FIG. 9  illustrates an organic EL panel display device which has organic EL devices PE P,Q  (P is an integer ranging from 1 to m; Q is an integer ranging from 1 to n) arranged at respective intersections between a plurality of data lines (anode lines) SEG 1  to SEG m  (m is an integer no smaller than 2) and a plurality of scan lines (cathode lines) COM 1  to COM n  (n is an integer no smaller than 2). A drive device of this organic EL panel display device has switch circuits SWs 1  to SWs m  for connecting the data lines SEG P  to respective constant current sources  11 , and switch circuits SWc 1  to SWc n  for connecting the respective scan lines COM Q  to a power supply potential (Vcc)  20 . A drive control circuit  10 , or output control means, controls these switch circuits SWs P  and SWc Q  to select/deselect the organic EL devices PE P,Q . 
     Now, typical operation for causing the organic EL panel display device to emit light for display will be described with reference to operating waveforms shown in  FIG. 10 . When the switch circuits SWc Q  connecting to the scan lines COM Q  are turned ON and OFF at a certain period of interval (which defines one frame), the scan lines COM Q  on which the organic EL devices PE P,Q  to be lit are arranged are sequentially selected. Here, the turned ON state is selected by connecting the scan lines COM Q  to a ground potential Vss. The turned OFF state is selected by connecting the scan lines COM Q  to the power supply potential Vcc. A single frame period P 0  is typically composed of a discharge period P 1  for discharging electric charges stored in the organic EL devices PE P,Q , and a charge period P 2  for turning ON a single scan line COM Q  to cause the selected organic EL device PE P,Q  to emit light. 
     In the charge period, the switch circuit SWs P  on the data line SEG P  that is connected with the selected organic EL device PE P,Q  is turned ON to connect the data line SEG P  to the constant current source  11 . As a result, the current from the constant current source  11  is supplied to cause the organic EL device PE P,Q  to emit light. Here, the rows of the unselected scan lines COM Q  and the unselected organic EL devices PE P,Q  might undergo crosstalk and cause emission defects due to half-excited states of the organic EL devices PE P,Q . To avoid this, control is usually performed to supply the potential of a power supply voltage level to the scan lines COM Q  and to supply a potential of the GND level to the data lines SEG P , thereby applying reverse biases to the organic EL devices PE P,Q . 
     In the discharge period, for the sake of preventing residual charges in the previous frame from causing emission defects in the next frame, the ground potential Vss is applied to all the data lines SEG P  and the scan lines COM Q , thereby resetting charges stored in the organic EL devices PE P,Q  to zero (the organic EL devices PE P,Q  are zero-biased). 
     A related art of a drive circuit for an organic EL panel display device is disclosed, for example, in Japanese Patent No. 3507239. 
     In the related art of the drive circuit and the drive method for a panel display device, however, constant current sources are used for charging. The rise time required for charging up to a voltage necessary for light emission is long, thus causing such problems as deteriorated emission intensities of the organic EL devices PE P,Q  and uneven display (variations in brightness). 
     SUMMARY OF THE INVENTION 
     According to one aspect of the present invention, there is provided a drive circuit for a panel display device for driving light-emitting devices arranged at respective intersections between a plurality of data lines and a plurality of scan lines. This drive circuit comprises: a voltage control circuit for charging the light-emitting devices to a voltage necessary for light emission by connecting the data lines to a predetermined power supply potential in a rising period prior to a period for selectively causing the light-emitting devices to emit light; and a drive control circuit for selectively connecting the data lines to a constant current source after the rising period. 
     According to another aspect of the present invention, there is provided a drive method for a panel display device for driving light-emitting devices arranged at respective intersections between a plurality of data lines and a plurality of scan lines. This drive method comprises the steps of: charging the light-emitting devices to a voltage necessary for light emission by connecting the data lines to a predetermined power supply potential in a rising period prior to a period for selectively causing the light-emitting devices to emit light; and selectively connecting the data lines to a constant current source after the rising period. 
     The drive circuit for a panel display device and the drive method for a panel display device according to the present invention accelerate the rise for charging up to the voltage necessary for light emission, thus enabling to charge at higher speed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       FIGS.  1  and  3 - 6  are block diagrams illustrating a drive circuit for a panel display device which is a first embodiment of the present invention; 
         FIG. 2  is a timing chart for the purpose of illustrating operation of driving the panel display device of the first embodiment of the present invention; 
         FIG. 7  is a block diagram of a voltage control circuit according to the first embodiment of the present invention; 
         FIG. 8  is a timing chart for the purpose of illustrating operation of driving the panel display device according to a second embodiment of the present invention; 
         FIG. 9  is a block diagram of a drive circuit for a conventional panel display device; and 
         FIG. 10  is a timing chart for the purpose of illustrating operation of driving the conventional panel display device. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Hereinafter, a best mode for carrying out the invention will be described with reference to the drawings. It should be noted that the shapes, dimensions, and layout of the individual components in the drawings are schematically illustrated only for the purpose of understanding of the present invention. It will nevertheless be understood that no limitation of the scope of the invention is thereby intended. 
       FIG. 1  is a block diagram illustrating a drive circuit for a panel display device which is a first embodiment of the present invention. The organic EL panel display device has light-emitting devices, or organic EL devices PE P,Q  (P is an integer ranging from 1 to n; Q is an integer ranging from 1 to m), which are arranged at respective intersections between a plurality of data lines (anode lines) SEG 1  to SEG m  and a plurality of scan lines (cathode lines) COM 1  to COM n  (m and n are integers no smaller than 2). 
     The drive circuit for the panel display device according to the present invention comprises first switch circuits SWs P , second switch circuits SWc Q , and third switch circuits SWv P . The first switch circuits SWs P  connect the data lines SEG P  to either respective constant current sources  11  or a ground potential Vss. The second switch circuits SWc Q  connect the respective scan lines COM Q  to either one of a scan line power supply  20  (power supply potential Vcc) and the ground voltage Vss. The third switch circuits SWv P  connect the respective data lines SEG P  to a data line power supply  30  (power supply potential Vdd). The first and second switch circuits SWs P  and SWc Q  are controlled by a drive control circuit  10 , whereby the organic EL devices PE P,Q  are selected/deselected. The third switch circuits SWv P  selectively connect the data lines SEG P  to the power supply potential Vdd in accordance with output of a voltage control circuit  12 . Incidentally, the third switch circuits SWv P  may be included in the voltage control circuit  12 . 
     The first and second switch circuits SWs P  and SWc Q  are composed of PMOS transistors (P-channel MOS transistors) and NMOS transistors (N-channel MOS transistors) which can be controlled by control signals supplied from the drive control circuit  10 , for example. The third switch circuits SWv P  are composed of PMOS transistors and NMOS transistors which can be controlled by a control signal supplied from the voltage control circuit  12 , for example. Incidentally, the first and second switch circuits SWs P  and SWc Q  may be included in the drive control circuit  10 . 
     The voltage control circuit  12  connects a selected data line SEG P  to the power supply potential Vdd during a rising period in which the organic EL devices PE P,Q , i.e., capacitive loads are charged up to a voltage necessary for light emission. After this rising period, the voltage control circuit  12  disconnects the data line SEG P  from the power supply potential Vdd. Subsequently, the drive control circuit  10  connects the data line SEG P  to the constant current source  11 . 
     As shown in  FIG. 7 , the voltage control circuit  12  comprises a register circuit, a counter circuit, a comparator circuit, and a logic circuit. Initially, when a control signal is input thereto, the voltage control circuit  12  turns ON a third switch circuit SWv P  by the logic circuit. Next, when setting data indicating a desired time is supplied to the register circuit and the setting data coincides with count value of the counter circuit, the voltage control circuit  12  turns OFF the third switch circuit SWv P  by the logic circuit based on output of the comparator circuit. 
     Now, with reference to the timing chart shown in  FIG. 2 , description will be given of the operation of driving the panel display device according to the first embodiment of the present invention. 
     In each single frame period, panel rows including the organic EL devices to be lit are successively selected by combinations of the turned ON state and turned OFF state of the switch circuits SWc Q  which are connected to the scan lines COM Q . Here, the turned ON state is selected by connection to the ground potential Vss. The turned OFF state is selected by connection to the power supply potential Vcc. 
     In the discharge period P 1 , load charges on the organic EL devices PE P,Q  which are capacitive loads are reset. In the charge period P 2 , a scan line COM Q  is turned ON so that the organic EL device PE P,Q  that is selected and connected to this scan line COM Q  emits light. 
     According to the first embodiment of the present invention, all the data lines SEG P  and the scan lines COM Q  are connected to the ground potential Vss in the discharge period P 1  so that the charges stored in the organic EL devices PE P,Q  are reset to zero. Then, in the rising period P 12 , the voltage control circuit  12  turns ON the switch circuits SWv P  for a predetermined time so that the potentials of the data lines SEG P  rise to a certain potential before the start of the charge period P 2 . 
     Specifically, as shown in  FIG. 2 , in the charge period P 2  (the period from t 2 ′ to t 3 ), the switch circuit SWs 1  is initially connected to the constant current source  11  and the switch circuit SWc 1  is connected to the ground potential Vss so that the organic EL device PE 1,1  emits light. Next, as shown in  FIG. 3 , the discharge period is entered at time t 3 . Here, all the switch circuits SWs P  and SWc Q  are connected to the ground potential Vss, whereby the load charges on the organic EL devices PE P,Q  are reset to zero. At time t 4 , the charge period is entered as shown in  FIG. 4 . Here, the switch circuits SWs P  are turned OFF, and the switch circuit SWc 1  is connected to the power supply potential Vcc. Then, the voltage control circuit  12  turns ON the switch circuits SWv P  to connect the organic EL devices PE P,Q  to Vdd until time t 4 ′. This charges the organic EL devices PE P,Q  until their potentials reach a certain potential (target potential Vs P ). Subsequently, as shown in  FIG. 5 , the voltage control circuit  12  turns OFF the switch circuits SWv P  so that the data lines SEG P  are kept at a certain potential (Vsm±α; α is arbitrary). At time t 4 ′, as shown in  FIG. 6 , the switch circuit SWs 2  is connected to the constant current source  11  immediately. The switch circuits on the unselected data lines are connected to the ground potential Vss, and the switch circuit SWc 2  is connected to the ground potential Vss so that the organic EL device PE 2,2  emits light. 
     As described above, according to the first embodiment of the present invention, there are provided the voltage control circuit  12  and the switch circuits SWv P . When the light-emitting devices are selected, the light-emitting devices are connected to the power supply potential (Vdd) for a predetermined time during the rising period P 12  of the charge period, and then connected to the constant current supply sources after this predetermined time. This consequently allows high speed charging. Since the ON times of the switch circuits SWv P  can be adjusted by the voltage control circuit  12 , it is possible to adjust the charging capability. Consequently, the potentials of the data lines can be set to a certain potential, which makes it possible to adjust the potential setting in accordance to load characteristics of the panel. Moreover, the voltage control circuit  12  is configured so as not to supply a certain potential based on a voltage generated by a regulator. This allows a reduction in circuit scale. 
     Next, with reference to the timing chart shown in  FIG. 8 , description will be given of the operation of driving a panel display device which is a second embodiment of the present invention. 
     Here, the drive circuit for the panel display device may be configured the same as in the first embodiment of the present invention. 
     In the period P 1 , the switch circuits SWs P  are turned OFF as shown in  FIG. 4 . The switch circuit SWc 1  is connected to the power supply potential Vcc. Then, the voltage control circuit  12  turns ON the switch circuits SWv P  to charge the loads of the organic EL devices PE P,Q  up to a certain potential (target potential Vsm). Consequently, discharging is achieved in H level. 
     Subsequently, in the period P 2 , as shown in  FIG. 5 , the voltage control circuit  12  turns OFF the switch circuits SWv P , so that the potentials of the data lines SEG P  are kept at a certain potential (Vsm±α; α is arbitrary). At time t 4 , as shown in  FIG. 6 , the switch circuit SWs 2  is connected to the constant current source  11  immediately. The switch circuits on the unselected data lines are connected to the ground potential Vss, and the switch circuit SWc 2  is connected to the ground potential Vss so that the organic EL device PE 2,2  emits light. 
     As described above, according to the second embodiment of the present invention, the charged organic EL devices will not be discharged temporarily. In other words, the charges in the organic EL devices will not be reset to zero. This allows a significant reduction in power consumption. 
     It is understood that the foregoing description and accompanying drawings set forth the preferred embodiments of the invention at the present time. Various modifications, additions and alternatives will, of course, become apparent to those skilled in the art in light of the foregoing teachings without departing from the spirit and scope of the disclosed invention. Thus, it should be appreciated that the invention is not limited to the disclosed embodiments but may be practiced within the full scope of the appended claims. 
     This application is based on a Japanese Patent Application No. 2004-223073 which is hereby incorporated by reference.