Patent Publication Number: US-6700445-B2

Title: Filter circuits based on trans-conductor circuits

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to filter circuits, and more specifically to a method and apparatus for implementing filter circuits based on trans-conductor circuits. 
     2. Related Art 
     Filter circuits are generally implemented to perform corresponding transfer functions as is well known in the relevant arts. By the appropriate choice of transfer functions, filter circuits may be implemented to provide corresponding utilities (e.g, low pass filter, band pass filter). Filter circuits may be used in several environments such as signal receiving systems, digital circuits, etc., as is well known in the relevant arts. 
     Filter circuits are often implemented using components such as trans-conductors and operational amplifiers. In some environments, it may be desirable to implement filter circuits using trans-conductors at least in that trans-conductors generally consume less electrical power than operational amplifiers. For further information on trans-conductors, the reader is referred to a book entitled, AAnalogue IC Design: The current-mode approach@, by C. Toumazou, F. J. Lidge &amp; D. G. Haigh, ISBN No.:086341 215 7, and is incorporated in its entirety herewith. 
     However, one typical problem with trans-conductor circuits based filter circuits is that the noise components introduced into the output signals is generally high at least compared to operational amplifiers based circuits. One way to reduce the noise component is by operating the filter circuits at high voltage levels or high power levels. However, such operation generally consumes more electrical power, and may be undesirable at least in some environments. In addition or in the alternative, the area (on an integrated circuit) of the trans-conductor circuits may have to be increased to reduce the noise factor, which may also be undesirable in many environments. 
     What is therefore required is a filter circuit based on trans-conductor circuits which satisfies one or more of the above-noted requirements. 
     SUMMARY OF THE INVENTION 
     A basic block implemented according to an aspect of the present invention may be used to implement a filter circuit. In an embodiment, the basic block contains a biasing circuit providing a biasing signal to set an operating point of a trans-conductor circuit and a common-mode feedback circuit providing a feedback signal to stabilize the trans-conductor circuit, with the biasing signal and the feedback signal being combined and provided on a common path to the trans-conductor circuit. 
     Due to the use of the common path, the number of components (including transistors) to implement the basic block may be reduced. As a result, the noise introduced by the components of a filter circuit and the total electrical power consumed may be minimized. 
     An embodiment of the basic block may further include a control circuit generating a quiescent voltage of the trans-conductor circuit, with the control circuit being implemented to have a same (or similar) transfer function as the trans-conductor circuit. The biasing circuit may set the operating point of the trans-conductor circuit based on the quiescent voltage also. In one implementation, the control circuit is implemented similar (in terms of components and connectivity) to the trans-conductor circuit and operated on by using a D.C. voltage to generate the quiescent voltage of the trans-conductor circuit. 
     The common-mode feedback circuit may contain a common mode sense circuit generating a common mode voltage, and an error amplifier may amplify the common mode voltage and providing a resulting amplified output to the biasing circuit. In an embodiment, the trans-conductor circuit is implemented using PMOS transistors and the biasing circuit is implemented using NMOS transistors. 
     Further features and advantages of the invention, as well as the structure and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will be described with reference to the accompanying drawings, wherein: 
     FIG. (FIG.)  1  is a circuit diagram illustrating the details of an example device in which the present invention may be implemented; 
     FIG. 2 is a circuit diagram illustrating the details of an embodiment of a filter circuit; 
     FIG. 3 is a circuit diagram illustrating the details of an embodiment of a basic filter block implemented in accordance with the present invention; and 
     FIG. 4 is a circuit diagram of a basic filter block illustrating additional implementation in an embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     1. Overview and Discussion of the Invention 
     According to an aspect of the present invention, a biasing signal designed to set an operating point of a trans-conductor circuit and a common mode feedback signal for the trans-conductor circuit are combined and provided on a common path to the trans-conductor circuit. As a result, the number of components used to implement a filter circuit may be reduced, leading to lower noise and reduction of electrical power consumption. 
     Several aspects of the invention are described below with reference to example devices for illustration. It should be understood that numerous specific details, relationships, and methods are set forth to provide a full understanding of the invention. One skilled in the relevant art, however, will readily recognize that the invention can be practiced without one or more of the specific details, or with other methods, etc. In other instances, well-known structures or operations are not shown in detail to avoid obscuring the invention. 
     2. Example Device 
     FIG. 1 is a block diagram of receiver device  100  illustrating an example device in which the present invention may be implemented. For illustration, it is assumed that receiver device  100  is implemented within a Global Positioning System Receiver. However, receiver device  170  can be implemented in other devices (e.g., mobile phone, etc., in which reduction of power consumption is of importance) as well. Receiver device  100  is shown containing antenna  101 , filter  110 , low noise amplifiers (LNA)  120  and  140 , band pass filter  130 , mixer  150 , automatic gain controller  160 , filter circuit  170 , amplifier  180 , analog to digital converter (ADC)  190 , and processing unit  195 . Each component is described in further detail below. 
     Antenna  101  may receive various signals transmitted from satellites, etc. The received signals may be provided to filter  110 . Filter  110  may perform a corresponding transfer function to generate signals of the frequencies of interest. The generated signals are provided to LNA  120 . Antenna  101  and filter  110  may be implemented in a known way. 
     LNA  120  amplifies the signals received on line  112  to generate a corresponding amplified signal on line  123 . Band pass filter (BPF)  130  may filter the amplified signal to remove any unwanted noise components that may be present. The filtered signal thus generated may be provided to LNA  140 . LNA  140  may again amplify the filtered signals and provide the amplified filtered signal to mixer  150 . LNAs  120  and  140 , and BPF  130  may also be implemented in a known way. 
     Mixer  150  may be used to convert a high frequency signal to a signal having any desired frequency. In an embodiment, a signal of frequency 1575 MHz is converted to a 4 MHz signal. Mixer  150  may receive filtered amplified signal and a signal of fixed frequency as inputs. The signal (on path  151 ) of fixed frequency may be generated by a phase locked loop (not shown) in a known way. 
     Automatic gain control (AGC)  160  may be used to amplify or attenuate the signal (from mixer  150 ) according to various requirements. For example, if a user using a mobile phone is in an area where the signals received are of low strength, and AGC  160  amplifies the signal accordingly. Similarly, if the user moves to an area where the signal strength is relatively higher, AGC  160  may attenuate the signal. 
     Filter circuit  170  may remove any unwanted noise components present in the signal received on line  167  to generate a filtered signal. The filtered signal may be provided to amplifier  180 . Amplifier  180  may further amplify the signal received on line  178  to generate an amplified signal. The amplified signal may be provided to analog to digital converter (ADC)  190 . It may be noted that all the above components of FIG. 1 operate on signals that are analog in nature. 
     ADC  190  converts the analog signal received on line  189  to a corresponding digital signal. The digital signal on line  192  may then be provided to processing unit  195  for further processing. 
     It may be desirable to minimise electrical power consumption or to reduce the degree of unwanted noise introduced in many components such as low pass filter  170  and amplifier  180 . The manner in which such advantages may be obtained is described below with reference to filter circuit  170  for illustration. 
     3. Implementation of Filter Circuit 
     FIG. 2 is a block diagram illustrating the details of an embodiment of filter circuit  170 . For illustration, filter circuit  170  is shown as a second order filter in FIG.  2 . However, filter circuit  170  may also be used to implement filters corresponding to any order. Filter circuit  170  is shown containing basic filter blocks  251  through  254 , capacitors  261  through  262  and inverter  270 . Each component is described in further detail below. 
     Basic filter block (BFB)  251  receives an input signal with a voltage level of “Vin” on line  201  to generate a corresponding output signal with a current level of “Iout” on line  211 . The signals on line  211  may be represented as follows: 
     
       
           Iout=Vin*Gm   Equation (1) 
       
     
     
       
           Vout=Iout *Impedance of capacitor  261   Equation (2) 
       
     
     wherein ‘Vin’ represents the voltage of the input signal, ‘Iout’ represents the current of the output signal, ‘Gm’ represents the trans-conductance of a trans-conductor circuit contained within BFB  251 , and ‘*’ represents the multiplication operation, and Vout represents the voltage on line  211 . 
     Basic filter blocks  252 - 254  also operate similar to equations (1) and (2). Basic filter blocks  251 - 254  may be implemented using differential trans-conductor circuits. However, as noted above in the background section, trans-conductor circuits may introduce noise into the output signals and/or operate at high voltage. The manner in which basic filter blocks  251 - 254  may be implemented using differential trans-conductor circuits while addressing such concerns is described below in further detail. 
     4. Implementation of Basic Filter Block 
     FIG. 3 is a block diagram illustrating the details of an embodiment of basic filter block  251  implemented using trans-conductor circuit. Basic filter block  251  is shown containing differential trans-conductor circuit  310 , biasing circuit  320 , common mode feedback circuit  330 , bias interface circuit  340  and control circuit  350 . Each component is described below in further detail. 
     Differential trans-conductor circuit  310  may receive input signal ( 211 ) with a voltage level of Vin and generate a corresponding output signals according to equations (1) and (2). In an embodiment, differential trans-conductor circuit  310  is implemented using PMOS transistors. The output signal is shown provided to common mode feedback circuit  330 . 
     Control circuit  350  may have the same transfer function (in terms of converting voltage to electric current) as trans-conductor circuit  310 . However, control circuit  350  may operate using a direct current (dc) voltage such that the output of control circuit accurately represents a quiescent voltage (may approximately equal Vdd/2 on line  351 ). In an embodiment, control circuit  350  contains the same components and topology as trans-conductor circuit  310 , and may be implemented in a known way. 
     Common mode feedback circuit  330  is shown containing common mode sense circuit  335  and error amplifier  337 . Common mode sense circuit  335  may be designed to generate a common mode voltage on path  332 . In addition, common mode sense circuit  335  may be designed to operate across a large frequency range. Error amplifier  337  may amplify the signal generated by common mode sense circuit  335  to provide a feedback signal on path  332 . 
     In an embodiment described below with reference to FIG. 4, error amplifier  337  may be implemented within biasing circuit  320 . Bias interface circuit  352  may provide an interface between control circuit  350  and biasing circuit  320 . 
     Biasing circuit  320  generates a biasing signal on path  312 . The biasing signal biases (by providing a biasing signal) differential trans-conductor circuit  310  and sets the operating point. As is well known, the operating point generally refers to a steady-state operation of a circuit. In an embodiment, biasing circuit  320  may be implemented using NMOS transistors as shown. 
     The biasing signal (generated by biasing circuit  320 ) and the feedback signal (generated on path  332 ) are combined and provided on path  312 . Due to such combining, the number of components to implement the basic blocks may be minimized, leading to several advantages (such as reduction in noise introduced and power consumption). The description is continued with reference to the circuit level implementation of basic filter block  251 . 
     5. Circuit Implementation 
     FIG. 4 is a circuit diagram illustrating the details of an embodiment of basic filter block  251 . FIG. 4 is shown containing PMOS transistors  411  and  412 , NMOS transistors  421  through  425 , resistors  431  and  432 , capacitors  441  and  442 , and load  450 . Each component is described in further detail below. The relationship of the components of FIG. 4 with the components of FIG. 3 is also noted for the convenience of the reader. 
     Gate terminal  401  of PMOS transistors  411  is shown connected to the positive input signal (INP) and gate terminal  402  of PMOS transistor  412  is shown connected to negative input signal (INM). The signals INP and INM together represent the differential input signal with a voltage level of Vin. The two transistors together generate a corresponding output signal Vout across load  450 . The source terminal of both PMOS transistors  411  and  412  is connected to voltage Avdd (Supply) provided at point  405 . 
     PMOS transistors  411  and  412  together form an embodiment of differential trans-conductor circuit  310  of FIG.  3 . However, it will be apparent to one skilled in the arts to implement various alternative embodiments without departing from the scope and spirit of the present invention. For example, basic filter block  251  may be implemented using PMOS transistors in lieu of NMOS transistors and vice versa. 
     Resistors  431  and  432 , capacitors  441  and  442 , and NMOS transistors  423  and  424  may together represent common mode sense circuit  335 , and the sensed signal is provided back to NMOS transistors  421  and  422 , which provided the function of biasing circuit  320 . NMOS transistors  423  and  424  may be implemented as source followers and used to provide common mode feedback to NMOS transistors  421  and  422 . Resistors  431  and  432 , and capacitors  441  and  442  may be designed such that the common mode voltage Vcm may be obtained at point  460 . Common mode voltage may be represented as follows: 
     
       
           Vcm =( Vop+Vom )/2  Equation (3) 
       
     
     wherein ‘Vcm’ represents the common mode voltage, ‘Vop’ represents the positive output voltage, ‘Vom’ represents the negative output voltage, ‘+’ represents the addition operation, and ‘/’ represents the division operation. 
     The biasing signal is received at the gate of NMOS transistor  425 , which is provided to the gate of NMOS transistors  421  and  422  to set the operating point. NMOS transistor  425  may correspond to the interface between control circuit  350  (shown only in FIG. 3) and NMOS transistors  421  and  422 . The drain terminal  460  of NMOS transistors  425  may be connected to the gate terminals of NMOS transistors  421  and  422 . 
     From the above, it may be appreciated that the common mode feedback signal is generated at node  460 . Again  460  is connected to the drain of NMOS transistor  425 . Biasing circuit (via NMOS transistor  425 ) drives node  460  (gate terminal of NMOS transistors  421  and  422 ) to a desired voltage (as determined by the biasing circuit. Thus, the output common mode voltage equals the voltage at node  460 . 
     The pair of NMOS transistors  421  and  422  also acts as an error amplifier to ensure that the common mode voltage generated by R-C circuit is the desired voltage determined by the biasing circuit. That is, both the signals are getting combined at node  460  and applied to the basic trans-conductor block  411  and  412  by NMOS transistors  421  and  422 . 
     By combining the common-mode feedback signal and the biasing voltage (which sets the operating point), and providing the combined signal on the same path, the number of components in an integrated circuit may be reduced. The reduction in components generally implies reduced noise and fewer parasitic poles (implying ability to operate at high bandwidth). The reduction also leads to reduced power consumption. 
     Thus, a basic block provided in accordance with the present invention can be used in components such as filters and amplifiers to implement devices such as cell phones, which may need to operate at high bandwidth while consuming minimal power. 
     6. Conclusion 
     While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. Thus, the breadth and scope of the present invention should not be limited by any of the above described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.