Patent Publication Number: US-2023152164-A1

Title: High-sensitivity silicon carbide integratable temperature sensor

Description:
BACKGROUND OF THE INVENTION 
     1. Technical Field 
     The invention belongs to the technical field of power semiconductor devices, and particularly relates to a high-sensitivity silicon carbide integratable temperature sensor. 
     2. Description of Related Art 
     Compared with Si materials, SiC wide-bandgap semiconductor materials, as ideal materials for preparing high-voltage power electronic devices, have the advantages of high breakdown electric field intensity (4*10 6 V/cm), high drift velocity (2*10 7 cm/s), high thermal conductivity, and good thermal stability, thus being particularly suitable for high-power, high-voltage, high-temperature and anti-radiation electronic devices. 
     SiC VDMOS is a device commonly used in SiC power devices, and compared with bipolar devices, the SiC VDMOS is free of the charge-storage effect, thus having better frequency characteristics and lower switching loss. Meanwhile, the wide bandgap of the SiC materials allows the operating temperature of the SiC VDMOS to be as high as 300° C. 
     However, the SiC VDMOS has a serious problem of low carrier mobility of the surface of the device, which is caused by a severe interfacial state of SiC and SiO2 due to the existence of a large quantity of unsaturated bonds and other defects of the interface of SiC and SiO2, leading to an increase of the surface resistance (channel resistance), so power consumption generated in a channel may be as high as power consumption generated in a drift region. Because the SiC VDMOS generally works under a high current, the heat potential of the device is severe, and some properties of the device will be degraded or even disabled under excessively high temperature. Up to now, the main limitations of the SiC VDMOS are the packaging technology, the lack of temperature information about its safe operating range, and particularly the influence of temperature on the reliability of a gate oxide layer. 
     Technicians can obtain temperature information of the device by measuring the packaging temperature, but the internal temperature of the device is closely related to the resistance of all parts of the device, thus being different from the packaging temperature. Temperature sensors may be separately integrated in a package and a main device to monitor the temperature of the device; however, this method cannot obtain temperature information of the device most directly and rapidly, and temperature measured through this method is not targeted. If the channel resistance R ch or the resistance R JFET of the JFET region is large, power consumption of the surface of the device will be high, and the surface temperature will be high, which may reduce the reliability of the gate oxide of the device. So, a novel approach for monitoring the surface temperature of the device is urgently needed to obtain temperature information most rapidly and accurately. 
     BRIEF SUMMARY OF THE INVENTION 
     In view of the problems of the prior art, the technical issue to be settled by the invention is to provide a high-sensitivity silicon carbide integratable temperature sensor to meet the requirements for testing the junction temperature power of semiconductors, under the background of inaccuracy and low sensitivity of temperature measurement of traditional temperature sensors. 
     To settle the above technical issue, one embodiment of the invention provides a high-sensitivity silicon carbide integratable temperature sensor, comprising a first PAD region  1 , a second PAD region  2 , a third PAD region  3 , a P-type well region  4 , an N-type well region  5 , a first metal  6 , a second metal  7 , a third metal  8 , a first ohmic contact region  9 , a second ohmic contact region  10 , and a third ohmic contact region  11 ; 
     The N-type well region  5  and the second ohmic contact region  10  are located in the P-type well region  4  in a spaced manner; the first ohmic contact region  9  is located in the N-type well region  5 ; the third ohmic contact region  11  is located in the P-type well region  4 , and is connected to the P-type well region  4  and the N-type well region  5 ; 
     The third ohmic contact region  11  extends from the first metal  6  into the first PAD region  1 , the first ohmic contact region  9  extends from the second metal  7  into the second PAD region  2 , and the second ohmic contact region  10  extends from the third metal  8  into the third PAD region  3 . 
     Based on the above technical solution, the invention may be improved in the following aspects. 
     Further, the P-type well region  4  is formed by aluminum ion implantation. 
     Further, the N-type well region  5  is formed by phosphorous ion implantation. 
     Further, a doping concentration of the P-type well region  4  is from 1e15 cm-3 to 1e20 cm-3, and/or, a doping concentration of the N-type well region  5  is from 1e15 cm-3 to 1e19 cm-3. 
     Further, an implantation depth of the P-type well region  4  is greater than that of the N-type well region  5 . 
     Further, the second ohmic contact region  10  is formed by ion implantation the same as that of the P-type well region  4 . 
     Further, a doping concentration of the second ohmic contact region  10  is from 1e18 cm-3 to 1e21 cm-3. 
     Further, the first ohmic contact region  9  is formed by ion implantation the same as that of the N-type well region  5 . 
     Further, a doping concentration of the first ohmic contact region  9  is from 1e18 cm-3 to 1e22 cm-3. 
     Further, the first metal  6 , the second metal  7  and the third metal  8  are aluminum. 
     Compared with the prior art, the invention has the following beneficial effects: 
     1. N-type implantation and P-type implantation may be synchronously completed with other process steps of a main device, so the temperature sensor can be integrated in a power semiconductor under a process-compatible condition; 
     2. The high-sensitivity silicon carbide integratable temperature sensor is fully electrically isolated from the main device through the P-type well region  4 , so that the working state of the temperature sensor and the working state of the main device will not be affected by each other; 
     3. Under a certain doping concentration, the sensitivity of N-type silicon carbide and the sensitivity of P-type silicon carbide are fixed; the temperature sensor provided by the invention measures temperature by means of bulk resistors, connected in parallel, on the surface of the N-type silicon carbide and the surface of the P-type silicon carbide; a certain current is applied to the two resistor regions respectively, a voltage drop of the N-type silicon carbide is a positive temperature coefficient, and a voltage drop of the P-type silicon carbide is a negative temperature coefficient, so if a different between the voltage drops of the two resistors is used to represent temperature, the sensitivity of the temperature sensor is the sum of the sensitivity of the N-type silicon carbide and the sensitivity of the P-type silicon carbide, which is higher than the sensitivity of any one electrically conductive silicon carbide bulk resistor; therefore, the high-sensitivity silicon carbide integratable temperature sensor provided by the invention has high sensitivity, which is higher than the sensitivity of any silicon carbide temperature sensors using bulk resistors for temperature measurement. 
    
    
     
       BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
         FIG.  1    is a structural view of a high-sensitivity silicon carbide integratable temperature sensor according to one embodiment of the invention; 
         FIG.  2    is a structural view of well regions of the high-sensitivity silicon carbide integratable temperature sensor according to one embodiment of the invention; 
         FIG.  3    is a sectional view of a well region drawn along section line AA′ in  FIG.  2   ; 
         FIG.  4    is a sectional view of a well region drawn along section line BB′ in  FIG.  2   ; 
         FIG.  5    is an equivalent circuit diagram, namely a temperature measurement diagram, of the high-sensitivity silicon carbide integratable temperature sensor according to one embodiment of the invention. 
     
    
    
     Components represented by the reference signs in the figures: 
       1 , first PAD region;  2 , second PAD region;  3 , third PAD region;  4 , P-type well region;  5 , N-type well region;  6 , first metal;  7 , second metal;  8 , third metal;  9 , first ohmic contact region;  10 , second ohmic contact region;  11 , third ohmic contact region. 
     DETAILED DESCRIPTION OF THE INVENTION 
     The principle and features of the invention will be described below in conjunction with the accompanying drawings. The embodiments illustrated below are merely used to explain the invention, and are not used to limit the scope of the invention. 
     As shown in  FIG.  1   - FIG.  4   , a first embodiment of the invention provides a high-sensitivity silicon carbide integratable temperature sensor, comprising a first PAD region  1 , a second PAD region  2 , a third PAD region  3 , a P-type well region  4 , an N-type well region  5 , a first metal  6 , a second metal  7 , a third metal  8 , a first ohmic contact region  9 , a second ohmic contact region  10 , and a third ohmic contact region  11 ; 
     The N-type well region  5  and the second ohmic contact region  10  are located in the P-type well region  4  in a spaced manner; the first ohmic contact region  9  is located in the N-type well region  5 ; the third ohmic contact region  11  is located in the P-type well region  4 , and is connected to the P-type well region  4  and the N-type well region  5 ; 
     The third ohmic contact region  11  extends from the first metal  6  into the first PAD region  1 , the first ohmic contact region  9  extends from the second metal  7  into the second PAD region  2 , and the second ohmic contact region  10  extends from the third metal  8  into the third PAD region  3 . 
     The working principle of the invention is as follows: 
     As shown in  FIG.  5    which is an equivalent circuit diagram of the temperature sensor, when a constant small current I 1  is applied to the second PAD region  2 , N-type silicon carbide generates a voltage drop V 1 ; when a constant small current I 1  is applied to the third PAD region  3 , P-type silicon carbide generates a voltage drop V 2 . Because the lattice scattering of the N-type silicon carbide will be aggravated with the increase of temperature, the migration rate will decrease, the resistance will increase, and V 1  will increase with the increase of temperature. 
     In addition, impurities in the P-type silicon carbide will not be completely ionized at room temperature, the effective doping concentration of the P-type silicon carbide will be increased by the ionized impurities with the increase of temperature, the resistance will decrease, and V 2  will decrease with the increase of temperature. 
     If the change rate of V 1  with temperature is S 1 , S 1 =dV  1 /dT, and S 1  is positive. If the change rate of V 2  with temperature is S 2 , S 2 =dV  2 /dT, and S 2  is negative. By testing the voltage across two terminals of a port  1  and a port  2 , it can be obtained that V=V 1 −V 2 , the potential difference is in an approximately linear relationship with the temperature T. The operating temperature of the device can be obtained according to a fitting formula T=a*V+b after fitting calibration, where a and b are fitting parameters. The sensitivity of the temperature sensor meets S=dV/dT=S 1 −S 2 =|S 1 |+|S 2 |, and is the sum of the sensitivity of two semiconductor regions. 
     Optionally, the P-type well region  4  is formed by aluminum ion implantation. 
     Optionally, the N-type well region  5  is formed by phosphorous ion implantation. 
     Optionally, a doping concentration of the P-type well region  4  is from 1e15 cm-3 to 1e20 cm-3, and/or, a doping concentration of the N-type well region  5  is from 1e15 cm-3 to 1e19 cm-3. 
     Optionally, an implantation depth of the P-type well region  4  is greater than that of the N-type well region  5 . 
     Optionally, the second ohmic contact region  10  is formed by ion implantation the same as that of the P-type well region  4 . 
     Optionally, the second ohmic contact region  10  is formed by ion implantation the same as that of the P-type well region  4 . 
     Optionally, the first ohmic contact region  9  is formed by ion implantation the same as that of the N-type well region  5 . 
     Optionally, a doping concentration of the first ohmic contact region  9  is from 1e18 cm-3 to 1e22 cm-3. 
     Optionally, the first metal  6 , the second metal  7  and the third metal  8  are aluminum. 
     The temperature sensor of the invention is provided with three electrodes, wherein a first electrode formed by the first PAD region covers the P-type region and the N-type region, a second electrode formed by the second PAD region is connected to the P-type region, and a third electrode formed by the third PAD region is connected to the N-type region. The first electrode of the temperature sensor is generally in short connection with a source or cathode of a main device, and when a small current is applied to the second electrode and the third electrode, a voltage difference between the second electrode and the third electrode is in an approximately linear relationship, and the operating temperature of a device can be represented by testing the voltage difference between the second electrode and the third electrode through fitting calibration. Because a voltage drop of the N-type silicon carbide semiconductor is a positive temperature coefficient and a voltage drop of the P-type silicon carbide semiconductor is a negative temperature coefficient, the change rate of a difference between the voltage drops of two electrodes with temperature will be increased. The temperature sensor has a wide temperature measurement range and high temperature measurement sensitivity, can be integrated in a silicon carbide power semiconductor alone, and is process-compatible. According to the temperature sensor, a P-type region is electrically isolated from a main device, so that the working state of the temperature sensor and the working state of the main device will not be affected by each other. In addition, the current of the P-type or N-type semiconductor is small, so that a mutual influence of the current in the N-type semiconductor and the current in the P-type semiconductor is avoided. 
     In the drawings of the invention, grid lines corresponding to different components are merely used to distinguish different components, and do not have any structural meanings. 
     In the description of the invention, terms such as “first” and “second” are merely used for a descriptive purpose, and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features referred to. Therefore, a feature defined by “first” or second” may explicitly or implicitly indicate the inclusion of at least one said feature. In the description of the invention, “multiple” refers to at least two, such as three, unless otherwise specifically and clearly defined. 
     In the description of the invention, the description of the reference terms such as “one embodiment”, “some embodiments”, “example”, “specific example”, and “some examples” indicates that the specific characteristics, structures, materials or features described in conjunction with the embodiment or example are included in at least one embodiment or example of the invention. In this specification, illustrative descriptions of these terms do not necessarily refer to identical embodiments or examples. In addition, the specific characteristics, structures, materials or features in the description may be combined properly in one or more embodiments or examples. Moreover, those skilled in the art may integrate or combine different embodiments or examples described in this specification, or the features of different embodiments or examples without mutual contradiction. 
     The foregoing description is merely used to explain preferred embodiments of the invention, and is not used to limit the invention. Any amendments, equivalent substitutions and improvements made based on the spirit and principle of the invention should fall within the protection scope of the invention.