Patent Publication Number: US-11049848-B1

Title: Semiconductor device

Description:
BACKGROUND 
     Field of Invention 
     The present disclosure relates to a semiconductor device, and more particularly, the semiconductor device is used in 3D package application. 
     Description of Related Art 
     One type of conventional semiconductor package, sometimes called a “stack-type” semiconductor package, is manufactured in such a manner that a fully-assembled individual top semiconductor package is stacked on a fully-assembled individual semiconductor bottom semiconductor package. The top and bottom semiconductor packages are electrically and mechanically coupled together at the interface between them. The stack-type semiconductor package subsequently is mounted on an external printed circuit board by electrically coupling interconnects of the bottom semiconductor package, e.g., solder balls, to circuit patterns of the printed circuit board. Hence, this stack-type package has the desirable feature of allowing two semiconductor packages to be mounted in the same printed circuit board area as a single semiconductor package. 
     A better, more robust stack-type semiconductor package that may be assembled more easily and at lower cost is therefore desirable. 
     SUMMARY 
     An aspect of the present disclosure is to provide a semiconductor device having at least one chip which can be easily stacked. 
     According to an embodiment of the present disclosure, a semiconductor device includes a substrate and a chip. The chip stacked on the substrate includes an active surface and at least one metal pad. The metal pad is located on the active surface and includes a first pad portion and a second pad portion separated from the first pad portion to form an open circuit. The first pad portion includes a protrusion structure and the second pad portion includes a recess structure. Moreover, the protrusion structure of the first pad portion extends toward the recess structure of the second pad portion. 
     In an embodiment of the present disclosure, the recess structure of the second pad portion surrounds the protrusion structure of the corresponding first pad portion. 
     In an embodiment of the present disclosure, the semiconductor device further includes at least one metal ball in contact with the first pad portion and the second pad portion to form a closed circuit. 
     In an embodiment of the present disclosure, the metal ball is at least in contact with the protrusion structure of the first metal pad and the recess structure of the second pad portion. 
     In an embodiment of the present disclosure, the at least one metal pad of the chip includes a first metal pad and a second metal pad, and the first pad portion of the first metal pad contacts the first pad portion of the second metal pad. 
     In an embodiment of the present disclosure, the at least one metal pad of the chip includes a first metal pad and a second metal pad, and the second pad portion of the first metal pad contacts the second pad portion of the second metal pad. 
     In an embodiment of the present disclosure, the at least one metal pad of the chip includes a first metal pad and a second metal pad, and the first pad portion of the first metal pad contacts the second pad portion of the second metal pad. 
     In an embodiment of the present disclosure, the at least one metal pad of the chip includes a first metal pad, and the semiconductor device further includes a first transceiver and a second transceiver. The first transceiver includes an output terminal electrically connected to the first pad portion of the first metal pad. The second transceiver includes an input terminal electrically connected to of the second pad portion of the first metal pad. 
     In an embodiment of the present disclosure, the at least one metal pad of the chip includes a second metal pad, and the second pad portion of the first metal pad contacts the first pad portion or the second pad portion of the second metal pad. 
     In an embodiment of the present disclosure, the at least one metal pad includes an input metal pad, and the first pad portion or the second pad portion of the input metal pad is electrically connected to an input terminal of the first transceiver. 
     Another aspect of the present disclosure is to provide a semiconductor device includes a substrate, a master chip, and at least one slave chip. The master chip is mounted on the substrate, and the master chip includes an active surface and at least one metal pad located on the active surface. The at least one slave chip which is stacked on the active surface of the master chip includes a first active surface and at least one bonding pad. The at least one bonding pad which is located on the first active surface includes a first bonding pad portion and a second bonding pad portion separated from the first bonding pad portion to form an open circuit in which the first bonding pad portion includes a protrusion structure and the second bonding pad portion includes a recess structure, and the protrusion structure of the first bonding pad portion extends toward the recess structure of the corresponding second bonding pad portion. 
     In an embodiment of the present disclosure, the recess structure of the second bonding pad portion surrounds the protrusion structure of the corresponding first bonding pad portion. 
     In an embodiment of the present disclosure, the semiconductor device further includes at least one conductive ball in contact with first bonding pad portion and the second bonding pad portion to form a closed circuit, and the conductive ball is electrically connected to the metal pad of the master chip through a conductive wire. 
     In an embodiment of the present disclosure, the conductive ball is in contact with the protrusion structure of the first bonding pad and the recess structure of the second bonding pad portion. 
     In an embodiment of the present disclosure, the at least one bonding pad of the slave chip includes a first bonding pad and a second bonding pad, and the first bonding pad portion of the first bonding pad contacts the first bonding pad portion of the second bonding pad. 
     In an embodiment of the present disclosure, the second bonding pad portion of the first bonding pad contacts the second bonding pad portion of the second bonding pad. 
     In an embodiment of the present disclosure, the first bonding pad portion of the first bonding pad contacts the second bonding pad portion of the second bonding pad. 
     In an embodiment of the present disclosure, the at least one bonding pad includes a first bonding pad, and the slave chip further includes a first transceiver and a second transceiver. The first transceiver includes an output terminal electrically connected to the first bonding pad portion of the first bonding pad. The second transceiver includes an input terminal electrically connected to the second bonding pad portion of the first bonding pad. 
     In an embodiment of the present disclosure, the at least one metal pad includes an input bonding pad in which the first bonding pad portion or the second bonding pad portion of the input bonding pad is electrically connected to an input terminal of the first transceiver. 
     It is to be understood that both the foregoing general description and the following detailed description are by examples, and are intended to provide further explanation of the disclosure as claimed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The disclosure can be more fully understood by reading the following detailed description of the embodiment, with reference made to the accompanying drawings as follows: 
         FIG. 1  is a schematic diagram of a semiconductor device regarding some embodiments in the present disclosure. 
         FIG. 2  is a schematic circuit diagram of a chip of the semiconductor device in the  FIG. 1 . 
         FIG. 3  is a schematic diagram of a semiconductor device according some embodiments in the present disclosure. 
         FIG. 4  is a schematic circuit diagram of a master chip and a slave chip of the semiconductor device in the  FIG. 3 . 
         FIG. 5  is a schematic diagram of a semiconductor device according some embodiments in the present disclosure. 
         FIG. 6  is a schematic circuit diagram of a chip of the semiconductor device in the  FIG. 5 . 
         FIG. 7  is a schematic diagram of a semiconductor device according some embodiments in the present disclosure. 
         FIG. 8  is a schematic circuit diagram of a chip of the semiconductor device in the  FIG. 7 . 
     
    
    
     DETAILED DESCRIPTION 
     Reference will now be made in detail to the present embodiments of the disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts. 
     In various embodiments, description is made with reference to figures. However, certain embodiments may be practiced without one or more of these specific details, or in combination with other known methods and configurations. In the following description, numerous specific details are set forth, such as specific configurations, dimensions and processes, etc., in order to provide a thorough understanding of the present disclosure. In other instances, well-known semiconductor processes and manufacturing techniques have not been described in particular detail in order to not unnecessarily obscure the present disclosure. Reference throughout this specification to “one embodiment,” “an embodiment”, “some embodiments” or the like means that a particular feature, structure, configuration, or characteristic described in connection with the embodiment is included in at least one embodiment of the disclosure. Thus, the appearances of the phrase “in one embodiment,” “in an embodiment”, “in some embodiments” or the like in various places throughout this specification are not necessarily referring to the same embodiment of the disclosure. Furthermore, the particular features, structures, configurations, or characteristics may be combined in any suitable manner in one or more embodiments. 
     The terms “over,” “to,” “between” and “on” as used herein may refer to a relative position of one layer with respect to other layers. One layer “over” or “on” another layer or bonded “to” another layer may be directly in contact with the other layer or may have one or more intervening layers. One layer “between” layers may be directly in contact with the layers or may have one or more intervening layers. 
     Reference is made to  FIG. 1  and  FIG. 2 .  FIG. 1  is a schematic diagram of a semiconductor device according some embodiments in the present disclosure.  FIG. 2  is a schematic circuit diagram of a chip of the semiconductor device in the  FIG. 1 , but  FIG. 2  does not specifically represent electrical connection relation of the semiconductor device in  FIG. 1 . Referring to  FIG. 1 , in some embodiments of the present disclosure, a semiconductor device  100  includes a substrate  110  and a chip  200 . The chip  200  is stacked on the substrate  110 , and the chip  200  includes an active surface  210  and at least one metal pad  230 . When semiconductor device  100  includes two or more than two metal pads  230 , the metal pads  230  can be electrically connected to each other or not. Specifically, the metal pad  230  is located on the active surface  210  and the metal pad  230  includes a first pad portion  231  and a second pad portion  233  which is separated from the first pad portion  231  to form an open circuit. Selectively forming an a closed circuit between metal pads  230  can be performed by selectively forming conductive material between the first pad portion  231  and the second pad portion  233 . 
     The first pad portion  231  includes a protrusion structure and the second pad portion  233  includes a recess structure. Moreover, the protrusion structure of the first pad portion  231  extends toward the recess structure of the second pad portion  233 . The recess structure of the second pad portion  233  surrounds the protrusion structure of the corresponding first pad portion  231 . The protrusion structure of the first pad portion  231  can be in a triangle shape, a rectangle shape, or a round shape, and the recess structure of the second pad portion  233  can be in a shape corresponding to the protrusion structure, but the present disclosure in not limited in this respect. While a conductive material is formed to contact the first pad portion  231  and the second pad portion  233 , the protrusion structure and recess structure thereof can form a burdening platform and provide additional surface area to fix the conductive material. 
     In some embodiments of the present disclosure, the semiconductor device  100  further includes a metal ball  150  in contact with the first pad portion  231  and the second pad portion  233  to form a closed circuit. The metal ball  150  is electrically connected to a contacting pad  111  on the substrate  110  through a conductive wire. The metal ball  150  is at least in contact with the protrusion structure of the first pad portion  231  and the recess structure of the second pad portion  233 , and the metal ball  150  is stubbornly fixed on the metal pad  230  with larger contacting surface area. 
     The chip  200  includes a first metal pad  230   a  and a second metal pad  230   b , and the second pad portion  233   a  of the first metal pad  230   a  contacts the second pad portion  233   b  of the second metal pad  230   b  to form a two-way switch. In other embodiments of the present disclosure, the first pad portion  231   a  of the first metal pad  230   a  can contact the first pad portion  231   b  of the second metal pad  230   b , but the present disclosure is not limited in this respect. The first pad portion  231   a  of the first metal pad  230   a  contacts the second pad portion  233   b  of the second metal pad  230   b  according to other embodiments of the present disclosure. The second pad portion  233   a  of the first metal pad  230   a  contacts the first pad portion  231   b  of the second metal pad  230   b  in accordance with some embodiments of the present disclosure. 
     Reference is made to  FIG. 2 . In some embodiments of the present disclosure, the semiconductor device  100  further includes a first transceiver  260  and a second transceiver  270 . The first transceiver  260  includes an output terminal  261  and an input terminal  263  in which the output terminal  261  is electrically connected to the first pad portion  231   a  of the first metal pad  230   a . The second transceiver  270  includes and output terminal  271  and an input terminal  273 , and the input terminal  273  is electrically connected to of the second pad portion  233   a  of the first metal pad  230   a . Therefore, a switch between the first transceiver  260  and the second transceiver  270  is formed. In this embodiment of the present disclosure, the second pad portion  233   a  of the first metal pad  230   a  contacts the second pad portion  233   b  of the second metal pad  230   b  to form a two-way switch which can selectively form an open circuit or a closed circuit by putting the metal ball  150  on the first metal pad  230   a  or the second metal pad  230   b.    
     Furthermore, the chip  200  also includes a third metal pad  230   c . When the second pad portion  233   a  of the first metal pad  230   a  contacts the second pad portion  233   b  of the second metal pad  230   b , the first pad portion  231   b  of the second metal pad  230   b  is electrically connected to the first pad portion  231   c  or the second pad portion  233   c  of the third metal pad  230   c  to form a two-way switch. When the second pad portion  233   a  of the first metal pad  230   a  contacts the first pad portion  231   b  of the second metal pad  230   b , the second pad portion  233   b  of the second metal pad  230   b  is electrically connected to the first pad portion  231   c  or the second pad portion  233   c  of the third metal pad  230   c  to form a two-way switch, but the present disclosure is not limited in this respect. In this case, the aforementioned two-way switch can decide if a closed circuit is formed between the third metal pad  230   c  and the first transceiver  260 , and the two-way switch is among the first transceiver  260 , the second transceiver  270 , and the third metal pad  230   c.    
     The chip  200  further includes an input metal pad  230   d . A first pad portion  231   d  or a second pad portion  233   d  of the input metal pad  230   d  is electrically connected to an input terminal  263  of the first transceiver  260 . If a conductive material such as a metal ball  150   a  is formed between the first pad portion  231   d  and the second pad portion  233   d , the signal can be transmitted to the first transceiver  260 . Therefore, a signal path in the chip  200  can be decided by selectively forming the metal ball  150   a.    
     In an embodiment of the present disclosure, the metal ball  150   a  simultaneously contacts the first pad portion  231   d  and the second pad portion  233   d  of the input metal pad  230   d , and another metal ball  150   b  simultaneously contacts the first pad portion  231   a  and the second pad portion  233   a  of the first metal pad  230   a  to form a closed circuit. In this case, a signal can be transmitted from the input metal pad  230   d  to the second transceiver  270  passing through the first transceiver  260  and the first metal pad  230   a.    
     Reference is made to  FIG. 3  and  FIG. 4 .  FIG. 3  is a schematic diagram of a semiconductor device according some embodiments in the present disclosure.  FIG. 4  is a schematic circuit diagram of a master chip and a slave chip of the semiconductor device in the  FIG. 3 , but  FIG. 4  does not specifically represent electrical connection relation of the semiconductor device in  FIG. 3 . In some embodiments of the present disclosure, a semiconductor device  300  includes a substrate  310 , a master chip  400 , and at least one slave chip  500 . The master chip  400  is substantially the same as the chip  200 . At least one metal pad  430  on an active surface  410  of the master chip  400  includes a first pad portion  431  and a second pad portion  433 . The second pad portion  433  can be separated from the first pad portion  431  to form an open circuit between the first pad portion  431  and the second pad portion  433 , but the present disclosure is not limited in this respect. In other embodiments of the present disclosure, the metal pad  430  is formed integratedly. A metal ball  350  can be put on the metal pad  430  to simultaneously contact the first pad portion  431  and the second pad portion  433  to form a closed circuit between the first pad portion  431  and the second pad portion  433 . The master chip  400  is mounted on the substrate  310 , and the master chip  400  includes an active surface  410  and at least one metal pad  430  located on the active surface  410 . The metal pad  430  can be electrically connected to a metal pad  311  of the substrate  310  through a conductive wire. The master chip  400  may include four metal pads  430 , such as a first metal pad  430   a , a second metal pad  430   b , a third metal pad  430   c , and an input metal pad  430   d . The slave chip  500  is stacked on the active surface  410  of the master chip  400 , and the slave chip  500  includes a first active surface  510  and at least one bonding pad  530  located on the first active surface  510 . When the number of the bonding pad  530  is more than two, the bonding pads  530  can be electrically connected to each other. The slave chip  500  includes a first bonding pad portion  531  and a second bonding pad portion  533  which is separated from the first bonding pad portion  531  to form an open circuit between the first bonding pad portion  531  and the second bonding pad portion  533 . The first bonding pad portion  531  includes a protrusion structure and the second bonding pad portion  533  includes a recess structure, and the protrusion structure of the first bonding pad portion  531  extends toward the recess structure of the corresponding second bonding pad portion  533 . Moreover, the recess structure of the second bonding pad portion  533  surrounds the protrusion structure of the corresponding first bonding pad portion  531 . The protrusion structure of the first bonding pad portion  531  can be in a triangle shape, a rectangle shape, or a round shape, and the recess structure of the second bonding pad portion  533  can be in a shape corresponding to the protrusion structure, but the present disclosure in not limited in this respect. 
     Reference is made to  FIG. 3 . The semiconductor device  300  further includes at least one conductive ball  550  simultaneously in contact with first bonding pad portion  531  and the second bonding pad portion  533  of the bonding pad  530  to form a closed circuit, and the conductive ball  550  can be electrically connected to the metal pad  430  of the master chip  400  through a conductive wire. Specifically, the conductive ball  550  is in contact with the protrusion structure of the first bonding pad portion  531  and the recess structure of the second bonding pad portion  533 . The protrusion structure of the first bonding pad portion  531  and recess structure of the second bonding pad portion  533  can form a burdening platform and provide additional surface area to fix the conductive ball  550 . 
     Reference is made to  FIG. 4 . The slave chip  500  includes a first bonding pad  530   a  and a second bonding pad  530   b , and a second bonding pad portion  533   a  of the first bonding pad  530   a  contacts a second bonding pad portion  533   b  of the second bonding pad  530   b  to form a two-way switch which can selectively form an open circuit or a closed circuit by selectively putting the conductive ball  550  on the first bonding pad  530   a  or the second bonding pad  530   b . In some other embodiments of the present disclosure, the first bonding pad portion  531   a  of the first bonding pad  530   a  contacts the first pad portion  531   b  of the second bonding pad  530   b , but the present disclosure is not limited in this respect. The first bonding pad portion  531   a  of the first bonding pad  530   a  can contact the second bonding pad portion  533   b  of the second bonding pad  530   b  according to some embodiments of the present disclosure. 
     The slave chip  500  further includes a first transceiver  560  and a second transceiver  570 . The first transceiver  560  includes an output terminal  561  and an input terminal  563  in which the output terminal  561  is electrically connected to the first bonding pad portion  531   a  of the first bonding pad  530   a . The second transceiver  570  includes an output terminal  571  and an input terminal  573  which is electrically connected to the second bonding pad portion  533  of the first bonding pad  530   a . Therefore, a switch between the first transceiver  560  and the second transceiver  570  is formed. In this embodiment of the present disclosure, the second bonding pad portion  533   a  of the first bonding pad  530   a  further contacts the second bonding pad portion  533   b  of the second bonding pad  530   b  to form a two-way switch which can selectively form an open circuit or a closed circuit by selectively putting the conductive ball  550  on the bonding pads  530 , e.g., the first bonding pad  530   a , and the second bonding pad  530   b.    
     Furthermore, slave chip  500  also includes a third bonding pad  530   c . When the second bonding pad portion  533   a  of the first bonding pad  530   a  contacts the second bonding pad portion  533   b  of the second bonding pad  530   b , the first bonding pad portion  531   b  of the second bonding pad  530   b  is electrically connected to the first bonding pad portion  531   c  or the second bonding pad portion  533   c  of the third bonding pad  530   c  to form a two-way switch. When the second bonding pad portion  533   a  of the first bonding pad  530   a  contacts the first bonding pad portion  531   b  of the second bonding pad  530   b , the second bonding pad portion  533   b  of the second bonding pad  530   b  is electrically connected to the first bonding pad portion  531   c  or the second bonding pad portion  533   c  of the third bonding pad  530   c  to form a two-way switch, but the present disclosure is not limited in this respect. In this case, the aforementioned two-way switch can decide if a closed circuit is formed between the third bonding pad  530   c  and the first transceiver  560 , and the two-way switch is among the first transceiver  560 , the second transceiver  570 , and the third bonding pad  530   c  of the slave chip  500 . 
     The slave chip  500  further includes an input bonding pad  530   d . A first bonding pad portion  531   d  or a second bonding pad portion  533   d  of the input bonding pad  530   d  is electrically connected to the input terminal  563  of the first transceiver  560 . If a conductive material such as the conductive ball  550  is formed between the first bonding pad portion  531   d  and the second bonding pad portion  533   d  to contacts thereof, a signal can be transmitted to the first transceiver  560  passing through the input bonding pad  530   d.    
     In an embodiment of the present disclosure, the semiconductor device  300  includes a first slave chip  500   a  mounted on the master chip  400 . As shown in  FIG. 4 , a metal ball  350   a  located on the input metal pad simultaneously contacts the first pad portion  431   d  and the second pad portion  433   d , and another metal ball  350   b  located on the first metal pad  430   a  simultaneously contacts the first pad portion  431   a  and the second pad portion  433   a  to form a closed circuit between the first transceiver  460  and the second transceiver  470 . The first transceiver  460  is the substantially the same as the first transceiver  260 , and the second transceiver  470  is substantially the same as the second transceiver  270 . Therefore, a signal can be transmitted from the input metal pad  430   d  to the second transceiver  470  passing through the first transceiver  460  and the first metal pad  430   a . Moreover, a conductive ball  550   a  is located on the second bonding pad  530   b  of the first slave chip  500   a  to contact the first bonding pad portion  531   b  and the second bonding pad portion  533   b  thereof, and the conductive ball  550   a  is electrically connected to the metal ball  350   b  on the first metal pad  430   a  through a conductive wire. Therefore, a signal from the input metal pad  430   d  of the master chip  400  can be transmitted to the second transceiver  570  of the first slave chip  500   a . Specifically, the first bonding pad portion  531   a  and the second bonding pad portion  533   a  are electrically disconnected such that an open circuit is formed between the first transceiver  560  and the second transceiver  570  to prevent a signal of the first transceiver  560  from being transmitted to the second transceiver  570 . In this case, an electrical circuit between the first transceiver  560  and second transceiver  570  can be adjusted easily and fast such that a better, more robust stack-type semiconductor package which may be assembled more easily and at lower cost can be obtained. 
     Reference is made to  FIG. 5  and  FIG. 6 .  FIG. 5  is a schematic diagram of a semiconductor device according some embodiments in the present disclosure.  FIG. 6  is a schematic circuit diagram of a master chip and two slave chips of the semiconductor device in the  FIG. 5 , but  FIG. 6  does not specifically represent electrical connection relation of the semiconductor device in  FIG. 5 .  FIG. 6  is a schematic circuit diagram of a chip of the semiconductor device in the  FIG. 5 , but  FIG. 6  does not specifically represent electrical connection relation of the semiconductor device in  FIG. 5 . In some embodiments of the present disclosure, a semiconductor device  300   a  includes a substrate  310 , a master chip  400  mounted on the substrate  310 , a first slave chip  500   a , and a second slave chip  500   b . The first slave chip  500   a  is stacked on the active surface  410  of the master chip  400 . The second slave chip  500   b  is stacked on a first active surface  510  of the first slave chip  500   a . As shown in  FIG. 6 , three metal balls  350   a ,  350   b , and  350   c  are respectively located on the first metal pad  430   a , the second metal pad  430   b , and the input metal pad  430   d . Moreover, two conductive balls  550   a  and  550   b  are respectively located on the second bonding pad  530   b  of the first slave chip  500   a  and the second bonding pad  530   b  of the second slave chip  500   b . A first conductive wire is formed between the metal ball  350   b  on the first metal pad  430   a  and the conductive ball  550   a  on the second bonding pad  530   b  of the first slave chip  500   a . A second conductive wire is formed between the metal ball  350   c  on the second metal pad  430   b  and the conductive ball  550   b  on the second bonding pad  530   b  of the second slave chip  500   b . The second transceiver  570  of the first slave chip  500   a  and the second transceiver  570  of the second slave chip  500   b  are electrically connected to the first transceiver  460 . Therefore, a signal from the input metal pad  430   d  can be transmitted to the two second transceiver  570  of the first slave chip  500   a  and the second slave chip  500   b  without interference of a signal coming from any first transceiver  560  thereof. 
     Reference is made to  FIG. 7  and  FIG. 8 .  FIG. 7  is a schematic diagram of a semiconductor device according some embodiments in the present disclosure.  FIG. 8  is a schematic circuit diagram of a master chip and three slave chips of the semiconductor device in the  FIG. 7 , but  FIG. 8  does not specifically represent the electrical connection relation of the semiconductor device in  FIG. 7 . Compared with the semiconductor device  300   a , a semiconductor device  300   b  further includes a third slave chip  500   c  stacked on the first active surface  510  of the second slave chip  500   b . As shown in the  FIG. 8 , four metal balls  350   a ,  350   b ,  350   c , and  350   d  are respectively located on the first metal pad  430   a , the second metal pad  430   b , the third metal pad  430   c , and the input metal pad  430   d . Moreover, three conductive balls  550   a ,  550   b , and  550   c  are respectively located on the second bonding pad  530   b  of the first slave chip  500   a , the second bonding pad  530   b  of the second slave chip  500   b , and the second bonding pad  530   b  of the third slave chip  500   c . A first conductive wire is formed between the metal ball  350   b  on the first metal pad  430   a  and the conductive ball  550   a  on the second bonding pad  530   b  of the first slave chip  500   a . A second conductive wire is formed between the metal ball  350   c  on the second metal pad  430   b  and the conductive ball  550   b  on the second bonding pad  530   b  of the second slave chip  500   b . A third conductive wire is formed between the metal ball  350   d  on the third metal pad  430   c  and the conductive ball  550   c  on the second bonding pad  530   b  of the third slave chip  500   c . The three second transceivers  570  of the first slave chip  500   a , the second slave chip  500   b , and the third slave chip  500   c  are electrically connected to the first transceiver  460 . Therefore, a signal from the input metal pad  430   d  can be transmitted to the three second transceivers  570  of the first slave chip  500   a , the second slave chip  500   b , and the third slave chip  500   c  without interference of a signal coming from any first transceivers  560  thereof. 
     In conclusion, metal pads on a chip include a first pad portion and a second pad portion separated to the first pad portion to form an open circuit. A metal ball can be selectively formed on the metal pad to form a closed circuit between the first pad portion and the second pad portion. By the selective formation of the metal ball, the electrical circuit of the chip can be adjusted fast and easily such that the chip can be used in 3D field to decrease cost. Moreover, the first pad portion includes a protrusion structure extends to a recess structure of the second pad portion, thereby providing a burdening platform to fix the metal ball and increasing contacting area between the metal ball and the metal pad. 
     Although the present disclosure has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. 
     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present disclosure without departing from the scope or spirit of the present disclosure. In view of the foregoing, it is intended that the present disclosure cover modifications and variations of this disclosure provided they fall within the scope of the following claims.