Patent Publication Number: US-11645972-B2

Title: Display device to compensate image data based on sensing voltages

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This non-provisional U.S. patent application claims priority under 35 U.S.C. § 119 to Korean patent application number 10-2021-0043932 filed on Apr. 5, 2021, the entire disclosure of which is incorporated by reference herein in its entirety. 
     BACKGROUND 
     1. Technical Field 
     Various embodiments of the present disclosure relate to a display device. 
     2. Discussion of Related Art 
     With the development of information technology, a display device is a useful connection medium between a user and information. Examples of display devices include a liquid crystal display (LCD) device and an organic light-emitting display device. 
     A display device may include a plurality of pixels, and the pixels may emit light in various colors and with various luminance levels, thus displaying various images. 
     The pixels may include light-emitting diodes and pixel circuits having one or more transistors. However, as the area of the display device increases, process variations may occur depending on the locations of the pixels. The transistors which perform the same function in respective pixels may have differences in characteristics, such as mobility or threshold voltages. Similarly, threshold voltages of the light-emitting diodes in respective pixels may be different from each other. 
     Degradation of the pixels may occur while a user utilizes products including the pixels. Further, the degree of degradation of respective pixels may differ from each other depending on usage frequency and temperature. 
     SUMMARY 
     At least one embodiment of the present disclosure is directed to a display device that is capable of sensing pixels in consideration of process variation and degree of degradation. 
     An embodiment of the present disclosure includes a display device. The display device may include first pixels configured to emit light in a first color; second pixels configured to emit light in a second color different from the first color; a data driver configured to supply first reference voltages to data lines coupled to the first pixels; and a sensing circuit configured to receive first sensing voltages from sensing lines coupled to the first pixels, wherein the data driver supplies second reference voltages different from the first reference voltages to data lines coupled to the second pixels, and wherein the sensing circuit receives second sensing voltages from sensing lines coupled to the second pixels. 
     The first reference voltages may have an identical magnitude, and the second reference voltages may have an identical magnitude. 
     The display device may further include a sensing controller configured to determine the first reference voltages and the second reference voltages, wherein the sensing controller may include a maximum value extractor configured to extract a first maximum value from past compensation values for the first pixels and extract a second maximum value from past compensation values for the second pixels. 
     The sensing controller may further include a degradation information provider configured to provide degradation information for the first pixels and the second pixels. 
     The degradation information may be determined based on at least one of temperature, grayscale, and usage time of the first pixels and the second pixels. 
     The sensing controller may further include a lookup table configured to provide a first base voltage value for the first pixels corresponding to the degradation information and a second base voltage value for the second pixels corresponding to the degradation information. 
     The sensing controller may further include a reference voltage calculator configured to calculate a first reference voltage by adding the first base voltage value to the first maximum value and calculate a second reference voltage by adding the second base voltage value to the second maximum value. 
     The display device may further include a high voltage generator configured to generate a high voltage; and a grayscale voltage generator configured to generate grayscale voltages based on the high voltage, wherein the reference voltage calculator generates the first reference voltage and the second reference voltage based on the high voltage and the grayscale voltages. 
     The display device may further include a high voltage generator configured to generate a high voltage; a first grayscale voltage generator configured to generate first grayscale voltages for the first pixels based on the high voltage; and a second grayscale voltage generator configured to generate second grayscale voltages for the second pixels based on the high voltage, wherein the reference voltage calculator generates the first reference voltage based on the high voltage and the first grayscale voltages, and generates the second reference voltage based on the high voltage and the second grayscale voltages. 
     One of the first pixels and one of the second pixels may be coupled to an identical sensing line. 
     The display device may further include third pixels configured to emit light in a third color different from the first color and the second color, wherein the data driver supplies third reference voltages, different from the first reference voltages and the second reference voltages, to data lines coupled to the third pixels, and wherein the sensing circuit receives third sensing voltages from sensing lines coupled to the third pixels. 
     The first reference voltages may have an identical magnitude, the second reference voltages may have an identical magnitude, and the third reference voltages may have an identical magnitude. 
     The display device may further include a sensing controller configured to determine the first reference voltages, the second reference voltages, and the third reference voltages, wherein the sensing controller may include a maximum value extractor configured to extract a first maximum value from past compensation values for the first pixels, extract a second maximum value from past compensation values for the second pixels, and extract a third maximum value from past compensation values for the third pixels. 
     The sensing controller may further include a degradation information provider configured to provide degradation information for the first pixels, the second pixels, and the third pixels. 
     The degradation information may be determined based on at least one of temperature, grayscale, and usage time of the first pixels, the second pixels, and the third pixels. 
     The sensing controller may further include a lookup table configured to provide a first base voltage value for the first pixels corresponding to the degradation information, a second base voltage value for the second pixels corresponding to the degradation information, and a third base voltage value for the third pixels corresponding to the degradation information. 
     The sensing controller may further include a reference voltage calculator configured to calculate a first reference voltage by adding the first base voltage values to the first maximum value, calculate a second reference voltage by adding the second base voltage value to the second maximum value, and calculate a third reference voltage by adding the third base voltage value to the third maximum value. 
     The display device may further include a high voltage generator configured to generate a high voltage; and a grayscale voltage generator configured to generate grayscale voltages based on the high voltage, wherein the reference voltage calculator generates the first reference voltage, the second reference voltage, and the third reference voltage based on the high voltage and the grayscale voltages. 
     The display device may further include a high voltage generator configured to generate a high voltage; a first grayscale voltage generator configured to generate first grayscale voltages for the first pixels based on the high voltage; a second grayscale voltage generator configured to generate second grayscale voltages for the second pixels based on the high voltage; and a third grayscale voltage generator configured to generate third grayscale voltages for the third pixels based on the high voltage, wherein the reference voltage calculator generates the first reference voltage based on the high voltage and the first grayscale voltages, generates the second reference voltage based on the high voltage and the second grayscale voltages, and generates the third reference voltage based on the high voltage and the third grayscale voltages. 
     One of the first pixels, one of the second pixels, and one of the third pixels may be coupled to an identical sensing line. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a diagram illustrating a display device according to an embodiment of the present disclosure. 
         FIG.  2    is a diagram illustrating a display device according to an embodiment of the present disclosure. 
         FIGS.  3  and  4    are diagrams illustrating pixels and sensing channels according to an embodiment of the present disclosure. 
         FIG.  5    is a diagram illustrating a display period according to an embodiment of the present disclosure. 
         FIG.  6    is a diagram illustrating a threshold voltage sensing period of a transistor according to an embodiment of the present disclosure. 
         FIGS.  7  and  8    are diagrams illustrating a sensing controller according to an embodiment of the present disclosure. 
         FIGS.  9  and  10    are diagrams illustrating a high voltage generator and a grayscale voltage generator according to an embodiment of the present disclosure. 
         FIG.  11    is a diagram illustrating grayscale voltage generators according to an embodiment of the present disclosure. 
         FIG.  12    is a diagram illustrating a mobility sensing period according to an embodiment of the present disclosure. 
         FIGS.  13  and  14    are diagrams illustrating a sensing controller according to an embodiment of the present disclosure. 
         FIG.  15    is a diagram illustrating a threshold voltage sensing period of a light-emitting diode according to an embodiment of the present disclosure. 
         FIGS.  16  and  17    are diagrams illustrating a sensing controller according to an embodiment of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     Hereinafter, embodiments of the present disclosure will be described in detail with reference to the attached drawings so that those of ordinary skill in the art can practice the present disclosure. The present disclosure may be embodied in various different forms without being limited to the following embodiments. 
     Similar reference numerals may be used throughout the different drawings to designate similar components. Therefore, reference numerals described in a previous drawing may be used in other drawings. 
     Although certain sizes and thicknesses of respective components are indicated in drawings, the present disclosure is not necessarily limited thereto. The sizes and thicknesses of components in the drawings may be exaggerated to make the description of a plurality of various layers and areas clear. 
     Furthermore, in the following description, “the same or identical” may mean “substantially the same or substantially identical”. That is, “the same or identical” may mean that a certain element is identical enough for those skilled in the art to understand that the certain element is the same as or identical to an additional element. Other expressions may be expressions from which “substantially” is omitted. 
       FIG.  1    is a diagram illustrating a display device according to an embodiment of the present disclosure. 
     Referring to  FIG.  1   , a display device  10  according to an embodiment of the present disclosure includes a timing controller  11  (e.g., a control circuit), a data driver  12  (e.g., a driver circuit), a scan driver  13  (e.g., driver circuit), a pixel component  14  (e.g., a display panel), a sensing circuit  15 , and a sensing controller  16  (e.g., a control circuit). 
     The timing controller  11  may receive input grayscale values and control signals for respective image frames from a processor. For example, the processor may provide a first input grayscale value (e.g., a red input grayscale value), a second input grayscale value (e.g., a green input grayscale value), and a third input grayscale value (e.g., a blue input grayscale value) for each dot or pixel. The timing controller  11  may provide compensation grayscale values, obtained by compensating for the received input grayscale values, to the data driver  12 . Further, the timing controller  11  may provide control signals suitable for respective specifications of the data driver  12 , the scan driver  13 , the sensing circuit  15 , and the sensing controller  16  to the data driver  12 , the scan driver  13 , the sensing circuit  15 , and the sensing controller  16 . 
     During a display period, the data driver  12  may generate data voltages to be provided to data lines D 1 , D 2 , D 3 , . . . , Dm using the compensation grayscale values and the control signals received from the timing controller  11 . For example, the data driver  12  may sample the compensation grayscale values using a clock signal, and may apply data voltages corresponding to the compensation grayscale values to the data lines D 1  to Dm in units of pixel rows. Here, m may be an integer greater than 0. Here, a pixel row may indicate pixels coupled to the same scan line (or gate line) and the same sensing line. 
     During a sensing period, the data driver  12  may receive information about first reference voltages, second reference voltages, and third reference voltages from the timing controller  11 . The data driver  12  may supply first reference voltages to data lines coupled to first pixels. The first reference voltages may have the same magnitude. Further, the data driver  12  may supply second reference voltages different from the first reference voltages to data lines coupled to second pixels. The second reference voltages may have the same magnitude. Furthermore, the data driver  12  may supply third reference voltages different from the first reference voltages and the second reference voltages to data lines coupled to third pixels. The third reference voltages may have the same magnitude. 
     Here, the first pixels are pixels configured to emit light in a first color. Further, the second pixels are pixels configured to emit light in a second color different from the first color. Furthermore, the third pixels are pixels configured to emit light in a third color different from the first color and the second color. 
     The scan driver  13  may receive at least one of a clock signal and a scan start signal from the timing controller  11 , and may then generate first scan signals to be provided to first scan lines S 11 , S 12 , . . . , Sin and second scan signals to be provided to second scan lines S 21 , S 22 , . . . , S 2   n . Here, n may be an integer greater than 0. 
     For example, the scan driver  13  may sequentially provide first scan signals, each having a turn-on level pulse, to the first scan lines S 11 , S 12 , . . . , Sin. Also, the scan driver  13  may sequentially provide second scan signals, each having a turn-on level pulse, to the second scan lines S 21 , S 22 , . . . , S 2   n.    
     For example, the scan driver  13  may include a first scan driver coupled to the first scan lines S 11 , S 12 , . . . , Sin and a second scan driver coupled to the second scan lines S 21 , S 22 , . . . , S 2   n . Each of the first scan driver and the second scan driver may include scan stages configured in the form of shift registers. Each of the first scan driver and the second scan driver may generate scan signals in a manner in which a scan start signal having the form of a turn-on level pulse is sequentially transferred to a next scan stage, under the control of the clock signal. 
     During a display period, the sensing circuit  15  may receive the control signals from the timing controller  11 , and may then supply initialization voltages to sensing lines I 1 , I 2 , I 3 , . . . , Ip. Here, p may be an integer greater than 0. 
     During a sensing period, the sensing circuit  15  may receive first sensing voltages from the sensing lines coupled to the first pixels. During a sensing period, the sensing circuit  15  may receive second sensing voltages from the sensing lines coupled to the second pixels. Further, the sensing circuit  15  may receive third sensing voltages from the sensing lines coupled to the third pixels. 
     The sensing circuit  15  may include sensing channels coupled to the sensing lines I 1 , I 2 , I 3 , . . . , Ip. For example, the sensing lines I 1 , I 2 , I 3 , . . . , Ip may correspond to the sensing channels in one-to-one correspondence. For example, the number of sensing lines I 1 , I 2 , I 3 , . . . , Ip may be identical to the number of sensing channels. 
     The pixel component  14  may include a plurality of pixels. Each pixel PXij may be coupled to a data line, a scan line, and a sensing line that correspond to the pixel Pxij. The pixels may be coupled to common power lines, that is, a first power line ELVDD and a second power line ELVSS. For example, during a display period, the voltage of the first power line ELVDD may be higher than that of the second power line ELVSS. 
     The sensing controller  16  may determine the first reference voltages, the second reference voltages, and the third reference voltages. The sensing controller  16  may provide the determined first reference voltages, second reference voltages, and third reference voltages to the timing controller  11 . Here, the first to third reference voltages may have the form of analog voltages or digital data. 
     During a sensing period, the timing controller  11  may provide information about the received first to third reference voltages to the data driver  12 . The information about the first to third reference voltages may have the form of digital data or analog voltages. 
     During a display period, the timing controller  11  generates the first compensation grayscale values by compensating for the first input grayscale values for the first pixels based on the first sensing voltages. Further, the timing controller  11  generates the second compensation grayscale values by compensating for the second input grayscale values for the second pixels based on the second sensing voltages. Furthermore, the timing controller  11  generates the third compensation grayscale values by compensating for the third input grayscale values for the third pixels based on the third sensing voltages. The timing controller  11  may provide the first to third compensation grayscale values to the data driver  12 . 
       FIG.  2    is a diagram illustrating a display device according to an embodiment of the present disclosure. 
     A display device  10 ′ of  FIG.  2    includes a timing controller  11 , a data driver  12 ′, a scan driver  13 , a pixel component  14 , and a sensing controller  16 . 
     The data driver  12 ′ of the display device  10 ′ of  FIG.  2    may be a configuration into which the data driver  12  and the sensing circuit  15  of the display device  10  of  FIG.  1    are integrated with each other. That is, in the display device  10  of  FIG.  1   , the data driver  12  and the sensing circuit  15  may be implemented as separate integrated circuit (IC) chips, but the data driver  12 ′ of the display device  10 ′ of  FIG.  2    may be implemented as a single IC chip. 
     Therefore, the data driver  12 ′ may be coupled to data lines D 1 , D 2 , . . . , Dm and sensing lines I 1  and I 2 . The display device  10 ′ does not include the sensing circuit  15  of  FIG.  1   . 
       FIGS.  3  and  4    are diagrams illustrating pixels and sensing channels according to an embodiment of the present disclosure. 
     Referring to  FIG.  3   , a dot DOTik according to an embodiment of the present disclosure includes a plurality of pixels Pxi(j−1), Pxij, and Pxi(j+1). For example, the plurality of pixels Pxi(j−1), Pxij, and Pxi(j+1) included in the same dot DOTik may be coupled in common to one sensing channel  151  through the same sensing line  1   k . For example, one Pxi(j−1) of the first pixels, one Pxij of the second pixels, and one Pxi(j+1)) of the third pixels may be coupled to the same sensing line  1   k.    
     For example, the plurality of pixels Pxi(j−1), Pxij, and Pxi(j+1) may be pixels of different colors. For example, the pixel Pxi(j−1) may be a pixel of a first color, the pixel Pxij may be a pixel of a second color, and the pixel Pxi(j+1) may be a pixel of a third color. That is, the pixel Pxi(j−1) may include a light-emitting diode LDr that is capable of emitting light in a first color, the pixel Pxij may include a light-emitting diode LDg that is capable of emitting light in a second color, and the pixel Pxi(j+1) may include a light-emitting diode LDb that is capable of emitting light in a third color. 
     The first color, the second color, and the third color may be different colors. For example, the first color may be one of red, green, and blue, the second color may be one of red, green, and blue, other than the first color, and the third color may be one of red, green, and blue other than the first color and the second color. Also, magenta, cyan, and yellow may be used instead of red, green, and blue as the first to third colors. 
     In accordance with an embodiment, the sensing circuit  15  senses pixels of the same color when sensing feature information of the pixels in the pixel component  14 . For example, the sensing circuit  15  may sense the feature information of the pixels of the first color in the pixel component  14  during a first color sensing period. Similarly, the sensing circuit  15  may sense the feature information of the pixels of the second color during a second color sensing period different from the first color sensing period. Furthermore, the sensing circuit  15  may sense the feature information of the pixels of the third color during a third color sensing period different from the first color sensing period and the second color sensing period. 
     For example, while the pixel Pxi(j−1) of the first color is sensed, data voltages having a turn-off level may be applied to data lines Dj and D(j+1) of the pixels Pxij and Pxi(j+1) of other colors. Therefore, while the pixel Pxi(j−1) of the first color is sensed, the first transistors T 1  of the pixels Pxij and Pxi(j+1) are turned off, thus preventing the pixels Pxij and Pxi(j+1) from influencing the feature information of the pixel Pxi(j−1). 
     In  FIG.  3   , on the assumption that each dot has an RGB stripe structure, three pixels are illustrated as being equally coupled to the scan lines S 1   i  and S 2   i . In an embodiment, when each dot is configured in a pentile structure, the dot may include only two pixels. In an embodiment, each dot may include pixels of different colors, which are coupled to different scan lines and which share the same sensing line with each other. 
     First, embodiments of configurations of the pixel Pxij and the sensing channel  151  will be described below with reference to  FIG.  4   . 
     In an embodiment, the pixel Pxij includes transistors T 1 , T 2 , and T 3 , a storage capacitor Cst, and a light-emitting diode LDg. 
     The transistors T 1 , T 2 , and T 3  may be implemented as N-type transistors. In an embodiment, the transistors T 1 , T 2 , and T 3  may be implemented as P-type transistors. In an embodiment, the transistors T 1 , T 2 , and T 3  may be implemented as a combination of an N-type transistor and a P-type transistor. The term “P-type transistor” is commonly designated as a transistor through which an increased amount of current flows as a voltage difference between a gate electrode and a source electrode increases in a negative direction. The term “N-type transistor” is commonly designated as a transistor through which an increased amount of current flows as a voltage difference between a gate electrode and a source electrode increases in a positive direction. Each transistor may be implemented as any of various types of transistors, such as a thin film transistor (TFT), a field effect transistor (FET), and a bipolar junction transistor (BJT). 
     The first transistor T 1  may have a gate electrode coupled to a first node N 1 , a first electrode coupled to a first power line ELVDD, and a second electrode coupled to a second node N 2 . The first transistor T 1  may be referred to as a driving transistor. 
     The second transistor T 2  may have a gate electrode coupled to a first scan line S 1   i , a first electrode coupled to a data line Dj, and a second electrode coupled to the first node N 1 . The second transistor T 2  may be referred to as a scan transistor. 
     The third transistor T 3  may have a gate electrode coupled to a second scan line S 2   i , a first electrode coupled to the second node N 2 , and a second electrode coupled to a sensing line Ik. The third transistor T 3  may be referred to as a sensing transistor. 
     The storage capacitor Cst may have a first electrode coupled to the first node N 1  and a second electrode coupled to the second node N 2 . 
     The light-emitting diode LDg may have an anode coupled to the second node N 2  and a cathode coupled to a second power line ELVSS. 
     Generally, the voltage of the first power line ELVDD may be higher than that of the second power line ELVSS. However, in a special situation such as for prevention of light emission by the light-emitting diode LDg, the voltage of the second power line ELVSS may be set to a voltage higher than that of the first power line ELVDD. 
     The sensing channel  151  includes a first switch SW 1 , a second switch SW 2 , and a sensing capacitor Css. 
     A first electrode of the first switch SW 1  is coupled to a third node N 3 . For example, the third node N 3  may correspond to the sensing line Ik. A second electrode of the first switch SW 1  receives an initialization voltage Vint. The second electrode of the first switch SW 1  may be coupled to an initialization power source which supplies the initialization voltage Vint. 
     A first electrode of the second switch SW 2  is coupled to the third node N 3  and a second electrode thereof is coupled to a fourth node N 4 . 
     The sensing capacitor Css has a first electrode coupled to the fourth node N 4  and a second electrode coupled to a reference power source (e.g., ground). 
     Although not illustrated in the drawing, the sensing circuit  15  may include an analog-to-digital converter (ADC). For example, the sensing circuit  15  may include a number of analog-to-digital converters (ADCs) corresponding to the number of sensing channels. Each analog-to-digital converter may convert a sensing voltage stored in the sensing capacitor Css into a digital value. The converted digital value may be provided to the timing controller  11  or the sensing controller  16 . In other embodiments, the sensing circuit  15  may include a number of ADCs less than the number of sensing channels, and may convert sensing signals, stored in the sensing channels, by time-dividing the sensing signals. 
       FIG.  5    is a diagram illustrating a display period according to an embodiment of the present disclosure. 
     Referring to  FIG.  5   , during a display period, the sensing line Ik, that is, the third node N 3 , receives the initialization voltage Vint. During the display period, the first switch SW 1  is in a turn-on state, and the second switch SW 2  is in a turn-off state. For example, when the first switch SW 1  is implemented by a first transistor and the second switch SW 2  is implemented by a second transistor, a first signal may be provided to a gate of the first transistor to turn on the first transistor and a second signal may be provided to a gate of the second transistor to turn off the second transistor. 
     During the display period, data voltages DS(i−1)j, Dsij, and DS(i+1)j may be sequentially applied to the data line Dj on a horizontal period basis. A first scan signal having a turn-on level (i.e., a logic high level) may be applied to the first scan line S 1   i  during a corresponding horizontal period. Also, a second scan signal having a turn-on level may also be applied to the second scan line S 2   i  in synchronization with the first scan line S 1   i . In an embodiment, during the display period, the second scan signal having a turn-on level may always be applied to the second scan line S 2   i.    
     For example, when scan signals having a turn-on level are applied to the first scan line S 1   i  and the second scan line S 2   i , the second transistor T 2  and the third transistor T 3  may be turned on. Therefore, a voltage corresponding to the difference between the data voltage Dsij and the initialization voltage Vint is written to the storage capacitor Cst of the pixel Pxij. 
     In the pixel Pxij, the amount of driving current that flows through a driving path for coupling the first power line ELVDD, the first transistor T 1 , the light-emitting diode LDg, and the second power line ELVSS is determined depending on the voltage difference between the gate electrode and the source electrode of the first transistor T 1 . The luminance of light emitted from the light-emitting diode LDg may be determined depending on the amount of driving current. 
     Thereafter, when a scan signal having a turn-off level (i.e., a logic low level) is applied to the first scan line S 1   i  and the second scan line S 2   i , the second transistor T 2  and the third transistor T 3  may be turned off. Therefore, regardless of a change in the voltage of the data line Dj, by means of the storage capacitor Cst, the voltage difference between the gate electrode and the source electrode of the first transistor T 1  may be maintained, and the luminance of light emitted from the light-emitting diode LDg may be maintained. 
       FIG.  6    is a diagram illustrating a threshold voltage sensing period of a transistor according to an embodiment of the present disclosure. 
     Before a time point t 1   a , the first switch SW 1  is in a turn-on state, and the second switch SW 2  is in a turn-off state. Therefore, the initialization voltage Vint is applied to the third node N 3 . Further, the data driver  12  supplies a reference voltage Vref 1  to the data line Dj. In an embodiment, the reference voltage Vref 1  is a constant voltage that may differ from the data voltage that is supplied to the data line Dj during the display period whose voltage level may vary. 
     At the time point t 1   a , the first scan signal having a turn-on level is supplied to the first scan line S 1   i , and a second scan signal having a turn-on level is supplied to the second scan line S 2   i . Accordingly, the reference voltage Vref 1  is applied to the first node N 1 , and the initialization voltage Vint is applied to the second node N 2 . Therefore, the first transistor T 1  may be turned on depending on the difference between the gate voltage and the source voltage of the first transistor T 1 . 
     At a time point t 2   a , the second switch SW 2  is turned on. Accordingly, the first electrode of the sensing capacitor Css is initialized to the initialization voltage Vint. 
     At a time point t 3   a , the first switch SW 1  is turned off. Accordingly, current is supplied from the first power line ELVDD, and thus the voltages of the second node N 2  and the third node N 3  may increase. When the voltages of the second node N 2  and the third node N 3  increase up to a voltage of (Vref 1 -Vth), the first transistor T 1  is turned off, and thus the voltages of the second node N 2  and the third node N 3  do not increase any more. Since the fourth node N 4  is coupled to the third node N 3  through the second switch SW 2  being in a turn-on state, the sensing voltage (Vref 1 -Vth) is stored in the first electrode of the sensing capacitor Css. 
     At a time point t 4   a , the second switch SW 2  is turned off, and thus the sensing voltage (Vref 1 -Vth) of the first electrode of the sensing capacitor Css may be maintained. The sensing circuit  15  may convert the sensing voltage (Vref 1 -Vth), which is an analog value, into a digital value, and may determine the threshold voltage Vth of the first transistor T 1  of the first pixel Pxij. For example, the sensing circuit  15  may sense the sensing voltage and the sensing controller  16  may set reference voltages used by the timing controller  11  to set the first reference Vref 1 . For example, the timing controller  11  may receive the reference voltages from the sensing controller  16  to generate the first reference voltage Vref 1 , receive the sensing voltage from the sensing circuit  15 , and determine the threshold voltage Vth of the first transistor T 1  by subtracting the received sensing voltage from the determined first reference voltage Vref 1 . The reference voltages may be set by the sensing controller  16  considering degradation information. The timing controller  11  may compensate an input grayscale using the determined threshold voltage and provide the compensated grayscale to the data driver  12 . 
     At a time point t 5   a , the first scan signal having a turn-off level is supplied to the first scan line S 1   i , and the second scan signal having a turn-off level is supplied to the second scan line S 2   i . Further, the first switch SW 1  is turned on. Therefore, the initialization voltage Vint may be applied to the third node N 3 . 
       FIGS.  7  and  8    are diagrams illustrating a sensing controller according to an embodiment of the present disclosure. The sensing controller  16   a  of  FIG.  7    may be used to implement the sensing controller  16  of  FIG.  7   . 
     the sensing controller  16   a  of  FIG.  7    determines a first reference voltage Vreflr, a second reference voltage Vref 1   g , and a third reference voltage Vref 1   b . The first to third reference voltages Vref 1   r , Vref 1   g , and Vref 1   b  may be voltages used to determine the threshold voltage Vth of the first transistor T 1 . 
     The sensing controller  16   a  includes a maximum value extractor  161  (e.g., a circuit), a degradation information provider  162  (e.g., a circuit), a first lookup table  163   a , and a reference voltage calculator  164 . For example, the sensing controller  16   a  may be operated whenever the display device  10  is powered on and is powered off. 
     The maximum value extractor  161  extracts a first maximum value Vcp_maxr from past compensation values Vcp for the first pixels. Also, the maximum value extractor  161  extracts a second maximum value Vcp_maxg from past compensation values Vcp for second pixels. Further, the maximum value extractor  161  extracts a third maximum value Vcp_maxb from past compensation values Vcp for third pixels. 
     The past compensation values Vcp may be values calculated based on past sensing voltages, and may correspond to values obtained by subtracting past input grayscale values from past compensation grayscale values. For example, during a certain past period (e.g., during the latest sensing period), the sensing circuit  15  is assumed to have received past sensing voltages for respective pixels. The timing controller  11  is assumed to have determined past compensation values Vcp for respective pixels based on the past sensing voltages. Also, during a certain past period (e.g., during the latest display period), the timing controller  11  is assumed to have supplied past compensation grayscale values, calculated by adding the past compensation values Vcp to the past input grayscale values, to the data driver  12 . For example, when a past input grayscale value for a specific pixel is a 240-grayscale value and a past compensation value is a 4-grayscale value, a past compensation grayscale value for the specific pixel may be a 244-grayscale value. 
     The past compensation values Vcp for respective pixels may be independent of each other. For example, the past compensation values Vcp for the pixels may be different from each other. Therefore, the first maximum value Vcp_maxr, the second maximum value Vcp_maxg, and the third maximum value Vcp_maxb generated by the maximum value extractor  161  may be independent of each other. For example, the first maximum value Vcp_maxr, the second maximum value Vcp_maxg, and the third maximum value Vcp_maxb may be different from each other. 
     The degradation information provider  162  may provide degradation information Deinf pertaining to the first pixels, the second pixels, and the third pixels. For example, the degradation information Deinf may be determined based on at least one of the temperature, grayscale, and usage time of each of the first pixels, the second pixels, and the third pixels. For example, as the temperature becomes higher, the grayscale becomes larger, and the usage time is longer, the degree of degradation may be higher. The degradation information Deinf may be information indicating such a degree of degradation. The degradation information Deinf may be combined information for all pixels. In other embodiments, the degradation information Deinf may include first integrated degradation information for the first pixels, second integrated degradation information for the second pixels, and third integrated degradation information for the third pixels. 
     The first lookup table  163   a  provides a first base voltage value Vref 1 _Der for the first pixels (e.g., red pixels) corresponding to the degradation information Deinf, a second base voltage value Vref 1 _Deg for the second pixels (e.g., green pixels) corresponding to the degradation information Deinf, and a third base voltage value Vref 1 _Deb for the third pixels (e.g., blue pixels) corresponding to the degradation information Deinf. For example, the first lookup table  163   a  may be implemented as a memory. For example, as the degree of degradation becomes higher, the base voltage value becomes higher. In an embodiment, if a first pixel has been used for a first time and a second pixel has been used for a second longer time, the degradation information Deinf would cause a higher base voltage value to be selected for the second pixel than the first pixel. In an embodiment, if a temperature of a first pixel is higher than a temperature of a second pixel, the degradation information would cause a higher base voltage value to be selected for the first pixel than the second pixel. 
     In an embodiment, the reference voltage calculator  164  calculates the first reference voltage Vref 1   r  by adding the first base voltage value Vref 1 _Der to the first maximum Vcp_maxr, calculates the second reference voltage Vref 1   g  by adding the second base voltage value Vref 1 _Deg to the second maximum value Vcp_maxg, and calculates the third reference voltage Vref 1   b  by adding the third base voltage value Vref 1 _Deb to the third maximum value Vcp_maxb. The sensing controller  16   a  may provide the first reference voltage Vref 1   r , the second reference voltage Vref 1   g , and the third reference voltage Vref 1   b  to the timing controller  11 . 
     The display device  10  according to the present embodiment may sense pixels in consideration of not only process variation but also the degree of degradation. Further, the display device  10  may improve the accuracy of sensing of the threshold voltage Vth of the first transistor T 1  by utilizing the different reference voltages Vref 1   r , Vref 1   g , and Vref 1   b  for respective colors. For example, because the light-emitting diodes LDr, LDg, and LDb of different colors include light-emitting layers formed of different materials, current versus luminance characteristics may differ from each other. Therefore, it is important to accurately sense the threshold voltage Vth of the first transistor T 1  which determines the amount of driving current. 
     Referring to  FIG.  8   , the sensing controller  16   a  according to the present embodiment may provide a higher reference voltage Vref 1  as the amount of degradation AVth of the threshold voltage of the first transistor T 1  becomes larger (see the left graph). Therefore, suitable sensing may be performed, and the gate-source voltage (Vgs)-versus driving current (Ids) characteristics of the first transistor T 1  may be appropriately compensated for during a display period (see the right graph). 
       FIGS.  9  and  10    are diagrams illustrating a high voltage generator and a grayscale voltage generator according to an embodiment of the present disclosure. 
     The display device  10  of  FIG.  9    may further include a high voltage generator  172  and a grayscale voltage generator  171  in comparison with the embodiment of  FIG.  7   . 
     The high voltage generator  172  may generate a high voltage AVDD. For example, the high voltage generator  172  may receive a high voltage code AVDDcd from the timing controller  11 , and may generate the high voltage AVDD having a magnitude corresponding to the high voltage code AVDDcd. The high voltage AVDD may be higher than grayscale voltages VGAM which will be described later. For example, the high voltage generator  172  may be a DC-DC converter (e.g., a boost converter) for converting an input voltage into the high voltage AVDD. 
     The grayscale voltage generator  171  may generate grayscale voltages VGAM based on the high voltage AVDD. For example, the grayscale voltage generator  171  may receive a grayscale voltage code GAMcd from the timing controller  11 , and may generate grayscale voltages VGAM having a magnitude corresponding to the grayscale voltage code GAMcd. For example, the grayscale voltage generator  171  may generate the grayscale voltages VGAM by dividing the high voltage AVDD. 
     The reference voltage calculator  164  may generate a first reference voltage Vref 1   r , a second reference voltage Vref 1   g , and a third reference voltage Vref 1   b  based on the high voltage AVDD and the grayscale voltages VGAM. For example, the reference voltage calculator  164  may generate the first reference voltage Vref 1   r  by selecting the high voltage AVDD and any one of the grayscale voltages VGAM. Similarly, the reference voltage calculator  164  may generate the second reference voltage Vref 1   g  by selecting the high voltage AVDD and any one of the grayscale voltages VGAM. Further, the reference voltage calculator  164  may generate the third reference voltage Vref 1   b  by selecting the high voltage AVDD and any one of the grayscale voltages VGAM. In other embodiments, the reference voltage calculator  164  may generate a new voltage by dividing the voltage based on the high voltage AVDD and the grayscale voltages VGAM, and may set the new voltage as the first reference voltage Vref 1   r , the second reference voltage Vref 1   g , or the third reference voltage Vref 1   b.    
     In accordance with the present embodiment, the grayscale voltage generator  171  that is used for generation of data voltages may be utilized during a display period, thus a separate converter for generating the first to third reference voltages Vref 1   r , Vref 1   g , and Vref 1   b  is not necessary. 
     Referring to  FIG.  10   , an embodiment of the grayscale voltage generator  171  is illustrated. 
     The grayscale voltage generator  171  includes a selection value provider  1711  (e.g., a circuit), a grayscale voltage output circuit  1712 , resistor strings RS 1  to RS 11 , multiplexers MX 1  to MX 12 , and resistors R 1  to R 10 . 
     The selection value provider  1711  may provide selection values for the multiplexers the MX 1  to MX 12  based on the grayscale voltage code GAMcd. The selection values based on the grayscale voltage code GAMcd may be stored in advance in a memory device, e.g., an element such as a register. 
     The resistor string RS 1  may generate intermediate voltages between a high voltage AVDD and a low voltage (e.g., a ground voltage). The multiplexer MX 1  may select one of intermediate voltages provided from the resistor string RS 1  depending on a corresponding selection value, and may then output the selected intermediate voltage as a reference voltage VT. The multiplexer MX 2  may select one of the intermediate voltages provided from the resistor string RS 1  depending on a corresponding selection value, and may then output a 0-grayscale voltage RV 0 . 
     The resistor string RS 11  may generate intermediate voltages between the reference voltage VT and the 0-grayscale voltage RV 0 . The multiplexer MX 12  may select one of the intermediate voltages provided from the resistor string RS 11  depending on a corresponding selection value, and may then output a 1-grayscale voltage RV 1 . 
     The resistor string RS 10  may generate intermediate voltages between the reference voltage VT and the 1-grayscale voltage RV 1 . The multiplexer MX 11  may select one of the intermediate voltages provided from the resistor string RS 10  depending on a corresponding selection value, and may then output a 7-grayscale voltage RV 7 . 
     The resistor string RS 9  may generate intermediate voltages between the reference voltage VT and the 7-grayscale voltage RV 7 . The multiplexer MX 10  may select one of the intermediate voltages provided from the resistor string RS 9  depending on a corresponding selection value, and may then output an 11-grayscale voltage RV 11 . 
     The resistor string RS 8  may generate intermediate voltages between the reference voltage VT and the 11-grayscale voltage RV 11 . The multiplexer MX 9  may select one of the intermediate voltages provided from the resistor string RS 8  depending on a corresponding selection value, and may then output a 23-grayscale voltage RV 23 . 
     The resistor string RS 7  may generate intermediate voltages between the reference voltage VT and the 23-grayscale voltage RV 23 . The multiplexer MX 8  may select one of the intermediate voltages provided from the resistor string RS 7  depending on a corresponding selection value, and may then output a 35-grayscale voltage RV 35 . 
     The resistor string RS 6  may generate intermediate voltages between the reference voltage VT and the 35-grayscale voltage RV 35 . The multiplexer MX 7  may select one of the intermediate voltages provided from the resistor string RS 6  depending on a corresponding selection value, and may then output a 51-grayscale voltage RV 51 . 
     The resistor string RS 5  may generate intermediate voltages between the reference voltage VT and the 51-grayscale voltage RV 51 . The multiplexer MX 6  may select one of the intermediate voltages provided from the resistor string RS 5  depending on a corresponding selection value, and may then output an 87-grayscale voltage RV 87 . 
     The resistor string RS 4  may generate intermediate voltages between the high voltage AVDD and 87-grayscale voltage RV 87 . The multiplexer MX 5  may select one of the intermediate voltages provided from the resistor string RS 4  depending on a corresponding selection value, and may then output a 151-grayscale voltage RV 151 . 
     The resistor string RS 3  may generate intermediate voltages between the high voltage AVDD and 151-grayscale voltage RV 151 . The multiplexer MX 4  may select one of the intermediate voltages provided from the resistor string RS 3  depending on a corresponding selection value, and may then output a 203-grayscale voltage RV 203 . 
     The resistor string RS 2  may generate intermediate voltages between the high voltage AVDD and 203-grayscale voltage RV 203 . The multiplexer MX 3  may select one of the intermediate voltages provided from the resistor string RS 2  depending on a corresponding selection value, and may then output a 255-grayscale voltage RV 255 . 
     The above-described 0-, 1-, 7-, 11-, 23-, 35-, 51-, 87-, 151-, 203-, and 255-grayscale values may be referred to as “reference grayscale values”. Further, the grayscale voltages RV 0 , RV 1 , RV 7 , RV 11 , RV 23 , RV 35 , RV 51 , RV 87 , RV 151 , RV 203 , and RV 255  generated by the multiplexers MX 2  to MX 12  may be referred to as “reference grayscale voltages”. The number of reference grayscale values and grayscale numbers corresponding to respective reference grayscale values may be set differently according to the product. Hereinafter, for convenience of description, 0-, 1-, 7-, 11-, 23-, 35-, 51-, 87-, 151-, 203-, and 255-grayscale values will be described as being reference grayscale values. 
     The grayscale voltage output circuit  1712  may generate grayscale voltages RV 0 , RV 1 , RV 2 , RV 3 , RV 4 , . . . , RV 253 , RV 254 , and RV 255  by dividing the reference grayscale voltages RV 0 , RV 1 , RV 7 , RV 11 , RV 23 , RV 35 , RV 51 , RV 87 , RV 151 , RV 203 , and RV 255 . For example, the grayscale voltage output circuit  1712  may generate grayscale voltages RV 2  to RV 6  by dividing the reference grayscale voltages RV 1  and RV 7 . 
     The grayscale voltages VGAM received from the reference voltage calculator  164  may be identical to the grayscale voltages RV 0 , RV 1 , RV 2 , RV 3 , RV 4 , . . . , RV 253 , RV 254 , and RV 255 . In other embodiments, the grayscale voltages VGAM received from the reference voltage calculator  164  may be identical to the reference grayscale voltages RV 0 , RV 1 , RV 7 , RV 11 , RV 23 , RV 35 , RV 51 , RV 87 , RV 151 , RV 203 , and RV 255 . 
       FIG.  11    is a diagram illustrating grayscale voltage generators according to an embodiment of the present disclosure. 
     The display device  10  of  FIG.  11    is different from the display device  10  of  FIG.  9    in that the display device  10  of  FIG.  11    includes first, second and third grayscale voltage generators ‘ 71 ’. 
     The first grayscale voltage generator may generate first grayscale voltages VGAM 1  for first pixels based on a high voltage AVDD. The second grayscale voltage generator may generate second grayscale voltages VGAM 2  for second pixels based on the high voltage AVDD. The third grayscale voltage generator may generate third grayscale voltages VGAM 3  for third pixels based on the high voltage AVDD. 
     Since each of the first, second, and third grayscale voltage generators  171 ′ has substantially the same structure as that of  FIG.  10   , repeated descriptions thereof will be omitted. However, selection values stored in the selection value providers of the first to third grayscale voltage generators  171 ′ corresponding to different colors may differ from those of the foregoing embodiment. 
     The reference voltage calculator  164  may generate a first reference voltage Vref 1   r  based on the high voltage AVDD and the first grayscale voltages VGAM 1 , may generate a second reference voltage Vref 1   g  based on the high voltage AVDD and the second grayscale voltages VGAM 2 , and may generate a third reference voltage Vref 1   b  based on the high voltage AVDD and the third grayscale voltages VGAM 3 . 
     In accordance with the present embodiment, during a display period, the first to third grayscale voltage generators  171 ′ used to generate data voltages corresponding to first to third colors may be utilized. Thus, a separate converter for generating the first to third reference voltages Vref 1   r , Vref 1   g , and Vref 1   b  is not necessary. 
       FIG.  12    is a diagram illustrating a mobility sensing period according to an embodiment of the present disclosure. 
     At a time point t 1   b , a first scan signal having a turn-on level is applied to a first scan line S 1   i , and a second scan signal having a turn-on level is applied to a second scan line S 2   i . In an embodiment, the first scan line S 1   i  is connected to pixels of a first pixel row and the second scan line S 2   i  is connected to a pixels of a second pixel row that is immediately adjacent to the first pixel row. Here, because a reference voltage Vref 2  is already applied to the data line Dj, the reference voltage Vref 2  is applied to the first node N 1 . Also, because the first switch SW 1  is in a turn-on state, the initialization voltage Vint is applied to the second node N 2  and the third node N 3 . Therefore, the first transistor T 1  may be turned on depending on the difference between the gate voltage and the source voltage of the first transistor T 1 . 
     At a time point t 2   b , since a first scan signal having a turn-off level is applied to the first scan line S 1   i , the first node N 1  may float. Further, because the second switch SW 2  is turned on, the initialization voltage Vint is applied to the fourth node N 4 . 
     At a time point t 3   b , the first switch SW 1  is turned off. Accordingly, since current is supplied from the first power line ELVDD through the first transistor T 1 , the voltages of the second, third, and fourth nodes N 2 , N 3 , and N 4  increase. In this embodiment, because the first node N 1  is floating, the gate-source voltage difference of the first transistor T 1  may be maintained. 
     At a time point t 4   b , the second switch SW 2  is turned off. Accordingly, a sensing voltage is stored in the first electrode of the sensing capacitor Css. The mobility of the first transistor T 1  may be calculated using the following Equation (1):
 
 u=C *( V− 2− Vp 1)/( tp 2− tp 1)  (1)
 
     Here, u is the mobility of the first transistor T 1 , C is a preset constant, Vp 2  is a sensing voltage at a time point tp 1 , and Vp 1  is a sensing voltage at a time point tp 2 . 
     Assuming that a voltage slope of the fourth node N 4  between the time point t 3   b  and the time point t 4   b  is linear, the sensing voltage Vint at the time point t 3   b  and the sensing voltage at the time point t 4   b  can be determined, and thus the mobility of the first transistor T 1  may be obtained. 
       FIGS.  13  and  14    are diagrams illustrating a sensing controller according to an embodiment of the present disclosure. The sensing controller  16   b  may be used to implement the sensing controller  16  of  FIG.  1   . 
     Referring to  FIG.  13   , the sensing controller  16   b  determines a first reference voltage Vref 2   r , a second reference voltage Vref 2   g , and a third reference voltage Vref 2   b . The first to third reference voltages Vref 2   r , Vref 2   g , and Vref 2   b  may be voltages used to determine the mobility of the first transistor T 1 . 
     The sensing controller  16   b  includes a maximum value extractor  161 , a degradation information provider  162 , a second lookup table  163   b , and a reference voltage calculator  164 . Because the components of the sensing controller  16   b , except for the second lookup table  163   b , are the same as those of the sensing controller  16   a  of  FIG.  7   , repeated descriptions thereof will be omitted. 
     The second lookup table  163   b  provides a first base voltage value Vref 2 _DEr for first pixels corresponding to degradation information DEinf, a second base voltage value Vref 2 _DEg for second pixels corresponding to the degradation information DEinf, and a third base voltage value Vref 2 _DEb for third pixels corresponding to the degradation information DEinf. For example, the second lookup table  163   b  may be implemented as a memory. For example, as the degree of degradation becomes higher, the base voltage value may become higher. 
     The first to third base voltage values Vref 2 _DEr, Vref 2 _DEg, and Vref 2 _DEb of the second lookup table  163   b  may be base voltage values for mobility sensing, and may be different from the first to third base voltage values Vref 1 _DEr, Vref 1 _DEg, and Vref 1 _DEb of the first lookup table  163   a  for threshold voltage sensing. 
     The display device  10  according to the present embodiment may sense pixels in consideration of not only process variation but also the degree of degradation. Further, the display device  10  may improve the accuracy of sensing of the mobility of the first transistor T 1  by utilizing different reference voltages Vref 2   r , Vref 2   g , and Vref 2   b  for respective colors. For example, because the light-emitting diodes LDr, LDg, and LDb of different colors include light-emitting layers formed of different materials, current versus luminance characteristics may differ from each other. Therefore, it is important to accurately sense the mobility of the first transistor T 1  which determines the amount of driving current. 
     Although not illustrated in the drawing, even in the embodiment where the display device  10  includes the sensing controller  16   b , embodiments of the high voltage generator and the grayscale voltage generator of  FIGS.  9  to  12    may be applied together to the display device  10 . 
     Referring to  FIG.  14   , the sensing controller  16   b  according to the present embodiment may provide a higher reference voltage Vref 2  as the amount of degradation (Au) of the mobility of the first transistor T 1  becomes larger (see the left graph). Therefore, suitable sensing may be performed, and the gate-source voltage (Vgs)-versus driving current (Ids) characteristics of the first transistor T 1  may be appropriately compensated for during a display period (see the right graph). 
       FIG.  15    is a diagram illustrating a threshold voltage sensing period of a light-emitting diode according to an embodiment of the present disclosure. 
     At a time point t 1   c , a first scan signal having a turn-on level is applied to a first scan line S 1   i , and a second scan signal having a turn-on level is applied to a second scan line S 2   i . Here, because a reference voltage Vref 3  is already applied to the data line Dj, the reference voltage Vref 3  is applied to the first node N 1 . Also, because the first switch SW 1  is in a turn-on state, the initialization voltage Vint is applied to the second node N 2  and the third node N 3 . Therefore, the first transistor T 1  may be turned on depending on the gate-source voltage Vgs 1 . 
     At a time point t 2   c , a second scan signal having a turn-off level is applied to the second scan line S 2   i . Further, at the time point t 2   c  or immediately after the time point t 2   c , the first scan signal having a turn-off level is applied to the first scan line S 1   i . Here, the voltage of the second node N 2  may be increased by current supplied from the first power line ELVDD. Further, the voltage of the first node N 1  that is coupled to the second node N 2  and is floating also increases. Here, the voltage of the second node N 2  may be saturated to a voltage corresponding to the threshold voltage of the light-emitting diode LDg. As the degree of degradation of the light-emitting diode LDg becomes higher, the saturated voltage of the second node N 2  may become higher. Due to the saturated voltage of the second node N 2 , the gate-source voltage Vgs 2  of the first transistor T 1  may be reset. For example, the reset gate-source voltage Vgs 2  may be lower than the preset gate-source voltage Vgs 1 . 
     At a time point t 3   c , the second scan signal having a turn-on level is applied to the second scan line S 2   i . Therefore, the initialization voltage Vint is applied to the second node N 2 . Here, the reset gate-source voltage Vgs 2  may be maintained by the storage capacitor Cst. 
     At a time point t 4   c , the first switch SW 1  is turned off. Here, because the second switch SW 2  is in a turn-on state, the voltages of the second node N 2 , the third node N 3 , and the fourth node N 4  may increase. As the degree of degradation of the light-emitting diode LDg (or the threshold voltage of the light-emitting diode LDg) becomes higher, the rising slope of the voltage may become gentler. 
     At a time point t 5   c , the second scan signal having a turn-off level is applied to the second scan line S 2   i , and the second switch SW 2  is turned off. Accordingly, the threshold voltage of the light-emitting diode LDg may be calculated using the sensing voltage stored in the sensing capacitor Css. 
       FIGS.  16  and  17    are diagrams illustrating a sensing controller according to an embodiment of the present disclosure. The sensing controller  16   c  may be used to implement the sensing controller  16  of  FIG.  1   . 
     Referring to  FIG.  16   , a sensing controller  16   c  determines a first reference voltage Vref 3   r , a second reference voltage Vref 3   g , and a third reference voltage Vref 3   b . The first to third reference voltages Vref 3   r , Vref 3   g , and Vref 3   b  are voltages used to determine the threshold voltages of the light-emitting diodes. 
     The sensing controller  16   c  includes a maximum value extractor  161 , a degradation information provider  162 , a third lookup table  163   c , and a reference voltage calculator  164 . Because the components of the sensing controller  16   c , except for the third lookup table  163   c , are the same as those of the sensing controller  16   a  of  FIG.  7   , repeated descriptions thereof will be omitted. 
     The third lookup table  163   c  provides a first base voltage value Vref 3 _DEr for first pixels corresponding to degradation information DEinf, a second base voltage value Vref 3 _DEg for second pixels corresponding to the degradation information DEinf, and a third base voltage value Vref 3 _DEb for third pixels corresponding to the degradation information DEinf. For example, the third lookup table  163   c  may be implemented as a memory. For example, as the degree of degradation becomes higher, the base voltage value may become higher. 
     The first to third base voltage values Vref 3 _DEr, Vref 3 _DEg, and Vref 3 _DEb of the third lookup table  163   c  are base voltages used to sense the threshold voltages of the light-emitting diodes, and may be different from the base voltage values of the first lookup table  163   a  for sensing threshold voltages and the second lookup table  163   b  for sensing mobility. 
     The display device  10  according to the present embodiment may sense pixels in consideration of not only process variation but also the degree of degradation. Further, the display device  10  may improve the accuracy of sensing of threshold voltages of light-emitting diodes by utilizing different reference voltages Vref 3   r , Vref 3   g , and Vref 3   b  for respective colors. For example, because the light-emitting diodes LDr, LDg, and LDb of different colors include light-emitting layers formed of different materials, threshold voltage characteristics may differ from each other. 
     Although not illustrated in the drawing, even in the embodiment where the display device  10  includes the sensing controller  16   c , embodiments of the high voltage generator and the grayscale voltage generator of  FIGS.  9  to  12    may be applied together to the display device  10 . 
     Referring to  FIG.  17   , the sensing controller  16   c  according to the present embodiment may provide a higher reference voltage Vref 3  as the degree of degradation (e.g., threshold voltage) of each light-emitting diode becomes higher (see the left graph). Accordingly, suitable sensing may be performed, and the degree of degradation of light-emitting diodes may be suitably compensated for during the display period. Thus, a luminance for a specific grayscale may be maintained regardless of the degree of degradation (see the right graph). 
     The drawings that have been referred to and the detailed description of the present disclosure are merely exemplary for the present disclosure, and are only intended to describe the present disclosure, rather than limit meanings or restrict the scope of the present disclosure described in the claims. Therefore, it will be appreciated to those of ordinary skill in the art that various modifications and other embodiments may be implemented from those embodiments. 
     A display device according to at least one embodiment of the present disclosure may sense pixels in consideration of not only process variation but also the degree of degradation.