Patent Publication Number: US-6704902-B1

Title: Decoding system for error correction code

Description:
CROSS REFERENCE TO RELATED APPLICATION 
     This application is a continuation-in-part of application Ser. No. 09/383,471, filed Aug. 26, 1999, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a decoding system for decoding an error correction code such as an extended Reed-Solomon code extended by one symbol. More particularly, the invention relates to a decoding system which enables a mixed correction of, for example, a one-extended Reed-Solomon code at one path by integration of means for performing normal correction and erasure correction of an extended symbol. 
     2. Description of the Related Art 
     First, an error correction system will be described with reference to FIG.  1 . 
     Let us consider a case where the number of added parity symbols is p and information I=(I 0 , I 1 , . . . , I k−1 ) of k symbols is transmitted. The information of k symbols is encoded by an encoder (encoding block) so that p parity symbols are added and a code word C=(C 0 , C 1 , . . . , C n−1 ) with a length of n=k+p is obtained. 
     The code word passes through a transmission path with an error and is received as a received word R=(R 0 , R 1 , . . . , R n−1 ) including an error. When an i-th error is made ei, Ri=Ci+ei. The received word R is decoded by a decoder (decoding block), so that a presumed code word Cp=(Cp 0 , Cp 1 , . . . , Cp n−1 ) is obtained. Presumed information Ip=(Ip 0 , Ip 1 , . . . , Ip k−1 ) is obtained from this code word Cp. 
     A Reed-Solomon code is one of widely-used error correction codes. In the Reed-Solomon code, when a symbol is expressed by m bits, a maximum code length n max is 2 m −1. For example, when a symbol is expressed by 8 bits, the maximum code length ‘n max’ becomes 255. 
     There is also a one-extended Reed-Solomon code in which the code length of the Reed-Solomon code is extended by one symbol, and the maximum code length ‘n max’ becomes 2 m . For example, in the case where a symbol is expressed by 8 bits, the maximum code length ‘n max’ becomes 256. In the one-extended Reed-Solomon code, while the number of parity symbols p is kept as it is, the information symbols can be made larger than the Reed-Solomon code by one symbol, namely, k+1 symbols. 
     Next, a decoding method of the Reed-Solomon code will be described. There are three decoding methods, that is, a normal correction in which decoding is performed from onlya received word R, an erasure correction in which decoding is performedby using a received word R and an erasure flag F=(F 0 , F 1 , . . . , F n−1 ) indicating a position of the received word where an error appears to exist, and a mixed correction where the normal correction and the erasure correction are performed at the same time. Here, with reference to FIGS. 2 to  6 , a decoding method of the mixed correction of the most general Reed-Solomon code will be described. 
     Here, with respect to a primitive polynomial f(x) on a field GF(2)={0, 1}, a root of f(x)=0 is made α, and an extension field of GF(2) is formed. At this time, if the degree of the primitive polynomial f(x) is made m, one symbol becomes m bits, and the extension field GF(2 m ) is expressed by equation (1). 
     [Numerical Expression 1] 
     
       
           GF (2 m )={0, 1, α, α2, . . . α x }, where  x= 2 m −2  (1) 
       
     
     A generating polynomial g(x) of the Reed-Solomon code used here is expressed by equation (2). 
     [Numerical Expression 2]               g        (   x   )       =       ∏     i   =   0       p   -   1                       (     x   -     α   i       )               (   2   )                         
     FIG. 2 shows a flowchart of decoding of the Reed-Solomon code. 
     First, at step  100 , a received word R=(R 0 , R 1 , . . . , R n−1 ) and an erasure flag F=(F 0 , F 1 , . . . , F n−1 ) are given. The erasure flag F is a flag in which 1 is set for a position in the received word R where it is predicted that an error exists, and 0 is set for other positions where it is predicted that an error does not exist. 
     Next, at step  101 , the number of erasures ε is obtained through equation (3), and an erasure position polynomial E(x) is obtained through equation (4). 
     [Numerical Expression 3] 
     
       
         ε=#{ i|F   i =1} [for  i =0˜( n −1)]  (3) 
       
     
     
       
           E ( x )=Π Fi=1 (1−α i   x ) [for  i =0˜( n −1)]  (4) 
       
     
     Next, at step  102 , using a parity check matrix H as expressed by equation (5), a syndrome S=(S 0 , S 1 , . . . , S p−1 ) is obtained from equation (6). A calculation method of the syndrome S will be described later with reference to FIG.  3 . Then a syndrome polynomial S(x) as expressed by equation (7) is obtained. 
     [Numerical Expression 4]             H   =     (                    1       1       1       ⋯       1           1       α         α   2         ⋯         α     n   -   1                                       ·                                                           ·                                                           ·                                                                                                   1         α     p   -   1             α     2        (     p   -   1     )             ⋯         α       (     n   -   1     )          (     p   -   1     )                          )             (   5   )                         t   S=H   t   R   (6) 
     
       
           S ( x )= S   0   +S   1   x+S   2   x   2   + . . . +S   p−1   x   p−1   (7) 
       
     
     Next, at step  103 , using the erasure position polynomial E(x) and the syndrome polynomial S(x), a modified syndrome polynomial Sm(x) is obtained as expressed by equation (8). 
     [Numerical Expression 5] 
     
       
           Sm ( x )= S ( x ) E ( x ) mod  x   p   (8) 
       
     
     Next, at step  104 , an error evaluator polynomial ω(x) and an error locator polynomial σ(x) are obtained by using the modified syndrome polynomial Sm(x). A calculation method of the error evaluator polynomial ω(x) and the error locator polynomial σ(x) will be described later with reference to FIG.  4 . 
     Next, at step  105 , the condition of deg ω(x)&lt;deg σ(x) is judged, and if the condition is false, the procedure proceeds to step  110 , outputs an error signal, and is ended, and if true, it proceeds to step  106 . Here, deg ω(x) is the degree of the error evaluator polynomial ω(x) and deg σ(x) is the degree of the error locator polynomial σ(x). 
     At step  106 , the condition of equation (9) is judged, and if false, the procedure proceeds to step  110 , outputs an error signal, and is ended, and if true, it proceeds to step  107 . Incidentally, a bracket of the right side of equation (9) means that a decimal fraction is omitted. The same thing can be said to subsequent equations. 
     [Numerical Expression 6]               deg                   σ        (   x   )         ≤     ⌊       p   +   ɛ     2     ⌋             (   9   )                         
     At step  107 , an error position is detected by using the error locator polynomial σ(x). A calculation method of the error position will be described later with reference to FIG.  5 . At step  108 , the condition of #roots=deg σ(x) is judged, and if false, the procedure proceeds to step  110 , outputs an error signal, and is ended, and if true, it proceeds to step  109 . Here, the #roots is the number of error positions detected at step  107 . 
     At step  109 , from the error evaluator polynomial ω(x), the error locator polynomial σ(x) obtained at step  104 , and the error position i detected at step  107 , an error value ei at the position i is calculated. Further, from the received word R, the error position i, and the error value ei, presumed information Ip=(Cp 0 , Cp 1 , . . . , Cp k−1 ) is calculated and is outputted. A calculation method of the presumed information Ip will be described later with reference to FIG.  6 . 
     With reference to the flowchart of FIG. 3, a method of calculating the syndrome S from the received word R will be described. 
     First, at step  120 , the received word R=(R 0 , R 1 , . . . , R n−1 ) is received. At step  121 , the respective elements (S 0 , S 1 , . . . , S p−1 ) of the syndrome S are initialized by the element R 0  of the received word R. At step  122 , a counter I is initialized to 1. 
     Next, at step,  123 , the respective elements of the syndrome S are renewed by equation (10). 
     [Numerical Expression 7] 
     
       
           Sj=Sj+Ri×α   ij [for  j =0 to ( p −1)]  (10) 
       
     
     Next, at step  124 , the value of the counter i is increased by 1. At step  125 , the condition of i&lt;n is judged, and if true, the procedure returns to step  123  and the syndrome calculation is repeated, and if false, it proceeds to step  126  and outputs the syndrome S=(S 0 , S 1 , . . . , S p−1 ). 
     Using a flowchart of FIG. 4, a method of calculating the error evaluator polynomial ω(x) and the error locator polynomial σ(x) from the modified syndrome polynomial Sm(x) (a method by algorithm using the Euclidean mutual division method) will be described. 
     First, at step  130 , r −1 (x), r 0 (x), u −1 (x), u 0 (x), v −1 (x), and v 0 (x) are initialized as expressed by equation (11). 
     [Numerical Expression 8]             {                 r     -   1            (   x   )       =     x   p                     r   0          (   x   )       =     Sm        (   x   )                    {                 u     -   1            (   x   )       =   1                   u   0          (   x   )       =   0                {               v     -   1            (   x   )       =   0                   v   0          (   x   )       =   1                           (   11   )                         
     Next, at step  131 , the counter i is initialized to 0. At step  132 , the value of the counter i is increased by 1. At step  133 , division is performed, so that q i−1 (x) satisfying equation (12) is found. Here, deg r i (x) is the degree of r i (x), and deg r i−1 (x) is the degree of r i−1 (x). 
     [Numerical Expression 9] 
     
       
           r   i ( x )= r   i−2 ( x )− q   i−1 ( x ) r   i−1 ( x ), deg  r   i ( x )&lt;deg  r   i−1 ( x )  (12) 
       
     
     Next, at step  134 , using q i−1 (x) found at step  133 , u i (x) and v i (x) are renewed as expressed by equation (13). 
     [Numerical Expression 10]             {               u   i          (   x   )       =         u     i   -   2            (   x   )       -         q     i   -   1            (   x   )              u     i   -   1            (   x   )                           v   i          (   x   )       =         v     i   -   2            (   x   )       -         q     i   -   1            (   x   )              v     i   -   1            (   x   )                           (   13   )                         
     Next, at step  135 , the condition (end condition) of equation (14) is judged, and if true, the procedure proceeds to step  136 , and if false, it returns to step  132 , and division is again performed at step  133 . At step  136 , as expressed by equation (15), the error evaluator polynomial ω(x) and the error locator polynomial σ(x) are set. 
     [Numerical Expression 11]               deg                     r   i          (   x   )         &lt;     ⌊       p   +   ɛ     2     ⌋             (   14   )               {             ω        (   x   )       =       r   i          (   x   )                     σ        (   x   )       =         v   i          (   x   )       ·     E        (   x   )                         (   15   )                         
     By using a flowchart of FIG. 5, a method of detecting an error position from the error locator polynomial σ(x) will be described. 
     First, at step  140 , the counter i is initialized to 0. At step  141 , the condition of σ(α −1 )=0 is judged, and if true, the position indicated by the counter i is an erroneous position, and the procedure proceeds to step  142 , and if false, the position indicated by the counter i is not an erroneous position, and. the procedure proceeds to step  143 . At step  142 , the value of the counter i expressing the detected error position is stored into memory A, and the procedure proceeds to step  143 . At step  143 , the value of the counter i is increased by 1. 
     Next, at step  144 , the condition of i&lt;n (end condition) is judged, and if true, the procedure returns to step  141  and repeats the detection of an error position, and if false, it proceeds to step  145 . At step  145 , the stored contents of the memory A are outputted as the error position. 
     By using a flowchart of FIG. 6, a method of correcting an error of the received word R from the error evaluator polynomial ω(x), the error locator polynomial σ(x), and the detected error position i will be described. 
     First, at step  150 , the counter i is initialized to 0. Then, at step  151 , the condition of iεA is judged, and if true, the value of the counter i indicates the error position, and the procedure proceeds to step  152 , and if false, the value of the counter i is not the error position, and the procedure proceeds to step  154 . 
     At step  152 , by using the error evaluator polynomial ω(x), the differential σ′(x) of the error locator polynomial σ(x), and the error position i, an error value ei is calculated as expressed by equation (16), and the procedure proceeds to step  153 . At step  153 , the i-th element Cpi of a presumed code word Cp is calculated as Ri−ei, and the procedure proceeds to step  155 . At step  154 , the i-th element Cpi of the presumed code word Cp is made Ri, and the procedure proceeds to step  155 . 
     [Numerical Expression 12]               e   i     =       (     -     α   i       )            ω                   (     α     -   i       )           σ   ′          (     α     -   i       )                   (   16   )                         
     At step  155 , the value of the counter i is increased by 1. At step  156 , the condition of i&lt;n (end condition) is judged, and if true, the procedure returns to step  151  and the calculation of an error value is repeated, and if false, it proceeds to step  157 . At step  157 , the presumed code word Cp=(Cp 0 , Cp 1 . . . , Cp n−1 ) is obtained, and at step  158 , the presumed information Ip=(Cp 0 , Cp 1 . . . , Cp k−1 ) is obtained from the presumed code word Cp and is outputted. 
     FIG. 7 shows a structure of a decoding apparatus  160  for performing the foregoing decoding method of the Reed-Solomon code. 
     This decoding apparatus  160  includes an input terminal  161  to which the received word (input data) R is inputted, and an input terminal  162  to which the erasure flag F corresponding to the received word R is inputted. 
     Besides, the decoding apparatus  160  includes a syndrome polynomial calculating circuit  163  (see the step  102  of FIG. 2) for obtaining the syndrome polynomial S(x) from the received word R, an erasure position polynomial calculating circuit  164  (see the step  101  of FIG. 2) for obtaining the erasure position polynomial E(x) from the erasure flag F, and an erasure number calculating circuit  165  (see the step  101  of FIG. 2) for obtaining the number ε of erasures from the erasure flag F. 
     Besides, the decoding apparatus  160  includes an error polynomial calculating circuit  166  (see the step  104  of FIG. 2) which obtains the modified syndrome polynomial Sm(x) from the syndrome polynomial S(x) and the erasure position polynomial E(x), and obtains the error evaluator polynomial ω(x) and the error locator polynomial σ(x) from this modified syndrome polynomial Sm(x). 
     Besides, the decoding apparatus  160  includes an error value calculating circuit  167  (see the step  152  of FIG. 6) for obtaining the error value ei of each element Ri of the received word R from the error evaluator polynomial ω(x) and the error locator polynomial σ(x), a received word delay circuit  168  for matching the timing of each element Ri of the received word R with the timing of the error value ei outputted from the error value calculating circuit  167 , and a subtracter  169  (see the step  153  of FIG. 6) for subtracting the error value ei from each element Ri of the received word R. 
     Besides, the decoding apparatus  160  includes a signal selecting circuit  170  for selectively taking out either one of the output Ri−ei of the subtracter  169  and the output Ri of the received word delay circuit  168 , an error position judging circuit  171  which not only detects the error position i from the error locator polynomial σ(x) and outputs a selection signal SEL corresponding to the error position i, but also judges the condition of #roots=deg σ(x) (see the step  108  of FIG.  2 ), and outputs an error signal ER if false, and an output terminal  172  for extracting the output of the signal selecting circuit  170 . 
     Here, the selection signal SEL outputted from the error position judging circuit  171  is supplied to the signal selecting circuit  170 . At the signal selecting circuit  170 , the output Ri−ei of the subtracter  169  is taken out at the error position i, and the output Ri of the received word delay circuit  168  is taken out at a position which is not the error position i. 
     Besides, the decoding apparatus  160  includes an error judging circuit  173  which judges the condition of deg ω(x)&lt;deg σ(x) and the condition of equation (9) (see the steps  105  and  106  of FIG.  2 ), and outputs an error signal ER if false, an OR gate  174  to which the error signal ER outputted from the error position judging circuit  171  and the error signal ER outputted from the error judging circuit  173  are inputted, and an output terminal  175  for extracting the output of the OR gate  174 . 
     Incidentally, the output of the OR gate  174  is supplied to the signal selecting circuit  170 , and in the case that the error signal ER is obtained as the output of the OR gate  174 , at the signal selecting circuit  170 , the output Ri of the received word delay circuit  168  is always taken out irrespective of the state of the selecting signal SEL. 
     The operation of the decoding apparatus  160  shown in FIG. 7 will be described. 
     The received word R (input data) inputted to the input terminal  161  is supplied to the syndrome polynomial calculating circuit  163 . In this calculating circuit  163 , the syndrome S is calculated from the received word R, and the syndrome polynomial S(x) is obtained. On the other hand, the erasure flag F inputted to the input terminal  162  is supplied to the erasure position polynomial calculating circuit  164 . In this calculating circuit  164 , the erasure position polynomial E(x) is obtained from the erasure flag F. Besides, the erasure flag F inputted to the input terminal  162  is supplied to the erasure number calculating circuit  165 . In this calculating circuit  165 , the number ε of erasures is obtained from the erasure flag F. 
     The syndrome polynomial S(x) obtained in the calculating circuit  163  and the erasure position polynomial E(x) obtained in the calculating circuit  164  are supplied to the error polynomial calculating circuit  166 . In this calculating circuit  166 , the modified syndrome polynomial Sm(x) is obtained from the syndrome polynomial S(x) and the erasure position polynomial E(x), and further, the error evaluator polynomial ω(x) and the error locator polynomial σ(x) are obtained from this modified syndrome polynomial Sm(x). 
     The error evaluator polynomial ω(x) and the error locator polynomial σ(x) obtained in the calculating circuit  166  are supplied to the error value calculating circuit  167 . In this calculating circuit  167 , the error value ei of each element Ri of the received word R is sequentially obtained from the error evaluator polynomial ω(x) and the error locator polynomial σ(x). This error value ei is supplied to the subtracter  169 , and is subtracted from each element Ri of the received word R outputted from the received word delay circuit  168 . 
     The error locator polynomial σ(x) obtained in the calculating circuit  166  is supplied to the error position judging circuit  171 . In this error position judging circuit  171 , the error position i is detected from the error locator polynomial σ(x), and the selection signal SEL corresponding to the error position i is outputted. This selection signal SEL is supplied to the signal selecting circuit  170  as a control signal. In the signal selecting circuit  170 , the output Ri−ei of the subtracter  169  is taken out at the error position i, and the output Ri of the received word delay circuit  168  is taken out at a position which is not the error position i. 
     By this, the presumed code word Cp which has been subjected to error correction is taken out from the signal selecting circuit  170 , and this presumed code word Cp is extracted to the output terminal  172  as output data. By removing the parity symbol portion from the presumed code word Cp, the presumed information Ip=(Cp 0 , Cp 1 , . . . , Cp k−1 ) is obtained. 
     Incidentally, in the case where the error signal ER is outputted from the error judging circuit  173  or the error position judging circuit  171 , this error signal ER is extracted to the output terminal  175 , and this error signal ER is supplied to the signal selecting circuit  170 . In the signal selecting circuit  170 , irrespective of the state of the selection signal SEL, the output Ri of the received word delay circuit  168  is always taken out. By this, in the state where the error signal ER is extracted to the output terminal  175 , the received word R is not subjected to error correction but is outputted as it is to the output terminal  172 . 
     As described above, the normal Reed-Solomon code has been capable of being subjected to a mixed correction at one path. On the other hand, with respect to the one-extended Reed-Solomon code, although a method of mixed correction at two paths has been proposed (Richard E. Blahut, “THEORY AND PRACTICE OF ERROR CONTROL CODES”, ISBN: 0-201-10102-5, p. 260—“9.3 DECODING OF EXTENDED REED-SOLOMON CODES”), a method of mixed correction at one path has not been proposed. The mixed correction at two paths for the one-extended Reed-Solomon code has disadvantages that it takes a time to perform decoding, and the scale of hardware becomes large. 
     SUMMARY OF THE INVENTION 
     An object of the present invention is therefore to provide a decoding system for an error correction code, which enable a mixed correction at one path for a one-extended Reed-Solomon code. 
     A decoding method for an error correction code of the present invention comprises the steps of obtaining a syndrome polynomial from input data containing an extended symbol through calculation inclusive of the extended symbol; obtaining an erasure position polynomial from an erasure flag corresponding to the input data; obtaining the number of erasures from the erasure flag corresponding to the input data; obtaining an error locator polynomial and an error evaluator polynomial from the syndrome polynomial and the erasure position polynomial; obtaining an error position from the error locator polynomial and the error evaluator polynomial; obtaining an error value containing the extended symbolfrom the error locator polynomial and the error evaluator polynomial; obtaining output data by correcting an error of the input data by using the error position and the error value; and performing correctable judgement inclusive of correctable judgement of the extended symbol. 
     In the present invention, since means for performing a normal correction and an erasure correction of an extended symbol is integrated, a mixed correction at one path for, for example, the one-extended Reed-Solomon code becomes possible. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a view for explaining an error correction system. 
     FIG. 2 is a flowchart of conventional decoding of a Reed-Solomon code. 
     FIG. 3 is a flowchart of syndrome calculation of the Reed-Solomon code. 
     FIG. 4 is a flowchart of calculation (algorithm using the Euclidean mutual division method) of an error evaluator polynomial ω(x) and an error locator polynomial σ(x) of the Reed-Solomon code. 
     FIG. 5 is a flowchart of error position detection of the Reed-Solomon code. 
     FIG. 6 is a flowchart of error correction execution of the Reed-Solomon code. 
     FIG. 7 is a block diagram showing a structural example of a decoding apparatus of the Reed-Solomon code. 
     FIG. 8 is a flowchart of decoding of a one-extended Reed-Solomon code according to a first embodiment. 
     FIG. 9 is a flowchart of syndrome calculation of the one-extended Reed-Solomon code. 
     FIG. 10 is a flowchart of calculation (algorithm using the Euclidean mutual division method) of an error evaluator polynomial ω(x) and an error locator polynomial σ(x) of the one-extended Reed-Solomon code. 
     FIG. 11 is a flowchart of error position detection of the one-extended Reed-Solomon code. 
     FIG. 12 is a flowchart of error correction execution of the one-extended Reed-Solomon code. 
     FIG. 13 is a block diagram showing a structural example of a decoding apparatus of the one-extended Reed-Solomon code. 
     FIG. 14 is a flowchart of decoding of the one-extended Reed-Solomon code according to a second embodiment. 
     FIG. 15 is a flowchart of decoding of the one-extended Reed-Solomon code according to a third embodiment. 
     FIG. 16 is a flowchart of syndrome calculation of the one-extended Reed-Solomon code. 
     FIG. 17 is a flowchart of error correction execution of the one-extended Reed-Solomon code. 
     FIG. 18 is a flowchart of calculation (Berlekamp-Massey Algorithm) of an error evaluator polynomial ω(x) and an error locator polynomial σ(x) of the one-extended Reed-Solomon code. 
     FIG. 19 is a flowchart showing another example of a correctable judgement unit. 
     FIG. 20 is a flowchart of calculation (algorithm using the Euclidean mutual division method) of an error evaluator polynomial ω(x) and an error locator polynomial σ(x) of the one-extended Reed-Solomon code. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     A first embodiment will be described. This first embodiment is a decoding method of a mixed correction in which a normal correction and an erasure correction are performed at the same time for a one-extended Reed-Solomon code. 
     Here, with respect to a primitive polynomial f(x) on a field GF(2)={0, 1}, a root of f(x)=0 is made α, and an extension field of GF(2) is formed. At this time, when the degree of the primitive polynomial f(x) is made m, one symbol becomes m bits, and the extension field GF(2 m ) is expressed by the foregoing equation (1). A generating polynomial g(x) of the Reed-Solomon code used here is expressed by the foregoing equation (2). 
     FIG. 8 shows a flowchart of decoding of the one-extended Reed-Solomon code according to the first embodiment. 
     First, at step  200 , a received word R=(R − , R 0 , R 1 , . . . , R n−1 ) and an erasure flag F=(F − , F 0 , F 1 , . . . , F n−1 ) are given. The erasure flag F is a flag where 1 is set for a position in the received word R where it is predicted that an error exists, and 0 is set for other positions where it is predicted that an error does not exist. The difference from the foregoing conventional decoding method of the Reed-Solomon code is that the extended received symbol R −  and the extended erasure flag F −  have been added. Here, the extended received symbol R −  is obtained by adding all values other than the extended received symbol R − . That is, R − =R 0 +R 1 + . . . , +Rn−1. 
     Next, at step  201 , the number of erasures ε is obtained by equation (17), and an erasure position polynomial E(x) is obtained by the foregoing equation (4). The difference from the foregoing conventional decoding method of the Reed-Solomon code is that the extended erasure flag F −  is added in the calculation of the number ε of erasures. 
     [Numerical Expression 13] 
     
       
         ε=#{ i|Fi =1} [for  i =−, 0 to ( n −1)]  (17) 
       
     
     Next, at step  202 , using a parity check matrix H as expressed by equation 18, a syndrome S=(S 0 , S 1 , . . . , S p−1 ) is obtained from the foregoing equation (6). A calculation method of the syndrome S will be described later with reference to FIG.  9 . Then a syndrome polynomial S(x) as expressed by the foregoing equation (7) is obtained. 
     [Numerical Expression 14]             H   =     (           -   1         1       1       1       ⋯       1           0       1       α         α   2         ⋯         α     n   -   1                                                   ·                                                                       ·                                                                       ·                                   0       1         α     p   -   1             α     2        (     p   -   1     )             ⋯         α       (     n   -   1     )          (     p   -   1     )               )             (   18   )                         
     Next, at step  203 , using the erasure position polynomial E(x) and the syndrome polynomial S(x), a modified syndrome polynomial Sm(x) is obtained as expressed by the foregoing equation (8). 
     Next, at step  204 , an error evaluator polynomial ω(x) and an error locator polynomial σ(x) are obtained by using the modified syndrome polynomial Sm(x). A calculation method of the error evaluator polynomial ω(x) and the error locator polynomial σ(x) will be described later with reference to FIG.  10 . 
     Next, at step  205 , the condition of deg ω(x)&lt;deg σ(x) is judged, and if the condition is false, the procedure proceeds to step  206 , and if the condition is true, the procedure proceeds to step  208 . Here, deg ω(x) is the degree of the error evaluator polynomial ω(x) and deg σ(x) is the degree of the error locator polynomial σ(x). At step  206 , the condition of deg ω(x)=deg σ(x) is judged, and if false, the procedure proceeds to step  214 , outputs an error signal, and is ended, and if true, it proceeds to step  207 . 
     At step  207 , the condition of equation (19) is judged, and if false, the procedure proceeds to step  214 , outputs an error signal, and is ended, and if true, it proceeds to step  209 . At step  209 , since it has been found from judgement results of the steps  205  and  206  that an error exists at the extended symbol position, an extended error flag e − flag is set 1, and then, the procedure proceeds to step  211 . 
     [Numerical Expression 15] 
     
       
         
           
             
               
                 
                   
                     deg 
                      
                     
                         
                     
                      
                     
                       σ 
                        
                       
                         ( 
                         x 
                         ) 
                       
                     
                   
                   ≤ 
                   
                     ⌊ 
                     
                       
                         p 
                         + 
                         ɛ 
                         - 
                         2 
                       
                       2 
                     
                     ⌋ 
                   
                 
               
               
                 
                   ( 
                   19 
                   ) 
                 
               
             
           
         
         
         
             
         
       
     
     At step  208 , the condition of the foregoing equation (9) is judged, and if false, the procedure proceeds to step  214 , outputs an error signal, and is ended, and if true, it proceeds to step  210 . At step  210 , since it has been found from the judgement result of the step  205  that an error does not exist in the extended symbol position, the extended error flag e − flag is set 0, and then, the procedure proceeds to step  211 . 
     At step  211 , the error locator polynomial σ(x) is used to detect an error position. At this time, detection of an error position for R −  is not performed. A calculation method of an error position will be described later with reference to FIG.  11 . At step  212 , the condition of #roots=deg σ(x) is judged, and if false, the procedure proceeds to step  214 , outputs an error signal, and is ended, and if true, it proceeds to step  213 . Here, #roots is the number of error positions detected at step  211 . 
     At step  213 , an, error value ei at a position i is calculated from the error evaluator polynomial ω(x) and the error locator polynomial σ(x) obtained at step  204  and the error position i detected at step  211 , and further, an extended error value e −  is calculated by using this error value ei and the 0th element S 0  of the syndrome S obtained at step  202 , and still further, presumed information Ip=(Cp − , Cp 0 , Cp 1 , . . . , Cp k−1 ) is calculated from the received word R, the error position i, the error value ei, and the extended error value e − . A calculation method of the presumed information Ip will be described later with reference to FIG.  12 . 
     Next, at step  215 , the condition of e − flag=0 is judged, and if false, the procedure proceeds to step  216 , and if true, it proceeds to step  217 . At step  216 , the condition of e − ≠0 is judged, and if false, the procedure proceeds to step  214 , outputs an error signal, and is ended, and if true, the presumed information Ip is outputted and the procedure is ended. On the other hand, at step  217 , the condition of e − =0 is judged, and if false, the procedure proceeds to step  214 , outputs an error signal, and is ended, and if true, the presumed information Ip is outputted and the procedure is ended. 
     A method of calculating the syndrome S from the received word R will be described with reference to the flowchart of FIG.  9 . 
     First, at step  220 , the received word R=(R − , R 0 , R 1 , . . . , R n−1 ) is received. At step  221 , the respective elements (S 0 , S 1 , . . . , S p−1 ) of the syndrome S are initialized by the element R 0  of the received word R. 
     Next, at step  222 , the first element R −  of the received word R is subtracted from the 0th element S 0  of the syndrome S, and the subtraction result is made S 0 . At step  223 , the counter i is initialized to 1. At step  224 , the respective elements of the syndrome S are renewed by the foregoing equation (10). 
     Next, at step  225 , the value of the counter i is increased by 1. At step  226 , the condition of i&lt;n is judged, and if true, the procedure returns to step  224  and the syndrome calculation is repeated, and if false, it proceeds to step  227  and outputs the syndrome S=(S 0 , S 1 , . . . , S p−1 ). 
     A method (method by algorithm usingthe Euclidean mutual division method) of calculating the error evaluator polynomial ω(x) and the error locator polynomial σ(x) from the modified syndrome polynomial Sm(x) will be described with reference to the flowchart of FIG.  10 . 
     First, at step  230 , r −1 (x), r 0 (x), u −1 (x), u 0 (x), v −1 (x), and v 0 (x) are initialized as expressed by the foregoing equation (11). At step  231 , the counter i is initialized to 0. At step  232 , the value of the counter i is increased by 1. Then, at step  233 , division is performed to find q i−1 (x) satisfying the foregoing equation (12). Here, deg r i (x) is the degree of r i (x), and deg r i−1 (x) is the degree of r i−1 (x). 
     Next, at step  234 , using q i−1 (x) found at step  233 , ui(x) and vi(x) are renewed as expressed by the foregoing equation (13). 
     Next, at step  235 , the condition (end condition) of the foregoing equation (14) is judged, and if true, the procedure proceeds to step  236 , and if false, it returns to step  232 , and division is again performed at step  233 . At step  236 , as expressed by the foregoing equation (15), the error evaluator polynomial ω(x) and the error locator polynomial σ(x) are set. 
     A method of detecting the error position from the error locator polynomial σ(x) will be described with reference to the flowchart of FIG.  11 . 
     First, at step  240 , the counter i is initialized to 0. At step  241 , the condition of σ(α −i )=0 is judged, and if true, the position indicated by the counter i is an error position, and the procedure proceeds to step  242 , and if false, the position indicated by the counter i is not an error position, and the procedure proceeds to step  243 . At step  242 , the value of the counter i indicating the detected error position is stored to a memory A, and then, the procedure proceeds to step  243 . At step  243 , the value of the counter i is increased by 1. 
     Next, at step  244 , the condition (end condition) of i&lt;n is judged, and if true, the procedure returns to step  241  and the detection of error position is repeated, and if false, the procedure proceeds to step  245 . At step  245 , the stored contents of the memory A are outputted as the error position. 
     A method of performing error correction of the received word R from the error evaluator polynomial ω(x), the error locator polynomial σ(x), and the detected error position i will be described with reference to the flowchart of FIG.  12 . 
     First, at step  250 , a variable w is initialized by the 0th element S 0  of the syndrome S. The variable w is used to calculate the extended error value e −  as expressed by equation (20). 
     [Numerical Expression 16]             e_   =       S   0     -       ∑     i   =   0       n   -   1                     ei               (   20   )                         
     Next, at step  251 , the counter i is initialized to 0. At step  252 , the condition of iεA is judged, and if true, the value of the counter i expresses an error position, and the procedure proceeds to step  253 , and if false, the value of the counter i is not an error position, and the procedure proceeds to step  256 . 
     At step  253 , using the error evaluator polynomial ω(x), the differential of the error locator polynomial σ(x), σ′(x) and the error position i, the error value ei is calculated as expressed by the foregoing equation (16), and the procedure proceeds to step  254 . At step  254 , the i-th element Cpi of the presumed code word Cp is made ‘Ri−ei’ to make calculation, and the procedure proceeds to step  255 . At step  255 , the variable w.is renewed as ‘w=w−ei’, and the procedure proceeds to step  257 . At step  256 , the i-th element Cpi of the presumed code word Cp is made Ri and the procedure proceeds to step  257 . 
     At step  257 , the value of the counter i is increased by 1. At step  258 , the condition (end condition) of i&lt;n is judged, and if true, the procedure returns to step  252  and the calculation of error value is repeated, and if false, the procedure proceeds to step  259 . At step  259 , the value of the variable w is substituted for the extended error value e − . 
     Next, at step  260 , a presumed extended code symbol Cp −  is set as Cp − =R − −e − . At step  261 , the presumed code word Cp=(Cp − , Cp 0 , . . . Cp n−1 ) is obtained, and further, at step  262 , the presumed information Ip=(Cp − , Cp 0 , Cp 1 , . . . , Cp k−1 ) is obtained from the presumed code word Cp. 
     FIG. 13 shows a structure of a decoding apparatus  270  which executes the decoding method of the one-extended Reed-Solomon code shown in the flowchart of FIG.  8 . 
     This decoding apparatus  270  includesan input terminal  271  to which the received word (input data) R is inputted, and an input terminal  272  to which the erasure flag F corresponding to the received word R is inputted. 
     Besides, the decoding apparatus  270  includes a syndrome polynomial calculating, circuit  273  (see the step  202  of FIG. 8) for obtaining the syndrome polynomial S(x) from the received word R, an erasure position polynomial calculating circuit  274  (see the step  201  of FIG. 8) for obtaining the erasure position polynomial E(x) from the erasure flag F, and an erasure number calculating circuit  275  (see the step  201  of FIG. 8) for obtaining the number ε of erasures from the erasure flag F. 
     Besides, the decoding apparatus  270  includes an error polynomial calculating circuit  276  (see the step  204  of FIG. 8) which obtains the modified syndrome polynomial Sm(x) from the syndrome polynomial S(x) and the erasure position polynomial E(x), and obtains the error evaluator polynomial ω(x) and the error locator polynomial σ(x) from this modified syndrome polynomial Sm(x). 
     Besides, the decoding apparatus  270  includes an error value calculating circuit  277  (see the step  253  of FIG. 12) for obtaining an error value ei of each element Ri of the received word R from the error evaluator polynomial ω(x) and the error locator polynomial σ(x), a received word delay circuit  278  for matching the timing of each element Ri of the received word R with the timing of the error value ei outputted from the error value calculating circuit  277 , and a subtracter  279  (see the step  254  of FIG. 12) for subtracting the error value ei from each element Ri of the received word R. 
     Besides, the decoding apparatus  270  includes a signal selecting circuit  280  for selectively taking out either one of the output Ri−ei of the subtracter  279  and the output Ri of the received word delay circuit  278 , and an error position judging circuit  281  which detects an error position i from the error locator polynomial σ(x), and outputs a selection signal SEL corresponding to the error position i, and further, judges the condition of #roots=deg σ(x) (see the step  212  of FIG.  8 ), and outputs an error signal ER if the condition is false. Here, the selection signal SEL outputted from the error position judging circuit  281  is supplied to the signal selecting circuit  280 . At the signal selecting circuit  280 , the output Ri−ei of the subtracter  279  is taken out at the error position i, and the output Ri of the received word delay circuit  278  is taken out at a position which is not the error position i. 
     Besides, the decoding apparatus  270  includes an extended error value calculating circuit  282  (see the step  259  of FIG. 12) for obtaining an extended error value e− from the error evaluator polynomial ω(x) and the error locator polynomial σ(x), a subtracter  283  (see the step  260  of FIG. 12) for subtracting the extended error value e −  from the output of the signal selecting circuit  280 , and a signal selecting circuit  284  for selectively taking out either one of the output of the subtracter  283  and the output of the signal selecting circuit  280 . 
     Besides, the decoding apparatus  270  includes an extended error flag calculating circuit  285  (see the steps  209  and  210  of FIG. 8) which judges from the error evaluator polynomial ω(x) and the error locator polynomial σ(x) whether or not an error exists at an extended symbol position, and sets an extended error flag e − flag, and an output terminal  286  for extracting the output of the signal selecting circuit  284 . Here, when judgement is made such that there is an error at the extended symbol position, e − flag=1, and when judgement is made such that there is no error at the extended symbol position, e − flag=0. The extended error flag e − flag outputtedfrom this calculating circuit  285  is supplied to the signal selecting circuit  284 . 
     At the signal selecting circuit  284 , when the extended received symbol R −  is outputted from the signal selecting circuit  280 , the output R − −e −  of the subtracter  283  is taken out as the presumed extended symbol Cp −  when e − flag=1, and the output R −  of the signal selecting circuit  280  is taken out as the presumed extended symbol Cp −  when e − flag=0. Besides, at the signal selecting circuit  284 , when a symbol other than the extended received symbol R −  is outputted from the signal selecting circuit  280 , only the output of the signal selecting circuit  280  is taken out. 
     Besides, the decoding apparatus  270  includes an error judging circuit  287  which judges the condition of deg ω(x)=deg σ(x) and the condition of the equation (19) if deg ω(x)&lt;deg σ(x) is false, judges the condition of the equation (9) if deg ω(x)&lt;deg σ(x) is true (see the steps  205  to  208  of FIG.  8 ), and outputs the error signal ER if false, and an extended error judging circuit  288  which judges the condition of e − ≠0 when e − flag =0 is false, judges the condition of e − =0 if e − flag=0 is true (see the steps  215  to  217  of FIG.  8 ), and outputs the error signal ER if false. 
     Besides, the decoding apparatus  270  includes an OR gate  289  to which the error signal ER outputted from the error position judging circuit  281 , the error signal ER outputted from the error judging circuit  287 , and the error signal ER outputted from the extended error judging circuit  288  are inputted, and an output terminal  290  for extracting the output of the OR gate  289 . 
     The output of the OR gate  289  is supplied to the signal selecting circuits  280  and  284 , and in the case where the error signal ER is obtained as the output of the OR gate  289 , the output Ri of the received word delay circuit  278  is always taken out in the signal selecting circuit  280  irrespective of the state of the selection signal SEL, and the output of the signal selecting circuit  280  is always taken out in the signal selecting circuit  284  irrespective of the state of the extended error flag e − flag. 
     The operation of the decoding apparatus  270  shown in FIG. 13 will be described. 
     The received word (input data) R inputted to the input terminal  271  is supplied to the syndrome polynomial calculating circuit  273 . In this calculating circuit  273 , the syndrome S is calculated from the received word R, and the syndrome polynomial S(x) is obtained. On the other hand, the erasure flag F inputted to the input terminal  272  is supplied to the erasure position polynomial calculating circuit  274 . In this calculating circuit  274 , the erasure position polynomial E(x) is obtained from the erasure flag F. The erasure flag F inputted to the input terminal  272  is supplied to the erasure number calculating circuit  275 . In this calculating circuit  275 , the number ε of erasures is obtained from the erasure flag F. 
     The syndrome polynomial S(x) obtained in the calculating circuit  273  and the erasure position polynomial E(x) obtained in the calculating circuit  274  are supplied to the error polynomial calculating circuit  276 . In this calculating circuit  276 , the modified syndrome polynomial Sm(x) is obtained from the syndrome polynomial S(x) and the erasure position polynomial E(x), and further, the error evaluator polynomial ω(x) and the error locator polynomial σ(x) are obtained from this modified syndrome polynomial Sm(x). 
     The error evaluator polynomial ω(x) and the error locator polynomial σ(x) obtained in the calculating circuit  276  are supplied to the error value calculating circuit  277 . In this calculating circuit  277 , the error value ei of each element Ri of the received word R is sequentially obtained from the error evaluator polynomial ω(x) and the error locator polynomial σ(x). This error value ei is supplied to the subtracter  279 , and is subtracted from each element Ri of the received word R outputted from the received word delay circuit  278 . 
     The error locator polynomial σ(x) obtained in the calculating circuit  276  is supplied to the error position judging circuit  281 . In this error position judging circuit  281 , the error position i is detected from the error locator polynomial σ(x), and the selection signal. SEL corresponding to the error position i is outputted. This selection signal SEL is supplied to the signal selecting circuit  280  as a control signal. In the signal selecting circuit  280 , the output Ri−ei of the subtracter  279  is taken out as the element Cpi of the presumed code word Cp at the error position i, and the output Ri of the received word delay circuit  278  is taken out as the element Cpi of the presumed code word Cp at a position which is not the error position i. 
     The error evaluator polynomial ω(x) and the error locator polynomial σ(x) obtained in the calculating circuit  276  are supplied to the extended error value calculating circuit  282 . In this calculating circuit  282 , the error value of the extended received symbol R − , that is, the extended error value e −  is obtained from the error evaluator polynomial ω(x) and the error locator polynomial σ(x). This extended error value e− is supplied to the subtracter  283 , and is subtracted from the output of the signal selecting circuit  280 . 
     The error evaluator polynomial ω(x) and the error locator polynomial σ(x) obtained in the calculating circuit  276  are supplied to the extended error flag calculating circuit  285 . In this calculating circuit  285 , it is judged from the error evaluator polynomial ω(x) and the error locator polynomial σ(x) whether or not, an error exists at the extended symbol position, and when it is judged that there is an error at the extended symbol position, e − flag=1 is set, and when it is judged that there is no error at the extended symbol position, e − flag=0 is set. 
     This extended error flag e − flag is supplied as a control signal to the signal selecting circuit  284 . In the signal selecting circuit  284 , when the extended received symbol R −  is outputted from the signal selecting circuit  280 , the output R − −e −  of the subtracter  283  is taken out as the presumed extended symbol Cp when e − flag=1, and the output R −  of the signal selecting circuit  280  is taken out as the presumed extended symbol Cp −  when e − flag=0. In the signal selecting circuit  284 , when a symbol other than the extended received symbol R −  is outputted from the signal selecting circuit  280 , only the output of the signal selecting circuit  280  is taken out. 
     By this, the presumed code word Cp (including the presumed extended symbol Cp − ) subjected to error correction is taken out from the signal selecting circuit  284 , and this presumed code word Cp is extracted to the output terminal  286  as output data. By removing the parity symbol portion from the presumed code word Cp, presumed information Ip=(Cp − , Cp 0 , Cp 1 , . . . , Cp k−1 ) is 
     In the case where the error signal ER is outputted from the error position judging circuit  281 , the error judging circuit  287 , or the extended error judging circuit  288 , this error signal ER is extracted to the output terminal  290 , and this error signal ER is supplied to the signal selecting circuits  280  and  284 . In the signal selecting circuit  280 , the output Ri of the received word delay circuit  278  is always taken out irrespective of the state of the selection signal SEL. In the signal selecting circuit  284 , the output of the signal selecting circuit  280  is always taken out irrespective of the state of the extended error flag e − flag. By this, in the state where the error signal ER is extracted to the output terminal  290 , the received word R is not subjected to error correction, but is outputted to the output terminal  286  as it is. 
     As described above, in the first embodiment, the mixed correction at one path for the one-extended Reed-Solomon code becomes possible. Thus, this embodiment has such effects that it becomes possible to perform the mixed correction for the one-extended Reed-Solomon code in a short time, and the scale of hardware can be made small. 
     Next, a second embodiment will be described. This second embodiment also relates to a decoding method of a mixed correction in which a normal correction and an erasure correction are performed at the same time for the one-extended Reed-Solomon code. FIG. 14 shows a flowchart of decoding of the one-extended Reed-Solomon code in the second embodiment. 
     First, processing at steps  300  to  304  is performed. At the steps  300  to  304 , similar processing to the steps  200  to  204 .of FIG. 8 is performed. 
     Next, at step  305 , a correctable judgement number h is set as h=2 deg σ(x)−ε. Although the correctable judgement number h is used at step  311  described later, it finally becomes one as expressed by equation (21). 
     [Numerical Expression 17]             h   =     {             2                 deg                   σ        (   x   )         -   ɛ           (       if                 deg                   ω        (   x   )         &lt;     deg                   σ        (   x   )           )                 2                 deg                   σ        (   x   )         -   ɛ   +   2           (       if                 deg                   ω        (   x   )         =     deg                   σ        (   x   )           )                     (   21   )                         
     Next, at step  306 , the condition of deg ω(x)&lt;deg σ(x) is judged, and if false, the procedure proceeds to step  307 , and if true, it proceeds to step  310 . At step  307 , the condition of deg ω(x)=deg σ(x) is judged, and if false, the procedure proceeds to step  315 , outputs an error signal, and is ended, and if true, it proceeds to step  308 . At step  308 , the correctable judgement number h is renewed as h=h+2, and the procedure proceeds to step  309 . 
     At step  309 , since it has been found from the judgement result at steps  306  and  307  that an error exists at an extended symbol position, an extended error flag e-flag is set 1, and then, the procedure proceeds to step  311 . At step  310 , since it has been found from the judgement result at step  306  that there is no error at the extended symbol position, the extended error flag e − flag is set 0, and then, the procedure proceeds to step  311 . 
     Next, at step  311 , the condition of h≦p is judged, and if false, the procedure proceeds to step  315 , outputs an error signal, and is ended, and if true, it proceeds to step  312 . Then, processing at steps  312  to  318  is performed. At the steps  312  to  318 , similar processing to the steps  211  to  217  of FIG. 8 is performed. 
     That is, at step  312 , the error locator polynomial σ(x) is used to detect an error position. Then, at step  313 , the condition of #roots=deg σ(x) is judged, and if false, the procedure proceeds to step  315 , outputs an error signal, and is ended, and if true, it proceeds to step  314 . 
     At step  314 , from the error evaluator polynomial ω(x) and the error locator polynomial σ(x) obtained at step  304  and the error position i detected at step  312 , an error value ei at the position i is calculated, and by using this error value ei and the 0th element S 0  of the syndrome S obtained at step  302 , an extended error value e −  is calculated, and further, presumed information Ip=(Cp − , Cp 0 , Cp 1 , . . . , Cp k−1 ) is obtained from the received word R, the error position i, the error value ei, and the extended error value e − . 
     Next, at step  316 , the condition of e − flag=0 is judged, and if false, the procedure proceeds to step  317 , and if true, it proceeds to step  318 . At step  317 , the condition of e − ≠0 is judged, and if false, the procedure proceeds to step  315 , outputs an error signal, and is ended, and if true, the presumed information Ip is outputted and the procedure is ended. On the other hand, at step  318 , the condition of e − =0 is judged, and if false, the procedure proceeds to step  315 , outputs an error signal, and is ended, and if true, the presumed information Ip is outputted and the procedure is ended. 
     A decoding apparatus for performing the decoding method for the one-extended Reed-Solomon code shown in the flowchart of FIG. 14 is structured similarly to the decoding apparatus  270  shown in FIG. 13 except the operation of the error judging circuit  287 . That is, in the decoding apparatus  270  shown in FIG. 13, although the error judging circuit  287  outputs the error signal ER by the judgement processing at steps  205  to  208 , in the decoding apparatus for performing the decoding method for the one-extended Reed-Solomon code shown in the flowchart of FIG. 14, the error judging circuit  287  is structured to output the error signal ER by the judgement processing at steps  306 ,  307  and  311 . 
     As described above, also in the second embodiment, similarly to the first embodiment, the mixed correction at one path for the one-extended Reed-Solomon code becomes possible. 
     Next, a third embodiment will be described. This third embodiment also relates to a decoding method of a mixed correction which performs a normal correction and an erasure correction at the same time for the one-extended Reed-Solomon code. 
     FIG. 15 shows a flowchart of decoding of the one-extended Reed-Solomon code in the third embodiment. 
     First, at step  400 , a received word R=(R + , R 0 , R 1 , . . . , R n−1 ) and an erasure flag F=(F + , F 0 , F 1 , . . . , F n−1 ) are given. The erasure flag F is a flag in which 1 is set for a position in the received word R where it is predicted that there is an error, and 0 is set for other positions where it is predicted that there is no error. The difference from the foregoing conventional decoding method of the Reed-Solomon code is that the extended received symbol R +  and the extended erasure flag F +  are added. Here, the extended received symbol R +  is obtained by multiplying values of symbols other than the extended received symbol by coefficients determined in relation to the symbol position and by adding the respective multiplication results. That is, R + =R 0 +R 1 α p−1 +R 2 α 2(p−1) + . . . +R n−1 α (n−1){p−1} . 
     Next, at step  401 , the number ε of erasures is obtained through equation (22), and an erasure position polynomial E(x) to R + , R 0 , R 1 , . . . , R n−1  is obtained through equation (23). The difference from the foregoing conventional decoding method of the Reed-Solomon code is that the extended erasure flag F +  is added in the calculation of the number ε of erasures, and x corresponding to F +  is added to the erasure position polynomial E(x). 
     [Numerical Expression 18] 
     
       
         ε=#{ i|F   i =1} [for  i =+0˜( n −1)]  (22) 
       
     
     
       
         
           
             
               
                 
                   
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     Next, at step  402 , using a parity check matrix H as expressed in equation (24), a syndrome S=(S 0 , S 1 , . . . , S p−1 ) is obtained from the foregoing equation (6). A calculation method of the syndrome S will be described later with reference to FIG.  16 . Then a syndrome polynomial S(x) as expressed by the foregoing equation (7) is obtained. 
     [Numerical Expression 19]             (         0       1       1       1       ⋯       1           0       1       α         α   2         ⋯         α     n   -   1                                                   ·                                                                       ·                                                                       ·                                     -   1         1         α     p   -   1             α     2        (     p   -   1     )             ⋯         α       (     n   -   1     )          (     p   -   1     )               )           (   24   )                         
     Next, at step  403 , using the erasure position polynomial E(x) and the syndrome polynomial S(x), a modified syndrome polynomial Sm(x) is obtained as expressed by the foregoing equation (8). 
     Next, at step  404 , an error evaluator polynomial ω(x) and an error locator polynomial σ(x) are obtained by using the modified syndrome polynomial Sm(x). A calculation method of the error evaluator polynomial ω(x) and the error locator polynomial σ(x) is the same as the calculation method (see FIG. 10) at step  204  of the flowchart of FIG.  8 . 
     Next, at step  405 , the condition of deg ω(x)&lt;deg σ(x) is judged, and if false, the procedure proceeds to step  416  and outputs an error signal, and if true, it proceeds to step  406 . Here, deg ω(x) is the degree of the error evaluator polynomial ω(x), and deg σ(x) is the degree of the error locator polynomial σ(x). At step  406 , the condition of F + =0 is judged, and if false, an erasure exists at the extended symbol position, and the procedure proceeds to step  407 , and if true, an erasure does not exist at the extended symbol position, and the procedure proceeds to step  409 . 
     At step  407 , the condition of x|σ(x) is judged. This is judgement whether σ(x) can be divided by x, and the case where it can be divided (the extended symbol position is contained in the error position) becomes true, and the case where it can not be divided becomes false. If the judgement result is false, the procedure proceeds to step  416 , outputs an error signal, and is ended, and if true, it proceeds to step  408 . At step  409 , the condition of x|σ(x) is judged, and if true, the procedure proceeds to step  408 , and if false, it proceeds to step  411 . At step  411 , it has been found from the judgement results at step  405 ,  406  and  409  that there is no error at the extended symbol position, so that the extended error flag e + flag is set 0, and then, the procedure proceeds to step  412 . 
     At step  408 , if correctable, x|ω(x) must always be realized when x|σ(x), so that the condition of x|ω(x) is judged, and if false, the procedure proceeds to step  416 , outputs an error signal, and is ended, and if true, it proceeds to step  410 . At step  410 , since it has been found from the judgement results at steps  405 ,  406 ,  407  and  409  that there is an error at the extended symbol position, the extended error flag e + flag is set 1, and then, the procedure proceeds to step  412 . At step  412 , the condition of the foregoing equation (9) is judged, and if false, the procedure proceeds to step  416 , outputs an error signal, and is ended, and if true, it proceeds to step  413 . 
     At step  413 , the error position is detected by using the error locator polynomial σ(x). A calculation method of the error position is the same as the calculation method (see, FIG. 11) at step  211  of the flowchart of FIG.  8 . At this time, detection of the error position to R +  is not performed. At step  414 , the condition of #roots=deg σ(x)−e + flag is judged, and if false, the procedure proceeds to step  416 , outputs an error signal, and is ended, and if true, it proceeds to step  415 . Here, #roots is the number of error positions detected at step  413 . The reason why the extended error flag e + flag is subtracted from the degree of the error locator polynomial deg σ(x) is that σ(x) includes the error position corresponding to the extended symbol. 
     At step  415 , from the error evaluator polynomial ω(x) and the error locator polynomial σ(x) obtained at step  404  and the error position i detected at step  413 , an error value ei at the position i is calculated. Further, an extended error value e +  is calculated by using this error value ei and the (p−1)th element S p−1  of the syndrome S obtained at step  402 . And further, presumed information Ip=(Cp + , Cp 0 , Cp 1 , . . . , Cp k−1 ) is obtained from the received word R, the error position i, the error value ei, and the extended error value e + . A calculation method of the presumed information Ip will be described later with reference to FIG.  17 . 
     Next, at step  417 , the condition of e + flag=0 is judged, and if true, it proceeds to step  419 . On the other hand, at step  419 , the condition of e + =0 is judged, and if false, the procedure proceeds to step  416 , outputs an error signal, and is ended, and if true, the presumed information Ip is outputted and the procedure isended. 
     A method of calculating the syndrome S from the received word R will be described with reference to the flowchart of FIG.  16 . 
     First, at step  420 , the received word R=(R + , R 0 , R 1 , . . . , R n−1 ) is received. At step  421 , the respective elements (S 0 , S 1 , . . . , S p−1 ) of the syndrome S are initialized by the element R 0  of the received word R. 
     Next, at step  422 , the first element R +  of the received word R is subtracted from the (p−1)th element S p−1  of the syndrome S, and the subtraction result is made S p−1 . At step  423 , the counter i is initialized to 1. At step  424 , each element of the syndrome S is renewed by the foregoing equation (10). 
     Next, at step  425 , the value of the counter i is increased by 1. At step  426 , the condition of i&lt;n is judged, and if true, the procedure returns to step  424  and calculation of the syndrome is repeated, and if false, it proceeds to step  427 , and the syndrome S=(S 0 , S 1 , . . . , S p−1 ) is outputted. 
     A method of correcting an error of the received word R from the error evaluator polynomial ω(x), the error locator polynomial σ(x), and the detected error position i will be described with reference to the flowchart of FIG.  17 . 
     First, at step  430 , a variable w is initialized by the (p−1)th element S p−1  of the syndrome S. The variable w is used to calculate the extended error value e +  as expressed by equation (25). 
     [Numerical Expression 20]               e   +     =       S     p   -   1       -       ∑     i   =   0       n   -   1                         e   i          α       (     p   -   1     )        i                     (   25   )                         
     Next, at step  431 , the counter i is initialized to 0. At step  432 , the condition of iεA is judged, and if true, the value of the counter i indicates an error position, and the procedure proceeds to step  433 , and if false, the value of the counter i is not an error position, and the procedure proceeds to step  436 . 
     At step  433 , by using the error evaluator polynomial ω(x), the differential σ′(x) of the error locator polynomial σ(x), and the error position i, the error value ei is calculated as expressed by the foregoing equation (16), and the procedure proceeds to step  434 . At step  434 , the i-th element Cpi of the presumed code word Cp is calculated as Ri−ei, and the procedure proceeds to step  435 . At step  436 , the variable w is renewed as expressed by equation (26), and the procedure proceeds to step  437 . At step  436 , the i-th element Cpi of the presumed code word Cp is made Ri, and the procedure proceeds to step  437 . 
     [Numerical Expression 21] 
     
       
           w=w−e   i α (p−1)i   (26) 
       
     
     At step  437 , the value of the counter i is increased by 1. At step  438 , the condition of i&lt;n (end condition) is judged, and if true, the procedure returns to step  432  and the calculation of the error value is repeated, and if false, the procedure proceeds to step  439 . At step  439 , the value of w is substituted for the extended error value e + . 
     Next, at step  440 , a presumed extended code symbol Cp +  is set as Cp + =R + −e + . At step  441 , the presumed code word Cp=(Cp + , Cp 0 , . . . , Cp n−1 ) is obtained, and further, at step  442 , the presumed information Ip=(Cp + , Cp 0 , Cp 1 , . . . , Cp k−1 ) is obtained. 
     A decoding apparatus for performing the decoding method of the one-extended Reed-Solomon code shown in the flowchart of FIG. 15 is structured similarly to the decoding apparatus  270  shown in FIG. 13 except that the operations of the erasure position polynomial calculating circuit  274 , (error position judging circuit  281 ), and the error judging circuit  287  are different. 
     That is, in the decoding apparatus  270  shown in FIG. 13, although the erasure position polynomial E(x) obtained in the erasure position polynomial calculating circuit  274  is not changed by the value of 1 or 0 of the extended erasure flag F (see equation (4)), in the decoding apparatus for performing the decoding method of the one-extended Reed-Solomon code shown in the flowchart of FIG. 15, the erasure position polynomial E(x) obtained by the erasure position polynomial calculating circuit  274  is changed by the value of 1 or 0 of the extended erasure flag F +  (see equation (23)). 
     Besides, in the decoding apparatus  270  shown in FIG. 13, although the error position judging circuit  281  judges the condition of #roots=deg σ(x) and outputs the error signal ER, in the decoding apparatus for performing the decoding method of the one-extended Reed-Solomon code shown in the flowchart of FIG. 15, the error position judging circuit  281  judges the condition of #roots=deg σ(x)−e + flag and outputs the error signal ER. 
     Besides, in the decoding apparatus  270  shown in FIG. 13, although the error judging circuit  287  outputs the error signal ER through judgement processing at steps  205  to  208 , in the decoding apparatus for performing the decoding method of the one-extended Reed-Solomon code shown in the flowchart of FIG. 15, the error judging circuit  287  is structured such that the error signal ER is outputted through judgement processing at steps  405  to  409  and  412 . 
     As described above, also in the third embodiment, similarly to the first embodiment, the mixed correction for the one-extended Reed-Solomon code at one path becomes possible. Incidentally, in the above embodiment, as a method of calculating the error evaluator polynomial ω(x) and the error locator polynomial σ(x) from the modified syndrome polynomial Sm(x), although a method (see FIG. 10) by the algorithm using the Euclidean mutual division method is used, other algorithms, for example, a method by Berlekamp-Massey Algorithm may be used. 
     A method (method by the Berlekamp-Massey Algorithm) of calculating an error evaluator polynomial ω(x) and an error locator polynomial σ(x) from a modified syndrome polynomial Sm(x) will be described with reference to the flowchart of FIG.  18 . 
     First, at step  500 , k, σ (0) (x), L, and T(x) are initialized as k=0, σ (0) (x)=1, L=0, and T(x)=x. At step  501 , a counter k is increased by 1, and an error value Δ (k)  is renewed as expressed by equation (27). 
     [Numerical Expression 22]               Δ     (   k   )       =       Sm     k   -   1       -       ∑     i   =   1     L                       σ   i     (     k   -   1     )            Sm     k   -   1   -   j                     (   27   )                         
     Next, at step  502 , the condition of Δ (k) =0 is judged, and if true, the procedure proceeds to step  507 , and if false, it proceeds to step  503 . At step  503 , σ (k) (x) is renewed as expressed by equation (28). 
     [Numerical Expression 23] 
     
       
         σ (k) ( x )=σ (k−1) ( x )−Δ (k)   T ( x )  (28) 
       
     
     Next, at step  504 , the condition of 2L≦k is judged, and if true, the procedure proceeds to step  507 , and if false, it proceeds to step  505 . At step  505 , L is renewed as L=k−L. 
     Next, at step  506 , T(x) is renewed as expressed by equation (29), and then, the procedure proceeds to step  507 . At step  507 , T(x) is shifted as T(x)=xT(x). 
     [Numerical Expression 24]               T        (   x   )       =         σ     (     k   -   1     )            (   x   )         Δ     (   k   )                 (   29   )                         
     Next, at step  508 , the condition (end condition) of k&lt;p is judged, and if true, the procedure returns to step  501  and the calculation is repeated, and if false, it proceeds to step  509 . At step  509 , the error locator polynomial σ(x) is set as σ(x)=σ (p) (x). At step  510 , the error evaluator polynomial ω(x) is obtained as expressed by equation (30). 
     [Numerical Expression 25] 
     
       
         ω( x )= Sm ( x )σ( x ) mod  x   p   (30) 
       
     
     Besides, instead of a correctable judgement unit U 1  (steps  406  to  412 ) in the flowchart of FIG. 15 in the foregoing third embodiment, a correctable judgement unit U 2  shown in FIG. 19 may be used. Similarly to the unit U 1 , the unit U 2  also judges from σ(x), ω(x), F + , p, and ε whether correction can be made. 
     First, at step  600 , the condition of x|σ(x) is judged, and if false, the procedure proceeds step  601 , and if true, it proceeds to step  602 . At step  601 , the condition of F + =0 is judged, and if false, the procedure proceeds to step  416  and outputs an error signal, and if true, it proceeds to step  603 . On the other hand, at step  602 , the condition of x|ω(x) is judged, and if false, the procedure proceeds to step  416  and outputs an error signal, and if true, it proceeds to step  604 . 
     At step  603 ,since it has been found from the judgement results at steps  600  and  601  that there is no error at the extended symbol position, the extended error flag e + flag is set 0, and then, the procedure proceeds to step  605 . At step  604 , since it has been found from the judgement results at steps  600  and  602  that there is an error at the extended symbol position, e + flag is set 1, and then, the procedure proceeds to step  605 . 
     At step  605 , the condition of the foregoing equation (9) is judged, and if false, the procedure proceeds to step  416  and outputs an error signal, and if true, it proceeds to  413 . 
     In the foregoing embodiment, as a method of calculating the error evaluator polynomial ω(x) and the error locator polynomial σ(x), instead of the method shown in the flowchart of FIG. 10, a method shown in the flowchart of FIG. 20 may be used. Similarly to the method shown in the flowchart of FIG.  10 , although the method shown in the flowchart of FIG. 20 is a method by algorithm using the Euclidean mutual division method, set initial values are different. 
     That is, at step  700 , r −1 (x), r 0 (x), u −1 (x), u 0 (x), v −1 (x), and v 0 (x) are initialized as expressed byequation (31). Although the modified syndrome polynomial Sm(x) is set for r 0 (x) and constant 1 is set for v 0 (x) respectively at step  230  of FIG. 10, the modified syndrome polynomial Sm(x) is set for r 0 (x) and the erasure position polynomial E(x) is set for v 0 (x) respectively at step  700 . 
     [Numerical Expression 26]             {                 r     -   1            (   x   )       =     x   p                     r   0          (   x   )       =     Sm        (   x   )                    {                 u     -   1            (   x   )       =   1                   u   0          (   x   )       =   0                {               v     -   1            (   x   )       =   0                   v   0          (   x   )       =     E        (   x   )                               (   31   )                         
     Subsequent to step  700 , processing at steps  701  to  706  is performed. At steps  701  to  706 , although detailed description will be omitted, processing similar to the steps  231  to  236  of FIG. 10 is performed, and the error evaluator polynomial ω(x) and the error locator polynomial σ(x) are calculated. 
     According to the method shown in the flowchart of FIG. 20, since the syndrome polynomial S(x) and the erasure position polynomial E(x) are used as initial values, it becomes unnecessary to obtain the modified syndrome polynomial Sm(x) (see the step  203  of FIG. 8, the step  303  of FIG. 14, and the step  403  of FIG.  15 ). 
     Besides, at the step  211  of FIG. 8, the step  312  of FIG. 14, and the step  413  of FIG. 15, as shown in the flowchart of FIG. 12, although the error position is detected in the ascending order, this may be performed in the descending order. Further, the detection may be performed in arbitrary order. 
     Besides, in the foregoing embodiments, although this invention is applied to decoding of the one-extended Reed-Solomon code, it is needless to say that this invention can also be applied to decoding of an extended BCH code (Bose-Chaudhuri-Hoequenghem code) or the like. 
     According to the present invention, means for performing a normal correction and an erasure correction of an extended symbol is integrated, and a mixed correction of, for example, the one-extended Reed-Solomon code at one path becomes possible. Accordingly, the invention has such effects that it becomes possible to perform the mixed correction of the one-extended Reed-Solomon code in a short time, and the scale of hardware can be made small.