Patent Publication Number: US-2022230952-A1

Title: Semiconductor apparatus and method having a lead frame with floating leads

Description:
This application is a Divisional of application Ser. No. 16/440,184 filed Jun. 13, 2019. 
    
    
     BACKGROUND 
     This application relates generally to connections between integrated circuits and circuit boards, and more particularly to lead frames in a packaged semiconductor device. 
       FIG. 1A  shows a prior art example of a lead frame  100 .  FIG. 1B  shows a prior art example of a quad-flat no-leads (QFN) package  102 .  FIG. 1C  shows a prior art example of a flip chip  104 . The lead frame  100  includes a die attach pad  106  on which a control integrated circuit  107  (control IC  107 ) is mounted, typically using an adhesive. The control IC  107  controls input and output functions of the fully assembled package  102 . The lead frame  100  also includes multiple conductive leads  108 ,  110  (non-floating leads  108  and floating leads  110 ). The flip chip  104  is electrically coupled to the lead frame  100  of  FIG. 1A , and the assembled flip chip  104  and lead frame are encapsulated using encapsulation material to produce the QFN package  102  of  FIG. 1B . The QFN package  102  of  FIG. 1B  shows a bottom side of the attach pad  109  of the lead frame  100 . 
       FIG. 1D  shows a prior art example of multiple pre-singulation QFN lead frames  100  physically connected together in an array  124 . Connection points  112  and a bottom surface of the flip chip  118  are visible in  FIG. 1D . After the lead frames  100  are encapsulated, the array  124  of lead frames  100  is singulated (separated using, for example, saw singulation or shear singulation) into separate, individual lead frames  100 . The individual lead frames  100  can be electrically connected to circuits on a printed circuit board (PCB, not shown) surface, as further described below. 
     Conductive leads  108 ,  110  can be floating leads  110  or non-floating leads  108 . Non-floating leads  108  are conductive leads  108 ,  110  that are electrically and mechanically connected by continuous conductive lead frame  100  structure to a connection point  112 . Floating leads  110  are conductive leads  108 ,  110  that are not electrically and mechanically connected by continuous conductive lead frame structure to a connection point  112 . Wire bonds or other electrically connective structures are added to the lead frame  100  to electrically connect floating leads  110  to respective connection points  112 , prior to the flip chip  104  being attached to the lead frame  100  and the resulting fully assembled lead frame system being packaged (for example, to form a QFN package  102 ). 
     Some of the conductive leads  108 ,  110  are electrically connected to the control IC  107  by wire bonds  111 . Connection points  112  on the lead frame  100  are conductive locations on the perimeter of the lead frame  100  that remain exposed when the lead frame  100 , with a flip chip  104  (or other integrated circuit) mounted thereon, is enclosed in molding compound to form a QFN (or other) package  102 . Some of the connection points  112  are electrically connected to the control IC  107 , either directly using wire bonds  111 , or indirectly via conductive leads  108 ,  110  that are electrically connected to the control IC  107  using wire bonds  111 . 
     The QFN package  102  includes the connection points  112 , which are left exposed when the lead frame  100  is encapsulated using molding compound. The QFN package&#39;s connection points  112  can be surface-mounted on a PCB to electrically connect the QFN package  102  to circuits on the PCB surface. The flip chip  104  includes conductive pads  114  on a top surface  116  of the flip chip  104 . The conductive leads  108 ,  110  on the lead frame  100  are arranged so that the flip chip  104  can be flipped over so that its top surface  116  faces down—towards the lead frame  100 —and the conductive leads  108 ,  110  are aligned with the conductive pads  114 . The pads  114  can then be electrically and mechanically connected to the conductive leads  108 ,  110  using solder balls (not shown). This results in electrically coupling the circuits in the flip chip  104  to the connection points  112 , via the conductive leads  108 ,  110 . Packaging in which a flip chip is used with a lead frame is referred to as Flip Chip on Lead (FCoL) packaging. 
       FIG. 1E  shows a prior art example of a view  120  of the flip chip  104  being placed onto a lead frame  100 , in which a bottom surface  118  of the flip chip  104  is visible.  FIG. 1F  shows a prior art example of a view  122  of the flip chip  104  being placed onto the lead frame  100 , in which the top surface  116  of the flip chip  104  is visible. 
     SUMMARY 
     In described examples, a packaged semiconductor device includes a frame, a pre-fabricated interposer, and an integrated circuit die. The frame includes multiple frame leads and multiple conductive connection points, as well as a hole in the frame surrounded by the frame leads and the conductive connection points. The pre-molded interposer has an external perimeter including multiple conductive interposer leads, and is for insertion into the hole. At least one of the interposer leads does not extend to the external perimeter of the interposer. The die is electrically coupled to selected ones of the frame leads and of the interposer leads. The interposer is inserted into the hole and coupled to the frame, and the frame, interposer, and die are together encapsulated by encapsulation material. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1A  shows a prior art example of a lead frame. 
         FIG. 1B  shows a prior art example of a quad-flat no-leads (QFN) package. 
         FIG. 1C  shows a prior art example of a flip chip. 
         FIG. 1D  shows a prior art example of multiple pre-singulation QFN lead frames  100  physically connected together in an array  124 . 
         FIG. 1E  shows a prior art example of a view of the flip chip being placed onto a lead frame, in which a bottom surface of the flip chip is visible. 
         FIG. 1F  shows a prior art example of a view of the flip chip being placed onto the lead frame, in which the top surface of the flip chip is visible. 
         FIG. 2A  shows an example of a pre-plated frame (PPF). 
         FIG. 2B  shows an example of a pre-molded interposer. 
         FIG. 2C  shows an example view of the PPF assembled with the pre-molded interposer to form a lead frame. 
         FIG. 3A  shows an example exploded view of the PPF, pre-molded interposer, and flip chip, in which the bottom surface of the flip chip is visible. 
         FIG. 3B  shows an example exploded view of the PPF, pre-molded interposer, and flip chip, in which the top surface of the flip chip is visible. 
         FIG. 3C  shows an example view of the PPF assembled with a pre-molded interposer and a flip chip.  FIG. 3D  shows an example view of the PDF assembled with a pre-molded interposer and a flip chip after being covered with mold material. 
         FIG. 4  shows an example process for assembling a lead frame with an integrated circuit. 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 2A  shows an example of a pre-plated frame  200  (PPF  200 ). The PPF  200  of  FIG. 2A  is a copper lead frame plated with silver, nickel, or other conductive material to prevent oxidation of the copper and to enhance solderability of external contacts (connection points  206 ). The PPF  200  includes a die attach pad  202  on which a control integrated circuit (control IC, not shown) is mounted. The control IC  103  controls input and output functions of the fully assembled package  102 . The PPF  200  also includes multiple conductive leads  204 F. (Structures on the PPF  200  have an F appended to item numbers shared with the pre-molded interposer  208 ; structures on the pre-molded interposer  208 , described with respect to  FIG. 2B , have a C appended to item numbers shared with the PPF  200 .) Leads  204 F for the PPF  200  can be designed not to include floating leads  212  (not shown in  FIG. 2A ). Such floating leads  212  may be (but are not necessarily) limited to a pre-molded interposer  208 , as described with respect to  FIG. 2B . The leads  204 F are electrically connected to respective external connection points  206  at selected perimeter locations of the PPF  200 . The leads  204 F and connection points  206  surround a hole or void  207  in the PPF  200 . The hole  207  is sized and shaped to enable a pre-molded interposer  208  (as described in  FIG. 2B ) to be inserted into the hole  207 . In particular, the interposer  208  is smaller than the hole  207 . The interposer  208  can be sized to be smaller than the minimum size of the hole  207  in light of device fabrication tolerances. This “clearance” difference in size between the interposer  208  and the hole  207  can be bridged using solder. The leads  204 F in the PPF  200  that terminate against (touch) the hole  207  enable connectivity to counterpart ones of the leads  204 C in the pre-molded interposer  208 , so that such connected counterparts are not floating leads  212 —accordingly, the leads  204 F that are touching the hole  207  can electrically connect the leads  204 C in the pre-molded interposer  208  to the connection points  206 . 
       FIG. 2B  shows an example of the pre-molded interposer  208 . The pre-molded interposer  208  comprises a molded shape made from a mold compound  210 . Channels are created in a top surface  214  of the molded shape either using the mold (not shown), or by etching, drilling, milling, or otherwise creating channels in the top surface  214 . The top surface  214  is plated to fill the channels with conductive material and thereby create the leads  204 C in the top surface  214  of the pre-molded interposer  208  as shown in  FIG. 2B . The plating material can be, for example, NiPdAu flash. This results in conductive leads  204 C inside a matrix of molding compound  210 . NiPdAu plating can be applied so that the excess plating material on the surface of the interposer  208  is less than 2 μm thick. This is thin enough so that excess plating material is generally insufficiently conductive to electrically connect the conductive leads  204 C in a manner that would compromise their intended function. Accordingly, excess plating material on the interposer  208  is generally insufficient to prevent conductive leads  204 C from conducting signals transmitted from a flip chip  104  via the flip chip&#39;s  104  conductive pads  114 , to corresponding connection points  206 . The flip chip  104  is not shown in  FIG. 2B ; interface between the flip chip  104 , the interposer  208 , and the PPF  200  is shown in, for example,  FIGS. 3A, 3B, and 3C . 
     The conductive leads  204 C can be floating leads  212  or non-floating leads after the pre-molded interposer  208  is attached to the PPF  200  (as further described below). The leads  204 C are exposed on at least the top surface  214  of the pre-molded interposer  208 . Whether leads  204 C on the interposer  208  will be non-floating leads or floating leads  212  depends on whether or not (respectively) the leads  204 C on the interposer  208  touch an exterior perimeter of the interposer  208  and will be aligned with non-floating leads on the PPF  200  once the interposer  208  is inserted into the hole  207  in the PPF  200 . 
       FIG. 2C  shows an example view of the PPF  200  assembled with the pre-molded interposer  208  to form a lead frame  216 . As shown in  FIG. 2C , the pre-molded interposer  208  is inserted into the PPF  200 , with solder, sintering, or conductive paste (or other conductive medium) between corresponding leads  204 F,  204 C on the PPF  200  and the pre-molded interposer  208  to electrically connect portions of the PPF  200  to the pre-molded interposer  208 . Sticky tape (or other means of holding the PPF  200  releasably in place) is used to hold the PPF  200  in a fixed position while the pre-molded interposer  208  is inserted into the PPF  200  to form the assembled lead frame  216 . At least some of the conductive leads  204 F,  204 C are located to align with conductive pads  114  on a flip chip  104  (or other IC) so that the flip chip  104  can be electrically connected to the assembled lead frame  216  using solder balls. 
     Advantageously, use of the pre-molded interposer  208  to contain the floating leads  212  simplifies fabrication of the floating leads  212 . The pre-molded interposer  208  enables floating leads  212  to be used in the lead frame  216  without need for additional process steps to separate the floating leads  212  from the rest of the lead frame  216 . Accordingly, by including the floating leads  212  in the pre-molded interposer  208 , rather than in the PPF  200 , the floating leads  212  can be fabricated without using an etching or other separation process to physically and electrically separate the floating leads  212  from the rest of the lead frame  216 . Further, use of the pre-molded interposer  208  enables the floating leads  212  to be held securely in place. The floating leads  212  are thereby precisely positioned, which can enable improved electrical connectivity of an integrated circuit (IC) to a lead frame  216  on which the IC is mounted. 
       FIGS. 3A and 3B  show respective upper and lower example exploded views  300  and  302  of the PPF  200 , a molded interposer  208 , and a flip chip  104 , and  FIG. 3C  shows those items assembled into an assembled lead frame  304 . Specifically,  FIG. 3A  shows an example exploded view  300  in which the bottom surface  118  of the flip chip  104  is visible, and  FIG. 3B  shows an example exploded view  302  in which the top surface  116  of the flip chip  104  is visible. As shown in  FIG. 3C , the conductive leads  204 F,  204 C on the lead frame  216  (accordingly, on the PPF  200  and on the pre-molded interposer  208 ) are positionally aligned with, and electrically connected to, the conductive pads  114  on the flip chip  104 . The flip chip  104  may connect to conductive leads  204 F,  204 C on the PPF  200  and on the pre-molded interposer  208 , or may only connect to conductive leads  204 C on the pre-molded interposer  208 .  FIG. 3D  shows a mold  306  covered PDF assembled with a pre-molded interposer and a flip chip. 
       FIG. 4  shows an example process  400  for assembling a lead frame with an integrated circuit. In step  402 , plate a conductive frame with a (different) conductive material, such as silver or nickel, to inhibit oxidation of the frame material. The frame comprises conductive leads, preferably including non-floating leads, electrically connected to connection points. The connection points are located so that when the assembly is packaged (such as a quad flat no-leads package), conductive material is applied between the connection points and corresponding conductive points on the package. The leads and connection points surround a hole or void within the frame. One or more of the leads terminates against the hole. 
     In step  404 , fabricate an interposer having conductive leads on a top surface of the interposer, the interposer shaped to be inserted into the frame hole or void so that the interposer fits within the hole or void and a top surface of the interposer is flush with a top surface of the frame. The interposer has channels on a top surface, the channels corresponding to desired conductive leads. Channels can be arranged so that, once filled with conductive material, leads formed in the channels of the interposer can be non-floating leads or floating leads once the interposer is inserted into the frame hole or void. Whether leads on the interposer will be non-floating leads or floating leads depends on whether or not (respectively) the leads on the interposer will be aligned with non-floating leads on the frame once the interposer is inserted into the hole or void in the frame. In step  406 , the channels on the top surface of the interposer are filled with a conductive material to produce the leads. 
     In step  408 , insert the interposer into the hole in the frame so that non-floating leads on the interposer align with non-floating leads on the frame, and electrically connect the aligned leads on the interposer to corresponding aligned leads on the frame using solder, sintering, conductive paste, or other conductive material. 
     In step  410 , align conductive pads on a surface of a die (an integrated circuit) with the conductive leads on the lead frame. In step  412 , electrically couple the conductive pads on the die to the conductive leads on the frame, such as by using solder balls. 
     In step  414 , repeat steps  402  through  412  for a plurality of lead frames and dies, the plurality of lead frames forming an array or other connected arrangement of lead frames. In step  416 , the plurality of lead frames assembled with dies is packaged, surrounding them with encapsulation material. In step  418 , the plurality of encapsulated lead frames is singulated (for example, by sawing) to generate a plurality of packaged semiconductor devices. 
     Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims. 
     In some embodiments, package types other than QFN are used. 
     In some embodiments, a top surface of an interposer inserted into a frame is not flush with a top surface of the frame. 
     In some embodiments, the PPF is plated with NiPdAU. 
     In some embodiments, a frame that is not pre-plated is used instead of a PPF. 
     In some embodiments, an interposer is made other than by molding; for example, using three dimensional printing, or by drilling, etching, or milling. 
     In some embodiments, channels on the interposer are filled with conductive material to form conductive leads, in a manner other than by plating the top surface of the interposer. 
     In some embodiments, conductive material on a plated surface of the interposer that is not contained within a channel is removed from the plated surface of the interposer. 
     In some embodiments, the interposer is attached to the PPF using structure on the PPF other than a conductive lead. 
     In some embodiments, the clearance difference in size between the interposer and the hole is bridged using a conductive or non-conductive material other than solder.