Patent Publication Number: US-11393516-B2

Title: SOT-based spin torque oscillators for oscillatory neural networks

Description:
CLAIM OF PRIORITY 
     The present application claims priority from U.S. Provisional Patent Application No. 63/093,522, entitled “SOT-BASED SPIN TORQUE OSCILLATORS FOR OSCILLATORY NEURAL NETWORKS,” filed Oct. 19, 2020, incorporated by reference herein in its entirety. 
    
    
     BACKGROUND 
     Artificial neural networks that include large numbers of nanoscale oscillators, commonly referred to as oscillatory neural networks, seek to mimic the processing methods of the brain to perform neuromorphic computing. Several challenges exist to practical implementations of such oscillatory neural networks. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1A  is a diagram of an example artificial neural network. 
         FIG. 1B  is a diagram of another example artificial neural network. 
         FIG. 2A  depicts an example cross-point array that may be used to implement the artificial neural network of  FIG. 1B . 
         FIG. 2B  depicts another example cross-point array that may be used to implement the artificial neural network of  FIG. 1B . 
         FIG. 2C  is a diagram of an example frequency domain spectrum of an array output current of the cross-point array of  FIG. 2B . 
         FIG. 2D  is a diagram of an example frequency domain spectrum of an array output current of the cross-point array of  FIG. 2B . 
       FIGS.  3 A 1 - 3 A 2  depict various views of a spin an SOT-based STO that may be included in the oscillator circuits of the cross-point array of  FIG. 2A . 
       FIGS.  3 B 1 - 3 B 3  depict various views of another SOT-based STO that may be included in the oscillator circuits of the cross-point array of  FIG. 2A . 
       FIG.  3 C 1  is a diagram of an embodiment of an oscillator circuit that may be used in the cross-point array of  FIG. 2A . 
       FIG.  3 C 2  depicts an example diagram of intrinsic frequency versus DC input current for the oscillator circuit of FIG.  3 C 1 . 
       FIG.  3 D 1  depicts a view of another SOT-based STO that may be included in the oscillator circuits of the cross-point array of  FIG. 2A . 
       FIG.  3 D 2  depicts a view of still another SOT-based STO that may be included in the oscillator circuits of the cross-point array of  FIG. 2A . 
       FIG.  3 E 1  depicts a view of yet another SOT-based STO that may be included in the oscillator circuits of the cross-point array of  FIG. 2A . 
       FIG.  3 E 2  depicts a view of another SOT-based STO that may be included in the oscillator circuits of the cross-point array of  FIG. 2A . 
         FIG. 4  depicts an example embodiment of the cross-point array of  FIG. 2A . 
         FIG. 5  depicts another example embodiment of the cross-point array of  FIG. 2A . 
         FIG. 6A  is a circuit diagram of a voltage-to-current converter that may be used in the oscillator circuits of  FIG. 4 . 
         FIG. 6B  is a circuit diagram of a voltage-to-current converter that may be used in the oscillator circuits of  FIG. 5 . 
     
    
    
     DETAILED DESCRIPTION 
     Technology is described for implementing oscillatory neural networks using spin orbit torque (SOT)-based spin torque oscillator (STO) circuits, referred to herein as SOT-based STO circuits. In embodiments, each SOT-based STO circuit includes a spin Hall effect layer that generates a spin current in response to an input electrical current. The spin current provides a spin orbit torque that causes a magnetization direction of a magnetic layer adjacent to it to oscillate at an oscillation frequency. 
     In embodiments, in response to input signals that each include an input signal frequency, the oscillation frequency of each SOT-based STO may synchronize to an input signal frequency if the oscillation frequency is close to the input signal frequency. In embodiments, each SOT-based STO circuit generates an output signal that includes frequency domain components at the input signal frequencies. In embodiments, the magnitudes of the frequency domain components at the input signal frequencies depend on a degree of synchronization between the input signal frequencies and the oscillation frequencies. 
       FIG. 1A  depicts an example of an artificial neural network  100   a  that includes input neurons x 1 , x 2 , x 3 , . . . , x n , output neurons y 1 , y 2 , y 3 , . . . , y m , and synapses  102   a  that connect input neurons x 1 , x 2 , x 3 , . . . , x n  to output neurons y 1 , y 2 , y 3 , . . . , y m . In an embodiment, each synapse  102   a  has a corresponding scalar weight w 11 , w 12 , w 13 , . . . , w nm . In some artificial neural networks, each output neuron y 1 , y 2 , y 3 , . . . , y m  (before a non-linear function is applied) has a value equal to a sum of products of input neurons x 1 , x 2 , x 3 , . . . , x n  multiplied by corresponding scalar weights w 11 , w 12 , w 13 , . . . , w nm , 
     In other artificial neural networks, sometimes referred to as oscillatory neural networks, input neurons x 1 , x 2 , x 3 , . . . , x n  and output neurons y 1 , y 2 , y 3 , . . . , y m , are coupled via oscillator circuits.  FIG. 1B  depicts an example of such an oscillatory neural network  100   b . In an embodiment, each synapse  102   b  includes an oscillator circuit that oscillates at a corresponding oscillation frequency f 11 , f 12 , f 13 , . . . , f nm . In such an embodiment, weights w 11 , w 12 , w 13 , . . . , w nm  (not depicted to avoid overcrowding the drawing) are used to tune the oscillator circuits to their corresponding oscillation frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively. 
     In an embodiment, each of input neurons x 1 , x 2 , x 3 , . . . , x n  includes an input signal having one or more input signal frequencies, and each of output neurons y 1 , y 2 , y 3 , . . . , y m  includes an output signal that includes frequency domain components at the input signal frequencies. In an embodiment, the magnitudes of the frequency domain components at the input signal frequencies depend on a degree of synchronization between the input signal frequencies and the oscillation frequencies. 
     For example, if an input neuron x 1  that includes an input signal having an input signal frequency f i  is coupled to an output neuron y 1  via an oscillator circuit having an oscillation frequency f 11 , output neuron y 1  includes an output signal that includes a frequency domain component at input signal frequency f i . The magnitude of the frequency domain component at input signal frequency f i  is based on a degree of synchronization between input signal frequency f i  and oscillation frequency f 11 . 
     In an embodiment, the closer input signal frequency f i  is to oscillation frequency f 11 , the greater the degree of synchronization between input signal frequency f i  and oscillation frequency f 11 , and the greater the magnitude of the frequency domain component at input signal frequency f i  in the output signal. 
     In the more general case, input neuron x 1  includes an input signal having multiple input signal frequencies f i1 , f i2 , f i3  . . . . Input neuron x 1  is coupled to each of output neurons y 1 , y 2 , y 3 , . . . , y m  via oscillator circuits tuned to oscillation frequencies f 11 , f 21 , f 31 , . . . , f m1 , respectively. The amount of “information” communicated between input neuron x 1  and each of output neurons y 1 , y 2 , y 3 , . . . , y m  depends on how closely input signal frequencies f i1 , f i2 , f i3 , . . . match oscillation frequencies f 11 , f 21 , f 31 , . . . , f m1 , respectively. 
     The closer the match between an input signal frequency and an oscillation frequency of a particular oscillator circuit, the greater the amount of information communicated from input neuron x 1  to the output neuron coupled via that oscillator circuit. Conversely, the farther the match between an input signal frequency and an oscillation frequency of a particular oscillator circuit, the lesser the amount of information communicated from input neuron x 1  to the output neuron coupled via that oscillator circuit. 
     In an embodiment, a cross-point array is used to implement an oscillatory neural network.  FIG. 2A  depicts an example cross-point array  200   a  that may be used to implement an oscillatory neural network, such as oscillatory neural network  100   b  of  FIG. 1B . 
     Cross-point array  200   a  includes m rows and n columns of nodes  202   11 ,  202   12 , . . . ,  202   nm . Each column of nodes  202   11 ,  202   12 , . . . ,  202   nm  is coupled to one of n first conductive lines  204   1 ,  204   2 , . . . ,  204   n . Each row of nodes  202   11 ,  202   12 , . . . ,  202   nm  is coupled to one of m second conductive lines  206   1 ,  206   2 , . . . ,  206   m . Reference number  202  will be used herein to refer generally to a node without regard to any particular one of nodes  202   11 ,  202   12 , . . . ,  202   nm . 
     In an embodiment, each node  202   11 ,  202   12 , . . . ,  202   nm  of cross-point array  200   a  includes an oscillator circuit having a tunable (also referred to herein as “programmable”) oscillation frequency. The programmed oscillation frequency of an oscillator circuit is referred to herein as the “intrinsic frequency” of the oscillator circuit. In an embodiment, the oscillator circuits of nodes  202   11 ,  202   12 , . . . ,  202   nm  may be programmed to oscillate at corresponding intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively. Thus, each node  202   11 ,  202   12 , . . . ,  202   nm  is labeled with a corresponding intrinsic frequency f 11 , f 12 , f 13 , . . . , f nm , respectively, of the oscillator circuit in the node. 
     In an embodiment, the oscillator circuits of nodes  202   11 ,  202   12 , . . . ,  202   nm  may be programmed to corresponding intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively, based on signals input to the oscillator circuits. For example, an oscillator circuit may be programmed to oscillate at a particular intrinsic frequency based on a corresponding dc current signal (not depicted in  FIG. 2A ) injected into the oscillator circuit. That is, an oscillator circuit may be programmed to oscillate at a first intrinsic frequency in response to a first dc current signal injected into the oscillator circuit, and may be programmed to oscillate at a second intrinsic frequency in response to a second dc current signal injected into the oscillator circuit. 
     In an embodiment, the oscillator circuits of nodes  202   11 ,  202   12 , . . . ,  202   nm  are programmed to oscillate at particular intrinsic frequencies based on corresponding weights of an m×n array of weights, w 11 , w 12 , w 13 , . . . , w nm , respectively. For example, each of weights w 11 , w 12 , w 13 , . . . , w nm  may represent an amplitude of a dc current (not depicted in  FIG. 2A ) injected into the oscillator circuits of nodes  202   11 ,  202   12 , . . . ,  202   nm , respectively, to program the oscillator circuits to oscillate at intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively. 
     In an embodiment, each of weights w 11 , w 12 , w 13 , . . . , w nm  is associated with corresponding intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively. The m×n array of weights, w 11 , w 12 , w 13 , . . . , w nm  and their associated intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively, may be determined, for example, during a training phase of the neural network. A common training method involves selectively and/or iteratively updating the weights (and associated intrinsic frequencies) using an algorithm such as back propagation. 
     In an embodiment, first input signals Iin 1 , Iin 2 , . . . , Iin n  are shown applied to first conductive lines  204   1 ,  204   2 , . . . ,  204   n , respectively. In an embodiment, each first input signal Iin 1 , Iin 2 , . . . , Iin n  divides substantially equally into m corresponding second input signals Ix 1 , Ix 2 , . . . , Ix n , respectively. 
     For example, first input signal Iin 1  divides substantially equally into m corresponding second input signals Ix 1 =Iin 1 /m. Likewise, first input signal Iin 2  divides substantially equally into m corresponding second input signals Ix 2 =Iin 2 /m, and so on. In an embodiment, the magnitudes of second input signals Ix 1 , Ix 2 , . . . , Ix n  correspond to the associated values of input neurons x 1 , x 2 , . . . x n , respectively, of oscillatory neural network  100   b  of  FIG. 1B . 
     In embodiments, first input signals Iin 1 , Iin 2 , . . . , Iin n  are current signals, and will be referred to in the remaining description as first input currents Iin 1 , Iin 2 , . . . , Iin n . In embodiments, second input signals Ix 1 , Ix 2 , . . . , Ix n  are current signals, and will be referred to in the remaining description as second input currents Ix 1 , Ix 2 , . . . , Ix n . 
     In an embodiment, the oscillator circuits of nodes  202   11 ,  202   12 , . . . ,  202   nm  are coupled to receive a corresponding one of second input currents Ix 1 , Ix 2 , . . . , Ix n , and are configured to provide corresponding oscillator output signals i 11 , i 12 , . . . , i nm , respectively. For example, the oscillator circuit of node  202   11  is coupled to receive second input current Ix 1 , and is configured to provide corresponding oscillator output signal i 11 . Likewise, the oscillator circuit of node  202   23  is coupled to receive second input current Ix 2 , and is configured to provide corresponding oscillator output signal i 23 , and so on. In embodiments, oscillator output signals i 11 , i 12 , . . . , i nm  are current signals, and will be referred to in the remaining description as oscillator output currents i 11 , i 12 , . . . , i nm . 
     In this regard, each oscillator output current is associated with a corresponding second input current. In particular, each oscillator output current is associated with a corresponding second input current received by the oscillator circuit of the node. For example, oscillator output current i 11  is associated with corresponding second input current Ix 1 , oscillator output current i 23  is associated with corresponding second input current Ix 2 , oscillator output current i n2  is associated with corresponding second input current Ix n , and so on. 
     In addition, the m oscillator output currents provided by the m oscillator circuits in the same column of nodes  202  are each associated with the same corresponding second input current. For example, oscillator output currents i 11 , i 12 , i 13 , . . . , i 1m  are each associated with corresponding second input current Ix 1 , oscillator output currents i 31 , i 32 , i 33 , . . . , i 3m  are each associated with corresponding second input current Ix 3 , and so on. 
     In an embodiment, the n oscillator output currents provided by the n oscillator circuits in the same row of nodes  202  sum to form array output signals Iout 1 , Iout 2 , . . . , Iout m  at the m second conductive lines  206   1 ,  206   2 , . . . ,  206   m , respectively. For example, oscillator output currents i 11 , i 21 , i 31 , . . . , i n1  sum to form array output signal Iout 1  at second conductive line  206   1 . Likewise, oscillator output currents i 13 , i 23 , i 33 , . . . , i n3  sum to form array output signal Iout 3  at second conductive line  206   3 , and so on. In embodiments, array output signals Iout 1 , Iout 2 , . . . , Iout m  are current signals, and will be referred to in the remaining description as array output currents Iout 1 , Iout 2 , . . . , Iout m . 
     Stated another way, each second conductive line  206   1 ,  206   2 , . . . ,  206   m , conducts an array output current Iout 1 , Iout 2 , . . . , Iout m , respectively, equal to a sum of the n oscillator output currents of the n oscillator circuits connected to that second conductive line. Thus, array output currents Iout 1 , Iout 2 , . . . , Iout m  may be expressed as: 
     
       
         
           
             
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     In an embodiment, first input currents Iin 1 , Iin 2 , . . . , Iin n  (and corresponding second input currents Ix 1 , Ix 2 , . . . , Ix n , respectively) each include one or more input signal frequencies. For example, first input current Iin 1  (and corresponding second input current Ix 1 ) may include three input signal frequencies f 1a , f 1b , f 1c , first input current Iin 2  (and corresponding second input current Ix 2 ) may include one input signal frequency f 2a , first input current Iin 3  (and corresponding second input current Ix 3 ) may include two input signal frequencies f 3a , f 3b  and so on. Persons of ordinary skill in the art will understand that first input currents Iin 1 , Iin 2 , . . . , Iin n  (and corresponding second input currents Ix 1 , Ix 2 , . . . , Ix n , respectively) each may include more than three input signal frequencies. 
     In an embodiment, oscillator output currents i 11 , i 12 , . . . , i nm  each include frequency domain components at the input signal frequencies of their associated corresponding second input current Ix 1 , Ix 2 , . . . , Ix n . For example, oscillator output current i 11  is associated with corresponding second input current Ix 1 , and includes frequency domain components at the input signal frequencies of second input current Ix 1 . Similarly, oscillator output current i 23  is associated with corresponding second input current Ix 2 , and includes frequency domain components at the input signal frequencies of second input current Ix 2 . Likewise, oscillator output current i n2  is associated with corresponding second input current Ix n , and includes frequency domain components at the input signal frequencies of second input current Ix n , and so on. 
     As described above, the n oscillator output currents provided by the n oscillator circuits in the same row of nodes  202  sum to form array output currents Iout 1 , Iout 2 , . . . , Iout m . Because the n oscillator circuits in the same row of nodes  202  are coupled to corresponding second input currents Ix 1 , Ix 2 , Ix 3 , . . . , Ix n , array output currents Iout 1 , Iout 2 , . . . , Iout m  each include frequency domain components at the input signal frequencies of second input currents Ix 1 , Ix 2 , . . . , Ix n . 
     For example, the oscillator circuits of nodes  202   11 ,  202   21 ,  202   31 , . . . ,  202   n1  receive second input currents Ix 1 , Ix 2 , Ix 3 , . . . , Ix n , respectively, and provide oscillator output currents i 11 , i 21 , i 31 , . . . , i n1 , respectively, which sum to form array output current Iout 1 . As described above, oscillator output currents i 11 , i 21 , i 31 , . . . , i n1  include frequency domain components at the input signal frequencies of their associated corresponding second input current Ix 1 , Ix 2 , . . . , Ix n , respectively. Accordingly, array output current Iout 1  includes frequency domain components at the input signal frequencies of second input currents Ix 1 , Ix 2 , . . . , Ix n . 
     Likewise, the oscillator circuits of nodes  202   13 ,  202   23 ,  202   33 , . . . ,  202   n3  receive second input currents Ix 1 , Ix 2 , Ix 3 , . . . , Ix n , respectively, and provide oscillator output currents i 13 , i 23 , i 33 , . . . , i n3 , respectively, which sum to form array output current Iout 3 . As described above, oscillator output currents i 13 , i 23 , i 33 , . . . , i n3  include frequency domain components at the input signal frequencies of their associated corresponding second input current Ix 1 , Ix 2 , . . . , Ix n , respectively. Accordingly, array output current Iout 3  includes frequency domain components at the input signal frequencies of second input currents Ix 1 , Ix 2 , . . . , Ix n . 
     To illustrate,  FIG. 2B  depicts cross-point array  202   b  that includes a first node  202   11  coupled to first conductive line  204   1  and second conductive line  206   1 , and a second node  202   21  coupled to first conductive line  204   2  and second conductive line  206   1 . First node  202   11  includes an oscillator circuit programmed to oscillate at first intrinsic frequency f 11 , and second node  202   21  includes an oscillator circuit programmed to oscillate at second intrinsic frequency f 21 . First input current Iin 1  is applied to first conductive line  204   1 , and first input current Iin 2  is applied to second conductive line  204   2 . 
     The oscillator circuit of first node  202   11  receives second input current Ix 1  (which equals first input current Iin 1  in this example) and provides oscillator output current i 11 . The oscillator circuit of second node  202   21  receives second input current Ix 2  (which equals first input current Iin 2  in this example) and provides oscillator output current i 21 . Array output current Iout 1  is the sum of oscillator output current i 11  and oscillator output current i 21 . 
     If first input current Iin 1  (and corresponding second input current Ix 1 ) includes input signal frequencies f 1a , f 1b , f 1c , oscillator output current i 11  includes frequency domain components at input signal frequencies f 1a , f 1b , f 1c  of second input current Ix 1 . Likewise, if first input current Iin 2  (and corresponding second input current Ix 2 ) includes signal frequencies f 2a , f 2b , oscillator output current i 21  includes frequency domain components at input signal frequencies f 2a , f 2b  of second input current Ix 2 . 
     Array output current Iout 1  is the sum of oscillator output current i 11  and oscillator output current i 21 , and thus array output current Iout 1  includes frequency domain components at input signal frequencies f 1a , f 1b , f 1c , f 2a , f 2b  of oscillator output current i 11  and oscillator output current i 21 . 
     Referring again to  FIG. 2A , and as described above, the oscillator circuit of a node  202  may be programmed to oscillate at an intrinsic frequency, and provides an oscillator output current that is associated with a corresponding second input current received by the oscillator circuit. In addition, the oscillator output current includes frequency domain components at the input signal frequencies of the associated corresponding second input current. In an embodiment, the magnitudes of the frequency domain components at the input signal frequencies depend on a degree of synchronization between the input signal frequencies and the intrinsic frequency of the oscillator circuit. 
     In an embodiment, the oscillator circuit of a node  202  synchronizes its oscillation frequency to that of an input signal frequency of the associated corresponding second input current if a difference between the input signal frequency and the intrinsic frequency is less than or equal to a predetermined threshold Δf. If the difference between the input signal frequency and the intrinsic frequency is greater than predetermined threshold Δf, the oscillator circuit does not synchronize its oscillation frequency to the input signal frequency and continues to oscillate at the intrinsic frequency. 
     Thus, the smaller the difference between the input signal frequency and the intrinsic frequency, the greater the degree of synchronization between the input signal frequency and the intrinsic frequency, and the greater the magnitude of the frequency domain component of the oscillator output current at the input signal frequency. Conversely, the greater the difference between the input signal frequency and the intrinsic frequency, the smaller the degree of synchronization between the input signal frequency and the intrinsic frequency, and the smaller the magnitude of the frequency domain component of the oscillator output current at the input signal frequency. 
     In an embodiment, array output currents Iout 1 , Iout 2 , . . . , Iout m  each include frequency domain components at the input signal frequencies of second input currents Ix 1 , Ix 2 , . . . , Ix n . In an embodiment, the magnitudes of the frequency domain components of an array output current at the input signal frequencies of second input currents Ix 1 , Ix 2 , . . . , Ix n  depend on a degree of synchronization between the input signal frequencies of second input currents Ix 1 , Ix 2 , . . . , Ix n  and the intrinsic frequencies of the oscillator circuits of the nodes  202  that collectively provide the array output current. 
     For example, referring again to  FIG. 2B , first node  202   11  includes an oscillator circuit that oscillates at intrinsic frequency f 11 , receives second input current Ix 1  and provides oscillator output current i 11 . In addition, second node  202   21  includes an oscillator circuit that oscillates at intrinsic frequency f 21 , receives second input current Ix 2  and provides oscillator output current i 21 . Array output current Iout 1  is the sum of oscillator output current i 11  and oscillator output current i 21 . 
       FIG. 2C  depicts a diagram of an example frequency domain spectrum of array output current Iout 1  of cross-point array  202   b  of  FIG. 2B , in which the oscillator circuit of first node  202   11  is programmed to oscillate at intrinsic frequency f 11 =2.3 GHz, the oscillator circuit of second node  202   21  is programmed to oscillate at intrinsic frequency f 21 =3.8 GHz, second input current Ix 1  includes an input signal frequency f 1a =2.4 GHz, second input current Ix 2  includes an input signal frequency f 2a =3.9 GHz and predetermined threshold Δf=0.1 GHz. 
     For the oscillator circuit of first node  202   11 , the difference between input signal frequency f 1a =2.4 GHz of second input current Ix 1  and intrinsic frequency f 11 =2.3 GHz is 0.1 GHz≤Δf. As a result, the oscillator circuit of first node  202   11  synchronizes its oscillation frequency to input signal frequency f 1a =2.4 GHz. Accordingly, the frequency domain spectrum of array output current Iout 1  includes a strong peak at input signal frequency f 1a =2.4 GHz. 
     For the oscillator circuit of second node  202   21 , the difference between input signal frequency f 2a =3.9 GHz of second input current Ix 2  and intrinsic frequency f 21 =3.8 GHz=0.1 GHz≤Δf. As a result, the oscillator circuit of second node  202   21  synchronizes its oscillation frequency to input signal frequency f 2a =3.9 GHz. Accordingly, the frequency domain spectrum of array output current Iout 1  includes a strong peak at input signal frequency f 2a =3.9 GHz. 
       FIG. 2D  depicts a diagram of an example frequency domain spectrum of array output current Iout 1  of cross-point array  202   b  of  FIG. 2B , in which the oscillator circuit of first node  202   11  is programmed to oscillate at intrinsic frequency f 11 =2.3 GHz, the oscillator circuit of second node  202   21  is programmed to oscillate at intrinsic frequency f 21 =3.8 GHz, second input current Ix 1  includes an input signal frequency f 1a =1.7 GHz, second input current Ix 2  includes an input signal frequency f 2a =4.3 GHz and predetermined threshold Δf=0.1 GHz. 
     For the oscillator circuit of first node  202   11 , the difference between input signal frequency f 1a =1.7 GHz of second input current Ix 1  and intrinsic frequency f 11 =2.3 GHz is 0.6 GHz&gt;Δf. As a result, the oscillator circuit of first node  202   11  does not synchronize its oscillation frequency to input signal frequency f 1a =1.7 GHz, and instead remains oscillating at intrinsic frequency f 11 =2.3 GHz. Accordingly, the frequency domain spectrum of array output current Iout 1  includes a negligible peak at input signal frequency f 1a =1.7 GHz. 
     For the oscillator circuit of second node  202   21 , the difference between input signal frequency f 2a =4.3 GHz of second input current Ix 2  and intrinsic frequency f 21 =3.8 GHz=0.5 GHz&gt;Δf. As a result, the oscillator circuit of second node  202   21  does not synchronize its oscillation frequency to input signal frequency f 2a =4.3 GHz, and instead remains oscillating at intrinsic frequency f 21 =3.8 GHz. Accordingly, the frequency domain spectrum of array output current Iout 1  includes a negligible peak at input signal frequency f 2a =4.3 GHz. 
     Comparing  FIGS. 2C and 2D , the magnitudes of the frequency domain components of an array output current Iout 1  at the input signal frequencies of second input currents Ix 1  and Ix 2  depend on a degree of synchronization between the input signal frequencies of second input currents Ix 1  and Ix 2 , and the intrinsic frequencies of the oscillator circuits of the nodes  202   11  and  202   21  that collectively provide array output current Iout 1 . 
     Referring again to  FIG. 2A , in an embodiment the oscillator circuit of each of nodes  202   11 ,  202   12 , . . . ,  202   nm  may be implemented as an SOT-based STO. FIGS.  3 A 1 - 3 A 2  depict cross-sectional and top-down views, respectively, of an SOT-based STO  300   a  that may be included in the oscillator circuit of each of nodes  202   11 ,  202   12 , . . . ,  202   nm  of  FIG. 2A . SOT-based STO  300   a  includes a first terminal A, a second terminal B, a third terminal C, a magnetic tunnel junction (MTJ)  302   a , and a spin Hall effect (SHE) layer  304 . As depicted in FIG.  3 A 2 , MTJ  302   a  has a substantially cylindrical shape. 
     MTJ  302   a  includes a reference (or pinned) layer (PL)  306   a , a free layer (FL)  308   a , and a tunnel barrier (TB)  310  positioned between pinned layer  306   a  and free layer  308   a . Tunnel barrier  310  is an insulating layer, such as magnesium oxide (MgO) or other insulating material. Pinned layer  306   a  is a ferromagnetic layer with a fixed magnetization direction. Free layer  308   a  is a ferromagnetic layer and has a magnetization direction that can be switched by spin torque. 
     Although not depicted in FIG.  3 A 1 , SOT-based STO  300   a  optionally may include a dusting layer (e.g., AlO, TaO, YIG or other similar material that has relatively a high resistivity and a long spin diffusion) disposed between free layer  308   a  and SHE layer  304 . As described in more detail below, a dusting layer may be used to substantially electrically isolate MTJ  302   a  and SHE layer  304  while allowing spin current to flow vertically from SHE layer  304  into MTJ  302   a.    
     Pinned layer  306   a  is usually a synthetic antiferromagnetic layer which includes several magnetic and non-magnetic layers, but for the purpose of this illustration is depicted as a single layer  306   a  with fixed magnetization direction. Pinned layer  306   a  and free layer  308   a  each have a magnetization direction that is perpendicular to the film plane (e.g., the x-y plane in FIG.  3 A 1 ), rather than in-plane. Accordingly SOT-based STO  300   a  is also referred to herein as “perpendicular stack SOT-based STO  300   a.”   
     When the magnetization direction of free layer  308   a  is parallel to the magnetization direction of pinned layer  306   a , the resistance of perpendicular stack SOT-based STO  300   a  is relatively low. When the magnetization direction of free layer  308   a  is anti-parallel to the magnetization direction of pinned layer  306   a , the resistance of perpendicular stack SOT-based STO  300   a  is relatively high. 
     FIG.  3 B 1  is a cross-sectional view of another SOT-based STO  300   b  that may be included in the oscillator circuit of each of nodes  202   11 ,  202   12 , . . . ,  202   nm  of  FIG. 2A . SOT-based STO  300   b  includes first terminal A, second terminal B, third terminal C, a MTJ  302   b  having a pinned layer PL  306   b  and a free layer FL  308   b  that each have a magnetization direction that is in an in-plane direction, and SHE layer  304 . Accordingly SOT-based STO  300   b  is also referred to herein as “in-plane stack SOT-based STO  300   b .” As depicted in  FIG. 3B , optional dusting layer (DL)  316  (e.g., AlO, TaO, YIG or other similar material that has relatively a high resistivity and a long spin diffusion) disposed between free layer  308   b  and SHE layer  304 . 
     When the magnetization direction of free layer  308   b  is parallel to the magnetization direction of pinned layer  306   b , the resistance of in-plane stack SOT-based STO  300   b  is relatively low. When the magnetization direction of free layer  308   b  is anti-parallel to the magnetization direction in pinned layer  306   b , the resistance of in-plane stack SOT-based STO  300   b  is relatively high. 
     FIG.  3 B 2  is a top-down view of an embodiment of in-plane stack SOT based STO  300   b . In this embodiment, MTJ  302   b  has an ellipsoidal shape, and pinned layer  306   b  and free layer  308   b  each have an easy axis perpendicular to current flow in SHE layer  314 . FIG.  3 B 3  is a top-down view of another embodiment of in-plane stack SOT-based STO  300   b . In this embodiment, MTJ  302   b  has an ellipsoidal shape, and pinned layer  306   b  and free layer  308   b  each have an easy axis that is at an angle α off-perpendicular to current flow in SHE layer  314 . In embodiments, angle α may be between about 0° to about 30°, although other angles may be used. 
     For simplicity, the remaining description will refer to perpendicular stack SOT-based STOs, such as SOT-based STO  300   a  of FIGS.  3 A 1 - 3 A 2 . Referring again to FIG.  3 A 1 , in an embodiment SHE layer  304  comprises a heavy metal with strong spin orbit coupling and large effective spin Hall angle. Examples of heavy metal materials include platinum, tungsten, tantalum, platinum doped with gold (PtAu), bismuth doped with copper (BiCu). 
     In other embodiments, SHE layer  304  comprises a topological insulator, such as bismuth antimony (BiSb), bismuth selenide (Bi 2 Se 3 ), bismuth telluride (Bi 2 Te 3 ) or antimony telluride (Sb 2 Te 3 ). In particular embodiments, SHE layer  304  comprises BiSb with (012) orientation, which is a narrow gap topological insulator with both giant spin Hall effect and high electrical conductivity. In still other embodiments, SHE layer  304  may comprise one or more of a heavy metal and a topological insulator. That is, SHE layer  304  may comprise a heavy metal, a topological insulator, or a combination of a heavy metal and a topological insulator. 
     The spin of an electron is an intrinsic angular momentum. In a solid, the spins of many electrons can act together to affect the magnetic and electronic properties of a material, for example endowing the material with a permanent magnetic moment as in a ferromagnet. In many materials, electron spins are equally present in both up and down directions. However, various techniques can be used to generate a spin-polarized population of electrons, resulting in an excess of spin up or spin down electrons, to change the properties of a material. This spin-polarized population of electrons moving in a common direction through a common material is referred to as a spin current. 
     The spin Hall effect is a transport phenomenon that may be used to generate a spin current in a sample carrying an electric current. The spin current is in a direction perpendicular to the plane defined by the electrical current direction and the spin polarization direction. The spin polarization direction of such a SHE-generated spin current is in the in-plane direction orthogonal to the electrical current flow. 
     For example, an electrical bias current  312  through SHE layer  304  (from first terminal A to third terminal C) results in a spin current  314  being injected up into free layer  308   a , and having a direction of polarization into the page. Spin current  314  injected into free layer  308   a  exerts a spin torque (or “kick”) on free layer  308   a , which causes the magnetization direction of free layer  308   a  to oscillate. As a result, SOT-based STO  300   a  has a time-varying AC resistance between second terminal B and third terminal C, with the same frequency as the oscillation frequency of magnetization direction of free layer  308   a.    
     Ideally, electrical bias current  312  flows entirely through SHE layer  304  (from first terminal A to third terminal C). In practice, however, a portion of electrical bias current  312  may also flow through MTJ  302   a  (partially shunted), which is not useful. To reduce the portion of bias current  312  flowing through MTJ  302   a , a dusting layer optionally may be disposed between SHE layer  304  and free layer  308   a.    
     As described above, examples of dusting layer materials include AlO, TaO, YIG or other similar material that has relatively a high resistivity and a long spin diffusion. In embodiments, the dusting layer substantially electrically isolates MTJ  302   a  and SHE layer  304  to reduce the portion of bias current  312  flowing through MTJ  302   a , while allowing spin current  314  being injected up into free layer  308   a.    
     FIG.  3 C 1  is a diagram of an embodiment of an oscillator circuit  318  that may be used as the oscillator circuit of each of nodes  202   11 ,  202   12 , . . . ,  202   nm  of  FIG. 2A . Oscillator circuit  318  includes SOT-based STO  300   a  of  FIG. 3A , including first terminal A, second terminal B coupled to a voltage-to-current converter circuit  320 , and third terminal C coupled to GROUND. Voltage-to-current converter circuit  320  converts a voltage at second terminal B to an oscillator output current Iout. Oscillator circuit  318  will be referred to in the remaining description as SOT-based STO circuit  318 . 
     A DC input current Ide injected into first terminal A forms bias current  312 , which flows through SHE layer  304  from first terminal A to third terminal C to GROUND. Bias current  312  results in spin current  314  being injected into free layer  308   a . Spin current  314  exerts a spin torque on free layer  308   a , which causes the magnetization direction of free layer  308   a  to oscillate. Voltage-to-current converter circuit  320  converts an oscillating voltage at second terminal B to oscillator output current Iout. In an embodiment, oscillator output current Iout has a frequency equal to the oscillation frequency of the magnetization direction of free layer  308   a.    
     In an embodiment, SOT-based STO circuit  318  has an intrinsic frequency f 0  that can be tuned based on the value of DC input current Idc (and/or some local magnetic field). FIG.  3 C 2  depicts an example diagram of intrinsic frequency f 0  versus DC input current Idc for SOT-based STO circuit  318 . In particular, the solid curve represents the intrinsic frequency f 0  of SOT-based STO circuit  318  for values of DC input current Idc between about 250 μA and about 400 μA. 
     In the illustrated example, intrinsic frequency f 0  can be tuned (or programmed) over a fairly wide range of frequencies (e.g., between about 2 GHz and about 8 GHz) based on the values of DC input current Idc. Persons of ordinary skill in the art will understand that other DC input current Idc values, intrinsic frequency f 0  values and curve shapes may be used. 
     Referring again to FIG.  3 C 1 , if a radio frequency (RF) input current Irf at a frequency f i  is also injected into first terminal A (e.g., via a bypass capacitor Cb), Idc and Irf collectively form bias current  312 , which flows through SHE layer  304  from first terminal A to third terminal C to GROUND. In an embodiment, the oscillation frequency of SOT-based STO circuit  318  synchronizes to the RF input signal frequency f i  if the difference between the RF input signal frequency f i  and the intrinsic frequency f 0  is less than or equal to a predetermined threshold Δf. In an embodiment, predetermined threshold Δf may be about 0.1 GHz, although other values may be used. 
     Referring again to FIG.  3 C 2 , for a range of DC input current Ide values Isync, the oscillation frequency of SOT-based STO circuit  318  synchronizes to the RF input signal frequency f i (e.g., about 6 GHz in this example). In the illustrated example, over the range of DC input current Idc values Isync, the intrinsic frequency f 0  of SOT-based STO circuit  318  extends from about (f i −Δf) to about (f i +Δf). Thus, if (f i −Δf)≤f 0 ≤(f i +Δf), SOT-based STO circuit  318  synchronizes to the RF input signal frequency f i . Conversely, if f 0 &lt;(f i −Δf) or f 0 &gt;(f i +Δf), SOT-based STO circuit  318  is unable to synchronize to the RF input signal frequency f i , and oscillates at intrinsic frequency f 0 . Persons of ordinary skill in the art will understand that other Isync values and input signal frequency f i  values may be used. 
     FIG.  3 D 1  depicts a cross-sectional of another SOT-based STO  300   c   1  that may be included in the oscillator circuit of each of nodes  202   11 ,  202   12 , . . . ,  202   nm  of  FIG. 2A . SOT-based STO  300   c   1  includes first terminal A, second terminal B, MTJ  302   a , and SHE layer  304 . In contrast to SOT-based STO  300   a  of FIG.  3 A 1 , which is a three-terminal device, SOT-based STO  300   c   1  is a two-terminal device. 
     An electrical bias current  312  through SHE layer  304  and MTJ  302   a  (from first terminal A to second terminal B) results in a spin current (not shown) being injected up into free layer  308   a , and having a direction of polarization into the page. The spin current injected into free layer  308   a  exerts a spin orbit torque on free layer  308   a . In addition, spin-polarized electrons from electrical bias current  312  impart a spin transfer torque on the magnetization of free layer  308   a.    
     The combined effects of spin orbit torque and spin transfer torque causes the magnetization direction of free layer  308   a  to oscillate. As a result, SOT-based STO  300   c   1  has a time-varying AC resistance between first terminal A and second terminal B, with the same frequency as the oscillation frequency of magnetization direction of free layer  308   a . As a result, SOT-based STO  300   c   1  may be included as a two-terminal oscillator in an oscillator circuit, such as oscillator circuit  318  of FIG.  3 C 1  (without needing third terminal C). 
     FIG.  3 D 2  depicts a cross-sectional of another two-terminal SOT-based STO  300   c   2  that may be included in the oscillator circuit of each of nodes  202   1 ,  202   12 , . . . ,  202   nm  of  FIG. 2A . SOT-based STO  300   c   2  is identical to SOT-based STO  300   c   1  of FIG.  3 D 1 , but also includes dusting layer  316  disposed between SHE layer  304  and free layer  308   a.    
     FIG.  3 E 1  depicts a cross-sectional of another two-terminal SOT-based STO  300   d   1  that may be included in the oscillator circuit of each of nodes  202   11 ,  202   12 , . . . ,  202   nm  of  FIG. 2A . SOT-based STO  300   d   1  is similar to SOT-based STO  300   c   1  of FIG.  3 D 1 , but also includes a shunt resistance Ro in parallel with MTJ  302   a , having a first end coupled to SHE layer  304 , and a second end coupled to second terminal B. 
     Shunt resistance R 0  may be a non-magnetic material having a resistance that may be tuned to control an amount of electrical bias current  312  flowing vertically through MTJ  302   a . In an embodiment, shunt resistance R 0  may be tuned to a resistance value approximately equal to the dc resistance of MTJ  302   a , so that electrical bias current  312  divides substantially equally between MTJ  302   a  and shunt resistance R 0 . 
     FIG.  3 E 2  depicts a cross-sectional of another two-terminal SOT-based STO  300   d   2  that may be included in the oscillator circuit of each of nodes  202   1 ,  202   12 , . . . ,  202   nm  of  FIG. 2A . SOT-based STO  300   d   2  is identical to SOT-based STO  300   d   1  of FIG.  3 E 1 , but also includes dusting layer  316  disposed between SHE layer  304  and free layer  308   a.    
       FIG. 4  is a simplified diagram of a cross-point array  400  that may be used to implement an oscillatory neural network. Cross-point array  400  is an example embodiment of cross-point array  200   a  of  FIG. 2A , and may be used to implement an oscillatory neural network, such as oscillatory neural network  100   b  of  FIG. 1B . 
     Cross-point array  400  includes m rows and n columns of nodes  402   11 ,  402   12 , . . . ,  402   nm . Each column of nodes  402   11 ,  402   12 , . . . ,  402   nm  is coupled to one of n first conductive lines  404   1 ,  404   2 , . . . ,  404   n . Each row of nodes  402   11 ,  402   12 , . . . ,  402   nm  is coupled to one of m second conductive lines  406   1 ,  406   2 , . . . ,  406   m . 
     In an embodiment, each node  402   11 ,  402   12 , . . . ,  402   nm  of cross-point array  400  includes an oscillator circuit that includes an SOT-based STO  408   11 ,  408   12 , . . . ,  408   nm , respectively, and a voltage-to-current converter circuit V-I a . In embodiments, each SOT-based STO  408   11 ,  408   12 , . . . ,  408   nm  may be implemented using SOT-based STO  300   a  of FIG.  3 A 1  or SOT-based STO  300   b  of FIG.  3 B 1 . 
     In an embodiment, each oscillator circuit of nodes  402   11 ,  402   12 , . . . ,  402   nm  has a tunable/programmable intrinsic frequency. In an embodiment, the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm  may be programmed to oscillate at corresponding intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively. Thus, each node  402   11 ,  402   12 , . . . ,  402   nm  is labeled with a corresponding intrinsic frequency f 11 , f 12 , f 13 , . . . , f nm , respectively, of the oscillator circuit in the node. 
     Each SOT-based STO  408   11 ,  408   12 , . . . ,  408   nm , includes a first terminal A 11 , A 12 , . . . , A nm , respectively, a second terminal B 11 , B 12 , . . . , B nm , respectively, and a third terminal C 11 , C 12 , . . . , C nm , respectively. First terminals A 11 , A 12 , . . . , A nm  are coupled to DC input currents Idc 11 , Idc 12 , . . . , Idc nm , respectively, and are also coupled via bypass capacitors Cb to corresponding first input currents Iin 1 , Iin 2 , . . . , Iin n . Second terminals B 11 , B 12 , . . . , B nm  are each coupled to a voltage-to-current converter circuit V-I a , described in more detail below. Third terminals C 11 , C 12 , . . . , C nm  are each coupled to GROUND. 
     In an embodiment, the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm  may be programmed to corresponding intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively, based on DC input currents Idc 11 , Idc 12 , . . . , Idc nm  (and maybe some optional magnetic field), respectively, injected into the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm , respectively. 
     In an embodiment, the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm  are programmed to oscillate at particular intrinsic frequencies based on corresponding weights of an m×n array of weights, w 11 , w 12 , w 13 , . . . , w nm , respectively. For example, each of weights w 11 , w 12 , w 13 , . . . , w nm  may represent an amplitude of corresponding DC input currents Idc 11 , Idc 12 , . . . , Idc nm , respectively, injected into the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm , respectively, to program the oscillator circuits to oscillate at intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively. 
     In an embodiment, during a “programming phase,” the intrinsic frequency of each SOT-based STO  408   11 ,  408   12 , . . . ,  408   nm  is programmed using a corresponding weight of an m×n array of weights w 11 , w 12 , w 13 , . . . , w nm , respectively, each of which represents an amplitude of corresponding DC input currents Idc 11 , Idc 12 , . . . , Idc nm , respectively, injected into the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm , respectively 
     After each SOT-based STO  408   11 ,  408   12 , . . . ,  408   nm  has been programmed with weights w 11 , w 12 , w 13 , . . . , w nm , respectively, e.g., as part of training a neural network, cross-point array  400  may be used during an “inferencing phase” to perform neuromorphic computing. In an embodiment, first input currents Iin 1 , Iin 2 , . . . , Iin n  are shown applied to first conductive lines  404   1 ,  404   2 , . . . ,  404   n , respectively. 
     In an embodiment, each first input current Iin 1 , Iin 2 , . . . , Iin n  divides substantially equally into m corresponding second input currents (not shown to avoid overcrowding the drawing). In an embodiment, the magnitudes of the second input currents correspond to the associated values of input neurons x 1 , x 2 , . . . x n  of oscillatory neural network  100   b  of  FIG. 1B . 
     In an embodiment, during the inferencing phase the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm  are coupled to receive a corresponding one of the second input currents and are configured to provide corresponding oscillator output currents (not shown to avoid overcrowding the drawing). In an embodiment, each SOT-based STO  408   11 ,  408   12 , . . . ,  408   nm  oscillates at a corresponding intrinsic frequency f 11 , f 12 , f 13 , . . . , f nm , respectively. In an embodiment, the n oscillator output currents provided by the n oscillator circuits in the same row of nodes sum to form array output currents Iout 1 , Iout 2 , . . . , Iout m  at the m second conductive lines  406   1 ,  406   2 , . . . ,  406   m , respectively. 
       FIG. 5  is a simplified diagram of a cross-point array  500  that may be used to implement an oscillatory neural network. Cross-point array  500  is an example embodiment of cross-point array  200   a  of  FIG. 2A , and may be used to implement an oscillatory neural network, such as oscillatory neural network  100   b  of  FIG. 1B . 
     Cross-point array  500  includes m rows and n columns of nodes  502   11 ,  502   12 , . . . ,  502   nm . Each column of nodes  502   11 ,  502   12 , . . . ,  502   nm  is coupled to one of n first conductive lines  504   1 ,  504   2 , . . . ,  504   n . Each row of nodes  502   11 ,  502   12 , . . . ,  502   nm  is coupled to one of m second conductive lines  506   1 ,  506   2 , . . . ,  506   m . 
     In an embodiment, each node  502   11 ,  502   12 , . . . ,  502   nm  of cross-point array  500  includes an oscillator circuit that includes an SOT-based STO  508   11 ,  508   12 , . . . ,  508   nm , respectively, and a voltage-to-current converter circuit V-I b . In embodiments, each SOT-based STO  508   11 ,  508   12 , . . . ,  508   nm  may be implemented using any of SOT-based STO  300   c   1  of FIG.  3 D 1 , SOT-based STO  300   c   2  of FIG.  3 D 2 , SOT-based STO  300   d   1  of FIG.  3 E 1  and SOT-based STO  300   d   2  of FIG.  3 E 2 . 
     In an embodiment, each oscillator circuit of nodes  502   11 ,  502   12 , . . . ,  502   nm  has a tunable/programmable intrinsic frequency. In an embodiment, the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm  may be programmed to oscillate at corresponding intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively. Thus, each node  502   11 ,  502   12 , . . . ,  502   nm  is labeled with a corresponding intrinsic frequency f 11 , f 12 , f 13 , . . . , f nm , respectively, of the oscillator circuit in the node. 
     Each SOT-based STO  508   11 ,  508   12 , . . . ,  508   nm , includes a first terminal A 11 , A 12 , . . . , A nm , respectively, and a second terminal B 11 , B 12 , . . . , B nm , respectively. First terminals A 11 , A 12 , . . . , A nm  are coupled to DC input currents Idc 11 , Idc 12 , . . . , Idc nm , respectively, and are also coupled via bypass capacitors Cb to corresponding first input currents Iin 1 , Iin 2 , . . . , Iin n . Second terminals B 11 , B 12 , . . . , B nm  are each coupled to a voltage-to-current converter circuit V-I b , described in more detail below. 
     In an embodiment, the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm  may be programmed to corresponding intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively, based on DC input currents Idc 11 , Idc 12 , . . . , Idc nm  (and maybe some optional magnetic field), respectively, injected into the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm , respectively. 
     In an embodiment, the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm  are programmed to oscillate at particular intrinsic frequencies based on corresponding weights of an m×n array of weights, w 11 , w 12 , w 13 , . . . , w nm , respectively. For example, each of weights w 11 , w 12 , w 13 , . . . , w nm  may represent an amplitude of corresponding DC input currents Idc 11 , Idc 12 , . . . , Idc nm , respectively, injected into the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm , respectively, to program the oscillator circuits to oscillate at intrinsic frequencies f 11 , f 12 , f 13 , . . . , f nm , respectively. 
     In an embodiment, during a programming phase, the intrinsic frequency of each SOT-based STO  508   11 ,  508   12 , . . . ,  508   nm  is programmed using a corresponding weight of an m×n array of weights w 11 , w 12 , w 13 , . . . , w nm , respectively, each of which represents an amplitude of corresponding DC input currents Idc 11 , Idc 12 , . . . , Idc nm , respectively, injected into the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm , respectively 
     After each SOT-based STO  508   11 ,  508   12 , . . . ,  508   nm  has been programmed with weights w 11 , w 12 , w 13 , . . . , w nm , respectively, e.g., as part of training a neural network, cross-point array  500  may be used during an inferencing phase to perform neuromorphic computing. In an embodiment, first input currents Iin 1 , Iin 2 , . . . , Iin n  are shown applied to first conductive lines  504   1 ,  504   2 , . . . ,  504   n , respectively. 
     In an embodiment, each first input current Iin 1 , Iin 2 , . . . , Iin n  divides substantially equally into m corresponding second input currents (not shown to avoid overcrowding the drawing). In an embodiment, the magnitudes of the second input currents correspond to the associated values of input neurons x 1 , x 2 , . . . x n  of oscillatory neural network  100   b  of  FIG. 1B . 
     In an embodiment, during the inferencing phase the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm  are coupled to receive a corresponding one of the second input currents and are configured to provide corresponding oscillator output currents (not shown to avoid overcrowding the drawing). In an embodiment, each SOT-based STO  508   11 ,  508   12 , . . . ,  508   nm  oscillates at a corresponding intrinsic frequency f 11 , f 12 , f 13 , . . . , f nm , respectively. In an embodiment, the n oscillator output currents provided by the n oscillator circuits in the same row of nodes sum to form array output currents Iout 1 , Iout 2 , . . . , Iout m  at the m second conductive lines  506   1 ,  506   2 , . . .  506   m , respectively. 
     As described above, each node  402   11 ,  402   12 , . . . ,  402   nm  of cross-point array  400  includes an oscillator circuit that includes a voltage-to-current converter circuit V-I a .  FIG. 6A  is a circuit diagram of an example voltage-to-current converter circuit V-I a  that may be used in the oscillator circuits of cross-point array  400 . 
     In particular, voltage-to-current converter circuit V-I a  includes a resistor R having a first terminal Vaa and a second terminal coupled to a power supply terminal (e.g., VDD). First terminal Vaa is also coupled to a first terminal of a bypass capacitor Cbp. Bypass capacitor Cbp has a second terminal coupled to a first terminal of a resistor Rij, which has a second terminal Vab. 
     In an embodiment, each first terminal Vaa is coupled to a corresponding second terminal B 11 , B 12 , . . . , B nm  of SOT-based STOs  408   11 ,  408   12 , . . . ,  408   nm , respectively, of cross-point array  400  of  FIG. 4 , and each second terminal Vab is coupled to a corresponding second conductive line  406   1 ,  406   2 , . . . ,  406   m  of cross-point array  400 . 
     In an embodiment, resistor R is used as a voltage divider, and has a resistance approximately equal to the DC resistance of the SOT-based STOs of cross-point array  400  (e.g., each of SOT-based STO  408   11 ,  408   12 , . . . ,  408   nm  will have approximately the same DC resistance). Resistor Rij has a resistance value selected so that the oscillator output currents of the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm  is of approximately the same order as the second input currents coupled to the oscillator circuits of nodes  402   11 ,  402   12 , . . . ,  402   nm . Persons of ordinary skill in the art will understand that other voltage-to-current converter circuits may be used in the oscillator circuits of cross-point array  400 . 
     As described above, each node  502   11 ,  502   12 , . . . ,  502   nm  of cross-point array  500  includes an oscillator circuit that includes a voltage-to-current converter circuit V-I b .  FIG. 6B  is a circuit diagram of an example voltage-to-current converter circuit V-I b  that may be used in the oscillator circuits of cross-point array  500 . 
     In particular, voltage-to-current converter circuit V-I b  includes a resistor R having a first terminal Vba and a second terminal coupled to a GROUND. First terminal Vba is also coupled to a first terminal of a bypass capacitor Cbp. Bypass capacitor Cbp has a second terminal coupled to a first terminal of a resistor Rij, which has a second terminal Vbb. 
     In an embodiment, each first terminal Vba is coupled to a corresponding second terminal B 11 , B 12 , . . . , B nm  of SOT-based STOs  508   11 ,  508   12 , . . . ,  508   nm , respectively, of cross-point array  500  of  FIG. 5 , and each second terminal Vbb is coupled to a corresponding second conductive line  506   1 ,  506   2 , . . . ,  506   m  of cross-point array  500 . 
     In an embodiment, resistor R is used as a voltage divider, and has a resistance approximately equal to the DC resistance of the SOT-based STOs of cross-point array  500  (e.g., each of SOT-based STO  508   11 ,  508   12 , . . . ,  508   nm  will have approximately the same DC resistance). Resistor Rij has a resistance value selected so that the oscillator output currents of the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm  is of approximately the same order as the second input currents coupled to the oscillator circuits of nodes  502   11 ,  502   12 , . . . ,  502   nm . Persons of ordinary skill in the art will understand that other voltage-to-current converter circuits may be used in the oscillator circuits of cross-point array  500 . 
     In the examples described above, cross-point arrays  400  ( FIG. 4 ) and  500  ( FIG. 5 ) have been used to implement a single layer of an artificial neural network  100   b  that includes input neurons x 1 , x 2 , x 3 , . . . , x n , output neurons y 1 , y 2 , y 3 , . . . , y m , and synapses  102   b  that connect input neurons x 1 , x 2 , x 3 , . . . , x n  to output neurons y 1 , y 2 , y 3 , . . . , y m . In other embodiments, multi-layer artificial neural networks may be implemented by cascading cross-point arrays, so that outputs of a first cross-point array are used as inputs to a second cross-point array, and so on. 
     One embodiment includes an apparatus that includes an array including m rows and n columns of nodes. Each column of nodes is coupled to one of n first conductive lines, and each row of nodes is coupled to one of m second conductive lines. Each node of the m rows and n columns of nodes includes a spin orbit torque-based spin torque oscillator circuit configured to oscillate at a corresponding intrinsic frequency. The spin orbit torque-based spin torque oscillator circuits are configured to generate m output signals at the m second conductive lines upon application of n input signals to corresponding n first conductive lines. The n input signals correspond to an n-element input vector, and each input signal includes a corresponding input signal frequency. Each of the m output signals include frequency domain components at the input signal frequencies. The magnitudes of the frequency domain components at the input signal frequencies depends on a degree of synchronization between the input signal frequencies and the intrinsic frequencies. 
     One embodiment includes an apparatus including a cross-point array that includes a plurality of spin orbit torque-based spin torque oscillator circuits configured to store synaptic weights of an artificial neural network, a plurality of first conductive lines coupled to the spin orbit torque-based spin torque oscillator circuits, and a plurality of second conductive lines coupled to the spin orbit torque-based spin torque oscillator circuits. In response to a plurality of input currents coupled to the plurality of first conductive lines, the spin orbit torque-based spin torque oscillator circuits generate output currents at the plurality of second conductive lines representing outputs of the artificial neural network. 
     One embodiment includes a method including programming each of a first plurality of spin orbit torque-based spin torque oscillator circuits to oscillate at a corresponding intrinsic frequency, generating n input currents corresponding to an n-element input vector, each input current comprising a corresponding input signal frequency, and coupling the n input currents to the first plurality of spin orbit torque-based spin torque oscillator circuits to generate m output currents. Each output current includes frequency domain components at the input signal frequencies, nchronization between the input signal frequencies and the intrinsic frequencies. Magnitudes of the frequency domain components at the input signal frequencies depend on a degree of synchronization between the input signal frequencies and the intrinsic frequencies. 
     For purposes of this document, reference in the specification to “an embodiment,” “one embodiment,” “some embodiments,” or “another embodiment” may be used to describe different embodiments or the same embodiment. 
     For purposes of this document, a connection may be a direct connection or an indirect connection (e.g., via one or more other parts). In some cases, when an element is referred to as being connected or coupled to another element, the element may be directly connected to the other element or indirectly connected to the other element via intervening elements. When an element is referred to as being directly connected to another element, then there are no intervening elements between the element and the other element. Two devices are “in communication” if they are directly or indirectly connected so that they can communicate electronic signals between them. 
     For purposes of this document, the term “based on” may be read as “based at least in part on.” 
     For purposes of this document, without additional context, use of numerical terms such as a “first” object, a “second” object, and a “third” object may not imply an ordering of objects, but may instead be used for identification purposes to identify different objects. 
     For purposes of this document, the term “set” of objects may refer to a “set” of one or more of the objects. 
     The foregoing detailed description has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. The described embodiments were chosen in order to best explain the principles of the proposed technology and its practical application, to thereby enable others skilled in the art to best utilize it in various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope be defined by the claims appended hereto.