Patent Publication Number: US-2021184107-A1

Title: Semiconductor structure and fabrication method thereof

Description:
CROSS-REFERENCES TO RELATED APPLICATION 
     This application claims the priority of Chinese Patent Application No. 201911267728.X, filed on Dec. 11, 2019, the content of which is incorporated herein by reference in its entirety. 
     TECHNICAL FIELD 
     The present disclosure generally relates to the field of semiconductor manufacturing and, more particularly, to a semiconductor structure and a fabrication method thereof. 
     BACKGROUND 
     An MRAM (i.e., Magnetic Random-Access Memory) is a non-volatile magnetic random-access memory. The MRAM has high-speed read and write capabilities of a static random-access memory (SRAM), high integration of a dynamic random-access memory (DRAM), and power consumption much lower than the DRAM. Compared with a flash memory (Flash), performance of the MRAM will not degrade as use time increases. Due to the above-mentioned characteristics, the MRAM is called as a universal memory and is considered to be able to replace the SRAM, the DRAM, an electrically erasable programmable read-only memory (EEPROM), and the Flash. 
     Different from existing random-access memory chip manufacturing technologies, data in the MRAM is not stored in a form of an electric charge or an electric current, but is stored in a magnetic state, which is sensed by measuring a resistance without disturbing the magnetic state. The MRAM uses a magnetic tunnel junction (MTJ) structure for data storage. An MRAM cell may include a transistor (1T) and a magnetic tunnel junction (MTJ) to form a memory cell. The MTJ structure at least includes two electromagnetic layers and an insulating layer for isolating the two electromagnetic layers. Electric current vertically flows or “passes” from one of the two electromagnetic layers to another of the two electromagnetic layers through the insulating layer. One of the two electromagnetic layers is a fixed magnetic layer, which fixes an electrode in one alternative direction through a strong fixed field. Another of the two electromagnetic layers is a freely rotatable magnetic layer, which holds an electrode in one of alternative directions. 
     However, performance of the magnetic tunnel junction prepared by existing technologies is poor. 
     SUMMARY 
     One aspect of the present disclosure provides a semiconductor structure. The semiconductor structure includes: a substrate and a magnetic tunnel junction on the substrate. The magnetic tunnel junction includes: a bottom electromagnetic structure on the substrate, an insulating layer on the bottom electromagnetic structure, and a top electromagnetic structure on the insulating layer. The semiconductor structure further includes a sidewall tunneling layer on sidewall surfaces of the magnetic tunnel junction. 
     Optionally, the sidewall tunneling layer is made of a material including boron nitride, magnesium oxide, or aluminum oxide. 
     Optionally, a thickness of the sidewall tunneling layer ranges from about 1 angstrom to about 20 nanometers. 
     Optionally, the thickness of the sidewall tunneling layer ranges from about 1 angstrom to about 5 nanometers. 
     Optionally, a conductive layer is provided in the substrate, and the substrate exposes a surface of the conductive layer. 
     Optionally, the bottom electromagnetic structure includes: a lower electrode layer on the substrate; a lower composite layer on the lower electrode layer; and a lower electromagnetic layer on the lower composite layer. 
     Optionally, the lower electrode layer is made of a material including copper, tungsten, aluminum, titanium, titanium nitride, tantalum, or a combination thereof, the lower composite layer includes a plurality of conductive layers overlapped each other, and each layer of the plurality of conductive layers is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof; and the lower electromagnetic layer is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. 
     Optionally, the top electromagnetic structure includes: an upper electromagnetic layer on the insulating layer; an upper composite layer on the upper electromagnetic layer; and an upper electrode layer on the upper composite layer. 
     Optionally, the upper electrode layer is made of a material including copper, tungsten, aluminum, titanium, titanium nitride, tantalum, or a combination thereof; the upper composite layer includes a plurality of conductive layers overlapped each other, and each layer of the plurality of conductive layers is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof; and the upper electromagnetic layer is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. 
     Optionally, the insulating layer is made of a material including magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide, zirconium dioxide, or a combination thereof. 
     Optionally, the semiconductor structure further includes: a protective layer on sidewall surfaces of the sidewall tunneling layer. 
     Optionally, the protective layer is made of a material including silicon oxide, silicon nitride, silicon oxynitride, silicon nitride boride, silicon oxynitride, or silicon oxynitride. 
     Another aspect of the present disclosure provides a method for forming the above-mentioned semiconductor structure, including: providing a substrate; and forming a magnetic tunnel junction on the substrate. The magnetic tunnel junction includes: a bottom electromagnetic structure on the substrate, an insulating layer on the bottom electromagnetic structure, and a top electromagnetic structure on the insulating layer. The method further includes forming a sidewall tunneling layer on sidewall surfaces of the magnetic tunnel junction. 
     Optionally, forming the sidewall tunneling layer includes: forming a magnetic conductive material film on the substrate, and a top surface and the sidewall surfaces of the magnetic tunnel junction; and etching back the magnetic conductive material film, until a surface of the substrate and the top surface of the magnetic tunnel junction are exposed, to form the sidewall tunneling layer on the surface of the substrate. 
     Optionally, forming the magnetic conductive material film includes a physical vapor deposition process, a chemical vapor deposition process, an atomic layer deposition process, a plasma atomic layer deposition process, or a combination thereof. 
     Optionally, forming the magnetic tunnel junction includes: forming a bottom electromagnetic material film on the substrate; forming an insulating film on the bottom electromagnetic material film; forming a top electromagnetic material film on the insulating film; forming a patterned layer on the top electromagnetic material film; and using the patterned layer as a mask, etching the bottom electromagnetic material film, the insulating film, and the top electromagnetic material film, until the surface of the substrate is exposed, so that the etched bottom electromagnetic material film forms the bottom electromagnetic structure, the etched insulating film forms the insulating layer, and the etched top electromagnetic material film forms the top electromagnetic structure, to form the magnetic tunnel junction on the substrate. 
     Optionally, forming the insulating film includes: forming an insulating material film on the bottom electromagnetic material film; and annealing the insulating material film to form the insulating film. 
     Optionally, forming the insulating material film includes a physical vapor deposition process, a chemical vapor deposition process, an atomic layer deposition process, or a combination thereof. 
     Compared with existing technologies, the technical solutions of the embodiments of the present disclosure have following beneficial effects. 
     In the semiconductor structure provided by the technical solutions of the present disclosure, the sidewall surfaces of the magnetic tunnel junction have the sidewall tunneling layer. The magnetic tunnel junction includes: the bottom electromagnetic structure on the substrate, the insulating layer on the bottom electromagnetic layer, and the top electromagnetic structure on the insulating layer. Since spinning electrons can tunnel through the sidewall tunneling layer, when the magnetic tunnel junction is in an on state, spinning electrons in the bottom electromagnetic structure can tunnel into the top electromagnetic structure through the insulating layer, or spinning electrons in the top electromagnetic structure can tunnel through the insulating layer into the bottom electromagnetic structure, and spinning electrons between the bottom electromagnetic structure and the top electromagnetic structure can also tunnel through the sidewall tunneling layer on the sidewall surfaces of the magnetic tunnel junction, thereby helping to reduce an on-resistance and improving the performance of the semiconductor structure. 
     In the method for forming the semiconductor structure provided by the technical solutions of the present disclosure, the sidewall tunneling layer is formed on the sidewall surfaces of the magnetic tunnel junction. The magnetic tunnel junction includes: the bottom electromagnetic structure on the substrate, the insulating layer on the bottom electromagnetic structure, and the top electromagnetic structure on the insulating layer. Since spinning electrons can tunnel through the sidewall tunneling layer, when the magnetic tunnel junction is in the on state, spinning electrons in the bottom electromagnetic structure can tunnel into the top electromagnetic structure through the insulating layer, or spinning electrons in the top electromagnetic structure can tunnel through the insulating layer into the bottom electromagnetic structure, and spinning electrons between the bottom electromagnetic structure and the top electromagnetic structure can also tunnel through the sidewall tunneling layer on the sidewall surfaces of the magnetic tunnel junction, thereby helping to reduce the on-resistance and improving the performance of the formed semiconductor structure. 
     Further, since forming the insulating material film includes the physical vapor deposition process, the chemical vapor deposition process, the atomic layer deposition process, or the combination thereof. A material formed by a deposition process is a material including an amorphous material or a polycrystalline material. By annealing the insulating material film, a high temperature can transform the material including the amorphous material or the polycrystalline material into a single crystal material. As such, performance of the formed insulating film is improved, and the performance of the formed semiconductor structure is thus improved. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The following accompanying drawings are merely examples for illustrative purposes according to various disclosed embodiments and are not intended to limit the scope of the present disclosure. 
         FIG. 1  is a schematic structural diagram of a semiconductor structure; 
         FIGS. 2 to 10  illustrate structures corresponding to certain stages during an exemplary fabrication process of a semiconductor structure consistent with various disclosed embodiments of the present disclosure; and 
         FIG. 11  illustrates an exemplary fabrication process of a semiconductor structure consistent with various disclosed embodiments of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     Reference will now be made in detail to exemplary embodiments of the present disclosure, which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the accompanying drawings to refer to the same or like parts. 
       FIG. 1  is a schematic structural diagram of a semiconductor structure. 
     Referring to  FIG. 1 , a semiconductor structure includes: a substrate  100 ; a magnetic tunnel junction  110  on the substrate  100 ; and a protective layer  120  on sidewall surfaces of the magnetic tunnel junction  110 . The magnetic tunnel junction includes: a bottom electromagnetic structure  111  on the substrate  100 , an insulating layer  112  on the bottom electromagnetic structure  111 , and a top electromagnetic structure  113  on the insulating layer  112 . 
     The protective layer  120  can protect the sidewall surfaces of the magnetic tunnel junction, reduce influence of subsequent processes on materials of the magnetic tunnel junction  110 , and help maintain integrity of the magnetic tunnel junction  110 . The performance of the semiconductor structure is improved. 
     However, spinning electrons in the bottom electromagnetic structure  111  and the top electromagnetic structure  113  may not be able to tunnel through the protective layer  120 . As a result, an on-resistance of the magnetic tunnel junction  110  is still large, and the performance of the such semiconductor structure needs to be improved. 
     Embodiments of the present disclosure provide a semiconductor structure, including: a substrate; a magnetic tunnel junction on the substrate; and a sidewall tunneling layer on sidewall surfaces of the magnetic tunnel junction. The magnetic tunnel junction includes: a bottom electromagnetic structure on the substrate, an insulating layer on the bottom electromagnetic structure, and a top electromagnetic structure on the insulating layer. The performance of the semiconductor structure is thus improved. 
     To make the above objectives, features and beneficial effects of the present disclosure clearer and more understandable, various exemplary embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. 
       FIGS. 2 to 10  illustrate structures corresponding to certain stages during an exemplary fabrication process of a semiconductor structure consistent with various disclosed embodiments of the present disclosure. 
       FIG. 11  illustrates an exemplary fabrication process of a semiconductor structure consistent with various disclosed embodiments of the present disclosure. 
     Referring to  FIG. 2 , a substrate  200  is provided, according to S 01  in  FIG. 11 . 
     In one embodiment, a conductive layer  210  is provided in the substrate  200 , and the substrate  200  exposes a surface of the conductive layer  210 . 
     In one embodiment, the substrate  200  includes: a semiconductor substrate (not shown in  FIG. 2 ) and a dielectric layer (not shown in  FIG. 2 ) on the semiconductor substrate, that the conductive layer  210  is in the dielectric layer. 
     The semiconductor substrate is made of a semiconductor material. In one embodiment, the semiconductor substrate is made of silicon. In other embodiments, the semiconductor substrate is made of a material including silicon carbide, silicon germanium, a compound semiconductor composed of III-V group elements, silicon-on-insulator (SOI), or germanium-on-insulator. 
     In one embodiment, device structures are provided in the semiconductor substrate, and the device structures include structures including PMOS transistors, NMOS transistors, CMOS transistors, resistors, capacitors, inductors, or a combination thereof. 
     The dielectric layer is made of a material including silicon oxide, a low-K (referring to a relative dielectric constant greater than or equal to about 2.5 and less than about 3.9) dielectric material, or an ultra-low-K (referring to a relative dielectric constant less than or equal to about 2.5) dielectric material. 
     In one embodiment, the dielectric layer is made of silicon oxide. 
     The conductive layer  210  is made of a material including copper, tungsten, aluminum, titanium, titanium nitride, tantalum, or a combination thereof. 
     In one embodiment, the conductive layer  210  is made of copper. 
     Next, a magnetic tunnel junction is formed on the substrate, according to S 02  in  FIG. 11 . The magnetic tunnel junction includes: a bottom electromagnetic structure on the substrate, an insulating layer on the bottom electromagnetic structure, and a top electromagnetic structure on the insulating layer.  FIGS. 3 to 7  can be referred to for alternative processes of forming the magnetic tunnel junction. 
     Referring to  FIG. 3 , a bottom electromagnetic material film  220  is formed on the substrate  200 . 
     In one embodiment, the bottom electromagnetic material film  220  is formed on the substrate  200  and the surface of the conductive layer  210 . 
     In one embodiment, the bottom electromagnetic material film  220  includes, a lower electrode film  221  on the substrate  200 , a lower composite film  222  on the lower electrode film  221 , and a lower electromagnetic film  223  on the lower composite film  222 . 
     The lower electrode film  221  is made of a material including copper, tungsten, aluminum, titanium, titanium nitride, tantalum, or a combination thereof. 
     In one embodiment, the lower electrode film  221  is made of tantalum. 
     The lower composite film  222  includes a plurality of conductive layers overlapped each other (not shown in  FIG. 3 ), and each layer of the plurality of conductive layers is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. 
     In one embodiment, the lower composite film  222  includes two conductive layers overlapped each other (not shown in  FIG. 3 ), one layer of the two conductive layers is made of platinum, and another layer of the two conductive layers is made of cobalt. 
     In other embodiments, the plurality of conductive layers may also be made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. 
     The lower electromagnetic film  223  is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. 
     In one embodiment, the lower electromagnetic film  223  is made of cobalt iron boron. 
     After the bottom electromagnetic material film is formed, an insulating film is formed on the bottom electromagnetic material film.  FIGS. 4 to 5  can be referred to for alternative processes of forming the insulating film. 
     Referring to  FIG. 4 , an insulating material film  230  is formed on the bottom electromagnetic material film  220 . 
     The insulating material film  230  is used to subsequently form an insulating film. 
     The insulating material film  230  is made of a material including magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide, zirconium dioxide, or a combination thereof. 
     In one embodiment, the insulating material film  230  is made of magnesium oxide. 
     A thickness of the insulating material film  230  ranges, for example, from about 1 angstrom to about 5 nanometers. 
     Forming the insulating material film  230  includes a physical vapor deposition process, a chemical vapor deposition process, an atomic layer deposition process, or a combination thereof. 
     In one embodiment, the insulating material film  230  formed by the physical vapor deposition process is made of amorphous magnesium oxide. 
     Referring to  FIG. 5 , the insulating material film  230  is annealed to form an insulating film  231 . 
     The insulating film  231  is formed of the insulating material film  230 , so that the insulating film  231  is made of a material including magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide, zirconium dioxide, or a combination thereof. 
     In one embodiment, the insulating film  231  is made of magnesium oxide. 
     Because forming the insulating material film  230  includes the physical vapor deposition process, the chemical vapor deposition process, the atomic layer deposition process, or the combination thereof, a material formed by a deposition process is a material including an amorphous material or a polycrystalline material. By annealing the insulating material film  230 , a high temperature can transform the material including the amorphous material or the polycrystalline material into a single crystal material, so that performance of the insulating film  231  formed is improved and thus performance of a formed semiconductor structure is improved. 
     In one embodiment, the insulating film  231  made of the single crystal magnesium oxide material serves as a non-magnetic insulating layer in the middle of a subsequently formed magnetic tunnel junction, which is beneficial to improving performance of the formed magnetic tunnel junction. 
     A temperature range of the annealing treatment is, for example, from about 300 degrees Celsius to about 400 degrees Celsius. 
     A significance of selecting the temperature range is that: if a temperature is greater than about 400 degrees Celsius, the temperature is too high, which is likely to cause high temperature effects on a material of the bottom electromagnetic material film  220  and devices in the substrate  200 , resulting in poor performance of the formed semiconductor structure; and if the temperature is less than about 300 degrees Celsius, the temperature is too low, which is not conducive to transforming the material including the amorphous material or the polycrystalline material into the single crystal material, resulting in poor performance of the insulating film  231  formed. 
     Referring to  FIG. 6 , a top electromagnetic material film  240  is formed on the insulating film  231 . 
     The top electromagnetic material film  240  includes: an upper electromagnetic film  241  on the insulating film  231 , an upper composite film  242  on the upper electromagnetic film  241 , and an upper electrode film  243  on the upper composite film  242 . 
     The upper electromagnetic film  241  and the lower electromagnetic film  223  are made of a same material, which will not be repeated here. 
     The upper composite film  242  and the lower composite film  222  are made of a same material, which will not be repeated here. 
     The upper electrode film  243  and the lower electrode film  221  are made of a same material, which will not be repeated here. 
     Referring to  FIG. 7 , after forming the top electromagnetic material film  240 , a patterned layer (not shown in  FIG. 7 ) is formed on the top electromagnetic material film  240 , and the patterned layer exposes a portion of the top electromagnetic material film  240 . Using the patterned layer as a mask, the bottom electromagnetic material film  220 , the insulating film  231 , and the top electromagnetic material film  240  are etched until a surface of the substrate  200  is exposed, so that the etched bottom electromagnetic material film  220  forms a bottom electromagnetic structure  261 , the etched insulating film  231  forms an insulating layer  262 , and the etched top electromagnetic material film  240  forms a top electromagnetic structure  263 , to form a magnetic tunnel junction  260  on the substrate  200 . 
     The bottom electromagnetic structure  261  includes: a lower electrode layer (not shown in  FIG. 7 ) on the substrate  200 ; a lower composite layer (not shown in  FIG. 7 ) on the lower electrode layer; and a lower electromagnetic layer (not shown in  FIG. 7 ) on the lower composite layer. 
     The top electromagnetic structure  263  includes: an upper electromagnetic layer on the insulating layer; an upper composite layer on the upper electromagnetic layer; and an upper electrode layer on the upper composite layer. 
     In one embodiment, the patterned layer covers the top electromagnetic material film  240  on the conductive layer  210 , so that after the patterning process, a bottom of the formed magnetic tunnel junction  260  is in contact with the surface of the conductive layer  210  to achieve electrical connection. 
     In one embodiment, after forming the magnetic tunnel junction  260 , the method further includes: removing the patterned layer. 
     After the magnetic tunnel junction is formed, a sidewall tunneling layer is formed on sidewall surfaces of the magnetic tunnel junction, according to S 03  in  FIG. 11 .  FIGS. 8 to 9  can be referred to for alternative processes of forming the sidewall tunneling layer. 
     Referring to  FIG. 8 , a magnetic conductive material film  270  is formed on the substrate  200 , and a top surface and sidewall surfaces of the magnetic tunnel junction  260 . 
     The magnetic conductive material film  270  provides a material for subsequent formation of a sidewall tunneling layer. 
     Forming the magnetic conductive material film  270  includes a physical vapor deposition process, a chemical vapor deposition process, an atomic layer deposition process, a plasma atomic layer deposition process, or a combination thereof. 
     The magnetic conductive material film  270  is made of a material including boron nitride, magnesium oxide, or aluminum oxide. 
     In one embodiment, the magnetic conductive material film  270  is made of boron nitride. 
     Referring to  FIG. 9 , the magnetic conductive material film  270  is etched back until the surface of the substrate  200  and the top surface of the magnetic tunnel junction  260  are exposed, to form a sidewall tunneling layer  271  on the surface of the substrate  200 . 
     A thickness of the sidewall tunneling layer  271  ranges from about 1 angstrom to about 20 nanometers. 
     A preferred range of the thickness of the sidewall tunneling layer  271  is from about 1 angstrom to about 5 nanometers. 
     The thickness refers to a dimension perpendicular to sidewalls of the magnetic tunnel junction  260 . 
     A reason for the thickness of the sidewall tunneling layer  271  to be in the preferred range of about 1 angstrom to about 5 nanometers is that: if the thickness of the sidewall tunneling layer  271  is less than about 1 angstrom, magnetic conductivity effect of the sidewall tunneling layer  271  is not easy to be controlled and is easily affected by an outside world, resulting in poor stability of the magnetic tunnel junction  260 ; and if the thickness of the sidewall tunneling layer  271  is greater than about 5 nanometers, a larger current is required to make the sidewall tunneling layer  271  to have a tunneling and conduction function, resulting in high requirements on device performance. 
     Since the sidewall tunneling layer  271  is formed by etching back the magnetic conductive material film  270 , the sidewall tunneling layer  271  is made of a material including boron nitride, magnesium oxide, or aluminum oxide, and the sidewall tunneling layer  271  formed has a magnetic conductivity. 
     In one embodiment, the sidewall tunneling layer  271  is made of boron nitride. Not only the sidewall tunneling layer  271  made of boron nitride has the magnetic conductivity, but also the magnetic tunnel junction  260  will not be oxidized during forming the sidewall tunneling layer  271 , which further improves the performance of the formed semiconductor structure. 
     The magnetic tunnel junction  260  includes: the bottom electromagnetic structure  261  on the substrate  200 , the insulating layer  262  on the bottom electromagnetic structure  261 , and the top electromagnetic structure  263  on the insulating layer  262 . By forming the sidewall tunneling layer  271  on the sidewall surfaces of the magnetic tunnel junction  260 , since spinning electrons can tunnel through the sidewall tunneling layer  271 , when the magnetic tunnel junction  260  is in an on state, spinning electrons in the bottom electromagnetic structure  261  can tunnel into the top electromagnetic structure  263  through the insulating layer  262 , or spinning electrons in the top electromagnetic structure  263  can tunnel into the bottom electromagnetic structure  261  through the insulating layer  262 . Spinning electrons between the bottom electromagnetic structure  261  and the top electromagnetic structure  263  can also tunnel through the sidewall tunneling layer  271  on the sidewall surfaces of the magnetic tunnel junction  260 , thereby helping to reduce an on-resistance and improving the performance of the semiconductor structure. 
     Referring to  FIG. 10 , after forming the sidewall tunneling layer  271 , a protective layer  280  is formed on sidewall surfaces of the sidewall tunneling layer  271 . 
     Forming the protective layer  280  includes: forming a protective material film (not shown in  FIG. 10 ) on the surface of the substrate  200 , the top surface of the magnetic tunnel junction  260 , and a top surface and the sidewall surfaces of the sidewall tunneling layer  271 ; and etching back the protective material film until the surface of the substrate  200  and the top surface of the magnetic tunnel junction are exposed, to form the protective layer  280  on the sidewall surfaces of the sidewall tunneling layer  271 . 
     The protective layer  280  is made of a material including silicon oxide, silicon nitride, silicon carbide nitride, silicon nitride boride, silicon oxynitride, or silicon oxynitride. 
     In one embodiment, the protective layer  280  is made of silicon nitride. 
     The protective layer  280  is used to protect the magnetic tunnel junction  260  and the sidewall tunneling layer  271 , reduce impact on the magnetic tunnel junction  260  and the sidewall tunneling layer  271  from subsequent processes, and help improve integrity of the magnetic tunnel junction  260  and the sidewall tunneling layer  271 . Stability of the formed semiconductor structure is improved. 
     Correspondingly, the embodiments of the present disclosure also provide a semiconductor structure formed by the above method. Referring to  FIG. 10 , the semiconductor structure includes: a substrate  200 ; a magnetic tunnel junction  260  on the substrate  200 ; and a sidewall tunneling layer  271  on sidewall surfaces of the magnetic tunnel junction  260 . The magnetic tunnel junction  260  includes a bottom electromagnetic structure  261  on the substrate  200 , an insulating layer  262  on the bottom electromagnetic structure  261 , and a top electromagnetic structure  263  on the insulating layer  262 . 
     Since the sidewall surfaces of the magnetic tunnel junction  260  have the sidewall tunneling layer  271 , spinning electrons can tunnel through the sidewall tunneling layer  271 . When the magnetic tunnel junction  260  is in the on state, spinning electrons in the bottom electromagnetic structure  261  can tunnel into the top electromagnetic structure  263  through the insulating layer  262 , or spinning electrons in the top electromagnetic structure  263  can tunnel into the bottom electromagnetic structure  261  through the insulating layer  262 . Spinning electrons between the bottom electromagnetic structure  261  and the top electromagnetic structure  263  can also tunnel through the sidewall tunneling layer  271  on the sidewall surfaces of the magnetic tunnel junction  260 , which is beneficial to reducing the on-resistance and improving the performance of the semiconductor structure. 
     A detailed description is shown below with reference to the accompanying drawings. 
     In one embodiment, a conductive layer  210  is provided in the substrate  200 , and the substrate  200  exposes a surface of the conductive layer  210 . 
     The sidewall tunneling layer  271  is made of a material including boron nitride, magnesium oxide, or aluminum oxide. 
     A thickness of the sidewall tunneling layer  271  ranges from about 1 angstrom to about 20 nanometers. 
     In one embodiment, the thickness of the sidewall tunneling layer  271  is in a preferred range from about 1 angstrom to about 5 nanometers. 
     The bottom electromagnetic structure  261  includes: a lower electrode layer (not shown in  FIG. 10 ) on the substrate  200 ; a lower composite layer (not shown in  FIG. 10 ) on the lower electrode layer; and a lower electromagnetic layer (not shown in  FIG. 10 ) on the lower composite layer. 
     The lower electrode layer is made of a material including copper, tungsten, aluminum, titanium, titanium nitride, tantalum, or a combination thereof. The lower composite layer includes a plurality of conductive layers overlapped each other, and each layer of the plurality of conductive layers is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. The lower electromagnetic layer is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. 
     The top electromagnetic structure  263  includes: an upper electromagnetic layer (not shown in  FIG. 10 ) on the insulating layer  262 ; an upper composite layer (not shown in FIG.  10 ) on the upper electromagnetic layer; and an upper electrode layer (not shown in  FIG. 10 ) on the upper composite layer. 
     The upper electrode layer is made of a material including copper, tungsten, aluminum, titanium, titanium nitride, tantalum, or a combination thereof. The upper composite layer includes a plurality of conductive layers overlapped each other, and each layer of the plurality of conductive layers is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. The upper electromagnetic layer is made of a material including iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron, lanthanum strontium manganese oxygen, or a combination thereof. 
     The insulating layer  262  is made of a material including magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide, zirconium dioxide, or a combination thereof. 
     In one embodiment, the semiconductor structure further includes a protective layer  280  on sidewall surfaces of the sidewall tunneling layer  271 . 
     The protective layer  280  is made of a material including silicon oxide, silicon nitride, silicon carbide nitride, silicon nitride boride, silicon oxynitride, or silicon oxynitride. 
     The embodiments disclosed herein are exemplary only. Other applications, advantages, alternations, modifications, or equivalents to the disclosed embodiments that are obvious to those skilled in the art are intended to be encompassed within the scope of the present disclosure.