Patent Publication Number: US-11662618-B2

Title: Counter substrate for a liquid crystal display device comprising first and second light shielding layers that are layered while contacting each other at a crossing part

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 16/255,337, filed on Jan. 23, 2019, which application is based upon and claims the benefit of priority from Japanese Patent Application No. 2018-009097, filed Jan. 23, 2018, the entire contents of which are incorporated herein by reference. 
    
    
     FIELD 
     Embodiments described herein relate generally to a display device and a display device substrate (color filter substrate). 
     BACKGROUND 
     In recent years, display devices with higher definition are demanded. Display devices include, for example, a light shielding layer formed in a lattice shape, and openings are formed in the lattice. When definition of the devices is increased, forming a light shielding layer with properly shaped openings is a challenge. 
     SUMMARY 
     The present application relates generally to a display device and a display device substrate. 
     According to one embodiment, a display device including a display function layer between a first substrate and a second substrate which are opposed to each other, wherein the second substrate includes, in a display area in which an image is displayed, a first light shielding layer extending in a first direction and a second light shielding layer extending in a second direction crossing the first direction, and the first light shielding layer and the second light shielding layer are layered while contacting each other at a crossing part. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a plan view of an example of the structure of a display panel of a display device of an embodiment. 
         FIG.  2    is a plan view of an example of the structure of a second substrate. 
         FIG.  3    is a perspective view of an example of a layering condition of a horizontal light shielding layer and a vertical light shielding layer. 
         FIG.  4    is a plan view of an example of the structure of a first substrate. 
         FIG.  5    is a cross-sectional view of the display device, taken along line V-V of  FIG.  2   . 
         FIG.  6    is a cross-sectional view of the display device, taken along line VI-VI of  FIG.  2   . 
         FIG.  7    is a schematic view of an example of a manufacturing process of the second substrate. 
         FIG.  8    is a schematic view of an example of the manufacturing process of the second substrate. 
         FIG.  9    is a schematic view of an example of the manufacturing process of the second substrate. 
         FIG.  10    is a schematic view of an example of the manufacturing process of the second substrate. 
         FIG.  11    is a schematic view of an example of the manufacturing process of the second substrate. 
         FIG.  12    is a cross-sectional view of another example of a display device of the embodiment. 
         FIG.  13    is a cross-sectional view of another example of the display device of the embodiment. 
         FIG.  14    is a cross-sectional view of another example of the display device of the embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     In general, according to one embodiment, a display device comprises a display function layer between a first substrate and a second substrate which are opposed to each other, wherein the second substrate includes, in a display area in which an image is displayed, a first light shielding layer extending in a first direction and a second light shielding layer extending in a second direction crossing the first direction, and the first light shielding layer and the second light shielding layer are layered while contacting each other at a crossing part. 
     According to another embodiment, a display device comprises a display function layer between a first substrate and a polarizer which are opposed to each other, the display device comprising a first light shielding layer extending in a first direction and a second light shielding layer extending in a second direction crossing the first direction between the display function layer and the polarizer, wherein the first light shielding layer and the second light shielding layer are layered to contact each other at a crossing part. 
     According to another embodiment, a display device substrate comprises a first light shielding layer extending in a first direction and a second light shielding layer extending in a second direction crossing the first direction, wherein the first light shielding layer and the second light shielding layer are layered at a crossing part. 
     Hereinafter, embodiments will be explained with reference to accompanying drawings. Note that, the disclosure is an example, and the contents of the following description do not limit the scope of the invention. Variations which will easily be conceivable by a person having ordinary skill in the art are naturally encompassed within the scope of the invention. In the figures, dimensions of components may be depicted schematically as compared to actual models of the invention for easier understanding. Elements corresponding to each other between different figures will be referred to by the same reference number, and explanation considered redundant may be omitted. 
     In each embodiment, a liquid crystal display device is disclosed as an example of the display device. The liquid crystal display device can be used in various devices such as a virtual reality (VR) viewer, smartphone, tablet terminal, mobile phone, clamshell personal computer, in-car device, and gaming console. 
       FIG.  1    is a plan view of an example of the structure of a display panel PNL of a display device DSP of the present embodiment. In the figure, a first direction X, second direction Y, and third direction Z are orthogonal to each other; however, they may cross at an angle other than the right angle. Seeing an X-Y plane defined by the first direction X and the second direction Y along the third direction Z will be referred to as plan view. Hereinafter, a direction toward the tip of the arrow of the third direction Z will be defined as up (above), and the opposite direction thereof will be defined as down (below). Furthermore, a length in the third direction Z will be defined as a thickness. 
     In a plan view, the display panel PNL is formed as, for example, a substantial rectangle. Note that the display panel PNL may be formed as a round shape with round corners. The display panel PNL includes, for example, a first substrate SUB 1 , second substrate SUB 2  opposed to the first substrate SUB 1 , and display function layer (as described later, liquid crystal layer LC in the present embodiment) held between the first substrate SUB 1  and the second substrate SUB 2 . The first substrate SUB 1  and the second substrate SUB 2  are adhered by a sealant SL while a certain gap is formed therebetween. The liquid crystal layer LC is filled in a space defined by the first and second substrates SUB 1  and SUB 2  and the sealant SL. The display panel PNL includes a display area DA inside of which is surrounded by the sealant SL to display an image. The display area DA is, for example, substantially rectangular. Note that the display area DA may be polygonal or round. Furthermore, the display panel PNL includes a non-display area NDA outside the display area DA. 
     The display panel PNL includes a plurality of sub-pixels PX in the display area DA. A sub-pixel is a minimum unit to be individually controlled by an image signal, and for example, is disposed in an area including a switching element arranged in a position where a gate line and a source line cross, as described later. Furthermore, a main pixel includes a plurality of sub-pixels. For example, one main pixel includes a red sub-pixel, green sub-pixel, and blue sub-pixel. In another example, one main pixel includes a red sub-pixel, green sub-pixel, blue sub-pixel, and white sub-pixel. The main pixel corresponds to a minimum unit of an image displayed in the display area DA. The sub-pixels PX are arranged in a matrix in the display area DA. 
     The display panel PNL includes, in the display area DA, a gate line G extending in the first direction X, a source line S extending in the second direction Y, a switching element SW electrically connected to the gate line G and the source line S in each sub-pixel PX, a pixel electrode PE electrically connected to the switching element SW in each sub-pixel PX, and a common electrode CE. 
     The display panel PNL is a transmissive panel which displays an image by selectively transmitting light from a backlight unit disposed in the rear surface thereof. In addition, the display panel may be a reflective panel which displays an image by selectively reflecting external light incident on the display area DA, or a transflective panel which is a combination of the transmissive and reflective panels. 
     A signal supply source including a driver IC chip  2  and a flexible printed circuit (FPC)  3  which are essential to drive the display panel PNL is positioned in the non-display area NDA. In the example depicted, the driver IC chip  2  and the FPC  3  are mounted in a mount area MT of a first substrate SUB 1  extending outward further than one substrate side edge SUB 2   e  of a second substrate SUB 2 . The mount area MT is formed along a substrate side edge SUB 1   e  of the first substrate SUB 1 . Although this is not depicted, the first substrate SUB 1  includes connection terminals (pads) to connect the signal supply sources to the mount area MT. Some of the pads are electrically connected to the gate line G or the source line S. Note that, in the example depicted, other three substrate side edges of the second substrate SUB 2  are opposed to other three substrate side edges of the first substrate SUB 1 . 
     The sealant SL is disposed in the non-display area NDA so as to surround the display area DA. In the example depicted, the sealant SL is formed in a rectangular shape. 
       FIG.  2    is a plan view of an example of the structure of the second substrate SUB 2 .  FIG.  2    shows the main parts of the second substrate SUB 2 . 
     The second substrate SUB 2  includes a light shielding layer BM, color filter CF, and space PS. The light shielding layer BM includes light shielding layers BMX (BMX 1 , BMX 2 , BMX 3 , . . . ) and light shielding layers BMY (BMY 1 , BMY 2 , BMY 3 , BMY 4 , . . . ). The light shielding layers BMX extend in the first direction X and are arranged in the second direction Y at intervals. Hereinafter, the light shielding layer BMX will be referred to as horizontal light shielding layer BMX for better understanding. In  FIG.  2   , the horizontal light shielding layers BMX 1 , BMX 2 , and BMX 3  are arranged, in the display area DA, in the second direction Y at certain intervals. The light shielding layers BMY extend in the second direction Y and are arranged in the first direction X at intervals. Hereinafter, the light shielding layer BMY will be referred to as vertical light shielding layer BMY. In  FIG.  2   , the vertical light shielding layers BMY 1 , BMY 2 , and BMY 3  are arranged, in the display area DA, in the first direction X at certain intervals. The horizontal light shielding layer BMX and the vertical light shielding layer BMY cross at a crossing part XP. In the example depicted, the horizontal light shielding layer BMX is layered on the vertical light shielding layer BMY at the crossing part XP. Specifically, at the crossing part XP, the horizontal light shielding layer BMX and the vertical light shielding layer BMY directly contact each other, and no element is interposed therebetween. The horizontal light shielding layer BMX and the vertical light shielding layer BMY are arranged as a lattice. Note that the arrangement of the horizontal light shielding layer BMX and the vertical light shielding layer BMY may be in different. Openings OP (OP 1 , OP 2 , OP 3 , OP 4 , OP 5 , OP 6 , . . . ) are defined by the horizontal light shielding layers BMX and the vertical light shielding layers BMY. In the example depicted, the openings OP are arranged as a matrix on the X-Y plane. 
     In the example depicted, the horizontal light shielding layer BMX 1  includes an extended part EX. The extended part EX has a width WY 2  which is greater than a width WY 1  of the horizontal light shieling layer BMX 1  in the second direction Y. The extended part EX overlaps a spacer PS. The extended part EX is positioned between two vertical light shielding layers BMY 3  and BMY 4  continuously arranged in the first direction X and extends in a direction toward the tip of the arrow of the second direction Y. Thus, the size of opening OP 3  is less than the size of other openings (for example, openings OP 1 , OP 2 , OP 4 , OP 5 , and OP 6 ). Note that the extended part EX may be positioned in a place other than the gap between the vertical light shielding layers BMY 3  and BMY 4 . For example, the extended part EX may be positioned in a crossing part XP. In addition, the extended part EX may extend in a direction opposite to the direction toward the tip of the arrow of the second direction Y, or may extend in both directions of the second direction Y. There may be a plurality of extended parts EX and spacers PS. 
     The color filter CF is arranged in the opening OP. The color filter CF includes a color filter CF 1  of a first color, color filter CF 2  of a second color, and color filter CF 3  of a third color. The first, second, and third colors are different from each other. For example, the color filter CF 1  is red, color filter CF 2  is green, and color filter CF 3  is blue. 
     In the example depicted, the color filters CF 1 , CF 2 , and CF 3  are arranged in the first direction X repeatedly in this order. Furthermore, the color filters CF 1 , CF 2 , and CF 3  are disposed in the second direction Y continuously. That is, the color filters CF 1 , CF 2 , and CF 3  are laid over the area defined by adjacent vertical light shielding layers BMY and laid over each opening OP and horizontal light shielding layer BMX. 
     Note that the combination of the color filters CF 1  to CF 3  is not limited to the above-mentioned example. Furthermore, the color filters CF may include color filters of another color, such as white. In that case, the red, green, blue, and white color filters may be arranged repeatedly in the first direction X. The white color filter may be formed of an undyed resin material. 
       FIG.  3    is a perspective view of an example of a layered condition of the horizontal light shielding layer BMX and the vertical light shielding layer BMY. 
     The horizontal light shielding layer BMX and the vertical light shielding layer BMY are formed in separate processes. In other words, the horizontal light shielding layer BMX is formed in one process, and the vertical light shielding layers BMY is formed in another process. In the example depicted, the vertical light shielding layer BMY is positioned under the horizontal light shielding layer BMX in the crossing part XP and contacts the horizontal light shielding layer BMX in plan view. The vertical light shielding layer BMY includes a projection TP projecting downward at the crossing part XP. Note that the horizontal light shielding layer BMX may be positioned under the vertical light shielding layer BMY at the crossing point XP and contact the vertical light shielding layer BMY. In that case, the horizontal light shielding layer BMX includes a projection projecting downward. 
     Since being formed in separate processes, the horizontal light shielding layer BMX and the vertical light shielding layer BMY are each formed of unique material, thickness, and the like. In the example depicted, the vertical light shielding layer BMY has a thickness YT 1  in the part other than the crossing part XP, and the thickness YT 1  is greater than a thickness XT 1  of the horizontal light shielding layer BMX in the part other than the crossing part XP. In other words, the thickness XT 1  is less than the thickness YT 1  in the part other than the crossing part XP. Note that the thickness YT 1  may be formed to be equal to or less than the thickness XT 1 . A thickness XPT of the light shielding layer BM at the crossing part XP corresponds to a sum of a thickness XT 2  of the horizontal light shielding layer BMX at the crossing part XP and a thickness YT 2  of the vertical light shielding layer BMY at the crossing part XP. The thickness XPT is, for example, less than a sum of the thickness XT 1  and the thickness YT 1 . In other words, a sum of the thickness XT 1  and the thickness YT 1  is greater than the thickness XPT. In that case, the thickness XT 1  may be different from the thickness XT 2 , or the thickness YT 1  may be different from the thickness YT 2 . Furthermore, the thickness XT 1  and the thickness YT 1  may be different from the thickness XT 2  and the thickness YT 2 , respectively. Note that the thickness XPT may be equal to the sum of thickness XT 1  and thickness YT 1 , or may be greater than the sum of the thickness XT 1  and the thickness YT 1 . The thickness XT 1  may be equal to the thickness XT 2  or may be less than the thickness XT 2 . The thickness YT 1  may be equal to the thickness YT 2  or may be less than the thickness YT 2 . In either case, the light shielding layer BM has a thickness XPT at a crossing part XP, and the thickness XPT differs from thicknesses XT 1 , YT 1 , and the like of the light shielding layer BM in the part other than the crossing part XP. Furthermore, in the example depicted, a color filter CF has a thickness CT in an opening OP, and the thickness CT is less than the thickness YT 1  and is greater the thickness XT 1 . Note that the thickness CT may be equal to or greater than the thickness YT 1 , or may be equal to or less than the thickness XT 1 . 
       FIG.  4    is a plan view of an example of the structure of the first substrate SUB 1 .  FIG.  4    shows main parts of the first substrate SUB 1 . In this example, the light shielding layer BX of the second substrate SUB 2  of  FIG.  2    is depicted in two-dot chain lines. 
     The first substrate SUB 1  includes, for example, gate lines G (G 1 , G 2 , G 3 , . . . ), source lines S (S 1 , S 2 , S 3 , S 4 , . . . ), switching elements (SW 1 , SW 2 , . . . ), relay electrodes RE (RE 1 , RE 2 , . . . ), pixel electrodes PE (PE 1 , PE 2 , . . . ), and common electrode CE. In  FIG.  4   , only the elements essential for the description are depicted, and the common electrode CE is omitted from the depiction. 
     The gate lines G extend in the first direction X and are arranged in the second direction Y at intervals. In  FIG.  4   , the gate lines G 1 , G 2 , and G 3  are arranged in the second direction Y at certain intervals. The gate lines G overlap the horizontal light shielding layer BMX. Note that the gate line G may be partly bent. The source lines S extend in the second direction Y and are arranged in the first direction X at intervals. In  FIG.  4   , the source lines S 1 , S 2 , S 3 , and S 4  are arranged in the first direction X at certain intervals. The source lines S overlap the vertical light shielding layer BMY. Note that the source line S may be partly bent. In the example depicted, the gate lines G and the source lines S cross each other to be arranged as a lattice. In the figure, sub-pixels PX (PX 1 , PX 2 , . . . ) each correspond to an area defined by two adjacent gate lines G and two adjacent source lines S. For example, the sub-pixel PX 1  corresponds to an area defined by the gate lines G 1  and G 2  and the source lines S 1  and S 2 , and the sub-pixel PX 2  corresponds to an area defined by the gate lines G 2  and G 3  and the source lines S 2  and S 3 . 
     The pixel electrode PE is disposed in each sub-pixel PX. The pixel electrodes PE are electrically connected to relay electrodes RE (RE 1 , RE 2 , . . . ) via contact holes CH 1  (CH 11 , CH 12 , . . . ). For example, the pixel electrode PE 1  is disposed in the sub-pixel PX 1 . The pixel electrode PE 1  is electrically connected to the relay electrode RE 1  via a contact hole CH 11 . The pixel electrode PE is formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In the example depicted, the pixel electrode PE includes a branch extending in the first direction X from a connection area extending in the second direction. Note that the shape of the pixel electrode PE is not limited to the example depicted, and may be arbitrarily changed to conform to the shape of the sub-pixel PX. 
     The relay electrode RE is disposed in each sub-pixel PX. The relay electrode RE is electrically connected to the switching element SW. The relay electrode RE is, for example, formed of the material used for the source lines S. For example, the relay electrode RE 1  is disposed in the sub-pixel PX 1 . The relay electrode RE 1  is electrically connected to the switching element SW 1 . 
     The switching element SW is electrically connected to the source line S via contact hole CH 2  (CH 21 , CH 22 , . . . ). The switching element SW includes semiconductor layer SC (SC 1 , SC 2 , . . . ). In the example depicted, the switching element SW is a double gate type switching element which crosses the gate line G twice. For example, the switching element SW 1  is electrically connected to the source line S 1  via a contact hole CH 11 . The switching element SW 1  includes a semiconductor layer SC 1 . The switching element SW 1  crosses the gate line G 1  twice. Note that the switching element SW may be a single gate type one which crosses the gate line G once. 
       FIG.  5    is a cross-sectional view of the display device DSP, taken along line V-V of  FIG.  2   . 
     The first substrate SUB 1  includes, for example, the source line S, gate line G, common electrode CE, switching element SW, first insulating substrate  10 , insulating layers  11 ,  12 ,  13 ,  14 ,  15 , and  16 , and first alignment film AL 1 . Note that the first substrate SUB 1  is not limited to the depicted example, and may be structured differently. 
     The first insulating substrate  10  is formed of, for example, a non-alkaline glass or a transparent resin. The insulating layer  11  is positioned above the first insulating substrate  10 . The insulating layer  12  is positioned above the insulating layer  11 . The semiconductor layer SC (switching element SW) is positioned between the insulating layers  11  and  12  and is opposed to the source line S. The gate line G is positioned above the insulating layer  12 . The insulating layer  13  is positioned above the gate line G. The insulating layer  14  is positioned above the insulating layer  13 . The insulating layer  15  is positioned above the insulating layer  14 . The source line S is positioned between the insulating layers  14  and  15 . The common electrode CE is positioned above the insulating layer  15 . The common electrode CE is formed of, for example, a transparent conductive material such as ITO or IZO. The insulating layer  16  is positioned above the common electrode CE. The insulating layers  11  to  14  and  16  are, for example, inorganic insulating layers while the insulating layer  15  is, for example, an organic insulating layer. The first alignment film AL 1  is positioned above the insulating layer  16 . 
     The second substrate SUB 2  includes, for example, a second insulating substrate  20 , light shielding layer BM, color filter CF, overcoat layer OC, and second alignment film AL 2 . Note that the second substrate SUB 2  is not limited to the depicted example, and may include other insulating layers or various layers. 
     The second insulating substrate  20  is formed of, for example, a non-alkaline glass or a transparent resin. The second insulating substrate  20  includes a counter surface  20 A which is opposed to the first substrate SUB 1  and a rear surface  20 B which is an opposite side of the counter surface  20 A. In the example depicted, the horizontal light shielding layer BMX contacts the counter surface  20 A and is opposed to the gate line G. The horizontal light shielding layer BMX includes a counter surface XA opposed to the first substrate SUB 1  and a rear surface XB which is an opposite side of the counter surface XA. Note that various other layers may be positioned between the horizontal light shielding layer BMX and the second insulating substrate  20 . 
     In the example depicted, the vertical light shielding layer BMY contacts the counter surface XA at the crossing part XP. Furthermore, the vertical light shielding layer BMY is opposed to the source line S. The vertical light shielding layer BMY includes a counter surface YA which is opposed to the first substrate SUB 1  and a rear surface YB which is an opposite side of the counter surface YA. 
     In the example depicted, the color filter CF contacts the counter surface XA. The color filter CF contacts the vertical light shielding layer BMY in the first direction X. The color filter CF does not contact the counter surface YA. Note that the color filter CF may contact the counter surface YA. 
     In the example depicted, the overcoat layer OC covers the under part of the color filter CF. Furthermore, the overcoat layer OC covers a part of the side surfaces of the counter surface YA and the vertical light shielding layer BMY. The second alignment film AL 2  is positioned below the overcoat layer OC. Note that the color filter CF between the horizontal light shielding layer BMX and the overcoat layer OC may be omitted. For example, the overcoat layer OC may cover the lower part of the horizontal light shielding layer BMX and the vertical light shielding layer BMY. 
     A first optical element OD 1  including the first polarizer PL 1  is positioned between the first insulating substrate  10  and an illumination device BL. A second optical element OD 2  including the second polarizer PL 2  is positioned above the second insulating substrate  20 . The first optical element OD 1  and the second optical element OD 2  may include a retardation film, if necessary. 
       FIG.  6    is a cross-sectional view of the display device DSP, taken along line VI-VI of  FIG.  2   .  FIG.  6    shows an example of the structure of the vertical light shielding layer BMY except for the crossing part XP. 
     The first substrate SUB 1  further includes the pixel electrode PE. In the example depicted, the pixel electrode PE is positioned between the insulating layer  16  and the first alignment film AL 1 . 
     In the example depicted, the vertical light shielding layer BMY contacts the counter surface  20 A. As shown in  FIG.  5   , the horizontal light shielding layer BMX entirely contacts the counter surface  20 A. On the other hand, the vertical light shielding layer BMY does not contact the counter surface  20 A at the crossing part XP. That is, the horizontal light shielding layer BMX and the vertical light shielding layer BMY both contact the counter surface  20 A in the part other than the crossing part XP. 
     In the example depicted, the color filter CF contacts the counter surface  20 A. The color filter CF contacts the vertical light shielding layer BMY in the first direction X. The color filter CF does not contact the counter surface YA. Note that the color filter CF may contact the counter surface YA. Note that other various layers may be positioned between the vertical light shielding layer BMY and the color filter CF and the second insulating substrate  20 . 
     In the example depicted, the overcoat layer OC covers the lower part of the color filter CF. Furthermore, the overcoat layer OC covers a part of the side surfaces of the counter surface YA and the vertical light shielding layer BMY. 
     In the present embodiment, the display device DSP includes the horizontal light shielding layer BMX and the vertical light shielding layer BMY formed separately. Since the horizontal light shielding layer BMX and the vertical light shielding layer BMY are formed separately, they can be arranged optionally and formed in a desired shape. Thus, the display device of the present embodiment can maintain high opening ratio. Therefore, the display device which can properly maintain the shape of the light shielding layer can be presented. 
     Furthermore, the horizontal light shielding layer BMX and the vertical light shielding layer BMY contact each other at the crossing part XP. That is, even though they are formed separately, a gap and a interposed material can be basically omitted between the horizontal light shielding layer BMX and the vertical light shielding layer BMY, and thus, light leakage can be suppressed. Furthermore, since they are formed separately, the horizontal light shielding layer BMX and the vertical light shielding layer BMY can be formed of different materials and in different thickness, for example. For example, the thickness YT 1  of the vertical light shielding layer BMY can be greater than the thickness CT of the color filter CF such that color filters of different colors do not contact each other. Thus, the display device of the present embodiment can improve the display quality. 
     Now, an example of a manufacturing process of the second substrate SUB 2  of the display device DSP will be explained with reference to  FIGS.  7  to  11   . Note that, in each figure, the second substrate SUB 2  is mainly focused and the depiction of the first substrate SUB 1  and the like will be omitted. 
     Initially, for example, a negative type photoresist (resist) which is cured by light irradiation and undissolved in a developer is applied to the second insulating substrate  20 . After the resist is applied to the second insulating substrate  20 , the resist is exposed via a photomask including an opening pattern corresponding to the horizontal light shielding layer BMX. After the exposure of the resist, the resist is removed except the pattern of the horizontal light shielding layer BMX and the residing resist (horizontal light shielding layer BMX) is sintered. Through the above process, the horizontal light shielding layer BMX can be formed. In the example depicted, the horizontal light shielding layer BMX 1  include an extended part EX. When the horizontal light shielding layer BMX is formed, the thickness XT 1  of  FIG.  3    is, preferably, formed to be less than the application thickness YT 1  of the color filter such that the resist of the color filter can be spread in the forming of the color filter CF. Thus, the color filter is spread over the substrate within a range defined by the vertical light shielding layer BMY. Furthermore, with the color filter formed in the above process, the thickness of the color filter becomes greater in the opening OP than the horizontal light shielding layer BMX in the part other than the crossing part XP. Note that, although the negative type resist is applied to the second insulating substrate  20  in the above example, the horizontal light shielding layer BMX may be formed by applying a positive type resist which is decomposed by light irradiation and is dissolved in a developer to the second insulating substrate  20 , and exposing and sintering the resist-applied second insulating substrate  20 . 
     Furthermore, for example, a negative type resist is applied to the horizontal light shielding layer BMX and the second insulating substrate  20  of  FIG.  7    to cover them. After the application of resist, the resist is exposed via a photomask with an opening pattern corresponding to the pattern of the vertical light shielding layer BMY. After the exposure of the resist, the resist except the pattern of the vertical light shielding layer BMY is removed, and the residing resist (vertical light shielding layer BMY) is sintered. Through the above process, the horizontal light shielding layer BMX and the vertical light shielding layer BMY are formed as shown in  FIG.  8   . When the vertical light shielding layer BMY is formed, the thickness YT 1  is, preferably, formed to be equal to or greater than the thickness CT to isolate the resists of color filters of different colors. In the process shown in  FIG.  8   , the resist is entirely flattened in the application thereof. That is, the height of the applied film from the second insulating substrate  20  is evened, and thus, the thickness XPT shown in  FIG.  3    may be less than a sum of the thickness XT 1  and the thickness YT 1 . Note that, although the negative type resist is applied to the horizontal light shielding layer BMX and the second insulating substrate  20  in the above example, the vertical light shielding layer BMY may be formed by applying a positive type resist to the horizontal light shielding layer BMX and the second insulating substrate  20 , and exposing and sintering the resist-applied horizontal light shielding layer BMX and second insulating substrate  20 . 
       FIG.  9    is a cross-sectional view, taken along line IX-IX of  FIG.  8   . After the vertical light shielding layer BMY is formed as shown in  FIG.  8   , the color filter CF is formed as shown in  FIG.  9   . In the example depicted, a resist of the color filter is applied on the horizontal light shielding layer BMX when the color filter CF is formed. Thus, the color filter CF 1  is formed between the vertical light shielding layers BMY 1  and BMY 2 . The color filter CF 2  is formed between the vertical light shielding layers BMY 2  and BMY 3 . The color filter CF 3  is formed between the vertical light shielding layers BMY 3  and BMY 4 . Note that the resist of the color filter CF may not be applied on the horizontal light shielding layer BMX. 
     Then, the overcoat layer OC is formed as shown in  FIG.  10    and the spacer PS is formed as shown in  FIG.  11   . The spacer PS is formed, for example, between the vertical light shielding layers BMY 3  and BMY 4  in a position opposed to the extended part EX. After the spacer PS is formed, the overcoat layer OC and the spacer PS are covered with the second alignment film AL 2  to form the second substrate SUB 2 . Then, the first substrate SUB 1 , liquid crystal layer, and the like are arranged to complete the display device DSP structured as shown in  FIG.  1    and the like. 
     In the above manufacturing process, the horizontal light shielding layer BMX and the vertical light shielding layer BMY are formed through separated exposure step, and thus, the horizontal light shielding layer BMX and the vertical light shielding layer BMY are formed in desired shapes while the influence of optical diffraction and the like is suppressed. Thus, a display device with higher definition and higher aperture ratio can be presented. Furthermore, since the horizontal light shielding layer BMX and the vertical light shielding layer BMY are formed separately, the horizontal light shielding layer BMX and the vertical light shielding layer BMY can be formed with different materials, different thickness, and the like. Furthermore, since the horizontal light shielding layer BMX and the vertical light shielding layer BMY are formed continuously without any interposed layer therebetween, the light shielding layer BM can be formed stably. Thus, the display quality can be improved. 
     Note that, in the above example the horizontal light shielding layer BMX is formed on the second insulating substrate  20  and then the vertical light shielding layer BMY is formed; however, in another case, the vertical light shielding layer BMY may be formed on the second insulating substrate  20  and then the horizontal light shielding layer BMX. 
     The display device DSP and the manufacturing method thereof explained above in the above-described embodiment can achieve not only the above-described effects but also various suitable effects. 
     Now, other examples of the present embodiment will be explained with reference to  FIGS.  12  to  14   . In the other examples of the present embodiment descried below, elements corresponding to those of the above embodiment will be referred to by the same reference numbers and the description thereof will be omitted in order to focus on the parts different from the above-described embodiment. Note that the effects achieved in the above-described embodiment can be achieved in the other examples as well. 
     In the example of  FIG.  12   , the structure of the light shielding layer BM is different as compared to the model of  FIG.  2   . In the example depicted, the vertical light shielding layer BMY is layered on the horizontal light shielding layer BMX in plan view. In such a structure, the effects described above can be achieved. 
     In the example of  FIG.  13   , the structure of the light shielding layer BM is different as compared to the model of  FIG.  2   .  FIG.  13    shows the main parts of the first substrate SUB 1  in dashed lines. 
     In the example depicted the vertical light shielding layer BMY is discontinuous at a part overlapping the horizontal light shielding layer BMX. In other words, the vertical light shielding layer BMY is discrete above the position where the source line S crosses the gate line G in plan view. For example, the vertical light shielding layer BMY 1  includes partial vertical light shielding layers BMY 11 , BMY 12 , BMY 13 , and BMY 14 . The partial vertical light shielding layers BMY 11 , BMY 12 , BMY 13 , and BMY 14  are arranged in the second direction Y at intervals. One end (lower end) of the partial vertical light shielding layer BMY  11  overlaps the horizontal light shielding layer BMX 1  at the crossing part XP. The partial vertical light shielding layer BMY 12  is apart from the partial vertical light shielding layer BMY 11  in the second direction Y. One end (upper end) of the partial vertical light shielding layer BMY 12  overlaps the horizontal light shielding layer BMX 1  at the crossing part XP, and the other end (lower end) thereof overlaps the horizontal light shielding layer BMX 2  at the crossing part XP. The partial vertical light shielding layers BMY 13  and BMY 14  have a similar structure. 
     In such a structure, the effects described above can be achieved. 
     Note that, for example, the partial vertical light shielding layer may not overlap two horizontal light shielding layers BMX adjacent thereto in the second direction Y. For example, the partial vertical light shielding layer may be positioned between two adjacent horizontal light shielding layers BMX in the second direction Y and may contact these two horizontal light shielding layers BMX. Furthermore, the partial vertical light shielding layer may have a thickness which is equal to or less than the thickness of the horizontal light shielding layer BMX. With such a structure, the display device can be formed thinner. 
     In the example of  FIG.  14   , the structure of the light shielding layer BM is different as compared to the example of  FIG.  2   .  FIG.  14    shows the main parts of the first substrate SUB 1  with dashed lines. 
     In the example depicted, the source line S extends in a direction inclined with respect to the gate line G. Between two horizontal light shielding layers BMX adjacent thereto, the vertical light shielding layer BMY extends in a direction inclined with respect to the horizontal light shielding layer BMX as with the source line S. The vertical light shielding layer BMY overlaps the source line S. 
     In such a structure, the effects described above can be achieved. 
     The above-described embodiments are merely examples, and the scope of the invention is not limited thereby. For example, the liquid crystal layer may be replaced with a self-luminous layer, and an electrode layer may be disposed between the first substrate and the second substrate or between the first substrate and the polarizer via the self-luminous layer, that is, an organic EL display device may be adopted. 
     While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.