Patent Publication Number: US-2011073352-A1

Title: Paired low-characteristic impedance power line and ground line structure

Description:
TECHNICAL FIELD 
     The present invention relates to a paired low-characteristic impedance power line and ground line structure. 
     This application claims priority on Japanese Patent Application No. 2008-134348 filed on May 22, 2008 in the Japanese Patent office, and the disclosure of which is incorporated herein by reference. 
     BACKGROUND ART 
     In electronic circuits, line for supplying high-speed high-power (hereinafter referred to as “power lines”) or connections to ground (hereinafter referred to as “ground lines”) conventionally use a wide independent wire or a solid wire. 
     When power is supplied through a wide independent wire or a solid wire, a large current easily flows, however frequency characteristics are unsatisfactory, power supply delay occurs during an instantaneous switch operation at a frequency greater than or equal to 1 GHz, and fluctuations of the power source and ground occur in the course of restoration, which adversely affects an adjacent circuit. As is well known in the art, the fluctuations cause the resonance of the power line and ground line, which leads to electromagnetic radiation. The scale of such a problem is expressed as the magnitude of the inductor component (hereinafter, referred to as loop inductance) due to the power source/ground loop circuit. This value is preferably less than or equal to 100 pH at a frequency greater than or equal to 1 GHz. At present, it takes a great deal of effort to reduce loop inductance by inlaying a decoupling capacitor at each location of the circuit board (for example, Patent Citation 1). 
     RELATED ART CITATION 
     Patent Citation 
     
         
         [Patent Citation 1] Japanese Laid-Open Patent Application No. 2006-135036. 
       
    
     DISCLOSURE OF INVENTION 
     Technical Problem 
     The present invention has been achieved in consideration of the above-described situation, and it is an object of the present invention to provide a paired low-characteristic impedance power line and ground line structure in which loop inductance is substantially 0. 
     Technical Solution 
     A paired low-characteristic impedance power line and ground line structure of the present invention includes a laminated sheet in which a metal wiring layer having a power line and a ground line is provided on the surface of an insulating sheet, an insulating thin-film layer provided so as to cover the metal wiring layer, and a resistive layer provided on the surface of the insulating thin-film layer. 
     The insulating thin-film layer may be provided in accordance with the surface shape of the laminated sheet on which the metal wiring layer is provided, and the resistive layer may be provided in accordance with the surface shape of the insulating thin-film layer. 
     The resistive layer may be a film in which homogeneous films of a metal or a semiconductor, or clustered grains of a metal or a semiconductor having a sheet resistance of 10 to 1000Ω per square are layered. 
     The thickness of the resistive layer may be 20 to 1000 nm. 
     The thickness of the insulating thin-film layer may be 20 to 10000 nm. 
     The power line and the ground line may satisfy the relationships (i) and (ii):
         (i) the ratio (t/w) of the thickness t of a wire and the width w of the wire in a short-side direction is less than or equal to 0.5.   (ii) the ratio (s/w) of the spacing s between adjacent wires and the width w of the wire in the short-side direction is 0.1 to 1.       

     The paired low-characteristic impedance power line and ground line structure of the present invention may further include a protective layer provided on the surface of the resistive layer. 
     ADVANTAGEOUS EFFECTS 
     According to the present invention, a paired low-characteristic impedance power line and ground line structure in which loop inductance is substantially 0 can be provided, and a power supply circuit which is suitable for a frequency of 100 GHz can be produced. A principle that loop inductance becomes 0 will be first described with reference to  FIG. 1 . 
     In a DC circuit, a power source includes a Vdd power source, internal resistance R inside  of the power source, and load resistance R outside  of a load circuit, and the direct-current voltage drop is described in V drop  of the DC. 
     However, in an equivalent circuit of an alternating current, a V drop  described in AC is applied due to the influence of parasitic inductance L loop  corresponding to the loop area of the circuit, and power (the effect of L is in proportion to the current change rate) may not be supplied to an instantaneous switch transistor. 
     In a circuit described as Transmission line, a paired power line and ground line are used as a transmission line, and the circuit loop area becomes 0, such that a change is made to a circuit system of a resistive parameter having characteristic impedance enables to follow an instantaneous switch. This is the principle of this proposal. There is a direct-current resistive component by time t pd  at which electrical energy passes through the transmission line at light speed, and a reflection is made by a mismatch portion of the characteristic impedance. Therefore, in  FIG. 1 , the V drop  expression changes depending on the time. However, it is possible to follow the instantaneous switch. Meanwhile, if the value of the characteristic impedance is large, a direct current of V drop  increases. Therefore, the characteristic impedance Z 0  of the paired power line and ground line is preferably small. In order to decrease the characteristic impedance, a paired planar structure is considered in which the power line and the ground line are arranged on a plane in parallel. In the following Expression (1), the width and thickness of each of the power line and the ground line are w and t, respectively. The pitch distance between the wires (an inter-center distance of both wires) is d, the specific dielectric constant of an insulator which covers around the power line and the ground line area is ∈ r , and the vacuum dielectric constant is ∈ 0 . A Z 0  which is less than or equal to 30Ω is difficult to obtain with practical dimensions. 
         Z   0 =(1/π)(√μ r μ 0 /∈ r ∈ 0 )(1 n (π( d−w )/( w+t )+1)  (1)
 
     As can be seen from Expression (1), it is difficult to produce a paired power line and ground line structure, in which Z 0  is less than or equal to 30Ω so as to have practical dimensions. 
     The present invention provides a paired power line and ground line structure in which a resistive layer (metamaterial) using a Droude expression described below is arranged, and photon-surface plasmon exchange is carried out, such that Z 0  becomes less than or equal to several Ω with practical dimensions, thereby realizing a low-characteristic impedance power supply which corresponds to a high-speed power source in a frequency band of 100 GHz. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         FIG. 1  is a circuit diagram which explains the principle. 
         FIG. 2  is a perspective view of an example of paired low-characteristic impedance power line and ground line structure of the present invention. 
         FIG. 3  is a plan view of an example of the paired low-characteristic impedance power line and ground line structure of the present invention. 
         FIG. 4  is a sectional view of an example of the paired low-characteristic impedance power line and ground line structure of the present invention. 
         FIG. 5  is a sectional view of an example of the paired low-characteristic impedance power line and ground line structure of the present invention. 
         FIG. 6  is a diagram illustrating grains in a resistive layer. 
         FIG. 7  is a diagram illustrating grains in a resistive layer. 
         FIG. 8  is a diagram showing an example of the state of grains in a resistive layer. 
         FIG. 9  is a diagram showing another example of the state of grains in a resistive layer. 
         FIG. 10  is a sectional view of a paired low-characteristic impedance power line and ground line structure used in the present invention. 
     
    
    
     BEST MODE FOR CARRYING OUT THE INVENTION 
       FIG. 2  is a perspective view of an example of a paired low-characteristic impedance power line and ground line structure of the present invention,  FIG. 3  is a plan view, and  FIG. 4  is a sectional view. In  FIGS. 2 and 3 , a partial structure for explanation is shown, however, this structure may be extended or folded without limitation. 
     A paired low-characteristic impedance power line and ground line structure has a laminated sheet  1  in which a metal wiring layer  20  having a power line  21  and a ground line  22  is provided on the surface of an insulating sheet  10 , which has a base insulating sheet  11  and an underlayer base insulating sheet  12 , an insulating thin-film layer  31  provided so as to cover the power line  21  and the ground line  22  conformally (that is, in accordance with the surface shape of the laminated sheet  1  on which the metal wiring layer  20  is provided), and a resistive layer  32  provided on the surface of the insulating thin-film layer  31  conformally (that is, in accordance with the surface shape of the insulating thin-film layer  31 ). 
     If necessary, a protective layer  33  (not shown) may be provided on the surface of the resistive layer  32 . 
     The paired low-characteristic impedance power line and ground line structure may be embedded in a printed wiring board or the like. 
     (Laminated Sheet) 
     The laminated sheet  1  is, for example, a printed wiring board. 
     (Insulating Sheet) 
     The insulating sheet  10  is made of, for example, an organic insulating material, such as glass fiber reinforced epoxy resin, epoxy resin, polyester, PET (polyethylene terephthalate), PPC (polyester polycarbonate), polyvinylidene, polyimide, or polystyrene. 
     The thickness of the insulating sheet  10  may be set such that the insulating sheet  10  functions as a base material. 
     (Metal Wiring Layer) 
     The power line  21  and the ground line  22  are expanded in a strip-shaped long-side direction of the metal wiring layer  20 . One end portion of each of the power line  21  and the ground line  22  is connected to a power source  40 , and the other end portion includes a branch and is connected to a load. The power line  21  and the ground line  22  are exposed at one portion  1   a  of the laminated sheet  1 . In the planar layout, the length of the exposed portion is preferably less than or equal to 5 mm. 
     A single pair of the power line  21  and the ground line  22  may be provided, or as shown in  FIG. 5 , multiple pairs of the power line  21  and the ground line  22  may be arranged in parallel. When multiple pairs are arranged, the power source  40  may be arranged for each pair, such that a multiple-power source circuit may be formed. 
     The power line  21  and the ground line  22  are preferably designed so as to substantially have the same low characteristic impedance from the power source  40  to the output end portion, and both end portions are connected to a decoupling capacitor. When a branch is present between the power source  40  to the output end portion, the characteristic impedance after the branch to the characteristic impedance before the branch is preferably 1/n where n is the number of branches. 
     The power line  21  and the ground line  22  preferably satisfy the following relationships (i) to (iii).
         (i) the ratio (t/w) of the thickness t of a wire and the width w of the wire in a short-side direction is less than or equal to 0.5   (ii) the ratio (s/w) of the spacing s between adjacent wires and the width w of the wire in the short-side direction is 0.1 to 1   (iii) the ratio (w/t 0 ) of the width w of the wire in the short-side direction and the thickness t 0  of the insulating sheet  10  is less than or equal to 5.       

     The width w of each of the power line  21  and the ground line  22  is preferably 10 μm to 1 mm, and 0.1 to 10 μm inside a chip. 
     The thickness t of each of the power line  21  and the ground line  22  is determined depending on the current capacity. When the current capacity is 300 mA, if the width w is 100 μm, the thickness t is preferably 20 μm. 
     (Insulating Thin-Film Layer) 
     The insulating thin-film layer  31  may be made of an organic insulating material. 
     In providing the insulating thin-film layer  31  conformally, coating, spin coating, sputtering, vapor deposition, or CVD may be used. 
     The insulating thin-film layer  31  electrically insulates the resistive layer  32 , such that the power line  21  and the ground line  22  are electrically separated from each other and an appropriate voltage is applied between the power line  21  and the ground line  22 . 
     The thickness of the insulating thin-film layer  31  is set so as to have a withstand voltage according to a voltage applied between the power line  21  and the ground line  22 , which freely changes between 0.1 to 10 V. 
     The thickness of the insulating thin-film layer  31  is preferably as small as possible so as to disrupt the electromagnetic field balance between the power line and the ground line (that is, so as to promote photon-surface plasmon exchange described below). Therefore, the thickness of the insulating thin-film layer  31  is preferably 20 to 10000 nm. 
     (Resistive Layer) 
     The resistive layer  32  is preferably a film in which homogeneous films of a metal or a semiconductor, or clustered grains (crystal grains) of a metal or a semiconductor having sheet resistance 10 to 1000Ω per square are layered so as to produce the surface plasmon effect. 
     Examples of the metal or semiconductor include at least one selected from a group consisting of Fe, Al, Ni, Ag, Mg, Cu, Si, and C, or an alloy or a eutectoid containing at least two selected from the group. 
     The resistive layer  32  is formed on the surface of the insulating thin-film layer  31  by sputtering, vapor deposition, plating, ion plating, CVD, or spraying. The resistive layer  32  may be formed on the surface of the protective layer  33  to produce a resistive sheet, and then the resistive sheet may be attached to the surface of the laminated sheet  1  through the insulating thin-film layer  31 . 
     The resistive layer  32  may be formed to have a strip-shaped line width by photolithography or the like. 
     The thickness of the resistive layer  32  is preferably 20 to 1000 nm. 
     The resistive layer  32  may have conductivity or insulation, but this is not a fundamental issue. Thus, the resistive layer  32  may have a pinhole (defect, void), or the cluster may have an electrically independent islet. 
     The paired low-characteristic impedance power line and ground line structure of the present invention may be embedded in a multilayer printed wiring board. In the case of a multilayer printed wiring board, lines are arranged in a vertical direction, and it has been confirmed that, if the lines are arranged at a distance corresponding to the width w of the lines, there is little influence on the photo-surface plasmon exchange. 
     With the paired low-characteristic impedance power line and ground line structure of the present invention, the loop inductance substantially becomes 0 since the resistive layer  32  is provided so as to cover the metal wiring layer  20  through the insulating thin-film layer  31 . As a result, the characteristic impedance of the paired power line and ground line is reduced. Hereinafter, the principle will be described in detail. 
     According to the Droude&#39;s dielectric function and permeability function, ∈ ω  and μ ω  are expressed by Expressions (2) to (5). 
       ∈ ω =1−(ω ep   2 /ω 2 )  (2)
 
       ω ep   2 ≡(n e e 2 )/(∈ 0 m)  (3)
 
       μ ω =1−(ω mp   2 /ω 2 )  (4)
 
       ω mp   2 ≡(n p χ 2 )/(μ 0 m)  (5)
 
     Here, n e  is the density of free electrons of the resistive layer, n p  is the density of unpaired electrons of the resistive layer, e is the charge amount of electrons, m is the electron mass, and χ is the spin probability of unpaired electrons. 
     A case is taken into consideration where the resistive layer has a morphology in which conductive particles having clustered particles of Fe having a radius of 1000 nm are linked at the number density of 1 particle/18 μm 3 . 
     When Fe has one free electron per atom, the density of free electrons of iron becomes 8.4×10 22  electrons/cm 3 . Thus, the free electron density on the surface of iron becomes ⅔ power of 8.4×10 22  electrons/cm 3 , that is, 1.9×10 15  electrons/cm 2 . However, the free electron density of the surface becomes smaller than the value since the free electrons are trapped by the surface-absorbed atoms. If it is assumed that the rate of decrease of free electrons due to trapping is 10 −3 , the density of free electrons on the surface of iron becomes 1.9×10 12  electrons/cm 2 . 
     The radius of the conductive particles is 1 μm=1×10 −5  cm. However, the amount of free electrodes per particle becomes 2.39×10 3  electrons since the surface area of the conductive particles becomes 4π(1×10 −5 ) 2 =12.6×10 −10  cm 2 . In addition, since the density of conductive particles is 1 particle/18 μm 3 , the density of free electrons in the resistive layer becomes n e =1.32×10 20  electrons/m 3 . 
     The electron mass is m=9.11×10 −31  kg, the charge amount of electrons is e=1.6×10 −19  C, and the vacuum dielectric constant ∈ 0 =8.85×10 −12  F/m. If these values and n e =1.32×10 20  electrons/m 3  are substituted in Expression (3), the relationship ω ep   2 =1.32×10 20 ×(1.6×10 −19 ) 2 /(8.85×10 −12 ×9.1×10 −31 )=0.42×10 28 , ω ep =0.65×10 14 /s is established. Thus, ω ep  becomes the frequency of far ultraviolet light. 
     If ω is 1 GHz, the relation ∈ ω =1−(6.5×10 13 ) 2 /(2π×1×10 9 ) 2 =1−1.07×10 8 =−1.07×10 8  is established by Expression (2), and a large value is obtained at ∈ r &lt;−10 8 . When it comes to industrialization, although a large value can be substantially realized, ∈ ω  is set to −10 6  taking into consideration deterioration by two digits. 
     Meanwhile, it is assumed that μ ω  is −10. This value is appropriate for the following reason. 
     As described above, the free electron density on the surface of iron is 1.32×10 20  electrons/cm 2 . Of these, if the occurrence probability of unpaired electrons is 10 −6 , the density n p  of unpaired electrons on the surface of iron becomes 1.32×10 14  electrons/cm 2 . 
     Then, the flux quantum χ=2.07×10 −10  [Wb], and the vacuum permeability μ 0 =1.25×10 −6  [N/A −2 ], so a high frequency is obtained by Expression (5), that is, ω mp   2 =1.32×10 14 ×(2.07×10 −15 ) 2 /(1.25×10 −6 ×9.1×10 −31 )=4.97×10 20 /s 2  and ω ep =2.23×10 10 /s. 
     Similarly, if ω is 1 GHz, μ ω =1−(2.23×10 10 ) 2 /(2π×1×10 9 ) 2 =1−0.125×10 2 =−11 is obtained. From this, it can be seen that, even when μ ω  is −10, this value is appropriate. 
     Then, t is set to 0.001 m, w is set to 0.005 m, and d is set to 0.008 m, and these values, μ ω =−10, and ∈ ω =−10 6  are substituted in Expression (1), Z 0 =377×0.0032×0.943=1.13Ω is obtained. 
     This calculation is carried out on the assumption that all the free electrons and the magnetons effectively work at the resonance frequency for the free electrons or magnetons (unpaired electrons). Accordingly, it is not considered that the above-described calculation can be applied as it is. It is necessary to practically measure the number of effective free electrons or magnetons. Hereinafter, data which is obtained by measuring the effectiveness of an experimental model will be described. The electromagnetic field of a pair of electrical wires, that is, lines of electrical force or magnetic force which run over as a long distance as possible have weak coupling and easily exchange with other energy. That is, it is important that w is larger than t. A photon which is a quantization unit of an electromagnetic wave can be efficiently converted into other energy, for example, surface plasmon or surface magnon. A paired line structure having a circular shape in cross-section is effective. This still falls within the scope of the invention. 
     The resistive layer  32  is preferably provided conformally so as to cover the power line  21  and the ground line  22  as much as possible, such that the lines of electrical force and magnetic force which detour distantly are masked. If the electric field or magnetic field comes into contact with the metal surface or the semiconductor surface of the resistive layer  32 , the free electrons undergo surface plasmon resonance, and the paramagnetic magnetons undergo surface magnon resonance, thereby absorbing photon energy. The propagation speed is a speed of the same order as lattice vibration, since plasmon and magnon are vibrations of electrons. That is, a speed (a speed slower by five digits than light speed) which is close to the speed of sound of a medium. For this reason, the energy density increases by five digits, as compared with light speed. With regard to the dielectric properties, since the resistive layer  32  is a thin film, the sheet resistance is high. In addition, as shown in  FIG. 6 , the particle system is composed of grains which are small and isotropically trued up, and the pluses and minuses between the grains are arranged in a chain shape, such that the specific dielectric constant increases. Meanwhile, with regard to the magnetic flux properties, the SN chain is produced in the same shape, and this makes magnetic flux coupling strong and decreases the specific permeability decreases. For this reason, as shown in  FIG. 7 , an irregular particle shape which has anisotropy to reduce the SN chain as much as possible with a comparatively large cluster is effective. The mixture state shown in  FIG. 8  or the state having a mean particle shape shown in  FIG. 9  which satisfies both conditions is preferable. Even when a metal or a semiconductor is not magnetized, a site appears which lost electrons due to an active dangling bond of the surface, and the powder surface area increases, such that the metal or semiconductor is magnetized. Thus, a metamaterial having a negative specific dielectric constant and specific permeability, that is, a double negative material is obtained. The paired power line and ground line structure of the present invention efficiently utilizes this phenomenon. 
     Example 
     Hereinafter, an example will be described. 
     (Thickness of Resistive Layer) 
     The cross-section of the resistive film was observed by using a transmission-type electron microscope (H9000NAR manufactured by Hitachi, Ltd.), and the thickness of the resistive layer was measured at five locations and averaged. 
     (Sheet Resistance) 
     Two thin-film metal electrodes (length 10 mm, width 5 mm, and inter-electrode distance 10 mm) formed by depositing gold on quartz glass were used, a resistive film was placed on the electrodes, and a load of 50 g was applied to press an area of 10 mm×20 mm in the resistive film against the electrodes. In this state, inter-electrode resistance was measured by using a measurement current less than or equal to 1 mA. This value was set as sheet resistance. 
     As an example, a laminated sheet  1  of 4 μm with nickel/gold plating on a copper foil of 38 μm for an FR-4 printed wiring board shown in  FIG. 10  was prepared. 
     Nickel was physically deposited on the surface of a polyimide film having a thickness of 25 μm serving as the protective layer  33  by magnetron sputtering to form the resistive layer  32  having a thickness of 25 nm (sheet resistance: 30Ω per square). Thus, the resistive sheet  30  was obtained. Then, the resistive sheet  30  was bonded to the laminated sheet  1  through an adhesive of 10 μm (corresponding to the insulating thin-film layer  31 ) in a tenting state. Comparison was performed with respect to the laminated sheet  1  with no resistive sheet  30 . 
     When w=1 mm, t=43 μm, s=1 mm, d=2 mm, the thickness of the insulating sheet  10  t 0 =0.590 mm, the wire length 1=200 mm, and the tenting length=180 mm, the characteristic impedance and capacitance value between the power line  21  and the ground line  22  are shown in Table 1. Since the tenting state and the thickness of an adhesive (insulating thin-film layer  31 ) of 10 μm have no large effect, in this structure, Z 0  becomes ½. 
     
       
         
           
               
               
               
             
               
                 TABLE 1 
               
               
                   
               
               
                   
                 No Resistive Layer 
                 With Resistive Layer 
               
               
                   
               
             
            
               
                   
               
            
           
           
               
               
               
               
               
            
               
                 Z 0  when t r  = 35 ps 
                 80  
                 Ω 
                 43  
                 Ω 
               
               
                 Capacitance at 100 kHz 
                 7.15  
                 pF 
                 142  
                 pF 
               
               
                   
               
            
           
         
       
     
     The present invention is not limited to the foregoing embodiment, and various modifications may be made without departing from the scope of the invention. 
     INDUSTRIAL APPLICABILITY 
     The paired low-characteristic impedance power line and ground line structure of the present invention can be embedded in a printed wiring board or the like. 
     EXPLANATION OF REFERENCES 
     
         
         
           
               1 : LAMINATED SHEET 
               1 A: END PORTION 
               10 : INSULATING SHEET 
               11 : BASE INSULATING SHEET 
               12 : UNDERLAYER BASE INSULATING SHEET 
               20 : METAL WIRING LAYER 
               21 : POWER LINE 
               22 : GROUND LINE 
               30 : RESISTIVE SHEET 
               31 : INSULATING THIN-FILM LAYER 
               32 : RESISTIVE LAYER 
               33 : PROTECTIVE LAYER 
               40 : POWER SOURCE