Patent Publication Number: US-2007098058-A1

Title: Method and apparatus for compensating a signal for transmission media attenuation

Description:
BACKGROUND OF THE INVENTION  
      1. Field of the Invention  
      The invention relates in general to data transmission systems and in particular to a method and apparatus for compensating a data signal for frequency-dependant attenuation in transmission media.  
      2. Description of Related Art  
       FIG. 1  depicts an example prior art figital data tramsmission system including a transmitter  10  converting an input digital data sequence T X  into a signal V T  transmitted to a receiver  12  via transmission media  14 . Receiver  12  then converts the received signal V T  signal back into an output data sequence R X  matching input data sequence T X .  
       FIG. 2  illustrates the voltage of signal V T  as a function of time. Transmitter  10  organizes the V T  signal into a succession of data cycles of uniform duration, and during each data cycle, transmitter  10  drives the T X  signal to a high or low logic level depending on whether the current bit of the input T X  signal is a logical “1” or a logical “0”.  FIG. 2  shows how the V T  signal might look when representing the TX data sequence 10001011. Receiver  12  samples the V T  signal during the middle of each data cycle and compares each sample to a reference voltage V o  midway between the V T  signal&#39;s high and low voltage levels, or to a complementary version of the V T  signal, to determine whether the sample represents a 1 or a 0. In some systems transmitter  10  will send a clock signal (not shown) to receiver  12  to tell it when to sample the V T  signal. In other systems receiver  12  will generate its own sampling clock signal by monitoring the timing of V T  signal transitions through reference level V o  to ascertain an appropriate phase and frequency for the sampling clock signal.  
      The gain of any device, such as for example an amplifier, a transmission line or any other transmission media, is defined as
 
gain= V   out   /V   in 
 
 where V put  is the device&#39;s output signal voltage and V in  is the device&#39;s input signal voltage. 
 
      Electromagnetic signals, including electrical signals, radio frequence signals, optical signals and the like, undergo frequency-dependant attenuation as they pass through transmission media such as transmission lines, wave guides and other media. The amount of signal attenuation depends not only on the nature of the transmission media but also on signal frequency. For example,  FIG. 3  is a graph of the gain of any signal passing through an example transmission line as a function of the frequency of the signal. Note that for frequencies below about 200 MHz, the attenuation is relatively small and independent of frequency, but becomes progressively larger at frequencies above 200 MHz.  
      A digital signal has a frequency spectrum that depends not only on the period of its data cycle but also on the nature of the data sequence it represents. Assume, for example, that the V T  signal of  FIG. 1 a  digital signal having an 8 GHz bit rate, or 125 picosecond data cycle, and that the transmission media  14  has the frequency response shown in  FIG. 3 . When signal V T  represents a data sequence including long sequences of all 0&#39;s and all 1&#39;s, such that its signal transitions occur at less than a 200 MHz rate, the signal can act like a low frequency signal that transmission media  14  attenuates very little. When the V T  signal represents a long alternating sequence of 1&#39;s and 0&#39;s such as {10101010 . . . }, it can act more like a 4 GHz sine wave that transmission media  14  greatly attenuates. When digital signal V T  represents a more random bit pattern, it behaves like a signal having several frequency components having amplitudes that can vary with time, and the transmission media  14  attenuates each frequency component by a different amount.  
       FIG. 4  is an “eye diagram” showing how a digital signal V T  representing a random data pattern might look upon departing from transmitter  10  if a large number of data cycles were superimposed over one another.  FIG. 5  is an eye diagram illustrating the digital signal V T  representing a random data pattern might look upon arriving at receiver  12 . As shown in  FIG. 4  the V T  signal at the output of transmitter  10  does not vary much in amplitude or timing from cycle-to-cycle, so there is little variation in the high and low peak values during successive data cycles and a there is little variation in the timing with which the V T  signal crosses the reference voltage level V o  of  FIG. 2 . As illustrated in  FIG. 5 , the frequency dependant attenuation of transmission media  14  causes variation in the high and low logic levels of the V T  signal at the input to receiver  12  and also causes variation in the timing of signal peaks and level transitions from cycle-to-cycle. The latter effect is known as “jitter”.  
       FIGS. 4 and 5  are called an “eye diagrams” because the superimposed waveforms form an eye  15  or  17  in the middle of the diagram. The variation in logic level and the jitter in the V T  signal arriving at receiver  12  makes eye  17  of  FIG. 5  both shorter and narrower than eye  15  of  FIG. 4 . The height of eye  17  at its middle is related to the signal-to-noise ratio of signal V T ; the taller the eye, the greater the noise level needed to drive the signal to a level that will cause receiver  12  to incorrectly determine a bit state the signal represents. The width of eye  17  relates to how difficult it may be for receiver  12  to sample signal V T  at the correct time during each data cycle, particularly if receiver  12  is generating its sampling clock internally based on the timing of V T  signal reference level crossings.  
      When we increase the length of transmission media  14 , we increase its attenuation at all frequencies, causing eye  17  to be both shorter and narrower. We also decrease the height and width of eye  17  when we increase the bandwidth of signal V T  (i.e., when we decrease the period of its data cycle). When eye  17  becomes too short or thin, receiver  12  will be unable to correctly determine the state of each bit of the T X  data sequence signal V T  represents. Thus, there is a limit to the V T  signal bandwidth that the data transmission system can accommodate without failure, and that limit decreases as we increase the length of transmission media  14 .  
      Compensation  
      A data transmission system can increase the bandwidth limit of its transmission media by selectively boosting the various frequency components of a signal to compensate for their attenuation in the transmission media. In a “pre-emphasis” system, signal transmitter  10  of  FIG. 1  compensates for transmission media attenuation by filtering and amplifying the signal before sending it over transmission media  14 , while in an “equalization” system, signal receiver  10  compensates for transmission media attenuation by filtering and amplifying the signal after it passes through the transmission media, but before the receiver processes it to extract the R X  data sequence.  
       FIG. 6  illustrates a typical prior art pre-emphasis system. A transmitter  16  includes a buffer  22  for amplifying data signal T x  to produce a signal V in  supplied as input to a pre-emphasis filter  24  having a transfer function designed to provide more gain at high frequencies than at low frequencies, in a way that compensates for the way transmission media  20  attenuates the transmitted signal V T . A flat response amplifier  26  amplifies V out  to an appropriate level and transmits it as signal V T  to receiver  18  via an impedance matching circuit  28  and transmission media  20 .  
       FIG. 7  illustrates a typical prior art equalization system. A transmitter  30  converts the data sequence T x  without pre-emphasis into data signal V T  transmitted to receiver  32  via transmission media  34 . An impedance matching circuit  35  within receiver  32  delivers the V T  signal as an input signal V in  to an equalizer  36 . Equalizer  36  selectively filters and amplifies the various frequency components of the V in  signal to compensate for the frequency-dependant attenuation of transmission media  34 , thereby producing an output signal V out . Additional digital signal processing circuits  38  process Vout to produce the R x  output data sequence.  
       FIG. 8  is a block diagram for an equalizer circuit included in a data sheet entitled “MAXIM 10.7 Gbps Adaptive Receive Equalizer”, published July, 2003 by Maxim Integrated Products. Equalizer circuit  39 , which could be employed as equalizer  36  of  FIG. 7 , includes a flat frequency response amplifier  40  and a high pass frequency response amplifier  41 , each amplifying the V in  signal. A variable attenuator  42  attenuates the output of amplifier  40  by an amount controlled by a signal C 1  to produce a signal V 3 , and another variable attenuator  43  attenuates the output of amplifier  41  by an amount controlled by a signal C 2  to produce another signal V 4 . A summing amplifier  44  sums V 3  and V 4  to produce a signal V 5 , amplified by a limiting amplifier  45  to produce output signal V out . A feedback circuit  46  monitors low and high frequency bands of the V 5  signal and produces control signals C 1  and C 2 , to adjust the attenuation provided by attenuators  42  and  43  so that the V 5  signal exhibits a desired frequency spectrum.  
      In some data systems, the T x  data input to transmitter  30  of  FIG. 7  is encoded to cause the V T  signal to exhibit a particular frequency spectrum. For example, the T x  data may be produced by encoding a non-random bit sequence so that it appears as a pseudo random bit sequence having a limited and predictable range of frequency components. Equalizer  39  of  FIG. 8  is intended for use in such a system, where the V T  signal is expected to exhibit a predictable spectral characteristic. Feedback circuit  46  monitors V 5  and adjusts C 1  and C 2  so that V 5  exhibits the desired spectral characteristics. Feedback circuit  46  decreases or increases the attenuation of attenuator  42  when the voltage of the low frequency components of V 5  are too low or too high, and decreases or increases the attenuation of attenuator  46  when the voltage of high frequency components of V T  are too low or too high. When the nature of the expected frequency spectrum of V 5  changes, it is necessary to change the nature of feedback circuit  46 . Feedback control circuit  46  is not suitable for controlling C 1  and C 1  in a system where the V 5  signal is not expected to exhibit predictable spectral characteristics. C 1  and C 2  could be set to fixed values in such a system to provide equalization if the frequency response of transmission media  34  is known and if the relationship between values of C 1  and C 2  and the V in -to-V out  transfer function is known.  
      In any case, the ability of equalizer  39  to compensate for the transmission media attenuation depends in part on how well feedback control circuit can make its frequency response complement the frequency response of transmission media  34 . Ideally, equalizer  39  would amplify each frequency component of the V in  signal in proportion to the amount by which transmission media  34  attenuates that component of the VT signal. Although  FIG. 3  illustrates the frequency response of an example transmission line, transmission media exhibit a wide variety of frequency responses. For example, while the transmission line frequency response illustrated in  FIG. 3  begins to roll off at about 100 MHz, the frequency responses of other transmission lines may roll off at substantially higher or lower frequencies. The shape of the high frequency portion of the frequency response curve can also vary substantially, and in order to provide highly accurate compensation for a variety of transmission media, it is necessary to be able to tightly control the frequency response of the equalization or pre-emphasis circuit providing that compensation. The equalizer frequency response should closely match the inverse of the transmission media frequency response. Since equalization circuit  39  of  FIG. 8  has only two control inputs C 1  and C 2 , it has only two degrees of freedom with respect to matching the frequency response needed to ideally compensate for transmission media attenuation regardless of the frequency response characteristics of amplifiers  40  and  41 . Thus while, equalization circuit  39  enables separate adjustment of the amplitudes of the DC and high frequency portions of its frequency response, it permits no adjustment of any other characteristic of its frequency response.  
      What is needed is an equalization or pre-emphasis circuit permitting highly accurate control over its frequency response.  
     SUMMARY OF THE INVENTION  
      The attenuation of a signal passing through typical transmission media can be modeled as
 
Attenuation=1/( K   0   f   0   +K   0.5   f   0.5   +K   1   f   1   +K   2   f   2   + . . . +K   n   f   n ).
 
 where f is signal frequency, n is an integer at least as large as 1. The term K 0 f 0  reflects the contribution of DC losses to signal attenuation, the term K 0.5 f 0.5  reflects the contribution of skin effect losses to signal attenuation , and the polynomial K 1 f 1 +K 2 f 2 + . . . +K n f n  reflects the contribution of dielectric absorption losses to signal attenuation. 
 
      A programmable compensating circuit in accordance with the invention compensates a signal for transmission media attenuation by amplifying the signal with a gain of
 
Gain= K   0   f   0   +K   0.5   f   0.5   +K   1   f   1   +K   2   f   2   + . . . +K   n   f   n   [A]
 
 where coefficients K 0 , K 0.5 , and K 1 , K 2  . . . K n  are adjustable constants. Thus coefficient K 0  can be adjusted to compensate for DC attenuation in the transmission media, coefficient K 0.5  can be adjusted to compensate for skin effect attenuation in the transmission media, and coefficients K 1 , K 2  . . . K n  can be adjusted so that the n-terms of the expression compensate for dielectric absorption loss attenuation in the transmission media. Generally the larger the number (n) of terms in the polynomial of expression [A], the more accurate the compensation, but in most applications a compensation circuit implementing expression [A] can provide highly accurate compensation when n is from 1 to 3. 
 
      Since the terms of expression [A] closely model the three different types of transmission media attenuation, and since these types of attenuation can be accurately measured or predicted based on the physical characteristics of the transmission media, the user of the programmable compensating circuit can easily determine appropriate values for the coefficients.  
      A compensation circuit in accordance with the invention can omit the K 0.5 f 0.5  term from the above gain expression [A] so that it provides a gain that is a pure polynomial of signal frequency f,
 
Gain= K   0   f   0   +K   1   f   1   +K   2   f   2   + . . . +K   n   f   n   [B]
 
 A compensation circuit having the gain of expression [B] can compensate for transmission media losses as well as a compensation circuit having the gain of expression [A], but since skin effect losses are significant in most transmission media, a compensation circuit implementing the gain of expression [B] will normally require many more terms in its gain polynomial than a compensation circuit of the form of expression [A] in order to obtain an equivalent level of compensation accuracy, and will therefore require more hardware. However, when transmission media, such as for example a superconductor transmission line, does not have significant skin effect losses or conduction losses that are proportional to f 0.5 , the K 0.5 f 0.5  term of expression [A] is superfluous, and a compensation circuit implementing expression [B] is suitable. 
 
      A compensation circuit in accordance with the invention may be used either as a pre-emphasis circuit by amplifying the signal before it is sent over the transmission media, or as an equalization circuit amplifying the signal after it is sent over the transmission media.  
      A compensation circuit in accordance with one embodiment the invention includes a set of filters, each amplifying the circuit input signal with a frequency response and gain defined by a separate term of expression [A] or [B]. A summing amplifier then sums and scales the filter outputs to produce a compensated output signal. Values of coefficients K 1 , K 2  . . . K n  are independently adjustable.  
      A compensation circuit in accordance with another embodiment of the invention implements expression [A] by initially processing the input signal V IN  to produce a signal P 1 =log(V in ) and a signal P 2 =log(fV in ). The circuit then amplifies signal P 1  with a gain of A 0  to produce a signal Q 0 , summing Q o  with 0 to produce a signal R 0 , and then amplifies signal R 0  to produce a signal S 0 =antilog(R 0 ). For each value of j of the set j={0.5, 1, 2, 3 . . . n), the circuit amplifies P 2 −P 1  with gain j to produce a signal Q j , sums signal Q j  with a signal of magnitude log(A j ) to produce a signal R, and processes signal R j  to produce a signal S i =antilog(R i ). The circuit then amplifies each signal S j  with a separate gain B j  and sums resulting signals to produce the output signal V out . For each value of j of the set j={0, 0.5, 1, 2, 3 . . . n), A j  and B j  are constants, at least one of which is adjustable. A similar circuit omitting portions of the circuit that generate signals Q 0.5 , R 0.5 , and S 0.5  can implement expression [B]. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       FIG. 1  depicts a prior art data transmission system in block diagram form.  
       FIG. 2  is a timing diagram illustrating how a digital signal can represent a digital data sequence.  
       FIG. 3  is a frequency response diagram for a typical transmission media.  
       FIG. 4  is an eye diagram for a digital signal at an input of transmission media.  
       FIG. 5  is an eye diagram for a digital signal at an output of transmission media.  
       FIG. 6  depicts in block diagram form a prior art data transmission system employing a pre-emphasis circuit to compensate for transmission media attenuation.  
       FIG. 7  depicts in block diagram form a prior art data transmission system employing an equalizing circuit to compensate for transmission media attenuation.  
       FIG. 8  depicts in block diagram form a circuit for compensating for transmission media attenuation.  
       FIG. 9  depicts two series connected circuits in block diagram form.  
       FIG. 10  depicts in block diagram form an example compensation circuit in accordance with the invention.  
       FIG. 11  depicts the pre-scaling summing amplifier of  FIG. 10  in more detailed block diagram form.  
       FIG. 12  is a schematic diagram depicting the cascode stage and one of the input stages of  FIG. 11 .  
       FIG. 13  is a schematic diagram depicting the output stage of the circuit of  FIG. 11 .  
       FIGS. 14-16  are schematic and block diagram depicting the input stages of the circuit  FIG. 10  in more detail.  
       FIG. 17  depicts in block diagram form an example compensation circuit in accordance with an alternative embodiment of the invention.  
       FIG. 18  depicts in block diagram form a prior art data transmission system employing a pre-emphasis circuit to compensate for transmission media attenuation.  
       FIG. 19  depicts in block diagram form a prior art data transmission system employing an equalizing circuit to compensate for transmission media attenuation  
       FIG. 20  depicts a prior art digital filter in block diagram form.  
       FIG. 21  depicts a digital filter in accordance with the invention in block diagram form. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION  
      An electromagnetic signal, such as for example, an electrical signal, radio signal or optical signal, passing through a transmission line, wave guide or any other kind of transmission media, suffers an attenuation that is not only a function of the physical characteristics of the transmission media, but which is usually also a function of signal frequency. The invention relates to a method or apparatus for altering a signal passing through transmission media to compensate for frequency-dependant attenuation of the transmission media. The claims appended to this specification particularly point out and distinctly claim the subject matter of the invention. The following section of this specification describes preferred modes of practicing the invention recited in the claims. Although the following description includes numerous details in order to provide a thorough understanding of the preferred modes of practicing the invention, it will be apparent to those of skill in the art that other modes of practicing the invention need not incorporate such details.  
      As discussed above,  FIG. 3  illustrates the frequency response of an example transmission media showing that the attenuation of a signal passing over that transmission media increases with signal frequency. The shape of the frequency response curve depends on several different effects.  
      We define the gain of a signal passing though a circuit as
 
gain= V   out   /V   in 
 
 where V in  is the input signal voltage and V out  is the output signal voltage. A circuit that amplifies a signal such that V out &gt;V in  has a gain greater than 1 while a circuit that attenuates a signal such that V out &lt;V in  has gain less than 1. As discussed below, transmission media attenuates a signal by an amount that depends on the frequency of the signal. 
 
 DC Losses 
 
       FIG. 3 , depicting the gain for an example transmission media (in this example a transmission line) n as a function of signal frequency, shows that the transmission media attenuates all signal frequencies but that attenuation is relatively small and substantially independent of signal frequency for low signal frequencies under about 100 MHz. The DC resistance of a transmission line conductor, the main source of low frequency signal losses, depends on the cross-sectional area, length and material characteristics of the conductor and is independent of signal frequency. The DC losses in a transmission line cause a voltage drop in a signal passing through the transmission line. Since the current of a low frequency signal is relatively well distributed over the entire cross-section of the conductor, the conductor resistance seen by a low frequency signal is relatively small. The amount of voltage loss in a low frequency signal is therefore also usually relatively small.  
      Skin Effect Losses  
      At signal frequencies above 100 MHz, signal attenuation in a transmission line conductor is an increasingly important function of frequency, in part due to the well-known “skin effect” losses. The current of a high frequency signal is not evenly distributed through the cross-sectional area of a conductor, but resides mostly in a “skin area” near the surface of the conductor. The resistance of a conductor is proportional to the cross-sectional area of the skin area, and since current of a high frequency signal is restricted to a smaller cross-sectional area of the conductor than current of a low frequency signal, higher frequency signal components are subject to more attenuation. The depth of the skin area decreases with signal frequency, and skin effect losses increase with the square root of frequency.  
      Dielectric Absorption Losses  
      A signal is also subject to attenuation due to absorption losses through dielectric material contacting the transmission media and providing a distributed shunt capacitance along the transmission media. These losses increase with frequency, thereby causing greater attenuation at higher signal frequency.  
      Transmission Media Attenuation Model  
      The attenuation of a signal passing through typical transmission media can be modeled as
 
Attenuation=1/( K   0   f   0   +K   0.5   f   0.5   +K   1   f   1   +K   2   f   2   + . . . +K   n   f   n ).
 
 where f is signal frequency, n is an integer at least as large as 1. 
 
      The term K 0 f 0  reflects the contribution of DC losses to signal attenuation. The coefficient K 0  is a constant function of the structure, length and material characteristics of the transmission media and is independent of signal frequency. Since f 0 =1, the model correctly expresses DC attenuation as being independent of signal frequency. In the example of  FIG. 3 , K 0  is approximately 0.7 dB.  
      The term K 0.5 f 0.5  reflects the contribution of skin effect losses to signal attenuation, which is proportional to the square root of signal frequency. The magnitude of coefficient K 0.5  is a function of the structure, length and material characteristics of the transmission media.  
      The polynomial K 1 f 1 +K 2 f 2 + . . . +K n f n  reflects the contribution of dielectric absorption losses to signal attenuation. Coefficients K 1 , K 2 , K 3  . . . are functions of the structure, length and material characteristics of the transmission media. The higher order coefficients of the terms of the polynomial generally grow progressively smaller, and the number n of terms of the expression needed to model dielectric absorption losses depends on the required modeling accuracy. In most cases a value of n ranging from 1 to 3 will provide sufficient accuracy.  
      For some transmission media the values of coefficients K 0 , K 0.5 , K 1 , K 2 , . . . K n  can be calculated based on the physical characteristics of the media. It is also possible to experimentally determine the appropriate coefficient values by measuring attenuation by the media of signals having n+2 different signal frequencies. For example, if n=1, we can perform measurements at three known signal frequencies f a , f b , and f c  to determine three attenuation values A a , A b , and A c . We then write three equations in three unknowns
 
 A   a =1/( K   0   f   a   0   +K   0.5   f   a   0.5   +K   1   f   a   1 )
 
 A   b =1/( K   0   f   b   0   +K   0.5   f   b   0.5   +K   1   f   b   1 )
 
 A   c =1/( K   0   f   c   0   +K   0.5   f   c   0.5   +K   1   f   c   1 )
 
 and solve them for the three unknowns (K 0 , K 0.5 , K 2 ). 
 
 Digital Signal Distortion 
 
      As illustrated in  FIG. 2 , a transmitter organizes a digital signal V T  into a succession of data cycles, each corresponding to a separate bit of a data sequence T X . The voltage level of V T  during each data cycle is a symbol for the corresponding bit. In the example of  FIG. 2 , V T  represents a digital “1” during any cycle in which its voltage is above a reference level V o  and a digital “0” during any cycle in which its voltage is below V o . The frequency spectrum of digital signal V T  depends not only on the period of its data cycle but also on the nature of the data sequence T x  the signal represents. Assume, for example, that the V T  signal has an 8 GHz data cycle. When it represents a data sequence including long sequences of all 0&#39;s and all 1&#39;s, such that V T  signal transitions occur at less than a 200 MHz rate, the signal can act like a low frequency signal that transmission media  14  attenuates very little. When the V T  signal represents a long alternating sequence of 1&#39;s and 0&#39;s {10101010 . . . } it can act like a 4 GHz sine wave that transmission media  14  greatly attenuates. When digital signal V T  represents a more random bit pattern, it behaves like a signal having several frequency components.  
      When a high frequency digital signal passes through transmission media having the frequency response shown in  FIG. 3 , the transmission media attenuates frequency components higher than about 2 GHz by substantially differing amounts. Such variation in attenuation distorts the signal not only by reducing the separation between the signal&#39;s high and low logic levels by varying amounts, but also by varying the relative timing during each data cycle of signal peaks and reference level crossings. These effects are sometimes called “intersymbol distortion” because the voltage level during one data cycle, which is a symbol for a data bit, can influence voltage levels during other data cycles. Intersymbol distortion, if severe enough, can cause a signal receiver to incorrectly determine the state of data bits the signal represents during some data cycles. Any reduction in separation of the signal&#39;s peaks reduces its signal-to-noise ratio, making it possible for smaller noise spikes to temporarily drive the signal to the wrong side of reference level V o , thereby causing the receiver to misinterpret the state of a represented bit. While a receiver should sample the digital signal at a time during each data cycle at which the signal is at its peak, variation in signal timing (jitter) resulting from intersymbol distortion can cause the receiver to sample the signal other than at its peak during some data cycles, thereby lowering the signal&#39;s effective signal-to-noise ratio. Since signal distortion increases with signal frequency, there is a limit to the signal bandwidth that transmission media can accommodate while maintaining signal-to-noise ratio at an acceptable level. Since signal distortion also increases with transmission media length, there is a limit to the transmission media length that will permit an acceptable signal-to-noise ratio for a signal of a given bandwidth.  
      Compensation  
       FIGS. 6 and 7  illustrate prior art data transmission systems in which a transmitter converts an input bit sequence T x  into a digital signal V T  it transmits to a receiver via transmission media. The receiver then processes the digital signal V T  to produce an output bit sequence Rx matching input bit sequence T x . Each data transmission system increases the allowable length and/or bandwidth of transmission media by selectively boosting the various frequency components of the V T  signal to compensate for the signal distortion caused by the transmission media.  
      In a “pre-emphasis” system as illustrated in  FIG. 6 , signal transmitter  16  includes a pre-emphasis circuit  24  that compensates the V T  signal before sending it over transmission media  20 . An amplifier  22  converts the T X  sequence into an input signal V in  to pre-emphasis circuit  24  and another amplifier  26  amplifies the output signal V out  of pre-emphasis circuit  24  to produce the V T  signal forwarded to transmission media  16  via an impedance matching circuit  20 . In an “equalization” system as illustrated in  FIG. 7 , a signal receiver  32  compensates the V T  signal after it passes over the transmission media  34 , but before processing it to extract the R X  data sequence. An impedance matching circuit  35  delivers the uncompensated V T  signal as an input signal V in  to an equalizer  36  that compensates the V in  signal for transmission media distortion to produce an output signal V out . Additional digital processing circuits  38  then processes the Vout signal to produce the R X  data sequence.  
      The voltage gain or loss of two circuits connected in series is multiplicative. For example as shown in  FIG. 9  when circuits  47  and  48  having frequency dependant gain functions G 1  and G 2  are connected in series, the total gain is G 1 *G 2 . For a pre-emphasis system, the pre-emphasis circuit in the transmitter acts as circuit  47  and the transmission media acts as circuit  48 . In such case, the gain G 2  of the transmission media is a function of frequency and is always negative for each frequency component because it attenuates all signal frequencies. In order best compensate for the transmission media attenuation, we would like the gain function G 1  of the pre-emphasis circuit  47  to be the inverse of the attenuation G 2  of the transmission media
 
 G   1 =1/ G   2 
 
 so that they will cancel one another
 
 G   1   *G   2 =0.
 
 In such case the amount by which pre-emphasis circuit  47  amplifies any given frequency component of the signal would exactly offset the amount by which the transmission media attenuates that frequency component. 
 
      Similarly, for an equalization system, the equalizer in the receiver acts as circuit  48  and the transmission media acts as circuit  47 . In such case the attenuation G 1  of the transmission media is a function of frequency and is always negative for each frequency component. In order best compensate for the transmission media attenuation, we would like the gain G 2  of equalizer  47  to be the inverse of the attenuation G 1  of the transmission media
 
 G   2 =1/ G   1 
 
 so that they will cancel one another. 
 
      As discussed above, the attenuation G tl  of transmission media conveying a signal can be modeled by
 
 G   tl =1/( K   0   f   0   +K   0.5   f   0.5   +K   1   f   1   +K   2   f   2   + . . . +K   n   f   n )
 
 where coefficients K 0 , K 0.5  and K 1  . . . K n  are constants, f is the frequency of the signal and n is an integer at least as large as 1. Increasing the value of n increases model accuracy. 
 
      An equalizer or a pre-emphasis circuit in accordance with the invention therefore should have a compensating gain G c  such that
 
 G   c   *G   tl   =M 
 
 where M is a constant that is independent of frequency. Thus, for example, when n is 1 and M=0, the gain of the equalizer or a pre-emphasis circuit would be
 
 G   c   =K   0   f   0   +K   0.5   f   0.5   +K   1   f   1 
 
 When, for example, n=3, the compensating gain is
 
 G   c   =K   0   f   0   +K   0.5   f   0.5   +K   1   f   1   +K   2   f   2   +K   3   f   3 
 
 The larger the value of n, the more accurate the compensation. The compensating gain expression for non-zero values of M would have the same form as the above expression, but coefficient K o  would change in proportion to the value of M. 
 
       FIG. 10  is a block diagram depicting a circuit  49  in accordance with the invention that can act as either a pre-emphasis circuit or an equalizer for amplifying an input signal V in  to produce a compensated output signal with gain G c . Circuit  49  includes n+2 input circuits  54 ,  55  and  56 - 1  through  56 -n. For each value of the set j={0, 0.5, 1, 2 . . . n) a corresponding one of the input circuits amplifies V in  with a gain of A j f i  to produce a separate differential output signal S j . An output circuit  58  comprising a prescaling summing amplifier amplifies each signal S j  with a corresponding gain B j  and sums the resulting signal to produce the V out  signal. The values of all coefficients A j  and B j  are independently adjustable, and are suitably adjusted to satisfy the following relationships:
 K 0 =A 0 B 0   K 0.5 =A 0.5 B 0.5   K 1 =A 1 B 1   K 2 =A 2 B 2   . . .  K n =A n B n   
 The gain of circuit  49  is
 gain=K 0   f   0 +K 0.5   f   0.5   +K   1   f   1   +K   2   f   2   + . . . +K   n   f   n . 
       FIG. 11  depicts an example implementation of output circuit  58  of  FIG. 10  in more detailed block diagram form. Output circuit  58  includes a set of input stages  60 ,  61  and  62 - 1  through  62 -n, each of which converts the voltage its corresponding one of input signals S 0 , S 0.5 , S 1 , . . . S n  to a corresponding differential current (I 0 , I 0.5 , I 1 , . . . I n ) and the input signal to each stage controls the relative magnitude of that stage&#39;s output differential current. Each input stage  60 ,  61  and  62 - 1  through  62 -n, also produces a corresponding compensating current (I c0 , I c0.5 , I c1 , . . . I cn ) having magnitudes that are functions of the magnitude of the stage&#39;s corresponding gain control data B 0 , B 0.5 , B 1 , . . . B n  and of the stage&#39;s S 0 , S 0.5 , S 1 , . . . S n . A cascode amplifier stage  66  produces a differential output voltage V p  in response to the output currents of all stages, and an output stage  60  produces the V out  signal in response to V p .  
       FIG. 12  depicts input stage  60  and cascode stage  66  of  FIG. 11  in more detail. Stages  61  and  62 - 1  through  62 -n are similar to stage  60 . Cascode stage  66  includes transistors Q 1  and Q 2  and resistors R 1  and R 2  connecting the collectors of transistors Q 1  and Q 2  to a voltage source DVCC. A voltage source DVDD drives the bases of transistors Q 1  and Q 2 . Cascode state  66  supplies an output signal V p  developed across resistors R 1  and R 2  that is proportional to a sum of currents produced by input stages  60 ,  61  and  62 - 1  through  62 -n of  FIG. 11 .  
      Input stage  60  includes a set of transistors Q 3 -Q 16 , a pair of digital-to-analog converters (DACs)  52  and  53  and a set of resistors R 3 -R 11  coupling a voltage source DVEE to the emitters of transistors Q 3 -Q 12 , respectively. Resistors R 12  and R 13  couple input signal S 0  to the bases of transistors Q 15  and Q 16 . The emitters of transistors Q 15  and Q 16  are connected to the collectors of transistors Q 10  and Q 12 , respectively, and emitters of transistors Q 13  and Q 14  are connected to the collectors of transistors Q 8  and Q 9 . DAC  53  converts input gain control data B 0  to complementary voltage signals V M  and V MN . Signal V M  drives the bases of transistors Q 3 -Q 5 , and the collector of transistor Q 3 . Signal V MN  drives the bases of transistors Q 6 , Q 8  and Q 9 , and the collector of transistor Q 8 . DAC  52  converts input bias control data B 0b  to a signal V B  for driving the bases of transistors Q 7 , Q 10  and Q 12  and the collector of transistor Q 7 .  
      Transistors Q 10 , Q 12 , Q 15  and Q 16  and resistors R 7  and R 11  form an emitter follower amplifier for controlling relative magnitudes of differential currents I 0a  and I 0b  in response to input signal S 0 . Transistors Q 8 , Q 9 , Q 13  and Q 14  and resistors R 9  and R 10  form a differential amplifier for producing differential compensating currents I c0a  and I c0b  in response to the bias voltage output of DAC  52 . Transistors Q 3 -Q 5  and resistors R 3 -R 5  form a current mirror for providing output voltage compensation. Transistors Q 7 -Q 9  and resistors R 7 , R 10  and R 11  for a current mirror providing gain control  
       FIG. 13  depicts an example implementation of output stage  65  of circuit  58  of  FIG. 11 . Output stage  65  includes a peaking circuit  77  including inductors L 1  and L 2  and resistors R 16  and R 17  for leveling the frequency response of signal V p  to provide an input to a driver  78  formed by transistors Q 16 -Q 19  and resistors R 18  and R 19  for producing the output signal V out . Inductors L 1  and L 2  and resistors R 16  and R 7  couple V p  across the bases of transistors Q 16  and Q 1 . Collectors of transistors Q 16  and Q 17  and bases of transistors Q 18  and Q 19  are tied to voltage source DVFF. The emitter of transistor Q 17  is coupled to ground through the collector-emitter path of transistor Q 18  and resistor  18  while the emitter of transistor Q 18  is coupled to ground through the emitter-collector path of transistor  19  and through resistor  19 . Output signal V out  appears across the collectors of transistors Q 16  and Q 17 .  
       FIG. 14  depicts an example implementation of input circuit  54  of  FIG. 10  for amplifying V in  with a flat gain of A 0  to produce S 0 . An attenuator  78  formed by resistors R 20 -R 23  having a flat response couples V in  to a differential amplifier  80  producing an output signal V v . A peaking circuit  82 , formed by resistors R 30  and R 31  and inductors L 3  and L 4 , couples the output of amplifier  80  to an output driver  84  producing output signal S 0 . Amplifier  80  includes transistors Q 20 -Q 27 , resistors R 24 -R 29 , and transistors Q 21 -Q 27 . Resistors R 20  and R 21  couple V in  to bases of transistors Q 20  and Q 21 . Resistors R 22  and R 23  couple a source DVB 3  to bases of transistors Q 20  and Q 21 . Emitters of transistors Q 20  and Q 21  drive bases of differential transistor pair Q 22  and Q 23  and are connected to source DVEE through resistors R 26  and R 27 , the collector-emitter path of transistors Q 25  and resistor R 29 . The collector-emitter path of transistors Q 24  and Q 25  couple emitters of transistors Q 22  and Q 23  to DVEE. Resistors R 24  and R 25  and the collector-emitter paths of transistors Q 26  and Q 27  couple the collectors of transistors Q 22  and Q 23  to DVCC. A source DVB 1  biases the bases of transistors Q 24  and Q 25 , and a source DVB 2  biases the bases of transistors Q 26  and Q 27 . Output driver  84  includes transistors Q 28  through Q 31 , and resistors R 30  and R 31 . Filter  82  couples the output signal V v  of amplifier across the bases of transistors Q 28  and Q 29 , the collectors of which are tied to source DVCC. Output signal S 0  appears across the emitters of transistors Q 28  and Q 29 . The collector-emitter path of transistors Q 30  and resistor R 32  couple the emitter of transistor Q 28  to ground. The collector-emitter path of transistors Q 31  and resistor R 33  couple the emitter of transistor Q 29  to ground. Source DVDD drives the bases of transistors Q 30  and Q 31 .  
       FIG. 15  depicts an example implementation of input circuit  55  of  FIG. 10  for amplifying V in  with gain proportional to the square root of the V in  signal frequency to produce output signal S y . Input circuit  55  includes a filter stage  88  formed by resistors R 34 -R 49  and inductors L 36 -L 49  having a frequency response that is proportional to the square root of the V in  signal frequency to supply an input signal to a differential amplifier  90  similar to amplifier  80  of  FIG. 12  . A peaking circuit  92 , similar to peaking circuit  82  of  FIG. 14 , couples the output of differential amplifier  90  to the input of an output driver  94  similar to driver  84  of  FIG. 14 . Driver  94  produces output signal S 0.5 .  
       FIG. 16  depicts an example implementation of input circuit  56 - 1  of  FIG. 10  for amplifying V in  with gain proportional to the V in  signal frequency to produce output signal S 1 . Input circuit  56 - 1  includes a filter stage  98  formed by resistors R 50  and L 50  and inductors L 50 -L 51  having a frequency response proportional to V in  signal frequency to supply an input signal to a differential amplifier  100  similar to amplifier  80  of  FIG. 14  . A peaking circuit  102 , similar to peaking circuit  82  of  FIG. 14 , couples the output of differential amplifier  100  to the input of an output driver  104  similar to driver  84  of  FIG. 14 . Driver  104  produces output signal S 1 .  
      Those of skill in the art will appreciate that input circuits  56 - 2  through  56 -n of  FIG. 10  may be generally similar in design to input  56 - 1  of  FIG. 16  with filter  102  modified as necessary to provide the appropriate frequency response.  
      In the preferred embodiment of the invention, the gain of a pre-emphasis or equalizing compensation circuit is:
 
gain= K   0   f   0   +K   0.5   f   0.5   +K   1   f   f   +K   2   f   2   + . . . +K   n   f   n   [1]
 
      As discussed above, a compensation circuit implementing this includes a separate filter for each term of expression [1] and a summing amplifier for summing the outputs of the filter. For a typical transmission media, the K 0  and K 0.5 f 0.5  terms model attenuation due to DC and skin effect losses in a typical transmission media, respectively, and the polynomial (K 1 f 1 +K 2 f 2 + . . . +K n f n ) models attenuation due to dielectric absorption losses. Generally the larger the number (n) of terms in the polynomial, the more accurate the compensation, but in most applications n need not exceed 2 or 3 to provide satisfactory compensation.  
      From a mathematical standpoint, a compensation circuit having a gain that is a pure polynomial in f of the form
 
gain=K 0   f   0   +K   1   f   1   +K   2   2   + . . . +K   n   f   n   [2]
 
 can compensate for transmission media losses just as well as a pre-emphasis or equalizing circuit having the gain of expression [1]. Note that expressions [1] and [2] are similar except that expression [2] omits the term K 0.5 f 0.5 . In most applications, the drawback to employing a compensation circuit having the gain of expression [2], is that it will normally require many more terms in its gain polynomial than a compensation circuit of the form of expression [1] in order to obtain an equivalent level of compensation accuracy. Since attenuation due to skin effect losses are proportional to f 0.5 , expression [1] directly models those losses with a single term K 0.5 f 0.5  suitably implemented by a single filter. Lacking the K 0.5 f 0.5  term, expression [2] must model skin effect losses using a truncated version of an infinite series to give comparable results, and a compensating circuit implementing expression [2] would require more circuitry implementing a greater number of terms than a compensating circuit implementing expression [1]. 
 
      Thus while it is possible to construct a compensation circuit having the gain of expression [2], such a compensation circuit would normally be more hardware intensive than a compensation circuit having the gain of expression [1] in most applications. However in some applications, such as for example in compensating for losses in superconductors, where skin effect losses are normally negligible, the compensating circuit of  FIG. 10  can be adapted to implement the gain expression of expression [2] by omitting filter  55 .  
       FIG. 17  depicts an alternative embodiment of a pre-emphasis or equalizing compensation circuit in accordance with the invention providing a gain implementing expression [1] above. A logarithmic amplifier  140  amplifies input signal V IN  to produce an output signal
   V   1 =log( V   i n). 
 An amplifier  141  amplifies V 1  with a gain of A 0  to produce a signal Q 0 . A summing amplifier  143  sums Q o  with 0 to produce an output signal R 0 , and an antilog amplifier  144  amplifies R 0  to produce an output signal
   S   0 =antilog( R   0 ) 
 A logarithmic frequency amplifier  152  amplifies input signal V IN  to produce an output signal
   V   2 =log( fV   in ) 
 For each value of j of the set j={0.5, 1, 2, 3 . . . n): 
 
      1. a separate one of a set of n+1 amplifiers  154 ( 0 )- 154 (n) subtracts V 1  from V 2  and amplifies the result with gain j to produce an output signal Q j ,  
      2. a separate one of a set of n+1 summing amplifiers  156 ( 0 )- 156 (n) sums each signal Q j  with a signal of magnitude log(A j ) to produce an output signal R, and  
      3. a separate one of a set of n+1 anti-log amplifiers  158 ( 0 )- 158 (n) amplifies each signal R j  to produce an output signal S j =antilog(R i ).  
      A prescaling summing amplifier  160  amplifies each signal S j  with a separate gain B j  and sums the resulting signals to produce output signal V out . For each value of j, at least one of constants A j  and B j  is independently adjustable, and adjusted to satisfy the relationships
 
K 0 =A 0 B 0 
 
K 0.5 =A 0.5 B 0.5 
 
K 1 =A 1 B 1 
 
K 2 =A 2 B 2 
 
. . . 
 
K n =A n B n 
 
 such that the gain of the circuit of  FIG. 18  is
 
gain= K   0   j   0   +K   0.5   f   0.5   +K   1   f   1   +K   2   f   2   + . . . +K   n   f   n 
 
 consistent with expression [1] above. 
 
 When amplifiers  154 ( 0 ),  156 ( 0 ) and  158 ( 0 ) are omitted from the circuit of  FIG. 18 , its overall gain is
 
gain= K   0   f   0   +K   1   f   1   +K   2   f   2   + . . . +K   n   f   n 
 
 consistent with expression [2] above. 
 
 Compensation Using an FIR Filter 
 
      Pre-emphasis or equalization can also be provided by a digital or analog finite impulse response (FIR) filter in accordance with the invention within a transmitter or a receiver.  
       FIG. 18  illustrates a data transmission system including a transmitter  200  for converting input data T X  defining an analog output signal V T  transmitted to a receiver  202  via transmission media  204 . In transmitter  200 , the T x  data is supplied as a data sequence input x(i) to a digital filter  206  producing output data sequence y(i) re-defining the V T  signal so as to compensate it for distortion in transmission media  204 . A digital-to-analog converter (DAC)  208  and a low pass filter (LPF)  210  convert the y(i) data sequence into an analog signal V T  forwarded through an impedance matching circuit  212  to transmission media  204 .  
       FIG. 19  illustrates a data transmission system including a transmitter  214  for converting input data T X  defining an analog output signal V T  transmitted to a receiver  216  via transmission media  217 . In receiver  216 , an impedance matching circuit  218  applies the V T  signal as input to an analog-to-digital converter (ADC)  220  supplying an output sequence x(i) representing V T  as input to a digital filter  222 . Digital filter  222  acts as an equalizer, processing the x(i) sequence to produce an output sequence y(i) representing an equalized version of the V T  input to receiver  216 . Additional conventional digital signal processing circuits  224  processes the y(i) sequence to produce output sequence R x .  
      As illustrated in  FIG. 20 , an appropriately programmed conventional m+ 1  tap digital FIR filter  168  could be employed either as digital filter  206  of  FIG. 18  or as digital filter  222  of  FIG. 19 . The number of taps m+1 is an integer greater than 1. Generally the more taps, the more accurately the filter is able to approximate the desired transfer function. Filter  168  includes a series of delay elements  170 ( 1 ) . . .  170 ( m ) such as registers clocked by a clock signal (CLK) indicating when each input data sample x(i) is valid. Each k th  delay element  170 ( k ) delays its input data by one CLK cycle to produce output data x(i−k). For each value of k=0 to m, a separate multiplier  172 ( k ) multiplies x(i−k) by C k . A set of summers  174 ( 0 ) through  174 (m−1) sum the outputs of multipliers  172 ( 0 ) through  172 ( k ) to produce an input to a latch  175  clocked by the CLK signal to produce output data sequence y(i).  
      Digital filter  168  has a transfer function of the form
 
 y ( i )= C   0   x ( i )+ C   1   x ( i− 1)+ C   2   x ( i− 2)+ . . .  C   m   x ( i−m )
 
 where x(p) is the p th  sample of an input data sequence x representing the signal to be compensated and y(p) is the p th  element of an output data sequence representing the compensated signal. This transfer function can also be expressed in the form
 
 y/x=C   0   +C   1   z   −1   +C   2   z   −2   +C   3   z   −3    . . . C   m   z   −m   [3]
 
 where z −1  is the unit delay function. Assuming that filter  168  is to approximate a compensating frequency response of the form
 
 F ( f )= K   0   +K   1   f+K   2   f   2   +K   3   f   3   + . . .   [4]
 
 where f is signal frequency and {K 0 , K 1 , K 2 , K 3  . . . } are constants, it is necessary to choose the proper values for the tap coefficients C 0 -C m . It is known to compute the necessary values of the digital filter transfer coefficients of transfer function [3] by first creating a Fourier series approximation of the frequency response function and then equating the series coefficients with the transfer function coefficients. Various refinements known to those of skill in the art such as windowing functions and phase correction can be applied to improve the accuracy of coefficient computation. It is also normally possible to employ successive Laplace and Z transforms to convert the frequency response function into the filter transfer function. 
 
      Although any desired frequency response can be expressed as a polynomial of frequency as in expression [4] above, the number of terms needed to accurately compensate for typical transmission media distortion including skin effect attenuation is typically much larger than the number of terms needed when the frequency response function is expressed in the following form:
 
 F ( f )= K   0.5   f   0.5   +K   0   +K   1   f+K   2   f   2   +K   3   f   3   + . . .   [5]
 
 which can be approximated by a digital filter having the following transfer function:
 
 y/x=C   0.5   z   −0.5   +C   0   +C   1   z   −1   +C   2   z   −2   +C   3   z   −3    . . . C   m   z   −m   [6].
 
      Referring to  FIG. 20 , the conventional FIR filter  168  is not adapted for efficiently implementing the C 0.5 z −0.5  term because, lacking the ability to directly compute the term C 0.5 f 0.5 , it would require a large number of taps to accurately represent the term.  
       FIG. 21  depicts a digital FIR filter  178  in accordance with the invention, suitable for use as FIR filter  206  or  222  of  FIG. 18  or  19 , that does implement the C 0.5 z 0.5  term. Each i th  input data sequence sample x(p) provides an input to a series of delay elements  180 ( 1 ) . . .  180 ( m ) clocked by the leading edge of clock signal CLK, and each k th  delay element  180 ( k ) delays its input data by one CLK signal cycle to provide output data x(p−k). For each value of k=0 to m, a separate multiplier  172 ( k ) multiples x(p−k) by C k . A set of summers  184 ( 0 ) through  184 ( m− 1) sum the outputs of multipliers  182 ( 0 ) through  182 ( m ) to produce a data value y′(i). An additional delay element  180 ( 0 . 5 ), clocked on the trailing edge of clock signal CLK, delays data element x(p) by one half cycle of the CLK signal to produce output data element x(p−0.5). Multiplier  182 ( 0 . 5 ) multiplies x(p−0.5) by C 0.5  and a summer  184 ( 0 . 5 ) sums the result with y′(p) to produce output data latched by latch  185  clocked at twice the CLK signal frequency to produce output sequence y(p).  
       FIG. 22  illustrates a data transmission system including a transmitter  300  for converting input data T X  defining an analog output signal V T  transmitted to a receiver  302  via transmission media  304 . In transmitter  300 , an analog T x  data signal is supplied as an input signal x(i) to an analog FIR filter  306  producing an analog output signal y(i) forwarded through an impedance matching circuit  312  as the V T  input signal to transmission media  304 .  
       FIG. 23  illustrates a data transmission system including a transmitter  314  for converting input data T X  defining an analog output signal V T  transmitted to a receiver  316  via transmission media  317 . In receiver  316 , an impedance matching circuit  318  couples the V T  signal an input signal x to an analog FIR filter  322 . Filter  322  acts as an equalizer, processing input signal x to produce an output signal y as an equalized version of the V T  input to receiver  316 . Additional digital signal processing circuits  324  process filter output signal y to produce output sequence R x    
       FIG. 24  depicts an analog FIR filter  378  in accordance with the invention, suitable for use as FIR filter  306  or  322  of  FIG. 22  or  23 , that directly implements the C 0.5 z −0.5  term. The analog x signal is applied as input to a series of delay elements  380 ( 1 ) . . .  380 ( m ) clocked by the leading edge of clock signal CLK, and each k th  delay element  380 ( p ) delays its input signal by one CLK signal cycle to provide output data x(p−k). For each value of k=0 to m, a separate multiplier  372 ( k ) multiples x(p−k) by C k . A set of summers  384 ( 0 ) through  384 ( m− 1) sum the outputs of multipliers  382 ( 0 ) through  382 ( m ) to produce an analog signal y′. An additional delay element  380 ( 0 . 5 ), clocked on the trailing edge of clock signal CLK, delays the x(p) signal by one half cycle of the CLK signal to produce output signal x(i−0.5). Multiplier  382 ( 0 . 5 ) multiplies x(p−0.5) by C 0.5  and a summer  384 ( 0 . 5 ) sums the result with y′(p) to produce output signal y(p).  
      When applied to the frequency response expression [5], conventional approaches for computing filter tap coefficients C 0 , C 1 , . . . C m  of the digital and analog FIR filters of  FIGS. 21 and 25  under the assumption that K 0.5 =0, as would be the case when the transmission media has no skin effect losses. For more typical transmission media exhibiting skin effect losses that render K 0.5  nonzero, tap coefficient C 0.5  is suitably set to
 
 C   0.5   =K   0.5 /(2π) 0.5 .
 
 In some cases an analytical solution for coefficients C 0.5 , C 0 , C 1  . . . C m  can be obtained using conventional mathematical techniques, including variable transformation based upon Z transforms including the square root of z or the square root of algebraic functions of z whose corresponding time domain functions are Bessel and Hankel functions. 
 
      The claims appended to this specification particularly point out and distinctly claim the subject matter of the invention. Although an example of the invention described above includes numerous details in order to provide a thorough understanding of that particular mode of practicing the invention, it will be apparent to those of skill in the art that other modes of practicing the invention recited in the claims need not incorporate such details. For example, while the drawings illustrate example implementations of various components of the invention having particular circuit topologies, those of skill in the art will appreciate that such components could be implemented using other circuit topologies to achieve similar functionality.