Patent Publication Number: US-10785568-B2

Title: Reducing audio artifacts in a system for enhancing dynamic range of audio signal path

Description:
RELATED APPLICATION 
     The present disclosure claims priority to U.S. Provisional Patent Application Ser. No. 62/017,676, filed Jun. 26, 2014, which is incorporated by reference herein in its entirety. 
    
    
     FIELD OF DISCLOSURE 
     The present disclosure relates in general to circuits for audio devices, including without limitation personal audio devices, such as wireless telephones and media players, and more specifically, to systems and methods for reducing audio artifacts in a system for enhancing a dynamic range of an audio signal path in an audio device. 
     BACKGROUND 
     Personal audio devices, including wireless telephones, such as mobile/cellular telephones, cordless telephones, mp3 players, and other consumer audio devices, are in widespread use. Such personal audio devices may include circuitry for driving a pair of headphones or one or more speakers. Such circuitry often includes a power amplifier for driving an audio output signal to headphones or speakers. 
     One particular characteristic of a personal audio device, which may affect its marketability and desirability, is the dynamic range of its audio output signal. Stated simply, the dynamic range is the ratio between the largest and smallest values of the audio output signal. One way to increase dynamic range is to apply a high gain to the power amplifier. However, noise present in an audio output signal may be a generally monotonically increasing function of the gain of the power amplifier, such that any increased dynamic range as a result of a high-gain amplifier may be offset by signal noise which may effectively mask lower-intensity audio signals. 
     U.S. patent application Ser. No. 14/083,972, filed Nov. 19, 2013, entitled “Enhancement of Dynamic Range of Audio Signal Path,” and assigned to the applicant (Cirrus Logic, Inc.) of the present disclosure (the “&#39;972 Application”) discloses methods and systems for enhancing the dynamic range of an audio signal path. In the &#39;972 Application, an apparatus for providing an output signal to an audio transducer includes an analog signal path portion, a digital-to-analog converter (DAC), and a control circuit. The analog signal path portion has an audio input for receiving an analog signal, an audio output for providing the output signal, and a selectable analog gain, and may be configured to generate the output signal based on the analog signal and in conformity with the selectable analog gain. The DAC has a selectable digital gain and may be configured to convert a digital audio input signal into the analog signal in conformity with the selectable digital gain. The control circuit may be configured to select the selectable analog gain and select the selectable digital gain based on a magnitude of a signal indicative of the output signal. 
     In the &#39;972 Application, when changing selection between the selectable digital gain and the selectable analog gain, audible audio artifacts (e.g., “pops” and “clicks”) may be heard by a listener of an audio device unless measures are taken to reduce or eliminate such audio artifacts. 
     U.S. Pat. No. 8,194,889, granted Jun. 5, 2012, entitled Hybrid Digital/Analog Loudness-Compensating Volume Control (the “&#39;889 Patent”), discloses a loudness-compensating volume control method that imposes a desired loudness scaling on an audio signal by processing the audio signal in both the digital and analog domains by receiving a desired loudness scaling, deriving a wideband gain component and one or more other gain components from the desired loudness scaling, applying in the digital domain modifications to the audio signal based on the one or more other gain components to produce a partly-modified audio signal, and applying in the analog domain modifications to the partly-modified audio signal based on the wideband gain component. In the &#39;889 Patent, when modifying and applying the wideband gain component, audible audio artifacts may be heard by a listener of an audio device unless measures are taken to reduce or eliminate such audio artifacts. 
     SUMMARY 
     In accordance with the teachings of the present disclosure, one or more disadvantages and problems associated with existing approaches to reducing audio artifacts in a system for maintaining a high dynamic range of an audio signal path may be reduced or eliminated. 
     In accordance with embodiments of the present disclosure, an apparatus for providing an output signal to an audio transducer may include a signal path and a control circuit. The signal path may include an analog signal path portion and a digital path portion. The analog signal path portion may have an audio input for receiving an analog signal, an audio output for providing an output signal, and a selectable analog gain, and configured to generate the output signal based on the analog signal and in conformity with the selectable analog gain. The digital path portion may have a selectable digital gain and configured to receive a digital input signal and convert the digital input signal into the analog signal in conformity with the selectable digital gain. The control circuit may be configured to predict, based on one or more characteristics of a signal indicative of the output signal, an occurrence of a condition for changing the selectable digital gain and the selectable analog gain, and responsive to predicting the occurrence of the condition, change, at an approximate zero crossing of the signal indicative of the output signal, the selectable digital gain and the selectable analog gain. 
     In accordance with these and other embodiments of the present disclosure, a method may include, in a signal path comprising an analog signal path portion having an audio input for receiving an analog signal, an audio output for providing an output signal, and a selectable analog gain, and configured to generate the output signal based on the analog signal and in conformity with the selectable analog gain and further comprising a digital path portion having a selectable digital gain and configured to receive a digital input signal and convert the digital input signal into the analog signal in conformity with the selectable digital gain, predicting, based on one or more characteristics of a signal indicative of the output signal, an occurrence of a condition for changing the selectable digital gain and the selectable analog gain. The method may also include, responsive to predicting the occurrence of the condition, changing, at an approximate zero crossing of the signal indicative of the output signal, the selectable digital gain and the selectable analog gain. 
     Technical advantages of the present disclosure may be readily apparent to one skilled in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims. 
     It is to be understood that both the foregoing general description and the following detailed description are examples and explanatory and are not restrictive of the claims set forth in this disclosure. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein: 
         FIG. 1  is an illustration of an example personal audio device, in accordance with embodiments of the present disclosure; 
         FIG. 2  is a block diagram of selected components of an example audio integrated circuit of a personal audio device, in accordance with embodiments of the present disclosure; 
         FIG. 3  is a block diagram of selected components of a gain control circuit for use within the audio integrated circuit depicted in  FIG. 2 , and selected components of an audio integrated circuit which may be coupled to the gain control circuit, in accordance with embodiments of the present disclosure; and 
         FIGS. 4 through 7  illustrate example waveforms demonstrating predictive methodologies performed by the gain control circuit depicted in  FIG. 3 . 
     
    
    
     DETAILED DESCRIPTION 
     In accordance with embodiments of the present disclosure, an integrated circuit for use in an audio device, such as a personal audio device (e.g., mobile telephone, portable music player, tablet computer, personal digital assistant, etc.), may include a signal path having a digital path portion (e.g., an audio compressor) and an analog path portion (e.g., an audio expander). The digital path portion may be configured to receive a digital input signal (e.g., a digital audio signal), apply a selectable digital gain x to the digital input signal, and convert the digital input signal (e.g., via a digital-to-analog converter) to an analog signal in conformity with the selectable digital gain. The analog path portion may be configured to receive the analog signal and apply (e.g., by an analog amplifier) a selectable analog gain k/x to the analog signal to generate an output signal, wherein said output signal may be communicated to a loudspeaker for playback and/or to other circuitry for processing. The numerator k of the selectable analog gain may be a constant defining an overall cumulative gain of the signal path. A control circuit coupled to the signal path may be capable of modifying the selectable digital gain and the selectable analog gain, for example to maximize a dynamic range of the signal path. For example, based on analysis of the output signal or another signal within the signal path indicative of the output signal, the control circuit may select a value for the selectable digital gain and a corresponding value for the selectable analog gain. Thus, for lower magnitudes of the output signal, the control circuit may select a higher selectable digital gain and a lower selectable analog gain, and for higher magnitudes of the output signal, the control circuit may select a lower selectable digital gain and a higher selectable analog gain. Such selectable gains may allow a signal path to increase its dynamic range to lower-magnitude signals, while preventing undesirable effects such as signal clipping for higher-magnitude signals. In operation, the control circuit may also be configured to predict, based on a magnitude of a signal indicative of the output signal, a condition for changing the selectable digital gain and the selectable analog gain, and responsive to predicting the occurrence of the condition, change, at an approximate time in which a zero crossing of the signal indicative of the output signal occurs, the selectable digital gain and the selectable analog gain. 
     The integrated circuit described above may be used in any suitable system, device, or apparatus, including without limitation, a personal audio device.  FIG. 1  is an illustration of an example personal audio device  1 , in accordance with embodiments of the present disclosure.  FIG. 1  depicts personal audio device  1  coupled to a headset  3  in the form of a pair of earbud speakers  8 A and  8 B. Headset  3  depicted in  FIG. 1  is merely an example, and it is understood that personal audio device  1  may be used in connection with a variety of audio transducers, including without limitation, headphones, earbuds, in-ear earphones, and external speakers. A plug  4  may provide for connection of headset  3  to an electrical terminal of personal audio device  1 . Personal audio device  1  may provide a display to a user and receive user input using a touch screen  2 , or alternatively, a standard liquid crystal display (LCD) may be combined with various buttons, sliders, and/or dials disposed on the face and/or sides of personal audio device  1 . As also shown in  FIG. 1 , personal audio device  1  may include an audio integrated circuit (IC)  9  for generating an analog audio signal for transmission to headset  3  and/or another audio transducer. 
       FIG. 2  is a block diagram of selected components of an example audio IC  9  of a personal audio device, in accordance with embodiments of the present disclosure. As shown in  FIG. 2 , a microcontroller core  18  may supply a digital audio input signal DIG_IN to a digital gain element  12  to apply a selectable digital gain x selected by gain control  20  to the digital input signal DIG_IN. The amplified digital audio input signal may be communicated to a digital-to-analog converter (DAC)  14 , which may convert the digital audio input signal to an analog signal Y IN . Together, digital gain element  12  and DAC  14  may be referred to herein as a digital path portion of the signal path from the input node for digital audio input signal DIG_IN to the output node for output voltage signal V OUT  depicted in  FIG. 2 . In the relevant art, digital gain element  12  and DAC  14  may sometimes be referred to as an audio compressor. 
     DAC  14  may supply analog signal Y IN  to an amplifier stage  16  which may amplify or attenuate audio input signal Y IN  in conformity with a selectable analog gain k/x to provide an audio output signal V OUT , which may operate a speaker, headphone transducer, a line level signal output, and/or other suitable output. Amplifier stage  16  may be referred to herein as an analog path portion of the signal path from the input node for digital audio input signal DIG_IN to the output node for output voltage signal V OUT  depicted in  FIG. 2 . In the relevant art, amplifier stage  16  may sometimes be referred to as an audio expander. A capacitor CO may be utilized to couple the output signal to the transducer or line level output, particularly if amplifier stage  16  is operated from a unipolar power supply having a quiescent voltage substantially differing from ground. A power supply  10  may provide the power supply rail inputs of amplifier stage  16 . 
     As shown in  FIG. 2 , audio IC  9  may include a gain control circuit  20  configured to, based on digital audio input signal DIG_IN, control selectable digital gain x of gain element  12  and a selectable analog gain k/x of amplifier stage  16 . In embodiments in which a volume control is present, a volume control signal may be provided from a microcontroller or other digital control circuit responsive to a user interface, volume knob encoder or program command, or other suitable mechanism. 
     As an example of the dynamic range enhancement functionality of audio IC  9 , when digital audio input signal DIG_IN is at or near zero decibels (0 dB) relative to the full-scale voltage of the digital audio input signal, gain control circuit  20  may select a first digital gain (e.g., x 1 ) for the selectable digital gain and a first analog gain (e.g., k/x 1 ) for the selectable analog gain. However, if the magnitude of digital audio input signal DIG_IN is below a particular predetermined threshold magnitude relative to the full-scale voltage of digital audio input signal DIG_IN (e.g., −20 dB), gain control circuit  20  may select a second digital gain (e.g., x 2 ) greater than the first digital gain (e.g., x 2 &gt;x 1 ) for the selectable digital gain and a second analog gain (e.g., k/x 2 ) lesser than the second analog gain (e.g., k/x 2 &lt;k/x 1 ) for the selectable analog gain. In each case, the cumulative path gain (e.g., k) of the selectable digital gain and the selectable analog gain may be substantially constant (e.g., the same within manufacturing and/or operating tolerances of audio IC  9 ). In some embodiments, k may be approximately equal to 1, such that the cumulative path gain is a unity gain. Such modification of digital gain and analog gain may increase the dynamic range of audio IC  9  compared to approaches in which the digital gain and analog gain are static, as it may reduce the noise injected into audio output signal V OUT , which noise may be a generally monotonically increasing function of the analog gain of amplifier stage  16 . While such noise may be negligible for higher magnitude audio signals (e.g., at or near 0 dB relative to full-scale voltage), the presence of such noise may become noticeable for lower magnitude audio signals (e.g., at or near −20 dB or lower relative to full-scale voltage). By applying a smaller analog gain at amplifier stage  16  for smaller signal magnitudes, the amount of noise injected into audio output signal V OUT  may be reduced, while the signal level of audio output signal V OUT  may be maintained in accordance with the digital audio input signal DIG_IN through application of a digital gain to gain element  12  inversely proportional to the analog gain. 
       FIG. 3  is a block diagram of selected components of an example gain control circuit  20  for use within audio IC  9 , and selected components of audio IC  9  which may be coupled to gain control circuit  20 , in accordance with embodiments of the present disclosure. As shown in  FIG. 3 , gain control circuit  20  may include a level detection circuit  42 , a comparator block  46 , a signal tracking block  47 , a zero-cross detection circuit  48 , a glitch correction circuit  44 , a gain calibration circuit  52 , an offset calibration circuit  54 , and a gain control state machine  50 . Level detection circuit  42  may include any suitable system, device, or apparatus for receiving digital audio input signal DIG_IN (or a derivative thereof), determining a magnitude of such signal, and outputting a signal indicative of such magnitude. Comparator block  46  may compare the output signal of level detection circuit  42  with N predetermined threshold magnitudes, wherein N is a positive integer, and based on such comparison, output a signal COMP_OUT (which may comprise N bits) indicative of whether the desired magnitude of audio output signal V OUT  is greater or lesser than each of such predetermined threshold magnitudes. In some embodiments, such predetermined threshold magnitudes may be relative to a full-scale voltage of digital audio input signal DIG_IN and/or audio output signal V OUT . In some embodiments, comparator block  46  may implement hysteresis, such that signal COMP_OUT or a bit thereof may only transition if the output signal of level detection block  42  remains above or below a predetermined threshold magnitude for a minimum duration of time (e.g., 0.1 seconds to place any switching artifacts outside the human-perceptible audio range). 
     Zero-cross detection circuit  48  may include any suitable system, device, or apparatus for detecting the occurrence of a zero crossing of a digital audio input signal (or a derivative thereof) and outputting a signal ZERO_DETECT indicating that a zero crossing of such signal has occurred. A zero crossing of a signal may occur when the waveform of such signal crosses a magnitude of zero or crosses another level within a threshold of zero and indicative of a zero crossing (e.g., a low signal level of lower than −70 dB or within a small number of least significant bits of zero). 
     Signal tracking block  47  may comprise any suitable system, device, or apparatus for tracking a particular parameter of an audio signal, including without limitation a plurality of peaks of such audio signal and/or a signal envelope of such audio signal, and based thereon, generate an output signal TRACKING indicative of such tracked parameter. 
     Glitch correction circuit  44  may comprise any suitable system, device, or apparatus for correcting for a latency or group delay between the output of gain element  12  and the input of amplifier stage  16 . Such glitch correction may account for a change of the selectable digital gain of gain element  12  which requires a latency to propagate to amplifier stage  16  where a corresponding selectable analog gain may be applied. Without such correction, the latency of group delay may cause audio artifacts to appear at the output of the signal path. 
     Gain calibration circuit  52  may comprise any suitable system, device, or apparatus for correcting for a non-ideal gain of amplifier stage  16 . To illustrate, amplifier stage  16  may comprise an operational amplifier  22  and a switched resistor network  24  comprising a resistor string  28  having a plurality of taps each coupled to a corresponding switch  29 . To apply a desired selectable analog gain to amplifier stage  16 , switches  29  may be selectively opened and closed to create an effective resistance between a negative input of operational amplifier  22  and the output of operational amplifier  22 , wherein the selectable analog gain of operational amplifier  22  is based on such effective resistance. However, due to non-idealities of amplifier stage  16  (e.g., temperature variations, process tolerances, etc.), an actual gain of amplifier stage  16  may differ from that of a desired level of gain determined by gain control state machine  50 . Accordingly, gain calibration circuit  52  may determine the actual gain of amplifier stage  16  and output a signal GAIN_CAL indicative of such actual gain, and gain control state machine  50  may correct for non-idealities in selecting the selectable digital gain. 
     Offset calibration circuit  54  may comprise any suitable system, device, or apparatus for correcting for an offset of amplifier stage  16 . To illustrate, operational amplifier  22  may include, due to non-idealities of amplifier stage  16  (e.g., temperature variations, process tolerances, etc.), a slight offset  26  from a desired ground or common mode voltage associated with amplifier stage  16 , which may affect signal output Y OUT . Accordingly, offset calibration circuit  54  may determine the offset  26  of amplifier stage  16  and output a signal OFFSET_CAL, which may be communicated to an offset block  32  of DAC  14  such that DAC  14  may correct for such analog offset. 
     Gain control state machine  50  may receive signals COMP_OUT, TRACKING, ZERO_DETECT, GLITCH, and/or GAIN_CAL and based on one or more of such signals, generate the selectable digital gain and the selectable analog gain, as described in greater detail elsewhere in this disclosure. For example, when the magnitude of digital audio input signal DIG_IN transitions from above to below a predetermined threshold magnitude (e.g., −24 dB), signal COMP_OUT may indicate such transition and in response, gain control state machine  50  may wait until the occurrence of a zero crossing (as indicated by signal ZERO_DETECT), after which it may cause DAC  14  to increase the selectable digital gain and decrease the selectable audio gain in a similar amount. By changing the selectable digital gain and the selectable audio gain at a zero crossing of digital audio input signal (or a derivative thereof), the change and any auditory artifacts associated with the change may be masked and therefore be unnoticeable or less noticeable to a listener of an audio device including audio IC  9 . 
     As another example, when the sum of the magnitude of digital audio input signal DIG_IN transitions from below to above a predetermined threshold magnitude (e.g., −24 dB), signal COMP_OUT may indicate such transition, and in response gain control state machine  50  may cause DAC  14  to decrease the selectable digital gain and increase the selectable audio gain in a similar amount. However, when transitioning to lower digital gain mode, it may not be desirable to wait for a zero cross of the output signal, as a transition from below to above the predetermined threshold magnitude may almost immediately lead to clipping of the audio signal. Accordingly, it may be desirable to predict whether the magnitude of digital audio input signal DIG_IN is likely to cross such predetermined threshold and switch the selectable digital gain and the selectable analog gain responsive to such prediction at a zero crossing event of the digital audio input signal DIG_IN occurring before crossing of the predetermined threshold by the digital audio input signal DIG_IN. By applying such predictive techniques, examples of which are explained below and illustrated by  FIGS. 4-7 , gain control block  20  may facilitate switching between gain modes to increase dynamic range while reducing audio artifacts. 
       FIGS. 4 through 7  illustrate example waveforms demonstrating predictive methodologies that may be performed by gain control circuit  20 . In each of  FIGS. 4 through 7 , the y-axis represents a voltage of digital audio input signal DIG_IN given in decibels relative to a full-scale voltage of digital audio input signal DIG_IN. 
     As depicted in the example waveform graph for digital audio input signal DIG_IN versus time shown in  FIG. 4 , gain control circuit  20  may predict whether the magnitude of digital audio input signal DIG_IN is likely to cross a predetermined primary threshold by determining whether digital audio input signal DIG_IN (or a derivative thereof) crosses a secondary threshold. To illustrate, to predict whether digital audio input signal DIG_IN will increase above a primary threshold for switching between gain modes of gain element  12  and amplifier stage  16  (e.g., −24 dB relative to full-scale voltage of digital audio input signal DIG_IN), gain control circuit  20  may monitor (e.g., with comparator block  46 ) whether digital audio input signal DIG_IN increases above a secondary threshold (e.g., −25 dB relative to full-scale voltage of digital audio input signal DIG_IN) lower than the primary threshold, which occurs at time t 1  shown in  FIG. 4 . Responsive to digital audio input signal DIG_IN increasing above such secondary threshold, gain control circuit  20  may wait for the next zero-crossing event of digital audio input signal DIG_IN (e.g., as detected by zero-cross detection circuit  48 ) which occurs at time t 2  shown in  FIG. 4 . At such zero-cross event, gain control circuit  20  may decrease the selectable digital gain and increase the selectable analog gain by the same amount. When digital audio input signal DIG_IN subsequently increases above the primary threshold (e.g., above −24 dB), which occurs at time t 3  shown in  FIG. 4 , no changes in selectable digital gain and selectable analog gain may occur, as such change already occurred at the previous zero-crossing event. 
     In some embodiments, gain control state machine  50  may also implement a timing element (e.g., a timer or counter) in connection with a secondary threshold to determine whether digital audio input signal DIG_IN will increase above a primary threshold. To illustrate, to predict whether digital audio input signal DIG_IN will increase above a primary threshold (e.g., −21 dB relative to full-scale voltage of digital audio input signal DIG_IN) for switching between gain modes of gain element  12  and amplifier stage  16 , gain control circuit  20  may monitor (e.g., with comparator block  46 ) whether digital audio input signal DIG_IN increases above a secondary threshold (e.g., −22 dB relative to full-scale voltage of digital audio input signal DIG_IN) lower than the primary threshold, which occurs at time t 4  shown in  FIG. 4 . Responsive to digital audio input signal DIG_IN increasing above such secondary threshold, gain control circuit  20  may wait for the next zero-crossing event of digital audio input signal DIG_IN (e.g., as detected by zero-cross detection circuit  48 ) which occurs at time t 5  shown in  FIG. 4 . At such zero-cross event, gain control circuit  20  may decrease the selectable digital gain and increase the selectable analog gain by the same amount. In addition, responsive to digital audio input signal DIG_IN increasing above such secondary threshold at time t 4 , gain control state machine  50  may initiate a timing element to time a duration beginning at the time t 4  in which the digital audio input signal DIG_IN increases above such secondary threshold. If, prior to the duration of time expiring, digital audio input signal DIG_IN increases above the primary threshold, gain control circuit  20  may maintain the selectable digital gain and increase the selectable analog gain at the levels to which they were switched at the zero-crossing event at time t 5 . Otherwise, if the duration of time expires, shown as time t 6  in  FIG. 4 , prior to digital audio input signal DIG_IN increasing above the primary threshold, gain control circuit  20  may predict that an increase above the primary threshold may not occur, and may switch the selectable digital gain and increase the selectable analog gain at the levels which they had prior to the zero-crossing event at time t 5 . 
     In these and other embodiments, gain control circuit  20  may employ signal tracking techniques to predict whether digital audio input signal DIG_IN may increase above a secondary threshold. For example, gain control circuit  20  (e.g., via signal tracking block  47 ) may track a peak trend of the magnitude peaks of digital audio input signal DIG_IN as shown in  FIG. 4 . From tracking the magnitude peaks, gain control circuit  20  may extrapolate the trend to determine if the magnitude of digital audio input signal DIG_IN is trending towards increasing above a primary threshold (e.g., −24 dB relative to full-scale voltage of digital audio input signal DIG_IN). Additionally or alternatively tracking peak trends, gain control circuit  20  (e.g., via signal tracking block  47 ) may similarly track a signal envelope of digital audio input signal DIG_IN to determine whether digital audio input signal DIG_IN is trending towards increasing above a primary threshold. 
     Although  FIG. 4  and the foregoing description thereof has depicted use of predictive approaches for determining whether digital audio output signal DIG_IN is likely to increase from below to above a primary threshold, similar approaches (e.g., secondary thresholds, timing elements, peak tracking, signal envelope tracking, etc.) may also be used to determine whether digital audio output signal DIG_IN is likely to decrease from above to below a primary threshold and switch between gain modes of the selectable digital gain and the selectable analog gain in response to such predictions. 
     In addition or alternatively to the embodiments discussed above, gain control circuit  20  may employ a secondary threshold and a timing element to predict whether magnitude of digital audio input signal DIG_IN is to decrease below a predetermined primary threshold and remain below such primary threshold, as illustrated in  FIG. 5 . In the embodiments represented by  FIG. 5 , gain control state machine  50  may initiate a timing element for a predetermined duration whenever the magnitude of digital audio input signal DIG_IN decreases from above to below a primary threshold (e.g., −24 dB relative to full-scale voltage of digital audio input signal DIG_IN) shown as times t 1  and t 4  in  FIG. 5 . If prior to the duration of time expiring, digital audio input signal DIG_IN increases above a secondary threshold (e.g., −25 dB relative to full-scale voltage of digital audio input signal DIG_IN) lesser than the primary threshold shown as times t 2 , t 3 , and t 6  in  FIG. 5 , the timing element may reset the predetermined duration of time. Upon expiration of the duration of time, shown as occurring at time t 7  in  FIG. 5 , thus indicating that digital audio input signal DIG_IN has not increased above the secondary threshold for longer than the duration of time, and provided that digital audio input signal DIG_IN is below the primary threshold, gain control circuit  20  may thus predict that digital audio input signal DIG_IN is and will remain below the primary threshold, and accordingly increase the selectable digital gain and decrease the selectable analog gain by the same amount. By using this predictive methodology, gain control circuit  20  may avoid switching events if the magnitude of digital audio input signal DIG_IN falls below the primary threshold but then in a short amount of time rises above the primary threshold again for a brief period of time. For example, in the graph depicted in  FIG. 5 , this predictive methodology prevents gain switching events from occurring at times t 4  and t 5 . 
     In addition or alternatively to the embodiments discussed above, gain control circuit  20  may employ one or more timing elements to disable switching between gain modes when the magnitude of digital audio input signal DIG_IN hovers near a primary threshold, as illustrated in  FIG. 6 . In the embodiments represented by  FIG. 6 , upon the magnitude of digital audio input signal DIG_IN crossing a primary threshold (e.g., −24 dB relative to full-scale voltage of digital audio input signal DIG_IN), shown as times t 1 , t 2 , t 3 , t 4 , t 5 , t 6 , and t 7  in  FIG. 6 , gain control state machine  50  may initiate a timing element for a predetermined duration. If prior to the predetermined duration of time expiring, digital audio input signal DIG_IN again crosses the primary threshold (e.g., the difference between times t 2  and each of times t 3 , t 4 , and/or t 5  may be less than the predetermined duration of time) gain control circuit  20  may disable switching between gain modes (e.g., switching would not occur at times t 3 , t 4 , and t 5 ). Upon expiration of the predetermined duration of time, shown as occurring at time t 6  in  FIG. 6  (e.g., the difference between time t 5  and time t 6  may be more than the predetermined duration of time), thus indicating that digital audio input signal DIG_IN has not crossed the primary threshold for longer than the predetermined duration of time, gain control circuit  20  may thus predict that digital audio input signal DIG_IN has not crossed the primary threshold for a period of time and may re-enable switching between gain modes when digital audio input signal DIG_IN again crosses the primary threshold, shown as time t 7  in  FIG. 6 . By using this predictive methodology, gain control circuit  20  may avoid multiple switching events if the magnitude of digital audio input signal DIG_IN hovers near the primary threshold. 
     In addition or alternatively to the embodiments discussed above, gain control circuit  20  may be configured to predict when digital audio input signal DIG_IN has a persistent pattern of magnitude relative to a primary threshold, as illustrated in  FIG. 7 . To predict a persistent pattern, gain control state machine  50  may record a period of time t 1  in which digital audio input signal DIG_IN remains below a primary threshold (e.g., −24 dB relative to full-scale voltage of digital audio input signal DIG_IN) and record a period of time t 2  in which digital audio input signal DIG_IN remains above the primary threshold. For one or more subsequent periods (e.g., time periods t 3 , t 5 ) in which digital audio input signal DIG_IN is below the primary threshold, gain control state machine  50  may determine a duration of such periods and compare them to the duration of the recorded period of time t 1 . If the one or more subsequent periods are within a certain duration of time Δ of the recorded period of time t 1  (e.g., t 1 −Δ≤t 3 ≤t 1 +Δ), gain control circuit  20  may determine that digital audio input signal DIG_IN has a persistent pattern. Similarly, for one or more subsequent periods (e.g., time periods t 4 , t 6 ) in which digital audio input signal DIG_IN is above the primary threshold, gain control state machine  50  may determine a duration of such periods and compare them to the duration of the recorded period of time t 2 . If the one or more subsequent periods are within a certain duration of time Δ of the recorded period of time t 1  (e.g., t 2 −Δ≤t 4 ≤t 2 +Δ), gain control circuit  20  may determine that digital audio input signal DIG_IN has a persistent pattern. In some embodiments, responsive to determining that a persistent pattern exists, gain control circuit  20  may disable switching between gain modes of the selectable digital gain and the selectable audio gain. In other embodiments, when a persistent pattern exists, gain control circuit  20  may use information regarding the persistent pattern (e.g., time periods t 1  and/or t 2 ) to predict occurrence of a future crossing of the primary threshold by digital audio input signal DIG_IN, and cause a switch between gain modes at a zero-crossing event occurring immediately before the future crossing of the primary threshold. 
     In addition or alternatively to the embodiments discussed above, gain control circuit  20  may be configured to predict when digital audio input signal DIG_IN crosses a primary threshold by receiving digital audio input signal DIG_IN and processing such signal before the signal propagates to gain element  12  and amplifier stage  16 , such that gain control circuit  20  may determine and apply the desired selectable digital gain and selectable audio gain at or before the signal propagates to such gain elements. 
     In these and other embodiments, gain control circuit  20  may reduce audio artifacts associated with switching between a non-unity gain mode and a unity gain mode by implementing three or more intermediate dynamic range modes. For instance, in some embodiments, gain control circuit  20  may implement eight intermediate dynamic range modes wherein the selectable digital gains of the various gain modes are −24 dB, −21 dB, −18 dB, −15 dB, −12 dB, −9 dB, −6 dB, −3 dB and 0 dB and the corresponding selectable analog gains are 24 dB, 21 dB, 18 dB, 15 dB, 12 dB, 9 dB, 6 dB, 3 dB and 0 dB. In addition, gain control circuit  20  may be configured to transition between the respective gain modes and a plurality of respective predetermined threshold magnitude levels. For example, gain control circuit  20  may transition between the −24 dB gain mode and the −21 dB gain mode in response to the magnitude of the output signal crossing −24 dB, may transition between the −21 dB mode and the −18 dB mode in response to the magnitude of the output signal crossing −21 dB, may transition between the −18 dB mode and the −15 dB mode in response to the magnitude of the output signal crossing −18 dB, and so on. In these embodiments, gain control circuit  20  may also be configured to predict, using some or all of the methods previously described, to predict a crossing of a particular threshold level, and based on such predicting, switch between the various modes at approximate occurrence of a zero crossing of the output signal, so as to reduce audio artifacts. 
     Using the methods and systems herein disclosed, changes in a gain mode of a signal path and audio artifacts associated therewith may be masked by predicting a gain mode threshold-crossing and in response to such prediction, pre-emptively switching ahead of such threshold-crossing at a zero-crossing of an audio signal. In the case of quickly-rising signals that cross a threshold for switching between gain modes, such prediction and preemptive switching at a zero-crossing may not be necessary to avoid audio artifacts, as a quickly-rising transient nature of a signal may mask audio artifacts. However, in the case of a slower-rising signal that crosses a gain mode threshold-crossing, as the transient effects may not mask audio artifacts, and thus the methods and systems disclosed herein for predicting a gain mode threshold-crossing and in response to such prediction may be employed to mask such artifacts. 
     Although the foregoing description may contemplate that a threshold magnitude for switching a gain mode in response to a signal of increasing magnitude may be the same threshold magnitude for switching a gain mode in response to a signal of decreasing magnitude, it is understood that in some embodiments, a threshold magnitude for switching a gain mode in response to a signal of increasing magnitude may a different threshold magnitude for switching a gain mode in response to a signal of decreasing magnitude. 
     This disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments herein that a person having ordinary skill in the art would comprehend. Moreover, reference in the appended claims to an apparatus or system or a component of an apparatus or system being adapted to, arranged to, capable of, configured to, enabled to, operable to, or operative to perform a particular function encompasses that apparatus, system, or component, whether or not it or that particular function is activated, turned on, or unlocked, as long as that apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative. 
     All examples and conditional language recited herein are intended for pedagogical objects to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present inventions have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the disclosure.