Patent Publication Number: US-6908842-B2

Title: Bumping process

Description:
BACKGROUND OF THE INVENTION 
   1. Field of Invention 
   This invention relates to a bumping process. More particularly, the present invention is related to a method of forming bumps with a high quality for a high-density package. 
   2. Related Art 
   In this information explosion age, integrated circuit products are used almost everywhere in our daily life. As fabricating technique continue to improve, electronic products having powerful functions, personalized performance and a higher degree of complexity are produced. Nowadays, most electronic products are relatively light and have a compact body. Hence, in semiconductor production, various types of high-density semiconductor packages have been developed. Flip chip is one of the most commonly used techniques for forming an integrated circuit package. In a flip-chip package, the bonding pads on a die and the contacts on a substrate are connected together through a plurality of bumps. Hence, compared with a wire-bonding package or a tape automated bonding (TAB) package, a flip-chip package uses a shorter electrical path on average and has a better overall electrical performance. Moreover, the back surface of a flip-chip die may be exposed to the outside to increase the performance of the heat dissipation of said flip chip package. Due to the above and other reasons, flip-chip packages are produced in large volumes in the semiconductor industry. 
     FIG. 1  to  FIG. 4  are partially enlarged cross-sectional views showing the progression of steps in a conventional method of forming a bump on the surface of a chip. As shown in  FIG. 1 , a wafer  110 , for example a silicon wafer, is provided. The wafer  110  has an active surface  112  with a passivation layer  114  and a plurality of bonding pads  116  (only one of the bonding pads is shown) thereon. The passivation layer  114  exposes the bonding pads  116 . Next, an under bump metallurgy (UBM) layer  120  is formed over the bonding pad  116 . The under bump metallurgy layer  120  includes an adhesion layer and one or a stack of metallic layers, for example a barrier layer and a wetting layer. To form the under bump metallurgy layer  120 , a sputtering process is first conducted to form an adhesion layer on the active surface  112  of the wafer  110 . Next, a sputtering or plating process is conducted to form one or more metallic layers over the adhesion layer. Thereafter, photolithography and etching processes are used to pattern the under bump metallurgy layer  120  so that a residual portion of the under bump metallurgy layer  120  remains on top of the bonding pad  116 . 
   As shown in  FIG. 2 , a spin-coating process is conducted to form a photoresist layer  130  over the active surface  112  of the wafer  110 , wherein the photoresist layer  130  can be a dry film. Through photolithography and etching processes, a plurality of openings  132  (only one opening is shown) are formed in the photoresist layer  130 . The openings  132  expose the under bump metallurgy layer  120 . Next, as shown in  FIG. 3 , a flux material  160  is dispensed in the openings  132  and above the surface of the photoresist layer  130 . Afterwards, a solder ball mounting process is performed to place the solder balls  140  in the openings  132  as shown in FIG.  3 . Then a reflow process is performed to dispose the solder balls above the bonding pads  116  more securely as shown in  FIG. 4 , wherein the solder balls  140  are directly mounted onto the under bump metallurgy layers  120  and the flux material  160  flows on the surfaces of the solder balls  140  and vaporized. Thereafter, a liquid cleaner is applied to remove the residual flux material from the surface of the solder balls  140 . Finally, the photoresist layer  130  is removed from the active surface  112  of the wafer  110  as shown in  FIG. 4  so that a bump is produced. Therein, the bump actually comprises the solder ball  140  and the under bump metallurgy layer  120 . 
   In the aforementioned fabrication process, the solder ball  140  is disposed into the openings  132  of the photoresist layer  130  by a solder ball placer. However, the flux material  160  is easily flowed into the solder ball placer so as to contaminate said solder ball placer. In addition, the flux material  160  will enhance the connection between the solder balls so as to lower the performance and operation efficiency of said solder ball placer. 
   Therefore, providing another method for forming bumps to solve the mentioned-above disadvantages is the most important task in this invention. 
   SUMMARY OF THE INVENTION 
   In view of the above-mentioned problems, an objective of this invention is to provide a method of forming bumps, and more particularly, a method of forming high-quality bumps inside a high-density package. 
   To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of forming a plurality of bumps over a silicon wafer. The wafer has an active surface having a passivation layer and a plurality of bonding pads formed thereon. The passivation layer exposes the bonding pads on the active surface. To form the bumps, an under bump metallurgy layer is formed over the active surface of the wafer covering both the bonding pads and the passivation layer. Next, the under bump metallurgy layer are patterned so that a residual portion of the under bump metallurgy layer remains on top of the bonding pads. Thereafter, a photoresist layer is formed on the active surface of the wafer. The photoresist layer has a plurality of openings that exposes the residual portion of the under bump metallurgy layer. Then, a plurality of solder balls are provided to dispose in the openings of the photoresist layers by a solder balls placer. Meanwhile, a heating process is performed so that the solder balls are partially melted and bonded to the residual portion of the under bump metallurgy layer temporarily. Thereafter, a flux material  160  is disposed in the openings by dispensing or spin-coating so as to at least cover the surfaces of the solder balls. Afterwards, a reflow process is carried out so that the solder balls are bonded to the residual portion of the under bump metallurgy layer. Finally, the flux material is cleared and the photoresist layer is removed. 
   According to one preferred embodiment of this invention, the material constituting the under bump metallurgy layer includes aluminum, titanium, titanium-tungsten alloy, chromium, chromium-copper alloy, copper or tantalum. In addition, the material constituting the under bump metallurgy layer includes nickel-vanadium alloy, titanium nitride compound, tantalum nitride compound, nickel, chromium-copper alloy, chromium, copper, palladium or gold. The material constituting the solder ball includes lead-tin alloy or lead-free alloy, and the lead-free alloy includes tin, gold, copper, magnesium, bismuth, antimony, indium, zinc or an alloy made up from any combination of the elements in the above list. Moreover, the material constituting the bonding pad includes copper or aluminum. 
   As mentioned above, after the solder balls are disposed in the openings of the photoresist layer, a process of disposing the flux material in the openings to cover the surfaces of the solder balls is performed. Accordingly, it will not cause the flux material contaminate the solder ball placer. Moreover said flux material can not make the solder balls connect with each other more securely. Thus it cannot lower the operation efficiency of the solder ball placer. 
   It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention will become more fully understood from the detailed description given herein below illustrations only, and thus are not limitative of the present invention, and wherein: 
       FIGS. 1  to  4  are partially enlarged cross-sectional views showing the progression of steps in a conventional method of forming a bump on the surface of a chip; and 
       FIGS. 5  to  9  are partially enlarged cross-sectional views showing the progression of steps for forming a bump on the surface of a chip according to the preferred embodiment of this invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   The method of forming bumps according to the preferred embodiment of this invention will be described herein below with reference to the accompanying drawings, wherein the same reference numbers are used in the drawings and the description to refer to the same or like parts. 
     FIGS. 5  to  9  are partially enlarged cross-sectional views showing the progression of steps for forming a bump on the surface of a chip according to one preferred embodiment of this invention. 
   As shown in  FIG. 5 , a silicon wafer  210  having an active surface  212  thereon is provided. The active surface  212  of the wafer  210  further includes a passivation layer  214  and a plurality of bonding pads  216  (only one is shown). The passivation layer  214  exposes the bonding pads  216 . The bonding pads  216  are aluminum or copper pads, for example. A process to form an under bump metallurgy layer  220  over the bonding pad  216  is performed. First, an adhesion layer is formed over the active layer  212  of the wafer  210  by sputtering. Thereafter, one or more metallic layers are formed over the adhesion layer by sputtering or electroplating. Hence, the under bump metallurgy layer  220  has a structure that includes a single adhesion layer and a single or a stack of metallic layers, such as a barrier layer or a wetting layer. Photolithography and etching processes are carried out to pattern the under bump metallurgy layer  220  so that only a residual portion of the under bump metallurgy layer  220  remains on the top of the bonding pads  216 . The adhesion layer is made from a material including, for example, aluminum, titanium, titanium-tungsten alloy, chromium, chromium-copper alloy, copper or tantalum. The metallic layer is made from a material including nickel-vanadium alloy, titanium nitride compound, tantalum nitride compound, nickel, chromium-copper alloy, chromium, copper, palladium or gold. Details of their structures can be found in U.S. patent application Ser. Nos. 2003/0189249 and 2003/0164552. 
   Afterwards, a polymer layer  230 , for example a photoresist layer and a dry film, is provided over the active surface  212  of the wafer  210  as shown in FIG.  6 . Therein, a spin-coating process is performed to form a photoresist layer  230  over the active surface  212  of the wafer  210  and the dry film is directly attached on the active surface  212  of the wafer  210 . Next, a photolithography and etching process are carried out to form a plurality of openings  232  (only one opening is shown) in the polymer layer  230 . The openings  232  expose the under bump metallurgy layer  220 . 
   As mentioned above, there is further provided solder balls  250  and said solder balls  250  are disposed in the openings  232  by the solder ball placer (not shown) as shown in FIG.  7 . Therein, the solder balls  250  can be in the form of exact balls or ball-like shape, and the solder balls  250  are made from a material including lead-tin alloy, tin, gold or other lead-free alloys. The lead-free solder balls  250  are mainly binary, tertiary, quaternary alloy consisting of some of the following metals: tin, gold, silver, copper, magnesium, bismuth, antimony, indium and zinc. Since the metals can be combined in different proportions, there are virtually countless types of lead-free blocks. In general, each type of lead-free solder ball has a unique set of physical and electrical properties. 
   When the solder balls  250  are disposed in the openings  232  of the polymer layer  232 , the solder balls  250  are heated at a temperature from about 100° C. to 150° C. by a heater placed below the wafer  210  so that the solder balls  250  are bonded to the under bump metallurgy layer  220  temporarily. 
   Then, through the flux material  240  on the surface of said solder ball  250 , the lower portion of the solder ball  250  melts in a reflow process so that the solder ball  250  and the under bump metallurgy layer  220  are bonded together as shown in FIG.  8 . In the reflow process, foaming gas, for example nitrogen gas or hydrogen gas, can be filled in the reflow chamber so as to make the oxygen gas to activate with hydrogen gas or to lower the capability of the oxygen gas for activating by the nitrogen gas. Thus the surfaces of the solder balls  250  can be prevented from oxidation. Next, a liquid cleaning agent is used to remove the residual flux material  240  from the surface of the solder balls  250 . Finally, the polymer layer  230  is removed from the active surface  212  of the wafer  210  and the process for forming bumps  260  is completed as shown in FIG.  9 . Thus, the bump  260  is a composite structure comprising the solder ball  250  and the under bump metallurgy layer  220 . 
   In the aforementioned process, after the solder balls are disposed in the openings of the polymer layer  230 , a process of disposing the fulx material  240  in the openings  232  to cover the surfaces of the solder balls  250  is performed. Accordingly, it will not cause the flux material  240  contaminate the solder ball placer. Moreover said flux material  240  can not make the solder balls  250  connect with each other more securely. Thus it cannot lower the operation efficiency of the solder ball placer. 
   Although the invention has been described in considerable detail with reference to certain preferred embodiments, it will be appreciated and understood that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.