Patent Publication Number: US-2023142312-A1

Title: Reference voltage generating system and start-up circuit thereof

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application claims the benefit of Taiwan Patent Application No. 110141454, filed on Nov. 8, 2021, the entire content of which are herein expressly incorporated by reference. 
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention generally relates to a start-up circuit, and more particularly to a start-up circuit adaptable to a bandgap voltage reference circuit. 
     2. Description of Related Art 
     A bandgap voltage reference circuit is a temperature independent voltage reference circuit widely used in integrated circuits. The bandgap voltage reference circuit can produce a fixed constant voltage regardless of power supply variations, temperature changes or circuit loading. 
     A voltage reference circuit (e.g., bandgap voltage reference circuit) commonly operates in coordination with a start-up circuit, which starts a corresponding voltage reference circuit in a start-up period. Conventional start-up circuits may be affected by process, voltage and temperature (PVT) variations. For example, a bandgap voltage of the bandgap voltage reference circuit may be kept in an erroneous state in a low-temperature low-voltage condition. In another example, the start-up circuit cannot properly shut down after the start-up in a high-voltage condition, and may thus affect the bandgap voltage output of the bandgap voltage reference circuit. 
     A need has thus arisen to propose a novel scheme to overcome the drawbacks of the conventional start-up circuits. 
     SUMMARY OF THE INVENTION 
     In view of the foregoing, it is an object of the embodiment of the present invention to provide a start-up circuit capable of starting a bandgap voltage reference circuit successfully regardless of process, voltage and temperature (PVT) variations. 
     According to one embodiment, a reference voltage generating system includes a bandgap voltage reference circuit and a start-up circuit. The bandgap voltage reference circuit generates a bandgap voltage, and the start-up circuit starts the bandgap voltage reference circuit. The start-up circuit provides a bias voltage at an output node to the bandgap voltage reference circuit, and the bandgap voltage is fed to an input node of the start-up circuit. The start-up circuit includes series-connected first-type first transistors and a first-type second transistor. In a start-up period, a start-up current flows through the series-connected first-type first transistors, connected between a positive power voltage and an inner node. In the start-up period, a boost current flows through the first-type second transistor, connected between the positive power voltage and the inner node, and with a gate connected to the output node. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    shows a block diagram illustrating a reference voltage generating system; 
         FIG.  2    shows a block diagram exemplifying application of the bandgap voltage reference circuit; and 
         FIG.  3    shows a circuit diagram illustrating the reference voltage generating system according to one embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       FIG.  1    shows a block diagram illustrating a reference voltage generating system  1000  for generating a reference voltage. The reference voltage generating system  1000  of the embodiment may include a start-up circuit  100  and a bandgap voltage reference circuit  200  which is started by the start-up circuit  100 . 
     In the embodiment, the start-up circuit  100  and the bandgap voltage reference circuit  200  are connected between a positive power voltage VDDD and a negative power voltage VSSD. The start-up circuit  100  provides a bias voltage Vbias at an output node to the bandgap voltage reference circuit  200 , and a bandgap voltage Vbg (of about 1.2 volts) generated by the bandgap voltage reference circuit  200  is fed back to an input node of the start-up circuit  100 . 
       FIG.  2    shows a block diagram exemplifying application of the bandgap voltage reference circuit  200 . Specifically, the bandgap voltage reference circuit  200  provides the bandgap voltage Vbg (i.e., reference voltage) to a voltage regulator  300 , such as low-dropout (LDO) regulator, to generate a required constant voltage source. A bias current Ibias may be further provided to the voltage regulator  300  from the output node (i.e., Vbias) of the start-up circuit  100 . 
       FIG.  3    shows a circuit diagram illustrating the reference voltage generating system  1000  according to one embodiment of the present invention. It is noted that the start-up circuit  100  of the embodiment may be adapted to a circuit other than the bandgap voltage reference circuit  200  as exemplified in  FIG.  3   . In the embodiment, the start-up circuit  100  may include a plurality of (e.g., three) series-connected first-type (e.g., P-type) first transistors P 1 -P 3 , connected between the positive power voltage VDDD and an inner node M, and with gates connected to the negative power voltage VSSD. Specifically, a (first) first-type first transistor P 1  has a source connected to the positive power voltage VDDD, and a drain connected to a source of a succeeding (second) first-type first transistor P 2 ; a drain of the first-type first transistor P 2  is connected to a source of a succeeding (third) first-type first transistor P 3 ; and a drain of the first-type first transistor P 3  is connected to the inner node M. The first-type first transistors P 1 -P 3  and the following transistors may be metal-oxide-semiconductor (MOS) transistors. 
     According to one aspect of the embodiment, the start-up circuit  100  may include a first-type (e.g., P-type) second transistor P 4  connected between the positive power voltage VDDD and the inner node M, and with a gate connected to an output node (i.e., bias voltage Vbias). Specifically, the first-type second transistor P 4  has a source connected to the positive power voltage VDDD, and a drain connected to the inner node M. 
     The start-up circuit  100  of the embodiment may include a second-type (e.g., N-type) first transistor N 1  connected between the inner node M and the negative power voltage VSSD, and with a gate connected to receive the bandgap voltage Vbg (of the bandgap voltage reference circuit  200 ). Specifically, the second-type first transistor N 1  has a drain connected to the inner node M, and a source connected to the negative power voltage VSSD. 
     The start-up circuit  100  of the embodiment may include a second-type (e.g., N-type) second transistor N 2  connected between the output node (i.e., bias voltage Vbias) and the negative power voltage VSSD, and with a gate connected to the inner node M. Specifically, the second-type second transistor N 2  has a drain connected to the output node M, and a source connected to the negative power voltage VSSD. 
     In a start-up period, the positive power voltage VDDD and the negative power voltage VSSD provide to the start-up circuit  100  and the bandgap voltage reference circuit  200 . As the positive power voltage VDDD increases, a start-up current Is flows through the series-connected first-type first transistors P 1 -P 3  in a direction from the positive power voltage VDDD to the inner node M. At the same time, according to another aspect of the embodiment, a boost current Ib flows through the first-type second transistor P 4  in a direction from the positive power voltage VDDD to the inner node M. 
     Next, the second-type second transistor N 2  is turned on to pull the bias voltage Vbias (at the output node) down to an objective potential. Accordingly, the bandgap voltage reference circuit  200  can output the expected bandgap voltage Vbg. Finally, the second-type first transistor N 1  is turned on, thereby turning off the second-type second transistor N 2  and finishing the start-up period. 
     The start-up circuit  100  of the embodiment can start the bandgap voltage reference circuit  200  successfully regardless of process, voltage and temperature (PVT) variations. In a low-temperature (e.g., −40° C.) low-voltage (e.g., 1.55V) condition, for example, as a threshold voltage increases, the bias voltage Vbias should be pulled down near the negative power voltage VSSD, thereby decreasing the start-up current Is. Without the boost current Ib flowing through the first-type second transistor P 4 , the second-type second transistor N 2  cannot fully turn on due to the slightly turned-on second-type first transistor N 1 . Therefore, the bias voltage Vbias cannot be pulled down to the objective potential, and the bandgap voltage Vbg may be kept in an erroneous state. 
     In the embodiment, the boost current Ib flowing through the first-type second transistor P 4  makes up for insufficient start-up current Is in the start-up period, thereby starting the bandgap voltage reference circuit  200  successfully to generate a correct bandgap voltage Vbg. 
     The start-up circuit  100  of the embodiment may be adapted to a high-voltage (e.g., 2.8V) scenario. As shown in  FIG.  3   , the first-type second transistor P 4  is controlled by the bias voltage Vbias, which is further controlled by an output of an amplifier  21  in the bandgap voltage reference circuit  200 . Accordingly, an excess of the boost current Ib in a high-voltage condition can be prevented, otherwise the second-type second transistor N 2  (of the start-up circuit  100 ) cannot fully turn off after the start-up period and affects the output of the bandgap voltage Vbg (of the bandgap voltage reference circuit  200 ). 
     Although specific embodiments have been illustrated and described, it will be appreciated by those skilled in the art that various modifications may be made without departing from the scope of the present invention, which is intended to be limited solely by the appended claims.