Patent Publication Number: US-2021166914-A1

Title: Substrate support with improved process uniformity

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     The present disclosure is a continuation of U.S. patent application Ser. No. 15/399,244, filed on Jan. 5, 2017. The entire disclosure of the application referenced above is incorporated herein by reference. 
    
    
     FIELD 
     The present disclosure relates to substrate supports in substrate processing systems. 
     BACKGROUND 
     The background description provided here is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure. 
     Substrate processing systems may be used to treat substrates such as semiconductor wafers. Example processes that may be performed on a substrate include, but are not limited to, chemical vapor deposition (CVD), atomic layer deposition (ALD), conductor etch, dielectric etch, and/or other etch, deposition, or cleaning processes. A substrate may be arranged on a substrate support, such as a pedestal, an electrostatic chuck (ESC), etc. in a processing chamber of the substrate processing system. During etching, gas mixtures including one or more precursors may be introduced into the processing chamber and plasma may be used to initiate chemical reactions. 
     The substrate support may include a ceramic layer arranged to support a substrate. For example, the substrate may be clamped to the ceramic layer during processing. The substrate support may include an edge ring arranged to surround an outer perimeter of ceramic layer and the substrate for optimal edge performance and yield. 
     SUMMARY 
     A substrate support for supporting a substrate in a substrate processing system includes a baseplate and a ceramic layer arranged above the baseplate. An outer perimeter of the ceramic layer is surrounded by an edge ring. An outer radius of the ceramic layer is greater than an inner radius of the edge ring such that an outer edge of the ceramic layer extends below the edge ring. In other features, the ceramic layer includes an annular groove arranged in an upper surface of the substrate and an insert arranged in the annular groove. 
     A substrate processing method includes providing a baseplate, arranging a ceramic layer above the baseplate, and arranging an edge ring arranged around an outer perimeter of the ceramic layer. An outer radius of the ceramic layer is greater than an inner radius of the edge ring, such that an outer edge of the ceramic layer extends below the edge ring. The ceramic layer includes an annular groove arranged in an upper surface of the substrate and an insert arranged in the annular groove. The method further includes arranging a substrate on the ceramic layer and performing at least one processing step on the substrate. 
     Further areas of applicability of the present disclosure will become apparent from the detailed description, the claims and the drawings. The detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the disclosure. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The present disclosure will become more fully understood from the detailed description and the accompanying drawings, wherein: 
         FIG. 1  is an example substrate support; 
         FIG. 2  is a functional block diagram of an example processing chamber according to the present disclosure; 
         FIG. 3  is an example substrate support including a ceramic layer according to the principles of the present disclosure; 
         FIG. 4  is a plan view of an example substrate support including a ceramic layer according to the principles of the present disclosure; 
         FIG. 5  is a plan view of an example ceramic layer according to the principles of the present disclosure; 
         FIG. 6  is another example substrate support including a ceramic layer according to the principles of the present disclosure; and 
         FIG. 7  illustrates steps of an example substrate processing method according to the principles of the present disclosure. 
     
    
    
     In the drawings, reference numbers may be reused to identify similar and/or identical elements. 
     DETAILED DESCRIPTION 
     Referring now to  FIG. 1 , an example substrate support  10 , such as an electrostatic chuck (ESC), is shown. The substrate support  10  includes a conductive baseplate  14  that supports a ceramic layer  18 . A thermal resistance layer  22  (e.g., a bond layer) may be arranged between the ceramic layer  18  and the baseplate  14 . A substrate  26  is arranged on the ceramic layer  18  of the substrate support  10 . The substrate support  10  may include an edge assembly  30  surrounding an outer perimeter of the substrate  26 . In some examples, the edge assembly  30  may include an inner edge ring  34  and an outer insulator ring  38 . A gap  42  may be defined between an outer perimeter of the substrate  26  and the edge ring  34 . The substrate support  10  may include one or more additional ring structures  48 ,  52 ,  56 ,  60  surrounding the baseplate  14  and supporting the edge ring  34 . The structures  48 ,  52 ,  56 , and  60  may be provided to achieve characteristics related to process uniformity, such as a desired thermal conductivity, a desired electrical or RF coupling, etc. 
     Manufacturing tolerances associated with the substrate  26  and/or components of the substrate support  10  may result in process non-uniformities. For example, an inner radius of the edge ring  34  may be selected to be large enough to accommodate variations in the outer radius of substrates processed on the substrate support  10 . Accordingly, different substrates may have a different gap  42  between the outer radius of the substrate  26  and an inner radius of the edge ring  34 . In some examples (as shown), an outer radius of the substrate  26  may overlap an inner radius of the edge ring  34 , and may be greater than an outer radius of the ceramic layer  18  for desired processing performance. 
     Variations in the width of the gap  42  may result in non-uniformities associated with the processing of a plurality of substrates. For example, a positional relationship between an outer edge of the substrate  26  and the edge ring  34  and/or the ceramic layer  18  (e.g., distance, relative height, etc.) may cause the outer edge of the substrate  26  to be processed differently than an inner portion of the substrate  26 , due to temperature non-uniformities, electric field non-uniformities, etc. As a result, the substrate  26  may have non-uniform etch depths, non-uniform amounts of deposited material, etc. at its edge. Further, the gap  42  may increase the likelihood of arcing and increase erosion of portions of the ceramic layer  26  exposed to process gases and plasma. Potential effects such as erosion and arcing may limit power applied to the substrate support, may cause increased downtime for maintenance, etc. 
     A substrate processing system may be configured to compensate for known process non-uniformities associated with a particular substrate support and/or processing chamber. However, compensating for these non-uniformities may be difficult when the outer radius of the substrate  26 , and therefore the relationship between the substrate  26  and the edge ring  34 , varies. Systems and methods according to the principles of the present disclosure implement a substrate support configured to reduce non-uniformities associated with substrate processing. For example, a ceramic layer of the substrate support has an increased diameter relative to the edge ring and substrates processed on the substrate support, and may include a replaceable (e.g., sacrificial or consumable) insert. 
     Referring now to  FIG. 2 , an example substrate processing system  100  is shown. For example only, the substrate processing system  100  may be used for performing etching using RF plasma and/or other suitable substrate processing. The substrate processing system  100  includes a processing chamber  102  that encloses other components of the substrate processing system  100  and contains the RF plasma. The substrate processing chamber  102  includes an upper electrode  104  and a substrate support  106 , such as an electrostatic chuck (ESC). During operation, a substrate  108  is arranged on the substrate support  106 . While a specific substrate processing system  100  and chamber  102  are shown as an example, the principles of the present disclosure may be applied to other types of substrate processing systems and chambers, such as a substrate processing system that generates plasma in-situ, that implements remote plasma generation and delivery (e.g., using a plasma tube, a microwave tube), etc. 
     For example only, the upper electrode  104  may include a gas distribution device such as a showerhead  109  that introduces and distributes process gases. The showerhead  109  may include a stem portion including one end connected to a top surface of the processing chamber. A base portion is generally cylindrical and extends radially outwardly from an opposite end of the stem portion at a location that is spaced from the top surface of the processing chamber. A substrate-facing surface or faceplate of the base portion of the showerhead includes a plurality of holes through which process gas or purge gas flows. Alternately, the upper electrode  104  may include a conducting plate and the process gases may be introduced in another manner. 
     The substrate support  106  includes a conductive baseplate  110  that acts as a lower electrode. The baseplate  110  supports a ceramic layer  112 . In some examples, the ceramic layer  112  may comprise a heating layer, such as a ceramic multi-zone heating plate. A thermal resistance layer  114  (e.g., a bond layer) may be arranged between the ceramic layer  112  and the baseplate  110 . The baseplate  110  may include one or more coolant channels  116  for flowing coolant through the baseplate  110 . The substrate support  106  may include an edge ring  118  arranged to surround an outer perimeter of the substrate  108 . 
     An RF generating system  120  generates and outputs an RF voltage to one of the upper electrode  104  and/or the lower electrode (e.g., the baseplate  110  of the substrate support  106 ). The other one of the upper electrode  104  and the baseplate  110  may be DC grounded, RF grounded or floating. For example only, the RF generating system  120  may include an RF voltage generator  122  that generates the RF voltage that is fed by a matching and distribution network  124  to the upper electrode  104  or the baseplate  110 . In other examples, the plasma may be generated inductively or remotely. Although, as shown for example purposes, the RF generating system  120  corresponds to a capacitively coupled plasma (CCP) system, the principles of the present disclosure may also be implemented in other suitable systems, such as, for example only transformer coupled plasma (TCP) systems, CCP cathode systems, remote microwave plasma generation and delivery systems, etc. 
     A gas delivery system  130  includes one or more gas sources  132 - 1 ,  132 - 2 , . . . , and  132 -N (collectively gas sources  132 ), where N is an integer greater than zero. The gas sources supply one or more precursors and mixtures thereof. The gas sources may also supply purge gas. Vaporized precursor may also be used. The gas sources  132  are connected by valves  134 - 1 ,  134 - 2 , . . . , and  134 -N (collectively valves  134 ) and mass flow controllers  136 - 1 ,  136 - 2 , . . . , and  136 -N (collectively mass flow controllers  136 ) to a manifold  140 . An output of the manifold  140  is fed to the processing chamber  102 . For example only, the output of the manifold  140  is fed to the showerhead  109 . 
     A temperature controller  142  may be connected to a plurality of heating elements, such as thermal control elements (TCEs)  144  arranged in the ceramic layer  112 . For example, the heating elements  144  may include, but are not limited to, macro heating elements corresponding to respective zones in a multi-zone heating plate and/or an array of micro heating elements disposed across multiple zones of a multi-zone heating plate. The temperature controller  142  may be used to control the plurality of heating elements  144  to control a temperature of the substrate support  106  and the substrate  108 . Each of the heating elements  144  according to the principles of the present disclosure may include a first material having a positive TCR and a second material having a negative TCR as described below in more detail. 
     The temperature controller  142  may communicate with a coolant assembly  146  to control coolant flow through the channels  116 . For example, the coolant assembly  146  may include a coolant pump and reservoir. The temperature controller  142  operates the coolant assembly  146  to selectively flow the coolant through the channels  116  to cool the substrate support  106 . 
     A valve  150  and pump  152  may be used to evacuate reactants from the processing chamber  102 . A system controller  160  may be used to control components of the substrate processing system  100 . A robot  170  may be used to deliver substrates onto, and remove substrates from, the substrate support  106 . For example, the robot  170  may transfer substrates between the substrate support  106  and a load lock  172 . Although shown as separate controllers, the temperature controller  142  may be implemented within the system controller  160 . In some examples, a protective seal  176  may be provided around a perimeter of the bond layer  114  between the ceramic layer  112  and the baseplate  110 . 
     The ceramic layer  112  and the edge ring  118  of the substrate support  106  according to the principles of the present disclosure have an increased outer diameter relative to the substrate  108  as described below in more detail. Further, the outer radius of the ceramic layer  112  may be greater than an inner radius of the edge ring  118  such that the ceramic layer  112  extends below the edge ring  118 . The ceramic layer  112  may include a replaceable insert (not shown in  FIG. 2 ) as described below in  FIGS. 3, 4, 5, and 6 . 
     Referring now to  FIGS. 3 and 4 , an example substrate support  300  is shown. The substrate support  300  is shown in a cross-section view in  FIG. 3  and in a plan view in  FIG. 4 . The substrate support  300  includes a conductive baseplate  304  that supports a ceramic layer  308 . A bond layer  312  may be arranged between the ceramic layer  308  and the baseplate  304 . A substrate  316  is arranged on the ceramic layer  308 . The substrate support  300  includes an edge assembly  320  arranged around an outer perimeter of the substrate  316 . In some examples, the edge assembly  320  may include an inner edge ring  324  and an outer insulator ring  328 . For simplicity, the outer insulator ring  328  is not shown in  FIG. 4 . 
     A diameter and outer radius (and, accordingly, an outer edge  332 ) of the ceramic layer  308 , as well as an inner radius of the edge ring  320 , are increased relative to substrates being processed on the substrate support  300 . A width of a gap  336  between the substrate  316  and the edge ring  324  may be increased. For example, the outer radius of the ceramic layer  308  may be greater than an outer radius of the largest possible substrate processed on the substrate support  300  by a predetermined minimum offset. For example only, for 300 mm substrates (i.e., having a 150 mm radius), a manufacturing variance of the substrate may be as high as 1 mm, resulting in an outer radius of 150.5 mm. Accordingly, the outer radius of the ceramic layer  308  may be 150.5 mm plus the offset. In some examples, the offset is at least 1 mm. In other examples, the offset is at least 2 mm. As such, for a substrate support for processing 300 mm substrates, the outer radius of the ceramic layer  308  may be 151.5 mm to provide an offset of 1 mm. Similarly, for a substrate support for processing 450 mm substrates, the outer radius of the ceramic layer  308  may be 226.1 mm to provide an offset of 1 mm. For example only, in a configuration for processing substrates having a diameter d (e.g., d mm) and a manufacturing variance of v mm, the ceramic layer may have an outer radius greater than or equal to a sum of (d+v)/2 and a predetermined offset. 
     Although offsets of 1 mm and 2 mm have been provided for example only, the offset may have any amount sufficient to extend the ceramic layer  308  below the edge ring  324 . For example, the ceramic layer  308  may have an outer radius that is a minimum amount greater than an inner radius of the edge ring  324 . For example, the outer radius of the ceramic layer  308  may be 1 mm, 2 mm, 3 mm, etc. greater than an inner radius of the edge ring  324 . Accordingly, the ceramic layer  308  extends below the edge ring  324 , and the outer edge  332  of the ceramic layer  308  is arranged under the edge ring  324  (i.e., the edge ring  324  overlaps the outer edge  332  of the ceramic layer  308 ). 
     Because the ceramic layer  308  extends below the edge ring  324  and is larger than the substrate  316 , a portion of the ceramic layer  308  is not covered by the substrate  316  or the edge ring  324 . Accordingly, the ceramic layer  308  may include a replaceable insert  340 . For example, the insert  340  is annular and is arranged in an annular slot or groove  344  in an upper surface of the ceramic layer  308  below the edge ring  324 . For example only, the insert  340  is arranged at an interface between a portion of the ceramic layer  308  below the edge ring  324  and a portion of the ceramic layer  308  exposed to process gases and plasma (i.e., the portion of the ceramic layer  308  not covered by either the substrate  316  or the edge ring  324 ). This portion of the ceramic layer  308  corresponding to the insert  340  may experience increased exposure to process gases (e.g., plasma) and, therefore, increased wear and erosion. Accordingly, without the replaceable insert  340 , the increased exposure to plasma caused by the gap  336  would result in increased erosion of the ceramic layer  308 , and the ceramic layer  308  would require frequent replacement. 
     Instead, the replaceable insert  340  may be replaced at lower cost, less system downtime, and more efficient disassembly and reassembly of components of the substrate support  300 . For example, the insert  340  may be replaced by removing the inner edge ring  324  of the edge assembly  320  and then removing the insert  340 . For example only, the insert  340  may comprise the same material (e.g., any suitable ceramic) as the ceramic layer  308 . Accordingly, exposure to process gases may cause erosion of the insert  340 . As such, the insert  340  may be characterized as sacrificial or consumable. 
     In some examples, the substrate support  300  may eliminate and/or simplify structures such as the ring structures  48 ,  52 ,  56 , and  60  as shown in  FIG. 1 . For example, since increasing the outer radius of the ceramic layer  308  relative to the substrate  316  improves process uniformity at an edge of the substrate  316 , additional structures provided to improve process uniformity may be unnecessary. For example only, ring structures  52 ,  56  and  60  directly below the edge ring  34  of  FIG. 1  are eliminated in the example shown in  FIG. 3 . 
     Referring now to  FIG. 5 , an example of the ceramic layer  308  with the replaceable insert  340  is shown. In some examples, the insert  340  may include one or more tap holes (e.g., threaded tap holes)  348  for attaching the insert  340  to the ceramic layer  308 . The ceramic layer  308  may include one or more cutouts  352  to facilitate removal of the insert  340  from the groove  344  in the ceramic layer  308 . For example, the cutouts  352  may be configured to receive a tool for prying the insert  340  from the groove  344 . 
     Referring now to  FIG. 6 , another example of the substrate support  320  is shown. In this example, the insert  340  is wider than in the example shown in  FIG. 3 . Accordingly, the insert  340  extends from below the edge ring  324 , into the gap  336 , and below an outer edge of the substrate  316 . In other words, the insert  340  occupies an entire portion of the ceramic layer  308  exposed to process gases in the gap  336 . 
     Referring now to  FIG. 7 , an example substrate processing method  700  begins at  704 . At  708 , a substrate support including a ceramic layer is provided. The substrate support is configured for processing a substrate (i.e., wafer), having a standard size, such as 200 mm, 300 mm, 450 mm, etc. The ceramic layer has an outer radius that is greater than an outer radius of substrates to be processed on the substrate support as described above. For example, if the substrate support is configured for processing standard substrates having a diameter d and a manufacturing variance of v, the ceramic layer may have an outer radius greater than or equal to a sum of (d+v)/2 and a predetermined offset. At  712 , a substrate is arranged on the ceramic layer. At  716 , one or more substrate processing steps are performed on the substrate. The method  700  ends at  720 . 
     The foregoing description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent upon a study of the drawings, the specification, and the following claims. It should be understood that one or more steps within a method may be executed in different order (or concurrently) without altering the principles of the present disclosure. Further, although each of the embodiments is described above as having certain features, any one or more of those features described with respect to any embodiment of the disclosure can be implemented in and/or combined with features of any of the other embodiments, even if that combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and permutations of one or more embodiments with one another remain within the scope of this disclosure. 
     Spatial and functional relationships between elements (for example, between modules, circuit elements, semiconductor layers, etc.) are described using various terms, including “connected,” “engaged,” “coupled,” “adjacent,” “next to,” “on top of,” “above,” “below,” and “disposed.” Unless explicitly described as being “direct,” when a relationship between first and second elements is described in the above disclosure, that relationship can be a direct relationship where no other intervening elements are present between the first and second elements, but can also be an indirect relationship where one or more intervening elements are present (either spatially or functionally) between the first and second elements. As used herein, the phrase at least one of A, B, and C should be construed to mean a logical (A OR B OR C), using a non-exclusive logical OR, and should not be construed to mean “at least one of A, at least one of B, and at least one of C.” 
     In some implementations, a controller is part of a system, which may be part of the above-described examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system. 
     Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer. 
     The controller, in some implementations, may be a part of or coupled to a computer that is integrated with the system, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber. 
     Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers. 
     As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.