Patent Publication Number: US-2013241627-A1

Title: Power switch circuit

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure relates to power switch circuits and, particularly, to a power switch circuit capable of reducing electromagnetic interference (EMI). 
     2. Description of the Related Art 
     EMI effects performance of electronic devices greatly. For example, when power is supplied to a power switch circuit in an electronic device, power system harmonics may be created at the moment that a switch element of the power switch circuit is turned on causing EMI. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWING 
       The components in the drawing is not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the disclosure. Moreover, in the drawing, like reference numerals designate corresponding parts throughout the several views. 
       The FIGURE is a circuit diagram of a power switch circuit in accordance with an exemplary embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Referring to the FIGURE, a power switch circuit  10  includes a pulse-width modulation (PWM) control circuit  11 , a first resistor R 1 , a second resistor R 2 , a first switch circuit  12 , and a second switch circuit  13 . The PWM control circuit  11  includes a first frequency control terminal DR 1  and a second frequency control terminal DR 2  configured for outputting predetermined frequency signals. A first terminal of the first resistor R 1  is connected to the first frequency control terminal DR 1 , and a second terminal of the first resistor R 1  is connected to the first switch circuit  12 . A first terminal of the second resistor R 2  is connected to the second frequency control terminal DR 2 , and a second terminal of the second resistor R 2  is connected to the second switch circuit  13 . 
     In the embodiment, the first switch circuit  12  includes a field effect transistor Q 1 , and the second switch circuit  13  includes a field effect transistor Q 2 . The second terminal of the first resistor R 1  is connected to the grid of the field effect transistor Q 1 , the second terminal of the second resistor R 2  is connected to the grid of the field effect transistor Q 2 . The drains of the field effect transistor Q 1  and the field effect transistor Q 2  are both connected to a power input port DC_IN. 
     The power switch circuit  10  further includes a first filtering circuit  14  and a second filtering circuit  15 . The first filtering circuit  14  is connected between the first switch circuit  12  and a first output port  16  of the power switch circuit  10 , and the second filtering circuit  15  is connected between the second switch circuit  13  and a second output port  17  of the power switch circuit  10 . In the embodiment, the first filtering circuit  14  includes a third resistor R 3  and a first capacitor C 1 . A first terminal of the first capacitor C 1  is connected to the source of the field effect transistor Q 1 , and a second terminal of the first capacitor C 1  is grounded via the third resistor R 3 . The second filtering circuit  15  includes a fourth resistor R 4  and a second capacitor C 2 . A first terminal of the second capacitor C 2  is connected to source of the field effect transistor Q 2 , and a second terminal of the second capacitor C 2  is grounded via the fourth resistor R 4 . 
     In the embodiment, the PWM control circuit  11  is an integration circuit, and further includes a first feedback port FB 1  grounded via a resistor R 5  and a second feedback port FB 2  grounded via a resistor R 6 . The first frequency control terminal DR 1  is connected to the grid of the field effect transistor Q 1 , and the second frequency control terminal DR 2  is connected to the grid of the field effect transistor Q 2 . 
     When the first frequency control terminal DR 1  and the second frequency control terminal DR 2  respectively output higher harmonics generated by the PWM control circuit  11 , the first filtering circuit  14  and the second filtering circuit  15  are capable of restricting amplitude of the higher harmonics, thereby reducing electromagnetic interference of the power switch circuit  10 . 
     In the embodiment, the power switch circuit  10  further includes other elements which are not related to the present disclosure and left out. 
     It is understood that the present disclosure may be embodied in other forms without departing from the spirit thereof. Thus, the present examples and embodiments are to be considered in all respects as illustrative and not restrictive, and the disclosure is not to be limited to the details given herein.