Patent Publication Number: US-4647216-A

Title: Apparatus and method for measuring the time elapsed in increasing or in decreasing vehicle speed from one predetermined speed to a second, higher or lower predetermined speed

Description:
This invention relates to a system and a method for measuring, precisely, and for displaying the elapsed tme required to increase the speed of a vehicle such as an automobile from a first predetermined speed to a second, higher predetermined speed, or to decrease the speed of a vehicle from a first, predetermined speed to a second, lower predetermined speed. The system may include, or be linked to a speedometer, or other means for measuring the speed of the vehicle. 
     The new system of this invention comprises means for measuring the speed of a vehicle; means for setting a first, predetermined speed from which to measure the elapsed time for the vehicle to reach a second, higher or lower speed, including means for generating a signal to start a clock, counter or other means for measuring the elapsed time; means for setting a second, predetermined speed, higher or lower than the first predetermined speed, at which the elapsed time to be measured ends, including means for generating a signal to stop the counter or other means for measuring the elapsed time; and means for displaying the elapsed time. 
     The speedometer or other means for measuring vehicle speed in this sytem may be analog, but is, preferably, a digital device that measures and displays speeds in some unit of distance per unit of time, such as miles per hour or kilometers per hour. 
     The system also includes means for generating a signal to start a clock, counter or other means for measuring time elapsed when the speed of the vehicle linked to this system reaches a first predetermined, selectable speed in the range, say of zero to some predetermined maximum, such as 99 miles or kilometers per hour. 
     The system also includes means for generating a signal when the vehicle linked to the system has attained a second, predetermined, selectable higher (or lower) speed for stopping the clock, counter or other means to permit measuring the time elapsed in increasing or decreasing vehicle speed from the first predetermined speed to the second predetermined speed. 
     The means for generating a signal representing the start of the time interval to be measured, i.e., the first, predetermined, selectable vehicle speed, includes means operatively linked to a speedometer on the vehicle or to other means for measuring the speed of the vehicle; means for selecting the speed at which the timing interval is to begin; and means for generating a signal to trigger the start of the timing interval. 
     The means for generating a signal representing the end of the time interval to be measured, i.e., the second predetermined, selectable vehicle speed, includes means operatively linked to a speedometer or to other means for measuring the speed of the vehicle; means for selecting the speed at which the timing interval is to end; and means for generating a signal to trigger the end of the timing interval. 
     Both the means for generating a signal to start the measurement of the timing interval, and the means for generating a signal to stop measurement of the timing interval, are linked to means for measuring the timing interval. This means for measuring the timing interval includes means for receiving the signal starting the measurement of the time interval, means for receiving the signal ending the timing interval, and means for resetting the measuring means for reuse. 
     The system also includes means for displaying the elapsed time between the speed selected for the beginning point of the timing interval and the second, higher or lower speed selected as the end point of the timing interval. 
     The new method for measuring the time required for the speed of a vehicle to increase or to decrease from a first predetermined speed to a second, higher (or lower) predetermined speed comprises: measuring the speed of a vehicle; selecting a first speed (for example, in the range, say from zero to a predetermined maximum value) at which the measurement of elapsed time is to begin; selecting a second, higher or lower speed at which the timing interval is to end; generating a signal representing the speed at which the timing interval is to begin when the vehicle reaches the selected starting time; starting a timing device to measure precisely the time required to reach the selected second, higher or lower speed; generating a signal to stop the timing device when the vehicle reaches the selected second, higher or lower speed; and detecting and displaying the time elapsed in increasing or decreasing the vehicle&#39;s speed from the first selected speed to the second selected speed. 
    
    
     The invention can better be understood by reference to the accompanying drawings in which: 
     FIG. 1 is a block function diagram of a preferred embodiment of the new system for measuring the time elapsed in increasing or in decreasing the speed of a vehicle from a first predetermined speed to a second predetermined speed; and 
     FIG. 2 is a second, more detailed block function/wiring diagram of the preferred embodiment shown in FIG. 1. 
    
    
     FIG. 1 shows, in a block function diagram, a preferred embodiment of the new system for measuring the elapsed time in increasing (or decreasing) the speed of a vehicle from a first predetermined speed to a second, higher (or lower) predetermined speed. Data from means for detecting the speed of the vehicle, such as means linked to the wheel or axle or an automobile, sends a signal on path 2 to digital speedometer 3. The speed of the vehicle appears on display device 4 upon receipt of a signal from speedometer 3 on path 5. A signal representing the vehicle&#39;s speed also passes on path 6 to speed comparator 7. 
     Speed comparator 7 includes means for setting a first, predetermined speed representing the starting speed for a timing interval and means for setting a second, higher (or lower) speed representing the ending point of the timing interval. When the vehicle&#39;s speed reaches the first, predetermined speed, speed comparator 7 generates a signal on path 8 to start counter 9. Counter 9 is a device for measuring the timing interval. 
     Comparator 7 continues to receive speed data from speedometer 3 on path 6 after the counter has begun to measure the desired timing interval. When the vehicle speed reaches the second, higher (or lower) predetermined speed selected as the end point for the timing interval, comparator 7 issues a signal on path 8 to stop counter 9. Upon receipt of this end point signal, the counter stops, and issues a signal, representing the time elapsed, over the desired interval on path 10 to display device 11. Display device 11 shows the time elapsed in increasing (or decreasing) the speed of the vehicle from the selected starting speed to the selected ending speed in a suitable unit of time such as seconds. Activation of reset means 12 linked to counter 9 via path 13 resets the counter 9 to zero or another desired starting value. 
     FIG. 2 shows in greater detail a preferred embodiment of the new system depicted in FIG. 1. In FIG. 2, the speed data from speedometer 1, which includes two or more BCD to seven-segment decoder/drivers 14 and 15 with seven-segment digit readouts 16 and 17, respectively, passes continuously to digit select circuits 18, 19, 20 and 21 on paths 22/23/24/25 and paths 26/27/28/29. Switches 31, 33 and 35 permit selection of the units, tens and hundreds digits in the desired starting or ending speed for the desired timing interval. Switches 31, 33 and 35 can be set to any of the ten positions on BCD-to-decimal decoders 18, 19 and 63 for this purpose. Similarly, switches 36, 38 and 41 can be set to any of the ten positions on BCD to decimal decoders 20, 21 and 64 to select the starting or ending speed for the desired timing interval. 
     When decoders 18, 19 and 63 receive speed data from speedometer 1, indicating that the vehicle speed has attained the selected starting or ending speed, the signals on paths 30, 32 and 34 all go high, changing the signal at the output of NAND gate 46 from high to low. Similarly, when decoder group 20, 21 and 64 receives speed data that is the same as the units, tens, and hundreds digits selected through switches 36, 38 and 41, the signals on paths 37, 39 and 40 all go high, producing a high output on path 48 from NAND gate 47. Normally, the signals on paths 48/66 and 49/65 to exclusive OR gate 8 are both high. When the signal on either path 65 or 66 goes high, the signal on path 59 from exclusive OR gate 8 goes high, passes through shaping amplifiers 56, 57 and 58, via paths 60 and 61, and delivers a pulse to counter 9 on path 62. The first signal reaching counter 9 on path 62 activates counter 9; the second signal reaching counter 9 deactivates the counter, as, for example, at the end of a timing interval. The elapsed time between the start and stop pulses passes, in signal form, on path 10 to readout device 11 where the elapsed time may appear in suitable units, such as seconds and hundredths of seconds. 
     To use the device of FIGS. 1 and 2 in measuring the increase of a vehicle&#39;s speed from a first predetermined speed to a second predetermined speed, a user sets the desired starting speed for the timing interval through switches 31, 33 and 35, and the desired ending speed for the timing interval via switches 36, 38 and 41. When the vehicle&#39;s speed reaches the selected starting speed, decoders 18, 19 and 63 deliver high signals on paths 30, 32 and 34, to NAND gate 46, changing the output on NAND gate 46 from high to low. The low signal on path 49 passes through shaping and inverting amplifiers 50, 51 and 52, and then passes on path 65 to exclusive OR gate 8. Because the signal on paths 48 and 66 is still low at this time, the output on path 59 from exclusive OR gate 8 goes low. After shaping and inverting in amplifiers 56, 57 and 58, the high pulse on path 62 activates counter 9, beginning the timing of the desired interval. 
     Meanwhile, decoders 20, 21 and 64 would be continuously receiving speed data on paths 22/23/24/25 and 26/27/28/29. When the actual vehicle speed equals the speed selected through switches 36, 38 and 41, the signals on paths 37, 39 and 40 are all high at the input to NAND gate 47, producing a low output on path 48. The low signal on path 48 then passes through shaping and inverting amplifiers 53, 54 and 55, and the high output appears on path 66 as an input to exclusive OR gate 8. Because the vehicle speed is above the starting speed selected via switches 31, 33 and 35, the signal on path 65 at exclusive OR gate 8 is low at this time. Accordingly, the signal on path 59 goes high. After passing through shaping and inverting amplifiers 56, 57 and 58, this low signal passes, on path 62, to counter 9, turning off the counter, and ending the timing interval. The elapsed time between the beginning and ending pulses passes as a signal on path 10 to readout means 11, where the elapsed time from the selected starting speed to the selected ending speed appears in suitable units, say, in seconds and hundredths of seconds. 
     Activation of reset switch 12 delivers a signal on path 13 to counter 9, resetting the clock to its starting state. 
     If a user wishes to measure the time required to reduce vehicle speed from one speed to another, say from 50 miles per hour to 10 miles per hour, he would select the starting speed, namely 50 miles per hour, through switches 36, 38 and 41, and the ending speed through switches 31, 33 and 35. When vehicle speed drops from a speed above 50 miles per hour to 50 miles per hour, the signals on paths 37, 39 and 40 go high, producing a low output on path 48 from NAND gate 47. In turn, the high signal on path 66, coupled with a low signal on path 65, produces a pulse on paths 59 and 62 to activate counter 9, starting the timing of the interval. 
     When vehicle speed drops to the selected ending speed, namely 10 miles per hour, the signals on paths 30, 32 and 34 are all high, producing a low output on path 49 from NAND gate 46. The low output on path 49 appears as a high output on path 65 at exclusive OR gate 8. The signal on path 66 at 10 miles per hour is high, producing a low output on path 62. The signal on path 62 passes to counter 9, turning off the counter, and generating a signal representing the elapsed time on path 10. The elapsed time signal on path 10 passes to readout device 11, where the elapsed time appears in suitable units, such as seconds and hundredths of seconds. Again, engagement of reset switch 12 delivers a signal on path 13 to counter 9, resetting it to its initial state. 
     As explained above, engagement of reset button 12 resets the counter 9 to the desired starting value. Resetting may be necessary when vehicle speed reaches the selected starting speed, but then falls to or below, or rises to or above, the selected starting speed before attaining the selected ending speed of the desired timing interval.