Patent Publication Number: US-10785862-B2

Title: Microelectronic modules with sinter-bonded heat dissipation structures and methods for the fabrication thereof

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application is a continuation of co-pending U.S. application Ser. No. 15/363,671, filed with the United Stated Patent and Trademark Office on Nov. 29, 2016. 
    
    
     TECHNICAL FIELD 
     Embodiments of the present invention relate generally to microelectronic packaging and, more particularly, to high thermal performance microelectronic modules containing sinter-bonded heat dissipation structures, as well as to methods for fabricating such high thermal performance microelectronic modules. 
     BACKGROUND 
     Microelectronic modules containing high power microelectronic devices, such as Radio Frequency (RF) semiconductor die, often generate excess heat during operation. For this reason, microelectronic modules are commonly fabricated to contain copper or other metal structures for purposes of enhanced heat dissipation. In certain cases, the metal structures may assume the form of metal structures, such as metal slugs or “coins,” embedded within a module substrate, such as a coreless substrate or a Printed Circuit Board (PCB). A metal coin may be embedded in a multilayer PCB in situ by building-up the PCB laminates around the metal coin. Alternatively, a metal structure may be created during production of a coreless substrate utilizing a sequential plating process. As a still further possibility, a metal coin may be installed post module substrate fabrication by, for example, pressing fitting the metal coin into an opening formed through the substrate by mechanical or laser drilling. While module substrates containing embedded metal coins can provide enhanced local heat dissipation, such substrates are often undesirably costly to manufacture, prone to substrate warpage (particularly in the case of coreless substrates), and associated with other shortcomings. More generally, even when produced utilizing embedded coin substrates, microelectronic modules may still experience undesirably high heat concentrations when operated at elevated power levels, such as power levels exceeding 1 watt and possibly approaching or exceeding 5 watts, as may be desirable in certain microwave and RF applications. Accordingly, there exists an ongoing demand for microelectronic modules having enhanced heat dissipation capabilities and which are amenable to fabrication utilizing efficient, cost effective, warpage-resistant manufacturing processes. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       At least one example of the present invention will hereinafter be described in conjunction with the following figures, wherein like numerals denote like elements, and: 
         FIGS. 1 and 2  are simplified cross-sectional and exploded views, respectively, of a microelectronic module including a sinter-bonded heat dissipation structure embedded within a module substrate, as illustrated in accordance with an exemplary embodiment of the present disclosure; 
         FIGS. 3 and 4  are simplified cross-sectional and isometric views, respectively, of a microelectronic module containing at least one heat pipe, which is positioned in a substrate cavity and embedded in a sintered metal body, as illustrated in accordance with a further exemplary embodiment of the present disclosure; 
         FIG. 5  is a simplified cross-sectional view of the microelectronic module shown in  FIGS. 3 and 4 , as inverted and bonded to a second microelectronic module by a sintered ground plane, as illustrated in accordance with a still further exemplary embodiment of the present disclosure; and 
         FIG. 6  is a simplified cross-sectional view of a microelectronic module including a sinter-bonded heat dissipation structure embedded within a module substrate, as illustrated in accordance with a yet further exemplary embodiment of the present disclosure. 
     
    
    
     For simplicity and clarity of illustration, descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the exemplary and non-limiting embodiments of the invention described in the subsequent Detailed Description. It should further be understood that features or elements appearing in the accompanying figures are not necessarily drawn to scale unless otherwise stated. For example, the dimensions of certain elements or regions in the figures may be exaggerated relative to other elements or regions to improve understanding of embodiments of the invention. 
     DETAILED DESCRIPTION 
     The following Detailed Description is merely exemplary in nature and is not intended to limit the invention or the application and uses of the invention. The term “exemplary,” as appearing throughout this document, is synonymous with the term “example” and is utilized repeatedly below to emphasize that the following description provides only multiple non-limiting examples of the invention and should not be construed to restrict the scope of the invention, as set-out in the Claims, in any respect. As appearing herein, a structure or body is considered “thermally conductive” when the structure or body has a thermal conductivity exceeding 5 watts per meter-Kelvin (W/mK). 
     The following describes high thermal performance microelectronic modules including sinter-bonded heat dissipation structures and methods for producing such microelectronic modules. As indicated by the term “sinter-bonded,” the heat dissipation structures are at least partially composed of a sintered material bonded to a module substrate, such as a coreless substrate, a Printed Circuit Board (PCB), or other substrate containing or lacking electrically-conductive routing features. In certain embodiments, the heat dissipation structure may consist substantially entirely of sintered material, which may fill one or more cavities provided in the module substrate. In other embodiments, the heat dissipation structure may contain a thermally-conductive piece (e.g., a metal slug) or an elongated thermal conduit (e.g., a heat pipe), which is affixed within the one or more cavities provided in the substrate by the sintered material. In such embodiments, the heat dissipation structure may thermally couple at least one semiconductor die or other microelectronic device to a heatsink further attached to the substrate, possibly by the sintered material. In this manner, the heat dissipation structure may provide a robust thermal transfer path promoting efficient conduction of heat from the microelectronic device to the heatsink, which may be convectively-cooled by ambient air, by forced airflow, or in another manner. The heat dissipation capabilities of the microelectronic module may be enhanced as a result. 
     In addition to providing enhanced heat dissipation, multiple benefits may be realized through the strategic usage of sinter material to bond the heat dissipation structure to the module substrate. The sinter material is advantageously formulated to form relatively robust metallurgical bonds with (e.g., metallized) surfaces of a module substrate, such as plated copper (Cu) or other plate metal layers formed on selected substrate surfaces. The sinter material can also be formulated to have a relatively high ductility reducing the likelihood of bond separation or cracking through thermal cycling; to have a controlled (e.g., near zero) porosity; and to have other desirable properties, as tailored by material composition and process parameters. The sintered material can be formed by processing a sinter precursor material utilizing low temperature sintering processes, which are carried-out at limited maximum processing temperatures (e.g., maximum processing temperatures less than 300 degrees Celsius (° C.)) through the application of elevated heat, controlled convergent pressures, or both heat and convergent pressures. As the sintering process is carried-out at relatively low temperatures, material constraints placed on the module components are eased and the above-described issues associated with high temperature processing, such as substrate warpage, are mitigated. Additionally, the sintering process may be leveraged to concurrently sinter bond one or more microelectronic devices and/or a heatsink to the module substrate in conjunction with bonding heat dissipation structure thereto. A highly efficient, cost effective manufacturing process is thus provided for fabricating microelectronic modules, whether in series or in parallel. 
     In certain embodiments of the microelectronic module, the sinter-bonded heat dissipation structures may serve other functions in addition to providing enhanced thermal transfer away from one or more heat-generating microelectronic devices contained within the module. For example, the sinter-bonded heat dissipation structures may be electrically-active in implementations and serve as electrically-conductive vias, which provide power and/or signal transfer through the module substrate. In embodiments wherein the module substrate assumes the form of a multilayer PCB or a multilayer coreless substrate having one or more internal wiring layers or patterned metal levels, traces or interconnect lines within the wiring layers may electrically contact the sinter-bonded heat dissipation structure. In other embodiments, the sinter-bonded heat dissipation structure may serve as a ground plane and/or may bond the microelectronic module to another structure or device, such as a second microelectronic module. In still further embodiments, the microelectronic module may also be produced to include other sintered structures in addition to the heat dissipation structure, such as sintered Radio Frequency (RF) shield structures. Examples of microelectronic modules having such sintered metal structures and methods for producing such microelectronic modules will now be provided in conjunction with  FIGS. 1-6 . 
     Turning now to  FIG. 1 , there is shown a simplified cross-sectional view of a microelectronic module  10 , as illustrated accordance with an exemplary embodiment of the present disclosure. Among other components, microelectronic module  10  includes a module substrate  12 , a sinter-bonded heat dissipation structure  14 ,  16 , and a heatsink  18 , which are bonded in a stacked relationship. Heat dissipation structure  14 ,  16  is captured between module substrate  12  and heatsink  18 . More specifically, heat dissipation structure  14 ,  16  is contained within a central substrate cavity  20  provided in the underside of a module substrate  12 ; that is, the lower principal surface of substrate  12  bonded to heatsink  18 . A central opening  22  is provided in an upper portion of module substrate  12 . Central opening  22  intersects substrate cavity  20  and allows physical access to sinter-bonded heat dissipation structure  14 ,  16  from the exterior of module substrate  12 . The planform dimensions of central opening  22  are less than the planform dimensions of substrate cavity  20  thereby imparting module substrate  12  with an inner peripheral ledge  24 , which borders central opening  22  and which partially covers heat dissipation structure  14 ,  16 . 
     Module substrate  12  can assume any form suitable for serving as a support structure during fabrication of microelectronic module  10  and to which heat dissipation structure  14 ,  16  can be sinter bonded. Module substrate  12  may or may not contain electrically-conductive routing features. In the illustrated example, module substrate  12  assumes the form of a multilayer substrate, such as a multilayer PCB or a multilayer coreless substrate, including an upper patterned metal layer  26  and at least one internal wiring layer (not shown for clarity). To produce substrate  12  when assuming the form of a multilayer PCB, multiple PCB layers may be successively built-up utilizing a lamination process, with the upper PCB layer (or layers) having a central opening defining module central opening  22  and with the lower PCB layer (or layers) having a larger, central opening defining substrate cavity  20 . Alternatively, to produce substrate  12  when assuming the form of a coreless substrate, multiple build-up layers may be successively formed over a non-illustrated carrier or temporary substrate, which is subsequently removed after completion of the build-up process. If desired, such build-up layers can be formed within or around a stiffener, such as a metal or ceramic ring. By producing substrate  12  as a multilayer coreless substrate rather than a multilayer PCB, the thickness of substrate  12  can be reduced. As a tradeoff, coreless substrates are relatively prone to warpage during high temperature processing; however, this is less of a concern in the present context due, at least in part, to the below-described low temperature sintering process. In still further embodiments, module substrate  12  may assume various other forms, including the form of a relatively thin, single layer PCB or coreless substrate lacking internal wiring layers, an interposer, or another dielectric structure including or lacking metal routing features. For example, as a still further possibility, substrate  12  may be produced utilizing a panelization process in which a Redistribution Layer (RDL) structure containing interconnect lines is a produced over a molded panel, which is subsequently singulated into discrete units. 
     A microelectronic device  28  is mounted to sinter-bonded heat dissipation structure  14 ,  16  opposite heatsink  18 . Microelectronic device  28  can be, for example, a semiconductor die having an active surface on which one or more groups (e.g., rows or clusters) of bond pads  32  are located. In the illustrated example, bond pads  32  are electrically coupled to electrically-conducive traces formed in patterned metal layer  26  by wire bonds  34 . In further embodiments, a different electrical interconnection approach can be utilized including, for example, the formation of one or more RDLs containing interconnect lines over device  28  and substrate  12 . Furthermore, while including only a single microelectronic device in the embodiment of  FIG. 1 , microelectronic module  10  can include any practical number of interconnected microelectronic devices in further embodiments, in which case module  10  may be considered a System-in-Package (SiP). A non-exhaustive list of other microelectronic devices that may be contained in microelectronic module  10  includes additional semiconductor die (e.g., memory die or Application Specification Integrated Circuit (ASIC) die), Microelectromechanical Systems (MEMS) devices, and Surface Mount Devices (SMDs), such as discrete or passive capacitors (e.g., chip caps), inductors, resistors, and diodes, to list but a few examples. 
     Heatsink  18  is composed of a material having a thermal conductivity exceeding that of module substrate  12 . Heatsink  18  will often be composed of a metallic material, such as aluminum (Al), Cu, or nickel (Ni), and alloys thereof. However, heatsink  18  can also be produced from certain composite materials and non-metallic materials having relatively high thermal conductivities. Such materials may include, but are not limited to, diamond polycarbonate materials, diamond-metal composites (e.g., diamond Au, diamond Ag, and diamond Cu), pyrolytic graphite, and materials containing allotropes of carbon, such as graphene and carbon nanotube-filled materials. Heatsink  18  is usefully produced to have a material volume greater than that of module substrate  12 . In this regard, and as indicated in  FIG. 1 , heatsink  18  may have a thickness T BP while module substrate  12  has a thickness T S , as measured along an axis orthogonal to the upper principal surface of heatsink  18 . T BP  is greater than T S  and may be at least twice T S  in an embodiment. Heatsink  18  may have a substantially monolithic or layered composition. In certain embodiments, heatsink  18  may also include an array of fins, pin-fins, or other surface area-increasing features. In the illustrated embodiment, and by way of non-limiting example only, heatsink  18  assumes the form of a relatively large metal (e.g., Al) block or baseplate. 
     Sinter-bonded heat dissipation structure  14 ,  16  has a thermal conductivity greater than substrate  12 . Sinter-bonded heat dissipation structure  14 ,  16  thus functions to conduct excess heat from microelectronic device  28  to heatsink  18 . Sinter-bonded heat dissipation structure  14 ,  16  may have various different structural forms and material compositions suitable for this heat transfer function, providing that at least some fraction of heat dissipation structure  14 ,  16  is composed of a sintered metallic material of the type described herein. In certain implementations, sinter-bonded heat dissipation structure  14 ,  16  may be exclusively composed of a sintered metal body, which fills substrate cavity  20  in whole or in part. In other implementations, sinter-bonded heat dissipation structure  14 ,  16  may contain other thermally-conductive prefabricated pieces or parts, which are positioned in substrate cavity  20  and joined to module substrate  12  by the sintered metal body. For example, in certain embodiments, heat dissipation structure  14 ,  16  may be produced to contain one or more metal coins, plates, or high thermal conductivity slugs. As appearing herein, the term “high thermal conductivity slug” refers to prefabricated solid body or structure having a thermal conductivity exceeding that of the module substrate, such as module substrate  12  shown in  FIG. 1 . In the illustrated embodiment of  FIG. 1 , specifically, sinter-bonded heat dissipation structure  14 ,  16  includes a high thermal conductivity (TC) slug  14 . High TC slug  14  can be composed of a metallic material, a non-metallic material, or a composite material including those materials discussed above in conjunction with heatsink  18 . In an embodiment, high TC slug  14  assumes the form of a coin, plate, or block composed predominately or essentially entirely of a metal or alloy, such as Cu; and having a thermal conductivity exceeding that of substrate  12  and possibly of heatsink  18 . High TC slug  14  can have a monolithic or layered structure. If desired, one or more surfaces of high TC slug  14  may be plated or clad with another metal or roughened to promote bonding with sintered metal body or layer  16  during the below-described sintering process. 
       FIG. 2  further illustrates microelectronic module  10  in an exploded view (metallized layer  26 , bond pads  32 , and wire bonds  34  not shown). Referring jointly to  FIGS. 1 and 2 , and as shown most clearly in  FIG. 2 , high TC slug  14  may have a planform shape and dimensions substantially matching those of substrate cavity  20 . Stated differently, high TC slug  14  may be shaped and sized for mating reception in substrate cavity  20 . Substrate-embedded sintered bond layer  16  also has an outer planform shape and dimensions substantially corresponding with those of substrate cavity  20 . Additionally, sintered bond layer  16  is ring-shaped or annular in the illustrated example and includes a central opening having dimensions generally matching those of substrate opening  22 . In one embodiment, sintered bond layer  16  may be formed by an annular sinter preform or precut film. Located between substrate  12  and slug  14 , substrate-embedded sintered bond layer  16  thus bonds an outer peripheral portion of high TC slug  14  to inner peripheral ledge  24  of module substrate  12 . To promote the formation of a robust metallurgical bond, the underside or interior of peripheral ledge  24  may be metallized or plated (e.g., via sputter deposition) to include a metal layer  36 , as identified in  FIG. 1 . 
     Microelectronic device  28  is bonded to high TC slug  14  by a device bond layer  38 . Device bond layer  38  can be composed of a non-sintered material, such as a die attach epoxy, which is deposited onto high TC slug  14  before or after formation of substrate-embedded sintered bond layer  16 . However, for reasons of process efficiency, it may be advantageous to form device bond layer  38  from a sintered material, which is similar or substantially identical to that from which substrate-embedded sintered bond layer  16  is composed. In this regard, substrate-embedded sintered bond layer  16  and device bond layer  38  may be formed from a common sinter precursor material, which is applied as a patterned layer (e.g., as an applied film or as a deposited paste layer) over the upper surface of high TC slug  14  and then sintered to concurrently form layers  16 ,  38 . Similarly, heatsink  18  is bonded to module substrate  12  and high TC slug  14  by a heatsink bond layer  40 , which is also advantageously (but not necessarily) formed from a sintered material that is similar or identical in composition to the material from which sintered bond layer  16  is formed. For this reason, layers  16 ,  38 ,  40  are collectively described below as “sintered bond layers  16 ,  38 ,  40 .” This notwithstanding, it is emphasized that layers  38 ,  40  may not be formed from a sintered material in further embodiments of microelectronic module  10 . 
     Sintered bond layers  16 ,  38 ,  40  are produced from a sinter precursor material, which is densified into a substantially coherent mass or layer during a low temperature sintering process. The particular composition of sintered bond layers  16 ,  38 ,  40  will vary amongst embodiments, depending upon the initial formulation of the sinter precursor material and the parameters of the sintering process. Generally, sintered bond layers  16 ,  38 ,  40  may be predominately composed of at least one metal, as considered by weight percentage (wt %). In one embodiment, sintered bond layers  16 ,  38 ,  40  are each predominately composed of Cu, Ag, Au, or a mixture thereof, again as considered by weight. Sintered bond layers  16 ,  38 ,  40  may or may not contain organic materials. In certain implementations, sintered bond layers  16 ,  38 ,  40  may be essentially free of organic materials; the term “essentially free,” as appearing herein, defined as containing less than 1 wt % of organic materials. In other embodiments, sintered bond layers  16 ,  38 ,  40  may contain selected organic materials or fillers to tailor the properties of layers  16 ,  83 ,  40 . For example, in certain instances, sintered bond layers  16 ,  38 ,  40  may contain an epoxy or another organic material. In one implementation, at least sintered bond layer  16  and, possibly, all sintered bond layers  16 ,  38 ,  40  are composed of a sintered metal (e.g., Ag) material having a thermal conductivity exceeding 50 W/mK and, perhaps, a thermal conductivity equal to or exceeding about 70 W/mK. 
     To produce sintered bond layers  16 ,  38 ,  40 , a sinter precursor material is applied to one or more surfaces of module  10  during module fabrication. With respect to substrate-embedded sintered bond layer  16 , in particular, the sinter precursor material may be applied to an outer peripheral portion of high TC slug  14  or to the underside of inner ledge  24  of module substrate  12 . With respect to sintered bond layer  38 , the sinter precursor material may be applied to high TC slug  14  or to the underside of microelectronic device  28 . In one approach, and as indicated above, the sinter precursor material is applied in a patterned layer over the upper surface of high TC slug  14  to form bodies of sinter precursor material that are subsequently transformed into sintered bond layers  16 ,  38  during the below-described sintering process. Lastly, with respect to sinter bond layer  40 , the sinter precursor material may be applied to the underside of module substrate  12 , to the underside of high TC slug  14 , and/or to the upper surface of heatsink  18  prior to positioning substrate  12  and slug  14  over heatsink  18 . 
     The sinter precursor material can be applied in various different manners including both wet state and dry state application techniques. Suitable wet state application techniques include, but are not limited to, screen or stencil printing, doctor blading, spraying, dipping, and fine needle dispense techniques. When a wet state application technique is employed, a flowable or wet state coating precursor material is initially obtained by, for example, independent production or purchase from a third party supplier. In addition to metal particles (described below), the wet state coating precursor material contains other ingredients (e.g., a solvent and/or surfactant) to facilitate wet set application, to adjust the viscosity of the precursor material, to prevent premature agglomeration of the metal particles, or to serve other purposes. In one embodiment, the wet state coating precursor material contains metal particles in combination with a binder (e.g., an epoxy), a dispersant, and a thinner or liquid carrier. The volume of solvent or liquid carrier contained within the coating precursor material can be adjusted to tailor of the viscosity of the precursor material to the selected wet state application technique. For example, in embodiments wherein the precursor material is applied by screen printing or doctor blading, the coating precursor material may contain sufficient liquid to create a paste, slurry, or paint. After application of the wet state coating material, a drying process can be carried-out to remove excess liquid from the sinter precursor material, if so desired. 
     In further embodiments, the sinter precursor material can be applied utilizing a dry state application technique. For example, a film transfer process can be employed to apply the precursor material to the appropriate component surfaces. In this regard, a dry film may first be prepared by, for example, initially depositing (e.g., screen printing or otherwise dispensing) one or more sinter precursor material onto a temporary substrate or carrier, such as a plastic (e.g., polyethylene terephthalate) tape backing. The sinter precursor material may be applied to the carrier in a wet, flowable state and then heated or otherwise dried to yield a dry film, which is transferred to the appropriate package component surfaces. Heat, pressure, or both heat and pressure are then applied to adhere the metal particle-containing precursor layer (dry film) to the appropriate component surfaces. The carrier (e.g., tape backing) may then be removed by physical removal (e.g., peeling away) or by dissolution in a chemical solvent. This process may then be repeated to apply additional sinter precursor material to other component surfaces, as appropriate. In still further embodiments, one or more freestanding films may simply be positioned between the microelectronic module components during stacking or build-up (also considered “film transfer” in the context of this document). 
     The metal particles dispersed within the sinter precursor material can have any composition, shape, and size enabling the particles to form a substantially coherent adhesive layer pursuant to the below-described sintering process. In one embodiment, the sinter precursor material contains Au, Ag, or Cu particles, or a mixture thereof. In another embodiment, the metal particles contained within the precursor material consist essentially of Ag or Cu particles. The metal particles contained within the precursor material may or may not be coated with an organic material. For example, in some implementations, the metal particles may be coated with an organic dispersant, which prevents physical contact between the particles to inhibit premature agglomeration or particle sintering. When present, any such organic particle coating may be burned away or thermally decomposed, whether in whole or in part, during the below-described metal sintering process. In still further embodiments, other material systems amenable to low temperature sintering, whether currently known or later developed, may be utilized during the module fabrication process. 
     The metal particles contained within the precursor material can have any shape or combination of shapes including, but not limited to, spherical shapes, oblong shapes, and platelet or laminae shapes. The average dimensions of the metal particles will vary in conjunction with particle shape and process parameters. However, in general, the average maximum dimension of the metal particles (e.g., the diameter of the metal particles when spherical or the major axis of the metal particles when oblong) may be between about 100 microns (μm) and about 10 nanometers (nm) in an embodiment. In other embodiments, the metal particles may have average maximum dimension greater than or less than the aforementioned range. In certain implementations, a mixture of metal particles having average maximum dimensions in both the nanometer and micron range may be present within the precursor material. In other implementations, only nanoparticles (that is, particles having average maximum dimension between 1 and 1000 nm) may be contained within the sinter precursor material. As a specific, albeit non-limiting example, the precursor material may contain at least one of Ag, Au, or Cu nanoparticles or micron-sized particles in an embodiment, with Ag or Cu nanoparticles preferred. 
     As noted above, a low temperature sintering process is performed to produce the desired metal sinter layers after application of the sinter precursor material. The low temperature sintering process can be carried-out under any process conditions suitable for transforming the sinter precursor material into metal sinter layers, noting that some diffusion may occur from the precursor material into contacting components of the microelectronic modules. The sinter bond process thus advantageously forms low stress, mechanically-robust, solid state metallurgical diffusion bonds at the bond joint interfaces. The sintering process may be performed with or without pressure, with or without heating (although some degree of elevated heat will typically be applied), and in any suitable atmosphere (e.g., open air or in the presence of an inert gas, such as nitrogen). As a point of emphasis, the sintering process is carried-out at maximum processing temperatures (T MAX ) less than the melt point of the metal particles contained within the precursor material. Indeed, in many embodiments, T MAX  will be significantly less than the melt point of the metal particles and, perhaps, less than one half the melt point of the particles considered on an absolute temperature scale (in Kelvin). Generally, T MAX  will be greater than room temperature (considered 20° C. herein) and less than 300° C. Comparatively, the melt point of Ag, Au, and Cu particles in a nanometer or micron size range will commonly range between approximately 950° C. to 1100° C. To provide a still further example, T MAX  may be between approximately 170° C. and 300° C. in an embodiment. In still further embodiments, T MAX  may be greater than or less than the aforementioned range, providing that T MAX  (in conjunction with the other process parameters) is sufficient to induce sintering of the metal particles without liquefaction of the metal particles. 
     A multistage heating schedule can be employed during the sintering process. In this case, the multistage heating schedule may entail heating microelectronic module  10 , in a partially fabricated state, to a first temperature (T 1 ) less than T MAX  for a first time period, gradually increasing or ramping-up the temperature process to T MAX , and then maintaining T MAX  for a second time period. A cool down period may follow. In one embodiment, and by way of non-limiting example only, T 1  may range from approximately 100 to 200° C., while T MAX  is greater than T 1  and ranges from approximately 170 to 280° C. As discussed below, the process parameters employed may or may not be controlled to fully decompose any organic material from the sinter precursor material during the sintering process. 
     In at least some implementations of the microelectronic module fabrication method, a controlled convergent pressure or compressive force is applied across the partially-fabricated microelectronic modules during the sintering process. When applied, the convergent pressure can be delivered as a substantially constant force or, instead, varied in accordance with a time-based or temperature-based schedule. Any suitable mechanism can be utilized to apply the desired convergent pressure including bulk weights, resilient bias devices (e.g., spring-loaded plungers or pins), clamps, hydraulic presses, and the like. The pressure applied may be selected based upon various factors including the desired final thickness of the metal sinter layers, the desired porosity of the metal sinter layers, and the composition of the sinter precursor material. In one embodiment, and by way of non-limiting example only, a maximum pressure (P MAX ) ranging between about 0.5 and about 20 megapascal (Mpa) is applied during the sintering process. In other embodiments, P MAX  may be greater than or less than the aforementioned range, if pressure is applied during the sintering process. 
     As previously indicated, the sintered bond layers (e.g., bond layers  16 ,  38 ,  40  shown in  FIGS. 1 and 2 ) produced pursuant to the above-described metal sintering process may be composed predominately of one or more sintered metals. Again, the metal sinter layers may or may not contain organic materials. In one embodiment, the metal sinter layers consist essentially of one or more metals (e.g., essentially pure Cu or essentially pure Ag) and are essentially free of organic material (that is, contain less than 1 wt % of organic materials). In other embodiments, the metal sinter layers may contain resin or other organic fillers. For example, in another implementation, the metal sinter layers may contain organic materials that increase pliability, such as an epoxy, to reduce the likelihood of crack formation and propagation across thermal cycles. Depending upon the desired final composition of the metal sinter layers, the parameters of the sintering process may be controlled to decompose organic materials from the sinter precursor material, in whole or in part. Additionally, the metal sinter layers may be produced to have a desired porosity, which may range from 0% to 30% by volume in an embodiment. In another embodiment, the metal sinter layers may be formed to each have a porosity of less than 1% by volume. Finally, the thickness of the metal sinter layers will vary amongst embodiments, but may range between about 5 microns and about 100 microns and, preferably, between about 15 microns and about 35 μm in one exemplary and non-limiting implementation. In another embodiment wherein the metal sinter layers are composed of essentially pure Ag or Cu, the metal sinter layers may have a thickness range from about 40 microns to about 100 microns. 
     To provide a more specific, albeit non-limiting example of one manufacturing approach, microelectronic module  10  can be produced in the following manner. Commencing the fabrication process, a first layer of sinter precursor material is applied in a continuous layer across the upper surface of heatsink  18 . The sinter precursor material may be applied in a wet stat as a paint or paint, which is screen printed over the upper surface of heatsink  18 . Alternatively, the sinter precursor material may be applied to the upper surface of heatsink  18  as a dry state (e.g., freestanding) film utilizing a film transfer process of the type described above. High TC slug  14  is then positioned over heatsink  18  utilizing, for example, a pick-and-place tool. A second patterned layer of sinter precursor material is then applied to the upper surface of high TC slug  14  opposite heatsink  18 . Again, a dry state or a wet state application technique can be utilized. In one embodiment, a screen printing process (utilizing a patterned screen) or a fine needle dispense (e.g., utilizing a computer-controller print head) is employed. Module substrate  12  and microelectronic device  28  are then each positioned utilizing a pick-and-place tool. If a first heat treatment process was not already performed to transform the first layer of sinter precursor material into sinter bond layer  40 , a common heat treatment or sintering process may be carried-out transform the first and second layers of sinter precursor material into sintered bond layers  16 ,  38 ,  40 , respectively. Wire bonding may then be carried-out to form wire bonds  34  electrically interconnecting microelectronic device  28  and the routing features of module substrate  12 . Additional process steps may also be performed, as appropriate, to complete fabrication of microelectronic module  10 . 
     In the above-described manner, microelectronic module  10  is produced to include a module substrate (e.g., substrate  12 ) and a sinter-bonded heat dissipation structure (e.g., heat dissipation structure  14 ,  16 ) in a reliable and cost effective manner. In certain embodiments, a common heat treatment process may be utilized to simultaneously transform the selectively-applied sinter precursor material into sintered bond layers  16 ,  38 ,  40 . In contrast to other conventional manufacturing processes, machining of heatsink  18  may be avoided. Furthermore, as the above-described sintering process is carried-out at limited maximum temperatures, issues associated with substrate warpage are alleviated. Packaging manufacturing costs may be reduced as a result. Other advantages may also be achieved by virtue of the above-described manufacturing process and module structure. For example, when utilized in an RF application, the relative positioning of heatsink  18  and microelectronic device  28  (e.g., a semiconductor die carrying RF circuitry) may provide relatively effective RF grounding to reduce losses during module operation. 
     Microelectronic module  10  may include various other structural features in further embodiments. For example, a window frame may be positioned around and a lid may be positioned over substrate  12  to enclose microelectronic device  28  when microelectronic module  10  assumes the form of an air cavity package. Alternatively, an encapsulant body  44  (shown in phantom in  FIG. 1 ) may be formed over substrate  12  and around microelectronic device  28  in an implementation. Microelectronic module  10  may also be produced to include other sintered metal structures, if desired. For example, as further shown in phantom in  FIG. 1 , a sintered metal RF shield layer  46  may be formed over encapsulant body  44  opposite microelectronic device  28 . When present, sintered metal RF shield layer  46  may be formed by depositing a sinter precursor material and then sintering the precursor material in the manner previously described; e.g., in one approach, a mold material is overmolded over substrate  12  and device  28  to form encapsulant body  44 , a layer of sinter precursor material is then applied to the uppermost surface of body  44  as a continuous paste layer or transferred film, and a sintering process is then carried-out to transform the layer of sinter precursor material to RF shield layer  46 . 
     Embodiments of a high thermal performance microelectronic module including a sintered heat dissipation structure have thus been described, along with embodiments of a method for producing such a microelectronic module. As noted above, the sintered heat dissipation structure may be embedded in a PCB, a coreless substrate, or other module substrate and may promote conductive heat flow away from one or more heat-generating microelectronic devices (e.g., semiconductor die) supported by the module substrate. The sintered heat transfer structure may conduct heat to a convectively-cooled heatsink, such as a metal plate or pin fin array, further included in the microelectronic module. In embodiments, the sintered heat dissipation structure may consist essentially of a sintered metal body, which is formed in a cavity provided in the module substrate. Alternatively, the sintered heat transfer structure may further include a dedicated thermal conduit or heat spreader positioned in the cavity and bonded to the module substrate by the sintered metal body. In the above-described example, a thermally-conductive piece or part (e.g., high thermal conductivity slug  14 ) is utilized for this purpose. In further embodiments, the sintered heat dissipation structure may contain one or more elongated heat pipes, which are suspended within a substrate cavity by the sintered material. An exemplary embodiment of a microelectronic module including a sintered heat dissipation structure, which contains one or more dedicated thermal conduits in the form of elongated heat pipes, will now be described in conjunction with  FIGS. 3 and 4 . 
       FIGS. 3 and 4  are simplified cross-sectional and isometric views, respectively, of a microelectronic module  50  containing a substrate-embedded, sinter-bonded heat dissipation structure  52 , as illustrated in accordance with a further exemplary embodiment of the present disclosure. In this embodiment, microelectronic module  50  includes a module substrate  54  having an upper patterned metal layer  56  (shown in  FIG. 3  only). As was the case previously, module substrate  54  can assume the form of a single layer or multilayer PCB, coreless substrate, a substrate including RDLs built-up over a molded body produced utilizing a panelization process, or another type of substrate containing or lacking routing features. Sinter-bonded heat dissipation structure  62  is embedded within module substrate  54  and, specifically, is located within a cavity  60  is provided through a central portion of substrate  54 . Sinter-bonded heat dissipation structure  52  supports a microelectronic device  62  (e.g., a semiconductor die) and a heatsink  64  (e.g., a pin-fin array). As shown in  FIG. 4 , microelectronic device  62  and heatsink  64  are positioned in a side-by-side relationship and laterally spaced along the Y-axis identified by coordinate legend  67 . Cavity  60  and sinter-bonded heat dissipation structure  62  are likewise elongated along the Y-axis. Heat dissipation structure  52  thus includes first and second opposing end portions underlying microelectronic device  62  and heatsink  64 , respectively. 
     Sinter-bonded heat dissipation structure  52  contains a sintered metal body  66 , which is shown in cross-section in  FIG. 3  and in cutaway in  FIG. 4 . Sintered metal body  66  is bonded to the interior surfaces of module substrate  54  defining substrate cavity  60 , which may be metallized (e.g., plated with copper or another metal) to promote bonding, as indicated in  FIG. 3  by graphics  68 . In one implementation, sintered metal body  66  may fill cavity  60  in its substantial entirety such that heat dissipation structure  62  consists essentially of sintered metal body  66 . Alternatively, heat dissipation structure  62  may include one or more dedicated thermal conduits, which are bonded to module substrate  54  by sintered metal body  66  and, perhaps, embedded or buried within body  66 . For example, as indicated in  FIGS. 3 and 4 , one or more elongated heat pipes  70  may be embedded within sintered metal body  66  and may extend along at least the majority of the length of cavity  60 . Heat pipes  70  may each assume the form of a hermetically-enclosed pipe or blind tube containing a working fluid (e.g., an ammonia, alcohol, and/or water mixture), which transfers heat from one end of the tube to the other in a thermally efficient manner. The fluid within the heat pipe undergoes a phase change and, specifically, may absorb latent heat and vaporize at the hot interface of the heat pipe (e.g., a first closed end); the vapor phase then flows to the cool interface of the heat pipe (e.g., an opposing closed end) and condenses thereby releasing latent heat; and the liquid phase then returns to the hot interface to complete the heat transfer circuit. As indicated in  FIG. 3 , heat pipes  70  may contain or be internally lined with a wicking material  72 , which promotes flow of the liquid phase from the cold interface to the hot interface via capillary action. Although by no means limited to a particular shape or material, the shell  74  of each heat pipe  70  may assume the form of an elongated, blind tube fabricated from a highly conductive metal or alloy, such as Cu or Al. 
     By way of non-limiting example, microelectronic module  50  may be produced as follows. First, heat pipes  70  and a sinter precursor material are positioned in substrate cavity  60 . In certain embodiments, heat pipes  70  may be first be positioned within substrate cavity  60  and then a wet state sinter precursor material, such as a metal particle-containing paste, may then be dispended into cavity  60  to fill the remaining free space or voids between heat pipe  70  and the interior surfaces of module substrate  54  defining cavity  60 . In other embodiments, heat pipes  70  may be initially embedded in a sinter precursor material (e.g., a powdered sinter precursor material may be pressed around pipes  70 ) such that the precursor material and heat pipes  70  are jointly positioned in cavity  60 . In certain embodiments, the sinter process may then be carried-out to transform the sinter precursor material into metal sinter body  66  and thereby yield substrate-embedded, sinter-bonded heat dissipation structure  52 . In this case, microelectronic device  62  and heatsink  64  may be subsequently attached to opposing end portions of heat dissipation structure  52 . However, for reasons of process efficiency, it may be desirable to seat microelectronic device  62  and/or heatsink  64  on the sinter precursor material prior to sintering. The sintering process may then be carried-out to form sintered metal body  66 , while concurrently bonding microelectronic device  62  and/or heat sink  64  to module substrate  54  through metal body  66 . Additional steps may then be performed to complete fabrication of microelectronic module  50 , as appropriate, including the formation of electrical interconnections between device  62  and corresponding routing features within module  50 ; e.g., non-illustrated traces formed over substrate  54 . 
     There has thus been described another exemplary embodiment of a microelectronic module containing a substrate-embedded, sinter bonded heat dissipation structure. In the above-described embodiment, heat transfer from a heat-generating microelectronic device (e.g., a semiconductor die) to a heatsink is enhanced by forming the heat dissipation structure to include one or more dedicated thermal conduits at least partially embedded in a sintered metal body. The thermal conduit or conduits can be elongated strips or rods of a material having a relatively high thermal conductivity, a wire braid or mesh, or the like. Alternatively, the thermal conduit or conduits can be elongated heat pipes, in which case the microelectronic device and the heatsink may be positioned over or adjacent opposing ends of the heat pipes. The thermal conduit or conduits may be positioned within the substrate cavity along with sinter precursor material during fabrication of the module. In one approach, a metal particle-containing paste over and around the thermal conduit to fill, at least in substantial part, one or more voids between the thermal conduit(s) and sidewalls of the substrate defining the substrate opening. A sintering process may then be carried-out to transform the sinter precursor material into a sintered metal body bonding the thermal conduit(s) to the module substrate. By virtue of this and the other process steps described above, a microelectronic module may be produced to include a substrate-embedded, sinter bonded heat dissipation structure, which may significantly enhance the heat dissipation capabilities of the resulting module. In still further embodiments, the sinter bonded heat dissipation structure may perform other functions and/or the resulting module may be bonded to a second module in a stacked configuration. Additional description in this regard will now be provided in conjunction with  FIG. 5 . 
       FIG. 5  is a simplified cross-sectional view of microelectronic module  50  ( FIGS. 3 and 4 ), as inverted and bonded to a second microelectronic module  80  by a sintered ground plane  82 , as illustrated in accordance with a still further exemplary embodiment of the present disclosure. Microelectronic module  80  contains a module substrate  84 , such as a PCB or coreless substrate, having a number of openings or cavities therein. Each substrate cavity is filled with a sintered material to form a plurality of sinter-filled via  86 ,  88 ,  90 . Microelectronic module  80  further contains three microelectronic devices: (i) a first die  92  having a Ball Grid Array (BGA)  94 , (ii) a second die  96  having a BGA  98 , and (iii) an SMD  100  stacked onto first die  92 . First die  92  is electrically coupled to sintered ground plane  82  through BGA  94  and sinter-filled via  86 . Second die  96  is electrically coupled to sintered ground plane  82  through BGA  98  and through sinter-filled via  86 . Additionally, one or more wire bonds  104  electrically couple die  94  to sintered ground plane  82  through sinter-filled via  90 . Interconnections between first die  92 , second die  96 , and SMD  100  may be formed utilizing RDL structures containing deposited interconnect lines; through wire bonds, such as wire bond  102  shown between die  92 ,  96 ; or in another manner. In certain embodiments, microelectronic device  62  carried by module  50  may also be electrically coupled to ground plane  82  through sintered metal body  66  of heat dissipation structure  52 . Sintered ground plane  82  may thus serve the dual purpose of bonding microelectronic modules  50 ,  80 , as well as providing a common ground plane to which devices carried by both modules  50 ,  80  are electrically connected. Additionally, in a general sense, sintered ground plane  82  may also serve as a heatsink, while sinter-filled via  86 ,  88  serve as embedded heat dissipation structures providing efficient conductive heat transfer paths from die  92 ,  96  to ground plane  82 , respectively. 
     Microelectronic module  80  ( FIG. 5 ) may be fabricated utilizing processes similar to those described above. With respect to sinter-filled vas  86 ,  88 ,  90 , in particular, a sinter precursor material can be applied into the openings or cavities provided through module substrate  84  utilizing a dry or wet state application technique; e.g., a metal particle-containing paste may be dispensed into the substrate cavities by computer-controlled fine needle dispense or by silkscreen application. A low temperature sintering process may then be carried-out to transform the sinter precursor material into sintered metal bodies occupying the cavities and thereby yield sinter-filled via  86 ,  88 ,  90 . Microelectronic die  92 ,  96  may be bonded to sintered-filled vias  86 ,  88  after or concurrent with sintering. In one embodiment, microelectronic die  92 ,  96  are seated on the deposited sinter precursor material prior to sintering such that the sintering process is leveraged to simultaneous form sinter-filled via  86 ,  88 ,  90  and attach die  92 ,  96  for increased process efficiency. SMD  100  (and possible other microelectronic devices not seen in the cross-sectional view of FIG.  5 ) may then positioned utilizing a pick-and-place tool. Die  92 ,  96 , SMD  100 , and any other microelectronic devices included in module  80  may be subsequently interconnected by, for example, wire bonding. Microelectronic module  80 , now in a completed or near completed state, may be bonded to module  50  by formation of sintered ground plane  82 . Sintered ground plane  82  may be formed by applying a layer of sinter precursor material (e.g., as a continuous paste layer or film) to the backside surface of microelectronic module  50  or microelectronic module  80 ; positioning modules  50 ,  80  in a back-to-back relationship; and then carrying-out a sintering process via application of heat and/or convergent pressure. In further embodiments, sintered ground plane  82  may be formed prior to completion of microelectronic module  50  or microelectronic module  80  such that one module may serve as a substrate over which the other module is fabricated. 
       FIG. 6  is a cross-sectional view of a microelectronic module  110 , as illustrated in accordance with another exemplary embodiment of the present disclosure. In many respects, microelectronic module  110  is similar to microelectronic module  10  described above in conjunction with  FIGS. 1 and 2 . For example, microelectronic module  110  includes a module substrate  112  having an upper surface  114  and an opposing lower surface  116 . Substrate  112  can be, for example, an PCB, a coreless substrate, or a cored substrate predominately composed of organic materials, by volume. A central cavity  118  is provided in module substrate  112  and exposed through lower surface  116 . As was previously the case, cavity  118  has a stepped cross-sectional geometry defining an inner peripheral shelf or ledge  120 , as considered in a cross-section plane extending orthogonal to upper surface  114 . A sinter-bonded heat dissipation structure  122 ,  124  is embedded within cavity  118  and contains a thermally-conductive body or high TC slug  122  at least partially buried within a sintered metal body  124 . Sintered metal body  124  includes an intermediate portion  124 ( b ), which bonds high TC slug  122  to the interior surfaces of module substrate  112 . Selected surfaces  134  of module substrate  112  defining cavity  118  may be metalized to promote metallurgical bonding between substrate  112  and sintered metal body  124 . Sintered metal body  124  also includes an upper portion  124 ( a ), which bonds a microelectronic device  126  to substrate  112  through heat dissipation structure  122 ,  124 . Finally, sintered metal body also includes a lower portion  124 ( c ) bonding substrate  112  to a heatsink  132 . In further embodiments, heatsink  132  may be replaced by different structure or device, such as a second module. If desired, lower portion  124 ( c ) of sintered metal body  124  may not extend to the edges of module  110  to provide unfilled air gaps  136  between module substrate  112  and heatsink  132 , which may increase the convectively-cooled surface area of heatsink  132  and/or may prevent bridging of any electrical features present on lower surface  116  of substrate  112 . 
     As noted above, sintered metal body  124  bonds or attaches microelectronic device  126  to module substrate  112 . Microelectronic device  126  can be, for example, a semiconductor die having bond pads  138 , which are electrically interconnected with an upper wiring layer or patterned metal layer  128  provided on substrate  112  utilizing wire bonds  130  or another interconnect approach. As is the case with microelectronic module  10  shown in  FIGS. 1 and 2 , microelectronic device  126  overlies high TC slug  122 , as taken along a centerline  140  of microelectronic module  110 . Centerline  140  also intersects both device  126  and slug  122 . Sintered metal body  124  and high TC slug  122  each have a thermal conductivity exceeding that of module substrate  112  and collectively provide a highly robust and direct heat transfer path extending from the underside of microelectronic device  126 , through upper portion  124 ( a ) of sintered metal body  124 , through high TC slug  122 , through lower portion  124 ( c ) of sintered metal body  124 , and to heatsink  132 . As a compared to microelectronic module  10  ( FIGS. 1 and 2 ), high TC slug  122  has a more complex cross-sectional shape, which increases in width (defined as a dimension perpendicular to centerline  140 ) with increasing proximity to heatsink  132  and lower surface  116  of module substrate  112 , as considered in cross-section plane taken through slug  122 . Specifically, in the exemplary embodiment shown in  FIG. 6 , high TC slug  122  is produced to have a stepped geometry, which generally corresponds with or conforms with the internal geometry of stepped cavity  118 . By imparting high TC slug  122  with such a geometry, high TC slug  122  may better spread heat conducted away from device  126  over an upper central portion of heatsink  132 . Additionally, such a geometry may increase the cumulative surface area of high TC slug  122  available for bonding. In further embodiments, high TC slug  122  may have a different shape that likewise increases in width with increasing proximity to heatsink  132 , such as a trapezoidal cross-sectional geometry. 
     By way of non-limiting example, one fabrication approach suitable for producing microelectronic module  110  may be carried-out as follows. First, module substrate  112  may be obtained, while interconnected with a number of other substrates in panel form. A number of high thermal conductivity slugs, including high TC slug  122 , may be positioned within cavity  118  provided in substrate  112  ( FIG. 6 ) and similar cavities provided in the other non-illustrated substrates. In conjunction with or prior to positioning high TC slug  122  in cavity  118 , sinter precursor material may be applied to slug  122  and/or to the interior surfaces of cavity  118  utilizing one or more of the above-described application techniques. The sinter precursor material may be applied to form all portions  124 ( a )-( c ) of sintered metal body  124  when sintered or, instead, portions  124 ( a )-( c ) may be applied in different stages or at different steps of the fabrication process. In one embodiment, sinter precursor material is applied to form portion  124 ( b ) of sintered metal body  124 , low temperature sintering is carried-out to attach high TC slug  122  to module substrate  112 , and panel singulation is then performed (e.g., via sawing, laser cutting, scribing with punching, or the like) to separate substrate  112  from the other non-illustrated substrates. Sinter precursor material corresponding to lower portion  124 ( c ) of sintered metal body  124  may then be applied, substrate  112  and heatsink  132  may be brought in contact, and a second low temperature sintering process may then be carried-out. Finally, die attach may be performed to mount device  126  over high TC slug  122  by applying sinter precursor material to an upper surface of slug  122 , positioning device  126 , and then carrying-out a third low temperature sintering process. Various additional steps may then be performed (e.g., ball bonding to form wire bonds  130 ) to complete fabrication of microelectronic module  110 . 
     In other implementations of the fabrication process utilized to produce microelectronic module  110  ( FIG. 6 ), process efficiency may be boosted by applying and/or thermally processing two or more portions  124 ( a )-( c ) of sintered metal body  124  in a single step. In either case, the low temperature sintering process is preferably characterized by a maximum process temperature between 175° C. and 300° C. and, more preferably, between 200° C. and 250° C. in an embodiment. In further embodiments, the maximum process temperature during the sintering process may be greater than or less than the aforementioned ranges. Additionally, while shown as containing only wire bonds  130  in the embodiment of  FIG. 6 , it will be appreciated that microelectronic module  110  can be produced to include various other types of interconnect structures (e.g., plated metal lines) in addition to or in lieu of wire bonds  130  in further embodiments. Generally, then, it should be understood that module  110  and the other microelectronic modules described herein can contain any type and combination of electrically-conductive routing features providing the desired electrical interconnections between the microelectronic device or devices contained within the microelectronic module (e.g., device  126  contained in module  110 ), the other electrically-conductive routing features (e.g., wiring layers  128  of module  110 ), and any input/output structure (e.g., a ball grid array, a pin grid array, leads, or the like) that may be further included in embodiments of the above-described microelectronic modules. 
     There has thus been provided cost efficient manufacturing processes for producing high thermal performance microelectronic modules including sintered metal structures. In embodiments, the microelectronic module includes at least one sinter-bonded heat dissipation structure embedded within a module substrate, such as a PCB, a coreless substrate, a substrate containing an RDL structure, or another substrate including or lacking routing features. During modulate operation, the sinter-bonded heat dissipation structure promotes conductive heat flow away from one or more heat-generating microelectronic devices (e.g., semiconductor die) supported by the substrate. The sinter-bonded heat dissipation structure contains a sintered metal body, which at least partially fills a cavity provided in the substrate. In certain embodiments, the sinter-bonded heat dissipation structure may consist, in its entirety or substantial entirety, of the sintered metal body. In other embodiments, the sinter-bonded heat dissipation structure may further include a thermally-conductive body, such as a metal (e.g., Cu) slug or a heat pipe, bonded to the substrate by the sintered metal body. During module operation, the sinter-bonded heat dissipation structure may conduct heat to a convectively-cooled heatsink, such as a metal plate or pin fin array, further included in the microelectronic module. The heatsink can be attached to the substrate opposite the microelectronic device (or devices) supported by the substrate, bonded to the substrate in a side-by-side relationship with the microelectronic device supported by the substrate, or otherwise positioned in the microelectronic module. The thermal performance of the microelectronic module may be appreciably enhanced through the provision of such a heatsink and substrate-embedded, sinter-bonded heat dissipation structure. Additionally, in some implementations, the sinter-bonded heat dissipation structure may also serve as an electrically-active structure, such as a conducive via providing signal or power transfer to the substrate and, perhaps, to different wiring layers contained within the substrate. 
     As indicated above, the sintered heat dissipation structure may contain or may consist essentially of a sintered metal body. In an embodiment, the sintered metal body is formed by first applying a sinter precursor material to selected regions of microelectronic module and into the substrate cavity. The sinter precursor material is then transformed into the sinter material utilizing a low temperature sintering process, which is carried-out at limited maximum processing temperatures (e.g., maximum processing temperatures less than 300° C.) through the application of elevated heat, controlled convergent pressures, or both heat and convergent pressures. Prior to sintering, the sinter precursor material may be applied to selected regions of the microelectronic module by, for example, thin film transfer, screen printing, or utilizing another application technique. The sinter precursor material contains one or more types of metal particles, such as Ag, Cu, or Au metal particles, which are bonded and densified during the sintering process. The resulting sintered metal body can be produced with little to no voiding, with a controlled porosity, and to include or lack organic materials. In an embodiment, the sintered metal body is predominately composed of and perhaps consist essentially of a metallic material, such as a sintered silver; and/or has a thermal conductivity exceeding 50 W/mK. As the sintering process is carried-out at relatively low temperatures, material constraints placed on the package components are eased and the above-described issues associated with high temperature processing (e.g., substrate warpage) are mitigated. Production costs may be favorably lowered as a result. Additional sintered metal structures or layers may also be produced utilizing a similar approach. For example, in certain embodiments, a sintered RF shield structures may be formed. In one embodiment, the microelectronic module may include two sub-modules bonded in a stacked or vertically-integrated relationship by a sinter bond layer, which can potentially be leveraged for usage as a ground plane, if so desired. 
     In one implementation, the above-described module fabrication method includes the step or process of embedding a sinter-bonded heat dissipation structure in a module substrate at least in by: (i) applying a sinter precursor material containing metal particles into a cavity provided in the module substrate, and (ii) sintering the sinter precursor material at a maximum processing temperature less than a melt point of the metal particles to produce a sintered metal body bonded to the module substrate. A microelectronic device and a heatsink are then attached to the module substrate before, after, or concurrent with sintering such that the heatsink is thermally coupled to the microelectronic device through the sinter-bonded heat dissipation structure; e.g., the most direct and efficient thermal conduction path between the device and the heat sink may be through the heat dissipation structure. In certain embodiments, the microelectronic device may be bonded to the module substrate at a location overlying the thermally-conductive structure, as taken along an axis substantially orthogonal to an upper principal surface of the module substrate. In such embodiments, the microelectronic device may be placed in contact with the sinter precursor material such that, after sintering of the sinter precursor material, the sintered metal body bonds the microelectronic device to the module substrate. 
     In another embodiment, the method includes the step or process of positioning a microelectronic device over a module substrate having a cavity therein. Prior to positioning the microelectronic device over the module substrate, a sinter precursor material containing metal particles is applied to selected regions of the module substrate and into the cavity. The sinter precursor material is then sintered at a maximum processing temperature less than a melt point of the metal particles to produce a sintered metal body at least partially filling the cavity and bonding the microelectronic device to the module substrate. A heatsink is bonded to the module substrate at a location thermally contacting the sintered metal body before, after, or concurrent with sintering. In embodiments, sintering may entail forming the sintered metal body to bond both the heatsink and the microelectronic device to the module substrate. The heatsink and the microelectronic device may be positioned in side-by-side relationship such that the heatsink overlies a first end portion of the sintered metal body (taken along an axis substantially orthogonal to an upper principal surface of the module substrate), while the microelectronic device overlies a second opposing end portion of the sintered metal body. In certain implementations, a metal particle-containing paste may be dispensed over and around the thermally-conductive structure to fill, at least in substantial part, one or more voids between the thermally-conductive structure and sidewalls of the module substrate defining the opening. If desired, and as previously noted, the sidewalls of the substrate may be plated with, for example, a Cu, Ag, or Au layer to promote the formation of a robust metallurgical joint at the sintered body-substrate interfaces. 
     In a still further embodiment, the method includes positioning a microelectronic device over a module substrate having a cavity therein. A sinter precursor material containing metal particles is applied to selected regions of the module substrate and into the cavity prior to positioning the microelectronic device over the module substrate. The sinter precursor material is then sintered at a maximum processing temperature less than a melt point of the metal particles to produce a sintered metal body at least partially filling the cavity and bonding the microelectronic device to the module substrate. A sintered ground plane is formed on the module substrate opposite the microelectronic device. The microelectronic device is electrically coupled to the ground plane through the sintered metal body. 
     In a yet further embodiment, the method includes positioning a thermal conduit in a cavity provided in a substrate. The thermal conduit can be, for example, a block of thermally-conductive material or a heat pipe. A sinter precursor material containing metal particles is applied into the cavity such that the sinter precursor material at least partially filling voids between substrate and the thermal conduit. The sinter precursor material is then sintered at a maximum processing temperature less than a melt point of the metal particles to produce a sintered metal body bonding the thermal conduit to the substrate. A microelectronic device and a heatsink are attached to the substrate before, after, or concurrent with sintering such that the heatsink and the microelectronic device are thermally coupled through the thermal conduit. 
     Embodiments of a microelectronic module have also been provided. In one embodiment, the microelectronic module includes a module substrate having a cavity and a first (e.g., upper) principal surface. A sinter-bonded heat dissipation structure embedded in the module substrate and at least partially fills the cavity. A heatsink and a microelectronic device (e.g., a semiconductor die) are positioned over the sinter-bonded heat dissipation structure, as taken along an axis orthogonal to the first principal surface. The microelectronic device is thermally coupled to the heatsink through the sinter-bonded heat dissipation structure; e.g., the most direct and efficient heat transfer path from the device to the heatsink may pass through the heat dissipation structure. In certain embodiments, the sinter-bonded heat dissipation structure may include a sintered metal body bonded to the module substrate and an elongated thermal conduit, such as a heat pipe, buried in the sintered metal body. The elongated thermal conduit may have a first end portion underlying the microelectronic device, as well as a second end portion underlying the heatsink. In another embodiment wherein the module substrate includes a second (e.g., lower) principal surface opposite the first principal surface, the microelectronic module may further contain a sintered ground plane formed over the second principal surface. The microelectronic device may be electrically coupled to the sintered ground plane, possibly through the sinter-bonded heat dissipation structure. 
     While at least one exemplary embodiment has been presented in the foregoing Detailed Description, it should be appreciated that a vast number of variations exist. It should also be appreciated that the exemplary embodiment or exemplary embodiments are only examples, and are not intended to limit the scope, applicability, or configuration of the invention in any way. Rather, the foregoing Detailed Description will provide those skilled in the art with a convenient road map for implementing an exemplary embodiment of the invention. It being understood that various changes may be made in the function and arrangement of elements described in an exemplary embodiment without departing from the scope of the invention as set forth in the appended claims. 
     As appearing in the foregoing Detailed Description, terms such as “comprise,” “include,” “have,” and the like are intended to cover non-exclusive inclusions, such that a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to those elements, but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. As still further appearing herein, terms such as “over,” “under,” “on,” and the like are utilized to indicate relative position between two structural elements or layers and not necessarily to denote physical contact between structural elements or layers. Thus, a first structure or layer can be described as fabricated “over” or “on” a second structure, layer, or substrate without indicating that the first structure or layer necessarily contacts the second structure, layer, or substrate due to, for example, presence of one or more intervening layers. As appearing further herein, the term “microelectronic device” is utilized in a broad sense to refer to an electronic device, element, or structure produced on a relatively small scale and amenable to packaging in the above-described manner. Microelectronic devices include, but are not limited to, integrated circuits formed on semiconductor die, MEMS devices, passive electronic microelectronic components, optical devices, and other small scale electronic devices capable of providing processing, memory, sensing, radiofrequency, optical, and actuator functionalities, to list but a few examples.