Patent Publication Number: US-10320337-B2

Title: Fully-differential operational amplifier system

Description:
CROSS-REFERENCE TO RELATED PATENT APPLICATIONS 
     This application claims the benefit of priority of U.S. Provisional Patent Application No. 62/381,209 to Xin Zhao et al. filed Aug. 30, 2016 and entitled “Fully Differential Operational Amplifier Input Common Mode Control Technique,” which is incorporated herein by reference. 
    
    
     FIELD OF THE DISCLOSURE 
     The instant disclosure relates to electronic devices. More specifically, portions of this disclosure relate to operational amplifiers. 
     BACKGROUND 
     Fully-differential amplifiers suitable for use as operational amplifiers (“op-amps”) are one of the main building blocks in analog circuit design. Op-amps are used in many applications, such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), voltage reference generators, and sample-and-hold circuits. One example op-amp configuration from the prior art is shown in  FIG. 1 . Input signals  102  and  104  to op-amp  101  and output signals  106  and  108  from op-amp  101  may each include both a differential and a common mode (CM) signal. Op-amp  101  has a closed-loop structure, such that output signals  106  and  108  are related to the input signals  102  and  104 . The common-mode (CM) voltage of the output signals  106  and  108  are set by a constant reference voltage V CM     —ref    applied as a common mode reference input signal  110 . A common-mode variation at the input signals  102  and  104  is replicated as the common-mode input of the op-amp  101 . This variation can degrade the performance in some applications, such as by reducing linearity of the op-amp  101 . Some conventional solutions to this variation are described with reference to  FIG. 2  and  FIG. 3 . 
       FIG. 2  is a circuit in accordance with prior art U.S. Pat. No. 6,603,356. The fully differential op-amp  101  of  FIG. 1  is substituted with two differential-input single-ended output op-amps  201  and  202 . The non-inverting input of the op-amps  201  and  202  are connected to a constant common-mode (CM) voltage V cm . The V cm  signal maintains the input common-mode at a constant level to reduce the variation mentioned above. However, this conventional solution has at least two drawbacks. A first drawback is the use of two op-amps  201  and  202  that results in at least 3 dB additional noise compared to use of the single op-amp  101  of  FIG. 1 . A second drawback of this architecture is that by replacing one op-amp  101  with two op-amps  201  and  202 , the total power and area consumption of the chip is larger. 
       FIG. 3  is a circuit of another conventional solution to the variation described above. A circuit  300  includes an input common-mode node that is sensed by DAC  302 . The detected common-mode at the DAC  302  input is compensated by outputting signals to op-amp  301  from current sources embedded inside the DAC  302 . One drawback of the circuit  300  is additional noise introduced by digital-to-analog converter (DAC)  302 . 
     Shortcomings mentioned here are only representative and are included simply to highlight that a need exists for improved electrical components, particularly for operational amplifiers (or “op-amps”) employed in consumer-level devices, such as mobile phones. Embodiments described herein address certain shortcomings but not necessarily each and every one described here or known in the art. Furthermore, embodiments described herein may present other benefits than, and be used in other applications than, those of the shortcomings described above. 
     SUMMARY 
     A dynamic common reference input (CMRI) signal may be provided to an op-amp in an amplifier system to improve operation of the amplifier system, a circuit coupled to the input of the amplifier system, and/or a circuit coupled to an output of the amplifier system. The improvement may reduce the common mode ripple of a fully-differential op-amp such that no noise or minimal noise is added to the amplifier system. Furthermore, the use of a dynamic CMRI signal adds little power consumption and area cost compared to the example prior art solutions described above. An amplifier system with the dynamic CMRI may be used in amplifier systems with multiple input signals. The dynamic CMRI voltage signal may be generated by a dynamic CMRI generation block configured to dynamically generate the CMRI voltage for the first operational amplifier. One example of a dynamic CMRI generation block is a circuit functioning as a signal dependent common-mode generator (SDCG). A dynamic CMRI generation block may also be software executing on digital logic circuit coupled to a digital-to-analog converter (DAC) for generating the dynamic CMRI voltage signal. 
     One example amplifier system is a fully-differential amplifier system having two system input nodes and two system output nodes. Such an amplifier system may include an operational amplifier (sometimes referred to as a “primary op-amp”) with a common-mode reference input (CMRI), wherein the operational amplifier comprises two amplifier input nodes coupled to the two system input nodes and two amplifier output nodes coupled to the two system output nodes. The first operational amplifier is configured to adjust a common mode component of the output signal to approximately equal a dynamic CMRI signal, such as a voltage signal, received at its common-mode reference input (CMRI). Impedances, such as resistor or varistors, may be coupled between the two system input nodes and the two amplifier input nodes as input impedances. Impedances may also be coupled between the two system output nodes and the two amplifier input nodes as feedback impedances. A signal dependent common-mode generator (SDCG) coupled between the two input nodes and the CMRI may be configured to generate a dynamic CMRI signal such that a common-mode component of the two amplifier input nodes is made approximately independent of the two input signals received at the two system input nodes. The SDCG is one example circuit for generating the dynamic CMRI signal described above for improving the operation of the amplifier system. Although example SDGCs are described as operating with the primary op-amp of the amplifier system, the SDGC may be used in an amplifier system with multiple op-amps, wherein the multiple op-amps operate as the “primary op-amp.” 
     The SDCG may include an operational amplifier (or “op-amp”) configured to generate the dynamic CMRI signal. One example SDCG may include an op-amp, two input impedances coupled between an input node of op-amp and the two system input nodes, and two feedback impedances coupled between the input node of the op-amp and an output of the op-amp. The input and feedback impedances of the SDCG may be set at a ratio of the impedances coupled to the primary operational amplifier of the amplifier system. In some embodiments, the SDCG impedances may be between approximately 8 and 20 times higher than the impedances around the primary op-amp. In some embodiments, the SDCG impedances may be variable impedances, such as varistors, that are adjusted during operation of the amplifier system to control the CMRI signal provided to the primary op-amp such that a common-mode component of the primary op-amp inputs is made approximately independent of the inputs to the amplifier system. In some embodiments, the variable impedances may be adjusted based, in part or in whole, on a combination of operating condition and desired quality for the amplifier system. 
     The dynamic CMRI signal described herein may be used to improve amplifier system. One example amplifier system that may benefit from the dynamic CMRI signal is a class-D amplifier. The primary op-amp of the amplifier system described above may be a first integrator of a class-D amplifier. A class-D amplifier is an amplifier that uses transistors as switches modulating between two discrete states to amplify signals, such as audio signals. Class-D amplifiers may be used in mobile phones, hearing aids, powered speakers, home theatre equipment, musical instrument amplifiers, and other amplifier systems. The class-D amplifier may also include, for example, a second integrator coupled to the first integrator, a pulse width modulation (PWM) modulator coupled to the second integrator, and an H-bridge driver coupled to the PWM modulator. In some embodiments, input nodes of the class-D amplifier may be coupled to an output of the PWM modulator. 
     Electronic devices incorporating amplifier systems having a dynamic CMRI signal described above may benefit from improved performance, such as reduced common-mode ripple, in components of integrated circuits in the electronic devices. The integrated circuits may include an amplifier systems integrated with or operating in cooperation with, for example, an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and/or a coder/decoder (CODER). For example, a memory may supply digital audio data to a CODEC that decodes audio from the digital audio data, and the CODEC may supply the decoded audio to a DAC and subsequently to an amplifier system having a dynamically-generated CMRI signal. The output of the amplifier system may be headphones or a speaker. Such an amplifier system may be used in electronic devices with audio outputs, such as music players, CD players, DVD players, Blu-ray players, headphones, portable speakers, headsets, mobile phones, tablet computers, personal computers, set-top boxes, digital video recorder (DVR) boxes, home theatre receivers, infotainment systems, automobile audio systems, and the like. The CODEC, DAC, and amplifier system may be integrated into an integrated circuit (IC) such as an audio controller. Although audio functionality is described herein, the amplifier systems described herein may be applied to the amplification of any signal, wherein amplification may include either an increase or decrease in magnitude of an input signal. 
     The foregoing has outlined rather broadly certain features and technical advantages of embodiments of the present invention in order that the detailed description that follows may be better understood. Additional features and advantages will be described hereinafter that form the subject of the claims of the invention. It should be appreciated by those having ordinary skill in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same or similar purposes. It should also be realized by those having ordinary skill in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims. Additional features will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended to limit the present invention. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       For a more complete understanding of the disclosed system and methods, reference is now made to the following descriptions taken in conjunction with the accompanying drawings. 
         FIG. 1  is an amplifier system according to one example in the prior art. 
         FIG. 2  is an amplifier system according to another example in the prior art. 
         FIG. 3  is an amplifier system according to a further example in the prior art. 
         FIG. 4  is an amplifier system with a dynamic common-mode reference input (CMRI) signal generated by a signal-dependent common-mode generator (SDCG) according to some embodiments of the disclosure. 
         FIG. 5  is a flow chart illustrating an example method for operating an amplifier system with a dynamic CMRI signal according to one embodiment of the disclosure. 
         FIG. 6A  is an example signal-dependent common-mode generator (SDCG) using an operational amplifier according to some embodiments of the disclosure. 
         FIG. 6B  is an example signal-dependent common-mode generator (SDCG) using impedances according to some embodiments of the disclosure. 
         FIG. 7  is an example signal-dependent common-mode generator (SDCG) for generating a dynamic CMRI signal according to some embodiments of the disclosure. 
         FIG. 8  is an example class-D amplifier system with a cascade of integrators with a feedforward (CIFF) topology with current source input and a dynamic CMRI signal according to some embodiments of the disclosure. 
         FIG. 9  is an example class-D amplifier system with a cascade of integrators with a feedforward (CIFF) topology with voltage source input and a dynamic CMRI signal according to some embodiments of the disclosure. 
         FIG. 10  is an example class-D amplifier system with a cascade of integrators in feedback (CIFB) topology with current source input and a dynamic CMRI signal according to some embodiments of the disclosure. 
         FIG. 11  is an example class-D amplifier system with a cascade of integrators in feedback (CIFB) topology with voltage source input and a dynamic CMRI signal according to some embodiments of the disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     Embodiments described below provide the processing of signals to generate a common mode reference input (CMRI) signal for an operational amplifier. The CMRI signal may be dynamically-generated such that the CMRI signal is adjusted to maintain a common-mode component of two amplifier input nodes as approximately independent of two input signals received at the amplifier system. The dynamic CMRI signal may reduce the ripple amplitude at the input common mode of an amplifier system. One technique for generating the CMRI signal is with a circuit referred to as a signal-dependent common-mode generator (SDCG). However, a dynamic CMRI signal may be generated from other circuits than the examples described below. 
       FIG. 4  is an amplifier system with a dynamic common-mode reference input (CMRI) signal generated by a signal-dependent common-mode generator (SDCG) according to some embodiments of the disclosure. A signal-dependent common-mode generator (SDCG)  402  of an amplifier system  400  is coupled to a CMRI input of operational amplifier (“op-amp”)  401 . The op-amp  401  may be a fully-differential operational amplifier. The SDCG  402  may generate a dynamic CMRI signal to control the op-amp  401 . For example, the SDGC  402  may shift signal variation from the input nodes  404 A and  404 B of the op-amp  401  to the output nodes  406 A and  406 B of the op-amp  401 . The SDGC  402  may generate a changing common mode at its output, which is approximately proportional to, or otherwise related to, the common-mode signal at the input nodes  404 A and  404 B of the op-amp  401  if the SDGC unit  402  was not present. This changing signal provided by the SDGC  402  is fed back to the op-amp  401  and controls the reference of the output common-mode feedback circuit of the op-amp  401 . The output common mode of the op-amp  401 , which tracks the reference common mode, may have a ripple with the same amplitude as the common-mode ripple at the input nodes  404 A and  404 B of the op-amp  401  when the SDCG  402  was not present. Thus, the ripple that was seen on the input common-mode node of the amplifier is now shifted to the output common mode and the input common mode remains constant. 
     Other components of the amplifier system  400  may include system input nodes  412 A and  412 B for input signals V INP  and V INN , respectively. The input nodes  412 A and  412 B may be coupled to the input nodes  404 A and  404 B of the op-amp  401  through input impedances  414 A and  414 B, respectively. Additional feedback impedances  416 A and  416 B may be coupled between the input nodes  404 A and  404 B of the op-amp  401  and the output nodes  406 A and  406 B of the op-amp  401 . 
     An example operation of the SDGC  402  is shown in  FIG. 5 .  FIG. 5  is a flow chart illustrating an example method for operating an amplifier system with a dynamic CMRI signal according to one embodiment of the disclosure. A method  500  may begin at block  502  with generating a common-mode reference input (CMRI) signal for a fully-differential operational amplifier of an amplifier system. At block  504 , the CMRI signal may be dynamically adjusted such that a common-mode component of inputs to the fully-differential operational amplifier is made approximately independent of input signals to the amplifier system. That is, the common-mode at input nodes  404 A and  404 B of the op-amp  401  may be made respectively independent from the input nodes  412 A and  414 B of the amplifier system  400 . The CMRI signal may be generated and adjusted by circuitry within the SDGC  402 . Alternatively, the CMRI signal may be generated and adjusted by logic circuitry configured to execute firmware and/or software to control generation of the CMRI signal. For example, the SDGC  402  may include a signal generator, such as a waveform generator or a DC voltage source, and logic circuitry or other control circuitry to control an output level of the signal generator to obtain a desired CMRI signal. 
     One example circuit for the SDGC  402  is shown in  FIG. 6A .  FIG. 6A  is an example signal-dependent common-mode generator (SDCG) using an operational amplifier according to some embodiments of the disclosure. The SDGC  402  may include an operational amplifier (“op-amp”)  602 . The op-amp  602  may receive a DC common-mode voltage signal V CN     —DC    at non-inverting input node  604 . The op-amp  602  may receive input signals at inverting input node  606 . The input signals received at input node  606  may be, for example, the input signals V INP  and V INN  at system input nodes  412 A and  412 B. Input impedances  608 A and  608 B may be coupled between the input signals and the inverting input node  606 . Feedback impedances  610 A and  610 B may be coupled between an output node  612  and the inverting input node  606 . The output node  612  may be coupled to a CMRI input of the op-amp  401  of the amplifier system  400 . In some embodiments, the input impedances  608 A and  608 B may be equal to approximately Zin*N, or an integer multiple (e.g., N) of the input impedances  414 A and  414 B of the op-amp  401 , and the feedback impedances  610 A and  610 B may be equal to approximately Zfb*N, or an integer multiple of the feedback impedances  416 A and  416 B of the op-amp  401 . Zin is an input impedance of the amplifier  401  (e.g., based on Z 1 ), and Zfb is a feedback impedance around amplifier  401  (e.g., based on Z 2 ). 
     Another example circuit for the SDGC  402  is shown in  FIG. 6B .  FIG. 6B  is an example signal-dependent common-mode generator (SDCG) using impedances according to some embodiments of the disclosure. The SDGC  402  may include impedances  622 A-N collectively operating as an impedance Z 11  and impedance  624  operating as an impedance Z 21 . In some embodiments, the impedances  622 A-N may each have an impedance of Z 1 *N, or an integer multiple (e.g., N) of the input impedances  414 A and  414 B of the op-amp  401 , and the impedance  624  may have an impedance equal to approximately Z 2 *(N/2), or equal to approximately a ratio of the feedback impedance  416 A and  416 B of the op-amp  401 . Z 1  may be an input impedance of, e.g., amplifier  401 , and Z 2  may be a feedback impedance of, e.g., amplifier  401 . 
     Another example embodiment of the SDCG  402  is shown in  FIG. 7 .  FIG. 7  is an example signal-dependent common-mode generator (SDCG) for generating a dynamic CMRI signal according to some embodiments of the disclosure. The SDGC  402  of  FIG. 7  provides for connection of multiple signal inputs V IN,1 -V IN,N . The SDGC  402  may include a differential-input, single-ended operational amplifier (“op-amp”)  701 . The op-amp  701  is used in a feedback structure having impedances Z 11  and Z 21  that operate as feedback impedances. The impedance Z 11  may be composed of input impedances  712 A-N. The impedance Z 21  may be composed of input impedance  714 . The input common mode of the op-amp  701  is set by a constant voltage V CM . The impedances for the example SDCG  402  may be set according to the equation below:
 
 Z   11   *Z   21   =Z   1   *Z   2  
 
     Optional additional impedances  704 ,  706 , and  708  may be coupled to a non-inverting input of the op-amp  701 . The SDGC  402  of the above examples have low power consumption and area cost and also provide a reduction in input common-mode ripple reduction at the amplifier system input nodes. 
     An operational amplifier with reduced common-mode ripple resulting from a dynamic CMRI signal may be used in any circuit implementing a fully-differential operational amplifier system. One example circuit is a class-D audio amplifier system. Class-D audio amplifiers are used in many applications, including audio amplifiers. Their low power consumption and high efficiency have made them one of the more favorable architectures in audio design. The class-D amplifiers may be incorporated into an integrated circuit (IC) with other functionality as an audio controller. Such an audio controller may be used in mobile devices, such as mobile phones. In some embodiments, the audio controller may include functionality such as digital-to-analog conversion and audio decoding along with a class-D amplifier system or other amplifier system. To improve the linearity of a class-D audio amplifier, the class-D amplifier may be placed in a high-gain feedback loop having one or more integrators. The high gain results in a more linear class-D amplifier. A simple closed loop class-D amplifier with a cascade of integrators with a feedforward (CIFF) topology is shown in  FIG. 8 . 
       FIG. 8  is an example class-D amplifier system with a cascade of integrators with a feedforward (CIFF) topology with current source input and a dynamic CMRI signal according to some embodiments of the disclosure. Class-D amplifier system  800  may include input nodes  802 A and  802 B coupled to the input nodes of integrator  810 . The input nodes  802 A-B may have a large common mode ripple that produces undesirable effects in the class-D amplifier  800 . This ripple affects the performance of the integrator  810 , and also the preceding block that is connected to the class-D amplifier. An SDCG  801  may produce a dynamic CMRI signal applied to the integrator  810 . An input to the SDCG  801  may be based on the output of the class-D amplifier from output nodes  840 A and  840 B. The input common-mode ripple may be reduced, and thus the performance of the integrator  810  and the preceding unit improved. The common-mode ripple at the input of the integrator  810  is shifted to the output of integrator  810 . In some embodiments, the resistor R 11  and the capacitor C 11  may be chosen such that:
 
 R   11   *C   11   =R   f1   *C   1 .
 
where Rf 1  may be a resistance value between an output of the amplifier system and an input of the first stage, and C 1  may be a capacitance value between an input and an output of the first amplifier stage.
 
     The output of the first integrator  810  may be coupled to a second integrator  820 . The output of the second integrator  820  may be coupled to sample and hold, pulse width modulation (S&amp;H PWM) modulation block  822 , and subsequently to H-bridge driver  824  to generate the amplifier system output at the output nodes  840 A and  840 B. 
     Another embodiment for the SDCG block in a CIFF structure is shown in  FIG. 9 .  FIG. 9  is an example class-D amplifier system with a cascade of integrators with a feedforward (CIFF) topology with voltage source input and a dynamic CMRI signal according to some embodiments of the disclosure.  FIG. 9  shows that the SDCG can be applied to a CIFF class-D amplifier with voltage source inputs  952 A and  952 B, instead of the current source inputs  852 A and  852 B shown in  FIG. 8 . 
     Another example usage of the SDCG block is in a cascade of integrators in a feedback (CIFB) topology class-D amplifier system. One example embodiment of such an amplifier system is shown in  FIG. 10 .  FIG. 10  is an example class-D amplifier system with a cascade of integrators in feedback (CIFB) topology with current source input and a dynamic CMRI signal according to some embodiments of the disclosure. Class-D amplifier system  1000  may include input nodes  1002 A and  1002 B directly coupled to the input nodes of first integrator  1010 . An SDCG  1001  may produce a dynamic CMRI signal applied to the first integrator  1010 . An input to the SDCG  1001  may be the output of the class-D amplifier from output nodes  1040 A and  1040 B. The output of the first integrator  1010  may be coupled to a second integrator  1020 . The output of the second integrator  1020  may be coupled to S&amp;H PWM modulation block  1022 , and subsequently to H-bridge driver  1024  to generate the amplifier system output at the output nodes  1040 A and  1040 B. In the CIFB architecture of  FIG. 10 , unlike the CIFF architecture of  FIG. 9 , there is more than one feedback from the output nodes  1040 A and  1040 B of the amplifier system  1000 . Feedback is provided through resistors Rf 1  to the first integrator  1010  and through resistors Rf 2  to the second integrator  1020 . Similar to the CIFF architecture of  FIG. 9 , a large ripple is seen at the input nodes  1002 A and  1002 B. The SDCG block  1001  may improve performance of the amplifier system  1000  by reducing the impact of this large ripple. In some embodiments, resistances and capacitances throughout the fully-differential amplifier system may be adjusted at start-up or during operation of the amplifier system. For example, the resistor Rf 1  can be reduced to reduce the total output noise. The capacitance C 1  may then be adjusted, such as by increasing the capacitance C 1 , to maintain amplifier stability and headroom. 
       FIG. 10  illustrates an embodiment of a CIFB class-D amplifier system with current source inputs  1050 A and  1050 B. In other embodiments, the CIFB architecture may be used with voltage source inputs  1150 A and  1150 B. One example embodiment with voltage source inputs is shown in  FIG. 11 .  FIG. 11  is an example class-D amplifier system with a cascade of integrators in feedback (CIFB) topology with voltage source input and a dynamic CMRI signal according to some embodiments of the disclosure. 
     The schematic flow chart diagram of  FIG. 5  is generally set forth as a logical flow chart diagram. Likewise, other operations for the circuitry are described without flow charts herein as sequences of ordered steps. The depicted order, labeled steps, and described operations are indicative of aspects of methods of the invention. Other steps and methods may be conceived that are equivalent in function, logic, or effect to one or more steps, or portions thereof, of the illustrated method. Additionally, the format and symbols employed are provided to explain the logical steps of the method and are understood not to limit the scope of the method. Although various arrow types and line types may be employed in the flow chart diagram, they are understood not to limit the scope of the corresponding method. Indeed, some arrows or other connectors may be used to indicate only the logical flow of the method. For instance, an arrow may indicate a waiting or monitoring period of unspecified duration between enumerated steps of the depicted method. Additionally, the order in which a particular method occurs may or may not strictly adhere to the order of the corresponding steps shown. 
     The operations described above as performed by a controller may be performed by any circuit configured to perform the described operations. Such a circuit may be an integrated circuit (IC) constructed on a semiconductor substrate and include logic circuitry, such as transistors configured as logic gates, and memory circuitry, such as transistors and capacitors configured as dynamic random access memory (DRAM), electronically programmable read-only memory (EPROM), or other memory devices. The logic circuitry may be configured through hard-wire connections or through programming by instructions contained in firmware. Further, the logic circuitry may be configured as a general purpose processor capable of executing instructions contained in software. In some embodiments, the integrated circuit (IC) that is the controller may include other functionality. For example, the controller IC may include an audio coder/decoder (CODEC) along with circuitry for performing the functions described herein. Such an IC is one example of an audio controller. Other audio functionality may be additionally or alternatively integrated with the IC circuitry described herein to form an audio controller. 
     If implemented in firmware and/or software, functions described above may be stored as one or more instructions or code on a computer-readable medium. Examples include non-transitory computer-readable media encoded with a data structure and computer-readable media encoded with a computer program. Computer-readable media includes physical computer storage media. A storage medium may be any available medium that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise random access memory (RAM), read-only memory (ROM), electrically-erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Disk and disc includes compact discs (CD), laser discs, optical discs, digital versatile discs (DVD), floppy disks and Blu-ray discs. Generally, disks reproduce data magnetically, and discs reproduce data optically. Combinations of the above should also be included within the scope of computer-readable media. 
     In addition to storage on computer readable medium, instructions and/or data may be provided as signals on transmission media included in a communication apparatus. For example, a communication apparatus may include a transceiver having signals indicative of instructions and data. The instructions and data are configured to cause one or more processors to implement the functions outlined in the claims. 
     Although the present disclosure and certain representative advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. For example, although analog-to-digital converters (ADCs) are described throughout the detailed description, aspects of the invention may be applied to the design of other converters, such as digital-to-analog converters (DACs) and digital-to-digital converters, or other circuitry and components based on delta-sigma modulation. As another example, although audio controllers with logic circuitry are described, the functionality of the logic circuitry may be implemented in analog circuitry and/or digital circuitry. Examples of such digital circuitry include digital signal processors (DSPs), graphics processing units (GPUs), and central processing units (CPUs). As another example, although processing of audio data is described, other data may be processed through the filters and other circuitry described above. As one of ordinary skill in the art will readily appreciate from the present disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.