Patent Publication Number: US-2002011806-A1

Title: Ballast circuit with independent lamp control

Description:
CROSS REFERENCE TO RELATED APPLICATIONS  
     [0001] The present application claims priority to the provisional application having a Ser. No. 60/184,889, filed on Feb. 25, 2000, and herein incorporated by reference. 
    
    
     
       BACKGROUND OF THE INVENTION  
       [0002] The present invention relates generally to electronic ballast circuits, and more particularly, to ballast circuits that can be utilized to independently energize a plurality of loads, such as fluorescent lamps.  
       [0003] There are many types of ballast circuits for energizing devices that emit visible light, such as fluorescent lamps. A so-called electronic ballast receives a relatively low frequency AC (Alternating Current) input signal and provides a relatively high frequency AC output signal to one or more lamps. Typically, the low frequency input signal corresponds to a standard 110 volt, 60 Hz signal which is selectively applied to the ballast by, for example, a conventional wall switch. The high frequency AC output signal provided by the ballast circuit can be, for example, of the order of tens of kilo hertz.  
       [0004] One type of electronic ballast includes a rectifier which receives an AC input signal and provides a DC (Direct Current) signal to an inverter. The inverter can be a resonant inverter which provides a relatively high frequency AC signal to the lamps at operational voltage and current levels which cause the lamps to emit light.  
       [0005] Generally, the ballast is coupled to a source of AC energy via a switch, for example a conventional wall switch, which controls the flow of energy to the ballast for turning the lamps on and off. That is, when the switch is set to an on position the AC signal is applied to the ballast which energizes the lamps such that they emit light. And when the switch is set to an off position, the AC signal is not applied to the ballast and the lamps do not emit light. However, conventional ballasts are not adapted for coupling to more than one AC input signal and do not provide independent control over multiple lamps coupled to the ballast.  
       [0006] Thus, a need exists to provide a ballast circuit adapted for receiving more than one AC input signal and for independently controlling a plurality of lamps coupled to the ballast.  
       SUMMARY OF THE INVENTION  
       [0007] The present invention provides a ballast circuit that allows independent control over a plurality of lamps. Although the invention is primarily shown and described as a ballast circuit for energizing a lamp, it should be understood that the invention has other applications as well, such as motor control circuits and voltage regulators.  
       [0008] In one aspect, the invention provides a ballast circuit that receives power from two independent AC sources to independently energize first and second lamps. The ballast circuit includes a rectifier that receives input AC signals from the independent AC sources and applies a DC voltage to an inverter. The inverter in turn provides an output AC signal at a selected frequency to be applied to the lamps. The ballast circuit further includes a first bias circuit connected to one of the independent input AC sources and one of the lamps, e.g., the first lamp, for detecting whether an input AC signal from that AC source is present. The bias circuit permits the application of the inverter AC signal to this lamp when this input AC signal is present, and inhibits the application of the inverter AC signal to the lamp when this input AC signal is not present. This allows selectively energizing one lamp independently of the other.  
       [0009] In a related aspect, a ballast circuit of the invention can include a second bias circuit connected to the other input AC source and to the second lamp. The second bias circuit operates in a manner similar to the first bias circuit. In particular, the second bias circuit detects whether an AC signal from the other input AC source is present. If this AC signal is present, the second bias circuit permits application of the inverter AC signal to the second lamp. Otherwise, it inhibits the application of the second AC signal to the second lamp.  
       [0010] Each bias circuit can include a detector connected to one AC input source to provide a control signal one when that AC input source provides an AC signal. The bias circuit can further include a control circuit that receives the control signal, and permits application of the inverter AC signal to the lamp which is configured to receive power from that AC input source. The detector can be an opto-coupler consisting, for example, of two light emitting diodes coupled in parallel and in opposite polarity, that provides a light signal when the AC input signal is present. The control circuit in turn can include a first switching element, such as an optically coupled transistor, that is activated into a conductive state in response to the light signal to permit the application of the inverter AC signal to the lamp. In some embodiments, the ballast circuit includes a second switching element coupled to the first switching element such that a transition of the first switching element into a conductive state causes a transition of the second switching element into a conductive state. This provides a path for current flow from the inverter to the lamp during at least a portion of the cycle of the inverter AC signal.  
       [0011] In a related aspect, the invention provides a ballast circuit adapted for coupling to first and second independent AC sources to independently energize first and second loads, such as two fluorescent lamps. The ballast circuit can include a rectifier that can couple to first and second independent AC sources to receive first and second AC signals, and to provide a DC output voltage across a positive voltage rail and a negative voltage rail. Two inverter circuits receive input DC power from these positive and negative voltage rails, and each applies an AC output voltage to one load. The ballast circuit further includes two bias circuits, each coupled to one of the AC input sources and one of the inverters. Each bias circuit employs a signal path, extending from the rectifier thereto, to provide a control signal indicating whether an AC signal from one AC source, i.e., the source to which the bias circuit is coupled, is present.  
       [0012] If the AC signal is present, the bias circuit permits the inverter to which it is coupled to energize the respective load. In some embodiments, the inverter circuit includes two switching elements, such as two transistors, and the bias circuit includes a switch coupled one of the inverter switching elements. The switch of the bias circuit transitions from a conductive state to a non-conductive state in response to the bias signal indicating that the AC signal is present. The transition of the switch of the bias circuit activates the switching element of the inverter to which it is coupled, thereby allowing the inverter to apply power to the respective load.  
       [0013] The bias circuit can include a zener diode coupled between signal path and the switch of the bias circuit such that a control signal indicative of the presence of the AC input signal triggers the zener diode, for example by charging up a capacitor connected to the zener diode. The triggering of the zener diode can cause a transition of the switch from a conductive state to a non-conductive state, thereby enabling the inverter.  
       [0014] Another aspect of the invention provides a ballast circuit that can receive power from first and second independent AC sources to independently energize first and second loads. The ballast circuit can include a rectifier adapted to receive first and second AC signals from first and second AC sources, respectively. The rectifier provides a DC output voltage across a positive voltage rail and a negative voltage rail when at least one of the AC input signals is present. The ballast circuit further includes first and second inverter circuits, both of which receive DC power from the rectifier, for energizing the first and second loads, respectively. A first signal path extends from the rectifier to the first control circuit for transmitting the first AC signal thereto. Further, the first control circuit is coupled to the first inverter, and enables the first inverter when the first AC signal is present to energize the load regardless of the presence of the second AC signal.  
       [0015] In a related aspect, the ballast circuit includes a second control circuit coupled to the second inverter circuit, where the second control circuit enables the second inverter when the second AC signal is present to energize the second load regardless of the presence of the first AC signal.  
       [0016] The ballast circuit can include first, second, and third input terminals, where the first and second terminals can be coupled to the first AC source, and the second and third terminals can be coupled to the second AC source. Further, the rectifier can be formed of six diodes, arranged in three parallel groups. Each group includes two diodes coupled end-to-end. The first terminal is coupled to a connection point of two diodes of one group, and the second terminal is coupled to a connection point of two diodes of a second group, and the third terminal is coupled to a connection point of two diodes of a third group.  
       [0017] In yet another aspect, the invention provides a circuit for energizing first and second lamps. The circuit includes first, second, and third input terminals for receiving input AC power from two independent AC sources, where the first and second input terminals receive power from one AC source, and the second and third terminals receive power from the other AC source. The circuit includes two rectifiers, each of which can receive one of the AC input signals to provide a DC voltage. Further, the circuit includes two inverter circuits, each of which receives DC power from one of the rectifiers and applies an AC power to drive one of the lamps. In addition, the circuit includes two inverter disable circuits, each coupled to one of the inverters. Each disable circuit disables its respective inverter when one of the input AC signals is present, and the other one is not.  
       [0018] The ballast circuit can also include two inductively coupled inductors, one of which is coupled to the first input terminal and the other is coupled to the second input terminal. These inductors are also inductively coupled to an inductor of one of the inverter disable circuits such that a flux imbalance in these inductors induces a voltage in the inductor of the disable circuit, which in turn disables the inverter. This flux imbalance is present when no input AC signal exists across the first and second terminals, but an input AC signal exists across the second and third terminals.  
     
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0019] The invention will be more fully understood from the following detailed description taken in conjunction with the accompanying drawings, in which:  
     [0020]FIG. 1 is a schematic block diagram of a ballast circuit in accordance with the present invention;  
     [0021]FIG. 2 is a schematic block diagram showing further details of the ballast circuit of FIG. 1;  
     [0022]FIG. 3 is a circuit diagram of an exemplary embodiment of the ballast of FIG. 1;  
     [0023]FIG. 4 is a circuit diagram showing further details of the circuit of FIG. 3;  
     [0024]FIG. 5 is a further embodiment of a ballast in accordance with the present invention;  
     [0025]FIG. 6 is a circuit diagram of an exemplary embodiment of the ballast of FIG. 5;  
     [0026]FIG. 7 is a circuit diagram of an alternative embodiment of the ballast of FIG. 5;  
     [0027]FIG. 8 is a schematic diagram of a further embodiment of a ballast in accordance with the present invention;  
     [0028]FIG. 9 is a circuit diagram of an exemplary implementation of the ballast of FIG. 8;  
     [0029]FIG. 10 is a schematic block diagram showing an alternative embodiment of the ballast circuit of FIG. 1;  
     [0030]FIG. 11 is a more detailed diagram of an exemplary implementation of the embodiment of a ballast of FIG. 10 according to the invention;  
     [0031]FIG. 12 is a circuit diagram showing further details of the circuit of FIG. 11; and  
     [0032]FIGS. 12A and 12B are circuit diagrams exemplary implementations of the embodiment of the ballast of FIG. 11 according to the invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION  
     [0033]FIG. 1 shows a ballast circuit  100  coupled to first and second AC energy sources  102 , 104  and to first and second lamps  106 , 108 . The first energy source  102  provides a first AC input signal and the second AC energy source  104  provides a second AC input signal. The first AC input signal enables the ballast to energize the first lamp  106  and the second AC input signal enables the ballast to energize the second lamp  108 . As described below, the ballast  100  independently energizes each of the first and second lamps  106 , 108 .  
     [0034] As shown in FIG. 2, the ballast circuit  100  includes a rectifier  110  for receiving the first and second AC input signals and for providing DC energy to a boost converter  112 . The boost converter  112  provides DC signal levels to first and second inverters  114 , 116  which energize first and second pairs of lamps  106   a,b , 108   a,b , respectively. The rectifier  110  also provides a first control signal to the first inverter  114  via a first control signal path  118 , and a second control signal to the second inverter  114  via a second control signal path  120 . The first control signal  118  is indicative of whether the first AC input signal is present and the second control signal  120  is indicative of whether the second AC input signal is present. The first and second controls signals are effective to selectively enable the inverters to control the flow of energy to the lamps  106 , 108 .  
     [0035]FIG. 3 shows an exemplary circuit implementation of the ballast circuit  100  of FIG. 2, wherein like reference designations indicate like elements. The rectifier  110  includes six rectifying diodes DR 1 - 6  coupled so as to provide first, second, and third AC input terminals  122   a,b,c  and first and second DC output terminals  124   a,b . The first AC input terminal  122   a  is located between the first and sixth rectifying diodes DR 1 ,DR 6 , which are coupled end-to-end between the DC output terminals  124   a,b . Similarly, the second AC input terminal  122   b  is located between the second and fifth rectifying diodes DR 2 ,DR 5  and the third AC input terminal  122   c  is located between the third and fourth rectifying diodes DR 3 ,DR 4 . In an exemplary embodiment, the first AC input terminal  122   a  is coupled to a first black wire BL 1 , the second input terminal  122   b  is coupled to white wire W 12 , and the third input terminal  122   c  is coupled to a second black wire BL 2 . The first AC signal can be provided as a conventional 110 volt, 60 Hz signal transmitted via the first black and white wires BL 1 ,W 12  and the second AC signal can also be provided as a 110 volt, 60 Hz signal transmitted via the second black and white wires BL 2 ,W 12 . It is understood that the white wire W 12  can comprise a single wire or a pair of electrically coupled wires, such as, a first white wire corresponding to the first black wire BL 1  and a second white wire corresponding to the second black wire BL 2 .  
     [0036] The DC output terminals  124   a,b  of the rectifier  110  are coupled to the optional boost converter  112 . The boost converter  112  is effective to boost the voltage of the DC signal provided to the inverters  114 , 116  and to provide power factor correction. Boost converters are well known to one of ordinary skill in the art. In one embodiment shown in phantom, the boost converter  112  includes a power factor correction integrated circuit PFC IC coupled to a FET (field effect transistor) QBC for controlling a conduction state of the FET. The power factor correction integrated circuit can be of the type manufactured by SGS-Thomson Microelectronics of Schaumburg, Ill., U.S.A, and identified as L6560, L6560A, and L6561. The boost converter  112  further includes a boost inductor LB and a diode DB which form a series circuit path from the rectifier output terminal  124   a  to the first inverter  114 . The boost converter  112  includes a first output terminal  126   a  coupled to a positive rail  128  of the first inverter  114  and a second output terminal  126   b  coupled to a negative rail  130  of the first inverter.  
     [0037] The first inverter  114  is shown having first and second switching elements Q 1 ,Q 2  coupled in a half bridge arrangement. However, it is understood that other inverter configurations are possible, such as full bridge topologies. The first switching element Q 1 , shown as a transistor, has a collector terminal  132  coupled to the positive rail  128  of the inverter  114 , a base terminal  134  coupled to a first or Q 1  control circuit  136 , and an emitter terminal  138  coupled to the second switching element Q 2 . The second switching element Q 2  has a collector terminal  140  coupled to the emitter terminal  138  of the first switching element Q 1 , a base terminal  142  coupled to a second or Q 2  control circuit  144 , and an emitter terminal  146  coupled to the negative rail  130  of the inverter  114 . The conduction state of the first switching element Q 1  is controlled by the first control circuit  136  and the conduction state of the second switching element Q 2  is controlled by the second control circuit  144 .  
     [0038] The first inverter  114  further includes a first resonant inductive element LR 1  coupled at one end to a point between the switching elements Q 1 , Q 2  and at the other end to a first parallel capacitor CP 1 . The lamps in the first pair of lamps  106  (first lamp  106   a , second lamp  106   b ) are coupled end-to-end such that the lamps are connected in parallel with the first parallel capacitor CP 1 . First and second bridge capacitors CB 1 , CB 2  are coupled end-to-end between the positive and negative rails  128 , 130  of the inverter. The junction of the second lamp  106   b  and the parallel capacitor CP 1  is coupled to a point between the first and second bridge capacitors CB 1 , CB 2 .  
     [0039] The second inverter  116  has a configuration that mirrors that of the first inverter  114 . Third and fourth switching elements Q 3 ,Q 4  are coupled in a half bridge configuration between the positive and negative rails  148 , 150  of the second inverter  116  with conduction states determined by third and fourth control circuits  152 , 154  respectively. A resonant circuit is formed by a second resonant inductive element LR 2 , a second parallel capacitor CP 2  and a second pair of lamps  108  (third lamp  108   a , fourth lamp  108   b ). Third and fourth bridge capacitors CB 3 ,CB 4  are coupled end-to-end across the rails  148 , 150  of the second inverter  116  with a lamp current path connected to a point between the bridge capacitors CB 3 ,CB 4 .  
     [0040] The first control path  118 , which provides a signal path for the first control signal, extends from the first input terminal  122   a  of the rectifier  110  to the second control circuit  144 . The second control path  120 , which provides a signal path for the second control signal, extends from the third input terminal  122   c  to the fourth control circuit  154 . The first control signal indicates whether the first AC input signal (on wires BL 1 ,W 12 ) is being applied to the first and second input terminals  122   a,b  of the rectifier. And the second control signal indicates whether the second AC input signal (on wires BL 2 ,W 12 ) is present on the second and third terminals  122   b,c  of the rectifier. The first and second control signals provide independent control over the first and second inverters  114 , 116 . That is, the first inverter  114  can energize the first pair of lamps  106  when the first AC input signal is present. And the second inverter  116  can energize the second pair of lamps  108  when the second AC signal is present.  
     [0041] In operation, the first and second inverters  114 , 116  each operate at or about a characteristic resonant frequency which is determined by the impedances of the various circuit elements, such as the respective resonant inductive elements, LR 1 ,LR 2 , parallel capacitors CP 1 ,CP 2  and lamps  106 , 108 . For the first inverter  114 , current through the lamps  106  flows in a first direction while the first switching element Q 1  is conductive and in a second, opposite direction when the second switching element Q 2  is conductive. The current periodically reverses direction as determined by the resonant frequency of the circuit. The first and second control circuits  136 , 144  control the respective conduction states of the first and second switching elements Q 1 ,Q 2  to facilitate resonant operation of the circuit.  
     [0042] When the first AC input signal is applied to the rectifier  110 , the first control signal, via the first control path  118 , enables the second control circuit  144  to bias the second switching element to a conductive state. Thus, when the first AC signal is present, the first inverter  114  is enabled to resonate such that the ballast circuit energizes the first pair of lamps  106  with AC energy which causes the lamps to emit light.  
     [0043] When the first AC signal is not present at the rectifier  110 , the first control signal conveys this information to the second control circuit  144  which prevents the second switching element Q 2  from transitioning to a conductive state. Thus, the first inverter  114  cannot resonate and is thereby disabled when the first AC signal is not applied to the rectifier  110 . With the first inverter disabled, the first pair of lamps  106  is not energized.  
     [0044] Similarly, when the second AC input signal is present at the rectifier  110 , the second control signal, via the second control path  120 , enables the fourth control circuit  154  to bias the fourth switching element Q 4  to a conductive state for resonant operation of the second inverter  116 . And when the second AC input signal is not present, the fourth control circuit  154  prevents the fourth switching element Q 4  from turning on, thereby disabling the second inverter  116 .  
     [0045]FIG. 4 shows an exemplary embodiment of the second control circuit  144  of FIG. 3, wherein like reference designations indicate like elements. The second control circuit  144  includes fifth and sixth switching elements Q 5 ,Q 6  that are effective to enable the second switching element Q 2  to transition to a conductive state when the first AC signal is present on the first control path  118 . In general, when the fifth switching element Q 5  is conductive (i.e., the first AC signal is present) the second switching element Q 2  can transition to a conductive state to achieve resonant operation of the first inverter  114 . And when the fifth switching element Q 5  is not conductive (i.e., the first AC signal is not present), the sixth switching element Q 6  transitions to a conductive state which prevents the second switching element Q 2  from transitioning to a conductive state, thereby disabling the first inverter  114 .  
     [0046] It is understood that a control path indicating the presence of an AC signal at the rectifier can be coupled to either or both of the first and second control circuits  136 , 144 . It is further understood that the second control path  120  is coupled to the second inverter  116  (FIG. 3) for selectively enabling the third and/or fourth switching elements Q 3 ,Q 4 .  
     [0047] In the exemplary embodiment of FIG. 4, the second control circuit  144  includes a first capacitor CQ 2 B coupled at one terminal to the base terminal  142  of the second switching element Q 2  and at the other terminal to the negative rail  130  of the first inverter. A first resistor RQ 2 B and inductive bias element L 1 B provide a series circuit path from the base terminal  142  of the switching element Q 2  to the negative rail  130 . The bias element L 1 B is inductively coupled to the first resonant inductive element L 1 R such that current flow through the first resonant inductive element L 1 R induces a corresponding voltage in the bias element L 1 B which biases the base terminal  142  of the second switching element Q 2 . As known to one of ordinary skill in the art, as current flow through the first resonant inductive element L 1 R periodically reverses direction due to resonance of the circuit, the corresponding voltage induced at the bias element L 1 B is effective to alternately bias the second switching element Q 2  to conductive and nonconductive states.  
     [0048] The fifth switching element Q 5 , shown as a transistor, has a collector terminal  156  coupled to a point between first and second voltage dividing resistors RDV 1 ,RVD 2 , a base terminal  158 , and an emitter terminal  160 . A zener diode DZ, a second resistor RQ 5 B 1  and an enable capacitor CE provide a series circuit path from the base terminal  158  of the fifth switching element Q 5  to the negative rail  130  of the first inverter  114 . A third resistor RQ 5 B 2  is coupled between the base terminal  158  and the negative rail  130 . An enable diode DE has a cathode  162  coupled to the enable capacitor CE and an anode  164  coupled to the first control path  118  which extends to a point between the first and sixth diodes DR 1 ,DR 6 , i.e., the first AC input terminal  122   a  of the rectifier  110  (FIG. 3).  
     [0049] The sixth switching element Q 6  has a collector terminal  166  coupled to the base terminal  142  of the second switching element Q 2 , a base terminal  168  coupled to an RC network, and an emitter terminal  170  coupled to the negative rail  130  via a resistor RQ 6 B 1 . A capacitor CQ 6 B is coupled between the base terminal  168  and the negative rail  130 . A first series circuit path extends from the base terminal  168  through the first and second voltage resistors RVD 1 ,RVD 2 , and the bias element L 1 B to the negative rail  130 . A second series circuit path extends from the base terminal  168  through a resistor RQ 6 B 2  and the bias element L 1 B to the negative rail  130 . A diac DD 1  is coupled at one terminal to the base terminal  168  and at the other terminal to the bias element L 1 B.  
     [0050] Referring now to FIG. 4 in combination with FIG. 3, when the first AC input signal, via the first black and white wires BL 1 ,W 12 , is applied to the first and second input terminals  122   a,b  of the rectifier  110 , the first control signal path  118  provides this AC signal to the second control circuit  144 . The AC signal is rectified by the enable diode DE and the enable capacitor CE is charged to a predetermined voltage level. When the enable capacitor CE is charged to level greater than a voltage threshold associated with the zener diode DZ, the base of the fifth switching element Q 5  is biased with a positive potential that is effective to transition Q 5  to a conductive state. And when Q 5  is conductive, the sixth switching element Q 6  is prevented from transitioning to a conductive state. The sixth switching element Q 6 , when it is in the conductive state, effectively shorts the second switching element Q 2  thereby disabling the first inverter  114 . The sixth switching element Q 6  can become conductive during operation of the circuit unless the fifth switching element Q 5  is turned on by the first AC signal.  
     [0051] The ballast circuit  100  can be coupled to remotely located first and second wall switches which independently control the flow of respective first and second AC signals to the ballast. The ballast independently enables the flow of energy to respective first and second lamps connected to the ballast. The ballast energizes the first lamp when the first AC signal is present and energizes the second lamp when the second AC signal is present. Thus, a single ballast receives first and second AC input signals each of which is effective to energize a respective one of the first and second lamps.  
     [0052] It may be required that two lamps of a light fixture having four lamps be turned on independently of the other two. To fulfill this requirement, a typical conventional configuration includes a first ballast coupled to a first wall switch and a first pair of lamps and a second ballast coupled to a second wall switch and a second pair of lamps. The first wall switch controls the first pair of lamps and the second wall switch controls the second pair of lamps.  
     [0053] In contrast, a ballast  100  in accordance with the present invention can independently energize two sets of lamps housed in a single light fixture. In one embodiment, a first wall switch, which is coupled to the ballast  100 , controls a first pair of lamps and a second wall switch, which is also coupled to the ballast  100 , controls a second pair of lamps. Thus, a single ballast  100  independently energizes first and second pairs of lamps housed in a four lamp light fixture.  
     [0054]FIG. 5 shows an alternative embodiment of a ballast  200  having a dual inverter configuration providing independent control over a plurality of lamps. The first inverter  202  can have a half-bridge configuration formed from first and second switching elements Q 1 ,Q 2 , and the second half-bridge inverter  204  can include third and fourth switching elements Q 3 ,Q 4 . The first and second inverters  202 , 204  are independently controlled by a first AC input signal on first and second AC input terminals  206   a,b , e.g., first black wire BL 1  and a white wire W, and a second AC input signal on the second terminal  206   b  and a third AC input terminal  206   c , e.g., the white wire W and a second black wire BL 2 . The first inverter  202  is disabled by a first inverter disable circuit  208  when the first AC input signal is not present and the second AC input signal is present. Similarly, the second inverter  204  is disabled by a second inverter disable circuit  210  when the first AC input signal is present and the second AC input signal is not present.  
     [0055] In one embodiment, a first inductor L 1 A 1  is coupled to the first AC input terminal  206   a  and a second inductor L 1 A 2 , which is inductively coupled to the first inductor L 1 A 1 , is coupled to the second AC input terminal  206   b . A third inductor L 1 A 3 , which is inductively coupled to the first and second inductors L 1 A 1 ,L 1 A 2 , forms a part of the first inverter disable circuit  208 . The first inverter disable circuit  208  can further include a capacitor CD 1  and a first diac DD 1  coupled to the base terminal Q 5 B of a transistor Q 5 , which has a collector terminal Q 5 C coupled to the base terminal Q 2 B of the second switching element Q 2  of the first inverter  202 .  
     [0056] Similarly, a fourth inductor L 1 B 1  is coupled to the second AC input terminal  206   b , a fifth inductor L 1 B 2  is coupled to the third AC input terminal  206   c , and a sixth inductor L 1 B 3 , which forms part of a second inverter disable circuit  210 , is coupled to a sixth switching element Q 6  for controlling a switching transistor Q 4  of the second inverter  204 . The second inverter disable circuit can further include a capacitor CD 2  and a second diac DD 2  coupled to the transistor Q 6  for selectively disabling the second inverter.  
     [0057] In operation, the magnetic flux generated by each of the first and second inductive elements L 1 A 1 ,L 1 A 2  cancels the flux generated by the other, when the first AC input signal is present on the first and second terminals. In the case where the second AC input signal is present, and the first AC input signal is not present, the flux generated by the second inductor L 1 A 2  is not canceled such that a voltage is generated on the third inductor L 1 A 3 , which charges the capacitor CD 1 . When the voltage on the capacitor CD 1  rises above a predetermined threshold, the first diac DD 1  triggers and the fifth switching element Q 5  transitions to the conductive state. This effectively prevents the second switching element Q 2  of the first inverter from transitioning to a conductive state, thereby disabling the first inverter  202 .  
     [0058] Similarly, when the first AC input signal is present and the second AC input signal is not present, a voltage is generated on inductive element L 1 B 3  to disable the second inverter  210 .  
     [0059]FIG. 6 shows an exemplary detailed circuit implementation of the circuit  200  of FIG. 5 adapted for  120  V operation. FIG. 7 shows a similar circuit implementation adapted for  277  Volt operation. Various other features of these circuits are shown and described, for example, in co-pending and commonly owned U.S. application Sre. Nos. 09/173,850, 09/173,852, and 09/173,966, all filed on Oct. 16, 1998, and all incorporated herein by reference. It should be understood that these circuits are shown only for illustrative purposes, and are not intended to limit the scope of the present invention.  
     [0060]FIG. 8 shows a ballast  300  in accordance with the present invention that independently energizes first and second lamps L 1 ,L 2  with a common inverter  302  energized by a rectifier  304 . In an exemplary embodiment, the ballast  300  includes a first input terminal  306   a  for coupling to a first black wire B 1  and a second input terminal  306   b  for coupling to white wire W. A third input terminal  306   c  and the second input terminal  306   b  are adapted for coupling to a second black wire B 2  and the white wire W, respectively. A first AC input signal corresponds to the first black wire B 1  and the white wire W and a second AC input signal corresponds to the second black wire B 2  and the white wire W.  
     [0061] A first signal detector  308  is coupled to the first input terminal  306   a  and to a first lamp control circuit  310  via a first control signal path  312 . The first signal detector  308  provides a first control signal to the first lamp control circuit  310  that is indicative of whether the first AC input signal is present. A second signal detector  314  is coupled to the third input terminal  306   c  and to a second lamp control circuit  316  via a second control signal path  318 . The second signal detector  314  provides a second control signal to the second lamp control circuit  316  that is indicative of whether the second AC input signal is present. The first and second signal detectors  308 , 314  are coupled together at a node  320  that is also connected to the rectifier  304 . The second input terminal  306   b  is also connected to the rectifier  304 .  
     [0062] The first lamp L 1 , a first capacitor C 1  and the first lamp control circuit  310  form a first series circuit path and the second lamp L 2 , a second capacitor C 2  and the second lamp control circuit  316  form a second series circuit path. The first and second series circuit paths are coupled across first and second terminals  320   a,b  of the inverter, which provide a drive signal to the first and second lamps L 1 ,L 2 .  
     [0063] In one embodiment, the first lamp L 1  is coupled between the first capacitor C 1 , which is coupled to the first inverter terminal  320   a , and the first lamp control circuit  310 , which is coupled to the second inverter terminal  320   b . Similarly, the second lamp L 2  can be coupled between a second capacitor C 2  and the second lamp control circuit  316 .  
     [0064] In operation, the rectifier  304  energizes the inverter  302  when either of the first and second AC input signals is present. When the first AC input signal is present on the first and second terminals  306   a,b , the first signal detector  308  sends a “signal present” indication to the first lamp control circuit  310  via the first signal path  312 . The first lamp control circuit  310  then enables the flow of current through the first lamp L 1 . Similarly, when the second AC signal is present on the second and third terminals  306   b,c , the second signal detector  314  sends a “signal present” indication to the second lamp control circuit  316 , which then enables the second lamp L 2  to be energized.  
     [0065] In the case where the first and second AC input signals are both present, the first and second capacitors C 1 ,C 2  buffer the high frequency signal from the inverter  302  such that the first lamp to light does not prevent the other lamp from lighting due to excessive current draw by the first lighted lamp.  
     [0066]FIG. 9 shows an exemplary circuit implementation of the ballast  300  of FIG. 8. The first signal detector  308  includes a first optocoupler  350  having a first terminal  352  coupled to the first input terminal  306   a  and a second terminal  354  coupled to the first terminal  356  of a second optocoupler  358 , which corresponds to the second signal detector  314 . In one embodiment, the first optocoupler  350  includes first and second light emitting diodes DOCA,DOCB coupled in parallel and in opposite polarity. The second optocoupler  358  can include first and second diodes DOCC,DOCD connected in a similar manner.  
     [0067] The rectifier  304  includes diodes DR 1 - 4  coupled in a full bridge configuration as shown. The node  360  formed by the second terminal  354  of the first optocoupler  350  and the first terminal  356  of the second optocoupler  358  is coupled to a point  360  between the first and third rectifier diodes DR 1 ,DR 3 . The second AC input terminal  306   b  is coupled to a point between the second and fourth rectifier diodes DR 2 ,DR 4 .  
     [0068] In one embodiment, the first lamp control circuit  310  includes a first optically coupled transistor QOC 1  forming a part of the first optocoupler  350 . The transistor QOC 1  can include a collector terminal  362  coupled to the first lamp L 1 , a base terminal  364  optically coupled via a signal path  312  to the first optocoupler diodes DOCA,DOCB, and an emitter terminal  366  coupled to the second terminal  320   b  of the inverter via a resistor R 1 . The first lamp control circuit  310  can further include a first control transistor Q 1  having a collector terminal  370  connected to the collector terminal  362  of the first optically coupled transistor QOC 1 , a base terminal  372  coupled to the emitter  366  of transistor QOC 1 , and an emitter terminal  374  coupled to the second inverter terminal  320   b . A first diode D 1  includes an anode  376  coupled to the second terminal  320   b  and a cathode  378  coupled to the first lamp L 1  and to the collector terminals of the transistors Q 1 ,QOC 1 .  
     [0069] The second lamp control circuit  316  can also include a transistor QOC 2  optically coupled to the second optocoupler  358  via a signal path  318 , a control transistor Q 2 , and a diode D 2 , coupled in a manner similar to the first lamp control circuit  310 .  
     [0070] When the first AC signal is present, the light emitting diodes (LEDS) DOCA,DOCB will bias the first optically coupled transistor QOC 1  to a conductive state, which transitions the first control transistor Q 1  to a conductive state. The conductive control transistor Q 1  provides a path for current to flow from the first terminal  320   a  of the inverter to the second terminal  320   b  and the diode D 1  provides a path for current to flow from the second terminal  320   b  to the first terminal  320   a . Thus, the AC signal from the inverter  302  can energize the first lamp L 1 .  
     [0071] When the first AC signal is not present, the diodes DOCA,DOCB in the first optocoupler  350  are not activated and the first optically coupled transistor QOC 1  does not bias the control transistor Q 1  to a conductive state. Thus, there is no path for current to flow from the first inverter terminal  320   a , thereby disabling the first lamp L 1 .  
     [0072] Similarly, when the second AC signal is present, the light emitting diodes DOCC,DOCD in the second optocoupler  358  are activated, which biases the second optically coupled transistor QOC 2  to a conductive state. This transitions the second control transistor Q 2  to the conductive state such that the transistor Q 2  and the second diode D 2  allow current flow between the first and second inverter terminals  320   a,b  to energize the second lamp L 2 .  
     [0073] Thus, the first AC input signal energizes the first lamp L 1  independently of whether the second AC input signal is present and the second AC input signal energizes the second lamp L 2  independently of whether the first AC signal is present. Hence, the ballast provides independent lamp control with a relatively high degree of circuit component commonality.  
     [0074] Referring now to FIG. 10, a ballast circuit  400  includes a rectifier  410  for receiving the first and second AC input signals and for providing DC energy to a boost converter  412 . The boost converter  412  provides DC signal levels to first and second inverters  414 ,  416  which energize first and second pairs of lamps  106   a,b , and  108   a,b , respectively. The rectifier  410  also provides a first control signal to the first inverter  414  via a first control signal path  418 , and a second control signal to the second inverter  414  via a second control signal path  420 . The first control signal  418  is indicative of whether the first AC input signal is being applied to the rectifier and the second control signal  420  is indicative of whether the second AC input signal is present. The first and second control signals are effective to selectively enable or disable the inverters to control the flow of energy to the lamps  106 , 108 .  
     [0075] Referring now to FIG. 11, an exemplary circuit implementation of the ballast circuit  400  of FIG. 10 is shown, wherein like reference designations indicate like elements. The rectifier  410  includes six rectifying diodes D 1 -D 6  coupled so as to provide first, second, and third AC input terminals  422   a ,  422   b  (which is common to  424   b ) and  424   a  and first and second DC output terminals  426   a,b . The first AC input terminal  422   a  is located between the first and second rectifying diodes D 1 ,D 2 , which are coupled end-to-end between the DC output terminals  426   a , b. Similarly, the second AC input terminal  422   b  (common to input terminal  424   b ) is located between the third and fourth rectifying diodes D 4 , D 5  and the third AC input terminal  424   a  is located between the fifth and sixth rectifying diodes D 5 , D 6 . In an exemplary embodiment, the first AC input terminal  422   a  is coupled to a first black wire BL 1 , the second input terminal  422   b  is coupled to a white wire W 1  and a white wire W 2 , and the third input terminal  424   a  is coupled to a second black wire BL 2 . The first AC signal can be provided as a conventional 110 volt, 60 Hz signal transmitted via the first black and white wires BLI, W 1  and the second AC signal can also be provided as a 110 volt, 60 Hz signal transmitted via the second black and white wires BL 2 , W 2 .  
     [0076] The DC output terminals  426   a,b  of the rectifier  410  are coupled to the optional boost converter  412 . The boost converter  412  is effective to boost the voltage of the DC signal provided to the inverters  414 ,  416  and to provide power factor correction. Boost converters are well known to one of ordinary skill in the art as described earlier in connection with FIG. 3.  
     [0077] The first inverter  414  is shown having first and second switching elements Q 1 , Q 2  coupled in a half bridge arrangement. However, it is understood that other inverter configurations are possible, such as full bridge topologies. The first switching element Q 1 , shown as a transistor, has a collector terminal  432  coupled to the positive rail  428  of the inverter  414 , a base terminal  434  coupled to a first or Q 1  control circuit  436 , and an emitter terminal  438  coupled to the second switching element Q 2 . The second switching element Q 2  has a collector terminal  440  coupled to the emitter terminal  438  of the first switching element Q 1 , a base terminal  442  coupled to a second or Q 2  control circuit  444 , and an emitter terminal  446  coupled to the negative rail  430  of the inverter  414 . The conduction state of the first switching element Q 1  is controlled by the first control circuit  436  and the conduction state of the second switching element Q 2  is controlled by the second control circuit  444 .  
     [0078] The first inverter  414  further includes a first resonant inductive element LR 1  coupled at one end to a point between the switching elements Q 1 , Q 2  and at the other end to a first parallel capacitor CP 1 . The lamps in the first pair of lamps  106  (first lamp  106   a , second lamp  106   b ) are coupled end-to-end such that the lamps are connected in parallel with the first parallel capacitor CP 1 . First and second bridge capacitors CB 1 ,CB 2  are coupled end-to-end between the positive and negative rails  428 ,  430  of the inverter. The junction of the second lamp  106   b  and the parallel capacitor CP 1  is coupled to a point between the first and second bridge capacitors CB 1 , CB 2 .  
     [0079] The second inverter  416  has a configuration that mirrors that of the first inverter  414 . Third and fourth switching elements Q 3 , Q 4  are coupled in a half bridge configuration between the positive and negative rails  448 ,  450  of the second inverter  416  with conduction states determined by third and fourth control circuits  452 ,  454  respectively. A resonant circuit is formed by a second resonant inductive element LR 2 , a second parallel capacitor CP 2  and the second pair of lamps  108  (third lamp  108   a , fourth lamp  108   b ). Third and fourth bridge capacitors CB 3 , CB 4  are coupled end-to-end across the rails  448 ,  450  of the second inverter  416  with a lamp current path connected to a point between the bridge capacitors CB 3 , CB 4 .  
     [0080] The first control path  418 , which provides a signal path for the first control signal, extends from the junction between first and second rectifying diodes D 1 , D 2  to the second control circuit  444 . The second control path  420 , which provides a signal path for the second control signal, extends from the fifth and sixth rectifying diodes D 5 , D 6  to the fourth control circuit  454 . The first control signal is indicative of whether the first AC input signal (on wires BL 1 , W 1 ) is being applied to the first and second input terminals  422   a,b  of the rectifier  410 . And the second control signal corresponds to whether the second AC input signal (on wires BL 2 , W 2 ) is present on the terminals  424   a,b  of the rectifier  410 . The first and second control signals provide independent control over the first and second inverters  414 ,  416 . That is, the first inverter  414  can energize the first pair of lamps  106  when the first AC input signal is present and the second inverter  416  can energize the second pair of lamps  108  when the second AC signal is present.  
     [0081] In operation, each of the first and second inverters  414 ,  416  operates at or about a characteristic resonant frequency which is determined by the impedances of the various circuit elements, such as the respective resonant inductive elements, LR 1 , LR 2 , parallel capacitors CP 1 ,CP 2  and lamps  106 , 108 . For the first inverter  414 , current through the lamps  106  flows in a first direction while the first switching element Q 1  is conductive and in a second, opposite direction when the second switching element Q 2  is conductive. The current periodically reverses direction as determined by the resonant frequency of the circuit. The first and second control circuits  436 ,  444  control the respective conduction states of the first and second switching elements Q 1 , Q 2  to facilitate resonant operation of the circuit.  
     [0082] When the first AC input signal is applied to the rectifier  410 , the first control signal, via the first control path  418 , enables the second control circuit  444  to bias the second switching element to the conductive state. Thus, when the first AC signal is present the first inverter  414  is enabled to resonate such that the ballast energizes the first pair of lamps  106  with AC energy which causes the lamps to emit light.  
     [0083] When the first AC signal is not present at the rectifier  410 , the first control signal conveys this information to the second control circuit  444  which prevents the second switching element Q 2  from transitioning to a conductive state. Thus, the first inverter  414  cannot resonate and is thereby disabled when the first AC signal is not applied to the rectifier  410 . With the first inverter disabled, the first pair of lamps  106  is not energized.  
     [0084] Similarly, when the second AC input signal is present at the rectifier  410 , the second control signal, via the second control path  420 , enables the fourth control circuit  454  to bias the fourth switching element Q 4  to a conductive state for resonant operation of the second inverter  416 . And when the second AC input signal is not present, the fourth control circuit  454  prevents the turning on of the fourth switching element Q 4 , thereby disabling the second inverter  416 .  
     [0085] Referring now to FIG. 12, the first inverter  414  is enabled by the control circuit  444  when the first AC input signal is present. Similarly, the second inverter  416  is enabled by a control circuit  454  when the second AC input signal is present.  
     [0086] The control circuit  444  is shown to include a resistor R 41 , a capacitor C 41  and resistor R 42  pair, a diode D 41 , a resistor R 43 , a capacitor C 42 , a diode D 42 , a resistor R 44 , a zener diode Z 1 , a diode D 43  and a resistor R 45 . The resisters R 41 , R 42  and R 43  provide a voltage divider network  432  with diode D 41  between the negative rail  430  and the junction between rectifying diodes D 1  and D 2  of the rectifier  410 . The capacitor C 41  in conjunction with resistor R 42  provides a high frequency filter. The capacitor C 42  is in parallel with resistor R 43  and when an AC signal is present at first AC input terminal  422   a , diode D 41  allows current to flow from the negative rail to the junction between diodes D 1  and D 2  of the rectifier which in turn provides a negative voltage on capacitor C 42  at the junction of the capacitor C 42  and diode D 41 .  
     [0087] The junction between the capacitor C 42  and diode D 41  is connected in series with the diode D 42 , the resistor R 44 , the zener diode Z 1 , the diode D 43  and the resistor R 45  to the base of transistor Q 5 . In operation, when the negative voltage on the capacitor C 42  rises above a predetermined threshold, the zener diode Z 1  triggers and the switching element Q 5  transitions to a non-conductive state. This effectively enables the second switching element Q 2  of the first inverter to transition to a conductive state, thereby enabling the first inverter  414 .  
     [0088] It should be appreciated that the zener diode Z 1  is effective to provide a reference voltage to the gate of the switching element or transisitor Q 5  to turn off transistor Q 5  to ensure that the inverter  414  is enabled.  
     [0089] It should be noted in this embodiment in operation a circuit  450  includes a capacitor CD 4  and a diac D 10  coupled to the base terminal of a transistor Q 5 , which has a collector terminal coupled to the base terminal of the second switching element Q 2  of the first inverter  414 . Similarly, the capacitor CD 4  and the diac D 10  are coupled to the base terminal of a transistor Q 6 , which has a collector terminal coupled to the base terminal of the switching element Q 4  of the second inverter  416 . In operation, the flux generated by the inductive elements L 1 ′ and L 1 ″ generates a voltage which charges the capacitor CD 4 . When the voltage on the capacitor CD 4  rises above a predetermined threshold, the diac D 10  triggers and the switching element Q 5  and the switching element Q 6  transitions to the conductive state (unless negatively biased by the respective control circuit  444  or  454 ). This effectively prevents the switching element Q 2  of the first inverter from transitioning to the conductive state, thereby disabling the first inverter  414  or prevents the switching element Q 4  of the second inverter from transitioning to the conductive state, thereby disabling the second inverter  416 .  
     [0090] Similarly, the control circuit  454  is shown to include a resistor R 51 , a capacitor C 51  and resistor R 52  pair, a diode D 51 , a resistor R 53 , a capacitor C 52 , a diode D 52 , a resistor R 54 , a zener diode Z 2 , a diode D 53  and a resistor R 55 . The resisters R 51 , R 52  and R 53  provide a voltage divider network  442  with diode D 51  between the negative rail  441  and the junction between rectifying diodes D 5  and D 6  of the rectifier  410 . The capacitor C 51  in conjunction with resistor R 52  provides a high frequency filter. The capacitor C 52  is in parallel with resistor R 53  and when an AC signal is present at AC input terminal  424   a , diode D 51  allows current to flow from the negative rail to the junction between diodes D 5  and D 6  of the rectifier  410  which in turn provides a negative voltage on capacitor C 52  at the junction of the capacitor C 52  and diode D 51 .  
     [0091] The junction between the capacitor C 52  and diode D 51  is connected in series with the diode D 52 , the resistor R 54 , the zener diode Z 2 , the diode D 3  and the resistor R 55  to the base of transistor Q 6 . In operation, when the negative voltage on the capacitor C 52  rises above a predetermined threshold, the zener diode Z 2  triggers and the switching element Q 6  transitions to the non-conductive state. This effectively enables the second switching element Q 4  of the second inverter to transition to the conductive state, thereby enabling the second inverter  416 .  
     [0092] It should be appreciated that the zener diode Z 1  is effective to provide a reference voltage to the gate of the switching element or transisitor Q 6  to turn off transistor Q 6  ensuring the inverter  416  is enabled.  
     [0093] It should be appreciated that the voltage divider network and series connected elements can be varied in a manner known in the art depending on the switching rates and necessary electrical characteristics required to properly bias the switching elements.  
     [0094]FIGS. 12A and 12B provide detailed circuit diagrams of a 110 volt implementation of the ballast  400  of FIG. 11. These detailed diagrams are depicted for illustrative purposes and are not intended to limit the scope of the invention.  
     [0095] It is understood that the number of lamps can vary without departing from the scope of the invention. For example, first and second lamps coupled in series can be energized independently from third and fourth lamps coupled in series across first and second terminals of an inverter. It is further understood that the signal paths used to couple the signal detection circuits and the lamp control circuits can include conductive pathways, optical couplings, inductive couplings, and other such connections known to one of ordinary skill in the art. In addition, one of ordinary skill in the art will readily appreciate that other types of switching elements can be substituted for those shown and described herein and that the particular circuit arrangements can be modified.  
     [0096] One skilled in the art will appreciate further features and advantages of the invention based on the above-described embodiments. Accordingly, the invention is not to be limited by what has been particularly shown and described, except as indicated by the appended claims. All publications and references cited herein are expressly incorporated herein by reference in their entirety.