Patent Publication Number: US-11644547-B2

Title: Time-of-light sensing device and method thereof

Description:
BACKGROUND 
     Time-of-flight (ToF) sensor are used in a wide range of applications to measure a distance from the ToF sensor to an object. Time-correlated single photon counting (TCSPC) methodology may be used to assist the ToF sensor to achieve a high precision rate. However, the TCSPC methodology is power hungry and it requires large data throughput. 
     As demand for miniaturization, low power consumption and low data throughput of a sensing device has grown recently, there has grown a need for more advanced sensing device and a sensing method that have low power consumption and low data throughput. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. 
         FIG.  1    is a two-dimensional schematic diagram illustrating a sensing device in accordance with some embodiments. 
         FIG.  2    is a three-dimensional schematic diagram illustrating a sensing device with column-wise time-to-digital converters (TDCs) in accordance with some embodiments. 
         FIG.  3    is a three-dimensional schematic diagram illustrating a sensing device with pixel-wise TDCs in accordance with some embodiments. 
         FIG.  4 A  a diagram illustrating data processing steps of a multiple TCSPC methodology in accordance with some embodiments. 
         FIG.  4 B  is a diagram illustrating ideal and simulated full-width half maximum (FWHM) values in relation to a number of raw data frames for each pre-processing operation in accordance with some embodiments. 
         FIGS.  4 C through  4 E  illustrate exemplary histograms obtained by raw data frames and pre-processed data frames using a multiple TCSPC methodology in accordance with some embodiments. 
         FIGS.  5 A through  5 B  illustrate connections among a delay locked loop (DLL), a multiplexer and a TDC in different cycles of a pseudo multiple TCSPC methodology in accordance with some embodiments. 
         FIG.  5 C  is a diagram illustrating data processing steps of a pseudo multiple TCSPC methodology in accordance with some embodiments. 
         FIG.  5 D  illustrates an exemplary histogram obtained by a pseudo multiple TCSPC methodology in accordance with some embodiments. 
         FIG.  5 E  illustrates FWHM values obtained by using a multiple TCSPC methodology and a pseudo multiple TCSPC methodology in relation to a number of raw data frames for each pre-processing operation in accordance with some embodiments. 
         FIG.  6    is a flowchart diagram illustrating a method for outputting a depth result in accordance with some embodiments. 
         FIG.  7    is a flowchart diagram illustrating a method for outputting a depth result in accordance with some embodiments. 
     
    
    
     DESCRIPTION OF THE EMBODIMENTS 
     The following disclosure provides many different embodiments, or examples, for implementing different features of the present disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. 
     Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature&#39;s relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. 
       FIG.  1    illustrates a two-dimensional schematic diagram of a sensing device  100  in accordance with some embodiments. The sensing device  100  may include an array of single photon avalanche diodes (SPADs)  130  being coupled to a readout circuit  110 . The SPAD array  130  is configured to detect reflected light from an object (not shown) being illuminated by light pulses, thereby measuring a time-of-flight (ToF) value from the object to the sensing device  100 . The SPAD array  130  may include a plurality of SPAD pixels  131  arranged in columns and rows of the SPAD array  130 , and each of the SPAD pixels  131  could be considered as a sensing pixel (or a sensing cell) of the SPAD array  130 . In some embodiments, the sensing device  100  further includes a light source (not shown) configured to emit light pulses to an object (not shown). The light source could be a laser light source that emits laser pulses to the object, but the disclosure is not limited to any specific type of light source. 
     In some embodiments, ToF value is calculated according to a reference time when the light pulses are emitted by the light source and an arrival time when the reflected light is received by the SPAD array  130 . The SPAD array  130  may capture at least one single photon that arrives the SPAD array  130  from the reference time when the light pulse is emitted. The ToF value is used to determine a distance from the sensing device  100  to the object, and a depth results or a depth map of the object may be determined according to the distances from the sensing device  100  to dots of the object. 
     In some embodiments, the readout circuit  110  may include a plurality of TDCs  111 _ 1  through  111 _N, a digital integrator  112 , a delay locked loop (DLL)  113 , a multiplexer  114  and a digital controller  115 . The TDCs  111 _ 1  through  111 _N are configured to convert an event of a detection of at least one single photon by SPAD array  130  to time-stamped digital outputs. Each of the TDCs  111 _ 1  through  111 _N may include a latch and a counter. For example, the TDC  111 _ 1  includes a latch  1112 _ 1  and a counter  1114 _ 1  and the TDC  111 _N includes a latch  1112 _N and a counter  1114 _N. When the event of the detection of at least one single photon occurs, a latching operation is performed for each pulse by the latches  1112 _ 1  through  1112 _N, and a count value is incremented by the counters  1114 _ 1  through  1114 _N as a result of the latching operation. The count value may indicate the ToF value of light pulses that have been reflected at a given dot of the object. In some embodiments, the latches  1112 _ 1  through  1112 _N are used for a fine-bit conversion, and the counters  11141  through  1114 _N are used for a coarse-bit conversion. 
     The digital integrator  112  is configured to integrate or sum up the count values in each of the TDCs  111 _ 1  through  11 _N in each cycle to generate a raw data frame D 1  for each cycle. As such, in n cycles, n raw data frames D 1  are outputted by the readout circuit  110 . 
     The DLL  113  is configured to generate a plurality of delay clock signals from a reference clock signal, and output the generated delay clock signals to output terminals T 11  through T 14  of the DLL  113 . A number of the output terminals of the DLL  113  is determined according to designed needs, and is not limited to what is shown in  FIG.  1   . The generated delay clock signals may be provided to the TDCs  111 _ 1  through  111 _N via the multiplexer  114 . The multiplexer  114  is configured to select a sub-group of M latches among N latches of the TDCs  111 _ 1  through  11 _N, and to select a sub-group of M output terminals among the output terminals T 11  through T 14  of the DLL  113  to be coupled to the selected sub-group of M latches. It should be noted that M and N are natural numbers; M is smaller than N; and N could be a total number of latches of the TDCs  111 _ 1  through  111 _N. A selection of the sub-group of M latches among N latches of the TDCs  111 _ 1  through  111 _N and a selection of the sub-group of M output terminals among the output terminals of the DLL  113  may be performed by controlling switches SW 1  through SW 4  of the multiplexer  114  according to control signals (not shown). In some embodiments, the control signals are generated by the digital controller  115 . The digital controller  115  may include logic circuits that have a function of generating the control signals to control the operation of the multiplexer  114 . 
     In some embodiments, the multiplexer  114  is further configured to rotate in turn a connection order between the sub-group of M latches and the sub-group of M output terminals of DLL  113  in each cycle. In other words, the connection between the latches of the TDCs  111 _ 1  through  111 _N and the output terminals of DLL  113  may be shifted in each cycle. The rotation is illustrated as an arrow R in  FIG.  1   . For example, in a first cycle, two among output terminals T 11  through T 14  of the DLL  113  are selected to couple to two certain latches among N latches of the TCDs  111 _ 1  through  111 _N. In next cycle, other two of the output terminals T 11  through T 14  of the DLL  113  are selected to couple to the two certain latches among N latches of the TDCs  111 _ 1  through  111 _N. 
     In some embodiments, the sensing device  100  may further include a row controller  120 , a pre-processing circuit  140  and a post-processor  150 . The row controller  120  is coupled to the SPAD array  130  and is configured to control operations of the SPAD array  130 . The pre-processing circuit  140  receives the raw data frames D 1  from the readout circuit  110 , and is configured to perform a pre-processing operation to the raw data frames D 1  to generate pre-processed data frames D 2 . In some embodiments, the pre-processing circuit  140  may receive n raw data frames D 1  from the readout circuit  110  and generate k pre-processed data frames D 2 , wherein k is smaller than n. 
     The post-processor  150  receives the k pre-processed data frames D 2  from the pre-processing circuit  140 , and is configured to generate a histogram based on the k pre-processed data frames D 2 . The post-processor  150  is further configured to analyze the histogram to generate a depth result or a depth map of the object. 
       FIG.  2    illustrates a three-dimensional schematic diagram of a sensing device  200  with column-wise TDCs in accordance with some embodiments. The sensing device  200  may include a SPAD pixel array  230 , a row controller  220 , a plurality of TDCs  211 _ 1  through  211 _N, an integrator  212 , a DLL  213 , a multiplexer  214  and a digital controller  215 . The TDCs  211 _ 1  through  211 _N include latches  2112 _ 1  through  2112 N and counters  2114 _ 1  through  2114 _N. The SPAD pixel array  230 , the row controller  220 , the plurality of TDCs  211 _ 1  through  211 _N, the integrator  212 , the DLL  213 , the multiplexer  214  and the digital controller  215  are similar to the SPAD pixel array  130 , the row controller  120 , the plurality of TDCs  111 _ 1  through  111 _N, the integrator  112 , the DLL  113 , the multiplexer  114  and the digital controller  115  in  FIG.  1   , thus the detailed description about these components are omitted hereafter. 
     In  FIG.  2   , the SPAD array  230  is formed in a layer that is different from the layer that includes the row controller  220 , the plurality of TDCs  211 _ 1  through  211 _N, the integrator  212 , the DLL  213 , the multiplexer  214  and the digital controller  215 . As such, the SPADs  231  of the SPAD array  230  is coupled to the row controller  220  and the TDCs  211 _ 1  through  211 _N via hybrid bonds HB. In some embodiments, the TDCs  211 _ 1  through  211 _N are column-wise TDCs, where each of the TDCs  211 _ 1  through  211 _N is corresponded to a column of the SPADs of the SPAD array  230 . 
       FIG.  3    illustrates a three-dimensional schematic diagram of a sensing device  300  with pixel-wise TDCs in accordance with some embodiments. The sensing device  300  may include a SPAD pixel array  330 , a row controller  320 , a plurality of TDCs  311 _ 11  through  311 _WH, an integrator  312 , a DLL  313 , a multiplexer  314  and a digital controller  315 . The TDCs  311 _ 11  through  311 _WH include latches  3112 _ 11  through  3112 _WH and counters  3114 _ 11  through  2114 _WH, in which W and H are naturals numbers. The SPAD pixel array  330 , the row controller  320 , the integrator  312 , the DLL  313 , the multiplexer  314  and the digital controller  315  are similar to the SPAD pixel array  230 , the row controller  220 , the integrator  212 , the DLL  213 , the multiplexer  214  and the digital controller  215  in  FIG.  2   , thus the detailed description about these components are omitted hereafter. 
     A difference between  FIG.  2    and  FIG.  3    is that the TDCs  311 _ 11  through  311 _WH are pixel-wise TDCs, where each of the TDCs  311 _ 11  through  311 _WH corresponds to one of the SPADs  331  in the SPAD array  330 . Since the TDCs  311 _ 11  through  311 _WH and the SPAD array  330  are disposed in different layers, hybrid bonds HB may be used to connect the SPADs  331  of the SPAD array  330  to the TDCs  311 _ 11  through  311 _WH. 
       FIG.  4 A  illustrates data processing steps of a multiple TCSPC methodology in accordance with some embodiments. In step S 41 , n raw data frames which are outputted by the readout circuit (e.g., readout circuit  110  in  FIG.  1   ) are obtained. In some embodiments, then raw data frames have a full TDC resolution. In steps S 42  and S 43 , a pre-processing operation is performed to the n raw data frames to obtain k pre-processed data frames, wherein k is smaller than n. The pre-processing operation may be an averaging operation which is configured to average data in each m raw data frames among the n raw data frames to generate a pre-processed data frame, where m is smaller than n. In some embodiments, n raw data frames are divided into k groups, where each of the k groups includes m raw data frames. As such, k is equal to a ratio of n and m. The data in m raw data frames in each of the k groups are averaged to generate a pre-processed data frame. In step S 44 , a histogram is generated according to the k pre-processed data frames, and a depth result is obtained by analyzing the histogram. Since the n raw data frames is pre-processed to output k pre-processed data frames and the k pre-processed data frames are transferred and processed the subsequent processes, the sensing device may achieve the effect of low power consumption and reduced throughput of data. 
       FIG.  4 B  illustrates ideal and simulated FWHM values in relation to a number of raw data frames for each pre-processing operation (m raw data frames) in accordance with some embodiments. As shown in  FIG.  4 B , the ideal and simulated FWHM values reduce as the value of m increases; and the simulated FWHM value is very closed to the ideal FWHM value when the value of m is smaller than a threshold value TH 1 . Based on the relation between the FWHM values of the histogram generated by the pre-processed data frames and the value of m (e.g., number of raw data frames for each pre-processing operation), one may determine appropriate value of m for different designed needs. 
       FIGS.  4 C through  4 D  illustrate exemplary histograms and FWHM values obtained by raw data frames ( FIG.  4 C ) and averaged data frames ( FIGS.  4 D and  4 E ) in accordance with some embodiments. Referring to  FIG.  4 C , a histogram H 1  obtained from the raw data frames are illustrated, where the horizontal axis indicates bins of the histogram H 1  and the vertical axis indicate count values for each bin of the histogram H 1 . In some embodiments, the bins of the histogram H 1  may indicate time values. Referring to  FIG.  4 D , a histogram H 2  obtained from the averaged data frames are illustrated, where each of the averaged data frame are obtained by averaging two raw data frames (e.g., m=2). As shown in  FIGS.  4 C and  4 D , the FMHM value FWHM_ 2  in  FIG.  4 C  is smaller than the FMHM value FWHM_ 1  in  FIG.  4 B  as a result of the pre-processing operation (e.g., averaging operation). Referring to  FIG.  4 E , a histogram H 16  obtained from the averaged data frames are illustrated, where each of the averaged data frame are obtained by averaging sixteen raw data frames (e.g., m=16). 
     As shown in  FIGS.  4 C through  4 E , the FMHM value FWHM_ 16  in  FIG.  4 E  is smaller than FWHM_ 2  in  FIG.  4 D  and FWHM_ 1  in  FIG.  4 C . In some embodiments, a changing trends of the FWHM values follows the square root of the number of raw data frames to be averaged to generate one pre-processed data frame (√{square root over (m)}). For example, a ratio of the FWHM_ 3  over FWHM_ 1  is corresponded to a square root of a number of raw data frames to be averaged to generate one pre-processed data frame (√{square root over (m)}). In some embodiments, in the multiple TCSPC data, the data in each m raw data frames are averaged to one pre-processed data frame. As such, the data through put may be improved without changing the baseline structure of the TDCs in the sensing device. 
       FIG.  5 A  illustrates connections between a DLL  513  and a TDC  511  via a multiplexer  514  in a first cycle of a pseudo multiple TCSPC methodology in accordance with some embodiments. The DLL  513  may include a plurality of delay elements  5131 _ 1  through  5131 _ 4 , a phase detector  5133  and a charge pump  5135 . The delay elements  5131 _ 1  through  5131 _ 4  are configured to generate a plurality of delay clock signals CLK 1  to CLK 4  from a reference clock signal CLK 0 . It is noted that a number of delay elements in the DLL  513  and a number of delay clock signals generated by the DLL  513  are determined according to designed needs, and are not limited to what is illustrated in  FIG.  5 A . 
     The phase detector  5133  is configured to detect a phase difference of signals (e.g., CLK 0  and CLK 4 ) inputted to the phase detector  5133  and to generate UP and DN signals. The UP and DN signals are provided to the charge pump  5135  to control an output voltage outputted by the charge pump  5135 . For example, the UP signal controls the charge pump  5135  to increase its output voltage and the DN signal controls the charge pump  5135  to reduce its output voltage. The delay clock signals CLK 1  through CLK 4  generated by the DLL  513  are provided to the multiplexer  514 , and the multiplexer may select some delay clock signals among the clock signals CLK 1  through CLK 4  to be provided to the TDC  511  according to control signals. 
     The TDC  511  may include a plurality of latches  5112 _ 1  through  5112 _ 4  and counters  4114 , wherein each of the latches  5112 _ 1  through  5112 _ 4  receives a start signal or a stop signal. The start signal indicates the emission of light pulses from a light source to an object, and the stop signal indicates the arrival of reflected light from the object to the SPAD array. The multiplexer  514  may select a sub-group of latches among the latches  5112 _ 1  through  5112 _ 4  of the TDC  511  to receive the selected delay clock signals. In  FIG.  5 A , the delay clock signals CLK 1  and CLK 3  are selected to be coupled to the selected sub-group of two latches  5112 _ 1  and  5112 _ 3 , respectively in the first cycle. Meanwhile, the delay clock signals CLK 2  and CLK 4  are not supplied to the latches of the TDC  511  in the first cycle. 
       FIG.  5 B  illustrates a connection between the DLL  513  and the TDC  511  via the multiplexer  514  in a second cycle of a pseudo multiple TCSPC methodology in accordance with some embodiments. In the second cycle, the multiplexer  514  selects the delay clock signals CLK 2  and CLK 4  to be coupled to the selected sub-group of two latches  5112 _ 1  and  5112 _ 3 . Meanwhile, the delay clock signals CLK 1  and CLK 3  are not supplied to latches of the TDC  511  in the second cycle. In  FIGS.  5 A and  5 B , the latches  5112 _ 2  and  5112 _ 4  are not used to generate the raw data frames, and the latches  5112 _ 2  and  5112 _ 4  could be disabled to save power consumption. 
     As shown in  FIGS.  5 A and  5 B , only parts of the latches of the TDC  511  are selected to receive delay clock signals from the DLL  513  so as to generate the raw data frames with coarse TDC resolution, and the unselected latches of the TDC  511  are disabled to save power consumption. It should be noted that the coarse TDC resolution is lower than a full TDC resolution. As the example shown in  FIGS.  5 A and  5 B , coarse bits Bit 00  and Bit 10  among the full bits Bit 00 , Bit 01 , Bit 10  and Bit 11  are selected to generate the raw data frames, while the latches associated with bits Bit 01  and Bit 11  are disabled. In some embodiments, the counter may generate some bits which is combined with the coarse bits (e.g., Bit 00  and Bit 10 ) generated by the latching operations to generate the raw data frames. 
       FIG.  5 C  illustrates data processing steps of a pseudo multiple TCSPC methodology in accordance with some embodiments. In step S 51 , n raw data frames with coarse TDC resolution which are outputted TDCs (e.g., TDC  511  in  FIGS.  5 A and  5 B ) are obtained. In steps S 52  and S 53 , a pre-processing operation is performed to the n raw data frames to obtain k pre-processed data frames, wherein k is smaller than n. The pre-processing operation may be a summing operation which is configured to sum up data in each m raw data frames among the n raw data frames of data to generate a pre-processed data frame. In some embodiments, n raw data frames are divided into k groups, where each of the k groups includes m frames. As such, k is equal to a ratio of n and m. The data in m raw data frames in each of the k groups are summed up to generate a pre-processed data frame. In step S 54 , a histogram is generated according to the k pre-processed data frames; and a depth result is obtained by analyzing the histogram. An exemplary histogram H_C obtained by using the pseudo multiple TCSPC methodology is illustrated in  FIG.  5 D , where the FWHM value FWHM_C and a peak value P of the histogram may be obtained may analyzing the histogram H_C. Since the n raw data frames have coarse TDC resolution and m raw data frames are pre-processed (e.g., summed up) before performing subsequent processes, the power consumption and data throughput of the sensing device is reduced. 
       FIG.  5 E  illustrates ideal and simulated FWHM values obtained by using the multiple TCSPC methodology (illustrated as “ideal MS” and “simulated MS” in  FIG.  5 E ) and simulated FWHM values obtained by using pseudo multiple TCSPC methodology (illustrated as “simulated PMS” in  FIG.  5 E ) in relation to a number of raw data frames for each pre-processing operation in accordance with some embodiments. As shown in  FIG.  5 E , the simulated FWHM values obtained by the multiple TCSPC methodology and the FWHM values obtained by the pseudo multiple TCSPC methodology reduce as the number of raw data frames (e.g., m raw data frames) for each pre-processing operation increase. When the number of raw data frames for each pre-processing operation reaches a threshold TH 2 , the FWHM values obtained by the multiple TCSPC methodology start diverging from the ideal FWHM values. When the of raw data frames for each pre-processing operation reaches a threshold TH 1 , the FWHM values obtained by using the pseudo multiple TCSPC methodology start diverging from the ideal FWHM values. By analyzing the relation between the number of raw data frames for each pre-processing operation and the FWHM values, it may determine a desired number of raw data frames for each pre-processing operation. 
     Referring to Table 3, differences among a TCSPC methodology, a multiple TCSPC methodology and a pseudo multiple TCSPC methodology are illustrated in accordance with some embodiments. In n cycles, each of the TCSPC, multiple TCSPC and pseudo multiple TCSPC methodologies emits one light pulse per cycle. In TCSPC methodology, there is no sub-grouping or pre-processing operation, while the multiple TCSPC and pseudo multiple TCSPC methodologies group each m raw data frames to one sub-group and performs a pre-processing operation to m raw data frames for each sub-group. In some embodiments, the multiple TCSPC methodology may perform an averaging operation to each m raw data frames to generate one pre-processed data frame, while the pseudo multiple TCSPC methodology may perform a summing up operation to each m raw data frames to generate one pre-processed data frames. As a result, the frames number for generating histogram in the multiple TCSPC methodology and the pseudo multiple TCSPC methodology are n/m (n divided by m); and the FWHM values of the multiple TCSPC methodology and the pseudo multiple TCSPC methodology are Width/√{square root over (m)}. In other words, the FWHM values are reduced by √{square root over (m)}; and the throughput is reduced by m for the multiple TCSPC methodology and the pseudo multiple TCSPC methodology. 
     
       
         
           
               
               
               
               
             
               
                 TABLE 3 
               
               
                   
               
               
                   
                   
                   
                 Pseudo 
               
               
                   
                 TCSPC 
                 Multiple TCSPC 
                 Multiple TCSPC 
               
               
                   
               
             
            
               
                 Cycle 
                 n 
                 n 
                 n 
               
               
                 Light Pulse/Cycle 
                 1 
                 1 
                 1 
               
               
                 Frames per Sub-Group 
                 1 
                 m 
                 m 
               
               
                 Data pre-Processing 
                 No 
                 Yes (e.g., 
                 Yes (e.g., 
               
               
                   
                   
                 averaging m raw 
                 summing up m raw 
               
               
                   
                   
                 data frames) 
                 data frames) 
               
               
                 Full-Width of Half 
                 Width 
                 Width/{square root over (m)} 
                 Width/{square root over (m)} 
               
               
                 Maximum (FWHM) 
                   
                   
                   
               
               
                 Data frames for 
                 n 
                 n/m 
                 n/m 
               
               
                 histogram 
               
               
                   
               
            
           
         
       
     
       FIG.  6    illustrates a method for outputting a depth result in accordance with some embodiments. In step S 610 , alight pulse is emitted in each of n cycles. The light pulse may be a laser light pulse which is emitted from a laser source, but the disclosure is not limited to any specific type of light and light source. In step S 620 , a time-of-flight value in each of the n cycles is measured based on a reflected light of the light pulse to generate n raw data frames. The reflected light could be the light reflected from an object when the light pulse hit the object. In some embodiments, the n raw data frame may be generated by a readout circuit having TDCs, and the raw data frames may have a full resolution of the TDCs. In step S 630 , a pre-processing operation is performed to the n raw data frames to generate k pre-processed data frames, wherein k is a natural number and k is smaller than n. In some embodiments, the n raw data frames are grouped in to sub-groups, where each of the sub-groups include m raw data frames. The pre-processing operation could be an averaging operation that is performed to average data in each m raw data frames to generate one pre-processed data frame. In step S 640 , a histogram is generated according to the k pre-processed data frames and the histogram to is analyzed output a depth result. In some embodiments, a peak value of the histogram and a FWHM value of the histogram are obtained during the analyzing process to generate the depth result and a timing jitter value. 
       FIG.  7    illustrates method for outputting a depth result in accordance with some embodiments. In step S 710 , a light pulse is emitted in each of n cycles. In step S 720 , a time-of-flight value with a resolution of m is measured in each of n cycles based on a reflected light of the light pulse to generate n raw data frames. In some embodiments, the n raw data frames are generated by a readout circuit including TDCs, where the resolution of m is a coarse resolution which is smaller than the full resolution of the TDCs in the readout circuit. In step S 730 , a pre-processing operation is performed to n raw data frames to generate k pre-processed data frames, wherein m, n, k are natural numbers and k is smaller than n. In some embodiments, the n raw data frames are divided into sub-groups, each of the sub-group may have m number of raw data frames. The pre-processing operation could be a summing operation that is configured to sum up the data of m raw data frames in each of the sub-groups to generate one of the pre-processed data frames. In step S 740 , a histogram is generated according to the k pre-processed data frames and the histogram is analyzed to output a depth result. In some embodiments, a peak value of the histogram and a FWHM value of the histogram are obtained during the analyzing process to generate the depth result and a timing jitter value. 
     According to some embodiments, a sensing device including a delay locked loop circuit, a plurality of time-to-digital converters, a multiplexer and a digital integrator is introduced. The delay locked loop circuit is configured to output a plurality of delay clock signals through output terminals of the delay locked loop circuit. The plurality of time-to-digital converters include a plurality of latches. The multiplexer is configured to select a sub-group of m latches among the latches of the plurality of time-to-digital converters to be connected to the output terminals of the delay locked loop circuit according to a control signal. The digital integrator is coupled to the plurality of time-to-digital converters and is configured to integrate digital outputs generated by the time-to-digital converters in each of n cycles to generate n raw data frames, wherein m and n are natural numbers, and the n raw data frames are used to generate a depth result. 
     According to some embodiments, a method includes steps of emitting a light pulse in each of n cycles; measuring a time-of-flight value in each of the n cycles to generate n raw data frames; performing a pre-processing operation to the n raw data frames to generate k pre-processed data frames, wherein n and k are natural numbers, and k is smaller than n; and generating a histogram according to the k pre-processed data frames and analyzing the histogram to output a depth result. 
     According to some embodiments, a method includes steps of emitting a light pulse in each of n cycles; measuring a time-of-flight value with a resolution of min each of the n cycles to generate n raw data frames; performing a pre-processing operation to n raw data frames to generate k pre-processed data frames, wherein m, n and k are natural numbers, and k is smaller than n; and generating a histogram according to the k pre-processed data frames and analyzing the histogram to output a depth result. 
     The foregoing has outlined features of several embodiments so that those skilled in the art may better understand the detailed description that follows. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.