Patent Publication Number: US-4219962-A

Title: Toy vehicle

Description:
FIELD OF THE INVENTION 
     The present invention relates to toy vehicles, and in particular, to a toy car including provisions for realistically simulating the sounds associated with a vehicle. 
     BACKGROUND OF THE INVENTION 
     Toy vehicles which generate sound effects are well known. For example, toy vehicles including mechanical sound generators driven by the vehicle motor are described in U.S. Pat. No. 3,190,034 (Ryan, 1965), U.S. Pat. No. 3,391,489 (Lohr et al, 1968) and U.S. Pat. No. 3,441,236 (Fileger et al, 1968). Similarly, model train engines often include means for simulating the sound of the locomotive. Examples of toy locomotives are described in U.S. Pat. No. 3,664,060 (Longnecker, 1972) and U.S. Pat. No. 3,466,797 (Hellsund, 1969). Another toy vehicle providing sound effects is described in U.S. Pat. No. 3,080,678 (Girz, 1963). Switching devices cooperate with the toy drive mechanism, or with a steering mechanism to selectively apply various voltages to diaphragm-type signalling devices for the purpose of producing a musical cord or other combinations of simultaneously sounding tones. Other toys, such as that described in U.S. Pat. No. 3,160,983 (Smith et al, 1964) include provisions for generating sound effects only during such time periods as the toy is turning. 
     In general, toy vehicles including electrical apparatus for generating an audible simulation of an engine sound of a frequency in accordance with vehicle speed are also well known. For example, in various of the locomotive toys, the locomotive sound is generated by periodically enabling an oscillator with a cam switch coupled to the locomotive wheel. Another example is described in U.S. Pat. No. 3,425,156 (Field, 1969). The Field patent describes a toy vehicle which runs on tracks (a slot car) including a relaxation oscillator which is driven by the voltage on the track through an optical link. The sound level and frequency of the engine simulation is thus varied in accordance with the magnitude of the track voltage. 
     Apparatus for simulating engine sounds adapted for mounting on toy riding vehicles such as bicycles or the like, are also generally known. Examples of such systems are described in U.S. Pat. No. 3,160,984 (Ryan, 1964) and U.S. Pat. No. 3,735,529 (Roslen, 1973). 
     SUMMARY OF THE INVENTION 
     The present invention provides apparatus for realistically simulating the sound of an engine. A signal indicative of the speed of the vehicle is generated and applied to an RC timing network. The output signal of the timing network drives an oscillator circuit, the output of which is used to derive the engine noise simulation. Means are provided to sense acceleration and deceleration of the vehicle and to change the time constant of the RC network. The RC network charges in accordance with a first time constant during periods of acceleration and discharges in accordance with a second time constant during periods of deceleration of the vehicle. The discharging is preferably more rapid than charging. The effect of such change in charging and discharging time constants is to provide a realistic simulation of engine sounds. 
     Further, in accordance with another aspect of the invention, a still more realistic sound can be provided by deriving a plurality of tones from the oscillator output signal and generating different combinations of tones during periods of acceleration and deceleration. 
     In addition, in accordance with another aspect of the present invention, a toy vehicle may be provided which simulates not only engine sound but the screeching of tires, the sounds of a crash, and a siren. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     A preferred exemplary embodiment of the present invention will hereinafter be described in conjunction with the appended drawing wherein like numerals denote like elements and: 
     FIG. 1 is a pictorial schematic of a toy vehicle in accordance with the present invention; 
     FIG. 1a is a block diagram of the electronic circuitry 18 of FIG. 1; 
     FIG. 2 is a schematic diagram of the electronic circuit for generating the engine simulation signals; 
     FIG. 3 is a schematic of an electronic circuit for generating signals for simulation of the noises of a crash and the noises of squealing tires; 
     FIG. 4 is a schematic diagram of a suitable circuit for generating signals to simulate the sound of a siren; and 
     FIG. 5 is a schematic diagram of priority gating logic and a transducer for use with the circuits of FIGS. 2, 3 and 4. 
    
    
     Referring now to FIGS. 1 and 1a, there is shown a toy vehicle 10 in accordance with the present invention. Toy vehicle 10 includes a body 12 with wheels 14. Toy 10 is suitably of a size that allows for pushing by hand, although it should be appreciated that the present invention can readily be adapted to larger riding toys such as bicycles, or the like. 
     Suitable means 16 for generating a signal indicative of the speed of the vehicle are disposed within body 12 speed signal generator 16 may be maintained body 12 in any conventional manner. The speed signal generator 16 is suitably a conventional DC motor having the shaft thereof mechanically coupled to the axel of wheels 14. The mechanical coupling can be effected in any conventional manner, such as, for example, suitable gearing, well known in the art, and generally indicated as 15. Similarly, the axels of wheels 14 may be coupled to body 12 in any of the conventional methods well known in the art. Speed signal generator 16 will be more fully described in conjunction with FIG. 2. 
     The speed signal from generator 16 is applied to an electronic circuit 18, suitably formed as a single integrated chip. As illustrated in FIG. 1a, electronic circuit 18 suitably includes respective portions for generating respective signals for simulating engine noise (20), the sound of squealing tires and the sounds of a crash (22) and the sounds of a siren (24). The respective simulation signals are suitably applied to priority gating logic 26, also suitably included in the single integrated circuit. The output signals of priority gating logic 26 are applied to a suitable transducer 28 such as a speaker. Engine simulation circuitry 20, tire and crash simulation circuitry 22 and siren simulation circuitry 24 will hereinafter be described in more detail in conjunction with FIGS. 2, 3 and 4, respectively. Priority gating logic 26 and transducer 28 are shown in more detail in FIG. 5. 
     Referring now to FIG. 2, speed signal generator 16 suitably comprises a conventional DC motor 30 such as those generally used in battery operated toys. The shaft of motor 30 is mechanically coupled to the wheels 14 of vehicle 10 in any conventional manner such that the motor armature is rotated in accordance with rotation of wheel 14. Motor 30 therefore operates as a generator, generating a signal of a magnitude generally in accordance with the speed of the vehicle 10. 
     The negative output terminal of motor 30 is suitably positively biased with respect to ground potential to facilitate cooperation with the transistor circuits of engine noise simulator circuit 20. A resistor R1 and diode D1 are serially connected between positive potential and ground potential. The negative terminal of motor 30 is connected to the juncture between resistor R1 and diode D1. Motor 30 is thus biased 0.7 volts (the junction potential of diode D1). A capacitance (C1, C2) is coupled across the motor output terminals to smooth the speed signal by choking off RF signals in ripple. 
     The speed signal from generator 16 is applied to an RC timing circuit 32. Timing circuit 32 is suitably a simple RC network comprising resistors R2 (47 KΩ) and R3 (33 KΩ) and capacitor C3 (100 μf). Resistors R2 and R3 are serially connected between the input and output terminals of timing circuit 32. Capacitor C3 is connected from the juncture between resistors R2 and R3 to ground potential. 
     The speed signal is also applied to a circuit 34 for sensing respective states of acceleration and deceleration of vehicle 10. The speed signal is applied to a conventional differentiator circuit 36. Differentiator circuit 36 is suitably formed of a capacitor C5 (10 μf) and resistor R9 (200 KΩ). The speed signal is, in effect, applied across the serial combination of capacitor C5 and R9 and the differentiated output signal taken across resistor R9. The differentiated signal is applied to a conventional Darlington amplifier 38. Amplifier 38 is biased by resistors R10 (1 MΩ) and R11 (10 KΩ). Positive output signals from differentiator 36 (indicative of increasing speed) cause the Darlington amplifier 38 to saturate (low level output). Similarly, negative output signals from differentiator 36 (indicative of decreasing speed) cause Darlington amplifier 38 to cut off (high level output). The output signal of Darlington amplifier 38 is applied to a conventional Schmitt trigger circuit 40. The output signal of Schmitt trigger circuit 40 is indicative of the respective acceleration or deceleration state of vehicle 10. 
     The effective time constant of timing circuit 32 is selectively changed during deceleration periods of vehicle 10. A unidirectional conductive device (diode) D2 and resistor R14 (33 KΩ) is connected between Schmitt trigger circuit 40 and the juncture between resistors R2 and R3 and capacitor C3 in timing circuit 32. When the speed signal from motor 30 decreases, differentiator 36 generates a negative voltage to cut off Darlington amplifier 38. The resultant high level output signal for Darlington amplifier 38 causes Schmitt trigger circuit 40 to generate a low level output signal. The low level output signal by Schmitt trigger 40, in effect, renders diode D2 conductive. Resistor R14 is therefore functionally connected into timing circuit 32. Thus, during deceleration periods, the time constant of circuit 32 is determined by capacitor C3 and resistors R2, R3 and R4. However, during acceleraion periods, Schmitt trigger circuit 40 generates a high level signal and resistor R14 is effectively isolated from RC network 32. Thus, RC network 32 discharges at a faster rate (in response to decreasing speed signals) than it charges (in response to increasing speed signals). 
     The output terminal of timing circuit 32 is coupled to a tone signal generator 42. Tone signal generator 42 generates an engine noise simulation signal having a frequency content in accordance with the output signal of timing circuit 32. The engine noise simulation signal is generated at terminal A, and is applied to priority gating logic 26 (FIG. 5). 
     Tone signal generator 42 suitably comprises a conventional voltage controlled oscillator (VCO) 44, a frequency divider network 46, and a combinatorial logic 48. VCO 44 is responsive to the output signal of timing circuit 32 and thus generates an output signal having a frequency representative of the charge on capacitor C3. The VCO output signal is applied to divider network 46, which generates a plurality of tone signals having frequencies in respective predetermined relationship with the VCO output signal. In the preferred embodiment, divider network 46 includes a divide by eleven circuit 49 and a counter 58. 
     Divide by eleven circuit 49 is formed of a conventional binary counter 50, a conventional NAND gate 52, and two conventional D-type flip-flops 54 and 56. Output signals from the third state Q3 (÷eight) and fourth stage (÷16) of counter 50 are applied to the input terminals of NAND gate 52. The output of NAND gate 52 is applied to D input terminal of D-type flip-flop 54. D-type flip-flop 54 is clocked by the VCO output signal. The Q output of D flip-flop 54 is applied to the reset terminal of counter 50 and to the clock terminal of D flip-flop 56. The Q output of flip-flop 56 is tied back to the D input thereof, and provides an output signal having a frequency equal to the VCO output frequency divided by eleven. 
     Counters 50 and 58 are suitably National Semiconductor CD4040 12 stage ripple carry binary counter/dividers. D-type flip-flops 54 and 54 are suitably National Semiconductor MM74C74 dual D flip-flops. Binary counter 58 provides respective tone signals having frequencies equal to VCO output frequency divided by respective multiples of two. 
     The various tone signals are selectively combined by combinatorial logic 48 to provide an engine noise simulation signal of desired tonal quality. The output signals from divide by eleven frequency divider 49 and the Q4 output of counter 58 are applied to the respective input terminals of a two input NOR gate 60. The output of NOR gate 60 and the Q5 (÷32) output terminal of counter 58 are connected to the respective input terminals of a conventional two input exclusive OR gate 62. The output of exclusive OR gate 62 is applied to one input terminal of an exclusive OR gate 64. The other input terminal of exclusive OR gate 64 is receptive of a signal indicative of the acceleration/deceleration state of vehicle 10, derived from the output signal of sensor circuit 34, as will be explained. The output terminal of exclusive OR gate 64 is applied to one input of another exclusive OR gate 66. The other input terminal of exclusive OR gate 66 is connected to the Q4 output of counter 50 in divide by eleven circuit 49. Exclusive OR gate 66 provides the engine noise simulation signal (terminal A). 
     To provide a more realistic engine sound simulation, it is desirable that the engine sound have different tonal qualities during acceleration and deceleration states. To this end, the output signal of Schmitt trigger 40 of sensing circuit 34 is applied (through a NOR gate 68, as will be explained) to one input terminal of a NOR gate 70 in combinatorial logic 48. The other input terminal of NOR gate 70 is connected to the Q5 (÷32) output of binary counter 58. NOR gate 70 is enabled or inhibited in accordance with the acceleration/deceleration state of vehicle 10 by the signal from sensor 34. The signal to the second input terminal of NOR gate 68 is generally zero (as will be explained). Accordingly, low level output signal generated by Schmitt trigger 40 during deceleration periods cause a high level signal to be applied to one terminal of NOR gate 70, thus inhibiting the gate. Thus, during periods of deceleration, the combination of tones passed by exclusive OR gate 64 is essentially the signals passed by exclusive OR gate 62. However, during periods of acceleration, a high level signal is generated by Schmitt trigger 40. Accordingly, NOR gate 68 is inhibited and a low level signal is applied to the input terminal of NOR gate 70. The output state of NOR gate 70 is therefor controlled by the signals from the Q5 output of counter 48. Thus, during periods of deceleration an extra tonal component is interjected into the engine simulation sound through exclusive OR gate 64. The extra tonal component in the preferred embodiment, in effect, cancels the tone signal from the Q5 (÷32) output applied through exclusive OR gate 62. 
     In accordance with another aspect of the present invention, remote engine analyzer accessory 72 may be provided. Engine analyzer accessory 72 is formed of passive components and is adapted for electrical connection into engine noise simulator circuit 20. Engine analyzer accessory 74 includes a LED 74, and a momentary contact switch 76. LED 74 is connected between first (78a) and second (78b) terminals of a conventional three terminal plug 78. The third terminal (78c) of plug 78 is connected to the second terminal (78b) through switch 76. Engine analyzer accessory 72 is selectively interconnected into circuit 20 through a conventional socket or jack 80 corresponding to plug 78. 
     When connected into circuit 20, switch 76 controls a simulation of an engine &#34;revving&#34; in neutral gear. Closure of switch 76 causes timing circuit 32 to charge in accordance with a third predetermined time constant, and enables NOR gate 70 in combinatorial logic 48 to provide the combination of tones associated with acceleration. The jack of socket 80 corresponding to plug terminal 78b is connected to the positive voltage source. The jack of socket 80 corresponding to terminal 78c is connected to the second input terminal of NOR gate 68 and, through a diode D3 and resistor R15 (56KΩ) to the juncture of capacitor C3 and resistors R2 and R3 in timing network 32. Switch 76 therefore selectively applies a positive potential to the cathode of diode D3. Diode D3 is thus rendered conductive functionally connecting resistor R15 into timing circuit 32. Accordingly, capacitor C3 charges in accordance with a third time constant determined by the respective values of R2, R3, R15 and C3. 
     It should be noted that vehicle 10 is typically motionless when the engine analyzer accessory 72 is plugged in. However, the charging of capacitor C3 through diode D3 and resistor R15 is sensed as acceleration by differentiator 36. Accordingly, Darlington amplifier 38 saturates and Schmitt trigger 40 produces a high level output signal. Thus, resistor R14 is isolated from timing circuit 32. When switch 76 is thereafter opened, the voltage source is effectively disconnected from timing circuit 32. Accordingly, capacitor C3 begins to discharge. Sensing circuit 34 senses the discharge and effectively connects resistor R14 into the timing circuit. Capacitor C3 therefor discharges in accordance with the &#34;deceleration&#34; time constant. 
     Switch 76 is suitably of the push-button variety of momentary contact switch. Thus, when momentarily depressed then released, the &#34;revving&#34; of an engine while in neutral gear is simulated. As noted above, switch 76 when closed, also applies a positive voltage to one input terminal of NOR gate 68, thus enabling NOR gate 70 is combinatorial logic 48 to provide the acceleration tone combination. NOR gate 60 effects the acceleration-to-deceleration tone combination essentially instantaneously upon opening of switch 76. Thus, any deleterious effects due to the finite response time sensor 34 are avoided. 
     Engine analyzer accessory 72 also includes an LED 74 connected between plug terminals 78a and 78b. LED 74 flashes at a rate in accordance with the engine speed. The jack of socket 80 corresponding to terminal 78a is connected through a resistor (220Ω) to the collector of a transistor Q4. The emitter of transistor Q4 is connected to ground. The base of transistor Q4 is receptive of signals derived from the tone signals produced by counter 58 of divider network 46. Transistor Q4 is periodically rendered conductive by the tone signals at a rate in accordance with the VCO frequency. Thus, when engine analyzer accessory 72 is plugged into vehicle 10, LED 74 is periodically energized at a rate in accordance with the engine simulation signal. LED 74 thus represents a timing light. 
     As noted above, the engine simulation signals (provided at output terminal A) are applied to priority gating logic 26 and therefrom to transducer 28 as will hereinafter be described in conjunction with FIG. 5. It should be appreciated, however, that the engine noise simulation signals can be directly applied to transducer 28. 
     Where vehicle 10 is of the handheld type and is pushed along the ground by a child, the typical intermittent pushing motions by the child causes the simulation of the changing of gears. For example, where the car is pushed to arms length and the child temporarily slows the forward motion of vehicle 10 as he moves his own body forward, the sound of changing gears is simulated. 
     In accordance with another aspect of the present invention, a simulated crash sound and the sound of squealing tires are also selectively provided. Crash and squealing tires simulation circuit 22 is shown in FIG. 3. The crash noise simulation signal is provided by an oscillator 82, a random noise signal generator 84 and a timing circuit 86. 
     Pseudo-random signal generator 84 suitably comprises a shift register 90, and a two input exclusive OR gate 92 and inverter 94, a binary counter 96 and a D-type flip-flop 98. Shift register 90 is suitably formed of two National Semiconductor MM74C164 eight bit parallel out, serial shift registers connected in series. Shift register 90 is clocked by the signals from oscillator 82. The input terminals of exclusive OR gate 92 are coupled to respective output terminals of shift register 90. In the preferred embodiment, exclusive OR gate 92 receives signals from the third and last stages of shift register 90. The output of exclusive OR gate 92 is inverted by inverter 94 and applied to the data input terminal of shift register 90. Output signals from another of the stages of shift register 90 (the 8 stage) is applied as a clock signal to binary counter 96. Binary counter 96 is suitably a National semiconductor MM74C161 binary counter with asynchronous clear. The output signals from one stage (Q2) of counter 96 is applied as a clock signal to D-type flip-flop 98. The data input D of flip-flop 98 is connected to shift register 90 (suitably the last stage). The pseudo-random signal generated at the Q output of flip-flop 98 is applied to the base of a transistor amplifier Q5 through a resistor R22 (150KΩ). 
     Timing circuit 86 suitably comprises a crash switch 88 connected in series with a resistor R21 (47KΩ) between the voltage supply and ground potential. A capacitor C8 (30μf) is coupled across switch 88. Switch 88 is also connected through a resistor R23 (100KΩ) to the base of a transistor amplifier Q5. Transistor Q5 is biased by resistors $24 (8.2KΩ) such that transistor Q5 saturates when capacitor C8 is charged beyond a predetermined threshold value. When crash switch 88 is closed, capacitor C8 is discharged, causing transistor Q5 to be biased in its active region. Transistor Q5 thus provides the pseudo-random signal as the crash simulation signal at output terminal B. 
     Crash switch 88 is suitably a momentary contact switch disposed on body 12 of vehicle 10 to close when vehicle 10 comes into contact with an obstacle. When switch 88 reopens capacitor C8 gradually recharges, ultimately driving transistor Q5 into saturation. The bias providec by the charging of capacitor C8 causes the crash simulation signal to gradually decay in amplitude. 
     A tire screeching simulation signal is also generated by pseudo-random signal generator 84. The tire screeching signal is taken from one stage of (Q4) of binary counter 96. It has been found that by dividing the random noise signal by factors of two, more components of the oscillator signal driving the pseudo-random noise generator appear in the output signal. This provides a more tonal characteristic in the signal. The tire screeching signal is provided at terminal D of circuit 22, and is applied to the priority gating logic 26. 
     A switch 100 is utilized to provide control signals at terminals E and F of circuit 22 to provide for selective application of the tire screeching signal to transducer 28, as will be explained. Switch 100 is preferably a centrifugal force actuated switch, which is closed in response to turns made by vehicle 10 at speeds above a given threshold. For example, a mercury switch having respective conductors on the bottom and sides of the casing may be utilized, disposed along the transverse axis of vehicle 10. When vehicle 10 turns at a speed beyond a predetermined threshold, the centrifugal force will cause the mercury to effect a connection between the bottom conductor and the conductor disposed on the vertical side, thus closing the switch. Other types of switches, may of course be utilized. 
     As previously noted, a siren simulation may also be provided. Referring now to FIG. 4, siren simulation circuit 24 suitably comprises a sawtooth waveform generator 102 coupled to a voltage controlled oscillator (VCO) 104. The output of VCO 104 is utilized to clock a D-type flip-flop 106 having data input coupled to the Q output in a standard counter configuration. Flip-flop 106 operates to provide a squarewave signal from the output of VCO 104. The Q output of flip-flop 106 is applied to one input of a conventional two input NOR gate 108. The other input of NOR gate 108 is responsive to a siren switch 110. When switch 110 is open, a high level signal is applied to one input terminal of NOR gate 108, to effectively inhibit the gate. When switch 110 is closed, a low level signal is applied and gate 108 enabled. The siren simulation signals are thus selectively provided at the output of gate 108 (terminal G). 
     Sawtooth waveform generator 102 suitably comprises a Schmitt trigger circuit 103, coupled to a capacitor C10 (10μf) through a inverter 105 and resistor R27 (10KΩ). The input of Schmitt trigger circuit 103 is coupled to capacitor C10 through a resistor R28 (56KΩ). The output signal from Schmitt trigger 103 is applied to capacitor C10 to charge the capacitor until a certain threshold is reached. Schmitt trigger circuit 103 then changes stage and the capacitor is discharged. The charging and discharging constants are controlled by the respective values of resistors R27 and R28. 
     Switch 110 also provides a control signal to one input terminal of a two input NOR gate 112. The other input of NOR gate 112 is connected to the output of Schmitt trigger circuit 103 in sawtooth waveform generator 102. The output of NOR gate 112 is supplied to a driving transistor Q6 which controls the operation of siren LED&#39;s 114 and 116. LED&#39;s 114 and 116 are suitably disposed on body 12. NOR gate 112 is inhibited by the high level signal applied to one input when siren switch 110 is open. When siren switch 110 is closed, gate 112 is enabled. The output signal of Schmitt trigger circuit 103 is thus applied to transistor Q6 to periodically activate LED&#39;s 114 and 116. The control signal provided by switch 110 is also provided at terminal H, for application to priority gating logic 26. 
     Referring now to FIG. 5, priority gating logic 26 will be described. In the preferred embodiment, the respective simulation signals are applied to transducer 28 on a mutually exclusive predetermined priority basis. The crash signal takes precedence over all other simulations. The siren signal is accorded second priority and the tire screeching signal accorded third priority. The engine simulation signal is deemed subservient to all of the other signals. 
     To this end, priority gating logic 26 is formed of a conventional four input NAND gate 118, two-three input NAND gates 120 and 122, respectively, and an inverter 124. Transducer 28 is suitably a conventional speaker driven by a transistor amplifier Q7. The crash simulation signal, produced at terminal B of circuit 22 is applied directly to the drive transistor Q7 of transducer 28. Also applied to the drive transistor of transducer 28 are the output signals of four input NAND gate 118. 
     A control signal is produced at terminal C of circuit 22 by an RS flip-flop 126 (FIG. 3) responsive to the voltage produced by capacitor C8. The control signal is applied to one input of NAND gate 118. The other inputs of four input NAND gate 118 are the outputs of three input NAND gates 120 and 122 and inverter 124. During periods when the crash signal is generated at terminal B and applied to transducer 28, RS flip-flop 126 generates a low level signal at terminal C. The low level signal applied to NAND gate 118 forces the output signal of the NAND gate to remain at a high level. Thus, during periods when the crash signal is produced, the other simulation signals are effectively isolated from transducer 28. 
     The siren signal produced at terminal G of circuit 24 is applied through inverter 124 to NAND gate 118. The control signal from siren switch 110, produced at terminal H is appled to one terminal of each of the three input NAND gates 120 and 122. Thus, when siren switch 110 is closed, the low level signal at terminal H effectively inhibits NAND gates 120 and 122 (forcing the outputs thereof to be high) and isolating the engine sound simulation and squealing tire simulation signals from transducer 28. 
     The tire screeching simulation signal generated at terminal D is applied to one input of NAND gate 122. When tire switch 100 is closed, a high level signal is provided at terminal E of circuit 22. Terminal E is connected to a second input of NAND gate 122. Thus, assuming NAND gate 118 to be enabled and siren switch 110 to be open, NAND gate 122 selectively applies the tire squealing simulation signal to transducer 28 under the control of switch 100. A further control signal is generated from switch 100 by inverter 128 (FIG. 3) and produced at terminal F of circuit 22. This signal is applied to NAND gate 120 as a control signal. 
     The engine noise simulation signal produced at terminal A of circuit 20 is applied to one input terminal of NAND gate 120. NAND gate 120 is also receptive of the tire control signal at terminal F. When the signals at terminal H (siren) and terminal F (tires) are high, the engine noise simulation signal is applied to NAND gate 118. Assuming NAND gate 118 not to be inhibited by the crash control signal (terminal C), the engine noise simulation signal is applied to transducer 28. However, if either tire switch 100 or siren switch 110 is closed, the low level signal produced at terminals F or H effectively inhibits NAND gate 120 and isolates the engine noise simulation signals from transducer 28. 
     It should be appreciated, of course, that any priority scheme can be utilized. 
     It will be understood that the above description is of illustrative embodiments of the present invention and that the invention is not limited to the specific form shown. For example, while toy vehicle 10 is described as a handheld toy, the present invention can be easily adapted to riding vehicles such as bicycles or the like. Further, speed signal generator 16 may be mechanically coupled to a separate wheel or friction motor, rather than the primary wheels of vehicle 10. In addition, any combination of one or more of the simulation signals herein described can be utilized. Various modifications can be made in the design and arrangements of the elements as will be apparent to those skilled in the art without departing from the scope of the invention as expressed in the appended claims.