Patent Publication Number: US-11656704-B2

Title: Driving circuit

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application claims priority to Taiwan Application Serial Number 110120830, filed Jun. 8, 2021, which is herein incorporated by reference in its entirety. 
     BACKGROUND 
     Field of Invention 
     The present invention relates to a driving circuit. More particularly, the present invention relates to a driving circuit with light emitting element and touch sensing function. 
     Description of Related Art 
     In today&#39;s technology, display panels with touch sensing functions are often composed of independent touch sensing circuits and pixel circuits. However, since some touch sensing elements (for example, optical touch sensing elements) are easily affected by ambient light and panel structure, their sensitivity is usually reduced in order to reduce the noise received during touch sensing, the display time of the display panel is usually reduced. Moreover, under such respective operating circuit architectures, additional independent touch sensing time must be divided, which will cause the charging rate of the touch sensing element and the resolution of the touch sensing function to be limited. 
     SUMMARY 
     The invention provides a driving circuit. The driving circuit comprises the driving transistor, the capacitor, the reset circuit, the touch sensing electrode, the sensing circuit, and the read circuit. The capacitor is electrically coupled to the gate terminal of the driving transistor. The reset circuit is electrically coupled to the gate terminal of the driving transistor, and configured to reset the electric potential of the gate terminal of the driving transistor. The sensing circuit is electrically coupled between the touch sensing electrode and the gate terminal of the driving transistor, the sensing circuit is configured to transmit the electric potential of the touch sensing electrode to the gate terminal of the driving transistor. The read circuit is electrically coupled to the driving transistor, and the read circuit is configured to output the touch sensing signal according to the electric potential of the gate terminal of the driving transistor. 
     In summary, the present disclosure uses the touch sensing electrode to sense the user&#39;s touch, and uses the sensing circuit to transmit the electric potential of the touch sensing electrode to the gate terminal of the driving transistor, then the read circuit outputs the touch sensing signal according to the electric potential of the gate terminal of the driving transistor, so that the driving transistor can integrate the touch sensing function and the function of the pixel driving transistor. 
     It is to be understood that both the foregoing general description and the following detailed description are by examples, and are intended to provide further explanation of the invention as claimed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention can be more fully understood by read the following detailed description of the embodiment, with reference made to the accompanying drawings as follows: 
         FIG.  1 A  shows a function block diagram of the driving circuit according to some embodiment of the present disclosure. 
         FIG.  1 B  shows a circuit architecture diagram of the driving circuit in  FIG.  1 A  according to some embodiment of the present disclosure. 
         FIG.  2 A  shows a function block diagram of the driving circuit according to some embodiment of the present disclosure. 
         FIG.  2 B  shows a circuit architecture diagram of the driving circuit in  FIG.  2 A  according to some embodiment of the present disclosure. 
         FIG.  3    is a timing diagram of the control signals of the driving circuit in  FIG.  2 B  according to an embodiment. 
         FIG.  4 A  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the reset period P 1 . 
         FIG.  4 B  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the sensing period P 2 . 
         FIG.  4 C  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the compensation period P 4 . 
         FIG.  4 D  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the writing period P 5 . 
         FIG.  4 E  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the emitting light period P 6 . 
         FIG.  5    is a schematic diagram of the structure of the touch sensing electrode in the thin film transistor layer in  FIG.  2 A  and  FIG.  2 B . 
         FIG.  6 A  shows a function block diagram of the driving circuit according to some embodiment of the present disclosure. 
         FIG.  6 B  shows the circuit architecture diagram of the driving circuit in  FIG.  6 A  according to some embodiment of the present disclosure. 
         FIG.  7 A  is a circuit state diagram of the driving circuit in  FIG.  6 B  during the reset period P 1 . 
         FIG.  7 B  is a circuit state diagram of the driving circuit in  FIG.  6 B  during the sensing period P 2 . 
         FIG.  7 C  is a circuit state diagram of the driving circuit in  FIG.  6 B  during the compensation period P 4 . 
         FIG.  7 D  is a circuit state diagram of the driving circuit in  FIG.  6 B  during the writing period P 5 . 
         FIG.  7 E  is a circuit state diagram of the driving circuit in  FIG.  6 B  during the emitting light period P 6 . 
         FIG.  8    is a waveform diagram of the control signal of the driving circuit and the current flowing through the driving transistor in  FIG.  6 B . 
     
    
    
     DETAILED DESCRIPTION 
     Reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts. 
       FIG.  1 A  shows a function block diagram of a driving circuit  100   a  according to some embodiment of the present disclosure. As shown in  FIG.  1 A , the driving circuit  100   a  includes a touch sensing electrode TP, a reset circuit  110 , a sensing circuit  120 , a read circuit  130 , a capacitor Cs, and a driving transistor Td. 
     In terms of architecture, the capacitor Cs is electrically coupled to the gate terminal of the driving transistor Td. The reset circuit  110  is electrically coupled to the gate terminal of the driving transistor Td, the reset circuit  110  is used to reset the electric potential of the gate terminal of the driving transistor Td. The sensing circuit  120  is electrically coupled between the touch sensing electrode TP and the gate terminal of the driving transistor Td, the sensing circuit  120  is used to transmit the electric potential of the touch sensing electrode TP to the gate terminal of the driving transistor Td. 
     The driving transistor Td is electrically coupled between the first system voltage terminal VDD and the read circuit  130 . The first terminal of the driving transistor Td is electrically coupled to the first system voltage terminal VDD. The read circuit  130  is electrically coupled to the second terminal of the driving transistor Td, and the read circuit  130  is used to output the touch sensing signal TS according to the electric potential of the gate terminal of the driving transistor Td. 
     Please refer to  FIG.  1 B ,  FIG.  1 B  shows a circuit architecture diagram of the driving circuit  100   a  in  FIG.  1 A  according to some embodiment of the present disclosure. 
     As shown in  FIG.  1 B , the reset circuit  110  includes the first transistor T 1 , the second transistor T 2 , and the third transistor T 3 . The first terminal of the first transistor T 1  is electrically coupled to the first terminal of the capacitor Cs and the gate terminal of the driving transistor Td, the second terminal of the first transistor T 1  is electrically coupled to the reference voltage terminal Vref, and the gate terminal of the first transistor T 1  is used to receive the first control signal RST(n). The first terminal of the second transistor T 2  is electrically coupled to the second terminal of the capacitor Cs, the second terminal of the second transistor T 2  is electrically coupled to the reference voltage terminal Vref, and the gate terminal of the second transistor T 2  is used to receive the first control signal RST(n). The first terminal of the third transistor T 3  is electrically coupled to the touch sensing electrode TP, the second terminal of the third transistor T 3  is electrically coupled to the second terminal of the capacitor Cs, and the gate terminal of the third transistor T 3  is used to receive the first control signal RST(n). 
     The sensing circuit  120  includes the fourth transistor T 4 . The first terminal of the fourth transistor T 4  is electrically coupled to the touch sensing electrode TP, the second terminal of the fourth transistor T 4  is electrically coupled to the first terminal of the capacitor Cs and the gate terminal of the driving transistor Td, and the gate terminal of the fourth transistor T 4  is used to receive the second control signal SC(n). 
     The read circuit  130  includes the fifth transistor T 5 . The first terminal of the fifth transistor T 5  is electrically coupled to the second terminal of the driving transistor Td, the second terminal of the fifth transistor T 5  is used to output the touch sensing signal TS, and the gate terminal of the fifth transistor T 5  is used to receive the second control signal SC(n). 
     In operation, firstly, by controlling the logic level of the first control signal RST(n), the electric potential of the reference voltage terminal Vref can be respectively transmitted to the gate terminal of the driving transistor Td and the touch sensing electrode TP through the first transistor T 1  and the third transistor T 3 , and reset the gate terminal of the driving transistor Td and the electric potential of the touch sensing electrode TP. Then, by controlling the logic level of the second control signal SC(n), the electric potential of the touch sensing electrode TP can be transmitted to the gate terminal of the driving transistor Td through the fourth transistor T 4 . In this way, the driving transistor Td outputs the touch sensing signal TS through the fifth transistor T 5  according to the electric potential of gate terminal of the driving transistor, thereby performing touch sensing. 
     Please refer to  FIG.  2 A ,  FIG.  2 A  shows a function block diagram of the driving circuit  100   b  according to some embodiment of the present disclosure. As shown in  FIG.  2 A , the driving circuit  100   b  includes the touch sensing electrode TP, the reset circuit  110 , the sensing circuit  120 , the read circuit  130 , the capacitor Cs, and the driving transistor Td. 
     The connection relationship and operation method of the touch sensing electrode TP, the reset circuit  110 , the sensing circuit  120 , the read circuit  130 , the capacitor Cs, and the driving transistor Td of the driving circuit  100   b  of  FIG.  2 A  are respectively similar to the connection relationship and operation method of the touch sensing electrode TP, the reset circuit  110 , the sensing circuit  120 , the read circuit  130 , the capacitor Cs, and the driving transistor Td of  FIG.  1 A . Therefore, it will not repeat here. 
     The driving circuit  100   b  further includes the compensating circuit  140 , the voltage stabilizing circuit  150 , the writing circuit  160 , and the light emitting element L 1 . In some embodiment, the light emitting element L 1  can be implemented by micro light emitting diodes, light emitting diodes, mini light emitting diodes, or other light emitting elements. 
     On the structure, the driving transistor Td and the light emitting element L 1  are electrically connected in series between the first system voltage terminal VDD and the second system voltage terminal VSS. In detail, the first terminal of the driving transistor Td is electrically coupled to the first system voltage terminal VDD, the second terminal of the driving transistor Td is electrically coupled to the first terminal of the ninth transistor T 9 , the second terminal of the ninth transistor T 9  is electrically coupled to the first terminal of the light emitting element L 1 , the gate terminal of the ninth transistor T 9  is used to receive the fifth control signal EM(n). The second terminal of the light emitting element L 1  is electrically coupled to the second system voltage terminal VSS. 
     The driving transistor Td is used to provide the driving current to the light emitting element L 1  according to the electric potential of the gate terminal of the driving transistor to drive the light emitting element L 1  to emit light. Furthermore, the ninth transistor T 9  is energized by the fifth control signal EM(n) to conduct the aforementioned driving current of the current path from the first system voltage terminal VDD through the driving transistor Td, the ninth transistor T 9 , and the light emitting element L 1  to the second system voltage terminal VSS. 
     The compensating circuit  140  is electrically coupled between the gate terminal and the second terminal of the driving transistor Td, and the compensating circuit  140  is used to compensate the critical voltage of the driving transistor Td. 
     The first terminal of the capacitor Cs is electrically coupled to the driving transistor Td, and the second terminal of the capacitor Cs is electrically coupled to the voltage stabilizing circuit  150 . 
     The voltage stabilizing circuit  150  is electrically coupled between the second terminal of the capacitor Cs and the reference voltage terminal Vref, and the voltage stabilizing circuit  150  is used to stabilize the electric potential of the second terminal of the capacitor Cs. 
     The writing circuit  160  is electrically coupled to the second terminal of the capacitor Cs, and the writing circuit  160  is used to transmit the data signal DATA to the second terminal of the capacitor Cs. 
     Please refer to  FIG.  2 B ,  FIG.  2 B  shows a circuit architecture diagram of the driving circuit  100   b  in  FIG.  2 A  according to some embodiment of the present disclosure. 
     As shown in  FIG.  2 B , the reset circuit  110  includes the first transistor T 1 , the second transistor T 2 , and the third transistor T 3 . The sensing circuit  120  includes the fourth transistor T 4 . The read circuit  130  includes the fifth transistor T 5 . 
     The first transistor T 1 , the second transistor T 2 , the third transistor T 3 , the fourth transistor T 4 , and the fifth transistor T 5  of the driving circuit  100   b  of the  FIG.  2 B  are connected similarly to the first transistor T 1 , the second transistor T 2 , the third transistor T 3 , the fourth transistor T 4 , and the fifth transistor T 5  of  FIG.  1 B , respectively. Therefore, it will not repeat here. 
     The compensating circuit  140  includes the sixth transistor T 6 . The first terminal of the sixth transistor T 6  is electrically coupled to the second terminal of the driving transistor Td, the second terminal of the sixth transistor T 6  is electrically coupled to the gate terminal of the driving transistor Td, the gate terminal of the sixth transistor T 6  is used to receive the third control signal SN(n). Wherein the node N 1  is at the connection between the gate terminal of the driving transistor Td and the second terminal of the sixth transistor T 6 , and the nodes N 2  is at the connection between the second terminal of the driving transistor Td and the first terminal of the sixth transistor T 6 . 
     The voltage stabilizing circuit  150  includes the seventh transistor T 7 . The first terminal of the seventh transistor T 7  is electrically coupled to the second terminal of the capacitor Cs, the second terminal of the seventh transistor T 7  is electrically coupled to the reference voltage terminal Vref, and the gate terminal of the seventh transistor T 7  is used to receive the third control signal SN(n). 
     The writing circuit  160  includes the eighth transistor T 8 . The first terminal of the eighth transistor T 8  is electrically coupled to the first terminal of the capacitor Cs, the second terminal of the eighth transistor T 8  is configure to receive the data signal DATA, and the gate terminal of the eighth transistor T 8  is used to receive the fourth control signal SN(n+1). The node N 3  is at the connection between the second terminal of the capacitor Cs and the eighth transistor T 8 . 
     Please refer to  FIG.  3   ,  FIG.  3    is a timing diagram of the control signals of the driving circuit  100   b  in  FIG.  2 B  according to an embodiment. As shown in  FIG.  3   , the display cycle in the control timing of the driving circuit  100   b  can be divided into two phases, which are the touch sensing phase PT and the display phase PD. The touch sensing phase PT includes the reset period P 1 , and the sensing period P 2 . The display phase PD includes the reset period P 3 , the compensation period P 4 , the writing period P 5 , and the emitting light period P 6 . In particular, the lengths of the plural periods in  FIG.  3    are for illustrative purposes only and are not intended to limit the present disclosure. 
     In detail, the first control signal RST(n) has the first logic level (for example: the low logic level) during the reset period P 1 , P 3 ; the first control signal RST(n) has the second logic level (for example: the high logic level) during the sensing period P 2 , the compensation period P 4 , the writing period P 5 , and the emitting light period P 6 . The second control signal SC(n) has the first logic level during the sensing period P 2 ; the second control signal SC(n) has the second logic level during the reset period P 1 , the reset period P 3 , the compensation period P 4 , the writing period P 5 , and the emitting light period P 6 . The third control signal SN(n) has the first logic level during the compensation period P 4 ; the third control signal SN(n) has the second logic level during the reset period P 1 , the sensing period P 2 , the reset period P 3 , the writing period P 5 , and the emitting light period P 6 . The fourth control signal SN(n+1) has the first logic level during the writing period P 5 ; the fourth control signal SN(n+1) has the second logic level during the reset period P 1 , the sensing period P 2 , the reset period P 3 , the compensation period P 4 , and the emitting light period P 6 . The fifth control signal EM(n) has the first logic level during the emitting light period P 6 ; the fifth control signal EM(n) has the second logic level during reset period P 1 , the sensing period P 2 , reset period P 3 , the compensation period P 4 , and the writing period P 5 . 
     In some embodiment, the first control signal RST(n) is the reset control signal, the second control signal SC(n) is the sensing control signal, and the fifth control signal EM(n) is the emitting light control signal. 
     To make the overall operation of the driving circuit  100   b  clearer and easier to understand, please refer to  FIG.  2 B ,  FIG.  3   , and  FIGS.  4 A to  4 E  together.  FIG.  4 A  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the reset period P 1 .  FIG.  4 B  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the sensing period P 2 .  FIG.  4 C  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the compensation period P 4 .  FIG.  4 D  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the writing period P 5 .  FIG.  4 E  is a circuit state diagram of the driving circuit in  FIG.  2 B  during the emitting light period P 6 . 
     During reset period P 1 , the first transistor T 1 , the second transistor T 2 , and the third transistor T 3  are turn on because the first control signal RST(n) has the low logic level. In the other side, the fourth transistor T 4 , the fifth transistor T 5 , the sixth transistor T 6 , the seventh transistor T 7 , the eighth transistor T 8 , and the ninth transistor T 9  are turned off because the second control signal SC(n), the third control signal SN(n), the fourth control signal SN(n+1), and the fifth control signal EM(n) have the high logic level. 
     In detail, during the reset period P 1 , the voltage Vr of the reference voltage terminal Vref will be transmitted to the second terminal of the capacitor Cs through the second transistor T 2 , so that the electric potential of the second terminal (node N 3 ) of the capacitor Cs is substantially equal to the voltage Vr. The voltage Vr of the reference voltage terminal Vref will be transmitted to the node N 1  through the first transistor T 1 , so that the electric potential of the gate terminal of the driving transistor Td and the first terminal (node N 1 ) of the capacitor Cs is substantially equal to the voltage Vr. Also, the voltage Vr of the reference voltage terminal Vref will also be transmitted to the touch sensing electrode TP through the first transistor T 1  and the third transistor T 3 , so that the electric potential of the touch sensing electrode TP is substantially equal to the voltage Vr. In this way, during the reset period P 1 , the electric potential of the gate terminal of the driving transistor Td and the second terminal of the capacitor Cs can be reset and stabilized at the voltage Vr, and the driving circuit  100   b  completes the reset operation. 
     During the sensing period P 2 , the fourth transistor T 4  and the fifth transistor T 5  are turned on because the second control signal SC(n) has the low logic level. In the other side, the first transistor T 1 , the second transistor T 2 , the third transistor T 3 , the sixth transistor T 6 , the seventh transistor T 7 , the eighth transistor T 8 , and the ninth transistor T 9  are turned off because the first control signal RST(n), the third control signal SN(n), the fourth control signal SN(n+1), and the fifth control signal EM(n) have the high logic level. 
     In detail, during the sensing period P 2 , the node N 1  will be electrically isolated from the reference voltage terminal Vref because the first transistor T 1 , the second transistor T 2 , and the seventh transistor T 7  are switched off. Also, the node N 1  will be electrically isolated from the second system voltage terminal VSS because the eighth transistor T 8  and the ninth transistor T 9  are switched off. 
     When the second control signal SC(n) switches from high level to low level at the beginning of the sensing period P 2 , the electric potential of the node N 1  is lowered by the parasitic capacitor, and the lowered electric potential of the node N 1  is expressed as the voltage Vft 1 . In some embodiment, the voltage Vft 1  can be expressed by the following equation:
 
Vft1=Cgs*(VGH-VGL)/(Cs+Cgs) . . .  Formula (1)
 
     In the above formula, Cgs can be the parasitic capacitance of the element of the electrical coupling the node N 1  (for example, the fifth transistor T 5 ), VGH, VGL can be the high electric potential and the low electric potential of the second control signal SC(n), respectively, and Cs can be the capacitance value of the capacitor Cs. 
     That is, if the user does not touch the display panel and thus the touch sensing electrode TP is not electrically coupled to the additional equivalent capacitor, the electric potential of the node N 1  will be the voltage Vr of the reference voltage terminal Vref minus Vft 1 . 
     In the other side, if the user&#39;s finger touches the display panel, the user&#39;s finger will be treated as (equivalent to) the electrical coupling to the capacitance of the touch sensing electrode TP, and the second control signal SC(n) will lower the electric potential of the node N 1  through the parasitic capacitance when switching from high level to low level at the beginning of the sensing period P 2 , and the lowered electric potential of the node N 1  is expressed as the voltage Vft 2 . In some embodiment, the voltage Vft 2  can be expressed by the following formula:
 
Vft2=Cgs*(VGH-VGL)/(Cs+Cgs+Cf) . . .  Formula (2)
 
     Similarly, in the above formula, Cgs can be the parasitic capacitance of the element of the electrical coupling the node N 1  (for example, the fifth transistor T 5 ), VGH, VGL can be the high potential and the low potential of the second control signal SC(n), respectively, Cs can be regarded as the capacitance value of the capacitance Cs, and Cf can be regarded as the capacitance value equivalent to the electrical coupling contact when the user&#39;s finger touches the display panel. 
     That is, if the touch sensor TP is electrically coupled to the additional equivalent capacitor because the user has touched the display panel, the electric potential of the node N 1  will be the voltage Vr of the reference voltage terminal Vref minus the voltage Vft 2 . 
     According to the formula (1) and the formula (2), the value of the voltage Vft 2  will be smaller than the value of the voltage Vft 1 , and the potential of the node N 1  will be the voltage Vr of the reference voltage Vref minus the voltage Vft 2  or Vft 1 , and the electric potential of the node N 1  will be at a higher level when the user has touched the display panel compared to when the user has not touched the display panel. 
     Also, during the sensing period P 2 , the driving transistor Td provides the current to the read circuit  130  from the first system voltage terminal VDD according to the electric potential of the gate terminal (node N 1 ) of the driving transistor, so that the read circuit  130  uses the aforementioned current as the touch sensing signal TS. The electric potential of the gate terminal of the driving transistor Td will be at the higher level when the user touches the display panel than when the user does not touch the display panel, thus providing the smaller current for the touch sensing signal TS. 
     For example, if the user does not touch the display panel, the driving transistor Td will provide 27.6 micro amps of current as the touch sensing signal TS. On the other hand, if the user touches the display panel, the driving transistor Td will provide the current of 17.3 micro amps as the touch sensing signal TS. In this way, during the sensing period P 2 , the driving circuit  100   b  completes the touch sensing operation. 
     Furthermore, depending on the gap depth of the user&#39;s fingerprint, the capacitance value Cf of the equivalent electrical coupling contact the touch sensing electrode TP will have different values, and the driving transistor Td will provide different amplitude currents as the touch sensing signal TS. 
     For example, if the user lightly touches the display panel, the larger gap between the user&#39;s fingerprint and the display panel will cause the capacitance value Cf to be at the smaller value and the driving transistor Td to provide the larger (for example, 26.6 micro amps) current as the touch sensing signal TS. On the other hand, if the user touches the display panel more closely, a smaller gap between the user&#39;s fingerprint and the display panel will cause the capacitance value Cf to be at the larger value and the driving transistor Td to provide the smaller (for example, 18.8 micro amps) current as the touch sensing signal TS. In this way, during the sensing period P 2 , the driving circuit  100   b  can further differentiate between the user&#39;s finger and the display panel in terms of how closely it touches. 
     Next, in order to reset the electric potential of the driving transistor Td to the voltage Vr of the reference voltage terminal Vref, the reset operation is performed during the reset period P 3 . 
     During the reset period P 3 , the first transistor T 1 , the second transistor T 2 , and the third transistor T 3  are turned on because the first control signal RST(n) has the low logic level. On the other hand, the fourth transistor T 4 , the fifth transistor T 5 , the sixth transistor T 6 , the seventh transistor T 7 , the eighth transistor T 8 , and the ninth transistor T 9  are turned off because the second control signal SC(n), the third control signal SN(n), the fourth control signal SN(n+1), and the fifth control signal EM(n) have the high logic level. 
     Since the operation of the driving circuit  100   b  during the reset period P 3  is similar to the operation of the driving circuit  100   b  during the reset period P 1 , it will not be repeated here. 
     During the compensation period P 4 , the sixth transistor T 6  will be turned on because the third control signal SN(n) has the low logic level. On the other side, the first transistor T 1 , the second transistor T 2 , the third transistor T 3 , the fourth transistor T 4 , the fifth transistor T 5 , the seventh transistor T 7 , the eighth transistor T 8 , and the ninth transistor T 9  will be turned off because the first control signal RST(n), the second control signal SC(n), the fourth control signal SN(n+1), and the fifth control signal EM(n) have the high logic level. 
     In detail, during the compensation period P 4 , the voltage Vdd of the first system voltage terminal VDD is transmitted by the driving transistor Td and the sixth transistor T 6  to the gate terminal of the driving transistor Td until the driving transistor Td is cut off. That is, when the electric potential difference between the source terminal and the gate terminal of the driving transistor Td is approximately the same as the critical voltage Vth of the driving transistor Td, the driving transistor Td cuts off. At this time, the electric potential of the first terminal (source terminal) of the driving transistor Td is at the voltage Vdd, and the electric potential of the gate terminal (node N 1 ) of the driving transistor Td is (Vdd−|Vth|). In this way, the driving circuit  100   b  completes the compensation operation during the compensation period P 4 . 
     During the writing period P 5 , the eighth transistor T 8  is turned on because the fourth control signal SN(n+1) has the low logic level. On the other side, the first transistor T 1 , the second transistor T 2 , the third transistor T 3 , the fourth transistor T 4 , the fifth transistor T 5 , the sixth transistor T 6 , the seventh transistor T 7 , and the ninth transistor T 9  are turned off because the first control signal RST(n), the second control signal SC(n), the third control signal SN(n), and the fifth control signal EM(n) have the high logic level. 
     In detail, during the writing period P 5 , the voltage Vdata of the data signal DATA is transmitted from the eighth transistor T 8  to the second terminal of the capacitor Cs, so that the electric potential of the second terminal (node N 3 ) of the capacitor Cs is substantially equal to the voltage Vdata. Furthermore, the electric potential of the second terminal (node N 3 ) of the capacitor Cs, which changes from the compensation period P 4  to the writing period P 5 , is transmitted to the first terminal (node N 1 ) by capacitive coupling. That is, the voltage (Vdata-Vr) increases at the first terminal (node N 1 ), which means that the electric potential at the first terminal (node N 1 ) of the capacitor Cs is essentially equal to [Vdd−|Vth|+(Vdata−Vr)]. At this time, the electric potential of the first terminal (source terminal) of the driving transistor Td is at the voltage Vdd. The voltage difference (Vsg) across the source terminal and the gate terminal of the driving transistor Td is Vdd−[Vdd−|Vth|+(Vdata−Vr)]=[(Vr−Vdata)+|Vth|]. 
     In general, the driving current that the P-type transistor can provide obeys the following formula: Id=k(Vsg−|Vth|) 2  Wherein k is a constant related to the component characteristics of the driving transistor Td, and |Vth| is the absolute value of the critical voltage of the driving transistor Td. 
     The driving current Id is calculated by substituting the voltage (Vsg) across the source terminal and the gate terminal of the driving transistor Td into the equation of the driving current Id as follows:
 
Id=k(Vsg−|Vth|) 2  
 
Id=k{[(Vr−Vdata)+|Vth|]−|Vth|} 2  
 
Id=k(Vr−Vdata) 2  
 
     During the emitting light period P 6 , the driving transistor Td provides the driving current Id=k(Vr−Vdata) 2  to the light emitting element L 1 , so that the light emitting element L 1  emits light according to the amplitude of the driving current Id. 
     For example, if the voltage Vdata of the data signal DATA written to the driving circuit  100   b  is larger during the writing period P 5 , the light emitting element L 1  will be at the lower brightness (gray scale) based on the smaller driving current Id during the emitting light period P 6  according to the aforementioned formula for the driving current Id; on the other side, if the voltage Vdata of the data signal DATA written to the driving circuit  100   b  is smaller, the light emitting element L 1  will be at the higher brightness (gray scale) based on the larger driving current Id during the emitting light period P 6  according to the aforementioned formula for the driving current Id. 
     Please refer to  FIG.  5   ,  FIG.  5    is a schematic diagram of the structure of the touch sensing electrode TP in the thin film transistor layer  200  in  FIG.  2 A  and  FIG.  2 B . 
     As shown in  FIG.  5   , the thin film transistor layer  200  includes the substrate SUB, the source/drain terminal  210 , the gate terminal  220 , the polysilicon layer  230 , the dielectric layer  240 , the dielectric layer  250 , the gate dielectric layer  260 , the buffer layer  270 , and the touch sensing electrode TP. It should be noted that the touch sensing electrode TP can be set at the position adjacent to the substrate SUB in the thin film transistor layer  200 . More specifically, in the thin film transistor layer  200 , the touch sensing electrode TP is provided between the buffer layer  270  and the substrate SUB. In this way, in some embodiments, the display panel realized by the driving circuit  100   b  can be the edge-lit light emitting display panel or the back-lit light emitting display panel. 
     Please refer to  FIG.  6 A ,  FIG.  6 A  shows a function block diagram of the driving circuit  100   c  according to some embodiment of the present disclosure. As shown in  FIG.  6 A , the driving circuit  100   c  includes the touch sensing electrode TP, the reset circuit  110 , the sensing circuit  120 , the read circuit  130 , the capacitor Cs, and the driving transistor Td. 
     The operation of the touch sensing electrode TP, the reset circuit  110 , the sensing circuit  120 , the read circuit  130 , the capacitor Cs, and the driving transistor Td of the driving circuit  100   c  in  FIG.  6 A  is similar to the operation of the touch sensing electrode TP, the reset circuit  110 , the sensing circuit  120 , the read circuit  130 , the capacitor Cs, and the driving transistor Td of the driving circuit  100   b  in  FIG.  2 A , respectively. Therefore, it will not be repeated here. 
     The driving circuit  100   c  further includes the compensating circuit  140 , the voltage stabilizing circuit  150 , the writing circuit  160 , the ninth transistor T 9 , the tenth transistor T 10 , and the light emitting element L 1 . In some embodiment, the light emitting element L 1  can be implemented by the micro light emitting diode, the light emitting diode, the mini light emitting diode, or the other light emitting element. 
     It is important to note that the light emitting element L 1  can be implemented by the light emitting diode (LED) chip. The aforementioned LED chip can be differentiated into the lateral, the flip, and the vertical structures depending on the location of the electrodes. In the embodiment of  FIG.  6 A , the touch sensing electrode TP of the driving circuit  100   c  can be implemented by the cathode electrode of the light emitting element L 1  (for example, the light emitting diode chip) in any of the aforementioned structures, thereby reducing the additional electrical surface area of the touch sensor element in other embodiments. 
     On the structure, the driving transistor Td, the ninth transistor T 9 , the light emitting element L 1 , and the tenth transistor T 10  are electrically coupled between the first system voltage terminal VDD and the second system voltage terminal VSS. In detail, the first terminal of the driving transistor Td is electrically coupled to the first system voltage terminal VDD, the second terminal of the driving transistor Td is electrically coupled to the first terminal of the ninth transistor T 9 , the second terminal of the ninth transistor T 9  is electrically coupled to the first terminal of the light emitting element L 1 , and the gate terminal of the ninth transistor T 9  is used to receive the fifth control signal EM(n). The second terminal of the light emitting element L 1  is electrically coupled to the first terminal of the tenth transistor T 10 , and the second terminal of the tenth transistor T 10  is electrically coupled to the second system voltage terminal VSS. 
     The driving transistor Td is used to provide the driving current to the light emitting element L 1  according to the electric potential of the gate terminal to drive the light emitting element L 1  to emit light. Furthermore, the ninth transistor T 9  and the tenth transistor T 10  are energized by the fifth control signal EM(n) to conduct the aforementioned driving current of the current path from the first system voltage terminal VDD through the driving transistor Td, the ninth transistor T 9 , the light emitting element L 1 , and the tenth transistor T 10  to the second system voltage terminal VSS. 
     The compensating circuit  140  is electrically coupled between the gate terminal (node N 1 ) of the driving transistor Td and the second terminal (node N 2 ), and the compensating circuit  140  is used to compensate the critical voltage of the driving transistor Td. 
     The first terminal of the capacitor Cs is electrically coupled to the gate terminal (node N 1 ) of the driving transistor Td, and the second terminal of the capacitor Cs is electrically coupled to the voltage stabilizing circuit  150 . 
     The voltage stabilizing circuit  150  is electrically coupled between the second terminal of the capacitor Cs and the reference voltage terminal Vref, and the voltage stabilizing circuit  150  is used to stabilize the electric potential of the second terminal of the capacitor Cs. 
     The writing circuit  160  is electrically coupled to the second terminal (node N 3 ) of the capacitor Cs, and the writing circuit  160  is used to transmit the data signal DATA to the second terminal (node N 3 ) of the capacitor Cs. 
     Please refer to  FIG.  6 B ,  FIG.  6 B  shows the circuit architecture diagram of the driving circuit  100   c  in  FIG.  6 A  according to some embodiment of the present disclosure. 
     As shown in  FIG.  6 B , the reset circuit  110  includes the first transistor T 1 , the second transistor T 2 , and the third transistor T 3 . The sensing circuit  120  includes the fourth transistor T 4 . The read circuit  130  includes the fifth transistor T 5 . 
     On the structure, compared with the driving circuit  100   b  in the embodiment of  FIG.  2 B , the driving circuit  100   c  in the embodiment of  FIG.  6 B  differs in the connection of the third transistor T 3 , the fourth transistor T 4 , and the touch sensing electrode TP. More precisely, in the driving circuit  100   c  shown in  FIG.  6 B , the third transistor T 3 , the touch sensing electrode TP, and the fourth transistor T 4  are electrically connected in series between the reference voltage terminal Vref and the node N 1 . In the driving circuit  100   b  shown in  FIG.  2 B , the third transistor T 3  and the fourth transistor T 4  are connected in parallel and electrically coupled to the touch sensing electrode TP. Although the detailed connection relationships of the driving circuit  100   b  and  100   c  are not identical, the operations of the third transistor T 3  and the fourth transistor T 4  of the driving circuit  100   c  in  FIG.  6 B  are similar to the operations of the third transistor T 3  and the fourth transistor T 4  of the driving circuit  100   b  in  FIG.  2 B . Therefore, it will not be repeated here. 
     The compensating circuit  140  includes the sixth transistor T 6 , the voltage stabilizing circuit  150  includes the seventh transistor T 7 , and the writing circuit  160  includes the eighth transistor T 8 . The connection relationship and operation method of the sixth transistor T 6 , the seventh transistor T 7 , and the eighth transistor T 8  of the driving circuit  100   c  are similar to the connection relationship and the operation method of the sixth transistor T 6 , the seventh transistor T 7 , and the eighth transistor T 8  of the driving circuit  100   b  in  FIG.  2 B , respectively. Therefore, it will not be repeated here. 
     Since the timing diagram of the control signal of the driving circuit  100   c  can also be implemented by  FIG.  3   , please refer to both  FIG.  3    and  FIG.  7 A to  7 E .  FIG.  7 A  is a circuit state diagram of the driving circuit  100   c  in  FIG.  6 B  during the reset period P 1 .  FIG.  7 B  is a circuit state diagram of the driving circuit  100   c  in  FIG.  6 B  during the sensing period P 2 .  FIG.  7 C  is a circuit state diagram of the driving circuit  100   c  in  FIG.  6 B  during the compensation period P 4 .  FIG.  7 D  is a circuit state diagram of the driving circuit  100   c  in  FIG.  6 B  during the writing period P 5 .  FIG.  7 E  is a circuit state diagram of the driving circuit  100   c  in  FIG.  6 B  during the emitting light period P 6 . As shown in  FIG.  3    and  FIGS.  7 A to  7 E , the driving circuit  100   c  operates in the similar manner to the driving circuit  100   c . Therefore, it will not be repeated here. 
     Please refer in  FIG.  8   ,  FIG.  8    is a waveform diagram of the control signal of the driving circuit  100   c  and the current flowing through the driving transistor in  FIG.  6 B  and the waveforms of current Id 0  to Id 8  flowing through the driving transistor Td according to different touch levels. As shown in  FIG.  8   , the first control signal RST(n) has the low logic during the reset period P 1  and P 3 ; the second control signal SC(n) has the low logic during the sensing period P 2 ; the third control signal SN(n) has the low logic level during the compensation period P 4 ; the fourth control signal SN(n+1) has the low logic during the writing period P 5 ; the fifth control signal EM(n) has the low logic during the emitting light period P 6 . 
     In some embodiment, during the sensing period P 2 , depending on the depth of the gap between the user&#39;s fingerprints, the capacitance value Cf of the equivalent electrical coupling the touch sensing electrode TP will have different values, and the driving transistor Td will provide different amplitude currents as the touch sensing signal TS. For example, if the user lightly touches the display panel, the large gap between the user&#39;s fingerprint and the display panel will cause the capacitance value Cf to be at a smaller value and the driving transistor Td to provide the larger current Id 1 , 27.1 micro amps, as the touch sensing signal TS. On the other side, if the user touches the display panel more closely, the gap between the user&#39;s fingerprints and the display panel is smaller, which will cause the capacitance value Cf to be at the larger value and the driving transistor Td to provide the smaller current Id 8 , 17.2 micro amps, as the touch sensing signal TS. In the embodiment shown in  FIG.  8   , the currents Id 0  to Id 8  are 27.6, 27.1, 26.6, 25.2, 23.4, 21.0, 18.8, 17.8, and 17.2 micro amperes, respectively. Also, the values of currents Id 0 -Id 8  are 118.7 mA during the emitting light period P 6 . In other words, even if the touch sensing electrode TP is realized by the cathode of the light emitting element L 1 , the user&#39;s touch will not affect the magnitude of the driving current provided to the light emitting element L 1  during the emitting light period P 6 . In this way, during the sensing period P 2 , the driving circuit  100   c  can further differentiate between the user&#39;s finger and the display panel in terms of how closely it touches. 
     In summary, the driving circuit  100   a ,  100   b , and  100   c  of the present disclosure use the touch sensing electrode TP to sense the user&#39;s touch, and the sensing circuit  120  transmits the electric potential of the touch sensing electrode TP to the gate terminal of the driving transistor Td, and the read circuit  130  outputs the touch sensing signal TS according to the electric potential of the gate terminal of the driving transistor Td, so that the driving circuit  100   a , the  100   b , and  100   c  can integrate the touch sensor function and the pixel driving circuit, and the display time will not be reduced due to the bit resolution and frame rate. Furthermore, the touch sensing electrode TP of the driving circuit  100   b  can be set at the specific position in the thin film transistor layer  200  to realize the edge-lit light emitting display panel or the back-lit light emitting display panel. On the other side, the touch sensing electrode TP of the driving circuit  100   c  can be implemented by the cathode electrode of the light emitting element L 1 , thereby reducing the area of the touch sensor. 
     Although the present invention has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. 
     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims.