Patent Publication Number: US-11022992-B2

Title: Voltage regulator

Description:
RELATED APPLICATIONS 
     This application claims the benefit of Chinese Patent Application No. 201910008805.3, filed on Jan. 4, 2019, which is incorporated herein by reference in its entirety. 
     FIELD OF THE INVENTION 
     The present invention generally relates to the field of power electronics, and more particularly to voltage regulators. 
     BACKGROUND 
     A switched-mode power supply (SMPS), or a “switching” power supply, can include a power stage circuit and a control circuit. When there is an input voltage, the control circuit can consider internal parameters and external load changes, and may regulate the on/off times of the switch system in the power stage circuit. Switching power supplies have a wide variety of applications in modern electronics. For example, switching power supplies can be used to drive light-emitting diode (LED) loads. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1A  is a circuit diagram of an example switched capacitor voltage regulator. 
         FIG. 1B  is a waveform diagram of control signals for the switched capacitor voltage regulator. 
         FIG. 2  is a circuit diagram of a first example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 3A  is a circuit diagram of a second example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 3B  is a waveform diagram of control signals for the second example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 3C  is an equivalent circuit diagram of the second example voltage regulator in the first operation state, in accordance with embodiments of the present invention. 
         FIG. 3D  is an equivalent circuit diagram of the second example voltage regulator in the second operation state, in accordance with embodiments of the present invention. 
         FIG. 4A  is a circuit diagram of a third example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 4B  is a waveform diagram of control signals for the third example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 4C  is an equivalent circuit diagram of the third example voltage regulator in the first operation state, in accordance with embodiments of the present invention. 
         FIG. 4D  is an equivalent circuit diagram of the third example voltage regulator in the second operation state, in accordance with embodiments of the present invention. 
         FIG. 5A  is a circuit diagram of a fourth example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 5B  is a waveform diagram of control signals for the fourth example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 5C  is an equivalent circuit diagram of the fourth example voltage regulator in the first operation state, in accordance with embodiments of the present invention. 
         FIG. 5D  is an equivalent circuit diagram of the fourth example voltage regulator in the second operation state, in accordance with embodiments of the present invention. 
         FIG. 6A  is a circuit diagram of a fifth example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 6B  is a waveform diagram of control signals for the fifth example voltage regulator, in accordance with embodiments of the present invention. 
         FIG. 6C  is an equivalent circuit diagram of the fifth example voltage regulator in the first operation state, in accordance with embodiments of the present invention. 
         FIG. 6D  is an equivalent circuit diagram of the fifth example voltage regulator in the second operation state, in accordance with embodiments of the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     Reference may now be made in detail to particular embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention may be described in conjunction with the preferred embodiments, it may be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents that may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it may be readily apparent to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, processes, components, structures, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present invention. 
     A switched capacitor voltage regulator controls the capacitors to charge and discharge through switches, thus realizing voltage conversion. Referring now to  FIG. 1A , shown is a circuit diagram of an example switched capacitor voltage regulator. In this example, input voltage V in  is applied to an input port of the switched capacitor voltage regulator. Switch Q 1  is coupled between terminal a of capacitor C and terminal i of the input port, and may be turned on or off under the control of control signal G 1 . Switch Q 2  is coupled between terminal a of capacitor C and first terminal o of the output port, and can be turned on or off under the control of control signal G 2 . 
     Referring now to  FIG. 1B , shown is a waveform diagram of control signals for the switched capacitor voltage regulator. Here, control signals G 1  and G 2  are complementary; that is, when control signal G 1  is at a high level, control signal G 2  is at a low level. In addition, terminal b of capacitor C is coupled with a second terminal of the input port and a second terminal of the output port, which are usually used as a reference terminal (or referred to as a ground terminal). Output capacitor Co can also be arranged between the two terminals of the output port to smooth output voltage V out . Therefore, switches Q 1  and Q 2  can alternately be turned on and off, such that capacitor C intermittently discharges to the output port, thereby realizing power transmission and voltage/current conversion. 
     However, if switch Q 1  and/or switch Q 2  are/is damaged, such as by a short circuit, input voltage V in  and output voltage V out  are shorted, and input voltage V in  can directly supply power to a load at the output port. At this time, providing that the load is a battery, if input voltage V in  is relatively high and is directly supplied to the rechargeable battery, battery damage or even battery explosion may occur, which can be very dangerous for electronic systems and devices. Thus, necessary protection measures need to be provided to avoid such situations. 
     In one embodiment, a voltage regulator can include: (i) an input port with two terminals, and being configured to receive an input voltage; (ii) an output port with two terminals, and being configured to generate an output voltage, where the input port and the output port have a common ground potential; (iii) a group of input switches coupled in series between the two terminals of the input port, where a common node of every two adjacent input switches that form an input half-bridge topology is taken as an input switch node; (iv) at least one output half-bridge topology coupled between two terminals of the output port, where a common node of a high-side output switch and a low-side output switch in each output half-bridge topology is taken as an output switch node; (v) N storage capacitors, where each of the storage capacitors is coupled between one input switch node and one output switch node, such that each path from the input port to the output port comprises at least one storage capacitor; and (vi) where switching states of the input switches and the output switches are controlled to be switched to control charging and discharging states of the storage capacitors, such that a ratio of the input voltage to the output voltage is N, where N is a natural number not less than 1. 
     Referring now to  FIG. 2 , shown is a circuit diagram of a first example voltage regulator, in accordance with embodiments of the present invention. In this particular example, voltage regulator  200  can include an input port with two terminals a and b for receiving input voltage V in . Here, terminal a is a positive terminal and terminal b is a negative terminal. Voltage regulator  200  can include an output port with two terminals c and d for generating output voltage V out . Here, terminal c is a positive terminal and terminal d is a negative terminal. The input port and the output port may have the same ground terminal. For example, terminal b and terminal d can be coupled to the same ground terminal. 
     Voltage regulator  200  can include a group of input switches Q 1 -Qm coupled in series between terminals a and b of the input port, and the common nodes of every two adjacent input switches may be taken as input switches nodes IN 1 -INn, respectively. Further, voltage regulator  200  can include at least one output half-bridge topology between terminals c and d of the output port, and each output half-bridge topology can include two output switches (e.g., a high-side output switch and a low-side output switch) coupled in series. The common nodes of every two output switches may be taken as output switch nodes OUT 1 -OUTn, respectively. 
     Also, voltage regulator  200  can include N storage capacitors, and a first terminal of each storage capacitor is coupled to a corresponding input switch node, and a second terminal of each storage capacitor is coupled to an output switch node. For example, a plurality of second terminals of different storage capacitors can be coupled to the same output switch node, but each output switch node can be coupled to at least one storage capacitor, such that each path from the input port and the output port can include at least one storage capacitor. Further, the switching states of the input switches and the output switches can be controlled to be switched to control charging and discharging states of the storage capacitors, such that a ratio of the input voltage and the output voltage is N, where N is a natural number not less than 1. 
     In some embodiments, voltage regulator  200  may also include output capacitor C out  coupled to terminals c and d of the output port to filter output voltage V out . Also, voltage regulator  200  can include an input capacitor coupled to terminals a and b of the input port to filter input voltage V in . For example, the number of input switches coupled in series between the input port may be provided corresponding to the step-down ratio of voltage regulator  200  and the at least one half-bridge topology coupled to the output port is arranged. Also, the number of storage capacitors coupled between the input switch nodes and the output switch nodes may be provided corresponding to the step-down ratio of voltage regulator  200 . The switching states of the input and output switches can be switched to correspondingly change the charging and discharging states of the storage capacitors, in order to obtain an output voltage with a certain step-down ratio. Therefore, a higher step-down ratio can be achieved with smaller volume, the circuit topology is simple, and the power density is high. 
     On the other hand, the input port and the output port may have a common ground potential (e.g., the ground terminals of the input side circuit and the output side circuit are the same), and no isolation between the input side and the output side may be required, thereby further simplifying the circuit topology of the voltage regulator. In addition, the storage capacitors can be coupled between the input side circuit and the output side circuit of the voltage regulator, such that there is no direct loop between the input port and the output port. This can ensure that when the input switches and/or the output switches are damaged (e.g., via short circuit), the storage capacitors remain between the input port and the output port, thus preventing the direct connection between the load at the output port and the input voltage, protecting the load, and obtaining good reliability. 
     Referring now to  FIG. 3A , shown is a circuit diagram of a second example voltage regulator, in accordance with embodiments of the present invention. In this particular example, N is equal to 2; that is, the step-down ratio of the input voltage to the output voltage is 2. Voltage regulator  300  can include an input port with two terminals a and b for receiving input voltage V in . Here, terminal a is a positive terminal and terminal b is a negative terminal. Voltage regulator  300  can include an output port with two terminals c and d for generating output voltage V out , and being coupled to a load. Here, terminal c is a positive terminal and terminal d is a negative terminal. The input port and the output port may have the same ground terminal. In the embodiments, terminal b and terminal d can be coupled to the same ground terminal. 
     Voltage regulator  300  can also include a group of input switches coupled in series between terminals a and b of the input port. In this particular example, there are 4 input switches, such as input switches Q 1 , Q 2 , Q 3 , and Q 4 . The common nodes of every two adjacent input switches are taken as input switches nodes, respectively. For example, the common node of input switches Q 1  and Q 2  is IN 1 , and the common node of input switches Q 3  and Q 4  is IN 2 . Input switches Q 1  and Q 2  may form an input half-bridge topology, and input switches Q 3  and Q 4  form another input half-bridge topology. Further, voltage regulator  300  can include an output half-bridge topology between terminals c and d of the output port. The output half-bridge topology can include two output switches Q 5  and Q 6  coupled in series, and the common node of output switches Q 5  and Q 6  is taken as output switch node OUT 1 . 
     Also, voltage regulator  300  can include two storage capacitors, where a first terminal of each storage capacitor can be coupled to a corresponding different input switch node, and a second terminal of each storage capacitor can be coupled to one output switch node. For example, storage capacitor C 1  is coupled between input switch node IN 1  and output switch node OUT 1 , and storage capacitor C 2  can be coupled between input switch node IN 2  and output switch node OUT 1 , such that each path from the input port to the output port can include at least one storage capacitor. The switching states of input switches Q 1 -Q 4  and output switches Q 5 -Q 6  can be controlled to be switched, in order to control the charging and discharging states of storage capacitors C 1  and C 2 , such that a ratio of the input voltage and the output voltage is 2. 
     Voltage regulator  300  can also include two input capacitors C N1  and C N2 , each of which is coupled between two terminals of a corresponding input half-bridge topology. Here, input capacitor C N1  is coupled between two terminals of the input half-bridge topology formed by input switches Q 1  and Q 2 , and input capacitor C N2  is coupled between two terminals of the input half-bridge topology formed by input switches Q 3  and Q 4 . In addition, voltage regulator  300  may further include output capacitor C out  coupled between terminals c and d of the output port to filter output voltage V out . 
     Referring now to  FIG. 3B , shown is a waveform diagram of control signals for the second example voltage regulator, in accordance with embodiments of the present invention. In this control mode, the switching states of the high-side input switches of each input half-bridge topology and the high-side output switch of the output half-bridge topology may be identical. In this example, the switching states of high-side input switches Q 1  and Q 3  can be controlled by control signal GH, and the switching states of high-side output switch Q 5  can be controlled by control signal GH′, which is the same as control signal GH. The low-side input switches of each input half-bridge topology and the low-side output switch of the output half-bridge topology may have the same switching state. In this example, the switching states of low-side input switches Q 2  and Q 4  can be controlled by control signal GL, and the switching states of low-side output switch Q 6  can be controlled by control signal GL′, which is the same as control signal GL. 
     In some embodiments, control signals GH and GL are complementary, and similarly, control signals GH′ and GL′ are complementary within one switching period. Also, phase shift control with 180° can be applied in other embodiments; that is, the phase difference between control signals GH and GL can be controlled to be 180°. For example, the duty cycle of control signal GH may be 50%, 40%, or other suitable values. In one switching period, the operation process of voltage regulator  300  can include two operation states. 
     Referring now to  FIG. 3C , shown is an equivalent circuit diagram of the second example voltage regulator in the first operation state, in accordance with embodiments of the present invention. In this particular example, control signals GH and GL are complementary with the duty cycle of 50%. In the first operation state, high-side input switches Q 1  and Q 3  are turned on and high-side output switch Q 5  is turned on. Accordingly, low-side input switches Q 2  and Q 4  are turned off, and low-side output switch Q 6  is turned off. Input voltage V in  and input capacitor C N2  may provide energy to charge storage capacitors C 1  and C 2  and input capacitor C N1 , and also provide energy to the load. Input voltage V in  may provide energy to charge storage capacitor C 1  through input switch Q 1  and charge input capacitor C N1  at the same time. Input capacitor C N2  may provide energy to charge storage capacitor C 2  through input switch Q 3 . 
     In this equivalent circuit, the first current path is: positive terminal a of the input port—input switch Q 1 —storage capacitor C 1 —output switch Q 5 —positive terminal c of the output port—negative terminal d of the output port. The second current path is: input capacitor C N2 —input switch Q 3 —storage capacitor C 2 —output switch Q 5 —positive terminal c of the output port—negative terminal d of the output port. The third current path is: positive terminal a of the input port—input capacitor C N1 —input switch Q 3 —storage capacitor C 2 —output switch Q 5 —positive terminal c of the output port—negative terminal d of the output port. 
     For example, providing that the current flowing through the output port is 2, the output current flowing through positive terminal a of the input port is 3/2, the charge current flowing through storage capacitor C 1  through input switch Q 1  is 1, and the charge current flowing through input capacitor C N1  is 1/2. The current flowing into negative terminal b of the input port is 3/2, the discharge current flowing through input capacitor C N2  is 1/2, and the charge current flowing through storage capacitor C 2  is 1. Therefore, in the first operation state, it can be obtained according to Kirchhoff&#39;s law of voltage that:
 
 V   CN1   +V   CN2   =V   in   (1)
 
     In this example, V CN1  is the voltage across input capacitor C N1 , and V CN2  is the voltage across input capacitor C N2 . Also, it can be obtained that:
 
 V   C1   −V   C2   =V   CN1   (2)
 
     In this example, V C1  is the voltage across storage capacitor C 1 , and V C2  is the voltage across storage capacitor C 2 . Further, it can be obtained that:
 
 V   CN2   −V   C2   =V   out   (3)
 
     Referring now to  FIG. 3D , shown is a an equivalent circuit diagram of the second example voltage regulator in the second operation state in accordance with embodiments of the present invention. In the second operation state, high-side input switches Q 1  and Q 3  are turned off, and high-side output switch Q 5  is turned off. Accordingly, low-side input switches Q 2  and Q 4  are turned on, and low-side output switch Q 6  is turned on. Storage capacitors C 1  and C 2 , and input capacitor C N1  discharge energy to input capacitor C N2  and input port. Since the two terminals of storage capacitor C 2  are coupled to the ground terminal in the equivalent circuit, the voltage across storage capacitor C 2  is zero. In this equivalent circuit, the first current path is: storage capacitor C 1 —input switch Q 2 —input capacitor C N2 —negative terminal b of the input port. The second current path is: input capacitor C N1 —positive terminal a of the input port. 
     For example, providing that the current flowing through the output port is 2, the discharge current flowing through storage capacitor C 1  is 1, the discharge current flowing through storage capacitor C 2  is 1, the charge current flowing through input capacitor C N2  is 1/2, the discharge current flowing from input capacitor C N1  to positive terminal a of the input port is 1/2, and the output current flowing through negative terminal b of the input port is 1/2. Therefore, in the second operation state, it can be obtained according to Kirchhoff&#39;s law of voltage that:
 
 V   CN1   +V   CN2   =V   in   (4)
 
 V   C1   −V   C2   =V   CN2   (5)
 
 V   C2 =0  (6)
 
     When the voltage regulator is switched between the first and second operation states at a higher frequency, the voltages across the capacitors do not suddenly change between different states, such that each parameter in the first operation state is basically equal to the corresponding parameter in the second operation state. Therefore, combining the above formulas (1)-(6), it can be derived that:
 
 V   CN1   =V   CN2   =V   in /2  (7)
 
 V   out   =V   in /2  (8)
 
     Therefore, output voltage V out  may be stepped down by the voltage regulator according to the embodiments, and the value of output voltage V out  can be 1/2 of input voltage V in . 
     Referring now to  FIG. 4A , shown is a circuit diagram of a third example voltage regulator in accordance with embodiments of the present invention. In this particular example, the step-down ratio of the input voltage to the output voltage is 3, that is, N=3. Voltage regulator  400  can include an input port with two terminals a and b for receiving input voltage V in . Here, terminal a is a positive terminal and terminal b is a negative terminal. Voltage regulator  400  can include an output port with two terminals c and d for generating output voltage V out , and being coupled to a load. Here, terminal c is a positive terminal and terminal d is a negative terminal. The input port and the output port may have the same ground terminal. In the embodiments, terminal b and terminal d can be coupled to the same ground terminal. 
     Voltage regulator  400  can also include three input half-bridge topology coupled in series between terminals a and b of the input port. Each input half-bridge topology can include a high-side input switch and a low-side input switch coupled in series, and the common node of the two input switches is taken as an input switch node. For example, the common node of input switches Q 1  and Q 2  is IN 1 , the common node of input switches Q 3  and Q 4  is IN 2 , and the common node of input switches Q 5  and Q 6  is IN 3 . Also, voltage regulator  400  can include three input capacitors C IN1 , C IN2 , C IN3 , and each input capacitor may be coupled between two terminals of a corresponding input half-bridge topology. 
     Further, voltage regulator  400  can include at least one output half-bridge topology coupled in parallel between terminals c and d of the output port. Each output half-bridge topology can include two output switches coupled in series, and the common node of the two output switches is taken as an output switch node. In this example, the number of the output half-bridge topology is 3. The common node of output switches Q 7  and Q 8  is output switch node OUT 1 , the common node of output switches Q 9  and Q 10  is output switch node OUT 2 , and the common node of output switches Q 11  and Q 12  is output switch node OUT 3 . Moreover, the high-side output switches (Q 7 , Q 9 , Q 11 ) of each output half-bridge topology are coupled to positive terminal c of the output port, and the low-side output switches (Q 8 , Q 10 , Q 12 ) are coupled to negative terminal d of the output port. 
     Also, voltage regulator  400  can include three storage capacitors C 1 , C 2  and C 3 , which are coupled between one input switch node and one output switch node correspondingly. First terminals of the storage capacitors can respectively be coupled to different input switch nodes, and the output switch nodes that second terminals of the storage capacitors are coupled to can be different or the same. However, each output switch node can be coupled to at least one storage capacitor, such that each path from the input port and the output port can include at least one storage capacitor. In this example, storage capacitors C 1 , C 2  and C 3  are coupled to different output switch nodes. Storage capacitor C 1  is coupled between input switch node IN 1  and output switch node OUT 1 , storage capacitor C 2  is coupled between input switch node IN 2  and output switch node OUT 2 , and storage capacitor C 3  is coupled between input switch node IN 3  and output switch node OUT 3 . Moreover, the switching states of input switches Q 1 -Q 6  and output switches Q 7 -Q 12  are controlled to be switched, in order to control the charging and discharging states of storage capacitors C 1 , C 2 , and C 3 , such that the ratio of input voltage V in  to output voltage V out  is 3. In some embodiments, voltage regulator  400  may further include output capacitors C out  coupled between terminals c and d of the output port. 
     Referring now to  FIG. 4B , shown is a waveform diagram of control signals for the third example voltage regulator, in accordance with embodiments of the present invention. In this example control mode, the switching states of the high-side input switches of each input half-bridge topology and the high-side output switches of the output half-bridge topologies may be identical. The switching states of the high-side input switches can be controlled by control signal GH, and the switching states of the high-side output switches can be controlled by control signal GH′. The low-side input switches of each input half-bridge topology and the low-side output switches of the output half-bridge topologies have the same switching state. In this example, the switching states of the low-side input switches may be controlled by control signal GL, and the switching states of the low-side output switches can be controlled by control signal GL′. 
     In some embodiments, control signals GH and GL may be controlled to be complementary, and similarly, control signals GH′ and GL′ are complementary within one switching period. Also, phase shift control with 180° can be applied in other embodiments; that is, the phase difference between control signals GH and GL is controlled to be 180°. The duty cycle of control signal GH may be 50%, 40%, or other suitable values. In one switching period, the operation process of voltage regulator  400  can include two operation states. 
     Referring now to  FIG. 4C , shown is an equivalent circuit diagram of the third example voltage regulator in the first operation state in accordance with embodiments of the present invention. In this particular example, control signals GH and GL are complementary with the duty cycle of 50%. In the first operation state, high-side input switches Q 1 , Q 3 , and Q 5  are turned on and high-side output switches Q 7 , Q 9 , and Q 11  are turned on. Accordingly, low-side input switches Q 2 , Q 4 , and Q 6  are turned off, and low-side output switches Q 8 , Q 10 , and Q 12  are turned off. Input voltage V in  and input capacitor C N3  may provide energy to charge storage capacitors C 1 , C 2 , C 3 , and input capacitor C N1 , and also may provide energy to the load. Input voltage V in  may provide energy to charge storage capacitor C 1  through input switch Q 1  and charge input capacitor C N1  and storage capacitor C 2  through input switch Q 3  at the same time. Input capacitor C N3  may provide energy to charge storage capacitor C 3  through input switch Q 5 . 
     In this equivalent circuit, the first current path is: positive terminal a of the input port—input switch Q 1 —storage capacitor C 1 —output switch Q 7 —positive terminal c of the output port—negative terminal d of the output port. The second current path is: positive terminal a of the input port—input capacitor C N1 —input switch Q 3 —storage capacitor C 2 —output switch Q 9 —positive terminal c of the output port—negative terminal d of the output port. The third current path is: input capacitor C N3 —input switch Q 5 —storage capacitor C 3 —output switch Q 11 —positive terminal c of the output port—negative terminal d of the output port. 
     For example, providing that the current flowing through the output port is 2, the charge current flowing through storage capacitor C 1  through input switch Q 1  is 2/3, the charge current flowing through storage capacitor C 2  through input switch Q 3  is 2/3, and the charge current flowing through storage capacitor C 3  through input switch Q 5  is 2/3. Then, the charge current flowing through input capacitor C N1  is 2/3, the current flowing into positive terminal a of the input port is 4/3, the discharge current flowing through input capacitor C N3  is 2/3, and the current flowing into negative terminal b of the input port is 4/3. Therefore, in the first operation state, it can be obtained according to Kirchhoff&#39;s law of voltage that:
 
 V   CN1   +V   CN2   +V   CN3   =V   in   (9)
 
     Here, V CN1  is the voltage across input capacitor C N1 , V CN2  is the voltage across input capacitor C N2 , and V CN3  is the voltage across input capacitor C N3 . Also, it can be obtained that:
 
 V   C1   −V   C2   =V   CN1   (10)
 
 V   C2   −V   C3   =V   CN2   (11)
 
 V   CN3   −V   C3   =V   out   (12)
 
     Here, V C1  is the voltage across storage capacitor C 1 , V C2  is the voltage across storage capacitor C 2 , and V C3  is the voltage across storage capacitor C 3 . 
     Referring now to  FIG. 4D , shown is an equivalent circuit diagram of the third example voltage regulator in the second operation state, in accordance with embodiments of the present invention. In the second operation state, high-side input switches Q 1 , Q 3 , and Q 5  are turned off, and high-side output switches Q 7 , Q 9 , and Q 11  are turned off. Accordingly, low-side input switches Q 2 , Q 4 , and Q 6  may be turned on, and low-side output switches Q 8 , Q 10 , and Q 12  are turned on. Storage capacitors C 1  to C 3  and input capacitor C N1  can discharge energy to input capacitor C N3  and input port. Since the two terminals of storage capacitor C 3  are coupled to the ground terminal, the voltage across storage capacitor C 3  is zero. 
     In this equivalent circuit, the first current path is: storage capacitor C 2 —input switch Q 4 —input capacitor C N3 —negative terminal b of the input port. The second current path is: storage capacitor C 1 —input switch Q 2 —input capacitor C N1 —positive terminal a of the input port. For example, providing that the current flowing through the output port is 2, the discharge current flowing through storage capacitor C 1  is 2/3, the discharge current flowing through storage capacitor C 2  is 2/3, and the discharge current flowing through storage capacitor C 3  is 2/3. Then the charge current flowing through input capacitor C N3  is 2/3, the discharge current flowing from input capacitor C N1  to positive terminal a of the input port is 2/3, and the output current flowing through negative terminal b of the input port is 2/3. Therefore, in the second operation state, it can be obtained according to Kirchhoff&#39;s law of voltage that:
 
 V   CN1   +V   CN2   +V   CN3   =V   in   (13)
 
 V   C1   −V   C2   =V   CN2   (14)
 
 V   C2   −V   C3   =V   CN3   (15)
 
 V   C3 =0  (16)
 
     When the voltage regulator is switched between the first and second operation states at a higher frequency, the voltages across the capacitors may not suddenly change between different states, such that each parameter in the first operation state is basically equal to the corresponding parameter in the second operation state. Therefore, combining the above formulas (10)-(16), it can be derived that:
 
 V   CN1   =V   CN2   ==V   CN3   =V   in /3  (17)
 
 V   out   =V   in /3  (18)
 
     Therefore, output voltage V out  can be stepped down by the voltage regulator according to the embodiments, and the value of output voltage V out  is 1/3 of input voltage V in . It can be understood that in the embodiments, although the number of the output half-bridge topologies is the same as the step-down ratio or the number of storage capacitors, it can also be set to be different. For example, the number of the output half-bridge topologies is set to M, where M is not greater than N, and each output switch node is coupled to at least one storage capacitor. In the above embodiments, N is 2 and 3 respectively. For the embodiments where N is greater than 3, the circuit topology and operation process can be derived. 
     When the number of input switches is 2N, N input half-bridge topologies and N input switch nodes are sequentially formed. The first terminals of the N input capacitors are respectively coupled to the first to the Nth input switch nodes. Also, the number of the output half-bridge topologies is set to M, where M is not less than 1 and is not more than N, to form M output switch nodes. Each output switch node is coupled to at least one storage capacitor. The connection ways of all output half-bridge topologies to the output port are the same. The high-side output switches of each output half-bridge topology are coupled to the positive terminal of the output port, and the low-side output switches are coupled to the negative terminal of the output port. 
     In the embodiments, the number of input switches coupled in series between the input port is provided corresponding to the step-down ratio and at least one half-bridge topology coupled to the output port is arranged. The number of storage capacitors coupled between the input switch nodes and the output switch nodes is provided corresponding to the step-down ratio is provided. Also, the switching states of the input switches and the output switches are switched to correspondingly change the charging and discharging states of the storage capacitors, in order to obtain an output voltage with a certain step-down ratio. Therefore, a higher step-down ratio can be achieved with smaller volume, the circuit topology is simple, and the power density is high. 
     On the other hand, the input port and the output port have a common ground potential (e.g., the ground terminals of the input side circuit and the output side circuit are the same), such that the isolation between the input side and the output side is not required, thus further simplifying the circuit topology of the voltage regulator. At the same time, the storage capacitors are coupled between the input side circuit and the output side circuit of the voltage regulator, such that there is no direct loop between the input port and the output port, thereby ensuring that when the input switches and/or the output switches are damaged, such as short circuit, the storage capacitors always exist between the input port and the output port, preventing the direct connection between the load at the output port and the input voltage, protecting the load, and obtaining good reliability. 
     It can be understood that in the description of the operation process described above, the switching states of the high-side input switch and the low-side input switch of each input half-bridge topology are controlled to be complementary. The states of control signals GH and GL are complementary. It can be understood that the switching states of the high-side input switch and the low-side input switch of the input half-bridge topology can also be non-complementary. For example, the duty ratio of control signal GH for the high-side input switch is 40%, and the duty ratio of control signal GL for the low-side input switch is also 40%, and the phase difference between the two is controlled to 180°. In some embodiments, when the duty ratio is less than 50%, the phase difference between control signals GH and GL can also be greater than 180°. 
     Referring now to  FIG. 5A , shown is a circuit diagram of a fourth example voltage regulator, in accordance with embodiments of the present invention. In this particular example, N is equal to 2; that is, the step-down ratio of the input voltage to the output voltage is 2. Voltage regulator  500  can include an input port with two terminals a and b for receiving input voltage V in . Here, terminal a is a positive terminal and terminal b is a negative terminal. Voltage regulator  500  includes an output port with two terminals c and d for generating output voltage V out , and being coupled to a load. Here, terminal c is a positive terminal and terminal d is a negative terminal. The input port and the output port may have the same ground terminal. In the embodiments, terminal b and terminal d can be coupled to the same ground terminal. 
     Voltage regulator  500  can also include three input switches coupled in series between terminals a and b of the input port, which in turn form two input switch nodes. For example, the common node of input switches Q 1  and Q 2  is taken as input switch node IN 1 , and the common node of input switches Q 2  and Q 3  is taken as input switch node IN 2 . Input switches Q 1  and Q 2  form an input half-bridge topology, and input switches Q 2  and Q 3  form another input half-bridge topology. 
     Further, voltage regulator  500  can include two output half-bridge topologies coupled in parallel between terminals c and d of the output port, forming a full-bridge circuit. High-side output switch Q 4  and low-side output switch Q 5  can be coupled in series between terminals c and d of the output port, and the common node of output switches Q 4  and Q 5  taken as output switch node OUT 1 . High-side output switch Q 6  and low-side output switch Q 7  can be coupled in series between terminals c and d of the output port, and the common node of output switches Q 6  and Q 7  taken as output switch node OUT 2 . Positive terminal c of the output port is coupled to the high-side output switch of at least one output half-bridge topology. 
     Also, voltage regulator  500  can include two storage capacitors. Each storage capacitor may be coupled to one input switch node and one output switch node. A first terminal of each storage capacitor can be coupled to a corresponding different input switch node, and a second terminal of each storage capacitor can be coupled to an output switch node. Also, each output switch node may be coupled to at least one storage capacitor, such that each path between the input port and the output port can include at least one storage capacitor. In this example, storage capacitor C 1  is coupled between input switch node IN 1  and output switch node OUT 1 , and storage capacitor C 2  is coupled between input switch node IN 2  and output switch node OUT 2 . 
     In the embodiments, the switching states of input switches Q 1 -Q 3  and output switches Q 4 -Q 7  are controlled to be switched, in order to control the charging and discharging states of storage capacitors C 1  and C 2 , such that a ratio of the input voltage and the output voltage is 2. In some embodiments, voltage regulator  500  may further include output capacitor C out  coupled between terminals c and d of the output port to filter output voltage V out . Similarly, voltage regulator  500  may further include input capacitor Cin coupled between terminals a and b of the input port to filter input voltage V in . 
     Referring now to  FIG. 5B , shown is a waveform diagram of control signals for the fourth example voltage regulator in accordance with embodiments of the present invention. Under this control mode, among the three input switches, the switching states of the odd-numbered input switches Q 1  and Q 3  and the switching states of high-side output switches Q 4  and Q 7  of the output half-bridge topology are identical, and the switching states of the even-numbered input switch Q 2  and the switching states of low-side output switches Q 5  and Q 6  of the output half-bridge topology are identical. 
     In this example, the switching states of input switches Q 1  and Q 3  are controlled by control signal GH, and the switching states of high-side output switches Q 4  and Q 7  are controlled by control signal GH′. The switching states of input switch Q 2  can be controlled by control signal GL, and the switching states of low-side output switches Q 5  and Q 6  may be controlled by control signal GL′. In some embodiments, control signals GH and GL are complementary, and similarly, control signals GH′ and GL′ are complementary within one switching period. For example, the duty cycle of control signal GH may be 50%, 40%, or other suitable values. In one switching period, the operation process of voltage regulator  500  can include two operation states. 
     Referring now to  FIG. 5C , shown is an equivalent circuit diagram of the fourth example voltage regulator in the first operation state, in accordance with embodiments of the present invention. In the first operation state, input switches Q 1  and Q 3  are turned on and high-side output switches Q 4  and Q 7  are turned on. Accordingly, input switch Q 2  is turned off, and low-side output switches Q 5  and Q 6  are turned off. Input voltage V in  may provide energy to charge storage capacitor C 1 , and also may provide energy to the load at the same time. The two terminals of storage capacitor C 2  are coupled to the ground terminal in this equivalent circuit through input switch Q 3  and output switch Q 7 . That is, the voltage across storage capacitor C 2  is zero. 
     In this equivalent circuit, the first current path is: positive terminal a of the input port—input switch Q 1 —storage capacitor C 1 —output switch Q 4 —positive terminal c of the output port—negative terminal d of the output port. For example, providing that the current flowing from positive terminal c of the output port to negative terminal d of the output port is 1, the output current flowing through the positive terminal a of the input port is 1, the charge current flowing through storage capacitor C 1  through input switch Q 1  is 1. Therefore, in the first operation state, it can be obtained according to Kirchhoff&#39;s law of voltage that:
 
 V   C2 =0  (19)
 
 V   in   −V   C1   =V   out   (20)
 
     Here, V C1  is the voltage across storage capacitor C 1 , and V C2  is the voltage across storage capacitor C 2 . 
     Referring now to  FIG. 5D , shown is shown is an equivalent circuit diagram of the second example voltage regulator in the second operation state, in accordance with embodiments of the present invention. In the second operation state, input switches Q 1  and Q 3  are turned off, and high-side output switches Q 4  and Q 7  are turned off. Accordingly, input switch Q 2  is turned on, and low-side output switches Q 5  and Q 6  are turned on. Storage capacitor C 1  discharges energy to charge storage capacitor C 2 , and also may provide energy to the load. 
     In this equivalent circuit, the first current path is: the positive terminal of storage capacitor C 1 —input switch Q 2 —storage capacitor C 2 —output switch Q 6 —positive terminal c of the output port—output switch Q 5 —the negative terminal of storage capacitor C 1 . For example, providing that the current flowing from positive terminal c to negative terminal d of the output port is 1, the discharge current flowing through storage capacitor C 1  is 1, the charge current flowing through storage capacitor C 2  is 1. Therefore, in the second operation state, it can be obtained according to Kirchhoff&#39;s law of voltage that:
 
 V   C1   −V   C2   =V   out   (21)
 
     When the voltage regulator is switched between the first and second operation states at a higher frequency, the voltages across the capacitors do not suddenly change between different states, such that each parameter in the first operation state is basically equal to the corresponding parameter in the second operation state. Therefore, combining the above formulas (19)-(21), it can be derived that:
 
 V   C2 =0  (22)
 
 V   out   =V   C1   =V   in /2  (23)
 
     Therefore, output voltage V out  can be stepped down by the voltage regulator according to the embodiments, and the value of output voltage V out  is 1/2 of input voltage V in . 
     Referring now to  FIG. 6A , shown is a circuit diagram of a fifth example voltage regulator in accordance with embodiments of the present invention. In this particular example, the step-down ratio of the input voltage to the output voltage is 3; that is, N=3. Voltage regulator  600  can include an input port with two terminals a and b for receiving input voltage V in . Here, terminal a is a positive terminal and terminal b is a negative terminal. Voltage regulator  600  can include an output port with two terminals c and d for generating output voltage V out , and being coupled to a load. Here, terminal c is a positive terminal and terminal d is a negative terminal. The input port and the output port may have the same ground terminal. In the embodiments, terminal b and terminal d may be coupled to the same ground terminal. 
     Voltage regulator  600  can also include four input switches Q 1 -Q 4  coupled in series between terminals a and b of the input port. For example, the common node of input switches Q 1  and Q 2  is IN 1 , the common node of input switches Q 2  and Q 3  is IN 2 , and the common node of input switches Q 3  and Q 4  is IN 3 . Further, voltage regulator  600  can include three output half-bridge topologies coupled in parallel between terminals c and d of the output port. Each output half-bridge topology can include two output switches coupled in series, and the common node of the two output switches is taken as an output switch node. The common node of output switches Q 5  and Q 6  is output switch node OUT 1 , the common node of output switches Q 7  and Q 8  is output switch node OUT 2 , and the common node of output switches Q 9  and Q 10  is output switch node OUT 3 . 
     Also, voltage regulator  600  can include three storage capacitors C 1 , C 2  and C 3 , which are coupled between one input switch node and one output switch node. The first terminal of each storage capacitor is coupled to a corresponding different input switch node, and the second terminal of each storage capacitor is coupled to one output switch node. That is, each input switch node is coupled to a different storage capacitor, and each output switch node is coupled to at least one storage capacitor, such that each path from the input port to the output port can include at least one storage capacitor. In this example, storage capacitor C 1  is coupled between input switch node IN 1  and output switch node OUT 1 , storage capacitor C 2  is coupled between input switch node IN 2  and output switch node OUT 2 , and storage capacitor C 3  is coupled between input switch node IN 3  and output switch node OUT 3 . 
     It should be understood that, in this example, the number of the output half-bridge topologies is 3, but it can also be 2, and accordingly the second terminal of storage capacitor C 3  can be coupled to output switch node OUT 1  together with the second terminal of storage capacitor C 1 . Moreover, the switching states of input switches Q 1 -Q 4  and output switches Q 5 -Q 10  are controlled to be switched, in order to control the charging and discharging states of storage capacitors C 1 , C 2 , and C 3 , such that the ratio of input voltage V in  to output voltage V out  is 3. In some embodiments, voltage regulator  600  may further include output capacitors C out  coupled between terminals c and d of the output port. 
     Referring now to  FIG. 6B , shown is a waveform diagram of control signals for the fifth example voltage regulator, in accordance with embodiments of the present invention. In this example control mode, among the four input switches coupled in series, the switching states of the odd-numbered input switches Q 1  and Q 3  and the switching states of high-side output switches Q 5 , Q 8 , and Q 9  of the output half-bridge topology are identical, and the switching states of the even-numbered input switches Q 2  and Q 4  and the switching states of low-side output switches Q 6 , Q 7 , and Q 10  of the output half-bridge topology are identical. 
     In this example, the switching states of input switches Q 1  and Q 3  are controlled by control signal GH, and the switching states of high-side output switches Q 5 , Q 8 , and Q 9  are controlled by control signal GH′. The switching states of input switches Q 2  and Q 4  are controlled by control signal GL, and the switching states of low-side output switches Q 6 , Q 7  and Q 10  are controlled by control signal GL′. In some embodiments, control signals GH and GL are complementary, and similarly, control signals GH′ and GL′ are complementary within one switching period. For example, the duty cycle of control signal GH may be 50%, 40%, or other suitable values. In one switching period, the operation process of voltage regulator  500  can include two operation states. 
     Referring now to  FIG. 6C , shown is an equivalent circuit diagram of the fifth example voltage regulator in the first operation state in accordance with embodiments of the present invention. In the first operation state, input switches Q 1  and Q 3  are turned on and high-side output switches Q 5 , Q 8 , and Q 9  are turned on. Accordingly, input switches Q 2  and Q 4  are turned off, and low-side output switches Q 6 , Q 7 , and Q 10  are turned off. Input voltage V in  provides energy to charge storage capacitor C 1 , and also may provide energy to the load through output switch Q 5 . Storage capacitor C 2  discharges to charge storage capacitor C 3  through input switch Q 3 , and also may provide energy to the load through output switch Q 9 . 
     In this equivalent circuit, the first current path is: positive terminal a of the input port—input switch Q 1 —storage capacitor C 1 —output switch Q 5 —positive terminal c of the output port—negative terminal d of the output port. The second current path is: storage capacitor C 2 —input switch Q 3 —storage capacitor C 3 —output switch Q 9 —positive terminal c of the output port—negative terminal d of the output port. For example, providing that the current flowing from positive terminal c of the output port to negative terminal d of the output port is 4/3, the charge current flowing through storage capacitor C 1  through input switch Q 1  is 2/3, the output current flowing from positive terminal a of the input port is 2/3. The charge current flowing through storage capacitor C 3  through input switch Q 3  is 2/3, and the current flowing into negative terminal b of the input port is 2/3. Therefore, in the first operation state, it can be obtained according to Kirchhoff&#39;s law of voltage that:
 
 V   C2   −V   C3   =V   out   (24)
 
 V   in   −V   C1   =V   out   (25)
 
     Here, V CN1  is the voltage across input capacitor C N1 , V CN2  is the voltage across input capacitor C N2 , and V CN3  is the voltage across input capacitor C N3 . 
     Referring now to  FIG. 6D , shown is an equivalent circuit diagram of the fifth example voltage regulator in the second operation state, in accordance with embodiments of the present invention. In the second operation state, input switches Q 1  and Q 3  are turned off, and high-side output switches Q 5 , Q 8 , and Q 9  are turned off. Accordingly, input switches Q 2  and Q 4  are turned on, and low-side output switches Q 6 , Q 7 , and Q 10  are turned on. Storage capacitor C 1  discharges energy to storage capacitor C 2  through input switch Q 2 . Storage capacitor C 3  discharges with two terminals coupled to the ground terminal respectively through input switch Q 4  and output switch Q 10 . That is, the voltage across storage capacitor C 3  is zero. 
     For example, providing that the current flowing through the output port is 2/3, the discharge current flowing through storage capacitor C 1  is 2/3, and the charge current flowing through storage capacitor C 2  is 2/3. Therefore, in the second operation state, it can be obtained according to Kirchhoff&#39;s law of voltage that:
 
 V   C3 =0  (26)
 
 V   C1   −V   C2   =V   out   (27)
 
     When the voltage regulator is switched between the first and second operation states at a higher frequency, the voltages across the capacitors do not suddenly change between different states, such that each parameter in the first operation state is basically equal to the corresponding parameter in the second operation state. Therefore, combining the above formulas (24)-(27), it can be derived that:
 
 V   out   =V   C2   =V   C1 /2 =V   in /3  (28)
 
     Therefore, output voltage V out  is stepped down by the voltage regulator according to the embodiments, and the value of output voltage V out  is 1/3 of input voltage V in . In the description of the operation process described above, the switching states of the high-side input switch and the low-side input switch of each input half-bridge topology are controlled to be complementary. That is, the states of control signals GH and GL are complementary. It can be understood that the switching states of the high-side input switch and the low-side input switch of the input half-bridge topology can also be non-complementary. For example, the duty ratio of control signal GH for the high-side input switch is 40%, and the duty ratio of control signal GL for the low-side input switch is 40%, and the phase difference between the two is controlled to be 180°. In some embodiments, when the duty ratio is less than 50%, the phase difference between control signals GH and GL can also be greater than 180°. 
     In the above embodiments, N is 2 and 3, respectively, but other values of N can be supported in certain embodiments. For the embodiments where N is greater than 3, the circuit topology and operation process can be derived. When the number of the input switches is N+1, N input switch nodes can be formed in turn. At least one first-type output half-bridge topology and at least one second-type output half-bridge topology are coupled in parallel between two terminals of the output port. In the first-type output half-bridge topology, one high-side output switch and one low-side output switch are sequentially coupled in series between terminal c and terminal d. In the second-type output half-bridge topology, one low-side output switch and one high-side output switch are sequentially coupled in series between terminal c and terminal d. In each output half-bridge topology, the common node of the two output switches is taken as an output switch node. The input voltage and the output voltage have a common ground potential. The voltage regulator also includes N storage capacitors. The first terminal of each storage capacitor is coupled to a corresponding different input switch node, and the second terminal of each storage capacitor is coupled to one output switch node. The switching states of the input switches and the output switches are controlled to be switched so as to control the charging and discharging states of the storage capacitors, such that the ratio of the input voltage to the output voltage is N, where N is a natural number not less than 2. 
     Further, the first terminal of the Mth storage capacitor is coupled to the Mth input switch node, where M is not more than N. The second terminals of two adjacent storage capacitors are coupled to different types of the output half-bridge topology. When N is an odd number, the output half-bridge topologies coupled to the second terminals of the odd-numbered storage capacitors are of the same type with the output half-bridge topology coupled to the second terminal of the Nth storage capacitor. The output half-bridge topologies coupled to the second terminals of the even-numbered storage capacitors are of different types with the output half-bridge topology coupled to the second terminal of the Nth storage capacitor. 
     When N is an even number, the output half-bridge topologies coupled to the second terminals of the odd-numbered storage capacitors are of different types with the output half-bridge topology coupled to the second terminal of the Nth storage capacitor. The output half-bridge topologies coupled to the second terminals of the even-numbered storage capacitors are of the same type with the output half-bridge topology coupled the second terminal of the Nth storage capacitor. According to the voltage regulator in the embodiments, the storage capacitor is coupled between the input switches and the output switches. By switching the switching states of the input switches and the output switches, the charging and discharging states of the storage capacitors can be correspondingly changed, and the output voltage with a certain step-down ratio can be obtained. As a result, a higher step-down ratio can be achieved with a smaller volume. 
     In particular embodiments, the voltage regulator has simpler circuit topology, high power density and simpler working process, and is easier to be controlled. Also, the power supply process to the load is continuous, and the output voltage fluctuation is small. At the same time, the input port and the output port have a common ground potential (e.g., the ground terminals of the input side circuit and the output side circuit are the same), such that the isolation between the input side and the output side is not required, thereby further simplifying the circuit topology of the voltage regulator. In addition, the storage capacitors are coupled between the input side circuit and the output side circuit of the voltage regulator, such that there is no direct loop between the input port and the output port, thereby ensuring that when the input switches and/or the output switches are damaged, such as short circuit, the storage capacitors always exist between the input port and the output port, preventing the direct connection between the load at the output port and the input voltage, protecting the load, and obtaining good reliability. 
     It can be understood that the capacitance values of the storage capacitors can be the same or different, and the capacitance values of the input capacitors can also be the same or different. The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications, to thereby enable others skilled in the art to best utilize the invention and various embodiments with modifications as are suited to particular use(s) contemplated. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.