Patent Publication Number: US-9904641-B2

Title: Power control device and method

Description:
FIELD 
     The subject matter herein generally relates to a switch control device and method for power. 
     BACKGROUND 
     An automatic transfer switch (ATS) usually switches power to an output from a first power source to a second power source, through turn off a plurality of relays which are coupled to the first power source, and turn on a plurality of relays coupled to the second power source. However, when the plurality of relays which are coupled to the first power source are turned off instantly, arc discharge will be occurred, which will not only lead to the first and second power source short circuited, but also lead to the relays are damaged. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Implementations of the present technology will now be described, by way of example only, with reference to the attached figures. 
         FIG. 1  is a block diagram of an embodiment of an switch control device coupled to a first power source, a second power source, and an electronic device. 
         FIG. 2  is a block diagram of a first embodiment of the switch control device of  FIG. 1 . 
         FIG. 3  is a circuit diagram of the first embodiment of the switch control device of  FIG. 1 , wherein the switch control device may receive an input voltage, and comprise at least one relay. 
         FIG. 4  is a waveform schematic diagram of the input voltage relating to a first zero crossover signal of the input voltage, which to determine a delay time of the relay of the first embodiment of the switch control device of  FIG. 1 . 
         FIG. 5  is a waveform schematic diagram of the input voltage relating to a second zero crossover signal of the input voltage, which to determine a time of the relay of the first embodiment of the switch control device of  FIG. 1 . 
         FIG. 6  is a waveform schematic diagram of the input voltage relating to a third zero crossover signal of the input voltage, which to determine a time of the relay of the first embodiment of the switch control device of  FIG. 1 . 
         FIG. 7  is a schematic diagram of a second embodiment of the switch control device. 
         FIG. 8  is a waveform schematic diagram of the input voltage relating to a first peak of wave signal of the input voltage, which to determine a delay time of the relay of the second embodiment of the switch control device of  FIG. 7 . 
         FIG. 9  is a waveform schematic diagram of the input voltage relating to a first peak of wave signal of the input voltage, which to determine a delay time of the relay of the second embodiment of the switch control device of  FIG. 7 . 
         FIG. 10  is a waveform schematic diagram of the input voltage relating to a first peak of wave signal of the input voltage, which to determine a delay time of the relay of the second embodiment of the switch control device of  FIG. 7 . 
         FIG. 11  is a flow chart diagram of the switch control device. 
     
    
    
     DETAILED DESCRIPTION 
     It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure. 
     Several definitions that apply throughout this disclosure will now be presented. 
     The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently coupled or releasably coupled. The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series and the like. 
     The disclosure will now be described in relation to an electronic device with a switch control device for power. 
       FIG. 1  illustrates a schematic diagram of an embodiment of an switch control device  100  coupled to a first power source  300 , a second power source  400 , and an electronic device  200 . The switch control device  100  is configured to switch between the first power source  300  and the second power source  400 , to supply voltage from the first power source  300  or the second power source  400  to the electronic device  200 . 
       FIG. 2  illustrates a block diagram of a first embodiment of the switch control device  100  of  FIG. 1 . The switch control device  100  includes a switch device  10  and a control device  20 . In at least one embodiment, the switch device  10  is an automatic transfer switch. The switch device  10  includes a first input terminal  11 , a second input terminal  12 , a first switch unit  13 , a second switch unit  14 , and an output terminal  15 . The first input terminal  11  and the second input terminal  12  are coupled to the first power source  300  and the second power source  400  respectively. The output terminal  15  receives a first input voltage from the first power source  300  through the first input terminal  11 , or receives a second input voltage from the second power source  400  through the second input terminal  12 . The control device  20  includes a detection unit  23  and a processor  25 . The detection unit  23  includes a voltage sensor  230  and a zero crossover signal sensor  231 . The voltage sensor  230  includes a first voltage sensor  2301  and a second voltage sensor  2302 . The zero crossover signal sensor  231  includes a first zero crossover signal sensor  2310  and a second zero crossover signal sensor  2312 . The first zero crossover signal sensor  2310  and a second zero crossover signal sensor  2311  and the first zero crossover signal sensor  2310  are coupled to the first input terminal  11  and the processor  25 . The second voltage sensor  2302  and the second zero crossover signal sensor  2311  are coupled to the second input terminal  12  and the processor  25 . The processor  25  are coupled to the first switch unit  13  and the second switch unit  14 . 
       FIG. 3  illustrates a circuit diagram of the first embodiment of the switch control device  100  of  FIG. 1 . Both of the first input terminal  11  and the second input terminal  12  are coupled to the a municipal electric power. The first switch unit  13  includes four relays R 1 , R 2 , R 3 , and R 4  and two silicon controlled rectifiers (SCRs) S 1  and S 2 . The second switch unit  14  includes four relays R 5 , R 6 , R 7 , and R 8  and two silicon controlled rectifiers (SCRs) S 3  and S 4 . The relays R 1  and R 2  are coupled in series, and are coupled between a live wire L 1  of the municipal electric power and the output terminal  15 . The relays R 3  and R 4  are coupled in series, and are coupled between a neutral wire N 1  of the municipal electric power and the output terminal  15 . Each of the SCR is composed of two single thyristors coupled in parallel. A first terminal of the SCR S 1  is coupled to a node between the relay R 1  and the relay R 2 . A second terminal of the SCR S 1  is coupled to the output terminal  15 . A second terminal of the SCR S 2  is coupled to a node between the relay R 3  and the relay R 4 . A second terminal of the SCR S 2  is coupled to the output terminal  15 . The relays R 5  and R 6  are coupled in series, and are coupled between a live wire L 2  of the municipal electric power and the output terminal  15 . The relays R 7  and R 8  are coupled in series, and are coupled between a neutral wire N 2  of the municipal electric power and the output terminal  15 . A first terminal of the SCR S 3  is coupled to a node between the relays R 5  and R 6 . A second terminal of the SCR S 3  is coupled to the output terminal  15 . A first terminal of the SCR S 4  is coupled to the node between the relays R 7  and R 8 . A second terminal of the SCR S 4  is coupled to the output terminal  15 . 
     The processor  25  includes a control chip  250 , a relay driver  251 , and a SCR driver  252 . Each of the relays R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 , and R 8  is coupled to the processor  25  through the relay driver  251 . Each control terminal of the SCR S 1 , S 2 , S 3 , and S 4  is coupled to the processor  25  through the SCR driver  252 . The relay driver  251  and the SCR driver  252  can make functions as adjusting voltages of the relays R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 , and R 8  and the SCR S 1 , S 2 , S 3 , and S 4 . 
     In at least one embodiment, the SCR S 1  and S 2  can promote a transmission time from the first input terminal  11  to the output terminal  15 . The SCR S 3  and S 4  can promote a transmission time from the second input terminal  12  to the output terminal  15 . Each of the SCR can reduce a voltage drop of the corresponding relay coupled in parallel. Therefore, arc discharge generated by the relays R 2 , R 4 , R 6 , R 8  can be reduced. 
     In use, when the output terminal  15  receives a first input voltage from the first input terminal  11 , the first voltage sensor  2301  senses the first input voltage, and transmits the first input voltage to the processor  25 . The first zero crossover signal sensor  2310  senses a zero crossover signal of the first input voltage, and transmits the zero crossover signal of the first input voltage to the processor  25 . The processor  25  detects a period T of the first input voltage through the first voltage sensor  2301 , and determines whether the first input voltage is normal or not. If the first input voltage is abnormal, the processor  25  computes a delay time T Delay  according to the period T of the first input voltage and a discharge time T Release  of each relay of the first switch unit  13 , and determines when to output a control signal to disconnect the relays R 1 , R 2 , R 3 , R 4  of the first switch unit  13  according to the delay time T Delay  and the zero crossover signal of the first input voltage. Each relay usually includes a coil and a plurality of contacts. In at least one embodiment, the discharge time T Release  is a period started from the coil of one relay receiving a disconnect signal until the contacts of the relay disconnecting, and the delay time T Delay  is a period between the processor  25  detects the zero crossover signal (ZCD) of the first input voltage and outputs control signal to the relays, to make the relays to disconnect. 
       FIGS. 4 to 6  illustrates waveform schematic diagrams of the first input voltage relating to three forms of zero crossover signal (ZCD) of the first input voltage, which make the processor  25  to determine when to output the delay time T Delay  of each relay (Delay) of the first switch unit  13 . In at least one embodiment, a relationship between the T Delay  and the T Release  as formula: T/4−T Release &lt;T Delay &lt;T/2−T Release , or 3T/4−T Release &lt;T Delay &lt;T−T Release . 
     Therefore, the processor  25  detects the zero crossover signal (ZCD) of the first input voltage and outputs the control signal to the relays R 1 -R 4  of the first switch unit  13  after the delay time T Delay . When the contacts of the relays R 1 -R 4  of the first switch unit  13  coupled to the first input terminal  11  turn off, the processor  25  controls the contacts of the relays R 5 -R 8  of the second switch unit  14  coupled to the second input terminal  12  to turn on, to make the second input voltage from the second source S 2  to be transmitted to the output terminal  15  through the relays R 5 -R 8 . In at least one embodiment, the zero crossover signal of the first input voltage is a signal of the sinusoidal wave of the first input voltage approach to an abscissa axis. 
       FIG. 7  illustrates a schematic diagram of a second embodiment of the switch control device  100 . Difference from the first embodiment of the switch control device  100  is that, the detection unit  23  includes the voltage sensor  230  and a peak of wave signal sensor  233 . The peak of wave signal sensor  233  includes a first peak of wave signal sensor  2330  and a second peak of wave signal sensor  2331 . The first peak of wave signal sensor  2330  and the second peak of wave signal sensor  2331  are configured to receive the first input voltage and the second input voltage respectively, and detects peak of wave signal of the first or second input voltage, to transmit the peak of wave signal of the first or second input voltage to the processor  25 . 
     In at least one embodiment, operation principle of the switch control device  100  in the first embodiment is similar as that of the second embodiment. When the output terminal  15  receives a first input voltage from the first input terminal currently, the first voltage sensor  2301  detects the first input voltage from the first input terminal  11 , and transmits the first voltage to the processor  25 . The first peak of wave signal sensor  2330  detects the peak of wave signal of the first input voltage, and outputs the peak of wave signal to the processor  25 . The processor  25  detects the period T of the first input voltage through the first voltage sensor  2301 , and determines whether the first input voltage is normal or not. If the first input voltage is abnormal, the processor  25  computes a delay time T Delay  according to the period T of the first input voltage and the T Release  of each relay of the first switch unit  13 , and determines when to output a control signal to disconnect the relays R 1 , R 2 , R 3 , R 4  of the first switch unit  13  according to the delay time T Delay  and the peak of wave signal of the first input voltage. 
       FIGS. 8 to 10  illustrates waveform schematic diagrams of the first input voltage relating to three forms of peak of wave signal (PKD) of the first input voltage, which make the processor  25  to determine when to output the delay time T Delay  of each relay (Delay) of the first switch unit  13 . In at least one embodiment, a relationship between the T Delay  and the T Release  as formula: 0&lt;T Delay &lt;T/4−T Release , or T/2−T Release &lt;T Delay &lt;3T/4−T Release . 
     Therefore, the processor  25  detects the peak of wave signal (PKD) of the first input voltage and outputs the control signal to the relays R 1 -R 4  of the first switch unit  13  after the delay time T Delay . When the contacts of the relays R 1 -R 4  of the first switch unit  13  coupled to the first input terminal  11  turn off, the processor  25  controls the contacts of the relays R 5 -R 8  of the second switch unit  14  coupled to the second input terminal  12  to turn on, to make the second input voltage from the second source S 2  to be transmitted to the output terminal  15  through the relays R 5 -R 8 . Therefore, an arc discharge resulted by the relays can be avoid or reduce. 
     Referring to  FIG. 11 , a flowchart is presented in accordance with an example embodiment of a switch control device  100  which is being thus illustrated. The example method is provided by way of example, as there are a variety of ways to carry out the method. The method described below can be carried out using the configurations illustrated in  FIGS. 1, 2,3, and 7 . The exemplary method can be executed by an switch control device  100 , and can begin at block  1101 . 
     At block  1101 , the voltage sensor  230  receives the first input voltage from the first input terminal. 
     At block  1102 , a sensor, such as the zero crossover signal sensor  231  or the peak of wave signal sensor  233  senses the zero crossover signal or the peak of wave signal of the first input voltage. 
     At block  1103 , the processor  25  receives the first input voltage from the voltage sensor  230 , and detects the period T of the first input voltage. 
     At block  1104 , the processor  25  determined whether the first input voltage is normal or not, If the first input voltage is abnormal, the process goes to block  1105 , otherwise, the process goes to block  1101 . 
     At block  1105 , the processor  25  computes a delay time T Delay  according to the period T of the first input voltage and the discharge time T Release  of each relay of the first switch unit  13 . 
     At block  1106 , the processor  25  determines when to output a control signal to disconnect the contacts of the relays of the first switch unit  13  according to the delay time T Delay  and the zero crossover or peak of wave signal of the first input voltage. 
     At block  1107 , when the contacts of the relays of the first switch unit  13  coupled to the first input terminal  11  are turned off, the processor  25  controls the contacts of the relays of the second switch unit  14  coupled to the second input terminal  12  to turn on, to make the second input voltage from the second source S 2  to be transmitted to the output terminal  15  through the second switch unit  14 . 
     When the second input terminal  12  transmits the second input voltage from the second source S 2  to the output terminal  15  through the second switch unit  14 , and the second voltage sensor  2302  operates, the principle is similar to the first input terminal  11  transmits the first input voltage from the first source S 1  to the output terminal  15  through the first switch unit  13 , and the first voltage sensor  2301  operates. 
     While the disclosure has been described by way of example and in terms of the embodiment, it is to be understood that the disclosure is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the range of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.