Patent Publication Number: US-2022239348-A1

Title: Communications using an inductive coupling

Description:
REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 16/748,776, filed Jan. 21, 2020, now pending, which is a continuation of U.S. patent application Ser. No. 16/206,667 filed on Nov. 30, 2018 which has now been granted with patent no. U.S. Pat. No. 10,574,302 which claims priority to European Patent (EP) Application No. 17205539.4, filed Dec. 5, 2017. U.S. patent application Ser. No. 16/206,667 and EP Application No. 17205539.4 are hereby incorporated by reference in their entirety. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates generally to communications using an inductive coupling. For example, a controller for a semiconductor switch can include a transmitter and receiver that communicate across galvanic isolation using an inductive coupling. 
     2. Discussion of the Related Art 
     Electrical devices in many contexts include a communication system to send information between a transmitter and a receiver that are galvanically isolated and are hence referenced to different ground potentials. Examples include power converters, medical equipment, marine equipment, and the like. The communications channel in such communication system can be implemented using an inductive coupling like a signal transformer. Like other transformers, signal transformers can transfer electrical energy across galvanic isolation. In general, signal transformers are designed to minimize leakage inductance and stray capacitance and thereby improve high-frequency response. For example, the windings of a signal transformer can be split into sections and interleaved. 
     Switching power converters generally convert an input into a regulated output for a load by controlling the transfer of power across an energy transfer element. In operation, one or more switches are controlled to provide the desired power transfer. A wide variety of approaches have been described, including varying the duty cycle (i.e., the ratio of the on-time of the switch to the total switching period), varying the switching frequency, and/or varying the number of current conduction pulses per unit time. 
     A power converter can have a primary side and a secondary side that are galvanically isolated from each other. A power converter can also include one or more controllers to control the one or more switches. The one or more controllers may communicate across the galvanic isolation. One such communication system uses the windings of an inductive coupling to send information from a transmitter to a receiver. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified. 
         FIG. 1  illustrates an example power conversion system utilizing a controller with bidirectional communication between a driver interface and a drive circuit in accordance with an embodiment of the present disclosure. 
         FIG. 2A  illustrates an example controller with bidirectional communication between a driver interface and a drive circuit of  FIG. 1  in accordance with an embodiment of the present disclosure. 
         FIG. 2B  is a table illustrating example current values for various signals of the controller shown in  FIG. 2A  in accordance with an embodiment of the present disclosure. 
         FIG. 3A  illustrates an example data transmitter of  FIG. 2A  in accordance with an embodiment of the present disclosure. 
         FIG. 3B  illustrates example sense signals of  FIGS. 1, 2A, and 3A  in accordance with an embodiment of the present disclosure. 
         FIG. 4  illustrates an example fault transmitter of  FIG. 2A  in accordance with an embodiment of the present disclosure. 
         FIG. 5  illustrates an example fault receiver and data receiver of  FIG. 2A  in accordance with an embodiment of the present disclosure. 
         FIG. 6A  is a table illustrating priorities between the various transmissions between the driver interface and drive circuit of  FIG. 2A  in accordance with an embodiment of the present disclosure. 
         FIG. 6B  is a timing diagram illustrating the primary winding current when there is a collision between a data transmission, command transmission, and a fault transmission in accordance with an embodiment of the present disclosure. 
         FIG. 6C  is a timing diagram illustrating another example of the primary winding current for when there is a collision between a data transmission, command transmission, and a fault transmission in accordance with an embodiment of the present disclosure. 
     
    
    
     Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention. 
     DETAILED DESCRIPTION 
     In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one having ordinary skill in the art that the specific detail need not be employed to practice the present invention. In other instances, well-known materials or methods have not been described in detail in order to avoid obscuring the present invention. 
     Reference throughout this specification to “one embodiment”, “an embodiment”, “one example” or “an example” means that a particular feature, structure or characteristic described in connection with the embodiment or example is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment”, “in an embodiment”, “one example” or “an example” in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures or characteristics may be combined in any suitable combinations and/or subcombinations in one or more embodiments or examples. Particular features, structures or characteristics may be included in an integrated circuit, an electronic circuit, a combinational logic circuit, or other suitable components that provide the described functionality. In addition, it is appreciated that the figures provided herewith are for explanation purposes to persons ordinarily skilled in the art and that the drawings are not necessarily drawn to scale. 
     As described above, electrical devices may include an inductive coupling that provides a communications channel between a transmitter and a receiver that are galvanically isolated from one another. However, an inductive coupling communications channel may have certain limitations. For example, because the transmitter and the receiver are galvanically isolated, it may be costly to provide both the transmitter and the receiver with a clock signal. Communications across an inductive coupling communications channel are thus generally asynchronous and different transmitters can attempt to transmit a signal at the same time. 
     This specification describes inductive coupling communications channels that can address some of these limitations. For example, multiple transmitters and receivers can be coupled to an inductive coupling and access the communications channel that it provides. In effect, the inductive coupling can provide multiple channel access. In some cases, the transmitters can transmit asynchronously, i.e., without a clock signal or other timing mechanism that ensures that their respective transmissions do not collide. In some cases, the signals transmitted can have different priorities so that signals that are more important to the operation of a device are conveyed more reliably than signals that are less important. 
     The inductive coupling communications channels can be implemented in a variety of different devices, including power conversion systems in which a switch controller controls the switching of a power switch. In some such power conversion systems, the power switch may be an insulated-gate bipolar transistor (IGBT) controlled by an IGBT driver. In some cases, the switch controller may include a driver interface and a drive circuit that are coupled to communicate across galvanic isolation using the inductive coupling communications channel. The inductive coupling can be implemented as a signal transformer or other coupled inductors. The driver interface may be on the primary side of the transformer while the drive circuit may be on the secondary side. The power conversion system may also include a system controller, which controls one or more switch controllers. 
     The driver interface may be coupled to receive one or more input signals from a system controller and provide one or more output signals to the system controller. In one example, the driver interface receives a command signal from the system controller regarding switching the power switch between an ON state and OFF state. The command signal is then communicated to the drive circuit across the galvanic isolation via the inductive coupling communications channel to drive the switching of the power switch. In other words, the command signal is communicated from the primary to the secondary of the power converter. 
     The drive circuit may be coupled to receive a fault signal representative of a fault condition of the power converter, such as an overcurrent or overvoltage condition of the power switch. The fault signal is communicated across the galvanic isolation via the inductive coupling communications channel from the drive circuit to the driver interface. The driver interface then outputs the fault signal to the system controller. In other words, the fault signal is communicated from the secondary to the primary of the power converter. An indication of the fault by the fault signal may trigger the system controller to immediately turn off the power switch or the driver may turn off the power switch independently of the fault signal transmission. 
     Operating conditions of the power switch or the power converter, such as temperature or voltage of the power switch, the input voltage of the converter, or the load current of the power switch, may also be communicated from secondary to the primary of the power converter. This can be referred to as data and the corresponding communications as data signals. In embodiments of the present disclosure, data signals regarding the operating conditions of the power switch/converter may be communicated by the driver circuit to the driver interface across the galvanic isolation via the same inductive coupling communications channel that communicates fault signals and command signals. As such, the driver interface and the drive circuit are capable of bidirectional communication and may eliminate the need for additional hardware. Thus, a driver circuit can communicate both a fault signal and data signals across the galvanic isolation via a single inductive coupling communications channel. 
     In some implementations, a driver interface is coupled to the primary winding of the inductive coupling whereas the drive circuit is coupled to the secondary winding of the inductive coupling. In one embodiment, the driver interface transmits a command signal to the drive circuit by applying a voltage to the primary winding, which induces a voltage and current in the secondary winding. Further, the drive circuit transmits both the fault signal and the data signal to the driver interface via the inductive coupling. In one example, the drive circuit sends a fault signal by providing current to flow in a first direction through the secondary winding of the inductive coupling and sends a data signal by providing current to flow in a second direction through secondary winding of the inductive coupling, wherein the first direction and second direction are opposite of each other. The driver interface receives and differentiates the fault signal and the data signal by the direction of the received induced current in the primary winding of the inductive coupling. 
     In one embodiment, the transmission of the command signal, fault signal, and data signal are not synchronized. As such, the duration and/or magnitude may be selected to manage collisions if the signals are transmitted at the same time. The duration and/or magnitude may be selected to operate in the high power/high noise environment like a power converter. In one example, the duration and/or magnitude of the fault signal is relatively long/large as compared to either the command signal or the data signal such that the fault signal will dominate. The magnitude of the command signal may be relatively large compared to the data signal but the duration may be relatively small as compared to either the fault signal or the data signal. Further, the data signal may have a relatively small magnitude but long duration as compared to either the fault signal or the command signal. 
       FIG. 1  illustrates an example power conversion  100  that includes a driver interface with bidirectional communication  118  and drive circuits with bidirectional communication  110 ,  111 . Power converter  100  receives an input voltage  102  (V IN ) and is designed to transfer electrical energy from the input to a load  108  through an energy transfer element L 1   107  by controlling the switching of power switches  104 ,  105 . In various implementations, the power converter  100  can control voltage, current, or power levels of the energy output to the load  108 . In the example shown in  FIG. 1 , energy transfer element L 1   106  and two power switches  104 ,  105  are coupled together in a half-bridge configuration. However, other topologies can also be used. 
     In the example shown in  FIG. 1 , power switches  104 ,  105  are IGBTs. However, examples of the present invention can also be used in combination with other power switches. For example, metal-oxide-semiconductor field-effect transistors (MOSFETs), bipolar transistors, injection enhancement gate transistors (IEGTs) and gate turn-off thyristors (GTOs) can be used. In addition, power converter  100  can be used with power switches which are based on gallium nitride (GaN) semiconductors or silicon carbide (SiC) semiconductors. 
     System controller  112  is coupled to receive system inputs  113  and provide system outputs  183 . The system controller  112  determines whether the switch controllers (shown as the driver interface  118  and drive circuits  110 ,  111 ) should turn on or turn off the power switches  104 ,  105  based on the system inputs  113 . Example system inputs  113  include pulse width modulated (PWM) signal for a general purpose motor drive, a turn-on and turn-off sequence of a multi-level power converter, or a system fault turn-off request. 
     In the illustrated power converter  100 , the system controller outputs one or more commands CMD  130  to the drive interface  118  of the switch controller. Command CMD  130  may be a rectangular pulse waveform that includes logic high and logic low sections of varying durations. For example, logic high values may indicate that power switch  104  should be in the ON state while logic low values may indicate that power switch  104  should be in the OFF state. Power switch  105  is switched alternately with power switch  104  so that both are not in the ON state at the same time. Indeed, power switches  104 ,  105  are generally controlled to have a dead time where both are in the OFF-state between switching transitions. In any case, the durations of the logic high/logic low values can correspond to the desired driving of power switches  104 ,  105 . 
     Power switches  104 ,  105  are each controlled by the driver interface with bidirectional communication  118  and a drive circuit with bidirectional communication ( 110 ,  111  respectively). Although  FIG. 1  illustrates a single driver interface  118 , it should be appreciated that each drive circuit  110 ,  111  may have its own driver interface. The driver interface  118  and the system controller  112  are both referenced to a primary reference potential  106  while the drive circuit  110  is referenced to a secondary reference potential  175  and the drive circuit  111  is referenced to a secondary reference potential  176 . Secondary reference potentials  175 ,  176  are different potentials. The drive circuits  110 ,  111  bidirectionally communicate with the driver interface  118  and are also galvanically isolated from the driver interface  118  by isolated communication links  119 . The isolated communication links may be implemented as a signal transformer, coupled inductors, or other inductive coupling. 
     Driver interface  118  interprets the command CMD  130  sent by the system controller  112  and sends a command signal to instruct drive circuits  110 ,  111  to drive power switches  104 ,  105  into the ON and OFF states, respectively, via the isolated communication links  119 . The drive circuits  110 ,  111  receive their respective command signals and generate the first drive signal U DR1    116  and the second drive signal U DR2    117  to drive power switches  104 ,  105 . 
     In general, drive circuits  110 ,  111  can have corresponding structures and perform corresponding operations. However, for the sake of brevity, a detailed description of the drive circuit  111  is omitted from the following discussion, which refers only to drive circuit  110 . 
     Drive circuit  110  receives a first sense signal U SENSE1    114  and a second sense signal U SENSE2    115 . The first and second sense signals U SENSE1    114 , U SENSE2    115  are representative of operational conditions of the power switch  104  and may be referred to as data. In the example shown, the first sense signal U SENSE1    114  is representative of the collector-to-emittter voltage of power switch  104  while the second sense signal U SENSE2    115  is representative of the temperature of the power converter as measured by the temperature sensor NTC  155 . Other example operating conditions include the gate-emitter voltage of the power switch, the current flowing through the power switch, or the load current of L 1   107 . Drive circuit  110  may detect a fault condition or receive fault signals (not shown) that are representative of an overvoltage or overcurrent fault in the respective power switches  104 ,  105 . The fault signal and the data provided by the first and second sense signals U SENSE1    114 , U SENSE2    115  are communicated from the drive circuit  110  to the driver interface via the communication link  119 . The command signal is transmitted from the primary side of the power converter  100  to the secondary side of the power converter  100  while fault and data are transmitted from the secondary side of the power converter  100  to the primary side of the power converter  100 . As such, the communication across the isolating communication link  119  is bidirectional. 
     Driver interface  118  receives the fault signal and data signals from the drive circuit  110  and converts and outputs data signal D  132  and (if appropriate) fault signal F  131  to system controller  112 . The system controller  112  may use the received signals to determine whether to turn on or turn off power switches  104 ,  105 . The determination whether to turn on or turn off power switches  104 ,  105  may also be made, e.g., by drive circuit  110 . 
       FIG. 2A  illustrates an example switch controller  200  with bidirectional communication between the driver interface  218  and the drive circuit  210 . The inductive coupling of communication link  219  is implemented as a signal transformer with a primary winding and secondary winding. The voltage across the primary winding is labeled as the primary voltage V P    221  while the voltage across the secondary winding is labeled as secondary voltage V S    222 . The dots on the inductive coupling that forms communication link  219  represent the direction of current and polarity of voltage that one winding of a signal transformer induces in the other. It should be appreciated that similarly named and numbered elements are coupled and function as described above. Further, the system controller  212  and the power switch  204  are illustrated in  FIG. 2A  to provide context for the driver interface  218  and the drive circuit  210 . 
     System controller  212  is coupled to receive system inputs  213  and provide system outputs  283 . Further, the system controller  212  is coupled to output command signal CMD  230  to the driver interface  218  and receive fault signal FLT  231  and data signal DATA  232  from the driver interface. The system controller  212  may generate command CMD  230  in response to system inputs  213 , fault signal FLT  231 , and data signal DATA  232 . 
     The illustrated driver interface  218  includes a command transmitter  223 , a fault receiver  224 , and a data receiver  225 . Further shown are switches G 1   226 , G 2   227 , G 3   228 , and G 4   229 . The illustrated switches are n-type metal-oxide-semiconductor field effect transistors (MOSFETs) but it should be appreciated that other switches may be used. Switch G 1   226  is coupled to a supply voltage V DD  and the dot-end of the primary winding of transformer  219 . Switch G 2   227  is coupled to primary reference  206  the end of the primary winding without the dot. Switch G 3   228  is coupled to the supply voltage V DD  and the end of the primary winding without the dot. Switch G 4   229  is coupled to primary reference  206  and the dot-end of the primary winding of transformer  219 . As shown, the input/output terminal of the driver interface  218  which is coupled to transistors G 1   226 , G 4   229  is labeled with TRP while the input/output terminal of the driver interface  218  which is coupled to transistors G 2   227 , G 3   228  is labeled with TRN. 
     The command transmitter  223  is coupled to receive command CMD  230  from the system controller  212  and generate control signals for each of the switches G 1   226 , G 2   227 , G 3   228 , and G 4   229 . The voltage generated across the primary winding of transistor  219  by the control of switches G 1   226 , G 2   227 , G 3   228 , and G 4   229  can instruct drive circuit  210  to drive power switch  204 . In one example, command transmitter  223  responds to a logic high command signal CMD  230  by transmitting an ON command that instructs drive circuit  210  to drive power switch  204  into an ON state and to a logic low command signal CMD  230  by transmitting an OFF command that instructs drive circuit  210  to drive power switch  204  into an OFF state. For example, in response to receiving a rising edge in command CMD  230 , command transmitter  223  can control switches G 1   226 , G 2   227  into a conductive ON state and control switches G 3   228 , G 4   229  into a non-conductive OFF state for a fixed amount of time. As a result, the dot-end of primary winding is coupled to the supply voltage V DD  and the other end is coupled to primary reference  206 . Voltage V DD  is thus applied to the primary winding for a fixed amount of time. In another words, there is a positive pulse in primary voltage V P    221  of a magnitude that is substantially equal to voltage V DD . In response to receiving a falling edge in command CMD  230 , command transmitter  223  can control switches G 3   228 , G 4   229  into a conductive ON state and switches G 1   226 , G 2   227  into a non-conductive OFF state for a fixed amount of time. As a result, the dot-end of the primary winding is coupled to the primary reference  206  and the other end is coupled to supply voltage V DD . A negative reference voltage −V DD  is thus applied to the primary winding for a fixed amount of time. In another words, there is a negative pulse in primary voltage V P    221  of a magnitude that is substantially equal to voltage V DD . 
     When the command transmitter  223  is not transmitting an ON command or an OFF command (i.e., in an idle state), the command transmitter  223  either a) turns on switches G 2   227 , G 4   229  and turns off switches G 1   226 , G 3   228  or b) turns off switches G 2   227 , G 4   229  and turns on switches G 1   226 , G 3   228 . This may be done to improve the noise immunity of the communications across the transformer  219 . 
     As will be further discussed, a fault receiver  224  is coupled to the dot-end of the primary winding of transformer  216  to sense an induced current and a data receiver  225  is coupled to the end of the primary winding without the dot to sense an induced current. These induced currents represent fault and data signals, respectively. 
     Drive circuit  210  includes the drive signal generator  233 , a fault transmitter  234 , and a data transmitter  235 . Drive signal generator  233  is coupled to the secondary winding and senses the secondary voltage V S    222  across the secondary winding of transformer  219 . A changing voltage across the primary winding induces a voltage across the secondary winding. Drive signal generator  233  senses the induced secondary voltage V S    222  to determine if the command transmitter  223  sends an ON command or an OFF command. Drive signal generator  233  also generates a responsive drive signal UDR  216  to drive the power switch  204  accordingly. 
     Fault transmitter  234  is coupled to receive a fault control signal U FAULT    256 . The fault control signal U FAULT    256  may indicate an overcurrent (e.g., an overload or short-circuit) or overvoltage fault in the power switch  204 . In one example, the fault control signal U FAULT    256  is a rectangular pulse waveform that includes logic high and logic low sections of varying lengths. In response to a fault, the fault control signal U FAULT    256  may transition to a logic high value. In response to the fault control signal U FAULT    256 , fault transmitter  234  generates a fault signal  236  to communicate the presence of a fault to the driver interface  218 . The fault transmitter  234  is referenced to a secondary reference  275 . Fault transmitter  234  may be implemented as a switchable current source that provides a fault current I FAULT    236  in response to the fault control signal U FAULT    256 . In the illustrated implementation, fault current I FAULT    236  flows into the dot-end of the secondary winding and induces a primary side fault current I FAULT_P    238  which flows out of the dot-end of the primary winding. The magnitude of the primary side fault current I FAULT_P    238  is related to the secondary side fault current I FAULT    236  by the turns ratio of the signal transformer  219 . Fault receiver  224  senses the primary side fault current I FAULT_P    238 , identifies that the primary side fault current I FAULT_P    238  is indicative of a fault on the secondary side, and outputs a signal FLT  231  to the system controller  212 . 
     In the illustrated implementation, data transmitter  235  is coupled to receive a first sense signal U SENSE1    214  and a second sense signal U SENSE2    215 . Both sense signals are representative of operating conditions of the power switch  204 . Data transmitter  235  encodes the data provided by the first sense signal U SENSE1    214  and the second sense signal U SENSE2    215  and generates a data signal I DATA    237  that embodies that data. Data signal I DATA    237  induces a corresponding primary side data current I DATA_P    239  and thereby conveys information to the driver interface  218  via an inductive coupling  219 . In some implementations, the information is encoded in a binary word. For example, logic high pulses in the data signal I DATA    237  can indicate binary “1s” and logic low pulses or no pulse can indicate binary “0s.” In some implementations, the data signal I DATA    237  comports with a universal asynchronous receiver transmitter (UART) protocol. In some implementations, an error-correcting code such as a Hamming code or cyclic redundancy check (CRC) code can be used. 
     The data transmitter  235  is referenced to secondary reference potential  275  and may be implemented as a current source that provides data current signal I DATA    237 . Data current signal I DATA    237  flows into a different end of the secondary winding from fault current I FAULT    236 , namely, the end of the secondary winding without the dot in the illustrated implementation. The secondary side data current I DATA    237  induces a primary side data current I DATA_P    239  which flows from the opposite end of the dot in the primary winding. The magnitude of the primary side data current I DATA_P    239  is related to the magnitude of the secondary side data current I DATA    237  by the turns ratio of the signal transformer  219 . Data receiver  225  senses the primary side data current I DATA_P    239  and decodes the received signal. The decoded information is conveyed to the system controller as DATA  232 . As will be discussed further below, the magnitude and the duration of the command signals sent by the command transmitter  223  (i.e., primary voltage V P    221 ), the fault signals sent by the fault transmitter  234  (i.e., fault current I FAULT    236 ), and the data signals sent by the data transmitter  235  (i.e., data current I DATA    237 ) may be chosen so that these signals can be differentiated even in the event of firsts between them. Driver interface  218  and drive circuit  210  thus need not be synchronized or limited to transmitting information in accordance with a time sharing scheme. Rather, the communications channel formed by inductive coupling  219  can provide simultaneous access to multiple transmitters that transmit data asynchronously 
       FIG. 2B  is a table  201  of example current and voltage values for the command signals, fault signal, and data signals input into signal transformer  219  for an example implementation. It should be appreciated that the polarities of the currents are consistent with their illustration in  FIG. 2A . The polarities of the primary voltage V P    221  and secondary voltage V S    222  are also consistent with their illustration  FIG. 2A . 
     The first row of the table  201  sets forth the primary voltage V P    221  for a transmitted ON command and a transmitted OFF command in the example implementation. For an ON command, the primary voltage V P    221  is substantially +V DD  for a period T 1 . For an OFF command, the primary voltage V P    221  is substantially −V DD  for a period T 1 . In the example implementation, V DD  is substantially 15 volts (V) and period T 1  is substantially 200 nanoseconds (ns). Although the example ON and OFF commands have an equal duration but opposite polarity, it should be appreciated that a variety of different polarities and durations may be used in other implementations. 
     The second row of table  201  sets forth the secondary winding current for a transmitted fault current I FAULT    236  in the example implementation. In response to a fault, the magnitude of the fault current I FAULT    236  is substantially equal to −I 2  for a period T 2 . In the absence of a fault, the fault current I FAULT    236  can be substantially equal to zero. The duration of period T 2  is greater than the duration of period T 1  for the command signals. In the example implementation, I 2  is substantially equal to 170 milliamps (mA) and the duration of period T 1  is substantially equal to 4.4 microseconds (us). However, in other implementations, different polarities and durations may be used. For example, the windings of the transformer may be wrapped in the opposite direction around the core. Also, in other implementations, a no fault condition may be another magnitude and/or may have a predetermined duration. 
     The third row of table  201  sets forth the secondary winding current for a transmitted data current I DATA    237  in the example implementation. In the example implementation, the data is encoded in a binary word. The data current I DATA    237  is substantially equal to +I 3  for period T 3  to transmit a binary “1.” Data current I DATA    237  is substantially zero to transmit a binary “0.” Further, the duration of period T 3  is greater than the duration of period T 1 . In the example implementation, +I 3  is substantially 30 mA and period T 3  has a duration of 14 us. However, in other implementations, different polarities and durations may be used. Also, a “0” transmission may be another magnitude and/or may have a predetermined duration. 
       FIG. 3A  illustrates a data transmitter  335 , which is one example of data transmitter  235  shown in  FIG. 2A . It should be appreciated that similarly named and numbered elements are coupled and function as described above. Further, an inductive coupling  319 , a drive signal generator  333 , and a power switch  304  are illustrated to provide context for the data transmitter  335 . 
     The data transmitter  335  includes a data control/encoder  341 , a switch  346  (illustrated as an n-type MOSFET), resistances  343 ,  344 , and a diode  345 . Resistance  343  is coupled to the data control/encoder  341  and the control terminal of switch  346 . Diode  345  is coupled to resistance  343  and the end of the secondary winding without the dot. Resistance  344  is coupled to the dot-end of the secondary winding and the switch  346 . Switch  346  is coupled between resistor  344  and secondary reference  375 . 
     Data transmitter  335  may also include an optional demagnetization circuit  342  to demagnetize the transformer  319 . Demagnetization may prevent transformer  319  from going into saturation. Demagnetization circuit  342  includes a switch  351  (illustrated as an n-type MOSFET), resistances  348 ,  349 , and a diode  350 . Resistance  348  is coupled to the data control/encoder  341  and the control terminal of switch  351 . Diode  350  is coupled to resistance  348  and the dot-end of the secondary winding. Resistance  349  is coupled to the end of the secondary winding without the dot and the switch  351 . Switch  351  is coupled between resistor  349  and secondary reference  375 . 
     The data control/encoder  341  receives the first and second sense signals U SENSE1    314 , U SENSE2    315  and encodes at least some of the data provided by these signals. The data control/encoder  341  may optionally include an analog-to-digital converter to convert the data into a digital value, a SPI (Serial Peripheral Interface), an I2C interface, or other digital interface to receive data from a digital sensor. In some implementations, data control/encoder  341  may apply a universal asynchronous receiver transmitter (UART) protocol. In some implementations, data control/encoder  341  may use an error-correcting code such as a Hamming code or cyclic redundancy check (CRC) code. 
     Data control/encoder  341  controls switch  346  into and out of conduction to generate data current I DATA    337 . In one embodiment, data control signal U DATA    347  is logic high when transmitting a binary “1” and logic low when transmitting a binary “0.” Or in other words, the data control signal U DATA    347  switches the switch  346  into conduction to transmit a binary “1” and switches the switch  346  out of conduction to transmit a binary “0.” The inverse polarity can also be used. When the data control signal U DATA    347  turns on the switch  346 , current flows through resistor  343 , diode  345  and into the end of the secondary winding without the dot. The current flows out of the dot-end of the secondary winding and through resistor  344  and switch  346  to secondary reference  375 . In one example, the magnitude of data current I DATA    337  is substantially equal to I 3  and switch  346  is turned on for period T 3 . The data current I DATA    337  induces a primary side data current I DATA_P    339  which flows out of the end of the primary winding without the dot. 
     The transmitted data current I DATA    337  may magnetize and eventually saturate the transformer  319 . Demagnetization circuit  342  may demagnetize the transformer  319  intermittently or every time the data transmitter  355  transmits a binary “1.” The demagnetization circuit  342  demagnetizes the transformer  319  by sending a demagnetization current I DEMAG    353  of equal value to the data current I DATA    337  but in the opposite direction through the secondary winding. In the example shown, the demagnetization current I DEMAG    353  flows into the dot end of the secondary winding. The equal and opposite demagnetization current I DEMAG    353  may be transmitted before or after a binary “1” data current I DATA    337  or when necessary. When the switch  351  is turned on, demagnetization current I DEMAG    353  flows through resistor  348 , diode  350  and into the dot-end of the secondary winding. The demagnetization current I DEMAG    353  flows out of the secondary winding and through resistor  349  and switch  351  to secondary return  375 . In some implementations, the values of resistances  343  and  348  may be substantially equal and the value of resistances  344  and  349  may be substantially equal. In other implementations, they may have different values. 
       FIG. 3B  illustrates example first and second sense signals U SENSE1    314 , U SENSE2    315 . In one example, the first sense signal U SENSE1    314  is representative of the input voltage V IN    302  and may increase as the input voltage V IN    302  increases. The second sense signal U SENSE2    315  is representative of temperature and may decrease as the temperature increases. 
       FIG. 4  illustrates a fault transmitter  434 , which is one example of the fault transmitter  234  shown in  FIG. 2A . It should be appreciated that similarly named and numbered elements couple and function as described above. Further, an inductive coupling  419 , a drive signal generator  433 , and a power switch  404  are illustrated to provide context for fault transmitter  434 . 
     The fault transmitter  434  includes switches  457 ,  458  (illustrated as n-type MOSFETs) and a diode  459 . Switch  457  is coupled between a supply voltage VISO and diode  459 . Further, switch  457  is controlled by fault control signal U FAULT    456 . Diode  459  is coupled to the dot-end of the secondary winding of inductive coupling  419 . The switch  458  is coupled to the other end of the secondary winding (without the dot) and is referenced to secondary reference  475 . Switch  458  is controlled by shifted fault control signal U FAULT′   484 . 
     The fault control signal U FAULT    456  and shifted fault control signal U FAULT′   484  are synchronized and, in some implementations, can be output from a single source. In response to sensing a fault, both fault control signal U FAULT    456  and shifted fault control signal U FAULT′   484  can be transitioned to a logic high state that controls switches  457 ,  458  into a conductive state. Fault current I FAULT    436  flows through switch  457 , diode  459 , and into the dot-end of the secondary winding of transformer  419 . Fault current I FAULT    436  also flows out of the opposite end of the secondary winding and to secondary reference  475  through switch  458 . The magnitude of the fault current I FAULT    436  is substantially equal to current  12  and the switches  457 ,  458  are turned on for period T 2 . 
       FIG. 5  illustrates a fault receiver  524  and data receiver  525 , which are examples of the fault and data receiver  224 ,  225  shown in  FIG. 2A . It should be appreciated that similarly named and numbered elements are coupled and function as described above. Further, an inductive coupling  519  is illustrated to provide context for the fault receiver  524  and data receiver  525 . 
     The fault receiver  524  is shown as including a comparator  581 , an integrator  560 , and a comparator  561 . The fault receiver  524  is coupled to the dot-end of the primary winding of transformer  519 . As mentioned above, a transmitted fault current I FAULT    536  on the secondary induces a primary side fault current I FAULT_P    538 . The primary side fault current I FAULT_P    538  is sensed by the fault receiver  524 . In one example, the primary side fault current I FAULT_P    538  may be sensed by a current sensing resistance or MOSFET. For example, the fault current I FAULT_P    538  may be sensed by sensing the drain-source voltage of transistor G 4  shown in  FIG. 2A . 
     The sensed primary side fault current I FAULT_P    538  and a first threshold TH 1   562  is received by comparator  581 . As shown, the primary side fault current I FAULT_P    538  is received at the non-inverting input while the first threshold TH 1   562  is received at the inverting input of comparator  581 . The output of comparator  581  is received by integrator  560 . In the illustrated example, integrator  560  integrates with an upward slope up to a maximum value when the sensed primary side fault current I FAULT_P    538  is greater than the first threshold TH 1   562 . The integrator  560  integrates with a downward slope to a minimum value when the sensed primary side fault current I FAULT_P    538  is less than the first threshold TH 1   562 . As will be further discussed, the first threshold TH 1   562  may be within the range of 100-145 mA. For an example where the sensed primary side fault current I FAULT_P    538  is a voltage signal, the first threshold TH 1   562  may be a range of voltage values which correspond to a current value of 100-145 mA. 
     In operation, when the sensed primary side fault current I FAULT_P    538  is greater than the first threshold TH 1   562 , comparator  581  outputs a high signal that is integrated with an upward slope up to a maximum value by integrator  560 . When the sensed primary side fault current I FAULT_P    538  is less than the first threshold TH 1   561 , comparator  581  outputs a low signal and integrator  560  is discharged with a downward slope down to a minimum value. The integration result is output from integrator  560 . 
     Comparator  561  is coupled to receive the output of integrator  560  and a second threshold TH 2   565 . As shown, the output of integrator  560  is received at the inverting input of comparator  561  and the second threshold TH 2   565  is received at the non-inverting input. In response to the output of integrator  560  rising above second threshold TH 2   565 , comparator  561  outputs a logic high fault signal FLT  531 . In response to the output of integrator  560  being below second threshold TH 2   565 , comparator  561  outputs logic low fault signal FLT  531 . The second threshold TH 2   465  may be representative of a time threshold for the amount of time which the sensed primary side fault current I FAULT_P    538  is greater than the first threshold TH 1   562 . For example, the second threshold TH 2   565  may correspond to an amount of time between 790-1620 ns. Signal FLT  531  is conveyed to the system controller (not shown). Thus, when the output of integrator  560  is greater than the second threshold TH 2   565 , fault receiver  524  indicates that a fault was transmitted from the driver circuit on the secondary. 
     Data receiver  525  includes a comparator  582 , an integrator  563 , a comparator  564 , and a decoder  566 . Data receiver  525  is coupled to the end opposite of the dot-end of the primary winding of transformer  519 . As mentioned above, a transmitted data current signal I DATA    537  from the driver circuit induces a primary side data current I DATA_P    539 . The primary side data current I DATA_P    539  is sensed by data receiver  525 . For example, the primary side data current I DATA_P    539  may be sensed by a current sensing resistor or MOSFET. 
     The sensed primary side data current I DATA_P    539  and a fourth TH 3   579  is received by comparator  582 . As shown, the primary side data current I DATA_P    539  is received at the non-inverting input while the third threshold TH 3   579  is received at the inverting input of comparator  582 . As will be further discussed, the third threshold TH 3   579  may be within the range of 10-20 mA. For an example where the sensed primary side data current I DATA_P    539  is a voltage signal, the third threshold TH 3   579  may be a range of voltage values which correspond to a current value of 10-20 mA. In operation, when the sensed primary side data current I DATA_P    539  is greater than the third threshold TH 3   579 , comparator  582  outputs a high signal that is integrated with an upward slope up to a maximum value by integrator  563 . When the sensed primary side data current I DATA_P    539  is less than the third threshold TH 3   579 , comparator  582  outputs a low signal and integrator  563  is discharged with a downward slope down to a minimum value. The integration result is output from integrator  563 . 
     Comparator  564  is coupled to receive the output of integrator  563  and a fourth threshold TH 4   580 . As shown, the output of integrator  563  is received at the inverting input of comparator  564  and the fourth threshold TH 4   580  is received at the non-inverting input. The output of comparator  564  is logic high in response to output of integrator  564  rising above fourth threshold TH 4   580 . The output of comparator  564  is logic low in response to the output of integrator  564  being less than the fourth threshold TH 4   580 . The fourth threshold TH 4   580  may be representative of a time threshold for the amount of time which the sensed primary data current I DATA_P    539  is greater than the third threshold TH 3   579 . For example, the fourth threshold TH 4   580  may correspond to an amount of time greater than 3.3-6.6 us. Successive logic high and logic low states on the output of integrator  564  can form a series of binary bits that represent of operating conditions on the secondary. 
     Decoder  566  receives the output of comparator  564  and decodes the series of bits sent by the data transmitter  525 . Based on the information encoded in bits, decoder  566  outputs data DATA  532  to the system controller. The outputted data DATA  532  can be in the form of an analog signal, PWM signal, a bit stream, etc. 
       FIG. 6A  is a table  600  setting forth one implementation of the magnitudes and durations—at transmission—of command signals, fault signals, and data signals that can embody their relative priorities of those signals in the event of collisions on the inductive coupling. As discussed above, the driver interface and driver circuit need not be synchronized and collisions between the signals may occur. As such, the nature of the signals may be selected to set a relative priority that determines which signals are received when a collision occurs. In effect, a lossy but multiple access communications channel can be implemented on the inductive coupling. 
     In the example shown in  FIG. 6A , fault signals are prioritized over command and data signals. At least at the time of their transmission, command signals are prioritized over data signals. However, in general, the duration of data signal transmission is much longer and data will generally not be lost even with an intervening command signal. To implement these priorities, the fault signal at transmission can have relatively large (current) magnitude for a relatively long duration of time relative to the other signals. Details of an example fault signal are shown in the top row of table  600 . Further, command signals can be implemented as voltage signals, in contrast with the fault and data current signals. Details of an example command signal at transmission are shown in the second row of table  600 . Please note that command signals can be significantly shorter in duration than both fault and data signals. The individual bits that constitute data signals (and the associated demagnetization currents) are small in magnitude but have a relatively longer duration compared to fault signals and command signals. Details of an example data bit at transmission are shown in the third row of table  600 , and details of an example demagnetization current are shown in the fourth row of table  600 . It should be appreciated that the example fault and data, signals are current signals but the command signals are voltage signals. Nevertheless, these signals all induce a voltage or a current on the other side of the galvanic isolation provided by the inductive coupling. 
     In the example shown, fault current signals have a magnitude of I 2  substantially equal to 170 mA and period T 2  has a duration of 4.4 us at transmission. The first threshold TH 1  used to detect the fault current signal is within the range of 100-145 mA. Command voltage signals have a magnitude of supply voltage V DD  substantially equal to 15V (which translates to a command current of magnitude I CMD  substantially equal to 70 mA) for period T 1 , which is substantially equal to 200 ns in duration. ON command signals have a positive polarity whereas OFF command signals have a negative polarity of equal magnitude. As discussed above, the ON and OFF command signals need be equal in duration and opposite in polarity. Data current bits have a magnitude of I 3  substantially equal to 30 mA and a period T 3  with a duration of 14 us at transmission. The third threshold TH 3  used to detect a data current bit is within the range of 10-20 mA. Demagnetization currents have magnitude of I 3  substantially equal to 30 mA and a period T 3  with a duration that is substantially equal to 14 us. The polarity of the demagnetization currents is opposite the polarity of the data current bits. 
       FIG. 6B  is a timing diagram  601  which schematically illustrates an example collision between signals that are transmitted on the inductive coupling simultaneously. As described above, at transmission on the secondary winding, a fault signal can have a magnitude of I 2  substantially equal to 170 mA and period T 2  substantially equal to 4.4 us in duration. At transmission on the secondary winding, data current bits can have a magnitude of I 3  substantially equal to 30 mA and a period T 3  with a duration that is substantially equal to 14 us, but a polarity that is opposite to the polarity of the fault signal. In one example, the magnitude of the fault current signals received at the primary winding may be referred to with magnitude I 2_P . The range for the magnitude I 2_P  is related to threshold TH 1  (shown in  FIG. 5 ). For example, the magnitude I 2_P  for the primary side fault current should be greater than the first threshold TH 1 . In one example, the first threshold TH 1   662  is within the range of 100-145 mA. For data bits, the magnitude of the signals received on the primary winding may be referred to as magnitude I 3_P . The range for the magnitude I 3_P  is related to threshold TH 3  (shown in  FIG. 5 ). For example, the magnitude I 3_P  for the primary side data current should be greater than the third threshold TH 3   679 . In one example, the third threshold TH 3   679  is within the range of 10-20 mA. Although the fault signals and data bits may have predetermined durations at transmission on the secondary side, the durations received on the primary side may vary due to noise and other conditions. For example, the duration of received fault current signals may be greater than 790-1620 ns to exceed time threshold TH 2  (shown in  FIG. 5 ) and the duration of received data bits may be greater than 3.3-6.6 us to exceed time threshold TH 4  (shown in  FIG. 5 ). 
     Timing diagram  601  illustrates a primary winding current  621  that includes a three-way collision between an ON command  668 , a binary “1” data bit  639 , and a fault signal  638 . As shown, the ON command  668  collides with the binary “1” data bit  639  first. A fault signal  638  subsequently collides with the same binary “1” data bit  639 . The polarity of the primary winding current  621  shown in  FIG. 6B  (and  FIG. 6C ) for current flowing into terminal TRN (i.e. to transistors G 2  or G 3  shown in  FIG. 2A ) is positive while current flowing out of terminal TRN (i.e. from transistors G 2  or G 3  shown in  FIG. 2A ) is negative. 
     For the illustrated example, a demagnetization current  654  is induced on the primary side before the binary “1” data bit  639 . For the sake of simplicity, a magnetizing current is not shown  FIGS. 6B and 6C . During the demagnetization current  654 , the primary winding current is substantially −I 3_P    673  for period T 3   674 . After the demagnetization current  654  has finished, the binary “1” data bit  639  begins and the primary winding current  621  increases to substantially I 3_P    673  for period T 3   674 . The primary winding current is substantially I 3_P    673  for period T 3   674  except during collisions with the ON command  668  and the fault signal  638 . As shown, an ON command  668  is transmitted at the same time as the binary “1” data bit  639  is received. A spike in the primary winding current  621  is associated with the ON command  668  and the primary winding current  621  increases to a magnitude I CMD    669  for period T 1   670 . After the period T 1   670 , the primary winding current  621  decreases to substantially I 3_P    673 . Since the ON command transition  668  is a voltage signal, it swamps the voltage associated with transmission of a binary “1” data bit  639  and the ON command  668  can be received on the secondary side notwithstanding the collision. In effect, during the transmission of an ON command, the ON command  668  is prioritized over the received binary “1” data bit  639 . However, in general, the duration of data signal transmission is much longer than the ON command and data will generally not be lost even with an intervening ON command. 
     The fault signal  638  is received at the primary winding during the time that the binary “1” data bit  639  is received. As shown, the primary winding current  621  decreases to substantially −I 2_P    671  for period T 2   672  in the midst of data bit  639 . At the end of period T 2   672 , the primary winding current  621  increases to a magnitude substantially equal to I 3_P    673  and remains at magnitude I 3_P    673  for the remainder of period T 3   674 . Since the polarity of the received fault signal  638  is opposite to the polarity of the received data bit  639 , the fault signal can be discerned notwithstanding the collision. In effect, the polarity of fault signal  638  embodies a prioritization of the fault signal  638  over the binary “1” data bit  639 . 
       FIG. 6C  is another timing diagram that schematically illustrates a collision between an ON command  668 , a fault signal  638 , and a binary “1” data bit  639  on the primary side of a power converter. Similar to  FIG. 6B , a demagnetization current  654  is induced on the primary side before the binary “1” data bit  639  is transmitted. During demagnetization  654 , the primary winding current is substantially −I 3_P  for period T 3   674 . After demagnetization  654  has finished, the binary “1” data bit  639  begins and the primary winding current  621  increases to substantially I 3_P  for period T 3   674 . The primary winding current is substantially I 3_P    673  for period T 3   674  except during collisions with an ON command  668  and a fault signal  638 . 
     The fault signal  638  is received at the primary winding in the midst of a binary “1” data bit  639 . As shown, the primary winding current  621  decreases to substantially −1 2_P    671  for period T 2   672 . During the received fault signal  638 , an ON command  668  is transmitted during the period T 2   672 . A spike in the primary winding current  621  is associated with the ON command  668  and the primary winding current  621  increases for period T 1   670 . The peak of ON command  668  is substantially −I 2_P  plus I CMD . After the period T 1   621 , the primary winding current  621  decreases to substantially −I 2_P    671  and the fault signal  638  again predominates. At the end of period T 2   672 , the primary winding current  621  increases to a magnitude substantially equal to I 3_P    673  and remains at magnitude I 3_P    673  for the remainder of period T 3   674 . The respective magnitude and duration of the fault signal  638  and ON command signal  668  embodies a prioritization of fault signal  638  over the ON command signal  668 . In particular, fault signal  638  can still be discerned by a fault receiver that integrates as described above 
     The above description of illustrated examples of the present invention, including what is described in the Abstract, are not intended to be exhaustive or to be limitation to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible without departing from the broader spirit and scope of the present invention. Indeed, it is appreciated that the specific example voltages, currents, frequencies, power range values, times, etc., are provided for explanation purposes and that other values may also be employed in other embodiments and examples in accordance with the teachings of the present invention.