Patent Publication Number: US-2022231647-A1

Title: Offset voltage compensation

Description:
BACKGROUND 
     A common type of pressure sensor employs bonded or formed strain gauges formed in a substrate to detect strain in the material of the substrate due to applied pressure. In such sensors, the strain gauges utilize the piezoresistive effect such that the resistance of the strain gauges increases as pressure deforms the material of the strain gauges. Generally, the strain gauges of these pressure sensors are arranged in a bridge configuration (e.g., in a Wheatstone bridge configuration) to maximize the output of the sensor and to reduce sensor&#39;s sensitivity to errors. 
    
    
     
       DRAWINGS 
       The detailed description is described with reference to the accompanying figures. 
       The use of the same reference numbers in different instances in the description and the figures may indicate similar or identical items. Various embodiments or examples (“examples”) of the present disclosure are disclosed in the following detailed description and the accompanying drawings. The drawings are not necessarily to scale. In general, operations of disclosed processes may be performed in an arbitrary order, unless otherwise provided in the claims. 
         FIG. 1  is a circuit diagram illustrating a sensor offset voltage compensation circuit implemented using a programmable gain amplifier (PGA) in accordance with example embodiments of the present disclosure. 
         FIG. 2A  is a circuit diagram illustrating a sensor offset voltage compensation circuit implemented using a PGA in accordance with the present disclosure, wherein an offset compensation voltage is applied to an input loop of the PGA. 
         FIG. 2B  is a circuit diagram illustrating a V/I circuit block of the PGA shown in  FIG. 2A , in accordance with an example embodiment of the present disclosure. 
         FIG. 2C  is a circuit diagram illustrating a current trim circuit of the V/I block shown in  FIG. 2B , in accordance with an example embodiment of the present disclosure. 
         FIG. 3A  is a circuit diagram illustrating a sensor offset voltage compensation circuit implemented using a PGA in accordance with the present disclosure, wherein an offset compensation voltage is applied to an output loop of the PGA. 
         FIG. 3B  is a circuit diagram illustrating a programmable current source for generating an offset current to furnish the offset compensation voltage of the PGA shown in  FIG. 3A , in accordance with an example embodiment of the present disclosure. 
         FIG. 3C  is a circuit diagram illustrating a sensor offset voltage compensation circuit implemented using PGAs in accordance with the present disclosure, wherein an offset compensation voltage is applied to an output loop of the PGA, and where a second PGA is used to regulate the impedance of the circuit. 
         FIG. 4  is a circuit diagram illustrating a pressure sensor comprising a sensor resistive bridge in accordance with an example embodiment of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     Overview 
     Sensors used to measure quantities such as pressure, strain, displacement, deformation, temperature, and the like often have zero-quantity (or zero-component) offsets in their output due to imperfections in their construction which cause the sensors to have an output when no quantity is sensed (e.g., the quantity sensed is equal to zero (0)). For example, pressure sensors that employ sensor resistive bridges to measure pressure may have a zero-pressure offset voltage in their output due to factors such as mismatch of the resistive elements (e.g., resistors, strain gauges, etc.) that make up the bridge. Such sensors, which may, for example, furnish full-scale output voltages in the range of 1 to 5 mV/V, have built-in zero-pressure offset voltages as high as 100 mV/V. Thus, the pressure signal cannot be accurately measured since the offset voltage dominates the output signal of the sensor. Consequently, some type of signal conditioning may be employed to compensate for this offset voltage. Prior sensor assemblies have addressed offset voltage compensation by inserting a voltage compensation in the analog front-end of the signal processor for the pressure sensor that requires a calculation based on bridge voltage and analog path gain. The compensation is then activated through selection of corresponding EEPROM bits loaded at power up of the device. The present disclosure provides for zero-pressure offset voltage compensation without requiring calculation. 
     Accordingly, an offset voltage compensation circuit is disclosed for cancelling the zero-offset voltage from a signal generated by a device such as a sensor, for example, a sensor resistive bridge of a pressure sensor. In accordance with the present disclosure, the signal generated by the sensor comprises a voltage (hereinafter the “input voltage”) that includes a first component voltage that is proportional to the physical quantity (e.g., pressure) being sensed by the sensor and a second component voltage equal to the zero-quantity offset voltage, which corresponds to the voltage generated by the sensor when no physical quantity is sensed by the sensor, for example, when the pressure sensed by the pressure resistive bridge is zero (0). 
     The offset voltage compensation circuit comprises a programmable gain amplifier (PGA) having an input loop configured to receive the signal output by the sensor (e.g., a voltage generated a sensor resistive bridge of a pressure sensor) and an output loop configured to furnish an output signal having a voltage that is greater than the input voltage. An offset compensation voltage is applied to at least one of the input loop or the output loop of the PGA to at least substantially cancel the zero-quantity offset voltage from the output voltage supplied to the ADC. The offset compensation voltage is proportional to the bias voltage applied to the sensor to sense the physical quantity. For example, in embodiments wherein the sensor comprises a pressure resistive bridge, the offset compensation voltage is proportional to the bridge voltage applied to the sensor resistive bridge. 
     In embodiments, the PGA comprises a first amplifier having a first input, a first inverting input, and a first output and a second amplifier having a second input, a second inverting input, and a second output. The first input and the second input form the input loop and are configured to receive an input voltage from the sensor, wherein the input voltage comprises a sensor output voltage proportional to a physical quantity sensed by the sensor and a zero-quantity offset voltage corresponding to a voltage output by the sensor when no physical quantity is sensed by the sensor. The first output and the second output form the output loop and are configured to furnish an output voltage to an analog to digital convertor (ADC), which converts the output voltage to a digital signal that is furnished to a digital signal processor, or the like, to be processed. An offset compensation voltage is applied to the first inverting input and the second inverting input with a resistor to at least substantially cancel the zero-quantity offset voltage from the output voltage. In embodiments, the offset compensation voltage is proportional to the bias voltage applied to the sensor to sense the physical quantity and comprises an offset current generated from the bias voltage applied across the resistor. 
     Example Implementations 
     Referring to  FIG. 1 , an offset voltage compensation circuit  100  in accordance with example embodiments of the present disclosure is described. As shown, the offset voltage compensation circuit  100  comprises a programmable gain amplifier (PGA)  102  that includes an input loop  104  and an output loop  106 . As shown, the input loop  104  is configured to receive the signal output by a device such as the sensor resistive bridge  128  of a sensor  130 , or the like. 
     In embodiments, the PGA  102  comprises one or more amplifiers. For example, as shown, the PGA  102  may comprise at least a first operational amplifier (OA 1 )  108  and a second operational amplifier (OA 2 )  110 . The first operational amplifier  108  includes a first non-inverting input  112 , a first inverting input  114 , and a first output  116 . Similarly, the second operational amplifier  110  includes a second non-inverting input  120 , a second inverting input  118 , and a second output  122 . The first non-inverting input  112  and the second non-inverting input  120  are coupled to the outputs  124 ,  126 , respectively, of the sensor resistive bridge  128  so that the input voltage V IN  applied to the first non-inverting input  112  and the second non-inverting input  120  is equal to the output signal voltage V SIG  generated by the sensor resistive bridge  128 . 
     The output loop  106  is formed by the first output  116  and the second output  122  which have an output voltage V OUT  which is greater than the input voltage V IN  by a proportion equal to the gain G of the PGA. As shown, the operational amplifiers  108 ,  110  comprise non-inverting amplifiers having a negative feedback loops  132 ,  134  via voltage dividers R F1 /R G    136  and R F2 /R G    138 , respectively, formed by resistors  140 ,  142 ,  144  having resistances R F1 , R F2 , and R G , respectively. Thus, the gain G of the PGA is 1+2R F /R G , where R F =R F1 =R F2 , so that V OUT =V IN ·(1+2·R F /R G ). An ADC (not shown) converts the output voltage V OUT  to a digital signal that is furnished to a digital signal processor to be processed. 
     The input voltage V IN  is equal to the signal voltage V SIG  output by the sensor resistive bridge  128 , which is comprised of a first component (output) voltage that is proportional to the physical quantity (e.g., pressure) being sensed by the sensor  130  and a second component voltage equal to the zero-quantity offset voltage V SIG(0) . The zero-quantity offset voltage V SIG(0)  corresponds to the voltage generated by the sensor when no physical quantity is sensed by the sensor  130  (e.g., when the quantity (e.g., pressure) sensed by the sensor resistive bridge  128  is zero (0)). For example, in a typical implementation, wherein the sensor  130  comprises a pressure sensor and the sensor resistive bridge  128  comprises a pressure sensor resistive bridge, the output voltage generated by the sensor resistive bridge may range from 1 mV/V to 5 mV/V, while the zero-pressure offset voltage V SIG(0)  may be as high as 100 mV/V. 
     In accordance with the present disclosure, the offset voltage compensation circuit  100  applies a generated offset compensation voltage V OS  to at least one of the input loop or the output loop of the PGA  102 . For example, in various embodiments, as shown in  FIG. 1 , the offset voltage compensation circuit  100  may apply the offset compensation voltage V OS  to the first inverting input  114  and/or the second inverting input  120 , to the first non-inverting input  112  and/or the second non-inverting input  118 , or the first output  116  and/or the second output  122 . In this manner, the zero-quantity offset voltage V SIG(0)  may be at least substantially canceled from the output voltage V OUT  of the PGA  102 . 
     In embodiments, the offset compensation voltage V OS  is equal to, or substantially equal to, the zero-quantity offset voltage V SIG(0)  and is proportional to the bias voltage applied to the sensor to sense the physical quantity. For example, in embodiments wherein the sensor  130  comprises a pressure sensor and the sensor resistive bridge comprises a pressure resistive bridge, the offset compensation voltage V OS  is equal to, or substantially equal to, the zero-pressure offset voltage V SIG(0)  and is proportional to the bridge voltage V BRIDGE  applied to the pressure resistive bridge. 
       FIGS. 2A, 2B, and 2C  illustrate an implementation of the offset voltage compensation circuit  100  of  FIG. 1  in accordance with an example embodiment of the present disclosure. As shown in  FIG. 2A , the offset voltage compensation circuit  100  of  FIG. 1  is configured as a sensor zero quantity-offset voltage compensation circuit  200  that comprises a first programmable gain amplifier (PGA)  202  having an input loop  204  and an output loop  206 . The PGA  202  includes a first operational amplifier (OA 1 )  208  and a second operational amplifier (OA 2 )  210 . The first operational amplifier  208  includes a first non-inverting input  212 , a first inverting input  214 , and a first output  216 . Similarly, the second operational amplifier  210  includes a second non-inverting input  218 , a second inverting input  220 , and a second output  222 . 
     The input loop  204  is configured to receive the signal output by the sensor resistive bridge  228  of the sensor  230 . Specifically, as shown, the first non-inverting input  212  and the second non-inverting input  218  are coupled to the outputs  224 ,  226 , respectively, of the sensor resistive bridge  228  so that the input voltage V IN  applied to the first non-inverting input  212  and the second non-inverting input  218  is equal to the output signal voltage V SIG  generated by the sensor resistive bridge  228 . 
     The output loop  206  is formed by the first output  216  and the second output  222  which have an output voltage V 1  which is greater than the input voltage V N  by a proportion equal to the gain G of the PGA. As shown, the operational amplifiers  208 ,  210  comprise non-inverting amplifiers having negative feedback loops  232 ,  234  via voltage dividers R F1 /R G    236  and R F2 /R G    238 , respectively, formed by resistors  240 ,  242 ,  244  having resistances R F1 , R F2 , and R G , respectively. Thus, the voltage gain G 1  of the first PGA  202  is 1+2R F /R G , where R F =R F1 =R F2 . 
     The input voltage V IN  is equal to the signal voltage V SIG  output by the sensor resistive bridge  228 , which is comprised of a first component (output) voltage that is proportional to the physical quantity (e.g., pressure) being sensed by the sensor  230  and a second component voltage equal to the zero-quantity offset voltage V SIG(0) . The zero-quantity offset voltage V SIG(0)  corresponds to the voltage generated by the sensor when no physical quantity is sensed by the sensor  230  (e.g., when the quantity (e.g., pressure) sensed by the sensor resistive bridge  228  is zero (0)). For example, in an implementation wherein the sensor  230  comprises a pressure sensor and the sensor resistive bridge  228  comprises a pressure sensor resistive bridge, the output voltage generated by the sensor resistive bridge may range from 1 mV/V to 5 mV/V, while the zero-pressure offset voltage V SIG(0)  may be as high as 100 mV/V. 
     In accordance with the present disclosure, the sensor offset voltage compensation circuit  200  applies a generated offset compensation voltage V OS  to the input loop of the PGA  202 . In embodiments, the offset compensation voltage V OS  is equal to, or substantially equal to, the zero-quantity offset voltage V SIG(0)  and is proportional to the bias voltage applied to the sensor  230  to sense the physical quantity. For example, in embodiments wherein the sensor  230  comprises a pressure sensor and the sensor resistive bridge comprises a pressure resistive bridge, the offset compensation voltage V OS  is equal to, or substantially equal to, the zero-pressure offset voltage V SIG(0)  and is proportional to the bridge voltage V BRIDGE  applied to the pressure resistive bridge. 
     Specifically, as shown in  FIG. 2A , the sensor offset voltage compensation circuit  200  may apply the offset compensation voltage V OS  to the inverting inputs  214 ,  220  of the first and second operational amplifiers  208 ,  210  by generating a voltage equal to the zero-pressure offset voltage V SIG(0)  across an offset resistor  246  having resistance R O . In the embodiment shown, the bias voltage (e.g., the bridge voltage V BRIDGE ) applied to the sensor  230  is converted to current by voltage to current convertors (V/I)  248 ,  250  to generate offset currents I P  and I N , which, in embodiments, are equal, or substantially equal, and adjusted so that the offset compensation voltage V OS  is equal to the generated offset current I P  and I N  multiplied by the resistance R O  of the offset resistor  246 . Thus, V OS =I·R O , where I=I P =I N . 
       FIGS. 2B and 2C  illustrate an example voltage to current convertor (V/I)  248 ,  250  that may be employed by the sensor offset voltage compensation circuit  200  to generate the offset currents I P  and I N . In embodiments, the offset compensation voltage V OS  is generated to be equal, or at least substantially equal, to the zero-quantity offset voltage V SIG(0) , which is proportional to the bias (bridge) voltage V BRIDGE . Thus, V OS =V SIG(0) =ε VOS ·V BRIDGE . As shown in  FIG. 2B , the voltage to current convertors (V/I)  248 ,  250  generate offset currents I P  and I N  from the bias (bridge) voltage V BRIDGE . These offset currents I P  and I N , which, in embodiments, are equal, can be expressed as I=I P =I N =K I ·V BRIDGE /R TRIM , where R TRIM  is a variable trim resistance and selected by the digital signal processor  252  and generated by trim circuits  254 ,  256  ( FIG. 2C ). Nevertheless, it is contemplated that, in many embodiments, mismatches will exist between the offset currents I P  and I N . Thus, the offset current I P  can be determined by I P =I·(1+ΔI P /I P ), while the offset current I N  can be determined by I N =I·(1+ΔI N /I N ), where ΔI P  and ΔI N  describe these mismatches. 
       FIG. 2C  illustrates example trim circuits  254 ,  256  of the voltage to current convertors (V/I)  248 ,  250 . As shown, the trim circuits  254 ,  256  employ a digital to analog converter (DAC)  258  to select the trim resistance R TRIM  in response to a digital signal from the digital signal processor  252 . In embodiments, the number of trim bits employed by the DAC  258  to generate resistance R TRIM  are determined from the lowest span of the first component (output) voltage and the largest zero-quantity offset voltage V SIG(0)  of the signal output by the sensor  230 . For example, for a sensor  230  having a lowest span of 1 mV/V and largest zero-quantity offset voltage V SIG(0)  of 50 mV/V, the DAC  258  would require at least nine (9) bits to expand the pressure range 20 dB below the lowest span, and thus would use a twelve (12) bit DAC  258 . 
     In the embodiment illustrated, a digital signal processor  252  selects the gain G of the PGA  202  and controls the generation and application of an offset compensation voltage V OS  to the PGA  202  so that the magnitude and polarity of the offset compensation voltage V OS  cancels the zero-quantity offset voltage V SIG(0) . As shown in  FIG. 2A , the digital signal processor  252  controls the switches K 1    260 , K 2    262 , K 3    264 , K 4    266 , K 5    268 , and K 6    270 . The switch K 1    260  connects the outputs  224 ,  226  of the sensor  230  to the input loop  204  of the first PGA  202 . The switch K 2    262  is used for calibration of the sensor offset voltage compensation circuit  200 . The switches K 3  and K 4  are used to select the polarity of the offset compensation voltage V OS . The positions of switches K 3  and K 4    264 ,  265  are determined by the polarity of the zero-quantity offset voltage V SIG(0)  and are closed/opened (flipped) by the digital signal processor  252 , accordingly. The switches K 5  and K 6    268 ,  270  connect/disconnect their respective voltage to current convertors (V/I)  248 ,  250 . 
     When the input voltage is equal to the offset compensation voltage (V IN =V OS ), the output voltage (V 1 ) of the first PGA  202  is V 1 =(V OS +V OS1 −I P ·R O )·(1+2·R F /R G )+R F ·(I N −I P ) where V OS1 =V OS1b −V OS1a . Since the gain (G 1 ) of the first PGA  202  is G 1 =1+2·R F /R G , the output voltage V 1  of the first PGA  202  is determined from V 1 =[ε VOS −K I ·(R O /R TRIM )]·V BRIDGE ·G 1 +V OS1 ·G 1 +K I ·V BRIDGE ·(R F /R TRIM )·(ΔI N /I N −ΔI P /I P ). Thus, zero-quantity offset voltage cancellation occurs when the trim resistance R TRIM =K I ·R O /ε VOS . Consequently, the sensor offset voltage compensation circuit  200  furnishes cancellation of the zero-quantity offset voltage V SIG(0)  so that the voltage across the resistor R G  is only, or at least primarily, the first component (output) voltage of the sensor  330  without no or at least almost no zero-quantity offset voltage V SIG(0) . Thus, the zero-quantity offset compensation is independent of the bias (bridge) voltage (V BRIDGE ) of the sensor  230  and of the gain (G 1 ) of the PGA  202 . 
     As shown in  FIG. 2A , the sensor offset voltage compensation circuit  200  further comprises a second programmable gain amplifier (PGA)  2 . The second PGA  272  converts the output voltage V 1  of the first PGA  202  to a second output voltage V 2  having a lower impedance. An analog to digital convertor (ADC)  274  converts the output voltage V 2  to a digital signal that is furnished to the digital signal processor  252  to be processed. 
       FIGS. 3A, 3B, and 3C  illustrate additional implementations of the offset voltage compensation circuit  100  of  FIG. 1  in accordance with example embodiments of the present disclosure. As shown in  FIGS. 3A and 3C , the offset voltage compensation circuit of  FIG. 1  is configured as a sensor zero-offset voltage compensation circuit  300  that comprises a programmable gain amplifier (PGA)  302  having an input loop  304  and an output loop  306 . The PGA  302  includes a first operational amplifier (OA 1 )  308  and a second operational amplifier (OA 2 )  310 . The first operational amplifier  308  includes a first non-inverting input  312 , a first inverting input  314 , and a first output  316 . Similarly, the second operational amplifier  310  includes a second non-inverting input  318 , a second inverting input  320 , and a second output  322 . 
     The input loop  304  is configured to receive the signal output by the sensor resistive bridge  328  of the sensor  330 . Specifically, as shown, the first non-inverting input  312  and the second non-inverting input  318  are coupled to the outputs  324 ,  326 , respectively, of the sensor resistive bridge  328  so that the input voltage V IN  applied to the first non-inverting input  312  and the second non-inverting input  318  is equal to the output signal voltage V SIG  generated by the sensor resistive bridge  328 . 
     The output loop  306  is formed by the first output  316  and the second output  322  has an output voltage V OUT  that is greater than the input voltage V IN  by a proportion equal to the gain G of the PGA  202 . As shown, the operational amplifiers  308 ,  310  comprise non-inverting amplifiers having a negative feedback loops  332 ,  334  via voltage dividers R F1 /R G    336  and R F2 /R G    338 , respectively, formed by resistors  340 ,  342 ,  344  having resistances R F1 , R F2 , and R G , respectively. Thus, the gain G of the PGA  302  is 1+2·R F /R G , where R F =R F1 =R F2 . 
     The input voltage V IN  is equal to the signal voltage V SIG  output by the sensor resistive bridge  328 , which is comprised of a first component (output) voltage that is proportional to the physical quantity (e.g., pressure) being sensed by the sensor  330  and a second component voltage equal to the zero-quantity offset voltage V SIG(0) . The zero-quantity offset voltage V SIG(0)  corresponds to the voltage generated by the sensor when no physical quantity is sensed by the sensor  330  (e.g., when the quantity (e.g., pressure) sensed by the sensor resistive bridge  328  is zero (0)). For example, in an implementation wherein the sensor  330  comprises a pressure sensor and the sensor resistive bridge  328  comprises a pressure sensor resistive bridge, the output voltage generated by the sensor resistive bridge may range from 1 mV/V to 5 mV/V, while the zero-pressure offset voltage V SIG(0)  may be as high as 100 mV/V. 
     In the embodiment illustrated, the sensor offset voltage compensation circuit  300  applies a generated offset compensation voltage V OS  to the output loop  306  of the PGA  302  that is equal to, or substantially equal to, the zero-quantity offset voltage V SIG(0)  and is proportional to the bias voltage applied to the sensor  330  to sense the physical quantity. For example, in embodiments wherein the sensor  330  comprises a pressure sensor and the sensor resistive bridge comprises a pressure resistive bridge, the offset compensation voltage V OS  is equal to, or substantially equal to, the zero-pressure offset voltage V SIG(0)  and is proportional to the bridge voltage V BRIDGE  applied to the pressure resistive bridge. 
     Specifically, the sensor offset voltage compensation circuit  300  includes a programmable current source  346  that generates an offset compensation current I OS . The generated current I CAL  is furnished to either the output OUT 1    316  or the output OUT 2    322  of the PGA  302  by a switch  348  depending on the polarity of the zero-quantity offset voltage V SIG(0) . The offset compensation provided by the current I OS  thus shows at the output loop  306  of the PGA  302  instead of the input loop  304 . 
       FIG. 3B  illustrates an example programmable current source  346  that may be employed by the offset voltage compensation circuit  300  of  FIG. 3A  to generate the offset current I OS . In embodiments, the offset compensation voltage V OS  is equal, or at least substantially equal, to the zero-quantity offset voltage V SIG(0) , which is proportional to the bias (bridge) voltage V BRIDGE . Thus, V OS =V SIG(0) =ε·V BRIDGE . As shown in  FIG. 3B , the voltage programmable current source  346  generates the offset current I OS  from the bias (bridge) voltage V BRIDGE . 
     As noted, the gain G of the PGA  302  is equal to 1+2·(R F /R G ). Thus, the output voltage V OUT  is −R F2 ·I OS +V IN ·[1+(R F1 +R F2 )/R G ]=−R F2 ·I OS +V IN ·G. Thus, when V IN =V OS , then V OUT =−R F ·I OS +V OS ·[1+2·(R F /R G )]=−R F ·I OS +V OS ·G. Accordingly, to achieve input offset voltage calibration: V OUT =0, which gives I OS =G ·(V OS /R F ). However, from  FIG. 3B , I OS =V BRIDGE /[(K+1)·R TRIM ], where the offset compensation voltage is proportional to the bias (bridge) voltage V OS =ε·V BRIDGE  and where R TRIM  is a variable trim resistance and selected by a digital signal processor. Consequently, 1=ε·(K+1)·G ·(R TRIM /R F ). Thus, zero-quantity offset compensation is based on resistor ratio and occurs when the trim resistance R TRIM =R F /[ε·(K+1)·G]. 
     As shown in  FIG. 3B , the programmable current source  346  includes a trim circuit  368  to select the trim resistance R TRIM . In embodiments, the trim circuit  368  may employ a digital to analog converter (DAC) to select the trim resistance R TRIM  in response to a digital signal from a digital signal processor (see  FIG. 2C ). 
     In  FIG. 3C , the sensor offset voltage compensation circuit  300  further includes a second programmable gain amplifier (PGA)  350  that is used to regulate the impedance of the output voltage V O1  of the first PGA  302 . As shown, the second PGA  350  comprises a third operational amplifier (OA 3 )  352  having a third non-inverting input  354 , a third inverting input  356 , and a third output  358 , and a fourth operational amplifier (OA 4 )  360  having a fourth non-inverting input  362 , a fourth inverting input  364 , and a fourth output  366 . The third non-inverting input  354  and the fourth non-inverting input  362  are coupled to the first output  316  of the first operational amplifier  308  and the second output of the second operational amplifier  310  across resisters  370 ,  372  (each having a resistance R O ), respectively and have a voltage V O1 . 
     The third output  358  and the fourth output  366  have an output voltage V O2  that is greater than the output voltage of the first PGA  302  (designated V O1  in  FIG. 3C ) by a proportion equal to the gain G 2  of the second PGA  350 . As shown, the third and fourth operational amplifiers  352 ,  360  comprise non-inverting amplifiers having negative feedback loops  374 ,  376  via voltage dividers R F3 /R G    378  and R F4 /R G    380 , respectively, formed by resistors  382 ,  384 ,  386  having resistances R F3 , R F4 , and R G2 , respectively, where R F =R F1 =R F2 =R F3 =R F4  and R G =R G1 =R G2 . Thus, the gain G 2  of the second PGA  302  is 1+2·R F /R G . 
     In the embodiment illustrated, the sensor offset voltage compensation circuit  300  includes a second programmable current source  388  that generates a second offset compensation current I OS2 . (In  FIG. 3C , the current generated by the first programmable current source is designated I OS1 .) The generated current I OS2  is furnished to either the non-inverting input  354  of the third operational amplifier  352  or the non-inverting input  362  of the fourth operational amplifier  360  of the second PGA  350  by a switch  390  depending on the polarity of the zero-quantity offset voltage V SIG(0) . The offset compensation provided by the current I OS2  thus shows at the input loop  392  of the second PGA  350 . 
     For the offset compensation circuit shown in  FIG. 3C , the addition of offset resistors  370 ,  372  having resistance R O  allow the calibration of the offset compensation voltage V OS  to be independent of the feedback resistance R F  of the PGAs  302 ,  350 . The output voltage V O1  of the first PGA  302  is equal to −R O ·I OS2 −R F2 ·I OS1 +V IN ·[1+(R F1 +R F2 )/R G ]. Assuming that the input voltage is equal to the offset compensation voltage (V IN =V OS ), when no offset resistance is provided (R O =0), the output voltage V O1  of the first PGA  302  −R F ·I 0 +V OS ·[1+2·(R F /R G )]. To calibrate the circuit for zero-quantity offset voltage VV SIG(0) , the output voltage of the first PGA  302  is zero (V O1 =0) when the offset current I O  is equal to (V OS/RF )·[1+2·(R F /R G )]. Thus, when resistance R O  is zero, calibration of the offset compensation voltage V OS  based on offset current I 0  trim is a function of the feedback resistance R F . However, with an offset resistance R O  equal to half of the gain resistance R G  is added (R O =R G /2), the output voltage V O1  is equal to (V OS −R O ·I O )·[1+2·(R F /R G )], assuming V IN =V OS . To calibrate the circuit for zero-quantity offset voltage V SIG(0) , the output voltage of the first PGA  302  is zero (V O1 =0) when the offset current I O  is equal to V OS /R O . Thus, when a resistance R O  that is equal to on half of the gain resistance is provided as shown in  FIG. 3C , calibration of the offset compensation voltage V OS  based on offset current I 0  trim is independent of the feedback resistance R F . 
     As shown in  FIGS. 1, 2A, 3A, and 3C , the sensor offset voltage compensation circuits  100 ,  200 ,  300  and respective sensors  130 ,  230 ,  330 , together, each form a sensor system  146  ( FIG. 1 ),  276  ( FIG. 2A ),  394  ( FIGS. 3A and 3C ), respectively, which may include other components. In embodiments, the sensor offset voltage compensation circuits  100 ,  200 ,  300 , sensors  130 ,  230 ,  330 , and/or sensor systems  132 ,  276 ,  394  may be fabricated as one or more integrated circuit chips such as application specific integrated circuit (ASIC) chips, or the like. 
     The sensors  130 ,  230 ,  330  may comprise any type of sensor that may produce a zero-quantity offset voltage as described herein. For example, in embodiments, the sensors  130 ,  230 ,  330  may comprise a pressure bridge sensor. In such embodiments, the sensors  130 ,  230 ,  330  may employ any of a variety of fabrication technologies such as Silicon (Monocrystalline), Polysilicon Thin Film, Bonded Metal Foil, Thick Film, Silicon-on-Sapphire, Sputtered Thin Film, and so forth. 
       FIG. 4  illustrates an example sensor  400  in accordance with an example embodiment of the present disclosure. The sensor  400 , which in embodiments, may comprise a pressure sensor, includes sensor resistive bridge  402  that employs bonded or formed strain gauges (shown as resistors  404 ,  406 ,  408 ,  410 ), formed in a substrate. to detect strain in a material due to applied pressure. The strain gauges  404 ,  406 ,  408 ,  410  utilize the piezoresistive effect such that the resistances of the strain gauges  404 ,  406 ,  408 ,  410  increase as pressure deforms the material of the substrate. As shown, the strain gauges  404 ,  406 ,  408 ,  410  are arranged in a bridge circuit configuration (e.g., in a Wheatstone bridge configuration). In the embodiment illustrated, the strain gauges  404 ,  406 ,  408 ,  410  of the sensor resistive bridge  402  are arranged in a closed bridge configuration. However, it is contemplated that the sensor resistive bridge  402  may employ a half open configuration, a full open configuration, or the like. The sensor  400  may utilize a variety of technologies such as Silicon (Monocrystalline), Polysilicon Thin Film, Bonded Metal Foil, Thick Film, Silicon-on-Sapphire, Sputtered Thin Film, and so forth. 
     As shown, when a bias (bridge) voltage V BRIDGE  is applied across the sensor resistive bridge  402 , a voltage V SIG  is produced across outputs  412 ,  414 . As noted above, this voltage V SIG  includes a first component equal to the output voltage V SIG  that is proportional to the physical quantity (e.g., pressure) being sensed by the sensor  400  and a second component voltage equal to the zero-quantity offset voltage V SIG(0) . The zero-quantity offset voltage V SIG(0)  corresponds to the voltage generated by the sensor when no physical quantity is sensed by the sensor  400 , for example, when the quantity (e.g., pressure) sensed by the sensor resistive bridge  402  is zero (0). This, zero-quantity offset voltage V SIG(0)  is caused by imperfections in the construction of the sensor resistive bridge  402  such as mismatch of the resistance of the strain gauges  404 ,  406 ,  408 ,  410 , or the like, which causes the sensor  400  to have an output voltage when no quantity (e.g., pressure) is sensed (e.g., the quantity sensed is equal to zero (0)). For example, in a typical implementation, wherein the sensor  130  comprises a pressure sensor and the sensor resistive bridge  128  comprises a pressure sensor resistive bridge, the output voltage generated by the sensor resistive bridge may range from 1 mV/V to 5 mV/V, while the zero-pressure offset voltage V SIG(0)  may be as high as 100 mV/V. 
     When introducing elements of aspects of the disclosure or the examples thereof, the articles “a,” “an,” “the,” and “said” are intended to mean that there are one or more of the elements. The terms “comprising,” “including,” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements. 
     Having described aspects of the disclosure in detail, it will be apparent that modifications and variations are possible without departing from the scope of aspects of the disclosure as defined in the appended claims. As various changes could be made in the above constructions, products, and methods without departing from the scope of aspects of the disclosure, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.