Patent Publication Number: US-6700975-B1

Title: Subscriber line interface circuit

Description:
This application is a continuation of U.S. patent application No. 08/961,017, entitled “Subscriber Line Interface Circuit” filed on Apr. 30, 1997,” U.S. Pat. No. 6,122,367. 
    
    
     TECHNICAL FIELD 
     The invention relates to a subscriber line interface circuit. 
     BACKGROUND 
     Today&#39;s subscriber line interface circuits should imitate the traditional way of feeding a telephone line from an exchange battery via a feeding resistance. Thus, this feeding resistance determines the dependence of the line current on the line voltage, i.e. the line feed characteristic of the line interface circuit. 
     However, different countries require different feeding resistances, which results in that today&#39;s line interface circuits are not generally usable but have to be adapted to the requirements specified in the respective country. 
     For a short-circuited line and for low-resistance line loads, the line current will be high which causes a high power dissipation in the feeding resistance. To avoid this, it is known to limit the maximum value of the line current. Also, this maximum value differs from country to country and, consequently, today&#39;s line interface circuits have to be adapted also in this respect to the requirements specified in the respective country. However, in today&#39;s line interface circuits, it is not possible to arbitrarily limit the line current to desired values in a simple way. 
     When the line is open, i.e. with the handset on-hook, today&#39;s line interface circuits have the disadvantage that the line voltage can be lower than the expected, ideal line voltage for a given feeding voltage. This can depend e.g. on the fact that the associated line may have a leakage resistance or that the device, e.g. a telephone set, connected to the line draws current from the line for such reason. The value of this open-line voltage is, however, very important for some units, e.g. so-called MTUs (Maintenance and Test Units) and certain facsimile apparatuses. 
     Moreover, today&#39;s line interface circuits are not adapted to adapt their line feed characteristic to possible feeding voltage or supply voltage variations. 
     SUMMARY 
     The object of the invention is to eliminate the above disadvantages of subscriber line interface circuits known so far. 
     This is attained by means of the subscriber line interface circuit according to the invention mainly in that it comprises means adapted to a line, associated with the line interface circuit, an essentially constant line current of a first predetermined value for line voltages up to a first voltage having an absolute value which, by a predetermined amount, is lower than the supply voltage of the line interface circuit, means adapted to apply to the line, a line current which is inversely proportional to the line voltage and of a value between said first predetermined value and a second predetermined, lower value for line voltage between the first voltage and a second voltage having an absolute value which, by a predetermined amount, is higher than the first voltage, means adapted to apply to the line, an essentially constant line current of the second predetermined value for line voltages between the second voltage and a third voltage having an absolute value which, by a predetermined amount, is higher than the second voltage, and means adapted to maintain the line voltage essentially constant at the third voltage for line currents of lower value than said second predetermined value. 
     Alternatively, the line interface circuit according to the invention comprises means adapted to apply to a line, associated with the line interface circuit, an essentially constant line current of a first predetermined value for line voltages up to a first voltage having an absolute value which, by a predetermined amount, is lower than the supply voltage of the line interface circuit, means adapted to apply to the line, a line current which is inversely proportional to the line voltage and of a value between said first predetermined value and a second predetermined, lower value for line voltages between the first voltage and a second voltage having an absolute value which, by a predetermined amount, is higher than the first voltage, and means adapted to maintain the line voltage essentially constant at the second voltage for line currents of lower value than said second predetermined value. 
     Hereby, the subscriber line interface circuit according to the invention will be insensitive to supply voltage variations as well as to leakage currents on the line, and will also be easily adaptable to requirements in different countries. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention will be described more in detail below with reference to the appended drawing, on which 
     FIG. 1 schematically shows a first embodiment of a subscriber line interface circuit according to the invention, 
     FIG. 2 shows the line feed characteristic for the line interface circuit in FIG. 1, 
     FIG. 3 schematically shows a second embodiment of the line interface circuit according to the invention, and 
     FIG. 4 shows the line feed characteristic for the line interface circuit in FIG.  3 . 
    
    
     DETAILED DESCRIPTION 
     FIG. 1 schematically shows a first embodiment of a subscriber line interface circuit according to the invention. In a manner known per se, the line interface circuit is connected to the A-wire  1  and B-wire  2  of a telephone line via a respective output amplifier (not shown) in a driving stage  3 . The driving stage  3  is connected between ground and a supply voltage VBAT which normally is supplied by a battery (not shown). 
     As shown in FIG. 1, the telephone line is terminated by means of a resistor RL which represents the sum of the resistance of the line and the resistance of a device connected to the line, e.g. a telephone set (not shown). 
     The control input terminal of the driving stage  3  is connected to the collector of a transistor Q 1 . The base of the transistor Q 1  is connected, on the one hand, to the output terminal of a transconductance amplifier  4  having a transconductance gm and, on the other hand, to the supply voltage VBAT via a current a current generator  11 . 
     The “+”-input terminal of the transconductance amplifier  4  (the upper input terminal in FIG. 1) is connected to the B-wire  2 , while its “−”-input terminal (the lower input terminal in FIG. 1) is connected, on the one hand, to the supply voltage VBAT via a resistor R and, on the other hand, to the emitter of a transistor Q 2  via two series-connected diodes D 1 , D 2 . The voltage across the resistance R is denoted UR, while the voltage across the diodes D 1 , D 2  is denoted U 1 . 
     The base of the transistor Q 2  is connected to the interconnection point between the emitter of the transistor Q 1 , the base of a transistor Q 3  and the collector of a transistor Q 4 , while the collector of the transistor Q 2  is connected to ground. The voltage between this interconnection point and the supply voltage VBAT is denoted U 2 . 
     The collector of the transistor Q 3  is connected to the supply voltage VBAT, while its emitter is connected, on the one hand, to ground via programmable current generator I 2  and, on the other hand, to the anode of a diode D 3  whose cathode is connected on the one hand, to the anode of a diode D 4  and, on the other hand, to the base of the transistor Q 4 . 
     The emitter of the transistor Q 4  is interconnected with the cathode of the diode D 4  and the interconnection point is connected to the supply voltage VBAT via a settable resistor R 1 . 
     The transistor Q 4  and the diodes D 3  and D 4  together form a current mirror to mirror the current flowing through the diodes D 3 , D 4  to the collector of the transistor Q 4 . The sum of the current through the diodes D 3 , D 4  and the collector current of the transistor Q 4  will flow through the resistor R 1 . The voltage appearing across the resistor R 1  is denoted UR 1 . 
     In a manner not shown, but known per se, the voltage between the A-wire  1  and ground is maintained equal to the voltage between the B-wire  2  and the “−”-input terminal of the transconductance amplifier  4 . These two equal voltages, usually called “guardband”, are denoted UG. The guardbands are there to enable speech signals and voice frequency signalling on the line also when the handset is on-hook, and are determined in the embodiment shown by the current of the current generator I 1  and the transconductance gm of the transconductance amplifier  4  in such a manner that UG=I 1 /gm. 
     In accordance with the invention, the line interface circuit shown in FIG. 1 is adapted to bring about the line feed characteristic shown in FIG. 2 when the line load RL varies from a short-circuit to an open line. As apparent from FIG. 2, the line interface circuit applies an essentially constant line current IL of a predetermined value IL 1  to the associated line for line voltages UL up to a voltage UL 1 . The absolute value of the voltage UL 1  is lower than the supply voltage VBAT of the line interface circuit by a predetermined amount. For line voltages between the voltage UL 1  and a voltage UL 2  having an absolute value which is higher than the voltage UL 1  by a predetermined amount, the line interface circuit according to FIG. 1 applies a line current IL inversely proportional to the line voltage UL and of a value between IL 1  and a predetermined, lower value IL 2  to the line. For line currents IL lower than IL 2 , the line interface circuit maintains the line voltage UL substantially constant at the voltage UL 2 . 
     To accomplish this, the programmable current generator I 2  is programmed to apply a line current IL of the desired, substantially constant value IL 1  according to FIG. 2 to the line  1 ,  2 . The current from the current generator I 2  is mirrored to the collector of the transistor Q 4  and applied to the control input terminal of the driving circuit  3  via the transistor Q 1 . On the basis of the current appearing of the control input terminal, the driving circuit  3  applies a corresponding line current of the value IL 1  to the line  1 ,  2 . Under these conditions, the transistor Q 3  is cut off. 
     Thus, the line voltage UL will be equal to IL 1 ×RL. Load resistances RL of different values will, therefore, give line voltages UL of different values as long as IL=IL 1 . 
     Usually, the line current IL 1  is so chosen that it corresponds to the current at which the telephone set in the application in question practically ceases to the compensate for line length depending attenuation on the line. 
     According to the invention IL=IL 1  for line voltages between 0V, i.e. short-circuited line, and the line voltage UL 1 . This line voltage has been set so that |UL 1 |=|VBAT·2UG+U 1 −UR 1 |, i.e. the absolute value of the line voltage UL 1  is lower than the supply voltage VBAT by a predetermined amount. UG and U 1  are constant and preset, and UR 1  is constant when |UL|&lt;|UL 1 |. 
     When the line voltage UL becomes higher than UL 1  due to the fact that the line load RL has increased, e.g. in that a device having a higher resistance has been connected to the line or that a longer line has been connected to the line interface circuit, the transistor Q 3  starts to conduct. Hereby, the current through the diodes D 3  and D 4  will be lower and, thereby, also the current through the resistor R 1  which causes the voltage UL 1  to become lower. When |UL|&lt;|UL 1 |, UR 1 =UR+U 1 , the voltage U 1  being constant and the voltage UR being inversely proportional to the line voltage UL. Also, the collector current of the transistor Q 4  and the current through the transistor Q 1  will be lower. Thus, the control current of the driving stage  3  will be lower which in its turn causes the line current IL to be lower than IL 1 . The line current IL will, thus, be inversely proportional to the line voltage UL. 
     If the current through R 1  becomes still lower, finally UR=0 when UR 1 =U 1 . 
     Then, the feedback loop to the transconductance amplifier  4 , comprising the transistor Q 2  and the diodes D 1 , D 2 , will be broken which causes the amplification of the transconductance amplifier  4  to suddenly become tremendously high. Therefore, a small change of the line voltage UL will result in a very big change of the voltage UR 1 . Since the voltage UR 1  determines the line current IL, a big line current change is obtained for a small line voltage change. The value of the line current IL 2  when UR 1 =U 1 , is determined by the voltage U 1  across the diodes D 1 , D 2  and by the resistance of the resistor R 1 . If the resistance of the resistor R 1  has been chosen in response to a requirement for a certain inclination of the line feed characteristic, the current IL 2  can, thus, be set by a suitable choice of the voltage U 1 . The value of the current IL 2  is chosen in view of the leakage current that can be expected in dependence on the value of the line leakage resistance. 
     Hereby, |UL 2 |=|VBAT=2UG|. Thus, the absolute value of this open-line voltage is lower than the supply voltage VBAT by a predetermined amount but higher than the line voltage value UL 1  by a predetermined amount. 
     As mentioned in the introductory portion, for their operation, certain devices are dependent on a certain minimum line voltage when the handset is on-hook, i.e. a certain open-line voltage. By choosing this open-line voltage, |UL 2 |=|VBAT−2UG|, in accordance with the invention, this voltage is maintained constant also if current is drawn from the line by a leakage resistance or by a device which draws current when the handset is on-hook. To keep the power losses low in the line interface circuits and at the same time keep the costs low for the exchange batteries, it is of course desirable that the open-line voltage is reached at a battery voltage which is as low as possible. 
     The appearance of the line feed characteristic between the points IL 1 /UL 1  and IL 2 /UL 2  in FIG. 2, i.e. its inclination, has to fulfill the requirements specified by the respective country as also mentioned in the introductory portion. According to the invention, the inclination of the line feed characteristic is changed simply by changing the resistance of the resistor R 1 . Hereby, it will be very easy to adapt the line interface circuit according to the invention to the requirements specified by the respective country. 
     FIG. 3 shows a second embodiment of the subscriber line interface circuit according to the invention, which to a great extent corresponds to the embodiment according to FIG.  1 . Elements in FIG. 3 which are identical with elements in FIG. 1 have been provided with identical reference characters and will not be described in any greater detail in connection with FIG.  3 . 
     According to the invention, the line interface circuit according to FIG. 3 is adapted to generate the line feed characteristic shown in FIG. 4, which differs from the characteristic shown in FIG. 2 merely in that the line current is maintained essentially constant at the value IL 2  for line voltages between a voltage UL 2 ′ and a voltage UL 3 . 
     Thus, the line interface circuit in FIG. 3 is adapted to apply an essentially constant line current IL of the value IL 1  to the associated line for line voltages UL up to the voltage UL 1  which in the same manner as in FIG. 2 is of an absolute value which is lower than the supply voltage VBAT of the line interface circuit by a predetermined amount. For line voltages between the voltage UL 1  and the voltage UL 2 ′ which is of an absolute value which is higher than the voltage UL 1  by a predetermined amount, the line interface circuit according to FIG. 1 applies, in the same manner as the line interface circuit according to FIG. 1, a line current IL which is inversely proportional to the line voltage UL and of a value between IL 1  and IL 2  to the line. In contrast to the line interface circuit according to FIG. 1, the line interface circuit according to FIG. 3 is adapted a substantially constant line circuit IL of the value IL 2  to the line for line voltage UL between the voltage UL 2 ′ and the voltage UL 3  which is of an absolute value which is higher than the voltage UL 2 ′ by a predetermined amount. Then, the line interface circuit according to FIG. 3 is adapted to maintain the line voltage UL substantially constant at the voltage UL 3  for line currents of lower value than IL 2 . 
     In the embodiment according to FIG. 3, the diodes D 1  and D 2 , and the resistor R have been left out. Instead, a resistor R 3  is connected between the emitter of the transistor Q 2  and the collector of the transistor Q 5  and the interconnection point between the resistor R 3  and the collector of the transistor Q 5  is connected to the “−”-input terminal of the transconductance amplifier  4 . The emitter of the transistor Q 5  is connected to the supply voltage VBAT. A current generator I 3  is connected between the supply voltage VBAT and the base of the transistor Q 5 , while a current generator I 4  is connected between ground and the base of the transistor Q 5 . As to the rest, the circuit shown in FIG. 3 corresponds to the circuit shown in FIG.  1 . 
     The current generator I 3  is adapted to output a current proportional to the line current IL, i.e. I 3 =k×IL, while the current generator I 4  is adapted to output a selectable, constant current I 4 . 
     The current I 4  is selected in such a manner that I 3 =I 4  when IL=IL 2  in accordance with FIG.  4 . Hereby, the current IL 2  will be independent of the value chosen for the resistor R 1 . 
     The transistor Q 5  is cut off for line currents IL&gt;IL 2 , i.e. for I 3 &gt;I 4 , and, thus, does not have any function under these conditions. 
     However, the transistor Q 5  starts to conduct for line currents IL&lt;IL 2 . The transistor Q 5  becomes saturated when the line voltage UL 3  is reached. Also, |UL 3 |=|VBAT=2UG|. 
     Thereby, the feedback is interrupted to the “−”-input of the transconductance amplifier  4 . This increases the amplification in the transconductance amplifier  4  substantially. Even at a small variation of the line voltage UL, a large variation of the line current IL is obtained. 
     As indicated in the introductory portion above, a problem with today&#39;s line interface circuits is that they are not adapted to adapt their line feed characteristic to possible supply voltage variations. 
     As should be apparent from the above, this problem is solved, in accordance with the invention, by tying the voltages UL 1 , UL 2  and UL 2 ′, respectively, and UL 3  to the supply voltage VBAT. Hereby, upon variations in the supply voltage VBAT, the voltages UL 1 , UL 2  and UL 2 ′, respectively, and UL 3  will be displaced along the UL axis in FIGS. 2 and 4, respectively, while maintaining the mutual “distances” to the supply voltage VBAT.