Patent Publication Number: US-10784396-B2

Title: Solar cell, solar cell module, and production method for solar cell

Description:
CROSS REFERENCE TO RELATED APPLICATION 
     The entire disclosures of Japanese Patent Application No. 2015-195306 filed on Sep. 30, 2015, and No. 2016-057960 filed on Mar. 23, 2016, including specification, claims, drawings and abstract are incorporated herein by reference in their entireties. 
     TECHNICAL FIELD 
     The disclosure relates to a solar cell, a solar cell module and production method for a solar cell. 
     BACKGROUND ART 
     As a conventional solar cell module, a solar cell module having a bypass diode is known, as described in Patent Literature 1. The solar cell module has a plurality of solar cell strings connected in series and a plurality of bypass diodes connected in series. The solar cell string has a plurality of solar cells connected in series. Two solar cell strings connected in series constitute one unit. Each of the bypass diodes is connected in parallel to the respective units that are different from each other (hereinafter referred to as a string unit). 
     When a solar cell(s) within a solar cell string is shaded by a barrier and the shaded area increases, electric current flows to a bypass diode connected in parallel to the string unit containing the solar cell(s). Likewise, a string unit containing a shaded solar cell(s) is bypassed to prevent no output from the solar cell module. 
     CITATION LIST 
     Patent Literature 
     Patent Literature 1: Japanese Patent Laid-Open Publication No. 2013-157457 
     With the solar cell module disclosed in Patent Literature 1, if solar cells are shaded, the string unit containing the solar cells is bypassed and thus not all the solar cells in the string unit contribute to power generation. Accordingly, power generation of solar cells not shaded within the string unit is also prevented, leading to a great decrease in power generation performance. 
     SUMMARY 
     An object of the disclosure is to provide a solar cell that successfully suppresses loss of power generation performance of a solar cell module when shaded and a solar cell module containing the solar cell. 
     A solar cell according to an embodiment of the disclosure has a first conductive-type silicon substrate, and a second conductive-type amorphous silicon layer positioned on a first main-surface side of the silicon substrate. The silicon substrate has a low-doped region which has been doped to be a first conductive-type, and a first main-surface side highly doped region provided between the low-doped region and the second conductive-type amorphous silicon layer and having a concentration of a first conductive-type dopant higher than that in the low-doped region. 
     Note that the requirement “a second conductive-type amorphous silicon layer positioned on a first main-surface side of the silicon substrate” is satisfied in the case where the second conductive-type amorphous silicon layer is in contact with the first main-surface side of the silicon substrate. The requirement “a second conductive-type amorphous silicon layer positioned on a first main-surface side of the silicon substrate” is also satisfied in the case where the second conductive-type amorphous silicon layer faces the first main-surface of the silicon substrate with a layer such as an intrinsic semiconductor layer sandwiched between the second conductive-type amorphous silicon layer and the first main-surface of the silicon substrate. 
     According to the solar cell disclosed as an embodiment of the disclosure, it is possible to suppress loss of power generation performance of a solar cell module when shaded. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
       Embodiments of the present disclosure will be described based on the following figures, wherein: 
         FIG. 1  is a schematic configuration diagram showing the main part of a solar cell module according to a first embodiment; 
         FIG. 2  is a schematic sectional view showing a solar cell of the solar cell module; 
         FIG. 3  is a graph showing the results of a test example for voltage-current characteristic of a solar cell: 
         FIG. 4  is a schematic sectional view showing a partial structure of a solar cell according to a reference example: 
         FIG. 5  is a schematic sectional view showing the solar cell of the first embodiment comparable to  FIG. 4 ; 
         FIG. 6  is a schematic configuration diagram showing the main part of the solar cell module according to a reference example; 
         FIG. 7  is a schematic sectional view showing the solar cell main part of a second embodiment; 
         FIG. 8  is a schematic sectional view showing the solar cell main part of a third embodiment; 
         FIG. 9  is a schematic sectional view showing the solar cell main part according to a modified example of the third embodiment; 
         FIG. 10  is a schematic sectional view showing a solar cell of a fourth embodiment; 
         FIG. 11  is a schematic sectional view showing a solar cell according to a modified example of the fourth embodiment; and 
         FIG. 12  shows a modified example of a method for forming a highly doped region according to an embodiment of the present application. 
         FIG. 13  is a schematic sectional view showing the main part of the solar cell module of the first embodiment. 
     
    
    
     DESCRIPTION OF EMBODIMENTS 
     Now, embodiments according to the present disclosure (hereinafter referred to as the embodiments) will be more specifically described below with reference to the accompanying drawings. The specific shapes, materials, numerical values, directions and others set forth in the description are just examples for facilitating understanding of this disclosure and can be appropriately varied depending upon e.g., usage, purpose and specification. Furthermore, although a plurality of embodiments and modified examples are contained below, using the characteristic parts of them appropriately in combination falls within the scope assumed. The drawings used in the embodiments as a reference are schematically illustrated and the dimensional ratios of components shown in the drawings are sometimes different from actual dimensions. In the specification, the description: “substantially . . . ” means, if it is illustrated by taking the description “substantially the entire region” as an example, that not only the entire region but also the region that is recognized as substantially the entire region is included. 
     First Embodiment 
       FIG. 1  is a schematic configuration diagram showing the main part of a solar cell module  50  of the first embodiment. 
     As shown in  FIG. 1 , the solar cell module  50  has 6 solar cell strings  20  and 3 bypass diodes  30 . The 6 solar cell strings  20  are connected in series. The solar cell string  20  has 12 solar cells  10 , which are connected in series by a wiring material  16 . The 3 bypass diodes  30  are connected in series. A single unit  22  (hereinafter referred to as a string unit) is constituted of 2 solar cell strings connected in series. Each of the bypass diodes  30  is connected in parallel to one of the mutually different string units  22 . 
     Note that the flow indicated by dashed line A in  FIG. 1  is the flow of electric current produced by power generation of the solar cell  10 . A hatched single solar cell  10   k  in  FIG. 1  is a solar cell shaded by a barrier (not shown). The power generation mechanism of a solar cell module  50  having a shaded solar cell  10   k  will be described later with reference to e.g.,  FIG. 3 . 
       FIG. 2  is a schematic sectional view showing a solar cell  10 . As shown in  FIG. 2 , the solar cell  10  has an n-type (first conductive-type) crystalline silicon substrate (hereinafter referred to as the n-type silicon substrate)  1 , a first i-type amorphous silicon layer  2 , a p-type (second conductive-type) amorphous silicon layer (hereinafter referred to as the p-type amorphous silicon layer)  3 , a second i-type amorphous silicon layer  4  and an n-type amorphous silicon layer  5 . The n-type silicon substrate  1  may be an n-type polycrystalline silicon substrate and preferably an n-type monocrystal silicon substrate. 
     The first i-type amorphous silicon layer  2  is formed on a first main-surface of the n-type silicon substrate  1 . The p-type amorphous silicon layer  3  is provided on a first main-surface side of the n-type silicon substrate  1 . In other words, the p-type amorphous silicon layer  3  is provided on the first i-type amorphous silicon layer  2  on the opposite side to the side facing the n-type silicon substrate  1 . The second i-type amorphous silicon layer  4  is provided on the second main-surface of the n-type silicon substrate  1 . The n-type amorphous silicon layer  5  is provided on the second i-type amorphous silicon layer  4  on the opposite side to the side facing the n-type silicon substrate  1 . Note that, a small amount of oxygen atom may be contained in the interface between the n-type silicon substrate  1  and the amorphous silicon layer or the neighborhood thereof. 
     The first i-type amorphous silicon layer  2 , p-type amorphous silicon layer  3 , second i-type amorphous silicon layer  4  and n-type amorphous silicon layer  5  have a function of suppressing recombination of photogenerated carriers. These silicon layers  2 ,  3 ,  4  and  5  are suitably formed by a chemical vapor deposition (CVD) method, in particular, a plasma CVD method. As the source gas for use in film-formation of the silicon layers  2 ,  3 ,  4  and  5 , a silicon-containing gas such as SiH 4 , Si 2 H 6  or a gas mixture of the silicon-containing gas and H 2  is suitably used. As a dopant gas for forming the p-type or n-type amorphous silicon layer  3  and  5 , for example, B 2 H 6  or PH 3  is suitably used. The addition amount of impurity such as P and B may be small and a gas mixture containing SiH 4  and H 2  can be used. 
     The first and second i-type amorphous silicon layers  2  and  4  are each preferably an i-type hydrogenated amorphous silicon layer (i-type a-Si:H). The p-type amorphous silicon layer  3  is preferably a p-type hydrogenated amorphous silicon layer (p-type a-Si:H). The n-type amorphous silicon layer  5  is preferably an n-type hydrogenated amorphous silicon layer (n-type a-Si:H). The layer (i-type a-Si:H) can be formed by the CVD method using a source gas prepared by diluting SiH 4  with H 2 . The layer (p-type a-Si:H) is formed by using a source gas prepared by adding B 2 H 6  to SiH 4  and diluting the gas mixture with hydrogen. The layer (n-type a-Si:H) is formed by using a source gas containing PH 3  in place of B 2 H 6 . Note that each of the amorphous silicon layers  2  to  5  is not necessarily hydrogenated. The film formation method for each of the semiconductor layers is not particularly limited. The first and second i-type amorphous silicon layers  2 ,  4  may contain a small amount of dopant for the reasons of manufacturing process. 
     As shown in  FIG. 2 , the n-type silicon substrate  1  has a low-doped region  11  and a first main-surface side highly doped region  12 . The low-doped region  11  is doped to be an n-type. The first main-surface side highly doped region  12  is provided between the low-doped region  11  and the ptype amorphous silicon layer  3  and has an n-type dopant concentration higher than that in the low-doped region  11 . The n-type dopant concentrations in the low-doped region  11  and the first main-surface side highly doped region  12  will be described later with reference to  FIG. 3 . The first main-surface side highly doped region  12  is provided over the entire surface of the low-doped region  11  on the side of the p-type amorphous silicon layer  3 . The first main-surface side highly doped region  12  is an n +  region doped with a larger amount of an n-type dopant than that in the low-doped region  11 . Each of the low-doped region  11  and the first main-surface side highly doped region  12  is formed by e.g., an ion implantation method, a thermal diffusion method, a plasma doping method or an epitaxial growth method. As the n-type dopant, e.g., P, As and Sb are used, and in particular, P is suitably used. P is suitably doped while suppressing generation of defects by using a gas mixture with POCl 3  gas and applying a heat treatment. If an ion implantation method is employed, high temperature annealing and RTA (Rapid Thermal Annealing) are preferably used in combination in order to reduce defects to be produced by ion implantation. 
     If a thermal diffusion method or a plasma doping method is used for forming the first main-surface side highly doped region  12 , a concentration gradient is formed, which is a phenomenon where the (dopant) concentration gradually increases with distance from the low-doped region  11  of the n-type silicon substrate  1 . If an epitaxial growth method is used, compared to the case where, for example, a thermal diffusion method is used, a dopant concentration can be rapidly increased at the boundary position between the low-doped region  11  and the first main-surface side highly doped region  12  and the dopant concentration in the entire first main-surface side highly doped region  12  can be easily equalized. 
     The solar cell  10  is assumed to receive light from the side of the n-type amorphous silicon layer  5 . As shown in  FIG. 2 , the solar cell  10  has a transparent conductive layer  6  and a rear-side collector electrode  7  which are sequentially provided in this order on the p-type amorphous silicon layer  3 , on the rear-side (opposite to the light receiving side). The solar cell  10  has a transparent conductive layer  8  and a front-side collector electrode  9 , which are sequentially provided in this order on the n-type amorphous silicon layer  5  on the front-side (the light receiving side). The transparent conductive layer  6  is formed over substantially the entire region of the rear surface of the p-type amorphous silicon layer  3 , whereas the transparent conductive layer  8  is formed over substantially the entire region of the front-side surface of the n-type amorphous silicon layer  5 . Each of the transparent conductive layers  6  and  8  has transparency and conductivity. Each of the transparent conductive layers  6  and  8  is constituted of, for example, a metal oxide such as In 2 O 3 , ZnO, SnO 2  or TiO 2 . These metal oxides may be doped with a dopant such as Sn, Zn, W, Sb, Ti, Ce, Zr, Mo, Al, and Ga. 
     The rear-side and front-side collector electrodes  7  and  9  are formed by screen printing of a conductive paste with a pattern having for example, a large number of finger parts and bus bar parts lower in number than the finger parts. The rear-side collector electrode  7  is preferably formed so as to have a larger area than the front-side collector electrode  9  and the number of the finger parts of the rear-side collector electrode  7  is preferably larger than that of the front-side collector electrode  9 . Note that the structure of the electrodes is not particularly limited. For example, the rear-side collector electrode may be constituted of a metal layer, which is formed over substantially the entire region of the transparent conductive layer. 
     The solar cell  10  is assumed to receive light from the side of the n-type amorphous silicon layer  5 . However, the solar cell may receive light from the side of the p-type amorphous silicon layer. Alternatively, the solar cell may receive light from both sides, i.e., the side of the p-type amorphous silicon layer and the side of the n-type amorphous silicon layer. The first main-surface side of the n-type silicon substrate  1  is preferably specified as a non-light incident surface (a rear surface). This is because carrier mobility is low in a highly doped region. Accordingly, if the highly doped region is specified as a light incident surface (a light receiving surface), carriers generated in the highly doped region are easily recombined, with the result that the short circuit photocurrent density decreases in connection with the intensity of the light to be irradiated. The decrease in the short circuit photocurrent density can be suppressed by setting the highly doped region in the opposite side to the light incident surface. Herein, the light incident surface of the solar cell  10  refers to the main surface upon which light is mainly incident. Beyond 50% to 100% of light incident upon the solar cell  10  enters from the light incident surface. The rear surface refers to the surface opposite to the light incident surface, in short, a main surface formed on the transparent conductive layer and being larger in collector electrode area. 
       FIG. 13  is a sectional view showing the solar cell module  50  constituted of the solar cells  10  shown in  FIG. 2 . In the solar cell module  50 , sun light mainly enters in the direction pointed by arrow S. The solar cell module  50  has a plurality of the solar cells  10 , a front-side protecting material  51  provided on the light incident surface-side of the solar cells  10  and a rear-side protecting material  54  provided on the rear-side of the solar cells  10 . The solar cell module  50  further has a surface-side seal material  52  packed in the space between the front-side protecting material  51  and the solar cells  10 , a rear-side seal material  53  placed in the space between the rear-side protecting material  54  and the solar cells  10 . The solar cells  10  are sandwiched with the respective protecting materials such that the front-side collector electrodes  9  face the light incident surface side of the solar cell module  50  and the rear-side collector electrodes  7  face the rear side of the solar cell module  50 . 
     The front-side protecting material  51  is a plate formed of a material having transparency, such as glass or a resin material, sufficiently transmitting light within a wavelength range contributing to power generation by the solar cell  10 . The rear-side protecting material  54  is a plate or sheet made of glass or a resin material, which does not necessarily have transparency. As the surface-side seal material  52  and rear-side seal material  53 , a seal material, such as polyolefin and an ethylene-vinyl acetate copolymer, usually used in a solar cell module may be used. The rear-side seal material  53  may contain e.g., a titanium oxide (TiO 2 ) particle and a zinc oxide (ZnO 2 ) particle and may be pigmented with e.g., white. In the solar cell module  50  as mentioned above, the solar cells  10  are arranged such that the first main-surface of the n-type silicon substrate  1 , on which the first main-surface side highly doped region  12  is to be formed, faces the rear side of the solar cell module  50 . 
       FIG. 3  is a graph showing the voltage-current characteristic of the solar cell  10  according to a test example. In the test example, the average doping concentration of P doped in the low-doped region  11  is about 1.8×10 15  cm −3 . In  FIG. 3 , solid line f shows the voltage-current characteristic in the case where the average concentration of P doped in the first main-surface side highly doped region  12  is 1×10 18  cm −3 . Dotted line g shows the voltage-current characteristic in the case where the average concentration of P doped in the first main-surface side highly doped region  12  is 5×10 18  cm −3 . Dot-and-dash line r shows the voltage-current characteristic in the case where the average concentration of P doped in the first main-surface side highly doped region  12  is 1×10 19  cm −3 . Solid line h shows the voltage-current characteristic of the solar cell according to a reference example where an n-type silicon substrate is constituted of a low-doped region alone without the first main-surface side highly doped region. 
     As indicated by solid line h, in the case of the solar cell according to the reference example where the first main-surface side highly doped region was not provided, even if a voltage drop was increased up to 15 V, no electric current flowed. In contrast, in the case of the solar cell indicated by solid line f, if a voltage drop was about 2 V or more, electric current flow gradually started and the electric current value finally reached a plateau at around 3 A. In the case of the solar cell indicated by dotted line g and dot-and-dash line r where the average concentration of P is 5×10 18  cm −3  or more, when the voltage drop reached 1.5 V or more, electric current flow rapidly started, and finally, the voltage drop reached nearly 2V or less at an electric current of 6 A. Likewise, satisfactory voltage-current characteristic was obtained. 
       FIG. 4  is a schematic sectional view showing a partial structure of a solar cell  110  according to the reference example. The solar cell  110  has an n-type crystalline silicon substrate  101  having an average doping concentration P of 1×10 14  to 1×10 16  cm −3 . The solar cell  110  has a structure obtained by sequentially laminating an i-type amorphous silicon layer  111  and a p-type amorphous silicon layer  112  in this order on the n-type crystalline silicon substrate  101 .  FIG. 5  is a schematic sectional view showing the solar cell  10  of the embodiment, comparable to  FIG. 4 . The solar cell  10  has the n-type silicon substrate  1  having the low-doped region  11  and the first main-surface side highly doped region  12 . The solar cell  10  has a structure obtained by subsequently laminating the i-type amorphous silicon layer  11  and the p-type amorphous silicon layer  12  in this order on the n-type silicon substrate  1 . The solar cell  110  of the reference example differs from the solar cell  10  in that a low-doped region and a first main-surface side highly doped region are not provided in the n-type crystalline silicon substrate  101  and that the n-type crystalline silicon substrate  101  has a uniform n-type dopant concentration. 
     It has been confirmed that the power generation performance of the solar cell  10  is the same as that of the solar cell  110  of the reference example. Note that it has also been confirmed that the power generation performance of a solar cell according to a modified example of the embodiment and the power generation performance of the solar cells of the following embodiments and modified examples thereof are the same as the power generation performance of the solar cell  110  of the reference example. 
       FIG. 6  is a schematic configuration diagram of a main part of a solar cell module  150  according to the reference example. The solar cell module  150  differs from the solar cell module  50  of the embodiment only in that the solar cell  110  shown in  FIG. 4  is used in place of the solar cell  10 . Now, the power generation performance of the solar cell module  50  of the embodiment shown in  FIG. 1  when the solar cells  10  are shaded will be described in comparison with the power generation performance of the solar cell module  150  of the reference example having a shaded solar cell  110 . In the solar cell module  150  of the reference example, a string unit  122  is constituted of two solar cell strings  120  connected in series. Each bypass diode  130  is connected in parallel to one of the mutually different string units  122 . 
     In the reference example shown in  FIG. 6 , a single solar cell  110   k  is assumed to be shaded in the solar cell module  150 . In this case, it is required to have an excessive voltage drop in order for electric current to flow to the solar cell  110   k , as shown by reference symbol h (the reference example) in  FIG. 3 . Thus, in this case, as shown in  FIG. 6 , electric current flows to a bypass diode  130  connected in parallel to the string unit  122  and the string unit  122  having the solar cell  110   k  is bypassed. Accordingly, electric current flows through the passage indicated by the dotted line pointed by arrow D in  FIG. 6 . Twenty four solar cells  110  present in the hatched region within the string unit  220  do not contribute to power generation. Likewise, a significant output loss is produced. 
     In contrast, in the case where a single solar cell  10   k  is assumed to be shaded in the solar cell module  50  of the embodiment shown in  FIG. 1 , electric current rapidly flows in the solar cell  10   k  due to a small voltage drop as indicated by dotted line g in  FIG. 3 . Accordingly, since the electric current flowing through the solar cell module  50  is generally not so large, the power consumption at the solar cell  10   k , which is expressed by a product of the aforementioned small voltage and the “not-so-large” electric current, can be suppressed to a small value. In consideration of the fact that a large number of the solar cells  10  not shaded in the string unit  22  other than the solar cell  10   k  participate in power generation, the output loss of the solar cell module  50  of the embodiment is greatly reduced, compared to the solar cell module  150  of the reference example. Note that in the case of the embodiment, a single bypass diode  30  is connected in parallel to each string unit  22 . This is because if a plurality of the solar cells  10  present in the same string unit  22  are shaded, output loss can be somewhat reduced by bypassing the string unit  22 . 
     According to the first embodiment, the n-type low-doped region  11  and the n-type first main-surface side highly doped region  12  which has a dopant concentration higher than the n-type low-doped region  11  are provided in the n-type silicon substrate  1 . The n-type first main-surface side highly doped region  12  is provided between the n-type low-doped region  11  and the p-type amorphous silicon layer  3 . Electric current can be supplied to the shaded solar cell  10   k  at a low voltage drop. Thus, loss of the power generation performance of the solar cell module  50 , produced when the solar cell  10  is shaded, can be suppressed. 
     Note that in the first embodiment, a case where a layer for suppressing recombination (hereinafter referred to as the recombination suppressing layer) is formed by sequentially laminating the first i-type amorphous silicon layer  2  and the p-type amorphous silicon layer  3  in this order on the first main-surface side of the n-type silicon substrate  1  has been illustrated. In addition, it has also been illustrated that the first i-type amorphous silicon layer is preferably an i-type hydrogenated amorphous silicon layer (i-type a-Si:H) and that the p-type amorphous silicon layer  3  is preferably a p-type hydrogenated amorphous silicon layer (p-type a-Si:H). However, on the first main-surface side of the n-type silicon substrate  1 , a recombination suppressing layer other than these layers may be formed. On the first main-surface side of the n-type silicon substrate  1 , a recombination suppressing layer formed of a material selected from the following (1) to (6) and including these layers can be suitably formed: (1) p-type a-Si:H, (2) p-type a-SiC:H, (3) a laminate of i-type or p-type a-Si:H and high-concentration p-type a-Si:H (laminate of i-type or p-type a-Si:H/high concentration p-type a-Si:H), (4) a laminate of i-type or p-type a-Si:H/high concentration p-type hydrogenated microcrystalline silicon (p-type pc-Si:H) (5) a laminate of i-type or p-type a-SiC:H/high concentration p-type a-Si:H, and (6) a laminate of i-type or p-type a-SiC:H/high concentration p-type pc-Si:H. Furthermore, a recombination suppressing layer containing a p-type layer other than these, for example, a recombination suppressing layer including a non-hydrogenated p-type layer, can be formed. Herein, the term “high-concentration” means, if it is illustrated by taking “a laminate of p-type a-Si:H/high concentration p-type a-Si:H”, as an example, that the dopant concentration of the latter layer is higher than that in the former layer. More specifically, this expression means that this is a structure obtained by laminating two layers having different dopant amounts. 
     Note that a case where the second i-type amorphous silicon layer  4  and the n-type amorphous silicon layer  5  are sequentially laminated in this order on the second main-surface side of the n-type silicon substrate  1  to form a recombination suppressing layer has been explained. It has been also illustrated that the second i-type amorphous silicon layer  4  is preferably an i-type hydrogenated amorphous silicon layer (i-type a-Si:H) and that the n-type amorphous silicon layer  5  is preferably an n-type hydrogenated amorphous silicon layer (n-type a-Si:H). However, a recombination suppressing layer other than these layers may be formed on the second main-surface of the n-type silicon substrate  1 . A recombination suppressing layer formed of a material selected from the following (7) to (12) and including these layers can be suitably formed: (7) n-type a-Si:H, (8) n-type a-SiC:H, (9) a laminate of i-type or n-type a-Si:H and high concentration n-type a-Si:H (laminate of i-type or n-type a-Si:H/high concentration n-type a-Si:H), (10) a laminate of i-type or n-type a-Si:H/high concentration n-type hydrogenated microcrystalline silicon (n-type pc-Si:H), (11) a laminate of i-type or n-type a-SiC:H/high concentration n-type a-Si:H, (12) a laminate of i-type or n-type a-SiC:H/high concentration n-type pc-Si:H on the second main-surface sides of the n-type silicon substrate  1 . Furthermore, a recombination suppressing layer containing a n-type layer other than these, for example, a recombination suppressing layer including a non-hydrogenated n-type layer, can be formed. Herein, the term “high-concentration” means, if it is illustrated by taking “a laminate of n-type a-Si:H/high concentration n-type a-Si:H”, as an example, that the dopant concentration of the latter layer is higher than that in the former layer. More specifically, this expression means that this is a structure obtained by laminating two layers different having dopant amounts. 
     Note that a case where a protecting layer is not formed on the recombination suppressing layer present on the first and second main-surface sides of the n-type silicon substrate  1  has been illustrated. However, a protecting layer may be formed on at least one side of the recombination suppressing layers on the first and second main-surface sides of the n-type silicon substrate  1 . The protecting layer has a function of, for example, suppressing damage of the recombination suppressing layer, thereby suppressing reflection of light. The protecting layer is preferably constituted of a material having high transparency and suitably constituted of e.g., silicon oxide (SiO 2 ), silicon nitride (SiN) or silicon oxynitride (SiON). 
     On the surface of the n-type silicon substrate  1 , a texture structure (not shown) may be provided. The texture structure refers to a structure having an uneven surface for increasing light absorption of the n-type silicon substrate  1  by suppressing surface reflection, and is formed, for example, on the light receiving surface alone or on both the light receiving surface and the rear surface. The texture structure can be formed by anisotropic etching the ( 100 ) plane of the monocrystal silicon substrate with an alkaline solution. In this manner, a pyramidal uneven structure (the plane ( 111 ) as an oblique plane) is formed in the surface of the monocrystal silicon substrate. The distance between the highest part and the lowest part of uneven portions of the texture structure is, for example, 1 μm to 15 μm. 
     Needless to say, the thickness of each of the layers  1  to  5 ,  11  and  12  can be appropriately varied depending upon the specification. For example, the thickness of the n-type silicon substrate  1  can be set at 50 μm to 300 μm. The thickness of the n-type first main-surface side highly doped region  12  can be set at, for example, 200 nm or less, may be within the range of several to 500 nm, and suitably 15 nm to 200 nm, more preferably 50 nm to 100 nm. The thickness of each of the recombination suppressing layers present on first and second main-surface sides of the n-type silicon substrate  1  can be set at 1 nm to 50 nm and preferably 2 nm to 15 nm. 
     If the surface doping concentration of the low-doped region  11  is 1×10 14  to 1×10 16  cm −3 . then when the surface doping P concentration of the first main-surface side highly doped region  12  is 1×10 18  cm −3  or more, suitable results are obtained. An example of a suitable range of the surface doping P concentration of the first main-surface side highly doped region  12  is from 2×10 18  cm −3  to 2.5×10 18  cm −3 . As described above, the first and second i-type amorphous silicon layers  2 ,  4  may contain a small amount of a dopant. In this case, the surface doping P concentration of the first main-surface side highly doped region  12  preferably falls within a range, which is present on the lower concentration side of the above suitable concentration range, in short, e.g., 0.5×10 18  cm −3  to 2.0×10 18  cm −3 . However, the surface doping concentrations in the low-doped region and the first main-surface side highly doped region are not limited to these values. This is because the effect of the invention of the present application can be obtained by forming the first main-surface side highly doped region  12  having a surface doping concentration larger than the low-doped region  11 . Even if the average doping concentration of the first main-surface side highly doped region  12  is smaller than 1×10 18  cm −3  if the surface doping concentration of the low-doped region  11  is, for example, 1×10 15  cm −3  or more and more preferably 5×10 15  cm −3  or more, electric current flows due to a small voltage drop of about 2 V. Thus, even in this case, compared to the reference example where electric current does not flow until a voltage drop reaches 15 V, as indicated by a reference symbol h in  FIG. 3 , a tunnel effect is extremely easily produced. Accordingly, in this case, output loss of a solar cell module produced when a solar cell is shaded can be suppressed depending on the specification. At this time, the surface doping P concentration in the first main-surface side highly doped region  12  is further preferably 1×10 19  cm −3  or more and 5×10 19  cm −3  or less. 
     A case where the first main-surface side highly doped region  12  is provided over the entire surface of the low-doped region  11  on the p-type amorphous silicon layer  3  side has been illustrated. However, the first main-surface side highly doped region may be provided on a part of the surface of the low-doped region on the p-type amorphous silicon layer side. For example, the first main-surface side highly doped region may be provided only on both ends or the center of the low-doped region  11  in the direction substantially perpendicular to the thickness direction. 
     A case where the first conductive-type is n-type and the second conductive-type is p-type has been illustrated, but a case where the first conductive-type is p-type and the second conductive-type is n-type may be accepted. 
     A case where the solar cell module  50  has 6 solar cell strings  20  and the solar cell string  20  has 12 solar cells  10  has been illustrated. However, the number of solar cell strings contained in the solar cell module may be other than 6, and the number of solar cells contained in each solar cell string may be other than 12. Furthermore, a case where a single bypass diode  30  is connected in parallel to a string unit  22  consisting of 2 solar cell strings  20  connected in series, has been illustrated, but a single bypass diode may be connected in parallel to a string unit consisting of solar cell strings, the number of which is other than 2 (including one), connected in series. The solar cell module may not have a bypass diode. 
     Second Embodiment 
       FIG. 7  is a schematic sectional view showing the main part of a solar cell  210  according to a second embodiment. In  FIG. 7 , a transparent conductive layer and a collector electrode are not shown. In the solar cell of the second embodiment, the same reference numerals are used to designate the same structural elements corresponding to those in the first embodiment and any further explanation is omitted. In the solar cell of the second embodiment, any further explanation on the operational effect and modified example in common with those in the first embodiment is omitted and only the structure, operational effect and modified example, which differ from those of the first embodiment, will be described. 
     The second embodiment differs from the first embodiment in that an n-type crystalline silicon substrate  201  has a second main-surface side highly doped region  213  in addition to the low-doped region  11  and the first main-surface side highly doped region  12 . 
     The second main-surface side highly doped region  213  is provided on a second main-surface side of the n-type crystalline silicon substrate  201 . The second main-surface side highly doped region  213  is provided between the low-doped region  11  and the n-type amorphous silicon layer  5 . The second main-surface side highly doped region  213  is provided over the entire surface of the low-doped region  11  on the side of the n-type amorphous silicon layer  5 . 
     The second main-surface side highly doped region  213  has an average n-type dopant concentration higher than that in the low-doped region  11 . The average n-type doping concentration of the second main-surface side highly doped region  213  may be the same as or different from the average n-type doping concentration of the first main-surface side highly doped region  12 . The average n-type doping concentration of the second main-surface side highly doped region  213  can be appropriately varied and is preferably 1×10 18  cm −3  or more, for example, 2×10 18  cm −3  to 2.5×10 18  cm −3 . As described above, the first and second i-type amorphous silicon layers  2 ,  4  may contain a small amount of dopant. In this case, the average n-type doping concentration of the second main-surface side highly doped region  213  preferably falls within a range which is present on the lower concentration side of the above suitable concentration range, in short, e.g., 0.5×10 18  cm −3  to 2.0×10 18  cm −3 . 
     The layer thickness of the second main-surface side highly doped region  213  may be the same as or different from that of the first main-surface side highly doped region  12 . The layer thickness of the second main-surface side highly doped region  213  can be appropriately varied depending upon the specification. The layer thickness of the second main-surface side highly doped region  213  can be set at, for example, 200 nm or less, may be within the range of several to 500 nm, and suitably 15 nm to 200 nm, more preferably 50 nm to 100 nm. If the n-type highly doped region is provided in the n-type crystalline silicon substrate  201  on the side of the n-type amorphous silicon layer  5  (second main-surface side), recombination of photogenerated carriers is suppressed and output is improved. 
     According to the second embodiment, since the second main-surface side highly doped region  213 , which has a surface dopant concentration higher than that in the low-doped region  11 , is provided between the low-doped region  11  and the n-type amorphous silicon layer  5 , recombination of photogenerated carriers can be suppressed and output is improved. Particularly preferably, the n-type surface doping concentration of the first main-surface side highly doped region  12  is set at 1×10 18  cm −3  or more and the n-type surface doping concentration of the second main-surface side highly doped region  213  is set at 1×10 17  cm −3  more. This is because an effect of suppressing a decrease in output of the solar cell module  50  when a solar cell (like  10   k ) is shaded and an effect of suppressing recombination of photogenerated carriers are both remarkably exerted. Note that at this time, the n-type surface doping concentration of the first main-surface side highly doped region  12  is further preferably 1×10 19  cm −3  or more and 5×10 19  cm −3  or less. 
     In the second embodiment, a case where the second main-surface side highly doped region  213  is provided over the entire surface of the low-doped region  11  on the side of the n-type amorphous silicon layer  5 , has been illustrated. However, the second main-surface side highly doped region may be provided only on a part of the surface of the low-doped region on the side of the n-type amorphous silicon layer. For example, the second main-surface side highly doped region may be provided only at both ends or the center of the low-doped region  11  in the direction substantially perpendicular to the thickness direction, or alternatively may be provided in plane like dots. 
     Third Embodiment 
       FIG. 8  is a schematic sectional view showing the main part of a solar cell  310  according to a third embodiment. A transparent conductive layer and a collector electrode are not shown in  FIG. 8 . In the solar cell  310  of the third embodiment, the same reference numerals are used to designate the same structural elements of a solar cell  210  corresponding to those in the second embodiment and further explanation is omitted. In the solar cell  310  of the third embodiment, any further explanation on the operational effect and modified example in common with those of the solar cells  10  and  210  in the first and second embodiments is omitted and only the structure, operational effect and modified example, which differ from those of the solar cells  10  and  210  in the first and second embodiments, will be described. 
     The third embodiment is the same as the second embodiment in that an n-type crystalline silicon substrate  301  has the n-type low-doped region  11 , the first main-surface side highly doped region  12  and the second main-surface side highly doped region  213 . In contrast, the third embodiment is different from the second embodiment in that the n-type crystalline silicon substrate  301  has first and second highly doped side-regions  314   a  and  314   b , which are provided so as to cover both side surfaces of the n-type low-doped region  11 . 
     As shown in  FIG. 8 , the n-type crystalline silicon substrate  301  has the first highly doped side-region  314   a  at one of the sides of the n-type low-doped region  11  in the direction substantially perpendicular to the thickness direction. The n-type crystalline silicon substrate  301  has the second highly doped side-region  314   b  at the other side of the n-type low-doped region  11  in the direction substantially perpendicular to the thickness direction. Each of the first and second highly doped side-regions  314   a  and  314   b  extends in the thickness direction of the n-type crystalline silicon substrate  301 . The first highly doped side-region  314   a  connects the first main-surface side highly doped region  12  and the second main-surface side highly doped region  213  at one of the sides in the aforementioned substantially perpendicular direction. The second highly doped side-region  314   b  connects the first main-surface side highly doped region  12  and the second main-surface side highly doped region  213  at the other side in the aforementioned substantially perpendicular direction. 
     Each of the first and second highly doped side-regions  314   a  and  314   b  has an average n-type dopant concentration higher than that in the low-doped region  11 . The average n-type dopant concentration of the first highly doped side-region  314   a  may be the same as the average n-type dopant concentration of one or more regions of the first main-surface side highly doped region  12  and the second main-surface side highly doped region  213 . The average n-type dopant concentration of the first highly doped side-region  314   a  may differ from the average n-type dopant concentrations of both regions  12  and  213 . The average n-type dopant concentration of the second highly doped side-region  314   b  may be the same as the average n-type dopant concentration of one or more regions of the first main-surface side highly doped region  12 , the second main-surface side highly doped region  213  and the first highly doped side-region  314   a . The average n-type dopant concentration of the second highly doped side-region  314   b  may differ from the average n-type dopant concentrations of these all regions  12 ,  213  and  314   a . Each of the first and second highly doped side-regions  314   a  and  314   b  preferably has an average n-type dopant concentration of 1×10 18  cm −3  or more, for example 2×10 18  cm −3  to 2.5×10 18  cm −3 . The layer thickness of each of the first and second highly doped side-regions  314   a  and  314   b  in the direction perpendicular to the substrate thickness direction can be appropriately varied depending upon the specification. The layer thickness of each of the first and second highly doped side-regions  314   a  and  314   b  in the direction perpendicular to the substrate thickness direction can be set at, for example, 200 nm or less, may be within the range of several to 500 nm and suitably 15 nm to 200 nm, more preferably 50 nm to 100 nm. 
     According to the third embodiment, since both side surfaces of the n-type crystalline silicon substrate  301  are covered with the first and second highly doped side-regions  314   a  and  314   b , surface recombination at both side surfaces of the n-type crystalline silicon substrate  301  can be reduced and power generation performance can be improved. 
     In addition, since the n-type highly doped region is provided so as to surround the low-doped region  11  of the n-type crystalline silicon substrate  301 , each of the highly doped regions  12 ,  213 ,  314   a  and  314   b  can be simultaneously and easily formed around the low-doped region  11  by e.g., heat diffusion using POCl 3  gas. Accordingly, the number of steps for manufacturing the solar cell  310  can be reduced and cycle time can be shortened. In this case, highly doped regions  12 ,  213 ,  314   a  and  314   b  all have the same average n-type dopant concentration of preferably 1×10 18  cm −3  or more, and further preferably 1×10 19  cm −3  or more and 5×10 19  cm −3  or less. 
     Note that in the third embodiment, a case where the first and second highly doped side-regions  314   a  and  314   b  are provided so as to cover the both side surfaces of the n-type low-doped region  11  has been illustrated. However, the highly doped side-region may be provided only on one of the side surfaces of the n-type low-doped region  11 . 
     Another case where the first and second highly doped side-regions  314   a  and  314   b  connect the first main-surface side highly doped region  12  and the second main-surface side highly doped region  213 , has been illustrated. However, at least one highly doped side-region may not connect the first main-surface side highly doped region and the second main-surface side highly doped region. At least one highly doped side-region is provided only on a part of the side surfaces of the low-doped region. If the second main-surface side highly doped region is not present, the highly doped side-region may be provided on at least a part of the side surfaces of the low-doped region. As shown in  FIG. 9 , more specifically, the schematic sectional view showing the main part of a solar cell  410  according to a modified example of the third embodiment, the n-type highly doped region may not be provided in the center of an n-type silicon substrate  401  on the first main-surface side. As shown in  FIG. 9 , the first main-surface side highly doped region may be provided only at both ends of the n-type silicon substrate  401  in the direction substantially perpendicular to the thickness direction. Note that a transparent conductive layer and a collector electrode are not shown in  FIG. 9 . 
     Fourth Embodiment 
       FIG. 10  is a schematic sectional view showing a solar cell  510  of a fourth embodiment. In the solar cell  510  of the fourth embodiment, any further explanation on the operational effect and modified example in common with the solar cell  10  in the first embodiment is omitted and only the structure, operational effect and modified example, which differ from the solar cell  10  of the first embodiment, will be described. 
     The solar cell  510  of the fourth embodiment differs from those of the first to third embodiments in that a p-type semiconductor layer  550  and an n-type semiconductor layer  560  are provided on the first main-surface side of an n-type crystalline silicon substrate  501 . 
     As shown in  FIG. 10 , the solar cell  510  has the n-type crystalline silicon substrate (hereinafter referred to simply as the substrate)  501 , the p-type semiconductor layer  550  and the n-type semiconductor layer  560 , which are formed on the first main-surface of the substrate  501 . The p-type semiconductor layer  550  and the n-type semiconductor layer  560  have a portion mutually overlapped in the thickness direction. An insulating layer  570  is provided in the space of the overlapped portion in the thickness direction. The light receiving surface of the substrate  501  corresponds to the surface opposite to the first main-surface of the substrate  501 . The solar cell  510  has an n-type low-doped region  511  and an n-type first main-surface side highly doped region  512 . The n-type first main-surface side highly doped region  512  has an average n-type doping concentration higher than that in the n-type low-doped region  511 . The n-type first main-surface side highly doped region  512  is formed over the entire surface of the n-type low-doped region  511  on the opposite side to the light receiving surface side. 
     A part of the n-type first main-surface side highly doped region  512  is provided between the n-type low-doped region  511  and the p-type semiconductor layer  550 . The p-type semiconductor layer  550  is constituted of, for example, a laminated structure formed of an i-type amorphous silicon layer and a p-type amorphous silicon layer, as described in the first embodiment. The p-type semiconductor layer  550  may be constituted of a recombination suppressing layer formed of a material selected from the above (1) to (6). 
     The other part of the n-type first main-surface side highly doped region  512  is provided between the n-type low-doped region  511  and the n-type semiconductor layer  560 . The n-type semiconductor layer  560  is constituted of a laminated structure formed of for example, an i-type amorphous silicon layer and an n-type amorphous silicon layer, as described in the first embodiment. The n-type semiconductor layer  560  may be constituted of a recombination suppressing layer formed of a material preferably selected from the above (7) to (12). 
     On the side of the p-type semiconductor layer  550  opposite to the side of the substrate  501 , a p-side electrode  580  is provided. The p-side electrode  580  consists of a transparent conductive layer formed on the p-type semiconductor layer  550  and a collector electrode formed on the transparent conductive layer. On the side of the n-type semiconductor layer  560  opposite to the side of the substrate  501 , an n-side electrode  590  is provided. The n-side electrode  590  consists of a transparent conductive layer formed on the n-type semiconductor layer  560  and a collector electrode formed on the transparent conductive layer. A shadow loss is suppressed by arranging both the p-side electrode  580  and the n-side electrode  590  on the substrate  501  on the opposite side to the light receiving surface side. 
     As a material for each of the transparent conductive layers and a manufacturing method thereof, the material and manufacturing method as described in the first embodiment can be suitably used. Each collector electrode may be formed by using a conductive paste and preferably formed by electrolytic plating. The aforementioned rear-side and front-side collector electrode is each formed of a metal such as Ni, Cu and Ag, may be a laminated structure of an Ni layer and a Cu layer, and may have a tin (SN) layer on the outermost surface in order to improve corrosion resistance. As a suitable laminated structure of the transparent conductive layer and the collector electrode there is a laminated structure of a transparent conductive layer formed of indium tin oxide (ITO) and a collector electrode formed of Cu. 
     The p-side electrode  580  and the n-side electrode  590  are not in contact with each other and are electrically separated. The solar cell  510  has a pair of electrodes formed only on the rear side of the n-type crystalline silicon substrate  501 . Holes produced in the power generation region are collected by the p-side electrode, whereas electrons are collected by the n-side electrode. 
     The p-type semiconductor layer  550  and the n-type semiconductor layer  560  are both laminated on the rear surface of the n-type crystalline silicon substrate  501  to form a p-type region and an n-type region on the rear surface. The p-type region and the n-type region are alternately arranged, for example, in a single direction, and engaged with each other like a comb tooth (shape pattern) in the planar view. In the example shown in FIG.  10 , a part of the p-type semiconductor layer  550  overrides a part of the n-type semiconductor layer  560  to form individual semiconductor layers (p-type region, n-type region) without space between them on the rear surface of the n-type crystalline silicon substrate  501 . At the portion at which the p-type semiconductor layer  550  overlaps with the n-type semiconductor layer  560 , the insulating layer  570  is provided. The insulating layer  570  is formed of, for example, silicon oxide, silicon nitride or silicon oxynitride. In each layer and each region, the dopant concentration, layer thickness and production method for each layer can be appropriately varied depending upon the specification. As the concentration, layer thickness and production method for each layer, those described in the first embodiment and the modified example can be employed. 
     According to the fourth embodiment, a part of the first main-surface side highly doped region  512 , which is formed over the entire surface of the low-doped region  511  on the opposite side to the light receiving surface side, is positioned between the n-type low-doped region  511  and the p-type semiconductor layer  550 . On the other hand, the other part of the first main-surface side highly doped region  512  is positioned between the n-type low-doped region  511  and the n-type semiconductor layer  560 . Thus, the layers corresponding to first and second main-surface side highly doped regions  12  and  213  in the second embodiment can be simultaneously formed only by providing one highly doped region  512  on the low-doped region  511  on the opposite side to the light receiving surface side. Accordingly, an effect of suppressing a decrease in output of the solar cell module when a solar cell is shaded and an effect of suppressing recombination of photogenerated carriers can be easily obtained. 
     In the fourth embodiment, a case where the first main-surface side highly doped region  512  is provided over the entire surface of the n-type low-doped region  511 , has been illustrated. However, the first main-surface side highly doped region may not be provided over the entire surface of the n-type low-doped region.  FIG. 1I  is a schematic sectional view showing a solar cell  610  according to a modified example of the fourth embodiment. In the modified example, the same reference numerals are used to designate the same structural elements corresponding to those in the fourth embodiment and any further explanation is omitted. As shown in  FIG. 11 , in the modified example, a first main-surface side highly doped region  612  is provided partly between an n-type low-doped region  611  and the p-type semiconductor layer  550  in an n-type crystalline silicon substrate  601 . Like the modified example, if the first main-surface side highly doped region  612  is not provided between the n-type low-doped region  611  and the n-type semiconductor layer  560 , a decrease in output of the solar cell module when a solar cell  610  is shaded, can be suppressed. Note that the first main-surface side highly doped region is provided over the entire region between the n-type low-doped region of the n-type crystalline silicon substrate and the p-type semiconductor layer, and is not provided between the n-type low-doped region of the n-type crystalline silicon substrate and the n-type semiconductor layer. Alternatively, the first main-surface side highly doped region is provided over the entire region between the n-type low-doped region and the p-type semiconductor layer in the n-type crystalline silicon substrate and may be provided partly between the n-type low-doped region and the n-type semiconductor layer in the n-type crystalline silicon substrate. Alternatively, the first main-surface side highly doped region is provided only partly between the n-type low-doped region and the p-type semiconductor layer in the n-type crystalline silicon substrate and may be provided only partly between the n-type low-doped region and the n-type semiconductor layer in the n-type crystalline silicon substrate. 
     Modified Example 
     In each of the aforementioned embodiments, a highly doped region was formed by e.g., an ion implantation method, a thermal diffusion method, a plasma doping method or an epitaxial growth method. A highly doped region with a predetermined conductive-type dopant may be formed by a method belonging to the thermal diffusion method, i.e., a method of diffusing the predetermined conductive-type dopant in a crystalline silicon substrate by applying a step of bringing a solution containing the predetermined conductive-type dopant into contact with the surface of the crystalline silicon substrate, followed by a heat treatment step of the crystalline silicon substrate, or alternatively, by preparing a solution containing the predetermined conductive-type dopant for oxidizing silicon, bringing the solution into contact with the crystalline silicon substrate to form a silicon oxide layer containing the predetermined conductive-type dopant on the surface of the crystalline silicon substrate, and thereafter applying the heat treatment step to diffuse the predetermined conductive-type dopant from the silicon oxide layer to the surface of the crystalline silicon substrate. For example, an n-type highly doped region may be formed by using a solution containing an n-type dopant, such as P, As and Sb. A case of using a particularly preferably n-type dopant P will be more specifically described by way of a modified example of the third embodiment. 
       FIG. 12  is a view illustrating a method of forming highly doped regions  12 ,  213 ,  314   a  and  314   b , according to the modified example. Note that the same reference numerals are used to designate the same or similar structural elements corresponding to those in the third embodiment. 
     First, a chemical solution for forming a silicon oxide containing P is prepared, which serves to form a silicon oxide layer  370  on the surface of the n-type crystalline silicon substrate  301  having a surface texture structure. The n-type crystalline silicon substrate  301  consists of the low-doped region  11  having an n-type dopant concentration lower than those of the highly doped regions  12 ,  213 ,  314   a  and  314   b . Then, the n-type crystalline silicon substrate  301  having a texture structure on a surface is soaked in the chemical solution for forming a silicon oxide to form a P-containing oxide layer  370  having a thickness of several to about 20 angstroms, over the entire surface of the n-type crystalline silicon substrate  301  (S 1 ). Then, the n-type crystalline silicon substrate  301  having the P-containing oxide layer  370  on the surface is subjected to a heat treatment in a nitrogen atmosphere or an oxygen atmosphere (S 2 ). P contained in the oxide layer  370  diffuses from the surface of the n-type crystalline silicon substrate  301  toward the interior by this heat treatment and forms highly doped regions  12 ,  213 ,  314   a  and  314   b , which are n +  regions containing P in a higher concentration than other regions, in the interface between the n-type crystalline silicon substrate  301  and the oxide layer  370  and the neighborhood thereof. Thereafter, the n-type crystalline silicon substrate  301  is soaked in a hydrofluoric acid (HF) solution to remove the oxide layer  370  to expose the highly doped regions  12 ,  213 ,  314   a  and  314   b  in the surface of the n-type crystalline silicon substrate  301  (S 3 ). 
     The chemical solution for forming a silicon oxide used in the wet process step of SI is an acidic aqueous solution containing an n-type dopant and is not limited as long as it is an aqueous solution serving for oxidizing the surface of silicon. In the modified example, a solution mixture of a nitric acid aqueous solution with a concentration of 85 mass % and a phosphoric acid aqueous solution with a concentration of 75 mass % is used. The mixing ratio of individual aqueous solutions, more specifically, the volume ratio of the nitric acid aqueous solution: the phosphoric acid aqueous solution, falls in the range of satisfactorily 10:90 to 50:50 and preferably 20:80 to 40:60. The processing temperature of step S preferably falls in the range of for example, 20° C. to 100° C. and preferably about 50° C. to 80° C. 
     The acidic aqueous solution is not limited to a solution containing phosphoric acid (orthophosphoric acid) and nitric acid and may contain, for example, other acids such as hydrochloric acid and a hydrogen peroxide solution in place of nitric acid or in addition to nitric acid. As phosphoric acid serving as an n-type dopant source, metaphosphoric acid may be used. The acidic aqueous solution may contain a P-containing compound other than phosphoric acid. 
     In the above, a method using an acidic aqueous solution is mentioned; however, another chemical solution such as a neutral chemical solution may be used as long as an alkaline aqueous solution dissolving the n-type crystalline silicon substrate  301  is not used. 
     The heat treatment (S 2 ), which is a treatment for diffusing a dopant, is carried out under an oxygen or nitrogen atmosphere, and particularly preferably under an oxygen atmosphere. Alternatively, the heat treatment may be carried out under a water-vapor atmosphere. The temperature of the heat treatment falls within the range of preferably 700° C. to 1000° C. and further preferably 800° C. to 950° C. However, the temperature can be appropriately controlled. The time for the heat treatment is, for example, about 10 to 60 minutes, but the time can be appropriately controlled. 
     The P-containing oxide layer  370  formed by use of the chemical solution for forming a silicon oxide may cover the entire surface of the n-type crystalline silicon substrate  301  or may be formed on a part or in the form of islands. The thickness and formation area of the oxide layer  370  can be controlled by varying the mixing ratio of a plurality of acid aqueous solutions contained in the chemical solution for forming a silicon oxide for use in forming the oxide layer  370 , concentrations of the individual acid aqueous solutions, and formation conditions such as temperature, and time for the oxide layer  370 . In diffusing P in the n-type crystalline silicon substrate  301 , the diffusion depth and the concentration of P can be controlled by varying e.g., the temperature and time for the heat treatment. 
     In the above modified example of the third embodiment, a method for forming a highly doped region by bringing a solution containing a predetermined conductive-type dopant into contact with a substrate followed by applying a predetermined heat treatment to diffuse the predetermined conductive-type dopant into the substrate has been illustrated. Highly doped regions in the first, second and fourth embodiments may be formed in the same manner as in this method. The n-type crystalline silicon substrate  301  having both a highly doped region and a low-doped region in the surface may be formed, for example, by forming the P-containing oxide layer  370  over the entire surface of the n-type crystalline silicon substrate  301 , removing a part of the oxide layer  370  and applying a heat treatment. Alternatively, the n-type crystalline silicon substrate  301  having both a highly doped region and a low-doped region in the surface may be formed by forming the P-containing oxide layer  370  over the entire surface of the n-type crystalline silicon substrate  301 , applying a heat treatment to form the highly doped region over the entire surface of the n-type crystalline silicon substrate  301 , and removing a part of the highly doped region thus formed by etching, etc. 
     The n-type crystalline silicon substrate  301  having a highly doped region formed by a wet process and a heat treatment as described above may be subjected to the same manufacturing step as in each of the above embodiments to get a solar cell completed. The step of manufacturing a solar cell includes a step of forming a p-type amorphous silicon layer on the first main-surface side of the n-type crystalline silicon substrate  301 , from which the oxide layer  370  is removed. It is preferable that the step of manufacturing a solar cell further includes a step of forming an n-type amorphous silicon layer on the second main-surface side of n-type crystalline silicon substrate  301 , from which the oxide layer  370  is removed. Even in the case of using a dopant diffusion method employing a wet process and a heat treatment, a solar cell having satisfactory voltage-current characteristic can be formed and suitable results are obtained. Note that a method for forming a highly doped region described in the modified example is just an example. Other than the methods shown in the modified example, a highly doped region can be formed by applying a solution containing a dopant to the surface of a crystalline silicon substrate by e.g., a spin coating method or a spray method and then applying a heat treatment. 
     REFERENCE SIGNS LIST 
       1 ,  201 ,  301 ,  401 ,  501 ,  601  n-type silicon substrate,  2  first-i type amorphous silicon layer,  3  p-type amorphous silicon layer,  4  second i-type amorphous silicon layer,  5  n-type amorphous silicon layer,  10 ,  210 ,  310 ,  410 ,  510 ,  610  solar cell,  11 ,  511 ,  611  low-doped region,  12 ,  512 ,  612  first main-surface side highly doped region,  16  Wiring material,  20  solar cell string,  30  bypass diode,  50  solar cell module,  213  second main-surface side highly doped region,  314  first highly doped side-region,  314   b  second highly doped side-region.  550  p-type semiconductor layer,  560  n-type semiconductor layer,  370  oxide layer