Patent Publication Number: US-8970017-B1

Title: High frequency monolithic microwave integrated circuit connection

Description:
FIELD OF THE INVENTION 
     The present invention relates to high frequency input/output die connections generally and, more particularly, to a method and/or apparatus for implementing a high frequency monolithic microwave integrated circuit connection. 
     BACKGROUND OF THE INVENTION 
     Conventional radio frequency (i.e., RF) bonding pads are rectangular and have reasonable performance. Making the radio frequency bonding pads smaller improves the performance at frequencies above 8 gigahertz. However, sharp angles in the traces degrade the performance as the frequency increases and so external compensation becomes more difficult. Furthermore, mechanical yields are lower in manual and automated assembly factory environments with the smaller pads which lead to lower electrical yields. 
     It would be desirable to implement a high frequency monolithic microwave integrated circuit connection. 
     SUMMARY OF THE INVENTION 
     The present invention concerns an apparatus having a bonding pad and a conductor. The bonding pad may be formed in a conductive layer of an integrated circuit. The bonding pad generally has (i) a bond region, (ii) an interface edge sized to match a transmission line and (iii) a tapered region between the bond region and the interface edge. The interface edge may be narrower than the bond region. The tapered region generally has a non-rectangular shape that spans from the bond region to the interface edge. The conductor may be bonded to the bond region. The conductor is generally configured to exchange a signal with the bond region. The signal may be in a microwave frequency range. 
     The objects, features and advantages of the present invention include providing a high frequency monolithic microwave integrated circuit connection that may (i) reduce a radio frequency pad size compared with conventional designs, (ii) have sufficient surface area on the radio frequency pad to facilitate automated bonding techniques, (iii) include a chamfered region, (iv) implement an irregular hexagonal shape, (v) support E band frequencies, (vi) provide on-chip compensation for radio frequency signals and/or (vii) be, implemented on an integrated circuit. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       These and other objects, features and advantages of the present invention will be apparent from the following detailed description and the appended claims and drawings in which: 
         FIG. 1  is a perspective diagram of an apparatus in accordance with a preferred embodiment of the present invention; 
         FIG. 2  is a graph illustrating transition performances; 
         FIG. 3  is a graph illustrating return losses; 
         FIG. 4  is a perspective diagram of another apparatus; 
         FIG. 5  is a graph illustrating transition performances as a function of a die to carrier separation; 
         FIG. 6  is a graph illustrating return losses as a function of the die to carrier separation; 
         FIG. 7  is a diagram of a bonding pad; 
         FIG. 8  is a graph illustrating transition performances using the bonding pad of  FIG. 7 ; 
         FIG. 9  is a graph illustrating return losses using the bonding pad of  FIG. 7 ; 
         FIG. 10  is a diagram of a bonding pad; 
         FIG. 11  is a graph illustrating a transition performance using the bonding pad of  FIG. 10 ; 
         FIG. 12  is a graph illustrating a return losses using the bonding pad of  FIG. 10 ; 
         FIG. 13  is a diagram of a bonding pad; 
         FIG. 14  is a diagram of another bonding pad; 
         FIG. 15  is a graph illustrating return losses using the bonding pads of  FIGS. 13 and 14 ; 
         FIG. 16  is a graph illustrating insertion losses using the bonding pads of  FIGS. 13 and 14 ; and 
         FIGS. 17A-17F  are diagrams of additional shapes of bonding pads. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Some embodiments of the present invention generally provide a bonding pad design that supports signals in a radio frequency range (e.g., less than approximately 300 gigahertz-GHz), microwave frequency range (e.g., super-high frequency to extremely high frequency bands of approximately 3 GHz to approximately 300 GHz), a V band (e.g., approximately 50 GHz to approximately 75 GHz), an E band (e.g., approximately 60 GHz to approximately 90 GHz) and/or in a range of approximately 10 GHz to 300 GHz. In some embodiments, the bonding pads generally have an irregular hexagonal (or 6-sided) shape that is tapered to match a corresponding transmission line. The 6 sides may be see as viewed in a plane parallel to a top surface of the circuit  102 . The bonding pads include a bond region having sufficient area to reliably accept bonding wires and/or a bonding tape in an automated or manual bonding process. The tapered shape may provide on-chip frequency compensation to account for the inductance of the bonding wires/bonding tape. The invention generally provides a good compromise between the radio frequency performance and mechanical criteria to given an optimal overall monolithic microwave integrated circuit performance in mass production. 
     Referring to  FIG. 1 , a perspective diagram of an apparatus  100   a  is shown in accordance with a preferred embodiment of the present invention. The apparatus (or device or integrated circuit)  100   a  generally implements a monolithic microwave integrated circuit. The circuit  100   a  may comprise a block (or circuit)  102 , a block (or circuit)  104 , a block (or circuit)  106 , a block (or circuit)  108 , a block (or circuit)  110 , a block (or circuit)  112 , and one or more blocks (or circuits)  114   a - 114   b . The circuits  102  to  114   b  may be implemented in hardware and/or software executing on hardware. 
     The circuit  102  generally implements an integrated circuit. In some embodiments, the circuit  102  is a monolithic microwave integrated circuit. Other embodiments may include, but are not limited to, high frequency circuits, compound semiconductor circuits and the like. In some embodiments, the circuit  102  may be operational to generate a signal (e.g., RF). In other embodiments, the circuit  102  may be operational to receive the signal RF. The signal RF is generally a radio frequency signal in the microwave range. Other types of signals and other frequency ranges may be implemented to meet the criteria of a particular application. 
     The circuit  102  may be fabricated in compound semiconductors. In some embodiments, the circuit  102  may be fabricated in III-V compounds, such as Gallium Arsenide (e.g., GaAs) or Indium Phosphide (e.g., InP). In some embodiments, the circuit  102  may be fabricated in a Silicon Germanium (e.g., SiGe) compound. In other embodiments, the circuit  102  may be fabricated in a Gallium Nitride (e.g., GaN) compound. Other materials may be used to create the circuit  102  to meet the criteria of a particular application. 
     The circuit  104  may implement a carrier in some embodiments, another integrated circuit in other embodiments, and a board (or substrate) in still other embodiments. In some embodiments, the circuit  104  is generally operational to receive the signal RF from the circuit  102 . In other embodiments, the circuit  104  may present the signal RF to the circuit  102 . Other types of signals and other frequency ranges may be implemented to meet the criteria of a particular application. 
     The circuit  106  may implement a bonding pad. The circuit  106  is generally operational to transfer the signal RF between the circuit  108  and the circuit  110  via the circuits  114   a - 114   b . The bonding pad  106  may be formed in a conductive layer of the circuit  102  proximate an edge of the circuit  102  facing the circuit  104 . The circuit  106  generally has (i) a bond region, (ii) an interface edge sized to match a width of the circuit  108  and (iii) a tapered region between the bond region and the interface edge. The interface edge is typically narrower than a parallel edge of the bond region. The tapered region has a non-rectangular (e.g., tapered) shape that spans from opposite sides of the bond region to the interface edge. The bond region or the bond region in combination with the tapered regions generally has sufficient area to receive the circuits  114   a - 114   b  in an automated bonding technique reliably. Other shapes may be implemented to meet the criteria of a particular application. For example, the circuit  106  may have an overall “Y” shape, a triangle shape, a curved (e.g., oval or round) shape, an irregular hexagonal shape, and other non-rectangular shapes. 
     The circuit  108  may implement a transmission line (or wire trace). The circuit  108  is usually fabricated in the same conductive layer as the circuit  106 . In some embodiments, the circuit  108  may be operational to carry the signal RF from a source to the circuit  106 . The source of the signal RF may be a high frequency power amplifier. In other embodiments, the circuit  108  may be operational to carry the signal RF from the circuit  106  to a destination (or sink) fabricated on the circuit  102 . 
     The circuit  110  may implement a stub region (or circuit). The circuit  110  may be fabricated in a conductive layer of the circuit  104  proximate an edge of the circuit  104  facing the circuit  102 . The circuit  110  is generally operational to exchange the signal RF with the circuit  106  via the circuits  114   a - 114   b . The circuit  110  may also be used to compensate for the inductive bond wires or the bonding tapes. In some embodiments, the circuit  110  may have dimensions of approximately 600 micrometers (e.g., μm) in a direction parallel to the edge of the circuit  104  by 100 μm in a direction perpendicular to the edge. Other dimensions may be implemented to meet the criteria of a particular application. 
     The circuit  112  may implement a transmission line (or wire trace). The circuit  112  is usually fabricated in the same conductive layer as the circuit  110 . In some embodiments, the circuit  112  is generally operational to carry the signal RF between a source or a sink and the circuit  110 . 
     Each circuit  114   a - 114   b  may implement a bond wire. Each circuit  114   a - 114   b  is generally fabricated as a gold wire (or conductor) having a diameter of approximately 15 μm to 25 μm. Other diameters may be implemented to meet the criteria of a particular application. During fabrication, an open end of each circuit  114   a - 114   b  may be ball bonded to the circuit  106 . Other ends of the circuits  114   a - 114   b  may be wedge bonded to the circuit  110 . The circuits  114   a - 114   b  may be bonded proximate each other at the circuit  106 . The circuits  114   a - 114   b  are generally bonded apart from each other at opposing ends of the circuit  110  as illustrated. 
     Referring to  FIG. 2 , a graph  120  illustrating simulated transition performances is shown. The graph  120  generally covers a range of 10 gigahertz (e.g., GHz) to approximately 110 GHz. A curve  122  may illustrate a transition performance of the circuit  100   a  in terms of a scattering parameter (e.g., a forward complex transmission coefficient S(2,1)). A curve  124  may illustrate a transition performance of a common bonding pad in terms of the scattering parameter. At a frequency of 86 GHz, the circuit  100   a  may have a lower forward complex transmission coefficient than the common bonding pad by approximately 0.12 decibels (e.g., dB). 
     Referring to  FIG. 3 , a graph  130  illustrating simulated return losses is shown. A curve  132  generally shows the return loss of the common bonding pad in terms of a scattering parameter (e.g., an input complex reflection coefficient S(1,1)). A curve  134  generally shows the return loss of the circuit  100   a  in terms of the scattering parameter. At 86 GHz frequency, the circuit  100   a  may have a better input complex reflection coefficient than the common bonding pad by approximately 1.5 dB. 
     Referring to  FIG. 4 , a perspective diagram of an apparatus  100   b  is shown. The apparatus (or device or integrated circuit)  100   b  generally implements a monolithic microwave integrated circuit. The circuit  100   b  may be a variation of the circuit  100   a . The circuit  100   b  generally comprises the circuit  102 , the circuit  104 , the circuit  106 , the circuit  108 , the circuit  110 , the circuit  112 , and a block (or circuit)  116 . The circuit  116  may be implemented in hardware and/or software executing on hardware. 
     The circuit  116  may implement a bond ribbon. The circuit  116  is generally fabricated as a gold ribbon (or conductor) having a width of approximately 50 μm to 150 μm and a length of approximately 200 μm to 500 μm. Other widths and/or lengths may be implemented to meet the criteria of a particular application. During fabrication, an end of the circuit  116  may be wedge bonded to the circuit  106 . The other end of the circuit  116  may be wedge bonded to the circuit  110 . The bond region or the bond region in combination with the tapered regions generally has sufficient area to reliably receive the circuit  116  in an automated bonding technique. 
     Referring to  FIG. 5 , a graph  140  illustrating simulated transition performances as a function of a die to carrier separation is shown. A parameter (e.g., DIETOCARR) generally defines a distance between facing physical edges the circuit  102  and the circuit  104 . A length of the circuit  116  may be approximately 200 μm. Curves  142 ,  144 ,  146  and  148  generally show the forward complex transmission coefficient S(2,1) performance at separations of 50 μm, 100 μm, 150 μm and 200 μm, respectively. 
     Referring to  FIG. 6 , a graph  150  illustrating simulated return losses as a function of the die to carrier separation is shown. A length of the circuit  116  may be approximately 200 μm. Curves  152 ,  154 ,  156  and  158  generally show the input complex reflection coefficient S(1,1) performances at separations of 50 μm, 100 μm, 150 μm and 200 μm, respectively. 
     Referring to  FIG. 7 , a diagram of an example implementation of a circuit  106   a  is shown. The circuit  106   a  may be representative of the circuit  106 . The circuit  106   a  generally comprises a region (or area)  162   a , a region (or area)  164   a  and an edge (or interface)  166 . The edge  166  may have a dimension (e.g., A) of approximately 35 μm. An overall width (e.g., B1) of the circuit  106   a  may be approximately 90 μm. An overall height (e.g., D1) of the circuit  106   a  may be approximately 120 μm. 
     The region  162   a  may implement a bond region. The region  162   a  is generally sized to bond with the circuits  114   a - 114   b  or the circuit  116 . The region  162   a  may have dimensions (e.g., C1 by D1) of approximately 47.5 μm by 120 μm. Other dimensions may be implemented to meet the criteria of a particular application. 
     The region  164   a  may implement a tapered region. The region  164   a  is generally sized and shaped to transition from the region  162   a  to the edge  166  of the circuit  106   a . The region  164   a  generally has a trapezoid (or chamfered or bezeled) shape. 
     The edge  166  is generally sized to match the width of the circuit  108 . When fabricated, the circuit  108  connects to the circuit  106   a  at the edge  166 . 
     An angle (e.g., θ) may be formed between an edge of the circuit  108  and an output edge of the region  164   a . The angle may range from approximately 30 degrees to approximately 45 degrees. Other angles may be implemented to meet the criteria of a particular application. 
     Referring to  FIG. 8 , a graph  170  illustrating simulated transition performances using the circuit  106   a  is shown. A curve  172  may illustrate a transition performance of the circuit  100   a  implementing a common bonding pad. A curve  174  generally illustrates the performance of the circuit  100   a  implementing the circuit  106   a  in terms of the forward complex transmission coefficient S(2,1). A curve  176  may illustrate a transition performance of the circuit  100   a  implementing the circuit  106   a  with extra space in terms of the forward complex transmission coefficient S(2,1). The extra space generally refers to an extra separation between the two wire bonds  114   a - 114   b  at an interface to the circuit  106   a.    
     Referring to  FIG. 9 , a graph  180  illustrating simulated return losses using the circuit  106   a  is shown. A curve  182  generally shows the return loss of the circuit  100   a  implementing the common bonding pad in terms of the input complex reflection coefficient S(1,1). A curve  184  generally shows the return loss of the circuit  100   a  implementing the circuit  106   a  in terms of the input complex reflection coefficient S(1,1). A curve  186  may illustrate the return loss of the circuit  100   a  implementing the circuit  106   a  with extra space in terms of the input complex reflection coefficient S(1,1). 
     Referring to  FIG. 10 , a diagram of an example implementation of a circuit  106   b  is shown. The circuit  106   b  may be representative of the circuit  106 . The circuit  106   b  generally comprises a region (or area)  162   b , a region (or area)  164   b  and the edge  166 . An overall width (e.g., B2) of the circuit  106   b  may be approximately 120 μm. An overall height (e.g., D2) of the circuit  106   b  may be approximately 155 μm. 
     The region  162   b  may implement the bond region. The region  162   b  is generally sized to bond with the circuits  114   a - 114   b  or the circuit  116 . The region  162   b  may have dimensions (e.g., C2 by D2) of approximately 60 μm by 155 μm. Other dimensions may be implemented to meet the criteria of a particular application. 
     The region  164   b  may implement the tapered region. The region  164   b  is generally sized and shaped to transition from the region  162   b  to the edge  166  of the circuit  106   a . The region  164   b  generally has a trapezoid (or chamfered or bezeled) shape. 
     Referring to  FIG. 11 , a graph  190  illustrating a simulated transition performance using the circuit  106   b  is shown. A curve  192  may illustrate a transition performance of the circuit  100   a  implementing the circuit  106   b  in terms of the forward complex transmission coefficient S(2,1). 
     Referring to  FIG. 12 , a graph  200  illustrating simulated return losses using the circuit  106   b  is shown. A curve  202  generally shows the return loss of the circuit  100   a  implementing the circuit  106   b  in terms of the input complex reflection coefficient S(1,1). 
     Referring to  FIG. 13 , a diagram of an example implementation of a circuit  106   c  is shown. The circuit  106   c  may be representative of the circuit  106 . The circuit  106   c  generally comprises a region (or area)  162   c , a region (or area)  164   c  and the edge  166 . An overall width (e.g., B2) of the circuit  106   c  may be approximately 120 μm. An overall height (e.g., D3) of the circuit  106   c  may be approximately 150 μm. 
     The region  162   c  may implement the bond region. The region  162   c  is generally sized to bond with the circuits  114   a - 114   b  or the circuit  116 . The region  162   c  may have dimensions (e.g., C3 by D3) of approximately 80 μm by 150 μm. Other dimensions may be implemented to meet the criteria of a particular application. 
     The region  164   c  may implement the tapered region. The region  164   c  is generally sized and shaped to transition from the region  162   c  to the edge  166  of the circuit  106   c . The region  164   c  generally has a trapezoid (or chamfered or bezeled) shape. 
     Referring to  FIG. 14 , a diagram of an example implementation of a circuit  106   d  is shown. The circuit  106   d  may be representative of the circuit  106 . The circuit  106   d  generally comprises a region (or area)  162   d , a region (or area)  164   d  and the edge  166 . An overall width (e.g., B2) of the circuit  106   c  may be approximately 120 μm. An overall height (e.g., D3) of the circuit  106   d  may be approximately 150 μm. 
     The region  162   d  may implement the bond region. The region  162   d  is generally sized to bond with the circuits  114   a - 114   b  or the circuit  116 . The region  162   d  may have dimensions (e.g., C4 by D3) of approximately 20 μm by 150 μm. Other dimensions may be implemented to meet the criteria of a particular application. 
     The region  164   d  may implement the tapered region. The region  164   d  is generally sized and shaped to transition from the region  162   d  to the edge  166  of the circuit  106   d . The region  164   d  generally has a trapezoid (or chamfered or bezeled) shape. 
     Referring to  FIG. 15 , a graph  210  illustrating simulated return losses of the circuits  106   c  and  106   d  is shown. A curve  212  may illustrate a return loss performance of the circuit  100   a  implementing the circuit  106   c  in terms of the input complex reflection coefficient S(1,1). A curve  214  may illustrate a return loss performance of the circuit  100   a  implementing the circuit  106   d  in terms of the input complex reflection coefficient S(1,1). 
     Referring to  FIG. 16 , a graph  220  illustrating simulated insertion losses of the circuits  106   c  and  106   d  is shown. A curve  222  may illustrate an insertion loss performance of the circuit  100   a  implementing the circuit  106   c  in terms of the forward complex transmission coefficient S(2,1). A curve  224  may illustrate an insertion loss performance of the circuit  100   a  implementing the circuit  106   d  in terms of the forward complex transmission coefficient S(2,1). 
     Referring to  FIGS. 17A-17F , diagrams of additional shapes of bonding pads  106   e - 106   j  are shown. Bonding pads  106   e  and  106   i  may include a convex shape (e.g., oval or round) in the tapered regions. Bonding pad  106   f  generally has concave shape (e.g., oval or round) in the tapered region. Bonding pad  106   f  may include multiple segments, each sloped at a different angle in the tapered region. Bonding pad  106   h  generally implements a stair-stepped tapered region. Bonding pads  106   i  and  106   j  include a notch in the bond region. The bonding pad  106   j  has the overall “Y” shape. 
     The functions and structures illustrated in the diagrams of  FIGS. 1-17F  may be designed, modeled and simulated using one or more of a conventional general purpose processor, digital computer, microprocessor, microcontroller and/or similar computational machines, programmed according to the teachings of the present specification, as will be apparent to those skilled in the relevant art(s). Appropriate software, firmware, coding, routines, instructions, opcodes, microcode, and/or program modules may readily be prepared by skilled programmers based on the teachings of the present disclosure, as will also be apparent to those skilled in the relevant art(s). The software is generally executed from a medium or several media by one or more of the processors. 
     While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the scope of the invention.