Patent Publication Number: US-2006005088-A1

Title: System and method for testing artificial memory

Description:
BACKGROUND OF THE INVENTION  
      1. Field of the Invention  
      The present invention relates to a system and method for testing an artificial memory, and more specifically, to a system and method for testing a memory in a computer diagnostic process.  
      2. Description of the Related Art  
      Testing a newly manufactured computer memory is a necessary quality control procedure performed before the memory is shipped to a customer. The memory may be volatile or non-volatile, such as an SDRAM, a DDR (Double Data Rate) RAM, a Flash Memory, and so on.  
      In a conventional method of testing a memory, specialized equipment is used. The equipment detects the integrity of data during the processes of reading/writing the data from/to the memory, to determine whether the memory is operating correctly. Such testing includes random testing to memory addresses, blocks, storage areas and self-refresh.  
      The above-described conventional method of testing a memory is an exhaustive task, and takes a lot of time. In practice, when memories are mass manufactured, the yield of satisfactory memories tends to vary little. That is, most of the memories produced have satisfactory quality. The conventional method is only suitable for testing a single memory in a lab, but not for mass testing of memories by a manufacturer or supplier. Accordingly, there is a need for a system and method to simplify the procedures for testing a memory and thereby increase the efficiency of mass testing of memories.  
     SUMMARY OF THE INVENTION  
      It is therefore an objective of the present invention is to provide a system for readily testing a memory.  
      Another objective of the present invention is to provide a method for readily testing a memory.  
      In order to accomplish the above-mentioned first objective, a preferred embodiment of a system for testing a memory comprises a monitor, a driver and an executing means. The monitor comprises a command line interface for inputting of commands and parameters by users. The driver comprises: a command line editor, which is adapted to be activated before the command line interface of the monitor is used; a command translator for invoking corresponding subprograms according to the input commands and parameters; an error flag for indicating whether any error occurred during a test of the memory; and an error counter for counting the number of times any error occurred during one or more tests of the memory. The executing means is for testing the memory with reading/writing of sequence bit strings, and returning test results to the monitor via the driver.  
      In order to accomplish the above-mentioned second objective, a method for testing a memory comprises the steps of: (1) activating a command line editor of a driver; (2) inputting commands and parameters via a command line interface of a monitor; (3) invoking corresponding subprograms according to the input commands and parameters by way of a command translator of the driver; (4) executing the subprograms to thereby test the memory, by way of an executing means; and (5) returning one or more test results to the monitor via the driver.  
      Step (4) further comprises the steps of: (4-1) setting an address range and a total number of times that testing of the memory is to be performed; (4-2) filling the memory with a sequence bit string (such as 0×55AA55AA); (4-3) reading the sequence bit string from the memory, and determining whether the written and read data match each other; (4-4) setting an error flag to “1,” if the written and read data do not match; (4-5) determining whether the error flag is “1,” and increasing an error count by one and resetting the error flag to “0” if the error flag is “1;” (4-6) determining whether the number of times that the memory has been tested equals the predetermined total number of times that testing is to be performed; and (4-7) returning the count of the error counter as the test result if the two numbers in the above step are the same, or repeating steps (4-2) to step (4-6) if the two numbers in the above step are not the same.  
      The system and method of the present invention provide testing of the quality of a memory by utilizing simple reading/writing procedures. Therefore the testing is speedy and efficient.  
      Other objects, advantages and novel features of the invention will be drawn from the following detailed description with reference to the attached drawings, in which: 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       FIG. 1  is a block diagram of the system for testing a memory in accordance with the preferred embodiment of the present invention;  
       FIG. 2  is a flowchart of a preferred method for testing a memory in accordance with the present invention; and  
       FIG. 3  is a flowchart of exemplary details of one step of the method of  FIG. 2 , namely executing invoked subprograms to thereby test the memory. 
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS OF THE INVENTION  
      Hereinafter, a preferred embodiment and method of the present invention will be described. However, the scope of the present invention is not to be taken as limited to the described embodiment and method.  
       FIG. 1  is a block diagram of a system for testing a memory  40  in accordance with the preferred embodiment of the present invention. The system comprises a monitor  10 , a driver  20 , and an executing means  30 . The monitor  10  comprises a command line interface  101  for inputting commands and parameters. The driver  20  comprises a command line editor  201 , a command translator  202  for invoking subprograms according to input commands and parameters, an error flag  203  for indicating an error event when an error has occurred while testing the memory  40 , and an error counter  204  for counting the number of times an error occurs while testing the memory  40 . Users have to activate the command line editor  201  before using the command line interface  101  of the monitor  10 , in order to limit the maximum length of input command characters to  255 . The executing means  30  is for testing the memory  40  with reading/writing tests, and returning test results to the monitor  10  via the driver  20 . The executing means  30  may, for example, be a router with a MIPS (Million Instruction Per Second) CPU inside.  
       FIG. 2  is a flowchart of the preferred method for testing the memory  40  in accordance with the present invention. At step S 100 , users activate the command line editor  201  of the driver  20  before using the command line interface  101  of the monitor  10 . At step S 200 , users input commands and parameters via the monitor  10 , the parameters including an address range and a total number of times that testing of the memory  40  is to be performed. At step S 300 , the command translator  202  of the driver  20  invokes corresponding subprograms according to the input commands and parameters. At step S 400 , the executing means  30  executes the invoked subprograms to thereby test the memory  40 . At step S 500 , when the testing procedure is completed, the executing means  30  returns test results to the monitor  10  via the driver  20 .  
       FIG. 3  is a flowchart of exemplary details of step S 400  of  FIG. 2 , namely executing the invoked subprograms to thereby test the memory  40 .  
      At step S 4110 , the executing means  30  fills the memory  40  with 0×55AA55AA, and then the memory  40  is read. At step S 4120 , the executing means  30  determines whether the read data are 0×55AA55AA. If the written and read data do not match each other, at step S 4130 , the executing means  30  sets the error flag  203  to “1,” whereupon the procedure goes to step S 4210 . Otherwise, the procedure goes to step S 4210  directly.  
      At step S 4210 , the executing means  30  fills the memory  40  with 0 33  AA55AA55, and then the memory  40  is read. At step S 4220 , the executing means  30  determines whether the read data are 0×AA55AA55. If the written and read data do not match each other, at step S 4230 , the executing means  30  sets the error flag  203  to “1,” whereupon the procedure goes to step S 4310 . Otherwise, the procedure goes to step S 4310  directly.  
      At step S 4310 , the executing means  30  fills the memory  40  with 0, and then the memory  40  is read. At step S 4320 , the executing means  30  determines whether the read data/datum are/is 0. If the written and read data do not match each other, at step S 4330 , the executing means  30  sets the error flag  203  to “1,” whereupon the procedure goes to step S 4410 . Otherwise, the procedure goes to step S 4410  directly.  
      At step S 4410 , the executing means  30  fills the memory  40  with 0×FFFFFFFF, and then the memory  40  is read. At step S 4420 , the executing means  30  determines whether the read data are 0×FFFFFFFF. If the written and read data do not match each other, at step S 4430 , the executing means  30  sets the error flag  203  to “1,” whereupon the procedure goes to step S 450 . Otherwise, the procedure goes to step S 450  directly.  
      At step S 450 , the executing means  30  determines whether the error flag  203  is “1.” If the error flag  203  is “1,” at step S 460 , one or more errors have occurred during the testing. The executing means  30  increases a count of the error counter  204  by one and resets the error flag to “0,” whereupon the procedure goes to step S 470 . If the error flag  203  is “0,” no error has occurred during the testing, and the procedure goes to step S 470  directly.  
      At step S 470 , the executing means  30  determines whether the number of times that the memory  40  has been tested equals the predetermined total number of times that testing of the memory  40  is to be performed. If the two numbers are not equal, the procedure returns to step S 4110  so that testing of the memory  40  is repeated. If and when the two numbers are equal, at step S 480 , the executing means  30  ends the testing, and returns the count of the error counter  204  as the test results.  
      Although only a preferred embodiment and a preferred method of the present invention have been described in detail above, it will be apparent to those skilled in the art that various modifications are possible without departing from the inventive concepts herein. Therefore the invention is not limited to the above-described embodiment and method, but rather has a scope defined by the appended claims and allowable equivalents thereof.