Patent Publication Number: US-6343379-B1

Title: Receiver and program updating method

Description:
FIELD OF THE INVENTION 
     The present invention relates to a receiver and a program updating method, and more particularly, to a receiver for digital satellite broadcasting and a system and method for updating a control program for such a receiver. 
     BACKGROUND OF THE INVENTION 
     In digital satellite broadcasting, a television signal in digital form is transmitted using a broadcasting satellite. As shown in FIG. 1, a broadcast signal S 1  of digital satellite broadcasting system  10  is transmitted from a transmitting antenna  1 , received by a broadcasting satellite  2  and then is amplified and retransmitted as a broadcast signal S 2 . A digital broadcasting receiver  4  receives the broadcast signal S 2  through a receiving antenna  3 , demodulates and decodes the signal S 2  and then transmits the signal S 2  to a television receiver  5  as a video signal S 4 . 
     The control program in digital broadcasting receiver  4  must be updated if, e.g., a change in broadcasting services or a problem in the program (a “bug”) occur. To enable such updating, the control program has been stored in an erasable, nonvolatile memory (e.g., a flash memory or an EEPROM) and updated as required. By multiplexing the updated control program to the broadcast signal, a user also can download the updated program from this signal. 
     To update the control program, however, the old control program first must be erased and then the new control program written to, for example, a flash memory. The program for this processing, therefore, must operate independently of the control program. A characteristic of flash memory, moreover, is that, although erasing and updating data in certain memory blocks is possible, reading data from, or writing data to, some blocks while erasing other blocks is impossible. Therefore, the program for executing update processing must be present in a memory different from that storing the control program being updated. 
     To solve this problem, the two-bank updating method and the RAM (random access memory) updating method have been used. The two-bank method uses two banks of flash memory. One bank stores the control program, and the other bank receives the new control program. FIG. 2 illustrates the two-bank method. Two flash memories  6 A (bank  0 ) and  6 B (bank  1 ) each have a memory capacity V and the same structure. A control program, stored in either bank  0  or bank  1 , is executed during normal operation. In this case, it is assumed that the control program is stored in bank  0 . 
     To update this control program, a new control program is downloaded in accordance with a program for executing update processing stored in bank  0 . This new control program is written to bank  1 . The system then executes the new control program from bank  1 . When updating of the control program is again required, the program for executing update processing stored in bank  1  is executed, and the new control program is written to bank  0 . Thus, by using two identical flash memories and alternately performing write and read operations to and from these memories, the control program can be updated as required. 
     A problem with the two-bank method, however, is that one flash memory is used only during update processing. Therefore, twice the flash-memory capacity needed for normal processing is required. Moreover, since hardware for independently operating both banks of flash memory must be present, the structure is complex. 
     The RAM method uses only one flash memory. The new control program initially is downloaded into a RAM, and the system then copies this program to the flash memory. FIG. 3 illustrates this method. To perform update processing, the control program in flash memory  6  is executed to write a new control program in RAM  7 . After this write operation is completed, an update program, also stored in RAM  7 , is executed to erase the old control program in flash memory  6 . The new control program then is written from RAM  7  to flash memory  6 . 
     Although only one flash memory is required in the RAM method, the RAM requires a region V for storing the control program and a region Vp for storing the update program. The necessary capacity of RAM  7 , therefore, is large. Moreover, the contents of RAM  7  may be lost if a power outage occurs at any time beginning with the erasing of data from flash memory  6  through the writing of a new control program in flash memory  6 . If the control program is lost, the functions of digital broadcasting receiver  4  also may be lost. 
     SUMMARY OF THE INVENTION 
     An object of the present invention, therefore, is to provide a system and method for updating a receiver&#39;s control program having a simple structure and means for preventing the loss of functions due to a power outage during such updating. 
     The foregoing object and other objects of the invention are achieved by providing a receiver for a broadcast signal with an erasable, nonvolatile memory as a first storage means and a volatile memory as a second storage means. The first storage means stores the control program. The receiver also includes means for obtaining from the broadcast signal an updated version of the control program and a second program for loading and storing the updated version of the control program. The receiver has a processing unit for processing the control program, the updated version of the control program and the second program. The processing unit is operative to process the control program from the first storage means to download from the broadcast signal the second program and store this program in the second storage means and to process the second program from the second storage means to download the updated version of the control program from the broadcast signal and replace in the first storage means the control program with this updated version. 
     The nature, principle and utility of the invention will be better understood from the following detailed description, when read in conjunction with the accompanying drawings. Like parts are designated by like reference numerals or characters. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram of a digital broadcasting system. 
     FIG. 2 is a schematic diagram of the two-bank method. 
     FIG. 3 is a schematic diagram of the RAM method. 
     FIG. 4 is a block diagram of a digital-broadcasting receiver constructed in accordance with the present invention. 
     FIG. 5 is a schematic diagram of a flash memory and a RAM in accordance with the present invention. 
     FIG. 6 is a flowchart of the principle processing steps of a CPU programmed in accordance with the present invention. 
     FIG. 7 is a flowchart of the processing steps for downloading menu processing. 
     FIG. 8 is a flowchart of the processing steps for loader update processing. 
     FIG. 9 is a flowchart of the processing steps for body update processing. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Referring to FIG. 4, reference numeral  20  denotes a digital broadcasting receiver having a demodulation section  21 , a cipher cancel section  22 , a separation section  23 , a decoding section  24 , a CPU (central processing unit)  25  (e.g., a microprocessor), a font ROM (read only memory)  26 , a flash memory  27 , a RAM (random access memory)  28  and an operation input section  29 . These components communicate among each other through bus  30 . CPU  25  controls all of the functions of digital broadcasting receiver  20 . 
     During normal operations, demodulation section  21  receives and demodulates digital broadcast signal S 20 . Signal S 20  can be a television signal transmitted from a broadcasting satellite (not illustrated) in a predetermined format. This signal is received by an antenna (also not illustrated) connected to demodulation section  21 . Demodulation section  21  demodulates signal S 20  and transmits demodulated signal S 21  to cipher cancel section  22 . Cipher cancel section  22  cancels the cipher in signal S 21 , in accordance with a predetermined method, and transmits the resulting signal S 22  to the separation section  23 . The separation section  23  selects one channel, from among a plurality of multiplexed channels constituting signal S 22 , and transmits the video and audio data of this selected channel to decoding section  24  as encoded video data S 23 A and encoded audio data S 23 B. Decoding section  24  decodes the encoded video data S 23 A and the encoded audio data S 23 B, in accordance with, for example, the MPEG 2  and MPEG standards, and transmits the resulting signals as video signal S 24 A and audio signal S 24 B. 
     During operation of digital broadcasting receiver  20 , CPU  25  executes a control program P stored in flash memory  27 . This memory is illustrated in FIG.  5 . Control program P comprises a body program Pm for processing normal receiving operations and a loader program Pr for downloading body program Pm. Because the loader program&#39;s function is only to download and store the body program, the memory size Vr for the loader program is less than the memory size Vm for the body program. 
     A flowchart of the principal processing steps of CPU  25  is shown in FIG.  6 . CPU  25  starts processing in step SP 1  and, in step SP 2 , decides whether body program Pm is valid (e.g., is the latest version of the program). This decision is based upon the status of a body flag stored in flash memory  27 . The processing of steps SP 1  and SP 2  is performed by executing a start program Pb written in an empty region of font ROM  26  (FIG.  4 ). Because the body flag is normally set to “valid,” an affirmative result normally is obtained in step SP 2 , and the processing of step SP 3  is started. The processing of step SP 3 , and that of the subsequent steps illustrated in FIG. 6, are performed by executing the body program Pm stored in flash memory  27 . 
     In step SP 3 , CPU  25  decides, based upon the status of a loader flag stored in flash memory  27 , whether loader program Pr is valid. Because the loader flag normally is set to “valid,” an affirmative result normally is obtained in step SP 3 , and the processing of step SP 4  is started. 
     In step SP 4 , CPU  25  decides whether loader program Pr is an immediately-after-being-changed state, that is, in a state immediately after being downloaded, based upon the status of an immediately-after-loader-change flag stored in flash memory  27 . Because the immediately-after-loader-change flag normally is set to “invalid,” a negative result normally is obtained in step SP 4 , and the processing in step SP 5  is started. In step SP 5 , normal broadcast receiving operations are performed. 
     In step SP 6 , CPU  25  monitors, during normal broadcast receiving operations, for the presence or absence of a user&#39;s downloading command signal S 29  from the operation input section  29  (FIG.  4 ). This signal is generated in response to a user&#39;s command from an input controller (not shown) to download a new control program. CPU  25  also monitors for execution of a downloading menu displayed on a television receiver (not shown) receiving signals from digital broadcasting receiver  20 . 
     If the downloading command signal S 29  is not detected in step SP 6 , step SP 5  is reexecuted and normal receiving operations are continued. If the downloading command signal S 29  is detected in step SP 6 , however, the processing in step SP 9  is started, and downloading menu processing, as shown in FIG. 7, is executed. 
     Referring to FIG. 7, CPU  25  starts processing in step SP 21  and decides, in step SP 22 , whether body program Pm is multiplexed to broadcast signal S 20 . This decision is based upon the status of the multiplexed information S 32  received from separation section  23  (FIG.  4 ). A negative result means that the body program Pm is not multiplexed to the broadcast signal S 20 . In such event, the processing in step SP 30  is started to display a message on a display section (not illustrated) of digital broadcasting receiver  20  (FIG. 4) that no data exists. The processing in step SP 31  then is started to stop downloading menu processing, and normal operations are restarted in step SP 5  (FIG.  6 ). 
     If an affirmative result is obtained in step SP 22  of FIG. 7, however, such result means that the body program Pm is multiplexed to the broadcast signal S 20 . Therefore, the processing in step SP 23  is started. In step SP 23 , CPU  25  decides, based upon the status of the immediately-after-loader-change flag stored in flash memory  27 , whether the loader program Pr is in an immediately-after-being-changed state, that is, in a state immediately after being downloaded. Because the immediately-after-loader-change flag normally is set to “invalid,” a negative result normally is obtained in step SP 23 , and the processing in step SP 24  is started. 
     In step SP 24 , CPU  25  again monitors for the presence or absence of a user&#39;s downloading command signal. If CPU  25  determines that the user has not executed such a command signal, a negative result is obtained, and step SP 31  is started. The normal operations of step SP 5 , shown in FIG. 6, therefore, are restarted. 
     If an affirmative result is obtained in step SP 24  of FIG. 7, however, the processing in step SP 25  is started. In step SP 25 , CPU  25  determines whether the loader program Pr is the latest version of the loader program. If an affirmative result is obtained in step SP 25 , such result means that the version of the loader program Pr currently written in flash memory  27  is the latest version of this program. In such case, downloading of the loader program Pr is unnecessary. The processing in step SP 26 , therefore, is started. 
     If a negative result is obtained in step SP 25 , however, such result means that the version of the loader program Pr currently written in flash memory  27  is not the latest version of this program. The processing in step SP 32 , therefore, is started, and CPU  25  executes the loader update processing shown in FIG.  8 . This processing updates the loader program Pr written in flash memory  27  to the latest program. 
     Referring to FIG. 8, CPU  25  starts processing in step SP 50  and, in step SP 51 , downloads the new loader program. CPU  25  writes the new loader program Pr in RAM  28 . This program is separated from the multiplexed signal S 22  by separation section  23  (FIG.  4 ). In step SP 52 , CPU  25  copies to RAM  28  a loader updating routine Rw included in body program Pm stored in flash memory  27 . Subsequent processing of the loader updating routine Rw is from RAM  28 . 
     In step SP 53 , CPU  25  processes the loader updating routine Rw from RAM  28  to erase the old loader program Pr written in flash memory  27  and copy the new loader program Pr written in RAM  28  to flash memory  27 . In step SP 54 , CPU  25  changes the loader flag stored in flash memory  27  from “invalid” to “valid” and the immediately-after-loader-change flag stored in flash memory  27  from “invalid” to “valid.” In step SP 55 , CPU  25  resets the digital broadcasting receiver  20  to continue main processing (FIG.  6 ). 
     Upon the resumption of main processing, the loader flag in flash memory  27  and the immediately-after-loader-change flag in flash memory  27  now are set to “valid.” After performing the processing of steps SP 1 , SP 2 , SP 3  and SP 4 , therefore, the processing of step SP 9  is performed. This processing results in downloading menu processing, shown in FIG. 7, being executed. In this case, however, the immediately-after-loader-change flag for the loader program Pr is set to “valid.” If the body program Pm is multiplexed to the broadcast signal S 20 , therefore, the processing in step SP 26  is started. 
     In step SP 26 , CPU  25  copies a flag-change routine Rf included in body program Pm stored in flash memory  27  to RAM  28 . Subsequent processing of the flag-change routine Rf is from RAM  28 . The processing of this routine causes the body flag of the body program Pm to be set to “invalid” in step SP 27 . The digital broadcasting receiver  20  then is reset in step SP 28 , and the processing of FIG. 7 is complete. 
     CPU  25  then performs processing again in accordance with the flowchart of FIG.  6 . In this case, however, because the body flag of the body program Pm is set to “invalid,” the processing in step SP 7  is started, and body update processing is executed (FIG.  9 ). 
     As shown in FIG. 9, CPU  25  starts processing in step SP 60  and, in step SP 61 , copies the loader program Pr in flash memory  27  to RAM  28 . Subsequent processing of the loader program Pr is from RAM  28 . The execution of loader program Pr causes CPU  25 , in step SP 62 , to erase the old body program Pm in flash memory  27  and, in step SP 63 , to download the new body program Pm, separated from the multiplexed signal S 22  by separation section  23 , to flash memory  27 . 
     In step SP 64 , CPU  25  determines whether all of the data comprising the new body program Pm are downloaded. If a negative result is obtained, such result means that the entire body program was incompletely or incorrectly downloaded. The processing in step SP 63  is repeated, therefore, to again download the new body program Pm. If an affirmative result is obtained, however, such result means that the entire new body program Pm was correctly downloaded. Thus, the processing in step SP 65  is started. 
     In step SP 65 , CPU  25  changes the body flag stored in flash memory  27  from “invalid” to “valid” and changes the immediately-after-loader-change flag stored in flash memory  27  from “valid” to “invalid.” In step SP 66 , CPU  25  completes the processing of FIG. 8, and digital broadcasting receiver  20  is reset. The body program Pm in flash memory  27 , therefore, is updated, and update processing of control program P is complete. 
     CPU  25  thereafter performs processing again in accordance with the flowchart of FIG.  6 . In this case, however, the body flag in flash memory  27  and the loader flag in flash memory  27  are set to “valid,” and the immediately-after-loader-change flag is set to “invalid.” The processing in step SP 5 , therefore, is resumed, and normal broadcast receiving operations are performed. 
     As described above, to update control program P of digital broadcasting receiver  20 , the loader program Pr is first downloaded and written to RAM  28 . Thereafter, the loader program Pr is copied from RAM  28  to flash memory  27 . 
     To update body program Pm, the new loader program Pr in flash memory  27  is copied back to RAM  28 , and the new loader program Pr is executed from RAM  28 . The updated body program Pm is downloaded and written to flash memory  27 . 
     If loader update processing is interrupted due to a power outage or the like, the loader program Pr in RAM  28  or flash memory  27  may be lost or corrupted. However, the start program Pb in font ROM  26  and the body program Pm in flash memory  27  remain intact. Under such circumstances, the loader flag stored in flash memory  27  is set to “invalid,” and a negative result is obtained in step SP 3  (FIG. 6) when digital broadcasting receiver  20  is restarted. Loader update processing, therefore, is reexecuted to correctly download the new loader program Pr. 
     Similarly, if body update processing is interrupted due to a power outage or the like, the body program Pm in flash memory  27  may be lost or corrupted. However, the start program Pb on font ROM and the loader program Pr in flash memory  27  remain intact. Under these circumstances, the body flag stored in flash memory  27  is set to “invalid,” and a negative result is obtained in step SP 2  (FIG. 6) when digital broadcasting receiver  20  is restarted. Body update processing, therefore, is reexecuted to correctly download the new body program Pm. 
     As described above, control program P of digital broadcasting receiver  20  is divided into body program Pm for processing normal receiving operations and loader program Pr for downloading body program Pm. To update control program P, loader program Pr is first downloaded into RAM  28 . The loader program also is executed from RAM  28  to download the body program Pm. If update processing of the loader program or body program is interrupted due to a power outage or the like, neither the loader program nor the body program is lost. Although the above embodiments are described in connection with a receiver for digital satellite broadcasting, the present invention is not restricted to such receivers. The present invention can be used in receivers used for other applications (e.g., modems, cellular telephones, portable computers, etc.) or for other types of broadcasting, including digital wired broadcasting and digital ground-wave broadcasting. 
     Also, although the start program Pb in the above embodiments is written in an empty region of a font ROM, the present invention is not restricted to such a scheme. The start program Pb could be written in other storage devices or locations. Furthermore, although the above embodiments store the body flag, loader flag and immediately-after-loader-change flag in a flash memory, these flags could be stored in other types of memories, for example, EEPROMs, provided such memories are non-volatile. The control program P also could be written in an erasable, non-volatile memory device other than a flash memory (e.g., an EEPROM), and the loader program Pr could be written in a memory device other than a RAM. Also, a volatile memory with a backup power supply (e.g., a battery) could be employed in place of a non-volatile memory. 
     As described above, the present invention enables updating of a control program for a receiver, particularly a broadcasting receiver, without loss of all or part of the control program as a result of a power outage. A first storage means comprising an erasable, non-volatile memory and a second storage means comprising a volatile memory are employed. The control program is stored in the first storage means and is executed to obtain a second program for performing processing to obtain an updated version of the control program. The second program is downloaded to the second storage means, copied from the second storage means to the first storage means to preserve it, copied again from the first storage means to the second storage means and then executed from the second storage means to obtain the updated control program. The control program is written into the first storage means. 
     While the invention has been described in connection with preferred embodiments, it will be obvious to those skilled in the art that various changes or modifications may be employed and that such changes or modifications are within the spirit and scope of the invention as defined by the following claims.