Patent Publication Number: US-10784859-B2

Title: Transformer based gate drive circuit

Description:
RELATED APPLICATIONS 
     This is a divisional application of U.S. application Ser. No. 15/413,166, filed Jan. 23, 2017, entitled “Transformer Based Gate Drive Circuit,” which is incorporated by reference in its entirety herein. 
    
    
     GOVERNMENT LICENSE RIGHTS 
     This invention was made with government support under Contract No. N00019-13-C-0128 awarded by the Department of Defense. The government has certain rights in the invention. 
    
    
     BACKGROUND 
     Modern power electronics often make use of metal oxide semiconductor field effect transistors (MOSFETs) and insulated gate bipolar transistors (IGBTs) in many applications. Power converters are comprised of a power circuit or topology consisting of power switching devices such as MOSFETs and IGBTs, control circuits that regulate the power conversion operation and gate drive circuits that serve as an interface between the two. Gate drive circuits are required to switch the MOSFETs and IGBT devices ON and OFF to control and condition the power conversion function. Gate drive circuits serve as the interface between the control circuitry and the power circuitry by conditioning and converting the Pulse Width Modulation (PWM) control signal to regulate the power conversion operation as required by the characteristics of the power switching device used in the power circuit. 
     All switching power converter topologies require one or more gate drive circuits depending on the number, type and electrical connection of the power switching devices used therein. MOSFET and IGBT type devices are controlled by applying a voltage between a control terminal, traditionally referred to as the “gate” and a reference terminal, traditionally referred to as the “source” or “emitter” respectively. A positive voltage at the gate with respect to source or emitter, would switch an N-channel MOSFET or IGBT ON, whereas a negative or zero voltage at the gate with respect to the source or emitter would switch the device OFF. 
     Gate drive circuits with magnetic transformers are commonly used to provide galvanic isolation between the control circuit and the power circuit. Transformer isolated circuits provide a robust, high speed, low loss and low cost implementation of the gate drive circuit for most switching devices. Transformers require a balanced volt-time product in the applied drive signal to prevent saturation. As a result, they are generally more readily applicable to power switching devices that can support a symmetric, bipolar gate drive voltage to control their ON/OFF behavior. Silicon based MOSFETs or IGBTs are able to support such a symmetric, bipolar drive voltage. 
     However, next generation devices such as Silicon Carbide (SiC) MOSFETs do not support a symmetric gate drive voltage. The SiC MOSFET, for example, requires, at its gate terminal, 20V to be switched ON and −5V to be switched OFF. Transformer isolated circuits used in combination with DC blocking capacitors can be used with limited success but cannot generate controlled voltage levels for turn-ON and turn-OFF independent of operating duty cycle without compromising volt-time product of the transformer. To overcome this limitation, implementations of gate drive circuits using auxiliary voltage sources to generate the turn-ON and turn-OFF voltage levels, which are high in component count, cost and low in efficiency are used. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Features and advantages of the invention will be apparent from the detailed description which follows, taken in conjunction with the accompanying drawings, which together illustrate, by way of example, features of the invention; and, wherein: 
         FIG. 1  is block diagram of a gate drive circuit in accordance with an example of the present disclosure. 
         FIG. 2A  is an example schematic illustration of a transformer based gate drive circuit with additional secondary windings in accordance with an example of the present disclosure. 
         FIG. 2B  is an example illustration of various waveforms for the transformer based gate drive circuit of  FIG. 2A . 
         FIG. 3A  is an example schematic illustration of a transformer based gate drive circuit with charge pumps in accordance with an example of the present disclosure. 
         FIG. 3B  is an example illustration of various waveforms for the transformer based gate drive circuit of  FIG. 3A . 
         FIG. 4A  is an additional example schematic illustration of a transformer based gate drive circuit with charge pumps in accordance with an example of the present disclosure. 
         FIG. 4B  is a schematic illustration of various waveforms for the transformer based gate drive circuit of  FIG. 4A . 
     
    
    
     Reference will now be made to the exemplary embodiments illustrated, and specific language will be used herein to describe the same. It will nevertheless be understood that no limitation of the scope of the invention is thereby intended. 
     DETAILED DESCRIPTION 
     As used herein, the term “substantially” refers to the complete or nearly complete extent or degree of an action, characteristic, property, state, structure, item, or result. For example, an object that is “substantially” enclosed would mean that the object is either completely enclosed or nearly completely enclosed. The exact allowable degree of deviation from absolute completeness may in some cases depend on the specific context. However, generally speaking the nearness of completion will be so as to have the same overall result as if absolute and total completion were obtained. The use of “substantially” is equally applicable when used in a negative connotation to refer to the complete or near complete lack of an action, characteristic, property, state, structure, item, or result. 
     As used herein, “adjacent” refers to the proximity of two structures or elements. Particularly, elements that are identified as being “adjacent” may be either be abutting or connected. Such elements may also be near or close to each other without necessarily contacting each other. The exact degree of proximity may in some cases depend on the specific context. 
     An initial overview of technology embodiments is provided below and then specific technology embodiments are described in further detail later. This initial summary is intended to aid readers in understanding the technology more quickly but is not intended to identify key features or essential features of the technology nor is it intended to limit the scope of the claimed subject matter. 
     As mentioned, power converters have been widely used to provide regulated power supplies. In one aspect, power switching devices used in power converter topologies, may either use a transformer based gate drive circuit, isolated power supplies, and/or level shifters to create the necessary drive voltages to turn the power switching devices on and off. However, gate drive circuits, such as floating gate drive circuits, using isolated power supplies or level shifters are high in component-count, limited in their frequency of operation and are not as efficient as a transformer based gate drive circuit. 
     In one aspect, in order to achieve high-speed speed gate drive circuitry, switch frequencies (e.g., 200-250 kilohertz) and eliminate isolated bias power supplies, the present technology provides for a transformer based gate drive circuit. A transformer based gate drive circuit can be compact, robust, and enable high switching frequency. Transformers are inherently symmetrical devices driven by equal voltage-time product in both the positive and the negative directions. As such, a transformer based gate drive circuit cannot provide asymmetric drive voltages due to the need to maintain balanced volt-time product in the transformer. Hence, a shortcoming of this scheme is that the same magnitude of the voltage-time product is needed to drive the gates in the negative direction as well as the positive direction. 
     Accordingly, the present technology provides for an enhanced transformer based gate drive circuit to generate asymmetric gate drive voltages to turn-on and turn-off a gate switching device (e.g., an electrical switch), such as MOSFETs and IGBTs, independent of duty cycle without compromising the voltage-time product of the transformer The transformer based gate drive circuit can be efficient, compact, and robust and can require minimal peripheral circuitry to meet switching requirements of the power device used. In one aspect, the transformer based gate drive circuit can comprise a transformer having a primary winding and one or more secondary windings to generate the turn-on and turn-off voltages to drive the gate of the switching device. Charge pumps can be coupled to the one or more tapped secondary windings of the transformer to generate asymmetric gate drive voltages to turn-on and turn-off gate switching devices (e.g., MOSFETs and IGBTs). Thus, any need for auxiliary bias circuits for the turn-on and turn-off voltage levels can be eliminated. In an additional aspect, the transformer based gate drive circuit can provide a primary winding and a single secondary winding and two charge pumps. 
     The present technology provides various embodiments of transformer based gate drive circuits for a power switching device. In one aspect, the various embodiments of gate drive circuits achieve galvanic isolation using one or more transformer windings and generate asymmetric turn-on and turn-off voltage levels at the gate of the switching device without the need for external isolated bias voltage sources. The switching device may be a metal oxide semiconductor field effect transistors (MOSFET) and/or an insulated gate bipolar transistors (IGBTs). As used herein, each of the representative switching devices may be either the MOSFET and/or an insulated gate bipolar transistors (IGBTs) and discussions herein pertaining the MOSFET may also apply to IGBT and visa versa. 
     In one aspect, gate drive circuit for generating asymmetric drive voltages is provided. The gate drive circuit comprises a gate drive transformer that may include a primary winding responsive to a pulse width modulated (PWM) input signal to generate a bipolar signal having a positive and negative voltage levels; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. The gate drive circuit may include a first charge pump electrically connected to the secondary winding responsive to the PWM output signal to generate a level-shifted PWM output signal. The gate drive circuit may include a second charge pump electrically connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level-shifted PWM output signal. The gate drive circuit may include a MOSFET transistor having a source, a drain, and a gate, wherein the MOSFET transistor is electrically connected to the first charge pump and the second charge pump, wherein the level-shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the MOSFET. The aspect of gate drive circuit presented can be used in a variety of power converter topologies including but not limited to DC/DC, DC/AC and AC/DC converters. The functional characteristics of the circuit are valid under fixed or variable duty cycle conditions. For example, the provided circuit can be used in isolated Zero Voltage Switching (ZVS) Phase Shifted Full Bridge type DC/DC converters where the operating duty cycle of the switching devices is always set to 50%. It is equally applicable to isolated and non-isolated DC/DC converters such as Flyback, buck and boost converters where the switch duty cycle can be different from 50%. It is also applicable in DC/AC inverters or AC/DC rectifiers where the duty cycle varies as a function of the waveshape of the output or the input voltage waveform. Additional embodiments and variations of the gate driver circuit are further described herein. 
       FIG. 1  is block diagram of a gate drive circuit in accordance with an example of the present disclosure. More specifically,  FIG. 1  depicts A) a schematic of a gate drive circuit and B) a waveform of the gate drive circuit. The power device to be switched on and off is designated as Q DUT . V ON  represents the voltage required at the gate to turn the device on while −V OFF  is the turn-off voltage. v dr  represents the input to the gate drive circuit and v gs  may be the output voltage of the gate drive circuit and the input voltage applied to the gate of Q DUT  for the required turn-on and turn-off levels. In one aspect, the specifications of Q DUT  may indicate the voltage level required for turn-on is V ON  and the voltage required for turn-off is −V OFF . In one aspect, the gate drive circuits as described herein may use a combination of transformer windings with varying turns-ratios and charge pumps to synthesize the turn-on and turn-off voltage levels at the gate of the switching device. 
     Turning now to  FIG. 2A , an example schematic illustration of a transformer based gate drive circuit with additional secondary windings is depicted.  FIG. 2B  is an example illustration of various waveforms for the transformer based gate drive circuit of  FIG. 2A . The transformer based gate drive circuit  200  can include a gate drive transformer  201  comprising a primary winding  204  responsive to a pulse width modulated (PWM) signal  202  (which may be an input signal). In one aspect, the PWM input signal is a bipolar square wave, such as, for example, a symmetric bipolar square wave voltage. The gate drive transformer  201  can include a first secondary winding  208  and a second secondary winding  206  responsive to a PWM signal  202  (which has now become a PWM output signal) of the primary winding  204 . The first secondary winding  208  can include a first turn ratio different than a second turn ratio of the second secondary winding  206 . The first secondary winding  208  can produce a first bias voltage (V ON ) and the second secondary winding  206  can produce a second bias voltage (V OFF ). In one aspect, a capacitor  210  and a diode  230  can be electrically connected to the first secondary winding  208 . The capacitor  210  and diode  230  can be in series and/or in parallel to the first secondary winding  208  (N s1 ). In one aspect, a capacitor  212  and a diode  232  can be electrically connected to the second secondary winding  206  (N s2 ). 
     In one aspect, the gate drive transformer  201  can include additional windings  214 ,  216 . The first additional winding  216  can be electrically coupled to the first secondary winding  208 . The second additional winding  214  can be electrically coupled to the second secondary winding  206 . The first additional winding  216  can be responsive to the first bias voltage (V ON ). The second additional winding  214  can be responsive to the second bias voltage (V OFF ) or (−V OFF ). In one aspect, the first bias voltage (V ON ) produced from the first additional winding  216  can be a turn ON voltage, such as, for example a turn ON voltage that is at least twenty (20) volts. In an additional aspect, the second bias voltage (V OFF ) produced from the second additional winding  214  can be a turn OFF voltage, such as, for example a turn OFF voltage that is at negative five (−5) volts. 
     A first drive MOSFET transistor  220  can be electrically coupled to the first additional winding  216  and responsive to the first bias voltage (V ON ). A second drive MOSFET transistor  222  can be electrically coupled to the second additional winding  214  and responsive to the second bias voltage (V OFF ). Also, the first additional winding  216  may be electrically connected to both resistors R 13  and R 23 . The second additional winding  214  may be electrically connected to both resistors R 14  and R 24 . 
     In one aspect, the transformer based gate drive circuit  200  can also include a switching device  224  (e.g., a MOSFET transistor  224  or a IGBT, hereinafter “MOSFET transistor  224 ” for illustrative convenience) that can be electrically coupled to first drive MOSFET transistor  220  and the second drive MOSFET transistor  222 . In one aspect, the first bias voltage (V ON ) from the first drive MOSFET transistor  220  can drive the MOSFET transistor  224  to turn it ON. In one aspect, the second bias voltage V OFF  from the second drive MOSFET transistor  222  can drive the MOSFET transistor  224  to turn it OFF. Furthermore, the MOSFET  224  can be a silicon carbide MOSFET. MOSFET transistor  224  may be electrically connected to both resistors R g  and R gs . 
     The power device required to be switched ON and OFF is Q DUT . Per the specifications of Q DUT , the voltage level required for turn-on is V ON  and the voltage required for turn-off is −V OFF  (see  FIG. 1 ). More specifically, as depicted in  FIGS. 2A and 2B , the input to the gate drive circuit may be represented by the voltage source v. As shown in  FIG. 2B , v dr  may be a symmetric bipolar voltage applied to the primary winding N p ,  204  of the isolation transformer, T 1 . Transformer T 1  may consists of 5 windings ( 204 ,  206 ,  208 ,  214 , and  216 ), 1 primary winding with N p    204  turns and 4 secondary windings with turns N s1 , N s2 , N s3  and N s4  ( 206 ,  208 ,  214 , and  216 ) as shown in  FIG. 2A . Diode D 1    230 , capacitor C 1    210 , and diode D 2    232 , and capacitor C 2    212  are charge pumps that rectify the secondary voltages v s1  and v s2  and generate the turn-on and turn-off bias voltages V ON  and V OFF  respectively. Q 1    220  and Q 4    222  are MOSFETs or functionally equivalent devices that apply voltages V ON  and V OFF  to the gate terminal of Q DUT  to respectively turn-on and turn-off the device. 
     Voltages v s1  and v s2  generated across the secondary windings of the transformer T 1  are rectified by diodes D 1    230  and D 2    232  respectively, which are given by Equation 1: 
     
       
         
           
             
               
                 
                   
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     Charge pump capacitors C 1   210  and C 2   212  charge to the peaks of the square wave voltages v s1  and v s2 , respectively, to generate voltages V ON  and V OFF . V ON  is the voltage level required to turn Q DUT  on and V OFF  is that required to turn Q DUT  off. 
     The turn-on and turn-off voltages (with the various wave forms illustrating positive (+) and negative (−) voltages in  FIG. 2B ) are applied across the gate and source terminals of Q DUT  via the MOSFETs Q 3    220  and Q 4    222 . Voltages V 3  and v 4  are generated from v dr  according to Equation 2. 
     
       
         
           
             
               
                 
                   
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     Secondary windings N s3    216  and N s4    214  are wound in opposing directions to each other such that voltage v 3  is in phase with v dr  while v 4  is 180° out of phase with v dr  As a result, MOSFETs Q 3    220  and Q 4    222 , which have voltages v 3  and v 4  applied to their gates are switched complementary to each other. MOSFET Q 3    220  is turned on to apply V ON  to the gate of Q DUT  while MOSFET Q 4    222  is turned on to apply −V OFF  to the gate of Q DUT . The voltage v gs , applied to the gate of the Q DUT    224  is in phase with v dr . When v dr  is asserted to turn on Q DUT  v gs  is equal to V ON  and when v dr  is de-asserted to turn off Q DUT  v gs  is equal to −V OFF . It is noted that no specific order is required in the methods disclosed herein, though generally in some embodiments, method steps can be carried out sequentially. 
       FIG. 3A  is an example schematic illustration of a transformer based gate drive circuit  300  with charge pumps for generating asymmetric drive voltages.  FIG. 3B  is an example illustration of various waveforms  350  for the transformer based gate drive circuit of  FIG. 3A . 
     In one aspect, transformer based gate drive circuit  300  can include at least one gate drive transformer  301 . The gate drive transformer  301  can include a primary winding  304  (N p ) responsive to a pulse width modulated (PWM) signal  302  (e.g., voltage source v dr ) to generate a bipolar signal having a positive bias voltage (e.g., first bias voltage (V ON )) and a negative bias voltage (e.g., second bias voltage (V OFF )). The PWM signal  302  can be a symmetric bipolar square wave voltage. The positive bias voltage (e.g., first bias voltage V ON )) and the negative bias voltage (e.g., second bias voltage V OFF ) can have a voltage range from positive thirteen (13) volts to negative thirteen (−13) volts. 
     The gate drive transformer  301  can also include a secondary winding  316  N s  responsive to the bipolar signal to generate a PWM output signal. The PWM output signal can include the positive bias voltage and the negative bias voltage. 
     In one aspect, the transformer based gate drive circuit  300  can include a first charge pump electrically connected to the secondary winding  316  and responsive to the PWM output signal to generate a level shifted PWM output signal (e.g., an increased PWM output signal). The first charge pump can include capacitor (C 1 )  306  and diode (D 1 ) (D 1 )  310 . The transformer based gate drive circuit  300  can also include a second charge pump electrically connected to the secondary winding  316  to generate a readjusted PWM output signal by decreasing at least a portion of the increased PWM output signal. The second charge pump can include capacitor C 2    308  and diode D z  (D z )  312 , which can be a zener diode. The diode D z    312  may be electrically connected to resistor R z . The level shifted PWM output signal and the readjusted PWM output signal can be bipolar square wave voltages. The level shifted PWM output signal can have a voltage range from positive twenty six (26) volts to zero (0) volts. The readjusted PWM output signal can have a voltage range from positive twenty (20) volts to negative six (−6) volts. 
     The transformer based gate drive circuit  300  can also include first bipolar junction transistor (BJT) Q 3    326  electrically connected to the first charge pump (collectively capacitor C 1    306  and diode D 1    310 ). The transformer based gate drive circuit  300  can also include a second BJT Q 4    328  that can be electrically connected to the second charge pump (collectively diode D 2    314 , capacitor C 2    308 , zener diode D z    312 ). In one aspect, the zener diode D Z    312  can control an amount of the level shifted PWM output signal to be decreased in order to generate the readjusted PWM output signal. 
     The first BJT Q 3    326  and the second BJT Q  328  can also be electrically connected to a gate switching device  324  (e.g., a gate MOSFET transistor or a IGBT, hereinafter “gate MOSFET transistor  324 ” for illustrative and descriptive convenience). The first BJT Q 3    326  and the second BJT Q 4    328  can each include a collector and a base. The collector of the first BJT Q 3  can be connected to a base of the first BJT using a first resistor R 3    324  connected to the first charge pump (collectively capacitor C 1    306  and diode D 1    310 ). A collector of the second BJT Q 4    328  can be connected to a base of the second BJT Q 4    328  using a second resistor (R 4 )(R 4 )  320  connected to the second charge pump (collectively diode D 2    314 , capacitor C 2    308 , zener diode D z    312 ). 
     The gate MOSFET transistor  334  can have a source, a drain, and a gate. In one aspect, the first BJT Q 3    326  can drive the level shifted PWM output signal into a gate of the MOSFET Q DU    334 . The second BJT Q 4    328  can also be electrically connected to the MOSFET Q DU    334 . The second BJT Q 4    328  can drive the readjusted PWM output signal into the gate of the MOSFET Q DU    334 . The MOSFET transistor Q DUT    334  can have a source, a drain, and a gate. The MOSFET transistor Q DUT    334  may also be connected to resistor R g    330  and resistor R gs    332 . 
     The level shifted (e.g., increased) PWM output signal driven from the first BJT Q 3    326  to the gate MOSFET Q DUT    334  can establish an ON condition. The readjusted PWM output signal driven from the second BJT Q 4    328  to the MOSFET Q DUT    334  can establish an OFF condition of the MOSFET Q DUT    334 . The MOSFET Q DUT    334  can be a silicon carbide MOSFET. 
     More specifically, the PWM input signal  302  to the gate drive circuit  300  can be represented by the voltage source v dr . As shown in  FIG. 3B , voltage source v dr  may be a symmetric bipolar voltage applied to the primary winding N p  of the isolation transformer, T 2 . Transformer T 2  consists of 2 windings ( 304 ,  316 ), 1 primary winding  304  with N p  turns and one secondary winding  316  with N s  turns as shown in  FIG. 3A . A charge pump formed by diode D 1    310  and capacitor C 1    306  rectifies the secondary voltage and generates the turn-on voltage V ON  (with the various wave forms illustrating positive (+) and negative (−) voltages in  FIG. 3B ). The turn-off voltage V OFF  is generated by the charge pump diode D 2    314 , capacitor C 2    308 , zener diode D z    312 . The secondary voltage V s  on the negative half cycle may reduced by the zener voltage V z  to generate the turn-off voltage (V OFF ) across capacitor C 2 . BJT Q 3    226 , diode D 3    327 , resistor R 3    324  and BJT Q 4    328 , diode D 4    322 , and resistor R 4  form a complementary source follower to drive the required current into the gate of Q DUT . Neglecting diode forward voltage drops, the voltage v, applied to the gate of Q DUT  (e.g., MOSFET  334 ) has the required turn-on and turn-off levels. 
       FIG. 4A  is an additional example schematic illustration of a transformer based gate drive circuit  400  with charge pumps for generating asymmetric drive voltages.  FIG. 4B  is an example illustration of various waveforms  450  for the transformer based gate drive circuit of  FIG. 4A . 
     The transformer based gate drive circuit  400  can include gate drive transformer  401  that can include a primary winding (N p )  406  responsive to a pulse width module (PWM) signal  402  (e.g., voltage source v dr  to generate a bipolar signal having a positive bias voltage and a negative bias voltage. The positive bias voltage can be asymmetric to the negative bias voltage. The positive bias voltage and the negative bias voltage can have a voltage range from positive thirteen (13) volts to negative thirteen (−13) volts. The transformer based gate drive circuit  400  can comprise a single secondary winding N s    408  responsive to the bipolar signal to generate a PWM output signal. The PWM signal (e.g., PWM output signal) can include the positive bias voltage and the negative bias voltage 
     In one aspect, the transformer based gate drive circuit  400  can include a first charge pump electrically connected to the secondary winding  408  and responsive to the PWM output signal to generate a level shifted PWM output signal (e.g., an increased PWM output signal). The first charge pump can include capacitor C 1    404  and diode D 1    410 . In one aspect, the capacitor C 1    404  and diode D 1    410  can be in series and/or in parallel to the secondary winding  408 . 
     The transformer based gate drive circuit  400  can include a first bipolar junction transistor (BJT)  418  (e.g. Q 3 ) and a second BJT  420  (e.g., Q 4 ) electrically connected to the first charge pump (collectively the capacitor C 1    404  and diode D 1    410 ) to drive the level shifted PWM output signal. The first BJT Q 3    418  and the second BJT Q 4    420  can each include a collector and a base. The collector of the first BJT Q 3    418  can be connected to a base of the first BJT  418  using a first resistor R 3    416  that can be connected to the first charge pump (collectively capacitor C 1    404  and diode D 1    410 ). A collector of the second BJT Q 4    420  can be connected to a base of the second BJT Q 4    420  using a second resistor R 4    414  that is connected to the first charge pump (collectively capacitor C 1  (C 1 )  404  and diode D 1  (D 1 )  410 ). A diode can be substituted for BJT Q 3    418  and resistor R 3    416  by connecting the anode to the first charge pump (collectively capacitor C 1    404  and diode D 1    410 ) and the cathode to the emitter of BJT Q 4    420 . This can result in reducing the physical size of the circuit. The first BJT Q 3    418  and the second BJT Q 4    420  can also be electrically connected to a second charge pump (collectively capacitor C zn    424  and diode D zn    422 ) in the transformer based gate drive circuit  400 . Resistor R g    426  and resistor R gs    428  may also be electrically connected to MOSFET  430  and capacitor C zn    424  and diode D zn    422 . That is, MOSFET Q DUT    430  may be gate switching device (e.g., a gate MOSFET transistor or a IGBT, hereinafter “MOSFET  430 ” for illustrative and descriptive convenience). 
     The second charge pump (collectively capacitor C zn    424  and diode D zn    422 ) can be electrically connected to first BJT  418  and the second BJT  420  to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. The second charge pump can include capacitor C zn    424  and diode D zn    422 , which can be a zener diode. 
     In one aspect, the level shifted PWM output signal can have a voltage range from positive twenty six (26) volts to zero (0) volts. The readjusted PWM output signal can have a voltage range from positive twenty (20) volts to negative six (−6) volts. 
     The transformer based gate drive circuit  400  can include a gate MOSFET transistor Q DUT    430  having a source, a drain, and a gate. The gate MOSFET transistor Q DUT    430  can be electrically connected to the second charge pump (collectively capacitor C zn    424  and diode D zn    422 ). The readjusted PWM output signal at the gate MOSFET transistor Q DUT    430  can establish an ON condition of the gate MOSFET transistor Q DUT    430  and/or the readjusted PWM output signal at the gate MOSFET transistor Q DUT    430  can establish an OFF condition of the gate MOSFET transistor Q DUT    430 . 
     The input to the gate drive circuit is represented by the voltage source v dr . As shown in  FIG. 4B , v dr  is a symmetric bipolar voltage applied to the primary winding N p    406 , of the isolation transformer, T 3 . Transformer T 3  consists of 2 windings ( 406 ,  408 ), 1 primary winding ( 406 ) with N p  turns and one secondary windings  408  with N s  turns as shown in  FIG. 4B . A charge pump formed by diode D 1    410  and capacitor C 1    404  rectifies the secondary voltage and generates a level shifted square wave voltage v 1 . The turns ratio of the transformer T 3  is set to achieve V ON +V OFF  VON+VOFF as the peak of voltage v 1 . BJT  418  Q 3 , resistor R 3    416  and BJT  420  Q 4 , resistor R 4    414  represent a complementary source follower to source and sink the required current in and out of the gate terminal of Q DUT  for turn-on and turn-off respectively. Capacitor C zn    424 , zener diode D zn    422  forms another charge pump. The zener voltage of D zn  is chosen to subtract V OFF  from the peak of v 1  V 1  and apply it to the gate of Q DUT  to turn off the device. Neglecting diode forward voltage drops, the voltage v gs  applied to the gate of Q DUT  has the required turn-on and turn-off levels (with the various wave forms illustrating positive (+) and negative (−) voltages in  FIG. 4B ). 
     It is to be understood that the embodiments of the invention disclosed are not limited to the particular structures, process steps, or materials disclosed herein, but are extended to equivalents thereof as would be recognized by those ordinarily skilled in the relevant arts. It should also be understood that terminology employed herein is used for the purpose of describing particular embodiments only and is not intended to be limiting. 
     Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. 
     Various embodiments and example of the present invention may be referred to herein along with alternatives for the various components thereof. It is understood that such embodiments, examples, and alternatives are not to be construed as de facto equivalents of one another, but are to be considered as separate and autonomous representations of the present invention. 
     Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the description, numerous specific details are provided, such as examples of lengths, widths, shapes, etc., to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the invention. 
     While the foregoing examples are illustrative of the principles of the present invention in one or more particular applications, it will be apparent to those of ordinary skill in the art that numerous modifications in form, usage and details of implementation can be made without the exercise of inventive faculty, and without departing from the principles and concepts of the invention. Accordingly, it is not intended that the invention be limited, except as by the claims set forth below.