Patent Publication Number: US-2023156881-A1

Title: Average current control circuit and method

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. Pat. Application No. 17/487,999, filed on Sep. 28, 2021, entitled “Average Current Control Circuit and Method” which application is hereby incorporated by reference herein in its entirety. 
     Further, this application is related to co-pending U.S. Pat. Application No. 17/487,944, filed on the same day as this application, entitled “Average Current Control Circuit and Method,” and associated with Attorney Docket No. ST-19-AG-0939US01, and to co-pending U.S. Pat. Application No. 17/487,966, filed on the same day as this application, entitled “QR-Operated Switching Converter Current Driver,” and associated with Attorney Docket No. ST-19-AG-0942US01, which applications are hereby incorporated by reference herein in their entirety. 
    
    
     TECHNICAL FIELD 
     The present disclosure relates generally to an electronic system and method, and, in particular embodiments, to an average current control circuit and method. 
     BACKGROUND 
     A light emitting diode (LED) driver is configured to provide sufficient current to light the LED. A switching voltage regulator may be used to drive a LED. 
     The intensity of light produced by the LED is related to the average current flowing through the LED. Generally, the higher the average current flowing through the LED, the higher the intensity of light produced by the LED. Thus, it is generally desirable to use a current driver for driving the LED, to accurately control the average current flowing through the LED. 
     Dimming of a LED is possible by controlling the average current flowing through the LED. For example, reducing the intensity of light produced by the LED may be achieved by reducing the average current flowing through the LED. 
     Fluctuations in the average current flowing through the LED may cause fluctuations in the light emitted by the LED. Thus, a switching converter current driver may be used to properly drive a LED by switching at a frequency higher than the flicker fusion threshold. 
     LED lamp drivers are often specified for a rated output current (sometimes programmable in a range by a user) and for a range of output voltages to power different types/lengths of LED string. Notably, the rated output current is normally specified with quite tight accuracy, often less than 5% overall. 
     It is also common for LED lamp drivers to provide dimming capability, i.e., the ability to reduce the LED current from the rated value down to low values (sometimes lower than 1%) to enable the user to lower the intensity of the light output of the LED string. It is generally desirable for the LED current reduction and the resulting light modulation to be seamless and flicker-free. 
     SUMMARY 
     In accordance with an embodiment, a control circuit includes: an output terminal configured to be coupled to a control terminal of a first transistor that has a current path coupled to an inductor; a transconductance amplifier configured to produce a sense current based on a current flowing through the current path of the first transistor; and a first capacitor, where the control circuit is configured to: turn on the first transistor based on a clock signal, integrate the sense current with an integrating capacitor to generate a first voltage, generate a first current, generate a second voltage across the first capacitor based on the first current, generate a second current based on the second voltage, generate a third voltage based on the second current, turn off the first transistor when the first voltage becomes higher than the third voltage; discharge the integrating capacitor when the first transistor turns off; and regulate an average output current flowing through the inductor based on the first current. 
     In accordance with an embodiment, a method for regulating an average output current flowing through an inductor includes: turning on a power transistor based on a clock signal, where a current path of the power transistor is coupled to the inductor; generating a sense current based on a current flowing through the current path of the power transistor; integrating the sense current with an integrating capacitor to generate a first voltage; generating a first current; generating a second voltage across a first capacitor based on the first current; generating a second current based on the second voltage; generating a third voltage across a second capacitor based on the second current; turning off the power transistor when the first voltage becomes higher than the third voltage; discharging the integrating capacitor when the power transistor turns off; and regulating the average output current based on the first current. 
     In accordance with an embodiment, a switching converter includes: a power transistor; a sense resistor coupled to a current path of the power transistor; an inductor coupled to the current path of the power transistor; a driver having an output coupled to a control terminal of the power transistor; a flip-flop having a first output coupled to an input of the driver, and a first input configured to receive a clock signal, where the flip-flop is configured to produce a first signal at the first output of the flip-flop, and where the flip-flop is configured to cause the power transistor to turn on using the first signal based on the clock signal; a first comparator having an output coupled to a second input of the flip-flop, where the flip-flop is configured to cause the power transistor to turn off using the first signal based on the output of the first comparator; a transconductance amplifier having a first and second inputs respectively coupled to first and second terminals of the sense resistor, and an output coupled to a first input of the first comparator; an integrating capacitor coupled to the output of the transconductance amplifier and to the first input of the first comparator; a first switch coupled to the integrating capacitor, the first switch configured to discharge the integrating capacitor when the power transistor turns off; a zero crossing detection circuit having an input coupled to the current path of the power transistor and to the inductor, where the zero crossing detection circuit is configured to generate a freewheeling signal based on a demagnetization of the inductor; a first current generator configured to generate a first current, the first current generator coupled to a first capacitor at a first node; a first resistor coupled between the first node and a reference supply terminal; a second switch coupled in series with the first resistor and configured to be controlled based on the freewheeling signal; a second current generator configured to generate a second current based on a voltage at the first node; a third switch coupled between the second current generator and a second input of the transconductance amplifier; and a fourth switch coupled between the third switch and the reference supply terminal. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which: 
         FIG.  1    shows a LED lamp driver, according to an embodiment of the present invention; 
         FIG.  2    shows a schematic diagram of a buck converter, according to an embodiment of the present invention; 
         FIGS.  3  and  4    show schematic diagrams of interface circuits (I/F) of  FIG.  2   , according to embodiments of the present invention; 
         FIG.  5    shows a schematic diagram of a zero-crossing detection (ZCD) circuit, according to an embodiment of the present invention; 
         FIG.  6    shows a reference generator, according to an embodiment of the present invention; 
         FIGS.  7  and  8    shows waveforms associated with the buck converter of  FIG.  2   , implemented with the reference generator of  FIG.  6   , and operating in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) mode, respectively, according to an embodiment of the present invention; 
         FIG.  9    shows a schematic diagram of a control circuit, according to an embodiment of the present invention; 
         FIGS.  10  and  11    show a schematic diagram of clock circuit, and associated waveforms, respectively, according to an embodiment of the present invention; 
         FIG.  12    shows a schematic diagram of a reference generator, according to an embodiment of the present invention; 
         FIG.  13    shows schematic diagram of a portion of a control circuit coupled to the interface circuit of  FIG.  3   , according to an embodiment of the present invention; 
         FIG.  14    shows schematic diagram of a portion of the control circuit of  FIG.  13    coupled to the interface circuit of  FIG.  4   , according to an embodiment of the present invention; 
         FIGS.  15 - 17    shows schematic diagrams of reference generators, according to embodiments of the present invention; and 
         FIGS.  18 - 20    show schematic diagrams of switching converters, according to embodiments of the present invention. 
     
    
    
     Corresponding numerals and symbols in different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale. 
     DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS 
     The making and using of the embodiments disclosed are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention. 
     The description below illustrates the various specific details to provide an in-depth understanding of several example embodiments according to the description. The embodiments may be obtained without one or more of the specific details, or with other methods, components, materials, and the like. In other cases, known structures, materials or operations are not shown or described in detail so as not to obscure the different aspects of the embodiments. References to “an embodiment” in this description indicate that a particular configuration, structure or feature described in relation to the embodiment is included in at least one embodiment. Consequently, phrases such as “in one embodiment” that may appear at different points of the present description do not necessarily refer exactly to the same embodiment. Furthermore, specific formations, structures or features may be combined in any appropriate manner in one or more embodiments. 
     Embodiments of the present invention will be described in a specific context, a current switching converter (constant current source) LED driver, e.g., for use in solid-state lighting (SSL), such as for driving one or more LEDs as the load. In some embodiments, the load may not include a LED. Some embodiments may be implemented in applications different from SSL, such as industrial, consumer, ICT, white goods, etc., “as is,” or with small adaptations. Some embodiments may be used in a voltage switching converter. 
     In an embodiment of the present invention, the average inductor current of a continuous conduction mode (CCM)-operated buck converter is regulated by sensing only the current flowing through a power transistor, where the regulated current is independent of the switching frequency of the buck converter. Some embodiments are based on a charge-mode control core that enables stable CCM operation with a fixed or quasi-fixed switching frequency. In some embodiments, a zero current detection (ZCD) circuit enables discontinuous conduction mode (DCM) operation with a nominally unaltered control scheme, which advantageously allows for good accuracy of output current regulation during analog dimming. In some embodiments, a voltage feedforward circuit compensates propagation delays making the regulated output current little sensitive to input and output voltage variations. 
       FIG.  1    shows LED lamp driver  100 , according to an embodiment of the present invention. LED lamp driver  100  includes switched-mode power supply (SMPS)  102 , and SMPS  104  for driving LED string  106 . Switching converter  102  provides a regulated DC output voltage V 102  across energy storage capacitor  108  that supplies power to cascaded converter  104 . Converter  104  provides a regulated output current that powers LED string  106 . 
     In some embodiments, switching converter  102  may be implemented as a power factor corrector (PFC) front-end converter, which may draw a sinusoidal current I mains  from the power line, in-phase with the sinusoidal line voltage V mains  (e.g., 60 Hz, 110 V rms ; 50 Hz, 220 V rms ) may be used. Using a PFC front-end converter may advantageously achieve high power factor and low distortion of the input current. In some embodiments, using implementing switching converter  102  with PFC may advantageously help keep harmonic emissions low, which may advantageously help comply with standards such as the IEC61000-3-2, which sets class C harmonic emission limits for applications such as LED lamp drivers. In some embodiments, implementing converter  102  with PFC advantageously help keep total harmonic distortion (THD) of the input current I mains  low. 
     AC/DC switching converter  102  may introduce ripple in the output current I 102 . For example, current I 102  may exhibit a ripple with a high frequency component at the switching frequency of converter  102  (typically above 50 kHz), and a low-frequency component at twice the frequency of the AC power line (due to the pulsating nature of the power converter  102  draws from the power line and deliver to its output). The low-frequency ripple, if provided to LED string  106 , may cause a reduction of the average LED current I LED  for a given peak value, and may cause an increase in the operating temperature of the LEDs of LED string  106 , which may shorten the lifetime of the LEDs of LED string  106 . Such low-frequency ripple may also cause light fluctuations (flicker and shimmer), which may be undesirable if perceptible, and which have been reported to cause health problems even when imperceptible. 
     The PFC output voltage V102 may be affected by a low-frequency ripple, generated by the low-frequency component of the output current I 102  ripple. Generally, converter  102  regulates the DC value of the output voltage V 102  by a low-bandwidth control loop to achieve high power factor and low distortion of the input current, but may be unable to reject the low-frequency output ripple. 
     In some embodiments, using a two-stage power conversion, such as shown in  FIG.  1    (with front-end PFC converter  102  supply power to capacitor  108 , and a cascaded post-regulator converter  104  supplying a regulated current to LED string  106 ) advantageously help prevent LED string  106  from being exposed to the ripple at the output of PFC converter  102 . For example, in some embodiments, converter  104  provides a DC constant current I LED , regulated by a wide-bandwidth control loop able to reject the low-frequency input voltage ripple, which advantageously optimizes the usage of LED string  106  and provides flicker-free operation of LED string  106 . 
     In some embodiments, converter  102  may be implemented as a boost converter and converter  104  may be implemented as a buck converter. For example, in some embodiments delivering less than 100 W of power to LED string  106 , voltage V 102  may be, e.g., between 100 V and 400 V, and converter  104  provides voltage V LED  at a level that is appropriate for LED string  106 , such as between  30  V and 60 V. In some embodiments, implementing converter  102  as a boost and converter  104  as a buck may advantageously keep current I 102  (and the relevant low-frequency ripple) low and may advantageously allow for implementing capacitor  108  without using a bulky, large value energy storage capacitor. Implementing converter  102  and  104  as a boost and buck converters, respectively, may also advantageously help in complying with safety extra low voltage (SELV) requirements, which limits V LED  to 60 V. 
     In some embodiments, converter  102  may be implemented as a flyback converter, which may advantageously provide isolation from mains. Isolation from mains may advantageously help comply with electrical safety standards, such as IEC60950, IEC62368, IEC61347-1, for example. 
       FIG.  2    shows a schematic diagram of buck converter  200 , according to an embodiment of the present invention. Buck converter  200  includes power transistor  202 , interface (I/F) circuit  210 , sense resistor  208 , inductor  204 , and control circuit  220 . Control circuit  220  includes transconductance amplifier (OTA)  222 , gate driver  218 , zero-current detection (ZCD) circuit  212 , flip-flop  216 , clock circuit  214 , capacitor  230 , switch  228 , comparator  224 , and reference generator  226 . SMPS  104  may be implemented as buck converter  200  (e.g., where node N 1  receives voltage V 102  as V in ). 
     Although LED string  106  is shown as the load driven by buck converter  200 , in some embodiments, other loads, instead of or in addition to a LED string, may be driven by buck converter  200 . For example, in some embodiments, load  106  may be a rechargeable battery. 
     As shown in  FIG.  2   , in some embodiments, power transistor  202  has a source terminal connected to ground, freewheeling diode  206  is connected to node N 1 , and the load  106  is appended to node N 1  in series with inductor  204 . Such configuration may advantageously allow for easier driving of transistor  202  compared to driving a floating power switch and allow for having control circuit  220  referred to ground, which may advantageously allow for simplified interfacing with lamp controls such as remote on/off, diming circuits, etc. 
     Converter  202  may be operated in continuous conduction mode (CCM). Operating converter  202  in CCM mode advantageously allow for a lower capacitance of output capacitor  232 . Using a lower capacitance may advantageously allow for using ceramic capacitors instead of electrolytic capacitors, which may advantageously result in higher reliability and lower lifetime of converter  202 . In some embodiments, output capacitor  232  may be omitted. 
     Converter  202  may be operated in discontinuous conduction mode (DCM), which may advantageously allow for good accuracy of current I LED  at light loads (e.g., during analog diming). As will be described in more detail later, in some embodiments, ZCD circuit  212  enables DCM operation with a nominally unaltered control scheme (e.g., as given by Equation 11). 
     During normal operation (e.g., in CCM or DCM mode), power transistor  202  is turned on when pulses delivered by clock  214  set flip-flop  216 . Power transistor  202  is turned off when flip-flop  216  is reset by comparator  224 , which trips when voltage Vq is equal to voltage Vq ref . In some embodiments, the pulses delivered by clock  214  have a fixed switching period T s . 
     The current I LED  delivered to LED string  106  is the average value of the inductor current I L (t) regardless of the operating mode. The portion Isw(t) of the inductor current I L (t) flowing through power transistor  202  during the on-time T ON  of power transistor  202 , is read through the voltage drop Vcs(t) across sensing resistor  208  and brought to the non-inverting input of OTA  222 , whose inverting input is connected to ground. 
     OTA  222  outputs a current Iq(t) proportional to Vcs(t). For example, in some embodiments, current Iq(t) may be given by 
     
       
         
           
             Iq 
             
               t 
             
             = 
             
               g 
               m 
             
             ⋅ 
             Vcs 
             
               t 
             
           
         
       
     
      where g m  is the transconductance of OTA  222 . 
     Current Iq(t) charges integrating capacitor  230  during a time T ON . Capacitor  230  is reset by switch  228  as power transistor  202  is turned off and is kept discharged during the remaining part of the switching period T s , so that Vq starts ramping up from o V during the next time power transistor  202  turns on. 
     During normal operation, irrespective of the operating mode (CCM or DCM), voltage Vq developed across integrating capacitor  230  may be given by 
     
       
         
           
             Vq =  
             
               
                 
                   g 
                   m 
                 
               
               
                 
                   C 
                   x 
                 
               
             
             
               
                 
                   ∫ 
                   o 
                   
                     
                       T 
                       
                         on 
                       
                     
                   
                 
                 
                   Vcs 
                   
                     t 
                   
                   d 
                   t 
                 
               
             
             = 
             
               
                 
                   g 
                   m 
                 
               
               
                 
                   C 
                   x 
                 
               
             
             
               
                 
                   ∫ 
                   o 
                   
                     
                       T 
                       
                         on 
                       
                     
                   
                 
                 
                   Rs 
                   ⋅ 
                   Isw 
                   
                     t 
                   
                   d 
                   t 
                 
               
             
           
         
       
     
      where C x  represents the capacitance of capacitor  230 , T on  represents the time instant at which power transistor  202  is turned off, and Rs represents the resistance of sense resistor  208 . 
     When buck converter  200  is operated in CCM mode, the current Isw(t) flowing through sense resistor  208  may be given by 
     
       
         
           
             
               
                 Isw 
               
               
                 CCM 
               
             
             
               t 
             
             = 
             
               I 
               
                 LED_CCM 
               
             
             + 
             
               
                 
                   V 
                   
                     in 
                   
                 
                 − 
                 
                   V 
                   
                     LED 
                   
                 
               
               L 
             
             . 
             
               
                 t 
                 − 
                 
                   
                     
                       T 
                       
                         ON 
                       
                     
                   
                   2 
                 
               
             
           
         
       
     
      where Isw CCM (t) represents the current Isw(t) in CCM mode, I LED_CCM  represents the average current I LED  in CCM mode, and L represents the inductance of inductor  204 . 
     It follows from Equations 2 and 3 that voltage Vq, in CCM mode, may be given by 
     
       
         
           
             
               
                 Vq 
               
               
                 CCM 
               
             
             = 
             
               
                 
                   g 
                   m 
                 
               
               
                 
                   C 
                   x 
                 
               
             
             ⋅ 
             Rs 
             ⋅ 
             
               I 
               
                 LED_CCM 
               
             
             ⋅ 
             
               T 
               
                 ON 
               
             
           
         
       
     
     As will be described in more detail later, since the turn-off condition for power transistor  202  occurs when Vq CCM  is equal to Vq ref , reference generator  226  may be designed in such a way so as to generate reference voltage Vq ref  so as to cause current I LED_CCM  to be independent from voltage V LED  or input voltage V in  (so that current I LED_CCM  does not vary based on voltage V LED  or input voltage V in ). For example, in some embodiments, current I LED _ CCM  may be given by 
     
       
         
           
             
               I 
               
                 LED_CCM 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             α 
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   g 
                   m 
                 
               
             
           
         
       
     
      where α is a factor that may be dependent on internal fixed parameters, such as resistors and/or reference current(s) internal to controller  220 . 
     As illustrated by Equation 5, in some embodiments, ILED_CCM may be determined by a user-selectable parameter (e.g., external resistance Rs) and on internally fixed parameters (C x , g m , α) and does not depend on voltage V LED  of LED string  106 , nor on the input voltage V in  or the inductance L of inductor  204 , nor on the switching frequency F sw  (where  
     
       
         
           
             
               F 
               
                 SW 
               
             
             = 
             
               1 
               
                 
                   T 
                   S 
                 
               
             
           
         
       
     
     ). 
     When buck converter  200  is operated in DCM mode, the current Isw(t) flowing through sense resistor  208  may be given by 
     
       
         
           
             
               
                 Isw 
               
               
                 DCM 
               
             
             
               t 
             
             = 
             
               
                 
                   V 
                   
                     in 
                   
                 
                 − 
                 
                   V 
                   
                     LED 
                   
                 
               
               L 
             
             t 
           
         
       
     
      where Isw DCM (t) represents the current Isw(t) in DCM mode. The current I LED  delivered to LED string  106  may be given by 
     
       
         
           
             
               I 
               
                 LED_DCM 
               
             
             = 
             
               
                 
                   V 
                   
                     in 
                   
                 
                 
                   
                     -V 
                   
                   
                     LED 
                   
                 
               
               L 
             
             ⋅ 
             
               
                 
                   T 
                   
                     on 
                   
                 
               
               2 
             
             ⋅ 
             
               
                 
                   T 
                   S 
                 
                 
                   
                     -T 
                   
                   R 
                 
               
               
                 
                   T 
                   S 
                 
               
             
           
         
       
     
      where I LED_DCM  represents the average inductor current I LED  in DCM mode, and T R  represents the time between the demagnetization time T FW  (e.g., as indicated by voltage V FW ) and the turning on of power transistor  202  (thus, T R  represents the time in which inductor current I L  is zero and T s  - T R  represents the time in which inductor current I L  is greater than zero). 
     Substituting Equation 6 into Equation 2 and solving the integral yields 
     
       
         
           
             
               
                 Vq 
               
               
                 DCM 
               
             
             = 
             
               
                 
                   g 
                   m 
                 
               
               
                 
                   C 
                   x 
                 
               
             
             ⋅ 
             Rs 
             ⋅ 
             
               
                 
                   V 
                   
                     in 
                   
                 
                 
                   
                     -V 
                   
                   
                     LED 
                   
                 
               
               L 
             
             ⋅ 
             
               
                 
                   T 
                   
                     ON 
                   
                   2 
                 
               
               2 
             
           
         
       
     
      where Vq DCM  represents the voltage Vq in DCM mode. In view of Equation  7 , Equation 8 may be rewritten as 
     
       
         
           
             
               
                 Vq 
               
               
                 DCM 
               
             
             = 
             
               
                 
                   g 
                   m 
                 
               
               
                 
                   C 
                   x 
                 
               
             
             ⋅ 
             Rs 
             ⋅ 
             
               I 
               
                 LED_DCM 
               
             
             ⋅ 
             
               
                 
                   T 
                   S 
                 
               
               
                 
                   T 
                   S 
                 
                 − 
                 
                   T 
                   R 
                 
               
             
             ⋅ 
             
               T 
               
                 ON 
               
             
           
         
       
     
     As will be described in more detail later, since the turn-off condition for power transistor  202  occurs when Vq DCM  is equal to Vq ref , reference generator  226  may be designed in such a way so as to generate reference voltage Vq ref  so as to cause current I LED   DCM  to be independent from voltage V LED  or input voltage V in  or switching period T s  (so that current I LED_CCM  does not vary based on changes in voltage V LED  or input voltage V in  or switching period T s ). For example, in some embodiments, current I LED_DCM  may be given by 
     
       
         
           
             
               I 
               
                 LED_DCM 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             α 
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   g 
                   m 
                 
               
             
           
         
       
     
      which is identical to Equation 5. Thus, in some embodiments, the average current I LED  is advantageously independent of the operating mode (CCM or DCM) of the buck converter  200 , e.g., as given by 
     
       
         
           
             
               I 
               
                 LED 
               
             
             
               
                  = I 
               
               
                 LED_CCM 
               
             
             
               
                  = I 
               
               
                 LED_DCM 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             α 
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   g 
                   m 
                 
               
             
           
         
       
     
     Advantages of some embodiments include allowing for accurately controlling output current I LED  in either CCM mode or DCM mode while only monitoring current Isw(t) flowing through power transistor  202 . Thus, some embodiments advantageously achieve accurately controlling output current I LED  in a low-cost, low-complexity manner, and without dissipating excessive energy. For example, some embodiments advantageously avoid using a resistor in series with the inductor for measuring the inductor current I L . In some embodiments, avoiding use of a series resistor for measuring the inductor current may advantageously reduce power dissipation, avoid use of differential sensing with large common-mode dynamics and/or avoid use of a level shifter. 
     Additional advantages of some embodiments include achieving high output current (I LED ) accuracy, insensitive to the inductance value L, operating mode (DCM or CCM), switching period T s , input voltage V in , and LED string voltage V LED . Some embodiments advantageous allow for accommodating different V LED  settings without requiring external calibrations or correction means. 
     In some embodiments, control circuit  220  may be implemented in the same (e.g., monolithic) integrated circuit while elements  202 ,  204 ,  206 ,  208 ,  210 , and  106  are implemented external to the integrated circuit (e.g., so that the integrated circuit may include a demagnetization sensing input for receiving voltage V ZCD , e.g., as shown in  FIG.  2   ). Thus, some embodiments advantageously allow a user to accurately control current I LED  by changing the resistance value Rs of an external component ( 208 ). In some embodiments, elements  206  and  210  are integrated in the same package external to the integrated circuit that includes control circuit  220 . In some embodiments, elements  202  and/or  204  may be integrated in the same package external to the integrated circuit that includes control circuit  220 . 
     In some embodiments, the circuits of buck converter  200  may be integrated in a different manner. For example, in some embodiments, elements  202  and/or  204  may be integrated in the same package as elements  206 ,  210 ,  212 ,  214 ,  216 , and  218 . In some embodiments, interface circuit  210  may be implemented inside the integrated circuit. In some embodiments, each of elements  106 ,  202 ,  204 ,  206 ,  208 ,  210 ,  212 ,  214 ,  216 ,  218 ,  222 ,  224 ,  226 ,  228  and  230  may be implemented in a discrete manner. Other implementations are also possible. 
     In some embodiments, control circuit  220  includes reference generator  226 , comparator  224 , switch  228 , capacitor  230 , and transconductance amplifier  222 . Other implementations are possible. For example, in some embodiments, a portion or all of reference generator  226  may be implemented outside control circuit  220 . 
     In some embodiments, capacitor  234  may be the output capacitor of a previous power stage. For example, in some embodiments, capacitor  108  is connected to node N 1 , and capacitor  234  may be omitted. 
     Power transistor  202  may be implemented as a metal-oxide semiconductor field-effect transistor (MOSFET). Power transistor  202  may also be implemented in other ways. For example, in some embodiments, power transistor  202  may be implemented as a gallium nitride (GaN) transistor, or as an insulated-gate bipolar transistor (IGBT). 
     In some embodiments, clock  214  may be implemented in a conventional manner so as to generate a fixed-frequency clock signal V s  (e.g., with period T s ). Operating buck converter  200  with a fixed frequency or with a substantially fixed frequency advantageously allows for using an optimized inductor that mitigates the efficiency drop at low dimming levels. 
     Interface circuit  210  is configured to generate voltage V ZCD  based on current I L  flowing through inductor  204 . Voltage V ZCD  may be used to sense the demagnetization instant of inductor  204  (e.g., by ZCD circuit  212 ). 
     In some embodiments, ZCD circuit  212  is configured to sense the onset of the voltage ringing of the floating terminal of inductor  204  (the drain terminal of power transistor  202 ) that occurs as current I L  reaches o mA and produce a signal V FW  indicative of the demagnetization time T FW . For example, in some embodiments, ZCD circuit  212  includes a demagnetization sensing input for receiving the voltage V ZCD  and generates signal V FW  based on voltage V ZCD  so that signal V FW  is high during the demagnetization period of inductor  204 . In some embodiments, ZCD  212  may be implemented in a conventional manner. 
       FIG.  3    shows a schematic diagram of interface circuit  300 , according to an embodiment of the present invention. Interface circuit  210  may be implemented as interface circuit  300 . Interface circuit  300  includes auxiliary winding  304  of inductor  204 , and resistors  306  and  308  forming a voltage divider. 
     In some embodiments, auxiliary winding  304  tracks the voltage of the drain terminal of power transistor  202  and has a polarity such that its voltage is negative when power transistor  202  is on (during T ON ). 
     As shown in  FIG.  3   , interface circuit  300  generates voltage V ZCD  based on I L  current flowing through inductor  204 . Voltage V ZCD  may be used to sense the demagnetization instant of inductor  204  (e.g., by ZCD circuit  212 ). 
       FIG.  4    shows a schematic diagram of interface circuit  400 , according to an embodiment of the present invention. Interface circuit  210  may be implemented as interface circuit  400 . Interface circuit  400  includes DC blocking capacitor  404  (e.g., connected to the drain terminal of power transistor  202 ), and resistors  406  and  408  forming a voltage divider. Similarly to interface circuit  300 , voltage V ZCD  may be used to sense the demagnetization instant of inductor  204  (e.g., by ZCD circuit  212 ). 
       FIG.  5    shows a schematic diagram of ZCD circuit  500 , according to an embodiment of the present invention. ZCD circuit  212  may be implemented as ZCD circuit  500 . ZCD circuit  500  includes flip-flop  504 , comparator  502 , OR gate  506 , and low-pass filter  512  including resistor  510  and capacitor  508 . Low-pass filter  512 , and comparator  502  form a negative-derivative detector. 
     In some embodiments, ZCD circuit  500  may be used to determine the demagnetization time T FW  from the turning off of power transistor  202  to the current I L  reaching o mA (in DCM mode). For example, as shown in  FIG.  5   , Z CD  circuit  500  senses the onset of the voltage ringing of the floating terminal (drain) of power transistor  202  that occurs as inductor current I L  zeroes by monitoring voltage V ZCD  (e.g., as generated by interface circuit  300  or  400 ). Thus, in some embodiments, voltage V FW  is reset (e.g., to logic low) when current I L  reaches zero and is set (e.g., to logic high) when power transistor  202  is turned on (e.g., according to clock signal V s ). For example, in some embodiments (e.g., as shown in  FIG.  5   ), since the inverting input of comparator  502  receives voltage V ZCD , and the non-inverting input receives voltage V ZCD  filtered by low-pass filter  512  and offset downwards by offset V th , as V ZCD  undergoes a negative edge, the output of low-pass filter  512  lags behind, and as their difference exceeds V th , comparator  502  triggers, thus resetting flip-flop  504 . In some embodiments, in CCM mode, the demagnetization time T FW  is equal to the power transistor  202  off time T OFF . 
     In some embodiments, offset V th  may be a constant offset voltage, such as 25 mV. Other voltages (e.g., higher than 25 mV, such as 30 mV, or higher, or lower than 25 mV, such as 20 mV, or lower, may also be used). 
       FIG.  6    shows reference generator  600 , according to an embodiment of the present invention. Reference generator  226  may be implemented as reference generator  600 . Reference generator  600  includes current sources  602  and  616 ,  608 ,  618 ,  620  and  626 , resistor  606 , capacitors  614 ,  628 , and  630 , OR gate  610 , AND gate  612 , one-shot circuit  622 , and delay circuit  624 . As shown in  FIG.  6   , Reference generator  600  may be controlled by signals V Q  and V Q̅  (e.g., from flip-flop  216 ) and signal V FW  (e.g., from ZCD  212 ). 
       FIG.  7    shows waveforms  700  associated with buck converter  200  implemented with reference generator  600 , and operating in CCM mode, according to an embodiment of the present invention. 
     As can be seen in  FIGS.  6  and  7   , during CCM mode, switch  608  remains closed every clock cycle of clock V s , as shown by signal V 608 . Since switch  608  remains closed during CCM mode, the voltage V CT  across capacitor  614  may be given by 
     
       
         
           
             
               V 
               
                 CT 
               
             
             
               
                  = R 
               
               t 
             
             ⋅ 
             
               I 
               
                 ch 
               
             
           
         
       
     
      where R t  represent the resistance of resistor  606 , C t  represents the capacitance of capacitor  614 , and I ch  represents the current generated by current source  602 . 
     The voltage V CT  across capacitor  614  is then converter to a current I ch2 , by voltage-controlled current source  616 . Current I ch2  may be given by 
     
       
         
           
             
               I 
               
                 ch2 
               
             
             = 
             
               g 
               
                 m 
                 2 
               
             
             ⋅ 
             
               V 
               
                 CT 
               
             
           
         
       
     
      where g m2  is the transconductance of voltage-controlled current source  616 . 
     Since switch  618  is closed when power transistor  202  is on (during on-time T ON ), capacitor  628  is charged during on-time T ON . As shown by one-shot circuit  622 , as soon as signal V Q  deasserts (thus, turning off power transistor  202 ), switch  620  is turned on for a predetermine period of time (e.g., 20 ns, as determined by one-shot circuit  622 ). A predetermined delay after signal V Q  is deasserted (e.g., 100 ns, as determined by delay circuit  624 ), capacitor  628  is discharged through switch  626  (e.g., so that capacitor  628  is fully discharged the next time power transistor  202  turns on). 
     Assuming capacitance C H  of capacitor  630  is substantially smaller than capacitance C TR  of capacitor  628  (e.g., 10 times smaller, or more), capacitor  630  is charged to the same voltage V CTR  of capacitor  628 . Thus, the circuit including capacitors  628  and  630  and switches  618 ,  626  and  620  may be understood as a track and hold circuit. 
     Since during turn-on time T ON , voltage V CTR  increases linearly (since capacitor  628  is charged with a constant current I ch2 ), and in view of Equations 12 and 13, reference voltage Vq ref  may be given by 
     
       
         
           
             
               
                 Vq 
               
               
                 ref 
               
             
             = 
             
               V 
               
                 CTR 
               
             
             = 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
                 ⋅ 
                 
                   R 
                   t 
                 
                 ⋅ 
                 
                   I 
                   
                     ch 
                   
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             ⋅ 
             
               T 
               
                 ON 
               
             
           
         
       
     
     Since power transistor  202  turns off when voltage Vq is equal to voltage Vq ref , and in view of Equations 4 and 14, current I LED_CCM  may be given by 
     
       
         
           
             
               I 
               
                 LED_CCM 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
               
               
                 
                   g 
                   m 
                 
               
             
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             
               I 
               
                 ch 
               
             
             ⋅ 
             
               R 
               t 
             
           
         
       
     
      where α is given by 
     
       
         
           
             α 
             = 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
                 ⋅ 
                 
                   I 
                   
                     ch 
                   
                 
                 ⋅ 
                 
                   R 
                   t 
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
           
         
       
     
       FIG.  8    shows waveforms  800  associated with buck converter  200  implemented with reference generator  600 , and operating in DCM mode, according to an embodiment of the present invention. 
     As can be seen in  FIGS.  6  and  8   , during DCM mode, switch  608  is closed only while the inductor current I L  is greater than zero (during the time interval T S  - T R ), and is open during the remaining part of the switching period T s . Assuming that the time constant R t  • C t  is much larger than the switching period T S  (e.g., 10 larger) voltage V CT  may be given by 
     
       
         
           
             
               V 
               
                 CT 
               
             
             = 
             
               R 
               t 
             
             ⋅ 
             
               I 
               
                 ch 
               
             
             ⋅ 
             
               
                 
                   T 
                   S 
                 
               
               
                 
                   T 
                   S 
                 
                 − 
                 
                   T 
                   R 
                 
               
             
           
         
       
     
     Since capacitor  628  is charged with current I ch2  during the turn-on time T ON  of power transistor  202 , and in view of Equations 13 and 17, voltage Vq ref  in DCM mode may be given by 
     
       
         
           
             
               
                 Vq 
               
               
                 ref 
               
             
             = 
             
               V 
               
                 Ct 
               
             
             = 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
                 ⋅ 
                 
                   R 
                   t 
                 
                 ⋅ 
                 
                   I 
                   
                     ch 
                   
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             ⋅ 
             
               T 
               
                 ON 
               
             
             ⋅ 
             
               
                 
                   T 
                   S 
                 
               
               
                 
                   T 
                   S 
                 
                 − 
                 
                   T 
                   R 
                 
               
             
           
         
       
     
     As can be seen, Equation 18 is valid also in CCM mode (e.g., if T R  is equal to zero, Equation 18 is identical to Equation 14). 
     Based on Equations 9 and 18, in some embodiments, current I LED _ DCM  may be given by 
     
       
         
           
             
               I 
               
                 LED_DCM 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
               
               
                 
                   g 
                   m 
                 
               
             
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             
               I 
               
                 ch 
               
             
             ⋅ 
             
               R 
               t 
             
           
         
       
     
      where α is given by Equation 16. As shown, Equations 15 and 19 are identical, thereby leading to a control scheme of the average current I LED  that is independent of the operating mode (CCM, DCM) of buck converter  200 , which in some embodiments is captured by Equations 11 and 16. 
     In some embodiments, as can be seen in Equations 11 and 16, the average current I LED , may depend only on resistance Rs (which may be user-selectable) and on internally fixed parameters I ch , R t , C x , g m , C TR , and g m2  and does not dependent on voltage V LED  or V in , or inductance L, or the switching period T S , irrespective of the operating mode (CCM, DCM). For example, in some embodiments, the switching frequency F SW  may be varied (e.g., between 130 kHz and 230 kHz) without causing a substantial change in the average current I LED  (e.g., variation of less than 1% of the target average current value). 
     As can be seen in  FIGS.  7  and  8   , in some embodiments, voltage Vq ref  is substantially constant withing the switching cycle (e.g., based on Equation 18 and given that R t  • C t  is much larger than the switching period T S ). 
     Some embodiments advantageously achieve high accuracy of control of average current I LED  by matching current I ch  (which may be generated based on a resistor) to resistance R t  (e.g., resistance ratio), by matching transconductances g m  and g m2 , which may also dependent on the same (or matched) resistor (not shown), and by matching capacitances C x  and C TR  (e.g., capacitance ratio). 
     In some embodiments, one shot circuit  622  is configured to produce a pulse of predetermined duration (e.g., 20 ns) when signal V Q  transitions from high to low. Pulses of different durations (e.g., higher than 20 ns, such as 25 ns, 30 ns, or more, or lower than 20 ns, such as 18 ns, 15 ns, or less) may also be used. One-shot circuit  622  may be implemented in any way known in the art. 
     In some embodiments, delay circuit  624  is configured to generate signal V 626 , which is a delayed version of signal V 620 , where the delay between signals V 626  and V 620  is a predetermined delay (e.g., 100 ns). Delays of different durations (e.g., higher than 100 ns, such as 120 ns, 150 ns, or more, or lower than 100 ns, such as 90 ns, 85 ns, or less) may also be used. Delay circuit  624  may be implemented in any way known in the art. 
     In some embodiments, switch  618  may be omitted, e.g., by controlling an enable input of current source  616  using signal V Q . 
     As illustrated by  FIG.  2   , the resettable integration circuit that includes switch  228  and capacitor  230  forms a charge-mode control core in which Vq is proportional to the electric charge drawn by buck converter  200  from input V in  in a switching cycle during on-time T ON . The charge-mode control core may exhibit subharmonic instability issues when buck converter  200  is operated in CCM mode and with fixed frequency (constant T s ). 
     In some embodiments, buck converter  200  transitions from CCM mode to DCM mode when the peak-to-peak ripple of inductor current I L  is higher than twice the average of current I L , which may advantageously help solve subharmonic instability issues when buck converter  200  is operated in CCM mode. 
     In some embodiments, transitioning from CCM mode to DCM mode when the peak-to-peak ripple of inductor current I L  is higher than twice the average of current I L  may cause the duty cycle of power transistor  202  to be less than 50%. In some embodiments, duty cycles higher than 50% (and thus, V LED  higher than V in_min /2) are possible while achieving an unconditionally stable charge-mode control loop by using slope compensation. For example,  FIG.  9    shows a schematic diagram of control circuit  900 , according to an embodiment of the present invention. Control circuit  900  includes reference generator  926 , comparator  224 , current source  904 , switch  228 , integrating capacitor  230  and transconductance amplifier  222 . Reference generator  926  includes current sources  902 ,  602  and  616 , switches,  608 ,  618 , and  626 , resistor  606 , capacitors  614  and  628 , OR gate  610 , AND gate  612 , One shot circuit  622 , and delay circuit  624 . Control circuit  220  may be implemented as control circuit  900 . 
     As shown in  FIG.  9   , integrating capacitor  230  is charged by the sum of currents I q  and I sc . In some embodiments, current I sc  is selected to meet the condition 
     
       
         
           
             
               I 
               
                 SC 
               
             
             &gt; 
             Rs 
             ⋅ 
             
               g 
               m 
             
             
               
                 
                   V 
                   
                     LED 
                   
                 
               
               
                 2 
                 L 
               
             
             ⋅ 
             
               T 
               S 
             
           
         
       
     
      to make the charge-mode control loop unconditionally stable. 
     In CCM mode, current I LED_CCM  may be given by 
     
       
         
           
             
               I 
               
                 LED_CCM 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             
               1 
               
                 
                   g 
                   m 
                 
               
             
             ⋅ 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
                 ⋅ 
                 
                   
                     
                       C 
                       x 
                     
                   
                   
                     
                       C 
                       
                         TR 
                       
                     
                   
                 
                 ⋅ 
                 
                   I 
                   
                     ch 
                   
                 
                 ⋅ 
                 
                   R 
                   t 
                 
                 − 
                 
                   I 
                   
                     sc 
                   
                 
               
             
           
         
       
     
      where I sc  represents the current generated by current source  904 . In some embodiments, current I sc  is matched with current I ch , which may advantageously reduce or eliminate the degradation in accuracy exhibited by current I LED . In some embodiments, current I k  may be selected to meet the condition 
     
       
         
           
             
               I 
               k 
             
             = 
             
               
                 
                   C 
                   
                     TR 
                   
                 
               
               
                 
                   C 
                   x 
                 
               
             
             ⋅ 
             
               1 
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
                 ⋅ 
                 
                   R 
                   t 
                 
               
             
             ⋅ 
             
               I 
               
                 sc 
               
             
           
         
       
     
      which may advantageously cause I LED_CCM  to be given by Equation 15 while still achieving slope compensation. In some embodiments, current generators  902  and  904  are always active and Equation 21 also applies to DCM mode. 
     In some embodiments, since current generator  902  is in parallel with current generator  602 , current generator  902  may be omitted and the current generated by generator  602  may be increased by I k  to achieve the same result. In some such embodiments, Equation 19 may be modified by replacing I ch  with (I ch  - I k ). 
     In some embodiments, buck converter  200  uses a fixed-off-time (FOT) PWM modulation. With FOT PWM modulation, in a switching cycle, power transistor  202  is turned off when the current I L  reaches a predetermined value, and power transistor  202  is turned back on after a predetermined fixed time interval T OFF  (e.g., determined by a timer circuit). Using FOT may advantageously enable the control of the average inductor current I LED  with CCM operation by controlling the peak of current I L . Using FOT PWM modulation may advantageously help solve subharmonic instability issues when buck converter  200  is operated in CCM mode by making the charge-mode control loop unconditionally stable. 
     In some embodiments, a FOT quasi-fixed frequency (FOT-QFF) modulation. FOT-QFF is based on measuring T ON  and slowly modulate T OFF  based on T ON  so that the sum of T ON  and T OFF  is constant or substantially constant. In some embodiments, using FOT-QFF modulation may advantageously help solve subharmonic instability issues when buck converter  200  is operated in CCM mode by making the charge-mode control loop unconditionally stable while keeping the operating frequency substantially fixed. For example,  FIG.  10    shows a schematic diagram of clock circuit  1000 , according to an embodiment of the present invention. Clock circuit  214  may be implemented as clock circuit  1000 , and may be used to operate buck converter  200  with a FOT-QFF modulation. 
       FIG.  11    shows waveforms  1100  associated with clock circuit  1000 , according to an embodiment of the present invention.  FIGS.  10  and  11    may be understood together. 
     As can be seen from  FIG.  10   , assuming that the time constant R osc  • C osc  is much larger than the switching period T S  (e.g., 10 times larger, or more), voltage reference V th_ramp  may be given by 
     
       
         
           
             
               V 
               
                 th_ramp 
               
             
             = 
             
               I 
               
                 osc 
               
             
             ⋅ 
             
               R 
               
                 osc 
               
             
             ⋅ 
             
               
                 
                   T 
                   
                     OFF 
                   
                 
               
               
                 
                   T 
                   S 
                 
               
             
           
         
       
     
     where I osc  represents the current generated by current source  1002 , and R osc  represents the resistance of resistor  1004 . Since T OFF  may be determined by voltage V ramp  crossing V th_ramp , then 
     
       
         
           
             
               T 
               
                 OFF 
               
             
             = 
             
               C 
               R 
             
             
               
                 
                   V 
                   
                     th_ramp 
                   
                 
               
               
                 
                   I 
                   R 
                 
               
             
             = 
             
               
                 
                   I 
                   
                     osc 
                   
                 
               
               
                 
                   I 
                   R 
                 
               
             
             ⋅ 
             
               R 
               
                 osc 
               
             
             ⋅ 
             
               C 
               R 
             
             
               
                 
                   T 
                   
                     OFF 
                   
                 
               
               
                 
                   T 
                   S 
                 
               
             
           
         
       
     
      where C R  represents the capacitance of capacitor  1008 , and I R  represents the current generated by current source  1010 . From Equation 21, it follows that switching period T S  may be given by 
     
       
         
           
             
               T 
               S 
             
             = 
             
               
                 
                   I 
                   
                     osc 
                   
                 
               
               
                 
                   I 
                   R 
                 
               
             
             ⋅ 
             
               R 
               
                 osc 
               
             
             ⋅ 
             
               C 
               R 
             
           
         
       
     
     In some embodiments, since the mechanism that adjusts T OFF  responds to perturbations with a time constant R osc  • C osc  that is much larger than the switching period T S , the dynamics of a FOT-QFF-controlled system is substantially similar to that of an FOT-controlled system. 
     Some embodiments allow for changing the regulation setpoint of current I LED  in a continuous manner (analog dimming). In some embodiments, analog diming is achieved by reducing the current I ch . For example,  FIG.  12    shows a schematic diagram of reference generator  1200 , according to an embodiment of the present invention. Reference generator  226  may be implemented as reference generator  1200 . 
     Reference generator  1200  operates in a similar manner as reference generator  600 . Reference generator  1200 , however, includes current source  1202  for subtracting current I dim  from reference current I ch . Thus, in some embodiments, the average current I LED  may be given by 
     
       
         
           
             
               I 
               
                 LED 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
               
               
                 
                   g 
                   m 
                 
               
             
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             
               
                 
                   I 
                   
                     ch 
                   
                 
                 − 
                 
                   I 
                   
                     dim 
                   
                 
               
             
             ⋅ 
             
               R 
               t 
             
           
         
       
     
      where I dim  represents the current generated by current source  1202 . As shown by Equation 26, current I LED  may be reduced down to zero (by having I dim  equal I ch ). In some embodiments, dimming may be achieved by varying current I ch  and omitting current I dim . 
     In some embodiments, current source  1202  may be a voltage-controlled current source that generates current I dim  based on voltage V dim , and where voltage V dim  is received, e.g., from an input terminal of the control circuit (e.g.,  220 ). 
     In some embodiments, reference generator  926  may be modified to include current source  1202  in a similar manner as shown in  FIG.  12   . 
     Looking back to  FIG.  2   , the propagation delay ΔT from the time in which voltage Vq is equal to Vq ref , to the time power transistor  202  is turned off may not be insignificant. Delaying turning off power transistor  202  by ΔT may cause current I LED  to be larger than predicted by, e.g., Equations 11 and 26. The extra inductor current I L  (generated as a result of the additional time ΔT that power transistor  202  is on) may depend on the applied V in -V LED , thus, introducing a dependence on both V in  and V LED . For example, assuming that the turn-off condition of power transistor  202  occurs at time t 202_   off  = T ON  -ΔT, then it is possible to calculate the value of Vq ref_   202_off  at time t 202_off  as 
     
       
         
           
             
               
                 Vq 
               
               
                 ref_202_off 
               
             
             = 
             
               
                 
                   g 
                   m 
                 
               
               
                 
                   C 
                   x 
                 
               
             
             ⋅ 
             
               
                 
                   ∫ 
                   O 
                   
                     
                       T 
                       
                         ON 
                       
                     
                     − 
                     Δ 
                     T 
                   
                 
                 
                   Rs 
                 
               
             
             ⋅ 
             Isw 
             
               t 
             
             d 
             t 
             = 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
                 ⋅ 
                 
                   I 
                   
                     ch 
                   
                 
                 ⋅ 
                 
                   R 
                   t 
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             ⋅ 
             
               
                 
                   T 
                   
                     ON 
                   
                 
                 − 
                 Δ 
                 T 
               
             
           
         
       
     
      and I LED  (in CCM mode) may be given by 
     
       
         
           
             
               I 
               
                 LED_CCM 
               
             
             = 
             
               I 
               
                 LEDo 
               
             
             + 
             
               
                 
                   V 
                   
                     IN 
                   
                 
                 − 
                 
                   V 
                   
                     LED 
                   
                 
               
               
                 2 
                 L 
               
             
             ⋅ 
             Δ 
             T 
           
         
       
     
      where I LEDo  represents the average current I LED  determined by, e.g., Equation 15. 
     In some embodiments, voltage feedforward is used to compensate for propagation delay ΔT. For example, in some embodiments, a voltage feedforward circuit may inject a current I FF , to be summed with current Isw, based on voltage V ZCD  received from interface circuit  210 . For example,  FIG.  13    shows a schematic diagram of a portion of control circuit  1300  coupled to interface circuit  300 , according to an embodiment of the present invention. Control circuit  1300  includes diode  1302 , current mirror  1304 , current source  1306 , resistor  1308 , and transconductance amplifier  222 . Control circuit  220  may be implemented as control circuit  1300 . 
     In CCM mode, during the on-time T ON  of power transistor  202 , the voltage V 304  across auxiliary winding  304  may be given by 
     
       
         
           
             
               V 
               
                 304 
               
             
             = 
             − 
             
               
                 
                   
                     
                       V 
                       
                         in 
                       
                     
                     − 
                     
                       V 
                       
                         LED 
                       
                     
                   
                 
               
               n 
             
           
         
       
     
      where n represents the turn ration between the number of turns of inductor  204  and the number of turns of auxiliary winding  304 . Current I ZCD  may be given by 
     
       
         
           
             
               I 
               
                 ZCD 
               
             
             = 
             − 
             
               
                 
                   
                     
                       V 
                       
                         in 
                       
                     
                     − 
                     
                       V 
                       
                         LED 
                       
                     
                   
                 
               
               
                 n 
                 ⋅ 
                 
                   R 
                   
                     306 
                   
                 
               
             
           
         
       
     
      where R 306  represents the resistance of resistor  306 . 
     As shown by elements  1304  and  1306 , current I ZCD  is mirrored to generate current I FF , which causes an offset V 1308  that may be given by 
     
       
         
           
             
               V 
               
                 1308 
               
             
             = 
             
               R 
               
                 1308 
               
             
             ⋅ 
             
               I 
               
                 FF 
               
             
           
         
       
     
      where R 1308  represents the resistance of resistor  1308 . Thus, V qref_202 _ off  may be given by 
     
       
         
           
             
               
                 
                   Vq 
                   
                     ref_202_off 
                   
                 
                 = 
                 
                   
                     
                       g 
                       m 
                     
                   
                   
                     
                       C 
                       x 
                     
                   
                 
                 ⋅ 
               
             
             
               
                 
                   
                     
                       ∫ 
                       O 
                       
                         
                           T 
                           
                             ON 
                           
                         
                         − 
                         Δ 
                         T 
                       
                     
                     
                       
                         
                           Rs 
                           ⋅ 
                           Isw 
                           
                             t 
                           
                           + 
                           
                             V 
                             
                               1308 
                             
                           
                         
                       
                       d 
                       t 
                       = 
                       
                         
                           
                             g 
                             
                               m 
                               2 
                             
                           
                           ⋅ 
                           
                             I 
                             
                               ch 
                             
                           
                           ⋅ 
                           
                             R 
                             t 
                           
                         
                         
                           
                             C 
                             
                               TR 
                             
                           
                         
                       
                     
                   
                 
                 ⋅ 
                 
                   
                     
                       T 
                       
                         ON 
                       
                     
                     − 
                     Δ 
                     T 
                   
                 
               
             
           
         
       
     
      and current I LED  may be given by 
     
       
         
           
             
               I 
               
                 LED_CCM 
               
             
             = 
             
               I 
               
                 LEDo 
               
             
             + 
             
               
                 
                   V 
                   
                     IN 
                   
                 
                 − 
                 
                   V 
                   
                     LED 
                   
                 
               
               
                 2 
                 L 
               
             
             ⋅ 
             Δ 
             T- 
             
               
                 
                   V 
                   
                     1308 
                   
                 
               
               
                 Rs 
               
             
           
         
       
     
      In some embodiments, R 306  is selected to be 
     
       
         
           
             
               R 
               
                 306 
               
             
             = 
             
               2 
               n 
             
             ⋅ 
             
               
                 
                   R 
                   
                     1308 
                   
                 
                 ⋅ 
                 L 
               
               
                 Rs 
                 ⋅ 
                 Δ 
                 T 
               
             
           
         
       
     
      to cause I LED  to be equal to l LEDo , and, thus, advantageously compensate for the propagation delay ΔT. The same result advantageously also applies when buck converter  200  operates in DCM mode. 
     As shown in  FIG.  13   , interface circuit  210  may be implemented as interface circuit  300 . Other implementations are also possible. For example,  FIG.  14    shows a schematic diagram of a portion of control circuit  1300  coupled to interface circuit  400 , according to an embodiment of the present invention. 
     In CCM mode, during the on-time T ON  of power transistor  202 , the voltage V 404  across DC blocking capacitor  404  may be given by 
     
       
         
           
             
               V 
               
                 404 
               
             
             = 
             − 
             
               
                 
                   V 
                   
                     in 
                   
                 
                 − 
                 
                   V 
                   
                     LED 
                   
                 
               
             
           
         
       
     
      and current I ZCD  may be given by 
     
       
         
           
             
               I 
               
                 ZCD 
               
             
             = 
             − 
             
               
                 
                   
                     
                       V 
                       
                         in 
                       
                     
                     − 
                     
                       V 
                       
                         LED 
                       
                     
                   
                 
               
               
                 
                   R 
                   
                     406 
                   
                 
               
             
           
         
       
     
      where R 406  represents the resistance of resistor  406 . 
     Equations 31-33 similarly apply to the circuit of  FIG.  14   . In some embodiments, R 406  is selected to be 
     
       
         
           
             
               R 
               
                 406 
               
             
             = 
             2 
             ⋅ 
             
               
                 
                   R 
                   
                     1308 
                   
                 
                 ⋅ 
                 L 
               
               
                 Rs 
                 ⋅ 
                 Δ 
                 T 
               
             
           
         
       
     
      to cause I LED  to be equal to I LEDo , and, thus, advantageously compensate for the propagation delay ΔT. The same result advantageously also applies when buck converter  200  operates in DCM mode. 
     Advantages of some embodiments include enabling lighting engineers to design LED lamp drivers that meet market and regulatory requirements with less effort and at a lower cost. 
     In an embodiment, buck converter  200  is designed to receive a V in  between 108 V to 132 V, generate a voltage V LED  between 30 V to 90 V, produce an output current I LED  of 1A, having a diming range between 5% and 100%, and a programmable switching frequency F SW  above 100 kHz (e.g., at 130 kHz, 260 kHz, etc.), where inductor  204  has an inductance L of 200 µH, where output capacitor  232  has a capacitance of 2.2 µF and where resistor  208  has a sense resistance Rs of 0.2 Ω. In some embodiments, buck converter  200  includes current I ch  of 0.75 µA, resistance R t  of 4 MΩ, capacitances of C t , C x , and C TR  of 50 pF, 20 pF, and 20 pF, respectively, transconductance g m  and g m2  of 15 µS and 115 µS, respectively, and a dimming gain of 1/100 A/A. Other implementations are also possible. 
       FIG.  15    shows a schematic diagram of reference generator  1500 , according to an embodiment of the present invention. Reference generator  1500  includes current sources  1502   and  1516 , switches,  608 ,  618 , 620  and  626 , resistor  606 , capacitors  614 ,  628 , and  630 , OR gate  610 , AND gate  612 , one-shot circuit  622 , and delay circuit  624 . As shown in  FIG.  15   , Reference generator  1500  may be controlled by signals V Q  and  
     
       
         
           
             
               V 
               
                 Q 
                 ¯ 
               
             
           
         
       
     
     (e.g., from flip-flop  216 ) and signal V FW  (e.g., from ZCD  212 ). Reference generator  220  may be implemented as reference generator  1500 . 
     As shown in  FIG.  15   , capacitor  628  is charged with a constant current I ch  during turn-on time T ON . At a falling-edge of signal V Q , voltage V CTR  across capacitor  628  is transferred to capacitor  630 . Thus, voltage V CH  across capacitor  630  may be given by 
     
       
         
           
             
               V 
               
                 CH 
               
             
             = 
             
               V 
               
                 CTR 
               
             
             = 
             
               
                 
                   I 
                   
                     ch 
                   
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             ⋅ 
             
               T 
               
                 ON 
               
             
           
         
       
     
     Current I ch2 , thus, may be given by 
     
       
         
           
             
               I 
               
                 ch2 
               
             
             = 
             
               g 
               
                 m 
                 2 
               
             
             ⋅ 
             
               V 
               
                 CH 
               
             
             = 
             
               
                 
                   I 
                   
                     ch 
                   
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             ⋅ 
             
               T 
               
                 ON 
               
             
           
         
       
     
      where g m2  is the transconductance of voltage-controlled current source  1502 . 
     Considering DCM operation for simplicity, switch  608  is closed when inductor current I L  is greater than zero (during time interval T S  - T R ). Thus, in DCM mode, Vq ref  may be given by Equation 18. Thus, reference generator  1500  may be understood as equivalent to reference generator  600 . 
     In some embodiments, switch  618  may be omitted, e.g., by implementing current source  1516  as a voltage-controlled current source controlled by signal V Q . 
       FIG.  16    shows a schematic diagram of reference generators  1600 , according to an embodiment of the present invention. Reference generator  226  may be implemented as reference generator  1600 . Reference generator  1600  includes current sources  602  and  616 , switches  608 ,  620 , and  626 , resistor  606 , capacitors  614 ,  628 , and  630 , OR gate  610 , AND gate  612 , one-shot circuit  1622 , and delay circuit  624 . As shown in  FIG.  16   , Reference generator  1600  may be controlled by signals V Q  and V   Q    (e.g., from flip-flop  216 ) and signal V FW  (e.g., from ZCD  212 ). 
     Reference generator  1600  operates in a similar manner as reference generator  600 . In reference generator  1600 , however, capacitor  628  is charged during the whole switching period T S . Thus, voltage V CTR  may be given by 
     
       
         
           
             
               V 
               
                 CTR 
               
             
             = 
             
               
                 
                   I 
                   
                     ch2 
                   
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             . 
               
             
               T 
               S 
             
           
         
       
     
     Since voltage V CT  across capacitor  614  (which controls current I ch2 ) may be given by 
     
       
         
           
             
               V 
               
                 CT 
               
             
             = 
             
               R 
               t 
             
             ⋅ 
             
               I 
               
                 ch 
               
             
               
             ⋅ 
               
             
               
                 
                   T 
                   
                     ON 
                   
                 
               
               
                 
                   T 
                   S 
                 
                 − 
                 
                   T 
                   R 
                 
               
             
           
         
       
     
      voltage Vq ref , then, may be given by 
     
       
         
           
             
               
                 Vq 
               
               
                 ref 
               
             
             = 
             
               V 
               
                 CTR 
               
             
             = 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
                 ⋅ 
                 
                   R 
                   t 
                 
                 ⋅ 
                 
                   I 
                   
                     ch 
                   
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             ⋅ 
               
             
               T 
               
                 ON 
               
             
             ⋅ 
             
               
                 
                   T 
                   S 
                 
               
               
                 
                   T 
                   S 
                 
                 − 
                 
                   T 
                   R 
                 
               
             
           
         
       
     
      which is the same as Equation 18. Thus, reference generator  1600  may be understood as equivalent to reference generator  600 . 
     In some embodiments, one shot circuit  1622  is configured to produce a pulse of predetermined duration (e.g., 20 ns) when signal V Q  transitions from low to high. 
       FIG.  17    shows a schematic diagram of reference generators  1700 , according to an embodiment of the present invention. Reference generator  226  may be implemented as reference generator  1700 . Reference generator  1700  includes current sources  1502  and  1516 , switches,  608 ,  620  and  626 , resistor  606 , capacitors  614 ,  628 , and  630 , OR gate  610 , AND gate  612 , one-shot circuit  1622 , and delay circuit  624 . As shown in  FIG.  17   , Reference generator  1700  may be controlled by signals V Q  and V Q  (e.g., from flip-flop  216 ) and signal V FW  (e.g., from ZCD  212 ). 
     Reference generator  1700  operates in a similar manner as reference generator  1500 . In reference generator  1700 , however, capacitor  628  is charged during the whole switching period T S . Thus, Equations 40-42 apply to reference generator  1700 . Thus, reference generator  1700  may be understood as equivalent to reference generator  600 . 
     In some embodiments in which current I ch  is fixed, it can be derived from Equations 11 and 16 that 
     
       
         
           
             β 
             = 
             
               
                 
                   I 
                   
                     LED 
                   
                 
               
               
                 
                   I 
                   
                     ch 
                   
                 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
               
               
                 
                   g 
                   m 
                 
               
             
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   C 
                   
                     RT 
                   
                 
               
             
             ⋅ 
             
               R 
               t 
             
           
         
       
     
      where β is a constant. Thus, in some embodiments, current I LED  is proportional to a fixed, internally generated current I ch , where the proportionality coefficient β can be set by a user by selecting the value of resistance Rs. As previously shown, regulation of current I LED  may be achieved by measuring only a portion of inductor current I L  (the part that flows through power transistor  202 ), and reconstructing the missing portion based on the on (T ON ) and off (T OFF ) times of power transistor  202  (in CCM mode), and based on time (T ON ) of power transistor  202  and the demagnetization time (T FW ) (in DCM mode). In some embodiments, the information of the on and off times of power transistor  202  and of demagnetization time T FW  is encoded in signals V Q , V   Q   , and V FW , and is used to control switches of reference generator  226  (e.g., switches  608 ,  618 ,  620 ,  626 ) as well as other switches of the control circuit (e.g., switches  228 ,  1012 ,  1014 ). 
     As illustrated in  FIG.  6   , in some embodiments, switch  608  may be controlled by signals V Q  OR (V   Q    AND V FW ) to achieve a constant average current I L , e.g., to be used in LED driving or battery charging (e.g., by replacing LED string  106  with a rechargeable battery). 
     The inventors realized that changing the control logic of some of the switches (e.g., switches  608 ,  618 ) of control circuit  220  may allow using control circuit  220  for regulating output current (I LED ) in topologies different than a buck converter (e.g., boost, buck-boost, flyback). 
       FIGS.  18 - 20    show schematic diagrams of switching converters, according to embodiments of the present invention. 
       FIG.  18    shows a schematic diagram of CCM/DCM boost converter  1800 , according to an embodiment of the present invention. Boost converter  1800  includes control circuit  1820 , power transistor  202 , diode  1810 , output capacitor  1812 , inductor  204 , interface circuit  210 , and resistors  208 . In some embodiments, boost converter  1800  regulates average current I LED , e.g., for driving a LED string or recharging a battery, while keeping voltage V LED  higher than voltage V in . In some embodiments, voltage V in  may be voltage V 102  (e.g., received from converter  102 ). 
     As shown in  FIG.  18   , control circuit  1820  operates in a similar manner as control circuit  220  when reference generator  226  is implemented as reference generator  600 . Control circuit  1820 , however, controls switch  608  with signal V FW  instead of using signal V 608 . 
     As can be seen from  FIG.  18   , voltage Vq may be given by 
     
       
         
           
             Vq 
               
             ∝ 
               
             
               I 
               
                 LED 
               
             
               
             ⋅ 
             Rs 
             ⋅ 
             
               
                 
                   T 
                   S 
                 
               
               
                 
                   T 
                   
                     FW 
                   
                 
               
             
             ⋅ 
             
               T 
               
                 ON 
               
             
           
         
       
     
      and Vqref may be given by 
     
       
         
           
             
               
                 Vq 
               
               
                 ref 
               
             
               
             ∝ 
               
             
               
                 
                   T 
                   S 
                 
               
               
                 
                   T 
                   
                     FW 
                   
                 
               
             
             ⋅ 
             
               T 
               
                 ON 
               
             
           
         
       
     
      Thus, average output current I LED  may be given by 
     
       
         
           
             
               I 
               
                 LED 
               
             
             = 
             
               1 
               
                 Rs 
               
             
             ⋅ 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
               
               
                 
                   g 
                   m 
                 
               
             
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             ⋅ 
             
               I 
               
                 ch 
               
             
             ⋅ 
             
               R 
               t 
             
           
         
       
     
      which is identical to Equation 11 when a is given by Equation 16. 
       FIG.  19    shows a schematic diagram of CCM/DCM buck-boost converter  1900 , according to an embodiment of the present invention. Buck-boost converter  1900  includes control circuit  1820 , power transistor  202 , diode  1810 , output capacitor  1812 , inductor  204 , interface circuit  210 , and resistor  208 . In some embodiments, buck-boost converter  1900  regulates current I LED , e.g., for driving a LED string or recharging a battery. In some embodiments, voltage V in  may be voltage V 102  (e.g., received from converter  102 ). 
     As shown in  FIG.  19   , the same control circuit  1820  may be used for buck-boost operation by changing the way diode  1810 , capacitor  1812 , and load  106  are connected. Equations 44-46 also apply to buck-boost converter  1900 . 
       FIG.  20    shows a schematic diagram of CCM/DCM flyback converter  2000 , according to an embodiment of the present invention. Flyback converter  2000  includes control circuit  1820 , power transistor  202 , diode  1810 , output capacitor  1812 , transformer  2000 , interface circuit  210 , and resistor  208 . In some embodiments, flyback converter  2000  regulates current I LED , e.g., for driving a LED string or recharging a battery. In some embodiments, voltage V in  may be voltage V 102  (e.g., received from converter  102 ). 
     As shown in  FIG.  20   , the same control circuit  1820  may be used for flyback operation by replacing inductor  204  with transformer  2002 , and changing the way diode  1810 , capacitor  1812 , and load  106  are connected. 
     Equations 44 and 45 also apply to flyback converter  2000 . Average output current I LED  may be given by 
     
       
         
           
             
               I 
               
                 LED 
               
             
             = 
             
               n 
               
                 Rs 
               
             
             ⋅ 
             
               
                 
                   g 
                   
                     m 
                     2 
                   
                 
               
               
                 
                   g 
                   m 
                 
               
             
             ⋅ 
             
               
                 
                   C 
                   x 
                 
               
               
                 
                   C 
                   
                     TR 
                   
                 
               
             
             ⋅ 
             
               I 
               
                 ch 
               
             
             ⋅ 
             
               R 
               t 
             
           
         
       
     
      where n represents the turn ratio  
     
       
         
           
             
               
                 n 
                 = 
                 
                   
                     
                       N 
                       P 
                     
                   
                   
                     
                       N 
                       S 
                     
                   
                 
               
             
           
         
       
     
     of transformer  2002 , where N P  represents the number of turns of primary winding  204 , and N S  represents the number of turns of secondary winding  2004 . 
     Advantages of some embodiments include using a single-loop system, in contrast with conventional average current mode control methods that use two nested loops, each requiring frequency compensation. Using a single loop system may advantageously result in a simpler and lower cost implementation. 
     Additional advantages of some embodiments include more versatility, since some embodiments may control the entire inductor current I L  or only part of it, which may advantageously allow usage of some embodiments for various purposes (e.g., controlling output voltage V LED ). 
     Example embodiments of the present invention are summarized here. Other embodiments can also be understood from the entirety of the specification and the claims filed herein. 
     Example 1. A control circuit including: an output terminal configured to be coupled to a control terminal of a first transistor that has a current path coupled to an inductor; a transconductance amplifier configured to produce a sense current based on a current flowing through the current path of the first transistor; and a first capacitor, where the control circuit is configured to: turn on the first transistor based on a clock signal, integrate the sense current with an integrating capacitor to generate a first voltage, generate a first current, generate a second voltage across the first capacitor based on the first current, generate a second current based on the second voltage, generate a third voltage based on the second current, turn off the first transistor when the first voltage becomes higher than the third voltage; discharge the integrating capacitor when the first transistor turns off; and regulate an average output current flowing through the inductor based on the first current. 
     Example 2. The control circuit of example 1, where the transconductance amplifier includes a first input configured to receive a sense voltage indicative of a current flowing through a current path of the first transistor, a second input configured to receive a reference voltage, and an output configured to deliver the sense current. 
     Example 3. The control circuit of one of examples 1 or 2, further including: a first current generator configured to generate the first current, the first current generator coupled to the first capacitor at a first node; and a first resistor coupled between the first node and a reference supply terminal. 
     Example 4. The control circuit of one of examples 1 to 3, further including a first switch coupled in series with the first resistor, where the control circuit is configured to control the first switch based on a freewheeling signal indicative of a demagnetization of the inductor. 
     Example 5. The control circuit of one of examples 1 to 4, where the control circuit is configured to: control the first transistor using a first signal; and control the first switch based on the freewheeling signal and based on the first signal. 
     Example 6. The control circuit of one of examples 1 to 5, further including a zero crossing detection circuit having an input configured to be coupled to a first current path terminal of the first transistor, where the zero crossing detection circuit is configured to generate the freewheeling signal based on the input of the zero crossing detection circuit. 
     Example 7. The control circuit of one of examples 1 to 6, where the zero crossing detection circuit includes: a first comparator having a first input coupled to the input of the zero crossing detection circuit, and a second input coupled to the input of the zero crossing detection circuit via a low-pass filter; and a second flip-flop having a first input coupled to an output of the first comparator, and an output configured to deliver the freewheeling signal. 
     Example 8. The control circuit of one of examples 1 to 7, where the control circuit is configured to generate the third voltage at a second node, the control circuit further including: a second current generator configured to generate the second current; a second switch coupled between the second current generator and the second node; and a third switch coupled between the second node and the reference supply terminal. 
     Example 9. The control circuit of one of examples 1 to 8, further including: a one-shot circuit having an output configured to control the second switch; and a delay circuit configured to control the third switch based on the output of the one-shot circuit. 
     Example 10. The control circuit of one of examples 1 to 9, further including: a fourth switch coupled between the second current generator and a third node that is coupled between the second switch and the third switch; a second capacitor is coupled between the third node and the reference supply terminal; and a third capacitor coupled between the second node and the reference supply terminal, where the control circuit is configured to generate the third voltage across the third capacitor. 
     Example 11. The control circuit of one of examples 1 to 10, where the control circuit is configured to generate the third voltage at a second node, the control circuit further including: a first current generator configured to generate the second current, the first current generator coupled to the second node; a first resistor coupled between the second node and a reference supply terminal; and a first switch coupled in series with the first resistor, where the control circuit is configured to control the first switch based on a freewheeling signal indicative of a demagnetization of the inductor. 
     Example 12. The control circuit of one of examples 1 to 11, further including: a first comparator having a first input configured to receive the first voltage, a second input configured to receive the third voltage; and a first flip-flop having a first output coupled to the output terminal, a first input configured to receive the clock signal, and a second input coupled to an output of the first comparator. 
     Example 13. The control circuit of one of examples 1 to 12, further including a current mirror configured to be coupled to a first current path terminal of the first transistor via an interface circuit, where the current mirror is configured to inject a first current into a first input of the transconductance amplifier based on a current flowing through the interface circuit. 
     Example 14. The control circuit of one of examples 1 to 13, further including a sense resistor coupled between first and second inputs of the transconductance amplifier. 
     Example 15. The control circuit of one of examples 1 to 14, further including a clock circuit configured to generate the clock signal. 
     Example 16. The control circuit of one of examples 1 to 15, where the clock circuit is configured to generate the clock signal with a fixed frequency. 
     Example 17. The control circuit of one of examples 1 to 16, where the clock circuit includes: a first switch having a first terminal configured to receive an oscillator current; a first resistor coupled to a second terminal of the first switch; a second capacitor coupled to the first resistor; a first comparator having a first input coupled to the second terminal of the first switch, and an output configured to deliver the clock signal; a third capacitor coupled to a second input of the first comparator; a first current generator coupled to the third capacitor and to the second input of the first comparator; and a second switch coupled across the third capacitor. 
     Example 18. The control circuit of one of examples 1 to 17, where the control circuit is integrated in a single integrated circuit. 
     Example 19. The control circuit of one of examples 1 to 18, further including a gate driver having an input coupled to the output terminal, and where the first transistor is a power metal-oxide semiconductor field-effect transistor (MOSFET) or GaN transistor having a gate coupled to an output of the gate driver. 
     Example 20. A method for regulating an average output current flowing through an inductor, the method including: turning on a power transistor based on a clock signal, where a current path of the power transistor is coupled to the inductor; generating a sense current based on a current flowing through the current path of the power transistor; integrating the sense current with an integrating capacitor to generate a first voltage; generating a first current; generating a second voltage across a first capacitor based on the first current; generating a second current based on the second voltage; generating a third voltage across a second capacitor based on the second current; turning off the power transistor when the first voltage becomes higher than the third voltage; discharging the integrating capacitor when the power transistor turns off; and regulating the average output current based on the first current. 
     Example 21. The method of example 20, further including generating a sense voltage based on the current flowing through the current path of the power transistor, where generating the sense current includes generating the sense current based on the sense voltage using a transconductance amplifier. 
     Example 22. The method of one of examples 20 or 21, further including: generating the first current with a first current generator; detecting a demagnetization time of the inductor; and controlling a first switch based on the detected demagnetization time, the first switch coupled to the first current generator via a first resistor. 
     Example 23. The method of one of examples 20 to 22, where the average output current is proportional to the first current. 
     Example 24. The method of one of examples 20 to 23, further including varying a switching frequency of the power transistor without causing a substantial change in a magnitude of the average output current. 
     Example 25. The method of one of examples 20 to 24, where the second voltage is substantially constant. 
     Example 26. A switching converter including: a power transistor; a sense resistor coupled to a current path of the power transistor; an inductor coupled to the current path of the power transistor; a driver having an output coupled to a control terminal of the power transistor; a flip-flop having a first output coupled to an input of the driver, and a first input configured to receive a clock signal, where the flip-flop is configured to produce a first signal at the first output of the flip-flop, and where the flip-flop is configured to cause the power transistor to turn on using the first signal based on the clock signal; a first comparator having an output coupled to a second input of the flip-flop, where the flip-flop is configured to cause the power transistor to turn off using the first signal based on the output of the first comparator; a transconductance amplifier having a first and second inputs respectively coupled to first and second terminals of the sense resistor, and an output coupled to a first input of the first comparator; an integrating capacitor coupled to the output of the transconductance amplifier and to the first input of the first comparator; a first switch coupled to the integrating capacitor, the first switch configured to discharge the integrating capacitor when the power transistor turns off; a zero crossing detection circuit having an input coupled to the current path of the power transistor and to the inductor, where the zero crossing detection circuit is configured to generate a freewheeling signal based on a demagnetization of the inductor; a first current generator configured to generate a first current, the first current generator coupled to a first capacitor at a first node; a first resistor coupled between the first node and a reference supply terminal; a second switch coupled in series with the first resistor and configured to be controlled based on the freewheeling signal; a second current generator configured to generate a second current based on a voltage at the first node; a third switch coupled between the second current generator and a second input of the transconductance amplifier; and a fourth switch coupled between the third switch and the reference supply terminal. 
     Example 27. The switching converter of example 26, further including: a one-shot circuit having an input configured to receive the first signal, and an output configured to control the third switch; and a delay circuit configured to control the fourth switch based on the output of the one-shot circuit. 
     Example 28. The switching converter of one of examples 26 or 27, further including: an input terminal configured to receive an input voltage, the input terminal configured to be coupled to a first terminal of a load; and a diode coupled between a first terminal of the inductor and the input terminal, where a second terminal of the inductor is configured to be coupled to a second terminal of the load. 
     Example 29. The switching converter of one of examples 26 to 28, further including the load, where the load includes a light emitting diode (LED) string. 
     While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.