Patent Publication Number: US-7903073-B2

Title: Display and method of transmitting image data therein

Description:
RELATED APPLICATIONS 
     This application claims priority to Taiwan Patent Application Serial Number 96137563, filed Oct. 5, 2007, which is herein incorporated by reference. 
     BACKGROUND 
     1. Field of Invention 
     The present invention relates to a display and a method of transmitting image data therein. More particularly, the present invention relates to a method of transmitting image data of a liquid crystal display by using timing controllers and source drivers to perform data transmission and data distribution. 
     2. Description of Related Art 
     For a conventional liquid crystal display, image data can be transmitted only by a dual-port low voltage differential signaling (LVDS) transmission interface, and thus a timing controller which receives and transmits the image data in the liquid crystal display is also designed to have a dual-port LVDS transmission interface to meet the requirement for data transmission. 
     However, if the display resolution or frequency increases, the conventional dual-port LVDS transmission interface used for data transmission is not enough and is replaced by a quad-port LVDS transmission interface. As a result, two timing controllers with dual-port LVDS transmission interface are necessary to meet the requirement for data transmission. 
     Furthermore, when the quad-port LVDS transmission interface is used for data transmission, the condition of data transmission and data distribution is different from that of the dual-port LVDS transmission interface. Therefore, when the quad-port LVDS transmission interface is used for data transmission, the image data has to be distributed by a data distributor, and then transmitted to source drivers through two timing controllers, respectively. Accordingly, the production cost of the liquid crystal display will also increase, and the data transmission will become more complicated. 
     SUMMARY 
     In accordance with one embodiment of the present invention, a method of transmitting image data in a display is provided, in which the image data includes a plurality of pixel values. The method comprises the steps of transmitting a first portion of the pixel values of the image data to a first timing controller, in which the first portion of the pixel values of the image data includes the pixel values of at least two non-adjacent pixels; transmitting a second portion of the pixel values of the image data to a second timing controller, in which the second portion of the pixel values of the image data includes the pixel values of at least two non-adjacent pixels; transmitting a part of the first portion of the pixel values of the image data to one of a plurality of drivers by the first timing controller; and transmitting respectively a part of the second portion of the pixel values of the image data to one of the drivers by the second timing controller. 
     In accordance with another embodiment of the present invention, a display is provided. The display includes a first timing controller, a second timing controller and a plurality of drivers. The first timing controller receives and transmits a first portion of a plurality of pixel values, in which the first portion of the pixel values includes the pixel values of at least two non-adjacent pixels. The second timing controller receives and transmits a second portion of the pixel values, in which the second portion of the pixel values includes the pixel values of at least two non-adjacent pixels. Each of the drivers receives respectively a part of the first portion of the pixel values delivered by the first timing controller and a part of the second portion of the pixel values delivered by the second timing controller. 
     For the foregoing embodiments of the present invention, the display and the method of transmitting image data therein can be applied without a data distributor, so as to reduce the production cost and increase the efficiency of the data transmission as well. 
     It is to be understood that both the foregoing general description and the following detailed description are by examples, and are intended to provide further explanation of the invention as claimed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention can be more fully understood by reading the following detailed description of the embodiments, with reference to the accompanying drawings as follows: 
         FIG. 1  shows one embodiment of the present invention; 
         FIG. 2  shows the data transmission of the control circuit, as shown in  FIG. 1 , for receiving the pixel values through the LVDS transmission interface according to one embodiment of the present invention; 
         FIG. 3  shows the data transmission of the first timing controller, as shown in  FIG. 1 , for receiving and transmitting the pixel values according to one embodiment of the present invention; 
         FIG. 4  shows the data transmission of the second timing controller, as shown in  FIG. 1 , for receiving and transmitting the pixel values according to one embodiment of the present invention; 
         FIG. 5  shows the data transmission of the control circuit, as shown in  FIG. 1 , for receiving the pixel values through the LVDS transmission interface according to another embodiment of the present invention; 
         FIG. 6  shows the data transmission of the first timing controller, as shown in  FIG. 1 , for receiving and transmitting the pixel values according to another embodiment of the present invention; 
         FIG. 7  shows the data transmission of the second timing controller, as shown in  FIG. 1 , for receiving and transmitting the pixel values according to another embodiment of the present invention; and 
         FIG. 8  shows a flow chart of the method of transmitting the image data in the liquid crystal display shown in  FIG. 1 . 
     
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     In the following detailed description, the embodiments of the present invention have been shown and described. As will be realized, the invention is capable of modification in various respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not restrictive. 
       FIG. 1  shows one embodiment of the present invention. The liquid crystal display  100  includes a control circuit  110 , a plurality of source drivers  120 , a plurality of gate drivers (GD)  130  and a display panel  140 , in which the control circuit  110  further comprises a first timing controller  112  and a second timing controller  114 . The control circuit  110  receives a plurality of pixel values of the image data through the input channels, i.e. CH_ 1 , CH_ 2 , CH_ 3  and CH_ 4 , for instance not limited to the number, of a quad-port low voltage differential signaling (LVDS) transmission interface. The first timing controller  112  receives and transmits a first portion of the pixel values of the image data, and the second timing controller  114  receives and transmits a second portion of the pixel values of the image data, in which the first and second portion of the pixel values both include the pixel values of at least two non-adjacent pixels. Each of the source drivers  120  has at least two inputs respectively receiving a part of the first portion of the pixel values delivered by the first timing controller  112  and a part of the second portion of the pixel values delivered by the second timing controller  114 , and also receives the clock signals respectively transmitted by the first timing controller  112  and the second timing controller  114 . 
     Furthermore, the first portion of the pixel values of the image data, which is received and transmitted by the first timing controller  112 , is different from the second portion of the pixel values of the image data, received and transmitted by the second timing controller  114 . Each of the source drivers  120  sequentially and alternately receives the first portion of the pixel values and the second portion of the pixel values. In one embodiment, the first portion of the pixel values includes a plurality of odd pixel values, and the second portion of the pixel values includes a plurality of even pixel values. 
     An embodiment is referred to as follows to describe the data transmission in  FIG. 1 .  FIG. 2  shows the data transmission of the control circuit  110  in  FIG. 1  for receiving the pixel values through the LVDS transmission interface according to one embodiment of the present invention.  FIG. 3  shows the data transmission of the first timing controller  112  in  FIG. 1  for receiving and transmitting the pixel values according to one embodiment of the present invention.  FIG. 4  shows the data transmission of the second timing controller  114  in  FIG. 1  for receiving and transmitting the pixel values according to one embodiment of the present invention. Refer to  FIGS. 1 ,  2 ,  3  and  4 . In the present embodiment, the image data includes  1920  pixel values, and these pixel values are transmitted to the source drivers SD_ 1 , SD_ 2  . . . and SD_ 8 , respectively. First, the image data is transmitted to the control circuit  110  through the LVDS input channels, i.e. CH_ 1 , CH_ 2 , CH_ 3  and CH_ 4 , in which the pixel values  1 ,  5 , . . . and  1917  and the pixel values  3 ,  7 , . . . and  1919  are transmitted to the first timing controller  112  through the input channels CH_ 1  and CH_ 2 , respectively, and the pixel values  2 ,  6 , . . . and  1918  and the pixel values  4 ,  8 , . . . and  1920  are transmitted to the second timing controller  114  through the input channels CH_ 3  and CH_ 4 , respectively. 
     After the first timing controller  112  receives the pixel values, the received pixel values are separated into four parts, i.e. LV 1 [0-3], LV 1 [4-7], RV 1 [0-3] and RV 1 [4-7], for transmission, in which LV 1 [0-3] represents the pixel values  1 ,  3 , . . . and  479 ; LV 1 [4-7] represents the pixel values  481 ,  483 , . . . and  959 ; RV 1 [0-3] represents the pixel values  961 ,  963 , . . . and  1439 ; and RV 1 [4-7] represents the pixel values  1441 ,  1443 , . . . and  1919 . The pixel values of LV 1 [0-3] and LV 1 [4-7] are transmitted to the source drivers SD_ 1 , SD_ 2 , SD_ 3  and SD_ 4 , respectively, through the flexible flat cable (FFC)  116 . The pixel values of RV 1 [0-3] and RV 1 [4-7] are transmitted to the source drivers SD_ 5 , SD_ 6 , SD_ 7  and SD_ 8 , respectively, through the FFC  116 . 
     At the same time, after the second timing controller  114  receives the pixel values, the received pixel values are also separated into four parts, i.e. LV 2 [0-3], LV 2 [4-7], RV 2 [0-3] and RV 2 [4-7], for transmission, in which LV 2 [0-3] represents the pixel values  2 ,  4 , . . . and  480 ; LV 2 [4-7] represents the pixel values  482 ,  484 , . . . and  960 ; RV 2 [0-3] represents the pixel values  962 ,  964 , . . . and  1440 ; and RV 2 [4-7] represents the pixel values  1442 ,  1444 , . . . and  1920 . The pixel values of LV 2 [0-3] and LV 2 [4-7] are transmitted to the source drivers SD_ 1 , SD_ 2 , SD_ 3  and SD_ 4 , respectively, through the FFC  116 . The pixel values of RV 2 [0-3] and RV 2 [4-7] are transmitted to the source drivers SD_ 5 , SD_ 6 , SD_ 7  and SD_ 8 , respectively, through the FFC  116 . 
     After that, the corresponding gate drivers (GD)  130  turn on the pixels according to the clock signals transmitted by the first timing controller  112  and the second timing controller  114 , then the source drivers  120  transmit the pixel values to the corresponding pixels such that the pixel values  1 ,  2 ,  3 , . . . and  1920  are sequentially displayed on the display panel  140 . 
     Another embodiment is described as follows.  FIG. 5  shows the data transmission of the control circuit  110 , as shown in  FIG. 1 , for receiving the pixel values through the LVDS transmission interface according to another embodiment of the present invention.  FIG. 6  shows the data transmission of the first timing controller  112 , as shown in  FIG. 1 , for receiving and transmitting the pixel values according to another embodiment of the present invention.  FIG. 7  shows the data transmission of the second timing controller  114 , as shown in  FIG. 1 , for receiving and transmitting the pixel values according to another embodiment of the present invention. Refer to  FIGS. 1 ,  5 ,  6  and  7 . Similarly, in the present embodiment, the image data including  1920  pixel values is transmitted to the control circuit  110  through the LVDS input channels, i.e. CH_ 1 , CH_ 2 , CH_ 3  and CH_ 4 , in which the pixel values  1 ,  3 , . . . and  959  and the pixel values  961 ,  963 , . . . and  1919  are transmitted to the first timing controller  112  through the input channels CH_ 1  and CH_ 2 , respectively, and the pixel values  2 ,  4 , . . . and  960  and the pixel values  962 ,  964 , . . . and  1920  are transmitted to the second timing controller  114  through the input channels CH_ 3  and CH_ 4 , respectively; that is, the first timing controller  112  receives the odd pixel values, and the second timing controller  114  receives the even pixel values. 
     Similarly, after the first timing controller  112  receives the pixel values, the received pixel values are separated into four parts, i.e. LV 1 [0-3], LV 1 [4-7], RV 1 [0-3] and RV 1 [4-7], for transmission, in which LV 1 [0-3] represents the pixel values  1 ,  3 , . . . and  479 ; LV 1 [4-7] represents the pixel values  481 ,  483 , . . . and  959 ; RV 1 [0-3] represents the pixel values  961 ,  963 , . . . and  1439 ; and RV 1 [4-7] represents the pixel values  1441 ,  1443 , . . . and  1919 . The pixel values of LV 1 [0-3] and LV 1 [4-7] are transmitted to the source drivers SD_ 1 , SD_ 2 , SD_ 3  and SD_ 4 , respectively, through the FFC  116 . The pixel values of RV 1 [0-3] and RV 1 [4-7] are transmitted to the source drivers SD_ 5 , SD_ 6 , SD_ 7  and SD_ 8 , respectively, through the FFC  116 . 
     At the same time, after the second timing controller  114  receives the pixel values, the received pixel values are similarly separated into four parts, i.e. LV 2 [0-3], LV 2 [4-7], RV 2 [0-3] and RV 2 [4-7], for transmission, in which LV 2 [0-3] represents the pixel values  2 ,  4 , . . . and  480 ; LV 2 [4-7] represents the pixel values  482 ,  484 , . . . and  960 ; RV 2 [0-3] represents the pixel values  962 ,  964 , . . . and  1440 ; and RV 2 [4-7] represents the pixel values  1442 ,  1444 , . . . and  1920 . The pixel values of LV 2 [0-3] and LV 2 [4-7] are transmitted to the source drivers  120  SD_ 1 , SD_ 2 , SD_ 3  and SD_ 4 , respectively, through the FFC  116 . The pixel values of RV 2 [0-3] and RV 2 [4-7] are transmitted to the source driversl 20  SD_ 5 , SD_ 6 , SD_ 7  and SD_ 8 , respectively, through the FFC  116 . 
     After that, the gate drivers  130  turn on the pixels according to the clock signals transmitted by the first timing controller  112  and the second timing controller  114 , then the source drivers  120  transmit the pixel values to the corresponding pixels such that the pixel values  1 ,  2 ,  3  . . .  1920  are sequentially displayed on the display panel  140 . 
       FIG. 8  shows a flow chart of the method of transmitting the image data in the liquid crystal display shown in  FIG. 1 . Refer to  FIGS. 1 and 8 . First, in step  800 , the first portion of a plurality of pixel values of the image data is transmitted to the first timing controller  112 , in which the first portion of the pixel values includes the pixel values of at least two non-adjacent pixels. Then, in step  802 , the second portion of the pixel values of the image data is transmitted to the second timing controller  114 , in which the second portion of the pixel values includes the pixel values of at least two non-adjacent pixels. The sequence of Step  800  and Step  802  are not limited as shown in  FIG. 8 ; instead, both Step  800  and Step  802  can be performed at the same time or alternately. Moreover, the first portion of the pixel values transmitted to the first timing controller  112  is different from the second portion of the pixel values transmitted to the second timing controller  114 . In one embodiment, the first portion of the pixel values includes a plurality of odd pixel values, and the second portion of the pixel values includes a plurality of even pixel values. 
     After that, in Step  804 , a part of the first portion of the pixel values is transmitted to one corresponding source driver  120  by the first timing controller  112 , and then a part of the second portion of the pixel values is transmitted to one corresponding source driver  120  by the second timing controller  114  (Step  806 ). Similarly, the sequence of Step  804  and Step  806  are not limited as shown in  FIG. 8 ; instead, both Step  804  and Step  806  can be performed at the same time or alternately. 
     As a result, the pixel values of the image data are not required to be distributed by the data distributor and then transmitted by the timing controllers. Instead, the pixel values can be directly received by the timing controllers and then delivered to the corresponding source drivers; that is, each of the source drivers receives the pixel values delivered by two timing controllers, and then sequentially outputs the received pixel values to be displayed. 
     For the foregoing embodiments of the present invention, the liquid crystal display and the method of transmitting image data therein can be applied to directly receive the image data by the timing controllers through the LVDS transmission interface, and to transmit the image data to the source drivers, respectively, so as to save an extra data distributor in the liquid crystal display, reduce the production cost, simplify the data transmission, and increase the efficiency of the data transmission. 
     As is understood by a person skilled in the art, the foregoing embodiments of the present invention are illustrative of the present invention rather than limiting of the present invention. It is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims, the scope of which should be accorded the broadest interpretation so as to encompass all such modifications and similar structures.