Patent Publication Number: US-8970297-B2

Title: Reconfigurable input power distribution doherty amplifier with improved efficiency

Description:
BACKGROUND 
     1. Field 
     The present application relates generally to the operation and design of wireless devices, and more particularly, to the operation and design of power amplifiers. 
     2. Background 
     There is an increasing demand to have wireless devices capable of low power operation to provide extended talk times. One key to achieving lower power consumption is associated with the performance of the device&#39;s power amplifier (PA). For example, highly linear and efficient power amplifiers can be used to maximize the standby and talk times for a handset. However, in conventional PA designs, efficiency is generally high only at high output levels. When lower output levels are needed, typically for complex modulation like OFDM, the efficiency drops substantially. 
     A Doherty power amplifier has been used to improve the average power efficiency. The Doherty power amplifier has a power splitter that splits the input power into a main amplifier and an auxiliary amplifier. However, during operation when the auxiliary amplifier is not turned on, the signal power directed to it is wasted thereby reducing efficiency. Therefore, what is needed is a way to optimize the input power distribution in a Doherty amplifier, thereby utilizing all the input power which will increase the total power efficiency. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The foregoing aspects described herein will become more readily apparent by reference to the following description when taken in conjunction with the accompanying drawings wherein: 
         FIG. 1  illustrates an exemplary embodiment of an improved Doherty power amplifier for millimeter (MM) wave applications; 
         FIG. 2  shows an exemplary embodiment of a hybrid plus coupler; 
         FIG. 3  shows an exemplary embodiment of a hybrid ring coupler; 
         FIG. 4  shows an exemplary graph that illustrates the increase in efficiency provided by exemplary embodiments of the improved Doherty amplifier of  FIG. 1 ; 
         FIG. 5  shows an exemplary method for providing increased efficiency from a Doherty amplifier; and 
         FIG. 6  shows an exemplary embodiment of a Doherty amplifier apparatus configured for increased efficiency. 
     
    
    
     DETAILED DESCRIPTION 
     The detailed description set forth below in connection with the appended drawings is intended as a description of exemplary embodiments of the invention and is not intended to represent the only embodiments in which the invention can be practiced. The term “exemplary” used throughout this description means “serving as an example, instance, or illustration,” and should not necessarily be construed as preferred or advantageous over other exemplary embodiments. The detailed description includes specific details for the purpose of providing a thorough understanding of the exemplary embodiments of the invention. It will be apparent to those skilled in the art that the exemplary embodiments of the invention may be practiced without these specific details. In some instances, well known structures and devices are shown in block diagram form in order to avoid obscuring the novelty of the exemplary embodiments presented herein. 
       FIG. 1  illustrates an exemplary embodiment of an improved Doherty power amplifier  100  for millimeter (MM) wave applications. The amplifier  100  is suitable for use in a wireless handset or other portable device and also for use in a base station or any other wireless communication apparatus. 
     The amplifier  100  comprises a power splitter  102  that receives a MM wave input signal (P IN ). A power detector  104  detects power on the input and provides a detection signal  106  to a controller  108 . A first output (split signal)  110  of the splitter  102  is input to the “A” input of a hybrid plus coupler  112 . A second output (split signal)  114  of the splitter  102  is input to a phase shifter  116 . The phase shifted output signal  132  of the phase shifter  116  is a phase shifted version of the second split signal  114  and is input to the “C” input of the hybrid plus coupler  112 . Both outputs of the splitter  102  have power levels that are 3 dB less than the input signal (P IN ) power level. 
     In an exemplary embodiment, the hybrid plus coupler  112  comprises a ¼ wavelength extension  118 . This extension is used to provide a 90 degree phase shift. The extension  118  can be constructed by distributed elements, like transmission lines, or using lumped elements, like LC filters. In another embodiment, the hybrid plus coupler  108  comprise a 180 degree ring coupler as discussed below. 
     The hybrid plus coupler  112  has a first output at terminal “B” coupled to a main power amplifier (PA 1 )  120  and a second output at terminal “D” coupled to an auxiliary power amplifier (PA 2 )  122 . The output of the first power amplifier  120  is input to a (¼ wavelength phase shifter)  124  that is used to equalize the total phase shift from P IN  to P OUT  between the PA 1  signal path and the PA 2  signal path. The output of the phase shifter  124  and second power amplifier  122  are coupled together to produce the output power signal (P OUT ). 
     During operation, the hybrid plus coupler  112  generates first and second combinations of the phase shifted version signal  132  and the millimeter wave second signal  110 . For example, the combinations of the input signals are provided at first and second output terminals (B and D), respectively. The first and second combinations set output power levels at the first and second output terminals, which in effect, distributes the input power on the hybrid coupler input terminals to its output terminals based on the phase shift introduced by the phase shifter  116 . 
     The controller  108  outputs a phase control signal  126  to control the amount of phase shift applied by the phase shifter  116  based on the power detection signal  106  detected by the power detector  104 . Thus, at low power, the controller  108  controls the phase shifter  116  to generate a phase shift such that the hybrid plus coupler  112  directs power to the main power amplifier  120  and away from the auxiliary power amplifier  122 , thereby providing improved efficiency over conventional systems. In an alternative embodiment, a power detector  128  is coupled to detect the power level of the output signal (P OUT ) and provide a detected power signal  130  to the controller  108 . The controller  108  operates to control the phase shift provided by the phase shifter  116  based on the detected power signal  130 . The extension  118  assists in distributing the power based on the phase shift introduced by the phase shifter  116 . 
     Accordingly, an improved Doherty amplifier is provided that comprises a hybrid plus coupler  112  to steer the input power distribution with the phase shifter  116  and therefore provide greater efficiency at low power. 
       FIG. 2  shows an exemplary embodiment of a hybrid plus coupler  200 . For example, the hybrid plus coupler  200  is suitable for use as the hybrid plus coupler  108  shown in  FIG. 1 . The hybrid plus coupler  200  comprises input terminals A and C and output terminals B and D. The hybrid plus coupler  200  also comprises extension  202  which is used to provide a 90 degree phase shift. The extension  202  can be constructed by distributed elements, like transmission lines, or using lumped elements, like LC filters. A phase difference between the signals on the input terminals (A and C) results in the input power being redistributed on the output terminals (B and D). For example, assuming a and b are constant coefficients and the signals input to the A and C input terminals are:
 
A=ae j0   (1)
 
C=be −jφ   (2)
 
the combination signals at the output terminals B and D can be expressed as:
 
     
       
         
           
             
               
                 
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     Therefore, if (a=b), then the follow power distributions result based on the phase difference between the input signals.
     If φ=90° then, B=0, D=√{square root over (2)}ae −j270°  to Aux amplifier   If φ=90° then, D=0, B=√{square root over (2)}ae −j180°  to Main amplifier   If φ=0° then both amplifiers will be on with equal power   

       FIG. 3  shows an exemplary embodiment of a hybrid ring coupler  300 . For example, the hybrid ring coupler  300  is suitable for use as the hybrid plus coupler  108  shown in  FIG. 1 . The hybrid ring coupler  300  comprises inputs A and C and outputs B and D. A phase difference between the signals at the input terminals (A and C) results in power being redistributed on the output terminals (B and D). For example, assuming the signals input to the A and C terminals are:
 
A=ae j0   (5)
 
C=be −jφ   (6)
 
the combination signals at the output terminals B and D can be expressed as:
 
     
       
         
           
             
               
                 
                   B 
                   = 
                   
                     
                       
                         a 
                         
                           2 
                         
                       
                       ⁢ 
                       
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                   7 
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                   ( 
                   8 
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     Therefore, if (a=b), then the follow power distributions result based on the phase difference between the input signals.
     If φ=0° then, B=0, D=√{square root over (2)}ae −j90°  to Aux amplifier   If φ=180° then, D=0, B=√{square root over (2)}ae −j270°  Main amplifier   If φ=90° then both amplifiers will be on with equal power   

       FIG. 4  shows an exemplary graph  400  that illustrates the increase in efficiency provided by exemplary embodiments of the improved Doherty amplifier  100 . For example, the graph  400  includes plot line  402  representing the efficiency of a typical Doherty amplifier. The plot line  404  represents the power amplifier efficiency (PAE) of an improved Doherty amplifier constructed in accordance with the disclosed embodiments where:
 
PAE=( P   OUT   −P   IN )/ P   DC  
 
       FIG. 5  shows an exemplary method  500  for providing an improved Doherty amplifier. For example, the method  500  is performed by the amplifier  100  shown in  FIG. 1 . 
     At block  502 , a MM wave signal to be amplified is input to a power splitter to generate first and second split signals. For example, the signal is input to the power splitter  102  shown in  FIG. 1  to generate the first split signal  110  and the second split signal  114 . 
     At block  504 , the second split signal is phase shifted to generate a phase shifted split signal. For example, the split signal  114  is input into the phase shifter  116  to generate the phase shifted signal  132 . 
     At block  506 , first and second combinations of the phase shifted version of the first signal and a millimeter wave second signal are generated at first and second output terminals, respectively. The first and second combinations set output power levels at the first and second output terminals. For example, the first split signal and the phase shifted split signal are input to the hybrid plus coupler  112 . For example, the signal  110  and the signal  132  are input to the input terminals (A and C) of the hybrid plus coupler  112 . The hybrid plus coupler  112  has extension  118  to provide a 90 degree phase shift as described above. The hybrid plus coupler operates to generate combinations of its input signals according to the equations shown above. Thus the hybrid plus coupler operates to adjust output power levels at its output terminals based on combinations of a phase shifted first MM wave signal and a second MM wave signal. 
     At block  508 , a power level is detected. For example, the power detector  104  detects the power of the input signal and provides the power detection signal  106  to the controller  108 . In another exemplary embodiment, the power detector  128  detects the power of the output signal (P OUT ) and provides the power detection signal  130  to the controller  108 . 
     At block  510 , a phase shift is adjusted based on the detected power to improve efficiency. For example, the controller  108  outputs the phase control signal  126  to control the phase shift introduced by the phase shifter  116  so that the power distribution provided by the hybrid plus coupler  112  provides improved efficiency over conventional systems. 
     Therefore the method  500  operates to provide an improved Doherty amplifier using the phase shifter  116  and hybrid plus coupler  112  to adjust the power distribution of the output to achieve improved efficiency. In other exemplary embodiments, the operations of the method  500  may be rearranged or modified to provide the functions described herein. 
       FIG. 6  shows an exemplary embodiment of a Doherty amplifier apparatus  600  that provides improved efficiency. For example, the apparatus  600  is suitable for use as the amplifier  100  shown in  FIG. 1 . In an aspect, the apparatus  600  is implemented by one or more modules configured to provide the functions as described herein. For example, in an aspect, each module comprises hardware and/or hardware executing software. 
     The apparatus  600  comprises a first module comprising means ( 602 ) for generating a phase shifted first millimeter (MM) wave signal based on a selected phase shift, which in an aspect comprises phase shifter  116 . 
     The apparatus  600  also comprises a second module comprising means ( 604 ) for adjusting output power levels at output terminals based on combinations of the phase shifted first MM wave signal and a second MM wave signal, which in an aspect comprises the hybrid plus coupler  112 . 
     Those of skill in the art would understand that information and signals may be represented or processed using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof. It is further noted that transistor types and technologies may be substituted, rearranged or otherwise modified to achieve the same results. For example, circuits shown utilizing PMOS transistors may be modified to use NMOS transistors and vice versa. Thus, the amplifiers disclosed herein may be realized using a variety of transistor types and technologies and are not limited to those transistor types and technologies illustrated in the Drawings. For example, transistors types such as BJT, GaAs, MOSFET or any other transistor technology may be used. 
     Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the exemplary embodiments of the invention. 
     The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. 
     The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), flash memory, Read Only Memory (ROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal In the alternative, the processor and the storage medium may reside as discrete components in a user terminal 
     In one or more exemplary embodiments, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. 
     The description of the disclosed exemplary embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these exemplary embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the invention is not intended to be limited to the exemplary embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.