Patent Publication Number: US-11657977-B2

Title: Method of manufacturing multilayer ceramic capacitor

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application is based on and claims the benefit of priority from Japanese Patent Application No. 2020-169697, filed on Oct. 7, 2020, the entire contents of which are incorporated herein by reference. 
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a method of manufacturing a multilayer ceramic capacitor. 
     2. Description of the Related Art 
     Recently, a large capacitance, small multilayer ceramic capacitor has been demanded. Such a multilayer ceramic capacitor has an inner layer portion in which the dielectric layers including a ferroelectric material of relatively high dielectric constant, and the inner electrodes are alternately laminated. 
     Furthermore, dielectric layers serving as outer layer portions are formed on the upper and lower portions of the inner layer portion, thereby providing a rectangular parallelepiped multilayer body, and external electrodes are provided on both end surfaces in the length direction of the multilayer body, thereby forming a capacitor main body. 
     Furthermore, in order to suppress or prevent the generation of “acoustic noise”, a multilayer ceramic capacitor has been known which includes an interposer provided on the side of the capacitor main body mounted on a board (refer to PCT International Publication No. WO2015/098990). 
     However, it is difficult to position an interposer relative to a capacitor main body with good precision when mounting the interposer to a portion of an external electrode of the capacitor main body. 
     SUMMARY OF THE INVENTION 
     Preferred embodiments of the present invention provide methods of manufacturing multilayer ceramic capacitors that are each able to facilitate positioning of an interposer relative to a capacitor main body. 
     A preferred embodiment of the present invention provides a method of manufacturing a multilayer ceramic capacitor that includes alternately laminating dielectric layers and internal electrode layers to manufacture a multilayer body, forming an external electrode connected with the internal electrode layers on each of two end surfaces of the multilayer body to manufacture a capacitor main body, connecting two interposers via an insulator, holding the two interposers connected via the insulator on a holding portion, placing the capacitor main body on the two interposers on the holding portion such that the external electrode is connected to each of the two interposers, and removing the holding portion. 
     According to preferred embodiments of the present invention, it is possible to provide methods of manufacturing multilayer ceramic capacitors that are each able to facilitate positioning of an interposer relative to a capacitor main body. 
     The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a schematic perspective view of a multilayer ceramic capacitor  1  according to a preferred embodiment of the present invention. 
         FIG.  2    is a partial cross-sectional view taken along the line II-II in  FIG.  1   . of the multilayer ceramic capacitor  1 . 
         FIG.  3    is a cross-sectional view taken along the line III-III in  FIG.  1    of the multilayer ceramic capacitor  1 . 
         FIG.  4    is a table showing favorable ranges for each of the types of a capacitor main body  1 A according to a preferred embodiment of the present invention. 
         FIG.  5    is a view of the multilayer ceramic capacitor  1  viewed from the side on which an interposer  4  is provided. 
         FIG.  6    is a perspective view of the interposer  4 . 
         FIG.  7    is a flowchart explaining a method of manufacturing the multilayer ceramic capacitor  1  according to a preferred embodiment of the present invention. 
         FIGS.  8 A to  8 H  provide diagrams illustrating an interposer mounting step S 3 . 
         FIG.  9    is a partial cross-sectional view of the multilayer ceramic capacitor  1  according to a preferred embodiment of the present invention when an insulation member  50  is removed by an insulation member removing step. 
         FIG.  10    is a diagram illustrating a multilayer ceramic capacitor  1  of a first modified example of a preferred embodiment of the present invention. 
         FIG.  11    is a diagram illustrating a multilayer ceramic capacitor  1  of a second modified example of a preferred embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Preferred embodiments of the present invention will be described below with reference to the drawings.  FIG.  1    is a schematic perspective view of a multilayer ceramic capacitor  1  according to a preferred embodiment of the present invention.  FIG.  2    is a partial cross-sectional view taken along the line II-II in  FIG.  1    of the multilayer ceramic capacitor  1 .  FIG.  3    is a cross-sectional view taken along the line III-III in  FIG.  1    of the multilayer ceramic capacitor  1 . The line II-II passes through the middle in the width direction W described later of the multilayer ceramic capacitor  1 , and the line III-III passes through the middle in the length direction L described later. 
     The multilayer ceramic capacitor  1  has a rectangular or substantially rectangular parallelepiped shape, and includes a capacitor main body  1 A including a multilayer body  2  and a pair of external electrodes  3  provided at both ends of the multilayer body  2 , and an interposer  4  attached to the capacitor main body  1 A. Furthermore, the multilayer body  2  includes an inner layer portion including a plurality of sets of dielectric layers  14  and internal electrode layers  15 . 
     In the following description, as terms representing the orientation of the multilayer ceramic capacitor  1 , the direction in which the pair of external electrodes  3  are provided is referred to as a length direction L. The direction in which the dielectric layers  14  and the internal electrode layers  15  are laminated (stacked) is referred to as a lamination direction T. The direction intersecting both the length direction L and the lamination direction T is referred to as a width direction W. In the present preferred embodiment, the width direction W is perpendicular or substantially perpendicular to both the length direction L and the lamination direction T. 
     Outer Surface of Multilayer Body  2   
     Among the six outer surfaces of the multilayer body  2 , a pair of outer surfaces opposing each other in the lamination direction T are referred to as a multilayer body first main surface AS 1  and a multilayer body second main surface AS 2 , respectively, a pair of outer surfaces opposing each other in the width direction W are referred to as a multilayer body first side surface BS 1  and a multilayer body second side surface BS 2 , respectively, and a pair of outer surfaces opposing each other in the length direction L are referred to as a multilayer body first end surface CS 1  and a multilayer body second end surface CS 2 . 
     When it is not necessary to particularly distinguish between the multilayer body first main surface AS 1  and the multilayer body second main surface AS 2 , they are collectively referred to as a multilayer body main surface AS, when it is not necessary to particularly distinguish between the multilayer body first side surface BS 1  and the multilayer body second side surface BS 2 , they are collectively referred to as a multilayer body main surface BS, and when it is not necessary to particularly distinguish between the multilayer body first end surface CS 1  and the multilayer body second end surface CS 2 , they are collectively referred to as a multilayer body end surface CS. 
     Outer Surface of Capacitor Main Body  1 A 
     Among the six outer surfaces of the capacitor main body  1 A, a pair of outer surfaces opposing each other in the lamination direction T is referred to as a capacitor first main surface AC 1  and a capacitor second main surface AC 2 , respectively, a pair of outer surfaces opposing each other in the width direction W is referred to as a capacitor first side surface BC 1  and a capacitor second side surface BC 2 , respectively, and a pair of outer surfaces opposing each other in the length direction L is referred to as a capacitor first end surface CC 1  and a capacitor second end surface CC 2 , respectively. 
     When it is not necessary to particularly distinguish between the capacitor first main surface AC 1  and the capacitor second main surface AC 2 , they are collectively referred to as a capacitor main surface AC, when it is not necessary to particularly distinguish between the capacitor first side surface BC 1  and the capacitor second side surface BC 2 , they are collectively referred to as a capacitor main surface BC, and when it is not necessary to particularly distinguish between the capacitor first end surface CC 1  and the capacitor second end surface CC 2 , they are collectively referred to as a capacitor end surface CC. 
     Outer Surface of Interposer  4   
     Furthermore, the interposer  4  includes a first interposer  4 A and a second interposer  4 B. Among the six outer surfaces of the first interposer  4 A and the second interposer  4 B, an outer surface close to the capacitor main body  1 A of a pair of outer surfaces opposed to each other in the lamination direction T are referred to as an interposer first main surface AI 1 , and an outer surface opposed thereto is referred to as an interposer second main surface AI 2 . 
     Of pairs of outer surfaces of the respective interposers  4  opposing each other in the length direction L, outer surfaces facing each other of the interposers  4  are referred to as interposer first end surfaces CI 1 , and outer surfaces opposed thereto are referred to as interposer second end surfaces CI 2 . 
     Of pairs of outer surfaces opposing each other in the width direction W in the respective interposers  4 , as shown in  FIG.  5    described later, when viewed from the interposer first end surface CI 1  with the interposer second main surface AI 2  above, the surface on the right side is referred to as an interposer first side surface BI 1 , and the surface on the left side is referred to as an interposer second side surface BI 2 . 
     The interposer first main surfaces AI 1  are close to the capacitor second main surface AC 2 , and the interposer first end surfaces CI 1  of the first interposer  4 A and the second interposer  4 B are opposed to each other. 
     When it is not necessary to particularly distinguish the interposer first main surface AI 1  and the interposer second main surface AI 2  from each other, they are collectively referred to as an interposer main surface AI, when it is not necessary to particularly distinguish the interposer first side surface BI 1  and the interposer second side surface BI 2  from each other, they are collectively referred to as an interposer side surface BI, and when it is not necessary to particularly distinguish the interposer first end surface CI 1  and the interposer second end surface CI 2  from each other, they are collectively referred to as an interposer end surface CI. 
     Multilayer Body  2   
     The multilayer body  2  preferably includes rounded corner portions R 1  and rounded ridge portions R 2 . The corner portions R 1  are each a portion at which the multilayer body main surface AS, the multilayer body side surface BS, and the multilayer body end surface CS intersect. The ridge portions R 2  are each a portion at which two surfaces of the multilayer body  2  intersect, i.e., the multilayer body main surface AS and the multilayer body side surface BS intersect, the multilayer body main surface AS and the multilayer body end surface CS intersect, or the multilayer body side surface BS and the multilayer body end surface CS intersect. 
     The multilayer body  2  includes the inner layer portion  11 , outer layer portions  12  respectively provided close to the main surfaces of the inner layer portion  11 , and side gap portions  30 . 
     Inner Layer Portion  11   
     The inner layer portion  11  includes the plurality of sets of dielectric layers  14  and the internal electrode layers  15  which are alternately laminated along the lamination direction T. 
     Dielectric Layer  14   
     The dielectric layers  14  are each made of a ceramic material. As the ceramic material, for example, a dielectric ceramic including BaTiO 3  as a main component is used. Furthermore, as the ceramic material, a material may be used which is obtained by adding at least one sub components such as a Mn compound, an Fe compound, a Cr compound, a Co compound, a nickel compound, etc. to these main components. 
     Internal Electrode Layer  15   
     The internal electrode layers  15  are preferably made of, for example, a metallic material such as nickel, Cu, Ag, Pd, a Ag—Pd alloy, Au, or the like. 
     Furthermore, the internal electrode layers  15  each include a plurality of first internal electrode layer  15   a  and a plurality of second internal electrode layer  15   b . The first internal electrode layer  15   a  and the second internal electrode layer  15   b  are alternately provided. 
     When it is not necessary to distinguish between the first internal electrode layers  15   a  and the second internal electrode layers  15   b , they are collectively referred to as an internal electrode layer  15 . 
     The internal electrode layers  15  each include an opposing portion  152  at which the first internal electrode layer  15   a  faces the second internal electrode layer  15   b , and a lead-out portion  151  which extends from the opposing portion  152  toward one of the multilayer body end surfaces CS. An end of the lead-out portion  151  is exposed at the multilayer body end surface CS, and is electrically connected to the external electrode  3 . 
     The direction in which the lead-out portion  151  extends differs between the first internal electrode layer  15   a  and the second internal electrode layer  15   b , and alternately extends to the multilayer body first end surface CS 1  and the multilayer body second end surface CS 2 . 
     Furthermore, charges are accumulated between the opposing portions  152  of the first internal electrode layer  15   a  and the second internal electrode layer  15   b  adjacent to each other in the lamination direction T, such that the characteristics of the capacitor are provided. 
     Outer Layer Portion  12   
     The outer layer portions  12  are each made of the same material as the dielectric layers  14  of the inner layer portion  11 . 
     Side Gap Portion  30   
     The side gap portions  30  are provided on both sides of the region of the multilayer body where the internal electrode layers  15  are provided, and close to the multilayer body side surfaces BS. The side gap portions  30  are integrally manufactured with the same material as the dielectric layers  14 . 
     External Electrode  3   
     The external electrodes  3  are provided on the multilayer body end surfaces CS on both sides of the multilayer body  2 . The external electrodes  3  cover not only the multilayer body end surface CS, but also portions close to the multilayer body end surface CS, of the multilayer body main surface AS and the multilayer body side surface BS. As described above, the end portions of the lead-out portions  151  of the internal electrode layers  15  are each exposed to the multilayer body end surface CS, and electrically connected to the external electrode  3 . 
     Structure of External Electrode  3   
     As shown in  FIG.  2   , the external electrodes  3  each include, for example, a copper electrode layer  31 , a conductive resin layer  32  provided on the outside of the copper electrode layer  31 , a nickel-plated layer  33  provided on the outside of the conductive resin layer  32 , and a tin-plated layer  34  on the outside of the nickel-plated layer  33 . 
     Copper Electrode Layer  31   
     The copper electrode layer  31  is provided, for example, by applying and firing a conductive paste including a conductive metal and glass. As shown in  FIG.  2   , the copper electrode layer  31  covers not only the multilayer body end surface CS on both sides of the multilayer body  2 , but also extends to the multilayer body main surface AS, and covers a portion of the multilayer body main surface AS close to the multilayer body end surface CS. 
     Conductive Resin Layer  32   
     The conductive resin layer  32  is provided on the outside of the copper electrode layer  31  to cover the copper electrode layer  31 . The conductive resin layer  32  may include any configuration including a thermosetting resin and a metal component, for example. As specific examples of the thermosetting resin, various known thermosetting resins such as epoxy resin, phenolic resin, urethane resin, silicone resin, polyimide resin, and the like can be used. As the metal component, for example, Ag can be used, or a metal powder coated with Ag on the surface of the base metal powder can be used. 
     Since the conductive resin layer  32  includes a thermosetting resin, it is more flexible than the copper electrode layer  31  made of, for example, a plating film or a fired product of a conductive paste. Therefore, even when an impact caused by physical shock or thermal cycling of the multilayer ceramic capacitor  1  is applied, the conductive resin layer  32  defines and functions as a buffer layer. Therefore, the conductive resin layer  32  reduces or prevents cracks in the multilayer ceramic capacitor  1  from occurring, easily absorbs piezoelectric vibration, and thus reduces or prevents “acoustic noise”. 
     Gap  35   
     A gap  35  is provided between the copper electrode layer  31  and the conductive resin layer  32 . In the gap  35 , a distance d in the length direction L between the copper electrode layer  31  and the conductive resin layer  32  is longest in the middle portion in the width direction W and the lamination direction T at the multilayer body end surface CS on which the copper electrode layer is provided. Furthermore, the distance between the copper electrode layer  31  and the conductive resin layer  32  becomes shorter approaching the end portion of the multilayer body end surface CS, i.e., approaching the multilayer body main surface AS or the multilayer body side surface BS. Moreover, the gap  35  is eliminated or substantially eliminated at the corner portion R 1  and the ridge portion R 2 , such that the copper electrode layer  31  and the conductive resin layer  32  are in contact with each other. 
     Thus, since the distance d in the length direction L of the gap  35  is longest in the middle portion in the width direction W and the lamination direction T at the multilayer body end surface CS, the external electrode  3  has a shape that bulges in the length direction L. 
     Similarly to the copper electrode layer  31 , the conductive resin layer  32  extends not only to the multilayer body end surface CS on both sides of the multilayer body  2 , but also to the multilayer body main surface AS, and also covers a portion of the multilayer body main surface AS close to the multilayer body end surface CS. 
     However, the conductive resin layer  32  terminates at a location closer to the multilayer body end surface CS on the multilayer body main surface AS in the length direction L than the copper electrode layer  31  is. That is, the length of the conductive resin layer  32  extending to the multilayer body main surface AS is equal to or less than the length of the copper electrode layer  31  extending to the multilayer body main surface AS. 
     Nickel-Plated Layer  33   
     The nickel-plated layer  33  is provided on the outside of the conductive resin layer  32  to cover the conductive resin layer  32 . The nickel-plated layer  33  is made of plating of nickel or an alloy including nickel, for example. 
     Similarly to the copper electrode layer  31 , the nickel-plated layer  33  extends not only to the multilayer body end surface CS on both sides of the multilayer body  2 , but also to the multilayer body main surface AS, and also covers a portion of the multilayer body main surface AS close to the multilayer body end surface CS. The nickel-plated layer  33  extends beyond the conductive resin layer  32  and to the same or substantially the same position as the copper electrode layer  31  on the multilayer body main surface AS. 
     Bulge Portion  36   
     Here, similarly to the copper electrode layer  31 , the conductive resin layer  32  extends not only to the multilayer body end surface CS on both sides of the multilayer body  2 , but also to the multilayer body main surface AS, and covers a portion of the multilayer body main surface AS close to the multilayer body end surface CS. However, the conductive resin layer  32  does not extend to the multilayer body main surface AS much as the copper electrode layer  31  extends to the multilayer body main surface AS. 
     Therefore, the external electrodes  3  each include a bulge portion  36  provided therein. The bulge portion  36  is provided such that a portion at which the conductive resin layer is provided bulges in the lamination direction T on the multilayer body main surface AS when viewed from the outside of the nickel-plated layer  33 . 
     Tin-Plated Layer  34   
     A tin-plated layer  34  is provided on the outside of the nickel-plated layer  33 . The tin-plated layer  34  is made of plating of an alloy including tin or tin, for example. As described later, in a state in which the interposer  4  is attached to the nickel-plated layer  33 , the tin-plated layer  34  covers the outside including a protrusion  40  to be described later of the interposer  4 , except for a non-plated region  45  thereof. 
     It should be noted that the plated layer of tin or an alloy including tin in the present preferred embodiment includes a single layer of the tin-plated layer  34 . However, the present invention is not limited thereto, and may include a structure including two tin-plated layers including another tin-plated layer which covers the nickel-plated layer  33  without covering the interposer  4  between the nickel-plated layer  33  and the tin-plated layer  34 . 
     Size of Capacitor Main Body  1 A 
     The capacitor main body  1 A in the present preferred embodiment has the three sizes of type A, type B, and type C.  FIG.  4    is a table showing favorable ranges for each of the types of the capacitor main body  1 A. 
     Type A 
     The ranges for a Type-A of the capacitor main body  1 A are as follows, as shown in the table. 
     Dimension in length direction L: about 0.95 mm to about 1.15 mm 
     Dimension in width direction W: about 0.62 mm to about 0.68 mm 
     Dimension in lamination direction T: about 0.62 mm to about 0.68 mm 
     Dimension in the lamination direction T of the dielectric layer  14 : about 0.98 mm to about 1.09 μm 
     Dimension in the lamination direction T of the internal electrode layer  15 : about 0.62 mm to about 0.68 μm 
     Number of layers of each of the dielectric layers  14  and the internal electrode layers  15 : 350 to 380 
     Dimension in the lamination direction T of the outer layer portion  12 : about 17 μm to about 23 μm 
     Deviation amount in the length direction L of the internal electrode layers  15 : about 45 μm to about 48 μm 
     Dimension in the width direction W of the side gap portion  30 : about 32 μm to about 42 μm 
     The deviation amount in the length direction L of the internal electrode layers  15  corresponds to the lengths of the respective lead-out portions  151  of the first internal electrode layer  15   a  and the second internal electrode layer  15   b  which are alternately provided. 
     Type B 
     The ranges for a type-B of the capacitor main body  1 A are as follows, as shown in the table. 
     Dimension in length direction L: about 1.62 mm to about 1.72 mm 
     Dimension in width direction W: about 0.88 mm to about 0.96 mm 
     Dimension in lamination direction T: about 0.89 mm to about 0.97 mm 
     Dimension in the lamination direction T of the dielectric layer  14 : about 1.35 μm to about 1.45 μm 
     Dimension in the lamination direction T of the internal electrode layer  15 : about 0.67 μm to about 0.77 μm 
     Number of layers of each of the dielectric layers  14  and the internal electrode layers  15 : 386 to 426 
     Dimension in the lamination direction T of the outer layer portion  12 : about 35 μm to about 45 μm 
     Deviation amount in the length direction L of the internal electrode layer  15 : about 72 μm to about 78 μm 
     Dimension in the width direction W of the side gap portion  30 : about 52 μm to about 62 μm 
     Type C 
     The ranges for the type C of the capacitor main body  1 A are as follows, as shown in the table. 
     Dimension in the length direction L: about 1.81 mm to about 2.01 mm 
     Dimension in width direction W: about 1.29 mm to about 1.49 mm 
     Dimension in lamination direction T: about 1.32 mm to about 1.42 mm 
     Dimension in the lamination direction T of the dielectric layer  14 : about 1.88 μm to about 1.96 μm 
     Dimension in the lamination direction T of the internal electrode layer  15 : about 0.73 μm to about 0.86 μm 
     Number of layers of each of the dielectric layer  14  and the internal electrode layer  15 : 440 to 490 
     Dimension in the lamination direction T of the outer layer portion  12 : about 52 μm to about 63 μm 
     Deviation amount in the length direction L of the internal electrode layer  15 : about 72 μm to about 85 μm 
     Dimension in the width direction W of the side gap portion  30 : about 63 μm to about 75 μm 
     Interposer  4   
       FIG.  5    is a view of the multilayer ceramic capacitor  1  viewed from the side on which an interposer  4  is provided.  FIG.  6    is a perspective view of the interposer  4 . The interposer  4  includes a pair of the first interposer  4 A and the second interposer  4 B. Hereinafter, when it is not necessary to distinguish between the first interposer  4 A and the second interposer  4 B, they are referred to as an interposer. 
     On the capacitor second main surface AC 2  of the capacitor main body  1 A, the first interposer  4 A is provided adjacent to the capacitor first end surface CC 1  in the length direction L, and the second interposer  4 B is provided adjacent to the other capacitor second end surface CC 2  in the length direction L. The first interposer  4 A and the second interposer  4 B have the same or substantially the same shape, are opposed to each other, and are spaced apart from each other by a predetermined distance. 
     The first interposer  4 A is spaced apart from the second interposer  4 B. However, they are connected by an insulation member  50 , such as a resin member, for example. 
     Shape of Interposer  4   
     The interposer  4  is made of a material including copper or a copper alloy, for example, and has a shape in which a plurality of recess portions are provided in a rectangular or substantially rectangular parallelepiped block portion. 
     A third recess portion  43  is provided on the interposer first end surface CI 1  of the interposer  4 , such that the protrusion  40  is provided. Therefore, the interposer first end surface CI 1  includes a flat tip surface  40   a  of a tip of the protrusion  40 , and a curved surface of the third recess portion  43 . 
     A first recess portion  41  and second recess portions  42  are provided on the interposer second end surface CI 2  of the interposer  4 . The interposer second end surface CI 2  includes the two curved surfaces of the first recess portion  41  and the second recess portions  42 . 
     Third Recess Portion  43   
     The third recess portion  43  has a shape in which the ridge portion between the interposer first end surface CI 1  and the interposer second main surface AI 2  is cut by a curved surface. 
     Protrusion  40   
     By providing the third recess portion  43 , the protrusion  40  protruding in the length direction L is provided over the entire or substantially the entire length in the width direction W on the interposer first end surface CI 1  close to the capacitor second main surface AC 2 . The protrusion  40  extends from one interposer  4  toward the other interposer  4 . 
     The length LI shown in  FIGS.  5  and  6    in which the protrusion  40  extends in the length direction L from the interposer second main surface AI 2  is about 50 μm or more and about 100 μm or less. 
     Advantageous Effects of Protrusion  40   
     There is a gap between the multilayer ceramic capacitor  1  including the interposer  4  and the board due to the interposer  4 . Therefore, when the board is distorted, the multilayer ceramic capacitor  1  may be bent at the portion not in contact with the interposer  4 . 
     However, in the multilayer ceramic capacitor  1  of the present preferred embodiment, the protrusion  40  is provided in the interposer  4 , and the upper side of the protrusion  40  is a flat surface that continues flush from the interposer first main surface AI 1 . 
     Therefore, the contact area between the capacitor second main surface AC 2  of the capacitor main body  1 A, and the interposer first main surface AI 1  of the interposer  4  is increased by the protrusion  40 . Therefore, in the multilayer ceramic capacitor  1 , the bending strength is improved, and the possibility of being bent is reduced. 
     First Recess Portion  41   
     As shown in  FIGS.  5  and  6   , the interposer  4  includes the first recess portion  41  on the interposer second end surface CI 2  in a certain area around the middle portion in the width direction W. 
     The first recess portion  41  further includes an upper first recess portion  41   a  adjacent to the interposer first main surface AI 1 , and a lower first recess portion  41   b  adjacent to the interposer second main surface AI 2 . The upper first recess portion  41   a  and the lower first recess portion  41   b  are continuous in the lamination direction T. 
     When viewed in  FIG.  5   , the inner surfaces of the upper first recess portion  41   a  and the lower first recess portion  41   b  each have, for example, an elliptical or substantially elliptical arc shape or an arcuate or substantially arcuate shape, and when viewed from the cross section in  FIG.  2   , each include an elliptical or substantially elliptical arc shape or an arcuate or substantially arcuate shape, i.e., include a first curved surface. Thus, since the inner surfaces of the upper first recess portion  41   a  and the lower first recess portion  41   b  each include a curved surface, it is possible to reduce or prevent solder from rising more efficiently. 
     Advantageous Effects of First Recess Portion  41   
     Such a configuration of the first recess portion  41  provides the following advantageous effects. 
     A solder is used when mounting the multilayer ceramic capacitor  1  including the interposer  4  on a mounting board. At this time, if a surplus solder is present, there is a possibility that the solder protrudes on the outside of the interposer  4 . However, when the first recess portion  41  is provided as in the present preferred embodiment, since the surplus solder is accommodated in the first recess portion  41 , the possibility of the solder protruding on the outside of the interposer  4  is reduced. 
     Furthermore, since the first recess portion  41  includes a two-stage structure, first, the surplus solder fills the lower first recess portion  41   b , and if surplus solder is still present, the surplus solder goes beyond the boundary between the lower first recess portion  41   b  and the upper first recess portion  41   a , and reaches the first recess portion  41   a.    
     In other words, the solder connecting the mounting board and the interposer  4  hardly rises up to the upper side. Therefore, since the mounting board and the capacitor main body  1 A are connected by the solder, the possibility of generating acoustic noise is reduced. 
     Furthermore, as shown in  FIG.  2    and as described above, when the capacitor main surface AC is viewed from the outside of the nickel-plated layer  33 , the external electrodes  3  each include the bulge portion  36  in which a portion at which the conductive resin layer  32  is provided bulges in the lamination direction T. 
     The bulge portion  36  has a dimension to fit in the first recess portion  41  in a cross section passing through the middle in the width direction W of the multilayer ceramic capacitor  1  shown in  FIG.  2   . 
     Advantageous Effects Derived from Bulge Portion  36  Being Fit in First Recess Portion  41   
     For example, if the bulge portion  36  is not provided when a force is applied to a mounting board and a distortion is caused, the ridge portion between the interposer first end surface CI 1  and the interposer first main surface AI 1  in the interposer  4  presses the capacitor second main surface AC 2 , such that the stress is concentrated on the pressed portion in the capacitor main body  1 A. 
     However, when the bulge portion  36  is provided, in the capacitor main body  1 A, the stress is easily applied to the side end portion of the bulge portion  36  close to the interposer second end surface CI 2 . Therefore, portions at which the stress is concentrated in the capacitor main body  1 A are dispersed, such that the bending strength of the capacitor main body  1 A is improved. 
     Second Recess Portion  42   
     As shown in  FIG.  6   , the interposer  4  includes the second recess portions  42  on both sides of the first recess portion  41  in the width direction W on the interposer second end surface CI 2 . The second recess portions  42  are each about ±10% of a half of the thickness of the interposer  4  in the lamination direction T. When viewed from the interposer side surface BI, the inner surfaces of the second recess portions  42  each have an elliptical or substantially elliptical arc shape or an arcuate or substantially arcuate shape, i.e., a second curved surface. Thus, since the inner surfaces of the second recess portions  42  each have a curved surface, it is possible to reduce or prevent the solder from rising more efficiently. 
     Advantageous Effects of Second Recess Portion  42   
     Such a configuration of the second recess portions  42  causes the solder connecting the mounting board and the interposer  4  to hardly rise up immediately to the upper side. Therefore, since the mounting board and the capacitor main body  1 A are connected by the solder, the possibility of generating acoustic noise is reduced. 
     Nickel-Plated Layer  44  of Interposer  4   
     As shown in  FIG.  2   , the nickel-plated layer  44  is provided on the outer periphery of the interposer  4 . The nickel-plated layer  44  does not cover a portion at which the insulation member  50  connecting the first interposer  4 A and the second interposer  4 B is present, i.e., a portion of the upper side of the tip face  40   a  of the protrusion  40  adjacent to the interposer first main surface AI 1  and adjacent to the capacitor main body  1 A. This portion corresponds to the non-plated region  45 . The tip surface  40   a  of the protrusion  40  includes the non-plated region  45  on the upper side, and a plated region  46  on the lower side. 
     Joining Between Interposer  4  and Capacitor Main Body  1 A 
     Furthermore, the interposer first main surface AI 1 , which is an upper surface of the interposer  4  and to which the nickel-plated layer  44  is applied, is joined with the capacitor second main surface AC 2 , which is a lower surface of the capacitor main body  1 A, by the nickel-plated layer  33  of the external electrode  3  and a solder H. 
     Tin Plating of Interposer  4  and External Electrode  3   
     The tin-plated layer  34  is further provided on the outer periphery of the external electrode  3  of the capacitor main body  1 A and the interposer  4 . The tin-plated layer  34  does not cover a portion at which the insulation member  50  connecting the first interposer  4 A and the second interposer  4 B is present, i.e., the non-plated region  45  at which the nickel-plated layer  44  of the protrusion  40  is not provided. 
     In other words, similarly to the nickel-plated layer  44 , the tin-plated layer  34  does not cover a portion of the upper side of the tip surface  40   a  of the protrusion  40  close to the interposer first main surface AI 1 , i.e., the non-plated region  45  close to the capacitor main body  1 A. 
     Advantageous Effects Derived from Tin-Plated Layer  34  not being Provided in Non-Plated Region  45   
     In the portion at which the insulation member  50  connecting the first interposer  4 A and the second interposer  4 B is not present, it is not possible for the solder to rise. Therefore, the possibility of generating acoustic noise due to the solder connecting the mounting board and the capacitor main body  1 A is reduced. 
     Plating on Surface of Recess Portion 
     The surface of each of the recess portions of the interposer  4  is covered with the nickel-plated layer  44  and the tin-plated layer  34 . 
     Placement Position of Interposer 
     As described above, the interposer first main surface AI 1 , which is an upper surface of the interposer  4 , is joined with the capacitor second main surface AC 2 , which is a lower surface of the capacitor main body  1 A, by the external electrode  3  and the solder H. 
     As shown in  FIG.  5   , the dimension in the width direction W of the interposer is smaller than the dimension in the width direction W of the capacitor main body  1 A. Here, when assuming that, the distance in the width direction W between the interposer first side surface BI 1  and the capacitor first side surface BC 1  of the first interposer  4 A is defined as X 1  as shown in the lower right side in the drawings, the distance in the width direction W between the interposer second side surface BI 2  and the capacitor first side surface BC 1  of the second interposer  4 B is defined as X 2  as shown in the lower left side in the drawings; the distance in the width direction W between the interposer first side surface BI 1  and the capacitor second side surface BC 2  of the second interposer  4 B is defined as X 3  as shown in the upper left side in the drawings, and the distance in the width direction W between the interposer second side surface BI 2  and the capacitor second side surface BC 2  of the first interposer  4 A is defined as X 4  as shown in the upper right side in  FIG.  5   , X 2 &gt;X 3  and X 1 &gt;X 4  are satisfied. 
     Furthermore, X 1 /X 4 *0.9&lt;X 2 /X 3 &lt;X 1 /X 4 *1.1 is satisfied. 
     In other words, in the multilayer ceramic capacitor  1 , as viewed from the lower surface, i.e., in a plan view as viewed from the capacitor second main surface AC 2 , the interposer  4  with respect to the capacitor main body  1 A satisfies the relationships of X 2 &gt;X 3  and X 1 &gt;X 4 . Therefore, the interposer  4  is positioned to be biased in the width direction W with respect to the capacitor main body  1 A. 
     However, the slope of the center line passing through the center in the width direction W of each of the first interposer  4 A and the second interposer  4 B and extending in the length direction L with respect to the center line passing through the middle in the width direction W of the capacitor main body  1 A and extending in the length direction L is X 1 /X 4 *0.9&lt;X 2 /X 3 &lt;X 1 /X 4 *1.1. Therefore, the slope angle is small, and thus, both the center lines are substantially parallel to each other. 
     However, the present invention is not limited thereto, and may satisfy X 2 =X 3  and X 1 =X 4 . 
     Alternatively, the present invention may satisfy X 2 =X 3 =X 1 =X 4 . 
     It should be noted that any one of X 1 , X 2 , X 3 , and X 4  is, for example, about 20 μm or less. 
     Advantageous Effects Derived from X 2 &gt;X 3  and X 1 &gt;X 4   
     Thus, since the multilayer ceramic capacitor  1  of the present preferred embodiment satisfies X 2 &gt;X 3  and X 1 &gt;X 4 , it is possible to provide the multilayer ceramic capacitor  1  in which the mounting orientation of the multilayer ceramic capacitor  1  to the board is identifiable when mounted on the board. Therefore, when a specific mounting orientation relative to the board is required to be identified, it is possible to easily identify the orientation. 
     Method of Manufacturing Multilayer Ceramic Capacitor  1   
     Next, a non-limiting example of a method of manufacturing the multilayer ceramic capacitor  1  according to the present preferred embodiment will be described.  FIG.  7    is a flowchart explaining a method of manufacturing the multilayer ceramic capacitor  1 . 
     The manufacturing process of the multilayer ceramic capacitor  1  includes a multilayer body manufacturing step S 1 , an external electrode forming step S 2 , and an interposer mounting step S 3 . 
     Multilayer Body Manufacturing Step S 1   
     First, a material sheet is provided in which a pattern of the internal electrode layers  15  is printed with a conductive paste onto a lamination ceramic green sheet molded in a sheet shape with a ceramic slurry. 
     Then, a plurality of material sheets are stacked such that the internal electrode patterns become shifted (offset) by about a half pitch in the length direction between adjacent material sheets. 
     Furthermore, ceramic green sheets for the outer layer portion defining and functioning as the outer layer portions are stacked on both sides of the stacked material sheets, such that a mother block member is formed by, for example, thermocompression bonding. 
     The mother block member is divided along the cutting line corresponding to the dimension of the multilayer body, such that a plurality of multilayer bodies  2  are manufactured. 
     External Electrode Forming Step S 2   
     Next, the copper electrode layer  31 , the conductive resin layer  32 , and the nickel-plated layer  33  are sequentially formed at both end portions of the multilayer body  2 , such that the external electrodes  3  are formed. 
     Copper Electrode Layer  31   
     The copper electrode layer  31  is formed, for example, by applying and firing a conductive paste containing a conductive metal and glass. As shown in  FIG.  2   , the copper electrode layer  31  extends not only to the multilayer body end surface CS on both sides of the multilayer body  2 , but also to the multilayer body main surface AS, and covers a portion of the multilayer body main surface AS close to the multilayer body end surface CS. 
     Conductive Resin Layer  32   
     The conductive resin layer  32  is formed on the outside of the copper electrode layer  31  to cover the copper electrode layer  31 . At this time, the length of the conductive resin layer  32  extending to the multilayer body main surface AS is, for example, equal to or less than the length of the copper electrode layer  31  extending to the multilayer body main surface AS. 
     Thus, since the conductive resin layer  32  does not extend to the multilayer body main surface AS as much as the copper electrode layer  31  extends to the multilayer body main surface AS, when viewed from the outside of the nickel-plated layer  33 , the external electrode  3  includes the bulge portion  36  provided therein. The bulge portion  36  is provided such that a portion at which the conductive resin layer  32  is provided bulges in the lamination direction T on the multilayer body main surface AS. 
     Gap  35   
     Furthermore, the gap  35  is provided between the copper electrode layer  31  and the conductive resin layer  32 . The gap  35  is provided such that the distance d in the length direction L becomes longest in the middle portion in the width direction W and the lamination direction T at the multilayer body end surface CS, such that the external electrode  3  bulges in the length direction L. 
     Nickel-Plated Layer  33   
     The nickel-plated layer  33  is formed on the outside of the conductive resin layer  32  to cover the conductive resin layer  32 . 
     The length of the nickel-plated layer  33  extending to the multilayer body main surface AS exceeds the length of the conductive resin layer  32 , and is the same or substantially the same as the length of the copper electrode layer  31  extending to the multilayer body main surface AS. 
     Then, heating is performed at a set firing temperature in a nitrogen atmosphere. Thus, the external electrodes  3  are fired to the multilayer body  2 , such that the capacitor main body  1 A is manufactured. 
     Interposer Mounting Step S 3   
       FIGS.  8 A to  8 H  provide diagrams illustrating an interposer mounting step S 3 . In  FIGS.  8 A to  8 H , the views shown on the upper side are top views, and the views shown on the lower side are side views. The interposer mounting step S 3  includes an interposer manufacturing step S 31 , an interposer connecting step S 32 , a nickel plating step S 33 , a holding step S 34 , a connecting material providing step S 35 , a capacitor placing step S 36 , a holding portion removing step S 37 , and a tin plating step S 38  to be described below. 
     Interposer Manufacturing Process S 31   
     As shown in  FIG.  8 A  and described above, a pair of the first interposer  4 A and the second interposer  4 B are manufactured, for example, by cutting rectangular or substantially rectangular parallelepiped blocking members made of copper, and forming the protrusions  40 , the first recess portions  41 , and the second recess portions  42  and the third recess portions  43 . 
     Interposer Connecting Step S 32   
     As shown in  FIG.  8 B , a pair of the first interposer  4 A and the second interposer  4 B are connected via the insulation member  50 . The insulation member  50  is, for example, a plate-shaped glass epoxy. However, the present invention is not limited thereto, and the insulation member  50  may be manufactured by other insulation members. 
     The insulation member  50  is attached to the portion of the upper side of the tip of the protrusion  40  on the interposer first end surface CI 1  of each of the pair of the first interposer  4 A and the second interposer  4 B. The portion of the upper side of the tip of the protrusion  40  is adjacent to the interposer first main surface AI 1 . 
     The length of the insulation member  50  corresponds to the distance between the two external electrodes  3  provided on both sides of the multilayer body  2 . As shown in  FIG.  1   , the distance between the two external electrodes  3  is a distance L 2  between the end portion of one of the external electrodes  3  extending to the multilayer body side surface BS and the end portion of the other of the external electrodes  3  extending to the multilayer body side surface BS. 
     Nickel Plating Step S 33   
     As shown in  FIG.  8 C , the first interposer  4 A and the second interposer  4 B are subjected to a nickel plating process to form the nickel-plated layer  44 . At this time, the nickel-plated layer  44  is not formed on the insulation member  50 . 
     Holding Step S 34   
     As shown in  FIG.  8 D , the first interposer  4 A and the second interposer  4 B on which the nickel-plated layer  44  is formed, and the insulation member  50  connecting them are provided on a holding portion  51 , and fixed. The holding portion  51  includes a flat surface such as, for example, a sheet member or a plate-shaped plate member. 
     When joining the first interposer  4 A and the second interposer  4 B to the capacitor main body  1 A subsequently, the holding portion  51  defines and functions as a pedestal to hold the first interposer  4 A and the second interposer  4 B in place at a predetermined position. 
     Although not included in the present preferred embodiment, an insulation member removing step may be provided between the holding step S 34  and the subsequent connecting member providing step S 35 . In the insulation member removing step, the insulation member  50  is removed by separating the insulation member  50  from the first interposer  4 A and the second interposer  4 B. Then, the portion at which the insulation member  50  is cut, at the tip of the protrusion  40  of the interposer  4 , becomes the non-plated region  45  of nickel plating. 
     Connecting Material Providing Step S 35   
     As shown in  FIG.  8 E , for example, a cream solder H as an example of a connecting material for the connection between the interposer  4  and the external electrode is provided on the interposer  4  by, for example, screen printing or the like. 
     Capacitor Placing Step S 36   
     As shown in  FIG.  8 F , the capacitor main body  1 A is placed on the first interposer  4 A and the second interposer  4 B which are fixed on the holding portion  51 . 
     Advantageous Effects Derived from Being Held by Insulation Member  50   
     Here, the distance between the first interposer  4 A and the second interposer  4 B on the holding portion  51  is the length of the insulation member  50  connecting them. 
     Therefore, when the capacitor main body  1 A is placed on the first interposer  4 A and the second interposer  4 B, the first interposer  4 A is placed below one of the external electrodes  3 , and the second interposer  4 B is placed below the other external electrode  3 . 
     Therefore, it is possible to easily perform the positioning of the first interposer  4 A and the second interposer  4 B with respect to the external electrodes  3 . 
     Holding Portion Removing Step S 37   
     As shown in  FIG.  8 G , the holding portion  51  is removed from the article molded by the interposer  4  and the external electrodes  3  of the capacitor main body  1 A being connected by the solder H. 
     Tin Plating Step S 38   
     As shown in  FIG.  8 H , the tin-plated layer  34  is formed on the article in which the capacitor main body  1 A is connected on the interposer  4  and the holding portion  51  is removed. 
     Here, since the insulation member  50  is present at the portion on the upper side of the tip of the protrusion  40  on the interposer first end surface CI 1  adjacent to the interposer first main surface AI 1 , such a portion corresponds to the non-plated region  45  which is not covered with the nickel-plated layer  44 , and the tin-plated layer  34  is not formed. 
     Thus, the multilayer ceramic capacitor  1  shown in  FIG.  1    is manufactured, followed by being mounted on the mounting board. 
       FIG.  9    is a partial cross-sectional view of the multilayer ceramic capacitor  1  corresponding to  FIG.  2    in a case in which the insulation member removing step is provided between the holding step S 34  and the connecting material providing step S 35 , such that the insulation member  50  is removed. Even if the insulation member  50  is removed, since the removed portion does not include the nickel-plated layer  44  provided thereon, the tin-plated layer  34  is not formed in the tin plating step S 38 . Therefore, the non-plated region  45  is present at the portion on the upper side of the tip face  40   a  of the protrusion  40  adjacent to the interposer first main surface AI 1 , i.e., adjacent to the capacitor main body  1 A. 
     During the mounting, since the two interposers  4  are connected by the insulation member  50 , the solder does not rise up to the capacitor main body  1 A beyond the insulation member  50 . Therefore, the capacitor main body  1 A is in no way connected to the board by the solder, such that the possibility of generating “acoustic noise” is reduced or prevented. 
     Furthermore, since neither of the nickel-plated layer  44  and the tin-plated layer  34  is formed in the non-plated region  45  in which the insulation member  50  is present, it is possible to reduce ESR (transmission series resistance) as the multilayer ceramic capacitor  1 . 
     Furthermore, in the multilayer ceramic capacitor  1  according to the present preferred embodiment, as viewed from the lower surface, i.e., in a plan view as viewed from the capacitor second main surface AC 2 , the interposer  4  with respect to the capacitor main body  1 A satisfies the relationships of X 2 &gt;X 3  and X 1 &gt;X 4 . 
     Therefore, the interposer  4  is biased in the width direction W with respect to the capacitor main body  1 A. 
     Therefore, when viewed from the lower surface, it is possible to identify the direction in the width direction W of the multilayer ceramic capacitor  1 . Therefore, it is possible to choose the direction in the width direction W at the time of mounting on the board. 
     Modified Example 
     While preferred embodiments of the present invention have been described above, the present invention is not limited thereto. 
     In the above-described preferred embodiments, the interposer  4  is mounted parallel or substantially parallel to the capacitor main body  1 A. That is, the respective interposer main surfaces AI of the first interposer  4 A and the second interposer  4 B are parallel or substantially parallel to each other, and located on the same or substantially the same horizontal plane. Then, the respective interposer main surfaces AI of the first interposer  4 A and the second interposer  4 B are parallel or substantially parallel to the capacitor main surface AC and the multilayer body main surface AS. 
     However, the present invention is not limited to this, and the respective interposer main surfaces AI of the first interposer  4 A and the second interposer  4 B may not be parallel or substantially parallel to each other. Furthermore, the respective interposer main surfaces AI of the first interposer  4 A and the second interposer  4 B may not be parallel or substantially parallel to the capacitor main surface AC or the multilayer body main surface AS. 
       FIGS.  10  and  11    are diagrams for explaining modified examples, and show a mode in which the interposer main surface AI of the first interposer  4 A and the interposer main surface AI of the second interposer  4 B are not parallel or substantially parallel to each other, and the interposer main surfaces AI of the first interposer  4 A and the second interposer  4 B are sloped with respect to the capacitor main surface AC and the multilayer body main surface AS, respectively. 
     First Modified Example 
       FIG.  10    is a diagram showing a first modified example of a preferred embodiment of the present invention. 
     As shown in  FIG.  10   , in the first modified example, the first interposer  4 A and the second interposer  4 B include the interposer first main surface AI 1  and the interposer second main surface AI 2  opposite thereto, respectively, and the interposer first main surface AI 1  and the interposer second main surface AI 2  are parallel or substantially parallel to each other. Then, the interposer first main surface AI 1  is sloped at a predetermined angle so as to approach the capacitor second main surface AC 2  toward the opposed interposer on the other side. In other words, it has an inverted “V” shape. The predetermined angle is preferably about 10 degrees or less, for example. 
     Such a multilayer ceramic capacitor  1  can be manufactured by providing the solder H to be biased adjacent to the interposer second end surface CI 2  on the interposer main surface AI when joining the interposer  4  and the capacitor main body  1 A in the state of  FIGS.  8 A to  8 H  described above, for example. 
     Advantageous Effects 
     The interposer second main surface AI 2  of the first interposer  4 A, and the interposer second main surface AI 2  of the second interposer  4 B correspond to a mounting surface to the board of the multilayer ceramic capacitor  1 . 
     Here, if this mounting surface is flat, when mounted on the board, there is a possibility that the multilayer ceramic capacitor  1  will slide laterally with respect to the board, such that positioning in the horizontal direction is difficult. This may lead to a case in which the mounting posture becomes unstable. 
     However, according to the present modified example, the interposer second main surface AI 2  of the first interposer  4 A and the interposer second main surface AI 2  of the second interposer  4 B defining and functioning as the mounting surfaces are sloped in opposite directions to each other so as to have an inverted “V” shape. Therefore, the multilayer ceramic capacitor  1  is difficult to move to the left and right, such that the mounting posture is stabilized by the self-alignment effect. 
     Second Modified Example 
       FIG.  11    is a diagram showing a second modified example of a preferred embodiment of the present invention. 
     As shown in  FIG.  11   , in the second modified example, the first interposer  4 A and the second interposer  4 B include the interposer first main surface AI 1  and the interposer second main surface AI 2  opposite thereto, respectively, and the interposer first main surface AI 1  and the interposer second main surface AI 2  are parallel or substantially parallel to each other. Then, the interposer first main surface AI 1  is sloped at a predetermined angle so as to be spaced away from the capacitor second main surface AC 2  toward the opposed interposer on the other side. In other words, it has a “V” shape. The predetermined angle is preferably about 10 degrees or less, for example. 
     Such a multilayer ceramic capacitor  1  can be manufactured by providing the solder H to be biased adjacent to the interposer first end surface CI 1  on the interposer main surface AI when joining the interposer  4  and the capacitor main body  1 A in the state of  FIGS.  8 A to  8 H  described above, for example. 
     Advantageous Effects 
     The interposer second main surface AI 2  of the first interposer  4 A, and the interposer second main surface AI 2  of the second interposer  4 B correspond to a mounting surface to the board of the multilayer ceramic capacitor  1 . 
     Here, if the mounting surface is flat, when mounted on the board, there is a possibility that the multilayer ceramic capacitor  1  slides laterally with respect to the board, such that positioning in the horizontal direction is difficult. This may lead to a case in which the mounting posture becomes unstable. 
     However, according to the present modified example, the interposer second main surface AI 2  of the first interposer  4 A and the interposer second main surface AI 2  of the second interposer  4 B defining and functioning as the mounting surfaces are sloped in opposite directions to each other so as to have a “V” shape. Therefore, the multilayer ceramic capacitor  1  is difficult to move to the left and right, such that the mounting posture is stabilized by the self-alignment effect. 
     While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.