Patent Publication Number: US-8991713-B2

Title: RFID chip package and RFID tag

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an RFID chip package, and in particular, relates to an RFID chip package interposed between an RFID chip and an antenna and an RFID tag in an RFID (Radio Frequency Identification) system. 
     2. Description of the Related Art 
     In recent years, an RFID system has been put into practical use as an article information management system, which includes a reader/writer that generates an induction field; and an RFID tag that is attached to an article, and non-contact communication using an electromagnetic field is established between the reader/writer and the RFID tag to transmit predetermined information therebetween. Here, the RFID tag is composed of an RFID chip that has stored predetermined information therein and processes a predetermined RF signal; and an antenna that performs transmission/reception of RF signals. 
     Meanwhile, in the RFID system, since an RF signal is very weak, for example, a voltage booster circuit such as a multi-stage charge pump is provided in the RFID chip as described in Japanese Unexamined Patent Application Publication No. 2005-202943 and Japanese Unexamined Patent Application Publication No. 2009-130896, and the input/output impedance of the RFID chip is very high. Thus, in the antenna, it is necessary to match its input/output impedance to the input/output impedance of the RFID chip, and hence antenna designing is difficult, and in particular, size reduction and band expansion are difficult. 
     SUMMARY OF THE INVENTION 
     Therefore, preferred embodiments of the present invention provide an RFID tag and an RFID chip package, the RFID chip package including an RFID chip and being arranged to match the RFID chip having a high impedance characteristic to an antenna having a low impedance characteristic so as to eliminate difficulty in antenna designing. 
     An RFID chip package according to a preferred embodiment of the present invention includes an RFID chip including a voltage booster circuit and processing an RF signal in a UHF band; and a power supply circuit connected to the RFID chip and including at least one inductance element. A reactance component of an input/output impedance at an antenna-connecting input/output terminal of the power supply circuit is substantially 0Ω. 
     An RFID tag according to another preferred embodiment of the present invention includes an antenna element including a connection portion; and an RFID chip package connected to the connection portion. The RFID chip package includes an RFID chip including a voltage booster circuit and processing an RF signal in a UHF band and a power supply circuit connected to the RFID chip and including at least one inductance element. A reactance component of an input/output impedance at an antenna-connecting input/output terminal of the power supply circuit is substantially 0Ω. 
     In the RFID chip package, the RFID chip preferably includes the voltage booster circuit, and the reactance component of the input/output impedance is about −200Ω. The power supply circuit is connected to the RFID chip, and the reactance component of the input/output impedance of the antenna terminal to which the antenna is connected is substantially 0Ω. Thus, matching can easily be provided with a general antenna such as a dipole type or a patch type, flexibility in antenna designing is increased, and hence band expansion is made easy. In addition, the impedance of a measuring system in measuring the RFID chip is preferably about 50Ω, for example, and thus the measurement of the RFID chip is also made easy. 
     According to various preferred embodiments of the present invention, an RFID chip having a high impedance characteristic can be suitably matched to an antenna having a low impedance characteristic, difficulty in antenna designing can be eliminated, and an RFID chip package is reduced in size. 
     The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a perspective view showing an RFID chip package according to a preferred embodiment of the present invention. 
         FIG. 2  is an equivalent circuit diagram showing a power supply circuit that is a first example of a preferred embodiment of the present invention. 
         FIG. 3  is a plan view showing respective base layers of a disassembled laminate constituting the power supply circuit that is the first example of a preferred embodiment of the present invention. 
         FIG. 4  is an equivalent circuit diagram showing a power supply circuit that is a second example of a preferred embodiment of the present invention. 
         FIG. 5  is a plan view showing respective base layers of a disassembled laminate constituting the power supply circuit that is the second example of a preferred embodiment of the present invention. 
         FIG. 6  is an equivalent circuit diagram showing a power supply circuit that is a third example of a preferred embodiment of the present invention. 
         FIG. 7  is a Smith chart showing the impedance matching characteristic of the power supply circuit that is the first example of a preferred embodiment of the present invention. 
         FIGS. 8A and 8B  show a preferred embodiment of an RFID tag according to the present invention, where  FIG. 8A  is an exploded perspective view, and  FIG. 8B  is a cross-sectional view. 
         FIG. 9  is an exploded perspective view showing an RFID tag according to another preferred embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Hereinafter, preferred embodiments of an RFID chip package and an RFID tag according to the present invention will be described with reference to the accompanying drawings. It is noted that in the drawings, common elements and portions are denoted by the same reference signs, and the overlap description is omitted. 
     As shown in  FIG. 1 , in an RFID chip package according to a preferred embodiment of the present invention, an RFID chip  50  is mounted on a power supply circuit substrate  10  includes a laminate that includes a power supply circuit. It is noted that the RFID chip  50  may be incorporated in the power supply circuit substrate  10  or may be accommodated in a recess (not shown) provided in the substrate  10 . 
     The RFID chip  50  preferably processes, for example, RF signals in the UHF band, includes a clock circuit, a logic circuit, a memory circuit, and the like, and has necessary information stored therein. In addition, the RFID chip  50  also preferably includes a voltage booster circuit such as a charge pump, and with regard to its input/output impedance, the real portion preferably is about 20Ω and the imaginary portion preferably is about −200Ω, for example. A pair of input/output terminal electrodes and a pair of mounting terminal electrodes are provided on the back surface of the RFID chip  50 . The input/output terminal electrodes are electrically connected via metal bumps or the like to power supply terminal electrodes  20   a  and  20   b  provided on the top surface of the power supply circuit substrate  10 , and the mounting terminal electrodes are electrically connected via metal bumps or the like to mounting terminal electrodes  20   c  and  20   d  provided on the top surface of the power supply circuit substrate  10 . It is noted that Au, solder, or the like can be used as the material of the metal bumps. 
     The power supply circuit preferably includes at least one inductance element, preferably also includes a capacitance element, and is incorporated in a power supply circuit substrate including a laminate. The reactance component of the input/output impedance of an antenna terminal electrode is set to substantially 0Ω. Hereinafter, a first example, a second example, and a third example of the power supply circuit will be described in detail. 
     As shown in  FIG. 2 , a power supply circuit  15 A that is a first example of a preferred embodiment of the present invention includes two power supply terminal electrodes  20   a  and  20   b  connected to the RFID chip  50  and antenna terminal electrodes  21   a  and  21   b  connected to an antenna which is not shown, and includes inductance elements L 1  and L 2  and capacitance elements C 1  and C 2 . The inductance element L 1  and the capacitance element C 1  are connected in series between the terminal electrodes  20   a  and  21   a . The inductance element L 2  is connected to a connection point between the inductance element L 1  and the capacitance element C 1  and a connection point between the terminal electrode  20   b  and the capacitance element C 2 . The capacitance element C 2  is connected in series between the terminal electrodes  20   b  and  21   b.    
     The inductance elements L 1  and L 2  are electromagnetically coupled to each other, the inductance element L 1  and the capacitance element C 1  are coupled to each other via an electromagnetic field, the inductance element L 2  and the capacitance element C 2  are coupled to each other via an electromagnetic field, and thus a resonant circuit is defined by the respective elements. In addition, as described with reference to  FIG. 3 , each of coil patterns defining the inductance elements L 1  and L 2 , respectively, has a line capacity. 
     The power supply circuit  15 A transmits a high-frequency signal that is transmitted from the RFID chip  50 , is inputted from the terminal electrodes  20   a  and  20   b , and has a predetermined frequency, from the terminal electrodes  21   a  and  21   b  to the antenna, and supplies a high-frequency signal received by the antenna, to the RFID chip  50  in the opposite direction. The power supply circuit  15 A has a predetermined resonant frequency, and the reactance component of the input/output impedance of the terminal electrodes  21   a  and  21   b  is set to substantially 0Ω. Thus, the input impedance, from the RFID chip  50 , of which the real portion preferably is about 20Ω and the imaginary portion preferably is about −200Ω becomes an output impedance of which the real portion is substantially 50Ω and the imaginary portion is 0Ω, and hence the impedance is matched to that of the antenna. In addition, the impedance of a measuring system in measuring the RFID chip  50  is preferably about 50Ω, for example, and thus the measurement of the RFID chip  50  is also made easy. 
     Next, the structure of a laminate (the power supply circuit substrate  10 ) including the power supply circuit  15 A will be described with reference to  FIG. 3 . The laminate includes base layers  31   a  to  31   k , each of the base layers  31   a  to  31   j  is a ceramic sheet formed from a dielectric material or a magnetic material, and the base layer  31   k  is a transfer sheet. In  FIG. 3 , each electrode and each conductor are provided on each of the base layers  31   a  to  31   k , and lamination is performed in order in which the base layer  31   a  is stacked on the base layer  31   b  and further stacked on the base layers  31   c ,  31   d , . . . etc. The base layer (transfer sheet)  31   k  which is stacked in the lowermost layer is peeled off after the lamination such that the terminal electrodes  20   a  to  20   d  are exposed at the bottom surface of the laminate. 
     Specifically, the terminal electrodes  21   a  and  21   b , which are connected to the antenna, and a via-hole conductor  29   c  are provided in the base layer  31   a , and capacitance electrodes  22   a  to  22   f  and via-hole conductors  29   d ,  29   e , and  29   f  are provided in the base layers  31   b ,  31   c , and  31   d , respectively. Loop conductors  23   a  to  23   f  and  24   a  to  24   d  and via-hole conductors  29   a ,  29   b , and  29   g  are provided in the base layers  31   e  to  31   j . The terminal electrodes  20   a  to  20   d  and a via-hole conductor  29   h  are formed in the base layer  31   k.    
     By laminating the base layers  31   a  to  31   k , an equivalent circuit shown in  FIG. 2  is defined. In other words, the capacitance element C 1  is defined by the capacitance electrodes  22   a ,  22   c , and  22   e , and the capacitance element C 2  is defined by the capacitance electrodes  22   b ,  22   d , and  22   f . In addition, the inductance element L 1  is defined by a coil pattern in which the loop conductors  23   a  to  23   f  are defined by the via-hole conductor  29   a , and the inductance element L 2  is defined by a coil pattern in which the loop conductors  24   a  to  24   d  are defined by the via-hole conductor  29   b.    
     The impedance matching characteristic of the power supply circuit  15 A incorporated in the power supply circuit substrate  10  as described above is shown in a Smith chart in  FIG. 7 . With regard to the input/output impedance of the RFID chip  50 , the real portion preferably is about 20Ω and the imaginary portion preferably is about −200Ω, and with regard to the impedance on the antenna side (after conversion), the real portion preferably is about 50Ω and the imaginary portion is 0Ω, for example. 
     Meanwhile, the inductance elements L 1  and L 2  are arranged adjacently in the laminate such that the winding axes of the coil patterns constituting the inductance elements L 1  and L 2 , respectively, are parallel or substantially parallel to each other. The coil patterns are wound such that the directions of magnetic fluxes thereof at a moment are the same (see arrows in  FIG. 3 ). However, the coil patterns may be wound such that these directions are opposite to each other. In addition, the openings of the respective coil patterns are covered with the capacitance electrodes  22   e  and  22   f  such that magnetic fluxes passing therethrough are guided to the capacitance elements C 1  and C 2 . In other words, the inductance element L 1  and the capacitance element C 1  are coupled to each other via an electromagnetic field, and the inductance element L 2  and the capacitance element C 2  are coupled to each other via an electromagnetic field. In addition, by connecting the capacitance elements C 1  and C 2  to the antenna terminal electrodes  21   a  and  21   b , an RFID chip package having resistance to ESD can be realized. 
     As shown in  FIG. 4 , a power supply circuit  15 B that is a second example of a preferred embodiment of the present invention includes two power supply terminal electrodes  20   a  and  20   b  connected to the RFID chip  50  and antenna terminal electrodes  21   a  and  21   b  connected to an antenna which is not shown, and includes inductance elements L 5 , L 6 , and L 7 . The inductance elements L 5  and L 6  are connected in series between the terminal electrodes. The inductance element L 7  is connected to a connection point between the inductance elements L 5  and L 6  and between the terminal electrodes  20   b  and  21   b . The inductance elements L 5 , L 6 , and L 7  are electromagnetically coupled to each other. In addition, as described with reference to  FIG. 5 , coil patterns defining the inductance elements L 5 , L 6 , and L 7 , respectively include line capacities and define a resonant circuit. 
     The function of the power supply circuit  15 B preferably is basically the same as that of the power supply circuit  15 A which is the first example, and the power supply circuit  15 B transmits a high-frequency signal that is transmitted from the RFID chip  50 , is inputted from the terminal electrodes  20   a  and  20   b , and has a predetermined frequency, from the terminal electrodes  21   a  and  21   b  to the antenna, and supplies a high-frequency signal received by the antenna to the RFID chip  50  in the opposite direction. The power supply circuit  15 B has a predetermined resonant frequency, and the reactance component of the input/output impedance of the terminal electrodes  21   a  and  21   b  preferably is set to substantially 0Ω. Thus, the input impedance, from the RFID chip  50 , of which the real portion preferably is about 20Ω and the imaginary portion preferably is about −200Ω becomes an output impedance of which the real portion preferably is substantially 50Ω and the imaginary portion preferably is 0Ω, for example, and hence the impedance is matched to that of the antenna. 
     Next, the structure of a laminate (the power supply circuit substrate  10 ) including the power supply circuit  15 B will be described with reference to  FIG. 5 . Each of base layers  41   a  to  41   o  is a ceramic sheet formed from a dielectric material or a magnetic material, and a base layer  41   p  is a transfer sheet. In addition, the order in which the base layers  41   a  to  41   p  are laminated is also preferably the same as in the first example. The base layer (transfer sheet)  41   p  which is stacked in the lowermost layer is peeled off after the lamination causing the terminal electrodes  20   a  to  20   d  to be exposed at the bottom surface of the laminate. 
     Specifically, the terminal electrodes  21   a  and  21   b , which are connected to the antenna, and via-hole conductors  43   c  and  43   g  are provided in the base layer  41   a , and the via-hole conductors  43   c  and  43   g  are provided in the base layer  41   b . Loop conductors  42   a  to  42   l  and via-hole conductors  43   a ,  43   b ,  43   d , and  43   g  are provided in the base layers  41   c  to  41   n , respectively, and via-hole conductors  43   e  and  43   f  are provided in the base layer  41   o . The terminal electrodes  20   a  to  20   d  and the via-hole conductors  43   e  and  43   f  are provided in the base layer  41   p.    
     By laminating the base layers  41   a  to  41   p , an equivalent circuit shown in  FIG. 4  is defined. In other words, the inductance element L 5  is defined by a coil pattern in which a portion of the loop conductor  42   d  and the loop conductors  42   e  to  42   l  are defined by the via-hole conductor  43   b . The inductance element L 6  is defined by a coil pattern in which the loop conductors  42   a  to  42   c  and a portion of the loop conductor  42   d  are defined by the via-hole conductor  43   a . Furthermore, a portion of the loop conductor  42   d  provided in the base layer  41   f  defines the inductance element L 7 . In addition, a line  45   a  shown in  FIG. 4  is defined by the via-hole conductors  43   d  and  43   f , and a line  45   b  is defined by the via-hole conductor  43   g  and the via-hole conductor  43   d  in the base layer  41   f.    
     The impedance matching characteristic of the power supply circuit  15 B included in the power supply circuit substrate  10  as described above preferably is basically the same as in the Smith chart in  FIG. 7 . 
     As shown in  FIG. 6 , a power supply circuit  15 C that is a third example of a preferred embodiment of the present invention is a circuit in which the inductance element L 7  is omitted from the power supply circuit  15 B, which is the second example, and the connection point between the inductance elements L 5  and L 6  and the lines  45   a  and  45   b  connecting the terminal electrodes  20   b  and  21   b  are connected to each other by a line  45   c . The inductance elements L 5  and L 6  are electromagnetically coupled to each other, and the coil patterns thereof include line capacities and define a resonant circuit. The action and function of the power supply circuit  15 C preferably are basically the same as those of the power supply circuit  15 B, which is the second example. 
     Meanwhile, each of the inductance elements L 5  and L 6  has a function to provide impedance matching between the RFID chip and the antenna. In particular, the inductance element L 5  is an inductance inserted in series on the RFID chip side. This inductance mainly has a function to shift the impedance along the imaginary axis direction on an impedance chart. On the other hand, the inductance element L 6  is an inductance inserted in series on the antenna side and is arranged so as to extend between the two terminals  21   a  and  21   b  on the antenna side. This inductance mainly has a function to shift the impedance on the imaginary axis on an admittance chart. By making the inductance elements L 5  and L 6  have the above functions, the impedance can be efficiently matched. 
     In particular, by making the inductance value of the inductance element L 5  higher than the inductance value of the inductance element L 6 , even when, with regard to the impedance on the RFID chip side (the input/output impedance), for example, the real portion is about 20Ω and the imaginary portion is about −200Ω, it can be made to get close to 50Ω with a relatively simple configuration, for example. 
     In addition, the inductance elements L 5  and L 6  are preferably coupled to each other via an electromagnetic field (mainly, a magnetic field). As a result, a necessary inductance value can be obtained with a small pattern. Furthermore, when the coil patterns of the inductance elements L 5  and L 6  are wound and arranged such that magnetic fields generated in the respective coil patterns are in-phase with each other (the directions of the magnetic fields generated in the respective coil patterns are the same), the magnetic fields of the respective coils enhance each other, and a high inductance value can be obtained even though the size of each coil is small. Thus, it is made possible to perform communication by the RFID chip and the power supply circuit substrate in a short range of several centimeters or less (even when an antenna is not connected). 
     An RFID tag  60 A according to a preferred embodiment of the present invention will be described with reference to  FIG. 8 . In the RFID tag  60 A, a first radiating element  65  and a second radiating element  66  that define and serve as a dipole type antenna are provided as a thin-film conductor or a thick-film conductor on a base film  61 , and the power supply circuit substrate  15  including the RFID chip  50  mounted thereon is connected to the first radiating element  65  and the second radiating element  66 . Specifically, the antenna terminal electrodes  21   a  and  21   b  (a third terminal  21   a  and a fourth terminal  21   b ) provided on the back surface of the power supply circuit substrate  15  are connected to connection portions  65   a  and  66   a  of the first and second radiating elements  65  and  66  via conductive bonding materials  67   a  and  67   b . The power supply terminal electrodes  20   a  and  20   b  (a first terminal  20   a  and a second terminal  20   b ) provided on the front surface of the power supply circuit substrate  15  are connected to the input/output terminal electrodes of the RFID chip  50  via conductive bonding materials  68   a  and  68   b.    
     An RFID tag  60 B according to another preferred embodiment of the present invention will be described with reference to  FIG. 9 . In the RFID tag  60 B, a radiating element  70  that defines and serves as a loop type antenna is provided as a thin-film conductor or a thick-film conductor on a base film  61 , and the power supply circuit substrate  15  including the RFID chip  50  mounted thereon is connected to connection portions  70   a  and  70   b  of the radiating element  70 . The connection relationship between the power supply circuit substrate  15  and the RFID chip  50 , and the connection relationship between the power supply circuit substrate  15  and the connection portions  70   a  and  70   b  are preferably the same as in the RFID tag  60 A according to preferred embodiment described above. 
     It is noted that the RFID chip package and the RFID tag according to the present invention are not limited to the preferred embodiments described above, and can be modified in a variety of ways within the scope of the present invention. 
     As described above, preferred embodiments of the present invention are useful for an RFID chip package and an RFID tag, and in particular, are excellent in that an RFID chip having a high impedance characteristic can be suitably coupled to an antenna having a low impedance characteristic. 
     While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.