Patent Publication Number: US-7721124-B2

Title: System and method for signaling a first device from a second device

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
   This application is a continuation application of prior application Ser. No. 10/202,951, filed Jul. 24, 2002 now U.S. Pat. No. 7,069,454. 

   BACKGROUND 
   Modern electronic devices, such as computing systems, strive to offer a variety of features to users. Some of these features are standard features known and used in a particular industry, while others are unique and differentiate a particular product or manufacturer from its competitors. One example of a feature that is offered in some computing systems is the ability to turn off, or place in a reduced power state, a first device from a second device. For example, turning off a display screen may also turn off a computing device, such as a laptop or desktop computer, connected to that display screen. 
   Another feature that may be offered in some computing systems is the ability to have multiple display screens connected to a computing device. The display screens may be connected to the computing device using one or more connection techniques. For example, the connection means may be unique to a manufacturer. Other connection techniques may include connectors or ports having predefined functions. The predefined functions may be defined by an individual manufacturer or designer, or by a standards organization. A government, administrative department, technical, or industry group are examples of standards organizations that may define the functions and/or signals that create a particular standard. 
   One limitation with using a connection comprised of signals having predefined functions is that additional features not defined in the standard may be lost. A manufacturer may not be able to implement any additional features since there may not be any free, or unused, signal lines available in the connection. Thus, features that a user may expect with a particular product and/or manufacturer may be lost when a system uses a connection technique having predefined functions. 
   SUMMARY 
   A signaling circuit may be implemented with a connection comprised of signal lines having predefined functions. The predefined functions may be defined by an individual manufacturer or designer, or by a standards organization. The signaling circuit transmits information in addition to the predefined functions. The information may be transmitted from a second device, such as a visual display screen, to a first device, such as a computing device, using at least one signal line in the connection. The information may include information about the state or status of the second device. 
   In an exemplary embodiment of the present invention, the signaling circuit may place the first device in a reduced power state when a switch associated with the second device is asserted. The signaling circuit may generate a signal transition on one or more signal lines having a range of signal values for a particular output state. For example, a high output state may be defined to be within a range of 2.4 volts to 5.5 volts. This range may be subdivided in order to signal the first device. 
   In an exemplary embodiment of the present invention, a voltage level at or near 3 volts may indicate the signal line is to be used for its predefined function only, while a voltage level at or near 5 volts may transmit information about the state of the switch in addition to the predefined function. Thus, the signaling circuit may utilize the one or more signal lines for their predefined functions and, at the same time, transmit information to the first device. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself, however, as well as a preferred mode of use, and further objects and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein: 
       FIG. 1  is a block diagram illustrating a first embodiment of a system that may be used to implement the present invention; 
       FIG. 2  is a block diagram depicting a second embodiment of a system that may be used to implement the present invention; 
       FIG. 3   a  illustrates an exemplary system as shown in  FIG. 1 ; 
       FIG. 3   b  depicts an exemplary system  200  as shown in  FIG. 2 ; 
       FIG. 4  is a block diagram illustrating an exemplary signaling circuit according to the present invention; 
       FIG. 5  is a block diagram depicting an alternate exemplary signaling circuit according to the present invention; 
       FIGS. 6(   a )- 6 ( b ) are circuit diagrams of an exemplary signaling circuit according to the present invention; 
       FIG. 7  is a timing diagram for certain signals in the exemplary signaling circuit of  FIG. 6 ; and 
       FIG. 8  is a flowchart illustrating an exemplary method for signaling a first device from a second device according to the present invention. 
   

   DETAILED DESCRIPTION 
   To facilitate an understanding of the present invention, it is described hereinafter in the context of a specific embodiment. In particular, reference is made to the implementation of the invention in a computing system utilizing a connection or port having predefined signals and/or functions. The computing system includes a computing device connected to a visual display screen through a Digital Visual Interface (DVI) connection or port. It will be appreciated, however, that the practical applications of the invention are not limited to this particular embodiment. Rather, the invention can be employed to signal other information in other types of electronic devices and systems, including, but not limited to, broadcast systems, network structures, and electronic devices that utilize one or more connections or ports having signal lines with predefined functions. 
   With reference now to the figures and in particular with reference to  FIG. 1 , a block diagram illustrates a first embodiment of a system that may be used to implement the present invention. System  100  may include, but is not limited to, a second device  102  electronically connected to a first device  104  via connection  106 . In an exemplary embodiment, the second device may be implemented as a visual display screen and the first device may be implemented as a computing device. Connection  106  may include signal lines having predefined signals and/or functions. The predefined signals and/or functions may be defined by an individual manufacturer or designer, or by a standards organization. In this exemplary embodiment, connection  106  may be implemented as a Digital Visual Interface (DVI) connection. In alternate embodiments, system  100  may be implemented using various components and configurations in addition to, or instead of, those discussed in conjunction with the  FIG. 1  embodiment. 
     FIG. 2  is a block diagram depicting a second embodiment of a system that may be used to implement the present invention. System  200  may include, but is not limited to, an adapter  202  electronically connected to a second device  204  and to a first device  104 . In the  FIG. 2  embodiment, the second device may be implemented as a visual display screen and the first device may be implemented as a computing device. In alternate embodiments, system  200  may be implemented using various components and configurations in addition to, or instead of, those discussed in conjunction with the  FIG. 2  embodiment. 
   Referring now to  FIG. 3   a , an exemplary system from  FIG. 1  is shown. System  100  may include, but is not limited to, a visual display screen  102  electronically connected to a computing device  104  via connection  106 . Visual display screen  102  may be implemented as a digital display, such as a Liquid Crystal Display (LCD) or plasma display. Alternatively, visual display screen  102  may be implemented as an analog display, such as a cathode-ray-tube (CRT) display. Computing device  104  may be implemented as a portable or desktop computer. And connection  106  may be implemented as a Digital Visual Interface (DVI) connection. In alternate embodiments, system  100  may be implemented using various components and configurations in addition to, or instead of, those discussed in conjunction with the  FIG. 3   a  embodiment. 
     FIG. 3   b  depicts an exemplary system  200  as shown in  FIG. 2 . System  200  may include, but is not limited to, an adapter  202  electronically connected to a visual display screen  204  and to a computing device  104 . Visual display screen  204  may be implemented as a digital or analog display screen. Computing device  104  may be implemented as a portable or desktop computer. Adapter  202  may be implemented as a DVI adapter, such as the DVI to ADC Adapter sold by Apple Computer®. In alternate embodiments, system  200  may be implemented using various components and configurations in addition to, or instead of, those discussed in conjunction with the  FIG. 3   b  embodiment. 
   Referring now to  FIG. 4 , a block diagram illustrates an exemplary signaling circuit according to the present invention. Second device  102  may include, but is not limited to, a secondary signal generation  400 , a primary signal generation  402 , and a switch  408 . First device  104  may include, but is not limited to, a secondary signal detection  404  and a system detect and enable  406 . In alternate embodiments, first and second devices may be implemented using various components and configurations in addition to, or instead of, those discussed in conjunction with the  FIG. 4  embodiment. 
   In this exemplary embodiment, secondary signal generation  400  may perform similarly to that of a two-state power supply, in that second signal generation  400  may generate two signal levels. A first signal level may be generated when the signal lines in connection  106  are being used for their predefined functions only. A second signal level may be generated when at least one signal line is used for signaling first device  104 . In the  FIG. 4  embodiment, the second signal level may be generated in order to deactivate first device  104 . 
   Secondary signal generation  400  may generate or alter a signal when switch  408  is depressed or asserted. In this exemplary embodiment, switch  408  may be pressed or asserted in order to deactivate first device  104 . The second device  102  may or may not respond to the assertion of switch  408 . In this exemplary embodiment, asserting switch  408  may also deactivate second device  102 . The term “deactivate” is defined herein as a reduced power state, including, but not limited to, a sleep state and an off (i.e., no power) state. At least one predefined signal line in connection  106  may then be utilized to transmit this information to first device  104  in order to deactivate first device  104 . 
   Secondary signal detection  404  may be used to detect the different signal levels generated by secondary signal generation  400 . When a signal level indicates switch  408  has been asserted, secondary signal detection  404  generates a signal that may cause system detect and enable  406  to initiate deactivation of first device  104 . System detect and enable  406  may also be used to detect the presence of secondary signal generation  400 . If secondary signal generation  400  is not present in the system, the system detect and enable  406  may then disable secondary signal detection  404 . 
     FIG. 5  is a block diagram depicting an alternate exemplary signaling circuit according to the present invention. Adapter  202  may include, but is not limited to, secondary signal generation  400  and primary signal generation  402 . Second device  204  may include, but is not limited to, switch  408 . And first device  104  may include, but is not limited to, secondary signal detection  404  and system detect and enable  406 . The various components in adapter  202 , second device  204 , and first device  104 , may operate in a manner similar to the components described with reference to  FIG. 4 . However, in alternate embodiments, adapter, first device, and second device may be implemented using various components and configurations in addition to, or instead of, those discussed in conjunction with the  FIG. 5  embodiment. 
   Referring now to  FIGS. 6(   a )- 6 ( b ), circuit diagrams of an exemplary signaling circuit according to the present invention are shown. The  FIG. 6  example is presented for purposes of illustration, and in alternate embodiments, the present invention may utilize various components and component values other than those discussed in conjunction with the  FIG. 6  embodiment. The operation of the exemplary signaling circuit will be described in conjunction with the timing diagram in  FIG. 7 . 
   Initially, system detect and enable  406  may determine whether secondary signal generation  400  is present in the system. If secondary signal generation  400  is present, a signal DDC — +5V and a signal DDC_ON in primary signal generation  402  may be in a high state (see  FIG. 7 ). When DDC_ON is in a high state, transistor Q 6  in primary signal generation  402  may be turned on, thereby connecting primary signal generation  402  to secondary signal generation  400 . In particular, transistor Q 6  connects resistor R 9  to a signal V_HPD in secondary signal generation  400 . In this exemplary embodiment, the V_HPD signal may be used to signal, including deactivate, first device  104 . 
   The Digital Visual Interface (DVI) specification defines a high level output for the V_HPD signal to be within a range of 2.4 volts to 5.5 volts. This range may be subdivided in the  FIG. 6  embodiment in order to signal first device  104 . In particular, the V_HPD signal may have a high voltage level at or near 3 volts or 5 volts, both of which comply with the DVI specification. The voltage level of V_HPD may be controlled by the PWR_SW_IN* signal and resistors R 6 , R 7 , and R 8  in secondary signal generation  400 . When the system is operating in a non-signaling mode, the signal PWR_SW_IN* may be set at a high state, and the reference divider for a voltage regulator (U 1  and Q 1 ) is comprised of resistors R 6  and R 8 . The ratio of resistors R 6  and R 8  may set voltage regulator U 1 /Q 1  to regulate the V_HPD signal at or near 3 volts. But when information is to be signaled to first device  104 , such as when a switch associated with the second device is depressed or asserted, the signal PWR_SW_IN* may transition to a low state (point  700  in  FIG. 7 ) and the ratio of resistors R 6 , R 7 , and R 8  may adjust the level of the V_HPD signal at or near 5 volts (point  702  in  FIG. 7 ). 
   When the V_HPD signal transitions to or near 5 volts, a signal DVI_HPD may also transition from 3 volts to approximately 5 volts (point  704 ). The DVI_HPD signal may be transmitted to first device  104  by at least one signal line in the DVI connection. The transition of the DVI_HPD signal to approximately 5 volts may be detected by secondary signal detection  404  in first device  104 . In particular, the input V+ into comparator U 2  may transition to an increased voltage level, such as 2.5 volts, causing the output of comparator U 2  to transition to a high state (points  706  and  708  in  FIG. 7 ). This, in turn, may activate transistor Q 13  in system detect and enable  406 . When transistor Q 13  is turned on, a signal PWR_SW_OUT* may transition to a low state (point  710  in  FIG. 7 ). In this exemplary embodiment, the transition of signal PWR_SW_OUT* to a low state may initiate deactivation of first device  104 . 
   When PWR_SW_IN* transitions back to a high state, the signals V_HPD, DVI_HPD, and V+ may transition to lower voltage states (points  712 ,  714 ,  716 , and  718  in  FIG. 7 ). In the  FIG. 6  embodiment, V_HPD and DVI_HPD may transition back to approximately 3 volts, and V+ transitions to approximately 1.5 volts. In response, the signal COMP_OUT may then transition to a low state (point  720 ), causing the signal PWR_SW_OUT* to return to a high state (point  722  in  FIG. 7 ). Thus, the signaling circuit in the present invention may utilize a signal output range in a manner that allows the signaling circuit to simultaneously use one or more signal lines for their predefined functions and transmit information to the first device. 
     FIG. 8  is a flowchart illustrating an exemplary method for signaling a first device from a second device according to the present invention. The  FIG. 8  example is presented for purposes of illustration, and in alternate embodiments, the present invention may utilize various steps and sequences other than those discussed in conjunction with the  FIG. 8  embodiment. 
   Initially a determination may be made as to whether or not first device  104  is turned on or off, as shown in block  800 . If first device  104  is turned on, the process may pass to blocks  802  and  804  where the presence of second device  102  may be acknowledged and the device type determined. In this exemplary embodiment, determining the device type includes the detection of secondary signal generation  400 . 
   A determination may then be made as to whether or not the second device  104  is the correct type (block  806 ). If it is the correct type, the secondary signal generation  400  may be connected electronically to secondary signal detection  406 , as shown in block  808 . A determination may then be made as to whether or not a switch associated with the second device has been depressed or asserted. In the exemplary embodiment of  FIG. 6 , asserting the switch causes the PWR_SW_IN* to transition to low state and the signal V_HPD to increase from approximately 3 volts to approximately 5 volts, thereby signaling the first device  104  that the switch has been asserted. 
   If the switch has been asserted, the process may continue at block  812  where the secondary signal detection may be activated in order to initiate deactivation of the first device. In the  FIG. 6  embodiment, the secondary signal detection may be activated by increasing the voltage level of signal V+, which causes the output of the comparator U 2  to transition to a high state. When the output of comparator U 2  is high, the transistor Q 13  may be activated and the signal PWR_SW_OUT* may transition to a low state. This transition may initiate the deactivation of first device  104 . 
   Next, a determination may be made as to whether or not the first device  104  has been deactivated. This step is shown in block  814 . If not, the process may return to block  810  and repeat until first device  104  is deactivated. When first device  104  is deactivated, the process may end. 
   Thus, the present invention provides a mechanism for signaling a first device from a second device using at least one predefined signal line in a connection between the two electronic devices. While the invention has been particularly shown and described with reference to an exemplary embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention. For example, the present invention has been described with reference to deactivating the first device from the second device when a switch associated with the second device is asserted. The invention, however, is not limited to this function. The present invention may be used to signal any information along with the predefined functions of the connection. For example, the state or status of a particular device or a system may be transmitted to another device using the techniques of the present invention. Additionally, actions or functions other than asserting a switch may be used to signal information to the first device.