Patent Publication Number: US-11640781-B2

Title: Display device and data driving device overdriving a pixel with a power voltage

Description:
CROSS REFERENCE TO RELATED APPLICATION 
     This application claims priority from Korean Patent Application No. 10-2020-0180767, filed on Dec. 22, 2020, which is hereby incorporated by reference for all purposes as if fully set forth herein. 
     BACKGROUND 
     1. Technical Field 
     Various embodiments generally relate to a data driving device and a display device including the same. 
     2. Related Art 
     A display device includes a data processing device called a timing controller, a data driving device called a source driver, and a display panel. The data processing device may be designed to provide image data for display, control data and a clock to the data driving device in the form of a packet. 
     The data driving device receives the image data and provides a data voltage corresponding to the image data to the display panel, and the display panel displays a screen corresponding to the data voltage. 
     In such a display device, the adoption of a technique for improving a slew rate and a display speed in various components is required, and the adoption of a technique for improving a display speed at the levels of the data processing device and the data driving device is actively studied. 
     SUMMARY 
     Under such a background, in one aspect, the present disclosure is to provide a technique of improving the slew rate and the display speed of a display device by overdriving a pixel of a display panel with a power voltage of a data driving device. 
     In one aspect, the present disclosure provides a data driving device comprising: a buffer configured to, in order to drive one pixel among a plurality of pixels connected to one data line, output a data voltage of the one pixel by using a power voltage; and a multiplexer configured to receive the power supply voltage, to receive the data voltage from the buffer, to output the power voltage to the one data line to overdrive the one pixel, and then, to output the data voltage to the one data line. 
     The data driving device may further comprise a driving control circuit to determine whether to overdrive the one pixel by comparing pixel data of the one pixel with pixel data of another pixel located before the one pixel. 
     The driving control circuit may compare a first most significant bit (MSB) included in the pixel data of the other pixel with a second MSB included in the pixel data of the one pixel and, when the first MSB and the second MSB are different, identify in a preset lookup table an overdrive time depending on a separation distance between the one pixel and the buffer, generate an overdrive control signal corresponding to the overdrive time, and transmit it to the multiplexer. 
     In another aspect, the present disclosure provides a display device comprising: a data processing device configured to transmit image data including a plurality of pixel data; a power management device configured to output a power voltage; and a data driving device configured to receive the image data, to output, in order to drive one pixel among a plurality of pixels connected to one data line, a data voltage of the one pixel by using the power voltage and the image data, and, before outputting the data voltage of the one pixel, to output the power voltage to the one data line to overdrive the one pixel. 
     The data driving device may comprise a buffer which outputs a data voltage of the one pixel to the one data line. When the one pixel is located at a shortest distance from the buffer compared with the distances of the other pixels, the data driving device may overdrive the one pixel for a shortest time and when the one pixel is located at a longest distance from the buffer compared with the distances of the other pixels, the data driving device may overdrive the one pixel for a longest time. 
     As is apparent from the above description, according to the embodiments, because a pixel is overdriven with a power voltage higher than a maximum output voltage of a buffer, it is possible to improve the slew rate and the display speed of a display device as compared to an existing scheme of overdriving a pixel with a voltage outputted from the buffer. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a configuration diagram of a display device in accordance with an embodiment. 
         FIG.  2    is a diagram to assist in the explanation of an overdrive scheme of a general data driving device. 
         FIG.  3    is a configuration diagram of a data driving device in accordance with an embodiment. 
         FIG.  4    is a diagram to assist in the explanation of an overdrive scheme of the data driving device in accordance with the embodiment. 
         FIGS.  5  and  6    are diagrams to assist in the explanation of a configuration of setting an overdrive time of a pixel for each pixel in the data driving device in accordance with the embodiment. 
         FIG.  7    is a diagram to assist in the explanation of a configuration of setting an overdrive time of a pixel for each pixel group in the data driving device in accordance with the embodiment. 
         FIG.  8    is a diagram to assist in the explanation of a configuration of changing sizes of pixel groups in each frame in the data driving device in accordance with the embodiment. 
         FIG.  9    is a diagram to assist in the explanation of a configuration of determining whether to overdrive a pixel in a data processing device in accordance with an embodiment. 
     
    
    
     DETAILED DESCRIPTION 
       FIG.  1    is a configuration diagram of a display device in accordance with an embodiment. 
     Referring to  FIG.  1   , a display device  100  may include a display panel  110 , a data driving device  120 , a gate driving device  130  and a data processing device  140 . 
     A plurality of data lines DL and a plurality of gate lines GL may be disposed in the display panel  110 . Further, a plurality of pixels P may be disposed in the display panel  110 . The plurality of pixels P may be disposed adjacent to one another in a horizontal direction H and a vertical direction V of the display panel  110  to represent a quadrangular shape. The quadrangular shape is similar to a matrix. A set of a plurality of pixels P arranged in the horizontal direction H may be defined as a pixel row or a horizontal line, and a set of a plurality of pixels P arranged in the vertical direction V may be defined as a pixel column or a vertical line. 
     The gate driving device  130  may supply a scan signal of a turn-on voltage or a turn-off voltage to a gate line GL. When the scan signal of the turn-on voltage is supplied to a pixel P, the corresponding pixel P is connected to a data line DL, and when the scan signal of the turn-off voltage is supplied to a pixel P, the connection between the corresponding pixel P and a data line DL is released. 
     The data driving device  120  supplies a data voltage to a data line DL. The data voltage supplied to the data line DL is transferred to a pixel P which is connected to the data line DL according to the scan signal. 
     The data processing device  140  may supply various control signals to the gate driving device  130  and the data driving device  120 . The data processing device  140  may generate a gate control signal GCS which causes a scan to be started according to a timing implemented in each frame, and may transmit the gate control signal GCS to the gate driving device  130 . The data processing device  140  may convert image data, inputted from the outside, into image data IMG to match a data format used in the data driving device  120 , and may output the image data IMG to the data driving device  120 . The data processing device  140  may transmit a data control signal DCS which controls the data driving device  120  so that the data driving device  120  supplies a data voltage to each pixel P according to each timing. 
     At least one of the data driving device  120 , the gate driving device  130  and the data processing device  140  described above may be included in one integrated circuit (IC). 
     Although not illustrated in  FIG.  1   , the display device  100  may further include a power management device for outputting a power voltage to the data driving device  120 . 
     The power management device may generate a common electrode voltage (VCOM) and output the common electrode voltage (VCOM) to the display panel  110 , and may generate a gate low voltage (VGL) and a gate high voltage (VGH) and output the gate low voltage (VGL) and the gate high voltage (VGH) to the gate driving device  130 . 
     The display device  100  in accordance with the embodiment may be a device which is driven at a high speed. 
     The data driving device  120  may precharge a pixel P by outputting an overdrive voltage to the pixel P so as to reduce a display time. 
     In other words, the data driving device  120  may precharge a pixel P by outputting an overdrive voltage to the pixel P so as to improve a slew rate and a display speed. 
     In an overdrive scheme of a general data driving device, as illustrated in  FIG.  2   , before a buffer  1  outputs a data voltage V_data to a pixel P which is connected to a data line DL, the buffer  1  precharges the pixel P by outputting, by itself, an overdrive voltage to the pixel P. 
     The buffer  1  outputs the data voltage V_data and the overdrive voltage by using a power voltage. 
     Since a maximum output voltage of the buffer  1  is lower than the power voltage, there is a limit in reducing a display time even though the buffer  1  outputs the overdrive voltage at the maximum. 
     In an embodiment, in order to overcome such a problem, the data driving device  120  overdrives a pixel P with a power voltage. 
     Detailed description for this is as follows. 
       FIG.  3    is a configuration diagram of the data driving device  120  in accordance with an embodiment. 
     Referring to  FIG.  3   , the data driving device  120  may include a first latch circuit  310 , a second latch circuit  320 , a digital-to-analog converter (DAC)  330 , a buffer  340 , a multiplexer (MUX)  350  and a driving control circuit  360 . 
     The first latch circuit  310  may latch the image data IMG. The first latch circuit  310  may temporarily store image data and then output the image data to the second latch circuit  320 . The first latch circuit  310  may temporarily store image data and then output the image data to the second latch circuit  320  according to a clock of a shift register (not illustrated). 
     The second latch circuit  320  may latch image data. The second latch circuit  320  may temporarily store image data and then output the image data to the digital-to-analog converter  330 . The second latch circuit  320  may temporarily store image data and then output the image data to the digital-to-analog converter  330  according to a clock of a shift register (not illustrated). 
     The digital-to-analog converter  330  may receive image data from the second latch circuit  320 . The digital-to-analog converter  330  may generate a data voltage, as an analog signal, from the image data. The digital-to-analog converter  330  may select a gray scale voltage, corresponding to the image data transmitted from the second latch circuit  320 , among gray scale voltages of a preset step generated from a gamma reference voltage inputted from the outside, and may output the selected gray scale voltage to the buffer  340 . 
     The buffer  340  may receive a data voltage V_data from the digital-to-analog converter  330 . The buffer  340  may amplify the data voltage V_data and output an amplified data voltage to the data line DL. 
     In detail, as illustrated in  FIG.  4   , in order to drive a pixel P among a plurality of pixels P connected to a data line DL, the buffer  340  may amplify a data voltage of the pixel P by using a power voltage inputted from a power voltage line PL and output an amplified data voltage. The plurality of pixels P connected to the data line DL may be defined as one channel CH. In an embodiment, the data voltage may be any one of a positive data voltage and a negative data voltage, and the buffer  340  may be any one of a positive buffer and a negative buffer. The power voltage may be at least one of an analog power voltage (AVDD), a half power voltage (HVDD) and a ground voltage (GND). 
     The multiplexer  350  may receive the power voltage from the power voltage line PL and receive a data voltage from the buffer  340 . 
     The multiplexer  350  may receive an overdrive control signal OD_CTR from the driving control circuit  360  to be described later. 
     Through the overdrive control signal OD_CTR, the multiplexer  350  may overdrive the pixel P by outputting the power voltage to the data line DL. 
     After overdriving the pixel P, the multiplexer  350  may output the data voltage, inputted from the buffer  340 , to the data line DL. The data voltage outputted to the data line DL may be supplied to the pixel P. 
     The multiplexer  350  described above may include a first switch circuit S 1  (see  FIG.  4   ) and a second switch circuit S 2  (see  FIG.  4   ) for selecting one of two inputs. 
     The first switch circuit S 1  receives the data voltage from the buffer  340 . The second switch circuit S 2  receives the power voltage from the power voltage line PL. 
     When the second switch circuit S 2  is turned on by the overdrive control signal OD_CTR, the first switch circuit S 1  may be turned off. Conversely, when the first switch circuit S 1  is turned on, the second switch circuit S 2  may be turned off. 
     In an embodiment, when the second switch circuit S 2  is turned on, the pixel P may be overdriven by the power voltage. 
     Since the power voltage is higher than a maximum output voltage of the buffer  340 , a slew rate may be improved compared to an existing scheme of overdriving a pixel P with a voltage outputted from the buffer  340 . Due to this fact, a display speed may also be improved. 
     Meanwhile, in an embodiment, an overdrive time of the multiplexer  350  may be differentiated depending on a separation distance between each of the plurality of pixels P connected to the data line DL and the buffer  340 . That is to say, a turn-on time of the second switch circuit S 2  may be differentiated depending on the separation distance. 
     In detail, as illustrated in  FIG.  5   , the multiplexer  350  may perform the overdrive of a first pixel P 1 , located at a shortest distance NEAR from the buffer  340  among the plurality of pixels P, for a shortest time T 1 . 
     The multiplexer  350  may perform the overdrive of an Nth pixel P_N, located at a longest distance FAR from the buffer  340  among the plurality of pixels P, for a longest time T 1 ×N. 
     As described above, the multiplexer  350  may increase an overdrive time of a pixel P in proportion to a separation distance between the buffer  340  and the pixel P. 
     This is because a resistance component and a capacitance component may exist in the data line DL and the resistance component of the data line DL may increase in proportion to a length of the data line DL. Therefore, as illustrated in  FIG.  6   , the pixel P 1  located at the shortest distance NEAR from the buffer  340  may be overdriven (see DL_out of  FIG.  6   ) for the shortest overdrive time T 1  due to a low resistance component of the data line DL. 
     On the other hand, the pixel P_N located at the longest distance FAR from the buffer  340  requires the relatively long overdrive time T 1 ×N compared to the other pixels P due to a high resistance component of the data line DL. 
     Accordingly, in an embodiment, if a pixel P is located at a shortest distance from the buffer  340 , the multiplexer  350  may perform the overdrive of the pixel P for a shortest time. 
     Conversely, if a pixel P is located at a longest distance from the buffer  340 , the multiplexer  350  may perform the overdrive of the pixel P for a longest time. 
     Although  FIG.  6    illustrates that the multiplexer  350  turns off the first switch S 1  when a preset time t elapses, regardless of a separation distance between the buffer  340  and a pixel P, the embodiment is not limited thereto, and the multiplexer  350  may also differentiate a turn-off time point of the first switch S 1  depending on a separation distance between the buffer  340  and a pixel P. Through this, a display time may be shortened compared to the conventional art. 
     In the above, a configuration of differentiating an overdrive time of a pixel P for each pixel P has been described. 
     Hereinafter, a configuration of setting an overdrive time of a pixel P for each pixel group will be described. 
     Referring to  FIG.  7   , a plurality of pixels P connected to a data line DL may be divided into two or more pixel groups (e.g., G 1 , G 2  and G 3  of  FIG.  7   ) depending on a separation distance from the buffer  340 . 
     An overdrive time T 1  of a first pixel group G 1  separated by a shortest distance from the buffer  340  among the two or more pixel groups may be set to be shortest, and an overdrive time T 3  of a last pixel group G 3  separated by a longest distance from the buffer  340  among the two or more pixel groups may be set to be longest. 
     If a pixel to be overdriven by the multiplexer  350  is included in the first pixel group G 1 , the multiplexer  350  may overdrive the pixel by the overdrive time T 1  set for the first pixel group G 1 . 
     If a pixel to be overdriven by the multiplexer  350  is included in the last pixel group G 3 , the multiplexer  350  may overdrive the pixel by the overdrive time T 3  set for the last pixel group G 3 . 
     The driving control circuit  360  may receive the image data IMG from the data processing device  140 . The image data IMG may include a plurality of pixel data. 
     The driving control circuit  360  may transfer pixel data of another pixel, located before one pixel among a plurality of pixels, to the first latch circuit  310 . The pixel data of the another pixel may be stored in the second latch circuit  320  through the first latch circuit  310 . 
     In a state in which the pixel data of the another pixel is stored in the second latch circuit  320 , the driving control circuit  360  may transfer pixel data of the one pixel to the first latch circuit  310 . 
     The driving control circuit  360  may determine whether to overdrive the one pixel, by comparing the pixel data of the one pixel stored in the first latch circuit  310  and the pixel data of the another pixel stored in the second latch circuit  320 . 
     The driving control circuit  360  may compare a first MSB (most significant bit) which is an MSB included in the pixel data of the another pixel and a second MSB which is an MSB included in the pixel data of the one pixel. 
     If the first MSB and the second MSB are different from each other, the driving control circuit  360  may check, in a preset lookup table, an overdrive time depending on a separation distance between the one pixel and the buffer  340  or a separation distance between a pixel group including the one pixel and the buffer  340 , and may generate the overdrive control signal OD_CTR corresponding to the checked overdrive time and transfer the overdrive control signal OD_CTR to the multiplexer  350 . 
     If the first MSB and the second MSB are the same, the driving control circuit  360  may skip the overdrive of the one pixel by the multiplexer  350 , and may generate the overdrive control signal OD_CTR for directly outputting a data voltage of the one pixel and transfer the overdrive control signal OD_CTR to the multiplexer  350 . 
     The driving control circuit  360  may compare the entire pixel data of the another pixel and the entire pixel data of the one pixel. 
     In an embodiment, when an overdrive time is set for each pixel group, the driving control circuit  360  may change a size or a boundary of each of the two or more pixel groups G 1 , G 2  and G 3  in each frame of image data, as illustrated in  FIG.  8   . 
     Through this, it is possible to prevent a block dim phenomenon that may occur when the size of each of the two or more pixel groups G 1 , G 2  and G 3  is consistently fixed. 
     In the above, a configuration in which the driving control circuit  360 , that is, the data driving device  120 , determines by itself whether to overdrive one pixel, by comparing pixel data of the one pixel and pixel data of another pixel has been described. 
     However, it is to be noted that the embodiment is not limited thereto, and the data processing device  140  may determine whether to overdrive one pixel. 
       FIG.  9    is a diagram to assist in the explanation of a configuration of determining whether to overdrive a pixel in a data processing device in accordance with an embodiment. 
     Referring to  FIG.  9   , the data processing device  140  may transmit a first data packet  910  including pixel data of another pixel to the data driving device  120  and then transmit a second data packet  920  including pixel data of one pixel to the data driving device  120 . 
     Before transmitting the second data packet  920 , the data processing device  140  may compare the pixel data of the another pixel and the pixel data of the one pixel. 
     According to a result of comparing the pixel data of the another pixel and the pixel data of the one pixel, the data processing device  140  may insert, into the second data packet  920 , an indicator OD determining whether to overdrive the one pixel. 
     By comparing a first MSB included in the pixel data of the another pixel and a second MSB included in the pixel data of the one pixel, when the first MSB and the second MSB are different, the data processing device  140  may set the indicator OD to “1” and transmit the set indicator OD to the data driving device  120 . The data driving device  120  which checks the indicator OD of “1” in the second data packet  920  may perform the overdrive of the one pixel. 
     When the first MSB and the second MSB are the same, the data processing device  140  may set the indicator OD to “0” and transmit the set indicator OD to the data driving device  120 . The data driving device  120  which checks the indicator OD of “0” in the second data packet  920  may skip the overdrive of the one pixel and directly output a data voltage of the one pixel. 
     The data processing device  140  may insert the indicator OD into a dummy region DM included in the second data packet  920 . 
     As is apparent from the above description, according to the embodiments, because a pixel is overdriven with a power voltage higher than a maximum output voltage of the buffer  340 , it is possible to improve the slew rate and the display speed of the display device  100  as compared to an existing scheme of overdriving a pixel with a voltage outputted from the buffer  340 .