Patent Publication Number: US-2006000718-A1

Title: Substrate plating methods and apparatus

Description:
TECHNICAL FIELD  
      The inventive subject matter is related to plating of a substrate. More specifically, embodiments of the invention relate to methods and apparatus for plating a substrate without the need of a plating bar.  
     BACKGROUND INFORMATION  
      Integrated circuits have been manufactured for many years. Manufacturing integrated circuits involves integrating various active and passive circuit elements into a piece of semiconductor material, referred to as a die. The die is attached to a package substrate to form a ceramic or plastic package. In some embodiments, the die is encapsulated within the package substrate to form or finish the package. The finished package can be attached directly to a printed circuit board by connecting input/output pins, arranged along a major surface of the package, to corresponding pads on the printed circuit board. In other embodiments, the finished package is attached to an interposer. The finished package and the interposer are then attached to a printed circuit board. An electronic system can be formed by connecting various finished packages, containing various dies or integrated circuits, to a printed circuit board. The printed circuit board will include traces for interconnecting the various integrated circuits or dies associated with the various packages.  
      Advances in semiconductor manufacturing technology have resulted in increased numbers of transistors on each integrated circuit, and an increase in the functionality of each integrated circuit. One result of the increase in functionality includes an increase in the number of input/output (I/O) connections between the integrated circuit and the package substrate. One adaptation designed to address the increased need for I/O connections without consuming an unacceptably large amount of area was the development of ball grid array (BGA) I/O connections for an integrated circuit. BGA devices include a plurality of solder bumps formed by a process commonly referred to as controlled collapsed chip connection (C4). In such a package, a large number of I/O connection terminals are disposed in a two dimensional array over a substantial portion of a major surface of the package. In some instances, BGA packages are directly attached to a supporting substrate such as a printed circuit board. In other instances, an interposer is directly attached to the printed circuit board and the BGA package is attached to the interposer. The interposer includes routing traces and vias that connect the solder bumps of the BGA to contacts that are attached to the printed circuit board. The interposer “fans out” the relatively small die pad pitch of the integrated circuit to the larger contact pad pitch of the printed circuit board. In many applications, the interposer material has a coefficient of thermal expansion intermediate the coefficient of thermal expansion of the printed circuit board and the coefficient of thermal expansion of the BGA package. The interposer, therefore, reduces mechanical stress induced by different coefficients of thermal expansion between the package and the printed circuit board. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
      Embodiments of the invention are pointed out with particularity in the appended claims. However, a more complete understanding of the inventive subject matter may be derived by referring to the detailed description when considered in connection with the figures, wherein like reference numbers refer to similar items throughout the figures, and:  
       FIG. 1  is a top view of a printed circuit board having a package that is formed according to an embodiment of the invention.  
       FIG. 2  illustrates a top view of an unfinished package substrate, according to an embodiment of this invention.  
       FIG. 3  illustrates a cross-sectional view of a package substrate prior to plating materials onto the wire bond pads, according to an embodiment of this invention.  
       FIG. 4  illustrates an exploded cross-sectional view of a pair of package substrates prior to plating of the wire bond pads, and a conductive adhesive tape, according to an embodiment of this invention.  
       FIG. 5  illustrates an exploded cross-sectional view of a conductive adhesive tape sandwiched between a pair of package substrates, according to an embodiment of this invention.  
       FIG. 6  illustrates a cross-sectional view of a package substrate, according to an embodiment of this invention.  
       FIG. 7  illustrates a cross-sectional view of a package substrate prior to plating materials onto the wire bond pads, according to another embodiment of this invention.  
       FIG. 8  illustrates an exploded cross-sectional view of a pair of package substrates prior to plating of the wire bond pads, and a reusable conductive portion, according to another embodiment of this invention.  
       FIG. 9  illustrates an exploded cross-sectional view of a reusable conductive portion sandwiched between a pair of package substrates, according to another embodiment of this invention.  
       FIG. 10  illustrates a cross-sectional view of package that includes a die attached to the package substrate, according to an embodiment of this invention.  
       FIG. 11  illustrates a flow diagram of a method of plating the bond fingers of a package substrate, according to an embodiment of this invention.  
       FIG. 12  illustrates another flow diagram of a method of plating the bond fingers of a package substrate, according to an embodiment of this invention. 
    
    
      The description set out herein illustrates various embodiments of the invention, and such description is not intended to be construed as limiting in any manner.  
     DETAILED DESCRIPTION  
      In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings that form a part hereof, and in which are shown by way of illustration specific embodiments in which the inventive subject matter can be practiced. The embodiments illustrated are described in sufficient detail to enable those skilled in the art to practice the teachings disclosed herein. Other embodiments can be utilized and derived therefrom, such that structural and logical substitutions and changes can be made without departing from the scope of the inventive subject matter. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of various embodiments of the invention is defined only by the appended claims, along with the full range of equivalents to which such claims are entitled.  
       FIG. 1  is a top view of a printed circuit board  100 . The printed circuit board  100  includes an electrical device or component  1000  having a package substrate  600  formed according to an embodiment of the invention. The printed circuit board (“PCB”)  100  is a multi-layer plastic board that includes patterns of printed circuits on one or more layers of insulated material. The patterns of conductors correspond to the wiring of an electronic circuit formed on one or more of the layers of the printed circuit board  100 . The printed circuit board  100  also includes electrical traces  110 . The electrical traces  110  can be found on an exterior surface  120  of the printed circuit board  100 , and also can be found on the various layers within the printed circuit board  100 . Printed circuit boards also include through holes (not shown in  FIG. 1 ) which are used to interconnect traces on various layers of the printed circuit board  100 . The printed circuit board  100  can also include planes of metallized materials such as ground planes, power planes, or voltage reference planes (not shown in  FIG. 1 ).  
      The printed circuit board  100  is also populated with various components  130 ,  132 ,  134 ,  138 ,  1000 . The components  130 ,  132 ,  134 ,  138 ,  1000  can be either discrete components, or semiconductor chips which include thousands of transistors. The components  130 ,  132 ,  134 ,  138 ,  1000  can use any number of technologies to connect to the exterior surface  120  of the printed circuit board  100 . For example, pins may be inserted into plated through holes, or pins may be extended through the printed circuit board  100 . An alternative technology is surface mount technology, where an electrical component, such as component  1000 , mounts to an array of pads on the exterior surface  120  of the printed circuit board  100 . For example, component  1000  could be a ball grid array package or device that has an array of balls or bumps that interact or are connected to a corresponding array of pads on the exterior surface  120  of the printed circuit board  100 . The electrical device or component  1000  includes a package substrate  600  and a die  1010  (shown in  FIG. 10 ). The package substrate  600  is formed according to an embodiment of this invention. The die is electrically coupled to the package substrate  600  to form a package  1020  that can be attached to the printed circuit board  100 .  
      The printed circuit board  100  can also include traces  110  for making external connections to other electrical or electronic devices. In an embodiment of the invention, the component  1000  is a central processing chip or microprocessor, that can be used as a controller or for any other function. Although the printed circuit board  100  shown is a daughter board, the printed circuit board  100  could also be a motherboard, and the component or electrical device could be the main processing unit for a computer. In some computing environments, multiple main processing units can be used.  
      As shown in  FIG. 1 , the printed circuit board  100  includes a first edge connector  140  and a second edge connector  142 . As shown in  FIG. 1  there are external traces, such as electrical trace  110 , on the external surface  120  of the printed circuit board  100 , that connect to certain of the outputs associated with the first edge connector  140 . Other traces that connect with the edge connectors  140 ,  142  will have traces internal to the printed circuit board  100 .  
       FIG. 2  illustrates a top view of an unfinished package substrate  200 , according to an embodiment of this invention. As shown in  FIG. 2 , the unfinished package substrate  200  is formed along with other package substrates. Portions of other package substrates are shown as elements  201 ,  202 ,  203 ,  204 . Generally, a plurality of package substrates  200 ,  201 ,  202 ,  203 ,  204  will be formed on a single sheet of printed circuit board material. The sheet of printed circuit board material that includes a plurality of unfinished package substrates  200 ,  201 ,  202 ,  203 ,  204  is treated to form a plurality of finished substrates  600 . After finishing the finished package substrates, the printed circuit board material is cut along the cut lines  211 ,  212 ,  213 ,  214  to form a plurality of individual, finished substrates  600  (see  FIG. 6 ) from the previously unfinished package substrates  200 ,  201 ,  202 ,  203 ,  204 , according to an embodiment. Since each of the individual unfinished package substrates  200  are treated substantively the same, only the treatment of one individual, unfinished package substrate  200  will now be further detailed. Details of the remaining package substrates  201 ,  202 ,  203 ,  204  will not be further detailed for the sake of simplicity.  
      The unfinished package substrate  200  includes a land pad major surface side  310  (shown in  FIGS. 3-6 ) and a wire bond pad major surface side  320 . The land pad major surface side  320  includes at least one bond finger  322  and a trace  332 . A via  340  extends through a portion of the unfinished package substrate  200 . The via  340  is lined with conductive material  342 . The via  340  and the electrical trace  332  attach the bond finger  322  to a land on the land pad surface side  310  (shown in  FIGS. 3-6 ).  
       FIG. 3  illustrates a cross-sectional view of unfinished package substrate  200  prior to plating, according to an embodiment of this invention. As shown in  FIG. 3 , the wire bond pad major surface side  320  includes patterned photoresist  350 . The patterned photoresist is formed by laying down a layer of photoresist and then exposing certain portions of the photoresist with either a negative or a positive image. Unwanted photoresist can be removed (either the exposed portion or the unexposed portion) to produce openings in the photoresist at the wire bond pad of the bond finger  322 . The photoresist is formulated to substantially electrically isolate the wire bond pads of the bond fingers  322 . The photoresist is also formulated to remain in place when exposed to an electrolytic plating solution. The land pad major surface side  310  includes a land pad  312 . The land pad major surface side  310  also includes a layer of photoresist  360  that electrically isolates the land pad  312  from the remaining portion of the land pad major surface side  310 . The openings in the photoresist  360  are formulated in substantially the same fashion as the openings in the photoresist  350  on the wire bond pad major surface side  320 . The openings in the photoresist  350  correspond to the wire bond pads of the bond fingers  322 , and the openings in the photoresist  360  correspond to the land pads  312  on the land pad major surface side  310  of the unfinished package substrate  200 .  
      Now referring to  FIGS. 3-6 , a method for fabricating an unfinished package substrate  200  according to an embodiment of the invention will now be discussed.  FIG. 4  illustrates an exploded cross-sectional view of a pair of unfinished package substrates  200 ,  200 ′ prior to plating of the wire bond pads, such as bond finger  322 , and a conductive adhesive tape  410 , according to an embodiment of this invention. The conductive adhesive tape  410  is capable of carrying a current, and is also capable of sealing the land pad major surface side  310  of each of the unfinished package substrates  200 ,  200 ′. In an embodiment of the invention, the conductive adhesive tape  410  is available under the product name X-7001 from SUMITOMO 3M Limited of Tokyo, Japan.  
       FIG. 5  illustrates an exploded cross sectional view of the conductive adhesive tape  410  sandwiched between a pair of unfinished package substrates  200 ,  200 ′, according to an embodiment of this invention. The conductive adhesive tape  410  is deformable. As the first unfinished package substrate  200  is forced toward the second unfinished package substrate  200 ′, the conductive adhesive tape  410  deforms. Portions of the conductive adhesive tape extend into the openings in the photoresist  360  which correspond to the land pads  312 . In other words, as the conductive adhesive tape  410  is sandwiched between the first unfinished package substrate  200  and the second unfinished package substrate  200 ′, the conductive adhesive tape deforms or conforms until it contacts the land pads  312  of the first unfinished package substrate  200  and the second unfinished package substrate  200 ′. The conductive adhesive tape  410 , therefore, places each of the land pads  312  into electrical connection with a source of current  510 . The source of current  510  is electrically connected to the conductive adhesive tape  410 . The land pads  312  are connected to the wire bond pads of the bond fingers  322  by way of the via  340 .  
      As shown in  FIG. 5 , the two unfinished package substrates  200  sandwiching the conductive adhesive tape  410  and having the source of current  510  attached thereto form a plating package  500 . The plating package  500  is placed into an electrolytic solution. The conductive adhesive tape  410  substantially seals the land pads  312  from the electrolytic solution. Once in the electrolytic solution, the source of current  510  is enabled. The current flows through the conductive adhesive tape  410  to each of the land pads  312  through a via  340  and the bond fingers  322  of the wire bond pad. The source of current  510  is enabled for a selected amount of time in order to produce a plating layer  522  on the wire bond pad of the bond fingers  322 .  
      The plating layer  522 , in an embodiment includes a layer of nickel and a layer of gold. In order to obtain different layers, the plating package  500  must be placed in different electrolytic solutions to produce layers of different compositions. While in each solution, the source of current  510  is enabled for a selected amount of time to produce a plating layer or a portion of a plating layer  522  of a selected thickness. After the plating layer  522  has been deposited, the plating package  500  is disassembled. The conductive adhesive layer  410  generally is used only one time. Therefore the conductive adhesive layer  410  is discarded.  
       FIG. 6  illustrates a cross-sectional view of a package substrate  600 , according to an embodiment of this invention. After disassembly of the plating package and discarding of the conductive adhesive layer  410 , the end result is the substrate pad  600 . The substrate pad  600  has a plating layer  522  on the wire bond pad of the bond finger  322 . The main difference between the unfinished package substrate  200  and the package substrate  600  is that the bond finger  322  of the wire bond pad is plated with plating layer  522 . The substrate package  600  is ready to receive a die or chip  1000  as shown in  FIG. 10 . The plating layer of nickel and gold provides a layer on the bond finger  322  of the wire bond pad that will provide for a reliable electrical connection between a wire associated with the die  1000  and the wire bond pad of the bonding finger  322 . It should be noted that the plating layer  522  can also have layers of different materials in other embodiments of the invention. Other plating layer  522  compositions require placing the plating package  500  in different electrolytic solutions and enabling the source of current  510  for a selected amount of time.  
       FIG. 7  illustrates a cross-sectional view of an unfinished package substrate  200  prior to plating materials onto the wire bond pads of the bond fingers  322 , according to another embodiment of this invention. The wire bond pad major surface side  320  includes patterned photoresist  350 . The patterned photoresist is formed by laying down a layer of photoresist and then exposing certain portions of the photoresist with either a negative or a positive image. Unwanted photoresist can be removed (either the exposed portion or the unexposed portion) to produce openings in the photoresist at the wire bond pad of the bond finger  322 . The photoresist is formulated to substantially electrically isolate the wire bond pads of the bond fingers  322 . The photoresist is also formulated to remain in place when exposed to an electrolytic plating solution. The land pad major surface side  310  includes a land pad  312 . The land pad major surface side  310  also includes a layer of photoresist  360  that electrically isolates the land pad  312  from the remaining portion of the land pad major surface side  310 . The openings in the photoresist  360  are formulated in substantially the same fashion as the openings in the photoresist  350  on the wire bond pad major surface side  320 . The openings in the photoresist  350  correspond to the wire bond pads of the bond fingers  322  and the openings in the photoresist  360  correspond to the land pads  312  on the land pad major surface side  310  of the unfinished package substrate  200 .  
       FIG. 8  illustrates an exploded cross-sectional view of a pair of package substrates  200 ,  200 ′ prior to plating of the wire bond pads, and a reusable conductive portion  800 , according to another embodiment of this invention. The reusable conductive portion  800  includes a metal plate  810 . Attached to the metal plate  810  is a first conductive cushion sheet  820  and a second conductive cushion sheet  822 . The conductive cushion sheets are also deformable. Also attached to the metal sheet around the periphery of the conductive cushion sheets  820 ,  822  is a first sealing portion  830  and a second sealing portion  832 . The sealing portions  830 ,  832  are attached to the metal sheet and can be either conductive or non-conductive.  
       FIG. 9  illustrates an exploded cross-sectional view of a reusable conductive portion  800  sandwiched between a pair of package substrates  200 ,  200 ′, according to another embodiment of this invention. Pressure is applied to the reusable conductive portion  800 , and specifically to the conductive cushion sheet  820  and the conductive cushion sheet  822 . The pressure causes the conductive cushion sheet  820  to deform and make electrical contact with the land pads  312  of the unfinished package substrate  200  in the upper position, while the conductive cushion sheet  822  conforms and makes electrical contact with the land pads  312  of the package substrate  200 ′ in the lower position, as shown in  FIG. 9 . As the unfinished package substrates  200 ,  200 ′ are forced together, the seal  830 ,  832  complies with the surfaces  360  of the two unfinished package substrates  200 ,  200 ′. It should be noted that the seals  830 ,  832  are positioned about the periphery or outside the periphery of the conductive cushion sheet  820  and the conductive cushion sheet  822 , but inboard of the outer periphery of the package substrates  200 ,  200 ′.  
      A first clamp  910  and a second clamp  912  capture the land pad major surface  320  of each of the package substrates  200 . Clamp  910  has an opening therein, which allows a portion of the metal plate  810  to extend beyond the clamp so that it can be connected to a source of current  900 . The source of current  900  is attached to the metal plate  810 . The reusable conductive portion  800  sandwiched between the two package substrates  200 , and clamped with clamps  910  and  912 , forms an plating package  950 . The clamps  910 ,  912  assure that the land pad major surface  310  and the contacts the land pads  312  are substantially sealed from an electrolytic solution. The electrolytic package  950  can then be placed into an electrolytic solution. While the plating package  950  is placed in the electrolytic solution, the source of current  900  is enabled for a selected amount of time to plate the wire bond pads of the bond fingers  322 . In an embodiment of the invention, the wire bond pads of the bond fingers  322  are provided with a plating layer  522 . In an embodiment of the invention, the plating layer  522  includes at least a layer of nickel and a layer of gold plating. The gold plating provides for a reliable bond between the wires of a die and the plating layer  522  on the wire bond pad of the bond finger  322 . After a plating layer  522  is formed on the wire bond pad of the bond finger  322  or on all the bond fingers of the package substrates  200 ,  200 ′, the electrolytic plating package  950  is disassembled. As previously mentioned, the conductive cushion sheet attached to the metal plate  810 , as well as the seals  830 ,  832 , are reusable. As a result, another pair of package substrates can be used to sandwich the reusable conductive portion  800  and the electrolytic plating process can be repeated.  
       FIG. 10  illustrates a cross-sectional view of a package that includes a die  1000  attached to the package substrate  600 . The package substrate  600  includes a plating pad  522 . The package substrate  600  differs from the unfinished package substrate  200  in that the plating layer  522  on the wire bond pad of the bond fingers  322  is finished and ready to receive a wire  1010  of the die  1000 . As shown in  FIG. 10 , the die  1000  is attached to the plating layer  522  of the wire bond pad of the bond finger  322 . The die  1000  attached to the package substrate  600  forms a package or a substantial portion of the package. After the die  1000  is attached, the die can be encapsulated or further processed to complete a package, which can be attached to a printed circuit board, such as circuit board  100  shown in  FIG. 1 .  
       FIG. 11  illustrates a flow diagram of a method  1100  of plating the bond fingers of a package substrate, according to an embodiment of this invention. The method  1100  for plating a first pad on a first major surface of a substrate with a first major surface and a second major surface includes connecting the first pad on the first major surface to a second pad on a second major surface of the substrate  1112 , and masking portions of the first major surface  1114  to selectively prevent plating on portions of the first major surface. In some embodiments, connecting the first pad on the first major surface to a second pad on the second major surface  1112  includes connecting the first pad and the second pad through a via. The method  1100  further includes sealing  1116  the second major surface from the electrolytic solution. In some embodiments, sealing the second major surface from the electrolytic solution  1116  includes placing a conductive adhesive tape over the second major surface. The method  1100  further includes placing the first pad on the first major surface into an electrolytic solution  1118  and applying a current to the second pad  1120 . In some embodiments, applying a current to the second pad  1120  includes placing an electrical conductor having a deformable portion in contact with the second pad, and applying the voltage to the electrical conductor.  
       FIG. 12  illustrates another flow diagram of a method  1200  of plating the bond fingers of a package substrate, according to an embodiment of this invention. The method  1200  for plating a first pad on a first major surface on each of a plurality of substrates, each substrate having a first major surface and a second major surface includes: connecting the first pad on the first major surface to a second pad on a second major surface of the substrate through a via in the substrate  1210 ; placing a deformable conductor in contact with the second major surface and the second pad of one of the plurality of substrates  1212 ; placing a deformable conductor in contact with the second major surface and the second pad of another of the plurality of substrates  1214 ; and clamping the one of the plurality of substrates, the other of the plurality of substrates, and the deformable conductor together  1216 . The method  1200  further includes placing the first pad on the first major surface of the one of the plurality of substrates and the another of the plurality of substrates into an electrolytic solution  1218 .  
      In an embodiment of the method  1200 , placing a deformable conductor in contact with the second major surface and the second pad of one of the plurality of substrates  1212  includes placing a first side of a deformable conductor in contact with the second major surface and the second pad of the one of the plurality of substrates. In another embodiment, placing a deformable conductor in contact with the second major surface and the second pad of another of the plurality of substrates  1212  includes placing a second side of a deformable conductor in contact with the second major surface and the second pad of the one of the plurality of substrates. The method  1212  also includes substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution  1218 .  
      Another embodiment of the method  1200  includes substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution, and substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution. In an embodiment, the deformable conductor includes a conductive adhesive tape. In another embodiment, the deformable conductor includes a metal plate, a first conductive sheet on a first side of the metal plate, and a second conductive sheet on a second side of the metal plate. The method  1200  also includes applying a current to the deformable conductor  1220 .  
      As shown in  FIGS. 1-10 , an apparatus includes a first package substrate and a deformable conductor. The first package substrate includes a first major surface having a first pad, a second major surface having a second pad, and an electrical pathway in the first package substrate between the first pad and the second pad. The deformable conductor is in electrical communication with the second major surface and the second pad. The apparatus also includes a second package substrate. The second package substrate includes a third major surface having a third pad, a fourth major surface having a fourth pad, and an electrical pathway in the second package substrate between the third pad and the fourth pad. The deformable conductor is in electrical communication with the fourth major surface and the fourth pad. In one embodiment, the deformable conductor is a conductive adhesive tape. In an embodiment, the deformable conductor includes a metal plate, a first conductive sheet on a first side of the metal plate, a second conductive sheet on a second side of the metal plate, and a seal. The seal is coupled to the metal plate. The seal is positioned to substantially seal the second pad and the fourth pad from an environment surrounding the first package substrate and the second package substrate. The apparatus also includes a source of current communicatively coupled to the metal plate. In some embodiments, a source of current is communicatively coupled to the deformable conductor. An electrolytic bath is in fluid communication with the first package substrate. In some embodiments, an electrolytic bath is in fluid communication with the first package substrate and the second package substrate.  
      As shown in  FIGS. 5 and 9 , an apparatus includes a first package substrate, a second package substrate and a deformable conductor sandwiched between the first package substrate and the second package substrate. The first package substrate includes a first major surface having a first pad, a second major surface having a second pad, and an electrical connection between the first pad and the second pad. The second package substrate includes a third major surface having a third pad, a fourth major surface having a fourth pad, and an electrical connection between the third pad and the fourth pad. The deformable conductor deforms to make electrical contact with the second pad and the fourth pad. The electrical connection between the first pad and the second pad is a via within the first package substrate. The electrical connection between the third pad and the fourth pad is a via within the second package substrate. The apparatus also includes a seal separating the second pad and the fourth pad from an environment in contact with the first pad and the third pad. An electrolytic fluid is in fluid communication with the first pad and the third pad. The seal prevents fluid communication of the second pad and the fourth pad with the electrolytic fluid.  
      The foregoing description of the specific embodiments reveals the general nature of the inventive subject matter sufficiently that others can, by applying current knowledge, readily modify and/or adapt it for various applications without departing from the generic concept, and therefore such adaptations and modifications are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments.  
      It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Accordingly, the embodiments of the invention are intended to embrace all such alternatives, modifications, equivalents and variations as fall within the spirit and broad scope of the appended claims.