Patent Publication Number: US-2002005555-A1

Title: Semiconductor device comprising a silicon body with bipolar and mos transistors

Description:
[0001] The invention relates to a semiconductor device comprising a silicon body with a surface which is adjoined by insulation regions of a first and a second type, the insulation regions of the first type enclosing active regions each with a bipolar transistor and the insulation regions of the second type enclosing active regions each with an MOS transistor.  
       [0002] The silicon body may comprise bipolar transistors both of the npn type and of the pnp type, as well as MOS transistors of the n-channel type and MOS transistors of the p-channel type here. A semiconductor device which comprises besides bipolar transistors also n-channel and p-channel MOS transistors is called BiCMOS integrated circuit or BiCMOS IC.  
       [0003] A semiconductor device of the kind mentioned in the opening paragraph is known from EP-A-500.233 wherein both the insulation regions of the first type and the insulation regions of the second type are silicon oxide regions obtained through local oxidation of the silicon body. The insulation regions of the first type are formed by silicon oxide regions recessed into the surface of the silicon body, while the insulation regions of the second type are silicon oxide regions projecting partly above the surface. The insulation regions of the first type extend deeper into the silicon body than do the insulation regions of the second type. The bipolar transistors are thus fully enclosed by insulating material.  
       [0004] Insulation regions obtained through local oxidation of the silicon body exhibit an edge of decreasing thickness in the direction of the enclosed active region, which edge is also referred to as bird&#39;s beak. The active region extends below this edge of the insulation region. When a base zone is formed in the active region in usual manner, this zone will extend also below the edge of the insulation region. The portion of the base zone lying below the edge of the insulation region in practice does not form part of the active base zone of the transistor but it does contribute to the collector-base capacitance. This contribution is comparatively great in transistors of sub-micron dimensions. As a result, these transistors are comparatively slow.  
       [0005] The invention has for its object inter alia to provide a semiconductor device with bipolar transistors which are faster than those in the known device.  
       [0006] According to the invention, the semiconductor device is for this purpose characterized in that the insulation regions of the first type are etched grooves which are filled with insulating material through deposition, and the insulation regions of the second type are silicon oxide regions formed through local oxidation of the silicon body.  
       [0007] Insulation regions formed by etched grooves filled up with insulating material have edges which are substantially perpendicular to the surface of the silicon body. The enclosed active region terminates at said edges which are perpendicular to the surface. A base zone formed in the active region in usual manner will also terminate against this edge which is perpendicular to the surface. The base-collector capacitance of a transistor having such a base zone is thus smaller than that of a transistor having a base zone formed in an active region extending below an edge of an insulation region obtained through local oxidation of the silicon body. As a result, the transistor is faster.  
       [0008] When the MOS transistors are also provided in active regions enclosed by insulation regions formed by etched grooves filled with insulating material through deposition, said insulation region edge which is perpendicular to the surface may give problems in the growing of gate oxide. A gate oxide layer which is much thinner than that of the active region will then be formed on the sharp transition from the insulation region to the active region. Undesirable breakdown of the gate oxide may accordingly occur at this transition during operation of the MOS transistor. In the device according to the invention, the MOS transistors are provided in active regions surrounded by insulation regions obtained through local oxidation of the silicon body. The insulation region and the active region in that case have a less sharply angled transition, so that the gate oxide problem described above does not occur in practice. 
     
    
    
     [0009] The invention will be explained in more detail below with reference to a drawing, in which:  
     [0010] FIGS.  1  to  5  diagrammatically and in cross-section show a few stages in the manufacture of a semiconductor device according to the invention, and  
     [0011]FIG. 6 is a diagrammatic cross-section of the MOS transistor shown in FIG. 5.  
    
    
     [0012] FIGS.  1  to  5  diagrammatically and in cross-section show a few stages in the manufacture of a semiconductor device comprising a silicon body  1  with a surface  2  adjoined by insulation regions of a first  3  and a second type  4 , the insulation regions of the first type  3  enclosing active regions  5  each with a bipolar transistor  6 , and the insulation regions of the second type  4  enclosing active regions  7  each with an MOS transistor  8 .  
     [0013] The present example starts with a silicon body  1  which is provided with a buried layer  8  comparatively heavily n-type doped with approximately 10 18  atoms per cc and with an epitaxially grown surface layer  9  comparatively weakly doped with approximately 10 16  atoms per cc at the area of the bipolar transistor  6  to be formed. An approximately 200 nm thick silicon oxide layer  10  and an approximately 100 nm thick silicon nitride layer  11  are formed on the surface  2 . A photoresist mask  12  is provided thereon in usual manner and is given windows  13  at the areas of the insulation regions of the first type  3  to be formed.  
     [0014] Grooves  14  are etched into the silicon body by means of the photoresist mask  12 , in this case cutting through the buried layer  8 . The grooves  14  are subsequently filled with insulating material  15  in usual manner through the deposition of a thick silicon oxide layer, whereupon the silicon body  1  is subjected to an etching treatment until the surface  2  has become exposed. The etching treatment here stops first at the silicon nitride layer  11 , which is subsequently selectively removed relative to the subjacent silicon oxide layer  10 . Finally, the layer of silicon oxide  10  is also removed.  
     [0015] On the surface  2  and on the insulation regions of the first type  3 , subsequently, an approximately 20 nm thick silicon oxide layer  16  and an approximately 200 nm thick silicon nitride layer  17  are now formed. A photoresist mask  18  is provided thereon in usual manner and is given windows  19  at the areas of the insulation regions of the second type  4  to be formed. Then the relevant windows are etched into the silicon nitride layer  17  and the silicon oxide layer  16  by means of the photoresist mask  18 . The silicon body  1  is subsequently subjected to a usual oxidation treatment whereby the approximately 600 nm thick insulation regions of the second type  4  are formed. The silicon oxide layer  16  and the silicon nitride layer are subsequently removed.  
     [0016] After the insulation regions  3  and  4  have been formed, the active regions  5  and  6  have been defined, in this example for forming therein an npn-type bipolar transistor  6  and an n-channel MOS transistor  8 . The silicon body may comprise in practice both bipolar transistors of the npn-type and bipolar transistors of the pnp type, as well as MOS transistors of the n-channel type and MOS transistors of the p-channel type. A semiconductor device which comprises besides bipolar transistors also n-channel and p-channel MOS transistors is sometimes referred to as BiCMOS integrated circuit or BiCMOS IC.  
     [0017] An approximately 10 nm thick silicon oxide layer  20  is formed through oxidation of silicon on the active region  7  where the MOS transistor  8  is to be made, while an approximately 100 nm thick silicon oxide layer  21  is deposited on the active region  6  where the bipolar transistor is planned. After deposition of an approximately 10 nm thick layer of amorphous silicon (not shown), a p-type surface layer  23  doped with approximately 10 18  atoms is formed in usual manner. This layer  23  forms a p-well in active region  7  in which the n-channel MOS transistor is formed, while it forms the base zone of the bipolar transistor in the active region  5 .  
     [0018] A window  22  is now provided in the silicon oxide layer  21  at the area of the emitter of the bipolar transistor  6  to be formed. Then tracks  24  of n-type doped polycrystalline silicon are formed on the silicon oxide layers  20  and  21 , the sides  25  of said tracks  24  being insulated with strips  26  of silicon oxide. The track  24  on the active region  7  forms the gate electrode of the MOS transistor  8 , the track  23  on the active region  5  forms the electrode which is connected to the emitter  27  of the bipolar transistor  6 . This emitter  27  is obtained through diffusion into the p-type surface zone  23  from the track  24  through the window  22 .  
     [0019] In usual manner, finally, an n-type doped collector contact zone  28 , a p-type base contact zone  29 , and an n-type source zone  30  and drain zone  31  are formed.  
     [0020]FIG. 6 diagrammatically shows a cross-section taken through the MOS transistor  8  shown in FIG. 6. The insulation regions  4  obtained through local oxidation of the silicon body exhibit an edge  32  of decreasing thickness in the direction of the enclosed active region  7 , which edge is sometimes called bird&#39;s beak. The active region  7  extends below this edge  32  of the insulation region. When a semiconductor zone  23  is formed in usual manner in the active region  7 , this zone will extend also below the edge  32  of the insulation region  4 . If said semiconductor zone forms the base zone of a bipolar transistor, that portion thereof lying below the edge of the insulation region will not form part of the active base of the transistor in practice, but it does contribute to the collector-base capacitance. This contribution is comparatively great in the case of transistors of sub-micron dimensions. Such transistors are accordingly comparatively slow.  
     [0021] Insulation regions  3  formed by etched grooves  14  filled with insulating material  15  have edges  33  which are substantially perpendicular to the surface  2  of the silicon body  1 . The enclosed active region  5  terminates against said edge  33  which is perpendicular to the surface. A base zone  23  formed in usual manner in the active region will also terminate at this edge  33  which is perpendicular to the surface. The base-collector capacitance of a transistor having such a base zone is thus smaller than that of the transistor having a base zone formed in an active region extending below an edge of an insulation region obtained through local oxidation of the silicon body. The transistor is faster as a result of this.  
     [0022] If the MOS transistor  8  is also provided in an active region enclosed by insulation regions formed by etched grooves  14  filled with insulating material  15  through deposition, said edge  33  of the insulation region which is perpendicular to the surface may give rise to problems in growing of gate oxide. A gate oxide layer which is much thinner than that on the active region will then be formed on the sharp transition between insulation region  3  and active region  5 . Undesirable breakdown of the gate oxide may result therefrom at this transition during operation of the MOS transistor. In the device according to the invention, the MOS transistors are provided in active regions  7  which are enclosed by insulation regions  4  formed through local oxidation of the silicon body. The insulation region  4  and the active region  7  in that case have a less sharply angled transition, so that the problem with the gate oxide as described above will not arise in practice.