Patent Publication Number: US-10763446-B2

Title: Organic thin film transistor

Description:
RELATED APPLICATIONS 
     This application claims priority to China Application Serial Number 201710324191.0, filed May 10, 2017, which is herein incorporated by reference. 
     BACKGROUND 
     Field of Invention 
     The present invention relates to an organic thin film transistor. 
     Description of Related Art 
     Generally speaking, a source/drain layer of an organic thin film transistor is made of gold, silver, or another material that can react with a self-assembly monolayer (SAM), in which the self-assembly monolayer is a semiconductor layer of the organic thin film transistor. 
     In manufacturing an organic thin film transistor, the source/drain layer is patterned to form a source region and a drain region that are spaced apart at a gap, and then a semiconductor layer is formed on the source region and the drain region adjacent to the gap, and is formed in the gap between the source region and the drain region by coating. However, due to limitations of materials of the source region and the drain region, after the source/drain layer is patterned, a taper undercut structure is formed on the source region and the drain region that are adjacent to the gap. As a result, the semiconductor layer in the gap and adjacent to the taper undercut structure has a greater thickness, and the semiconductor layer with the greater thickness will affect molecular arrangements. In other words, the semiconductor layer with non-uniform thickness will cause adverse effects on stability of electrical properties of the organic thin film transistor. 
     SUMMARY 
     An aspect of the present invention is to provide an organic thin film transistor. 
     According to an embodiment of the present invention, an organic thin film transistor includes a substrate, a source/drain layer, a first buffer layer, a semiconductor layer, a gate insulating layer, and a gate electrode. The source/drain layer is located on the substrate and has a source region and a drain region. The first buffer layer is located between the source region and the drain region, and covers at least one portion of the source region and at least one portion of the drain region. The semiconductor layer is located on the source/drain layer and the first buffer layer. The first buffer layer is located among the semiconductor layer, the source region, the drain region, and the substrate. The gate insulating layer covers the source/drain layer and the semiconductor layer. The gate electrode is located on the gate insulating layer, and a portion of the gate insulating layer is located between the gate electrode and the semiconductor layer. 
     In one embodiment of the present invention, the organic thin film transistor further includes a protective layer. The protective layer is disposed along the semiconductor layer. The semiconductor layer is located between the protective layer and the source/drain layer, and is located between the protective layer and the first buffer layer. 
     In one embodiment of the present invention, the organic thin film transistor further includes a photoresist layer. The photoresist layer is located on the protective layer and is located between the gate insulating layer and the protective layer. 
     In one embodiment of the present invention, the organic thin film transistor further includes a barrier layer. The barrier layer is located on the substrate, and the first buffer layer is located among the semiconductor layer, the source region, the drain region, and the barrier layer. 
     In one embodiment of the present invention, the organic thin film transistor further includes a second buffer layer. The second buffer layer is located on the barrier layer, and the first buffer layer is located among the semiconductor layer, the source region, the drain region, and the second buffer layer. 
     In one embodiment of the present invention, the source region has a first surface and a second surface opposite the first surface, and has a sidewall adjacent to the first surface and the second surface, and the first surface faces the substrate, and an obtuse angle is formed between the sidewall and the first surface. 
     In one embodiment of the present invention, the first buffer layer has a central portion and an extending portion, and the central portion is located between the source region and the drain region, and the extending portion is located on the second surface of the source region. 
     In one embodiment of the present invention, at least one portion of the source region is located between the extending portion and the central portion. 
     In one embodiment of the present invention, the first buffer layer is in contact with the sidewall of the source region. 
     In one embodiment of the present invention, the drain region has a first surface and a second surface opposite the first surface, and has a sidewall adjacent to the first surface and the second surface, and the first surface faces the substrate, and an obtuse angle is formed between the sidewall and the first surface. 
     In the aforementioned embodiments of the present invention, because the first buffer layer is located between the source region and the drain region, and covers at least one portion of the source region and at least one portion of the drain region, the semiconductor layer may be located on the source/drain layer and the first buffer layer. In such a configuration, the first buffer layer may be utilized to fill a space between the source region and the drain region, thereby preventing the semiconductor layer from being formed on taper undercut structures of the source region and the drain region, thus preventing the semiconductor layer from having a greater thickness. As a result, the semiconductor layer has uniform thickness, and does not affect molecular arrangements, and thus stability of electrical properties of the organic thin film transistor can be improved. 
     It is to be understood that both the foregoing general description and the following detailed description are by examples, and are intended to provide further explanation of the invention as claimed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention can be more fully understood by reading the following detailed description of the embodiments, with reference made to the accompanying drawings as follows: 
         FIG. 1  is a cross-sectional view of an organic thin film transistor according to one embodiment of the present invention; 
         FIG. 2  is a cross-sectional view of an organic thin film transistor according to one embodiment of the present invention; 
         FIG. 3  is a cross-sectional view of an organic thin film transistor according to one embodiment of the present invention; 
         FIG. 4  is a cross-sectional view of an organic thin film transistor according to one embodiment of the present invention; and 
         FIG. 5  is a cross-sectional view of an organic thin film transistor according to one embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     Reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts. 
       FIG. 1  is a cross-sectional view of an organic thin film transistor  100  according to one embodiment of the present invention. As shown in  FIG. 1 , the organic thin film transistor  100  includes a substrate  110 , a source/drain layer  120 , a first buffer layer  130 , a semiconductor layer  140 , a gate insulating layer  150 , and a gate electrode  160 . The source/drain layer  120  is located on a surface of the substrate  110 . The source/drain layer  120  has a source region  122  and a drain region  124  that are spaced apart from each other at a gap. The first buffer layer  130  fills the gap. In other words, the first buffer layer  130  is located between the source region  122  and the drain region  124 . Moreover, the first buffer layer  130  further extends onto the source region  122  and the drain region  124 , thereby covering at least one portion of the source region  122  and at least one portion of the drain region  124 . The aforementioned first buffer layer  130  may be made of material including high-molecular polymer. 
     The semiconductor layer  140  is located on the source/drain layer  120  and the first buffer layer  130 , and thus the first buffer layer  130  is located among the semiconductor layer  140 , the source region  122 , the drain region  124 , and the substrate  110 . Stated differently, the first buffer layer  130  is surrounded by the semiconductor layer  140 , the source region  122 , the drain region  124 , and the substrate  110 . The gate insulating layer  150  covers the source/drain layer  120  and the semiconductor layer  140 . The gate electrode  160  is located on the gate insulating layer  150 , and a portion of the gate insulating layer  150  is located between the gate electrode  160  and the semiconductor layer  140 . 
     In this embodiment, the source/drain layer  120  may be made of a material including silver or gold. When the source/drain layer  120  is patterned (e.g., by an etching process), taper undercut structures are formed on the source region  122  and the drain region  124 , thus forming obtuse angles θ 1  and θ 2 . In addition, the gate insulating layer  150  may be made of an organic material to act as an organic gate insulator (OGI). 
     The semiconductor layer  140  may be formed by spin coating or slit coating, but the present invention is not limited in this regard. Since the first buffer layer  130  is located between the source region  122  and the drain region  124 , and covers at least one portion of the source region  122  and at least one portion of the drain region  124 , the semiconductor layer  140  may be located on the source/drain layer  120  and the first buffer layer  130 . In such a configuration, the first buffer layer  130  may be utilized to fill a space between the source region  122  and the drain region  124 , thereby preventing the semiconductor layer  140  from being formed on areas of taper undercut structures of the source region  122  and the drain region  124 , thus preventing the semiconductor layer  140  from having a greater thickness that causes the entire semiconductor layer  140  to have non-uniform thickness and further affects stability of electrical properties. Due to the first buffer layer  130  under the semiconductor layer  140 , the semiconductor layer  140  may have uniform thickness in the formation of the semiconductor layer  140 , and thus stability of electrical properties of the organic thin film transistor  100  can be improved. 
     In this embodiments, the source region  122  has a first surface  125   a  and a second surface  125   b  opposite the first surface  125   a , and has a sidewall  126  adjacent to the first surface  125   a  and the second surface  125   b . The drain region  124  has a first surface  127   a  and a second surface  127   b  opposite the first surface  127   a , and has a sidewall  128  adjacent to the first surface  127   a  and the second surface  127   b . The first surface  125   a  of the source region  122  and the first surface  127   a  of the drain region  124  face the substrate  110 , and the second surface  125   b  of the source region  122  and the second surface  127   b  of the drain region  124  face away from the substrate  110 . The obtuse angle θ 1  is formed between the sidewall  126  and the first surface  125   a  of the source region  122 , and the obtuse angle θ 2  is formed between the sidewall  128  and the first surface  127   a  of the drain region  124 . 
     Furthermore, the first buffer layer  130  has a central portion  132  and extending portions  134  and  136 , and the central portion  132  is located between the source region  122  and the drain region  124 . The extending portion  134  is located on the second surface  125   b  of the source region  122 , and the extending portion  136  is located on the second surface  127   b  of the drain region  124 . In addition, the first buffer layer  130  is in contact with the sidewall  126  and the second surface  125   b  of the source region  122 , and is in contact with the sidewall  128  and the second surface  127   b  of the drain region  124 . As a result, at least one portion of the source region  122  is located between the extending portion  134  and the central portion  132 , and at least one portion of the drain region  124  is located between the extending portion  136  and the central portion  132 . Such a configuration can ensure that the semiconductor layer  140  near the sidewalls  126  and  128  (the taper undercut structures) is separated from the sidewalls  126  and  128  by the first buffer layer  130 , and is supported by the first buffer layer  130 , thereby preventing the semiconductor layer  140  from falling into a space between the source region  122  and the drain region  124  and having non-uniform thickness. 
     It is to be noted that the connection relationships, materials, and advantages of the elements described above will not be repeated hereinafter, and other types of organic thin film transistors will be described. 
       FIG. 2  is a cross-sectional view of an organic thin film transistor  100   a  according to one embodiment of the present invention. The organic thin film transistor  100   a  includes the substrate  110 , the source/drain layer  120 , the first buffer layer  130 , the semiconductor layer  140 , the gate insulating layer  150 , and the gate electrode  160 . The difference between this embodiment and the embodiment shown in  FIG. 1  is that the organic thin film transistor  100   a  further includes a protective layer  170 , a photoresist layer  180 , and a barrier layer  190 . The protective layer  170  is disposed along a surface of the semiconductor layer  140 . The semiconductor layer  140  is located between the protective layer  170  and the source/drain layer  120 , and is located between the protective layer  170  and the first buffer layer  130 . 
     Moreover, the photoresist layer  180  is located on the protective layer  170 , and is located between the gate insulating layer  150  and the protective layer  170 . The barrier layer  190  is located on the substrate  110  and is disposed along a surface of the substrate  110 , and thus the first buffer layer  130  of the organic thin film transistor  100   a  is located among the semiconductor layer  140 , the source region  122 , the drain region  124 , and the barrier layer  190 . In other words, the first buffer layer  130  of the organic thin film transistor  100   a  is surrounded by the semiconductor layer  140 , the source region  122 , the drain region  124 , and the barrier layer  190 . 
     In this embodiment, the protective layer  170  may be made of an organic material to act as an organic protective layer (OPL). The photoresist layer  180  may be made of an organic material to act as an organic photoresist (OPR). The barrier layer  190  may be made of a material including silicon nitride (SiNx) or silicon oxide (SiOx), but the present invention is not limited in this regard. 
       FIG. 3  is a cross-sectional view of an organic thin film transistor  100   b  according to one embodiment of the present invention. The organic thin film transistor  100   b  includes the substrate  110 , the source/drain layer  120 , the first buffer layer  130 , the semiconductor layer  140 , the gate insulating layer  150 , the gate electrode  160 , the protective layer  170 , the photoresist layer  180 , and the barrier layer  190 . The difference between this embodiment and the embodiment shown in  FIG. 2  is that the organic thin film transistor  100   b  further includes a passivation layer  210  and a pixel electrode  220 . The passivation layer  210  covers the gate electrode  160  and the gate insulating layer  150 , and the pixel electrode  220  is located on the passivation layer  210 . In this embodiment, the passivation layer  210  may be made of an organic material to act as an organic passivation (OPV) layer. 
       FIG. 4  is a cross-sectional view of an organic thin film transistor  100   c  according to one embodiment of the present invention. The organic thin film transistor  100   c  includes the substrate  110 , the source/drain layer  120 , the first buffer layer  130 , the semiconductor layer  140 , the gate insulating layer  150 , the gate electrode  160 , the protective layer  170 , the photoresist layer  180 , and the barrier layer  190 . The difference between this embodiment and the embodiment shown in  FIG. 2  is that the organic thin film transistor  100   c  further includes a second buffer layer  230 . The second buffer layer  230  is located on the barrier layer  190 , and thus the first buffer layer  130  is located among the semiconductor layer  140 , the source region  122 , the drain region  124 , and the second buffer layer  230 . In other words, the first buffer layer  130  is surrounded by the semiconductor layer  140 , the source region  122 , the drain region  124 , and the second buffer layer  230 . 
       FIG. 5  is a cross-sectional view of an organic thin film transistor  100   d  according to one embodiment of the present invention. The organic thin film transistor  100   d  includes the substrate  110 , the source/drain layer  120 , the first buffer layer  130 , the semiconductor layer  140 , the gate insulating layer  150 , the gate electrode  160 , the protective layer  170 , the photoresist layer  180 , the barrier layer  190 , and the second buffer layer  230 . The difference between this embodiment and the embodiment shown in  FIG. 4  is that the organic thin film transistor  100   d  further includes the passivation layer  210  and the pixel electrode  220 . The passivation layer  210  covers the gate electrode  160  and the gate insulating layer  150 , and the pixel electrode  220  is located on the passivation layer  210 . 
     Although the present invention has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. 
     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention covers modifications and variations of this invention provided they fall within the scope of the following claims.