Patent Publication Number: US-2013254601-A1

Title: Debugging device

Description:
BACKGROUND 
     1. Technical Field 
     The disclosure generally relates to debugging devices, and particularly to a device for debugging a terminal electronic device. 
     2. Description of the Related Art 
     A debugging card is used to debug a terminal electronic device such as a personal computer. After the terminal electronic device is powered on, a process of power on self test (POST) is initiated, and a basic input/output system (BIOS) of the terminal electronic device outputs POST codes to the debugging card. However, the POST codes are displayed only momentarily on a display unit of the debugging card. If the BIOS outputs a plurality of POST codes, confusion may occur regarding results of the debugging. 
     Therefore, there is room for improvement within the art. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Many aspects of the present disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. 
         FIG. 1  is a schematic view of a debugging device, according to an exemplary embodiment. 
         FIG. 2  is a block diagram illustrating of the debugging device as shown in  FIG. 1 . 
     
    
    
     DETAILED DESCRIPTION 
       FIGS. 1-2  show a debugging device  100  of one embodiment. The debugging device  100  can be used to debug a terminal electronic device  200  (e.g., a personal computer or a server) to store and display power on self test (POST) codes output from the terminal electronic device  200 . 
     The terminal electronic device  200  includes a first port  240 , a second port  260 , a basic input/output system (BIOS)  280 , and other electronic components (not shown), such as a hard disk drive (HDD), a keyboard, a central processing unit (CPU), or an audio assembly, for example. 
     In one exemplary embodiment, the first port  240  can be a peripheral component interconnect (PCI) port or an industry standard architecture (ISA) port, and the second port  260  is a universal serial bus (USB) port. The BIOS  280  outputs the POST codes via the first port  240  when any electronic component of the terminal electronic device  200  malfunctions or fails to be powered on. In one exemplary embodiment, the POST codes are in a form of binary numbers. 
     The debugging device  100  includes a body  110 , a first connector  120 , a second connector  130 , a processor  140 , and a display unit  150 . The first connector  120  and the second connector  130  are positioned at opposite ends of the body  110 . The processor  140  is received and integrated in the body  110 , and the display unit  150  is exposed on an external surface of the body  110 . 
     In one exemplary embodiment, the first connector  120  is an universal connector of a common debugging card, such as a PCI connector or an ISA connector, and is configured to couple to the first port  240  to receive the POST codes. 
     In one exemplary embodiment, the second connector  130  is a USB connector, and is configured to couple to the second port  260  of the terminal electronic device  200 . Thus, the debugging device  100  can communicate with the terminal electronic device  200  via USB protocols. 
     The processor  140  is electronically connected between the first connector  120  and the second connector  130 . The processor  140  obtains the POST codes from the first connector  120 , and converts the POST codes into malfunction-indicator codes in a form of hexadecimal number. Additionally, the processor  140  automatically stores the malfunction-indicator codes, and the malfunction-indicator codes can be output via the second connector  130 . Moreover, the processor  140  is electronically connected to the display unit  150  to transmit the malfunction-indicator codes to display unit  150 . In one exemplary embodiment, the display unit  150  is two seven-segment Nixie tubes for displaying the malfunction-indicator codes. 
     When the terminal electronic device  200  is powered on, a process of power on self test (POST) is initiated by the BIOS  280 . For example, if the CPU of the terminal electronic device  200  fails to be powered on, the BIOS  280  outputs a POST code “11101110” to the debugging device  100  via the first port  240 . If the keyboard of the terminal electronic device  200  malfunctions, the BIOS  280  outputs a POST code “01110110” to the debugging device  100 . The debugging device  100  obtains the POST codes “11101110” and “01110110”, and converts the POST code “11101110” to a malfunction-indicator code “EE”, converts the POST code “01110110” to a malfunction-indicator code “76”. Then, the malfunction-indicator codes “EE” and “76” are displayed in turn through the display unit  150 . In addition, the malfunction-indicator codes “EE” and “76” are stored in the processor  140  and can be transmitted to the terminal electronic device  200  via the second connector  130 . Thus, a display apparatus (not shown) of the terminal electronic device  200  can be utilized for viewing of all the malfunction-indicator codes. 
     In other exemplary embodiments, the debugging device  100  receives data from the terminal electronic device  200  via the second connector  130 , and the data is stored in the processor  140 , or other storage with larger capacity. 
     The debugging device  100  shows the malfunction-indicator codes one at a time through the display unit  150 , and also stores the malfunction-indicator codes through the processor  140 , for subsequent and repeated viewing as required. Thus, the malfunction-indicator codes serve as a back-up, and can be transmitted in their entirety to other display apparatus for simultaneous display. Therefore, confusion as to the precise test results are reduced, and the debugging device  100  is both efficient and convenient. 
     Although numerous characteristics and advantages of the exemplary embodiments have been set forth in the foregoing description, together with details of the structures and functions of the exemplary embodiments, the disclosure is illustrative only, and changes may be made in detail, especially in the matters of arrangement of parts within the principles of disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.