Patent Publication Number: US-7218862-B2

Title: All optical cross routing using decoding systems for optical encoded data symbols

Description:
REFERENCE TO OTHER APPLICATIONS 
   This application claims the benefit of U.S. Provisional Patent Application Ser. No. 60/405,697, filed Aug. 22, 2002, entitled “Streaming signal control system for digital communications”, and of U.S. Provisional Patent Application Ser. No. 60/420,112, filed Oct. 21, 2002, entitled “Streaming signal control system for digital communications”. 

   FIELD OF THE INVENTION 
   The invention relates to communications systems and more particularly to the modulation and control of signals for example by interaction of energy in a stateless controller device. 
   BACKGROUND AND PRIOR ART 
   In the field of optical communication, there is a pressing need to improve the capacity of optical networks and the speed of switching at reasonable cost. These are attended by the related problems of efficient retrofit to existing infrastructure, ease of maintenance, reliability, etc. The physical media of optical fibers used in current generation optical networks have a tremendous as yet untapped reserve capacity. The reasons for this involve various bottlenecks, chief among them, the slow speed of switches for optical data. To switch optical data, either the data on an optically-modulated signal must be converted to electrical modulation and switched by electrical switches, switched by relatively slow state change switches such as electro-optical, or thermo-optical switches, or switched by slow mechanical switches like Micro Electro Mechanical Systems (MEMS). Although the electrical conversion and switching is slow it is still much faster than any technology available today for optical switching. The optical switches are too slow to handle information switching and thus are used only for system management and reconfiguration in which the recovery time that may be tolerated for such application is in the range of microseconds to milliseconds. Some of the switches are much faster than the recovery time of the system and some of them have a time response of 50 ns, but still they are too slow for being used for the purpose of data switching fast enough as to avoid storage, which inevitably involves conversion. Electrical switching is the only technology available today that is capable of acting as a switch in the sense of intelligent switching or packet switching, because of the storage capability. While the switching is intelligent, it is still slow and constitutes a major bottleneck in communication networks. To compensate for the slowness of electronic switching, substantial parallelism must be introduced into the design of switches resulting in high cost, large footprint and power consumption. These limitations are near their upper limits making them very difficult to scale. 
   Currently, there is no all-optical analog to the network switches used in networks. 
   In addition to the switching process per se, the process of generating optical signals—the modulation itself—is slow because of the rise and fall times of current optical modulators. As a result, symbols are much longer than need be, thereby limiting the bandwidth to a level substantially below the potential of the optical media. 
   A technique called Wavelength Division Multiplexing (WDM) and a refinement called, Dense Wavelength Division Multiplexing (DWDM) are currently used to increase the capacity of optical media using current modulation technology. WDM or DWDM methods increase the transmission rate by creating parallel information channels, each channel being defined by a different light frequency. Another method, Time Division Multiplexing (TDM) exists in which multiple data sequences are interleaved in time-division fashion on a common medium. 
   WDM or DWDM methods increase the transmission rate by using parallel information channels. The information in each optical channel is carried by a different light frequency. The light frequencies of the channels are combined together and are inserted into the input of a single optical fiber. The combined light frequencies at the output of the fiber are separated into different parallel channels, one for each specific light frequency. Although DWM and DWDM have the ability to increase the capacity of a fiber, the number of channels that may be defined has a practical upper limit because of the limited bandwidth of the fiber (optical properties are attuned to a narrow range of frequencies) and because of the ability of the laser sources to contain their energy in very narrow frequency bands. 
   Even if the line-width of the lasers would be made sufficiently narrow to allow the addition of more channels, the number of channels cannot be increased without limit. Increasing the number of channels results in channel crosstalk. Crosstalk results from nonlinear effects that occur within fiber media when subjected to the intense electrical fields produced when a high channel count is used. In TDM, the bits of several parallel channels at the same light frequency are interleaved in a predetermined periodic order to create a single serial data stream. This method is very effective when using a buffer, which accumulates and compresses the data of several channels into a dense serial data stream of a single channel by reorganizing this data with suitable delays. However the data rate permitted by this method, as well as others, is still limited by the data rate and duty cycle of the modulators or the light sources (DFB and DBR lasers) themselves when direct modulation is used. That is, in direct modulation, the power to the laser is switched on and off. The rate at which this can occur has a physical upper limit due to the relatively long recovery time of the lasers and it produces chromatic dispersions due to broadening of the emitted spectral line of the modulated lasers. This is caused by spontaneous emission, jittering, and shifting of the gain curve of the lasers during the current injection. Where modulation is performed in an indirect manner, by modulators, the lasers are operated in a Continuous Wave (CW) mode and separate modulators perform the modulation of the beam. The modulators are usually made from interference devices such as Mach-Zender&#39;s, directional couplers and active half wave-plates combined with polarizers and analyzers. However, an electro-optical device must be activated to modulate the beam and thereby produces phase shifts and polarization changes. Such changes involve the creation and removal of space charges, which change the density of the charge carriers within these electro-optic materials. The formation rate of the space charges is mainly dependent upon the speed and the magnitude of the applied voltage and can be on the order of sub nanoseconds. The charge removal is usually slower and is mainly dependent upon the relaxation time of these materials (lifetime of charge carriers) and can be relatively long. Accordingly, the width of the pulses and the duty cycle of the modulation are dependent limited by the long off-time (latency) of the modulators. 
   These same rise and fall time limitations impose similar limits on the abilities of switches to direct light along alternative pathways according to routing commands and data. At present, there are two major classes of optical switches. In one class, optical signals are converted to electrical signals, routed and switched conventionally, and optical signals generated anew at the output. As discussed above, the process of conversion is costly and the reduction of switching time is limited since the switching time includes delays due to reading, processing of destinations, reconfiguration delays, device I/O, and regeneration of the optical signals. Thus the switching time is slow requiring many parallel channels to obtain throughput making such switches scale poorly, costly, and otherwise problematic. In optical applications, this class of switches goes by the identifier OEO, which stands for signals medium conversion, from the optical domain to the electrical domain and then back to the optical. 
   A second class of optical switch, which is often very slow to reconfigure, goes by the identifier OO, which stands for optical-optical, as the signals are maintained thoroughly in the optical domain. In these switches, no conversion of optical signals to electrical signals takes place. Instead, the optical energy is routed by means of some sort of light diversion process such as a switchable mirror. In one system, micromechanical actuators or so-called Micro Electro Mechanical System (MEMS), use electrostatic forces to mechanically move microscopic mirrors in response to electrical routing signals. The speed of such switches is very limited by the slow response of the devices used to perform switching, for example, MEMS mechanism. The result is that no OO switch is capable of packet switching and is only applicable where the granularity of data signals is extremely high, such that the delays required for configuration represent a small fraction of the time required for transmitting. These devices are applicable in the core portions of networks and do not address the bottleneck problems inherent electronic switches. 
   At present, the highest bit rate being deployed is about 10 G bits per second per channel. Higher bit rates designs, such as 40 G bit per second per channel, are mainly challenged by developing high bit rate devices, improve optical signal-to-noise ratio and compensate for dispersion. Present high speed 10 G bits per second devices are limited by the modulation rate of the modulators, the pulse width that they produce, and the switching time of the electronic switches. 
   There is a need for reliable mechanisms for exploiting the physical potential of fiber optic media in terms of data rate, switching, and cost. 
   In optical communication networks there is a need for fast, reliable, and inexpensive systems capable of demultiplexing information. One-solution for such a need is provided by Passive Optical Networks (PON) that passively demultiplex the information, by splitters, into multiple customers. Such PON systems have a common use in applications for the last-mile. However such a solution suffers from security problems since every attached PON network customers receives the whole information of all other network customers, regardless of the targeted customer. Accordingly it is desired to produce an inexpensive, simple demultiplexing system in which each customer receives the information in a direct manner and only the information designated specifically to him. 
   U.S. Pat. No. 5,060,305 entitled “Self Clocked, Self Routed Photonic Switch” filed Oct. 22, 1991 and U.S. Pat. No. 6,160,652 entitled “Optical Address Decoder” filed Dec. 12, 2000, disclose systems and devices for decoding headers in an architecture of sending information by payloads where the destinations of the payloads are encoded in the headers. 
   The design of the embodiments according to the present invention allows simple direct demultiplexing of the information without the use of headers and payloads. Thus the embodiments of the present invention are simpler, more reliable, faster, and less expensive than the embodiments disclosed by U.S. Pat. Nos. 5,060,305 and 6,160,652. 
   Accordingly, it is an object of the present invention to provide a passive, inexpensive, and reliable system for direct switching, routing, multiplexing and demultiplexing of information; 
   Another object of the present invention is to provide passive and fast systems for direct switching, routing, multiplexing and demultiplexing of information in which each customer may receives information directed only to him; 
   Another object of the present invention is to provide a fast system for direct switching, routing, multiplexing and demultiplexing of information that may include a threshold mechanism and switch the information in a direct manner; 
   Another object of the present invention is to provide a fast system for direct switching, routing, multiplexing and demultiplexing of information across multiple decoding/switching/routing/demultiplexing layers; 
   Another object of the present invention is to provide a fast system for direct switching, routing, multiplexing and demultiplexing of information to form cross connection switching and cross-connection boxes for decoding/switching/routing/demultiplexing of information; 
   Another object of the present invention is to provide a fast system for direct switching, routing, multiplexing and demultiplexing of information that may include a threshold mechanism and in which each customer receives information directed only to him; 
   Another object of the present invention is to provide fast systems for direct switching, routing, multiplexing and demultiplexing of information including coincidence gates or decoding devices that may be stateless; 
   Another object of the present invention is to provide coincidence gates that include a summing gate that may be of one of the type of dielectric and metallic beam-splitters, dual gratings, high density gratings, array of radiation guide gratings, Array of Waveguide Gratings (AWG), polarization beam-splitters, directional couplers, and Y-junctions; 
   Another object of the present invention is to provide coincidence gates that may be produced in any of the media including, open space, radiation guides, fiber optics, wave guides, and planar wave guides fabricated on a chip; 
   Another object of the present invention is to provide coincidence gates including summing gates that may sum the control and the data signal coherently or non-coherently; 
   Another object of the present invention is to provide coincidence gates including summing gates that may sum the control and the data signal coherently and have closed loop phase control; 
   Another object of the present invention is to provide coincidence gates including electrical or optical threshold mechanisms; 
   Another object of the present invention is to provide coincidence gates that may receive in their inputs control and data signal for a single source or from different sources; 
   Another object of the present invention is to provide coincidence gates including summing gates that may sum the control and the data signal and have closed loop clock recovery control; 
   Another object of the present invention is to provide a method and apparatuses to increase the rate of information transmitted using narrow pulse generators and shapers and dense interleaving to produce high dense multiplexing and demultiplexing; 
   Another object of the present invention is to provide codes with predetermined destinations including at least one control pulse and one data pulse; 
   Another object of the present invention is to provide codes with predetermined destinations including multiple control pulses; 
   Another object of the present invention is to provide codes constructed from a plurality of pulses with predetermined destinations including multiple control pulses to route, switch or demultiplex information across multiple routing, switching and demultiplexing layers; 
   Another object of the present invention is to provide symbol configurations, summing gates, and control pulses for increasing the ratio between coincidence pulses and non-coincidence pulses produced by coincidence gates; 
   Another object of the present invention is to provide coincidence gates including delay lines; 
   Another object of the present invention is to provide coincidence gates including variable delay lines; 
   Another object of the present invention is to provide coincidence gates including delay lines compactly produced on a chip; 
   Another object of the present invention is to provide optical cross-connection boxes capable of information self routing; 
   Another object of the present invention is to provide a self routing,switching and demultiplexing mechanism that maintains synchronization; 
   Another object of the present invention is to provide a self routing, switching and demultiplexing mechanism across DWDM systems that may include multiple switching layers; 
   Another object of the present invention is to provide embodiments designed to multiplex/demultiplex symbols with predetermined addresses including management of guard band between symbols, and, 
   Still another object of the present invention is to provide embodiments designed to multiplex/demultiplex symbols with predetermined addresses modulated by any combination of time, phase, and polarization modulation. 
   SUMMARY OF THE INVENTION 
   An all-optical system for modulating, switching, multiplexing, demultiplexing, and routing signals, for example digital signals in an optical medium, employs control units that direct energy according to a coincident control signal which may be in the same form as the digital signal. Briefly, in an embodiment where the signals are optical, any of a variety of different interactions between light inputs results in a combined output with a different magnitude when both inputs coincide than when they do not. For example, an energy summer produces an output whose power is proportional to the sum of the two inputs when the two inputs coincide and whose power is proportional to the individual inputs when the two inputs do not coincide. In an example embodiment, a control signal determines the power level of the output based on some addressing technique by combining the control signal at one input with a data signal at the other input. The control and the data signals may arrive from the same source of from different sources. The resulting signal has a higher magnitude when control and data signals are combined than when not. The output may be received by an optical-electrical transducer (e.g., a photodiode circuit) or an all optical threshold device configured to discriminate signals above a predefined threshold (electronically or optically) from signals below the predefined threshold. In such a receiver, data signals that are summed with a control signal are accepted as received data, while signals that are not summed (and, as a result, having a power magnitude below the threshold) are rejected. In an application of this example using a summer, a transmitter modulates a light beam to form pulses, each representing a bit consisting of a data pulse and a control pulse whose spacing represents a destination address. The modulated beam is applied in parallel to a set of summers. Each summer has a non-delayed input and a delayed input (or two inputs when each input has a different delay). Each summer has a respective delay at its delayed inputs (or between its inputs) such that a given spacing between the data and control pulses causes a coincidence at only one of the summers. The outputs of all the summers are sent to respective receivers, each configured to reject signals whose magnitude is below a specified threshold. Only one receiver will accept the data pulses “addressed” for the gate (i.e. whose spacing corresponds to that gate&#39;s control input&#39;s delay) connected to that receiver. In this embodiment, pulse-pairs will produce a single output pulse whose magnitude meets a threshold only at a single receiver. This function results in, effectively, a routing of each data bit to a selected receiver over a channel connected to multiple receivers. 
   In the above example, a simple summer can be fabricated from a Y-junction, directional coupler or a beam splitter, all commonly used in optical communications circuits. For example, it can also be fabricated from other optical devices used for energy summing, such as, transmitting and reflecting grating, fiber grating or other coupling devices. The light energy is preferably formed of light of a range of propagation modes, frequencies, phases or any combination between them, so that the signal power summing effect is produced non-coherently. Alternatively, the light at one input can be a different frequency than the light at the other input with the gate output being a mixture of the two input frequencies. 
   In further embodiments, the gate directs a substantial fraction of the energy pulses (including symbols) in a data signal to a first output when light from its two inputs are coincident, in its summing region, and to a second output when there is no coincidence. This effect can be produced by coherent summing, for example by means of a beam-splitter or directional coupler. In these embodiments, the interaction is coherent resulting in interference between the light signals applied at the two inputs. The power of the output when the input energy is coincident, in these latter embodiments, may be greater than the sum of the energy produced at the outputs in non coincidence situations. Several variations on these embodiments are described: 
   In one embodiment, the E-fields of the two input signals are summed providing an output whose power is up to four times the power of either output when one input alone provides a signal (assuming the two inputs have the same power level); In another embodiment, the E-fields of the two input signals are summed. The resultant output is added to a signal generated by a separate source whose E-field magnitude is some fraction of that of the output resulting from coincidence of the inputs and out of phase with it such that the magnitude ratio of the signal at the coincidence output in a coincidence state to the signal in a non-coincidence state is increased. For example, if the E-field of the constant source is one half the magnitude of the non-coincidence signal at the coincidence output and out of phase with it, the energy magnitude of the signal in a coincidence state at the coincidence output will be nine times the magnitude of the non-coincidence signal at that output. 
   In a further embodiment, the pulses may be formed such that there is a negative E-field added to them, whose amplitude is, for example, a third of the E-field of the pulses and 180 degrees out of phase. Then, when the pulses are added coherently, the coincidence pulse power level is up to nine times (for the −⅓, +1 example) greater than that of the level of the non-coincidence pulses or the “floor” level between the pulses. 
   In an additional embodiment, pulses with E-fields having different polarizations may be summed to generate, by vector addition, a pulse with a different polarization angle matching that of a polarization filter such that the energy of either component is substantially more attenuated than that of the sum. The ratio between the output energies of the signals in a non-coincidence state and a coincidence state, at the coincidence output, is depend on whether polarization filter is used or not in the output(s) of the control device. It also depends on the relative polarization orientation between the inputs beams. When pulses, whose E-fields at respective inputs are in phase, but with a difference in polarization angle of π/2, are summed by a polarizing beam splitter, the above ratio at the output is 4:1 when a polarization filter is used at the output and 2:1 when such a filter is not used. This ratio can be increased to 9:1 by adding CW field, with the appropriate magnitude phase and polarization, to each of the inputs or to the summed outputs. It is also possible to select one of two outputs providing the coincidence behavior by changing the phase of one of the inputs relative to the other. 
   Other control mechanisms may be employed besides the addressing scheme mentioned above. For example, a pulse sequence could be compared in a gate, such as described above, to a predefined pulse sequence defining an address. The gate may be configured such that if the addresses match, high-level signals are output due to consistent in the gate. Alternatively, the gate may be configured such that if the addresses match, only low-level signals are output due to non-coincidence in the gate. Other modulation schemes could also be used in connection with the present invention, for example, phase modulation, polarization modulation or any combination of them. 
   Phase modulation is produced by the relative phase between the data and control signals. When a control signal and a data signal are coincident with equal phases, at respective inputs of a control unit, most of the data signal energy is directed to one output (the coincidence output for phase matching). Alternatively, when a control signal and a data signal are coincident with opposite phases, at the same respective inputs of a control unit, most of the data signal energy is directed to the other output (the coincidence output for anti-phase). Accordingly, the appearance of a high-energy signal in one of the outputs of the control unit depends on the coincidence and the phase conditions. 
   Polarization modulation is produced by the relative polarization between the data and control signals. When a control signal and a data signal are coherent and polarized along the same direction, at respective inputs of a control unit (even if the control unit is polarization-insensitive), most of the data signal energy is directed to one output: the coincidence output corresponding to phase matching. Alternatively, when the control unit is polarization-sensitive and receives, at its respective inputs, control and data signals that are polarized along directions that are normal to each other, most of the data signal energy is directed to one of the outputs of the control unit. The coincidence output can be selected by the relative polarization orientation and phase between the energy at the inputs of the control unit. Accordingly, the appearance of a high-energy signal in one of the outputs of the control unit depends on the coincidence, the phase, and the polarization conditions. 
   Combined modulation can be achieved by any combination of the modulation methods, i.e., time, phase, and polarization. A combination of modulation methods increases the number of independent parameters that each symbol contains and thus increases the amount of information that each symbol can carry. 
   When a control signal and a data signal are coincident at respective inputs of a control unit, most of the data signal energy is directed to one output and when the control signal is non-coincident with the data signal, most of the data signal energy is directed to another output or simply discarded. According to an embodiment, this “coincidence-gate” behavior is brought about by the interference of the control and data signals. Note that reference to one signal as a control signal and the other signal as a data signal is, at least in many embodiments, an arbitrary choice and may be used in the present specification simply to facilitate the description of the invention. The described addressing technique may include signals having multiple control pulses. The multiple control pulses are constructed such that they can only be decoded by a single combination of multiple coincidence gates. Such a technique may also be used for addressing across multiple layers of switching, demultiplexing or routing layers. 
   In an embodiment, the interference of light in the control and data signals is the result of applying one signal to a first diffraction grating that generates a first interference order diffraction pattern and the other signal to a diffraction pattern adjacent or interleaved with the first such that a different interference order is generated when both signals coincide on both gratings. In an example, the first grating may be a transmission grating with (broken or patterned) reflective surfaces between the transmission apertures defining a reflection grating. With such a device, one signal may reflect off of the reflective grating and the other signal may pass through the transmission grating. The reflection and transmission diffraction patterns of either signal produces first order diffracted radiation when only one signal falls on the device at given instant of time. But when both fall on the device at the same time, so that the effective pitch of the diffraction grating includes both the transmission and reflection grating, a lower order diffracted radiation results. In the case of the first order pattern, the number of lobes is higher and they have different intensities from that of the lower order diffraction pattern. With suitably spatially-located receivers, the energy may be directed in different directions from this type of interference device depending on the relative phase between the beams and whether the two signals are coincident or non-coincident. The coincidence gate may thus have a coincidence output to which higher energy is sent when the both inputs receive energy at the same time and a non-coincidence output to which energy is sent when the inputs receive energy at different times. Note, as should be clear to a person of ordinary skill, for the above interference type of coincidence gate to work properly, the phases of the inputs should be properly aligned to insure the energy from the gratings falls on the respective receivers. It should be understood that selecting certain outputs as coincident and non-coincident output may change and each output may serve both, a coincidence and non-coincidence output, depending on the specific application used. 
   An alternative device for producing a coincidence effect is to perform non-coherent summing. Laser light from a multimode laser or a Light Emitting Diode (LED) characterized by a distribution of wavelengths and/or phases can be modulated and summed non-coherently. In such an embodiment, the ratio of energies of the coincidence output and the non-coincidence outputs may not be as high as with coherent summing, but the effect is still strong enough to be usable for gating. 
   Using such interference devices, by suitable construction of an optical device, incident energy is directed along different paths depending on whether the data and control beams are coincident on the inputs of the device or non-coincident. The result is a basic component, mentioned above, called a coincidence gate. This gate may be used to control the path of a data signal. For example, by articulating a single data signal so that it contains pairs of pulses separated by a predefined spacing, and splitting this signal, sending one to one input of the coincidence gate and sending a delayed version to the other input of the coincidence gate, the signal will transmit a pulse of higher intensity at an output of a coincidence gate where the pulse spacing matches the delay than at the output of a coincidence gate where the pulse spacing is different from the delay. By sending such a spaced-pulse symbol to a number of different coincidence gates in parallel, each with a different delay, the articulated signal will, in effect, select an output according to the delay matching the spacing of the pulses in the signal. Thus, the optical signal carries a symbol (the pulse spacing) that selects which coincidence gate-device most of its energy will be sent through. This effect amounts to a basic switching function. 
   Note that the switching function can be layered by providing each output to another set of different gates each with another different delay. To articulate the signal for successive layers, the signal construction may be repeated in self-similar steps for every switch layer involved because each pulse pair only produces a single pulse at the output. The details of this process are described in the Detailed Description section along with supporting illustrations. 
   The coincidence device may also be used to create a modulator for dense signal transmission because of its rapid on-off response. That is, if two broad pulses are applied to the control and data inputs of a coincidence device with different time delays, the width of the pulse emerging from the coincidence output will be determined by the period during which both input pulses are incident on a gate. Thus, the coincidence effect can be used to generate pulses that are very narrow. Other devices are also discussed for forming narrow pulses. By combining multiple streams from such sources of narrow pulses into a common optical channel with respective delays, very dense streams of narrow pulses may be generated thereby increasing the bandwidth of an optical signal. A mirror-image process can then be used to demultiplex the dense data stream into respective channels with larger pulse spacing at a receiving end. Thus, the above description embodies a multiplexer/demultiplexer combination. Another way of forming dense pulse streams is to modulate multiple parallel channels fed by a mode locked laser and interleaving the pulses. 
   There are a number of alternative interference devices that may be used to create a coincidence gate. Y-junctions, directional couplers, fast-pitch diffraction gratings, beam splitters, and other examples discussed in the present specification may be used to form coincidence gates and produce a similar coincidence function. These examples are described in the Detailed Description section below along with supporting illustrations. 
   Also, in addition to the modulation and self-switching functions described above, the coincidence gate may be used as the basis for a switch controlled by an external control signal. Thus, a data signal from one source can be directed to an appropriate output of a layer of coincidence gates by sending an appropriately-timed control pulse to all of the gates. Alternatively, a single selected coincidence gate can have one of its outputs selected by an external control signal by transmitting a control signal to only the selected coincidence gate. 
   An additional layer of symbology may be added to an optical signal which may be used for switching purposes in coincidence gates employing the diffraction phenomenon. The propagation directions of the various diffraction orders may be varied by imposing different phase relationships between the data and control signals. By placing receivers in different locations, each set with different outputs, the coincidence gate may be configured to provide selectable outputs depending on the phase relationship between the pulses. 
   The present invention provides an optical system for decoding, switching, demultiplexing, and routing of optical encoded data symbols from multiple inputs to multiple outputs, including: 
   a plurality of demultiplexing systems, each of the demultiplexing systems includes an input and a plurality of outputs, each of the demultiplexing systems is a system for performing a function selected from a group of functions including decoding, switching, demultiplexing, and routing for producing decoded signals at the outputs in response to the encoded data symbols received at the input ; and 
   a coupling mechanism for coupling the outputs of the plurality of demultiplexing systems to allow each of the encoded data symbols received by the input of each of the plurality of demultiplexing systems to produce the decoded signals at the outputs of the plurality of demultiplexing systems. 
   The present invention also provides an optical system for decoding, switching, demultiplexing, and routing of optical encoded data symbols from multiple inputs to multiple outputs, including: 
   a plurality of demultiplexing systems, each of the demultiplexing system including: 
   an input for receiving the encoded data symbols; 
   a plurality of optical paths having first and second terminals; 
   a splitting mechanism for directing the encoded data symbols from the input to each of the first terminals; 
   a plurality of decoding devices for producing decoded signals in response to the encoded data symbols; and 
   each of the optical paths includes, between the first and second terminals, at least one of the decoding devices to produce one of the decoded signals at one of the second terminals in response to one of the encoded data symbols; and 
   a coupling mechanism for coupling the second terminals of the plurality of demultiplexing systems to allow each of the encoded data symbols received by the input of each of the plurality of demultiplexing systems to produce the decoded signals at the second terminals of the plurality of demultiplexing systems. 
   The present invention still provides an optical system for decoding, switching, demultiplexing, and routing of optical encoded data symbols from multiple inputs to multiple outputs, including: 
   a plurality of demultiplexing systems, each of the demultiplexing system including: 
   an input for receiving the encoded data symbols; 
   a plurality of radiation guides having first and second terminals; 
   a splitting mechanism for directing the encoded data symbols from the input to each of the first terminals; 
   a plurality of decoding devices, each of the decoding devices produces one of a plurality of decoded signals in response to one of the encoded data symbols; and 
   each of the radiation guides includes, between the first and second terminals, at least one of the decoding devices to produce one of the plurality of decoded signals at one of the second terminals in response to one of the encoded data symbols; and 
   a coupling mechanism for coupling the second terminals of the plurality of demultiplexing systems to allow the encoded data symbols received by the input of each of the plurality of demultiplexing systems to produce the decoded signals at the second terminals of the plurality of demultiplexing systems. 
   In another version, the present invention provides an optical system for decoding, switching, demultiplexing, and routing of optical encoded data symbols from multiple inputs to multiple outputs, including: 
   a plurality of demultiplexing systems, each of the demultiplexing system including: 
   an input for receiving the encoded data symbols; 
   a first plurality of radiation guides having first and second terminals; 
   a first splitting mechanism for directing the encoded data symbols from the input to each of the first terminals of the radiation guides of the first plurality of radiation guides; 
   a plurality of decoding devices each of the decoding devices includes a second plurality of radiation guides, each of the radiation guides of the second plurality of radiation guides associated with one of the ports of a second splitting mechanism and with one of the ports of a combining mechanism, the decoding devices are arranged for producing decoded signals in response to the encoded data symbols; and 
   each of the optical paths includes, between the first and second terminals, at least one of the decoding devices to produce one of the decoded signals at one of the second terminals in response to one of the encoded data symbols; and 
   a coupling mechanism for coupling the second terminals of the plurality of demultiplexing systems to allow each of the encoded data symbols received by the input of each of the plurality of demultiplexing systems to produce the decoded signals at the second terminals of the plurality of demultiplexing systems. 
   While some of the embodiments of the invention are illustrated as being constructed in one of the media of open space, fiber optics, radiation guides, waveguides, and planar waveguides on a chip, each of them may be fabricated in any of these media. It also should be clear that while the descriptions below describe coincidence gates they are also decoding devices. While the optical encoded data symbols may also be described, below, as encoded signals, signals including information and control pulses, symbols, symbol signals, spaced-pulse symbols, pulse patterns and signals, it should be clear that they all may represent optical encoded data symbols as well as other signals defined by other terms that may describe equivalents to optical encoded data symbols. 
   The invention will be described in connection with certain preferred embodiments, with reference to the following illustrative figures so that it may be more fully understood. With reference to the figures, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of the preferred embodiments of the present invention only, and are presented in the cause of providing what is believed to be the most useful and readily understood description of the principles and conceptual aspects of the invention. In this regard, no attempt is made to show structural details of the invention in more detail than is necessary for a fundamental understanding of the invention, the description taken with the drawings making apparent to those skilled in the art how the several forms of the invention may be embodied in practice. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention is herein described, by way of example only, with reference to accompanying drawings, wherein: 
       FIGS. 1A ,  1 B,  1 C and  1 D are figurative illustrations of a gate having two inputs and two outputs showing the output signals at the gate outputs for different combinations of the input beams received at the gate inputs; 
       FIGS. 2A ,  2 B and  2 C are schematic illustrations of a gate including a dielectric beam-splitter device having two inputs and two outputs and showing the output signals at the gate outputs for different combinations of the input beams received at the gate inputs; 
       FIGS. 3A ,  3 B and  3 C are figurative illustrations of a gate including a metallic beam-splitter device having two inputs and two outputs and showing the output signals at the gate outputs for different combinations of the input beams received at the gate inputs; 
       FIGS. 4A ,  4 B,  4 C,  4 D and  4 E schematically illustrate a gate made of a dual grating device having transmitting and reflecting gratings illustrated within a prism having two inputs and two outputs and showing the output signals at the gate outputs for different combinations of the input beams with different relative phases received at the gate inputs; 
       FIGS. 5A ,  5 B and  5 C are figurative illustrations of a gate made of a Y-junction combiner device having two inputs and one output showing the output signal at the gate outputs for different combinations of the input beams received at the gate inputs; 
       FIGS. 6A ,  6 B and  6 C are schematic illustrations of a gate constructed by a high pitch grating device illustrated within a prism having two inputs and two outputs showing the output signals at the gate outputs for different combinations of input beams received at the gate inputs; 
       FIGS. 7A and 7B  schematically illustrate a gate made of an array of interleaved light guides having two inputs and one output and showing the gate where it is fabricated by optical fibers and planar waveguides, respectively; 
       FIGS. 8A ,  8 B,  8 C and  8 D are figurative illustrations of a gate including a polarizing beam splitter device and two output polarizes having two inputs and two outputs and showing the output signals at the gate outputs for different combinations of the input beams received at the gate inputs; 
       FIG. 8E  is a schematic illustration of a gate produced by a directional coupler exhibiting behavior similar to the behavior of the gates illustrated by  FIGS. 1A–1D ,  2 A– 2 C,  3 A– 3 C,  4 A– 4 E,  5 A– 5 C,  6 A– 6 C,  7 A– 7 B and  8 A– 8 D; 
       FIGS. 9A and 9B  illustrate coincidence gates for symbol-selection mechanism in a situation where the gates are in non-coincidence and coincidence states, respectively; 
       FIG. 9C  is a schematic illustration of a symbol copier that duplicates a single symbol to produce input symbols for a coincidence gate; 
       FIG. 9D  schematically illustrates a one-to-two demultiplexer representing in general any one-to-many demultiplexer having output ports that each of them has a corresponding receiver that respond only to a specific corresponding symbol at the input; 
       FIG. 9E  is a schematic illustration of series of symbols configured to produce time synchronized coincidence signals; 
       FIGS. 9F ,  9 G and  9 H illustrate the coincidence and non-coincidence signals produced at the outputs of coincidence gates in response to input signals in the from of spaced-pulses symbol, spaced-notches symbol with non zero background, and spaced-pulses symbol including pulses with different widths, respectively; 
       FIG. 9I  illustrates the spectral distributions of wide band non-coherent and narrow band coherent signals; 
       FIG. 10A  is a schematic illustration of the field vectors of the signals received by a coincidence gate and their delayed vectorial coherent summing produced at the outputs of the coincidence gate; 
       FIG. 10B  illustrates exemplary presentation of vectors illustrated by their magnitude and phase in a complex plane; 
       FIG. 10C  is a schematic illustration of the field vectors of the signals and their non-zero background received by a coincidence gate and their enhanced delayed vectorial coherent summing produced at the outputs of the coincidence gate; 
       FIG. 10D  is a schematic illustration of the field vectors of the signals received by a coincidence gate and their vectorial coherent summing produced at the coincidence output of the coincidence gate that is vectorially summed in opposite phase with CW radiation to produce enhanced contrast between the coincidence signal and the background signals; 
       FIG. 10E  schematically illustrates the embodiment for producing the vectorial summing illustrated by  FIG. 10D ; 
       FIG. 10F  is a schematic illustration of the output signal produced by the embodiment of  FIG. 10E ; 
       FIG. 11A  illustrates a polarization based coincidence gate combined with contrast enhancer device to increase the contrast between the coincidence signal and the background; 
       FIG. 11B  is a schematic illustration of the field vectors in various locations of the device of  FIG. 11A  shown in their corresponded time slots; 
       FIGS. 11C and 11D  shows the intensities of the signals in various locations of the device of  FIG. 11A ; 
       FIG. 12A  is a schematic illustration of an embodiment including a coincidence gate combined together with an optical threshold device to increase the contrast between the coincidence and the non-coincidence pulses; 
       FIGS. 12B and 12C  illustrate the combined transmission function of an optical amplifier and an attenuator and the transmission function of an optical amplifier alone, respectively; 
       FIGS. 12D and 12E  illustrate the signals propagating in the embodiment of  FIG. 12A  in various locations for non-coincidence and coincidence signals, respectively; 
       FIG. 12F  illustrate an ideal and practical transmission function of an optical amplifier; 
       FIG. 12G  is a schematic illustration for a modified design of the embodiment of  FIG. 12A ; 
       FIGS. 12H and 12K  illustrate the signals propagating in the embodiment of  FIG. 12G  in various locations for non-coincidence and coincidence signals, respectively; 
       FIG. 13A  is a general schematic illustration of a coincidence gate having two inputs and two outputs; 
       FIG. 13B  illustrates a coincidence gate receiving input signals from different sources; 
       FIGS. 13C ,  13 D and  13 E schematically illustrate specific design for closed loop phase control, general design for closed loop phase and clock recovery control, and closed loop phase and clock recovery control for multiple clients, respectively; 
       FIG. 13F  schematically illustrates a system for selecting a desired time delay for a coincidence gate; 
       FIG. 13G  is a schematic illustration of a system for enhancing the contrast between the coincidence signal and the background at the output of a coincidence gate; 
       FIG. 13H  schematically illustrates a system including an optical threshold device for enhancing the contrast between the coincidence signal and the background at the output of a coincidence gate; 
       FIG. 13I  is a general schematic illustration of a coincidence gate that may or may not include any combination between a coincidence gate and any other means accompanied to the gate; 
       FIG. 13J  illustrate a design for a time delay selector; 
       FIG. 14A  schematically illustrates a self demultiplexer system designed to demultiplex the input information having different symbols, into designated outputs port according to the predetermined destination encoded in the input symbols; 
       FIGS. 14B ,  14 C and  14 D illustrate exemplary internal structures of the dividing device of the self demultiplexing system of  FIG. 14A ; 
       FIGS. 15A and 15B  illustrate a device and an icon representing this device, respectively, designed for converting a single pulse into a symbol signal including pair of pulses; 
       FIG. 15C  schematically illustrates a multiplexing system for interleaving symbols signals to form a dense stream of symbols that may be arranged in form of Time Division Multiplexing (TDM); 
       FIG. 15D  is a schematic illustration of a duplicating device including circulating loop used to increase the density (rate) of the pulses; 
       FIG. 15E  is a schematic illustration of a demultiplexer designed for self demultiplexing of symbol signals such as the interleaved symbol signals produced by the multiplexer of  FIG. 15C ; 
       FIGS. 15F and 15G  schematically illustrate narrow pulse generators with and without threshold mechanism, respectively; 
       FIG. 15H  is a schematic illustration of the signals produced at different locations in the narrow pulse generators of  FIGS. 15F and 15G ; 
       FIG. 15J  schematically illustrates a multiplexer that receives optical pulses and interleaves them into high dense symbol signals including pulses that are narrower than the pulses at the input of the multiplexer; 
       FIG. 15K  schematically illustrates the foregoing multiplexer/demultiplexer combinations as a generic schematic; 
       FIG. 15L  schematically illustrates a contrast enhancer device used to increase the ratio between coincidence and non coincidence pulses in the multiplexer of  FIG. 15J ; 
       FIGS. 15M and 15N  are schematic illustration of the generic multiplexers and demultiplexers of  FIG. 15K  that may have multiple inputs and outputs and arranged in different configurations; 
       FIG. 15P  schematically illustrates a system for self demultiplexing over multiple layers; 
       FIGS. 15Q and 15R  schematically illustrate self demultiplexers with and without data control, respectively; 
       FIG. 15S  schematically illustrates a system for self n-by-m routing connection; 
       FIG. 15T  schematically illustrates a many-to-one combiner alternative to the star combiner used in  FIG. 15S ; 
       FIGS. 16A ,  16 B and  16 C schematically illustrates the construction of symbols designed for self demultiplexing/switching across multiple layers; 
       FIG. 16D  is a schematic illustration of self demultiplexing/switching system across multiple layers; 
       FIG. 16E  schematically illustrates a coincidence gate combined with electronic detectors and comparator (differential amplifier) to increase the contrast between the coincidence and the non-coincidence pulses; 
       FIG. 16F  illustrates the intensities of the signals at the coincidence and the non-coincidence outputs of the coincidence gate of  FIG. 16E  and shows the coincidence signal produced at the output of the comparator of  FIG. 16E ; 
       FIG. 16G  is a schematic illustration of the coincidence and non-coincidence signals produced at the different layers of self demultiplexing/switching system; 
       FIG. 17  schematically illustrates a self demultiplexing/switching/routing Wavelength Division Multiplexing (WDM) system including multiple layers of self Code Division Multiplexing/demultiplexing gates; 
       FIG. 18A  is a schematic illustrations of a self routing/switching/demultiplexing system made of radiation guides and includes electronic threshold devices; 
       FIG. 18B  schematically illustrates an exemplary threshold mechanism for the system of  FIG. 18A  that includes a comparator; 
       FIG. 19  schematically illustrates an optical delay line fabricated on a chip that includes optical couplers and mirror like edge surfaces; 
       FIGS. 20A and 20B  schematically illustrate the configuration of  FIG. 19  where the mirror like edge surfaces are replaced by Bragg reflector gratings; 
       FIGS. 20C and 20D  are schematic illustrations of the implementation of the delay line of  FIG. 19  in a coincidence gate with and without a phase shifter, respectively; 
       FIG. 20E  schematically illustrates a delay line fabricated on a chip that includes an open core of a loop; 
       FIGS. 21A ,  21 B,  21 C and  21 D schematically illustrate four versions of multiplexing/demultiplexing systems for symbol signals; 
       FIGS. 21E ,  21 F,  21 G and  21 J schematically illustrate symbol signals, the artifact pulses that they produce and various arrangements of guard bands between the symbols; 
       FIG. 21K  schematically illustrates narrow pulses arriving from multiple parallel channels and shows their multiplexing (interleaving) into a common channel in a form of symbol signals; 
       FIG. 21L  is a schematic illustration of a multiplexing system that performs the multiplexing illustrated by  FIG. 21K ; 
       FIGS. 22A  is a schematic illustration of a coincidence gate designed to receive symbols containing more than two pulses for enhancing the contrast between coincidence and non-coincidence signals; 
       FIGS. 22B and 22C  illustrate the signals propagating in the embodiment of  FIG. 22A  in various locations; 
       FIG. 22D  schematically illustrates a switching/routing/demultiplexing system that eliminates the need for time guard bands between the data symbols and including combined coincidence gates; 
       FIG. 22E  is a schematic illustration of an alternative design for a combined coincidence gate that may be used in the system of  FIG. 22D ; 
       FIG. 22F  schematically illustrates the symbols that are demultiplexed by the system of  FIG. 22D  and shows that the symbols do not include time guard band and are closely packed; 
       FIGS. 23A–23F  schematically illustrate the output signals at the outputs of a beam splitter for various input beams having various relative phases; 
       FIGS. 23G and 23H  illustrate the coincidence and the non-coincidence signals at the outputs of a coincidence gate for a data symbol signal encoded by time and phase modulation; 
       FIGS. 23I and 23J  illustrate multiplexing and demultiplexing systems for data symbol signals modulated by time space and relative phase between the pulses of the symbols, and 
       FIGS. 23K ,  23 L and  23 M are schematic illustrations of data symbol signals appearring at various locations of the systems illustrated by  FIGS. 23I and 23J . 
   

   DETAILED DESCRIPTION OF THE EMBODIMENTS 
     FIGS. 1A ,  1 B,  1 C and  1 D are figurative illustrations of a gate  100  that directs applied energy, for example, optical energy, based on an interaction between two sources, such as a control source and a source representing data. As discussed below, the gate  100  may permit the selective application of higher energy to an output port based on the timing and configuration of inputs by interaction of the inputs and without the requirement for a state change of the gate  100 . A discussion of various embodiments that exhibit this behavior follows the discussion of  FIGS. 1A ,  1 B,  1 C and  1 D. 
   Referring to  FIG. 1A , a gate  100  has two inputs  5  and  10  and is configured such that when compatible energy signals are received simultaneously at the inputs  5  and  10 , responsive outputs, at an output port  15 , is obtained. For example, the inputs may be optical energy pulses whose phases are aligned to constructively interfere within the gate  100  or light beams whose polarization angles are in a predetermined relationship relative to each other and to filters within the gate  100 . The gate  100  may be further configured such that if the energy received at the inputs has some other relationship (polarization angles, phase, or relative timing, for example) then a different output is obtained. The gate  100  may also, in embodiments, be configured to generate a different output signal at another output, for example output  20  where some of the energy is directed. For example, when a different relationship between the signals received at the inputs  10  and  5  exists, different signals may be output at such an additional output  20 . Although only one additional output  20  is shown, more may be provided, depending on the embodiment. 
   In  FIG. 1A , an input signal  40  includes an input symbol, represented here by a pulse  35  applied to input  5  of the gate  100 . A second input  10  receives a different input symbol, represented here by the absence of a coinciding pulse (i.e., no input signal). An output signal  60 , and where present other output signals represented by output  63 , are responsive to the input signals. Here the output signals are represented by pulses  70  and  80  generated at outputs  15  and  20 , respectively. The output signals are detected by sensors  90  and  95 . Although gate  100  has two outputs  15  and  20  from which signals  60  and  63  are emitted and detected by sensors  90  and  95 , respectively, a greater or lower number of outputs may be provided as will be clear from the discussion of specific embodiments below. 
   Referring now to  FIG. 1B , the inputs signals change. Here, a different input signal  25  is represented by a pulse  30  applied to the input  10  of the gate  100  and no signal at input  5 . A changed output signal  61  is represented by a pulse  71  generated at the output  15 . In the illustrated case, the output may be substantially the same whether there is a pulse at input  5  or at input  10 , but not coincident. Referring to  FIG. 1C , when pulses  30  and  35  are applied to both inputs  10  and  5 , respectively, a different output  62  results, which includes a pulse  72 , which is different from either pulse  70  or  71 . 
   By providing an appropriate detector, such as, detector  90 , to the gate  100 , it can be determined whether a signal was applied to either input  5  or  10  independently or to both in a certain temporal relationship. This may be determined by detecting the presence of a pulse  72  versus either pulse  70  or  71 , for example, by comparing an intensity level of the respective pulses. Thus, for example, if a receiver is configured to detect only pulses of the form  72 , a signal modulated to carry data and applied at one of the inputs  5  or  10  may be detected as such at the output  15  only when a “control signal” is applied at the other input  10  or  5  simultaneously and respectively. In this case, for example, a data signal at input  5  may be considered to be passed or blocked depending on the coincidence of a signal at input  10 . Thus, one of the inputs can be regarded as a control input and the other as a data input. In  FIG. 1C , signals  25  and  40  might be coherent and the relative phase between them might be adjusted in a way that output  20  might not emit any radiation. Note that, depending on the nature of the signals applied at ports  5  and  10 , which output is used as the output of interest may be changed. For example, the phase relationship between the input signals  25  and  40  may affect which port  15 ,  20  would be better used as a more effective one for signaling. 
     FIG. 1D  illustrates a configuration, similar to that of  FIG. 1C , except that both outputs,  15  and  20 , are used for signaling. The nature of the signals applied at ports  5  and  10  may create useful signals at both outputs  15  and  20  that may be in a form of signals  83  and  84  carried by beams  66  and  67 , respectively. For example, the relative phase between beams  25  and  40  may determine at which output port an enhanced output due to constructive interference appears. 
   Referring to  FIGS. 2A ,  2 B and  2 C, an embodiment of a device that may exhibit behavior such as gate  100  is a dielectric beam splitter  110 . In such an embodiment, the inputs are optical energy. One input  115  (the relative strengths of all inputs and outputs are represented by a complex number indicating relative peak amplitude of their electric fields E-field) is a beam incident from one angle, which results in the generation of reflected and transmitted output ports  112  and  113  with output signals  145  and  150 . The phase of the reflected output  150  is shown as  7 c/ 2  radians ahead of that of the input  115  to indicate that a relative change of phase occurs depending on the presence and phase of a second input  160 . Each output in  FIG. 2A  has an intensity of about half that of the input beam intensity due to the effect of the beam splitter  110 . The intensity is proportional to the square of the E-field. In  FIG. 2B , the input  160  includes pulse  155  whose phase is shown arbitrarily as being π/2 radians behind of that of the input  115 , produces a similar result of two output signals  165  and  170  emanating from output ports  112  and  113 , respectively. The intensities of each of these output signals is about half that of the input  160 . Each of the inputs may include respective pulses  125 ,  155  as illustrated. 
   It is assumed that the energy incident on the dielectric beam splitter  110  consists, at least substantially, of a single wavelength of light, although, as discussed below, in further embodiments, they consist of non-coherent radiation such as multiple wavelengths, propagation modes, phases or any combination of them. Where the light signals are non-coherent, the power combination effect is correspondingly different with simple power summing, rather than field summing, taking place. 
   Referring to  FIG. 2C , when inputs  175  and  180  are incident simultaneously on the dielectric beam splitter  110 , an output  197  is generated at output port  112  whose field corresponds to the sum of power of the two inputs  180  and  175 . The intensity of the pulse  190  of output  197 , being proportional to the square of the field amplitude, is thus four times the intensity of either output  145 ,  150   165 ,  170  when only one input signal  115 ,  160  is applied alone. If an incident signal  115  or  160  contains a pulse  125 ,  155 , then the amplitude of an output pulse  135 ,  140 ,  136 ,  141 , is half that of the input pulse  125 ,  155  when the latter is incident alone. If incident input signals  175  or  180  contain pulses  185 ,  195 , then the amplitude of an output pulse  190 , is twice that of either input pulse  185 ,  195  when the pulses  185 ,  195  are incident simultaneously. If the beam  197  is taken as the output, the behavior of dielectric beam splitter  110  can be seen to fall within the description of the gate  100  ( FIGS. 1A–1D ). 
   Note that the output may be taken as  145 ,  165  or  150 ,  170  as well and still fall within the description of the gate  100 , depending on the interpretation of the received signal, the relative phase between input beams  115  and  160 , and how data is represented. When using coherent energy, such as light, the energy ratio between the energy of the coincidence pulse, at the coincidence output, and the energy of the non-coincidence pulse at that output is up to four. When using non-coherent light this ratio is up to two. The differences between the above ratios is due to the fact that when using coherent light the control device (gate  100 ) acts as a field combiner while it acts as a power combiner when using non-coherent light. In addition, when using coherent radiation, the coincidence signal is produced at only one output and the non-coincidence signal is null. Thus the energy that is divided between two outputs, in a non-coincidence situation, is emitted from only one output, in a coincidence situation. 
   Note that if the phase of either input signal  175  or  180  is changed by π, the coincidence output pulse will emanate from the port  113  rather than the port  112 . This effect may be used to “direct” the coincidence pulse  190  based on a phase encoding of one or both of the input signals. As will be discussed below, this along with the selective gating effect may be used to perform a communications function as performed by a switch or multiplexer/demultiplexer. 
   Referring to  FIGS. 3A ,  3 B and  3 C, a further embodiment of a device that may exhibit behavior such as gate  100  is a metallic beam splitter  210 . In this embodiment, again, the inputs are assumed to be optical energy with the electric field represented by vectors in complex coordinates. The field magnitude is indicated by a number near the field vector. One input  215  is a beam incident from one angle, which results in the generation of reflected and transmitted outputs  245  and  250 . Some loss of energy occurs in the material of the metal film of the beam splitter so the sum of the power of the outputs  245  and  250  is about half that of the input  215 . The phase of the reflected output  250  is shown as Tc radians ahead of that of the input  215 , which is typical of reflection from a metal. Output energy  245  is transmitted by metal beam splitter  210  due to the tunneling effect and thus suffers from attenuation. The metal attenuation can be adjusted by varying the metal thickness. The type of metal and its thickness are chosen to produce 50% attenuation and 50% reflectance. In  FIG. 3B , the input  260  whose phase is shown arbitrarily as being it radians ahead of that of the input  215 , produces a similar result of two outputs  265  and  270  whose intensities are about a quarter that of the input  260 . Outputs  265 ,  270  adjusted to have the same intensity and equal to quarter of the input intensity. This adjustment is done by choosing the reflectivity of the metal to be equal to its attenuation. Each of the inputs may include respective pulses  255  and  225 , as illustrated. Again, it is assumed that the energy incident on the metallic beam splitter  210  consists, at least substantially, of a single wavelength of light, although, as discussed below, in further embodiments, they consist of non-coherent radiation that may contain multiple wavelengths, propagation modes, phases, or any combination of them. 
   Referring to  FIG. 3C , when inputs  275  and  280  are incident simultaneously on the metallic beam splitter  210 , outputs  282 ,  297  are generated whose fields are equal to that of either input  280  and  275 . The intensity of the outputs  282 ,  297  is higher by a factor of four relative to the outputs  265 ,  270 ,  245 ,  250  because no loss occurs in the metal when the phases of the incident beams  275  and  280  are in a particular relationship and coincident on the beam splitter  210  as illustrated. The loss in the metal is reduced, in coincidence, due to a free path created by the joint and overlap between the two skin-depths on both sides of the metal, which are produced simultaneously by the two beams that coincide. If incident signals  215  or  260  contain pulses  225 ,  255 , then the amplitude of any output pulse  235 ,  240 ,  267 ,  277 , is a quarter that of the input pulse  225 ,  255  when the latter is incident alone. If incident signals  275  or  280  contain pulses  285 ,  295 , then the amplitude of an output pulse  290  (or  287 ), is equal to that of either input pulse  285 ,  295  when the pulses  285 ,  295  are incident simultaneously. When using coherent light, the energy ratio between the energy of the coincidence pulse, at the coincidence output, and the energy of the non-coincidence pulse at that output is up to four as a result of field combining. When using non-coherent light this ratio is up to two as a result of power combining and no change of the loss in the metal of the beam splitter. If the beam  282  (or  297 ) is taken as the output, the behavior of metallic beam splitter  210  can be seen to fall within the description of the gate  100  ( FIGS. 1A-1D ). 
   Referring now to  FIG. 4A , a dual grating device  310  has a grating  311 , illustrated within a prism  299 . The grating has intermittent reflective  313 A surfaces. Light beams  300 A and  300 B incident from opposite sides of the grating  311  generate a diffraction pattern  300 C that, for example, is of one order when only one beam  300 A or  300 B is incident and of another when both beams  300 A and  300 B are simultaneously incident. This is because when beam  300 B is incident alone, light passes through only the gaps  313 D between grating elements  313 C and when beam  300 A is incident alone light is reflected only from the reflective surfaces  313 A. As a result, the effective grating pitch is of a certain order and substantially the same due to the identical spacing of reflective surfaces  313 A and gaps  313 D. However, when both beams  300 A and  300 B are incident, the effective grating pitch is doubled because the gaps  313 D are interleaved with the reflective surfaces  313 A. 
   Referring to  FIGS. 4B ,  4 C and  4 D, yet a further embodiment of a device that may exhibit behavior such as gate  100  ( FIG. 1 ) is a dual grating  310 . In this embodiment, again, the inputs are assumed to be optical energy. One input  309  is a beam incident from one angle, which results in the generation of reflected and transmitted outputs  307  and  305 . The resulting interference patterns  301  and  303 , may have three lobes if the wavelength of the light and the grating  311  pitch are appropriately selected. As shown in  FIG. 4C , a similar result obtains if a beam  313  is incident from another angle with transmitted and reflected interference patterns  319  and  321  being generated. Again, it is assumed that the energy incident on the dual grating device  310  consists, at least substantially, of a single wavelength of light, although, as discussed below, in further embodiments, they consist of multiple wavelengths, modes, or phases. 
   Referring to  FIG. 4D , when inputs  309  and  313  are incident simultaneously on the dual grating device  310 , an interference pattern  329  of lower order is generated. If the pitch of the grating  311  is selected appropriately as well as the phase between beams  313  and  309 , the intensity of a given part of the interference patterns  329 ,  327 , produced when both inputs  309  and  313  are incident simultaneously, may be four times greater than of interference patterns  301 ,  321 ,  303 ,  319  produced when either of beams  313  or  309  is incident alone. Illustrated is the situation for zero and first order interference patterns where the central lobe of the interference pattern exhibits this effect. If incident signals  309  and  313  contain pulses then the amplitude of a corresponding output pulse has a first magnitude when the latter is incident alone. If incident signals  309  and  313  contain pulses then the amplitude of an output pulse having four times the first magnitude when the pulses are incident simultaneously. If light from the central lobe  329 A is collected and treated as an output, then the behavior of the dual grating device  310  can be seen to fall within the description of the gate  100  ( FIGS. 1A–1D ). 
   The intensity of the lobes in interference patterns  301 ,  303 ,  319 ,  321 ,  327  and  329  are schematically illustrated and do not represent the actual relative intensity of the lobes where, actually, the side lobes are smaller than the central lobe. The transmitting gaps  313 D and the reflecting elements of surface  313 A can be broadened to convert grating  310  into transmitting and reflecting binary grating. In such a case the side lobes has half of the intensity of the central lobe. 
   When using coherent light the energy ratio between the energy of the coincidence pulse, at the coincidence output, and the energy of the non-coincidence pulse at that output is up to four as a result of the reduction of the number of lobes due to field interference. When using non-coherent light the number of lobes in the interference pattern does not change and the above ratio is up to two as may be predicted since the energies are summed. 
   Referring now to  FIG. 4E , when the relative phases of the input signals are changed by π, the interference patterns  333  and  335  corresponding to coinciding inputs  309 A and  309 B will change from a single lobe  329 A to two large lobes as indicated at  333 A and  335 A. The total energy output during coincidence and non-coincidence follows the same relationship, but the energy is divided between two lobes. With suitably located optical pickups and a combiner, for picking up the total energy in the pair of lobes, e.g.,  333 A, and one located to pick up the energy in a single lobe such as at  329 A, this effect may be used to “direct” the coincidence pulse  190  based on a phase encoding of one or both of the input signals. As will be discussed below, this along with the selective gating effect may be used to perform a communications function as performed by a switch or multiplexer/demultiplexer. 
   Referring to  FIGS. 5A ,  5 B and  5 C, an optical Y-junction  346  may also exhibit the described properties of the gate  100  of  FIGS. 1A–1D . A first input signal  340  may be applied to a first leg  343  with no coincident signal applied to the second leg  344 . An output signal  345  may have an intensity magnitude of half that of the input signal  340 . Similarly, a second input signal  342  may be applied to the second leg  344  with no coincident signal applied to the first leg  343 . In that case, again, an output signal  348  may have an intensity magnitude of half that of the input signal  342 . Note that half of the energy is lost to the second propagation mode, in the coupling region  346 A, and constitutes a loss, from the device at output  347 . When both input signals  340  and  342  are incident simultaneously and in phase, the magnitude of an output signal  350 , at output  356 , may be sum of the magnitudes of the input signals  340  and  342 . In the latter case, the energy in inputs  340  and  342  is coupled only to the first propagation mode, in junction  346 A, and all propagates through output  347 . Accordingly, when using coherent radiation, the energy of the coincidence output pulse  350  is up to four times higher than the non-coincidence pulses  345 ,  348 , depending on the relative phases of inputs  340  and  342 . When using non-coherent radiation for pulses  340 ,  342  the energy of the coincidence pulse  350  is only up to twice the energy of pulses  345 ,  348 . Vector diagrams  341 ,  339 ,  352 ,  354  and  356  are vectorial presentations of signals  340 ,  342 ,  345 ,  348  and  350 , respectively. The values accompanied to the vector diagrams indicate the field amplitudes of the vectors corresponding to the signals that they represent. 
   Referring to  FIGS. 6A ,  6 B and  6 C, yet another embodiment of a device that may exhibit behavior such as gate  100  of  FIGS. 1A–1D  is a high pitch grating  360  device with a high-pitch grating  360 A within a transparent prism  360 B. In this embodiment, the inputs  361  and  363  are, again, optical energy. One input  361  (as in the embodiment of  FIGS. 2A–2C , the relative strengths of all inputs and outputs are represented by a complex number indicating relative peak amplitude of their electric or magnetic fields) is a beam incident from one angle, which results in the generation of reflected and transmitted outputs  366  and  370  from output ports  379  and  377 , respectively. The phase of the reflected output  366  from the port  377  is shown as π radians behind that of the input  361  as should be for a reflection from a metal. Transmitting and reflecting metal grating  360 A is a zero order grating, which means that its transmitting openings are smaller than the radiation wavelength. Thus, the openings behave as a metallic waveguides near cutoff conditions and produce small attenuation and a phase shift of π/2 radians, to transmitted output  370 , relative to input  361 . Each output in  FIG. 6A  has an intensity of about half that of the input beam intensity  361  due to the effect of the grating  360 A, and the fact that the intensity is proportional to the square of the E-field. In  FIG. 6B , the input  363  whose phase is shown arbitrarily as being π/2 radians out of phase with input  361 , produces a similar result of two outputs  374  and  376  whose intensities are half that of the input  363 . Each of the inputs  361  and  363  may include respective pulses  362 ,  372  as illustrated. Again, it is assumed that the energy incident on the grating device  360  consists, at least substantially, of a single wavelength of light, although, as discussed below, in further embodiments, they consist of multiple wavelengths or other forms of non-coherent radiation. While the radiation transmitted by grating  360 A may suffer attenuation, it still can have an intensity that is equal to the intensity of radiation reflected from grating  360 A. Equalizing the intensities of reflected from and transmitted through grating  360 A can be done by selecting the reflectivity, the gap size, and the thickness of grating  360 A. 
   Note that the port from which the coincidence pulse emerges  377  or  379  can be selected based on the phase relationship of the input signals  361  and  363 . As in the embodiments of  FIGS. 2A–2C  and  FIGS. 4A–4E , when the phase difference between the input signals  361  and  363  is changed by π, the port from which the coincidence pulse emanates switches. In the further embodiments discussed below, it should be understood that the phase-selection may be obtained by suitable change in the phase of one or both inputs and it will not be specifically referred to in the attending discussion. 
   Referring to  FIG. 6C , when inputs  361  and  363  are incident simultaneously on the grating device  360 , an output  376  is generated whose field corresponds to the sum of power of the two inputs  361  and  363 . The intensity of the output  376  is thus four times the intensity of either output  366 ,  370 ,  376 ,  374  when only one input signal  361 ,  363  is applied alone. If an incident signal a pulse  362 ,  372 , then the amplitude of an output pulse  354 ,  368 ,  375 ,  380  is half that of the input pulse  361  and  363  when the latter is incident alone. If input pulses  362  and  372  are incident together, the amplitude of an output pulse  378  is twice that of either input pulse. Thus, the grating device  360  can be seen to fall within the description of the gate  100  ( FIGS. 1A–1D ). Note that the output  374  may be taken as the output and still fall within the description of the gate  100 , depending on the interpretation of the received signal and how data is represented. In the other embodiments discussed above employing gate  100  ( FIGS. 1A–1D ), grating  360 A can be used with non-coherent light to produce a coincidence signal so that its coincidence signal intensity is up to double the non-coincidence signal. 
   Referring to  FIG. 7A , an alternative structure for creating the low and high order interference patterns exhibited by the grating of device  310  of  FIGS. 4A–4D  uses an array of interleaved light guides  391  to project a diffraction pattern  383  whose order depends on the coincidence of two inputs  385  and  387 . The first input  385  directs light into one set of light guides  389 A which are established at a first spacing. The second input  387  directs light into another set of light guides  389 B which are established at the same spacing, but offset by one half that spacing from the first set and interleaved. When a light signal is applied to the first or second input  385 ,  387  a higher order interference pattern results than when both receive light signals simultaneously. The behavior of this embodiment in conformance with the description of the gate  100  is substantially as discussed with respect to the embodiment of  FIGS. 4A–4D . Phase shifter  395  and  397  ensure that the proper phase relationships exist at the grating output. Phase shifter  395  and  397  may be of various types, such as, stretchers or thermal phase-shifters. 
   Referring now also to  FIG. 7B , the light guides  389 A and  389 B may be fabricated as laminar waveguide structures  389 A and  389 B using lithographic techniques on a substrate  410  for mass production. Since, in all of the above embodiments discussed above, the maintenance of a precise phase relationship may be essential, adjustable delay portions (phase shifter) as indicated for example at  408  may be formed on the waveguide structures  389 A and  389 B which are independently controllable via control leads  406  and  402 . Various mechanisms for adjusting the index of refraction of materials suitable for waveguide structures  389 A and  389 B are known, for example, ones depending on the strength of an applied electric field or ones depending on temperature. Thus, the adjustable delay portions  408  (typ.; Note that the nomenclature “typ.” which stands for “typical,” indicates any feature that is representative of many similar features in a figure or in the text) may include appropriately treated materials and electrical contacts to permit the control of the phase (and more coarsely, the timing) of the signals such that the required interference effects are obtained. Fibers, for example as indicated at  412 , are shown connecting the waveguides to input ports  414  and  416 , however, the same function of routing may be provided by a three-dimensional lithographic techniques as well. Other optical optically-interference generating structures may be created to provide similar effects and the above set of embodiments is intended as being illustrative rather than comprehensive. All of the above drawings are figurative and features are exaggerated in scale to make the elements and their function clearer. 
   Referring now to  FIG. 8A , a polarizing beam splitter device  418  includes a polarization filter  423  that transmits and reflects incident optical inputs  419 A and  419 B. An orientation of the polarization filter  423  is indicated by arrows  423 A. As is known in the art, when an optical input  419 A or  419 B is transmitted through the polarization filter  423 , the input field of beams  419 A,  419 B is reflected in proportion to the sine of the angle between the input&#39;s  419 A or  419 B polarization and that of the filter  423 . That is, only the component of the input  419 A or  419 B polarization aligned with the filter&#39;s  423  polarization is transmitted, the remainder is reflected. In the figures that follow, an optical signal&#39;s polarization is indicated by an arrow as shown at  417  illustrated in Cartesian coordinate  429 A and  429 B, and that of the polarization filter  423  by arrows such as indicated at  423 A. 
   Further polarization filters  425  and  426 , with respective orientations  425 A and  426 A, may be used to enhance the difference between coincidence and non-coincidence outputs. That is, the outputs  428 E and  428 D may be further filtered by polarization filters  425  and  426  to produce outputs  424 A and  424 B. Two input ports I 1  and I 2  and two output ports O 1  and O 2  are defined as illustrated. As discussed below, one of the two output ports O 1  and O 2  may be used alone as a selecting blocking gate or in combination so that the polarization device can be used as an output switch. In  FIGS. 8B–8D , it is assumed that output port O 1  for purposes of discussion, but suitable orientation of the polarizations of the optical inputs generates the same behavior at the output port O 2 . In particular, the output port behavior is switched each time the polarizations of both optical inputs  419 A and  419 B are rotated by π/2. As will become clear shortly, the present embodiment is thus similar to the embodiments of  FIGS. 2A–2C ,  3 A– 3 C,  4 A– 4 E,  6 A– 6 C and  7 A,  7 B, except that polarization is used for signal attenuation/augmentation rather than energy or field summing. 
   Referring now to  FIG. 8B , an optical input  419 A with polarization  420 A is applied to polarization filter device  418  with the polarization of the optical input  419 A as indicated at  420 A. The orientation of the polarization filter  423  is the same as that of the optical input  419 A. Therefore, substantially all of the energy of the optical input  419 A is transmitted as output  428 A, with the polarization orientation, indicated at  421 A, being the same as the optical input  420 A. As indicated by the boldface numerals, the field amplitude of the optical input  419 A and output  428 A are both substantially the same and equal to 1 in arbitrary units. 
   The output  428 A, according to a further embodiment, may be filtered by polarization filter  425  with the polarization orientation indicated. The latter, as shown, forms an approximately n/4 angle with the orientation of the polarization filter  425  so that the output signal  428 A is attenuated accordingly, causing the magnitude of the output E-field  424 A to be √{square root over (2)}/2 and its orientation to be aligned with that of the filter  425  as indicated at  422 A. 
   Referring now to  FIG. 8C , an optical input  419 B with polarization  420 B is applied to polarization filter device  418  with the polarization of the optical input  419 B as indicated at  420 B. The orientation of the polarization filter  423  is perpendicular to that of the optical input  419 B. Therefore, substantially all of the energy of the optical input  419 B is reflected as output  428 B, with the polarization orientation, indicated at  421 B, being the same as the optical input  420 B. As indicated by the boldface numerals, the field amplitude of the optical input  419 B and output  428 B are both substantially the same and equal to 1 in arbitrary units. 
   As in the embodiments of  FIG. 8B , the output  428 B, according to a further embodiment, may be filtered by polarization filter  425  with the polarization orientation indicated. The latter, as shown, forms an approximately π/4 angle with the orientation of the polarization filter  425  so that the output signal  428 B is attenuated accordingly, causing the magnitude of the output E-field  424 B to be √{square root over (2)}/2 and its orientation to be aligned with that of the filter  425  as indicated at  422 B. 
   Referring now to  FIG. 8D , optical inputs  419 A and  419 B with polarizations  420 A and  420 B, respectively, are applied to polarization filter device  418  simultaneously. The polarizations of the optical inputs  419 A and  419 B are as indicated at  420 A and  420 B. The orientation of the polarization filter  423  is the same as that of the optical input  419 A and perpendicular to that of optical input  419 B. Therefore, the transmitted field of optical input  419 A is combined with the reflected optical input  419 B in the manner of the beam splitter embodiments and a combined output  428 C obtained, with the polarization orientation, indicated at  421 C, being the vector sum of those of the tow inputs  419 A and  419 B. The power of the output  428 C is the sum of the powers of the optical inputs  420 A and  420 B. Therefore, its field amplitude is equal to √{square root over (2)}, as indicated by the boldface numerals showing arbitrary units. 
   As in the embodiments of  FIGS. 8B and 8C , the output  428 C in  FIG. 8D , according to a further embodiment, may be filtered by polarization filter  425  with the polarization orientation indicated. The latter, as shown, forms an approximately zero angle with the orientation of the polarization filter  425  so that the output signal  428 C is not attenuated. Thus, the magnitude of the output E-field  424 C is √{square root over (2)} and its orientation is aligned with that of the filter  425  as indicated at  422 C. 
   As should be clear from the above discussion, an output  424 C is obtained, when inputs  419 A and  419 B are coincident, whose intensity magnitude is four times that of the output  424 A or  424 B when either input  419 A or  419 B is incident by itself. This behavior is similar to embodiments previously discussed. If light having multiple frequencies or phases (or multimode light) is used, the polarization device  418  acts as a simple power summer rather than a field summer. Thus, the power of the output will not be as great as when coherent light, suitable phase-aligned, is used. As should also be clear from the properties of the polarization filter device  418 , if the polarization angles of the inputs  419 A and  419 B are rotated by π/2 (in either direction), similar results will be obtained as above, except that instead of the outputs  428 A,  428 B and  428 C being generated at output O 1 , they will be generated at O 2 , such as illustrated by output  428 D of  FIG. 8A . 
   Using the configuration of  FIG. 8D  when polarization filter  425  is removed, resulting in a signal  424 C, at the coincidence output, that its intensity, when beams  419 A and  419 B are applied simultaneously, is only twice the intensity when only one input of inputs  419 A or  419 B is applied. 
     FIG. 8E  illustrates a directional coupler device  443 . Device  443  is constructed from a directional coupler  438  that has two input ports I 1  and I 2  indicated at  434 A and  434 C, respectively, and two output ports O 1  and O 2  indicated at  434 B and  434 D, respectively. Waveguide portions  432  (typ.) interconnect the directional coupler  438  with the ports  434 A through  434 D as illustrated. The directional coupler device  443  may be formed on a substrate  441  using lithographic techniques or manufactured in any suitable manner as a discrete component or one of many on a single optical chip, as desired. 
   The directional coupler device  443  may also be used as a gate device conforming to the description for gate  100 , as discussed with reference to Table 1, below. 
   
     
       
         
             
           
             
               TABLE 1 
             
           
          
             
                 
             
             
               Field magnitudes of inputs and outputs for directional coupler-based gate 
             
          
         
         
             
             
             
             
             
             
          
             
                 
                 
                 
                 
                 
               Q 1   
             
             
                 
               I 1   
               I 2   
               O 1   
               O 2   
               Power 
             
             
                 
                 
             
          
         
         
             
             
             
             
             
             
             
          
             
                 
               Field 
               {square root over (2)} 
               0 
               1 
               j 
               1 
             
             
                 
               Magnitude/phase 
               0 
               −{square root over (2)}j 
               1 
               −j 
               1 
             
             
                 
                 
               {square root over (2)} 
               −{square root over (2)}j 
               2 
               0 
               4 
             
             
                 
                 
               0 
               {square root over (2)} 
               j 
               1 
               1 
             
             
                 
                 
               −{square root over (2)}j 
               0 
               −j 
               1 
               1 
             
             
                 
                 
               −{square root over (2)}j 
               {square root over (2)} 
               0 
               2 
               0 
             
             
                 
                 
             
          
         
       
     
   
   When the indicated inputs I 1  and I 2  are applied in combination in a given row, the corresponding outputs O 1  and O 2  are given in the same row result. The phase relationships are relative and depend on the precise structure and materials of the directional coupler device  443 , which determine delays, coupling length, etc. As will be clear to those of skill in the relevant fields, a structure may be created to provide the above behavior or a simile. As should be immediately clear, the ratio of power at output port O 1  when the input signals are coincident is four times that when one signal arrives at a time, as indicated in Table 1. Also, if the phases of the inputs are rotated by π/2, as indicated in the last three rows, the large coincidence output is generated at port O 2  instead of port O 1 . When non-coherent radiation is used, both outputs O 1  and O 2  produce output signals, even when both inputs applied simultaneously, resulting in a coincidence output signal that its intensity is only up to twice the intensity when only one input is applied alone. 
   In general it should be understood that for all the embodiments described above ( 2 A– 2 C,  3 A– 3 C,  5 A– 5 C,  4 A– 4 E,  6 A– 6 C,  7 A– 7 B and  8 A– 8 E) in accordance to  FIGS. 1A–1D , and when using coherent radiation, the coincidence output, when the two inputs are applied simultaneously, may produce a signal that its intensity is within a range between 0 up to four times the intensity when either input is applied alone. The coincidence output signal may be adjusted, to be at any intensity value within the above described range, by the relative phase and polarization between the two input beams. For non coherent radiation the intensity of the coincidence output, when the two input beams are applied together, may be higher up to twice the intensity, at this output, when either input beam is applied alone. 
   Accordingly, it can be seen that the above described summing gates, which are all represented by gate  100  of  FIGS. 1A–1D , produce low and high level amplitude signals, at their coincidence output, corresponding to non-coincidence and coincidence states, respectively. 
   Thus the input state (coincidence or non-coincidence state) of gates  100  can be detected at their outputs by monitoring their output signal using detectors such as detectors  90  and  95  of  FIGS. 1A–1D . 
   Alternatively, the input state of gates  100  can be detected at their outputs using threshold devices. The lower and the higher level signals at the outputs of gates  100 , corresponding to non-coincidence and coincidence states at the inputs of gate  100 , can be adjusted to be below and above the threshold level of a threshold device into which these signals are fed in order to detect the input states. 
   The use of a threshold device that follows the summing gate produces an AND logic gate that its output is in logic states “1” or zero when its inputs are in coincidence or non-coincidence states, respectively. The AND gate includes two major units, a summing gate (such as the summing gates  100  described above) and a threshold device (such as described below). The combination of summing gates with threshold devices to produce AND gates, is described, in details, below. 
   Referring now to  FIGS. 9A and 9B , a symbol-selection mechanism can cause the output of a first signal level pulse when a particular spaced-pulse symbol (to be described presently) is applied to a matching gate and a second signal level pulse when the symbols is applied to a non-matching gate. To illustrate this, refer to the identical signals  450  and  452  applied to a gate  100  through inputs  458  and  456 , respectively. Each signal  450  and  452  containing a pair of pulses  450 A and  450 B and  452 A and  452 B, respectively. The time spacing between the signal pulses  450 A and  450 B is equal to Δt 2 . The same time spacing Δt 2  also separates signal pulses  452 A and  452 B. One signal  450  passes through a time delay  468  and the other does not. If the temporal spacing between the pulses matches the delay, two pulses will be coincident on the inputs  456  and  458  producing a coincidence output at port  460 . 
   In  FIG. 9A , the situation where the spacing between pulses  450 A and  450 B (which is identical to the spacing between pulses  452 A and  452 B) does not match the delay of the time delay  468 . The latter may be simply a delay line (delay guide). At output  460 , the alignment of the signals  450  and  452  is illustrated by pairs of pulses  461 A and  461 B and  462 A and  462 B, respectively, showing that neither of the pulses  461 A,  461 B,  462 A or  462 B is aligned with another pulse, in this group of pulses, due to the difference between the time space between the pulses of signals  450  and  452  and the delay time Δt 1  of delayer  468 . The output generated is simply the sum of the non-coincidence outputs of the respective input signals  450  and  452  which is shown at output  460  as a string pulses  466  of relatively low amplitude compared to the situation in  FIG. 9B , discussed next. 
   In  FIG. 9B , the situation where the spacing between pulses  450 A and  450 B (which is identical to the spacing between pulses  452 A and  452 B) matches the delay Δt 2  of the time delayer  469 . At output  460  the alignment of the signals  450  and  452  is illustrated by pairs of pulses  464 A and  464 B, and  463 A and  463 B, respectively showing that two of the pulses  463 A and  464 B are aligned due to the matching between the time space between the pulses of signals  450  and  452  and the delay time Δt 2  of delayer  469 . As a result, a sequence of pulses such as shown at  470 A,  472  and  470 B is output at the output port  460 , with the pulse  472  being a result of the coincidence of pulses  452 A and  450 B (corresponding to the coincidence between pulses  463 A and  464 B) as illustrated at output  460 . This coincidence situation corresponds to the situation illustrated in  FIG. 1C  in that pulse  472  may be substantially greater due to the augmentation due to the summing performed by gate  100 . Pulse  472  may be detected in a suitable receiver configured to, for example, register pulses of an amplitude of the coincidence pulse  472  and screen cut any smaller pulses, such as non-coincidence pulses  470 A,  470 B and  466  of  FIG. 9A . 
     FIGS. 9A and 9B  illustrate situations in which the input signals  450  and  452  may be generated by independent sources or carried on independent media (fibers, channels) from different locations. 
   Referring now also to  FIG. 9C , the separate signals  450  and  452  of  FIGS. 9A and 9B  could be derived from a single signal  430  by means of splitter  437 , such as an optical Y-junction or directional coupler. Splitter  437  generates two outputs  431 A and  431 B, each an image of the applied signal  430  and containing up to half the power of the applied signal  430 . Instead of a Y-junction or directional coupler, a beam splitter or other suitable device may be used. Signals  431 A and  431 B may be applied, as signals  450  and  452 , to delayer  468  ( 469  in case of  FIG. 9B ) and input  456  of gate  100  of  FIGS. 9A and 9B , respectively. Thus, a time delay Δt 1  or Δt 2  for delayers  469  or  468 , respectively, delays one signal  450 , which is applied to one of the input ports  458  of gate  100 . The non-delayed signal  452  is applied at the other input port  456 . If the timing of the signals is such that none of the pulses  450 A,  450 B coincides with a pulse  452 A,  452 B in gate  100 , a sequence of pulses, such as shown at sequence of pulses  466  of  FIG. 9A  is output at the output port  460 . If, however, the magnitude of a time delay  469  matches the pulse spacing Δt 2  one pulse of pulses  450 A,  450 B will coincide with a pulse of pulses  452 A,  452 B coincide in gate  100  causing a coincidence pulse  472  of  FIG. 9B  to be generated. 
   Further below it will describe in more detail how a variety of communications systems may be configured around the effect described with respect to  FIGS. 9A and 9B . For the moment, it may be helpful to review a basic switch mechanism with reference to  FIGS. 9A ,  9 B,  9 C and  9 D. First, it may be observed how the above coincidence effect may enable the high-speed demultiplexing of a signal  450 . The signal  450 , containing pulses  450 A and  450 B separated by a time difference Δt 2  is applied to a splitter  453 A, sending images of signal  450 , to a second layer of splitters that includes splitters  453 B and  453 C. Thus, images of the signal  450  are applied to all the input ports (See ports  456  and  458  in  FIGS. 9A and 9B ) of two identical gates  455 A and  455 B of the type indicated as gate  100  and described with reference to  FIG. 9A . 
   By applying the signal  450 , via splitters  453 A,  453 B and  453 C to two gates  455 A and  455 B, each with a different delay device  468  and  469 , pulses of magnitude  472  (“coincidence pulses”) will be output in output signals  460 A or  460 B only if the corresponding time delay Δt 1  or Δt 2  of respective time delay device  468  or  469  of gate  455 A or  455 B matches the delay between the pulses  450 A and  450 B. Thus, coincidence pulses will only be transmitted to the receiver  465 A and  465 B whose corresponding time delay device  468  and  469  matches the delay between the pulses  450 A and  450 B. If receivers  465 A and  465 B are configured to be unresponsive to signal levels of magnitude below a predefined threshold that is above that of non-coincidence pulses  466  of  FIG. 9A  and below that of coincidence pulse  472  of  FIG. 9B , only pulse-pairs spaced apart by a delay that matches the time delay of a corresponding time delay device  468  or  469  will produce a signal at corresponding receiver  465 A,  465 B. The number of receivers that could be distinguished is equal to any number of allowed pulse spacing according to this symbols scheme. 
   Any number of gates  100  may be added in parallel to the configuration of  FIG. 9D  as will be shown in more detailed examples below. Pulse-pairs with different time spacing between their pulses may be added to the signal  450 . Each pulse pair may correspond to a different coincidence gate having time delay device added to time delay devices  468  and  469 , each delay device being connected as illustrated to a respective gate  100 . Each gate  100  output may have a respective receiver such as receivers  465 A and  465 B. In that case, the receivers will only receive coincidence pulses if the pulse spacing of a pulse pair matches the time delay of delay device of a corresponding gate  100 . Thus, such a system acts as a demultiplexer, a two port demultipler being the configuration of  FIG. 9D , but expandable to arbitrary number of outputs. 
   Referring now to  FIG. 9E , for some configurations, when using the pulse spacing symbology, it may be preferred for the coincidence pulses of a series of symbols to occur at regular intervals. For example this may be useful for synchronization recovery in a system that receives signals from multiple transmitters each coming from different switches with different gate arrays (note the discussion of multiplexers and demultiplexers below). To ensure the coincidence pulses occur at regular intervals irrespective of the spacing, one of the pulses of every pair forming a symbol may always be placed at the last time slot and the pulse in front of it used to control the spacing. For example, pulse  124 A pairs with pulse  124 B to form a symbol. The allowed time paces (including times slots t 1 to t 6 ) are shown at  123  (typ.). Pulse  124 C and  124 D form another pair defining another symbol. Pulses  124 E and  124 F form yet another pair. In all cases, the trailing symbol  124 A,  124 D and  124 E are in time slot t 1 . This means that even though the delay may vary, the coincidence pulses occur at regular intervals (at time slots t 1 ). The figure assumes the pulses pass through a gate from left to right. It should be clear that any symbol including pair of spaced pulses may cause the coincidence gate to produce only one coincidence signal. Accordingly, each symbol includes one data pulse and one control pulse. Defining the control pulse and the data pulse within the pulse pair is arbitrary and may be arranged in any configuration. For example, the data pulse may be the first pulse and the control pulse may the second delayed pulse or vice versa. 
   Referring to  FIGS. 9F and 9G , there are various ways of forming the symbols that may allow symbol selection as discussed above. For example,  FIG. 9F  shows input symbol  473 , corresponding to input signal  450  of  FIGS. 9A and 9B , blocked data symbol  475 , corresponding to coincidence pulse  472  formed at the output of the coincidence gate of  FIG. 9B , and passed data symbol  476 , corresponding to signal  466  produced at the output of the coincidence gate of  FIG. 9A , all produced by the spaced-pulse modulation scheme discussed above. The zero-level is indicated at  479 . But the mirror image of this format, as shown in  FIG. 9G , would work equally-well. That is, notches  474  in an otherwise elevated signal level (e.g., voltage, current, intensity, etc.) rather than pulses, may be spaced apart by selected a spacing to create a zero-level  477  (or a level below some maximum threshold) signal that is registered by a receiver as representing data directed to it. Non-zero notches would be treated as artifact. Again, the zero-level is indicated at  479 . 
     FIG. 9H  illustrates another scheme for controlling the output from a coincidence gate to provide for coincidence between a single broad pulse  473 A and a series of pulses  473 B representing multiple data bits. It may be confirmed by inspection that with appropriate time delay, the broad pulse  473 A may be made to coincide with all of the series of pulses  473 B to form a series of coincidence pulses  473 C. Here the allowed time slots would have to be broad enough ensure that when passed through a gate with a time delay different from that for which the symbol ( 473 A and  473 B) was formed (not shown), the non-coincidence output indicated at  473 D is formed. 
   Referring to  FIG. 9I , note that while in the foregoing embodiments, it has been assumed that each embodiment of a gate (e.g.,  100 ) caused an interference effect that required the use of a narrow band of frequencies and a proper phase match, this is not essential. The behavior described with respect to the gate  100  with reference to  FIGS. 1A–1D  may be obtained by using light having a range of wavelengths with a non-coherent summing process providing the behavior described with reference to  FIGS. 1A–1D . That is, the identical components may be used (although the relative cost/value equation of them may be shifted somewhat) to achieve up to a 2:1 ratio between coincident and non-coincident signals rather than up to a 4:1 (or up to a 9:1 ratio in embodiments discussed further below) as where coherent summing is used.  FIG. 9I  is a figurative illustration of a signal  480  that has its power distributed over a relatively wide range of frequencies (e.g., wave packet) and a narrow-band signal  481  one in which the range is very narrow (e.g., “single” wavelength channel of a wavelength division multiplexing (WDM) optical system). Signals  480  and  481  may be produced by Light Emitting Diode (LED) and Distributed Bragg Reflector (DBR) laser, respectively. 
   Referring now to  FIG. 10A , coherent summing of narrow-band (narrow spectrum) signals preferably takes account of the relative phases of signals being added. In  FIG. 10A , one signal with a spaced-pulse symbol having pulses  483 A and  483 B is represented by  483  and a time-delayed copy (with a phase shift of −π/2 radians) of the same signal by  485 . The time delay between signal  483  and  485  is equal to the time space between pulses  483 A and  483 B. The coherent sum of signals  483  and  485  produced by gate  100 , such as gate  110  illustrated in  FIGS. 2A to 2C , is represented by  495  ( 495 A and  495 B). Each signal  483 ,  485 ,  495  is represented by a series of icons  490  positioned in their corresponding time slots t 1 –t 10  (illustrated in a complex plane), for example the one indicated at  489 , which indicates the magnitude and phase of the field at a particular time instant (either electric or magnetic).  FIG. 10B , illustrates the presentation of the field vectors. Each icon  489 C– 489 F has a vector such as indicated at  489 B, in a complex plane indicated by axes such as at  489 A. Thus, vector  489 B represents the magnitude and phase of the field, which may arbitrarily be designated as the electric field, but it does not matter since it is the relative phases of summed signals that are of concern. The first icon  489 C indicates the signal has a phase of j (with j=√{square root over (−1)} representing the imaginary axis) and a certain magnitude, which may be assumed here to be unity for convenience. The second, third, and fourth ( 489 D,  489 E and  489 F) indicate a signal of identical magnitude as  489 C, but having phases of 1, −j, and −1, respectively (a numeral alone might be added for indicating only the magnitude with no reference to the phase). 
   Referring again to  FIG. 10A , when signals  483  and  485  are summed coherently, the result is the signal  495  which has two pulses  491 A and  491 B whose field magnitudes are equal to 1/√{square root over (2)} and signal  493  whose field magnitude is equal to twice that magnitude. Thus, the signal that is output is equal as shown at  497 . The summing process represented is assumed to be modeled on the dielectric beam splitter of  FIGS. 2A–2C  where the reflected beam is rotated by π/2 radians (Phase shift) and the transmitted beam is not rotated (no phase shift). Thus, the total energy in the coincidence pulse  497 C is equal to the total energy in the applied pulses  483 A and  485 B ( 485 B is the delayed copy of pulse  483 B and is not shown) and that in the non-coincidence pulses  497 A and  497 B is half the energy in one of the applied pulses  483 A and  483 B with the phases of the output as shown. Thus, the total energy of the coincidence pulse  497 C is four times that of the non-coincidence pulses  497 A and  497 B. 
   Referring again to  FIG. 10C , a signal  501  has a non-zero base level such that the field amplitude of the pulse is three times higher than that of the background level and with opposite phase. Arbitrarily choosing the phase of the pulse in signal  501  to be zero, results in a background having a phase of π. The relative intensity of a resulting coincidence pulse  511  is nine times the intensity of the signal anywhere else. In this case, the non-coincidence pulses in the signal, at the coincidence output, have the same intensity as the constant flat background. For example, the input signal  501 , which may be applied as signal  115  (in  FIGS. 2A–2C ), has a pair of pulses, such as indicated at  499  and  499 A ( 499  typ.), at time slots t 3  and t 5 , respectively. The field magnitude of pulses  499  (typ.) is arbitrarily chosen as unity. Elsewhere, (e.g., time slot ti, t 2 , t 4 , and t 6 –t 10  , (which may be identified as a background level) the input signal  501  has a field magnitude of one-third and with a phase difference of π radians relative to the pulses  499  (typ.). 
   Input signal  503  also does not have a zero level. The field amplitude of the pulse is in opposite phase relative to the field amplitude of the background level and is three times higher. Input signal  503 , which may be applied as signal  160  (in  FIGS. 2A–2C ), is a time and phase shifted version of signal  501 , which may provided by choice of a suitable delay as discussed with reference to  FIG. 9B  and elsewhere. The phase difference between the signal  501  and  503  is −π/2 radians, which means that the pulse of signal  503  has a phase −j and the background of that signal is in a phase of +j, as illustrated by the clockwise rotation of the vectors  489 E ( FIG. 10B ). 
   Note that there are only four distinct field sums that arise in the above context:
         1. The background of signal  501  is added to the background of  503  as in time slot  1 .   2. The pulse of signal  501  is added to the background of signal  503  as in time slot  3 .   3. The pulse of signal  501  is added to a pulse of signal  503  as in time slot  5 .   4. The background of signal  501  is added to the pulse of signal  503  as in time slot  7 .
 
In general all the situations result by vectorially adding the signals in the corresponding time slots in the manner of the dielectric beam splitter of  FIGS. 2A–2C  (i.e., summing the fields of signals  501  and  503  after dividing them by √{square root over (2)} and rotating the phase of signal  503 , reflected by the beam splitter, by π/2 radians).
       

   In situation  1 , at time slot t 1 , for example, where two background levels line up, the resulting magnitude and phase of the signal output at  197  of  FIG. 2C , is obtained by adding the field magnitudes after multiplying the background field of signal  503  by j (equivalent to a phase rotation of π/2 radians) and dividing the result by √{square root over (2)} to get: 
               (       -     1   3       +     j   *     j   3         )       2       =     -       2     3             
and the energy is 2/9.
 
   In situation  2 , at time slot t 3 , adding the pulse  499  in slot t 3  to the time and phase shifted background level signal  503  in the same way gives a field magnitude of: 
               (     1   +     j   *     j   3         )       2       =       2     3           
and the corresponding energy is 2/9.
 
   In situation  3 , at time slot t 5 , a pulse  511  is generated with a magnitude that is: 
               (     1   -     j   *   j       )       2       =     2           
and the corresponding energy of the coincidence signal at the coincidence output is 2.
 
   In situation  4 , at time slot t 7 , the field amplitude is derived in a similar way to given: 
               (       -     1   3       -     j   *   j       )       2       =       2     3           
and the corresponded energy is 2/9.
 
   It can be seen that only situation  3  produces a coincidence signal with intensity of 2. All the other situations are related to the background level and are with equal intensity of 2/9. This means that the background is flat and that the energy of the coincidence pulse is nine times the intensity level of the background. 
   The output  507 B from the non-coincidence output has a zero magnitude at all points except in time slots t 3  and t 7 , where the intensity magnitude of pulse portions  513 A and  509 A, respectively, is 8/9 and the pulse field magnitudes are 
                 2   ·       2     3       ⁢   j   ⁢           ⁢   and     ⁢           -       2   ·       2     3       ⁢   j       ,         
respectively. Note that if the time shift of signal  503  is not such that any pulses line up, the resulting signal from the coincidence output and the non-coincidence output will have a flat intensity magnitude of 2/9 and serial of four pulses with intensity magnitude of 8/9, respectively. It can be seen that in any situation the sum of the energies at the outputs is equal to the sum of the energies in the inputs.
 
   The advantage of a 9:1 ratio in magnitude between pulse signal  511  corresponding to pulse portion  509  at output  507 A (at time slot t 5 ) and background level  512 , constructed by artifact pulses, such as, signal portion  513  in time slot t 3  of output  507 A should be clear from the foregoing where a gate exhibiting these properties is used as a mechanism for switching such as discussed with reference to  FIG. 9D  and elsewhere. In particular, in such a system, less precision and accuracy are required in a receiver to distinguish a transmitted coincidence data pulse  511  from the background or from a symbol  430  ( FIG. 9C ) that is not transmitted because of a failure of gate  100  to provide the perfect conditions, such as, phase and time matching needed to produce the highest coincidence signal. 
   Referring now to  FIGS. 10D and 10E , the contrast in a signal  529  from a coincidence output of a coincidence gate (e.g., any embodiments of gate  100 ) having a coincidence pulse  529 A flanked by vestigial pulses  529 B and  529 C may be enhanced by an amplification process. The signal  529  has an intensity ratio between coincidence pulse  529 A and artifact or background level  529 D (artifact including any vestigial pulses  529 B and  529 C) of 4:1. A device for providing the enhancement process is illustrated in  FIG. 10E . Here, a continuous wavelength (CW) laser source  515 , whose amplitude is adjusted to half the field amplitude of the vestigial pulses  529 B and  529 C is added to them, with a phase angle difference of π radians, by means of a summer  517 . To accomplish this, a signal from an output  461  of a gate  449  (which gate  449  may be as described with reference to gate  100 , earlier) receives a signal at a first input  457  having pulses (e.g., signal  523  of  FIG. 10D  having pulses  535  (typ.)) and a time-delayed version thereof, via time delay  469 , at port  457 A. A coincidence signal,  529 A ( FIG. 10D ), is generated at coincidence output port  461 . The summer  517  may include a reverse Y-junction waveguide, a directional coupler, a beam-splitter, or any suitable device, adjusting the phase of the signal being injected, by laser  515 , to ensure the summation is as illustrated in  FIG. 10D  and discussed presently. 
   Referring specifically to  FIGS. 10D ,  10 E and  10 F the input signal  523  has a pair of pulses  535  (typ.) which may be added to a time and phase-rotate version of itself  527 , as discussed above, to generate an output signal  529  on a coincidence output  461 . The latter signal  537  added by means of the CW laser source  515  and summer  517  results in the signal  533  being output at  519 . As may be confirmed by inspection, the resulting signal has a pulse  543  whose intensity is nine times the intensity level of the flanking artifact  541  and that of the background  539  signal. 
   The field amplitudes of the coincidence pulse and the non-coincidence pulses are 2 and 1, respectively. The signal has a zero background level. After subtracting the CW field that has magnitude of ½, the fields magnitudes of the coincidence pulse, the non-coincidence pulses, and the background level are 1.5, 0.5 and −0.5, with their corresponding intensities of 2.25, 0.25 and 0.25, respectively. 
   It can be seen that all the possible situations, excluding coincidence, are characterized by a power level of 0.25, which creates a flat background level. The coincidence pulse has an energy of 2.25 which is nine times higher than the energy of the background level. 
   Note that although in the embodiments discussed above the signals added were derived from a common source, it is clear that they may be generated from independent sources. For example, a data signal applied at one port of a gate such as gate  100  could be switched by a locally-generated control signal applied at the other port. In such a case, it may be necessary to provide timing and phase recovery (Phase Lock Loop (PLL)), topics that are discussed in more detail below to provide the above result.  FIG. 10F  shows the intensity of the output signal  521 . 
   Referring now to  FIG. 11A , a gate  459  receives signal input  551 B at gate input  457  and signal input  551 C at gate input  457 A delayed by Δt 2  after delayer  469 , which should be understood as being from a single source as discussed relative to  FIG. 9C , or from separate signal and control sources. Gate  459  is assumed to exhibit the behavior of the polarization beam splitter of  FIGS. 8A–8D , for purposes of illustration, but may be made in accord with many of the other embodiments discussed herein. A coincidence output port  461  applies an output signal  551 D to a polarization filter. When coherent summing takes place within gate  459 , the transverse polarization of the signals results in a vectorial addition of the fields such that output signal  551 D obeys the cosine law in dependence on the polarization orientation of the signals at inputs  551 B and  551 C. Output signal  551 D is then filtered by polarization filter  566  to produce final output  519 . 
   The functionality of the embodiment of  FIG. 11A  is similar to that of  FIGS. 8A–8D , as can be confirmed by reference to  FIG. 11B  which shows the polarization angles and field magnitude rather than the phase and field magnitude in a set of time slots t 1 –t 10 , but is otherwise similar to  FIGS. 10A ,  10 C and  10 D. Here, signals  551 C and  551 B correspond to the signals  554  and  556 . These are added coherently to produce signal  558 . The effect of filtering by the polarization filter  566  is illustrated at  568  and in  FIG. 11C . In signal  568 , as may be confirmed by inspection, the ratio of the power magnitude of the coincidence pulse  569  (in time slot t 5 ) is four times that of the artifact ( 571  and in time slots t 3  and t 7 ). 
   As discussed with respect to signal  533  of the embodiment of  FIG. 10D , and illustrated by signal  521  in  FIG. 10F , the ratio of coincidence pulse  573  to artifact  575  of  FIG. 11D , can be raised in signal  568  of  FIG. 11B  to up to 9:1. This is achieved by adding a constant level signal  578  (similar to signal  531  of  FIG. 10D ) received from terminal  551 E to be combined coherently with opposite phase to signal  551 D, by combiner  552 , to obtain the enhanced signal  567 . Also, as in the situation of  FIG. 10C , the constant level signal  578  can be distributed to the original signals  554  and  556  of  FIG. 11B  such that the 9:1 ratio is obtained at output signal  551 D at the point of coherent summing in the gate  459 , so that a separate step is avoided. 
   Referring now to  FIG. 12A , another refinement of the gate  100  is to use an effect, such as amplification (or limiting) processes, to reduce background and artifact in a signal to zero so that transmitted pulses (such as  521  at  FIG. 10F ) have, in principle, up to an infinite ratio of intensity to that of artifact or background level. This may be done by a cancellation device (optical threshold device) illustrated at  690 . Signal  613  from gate  614  (such as a gate  100  with a time delay and splitter as discussed above) is split into two parallel signal paths  627  and  623  by a splitter  619 . An optical Non Linear Element (NLE), such as optical amplifier  615 , amplifies signals on one of the signal paths  627  and adjusts the resulting signal on an output path  625  by means of a signal attenuator  617 . The delay of signal path  627 ,  615 ,  625 ,  617  and  629  is assumed equal to the delay of signal path  623  with a π/2 phase difference whose significance will be explained below. A summer  621  adds the signals on signal paths  629  and  623  to provide a conditioned signal output at  613 A. 
   Referring now to  FIG. 12B , the amplifier  615  and attenuator  617  of  FIG. 12A , in combination, are characterized by a gain curve  615 D exhibiting saturation when the magnitude of the signal on its input (path  627 ) goes beyond a certain level. Ideally, the gain curve is as indicated at  615 D. This can be achieved approximately because of the behavior of certain optical amplifiers, such as Erbium Doped Amplifier Fiber (EDAF), Solid-state Optical Amplifier (SOA), Linear Optical Amplifier (LOA) and Raman Amplifier, which has a gain curve  615 C as illustrated in  FIG. 12C . The gain curve  615 C has two main regions, one  560 B in which the gain is substantially constant with high-valued and another  560 A, identified as a saturation region, whose slope is substantially constant, but much shallower. The gain curve of  FIG. 12B , reduces the slopes of both gain curves by means of the attenuator  617  so that the region  560 A is made relatively horizontally flat as is the region  615 A, while the gain in region  560 B is still effective to amplify as in the region  615 B. 
     FIGS. 12D and 12E  illustrate the effect of the configuration of  FIG. 12A  at each stage when signal  613  has only artifact pulses, as illustrated at  641 , and when the signal contains a coincidence pulse, as illustrated at  647 . The signals of  FIGS. 12D and 12E  are illustrated by a scheme where a signal with a π radians phase shift is drawn upside down. In the first case, the signal  641 , which has only artifact and background, is placed on signal paths  623  and  627 . The signal  633  on path  627  is amplified by the optical amplifier. The optical amplifier saturation level is such that artifact is amplified linearly and any level above the highest anticipated artifact results in saturation. The saturation point can be higher, however, as will be clear from the following description. As a result of the gain curve characterized above, when a signal  641  containing only artifact passes through the configuration of  FIG. 12A , the incoming signal  641  is divided into duplicate copies  631  and  633  (except for energy loss in the splitting) 
   Signal  633 , propagating through path  627  is amplified, by amplifier  615  in the linear region to produce a higher-level signal  635  with additional phase shift of π/2 radians. Signal  635  is then attenuated, by attenuator  617  to produce signal  637 . The phase of signal  637  is coherently shifted by it/2 radians out of phase with respect to signal  631 , at the input of combiner  621 . Signal  637  is then added, with opposite relative phases, to signal  631 , by combiner  621 , resulting in a zero level output  639 . The phase shift of π/2 radians between beams  629  and  623 , causes subtraction when the combiner  621  is a directional coupler. For a y-junction-based combiner  621  the phase difference should be π radians. 
   When a signal  647  containing a coincidence pulse and artifact passes through the configuration of  FIG. 12A , the incoming signal  641  is divided into duplicate copies  649  and  651  (except for energy loss in the splitting) one of which is amplified, by amplifier  615 , to produce a higher-level signal  655  with additional phase shift of π/2 radians. However, in this case, as the coincidence pulse passes through, the optical amplifier saturates, thereby limiting the level of the copy of the coincidence pulse in the applied signal  651 . The output  655  is then attenuated, by attenuator  617 , and coherently added with opposite phase to the other copy  649  resulting in only partial cancellation. Only the portion of the coincidence pulse exceeding the saturation input level remains in the output signal  659  and the artifact is canceled. Amplifier  615  may not maintain the same phase shifts for both linear region  615 B and saturated region  615 A, resulting in a substantial output cancellation for the artifact pulses and enhanced output of the coincidence pulses that exceeded the saturation level of amplifier  615 . 
   The configuration of  FIG. 12A  can be simplified by removing attenuator  617  and adjusting the design of asymmetric combiner  621  to combine only a small fraction of signal  627  with signal  623  (with opposite phases). Combining only a small fraction of the signal  627  with signal  623  is equivalent to the attenuation of attenuator  617 . Thus, when using asymmetric combiner, attenuator  617  can be removed while maintaining the functionality of the configuration in  FIG. 12A . 
   To assure that the coincidence signal  647  of  FIG. 12E , at path  627 , will be able to drive amplifier  615  into a saturation state, amplifier  616  may be placed at the input to gate  614 . In such a case, the saturation level of amplifier  616  may be chosen to be much higher than the saturation level of amplifier  615 , so amplifier  614  will allow amplifier  615  to be driven into saturated state by the coincidence portion of signal  647 . 
   It should be understood that the cancellator of artifact pulses (or optical threshold device)  690  of  FIG. 12A  or its modified version of  FIG. 12G , as described below, may be located in close vicinity to coincidence gate  614  to form an optical logical AND gate. However, optical threshold, such as device  690 , may be a part of a customers&#39; end unit, connected to an optical communication network where the network includes coincidence gates  614 . In such a case the threshold device may be located far away from coincidence gate  614  and may be separated from gate  614  by multiple switching layers. 
   Referring to  FIGS. 12F and 12G , an alternative method of artifact elimination (thresholding) employs an amplifier  582 B with a gain characteristics in which output phase varies with input amplitude. Here the substantially linear region  544 B (idealized version shown at  544 F) of the gain curve with regions  544 C and  544 G may be used for both amplifying both artifact and coincidence signal. Near the “knee” of the gain curve, a region  544 G is characterized by nonlinear amplification in which the phase of the output signal in this region  544 G shifts by π radians relative to the output in the lower and linear regions of the gain curve  544 C. The phase shift that is produced in region  544 G relative to linear region  544 C depends on the relative change, in the index of refraction, between these regions and on the length of the amplifier  582 B. The flat region  544 A beyond may or may not used. 
   An attenuation  582 C may or may not be used to attenuate the energy received from amplifier  582 B depending on design characteristics of the circuit. Combining, in coupler  582 E, only a fraction of the energy received from amplifier  582 B is equivalent to attenuating this energy prior to its entrance to coupler  582 E. For example, a combiner  582 E may couple a chosen fraction of energy from the output signal of amplifier  582 B into port  582 D so that a corresponding amount, or no, attenuation may be required. The amplified signal and original signal are combined by a combiner  582 E to generate an output. 
   The result of using the amplifier  582 B is illustrated in  FIGS. 12H and 12K . The signals of  FIGS. 12H and 12K  are illustrated by a scheme where a signal with a π radians phase shift is drawn upside down. Here the input signal  546 A includes only artifact and no coincidence pulses. A portion  546 C of signal  546 A is amplified to produce signal  546 D and then combined, with the other portion  546 B of original signal  546 A having π radians out of phase with it. The amplitude range of the input signal fraction  546 A is chosen so that artifact always lies below a point at which a phase of the signal  546 E results in a cancellation as shown ( FIG. 12H ). That is, the intensity levels of the artifact pulses and the coincidence pulses are adjusted to be in the linear gain region  544 C and in the nonlinear region  544 G, respectively. The same amplitude range is also chosen such that the behavior illustrated in  FIG. 12K  is exhibited when an input signal  545 A having a coincidence pulse level is incident. Again, a portion  545 C of input signal  545 A is amplified to produce signal  545 D. The non-coincidence pulses  545 H (typ.) are combined, with their corresponding non-coincidence pulses in other portion  545 B of original signal  545 A, having it radians out of phase with them. But now, the amplification of the coincidence pulse  545 G results in a phase change relative to the lower level portions  545 H (typ.) of the same signal (which include artifact). As a result, the coincidence pulse is enhanced, as indicated at  545 F, by the summation and the artifact is canceled. To assure that the intensity of coincidence pulse  545 G will be in the non linear gain region  544 G,the embodiment of  FIG. 12G  may include an amplifier as part of the combined structure. 
   The amplifier  615  of  FIG. 12A and 582B  of  FIG. 12G  need not necessarily be different structures, as will be recognized by persons skilled in the field of optical amplifiers. They may simply be the same type of amplifier operated in different modes, one in which the saturated region may be used in which other may not. The use of the operation mode which includes the saturated region has the advantage that there is no need to accurately adjust the phase relations between the artifact and the coincidence pulses. The operation mode that does not include the saturated region  544 A has the advantage of being potentially faster and producing higher intensity of output signals  545 F. 
   Note that the amplifier  582 B may also be replaced by a material or NLE whose properties are such as to produce a phase shift that is proportional to the intensity. The latter may include an amplifier as part of the combined structure. For example, such a nonlinear property may be employed by choosing a material and signal level such that the high energy level of the coincidence pulses, produce refractive-index change that will be resulted in a phase inversion relative to the artifact pulses having lower intensity level. 
   From the observation of the transmission-function shown in  FIG. 12F  it will be observed that it is similar to that of an optical-limiter. An optical limiter is a device that has a linear (or close to linear) transmission curve, such as region  544 B, corresponding to low signal intensities, a saturated region, such as region  544 A, corresponding to high signal intensities, and a transition region, such as region  544 G. Optical limiters are usually produced from materials whose optical properties, such as, index of refraction, scattering, or absorption change under high radiation intensity and are used to limit the output intensity of the device at high intensity levels. Accordingly amplifier  582 B can be replaced, without affecting the above-described operation, by an NLE or any other limiter device that has a transmission curve similar to that shown in  FIG. 12F  In such a case the optical limiter, similar to amplifier  582 B, can be operated in the two above mentioned modes, i.e., one in which saturation region  544 A is used and the other in which it is not. 
   Referring now to  FIGS. 16E and 16F , another way to enhance coincidence pulses relative to artifact at the receiver is to use a comparator (differential amplifier)  990  to subtract the power of the coincidence signal  993 C from that of the non-coincidence signal  993 D emanating from gate  993 . Coincidence and non-coincidence signals  993 C and  993 D, respectively, are incident on respective detectors  993 A and  993 B. The detectors  993 A and  993 B are insensitive to the phase of the E-field and convert the energy of optical signals to electrical signals and the result is applied to the different inputs  990 A and  990 B of a comparator  990 . Signals  993 C and  993 D are illustrated by a scheme where E-fields with π radians phase shift are drawn upside down. At the output  990 C of the comparator  990 , the coincidence pulse remains but the non-coincidence, or artifact, pulses are canceled as shown with reference to  FIGS. 16E and 16F . It will be recalled that when a signal is incident alone on a gate  993 , such as gate  100  of  FIGS. 1A–1D , the power profiles include only artifact pulses and no signal will be produced at output  990 C of comparator  990 . Exemplary signals are shown at gate  993  outputs  991 A and  992 A of  FIG. 16F  with a coincidence pulse  991 C and artifact pulses  991 B (typ.) emanating from the coincidence output  991 A and only artifact pulses  992 B (typ.) emanating from the non-coincidence output  992 A. The signals at outputs  991 A and  992 A are illustrated by their intensity with no indication to the phase of their electrical field, in a way similar to the way that they are detected by detectors  993 A and  993 B of  FIG. 16E . It may be confirmed by inspection that when the corresponding electrical signals are applied to the inputs of a comparator  990  of  FIG. 16E , with suitable synchronization, that the electrical signal portions corresponding to the non-coincidence pulses  991 B (typ.) and  992 B (typ.) will align and cancel but that the electrical signal portions corresponding to the coincidence pulse  991 C will not. Thus, the output of the comparator  990  will be as indicated figuratively at  994 . 
   It should be understood that detectors  993 A and  993 B and comparator (differential amplifier)  990  may be located in close vicinity to coincidence gate  993  to form a logical AND gate. However, detectors  993 A and  993 B and comparator  990  may be part of a customers&#39; end unit, connected to an optical communication network where the network includes coincidence gates  993 . In such a case detectors  993 A and  993 B and comparator  990  may be located far away from coincidence gate  993  and may be separated from gate  993  by multiple switching layers. 
   Referring now to  FIGS. 22A and 22B , another mechanism for enhancing the ratio of coincidence signals to artifact is to provide a trailing pulse that coincides only with the coincidence pulse, thereby enhancing it further relative to the artifact, but producing artifact that still has the same maximum level. In  FIG. 22B , a first pulse-pair  1142  defines a symbol by which a coincidence pulse can be generated by a first summation using a gate  1125  indicated in  FIG. 22A . A third pulse  1141 A coincides with the coincidence pulse, produced by gate  1125 , in a second summation that occurs in a following gate  1126  ( FIG. 22A ) after the first summation (as provided by a delay line  1123  of Δt 2 , shown in  FIG. 22A ), which produces the coincidence gain, thereby enhancing the first coincidence pulse produced by the first gate  1125 . The second summation can be the summing of the output of a first summation with a signal proportional to the original signal (i.e., a duplication of it). 
   Referring to  FIGS. 22A and 22C , first, an original signal  1130  is applied at an input of a first Y-junction  1129 A which splits approximately ⅓ of the input energy into a first branch  1123  sending ⅔ into an input of a second Y-junction  1129 B which forms part of a gate with second and third delay branches  1121  and  1122 . The difference (Δt 1 ) between the delays of the second and third delay branches  1121  and  1122  causes a coincidence pulse at an output of a first reverse Y-junction  1125  if that difference matches the delay between the two pulses defining the symbol  1142 . Copy  1131  of signal  1130  is delayed at branch  1121  by a time difference of Δt 1  compared to signal  1130  of branch  1122 . Signal  1132  show the output at Y-junction  1125  after experiencing second and third delay branches, having a time delay difference of At,. Signal  1132 , now flowing into reverse Yjunction  1126 , is summed with the signal of branch  1123 , which experienced a Δt 2  delay. Copy  1133  of signal  1130  is delayed at branch  1123  by a time difference of Δt 2  compared to signal  1130  of branch  1122 . Signal  1133  has a delay that causes the duplicate of the pulse  1141 A in the original signal delayed to sum with the coincidence pulse  1136  of coincidence signal  1132  in second Y-junction  1126 . The output at  1126  is shown at  1134  and is the result of summing signal  1133  (delayed original signal) with the output at  1125  creating a larger coincidence pulse  1137  in the final output  1134 . An enhancement device  1127  of  FIG. 22A  like that shown and described, for example with reference to  FIGS. 10D and 10E , may further enhance the coincidence pulse. The enhancement may be provided by any number of enhancement pulses in similar branches with corresponding delays as indicated at  1124  with the ellipses shown. 
   It may be observed by inspection that suitable delays need to be incorporated after each symbol including its enhancement pulse to prevent inter-symbol interference. This may be necessary also to prevent undesired interaction in other gates used in the same system (not shown). The precise length of the required guard band will depend on the modulation scheme employed. 
   Note that junctions  1129 A and  1129 B may be combined into a single star junction and gates  1125  and  1126  can be implemented as a single combiner, the particulars of the embodiment of  FIG. 22A  having been chosen for illustration purposes. 
   Each branch  1124  (typ.) in the device of  FIG. 22A  forms a coincidence gate with another branch  1124  (typ.) and has its specific enhancement pulse. Accordingly the device of  FIG. 22A  may represent a combined coincidence gate including multiple coincidence gates connected in parallel. Such a combined coincidence gate responds, to form main coincidence signal, only for a specific symbol constructed by specific spaces between its pulses that match the specific combined gate and represent a specific address (predetermined destination). Such a symbol includes multiple pulses with a number of pulses greater than two. The main coincidence signal is the coincidence pulse with the highest intensity that exists in the system for a specific symbol. Due to inter-symbol coincidence events, some other coincidence signals may be produced in any gate. Still, the main coincidence pulse is the pulse with the highest intensity produced in the system. This highest level main coincidence occurs only at a specific gate that matches the time delays between the pulses of a specific address of a specific symbol. 
   It should be clear that the symbols that include multiple enhancement pulses may be used as multiple control pulses. In such a case the address (destination) of the symbol is determined by the specific time spaces between the multiple control pulses and the data pulse in the symbol. The enhanced coincidence pulse, discussed above, is in this case a main coincidence pulse, produced by a specific combined gate that responds to this specific symbol. 
   The combined coincidence gate may be constructed from parallel multiple gates, each responding to a different time space between the pulses of the symbol. Each parallel coincidence gate that constructs the combined gate, may be identified by any number, greater than two, of delay branches  1124  (typ.) of  FIG. 22A . For example, the shortest delay branch may be a common branch for all the parallel gates. In this specific example, the branch with the shortest delay together with any number (including 1) of parallel branches  1124  (typ.) may represent one parallel gate. The data pulse and the control pulses in the symbol can be identified arbitrarily. 
   From  FIG. 22C  it can be seen that when no threshold mechanism is used, the combined coincidence gate may produce artifact pulses (non-coincidence or non-main coincidence pulses) that may interfere with the pulses of the next following symbol to produce unwanted coincidence pulses. To avoid the creation of unwanted coincidence pulses, a time guard band should be maintained between the data symbol signals. The use of such guard bands reduces the efficiency of the information transmission. 
     FIGS. 22D ,  22 E and  22 F illustrate a demultiplexing system that eliminates the need for time guard bands, the closely packed data symbols, and the combined coincidence gates used to demultiplex the complex multiple pulse symbols. 
   Referring to  FIGS. 22D and 22F ,  FIG. 22D  illustrates a demultiplexing system  3000  designed to receive and demultiplex signals of data symbols  3040 , illustrated by  FIG. 22F , arranged within time frames  3046  (typ.) The use of demultiplexing system  3000  eliminates the need for guard bands between the symbols. Demultiplexing system  3000  of  FIG. 22D  including multiple combined coincidence gates  3024 A– 3024 N constructed by a combination of parallel and series connections between discrete coincidence gates  3012 A– 3012 N,  3014 A– 3014 N and  3020 A– 3020 N, respectively. It can be seen that coincidence gates  3012 A and  3014 A are connected in parallel and each of them is connected in series to coincidence gate  3020 A. 
   Signal  3040  of  FIG. 22F  is received at input  3002  of system  3000  of  FIG. 22D . Dividing device  3004  splits signal  3040  and simultaneously emit copies of signal  3040  into ports  3006 A– 3006 N. Ports  3006 A– 3006 N are also the inputs of combined coincidence gates  3024 A- 3024 N having respective output ports  3022 A– 3022 N. 
   Referring momentarily to  FIG. 22F , illustrating signal  3040  constructed by time-frame pulses  3042  (typ.) (shown with diagonal hatch filling) and information pulses  3044  (typ.) (shown with clear filling). Time frames  3046  (typ.) includes time slots  3050  (typ.) and are constructed, for example, by the space between pulses  3042 A (typ.) and  3042 B (typ.). Information pulses  3044  (typ.), located within frames  3046  (typ.) between pulses  3042 A (typ.) and  3042 B (typ.), are spaced apart by an integral number of timeslots  3050  (typ.). 
   Each pulse  3042  of time frames  3046  has double duty to serve both, as a reference pulse for the currently demultiplexed time frame  3046  and as a control pulse for the next following time frame  3046 . Signal  3040  propagates in the direction shown by arrow  3048  thus, delayed pulses  3042 A and leading pulses  3042 B (ahead in time) may serve as the reference and the control pulses for the currently demultiplexed time frame  3046 , respectively. Pulses  3042 A may also serve as the reference pulses for the leading information pulses  3044  to create data symbols formed by the time delays Δt 1 –Δt n  between pulses  3044  and  3042 A. Delays Δt 1 –Δt 1  are equal to the delays of coincidence gates  3012 A– 3012 N in combined coincidence gates  3024 A– 3024 N, respectively. The time delay Δt F  between pulses  3042 A and  3042 B of frames  3046  is equal to the time delay of gates  3014 A– 3014 N of combined gates  3024 A– 3024 N, respectively. All frames  3046  are closely packed and do not include time guard bands between them. 
   Referring now back to combined gate  3024 A of system  3000  of  FIG. 22D . The analysis for gate  3024 A represents the process occurring in all combined gates  3024 A– 3024 N, and thus only gate  3024 A will be discussed without repeating the analysis for the rest of the combined gates. The copy of signals  3040  at inputs  3006 A of combined gate  3024 A is copied again, by radiation guides  3008 A and  3010 B, into coincidence gates  3012 A and  3014 A, respectively. Gate  3014 A produces a coincidence signal related to frame pulses  3042  (typ.) every time period equal to delay Δt F . Gate  3012 A produces a coincidence signal only where the time space between information pulse  3044  (typ.) and reference pulse  3042 A is equal to Δt 1 . The coincidence signals from gates  3012 A and  3014 A are feed into the inputs of coincidence gate  3020 A that produces output signal at output port  3022 A of combined gate  3024 A only if the coincidence signals from gates  3012 A and  3014 A arrive to gate  3020 A with a delay equal to delay SA of gate  3020 A. 
   Note that if the total length of the optical path through guides  3008 A, gate  3012 A and guide  3016 A matches the total length of the optical path through guides  3010 A, gate  3014 A and guide  3018 A, then delay S A  of gate  3020 A may be equal to zero. Assuming, without any limitation, that S A =0. In such a case, for producing coincidence signal at output port  3022 A, the coincidence signals of gates  3012 A and  3014 A should occur simultaneously. Simultaneous coincidence at gates  3012 A and  3014 A can occur only with information pulses  3044  (typ.) related to the currently demultiplexed time frame  3046 . Information pulses  3044  related to adjacent time frames  3046  are delayed from reference pulses  3042 A by a time space that is greater than the largest delay Δt F  in system  3000  and thus can not produce a coincidence pulse in gate  3012 A at the same time gate  3014 A produces a coincidence. 
   Accordingly, similar to the discrete coincidence gates in the demultiplexing systems of  FIGS. 14A–14D  discussed below, combined gate  3024 A produces output signals only for symbols having a time delay equal to its time delay Δt 1 . However, unlike the system of  FIGS. 14A–14D , demultiplexing system  3000  prevents any unwanted coincidence signals between the pulses of different time frames even where there is no time guard band between time frames  3046 . 
     FIG. 22E  illustrates coincidence gate  3024 M having alternative structure to the structure of combined gates  3024 A– 3024 N. In combined coincidence gate  3024 M of  FIG. 22E , gates  3012 M and  3014 M are connected in parallel and both of them are connected in series to gate  3020 M. Combined gate  3024 M may produce results similar to combined gates  3024 A– 3024 N whenever delay Δt X  of gate  3020 M is adjusted to be equal to the relative delay caused by the different lengths of the optical paths from port  3006 M to port  3022 M, via gates  3012 M and  3014 M, respectively. Gates  3012 A,  3014 A and  3020 A of  FIG. 22D  have similar functionality as gates  3012 M,  3014 M and  3020 M, respectively. 
   It should be understood that coincidence gates  3012 A– 3012 N,  3014 A– 3014 N,  3020 A– 3020 N,  30012 M,  3014 M and  3020 M are all of the various types of coincidence gates  101  of  FIG. 13I  discussed below, For example they may or may not have a threshold mechanism or may have electrical or optical threshold devices. In a situation where gates  3012 A– 3012 N,  3014 A– 3014 N,  3020 A– 3020 N,  30012 M,  3014 M and  3020 M have no threshold mechanism, the information demultiplexed to designated ports  3024 A– 3024 N is identified by main coincidence signal. The main coincidence signal is the signal with highest intensity in the system. Other coincidence signals may exist either in the same designated gate in which the main coincidence signal is produced or in any other gates of system  3000 , but these have lower intensity than the main coincidence signal. 
   It should also be understood that all the discrete coincidence gates of the demultiplexing system related to the present invention such as the demultiplexing system of  FIGS. 14A–14D  and  15 K– 15 R including the cross-connection box of  FIG. 15S  may be replaced by combined coincidence gates, such as the combined coincidence gates illustrated by  FIGS. 22D and 22E . Such combined coincidence gates may include any combination of parallel and series connections between discrete coincidence gates. 
   Note that the data symbol signals for the combined coincidence gates of system  3000  include time-frame pulses  3042 A (typ.) and  3042 B (typ.) and information pulses  3044  (typ.) thus is constructed by more than two pulses. The number of pulses that may be used in the data symbol signals increases with the number of discrete coincidence gates used to construct the combined coincidence gate that uniquely decodes the data symbol signals. 
   A variety of embodiments of a gate  100  were discussed previously and will be summarized presently along with some others. As shown in  FIG. 13A , a gate mechanism  605  which may be any device that accepts input signals at input ports  6 O 1 ,  603  and generates output signals at output ports  606 ,  608  such that at least one of the output signals is responsive to an interaction between the input signals and preferably without requiring a change of state of gate mechanism  605 . The input signals A and B may come from a variety of sources and the output signals C and D may be conditioned in a variety of ways to achieve one or more final outputs. As will become clear from the detailed description below gate,  100  may be used as a decoding device as well. 
   For example, referring to  FIG. 13B , the inputs A and B may be from independent sources such as an incoming information signal  607  from a remote sender (not shown) and a local external signal from a local controller  604 . In such a case, a synchronization and phase recovery control loop may be incorporated in the configuration as shown in  FIG. 13B . Various processes for synchronization and phase recovery are discussed in the following sections. 
   Referring now to  FIG. 13C , a portion  604 G of the output signal  604 E from output  608  (designated C) of gate  605  of  FIG. 13A  is coupled out, by coupler  604 F, and is sent to a detector  604 A. Detector  604 A generates an electrical signal to be transmitted, via electrical lead  604 D, to controller  604 . Controller  604  drives actuator  604 B via electrical lead  6041 . Controller  604  and actuator  604 B drive a wedge prism  604 C. The movement of wedge prism  604 C in the directions indicated by arrows  604 J changes the optical path of signal  604 H to control its phase. The movement of prism  604 C changes the phase of the input signal  604 H applied to one of the input ports  601  or  603  (designated A or B, respectively) of gate  605  of  FIG. 13A  to change the relative phases of the signals incident on ports  601  and  603 . This function of phase-alignment may be accomplished by various means, here figuratively illustrated by a wedge of material  604 C with a different index of refraction from upstream or downstream media. The detector outputs the same or another signal at electrical lead  604 D for synchronization recovery which is applied to the controller  604  to synchronize the output of the local signal with that of the incoming signal. The signal at lead  604 D may be one that is responsive to the precise coincidence of aligned pulses. Controller  604  controls stage  604 B that moves wedge prism  604 C along arrows  604 J. The movement of wedge prism  604 C in the directions  604 J changes the optical path of signal  604 H to control its phase. The described construction is a closed-loop scheme that maintains the synchronization of the local signal and the incoming signal over time. 
   The mechanical phase-shifting technique described with reference to  FIG. 13C  may be replaced by any suitable mechanism. Referring now to  FIG. 13D , a controller  724  sends an actuation signal to a phase shifter  720 , essentially any kind of transmission component that changes its delay of transmission by a phase angle according to the applied signal. The signal may be a feedback control based on a signal from a sensor device  730 . One example of a sensor device  730  is illustrated. A client device  725 , receives signal energy phase-shifted by the phase shifter  720 . The client device  725  may be, for example, a gate. A beam splitter  722  captures some of the energy output by the client device  725  and applies this sample signal  727  to a detector  723 . The detector  723  generates an electrical signal indicating the intensity of the sample signal  727  for example by time-integrating the signal and outputting an average or RMS power level indication thereof or by detecting and latching a peak intensity or by any suitable means. The signal generated by detector  723  is transmitted via electrical lead  727 A to controller  724 . The phase shifter is driven by controller  724  according to the signal produced by detector  723 . The phase shifter may include various means for changing phase such as by means of an electric field or thermal effect or a mechanical mechanism  604 B/ 604 C as discussed with reference to  FIG. 13C . A piece of material whose index of refraction changes with applied electric field or temperature may be activated by a device that applies an electric field or a heater. Alternatively, different delay lines may be electronically switched in and out of a signal path to generate a cumulative selected delay. 
   The client output signal  719  emerging from the beam splitter  722  is used in a system requiring the phase compensation provided by the phase shifter  720 . Alternatively, the whole control apparatus of  FIG. 13D  may be used to generate a control signal for a series of clients in which the client  725  is a model. 
   Referring now to  FIG. 13E , a recovery vice  728  encapsulates the functionality of sensing the signal phase alignment, for example,  722 ,  723  and  724  of the embodiment of  FIG. 13D . A phase shifter  729  may correct the phase angle for all recipient clients  731 A- 731 C connected to a distributor  742  and a model client  731 Q. Alternatively, phase shifters (not shown) internal to each of the clients  731 Q and  731 A– 731 C may be controlled instead, depending on the type of device that is used for the clients. The model client  731 Q has properties as recipient clients  731 A– 731 C and therefore the correction for client  731 Q would be therefore correct for clients  731 A– 731 C. For example,  731 A– 731 C and  731 Q may be of the same materials and maintained at identical environmental conditions. The properties of  731 Q need not be identical to those of  731 A– 731 C, but the compensation may bederived from the changes in the phase required to compensate  731 Q. For example, if each client has a gate with a delayed input and a non-delayed input, the delays of each gate may need to be compensated differently and therefore the correction may need to be applied to a phase shifter (not shown) internal to each gate. 
   An example of a client, e.g.  731 A, is a gate  101  as described below with reference to  FIG. 13I , which may have a gate  100  with a particular delay. As will become clear from the detailed description below gate  101  may be used as decoding device as well. 
   The process of synchronization and phase recovery may be reserved to a regular calibration process that is done at intervals sufficient to ensure the phase and synchronization remain proper. It is assumed that the processes upstream of the ports  601  and  603  of  FIG. 13A  (or any ports of gates described anywhere in the instant specification in which coherent summing takes place) are synchronized with a system such as the system of  FIG. 13D  by this process and they only fall out of synch and phase alignment due to slow drift processes. Thus, the above method is not suggested as being suitable for the instantaneous recovery of phase and timing alignment of asynchronous signals. 
   Referring to  FIG. 13F , the inputs A and B may also come from a single source  607  that has been split by a splitter  602  with one input A having a different time-delay from the other B. As indicated, a selector device  600 A may be provided to choose among multiple time delay components  600 B,  600 C and  600 D to allow automatic selection of the time delay. The time-delays selection may be performed remotely. A time-delay selector is schematically illustrated and described below by  FIG. 13J . 
     FIG. 13J  is a schematic illustration of a configuration for a time-delay selector  700 , which may be used, for example, for selector device  600 A of  FIG. 13F . Selector  700  includes m subunits  702  (typ.), each of which includes n delay lines  704  having respective delays. An input signal  708  is directed to a controllable mirror  706 , such as controlled by a MEMS switch, which may be controlled locally or remotely. Mirror  706  directs a reflected signal  710  to one of delay-lines  704  of a first subunit  702 A which relays it to mirror  714 , which is also controlled. Mirror  714  reflects the signal to mirror  716 , from which further redirects the signal into another subunit  702 B and the process is repeated with mirror  716  directing the signal through a selected delay and mirror  718  relaying to another subunit  702 C and so on. Each subunit  702  provides n different delays. With m subunits  702 , each having n delays, selector  700  may select n m  delays for a final output  717 . Of course, although each subunit  702  is shown with n delays, it is possible for each to have a different number of delays. Note that the most effective use of the structure  700  is to have one of the subunits  702 , for example the first subunit  702 A, provide course delays, with each successive subunit  702 B, etc., providing successively finer levels of delay. 
   Referring to  FIG. 13G , signals C, D from one or both of the outputs, such as of  FIG. 13A , individually or together, may be conditioned by a process to enhance the distinctiveness of information symbols relative to artifact. For example, one or both outputs may be combined coherently with a signal from a CW laser  611  via a summer  609  to generate a conditioned output  614 A. 
   Referring to  FIG. 13H , the output signals C and D may also be conditioned to eliminate artifact entirely by the process described with reference to  FIGS. 12A–12K . That is, one or both outputs, together or independently, may be applied to such a filter as described with reference to  FIGS. 12A–12K , illustrated symbolically at  583 A to yield a filtered signal  583 B. 
   Referring to  FIG. 13I , to facilitate the discussion of the application of such embodiments, given that a variety of embodiments may all be employed in each application, an iconic representation of a gate  101  may be used in the remainder of the instant specification to identify variations of such gates that may be used as coincidence gates and decoding devices. The iconic representation of a gate  101  (or hereafter, simply “gate”) has two inputs  614  and  616  which may correspond to any of the inputs A, B,  601 ,  603 ,  604  or  607  represented above in  FIGS. 13A–H  or others and two outputs  610  and  612 , which may represent either of the outputs  606 ,  608 , C, D,  614 A or  583 B in  FIGS. 13A–13H  or others. A symbol-selection symbol S n  indicated by  101 A may be placed on the face of the gate  101  to identify a characteristic that selects for output at a predetermined output only one of multiple symbols. For example, it may represent one of a set of time delays of respective time delay devices such as one of  600 B,  600 C, or  600 D ( FIG. 13F ). In that case, the gate  101  may be taken to represent one with a single input that is split with one being subject to a time delay to make a symbol selector as discussed with reference to  FIG. 9B . The label S, indicates the symbol that selects the channel, for example, using modulation based on polarization, phase, time delay Δt n  etc. or a combination thereof. 
   It should be understood that gate  101  may represent any combination of coincidence gate  100  with or without its accompanied means described elsewhere according to the present invention. Such a combination may include coincidence gate  100  with more than one accompanied means. For example, gate  101  may include gate  100  with or without optical threshold device, contrast enhancers of various types used to enhance to increase the ratio between coincidence and non-coincidence signals or background, variable time delays, closed loop phase controls, closed loop clock recovery control, and other means described according to the present invention. 
   It should be noted that the inputs of gate  101 , input  614  and input  616  are also schematically designated as lettered circles A and B. The outputs of gate  101 , output  610  and output  612  are also schematically designated as lettered circles C and D. This notation shall be used throughout the various illustrations. 
   Referring to  FIG. 14A , gate  101  may be applied in a variety of communications systems, a simple one of which may employ a demultiplexer (encoder)  640 .  FIG. 14A  illustrates the use of coincidence gate (or gate)  101  as a decoding device for decoding encoded data symbols  638 A (typ.) in multiplexing system  640 . It should be understood that in every demultiplexing system according to the present invention coincidence gates (or gates)  100  and  101  may represent decoding devices as well. An input signal line  638  (designated B) carries a signal  638 A (typ.) with a mix of symbols such as spaced-pulse symbols as illustrated. Signal  638 A is distributed among N gates  622  (typ.), by dividing device  644 , with different characterizations S, (e.g. time delay) selectors (not shown explicitly) therewithin, for example time delay Δt n  symbol selectors as indicated. The signal is modified by the action of the respective gates  622 A,  622 B,  622 C and  622 D. The resulting respective signals illustrated at  624 A,  624 B,  624 C and  624 D each include a coincidence symbol, in this case a pulse  626 A,  626 B,  626 C,  626 D, only for symbols corresponding to the symbol the respective gate  622 A,  622 B,  622 C and  622 D is configured to select. The signals  624 A,  624 B,  624 C and  624 D include at least one coincidence pulse,  626 A,  626 B,  626 C and  626 D and artifact, for example as indicated at  628 . However and without limitations, signals  638 A and gates  622 A– 622 D may be selected in a way that results with no coincident signals. Note that the artifact  628  (typ.) may or may not be present depending on the configuration of the gates  622 A,  622 B,  622 C and  622 D. For example, a gate that is incorporated with the device, shown in  FIG. 13H , designed to optically cancel the artifact pulses will not produce artifact pulses such as pulses  628 . Each signal  624 A,  624 B,  624 C and  624 D is sent to a respective destination D 1 , D 2 , D 3  and D N . The destinations may include receivers (not shown) that are selectively responsive only to the high intensity coincidence symbols  626 A,  626 B,  626 C and  626 D. As a result, in effect, only the coincidence symbols are received by the receivers and the data is, by definition, demultiplexed by this scheme. 
   It will be observed that the system may be configured such that the spacing of the coincidence symbols  626 A,  626 B,  626 C and  626 D is higher than the spacing of symbols in the signal  638 A, not only by virtue of having been stripped of the pulse-spacing symbology, but, more importantly, as a result of reduction in the duty cycle (and therefore, the data rate) of each channel  642  (typ.) and therefore a reduction in the duty cycle of each receiver. As a result, if the spacing of symbols in the signals  638 A is too low for any receiver to handle, for example, a receiver with an optical to electrical signal conversion process that includes transfer to storage, the incoming signal  638 A will be divided among multiple parallel signals  624 A– 624 D, providing a slower symbol rate in each than the combined signal  638 A allowing the receiving processes to occur in parallel. Note that the signal  638 A may necessarily lose intensity as a result of being divided among multiple channels and this may be compensated for by inclusion of an optical amplifier, in input B (not shown), without changing the operation of the device. 
   It should be clear that system  640  is a self demultiplexer that demultiplexes the information pulses in the symbols of input signal  638 A. Each symbol of signal  638 A includes an information (data) pulse and a control pulse. The self demultiplexing of the information in the symbols of signal  638 A is performed by producing a coincidence pulse in a specific designated port (destinations D 1 –D N ) that is responsive only to a specific predetermined destination encoded in the input symbols constructed by selecting the time space between the information (data) pulse and the control pulse. 
   Divider device  644  may represent any means for distributing the input signal from one input into multiple ports. Device  644  may be, for example, a star splitter/coupler, a cascade of one-to-two spliters/couplers, a cascade of one-to-many splitters, a loop having multiple ports, and a combination between all the means above. 
     FIGS. 14B ,  14 C and  14 D illustrate the system of  FIG. 14A  when showing, for example, several of the interior optional structures of divider  644 .  FIG. 14B  shows, for example, device  644  that is constructed from a star splitter  641 A including ports  622 E– 622 H.  FIG. 14C  illustrates, for example, device  644  that is constructed from a cascade of one-to-two splitters  6411 B,  641 C and  641 D having ports  6221 – 622 N. One-to-many splitters  641 B,  641 C and  641 D of  FIG. 14C  may be of the type of star splitters, directional couplers, or Y-junctions.  FIG. 14D  illustrates, for example, device  644  that is constructed from loop  644 A including multiple splitting ports  6220 – 622 R. 
   It should be clear that while some of the splitters in  FIGS. 14B ,  14 C and  14 D are illustrated as one-to-two splitters, they may represent one-to-many splitters as well. 
   Referring now to  FIG. 15A , a simple mechanism for creating time pair symbols  820  with different time separations is to provide two parallel delays  816  and  817  to which a single data pulse  812  is applied. The difference between the time delays of delays  816  and  817 , here illustrated as fiber loops, determines the pulse spacing of the resulting symbol  820 . Referring to  FIG. 15B , a parallel delay device as illustrated in  FIG. 15A  may be represented by an iconic representation of a symbolizer  818 , which may have an indicator representing a unique symbol, such as a unique magnitude of the pulse spacing produced. A signal  819  passing through the symbolizer  818 , characterized by a delay Δt n , is converted into, or attached to, a symbol resulting in a labeled symbol  821 , for example a pulse-pair, spaced by a delay Δt 1 , as illustrated. In some embodiments, a symbolizer is also referred to as a duplicator. 
   Referring now to  FIG. 15C , a multiplexer  800  places the signals from six separate data channels onto a single data channel that may be in form of Time Division Multiplexing (TDM) in which each TDM channel is “labeled” with a different symbol. Thus, a demultiplexer such as  640  in  FIG. 14A  may be used to distribute the multiplexed signal among six parallel channels each receiving and processing data at a lower rate. A mode locked laser  803 A is used as a source of narrow pulses. It is characteristic of mode locked lasers that they produce outputs of narrow pulses with relatively long delays as illustrated by signal  804  at the output of laser  803 A. The mode locked laser  803 A output is distributed by a splitter  808  to six channels  808 A (typ.), each with a respective time delay as indicated at  805  (typ.). A modulator  806  (typ.) on each channel  808 A (typ.) determines whether a pulse is passed on that channel or not in response to a control signal from a respective data source  801  (typ.), such as sources S 1 –S 6 . A respective symbol is applied to the signal on each channel  808 A (typ.) by a respective symbolizer (duplicator)  818 A (typ.). The resulting output signal  807  is illustrated at output  809  and may include a highly dense series of pulses in a form of numerous symbol signals that may be distributed in a form of TDM. The duplicator  803 D represents an arbitrary number of duplicators connected in series, parallel, or any combination of serial and parallel connections and having suitable delays. The symbolizers included in and represented by symbolizer  803 D may optionally be added to so that the delay between pulses of the mode locked laser  803 A may be matched against the number of channels  808 A (typ.) by duplicating the pulses the required number of times. This may be done, as indicated, by means of one or more duplicator  803 D, which includes a summer and suitable delays (not shown in the present drawing, but described by  FIGS. 15A and 15B  and elsewhere) to make any required density of pulses in the signal prior to being split by the splitter  808 . A synchronization recovery circuit  803 B may be provided to ensure that the modulators  806  (typ.) are controlled such that the signals from data sources  801  (typ.) are properly synchronized with the output of the mode locked laser  803 A. For example, a synchronization signal  811  may be generated by a detector in  803 B that receives a small portion of the signal that laser  803 A emits (not shown separately). 
   Note that instead of using a single mode locked laser to form a stream of pulses to multiple modulators, signals can be obtained from multiple mode locked lasers with a common cavity such that their signals are synchronized. 
   Note that six data channels have been chosen for illustration purposes only. This number, six, is chosen arbitrarily and has no practical limitation to the number of data channels (along with respective delays, modulators and symbolizers) that can be used. 
   In another alternative, a single mode locked laser  875  as shown in  FIG. 15D  feeds a pulse-signal  875 A into upper branch  879 C of input  879 B of directional coupler  877 D. Input branch  879 C is coupled to upper and lower branches  879 E and  879 F of output  879 A of coupler  877 D. Lower branch  879 F is connected, by loop  877 , to lower branch  879 D of input  879 B of coupler  877 D. Loop  877  includes controllable delay loop  877 A, amplifier  876 , and gate  878 . At a certain starting time, the first pulse-signal  875 E of signal  875 A is received by the upper branch  879 C of input  879 B of coupler  877 D. Directional coupler  877 D divides the energy of the first and subsequent pulses  875 E in signal  875 A into an output pulse propagating through branch  879 E and a returned pulse propagating toward loop  877  via branch  879 F. The part of energy of pulse-signal  875 A that is directed through output  879 E appears as the first output signal. The other part of the energy of signal  875 A enters into loop  877  which sends its energy back to branch  879 D in input  879 B. The part of pulse-signal  875 A propagates along loop  877  (the returned signal) is amplified by amplifier  876  and passes through loop  877 A and gate  878  to return to coupler  877 D. The returned signal  875 A that returned to branch  879 D, through loop  877 , is divided, by coupler  877 D into an output signal at the upper branch  879 E and a returned signal directed back into loop  877 . This process may repeat itself in a steady-state condition to produce a train of duplicated narrow output signals. To provide a steady train of pulses, the intensity of all the recirculated pulses should be equal to the first signal that entered loop  877 . In addition the first output signal, at branch  879 A, should be equal to the next output pulses that follow after the delay imposed by loop  877 . Thus, each fraction of the energy from each pulse  875 E that leaves at  879 E is followed by another portion that has recirculated through the loop  877  resulting in a continuous train of pulses. The recirculating pulse may be amplified by an amplifier  876 . A delay loop  877 A determines the spacing between an exiting pulse and the following pulse that flows through the loop  877 . The amplification of amplifier  876  and energy partitioning of coupling of directional coupler  877 D are preferably such as to ensure the pulses in the train exiting at  879 E has substantially the same amplitude. For example, this may be obtained if coupler  877 D is of a type characterized by 50/50 power splitting and amplifier  876  has a gain that compensates for loop loss (including propagation and bend loss) and coupler loss (50%) to assure that the product between the combined effect of gain and the overall attenuation loss of a round trip along the loop  877  is equal to one. 
   In a steady state, the process of duplicating the pulses by loop  877  produces a train of identical narrow pulses. The process continues till another pulse  875 E appears in signal  875 A of mode locked laser&#39;s  875  output. Just before the appearance of such pulse, gate  878  may be turned activated to stop recirculation of a returned signal (pulse) in loop  877 . After the termination of the pulse duplication and before the arrival of the next pulse  875 E, gate  878  activated to block the pulse circulating in the loop  877  and to allow the beginning of a new duplication process. Again this continues till the next activation of gate  878  and the appearance of the next pulse of signal  875 A. Gate  878  can be a shutter, an LCD window, a coherent summer receiving light from a source such that the pulse in the loop  877  is canceled, or any suitable device. 
   The interval between duplicated pulses is the time-space between duplicated pulses and is equal to the total delay of loop  877 . To create a train of pulses equally spaced, the space between two following pulses  875 E of signal  875 A should be equal to an integral number of spaces between duplicated pulses and the delay of loop  877  has to satisfy this condition. 
   Gate  878  is activated to halt the last pulse to be repeated before a new pulse is generated by the mode locked laser  875 . Gate  878  is deactivated to allow the passage of the new pulse generated by laser  875  which propagates in loop  877 . Thus a narrower train of pulses  875 B can be generated at output port  879 E with only one delay device. This may allow the pulse train  804  ( FIG. 15C ) to be generated by the device of  FIG. 15D  and to be arbitrary distances apart within the scope of integral divisions of the spacing of the mode locked laser  803 A ( FIG. 15C ). 
   Referring to  FIGS. 15C and 15E , as mentioned, a demultiplexer using gates such as indicated at  829  (typ.) may be used to distribute the multiplexed signal from point P, which is a common input point of the demultiplexer of  FIG. 15E  and common output point of multiplexer  800  of  FIG. 15C  among illustrated six parallel channels  824 A– 824 F each with a matching detector  828  (typ.) receiving and processing data at a correspondingly reduced rate. More particularly, the signal  807  from multiplexer  800  is applied, after, for example a lengthy transmission channel such as a long-haul fiber, to a common input  824  which is then distributed by means of a distributor  827  to the six channels typified by the channel indicated at  824 A. Distributor  827  may represent any distributor, for example, any distributor of the types  644  illustrated by  FIGS. 14A-14D  or discussed in their accompanied description. The demultiplexed signals, typified by the representation at  805 , are then converted to electrical signals, by detectors  828  (typ.) and may be applied to respective outputs  826 A– 826 F, which may be electrical signals or any other suitable medium. For simplicity, signals  805  are illustrated after gates  829  without any artifact. This may be the case if the coincidence pulses are produced by gates  829  that produce no artifact, as in the embodiments of  FIGS. 12A–12K . If otherwise, any coincidence pulses may be distinguished from the artifact pulses by an electronic threshold detector or comparator that may be incorporated within the detectors  828  (typ.) Comparators that generate an output only when a signal is above a predetermined threshold are staple electronic components and their details need not be discussed here. 
   Here, as with  FIG. 15C  the number of six channels is chosen arbitrarily and has no practical limitation to the number of data channels (along with respective gates and detectors) that can be used. 
   Referring now to  FIGS. 15F and 15H , another way of forming extremely narrow pulses is to apply a pulse broader than the desired narrow pulse, from a modulated laser source  851  (L indicates the laser, M indicates the modulator, and C indicates the clock) whose width is a wide Δt Y  to a gate  841  with a time delay equal to Δt X =Δt Y −Δt Z  to obtain pulses whose width are narrow Δt Z . Gate  841  splits the applied pulse  839  into two copies  843  and  844  that are overlapping coincident only for the duration of Δt Z , thereby determining the width of the resulting pulse  846 . Gate  841  may be of the type of gate  101  that includes optical threshold mechanism such as shown in  FIGS. 12A–12K . Accordingly, signal  846 A resulted from the delayed summing of copies  843  and  844  of original signal  839  appears as signal  846  after passing through the threshold mechanism of gate  841 . 
   Referring now to  FIGS. 15G and 15H , a gate  841 A that does not completely eliminate artifacts when it sums can still be used for making pulses. For example, signal  846 A is characterized by a coincident portion  846 F resulting from the gate  841 A splitting the applied pulse  839  into two copies  843  and  844  ( FIG. 15H ) that are coincident only for the duration of Δt Z , thereby determining the width of the coincident portion  846 F of the resulting signal  846 A. A non-zero artifact portion  846 G results at the output of gate  841 A where the two copies  843  and  844  do not overlap. As indicated in the previous discussion, gate  841 A may add coherently or non-coherently depending on its structure and the nature of the light energy in the incident pulse  839 . Thus, the ratio of the height of the pulse portion  846 F to that of the non-zero artifact  846 G can be up to 4:1 or up to 2:1. If coherent summing is done by gate  841 A, as also discussed, the artifact may be reduced to one ninth the amplitude of the coincident portion  846 F by a circuit  849 , that may represent the device of  FIG. 13G , that sums with a signal from a CW laser with the result illustrated  846 B, where the zero level is indicated at  846 C. The profiles  846 A and  846 B represent E-field profiles. The power profiles corresponding to signals  846 A and  846 B are illustrated at  846 H and  846 K, respectively, with the zero power level indicated at  846 L. Similar results in which the power ratio between the coincidence pulses and the artifacts is enhanced to be 9:1 can be achieved when using input pulses with non zero background level. This ratio can even further be increased by complete elimination of the artifact pulses using the optical embodiments illustrated by  FIGS. 12A-12K . Alternatively, an electronic threshold device may be used in an end unit that receives the optical signal from gate  841 A and, in any case, converts the optical signal it into electronic signal whether an optical threshold mechanism is used or not. 
   Note that a configuration like that of  FIGS. 15F  or  15 G may be used to groom pulses of any optical modulation scheme. For example, rather than regenerate pulses in long haul optical links, pulses may be “chopped” or reshaped using such a configuration with suitable optical amplification to regenerate the power level. 
   Referring to  FIG. 15J , to use such a mechanism in a multiplexer  3840 , broad pulses from a laser  843 A modulated by a modulator  843 B to produce relatively wide pulses  843 C at laser output  843 D, that are distributed to multiple channels  3847  (typ.) each supplied with a respective gate  3845  (typ.) as described with reference to  FIGS. 15F and 15H . Each channel also has a respective time delay as indicated at  3805  (typ.). Modulators  3806  (typ.) on each channel  3847  (typ.) determine whether a pulse is passed on that channel or not in response to a control signal from a respective data source  3801  (typ.). A respective symbol is applied to the signal on each channel  3847  (typ.) by a respective symbolizer  3818 A (typ.). As in the embodiment of  FIG. 15C , the resulting output at  3809  illustrated by signal  843 F may be in the form of a highly dense series of pulses constructed by very dense symbol signals having zero level  584 A. Again, a synchronization recovery circuit may be provided and may be integrated in modulator  843 B, to ensure that modulators  3806  (typ.) are controlled such that the signals from data sources  3801  (typ.) are properly synchronized with the output  843 D of the modulated laser  843 A. For example, a synchronization signal  3811  may be generated by a detector in  843 B that receives a small portion of the signal that laser  843 A emits (not shown separately). 
   Optionally, to provide a non-zero background which when coherently summed as discussed with regard to  FIGS. 10D and 11B , a low-level CW signal  580  may be added to the signal  843 F by means of a summer  592  and guide  580 B. 
   The CW signal  580  may be derived from the same source as modulated laser  843 A which may be configured to provide one output that is not modulated, as illustrated in  FIG. 15L . That is, a CW laser  586  (corresponding to  843 A of  FIG. 15J ) may output to a junction  589  providing a constant signal  580 A corresponding to CW signal  580  of  FIG. 15J . The other leg of the junction  589  may be applied to a modulator  587  (corresponding to  843 B of  FIG. 15J ), such as an LCD or Mach Zhehnder Interferometer (MZI) modulator with a modulation signal supplied by a clock  590  to produce a regular pulse stream  588  corresponding to output  843 D of laser  843 A of  FIG. 15J  as discussed above. Assuming appropriate control of phase and signal level, the output  843 F with a background at zero level  584 A is converted by summing in summer  592  to a signal  843 E with a non-zero floor, as indicated by the zero level  585 , to enhance the intensity ratio between the coincidence signals and the artifact signals that might exist in the demultiplexing system (not shown) and as previously illustrated by  FIG. 10C . The enhancement system that includes summer  592  and CW signal  580  may not be needed when coincidence gates  3845  (typ.) are of the type of gates  101  that include optical threshold as shown by  FIGS. 12A–12K . 
   In an alternative embodiment, the same role as signal  580  may be played by a laser  595  that is separate from laser  843 A as indicated. In such a case the phase matching between laser  595  and the signal  843 F may be controlled by a control mechanism for recovering the phase. For example, a detector  593  detects a portion of the power of the signal  843 E taped into detector  593  and generates a feedback control input to a controller  591  that controls a phase shift by variable phase shifter  594  to maximize the signal power detected. Such a mechanism performs a function of Phase Locked Loop (PLL). As this is an alternative role for signal  580 , it is marked in dashed lines and can be used instead of signal  580  and guide  580 B. 
   Note that in the discussion of figurative illustration of signals, such as  843 F and  843 E, the same diagram may connote the field or the intensity, which is the square of the field. This should be clear from the context and no contradiction is implied. Thus, in indicating a shift in zero level from signal  584 A to signal  585 , signal  843 F and  843 E may be interpreted to represent the field level, but ignoring the zero level indication, they may be interpreted to represent intensity. Note that  FIG. 15J  may be interpreted to be consistent with the use of a multimode laser within modulated laser  843 A. In that case, of course, the non-zero background device  580 B,  592 , etc. would not be applicable. 
   Instead of providing a separate gate  3845  (typ.) on each channel  3847  (typ.), a single gate may be located immediately following the single output  843 D of the modulated laser  843 A to produce narrow pulses that are distributed to all the channels  3847  (typ.) 
     FIG. 15K  illustrates the foregoing multiplexer/demultiplexer combinations and others as a generic schematic. A signal vector source  832 , which may consist of any number of signals (having controlled amplitudes and phases) applied by an input channel  833 A to modulators of each of multiple parallel channels of a multiplexer  830  outputting onto a multiplexed channel  836 . The multiplexed channel  836  applies multiplexed signals to a demultiplexer  834  which applies an output vector to a receiver  838  via an output channel  833 B. Multiplexer  830  may represent multiplexers, such as, the multiplexers of  FIGS. 15C and 15J . Demultiplexer  834  may represent demultiplexers, such as, the demultiplexers of  FIGS. 14A–14D  and  15 E. 
   Referring now also to  FIGS. 15K and 15M , although the input channel  833 A and output channel  833 B of  FIG. 15K  are shown as a single line, it should be understood that they may have many different components representing different subchannels. For example, each component of the signal vector source  832  may represent a data stream from a separate sources of data such as independent devices S n  and S m  (among others not shown) sending data to specific independent devices S p  and S q  (among others not shown), as illustrated in  FIG. 15M . 
   As another example illustrated in  FIG. 15N , the signal vector source  832 C may be a parallelized signal from a single source spatially multiplexed by a spatial multiplexer  830 A (which may be operable in a different medium from that of the multiplexer  830 ). At the receiving end, the separate channels from the demultiplexer  834  may be multiplexed by a different multiplexer  834 A and applied to a receiver  838 C. 
   Referring to  FIG. 15P , the pulse-pair symbology discussed with reference to the foregoing embodiments may be used for self control of information flow by multiple layers of gates. For example, when a signal  862 , which is the multiplexed signal of separate sources of data such as independent devices S a  and S b , passes through a demultiplexer  864  using multiple gates such as gate  101 , energy is output along a chosen one of multiple paths (e.g.,  870 ,  872 ), each leading to different destinations which may include additional demultiplexers (e.g.,  868 ,  866 ). From multiple demultiplexers  866  and  868  the demultiplexed signals are received by multiple receivers S x  and S y . The details of the symbology for multiple layers of demultiplexing are discussed below. Note that the demultiplexers in the embodiments of  FIGS. 15K–15N  may represent demultiplexers for multiple layers, as, the type illustrated by  FIG. 15P . 
   Referring now to  FIGS. 15Q and 15R , it should be noted that the structure of the gate-based demultiplexer of  FIG. 15E  can be used in embodiments other than where access is controlled to a common channel by time division. A more generic embodiment is an array of gates form a demultiplexer as shown in  FIG. 15Q  where a common signal  895  at input  895 A generated by some source and encoded with symbols is distributed by distributor  895 B and is passed by a unique gate  890 A- 890 C. For example, such a demultiplexer  893  ( FIG. 15R ) may be used in a system where the ability of multiple senders  891 A– 891 C to transmit through many-to-one combiner  891 D on a common channel  897  is regulated by controller  896 . More specifically, contention is resolved by requesting access to the channel from the controller. Each sender  891 A,  891 B or  891 C encodes signals according to the ultimate destination (not shown) and transmits only when the common channel is free. In this configuration various data structures can be sent including information packets. The latter is determined by controller  896  which grants permission to the senders  891 A– 891 C. There is no need for self demultiplexer  893  to have any controls or even suffer a configuration data, as it may direct the data passively. Thus, the controller and its arbitration function can be located at the location of the senders or any other location that is convenient. 
   Referring to  FIG. 15S , an m-by-n cross-connection configuration has m senders  884 A,  884 B,  884 C connected to respective demultiplexers  882 A,  882 B,  882 C. The present configuration allows each of the m senders  884 A,  884 B,  884 C to be granted access to a given one of n channels,  887 A,  887 B,  887 C, each connected to a respective output channel. Arbitration may be performed by controller such as schematically illustrated by controller  889 , which grants requests for access to a given channel  887 A,  887 B,  887 C if the channel is free. The signals are encoded, by symbols, for a respective one of n receivers  886 A,  886 B,  886 C and directed to the same by each demultiplexer  882 A,  882 B,  882 C. Contention arises because signals are summed by star couplers  888 A,  888 B,  888 C so that each receiver  886 A,  886 B,  886 C can receive from all senders  884 A,  884 B,  884 C. But in this case, the senders  884 A,  884 B,  884 C contend for access to a given receiver, but can still send to other receivers  886 A,  886 B,  886 C when they are free. Also other senders  884 A,  884 B,  884 C can send to other receivers  886 A,  886 B,  886 C as permitted and determined by controller  889 . This assumes that each sender  884 A,  884 B,  884 C has the ability to articulate optical signals according to a protocol appropriately handled by the gates (not shown) within the demultiplexers  882 A,  882 B,  882 C. But, again, arbitration can occur conveniently at the location of the senders because no configuration is required at the cross-connect (the demultiplexers  882 A,  882 B,  882 C). This may provide speed advantages in some applications, since unlike the TDM, in which only one channel can be inserted at each time slot, the configuration of  FIG. 15S  allows the insertion of all the input channels at the same time to any and each time slot. 
   Referring now also to  FIG. 15T  an alternative structure  899 J to the branching structure  883  of  FIG. 15S , which employed star couplers  888 A,  888 B,  888 C may also be configured using reverse Y-junctions  899 G (typ.) that combines multiple ports  899 A– 899 D into a single port  899 E. Alternatively a combination of the above structures may be employed with a similar effect, for example where many channels are combined. 
   Referring now to  FIGS. 16A ,  16 B and  16 C the pulse-pair symbology discussed above may be applied in multiple layers of parallel gates  101 . To accomplish this, symbol  9 O 2  including pulse pair  902 B encoding a destination is formed, by duplication of pulse  902 A, using symbolizer  901 , just as with the duplication of a single pulse (e.g.,  819  of  FIG. 15B ), as discussed with reference to  FIGS. 15A and 15B . The time separation between the pulses of pair pulses  902 B is equal to the time delay Δt 3  of symbolizer  901 . Signal  902  of  FIG. 16B  is duplicated in a similar way, by symbolizer  904 , to produce symbol  906  containing copies  906 A and  906 B of pair pulses  902 B. Pair of pulses  906 A and  906 B of symbol  906  are separated by time space that is equal to the time delay Δt 2  of symbolizer  904 . Time delay Δt 2  corresponds to the delay of an additional gate in an additional demultiplexing/switching layer (not shown) through which signal  906  may be passed before it reaches a gate (also not shown) with a time delay of the respective pulse pair  902 B (Δt 3 ). The process may continue to repeat itself as needed and shown in  FIG. 16C  yet another layer of symbology may be added by means of another symbolizer  910 . Here, each set of pulses making up each symbol in signal  912  is reproduced at an appropriate interval spacing by another duplicator circuit  910  configured with a delay of Δt 1 . Symbol  912  includes pairs of pulses  912 A- 912 D produced by symbolizer  910  that copies double pairs  906 A and  906 B of symbol  906  to produce copies of double pairs  912 A and  912 B and double pairs  912 C and  912 D separated by time space Δt 1 , equals to the time delay of symbolizer  910 . The encoding for the demultiplexing/switching for the three layers represented by the intervals Δt 1 –Δt 3  can be processed in any desired order. 
   Referring now to  FIG. 16C , illustrating symbol  912  (typ.). Signal  912  includes sets of subgroups of pulses separated by time delays Δt 1 –Δt 3 , each of these delays represents the encoding for different demultiplexing/switching layer. Each set of signals  912  (typ.) represents a single symbol from an original source signal encoded by symbolizers  901 ,  904  and  910  of  FIGS. 16A ,  16 B and  16 C, respectively. Each of the time intervals Δt 1 , Δt 2 , and Δt 3 , selects a unique coincidence gate switch in a given layer of gate systems. Each output of a gate, such as gate  101  (typ.), in a first layer, corresponds to a different and unique value of Δt 1  (typ.). Each output of a gate in a second layer, corresponds to a different and unique value of Δt 2  (typ.). Each output of a switch in a third layer, corresponds to a different and unique value of and Δt 3  (typ.). The encoding order illustrated by  FIGS. 16A ,  16 B and  16 C is only one example of many other possible encoding orders. In general, the encoding order is arbitrary and may be chosen as desired. 
   Signals  912  (typ.) may represent encoded symbol for any number of layers and may be at any desired length. However for maintaining synchronization a specific fixed time frame may be defined capable of including the longest symbol  912  (typ.). Any time frame produces only one coincidence signal by the specific gate  101  (typ.) at the last demultiplexing/switching layer designed to respond to specific symbol  912  that the specific frame includes. Thus in order to maintain synchronization where the propagation of the signals is from left to right, each symbol  912  should start on the left edge of each time frame. 
   A guard interval between the time frame of symbols  912  (typ.) maintains a distance between adjacent time frames may be any width sufficient to prevent inter-symbol interference, for example, the maximum time delay used for a previous symbol. In case that the artifact pulses are cancelled, the guard zone requirement may only exist at the layer with the highest encoding delay. This is because the time delays that correspond to the other layers are always a fraction of the delay at this layer, the presence of the highest guard interval guarantees that no overlap will occur between successive symbols in the lower layers. 
   Note that, generally, in the foregoing illustrations, artifact pulses may be left out of signals, even though it may be present in certain embodiments, depending on the nature of the embodiment used for form the pulse-pair symbols. 
   Refer now to  FIG. 16D , which illustrates further how the multilayer signal is processed through multiple layers gates (without showing artifact pulses to simplify the figures, although they may or may not be present). The original signal (e.g.  912  from  FIG. 16D ) here shown at  940 , is applied to a first layer  946  of gates  952 A– 952 F each with a respective time delay Δt a –Δt f  (illustrating specifically, for example, Δt 1  that matches gate  952 C). Gate  952 C, which is within the range of gates  952 A– 952 F (a range which has an arbitrary number of gates within the confines of the encoding range), outputs coincidence signal  930  because it is configured for the matching time interval Δt 1 . Signal  930  may be thought of as containing the structure of one half of the signal  940  and results due to the coincidence effect described for coincidence gates above. The other gates in the layer  946  output no signal, because their time delays have non-matching values. 
   Signal  930  is applied to the second layer of gates  952 N– 952 R, each with a respective time delay Δt n –Δt r  (illustrating specifically, for example, Δt 2  that matches gate  952 P). Gate  952 P, which is within the range of gates  952 N– 952 R (a range which also has an arbitrary number of gates within the confines of the encoding range), outputs signal  932  because it is configured for the matching time interval Δt 2 . Signal  932  may be thought of as containing the structure of one half of the signal  930  and results due to the coincidence effect described for coincidence gates above. The other gates in the layer  948  output no signal, because their time delays have non-matching values. 
   Signal  932  is applied to the third layer of gates  952 N– 952 Z, each with a respective time delay Δt n –Δt r  (illustrating specifically, for example, Δt 3  that matches gate  952 X). Gate  952 X, which is within the range of gates  952 V– 952 Z (a range which also has an arbitrary number of gates within the confines of the encoding range), outputs signal  934 , because it is configured for the matching time interval Δt 3 . Signal  934  may be thought of as containing the structure of one half of the signal  932  (or a single pulse) and results due to the coincidence effect described for coincidence gates above. The other gates in the layer  950  output no signal, because their time delays have non-matching values. Note that in  FIG. 16D , the shapes of the pulse patterns are not necessarily to scale. The decoding order along the multiple decoding layers, illustrated by  FIG. 16D , is only one example of many other possible decoding orders. In general, the decoding order is arbitrary and may be chosen as desired. This means that the decoding layers having the respective time delays Δt n –Δt r  may be switched in their orders as needed. 
   It also should be clear that the self decoding/demultiplexing/switching systems discussed above, such as the systems of  FIGS. 14A–14D ,  15 P and  16 D, designed for self routing of information across multiple switching layers may have different configurations. For example, in embodiments where coincidence gates used in the self routing system are of the type  101  designed for cancellation of artifact pulses (non-coincidence pulses) by exemplary means of optical threshold mechanism, the coincidence gates should be distributed along the nodes located at the routing layers. However, where the coincidence gates used in the self routing system are of the type  101  that allows artifact pulses (non-coincidence pulses) which do not include an optical threshold mechanism, the same signal may arrive to all of the ports at the last demultiplexing/switching/routing layer. Accordingly, such coincidence gates may be arranged to be located only at the terminals of the last switching layer. In such a case the switching layers  946 ,  948 ,  950  of  FIG. 16D  may all be located at the output ports of the system. Still, the configuration described above for gates that do not allow artifact pulses in which the gates are distributed along the nodes located at the routing layers, is usable for gates that allow artifact pulses as well. 
   In addition it should be noted that the system of  FIG. 16D  may represent a situation where all layers  946 ,  948   950  are at close vicinity to each other and at the same radiation guide. In such a case, the system of  FIG. 16D  may represent a configuration of several coincidence gates connected together in series to form a new combined coincidence gate. Such a gate, responses to form main coincidence pulse (as discussed below), only for a specific pattern of a symbol constructed from multiple pulses with a number of pulses greater than two. The specific address (predetermined destination) to which only one specific combined coincidence gate responds, is encoded by the specific time spaces between the multiple pulses forming the specific pattern of a specific symbol. 
   The main coincidence signal is the coincidence pulse with the highest intensity that exists in the system for a specific symbol. While some other coincidence signals may be produced in the same gate where the main coincidence signal is produced or in other gates, still the main coincidence pulse is the pulse with the highest intensity produced in the system. A main coincidence pulse only outputs at a specific gate that matches the time delays between the pulses of a specific address of a specific symbol. 
   Note that each gate in the series of gates forming the combined coincidence gate of  FIG. 16D  may be a combined coincidence gate by itself, such as, the combined coincidence gate formed by multiple coincidence gates connected in parallel and illustrated by the combined coincidence gate of  FIG. 22A . Accordingly, a combined coincidence gate may be constructed from coincidence gates connected in series, in parallel or in any combination of serial and parallel connections. 
   Referring now to  FIGS. 16E ,  16 F and  16 G, comparators (differential amplifiers)  990  may be used at the outputs of a multiple layer arrangement of demultiplexers as described with reference to  FIG. 15P  (three layers) and as indicated with reference to  FIG. 16E . First, a signal may be formed as indicated at  980  of  FIG. 16G  by a suitable modulation scheme such as interleaving several layers as discussed with reference to  FIGS. 16A–16C . Then in a first layer of demultiplexing as indicated at layer  946  in  FIG. 16D , a delayed image  981  of  FIG. 16G  of the signal  980  is summed with the signal  980  with the result at the coincidence output as indicated at  982 . Then in a second layer of demultiplexing as indicated at layer  948  in  FIG. 16D , a delayed image  983  of the signal  982  is summed with the signal  982  with the result at the coincidence output as indicated at  984  of  FIG. 16G . Finally, in a third layer of demultiplexing as indicated at layer  950  in  FIG. 16D , a delayed image  985  of the signal  984  is summed with the signal  984  with the result at the coincidence output as indicated at  986  of  FIG. 16G . The above profiles  982 – 986  are assumed to be representative of power, not field strength. The final result at the non-coincidence output is shown at  987 . If these two signals are applied to respective comparator  990  inputs  990 A and  990 B, with respective detectors  993 A and  993 B, as in  FIG. 16E , the result at the output  990 C will be as indicated at  988  of  FIG. 16G . The remaining pulses are those that coincided at the final gate (not shown in the present drawing) with all other artifact being eliminated. Note that the spacing between the remaining pulses including the main coincidence pulse  988 A (a pulse that have coincidence in all the layers) and artifact pulses  988 C is increased by the elimination of the interstitial pulses coinciding with profile  987 . The increase of the space between the pulses has the advantage of allowing the use of slower detectors. The discrimination of main coincidence pulse  988 A from the artifact pulses  988 C (secondary coincidence pulses that do not have coincidence in all the layers) is performing by setting an optical or electronic threshold level  988 B which is adjusted to be in the range between the amplitudes of pulses  988 A and  988 C. Such threshold level eliminates all the artifact pulses  988 C and allows only the propagation of main coincidence pulse  988 A. 
   It should be understood that when the device of  FIG. 16E  including comparator (differential amplifier)  990  is employed in a way described above but, after the first demultiplexing layer, only the coincidence pulse appears at output  990 C of comparator  990 . In such a case there is no need for additional threshold mechanism. 
     FIG. 17  illustrates how Wavelength Division Multiplexing (WDM) may be combined with the symbology method of the present invention in a communications system. Multiple instances of the interleaving/multiplexing system described with reference to  FIGS. 15A through 15S  may be provided, for example as schematically indicated at  960  (typ.). Each of the multiplexed channels may be assigned a frequency channel and multiplexed in a WDM process schematically illustrated by  970  for transmission on a long haul channel  965 . Corresponding demultiplexing provided by a WDM demux engine  975  is provided at a receiving end, the respective frequency channels of which may be applied to respective optical demultiplexers  976  (typ.) and  977  (typ), such as those illustrated in  FIGS. 15A–15S . The label CDM of switches  976  (typ.) and  977  (typ.) stands for Code Division Multiplexing/Demultiplexing referring to the self routing preformed by the code of the predetermined destination encoded in the symbols constructed at multiplexing systems  960  (typ.) Note that two layers of demultiplexers are shown. These may employ the mechanism for multiple-layer encoding described with respect to  FIGS. 16A–16D . 
   Referring now to  FIG. 18A , elements of a receiver device for converting optical signals output by gates  101  and systems employing them in their various embodiments, are illustrated by a demultiplexing receiver  1000 . The demultiplexing receiver  1000  has various features, illustrated figuratively, that indicate how such a device may be fabricated on an optical chip using lithographic techniques that may be known in the field as Planar Circuits (PLC). A signal received on channel  1018  is distributed by a star coupler  1019  to several gates  1007 A– 1007 C. Each gate has a respective directional coupler  1002 A– 1002 C, delay line  1004 A– 1004 C, and directional coupler  1005 A– 1005 C acting as combiners. Directional couplers  1002 A– 1002 C divide the incoming signal into paths with different delays and couplers  1005 A– 1005 C sum them, and apply the summed signal to a optical detector  1006 A– 1006 C. 
   Each gate  1007 A– 1007 C has a respective phase shifter  1010 A– 1010 C that adjusts the phase so that coincidence pulses result from constructive interference, at couplers  1005 A– 1005 C, provide the maximum ratio of pulse height to background (including non coincidence pulses). 
   When device  1000  is made from optical fibers, the phase shifters  110 A– 1010 C can be of the type that applies pressure, by use of a piezoelectric crystal. For device  1000  that is made using planar waveguides, the phase shifters  1010 A– 1010 C can be of the type that thermally changes the refractive index of the waveguide, or semiconductor material fabricated by thin film techniques that change its refractive index due to injection of charge carriers into its guiding media. The change in the refractive index shifts the phase of the radiation propagating in the media of the shifters  1010 A– 1010 C. 
   Phase matching can be obtained by use of a suitable calibration by closed-loop phase controller  1012 . A calibration signal may be obtained from any of the signal paths, for example, by means of a detector  1016  that taps a small portion of signal energy from directional coupler  1005 B. The detector  1016  and phase controller  1012  combination may provide an instantaneous or averaged signal and be configured to maximize intensity. Since most properties that affect the phases of the signals within a small embodiment of receiver  1000  are uniform, for example if formed on a chip, a change in properties that affects on signal path should affect all in the same way. Thus, the entire configuration of receiver  1000  may be calibrated such that only one detector is required to provide for control of all the phase shifters  1010 A– 1010 C. Temperature changes, for example, in various optical components may drift, requiring the correction of the phase match. But this correction need only be done at long intervals relative to the rate of data throughput through such devices and therefore does not present a significant obstacle. Suitable control systems for performing calibration are well within the state of the art and can be embodied in many different forms. 
   Although in the embodiment of  FIG. 18A , a single input (from detector  1016 ) is used to control multiple phase shifters  1010 A– 1010 C, it also possible to control each phase shifter with a separate detector (not shown) for each signal path. In this alternative embodiment (not shown), separate detectors such as  1016  and separate phase controllers such as  1012  are used to control each shifter  1010 A– 1010 C. Note also that the phase shifters  1010 A– 1010 C may be provided with the ability to shift over multiple wavelengths so that they can align pulses. While the pulses are illustrated in the instant specification as square-edged, it is certainly possible and very likely, that real-world pulses would have round edges and in fact be substantially bell-shaped. The strength of a coincidence pulse, as a result, would be expected to be very sensitive to the alignment between the two gate inputs. Thus, the phase shifters  1010 A– 1010 C may be time-delay shifters with enough latitude that they can align pulses that are time-shifted more than a fractional wavelength from optimal. The procedure would be the same in either case: search for the average power intensity peak, which naturally gives greater weight to coincidence pulses. 
   Threshold inputs  1008 A– 1008 C to respective comparators  1011 A– 1011 C discriminate coincidence pulses from artifact and background by establishing a minimum signal level output from detectors  1006 A– 1006 C. As a result, the comparators  1011 A– 1011 C output pulses  1021 A– 1021 C only when a coincidence pulse is received by them. The threshold inputs  1008 A– 1008 C may be established by various methods. In one embodiment, a handshake from each sender occurs at regular intervals and a test message with a certain number of coincidence pulses and model artifact is sent many times while the threshold level is ramped up and down. Then some midpoint (or another point in the range between the intensities of the coincidence and artifact pulses) may be established in response to the test exchange and then the threshold level may be fixed thereafter in response. 
   It should be understood that the optical sensors and the electronic thresholds (comparators) components may be an integral part of the demultiplexing device, they may be placed in close vicinity to the demultiplexing device, they may be placed far away from the demultiplexing device, and even may be placed in an end unit. The same is true in the situation that optical thresholds are used to replace the combination of optical sensors and electronic threshold components. Such optical thresholds may be an integral part of the demultiplexing device, they may be placed in close vicinity to the demultiplexing device, they may be placed far away from the demultiplexing device, and even may be placed in an end unit. 
   Note that device  1000  may be fabricated from Multi Mode (MM) radiation guides, such as fibers or waveguides. In such a case the radiation in combiners  1005 A– 1005 C is summed incoherently and there is no need for the phase control. Accordingly, when MM radiation guides are used in device  1000 , detectors  1006 A– 1006 C, controller  1012  and shifters  1010 A– 1010 C may be removed resulting in a simpler device. Though MM device  1000  has the advantage of simplicity, it has a disadvantage of lower contrast between coincidence and artifact pulses. 
   Referring to  FIG. 18B , an example of applying the comparator (differential amplifier) embodiment of  FIGS. 16E and 16F  is shown. Each or any of gates  1007 A– 1007 C of  FIG. 18A  (exemplified by gate  1009 E in  FIG. 18B ) may apply their respective coincidence and non-coincidence outputs  1009 A and  1009 B to respective detectors (not separately shown, but housed in detector device  1009 C. The corresponding signals may then be differentially applied to a comparator  1009 D to eliminate the artifact pulses. 
   Fabrication of delay lines on a chip presents some problems because of the minimum radius of turns required to ensure tolerable band loss in the turns. The required radii and the requirement to avoid cross-intersection between the radiation guides may cause the amount of real estate required for large delays to be too great for practical manufacture and even if they can be manufactured, the waste of real estate would make such a configuration uneconomic. A configuration that is much more susceptible to convenient lithographic fabrication on a chip is shown in  FIGS. 19 ,  20 A and  20 B 
   Referring to  FIG. 19 , here a series of directional couplers  1028 ,  1032 ,  1034 ,  1036  fabricated on a chip  1030  and associated with radiation guides  1025 A– 1025 E directs a signal  1026  from an input port  1024  to an output port  1038  to form an optical delay line  1020 . Edge surfaces are mirrored by cleaving, polishing, or coating and each directional coupler  1028 ,  1032 ,  1034  and  1036  has a coupling length that is equal to half of the length required for crossover. In such a case the radiation that enters to any coupler  1028 ,  1032 ,  1034 ,  1036  is distributed along the coupling region of the coupler and is reflected back, from mirror like edges  1040  (typ.), along the same coupling region. Accordingly, the back and forth propagation of the radiation in the coupling region of each coupler  1028 ,  1032 ,  1034 ,  1036  is along a distance that is equal to a coupling distance of a complete crossover. This means that when the radiation enters to couplers  1028 ,  1032 ,  1034 ,  1036  from one port it is completely reflected back from the other port. Thus the light is reflected back and forth along the directional couplers  1028 ,  1032 ,  1034 ,  1036  and light guides  1025 A– 1025 E to create an optical path between input  1026  and output  1038  with little backward reflection. 
   Referring to  FIG. 20A , in a variation on the above, the directional couplers  1028 ,  1032 ,  1034 ,  1036 , typified by  1044 , employ Bragg-reflector gratings  1046  (typ.) instead of a reflective mirror surface  1040  (typ.) of  FIG. 19 . The coupling length for complete reflection is achieved by the provision of a directional coupler whose coupling length (measured from the point where total reflection is produced by the Bragg grating) is half of that required for crossover. 
   In another variation shown in  FIG. 20B , the Bragg gratings  1046 A and  1046 B are provided beyond the coupling regions  1044 A (typ.) of the directional couplers  1044 B (typ.). The locations of the gratings should be equidistant from the coupling regions  1044 A (typ.) so that back-reflection losses are minimal and this may require slightly different offsets for the Bragg grating as indicated in the drawing. 
   It should be noted that in the configurations shown in  FIGS. 19 ,  20 A and  20 B, there is no use of large radius bends along the path of the delay lines, resulting in delay lines with a very compact structure with small dimensions across the traverses. Accordingly, such configurations for delay lines are very attractive for on-chip fabrication. 
   Referring now to  FIG. 20C , in an implementation of the delay embodiments of  FIGS. 19 ,  20 A and  20 B, a gate  1031 A has single mode directional couplers  1023 A and  1027 A which split a signal entering coupler  1023 A into radiation guides  1035 A and  1037 A and create a sum signal in coupler  1027 A. Preferably the coupler  1023 A is such that more than 50% of the signal power is sent into the delay branch  1021 A, to compensate for possible loss in the delay branch  1021 A, such that the delayed and non-delayed signals arriving from guides  1035 A and  1037 A, respectively, summed in coupler  1027 A are substantially equal in power. A phase controller  1025 A is provided to ensure phase alignment of the delayed and non-delayed branches is correct for maximizing the difference between coincidence and non-coincidence pulses. 
   Referring now to  FIG. 20D , illustrating an embodiment  1021 B that is a variation of the design of embodiment  1021 A of  FIG. 20C . Embodiment  1021 B avoids the need for a phase controller  1025 A by employing a multimode coupler  1027 B, which has tapered branches  1027 C and  1027 D that allow adiabatic transmission from single mode radiation guides  1035 B and  1027 B to multimode coupler  1027 B with reduced loss. Coupler  1027 B performs power-summing rather than field-summing. In this case, because the summing is non-coherent (as opposed to the use of a single mode directional coupler  1027 A of  FIG. 20C ) there is no need for phase alignment. In this configuration, the segment of the delay line  1021 B is made of single mode radiation guides, in whom the coupling length of couplers  1021 B is well defined, but the summing coupler  1027 B is a multimode (MM) coupler that may avoid the need to use phase shifter  1025 A. Coupler  1023 B may be similar to coupler  1023 A of  FIG. 20C . 
   Referring now to  FIG. 20E , a compact structure for delay lines fabricated on chips that lacks any intersections between its radiation guides  1050  and  1051  including their input and output  1052  and  1053  is illustrated. The delay line is configured by a core of open loop  1050  around which the pair of radiation guides  1051  and  1052  are looped together. The structure has an initial radius R 0  and pitch between the guides of D Each turn of the guides adds D to the total radius of the bend and 2*D to the width W of the group of delay lines. The total width of the delay lines for N turns is 2*(R 0 +N*D). For example, a conventional delay line (constructed from an optical guide that is routed back and forth with a turning region of some minimum radius) with the same length and R 0  would have a width of 2*N*R 0 . Since D&lt;&lt;R 0 , the width of the delay line shown in  FIG. 20E  is much smaller than that of another delay line, having the same delay, and fabricated conventionally on a chip. The delay line of  FIG. 20E  may be useful for on chip fabrication and may be used in the devices of  FIGS. 20C and 20D , to replace respective delay lines  1021 A and  1021 B. 
   Referring now to  FIGS. 21A ,  21 B and  21 C, various mechanisms for modulating and demodulating are shown. In  FIG. 21A , a first modulation/demodulation mechanism that is similar to the embodiment of  FIG. 15C . Here a pulse source P distributes pulses using a distribution device  1065 A, for example a star coupler, a cascade of directional couplers, a cascade of Y-junctions, or a cascade of other splitters, to multiple modulators as shown at  1068  (typ.). Each modulator  1068  feeds into a respective time delay  1069  (typ., but with different delays Δt X −nΔt X ) and duplicator  1067  (typ., but with different delays Δt Z −nΔt Z ). The delays space apart the signals generated by the modulators  1068  so that the symbols generated by duplicators (symbolizers)  1067  (typ.) are interleaved, without collisions, into combiner  1065 B that merges them onto a common data path  1058 D. For maintaining synchronization, the interleaved symbols at common data path  1058 D may be interleaved into fixed size of time frames where each of the symbols may start at the delayed edge of each time frame. 
   For demodulating, the symbols from common data path  1058 D are distributed, by device  1058 A, into an array of gates  1058 B– 1058 C (typ. but with different delays Δt Z −nΔt Z ) and are demultiplexed by this array of gates in a manner similar to earlier embodiments. 
   Referring to  FIG. 21B , data may be directly modulated onto a single channel  1075 A using a modulator  1070  under control of a clock  1073  and address (predetermined destination) and data sources  1071  and  1072  to form symbols, at channel  1075 A, as previously discussed. The symbol stream on channel  1075 A may be split among multiple channels, as discussed in prior embodiments, using a demodulator  1079 D and sent to respective destinations  1079 B– 1079 D that may include receivers R 1 -Rn. 
   Referring to  FIG. 21C , illustrating a system similar to the system of  FIG. 21B  with an additional sequence manager. In the alternative embodiment of  FIG. 21C , a sequence manager  1078  receives address data from address (predetermined destination) source  1071  and a clock signal from clock  1073 . The sequence manager  1078 , which may be implemented as a programmable processor or preferably a simple state machine such as an AS 1 C (application specific integrated circuit), generates a pulse, through electrical lead  1078 A, that is used to control modulator  1070 . The sequence manger  1078  controls when the next symbol should be output, at channel  1076 D, by the modulator  1070  responsively to address source  1071 . The symbols generated at guide  1076 D, by modulator  1070 , are demultiplexed, as discussed above, by demultiplexer  1079 D having output terminals  1079 B– 1079 D that may include receivers R 1 –R n . The reason for making the symbol rate responsive to the address is to minimize the delay between symbols required to avoid inter-symbol interference, as explained with reference to  FIG. 21E , as described below. 
   Referring now to  FIG. 21D , multiple modulators  1084 A– 1084 C governed by a common clock  1083  and transmitting for multiple respective addresses  1081 A– 1081 C and data  1082 A– 1082 C may be governed by a common sequence manager  1080 . The output signals from each modulator  1684 A– 1084 C, propagating on channels  1086 A– 1086 C, may be interleaved by a combiner  1088 , onto a single channel  1087 . In this case, the sequence manager  1080  also manages for collision avoidance, since multiple independent data streams from channels  1086 A– 1086 C may vie for the same channels space at common channel  1087 . 
   Referring now to  FIG. 21K , highly dense pulse streams can be generated using electronic modulation not only to determine whether a coincidence pulse will be generated at a final destination as in foregoing embodiments, but also to actually determine the particular symbol (e.g., spaced pulse) as well. In other words, the system may perform the symbol modulation electronically. 
   First a stream of narrow pulses generated by means of any of the foregoing mechanisms is generated on each of a number of parallel channels  1228 A– 1228 P. The spacing of the pulses (e.g.,  1224 B typ.) on each channel (e.g.  1228 A typ.) may be equal to the size of the time slots multiplied by the number of channels and synchronized across all the channels  1228 A– 1228 P such that every time slot has a single pulse in one of the channels according to a repeatable scheme. Modulators A-P  1122  (typ.) control whether pulses on respective channels  1228 A– 1228 P are passed to a signal combiner  1226  to be emitted from port  1227 . If all the pulses were passed by all the modulators A-P  1222  (typ.), the resulting train of pulses would be equally spaced pulses a single time slot apart. The modulators A-P  1222  (typ.) are all controlled by a controller  1230  to form spaced-pulse symbols according to a desired data stream (not indicated) on a single output channel  1227 . The resulting signal, illustrated at  1226  may include a series that includes the pulse timing positions of pulses  1224 A,  1224 B,  1224 C and others, illustrated by pulses  1225 A,  1225 B,  1225 C and others, respectively, with the inter-symbol spacing as well as the selection of the symbol from the symbol space being determined by the controller and contributed to by all the channels in concert. 
   It is clear that using the same method, symbols including number of pulses greater than two, such as symbols  912 ,  940 – 944  and  1130 – 1134  of  FIGS. 16C ,  16 D and  22 A, respectively, can be produced at port  1227 . 
   In another embodiment, a similar system of  FIG. 21K , is illustrated at  FIG. 21L . Modulators  1244  (typ.), combiner  1240 , output channel  1241  and controller  1238  of FIG.  21 L may be the same as indicated by  1222  (typ.),  1226 ,  1227  and  1230  of  FIG. 21K , respectively. The data modulated onto the output channel  1241  may come from a buffer  1236  such as a FIFO to drive the controller  1238  that controls the modulators  1244  (typ.). Buffer  1236  receives multiple parallel channels such as  1234 A– 1234 C. A pulse former  1242  may be present in each channel to reduce the width of pulses as described with reference to  FIGS. 15F  or  15 G. One or more sources of pulses  1248  may be provided and the pulses distributed to each channel as discussed with respect to  FIGS. 15C and 15J . 
   Note that although the above figures refer to the address symbols (e.g.,  1071  of  FIGS. 21B and 21C  or  1081 A– 1081 C of  FIG. 21D ) and data (e.g.  1072  of  FIGS. 21B and 21C  or  1082 A– 1082 C of  FIG. 21D ) as being different, it is possible for them to be one and the same. That is, the symbology may encode data that is sent to a single destination, and it may represent any data, not just destination data. That is, the data may be encoded such that each pulse-spacing symbol indicates a datum, for example, such that the number of bits carried is log 2 (N,) where N is the number of time slots. By providing a mechanism for generating pulses on selected channels, therefore, messages may be received by associating each channel with a particular degree of freedom of a message format. 
   The delay following each symbol that is required to prevent inter-symbol interference (called a guard band) may depend on the particular symbols and decoding gates used in the decoding system. For example, this may be the case when a pulse-spacing symbology is used with gates that allow artifact pulses as discussed below and shown in  FIG. 21E . 
     FIG. 21E  illustrates 5 identical groups  1052 A– 1052 E of encoded symbols. In each group  1052 A– 1052 E there are 5 different encoded symbols. The space between the pulses of the shortest symbol is At and the space between the pulses of the longest symbol is 5Δt. Groups  1052 A– 1052 E are each the same, but the effect of passing each through a different gate (indicated at  1061 A through  1061 E) is illustrated in the regions  1053  and  1055 . The effect of passing through gates  1061 A– 1061 E, shown in regions  1053  and  1055 , is equivalent to summing of the symbols with their delayed copies where each of gates  1061 A– 1061 E produces a different delay. The shortest delay is of gate  1061 A and is equal to Δt. The longest delay is of gate  1061 E and is equal to 5Δt. Gates  1061 A– 1061 E having time delays Δt, 2Δt, 3Δt, 4Δt and 5Δt, respectively. Region  1053  represents a time frame that is capable of including the largest symbol used in the decoding system. Region  1055  represents the time guard band between frames  1053  (typ.) that should be maintained to avoid unwanted inter-symbol interference. It can be seen that all the coincidence signals produced by gates  1061 A– 1061 E for the symbols of groups  1052 A– 1052 E appear in region (time frame)  1053 . Region  1055  (guard band) includes only artifact pulses. Each shaded rectangle, for example  1051  (typ.) represents a pulse. Artifact pulses such as indicated at  1056  are indicated as being at half the height of coincidence pulses (non-coherent summing), for example, as indicated at  1051 . As can be seen from the figure, the maximum number of time slots occupied by artifact pulses (e.g.,  1056 ) is equal to the maximum delay of the gates  1061 A– 1061 E. This maximum (5Δt) is produced by gate  1061 E with the greatest delay which produces the coincidence pulses and artifact pulses shown at  1059 . The minimum inter-symbol guard band is shortest for symbols  1059 A having pulses spaced only one time slot apart (Δt)  1057  as indicated in the top row of the last group at  1059 B. The delay is one time slot spacing longer (Δt)  1057  when the pulse spacing is one time slot longer and so on. The size of the guard band should be at least the size that avoids inter-symbol interference for the longest symbol  1059 E that produces artifact pulse  1059 F when passing through gate  1061 E (having delay of 5Δt). Accordingly, the size of guard band  1055  is 5Δt which is equivalent to the length of the longest symbol used in the system. 
   Referring now to  FIG. 21F , three pulse-spacing symbols  1090 A– 1090 C, with respective guard bands  1093 A– 1093 C (indicated by a dot-filled region) following each symbol, are shown. Each symbol has first and second pulses, for example symbol  1093 A has the pulses  1097 A and  1097 B. The pulses  1097 A and  1097 B are each located in one of eight, for example, allowed time slots indicated at  1098  (typ.). The guard bands  1093 A– 1093 C may be fixed in size as shown. Each symbol may be spaced a fixed interval apart as shown, the interval being the maximum delay between spaced pulses plus the maximum length of each symbol. For example, the pulse spacing illustrated for symbol  1090 A is the largest permitted with a spacing of seven time slots giving it a symbol length of eight time slots. The guard band is the maximum delay of each gate, which is seven time slots. The spacing between each symbol is therefore 15 time slots, which is the maximum required to prevent, in any case, artifact pulse from a leading symbol from overlapping in a gate with a trailing symbol&#39;s pulses. The fixed symbol spacing may be obtained using any of the foregoing modulators in  FIGS. 21A–21C  or any pulse-spacing modulators discussed elsewhere in the specification. 
   Referring now to  FIG. 21G , a more efficient spacing of symbols employs a variable delay such as may be provided by modulators  1068  of  FIGS. 21A ,  1070  of  FIGS. 21B–21C  and  1084 A– 1084 C of  FIG. 21D , and sequence managers  1078  of  FIG. 21C and 1080  of  FIG. 21D . Here, the guard band following each symbol  1103 A– 1103 D begins immediately after the second pulse of each symbol  1100 A– 1100 D and its size is equal to the delay of the gate having the longest delay. Since the maximum delay between a pulse and any artifact produced from it is equal to the longest delay of a gate (as can be verified by inspection of  FIG. 21E ), this arrangement will produce no inter-symbol interference for a single layer system. 
   Referring to  FIG. 21J , the guard band delay can be eliminated in a series of time delay symbols  1260  while still preventing inter-symbol interference in the above embodiments and thereby increase symbol density. To do this, each pulse (e.g.,  1250 ,  1252 ,  1256  and so on) may be employed to define the time delay for a current symbol and as a reference pulse for the formation of a following symbol. More specifically, let pulse  1250  be a first reference pulse. Then pulse  1252  would produce a coincidence pulse in a gate with a time spacing of 1 time slot (having a  1  time slot difference between pulses  1250  and  1252 ). The Pulse  1256  would then produce a coincidence pulse in a gate with a time delay of 4 time slots (having a  4  time slots difference between pulses  1252  and  1256 ) and  1257  a coincidence pulse in a gate with a time delay of 7 time slots and so on. Delays are indicated in dimensional designations as shown at  1253 . Each pulse  1250 – 1256  thus serves a double role in indicating the time delay for a current symbol and serving as a reference for a following symbol. Several consecutive examples are shown in succession at P 01  through P 07 . 
   Using such a technique is very useful when multiple symbols are sent to the same destination. In such a case, a stream of pulses spaced by a specific time delay corresponding to a specific gate destination may be formed to direct information to this specific gate. In this case, each pulse serves double duty, as a pulse indicating the delay (time space) of a current symbol (data/control pulse) and as a reference pulse for the next following symbol (control/data pulse). This configuration allows saving in the number of pulses used to demultiplex information into the desired destinations. 
   The protocol of  FIG. 21J  can be implemented using a device as described with reference to any of the above modulators susceptible to dynamic control. 
   Referring now to  FIGS. 23A ,  23 B, and  23 C, gates, exemplified here by a dielectric beam splitter  1310  may provide signal control based on the relative phases of input signals. A signal  1315  at a first port includes a pulse  1325  whose phase is indicated as 0 with a field amplitude of √{square root over (2)}, results in outputs at the ports  1312  and  1313  of signals whose field amplitudes are both equal to unity. The phases of the outputs at ports  1312  and  1313  are indicated as 0 at  1345  and π/2 (j) at  1350 , respectively, because these represent the relative phase shift that occurs due to transmission and reflection by the beam splitter  1310  as discussed above. 
   A signal  1360  ( FIG. 23B ) incident at a second port includes a pulse  1355  whose phase is indicated as 3π/2 (−j) with a field amplitude of 2, results in output pulses  1341  and  1336  at the ports  1312  and  1313 , respectively, of signals whose field amplitudes are both equal to unity. The phases of the outputs at ports  1312  and  1313  are indicated as 0 at  1365  and 3π/2 (−j) at  1370 , respectively, because these represent the relative phase shift that occurs due to transmission and reflection by the beam splitter  1310  as discussed above. 
   When pulses  1395  and  1385  of  FIG. 23C  are incident together with respective phases 3π/2 and 0, all the energy is output at port  1312  as pulse  1390  whose field amplitude is 2 and whose phase is indicated as 0 at  1397 . No energy emerges from the second port  1313 . 
   Referring now to  FIGS. 23D–23F , showing same gate  1310  of  FIGS. 23A–23C , having output ports  1312  and  1313 . Analyzing  FIG. 23D  similarly as discussed above with respect of  FIG. 23A , if the phase of one of the input signals, e.g.,  1315 ′, is rotated by Ti, the similar results obtain for singly-incident pulses, but the port from which all of the output energy emerges when the input pulses are coincident shifts to the other port as will be observed. That is, a signal  1315 ′ at the first port includes a pulse  1325 ′ whose phase is indicated as π with a field amplitude of √{square root over (2)}, results in outputs at the ports  1312  and  1313  of signals whose field amplitudes are both equal to unity. The phases of the outputs at ports  1312  and  1313  are indicated as −π at  1345 ′ and 3π/2 at  1350 ′, respectively, because these represent the relative phase shift that occurs due to transmission and reflection by the beam splitter  1310  as discussed above. 
     FIG. 23E  is identical to that of  FIG. 23B . It is illustrated for the completeness of the steps towards the similar analysis of  FIG. 23F . The situation in  FIG. 23F  is identical to that in  FIG. 23C . When pulses  1385  and  1395 ′ are incident together with respective phases 3π/2 and −π, all the energy is output at port  1313  as pulse  1390 ′ whose field amplitude is 2 and whose phase is indicated as 3π/2 at  1397 ′. No energy emerges from the second port  1312 . 
   As will be observed, by controlling the relative phases of pulses at two input ports, the port from which energy is emitted can be controlled. The above effect is used in several switching and gating systems that are now discussed. An illustration of a means by which the relative phase may be used for a symbology is illustrated in  FIGS. 23G and 23H . 
   It is clear that similar behavior may be achieved with other summing devices and especially with those illustrated by  FIGS. 1A–1D ,  2 A– 2 C,  3 A– 3 C,  4 A– 4 E,  5 A– 5 C,  6 A– 6 C,  7 A– 7 B and  8 A– 8 E. 
   Referring now to  FIGS. 23G and 23H , a spaced pulse symbol  1404  with first and second pulses  1408 A and  1408 B having a spacing such that when the first pulse  1408 A is delayed and coherently summed in a gate  1406 , a coincidence pulse  1408  is produced at a first output  1406 A. The summing process that produces the coincidence pulse is illustrated by the vector representations with  1412 A and  1412 B representing the undelayed result of passing signal  1404 , and  1414 A and  1414 B representing the delayed result of passing signal  1404 . The configuration of the gate  1406  is such that the delayed and undelayed pulses  1412 B and  1414 A are coherently summed to produce coincidence signal  1408 . At the second output  1406 B, the interaction of the delayed and undelayed pulse pairs indicated at  1416 A,  1416 B and  1418 A,  1418 B, respectively, produce a destructive interference of pulses  1416 B and  1418 A and no coincidence pulse emerges from the second output  1406 B. Thus, √{square root over (2)}/2 of the field amplitude of the first pulse  1408 A is combined with √{square root over (2)}/2 of the field amplitude of second pulse  1408 B so the power in the coincidence pulse  1408  is double the power of either the first or second pulse  1408 A,  1408 B. The energy at the non coincidence output  1406 B is zero and thus the total energy in the inputs is preserved at the outputs. 
   Referring in particular to  FIG. 23H , the power of a single pulse can be preserved in a coincidence pulse emerging from the second output  1406 B of the same gate  1406  by providing a phase difference between incoming pulses  1438 A and  1438 B of π radians from the phase difference of pulses  1436 A and  1436 B (of  FIG. 23G ). Here, a spaced pulse symbol  1434  with first and second pulses  1438 A and  1438 B having a spacing such that when the first pulse  1438 A is delayed and coherently summed in the gate  1406 , a coincidence pulse  1438  is produced at the second output  1406 B. The summing process that produces the coincidence pulse  1438  at output  1406 B is illustrated by the vector representations with  1426 A and  1426 B representing the undelayed result of reflected signal  1434 , and  1428 A and  1428 B representing the delayed result of passing signal  1434 . The configuration of the gate  1406  is such that the delayed and undelayed pulses  1426 B and  1428 A are coherently summed. At the first output  1406 A, the interaction of the delayed and undelayed pulse pairs indicated at  1422 A,  1422 B and  1424 A,  1424 B, respectively, produce a destructive interference of pulses  1422 B and  1424 A and no coincidence pulse emerges from the first output  1406 A. Thus, √{square root over (2)}/2 of the field amplitude of the first pulse  1438 A is combined with √{square root over (2)}/2 of the field amplitude of the second pulse  1438 B so the power in the coincidence pulse  1438  is double the power of either the first or second pulse  1438 A,  1438 B. The energy at the non coincidence output  1406 A is zero and thus the total energy in the coincidence pulses of the inputs is preserved at the outputs. 
   It should be noted that the pulses in  FIGS. 23G and 23H  are presented by their intensity and their phase as illustrated by the phase arrows as discussed above. 
   Referring to  FIG. 23I , the pulses spacing and the relative phases of spaced pulses can be used to create a symbology for selecting output ports. Each pulse duplicator ( 1456 A– 1456 F) output port is characterized by a pulse spacing, which selects a gate as discussed with regard to previous embodiments, and the relative phases of the pulses selects one of two output ports of the gate. A multiplexer receives pulses from a source, for example a mode locked laser as indicated at  1454 . As in prior embodiments, the pulses can be duplicated by a pulse duplicator  1465  (similar to duplicator  803 D of  FIG. 15C ) to increase their density and distributed by a manifold  1464  to multiple parallel channels  1462  (typ.) such that pulses are applied to each channel  1462  (typ.), perhaps with a respective delay relative to those applied to the other channels  1462  (typ.) Relative delays (for interleaving) may be introduced by way of delays  1460 A– 1460 F in respective channels  1462  (typ.). The modulators  1453  (typ.) control whether a pulse passes or not on a specific channel as required by a source signal  1450  (typ.) which may represent separate signals or elements of a single signal (vector). 
   Pulse duplicators  1456 A– 1456 F each duplicate an output pulse from a respective modulator  1453  (typ.) with a unique combination of pulse spacing plus phase difference as indicated by symbols  1470 A– 1470 F. The latter are interleaved onto a common channel  1481  by a combiner  1468  which transmits it to a receiver  1482 . The received signal from common channel  1481 , which may be miles long or just a fraction of an inch, is distributed among multiple gates, exemplified by three  1471 ,  1472  and  1473 . Each gate  1471 ,  1472  and  1473  has two outputs:  1471 A and  1471 B for gate  1471 ,  1472 A and  1472 B for gate  1472 , and  1473 A and  1473 B for gate  1473 . Each output  1471 A and  1471 B for gate  1471 ,  1472 A and  1472 B for gate  1472 , and  1473 A and  1473 B for gate  1473  corresponds to a particular symbol  1470 A– 1470 F such that only one will produce a coincidence pulse when a given symbol is sent through the common channel  1481 . Each output  1471 A and  1471 B for gate  1471 ,  1472 A and  1472 B for gate  1472 , and  1473 A and  1473 B for gate  1473  corresponds to a unique combination of pulse spacing  1542  indicated by time Δt (typ.), which selects one gate  1471 ,  1472  or  1473  and phase difference  1544  indicated by the phase φ (typ.) between the pulses, which selects the output  1471 A or  14711 B if gate  1471  is selected,  1472 A or  1472 B if gate  1472  is selected, or  1473 A or  1473 B if gate  1473  is selected. Note that pulses drawn upside down represent a phase shift of π radians. 
   As will be evident from the above description by using a combination of phase and time delay, the number of outputs that can be selected can be doubled over using time delay alone. Also, the dilution of signal energy is reduced by half because the pulse intensity is preserved across a gate that adds coherently and energy does not have to be diluted among ports of a given gate. 
   Referring now to  FIG. 23J , a multiplexer  1521  places the signals from eight data channels  1519 A– 1519 H (the number of channels being arbitrarily chosen for illustration) onto a single data channel  1531  in which each channel is “labeled” with different symbols  1540 A– 1540 H consisting of a combination of pulses with respective phase relationships. Referring momentarily in particular to  FIGS. 23K and 23M , each symbol, here exemplified by that for channel  1519 A has eight pulses P 1 –P 8 . The first four pulses P 1 –P 4  are summed as indicated by the relationship between signals  1543 A and  1543 B to produce a coincidence signal (plus artifact) as indicated at  1543 C. This summing occurs in the first gate  1530  of a binary tree structure of  FIG. 23J . 
   Referring now also to  FIGS. 23K ,  23 L,  23 M in particular, in the example signal  1540 A and another sample signal  1540 G, high-going pulses such as P 10  of  FIG. 23L  represent pulses with a particular phase angle and low-going pulses such as P 11  of FIG.  23 L represent pulses with a phase angle that is π radians ahead, or behind, that of high-going pulses such as P 10 . The first four pulses P 1 –P 4  of symbol  1540 A are summed (summation shown at  1547 A) based on a time difference such that the time shift is indicated by the relationship between signals  1543 A and delayed  1543 B (as shown at  1547 A) to produce a coincidence signal (plus artifact) as indicated at  1543 C. That is, the time shift (internal delay) of the first gate  1530  is equal to the spacing between pulse P 1  and P 5 . The resulting coincidence signal  1543 C emerges from one of the outputs of gate  1530 , in the embodiment, output  1530 A of  FIG. 23J . The coincidence signal  1543 C contains a portion  15431  that results from summing so it is enhanced with the remainder being non-coincidence and so its amplitude is diminished. If P 1 –P 4  had the opposite phase, the summing would have produced the coincidence signal from output  1530 B instead of output  1530 A. 
   Another summation  1547 B occurs in gate  1533 , which results in a coincidence signal  1543 E and is output from output  1533 A. Finally, yet another summation  1547 C occurs in gate  1535 , which results in a final coincidence signal  1543 G and is output from output  1535 A. It will be observed from the foregoing that the height of the coincidence pulse  1543 H incurs substantially zero degradation through the gates  1530 ,  1533  and  1535  at ports  1530 A,  1533 A and  1535 A, respectively, because phase is used to perform the gating through the successive layers. 
   It may be confirmed by inspection that the various pulses patterns  1540 A– 1540 H shall propagate accordingly: 
   Pattern  1540 A will produce a coincidence pulse at output  1535 A as discussed above. 
   Pattern  1540 B will choose output  1530 B, but will thereafter propagate through  1532 A and out from output  1539 A. 
   Pattern  1540 C will choose output  1530 A of gate  1530  and output  1533 B of gate  1533  and then output  1537 A of gate  1537 . 
   Pattern  1540 D will choose output  1530 B of gate  1530 , output  1532 B of gate  1532  and output  1541 A of gate  1541 . 
   Pattern  1540 E will choose output  1530 A of gate  1530 , output  1533 A of gate  1533  and output  1535 B of gate  1535 . 
   Pattern  1540 F will choose output  1530 B of gate  1530 , output  1532 A of gate  1532  and output  1539 B of gate  1539 . 
   Pattern  1540 G will choose output  1530 A of gate  1530 , output  1533 B of gate  1533  and output  1537 B of gate  1537 . 
   Pattern  1540 H will choose output  1530 B of gate  1530 , output  1532 B of gate  1532  and output  1541 B of gate  1541 . 
   As may be also be confirmed by inspection, the above binary tree format may be extended to any number of final outputs and the eight shown here was a number arbitrarily chosen for illustration. 
   While the above description contains many details, these should not be considered as limitations on the scope of the invention, but as examples of the presently preferred embodiments thereof. Many other ramifications and variations are possible within the teachings to the invention. 
   For example the all-optical switches, modulators, encoding and decoding systems, interleaving and multiplexing systems, and demultiplexing systems have been described for use in communication networks. However they can be used in other optical systems as well, such as systems used for optical backplanes, optical storage networks and optical computing. They also can be used as optical components, devices, and systems in Ethernet systems. Although the invention been described using the examples of Dense Time Division Multiplexing (DTDM) and self-triggered CDM it can be used for producing very narrow pulses to perform standard techniques, such as TDM, ATM and packets routing. 
   Although some systems have been described as modulators they also can be operated as switches. While some all-optical encoding and multiplexing systems have been described using sub-units operating as modulators, the situation can be reversed, i.e., the operation of these same sub-units can be change to serve as switches in decoding and demultiplexing systems. Though some switches and modulators have been described with one output they can include multiple outputs. While the modulators and the switches have been described as containing gratings or phase arrays, they can also include other interference devices that are capable of changing their pitch according to the illumination conditions. Although the gratings and phase arrays have been described as having one ore three interference orders, they are not limited to these numbers of interference orders. While some of the switches and the modulators are illustrated without optical amplifiers they can be integrated with optical amplifiers, such as a Europium Doped Optical Fiber Amplifiers (EDOFA), Solid-state Optical Amplifiers (SOA) or Linear Optical Amplifiers (LOA). 
   While some coincidence gates are illustrated when receiving the signal at their inputs from a single source they may receive the signals from different sources. 
   While some of the embodiments illustrated in media of open space, radiation guides, fiber optics, waveguides, planar waveguides on a chip, each of them may be produced in any of these media. 
   Thus the scope of the invention should be determined by the appended claims and their legal equivalents, and not by the examples given. 
   It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. 
   The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.