Patent Publication Number: US-7714643-B1

Title: Tuning of analog filters

Description:
BACKGROUND 
   1. Field of the Invention 
   The invention generally relates to electronics. In particular, the invention relates to communication systems in which analog filters are tuned. 
   2. Description of the Related Art 
   Analog filters are widely used in radio transceivers. Typically, a communication device uses assigned channels with given bandwidth. In a transmitter, analog filters are employed to reduce signal leakage to adjacent channels and meet the requirements of a transmission spectral mask. In a receiver, analog filters are used to pass signals in the desired channel while suppressing interference from other channels. Requirements for analog filters in radio transceivers can be specified by filter parameters such as time-constant, cutoff frequency, passband flatness, stopband attenuation, group delay, etc. Since an analog filter can vary significantly with manufacturing process and temperature variation, an analog filter should be tunable to accommodate the variability. In addition, wireless communication systems have been moving towards a single device that can support multiple standards and operate in various environments. This also requires analog filters to be tunable and configurable to ease system complexity and reduce cost. 
   In phase-response based filter tuning methods, an analog filter is tuned such that the phase shift between the test signal and the filtered signal matches a desired phase shift. See, for example, U.S. Pat. No. 7,103,334 to Kumar and A Digital Automatic Tuning Technique for High-Order Continuous-Time Filters, by Taner et al, IEEE Transactions on Circuits and Systems I, vol. 51, no. 10, pp. 1975-1984, October 2004. A test signal at a pre-defined limited number of frequencies is used to generate a filtered signal. This way, a filter is tuned at only the specified frequencies regardless of its amplitude response and phase response at other frequencies. However, it may not be practical to isolate an analog filter from the rest of circuits in a system. Circuits other than the filter being tuned in the signal path can cause a phase shift of the filtered signal. This can lead to an inaccurate estimation of the actual phase shift due to the analog filter, and, therefore to a degradation in tuning performance. 
   In time-constant-based filter tuning methods, an analog filter&#39;s cutoff frequency is tuned by measuring and adjusting a time constant associated with the cutoff frequency. See, for example, U.S. Pat. No. 7,057,451 to Lou, et al., A Mixed-Signal Approach for Tuning Continuous-Time Low-Pass Filters, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 51, no. 6, pp. 307-314, June, 2004, Anthony et al, and U.S. Pat. No. 7,002,404, by Gaggl, et al. 
   Since the time constant is determined by the product of resistance and capacitance values in the filter circuits, the filter tuning result is sensitive to other circuits in the signal path used for measuring the time constant. Moreover, the time-constant based methods are typically only suitable for the tuning of single-stage RC filters. In general, a multi-stage analog filter has several low-order analog filters, which are separated by other circuits in a system. Thus, both the phase-response and time-constant based methods can only tune a multi-stage analog filter stage by stage, which leaves the combined overall performance uncertain. 
   In master-slave tuning methods, an analog filter is tuned at the cost of using an additional analog master filter that is identical in design to the operating analog filter. See, for example,  A Single - Chip Dual - Band Tri - Mode CMOS Transceiver for IEEE  802.11 a/b/g Wireless LAN , by Masoud et al, IEEE Journal of Solid-State Circuits, vol. 39, no. 12, pp. 2239-2249, December, 2004 and U.S. Pat. No. 7,078,960 by Ezell. Instead of tuning the operating slave filter, the master analog filter is tuned, and the tuning results are then applied to the slave filter. The advantage of master-slave methods is that the slave filter in use can be tuned without interrupting ongoing communications. However, these methods require a relatively large die area, and variations between the master and slave can impair the accuracy of the actual tuning. 
   SUMMARY 
   When an analog filter is inserted into a system, the analog filter can be difficult to tune because of the difficulty in observing the analog filter&#39;s characteristics without being interfered by other circuits in the system. In one embodiment, analog filters are bypassed, and a response is determined. To this response, a time-invariant digital filter is applied to generate a reference response, such as an ideal response. The analog filters are then enabled and adjusted so that the difference between the response of the system and the reference response is minimized. This technique can be applied to arbitrary-order filters and can be used even when other circuits affect the observed filter response. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     These drawings and the associated description herein are provided to illustrate specific embodiments of the invention and are not intended to be limiting. 
       FIG. 1  illustrates how other circuits can induce observation errors. 
       FIG. 2  illustrates a mathematical model of transfer-function based filter tuning. 
       FIG. 3  illustrates a spectrum of a periodic orthogonal frequency division multiplexing (OFDM) test signal for analog filter tuning. 
       FIG. 4  illustrates an embodiment of an apparatus for analog filter tuning 
       FIG. 5  is a schematic that illustrates a filter-tuning digital signal processing (DSP) for the embodiment illustrated in  FIG. 4 . 
       FIG. 6  is a schematic of a direct-conversion radio transceiver that incorporates the filter tuning system. 
       FIG. 7  illustrates a process for filter tuning illustrated in the context of a direct conversion radio transceiver. 
   

   DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS 
   Disclosed techniques enable tuning of arbitrary-order analog filters and multi-stage analog filters in terms of a desired filter transfer function. This leads to superior performance which translates into reduced system complexity and cost. 
   Although particular embodiments are described herein, other embodiments of the invention, including embodiments that do not provide all of the benefits and features set forth herein, will be apparent to those of ordinary skill in the art. 
   Typical air-interface standards of communication systems have stringent requirements on adjacent interference rejection (receiver) and transmission spectral mask (transmitter). In order to meet these requirements, an analog filter typically uses on-chip tuning to correct variability over, for example, temperature and manufacturing processes and to set the filter to a desired state. 
   Techniques for filter tuning based on a transfer function of an analog filter are disclosed. For example, such techniques can be used to (1) tune multiple filter parameters to meet more than one filter specification at the same time; and (2) compensate for filter observation errors due to circuits other than the analog filter itself, which enables tuning of multi-stage analog filters. 
   The tuning of multiple filter parameters can be difficult. In communication devices, an analog filter, particularly a relatively high-order (&gt;2) analog filter, typically needs to meet multiple requirements such as passband flatness, stopband attenuation, cutoff frequency, group delay, etc. In general, the satisfaction of one requirement cannot guarantee the satisfaction of other requirements. Conventional filter tuning methods that tune an analog filter based on a single filter parameter have limited tuning range and solution space. As a result, it is difficult and costly to satisfy filter requirements over temperature and process variation. 
   Other circuits cause observation error of analog filter characteristics and affect filter tuning performance. For example, in a system on a chip (SoC), it can be impractical to isolate an analog filter  120  from its interconnected circuits. As shown in  FIG. 1 , circuits  110 ,  130  other than the analog filter  120  in the signal path for filter tuning leads to observation errors of the analog filter  120  being tuned. The transfer function Ĥ a  (s) of the observed filter  140  is expressed in Equation 1.
 
 Ĥ   a ( s )= H   1 ( s ) H   a ( s ) H   2 ( s )  Eq. 1
 
   The overall transfer function Ĥ a  (s) is a product of the actual transfer function H a (s) of the analog filter  120  being tuned, and transfer functions H 1 (s) and H 2 (s) of other circuits  110 ,  130  in the signal path. This illustrates the difficulties in observing the analog filter  120 , which affects tuning of the analog filter  120 . This problem becomes more serious for a multi-stage analog filter which can include, for example, several low-order filters scattered throughout a system. In such cases, a multi-stage analog filter is typically tuned stage-by-stage, which leaves the overall performance uncertain. 
   Techniques improve the performance of analog filters in, for example, system on a chip (SoC) applications and permit tuning of multi-stage high-order analog filters. In the illustrated embodiments, the analog filter  120  ( FIG. 1 ) is tuned using a desired transfer function. However, in alternate embodiments, the analog filter  120  can be tuned to a desired impulse response. 
   Based on the transfer function desired for the analog filter  120  to be tuned, a time-invariant infinite impulse response (IIR) filter is derived that has a corresponding impulse response. The analog filter is then tuned such that its response to a periodic test signal matches relatively well, such as a best match, to that of the time-invariant IIR filter. The matching permits the analog filter  120  to meet multiple requirements such as passband flatness, cutoff frequency, stopband attenuation, group delay, etc. Since the analog filter  120  is uniquely defined by its transfer function or, alternatively, its impulse response, the analog filter  120  can be tuned to the intended design. 
   The disclosed tuning technique has the following advantages. The tuning technique is capable of tuning multiple filter parameters to meet more than one filter requirement at the same time. The tuning technique is capable of tuning an arbitrary-order analog filter. The tuning technique can compensate for observation errors induced by other circuits than the particular analog filter to be tuned and makes practical, the tuning of multiple-stage analog filters. 
   The filter tuning technique uses two signal paths for filter tuning. One is used to generate the reference filter response, and the other one is used to observe the analog filter&#39;s response during the tuning process. The two signal paths are designed such that they have common circuits except for the analog filter being tuned. In this way, circuits other than the analog filter being tuned have a common-mode effect on the reference response and the observed analog filter&#39;s response. 
   In one embodiment, the analog filter is tuned by minimizing the difference between the reference filter response and the observed analog filter&#39;s response. The filter tuning is not affected by the observed filter response error due to other circuits in the two signal paths. This unique architecture leads to superior performance. It can tune an analog filter accurately without requiring the isolation of the analog filter from the rest circuits during the tuning process. In addition, it simplifies system design by avoiding the need for an additional master analog filter as in the master-slave tuning methods. This attribute is particular useful for a system on a chip (SoC) application that can have a multiple-stage analog filter with, for example, several low-order filters scattered throughout the system. It enables tuning of the overall multiple-stage analog filter without the cumulative error of stage-by-stage tuning of the multiple-stage analog filter. 
     FIG. 2  illustrates a mathematical model describing the analog filter tuning technique. A time-invariant IIR filter is first derived based on the desired transfer function H a    202  of the analog filter  120  ( FIG. 1 ) to be tuned such that the derived IIR filter has the same impulse response as the analog filter&#39;s impulse response sampled at frequency f s . The sampled impulse response h a (nT)  204  of the desired analog filter is expressed in Equation 2.
   h   a ( nT )= L   −1   [H   a ( s )]| t=nT   Eq. 2 
   In Equation 2, the period 
           T   =     1     f   s             
represents the ADC sampling interval. The time-invariant IIR filter transfer function H d  (z)  206  is expressed in Equation 3.
   H   d ( z )= TZ[h   a ( nT )]= TZ{L   −1   [H   a ( s )]| t=nT}   Eq. 3 
   Given a periodic test signal x(t)  208  and equivalent impulse response g(t) of other circuits  210  which may exist in the signal path for filter tuning, a reference filter response r(nT)  212  is expressed in Equation 4.
 
 r ( nT )={[ x ( t )* g ( t )] t=nT   }*h   a ( nT )  Eq. 4
 
   The reference filter response r(nT)  212  is obtained by filtering the sampled test signal using the time-invariant IIR filter  214 . If ĥ a (t) represents the actual impulse response of the analog filter  120  being tuned, the analog filter&#39;s response {circumflex over (r)}(nT)  216  to the test signal sampled at frequency f s  is expressed in Equation 5.
 
 {circumflex over (r)} ( nT )=└ x ( t )* g ( t )* ĥ   a ( t )┘ t=nT   Eq. 5
 
   The analog filter  120  is tuned by adjusting its tunable parameters to minimize the difference between the reference response  212  and sampled analog filter&#39;s response  216 . Examples of the tunable filter parameters p={p 1 , p 2 , p k } are resistance, capacitance, transconductance, or other parameters depending on the particular configuration of analog filter  120 . In one embodiment, a least squares algorithm as expressed in Equation 6 is used to minimize the matching error. 
   
     
       
         
           
             
               
                 
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   In Equation 6, N is the number of samples during one period of the test signal, and R is the solution space. Another algorithm that can be used is the recursive least square algorithm. Other applicable algorithms will be readily determined by one of ordinary skill in the art. 
   The periodic test signal x(t)  208  used for filter tuning can be any periodic signal depending on the specific application. In one embodiment, the periodic test signal x(t)  208  is initialized at a particular phase for each response capture so that responses from various configurations of the circuit are comparable. In one embodiment, the periodic test signal  208  corresponds to a periodic real orthogonal frequency-division multiplexing (OFDM) signal as shown in  FIG. 3 . An OFDM signal has a flat and conjugate symmetric spectrum across the populated sub-carriers. A number of sub-carriers are populated with equal power. Let x f (n) for 
             n   =     -     N   2         ,   …   ⁢           ,     -   1     ,   1   ,   …   ⁢           ,     N   2           
represents the nth bin of the sampled test signal in frequency domain and M represents the number of sub-carrier being populated, the periodic test signal  208  preferably satisfies the following constraints expressed in Equations 7 and 8:
 
   
     
       
         
           
             
               
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   The bandwidth B can be 100% to 200% of the intended passband bandwidth of the analog filter depending on the effectiveness of the alias rejection and the sampling frequency. For communication devices with quadrature amplitude modulation, the use of a real OFDM test signal enables independent tuning of analog filters in in-phase and quadrature paths. 
     FIG. 4  illustrates an embodiment of an apparatus for analog filter tuning. The analog filter tuning system includes a filter tuning DSP engine  402 , a periodic test signal generator  404 , a first “other” circuit in the signal path  406 , a first demultiplexer  408 , a first stage  120   a  of the analog filter  120 , a first multiplexer  430 , a second “other” circuit in the signal path  410 , a second demultiplexer  412 , a second stage  120   b  of the analog filter  120  (shown generically as stage K), a second multiplexer  432 , an analog-to-digital converter (ADC)  414 , and a trigger  416  for capturing at the DSP engine  402 . The function provided by the demultiplexers  408 ,  412  and the multiplexers  430 ,  432  can also be implemented by controlled switches. One embodiment of the filter-tuning DSP engine  402  will be described in greater detail later in connection with  FIG. 5 . 
   The analog filter  120  to be tuned can comprise one or more stages. The precise number will vary depending on the design. Extra stages are optional. In the illustrated embodiment, two different stages  120   a ,  120   b  of the analog filter  120  are tuned. In  FIG. 4 , blocks  406 ,  410 ,  412 ,  422 ,  120   b  with dashed lines represent circuits for the example with the extra stage  120   b  of the analog filter  120   a ,  120   b  to be tuned. 
   The filter tuning system has two signal paths  420 ,  422 . One signal path  420  is used to generate a reference filter response and the other signal path  422  is used to observe the analog filter&#39;s response during tuning process. 
   The two signal paths  420 ,  422  are preferably configured so that circuits other than the stages  120   a ,  120   b  of the analog filter  120  being tuned have a common-mode effect on the observed analog filter&#39;s response and the reference response. The switching between these two signal paths  420 ,  422  is controlled by control signal BYPASS_ENB, demultiplexers  408 ,  412 , and multiplexers  430 ,  432 . If the signal path  422  for the reference response generation is selected, the stages  120   a ,  120   b  of the analog filter  120  are bypassed. The input signal to the DSP engine  402  is fed into a time-invariant IIR filter and a reference filter response is formed. If the signal path  420  for analog filter observation is selected, the analog filter  120  operates in normal mode. At the DSP engine  402 , the analog filter&#39;s response is captured and compared with the reference filter response until it is tuned to the desired state. 
   As illustrated in  FIGS. 4 and 5 , the two signal paths  420 ,  422  have common circuits except for the stages  120   a ,  120   b  of the analog filter  120  being tuned and its time-invariant counterpart. Circuits  406 ,  410  other than the analog filter  120  being tuned have a common-mode effect on the reference filter response and the observed analog filter&#39;s response. As a result, filter tuning results are immune to filter observation errors caused by filter-like circuits in the signal path and multiple stages  120   a ,  120   b  of the analog filter  120  can be tuned at the same time. 
   In the illustrated embodiment, the periodic test signal generator  404  and signal capturing at the DSP engine  402  are synchronously triggered by control signal SYNC_SIG_TRIG_CAP. Because of the synchronous triggering, the periodic test signal x(t) advantageously has the same initial phase for both the reference response generation and the observation of the analog filter&#39;s response, and, therefore fractional-sample delay estimation is not required in the calculation of the matching error. 
     FIG. 5  is a schematic that illustrates an embodiment of the DSP filter-tuning engine  402 . The illustrated embodiment of the DSP filter tuning engine  402  includes a time-invariant IIR filter  502 , a delay estimator  504 , a gain estimator  505 , buffers  506 ,  508 , a filter control unit  510 , and pre-computed look-up table (LUT)  512  for the time-invariant IIR filter&#39;s coefficients. The time-invariant IIR filter&#39;s coefficients are selected based on the desired transfer function of the analog filter  120  and the ADC sampling frequency. If the signal path  422  for the reference filter response is selected, the captured signal at the ADC  414  is provided as an input to the time-invariant IIR filter  502 . N output samples of the time-invariant IIR filter  502  are buffered  506  and used as the reference filter response. If the signal path  420  for filter observation is selected, the signal captured at ADC  414  is aligned with the reference filter response in terms of gain and phase. The matching error is computed and the analog filter is tuned by minimizing the matching error between the reference filter response and the observed analog filter&#39;s response. The DSP filter tuning engine  402  may be embodied by a hardware specific circuit, by a software/firmware algorithm running on a processor, such as a microprocessor, microcontroller, general-purpose DSP, or the like, or by a combination of the same. 
     FIG. 6  is a schematic of a direct-conversion radio transceiver that incorporates the filter tuning system. The direct-conversion radio transceiver has been augmented with filter bypass control  601  and four additional blocks  602 ,  604 ,  606 ,  402  for filter tuning. A pattern generator  602  generates a periodic OFDM test signal dedicated to filter tuning. The baseband loopback block  604 , or alternatively, the RF loopback block  606 , connects TX with RX to form a signal path for the generation of reference filter response and the observation of the analog filter&#39;s response. The DSP filter tuning engine  402  processes the captured RX signal and finds a relatively good, such as, but not limited to, the optimum filter configuration. 
   An example of a filter tuning process for a direct-conversion radio transceiver is illustrated in  FIG. 7 . The process can be embodied in hardware, firmware, software, or any combination of the same. It will be appreciated by the skilled practitioner that the illustrated process can be modified in a variety of ways. For example, in another embodiment, various portions of the illustrated process can be combined, can be rearranged in an alternate sequence, can be removed, or the like. 
   In the decision block  702 , the process determines whether to tune a transmitter filter or a receiver filter. States  704 ,  706 ,  708 ,  710  set the filters in appropriate modes. Bypass modes were described earlier in connection with  FIG. 4 . In an anti-alias mode, analog filters are set to active, and depending on a specific system, an appropriate passband bandwidth can be selected to prevent aliasing the test signal. In a state  720 , an OFDM test signal is generated. In state  722 , the propagated signal is captured at RX, with applicable analog filter stages to be tuned bypassed. In state  726 , a time-invariant IIR filter is selected based on the configuration desired for the analog filter  120  to be tuned. The IIR filter is then applied to the signal captured in the state  722 , resulting in the desired response r. 
   In the decision block  730 , the process determines again a transmitter filter or a receiver filter is being tuned. Of course, the determination in the decision block  730  should be the same as the determination in the decision block  702 . 
   A variety of techniques can be used to tune the one or more stages of the analog filter  120 . For example, an adaptive method can be used. In the illustrated process for discrete tunable filters, a brute force technique is used, and the response   of a number K of analog filter configurations are assessed versus the desired response r. The number K is at least two. In one embodiment, the number K is a predetermined number. A variable k is used in the process as a loop counter, which is initialized to 0 in the state  736 . 
   In states  740 ,  742 ,  744 ,  746 ,  748 , the particular filter configuration is evaluated. In the illustrated embodiment, the mismatch error e is maintained for each value of k (each unique configuration assessed). In decision block  760 , the process determines whether to repeat the process for a new configuration via state  750 . Else, the process proceeds to the state  762 , where the configuration with the least mismatch error e is found for across the values of k, and the corresponding configuration with the minimum mismatch is selected for use  764 . 
   Various embodiments have been described above. Although described with reference to these specific embodiments, the descriptions are intended to be illustrative and are not intended to be limiting. Various modifications and applications may occur to those skilled in the art.