Patent Publication Number: US-10763749-B2

Title: Multi-resonant converter power supply

Description:
TECHNICAL FIELD 
     The present disclosure relates generally to voltage converters, and more particularly, to multi-resonant converters. 
     BACKGROUND 
     DC-to-DC converters are used to convert a DC voltage at one level to a DC voltage at another level and deliver power to a load. Such convertors typically comprise a transformer, which provides power transfer from input to output as a voltage converter. The transformer may also provide galvanic isolation between input and output in most applications. In conventional resonant topologies, a transformer is typically needed for wide voltage conversion ranges from input to output for good efficiency. Use of a transformer, however, limits the switching frequency due to core loss at higher frequencies and has additional drawbacks such as complex circuitry, large size, and high cost. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  illustrates an example of a step-down Multi-Resonant Converter (MRC), in accordance with one embodiment. 
         FIG. 2  illustrates operation of the MRC shown in  FIG. 1 . 
         FIG. 3  illustrates an example of a high voltage-ratio step-down MRC, in accordance with one embodiment. 
         FIG. 4  illustrates operation of the MRC shown in  FIG. 3 . 
         FIG. 5  illustrates additional detail of operation of the MRC shown in  FIG. 3  in a power storage stage and power transfer stage. 
         FIG. 6  illustrates an example of an MRC step-down-up buck-boost, in accordance with one embodiment. 
         FIG. 7  illustrates operation of the MRC shown in  FIG. 6 . 
         FIG. 8A  illustrates an example of an MRC step-up-down boost-buck, in accordance with one embodiment. 
         FIG. 8B  illustrates an example of an MRC step-up boost-boost, in accordance with one embodiment. 
         FIG. 9  is a block diagram illustrating implementation of the MRC as a point-of-load power supply on a line card or fabric card, in accordance with one embodiment. 
         FIG. 10  is an example illustrating implementation of the MRC topology of  FIG. 6  in an AC/DC PFC (Power Factor Correction) MRC stage to isolated DC/DC converter. 
         FIG. 11A  is an example illustrating implementation of the step-down MRC topology of  FIG. 1  in a DC/DC isolated MRC with a forward converter transformer stage. 
         FIG. 11B  is an example illustrating implementation of the step-up MRC topology of  FIG. 6  in a DC/DC isolated MRC with a forward converter transformer stage. 
         FIGS. 12A and 12B  are examples illustrating implementation of an isolated MRC with flyback PWM of the resonant capacitor and a second resonant switched stage with a synchronous rectifier. 
     
    
    
     Corresponding reference characters indicate corresponding parts throughout the several views of the drawings. 
     DESCRIPTION OF EXAMPLE EMBODIMENTS 
     Overview 
     In one embodiment, an apparatus generally comprises a first stage comprising a first active switch, a first resonant inductor, and a resonant capacitor and a second stage comprising a second active switch, a second resonant inductor, and a filter capacitor. The first and second stages form a non-isolated multi-resonant converter topology for converting a DC input voltage to a DC output voltage. 
     The non-isolated multi-resonant converter may comprise a step-down converter or a step-up converter. In one or more embodiments, one or both stages comprise a synchronous rectifier. In one or more embodiments, the first and second resonant inductors operate with currents in discontinuous mode and a voltage at the resonant capacitor discharges to zero on each of a plurality of cycles. In one or more embodiments, both stages operate in discontinuous current mode with zero-current turn-on, the first stage operating at zero-current turn-off at a maximum duty cycle, and the second stage operating at zero-current turn-off at ninety degrees of a half-sine transfer pulse current. In one or more embodiments, the first stage is configured to use pulse width modulation or frequency modulation to regulate a charge stored on the resonant capacitor to regulate output voltage and current. In one or more embodiments, the second resonant inductor comprises a tapped inductor. 
     In another embodiment, an apparatus generally comprises a card for insertion into a network device, the card comprising a point-of-load power supply comprising a first stage comprising a first switch, a first inductor, and a resonant capacitor and a second stage comprising a second switch, a second inductor, and a filter capacitor. The first stage comprises a power regulation resonant stage and the second stage comprises a voltage converter stage to form a non-isolated multi-resonant converter. 
     In yet another embodiment, an apparatus generally comprises a point-of-load power supply comprising a first stage comprising a first active switch, a resonant inductor, and a resonant capacitor and a second stage comprising a second active switch, a tapped resonant inductor, and a filter capacitor. The first stage and second stage form a non-isolated multi-resonant converter for converting a DC input voltage to a DC output voltage with a step-down voltage conversion with a large input-to-output ratio example of 48 volts to 1 volt or a step-up voltage conversion with a large input-to-output ratio example of 48 volts to 400 volts. 
     Further understanding of the features and advantages of the embodiments described herein may be realized by reference to the remaining portions of the specification and the attached drawings. 
     Example Embodiments 
     The following description is presented to enable one of ordinary skill in the art to make and use the embodiments. Descriptions of specific embodiments and applications are provided only as examples, and various modifications will be readily apparent to those skilled in the art. The general principles described herein may be applied to other applications without departing from the scope of the embodiments. Thus, the embodiments are not to be limited to those shown, but are to be accorded the widest scope consistent with the principles and features described herein. For purpose of clarity, details relating to technical material that is known in the technical fields related to the embodiments have not been described in detail. 
     One or more embodiments described herein provide a two-stage, two-switch, multi-resonant voltage converter operable to provide wide-range (high voltage conversion ratio) input-to-output voltages, step-up or step-down, without a transformer for higher frequency, and high efficiency with fewer parts, smaller space requirements, and lower cost. As described in detail below, the topology combines a resonant or quasi-resonant first stage for power regulation and a second stage that acts as a voltage converter thereby enabling a wide voltage conversion range with high efficiency. In one or more embodiments, the topology may provide a DC/DC non-isolated power supply comprising a two-stage, two-switch multi-resonant converter (MRC) with quasi-resonant or full-resonant operation in one or both stages that provides voltage conversion over wide voltage ratios of up-conversion or down-conversion at high efficiency. 
     The embodiments described herein provide higher frequency and efficiency with fewer components for high power density. In one or more embodiments, higher efficiency is provided with soft switching resonant or quasi-resonant charging and discharging stages and higher frequency is provided without transformers typically needed for high voltage ratio conversion for step-down or step-up converters. Soft-switching in most phases provides high efficiency and lower stresses on switches and components. 
     As previously noted, one or more embodiments provide large voltage conversion ratios as a down-converter or up-converter without a transformer or losses in performance. Thus, a high voltage-ratio step-down or step-up converter may be implemented using the embodiments described herein without the need for a transformer. By eliminating the need for a transformer for wide voltage conversion, very high frequencies may be used with smaller size packages and higher efficiency. In one or more embodiments, the converter provides flexible voltage or current regulation including pulse width modulation (PWM), frequency modulation (FM), or both pulse width modulation and frequency modulation. 
     Referring now to the drawings, and first to  FIG. 1 , an example of a multi-resonant converter (MRC) power supply circuit, generally indicated at  10 , is shown in accordance with one embodiment. In the example shown in  FIG. 1 , the MRC  10  is a two-stage, two-switch resonant-buck-buck converter. A first stage  9  comprises a first active switch  12  (Q 1 ), a first resonating inductor  13  (L R1 ), a resonant capacitor  14  (C R ), and a first synchronous rectifier  15  (Q 2 ). A second stage  11  comprises a second active switch  16  (Q 3 ), a second resonating inductor  17  (L R2 ), a filter capacitor  18  (C F ), and a second synchronous rectifier  19  (Q 4 ). A DC input voltage V in  (DC voltage source) is converted to a DC output voltage to be imposed across a load represented by resistor R L . The first inductor L R1  is electrically coupled in series with the first switch Q 1  and the resonant capacitor C R . The second inductor L R2  is electrically coupled in series with the second switch Q 3  and the filter capacitor C F . The synchronous rectifiers Q 2  and Q 4  are in parallel with the capacitors C R  and C F . The resistor R L  is connected in parallel with the capacitor C F  to form a load. As described in detail below, resonant power transfer is provided between an input LC charge storage stage (first stage  9 ) to output voltage conversion stage (second stage  11 ) to output capacitor C F  and load R L . The first and second stages form a non-isolated multi-resonant converter for converting a DC input voltage to a DC output voltage. 
     The switches Q 1  and Q 3  and synchronous rectifiers Q 2  and Q 4  may comprise any suitable actively controlled switching device (active switch) capable of operating at the desired switching frequency, such as a Metal Oxide semiconductor Field Effect Transistor (MOSFET), a Bipolar Junction Transistor (BJT), a Gallium Nitride Field Effect Transistor (GaNFET), or a solid state relay (SSR). Closing and opening of the switches may be managed by control logic coupled to the switch (not shown). The control logic may be part of a processor or a separate integrated circuit such as a pulse width modulation (PWM) controller. The voltage step-down for the MRC topology shown in  FIG. 1  may be, for example, 50 volts to 25 volts (50:25V) or other suitable ratio. 
     The MRC  10  generally stores an energy voltage charge from the input voltage V in  to C R  and transfers that energy charge to the output filter and load with a power transfer function at P in =½C R  V CR   2  F, where Pin is the input power, V CR  is a capacitance peak voltage charge, C R  is the resonant capacitance, and F is a switching frequency. The first LC resonant stage switch Q 1  charges the resonant capacitor C R  with a stored power pulse from the input voltage V in  in a first half-sine period of the switching frequency, as described below with respect to  FIG. 2 . The second LC resonant stage switch Q 3  then transfers the stored power in the resonant capacitor C R  as a voltage converter in the output filter capacitor C F  and load R L  at high frequency. The resonant inductor current typically operates at a discontinuous mode and the resonant capacitor voltage discharges to zero minimum voltage on each cycle with discontinuous current operation (see V CR  trace in  FIG. 2 ). This may require that the second stage discharge switch duty cycle be adjusted or modulated at less than 90-degrees switching cycle. But there are other possible control modes where the minimum voltage on C R  is above or below zero on each switching cycle and with discontinuous or continuous current operation where the second stage discharge switch duty cycle may be adjusted to more or less than 90-degrees switching cycle and the synchronous rectifier may be eliminated. 
     It is to be understood that the MRC power supply topology shown in  FIG. 1  is only an example and that modifications may be made to the circuit without departing from the scope of the embodiments. For example, one or both of the synchronous rectifiers Q 2 , Q 4  may be removed. Also, the inductor L R2  may be replaced with a tapped inductor, as described below with respect to  FIG. 3 . The circuit may also be modified to provide step-up conversion, as described below with respect to  FIGS. 8, 10A, and 10B . Typically the minimum voltage on C R  is zero on each cycle with discontinuous current operation, but is some control applications this may require that the second stage discharge switch duty cycle be adjusted or modulated at less than 90-degrees switching cycle. But there are other possible control modes where the minimum voltage on C R  is above or below zero on each switching cycle and with discontinuous or continuous current operation where the second stage discharge switch duty cycle may be adjusted to more or less than 90-degrees switching cycle and the synchronous rectifier may be eliminated. Also, in one or more embodiments, the circuit may include an input isolation stage and the input isolation stage may be part of the input switching stage. 
       FIG. 2  illustrates step-down MRC operation for the converter  10  shown in  FIG. 1 . Q 1  and Q 3  traces in  FIG. 2  illustrate the on/off states of the switches. Q 1  in  FIG. 2  is the duty cycle power charge switch and Q 3  is the power transfer switch. Q 2  and Q 4  are synchronous rectifiers with Q 2  a synchronous rectifier only for Q 1  Duty (0-0.5)  modulation. The voltage and current at L R1  are shown at V LR1  and I LR1 , respectively. The voltage and current at L R2  are shown at V LR2  and I LR2 , respectively. V CR  illustrates the charge and discharge at C R . The resonant capacitor C R  will charge to two times V in  at full-duty cycle. The input switch Q 1  is modulated as 0-50%/cycle (duty cycle) of resonant input charge cycle with zero-current on-switching to modulate C R  with 0-2 times input voltage through L R1  current (I LR1 ). 
     In this example, the first LC resonant switched stage  9  operates in a discontinuous current mode with zero-current turn-on and zero-current turn-off at the maximum duty cycle of 50% of the switching frequency as a resonant half-cycle ( FIGS. 1 and 2 ). The first LC switch resonant stage  9  may use pulse-width-modulation (PWM) over the 0-50% duty cycle to regulate the voltage charge stored on the resonant capacitor C R  to regulate the output voltage and current. During PWM switching, less than the 50% of the maximum duty cycle will turn-off with interrupting current with use of a synchronous rectifier for the first resonant inductor. Another method for regulating the output voltage and current uses frequency-modulation (FM) below the resonant switching maximum frequency. A combination of both PWM and FM may also be used. 
     In this example, the second CL resonant switched stage  11  operates in a discontinuous current mode with zero-current turn-on, but turn-off at 90-degrees of the half-sine transfer pulse current where the synchronous rectifier clamps the current back to the output filter capacitor C F  and load R L . The first ½-cycle of energy storage and the second ½-cycle of energy transfer and voltage conversion complete one power cycle at the switching frequency. The output switch Q 3  is fixed for 25%/cycle resonant output discharge ½-cycle with zero-current on-switching and transfers energy in L R2  charging current into filter capacitor (output capacitor) C F  and load R L . This allows all of the energy storage in C R  to be transferred to the output and to leave the voltage on C R  at zero volts for the next charge cycle. The output inductor L R2  may have, for example, a 25%/cycle linear output discharge of L R2  current (I LR2 ) charging into the output capacitor C F  and load R L . 
     The following are examples of MRC power transfer functions for the circuit shown in  FIG. 1  and operation shown in  FIG. 2 :
 
 P in=½* C   R   *V   CR   2   *F   s  
         Wherein:
           C R =resonant capacitor;   V CR =capacitor peak charge voltage; and   F s =switching frequency.   
               

     In one example input power is defined as follows: 
     
       
         
           
             
               
                 
                   Pin 
                   = 
                     
                   ⁢ 
                   
                     
                       Vin 
                       2 
                     
                     * 
                     .637 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     avg 
                     * 
                     Eff 
                     * 
                     D 
                     ⁢ 
                     
                       / 
                     
                     ⁢ 
                     Rin 
                   
                 
               
             
             
               
                 
                   = 
                     
                   ⁢ 
                   
                     
                       Vin 
                       2 
                     
                     * 
                     .637 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     avg 
                     * 
                     Eff 
                     * 
                     D 
                     ⁢ 
                     
                       / 
                     
                     ⁢ 
                     
                       Z 
                       0 
                     
                   
                 
               
             
           
         
       
       
         
           
             Wherein: 
           
         
       
       
         
           
             
               
                 Z 
                 0 
               
               = 
               
                 
                   ( 
                   
                     
                       L 
                       R 
                     
                     ⁢ 
                     
                       / 
                     
                     ⁢ 
                     
                       C 
                       R 
                     
                   
                   ) 
                 
                 
                   ^ 
                   .5 
                 
               
             
             ; 
           
         
       
       
         
           
             
               
                 L 
                 R 
               
               = 
               
                 resonant  inductor 
               
             
             ; 
           
         
       
       
         
           
             
               
                 C 
                 R 
               
               = 
               
                 resonant  capacitor 
               
             
             ; 
             and 
           
         
       
       
         
           
             D 
             = 
             
               Duty  Cycle 
             
           
         
       
       
         
           
             
               Resonant  half-cycle 
             
             = 
             
               
                 1 
                 ⁢ 
                 
                   / 
                 
                 ⁢ 
                 
                   ( 
                   
                     2 
                     * 
                     F 
                   
                   ) 
                 
               
               = 
               
                 1 
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                   ( 
                   
                     π 
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                         ( 
                         
                           
                             L 
                             R 
                           
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                             C 
                             R 
                           
                         
                         ) 
                       
                       
                         ^ 
                         .5 
                       
                     
                   
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     The first stage  9  provides energy storage in the resonant capacitor C R  in a first half-cycle of the switching period. This energy represents the power input for each cycle and may be modulated by PWM or FM, as previously noted, for output voltage and current regulation. The second stage  11  provides energy transfer from the resonant capacitor C R  to the output filter capacitor C F  and the load resistance R L . The second stage  11  is also the voltage conversion stage as a voltage down-converter (or up-converter as described below) and controlled by the output resistance. Output power may be defined as follows:
 
 P out= P in*Eff
 
 V out=( P out* R   L ){circumflex over ( )} 5  
 
 V   CR =2* V in*sin(Duty (0-1) *90°)
         Wherein:
 
Duty (0-1)   =T   Q1_ON /0.5 T   Fs_period  
 
 C   R   =P out*max Duty (0-0.5) *Eff/(0.5* V   CR   2   *Fs )
 
 L   R =( t   R /π) 2   /C   R )
   Wherein t R =resonant half-sine at ½ Fs
 
 C   F   =i* 1/ Fs/dv  
   Wherein i=Iout; Fs=switching frequency; and   dv=Vp-p ripple       

       FIG. 3  illustrates a DC/DC resonant-buck-buck high voltage-ratio step-down MRC non-isolated power supply converter, generally indicated at  30 . In this example, the second stage inductor L R2  is replaced with a tapped inductor L R2 /L D . L R2  is the resonant choke for the power transfer voltage converter stage to the output filter capacitor and the load resistor. L D  is the tapped inductor winding of resonant choke L R2  for the current reset cycle with Q 4  synchronous rectifier that resets linearly at the lower output voltage. The split inductor provides a high voltage-ratio where the L D  inductance is much smaller than L R2  inductance to allow less time for the L R2  current reset cycle with the very low output voltage on L D  compared to the higher voltage that was across L R2  during the Q 3  discharge ¼-cycle. In one example, the DC/DC step-down MRC  30  shown in  FIG. 3  provides a 48 volts to 1 volt ratio (48:1V), 50:5V, or any other suitable step-down POL converter high voltage-ratio with high efficiency. 
       FIG. 4  illustrates step-down MRC operation for the converter  10  shown in  FIG. 3 . Q 1  and Q 3  traces in  FIG. 4  illustrate the on/off states of the switches. Q 1  in  FIG. 2  is the duty cycle power charge and Q 3  is the power transfer. Q 2  and Q 4  are synchronous rectifiers with Q 2  a synchronous rectifier only for Q 1  Duty (0-0.5)  modulation. The voltage and current are shown for L R1  at V LR1  and I LR1 , respectively. Current is shown for L R2  relative to synchronous rectifier Q 4  at I Lr2  and for L D  at I LD . V CR  illustrates the charge and discharge at C R . 
     Power and voltage may be calculated as previously described with respect to  FIG. 1 . L D  may be defined as follows:
 
 L   D   =e* 1.5 t   R *0.5/ di  
         Wherein:
           e=Vout;   di=Iout/(Duty (0-0.25) *0.5 for average)   
               

       FIG. 5  illustrates power storage and voltage conversion stages in the MRC power supply topology shown in  FIG. 3  with a duty cycle of 0-100% in a first ½ cycle. Mode  1  and Mode  2  make up the resonant charge power storage stage. Mode  1  illustrates the power storage duty cycle maximum period with V in  into L R1 /C R  through Q 1  for charge I LR1 . Mode  2  covers the power storage maximum period for discharge L LR1  to C R  after duty cycle with synchronous rectifier Q 2 . Mode  3  and Mode  4  make up the power transfer to voltage conversion stage. Mode  3  illustrates the resonant discharge of C R  into L R2 /C F  through Q 3  for charge I LR2 . Mode  4  shows a linear discharge of L R2 /L D  for discharge I LR2  with synchronous rectifier Q 4 . 
     As previously noted, the MRC may also comprise a step-up converter.  FIG. 6  illustrates an example of a DC/DC MRC two-switch, two-stage resonant-buck-boost step-down-up power supply that can be used as a voltage step-up or step-down converter, generally indicated at  80 . This topology allows simple high efficiency step-up voltage conversion with high voltage input-to-output ratios such as 48:400V, 50:400V, or other suitable ratio (e.g., at least 48:400V). In the example shown in  FIG. 6 , a first stage includes a first switch  82  (Q 1 ), a first resonant inductor  83  (L R1 ), and a resonant capacitor  84  (C R ). The second stage includes a second resonant inductor  87  (L R2 ), second switch  86  (Q 3 ) and filter capacitor  88  (C F ). In this example, each stage also includes a synchronous rectifier  85  (Q 2 ),  89  (Q 4 ). 
       FIG. 7  illustrates operation of the two-stage, two-switch step-up example MRC  80  shown in  FIG. 6 . The on/off cycles of the switches are shown at Q 1  and Q 3 . Q 1  is the duty cycle power charge and Q 3  is the power transfer. Q 2  and Q 4  are synchronous rectifiers, with Q 2  a synchronous rectifier only for Q 1  duty cycle 0-50% modulation. 
     Voltage and current between switch Q 1  and inductor L R1  are shown at V LR1  and I LR1 , respectively. The charge and discharge voltage of C R  is shown at V CR . Voltage at L R2  is shown at V LR2 . Current between L R2  and Q 3  is shown at I LR2 /I Q3  and current between I LR2  and Q 4  is shown at I LR2 /I Q4 . 
     The following are example power transfer function descriptions for the circuit shown in  FIG. 6  and corresponding operation shown in  FIG. 7 .
 
 V out( P out* R   L ){circumflex over ( )} 0.5  
 
 P out= P in*Eff=0.5* C   R   *V   CR   2   *Fs* Eff
 
 V   CR =2* V in*sin(Duty (0-1) *90°)
         Wherein:
           Duty (0-1) =T Q1_ON /0.5T Fs_period  
 
 C   R   =P out*Duty*Eff/(0.5* V   CR   2   *Fs )
 
 L   R1 =( tR/pi )2/ C   R )
   
           Wherein:
           tR=resonant half-sine at ½ Fs
 
 L   R2   =e* (1.5 tR* 0.5)/ di  
   
           Wherein:
           e=Vout; and   di=Iout/(Duty*0.5 for average)
 
 C   F   =i* 1/ Fs/dv  
   
           Wherein:
           i=Iout;   Fs=switching frequency; and   dv=Vp-p ripple   
               

     Another example of a DC/DC resonant-boost-buck step-up-down MRC non-isolated (unisolated) voltage converter with two switches and two synchronous rectifiers is shown in  FIG. 8A  and generally indicated at  100  that can be used as a voltage step-up or a step-down converter. The circuit  100  includes resonant inductors  103  (L R1 ),  107  (L R2 ), resonant capacitor  104  (C R ), filter capacitor  108  (C F ), switches  105  (Q 1 ) and  106  (Q 3 ), and synchronous rectifiers  102  (Q 2 ), and  109  (Q 4 ). The MRC  100  is configured to provide higher storage charge voltage. An example of an MRC step-up boost-boost, generally indicated at  101  is shown in  FIG. 8B . As shown in  FIG. 8B , the components in the second stage have been modified to change from a buck to a boost. 
     In one or more embodiments, a POL converter  110  in accordance with one of the embodiments described herein may be used to replace a conventional IBC (Intermediate-Bus-Converter) and POL converter on a line card or fabric card  112 , as shown in  FIG. 9 . In one example, the POL converter  110  may be used to replace a standard 48:12/10V IBC plus a 12/10V:1V POL converter with a 48:1V POL, while providing high efficiency, small size, low cost package and eliminating a transformer for size and frequency limits. In the example shown in  FIG. 9 , the POL  110  receives power from a PSU (Power Supply Unit)  114  and provides power to one or more processor (e.g., ASIC (Application Specific Integrated Circuit)), memory, or other chips or devices  116 . 
     It is to be understood that the implementation shown in  FIG. 9  is only an example, the POL may be used on any type of board or system type and power supply application, including for example, LED, Laser, battery charger, motor, fan, etc. 
     The embodiments described herein may be implemented, for example, in Board Mounted Power (BMP) POL power supplies, BMP IBC power supplies, Front End Power (FEP) Power Factor Converter (PFC) power sections, LLC-type resonant power converters, high voltage multipliers, buck, boost, forward, multi-phase stages, or any other suitable applications. 
     In one example shown in  FIG. 10 , the MRC topology of  FIG. 6  may be incorporated for use in an AC/DC non-isolated PFC (Power Factor Correction) MRC stage to an isolated DC/DC converter, generally indicated at  120 . The circuit may comprise, for example, an AC input rectifier to MRC two-stage buck-boost two-switch two-synchronous rectifier example as a step-up converter stage to an isolation DC/DC converter stage. In the example shown in  FIG. 10 , the circuit includes a PFC stage with a large C F1  capacitance provides bulk voltage energy storage for line drop-out time protection with output power ride-through time. Also the PFC MRC provides no inrush surge current so no soft-start circuit is needed. Any bulk voltage may be used and switch Q 1  and the input bridge rectifier may be replaced with a bridgeless PFC rectifier and first stage switching circuit. The C R  peak voltage may charge to 2 times the maximum peak input line voltage and needs to be lower than the minimum bulk voltage on CF 1  to provide good PFC through the input AC waveform. The minimum voltage on C R  needs to be at zero on each switching cycle to provide best PFC though each sine wave half cycle so the L R1  charge current can follow the rectified input line proportional to the duty cycle of Q 1 . This may require the second stage Q 3  switch to adjust or modulate the duty cycle to less than 90-degrees switching cycle throughout the line rectified sine wave. PFC power supplies may use MRC buck-boost, boost-buck, or boost-boost converters for different applications. 
       FIGS. 11A, 11B, 12A, and 12B  illustrate examples in which the MRC topologies described herein (e.g., MRC topology of  FIG. 1 ) may be used in a DC/DC isolated MRC with a forward converter transformer stage to form a power supply circuit. In one example, a circuit  130  includes an isolated MRC buck-buck step-down-down voltage converter with two switches and three synchronous rectifiers ( FIG. 11A ). In another example, a circuit  132  forms an isolated MRC resonant buck-boost step-down-up voltage converter with two switches and three synchronous rectifiers ( FIG. 11B ).  FIGS. 12A and 12B  illustrate example topologies, generally indicated at  140  and  142 , respectively, comprising an isolated MRC with flyback PWM control of the resonant capacitor charge and a synchronous rectifier as the first stage to a resonant-buck or a resonant-boost second stage. 
     It is to be understood that the circuits shown in  FIGS. 10, 11A, 11B, 12A, and 12B  are only examples and that the MRC topologies described herein may be incorporated in any other type of circuit or topology to create other types of circuits for implementation in other applications. 
     The multi-resonant converter (MRC) power supply circuits described herein may be used in any type of power supply application including a network device (e.g., server, router, switch, gateway, controller, edge device, access device, aggregation device, core node, intermediate node, or other network device). The network device may operate in the context of a data communications network including multiple network devices and may communicate over one or more networks. 
     The network device may be a programmable machine implemented in hardware, software, or any combination thereof. The network device may include one or more processor, memory, and network interface. Memory may be a volatile memory or non-volatile storage, which stores various applications, operating systems, modules, and data for execution and use by the processor. Logic may be encoded in one or more tangible media for execution by the processor. For example, the processor may execute codes stored in a computer-readable medium such as memory. The computer-readable medium may be, for example, electronic (e.g., RAM (random access memory), ROM (read-only memory), EPROM (erasable programmable read-only memory)), magnetic, optical (e.g., CD, DVD), electromagnetic, semiconductor technology, or any other suitable medium. The network interfaces may comprise one or more line cards, fabric cards, service card, router processor card, controller card, or other card, element, or component and the POL converter may be located on one or more the cards. It is to be understood that the network device described herein is only an example and that the embodiments described herein may be implemented on different configurations of network devices. 
     Although the method and apparatus have been described in accordance with the embodiments shown, one of ordinary skill in the art will readily recognize that there could be variations made to the embodiments without departing from the scope of the invention. Accordingly, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.