Patent Publication Number: US-7588966-B2

Title: Chip mounting with flowable layer

Description:
RELATED APPLICATIONS 
     This application is a division of application Ser. No. 10/883,356, filed Jun. 30, 2004, which application is incorporated herein by reference in its entirety for all purposes. 
    
    
     BACKGROUND 
     Some circuits for use at communication frequencies, such as are used for telecommunication and other signal processing applications, involve mounting one component onto another component. An example is mounting an integrated circuit chip to a base substrate. Various mounting techniques may be used. One technique involves using an adhesive to attach or “bond” a chip to a substrate. During this process, adhesive may be squeezed from between the chip and substrate and flow to regions beyond the chip footprint. If the bonding involves two chips or a chip being bonded near another above-the-substrate structure, a likely result is an overflow of adhesive onto contact pads required to interconnect the chip and another circuit component. 
     BRIEF SUMMARY OF THE DISCLOSURE 
     A circuit structure may be formed that includes a substrate having a face and an open trench, adjacent to where one or more chips are to be mounted. One or more bridges may extend across an intermediate portion of the trench, and optionally, bifurcates or otherwise divides the trench into sections. An adhesive layer, that may or may not be conductive, may be applied to the substrate face. One or more circuit chips may be mounted on the adhesive layer, with at least one edge of one circuit chip adjacent to the trench. Optionally, an adhesive layer may be applied to the chip base and then mounted to the substrate face, in like fashion. The trench may accommodate excess adhesive. A bridge across the trench may retain the adhesive across the width of the trench. This may extend the adhesive surface area, and when the adhesive is conductive, the bridge may provide continuity of the conductive layer across the face of the substrate. In one example, pairs of circuit chips may be effectively mounted in adjacent relationship for interconnection without interference from excess adhesive by positioning adjacent edges of the chips adjacent the trench. 
    
    
     
       BRIEF DESCRIPTION OF THE SEVERAL FIGURES 
         FIG. 1  shows an isometric view of a pair of chips on top of a bridged trench. 
         FIG. 2  shows a plan view of interconnected chips mounted on a substrate. 
         FIGS. 3A and 3B  show initial assembly process steps. 
         FIG. 3C  shows a cross-sectional view of  FIG. 2  taken along line  3 - 3 , as a final process step. 
         FIG. 4  shows a cross-sectional view of  FIG. 2  taken along line  4 - 4 . 
     
    
    
     DETAILED DESCRIPTION OF VARIOUS EMBODIMENTS 
     Referring to the drawings,  FIGS. 1 ,  2 ,  3 C and  4  show a circuit structure including a base substrate  12  on which are mounted one or more circuit units  14 , such as circuit chips  16  and  18 . Substrate  12  may be any suitable substrate for supporting circuit units  14 . For example, the substrate may be made of one or a combination of dielectric, semiconductive, and conductive materials. Also, the substrate may or may not be printed with one or more circuit elements that are active and/or passive, whether or not any such circuit elements are or are not in a circuit including circuit units  14 . Circuit units  14 , including circuit chips  16  and  18 , may be any suitable active or passive circuit devices, such as, but not limited to, resistors, capacitors, inductors, transmission lines, diodes, and transistors, or a combination of such devices. Accordingly, the circuit chips may include passive and/or active circuit devices, and may be formed on a chip substrate that may be a dielectric, semiconductive or conductive material, or a combination of such materials. A representative example of a chip may include an integrated circuit chip, such as a monolithic microwave integrated circuit (MMIC) or an application specific integrated circuit (ASIC). 
     As particularly shown in  FIGS. 3C and 4 , substrate  12  may include a primary face  12   a  on which an adhesive layer  20  may be placed for holding circuit chips  16  and  18  on the substrate. A trench  22  extends along a length of substrate  12 , and may include two or more trench sections  24  and  26 . Trench sections  24  and  26  may also be considered to be separate trenches, so the term trench, as used herein, includes one or more separate trenches, whether connected or disconnected, and whether aligned or misaligned. Trench sections  24  and  26  may have sidewalls, such as sidewalls  24   a ,  24   b  and  26   a ,  26   b . These sidewalls may define the sides and lengths of the trench sections. The trench may extend beyond the edges of the circuit chips  16  and  18 , as shown, or they may end along the circuit chips, such as optional trench end  24   c  near the outer edge of the chip circuits, as shown in  FIG. 4 . 
     One or more bridges, such as bridge  28 , may extend across trench  22 . In some examples of the circuit structure, there is no bridge  28 . In other examples a plurality of bridges  28  may be used, as represented by additional or alternative bridges  28  shown in dashed lines. Any bridge or bridges may be formed during the formation of trench  22 . For example, the trenches may be formed by etching, such as with a laser, substrate  12 . By etching discontinuous trench sections, a stretch of substrate remaining may form the bridge. In such a case, the bridge may be a wall between trench sections or the substrate between the ends of two trenches. The bridge may also extend over or through an intermediate portion of a continuous trench, leaving a passageway along the trench and under the bridge. Further, a bridge  28  could be grown or inserted into a previously formed trench, as an alternative to leaving a portion non-etched. Thus, the term bridge refers to any suitable structure spanning a width of the trench sufficient to support adhesive layer  20 . In some examples, such as circuit structure  10  as shown, the adhesive layer is conductive, and the bridge supports a continuous adhesive layer  20 , providing electrical continuity between opposite sides of the trench. The layer support may preferably be provided, by a bridge with an upper surface  28   a  near substrate surface  12   a.    
     In this example, circuit chips  16  and  18  have respective connection or lead pads, also referred to as terminals  30  and  32  that may be connected to resident circuit structure formed on or in the chips. This resident circuit structure may be connected to external circuit structure via terminals, such as terminals  30  and  32 . In this example, an interconnect  34  interconnects terminals  30  and  32 . Any device suitable for providing an electrical connection between the terminals, such as a wire, ribbon or bar, may be used. In this example, interconnect  34  is in the form of a bond wire  36  attached, such as by solder, to the terminals. 
     One or more circuit units may be positioned adjacent to a trench. The area near a portion of a circuit unit that is adjacent to a trench is referred to as an area  38  of adjacency. The figures show an example in which two circuit units  14  are positioned adjacent to a trench  22 . The space between two circuit units may also be referred to as a gap  40 . All or a portion of gap  40  may extend over trench  22 . Gap  40  may be positioned completely or partially over trench  22  so that excess adhesive flows directly into the trench. Centering the gap over trench  22 , as shown in  FIG. 2 , is not required, as the trench may be offset from the gap, and the gap may be wider than, the same width as, or narrower than the trench. 
       FIGS. 3A-3C  illustrate steps of one example of a method of bonding a circuit unit onto a substrate. Initially, a base substrate  12  is selected. Trench  22  may be formed prior or subsequent to the placement of one or more circuit units on the substrate. In this example, as shown in  FIG. 3A , trench  22  and bridge  28  are formed in substrate  12 . An adhesive layer  20  is then laid down on top of substrate  12 , as shown in  FIG. 3B . Chips  16  and  18  are mounted side-by-side, as shown in  FIG. 3C , which shows a cross-sectional view from the side of the mounted circuit chips. Terminals  30  and  32 , positioned near the adjacent respective edges of chips  16  and  18 , are interconnected using wire bond  34 . Although interconnection of chips  16  and  18  may occur after mounting the chips on the adhesive layer, the chips may be interconnected prior to or during mounting of the chips. 
     Adhesive layer  20  may be conductive to provide a circuit ground circuit structure  10 , including circuit chips  16  and  18 . Adhesive  20  may be flowable, and may squeeze out from under one or both of the chips during mounting. Such excess adhesive may flow into the trench, rather than further out onto the substrate surface  12   a . In this example, gap  40  between the chips may be small. The adhesive may thereby flow into the trench rather than up between the chips, and possibly on top of the chips, where it might flow onto terminal  30  or  32 . In this way, the terminals may remain clear of adhesive, and interconnection may occur unimpeded by uncontrolled flow of adhesive. 
     Further, with a conductive adhesive, ground or circuit continuity is maintained, regardless of how much adhesive flows in trench  22 . If bridge  28  is wide enough, adhesive may still accumulate on top of it, even to the point of overflowing onto the top of one or both of the chips. 
     More than one bridge  28  may be used to create a greater assurance of circuit continuity between chips  16  and  18 , especially where conductive adhesive  20  may be less viscous. Also, trench  22  need not extend deeper into substrate  12  than is needed to accommodate enough adhesive to avoid build-up on top of a circuit chip. However, a trench  22  may be formed that is sufficiently deep to accommodate a range of amounts of excess adhesive. 
     Now referring to  FIGS. 3C and 4 , when chip  16  is mounted adjacent to chip  18  (or to some other above-the-substrate circuit unit) on substrate  12  using conductive adhesive  20 , and in preparation for being electrically connected, an edge of at least one chip ( 16  or  18 ) may be placed adjacent bridge  28 . Therefore, trench  22  receives any excess adhesive  20  during bonding, and bridge  28  allows adhesive  20  to remain continuous across the trench despite that some adhesive  20  drops into the trench. The continuity of adhesive  20  from the underside of each chip  16  and  18  to the space between the chips along bridge  28  is readily apparent in  FIG. 3  and generally required to retain continuity of ground between chips  16  and  18 . Depending on the viscosity of the adhesive layer, each bridge  28  may be formed with a width less than twice the height of an adjacent circuit chip or a height of the shortest chip. Adhesive may flow off of the sides of the bridge into the trench as well as directly from the chip into the trench. The likelihood that there will be a build-up of adhesive on the bridge above the height of a chip is reduced if the bridge width is less than or equal to the height of the shorter of the chips. Although the bridge may be positioned to the side of the chips, as shown in phantom lines in  FIG. 2 , it may also be positioned under interconnect  34 . When in this latter position, adhesive ground layer  20  is directly under the interconnect, and the electromagnetic field between the interconnect and ground is relatively strong and well defined. 
     In another configuration (not shown), trench  22  may extended well beyond the sides of a circuit chip so as to accommodate the placement of additional circuit chips along the same trench. Thus, forming a mask for etching the trench may be simplified and a higher density of circuit units may be realized. 
     Accordingly, while embodiments have been particularly shown and described with reference to the foregoing disclosure, many variations may be made therein. The foregoing embodiments are illustrative, and no single feature or element is essential to all possible combinations that may be used in a particular application. Where the claims recite “a” or “a first” element or the equivalent thereof, such claims include one or more such elements, neither requiring nor excluding two or more such elements. Further, ordinal indicators, such as first, second or third, for identified elements are used to distinguish between the elements, and do not indicate or imply a required or limited number of such elements, and do not indicate a particular position or order of such elements unless otherwise specifically stated. 
     It is believed that the following claims particularly point out certain combinations and subcombinations that correspond to disclosed examples and are novel and non-obvious. Other combinations and subcombinations of features, functions, elements and/or properties may be claimed through amendment of the present claims or presentation of new claims in this or a related application. Such amended or new claims, whether they are directed to different combinations or directed to the same combinations, whether different, broader, narrower or equal in scope to the original claims, are also regarded as included within the subject matter of the present disclosure. 
     INDUSTRIAL APPLICABILITY 
     The methods and apparatus described herein are applicable to the semiconductor, the telecommunication, and the communication-frequency signal processing industries, and are applicable to circuit technologies where circuit units may be mounted on a substrate.