Patent Publication Number: US-9413270-B2

Title: Single-phase three-wire power control system and power control method therefor

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The instant disclosure relates to an inverter; in particular, to a single-phase three-wire inverter. 
     2. Description of Related Art 
     Over the past decade the world is facing shortages of many natural resources, and the earth&#39;s greenhouse effect is increasingly serious. In order to solve these problems, green energy (e.g. solar energy) is gradually taken seriously. In the beginning, the green energy can reduce the burden of the power plants in rush hour. Further, the green energy source may replace the conventional power plants in order to reduce the production of the greenhouse gases. The technology of solar energy is developing in full swing. Solar panels are usually installed on the roof of the building or house without shelter, and the generated electric power can be integrated to the city power grid or stored in batteries. However, life-time of the battery is limited, and cost of utilizing battery is relatively expensive. Therefore, utilizing an inverter to integrate the electric power of solar energy to the power grid of the power company can reduce the power consumption of power transmission and reduce the power loss, which can improve the efficiency of the power generating system. Additionally, bi-directional function can be added to the inverter for integrating with DC power generating system, in which the generated electric power of the solar energy can be directly provided to DC electronic loads. Therefore, the electric power of the solar energy does not need to be integrated to the city power grid before being converted to DC power and waste of energy can be further reduced accordingly. 
     At present, many literatures disclose the related topology of the inverter, the controller and the practical functions, but the variation of the inductance (e.g. the inductance variation may be several times of the initial inductance) is still not considered. Due to the material of the iron core, the inductance would vary according to the current of the inductor, such that the current oscillation and the current ripple would be increased, and the precision of the current tracking would be affected thereto especially on the condition of large power, referring to  FIG. 1  showing a curve diagram of inductance variation versus current. As shown in  FIG. 1 , for the system operating in larger power, the inductor can decrease as the current increases. If the controller does not take the variation of the inductance into account, the controller would need to introduce an excessively large compensation to overcome the insufficient inductance, thus there would be a risk of divergence for the system. Therefore, taking the variation of the inductance into account is indispensable for deriving the control law. Further, for the conventional controller of the inverter, the noise generated by switching of the switches often interferes sampling of the feedback signal, thus the controller may oscillate or get wrong functions accordingly. Although, an analog filter can be utilized to filter high frequency noise, the feedback signals would delay and response of the system would be slow, and it would result in distortion of the AC output of the inverter accordingly. Therefore, in recent years, industry and academia workers applies the digital single-chip to perform pulse width modulation control which samples multiple feedback signals in one duty cycle and averages these feedback signals to reduce the influence of high frequency noise. However, sampling multiple feedback signals may not make the feedback current match the reference current in practical, but the processing time of the single-chip is surely increased instead. 
     SUMMARY OF THE INVENTION 
     The object of the instant disclosure is to offer a single-phase three-wire power control system which permits variations of inductance. This system taking into account the variations of inductance can remedy the deficiencies of the conventional control. 
     In order to achieve the aforementioned objects, according to an embodiment of the instant disclosure, a single-phase three-wire power control system is provided. The single-phase three-wire power control system integrates the electricity of a DC power supply device to an AC power source through an inductor of a first power line, a second power line and a third power line. The single-phase three-wire power control system comprises a single-phase three-wire inverter, a driving unit, a sampling unit and a processing unit. The single-phase three-wire inverter is coupled between the DC power supply device and the AC power source for converting a DC voltage of the DC power supply device to an output voltage. The single-phase three-wire inverter has a first half-bridge DC-AC power converter and a second half-bridge DC-AC power converter parallel-coupled to each other. The driving unit is coupled to the single-phase three-wire inverter. The sampling unit is coupled to the inductor for sampling an inductor current of the inductor. The processing unit is coupled to the driving unit and the sampling unit for controlling the single-phase three-wire inverter through the driving unit and obtaining the duty ratio of a next cycle according to the inductance of the inductor, the total variation of the inductor current, the DC voltage and the output voltage. The processing unit obtains a current variation of exciting the inductor and a current variation of demagnetizing the inductor according to the DC voltage of a present cycle, the output voltage, the inductance of the inductor and the duty ratio of the present cycle, and obtains the total variation of the inductor current in the present cycle according to the current variation of exciting the inductor and the current variation of the demagnetized inductor in the present cycle. 
     In order to achieve the aforementioned objects, according to an embodiment of the instant disclosure, a power control method for controlling a single-phase three-wire power control system is provided. The single-phase three-wire power control system having a single-phase three-wire inverter. The single-phase three-wire inverter is coupled between a DC power supply device and a AC power source for converting a DC voltage of the DC power supply device to an output voltage and integrating the electricity of the DC power supply device to the AC power source through an inductor of a first power line, a second power line and a third power line. The single-phase three-wire inverter has a first half-bridge DC-AC power converter and a second half-bridge DC-AC power converter parallel-coupled to each other. The power control method comprises obtaining the duty ratio of a next cycle according to the inductance of the inductor, the total variation of the inductor current, the DC voltage and the output voltage; obtaining a current variation of exciting the inductor and a current variation of demagnetizing the inductor according to the DC voltage, the output voltage, the inductance of the inductor in a present cycle and the duty ratio of the present cycle; and obtaining the total variation of the inductor current in the present cycle according to the current variation of exciting the inductor and the current variation of demagnetizing the inductor in the present cycle. 
     In summary, the single-phase three-wire power control system and control method in this invention introduce the variation of inductor into the control mechanism for effectively reducing the current oscillation and the current ripple as well as increasing the accuracy current tracking. Also, the control mechanism only needs one sampling to obtain the average of the feedback current, the processing time of the processing unit (e.g. a single-chip) can be reduced, and the switching noise occurred when turning-on and turning-off of the switches can be avoided. 
     In order to further the understanding regarding the instant disclosure, the following embodiments are provided along with illustrations to facilitate the disclosure of the instant disclosure. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  shows a curve diagram of inductance variation versus current for a conventional magnetic moly-permalloy powder (MPP) core winding inductor; 
         FIG. 2A  shows a schematic diagram of a single-phase three-wire power control system operating in an grid-connection mode according to an embodiment of the instant disclosure; 
         FIG. 2B  shows a schematic diagram of a single-phase three-wire power control system operating in a rectification mode according to an embodiment of the instant disclosure; 
         FIG. 2C  shows a schematic diagram of a single-phase three-wire power control system operating in a voltage-control mode according to an embodiment of the instant disclosure; 
         FIG. 3  shows a circuit block diagram of a single-phase three-wire emergency power system according to an embodiment of the instant disclosure; 
         FIG. 4A  shows a perspective diagram of a single-phase three-wire inverter operating during a positive half-cycle in an grid-connection mode according to an embodiment of the instant disclosure; 
         FIG. 4B  shows a perspective diagram of a single-phase three-wire inverter operating during a negative half-cycle in an grid-connection mode according to an embodiment of the instant disclosure; 
         FIG. 5  shows a waveform of triangular wave for a symmetrical carrier according to an embodiment of the instant disclosure; 
         FIG. 6  shows a control block diagram of a single-phase three-wire inverter operating in an grid-connection mode and a rectification mode according to an embodiment of the instant disclosure; 
         FIG. 7A  shows a waveform diagram of an alternating current and a corresponding voltage without considering the inductor variance conventionally; 
         FIG. 7B  shows a waveform diagram of an alternating current and a corresponding voltage of a single-phase three-wire power control system according to an embodiment of the instant disclosure; 
         FIG. 8A  shows a perspective diagram of a single-phase three-wire inverter operating during a positive half-cycle in a voltage-control mode according to an embodiment of the instant disclosure; 
         FIG. 8B  shows a perspective diagram of a single-phase three-wire inverter operating during a negative half-cycle in a voltage-control mode according to an embodiment of the instant disclosure; 
         FIG. 9A  shows a circuit diagram of an equivalent circuit of a load according to an embodiment of the instant disclosure; 
         FIG. 9B  shows a circuit diagram of an equivalent circuit of another load according to an embodiment of the instant disclosure; 
         FIG. 10  shows a control block diagram of a single-phase three-wire inverter operating in a voltage-control mode according to an embodiment of the instant disclosure; 
         FIG. 11  shows a waveform diagram of an output voltage and an output current when a single-phase three-wire inverter depicted in  FIG. 10  operating in a voltage-control mode is applied to a resistive load; 
         FIG. 12  shows a waveform diagram of an output voltage and an output current when a single-phase three-wire inverter depicted in  FIG. 10  operating in a voltage-control mode is applied to a capacitive load; 
         FIG. 13  shows a waveform diagram of an output voltage and an output current when a single-phase three-wire inverter depicted in  FIG. 10  operating in a voltage-control mode is applied to an inductive load; and 
         FIG. 14  shows a flow chart of a power control method according to an embodiment of the instant disclosure. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The aforementioned illustrations and following detailed descriptions are exemplary for the purpose of further explaining the scope of the instant disclosure. Other objectives and advantages related to the instant disclosure will be illustrated in the subsequent descriptions and appended drawings. 
     [An Embodiment of a Single-Phase Three-Wire Power Control System] 
     Please refer to  FIG. 2A  in conjunction with  FIG. 2B  and  FIG. 2C , a single-phase three-wire inverter in this embodiment can be a connection for regulating power between a DC power (e.g. a DC power supply device  2  in  FIG. 2A ) and an AC power (e.g. an AC power source  4  in  FIG. 2A ), such as a single-phase three-wire emergency power system  1  shown in  FIG. 2A ,  FIG. 2B  and  FIG. 2C . The inverter in this embodiment may include a bi-directional inverter. The single-phase three-wire inverter disclosed in this embodiment can be operated in three modes comprising a grid-connection mode, a rectification mode and a voltage-control mode. The single-phase three-wire inverter can be an emergency power source connected to the utility grid. When the utility grid (i.e. power grid) is in normal operation, an AC load  3  is powered by the utility grid  4 . And, when the energy of the DC link is sufficient, the grid-connection mode may be started, in which the power flow PFa represents that the DC power supply device  2  provides energy to the AC end as shown in  FIG. 2A . When the energy of the DC link is insufficient, then the rectification mode is started, and the power flow PFb represents that the utility grid  4  provides energy to the DC power supply device  2  as shown in  FIG. 2B . When the utility grid  4  fails, then the single-phase three-wire inverter goes to the voltage-control mode, meanwhile the system can function as an uninterruptible power supply (UPS), in which the power flow FPc represents that the DC power supply device  2  provides energy to the AC load  3  as shown in  FIG. 3 . 
     Please refer to  FIG. 2A  in conjunction with  FIG. 3 ,  FIG. 3  shows a circuit block diagram of the single-phase three-wire emergency power system according to an embodiment of the instant disclosure. The power control system for the single-phase three-wire inverter (i.e. the single-phase three-wire emergency power system  1 ) integrates the electricity of the DC power supply device  2  to the AC power source  4  through an inductor of a first power line  11  (not shown in  FIG. 2A , but represented by an inductor L S1  of the first power line  11 , a second power line  12  and a third power line  13 . In this embodiment, the AC power source  4  is utility grid. The single-phase three-wire power control system comprises a single-phase three-wire inverter  14 , a driving unit  15 , a sampling unit  16  and a processing unit  17 . The single-phase three-wire inverter  14  is coupled between the DC power supply device  2  and the AC power source  4  for converting a DC voltage V DC  of the DC power supply device  2  to an output voltage V S . 
     The single-phase three-wire inverter  14  has a first half-bridge DC-AC power converter and a second half-bridge DC-AC power converter parallel-coupled to each other. The first half-bridge DC-AC power converter is constituted of a power switch S A+ , a power switch S A−  and the inductor L S1  connected to the first power line  11 . The second half-bridge DC-AC power converter is constituted of a power switch SB+, a power switch S B−  and an inductor L S2  connected to the second power line  12 . The power switch S A+  and the power switch S A−  of the first half-bridge DC-AC power converter are coupled to the first power line  11  through the inductor L S1 . The power switch S B+  and the power switch S B−  of the second half-bridge DC-AC power converter are coupled to the second power line  12 . Each of the power switches S A+ , S A− , S B+  and S B−  is respectively parallel-connected to an inverted diode D A+ , D A− , D B+  and D B− . 
     Regarding to the third power line, this inverter has three arms, in which a first arm comprises the power switches S A−  and S A−  connected in series, a second arm comprises the power switches S B  and S B−  connected in series, and a third arm comprises capacitors C DC+  and C DC−  connected in series. Switching of the third arm is utilized to compensate the unbalance of the load, wherein the first power line  11  and the third power line  13  represent an AC voltage, and the second power line  12  and the third power line  13  represent another AC voltage, thus the aforementioned two AC voltages can keep balanced when the power outage of utility grid is occurred. However, the current on the third power line  13  (also called the neutral line) is zero when the utility grid is normal. 
     The driving unit  15  is coupled to the power switches S A− , S A− , S B+  and S B−  of the single-phase three-wire inverter  14 . The sampling unit  16  is coupled to the inductors L S1  and L S2  for sampling inductor currents of the inductors L S1  and L S2 . The processing unit  17  is coupled to the driving unit  15  and the sampling unit  16 . The processing unit  17  controls the power switches S A+ , S A− , S B+  and S B−  of the single-phase three-wire inverter  14  through the driving unit  15 . It is worth mentioning that the inductors L S1  and L S2  can be equivalent to an inductor L S  shown in  FIG. 4A . The processing unit  17  obtains a duty ratio D(n+1) of a next cycle according to the inductance of the inductor L S , the total variation ΔI LS  of the inductor current, the DC voltage V DC  and the output voltage V S . The processing unit  17  obtains a current variation Δi L1  of exciting the inductor and a current variation Δi L2  of demagnetizing the inductor according to the DC voltage V DC , the output voltage V S , the inductance of the inductor L S  of the present cycle and a duty ratio D(n) of the present cycle, and obtains the total variation Δi LS  of the inductor current in the present cycle according to the current variation Δi L1  of exciting the inductor and the current variation Δi L2  of the demagnetized inductor in the present cycle. Please refer to the following descriptions for details of the control method. 
     The DC power supply device  2  of this embodiment may be a solar power generating device, a wind power generating device or other renewable power generating devices, in order to generate a small scale DC voltage V DC . Additionally, the AC power source  4  may be a general household electricity system which is mainly for providing a single-phase AC voltage V S . In practical, the ordinary skilled in the art will appreciate that circuit element such as capacitances C AC+  and C AC−  may be added for amending the non-ideal circuit characteristics when the inductors L S1 , L S2  and the AC power source  4  are coupled practically. 
     The manner of the driving unit  15  controlling the power switches S A+ , S A− , S B+  and S B−  is making the power switches S A+ , S A− , S B−  and S B−  of the first half-bridge DC-AC power converter and the second half-bridge DC-AC power converter be both bipolarized switched. 
     The control method in this embodiment is firstly considering the condition of each individual section of the operation, then integrating all the conditions of the individual sections of the operation.  FIG. 4A  shows a perspective diagram of the single-phase three-wire inverter operating during a positive half-cycle in a grid-connection mode according to an embodiment of the instant disclosure. At first, one switching cycle can be divided into two sections which are a section of exciting the inductor and a section of demagnetizing the inductor. Referring to the equation (1) and the equation (2) described in the following, and then adding these two current variations after respectively calculating the current variations of these two sections, the equation (3) in the following can be obtained. 
     In detail, when in the grid-connection mode, bipolarized switching is adopted to control the four power switches shown in  FIG. 4A . While defining that the current flows from the left side of the inductor L S  to the right side of the inductor L S  is positive, the duty ratio of the power switch S A+  and the power switch S B−  is the duty ratio D, the duty ratio of the power switch S A−  and the power switch S B+  is the complementary (1-D) of the duty ratio D, and when the power switch S A−  and the power switch S B−  are conducted, the power switch S A−  and the power switch S B+  are cutoff, which causes the inductor L S  to be excited, then the voltage drop V LS  across the inductor L S  is equal to V DC −V S . Otherwise, when the power switch S A+  and the power switch S B−  are cutoff, the power switch S A−  and the power switch S B+  are conducted, which causes the inductor L S  to be demagnetized, then the voltage drop V LS  across the inductor L S  is equal to −(V DC +V S ). The relationships of voltage across the inductor and the current of the inductor are shown in equations (1) and (2), wherein D is the duty ratio. 
     
       
         
           
             
               
                 
                   
                     
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     As shown in the following equation (3), the total variation of the inductor current in the present cycle is the current variation of exciting the inductor added with the current variation of the demagnetized inductor.
 
Δ i   LS   =Δi   L1   +Δi   L2    (3)
 
     Taking the equation (1) and the equation (2) into the equation (3), and rearranging the equation (3) to obtain the equation (4), wherein T is a period and n is a positive integer representing the present period. 
     
       
         
           
             
               
                 
                   
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     According to equation (4), the duty ratio D(n+1) characterized by following equation (5) can be obtained. 
     
       
         
           
             
               
                 
                   
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     While utilizing current feedforward control, inductor&#39;s current variation Δi LS  is equal to a reference current minus a feedback current, thus the current variation can be obtained, wherein the current variation in the equation (3) including a feedforward component (I ref (n+1)−I ref (n)) in a cycle and an error component (I ref (n)−I fb (n)), which can be characterized by equation (6).
 
Δ i   LS   =[i   ref ( n+ 1)− i   ref ( n )]+ K   P   [i   ref ( n )− i   fb ( n )]  (6)
 
     For example, when Kp=1, Δi LS  in equation (6) can be indicated by the reference current minus the feedback current, thus equation (5) can be rewritten by equation (7). 
     
       
         
           
             
               
                 
                   
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     In other words, the processing unit  17  utilizes the current feedforward control and according to the reference current (comprising the reference current I ref (n+1) of the next cycle and the reference current I ref (n) of the present cycle) and the feedback current I fb (n) of the present cycle to obtain the inductor&#39;s total current variation Δi LS , wherein the feedback current is the inductor current multiplied with a ratio factor H. The control block for the grid-connection mode and the rectification mode is shown in  FIG. 6 . Then, please refer to following description about the rectification mode. 
     Regarding the rectification mode, the rectification mode can have the function of power factor correction. The derivation of the control low of the rectification mode is the same as that of the grid-connection mode, referring to following equation (8) and equation (9). 
     
       
         
           
             
               
                 
                   
                     
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     Referring to equation (3) again, the total variation of the inductor current in the present cycle is the current variation of exciting the inductor added with the current variation of the demagnetized inductor. 
     And, taking equation (8) and equation (9) into equation (3) to obtain equation (10). Further, solving for the duty ratio D, and then equation (11) is obtained. 
     
       
         
           
             
               
                 
                   
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                           S 
                         
                         ⁢ 
                         Δ 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           i 
                           LS 
                         
                       
                       
                         2 
                         ⁢ 
                         
                           V 
                           
                             D 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             C 
                           
                         
                         ⁢ 
                         T 
                       
                     
                   
                 
               
               
                 
                   ( 
                   11 
                   ) 
                 
               
             
           
         
       
     
     While utilizing the current feedforward control, the inductor&#39;s current variation Δi LS  is equal to the reference current i ref (n+1) minus the feedback current i fb (n), thus equation (11) can be rewritten as equation (12). 
     
       
         
           
             
               
                 
                   
                     D 
                     ⁡ 
                     
                       ( 
                       
                         n 
                         + 
                         1 
                       
                       ) 
                     
                   
                   = 
                   
                     
                       1 
                       2 
                     
                     - 
                     
                       
                         V 
                         S 
                       
                       
                         2 
                         ⁢ 
                         
                           V 
                           
                             D 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             C 
                           
                         
                       
                     
                     + 
                     
                       
                         
                           L 
                           S 
                         
                         ⁡ 
                         
                           [ 
                           
                             
                               
                                 i 
                                 ref 
                               
                               ⁡ 
                               
                                 ( 
                                 
                                   n 
                                   + 
                                   1 
                                 
                                 ) 
                               
                             
                             - 
                             
                               
                                 i 
                                 
                                   f 
                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   b 
                                 
                               
                               ⁡ 
                               
                                 ( 
                                 n 
                                 ) 
                               
                             
                           
                           ] 
                         
                       
                       
                         2 
                         ⁢ 
                         
                           V 
                           
                             D 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             C 
                           
                         
                         ⁢ 
                         T 
                       
                     
                   
                 
               
               
                 
                   ( 
                   12 
                   ) 
                 
               
             
           
         
       
     
     Referring to the control block shown in  FIG. 6 , wherein 
     
       
         
           
             
               
                 K 
                 p 
               
               = 
               1 
             
             , 
             
               
 
             
             ⁢ 
             
               
                 G 
                 C 
               
               = 
               
                 
                   
                     L 
                     S 
                   
                   ⁡ 
                   
                     ( 
                     
                       i 
                       LS 
                     
                     ) 
                   
                 
                 
                   2 
                   ⁢ 
                   
                     V 
                     
                       d 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       c 
                     
                   
                   ⁢ 
                   T 
                 
               
             
             , 
             
               
 
             
             ⁢ 
             
               
                 
                   G 
                   P 
                 
                 ⁡ 
                 
                   ( 
                   s 
                   ) 
                 
               
               = 
               
                 
                   
                     i 
                     
                       L 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       S 
                     
                   
                   d 
                 
                 = 
                 
                   
                     V 
                     
                       d 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       c 
                     
                   
                   
                     
                       sL 
                       S 
                     
                     + 
                     
                       r 
                       L 
                     
                   
                 
               
             
             , 
           
         
       
     
     r L  is the resistance of the inductor L, and H represents the scale factor. 
     Additionally, as shown in  FIG. 5 , regarding to current sampling, the chip of the processing unit is selected to operate a triangular wave mode with a symmetrical carrier, the output duty ratio of pulse width modulation will have a symmetrical distribution about a central point (i.e. the peak) of the triangular wave, then the average of the inductor current within the cycle can be equal to the reference current. Curve “a” is a built-in triangular wave of the processing unit, and curve “b” is an inductor current I L . Therefore, when sampling the feedback current at the central point (which is the peak) of the triangular wave (of the curve “a”), the feedback current will be accurately match with the reference current, and it only needs sampling once. Additionally, in the triangular wave mode, sampling at the central point may make the sampling point avoid the switching noise occurred when turning-on and turning-off of the switches. 
     The control block shown in  FIG. 6  is executed by the processing unit  17 , and details are described in the follows. Please refer to equations (7) and (12) in conjunction with  FIG. 6 ,  FIG. 6  shows a control block diagram of a single-phase three-wire inverter operating in an grid-connection mode and a rectification mode according to an embodiment of the instant disclosure. Firstly, utilizing a subtractor  61  to subtract the reference current I ref (n) of the present duty cycle from the reference current I ref (n+1) of the next duty cycle to obtain a feedforward component (I ref (n+1)−I ref (n)). Then, utilizing a subtractor  62  to subtract the sampled feedback current I fb (n) from the reference current I ref (n) of the present duty cycle to obtain the error component (I ref (n)−I fb (n)), wherein the feedback current I fb (n) is obtained by a multiplexer  63  multiplexing a scale factor H (which is an feedback coefficient). Then, utilizing a multiplexer  64  to multiply the error component (I ref (n)−I fb (n)) with a coefficient K p , and adding with the feedforward component (I ref (n+1)−I ref (n)) to obtain the current variation Δi LS (n+1) by an adder  65 , as characterized by equation (6). Further, utilizing a multiplexer  66  to multiply the current variation Δi LS (n+1) with a coefficient G C , then an adder  67  outcomes the duty ratio D(n+1) of the single-phase three-wire inverter  14  in the next duty cycle, as characterized by equation (5) or (11), wherein equation (5) and equation (11) are respectively adapted to the grid-connection mode and the rectification mode. Then, utilizing a transfer function G P  of a multiplexer  68  to obtain the inductor&#39;s current i L (n+1) of the single-phase three-wire inverter  14  in the next duty cycle according to the duty ratio D(n+1). 
     As mentioned above, the prior art utilizes a quite large compensation or makes overdesign for the inductor to solve the problem of inductor variation, wherein the surplus compensation would result in the risk of divergent for the system, and the overdesign of the inductor would increase unnecessary cost and volume. Comparing with the prior art, this invention provides a control scheme which allows the inductance variation for controlling the single-phase three-wire inverter. This embodiment introduces the inductance variation into the control scheme. When the control scheme takes into account the inductance variances, large variation of inductance would be allowed, and the speed response and system stability will be improved, meanwhile overdesign for the inductor will be avoided in order to reduce the volume of the inductor and related cost. As shown in  FIG. 7A  and  FIG. 7B ,  FIG. 7A  shows a waveform diagram of an alternating current and a corresponding voltage without considering the inductor variance conventionally,  FIG. 7B  shows a waveform diagram of an alternating current and a corresponding voltage of a single-phase three-wire power control system according to an embodiment of the instant disclosure. 
     Please refer to  FIG. 8A  and  FIG. 8B ,  FIG. 8A  shows a perspective diagram of a single-phase three-wire inverter operating during a positive half-cycle in a voltage-control mode according to an embodiment of the instant disclosure,  FIG. 8B  shows a perspective diagram of a single-phase three-wire inverter operating during a negative half-cycle in a voltage-control mode according to an embodiment of the instant disclosure. When the utility grid fails, then the system goes to the voltage-control mode, at this moment the system functions as a UPS, as shown in  FIG. 2C . 
     In the voltage-control mode, the processor  17  utilizes load impedance estimation and iterative learning control to compensate the output voltage V S  except for considering the conditions of exciting the inductor and demagnetizing the inductor. The DC link provides power to the load through the single-phase three-wire inverter  14 , meanwhile a relay on the neutral line (the third power line  13 ) is in cooperated, and the load is presented by loads  81 ,  82  shown in  FIG. 8A  (and  FIG. 8B ). As shown in  FIG. 8A , while defining that the current flows from the left side of the inductor L S  to the right side of the inductor L S  is positive, the duty ratio of the power switch S A+  and the power switch S B−  is the duty ratio D, the duty ratio of the power switch S A−  and the power switch S B+  is the complementary (1-D) of the duty ratio D, and when the power switch S A+  and the power switch S B−  are conducted, the power switch S A−  and the power switch S B+  are cutoff, which causes the inductor L S  to be excited, then the voltage drop V LS  across the inductor L S  is equal to V DC −V S . Otherwise, when the power switch S A|  and the power switch S B−  are cutoff, the power switch S A−  and the power switch S B|  are conducted, which causes the inductor L S  to be demagnetized, then the voltage drop V LS  across the inductor L S  is equal to −(V DC +V S ). The relationships of voltage across the inductor and the current of the inductor are shown in equations (13) and (14), wherein D is the duty ratio. 
     
       
         
           
             
               
                 
                   
                     
                       V 
                       
                         D 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         C 
                       
                     
                     - 
                     
                       V 
                       S 
                     
                   
                   = 
                   
                     
                       L 
                       S 
                     
                     ⁢ 
                     
                       
                         Δ 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           i 
                           
                             L 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             1 
                           
                         
                       
                       DT 
                     
                   
                 
               
               
                 
                   ( 
                   13 
                   ) 
                 
               
             
             
               
                 
                   
                     - 
                     
                       ( 
                       
                         
                           V 
                           
                             D 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             C 
                           
                         
                         + 
                         
                           V 
                           S 
                         
                       
                       ) 
                     
                   
                   = 
                   
                     
                       L 
                       S 
                     
                     ⁢ 
                     
                       
                         Δ 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           i 
                           
                             L 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                         
                       
                       
                         
                           ( 
                           
                             1 
                             - 
                             D 
                           
                           ) 
                         
                         ⁢ 
                         T 
                       
                     
                   
                 
               
               
                 
                   ( 
                   14 
                   ) 
                 
               
             
           
         
       
     
     Further, referring to equation (3), the total variation of the inductor current in the present cycle is the current variation of exciting the inductor added with the current variation of the demagnetized inductor, thus equation (13) and equation (14) can be taken into equation (3) to obtain equation (15), wherein T is a switching period, L S  is an inductance. 
     
       
         
           
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       i 
                       L 
                     
                   
                   = 
                   
                     
                       T 
                       
                         L 
                         S 
                       
                     
                     ⁡ 
                     
                       [ 
                       
                         
                           
                             ( 
                             
                               
                                 2 
                                 ⁢ 
                                 D 
                               
                               - 
                               1 
                             
                             ) 
                           
                           ⁢ 
                           
                             V 
                             
                               D 
                               ⁢ 
                               
                                   
                               
                               ⁢ 
                               C 
                             
                           
                         
                         + 
                         
                           ( 
                           
                             - 
                             
                               V 
                               S 
                             
                           
                           ) 
                         
                       
                       ] 
                     
                   
                 
               
               
                 
                   ( 
                   15 
                   ) 
                 
               
             
           
         
       
     
     Further, solving equation (15) for obtaining the duty ratio D, and then the duty radio D(n+1) of the next cycle is characterized by equation (16). 
     
       
         
           
             
               
                 
                   
                     D 
                     ⁡ 
                     
                       ( 
                       
                         n 
                         + 
                         1 
                       
                       ) 
                     
                   
                   = 
                   
                     
                       1 
                       2 
                     
                     + 
                     
                       
                         V 
                         S 
                       
                       
                         2 
                         ⁢ 
                         
                           V 
                           
                             D 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             C 
                           
                         
                       
                     
                     + 
                     
                       
                         
                           L 
                           S 
                         
                         ⁢ 
                         Δ 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           i 
                           L 
                         
                       
                       
                         2 
                         ⁢ 
                         
                           V 
                           
                             D 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             C 
                           
                         
                         ⁢ 
                         T 
                       
                     
                   
                 
               
               
                 
                   ( 
                   16 
                   ) 
                 
               
             
           
         
       
     
     Further, as shown in  FIG. 9A , the load can be presented by a resistor R′, an inductor L′ and a capacitor C′ connected in series, and can be equivalent to a load resistor R, a load inductor L and a load capacitor C connected in parallel, such thatthe load can be the RLC load parallelly connected with a rectification load. When load comprises a nonlinear load, a diode  91  shown in  FIG. 9B  for example, and when the diode  91  is conducted, the load can be equivalent to a parallel connected R″L″C″ load, R″=R//R 1 , C″=C//C 1 . According to the characteristic of different load having different current variation, the current variation generated by the load of the next cycle could be characterized by equation (17).
 
Δ i ( n+ 1)=Δ i   R   +Δi   C   +Δi   L    (17)
 
     The current variation Δi(n+1) generated by the load of the next cycle is the summation of the following three current variations due to three types of loads, Δi R , Δi L , Δi C , wherein Δi R  is the current variation passing the resistive load which can be derived in the following: 
     
       
         
           
             
               
                 
                   
                     
                       
                         
                           Δ 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           
                             
                               i 
                               R 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 + 
                                 1 
                               
                               ) 
                             
                           
                         
                         = 
                         
                           
                             
                               i 
                               R 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 + 
                                 1 
                               
                               ) 
                             
                           
                           - 
                           
                             
                               i 
                               R 
                             
                             ⁡ 
                             
                               ( 
                               n 
                               ) 
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                         
                           
                             
                               
                                 Δ 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 v 
                               
                               + 
                               v 
                             
                             R 
                           
                           - 
                           
                             v 
                             R 
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                         
                           
                             
                               v 
                               ⁡ 
                               
                                 ( 
                                 
                                   n 
                                   + 
                                   1 
                                 
                                 ) 
                               
                             
                             - 
                             
                               v 
                               ⁡ 
                               
                                 ( 
                                 n 
                                 ) 
                               
                             
                           
                           R 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   18 
                   ) 
                 
               
             
           
         
       
     
     After arrangement, the current variation of the resistive load can be characterized by equation (19). 
     
       
         
           
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       
                         i 
                         R 
                       
                       ⁡ 
                       
                         ( 
                         
                           n 
                           + 
                           1 
                         
                         ) 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           v 
                           ref 
                         
                         ⁡ 
                         
                           ( 
                           
                             n 
                             + 
                             1 
                           
                           ) 
                         
                       
                       - 
                       
                         
                           v 
                           
                             fb 
                             ⁢ 
                             
                                 
                             
                           
                         
                         ⁡ 
                         
                           ( 
                           n 
                           ) 
                         
                       
                     
                     R 
                   
                 
               
               
                 
                   ( 
                   19 
                   ) 
                 
               
             
           
         
       
     
     Wherein the output voltage v(n+1) of the next cycle is presented by the reference voltage V ref (n+1), the output voltage v(n) is presented by the feedback voltage V fb (n). 
     Δi L  is the current variation passing through the capacitive load and can be derived in the following: 
     
       
         
           
             
               
                 
                   
                     
                       Δ 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       
                         
                           i 
                           L 
                         
                         ⁡ 
                         
                           ( 
                           
                             n 
                             + 
                             1 
                           
                           ) 
                         
                       
                     
                     = 
                     
                       
                         
                           i 
                           L 
                         
                         ⁡ 
                         
                           ( 
                           
                             n 
                             + 
                             1 
                           
                           ) 
                         
                       
                       - 
                       
                         
                           i 
                           L 
                         
                         ⁡ 
                         
                           ( 
                           n 
                           ) 
                         
                       
                     
                   
                   ⁢ 
                   
                     
 
                   
                   ⁢ 
                   wherein 
                 
               
               
                 
                   ( 
                   20 
                   ) 
                 
               
             
             
               
                 
                   
                     
                       
                         
                           
                             
                               i 
                               L 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 + 
                                 1 
                               
                               ) 
                             
                           
                           = 
                             
                           ⁢ 
                           
                             
                               1 
                               L 
                             
                             ⁢ 
                             
                               ( 
                               
                                 
                                   
                                     ∫ 
                                     0 
                                     
                                       
                                         ( 
                                         
                                           n 
                                           + 
                                           1 
                                         
                                         ) 
                                       
                                       ⁢ 
                                       T 
                                     
                                   
                                   ⁢ 
                                   
                                     v 
                                     ⁢ 
                                     
                                         
                                     
                                     ⁢ 
                                     
                                       ⅆ 
                                       t 
                                     
                                   
                                 
                                 + 
                                 
                                   
                                     ∫ 
                                     nT 
                                     
                                       
                                         ( 
                                         
                                           n 
                                           + 
                                           1 
                                         
                                         ) 
                                       
                                       ⁢ 
                                       T 
                                     
                                   
                                   ⁢ 
                                   
                                     
                                       
                                         Δ 
                                         ⁢ 
                                         
                                             
                                         
                                         ⁢ 
                                         v 
                                       
                                       2 
                                     
                                     ⁢ 
                                     
                                         
                                     
                                     ⁢ 
                                     
                                       ⅆ 
                                       t 
                                     
                                   
                                 
                               
                               ) 
                             
                           
                         
                       
                     
                     
                       
                         
                           = 
                             
                           ⁢ 
                           
                             
                               1 
                               L 
                             
                             ⁢ 
                             
                               ( 
                               
                                 
                                   
                                     ∫ 
                                     0 
                                     nT 
                                   
                                   ⁢ 
                                   
                                     v 
                                     ⁢ 
                                     
                                         
                                     
                                     ⁢ 
                                     
                                       ⅆ 
                                       t 
                                     
                                   
                                 
                                 + 
                                 
                                   
                                     ∫ 
                                     nT 
                                     
                                       
                                         ( 
                                         
                                           n 
                                           + 
                                           1 
                                         
                                         ) 
                                       
                                       ⁢ 
                                       T 
                                     
                                   
                                   ⁢ 
                                   
                                     v 
                                     ⁢ 
                                     
                                         
                                     
                                     ⁢ 
                                     
                                       ⅆ 
                                       t 
                                     
                                   
                                 
                                 + 
                                 
                                   
                                     ∫ 
                                     nT 
                                     
                                       
                                         ( 
                                         
                                           n 
                                           + 
                                           1 
                                         
                                         ) 
                                       
                                       ⁢ 
                                       T 
                                     
                                   
                                   ⁢ 
                                   
                                     
                                       
                                         Δ 
                                         ⁢ 
                                         
                                             
                                         
                                         ⁢ 
                                         v 
                                       
                                       2 
                                     
                                     ⁢ 
                                     
                                         
                                     
                                     ⁢ 
                                     
                                       ⅆ 
                                       t 
                                     
                                   
                                 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   ⁢ 
                   
                     
 
                   
                   ⁢ 
                   
                     additionally 
                     , 
                   
                 
               
               
                 
                   ( 
                   21 
                   ) 
                 
               
             
             
               
                 
                   
                     
                       i 
                       L 
                     
                     ⁡ 
                     
                       ( 
                       n 
                       ) 
                     
                   
                   = 
                   
                     
                       1 
                       L 
                     
                     ⁢ 
                     
                       
                         ∫ 
                         0 
                         nT 
                       
                       ⁢ 
                       
                         v 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           ⅆ 
                           t 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   22 
                   ) 
                 
               
             
           
         
       
     
     Taking equation (22) into equation (21) and rearranging the equation to obtain equation (23). 
     
       
         
           
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       
                         i 
                         L 
                       
                       ⁡ 
                       
                         ( 
                         
                           n 
                           + 
                           1 
                         
                         ) 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           
                             v 
                             ref 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               + 
                               1 
                             
                             ) 
                           
                         
                         + 
                         
                           
                             v 
                             
                               f 
                               ⁢ 
                               
                                   
                               
                               ⁢ 
                               b 
                             
                           
                           ⁡ 
                           
                             ( 
                             n 
                             ) 
                           
                         
                       
                       
                         2 
                         ⁢ 
                         L 
                       
                     
                     ⁢ 
                     T 
                   
                 
               
               
                 
                   ( 
                   23 
                   ) 
                 
               
             
           
         
       
     
     Further, Δi C  is the current variation passing through capacitive load which can be derived in the following:
 
Δ i   C ( n+ 1)= i   C ( n+ 1)− i   C ( n )   (24)
 
     The derivation utilizes v(n+3/2), v(n+1/2) and v(n−1/2) which can be calculated in the following: 
     
       
         
           
             
               
                 
                   
                     v 
                     ⁡ 
                     
                       ( 
                       
                         n 
                         + 
                         
                           3 
                           2 
                         
                       
                       ) 
                     
                   
                   = 
                   
                     
                       
                         v 
                         ⁡ 
                         
                           ( 
                           
                             n 
                             + 
                             2 
                           
                           ) 
                         
                       
                       + 
                       
                         v 
                         ⁡ 
                         
                           ( 
                           
                             n 
                             + 
                             1 
                           
                           ) 
                         
                       
                     
                     2 
                   
                 
               
               
                 
                   ( 
                   25 
                   ) 
                 
               
             
             
               
                 
                   
                     v 
                     ⁡ 
                     
                       ( 
                       
                         n 
                         + 
                         
                           1 
                           2 
                         
                       
                       ) 
                     
                   
                   = 
                   
                     
                       
                         v 
                         ⁡ 
                         
                           ( 
                           
                             n 
                             + 
                             1 
                           
                           ) 
                         
                       
                       + 
                       
                         v 
                         ⁡ 
                         
                           ( 
                           n 
                           ) 
                         
                       
                     
                     2 
                   
                 
               
               
                 
                   ( 
                   26 
                   ) 
                 
               
             
             
               
                 
                   
                     v 
                     ⁡ 
                     
                       ( 
                       
                         n 
                         - 
                         
                           1 
                           2 
                         
                       
                       ) 
                     
                   
                   = 
                   
                     
                       
                         v 
                         ⁡ 
                         
                           ( 
                           n 
                           ) 
                         
                       
                       + 
                       
                         v 
                         ⁡ 
                         
                           ( 
                           
                             n 
                             - 
                             1 
                           
                           ) 
                         
                       
                     
                     2 
                   
                 
               
               
                 
                   ( 
                   27 
                   ) 
                 
               
             
           
         
       
     
     According to the relation between capacitance, the voltage and the current which is i =Cdv/dt, the voltage variation should be taken into account while calculating the current value, referring to equation (28) and equation (29).
 
Δ v ( n+ 1)= v ( n+ 3/2)− v ( n+ 1/2)   (28)
 
Δ v ( n )= v ( n+ 1/2)− v ( n− 1/2)   (29)
 
     Utilizing Δv(n+1) and Δv(n) to calculate i C (n+1) and i C (n) as following: 
     
       
         
           
             
               
                 
                   
                     
                       i 
                       C 
                     
                     ⁡ 
                     
                       ( 
                       
                         n 
                         + 
                         1 
                       
                       ) 
                     
                   
                   = 
                   
                     
                       
                         C 
                         · 
                         Δ 
                       
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       
                         v 
                         ⁡ 
                         
                           ( 
                           
                             n 
                             + 
                             1 
                           
                           ) 
                         
                       
                     
                     T 
                   
                 
               
               
                 
                   ( 
                   30 
                   ) 
                 
               
             
             
               
                 
                   
                     
                       i 
                       C 
                     
                     ⁡ 
                     
                       ( 
                       n 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         C 
                         · 
                         Δ 
                       
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       
                         v 
                         ⁡ 
                         
                           ( 
                           n 
                           ) 
                         
                       
                     
                     T 
                   
                 
               
               
                 
                   ( 
                   31 
                   ) 
                 
               
             
           
         
       
     
     Then, taking equations (20) and (31) into equation (24) to obtain equation (32): 
     
       
         
           
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       
                         i 
                         C 
                       
                       ⁡ 
                       
                         ( 
                         
                           n 
                           + 
                           1 
                         
                         ) 
                       
                     
                   
                   = 
                   
                     
                       C 
                       
                         2 
                         ⁢ 
                         T 
                       
                     
                     ⁡ 
                     
                       [ 
                       
                         
                           
                             V 
                             ref 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               + 
                               2 
                             
                             ) 
                           
                         
                         - 
                         
                           
                             V 
                             ref 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               + 
                               1 
                             
                             ) 
                           
                         
                         - 
                         
                           
                             V 
                             fb 
                           
                           ⁡ 
                           
                             ( 
                             n 
                             ) 
                           
                         
                         + 
                         
                           
                             V 
                             fb 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               - 
                               1 
                             
                             ) 
                           
                         
                       
                       ] 
                     
                   
                 
               
               
                 
                   ( 
                   32 
                   ) 
                 
               
             
           
         
       
     
     According to the above mentioned derivation, equations (19), (23) and (32) can be taken into equation (17), and equation (33) can be obtained after rearrangement: 
     
       
         
           
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       
                         i 
                         
                           ( 
                           • 
                           ) 
                         
                       
                       ⁡ 
                       
                         ( 
                         
                           n 
                           + 
                           1 
                         
                         ) 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           
                             V 
                             ref 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               + 
                               1 
                             
                             ) 
                           
                         
                         - 
                         
                           
                             V 
                             fb 
                           
                           ⁡ 
                           
                             ( 
                             n 
                             ) 
                           
                         
                       
                       R 
                     
                     + 
                     
                       C 
                       ⁢ 
                       
                         
                           
                             
                               
                                 
                                   [ 
                                   
                                     
                                       
                                         V 
                                         ref 
                                       
                                       ⁡ 
                                       
                                         ( 
                                         
                                           n 
                                           + 
                                           2 
                                         
                                         ) 
                                       
                                     
                                     - 
                                     
                                       
                                         V 
                                         ref 
                                       
                                       ⁡ 
                                       
                                         ( 
                                         
                                           n 
                                           + 
                                           1 
                                         
                                         ) 
                                       
                                     
                                   
                                   ] 
                                 
                                 - 
                               
                             
                           
                           
                             
                               
                                 [ 
                                 
                                   
                                     
                                       V 
                                       fb 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       n 
                                       ) 
                                     
                                   
                                   - 
                                   
                                     
                                       V 
                                       fb 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       
                                         n 
                                         - 
                                         1 
                                       
                                       ) 
                                     
                                   
                                 
                                 ] 
                               
                             
                           
                         
                         
                           2 
                           ⁢ 
                           T 
                         
                       
                     
                     + 
                     
                       
                         
                           
                             
                               V 
                               ref 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 + 
                                 1 
                               
                               ) 
                             
                           
                           + 
                           
                             
                               V 
                               fb 
                             
                             ⁡ 
                             
                               ( 
                               n 
                               ) 
                             
                           
                         
                         
                           2 
                           ⁢ 
                           L 
                         
                       
                       ⁢ 
                       T 
                     
                   
                 
               
               
                 
                   ( 
                   33 
                   ) 
                 
               
             
           
         
       
     
     In order to make the output voltage can reach the preset sine wave voltage (e.g. the voltage is 100 Vrms), we apply a current tracking control method to the voltage-control mode, and the system has to identify these three parameters R, L and C at any time, thus three simultaneous equations are utilized in calculations, referring to following equations (34), (35) and (36). 
     
       
         
           
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       i 
                       ⁡ 
                       
                         ( 
                         n 
                         ) 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           
                             V 
                             ref 
                           
                           ⁡ 
                           
                             ( 
                             n 
                             ) 
                           
                         
                         - 
                         
                           
                             V 
                             fb 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               - 
                               1 
                             
                             ) 
                           
                         
                       
                       R 
                     
                     + 
                     
                       C 
                       ⁢ 
                       
                         
                           
                             
                               
                                 
                                   [ 
                                   
                                     
                                       
                                         V 
                                         ref 
                                       
                                       ⁡ 
                                       
                                         ( 
                                         
                                           n 
                                           + 
                                           1 
                                         
                                         ) 
                                       
                                     
                                     - 
                                     
                                       
                                         V 
                                         ref 
                                       
                                       ⁡ 
                                       
                                         ( 
                                         n 
                                         ) 
                                       
                                     
                                   
                                   ] 
                                 
                                 - 
                               
                             
                           
                           
                             
                               
                                 [ 
                                 
                                   
                                     
                                       V 
                                       fb 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       
                                         n 
                                         - 
                                         1 
                                       
                                       ) 
                                     
                                   
                                   - 
                                   
                                     
                                       V 
                                       fb 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       
                                         n 
                                         - 
                                         2 
                                       
                                       ) 
                                     
                                   
                                 
                                 ] 
                               
                             
                           
                         
                         
                           2 
                           ⁢ 
                           T 
                         
                       
                     
                     + 
                     
                       
                         
                           
                             
                               V 
                               ref 
                             
                             ⁡ 
                             
                               ( 
                               n 
                               ) 
                             
                           
                           + 
                           
                             
                               V 
                               fb 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 - 
                                 1 
                               
                               ) 
                             
                           
                         
                         
                           2 
                           ⁢ 
                           L 
                         
                       
                       ⁢ 
                       T 
                     
                   
                 
               
               
                 
                   ( 
                   34 
                   ) 
                 
               
             
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       i 
                       ⁡ 
                       
                         ( 
                         
                           n 
                           - 
                           1 
                         
                         ) 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           
                             V 
                             ref 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               - 
                               1 
                             
                             ) 
                           
                         
                         - 
                         
                           
                             V 
                             fb 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               - 
                               2 
                             
                             ) 
                           
                         
                       
                       R 
                     
                     + 
                     
                       C 
                       ⁢ 
                       
                         
                           
                             
                               
                                 
                                   [ 
                                   
                                     
                                       
                                         V 
                                         ref 
                                       
                                       ⁡ 
                                       
                                         ( 
                                         n 
                                         ) 
                                       
                                     
                                     - 
                                     
                                       
                                         V 
                                         ref 
                                       
                                       ⁡ 
                                       
                                         ( 
                                         
                                           n 
                                           - 
                                           1 
                                         
                                         ) 
                                       
                                     
                                   
                                   ] 
                                 
                                 - 
                               
                             
                           
                           
                             
                               
                                 [ 
                                 
                                   
                                     
                                       V 
                                       fb 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       
                                         n 
                                         - 
                                         2 
                                       
                                       ) 
                                     
                                   
                                   - 
                                   
                                     
                                       V 
                                       fb 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       
                                         n 
                                         - 
                                         3 
                                       
                                       ) 
                                     
                                   
                                 
                                 ] 
                               
                             
                           
                         
                         
                           2 
                           ⁢ 
                           T 
                         
                       
                     
                     + 
                     
                       
                         
                           
                             
                               V 
                               ref 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 - 
                                 1 
                               
                               ) 
                             
                           
                           + 
                           
                             
                               V 
                               fb 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 - 
                                 2 
                               
                               ) 
                             
                           
                         
                         
                           2 
                           ⁢ 
                           L 
                         
                       
                       ⁢ 
                       T 
                     
                   
                 
               
               
                 
                   ( 
                   35 
                   ) 
                 
               
             
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       i 
                       ⁡ 
                       
                         ( 
                         
                           n 
                           - 
                           2 
                         
                         ) 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           
                             V 
                             ref 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               - 
                               2 
                             
                             ) 
                           
                         
                         - 
                         
                           
                             V 
                             fb 
                           
                           ⁡ 
                           
                             ( 
                             
                               n 
                               - 
                               3 
                             
                             ) 
                           
                         
                       
                       R 
                     
                     + 
                     
                       C 
                       ⁢ 
                       
                         
                           
                             
                               
                                 
                                   [ 
                                   
                                     
                                       
                                         V 
                                         ref 
                                       
                                       ⁡ 
                                       
                                         ( 
                                         
                                           n 
                                           - 
                                           1 
                                         
                                         ) 
                                       
                                     
                                     - 
                                     
                                       
                                         V 
                                         ref 
                                       
                                       ⁡ 
                                       
                                         ( 
                                         
                                           n 
                                           - 
                                           2 
                                         
                                         ) 
                                       
                                     
                                   
                                   ] 
                                 
                                 - 
                               
                             
                           
                           
                             
                               
                                 [ 
                                 
                                   
                                     
                                       V 
                                       fb 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       
                                         n 
                                         - 
                                         3 
                                       
                                       ) 
                                     
                                   
                                   - 
                                   
                                     
                                       V 
                                       fb 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       
                                         n 
                                         - 
                                         4 
                                       
                                       ) 
                                     
                                   
                                 
                                 ] 
                               
                             
                           
                         
                         
                           2 
                           ⁢ 
                           T 
                         
                       
                     
                     + 
                     
                       
                         
                           
                             
                               V 
                               ref 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 - 
                                 2 
                               
                               ) 
                             
                           
                           + 
                           
                             
                               V 
                               fb 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 - 
                                 3 
                               
                               ) 
                             
                           
                         
                         
                           2 
                           ⁢ 
                           L 
                         
                       
                       ⁢ 
                       T 
                     
                   
                 
               
               
                 
                   ( 
                   36 
                   ) 
                 
               
             
           
         
       
     
     These above three equations can be used to solve the values of R, L and C according to Cramer&#39;s rule. Additionally, the calculation for the duty ratio is not only adjusted according to the different types of the load, iterative learning control with equation (37) is also introduced. 
     
       
         
           
             
               
                 
                   
                     
                       d 
                       i 
                     
                     ⁡ 
                     
                       ( 
                       
                         n 
                         + 
                         1 
                       
                       ) 
                     
                   
                   = 
                   
                     
                       
                         k 
                         
                           
                             p 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                           ⁢ 
                           
                               
                           
                         
                       
                       ⁡ 
                       
                         ( 
                         
                           n 
                           + 
                           1 
                         
                         ) 
                       
                     
                     ⁢ 
                     
                       { 
                       
                         
                           
                             
                               L 
                               S 
                             
                             ⁡ 
                             
                               ( 
                               
                                 n 
                                 + 
                                 1 
                               
                               ) 
                             
                           
                           
                             L 
                             max 
                           
                         
                         ⁡ 
                         
                           [ 
                           
                             
                               
                                 v 
                                 ref 
                               
                               ⁡ 
                               
                                 ( 
                                 
                                   n 
                                   + 
                                   1 
                                 
                                 ) 
                               
                             
                             - 
                             
                               
                                 v 
                                 fb 
                                 ′ 
                               
                               ⁡ 
                               
                                 ( 
                                 
                                   n 
                                   + 
                                   1 
                                 
                                 ) 
                               
                             
                           
                           ] 
                         
                       
                       } 
                     
                   
                 
               
               
                 
                   ( 
                   37 
                   ) 
                 
               
             
           
         
       
     
     wherein V ref  is the reference voltage built by the system, V′ fb  is the feedback voltage of the previous cycle (of the utility grid), and the control gain k p2  can be characterized by equation (38).
 
 k   p2 ( n+ 1)= k′   p2 ( n+ 1)+ k   p0   [v   ref ( n+ 1)− v′   fb ( n+ 1)]  (38)
 
     k′ p2  is the control gain of the previous cycle of utility grid (corresponding to the switching cycle), k p2  is the reaction result according to the gain of the previous cycle and the error component, and k p0  is the preset initial gain. While introducing the iterative learning control, the error of output voltage of the system in a steady state and the total harmonic distortion can be reduced, and the control block is depicted in  FIG. 10 , wherein the duty ratio of the next cycle is 
     
       
         
           
             
               D 
               ⁡ 
               
                 ( 
                 
                   n 
                   + 
                   1 
                 
                 ) 
               
             
             = 
             
               
                 1 
                 2 
               
               + 
               
                 
                   
                     
                       V 
                       ref 
                     
                     ⁡ 
                     
                       ( 
                       
                         n 
                         + 
                         1 
                       
                       ) 
                     
                   
                   
                     2 
                     ⁢ 
                     
                       V 
                       
                         d 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         c 
                       
                     
                   
                 
                 . 
               
             
           
         
       
     
     The control block shown in  FIG. 10  is also implemented by the processing unit  17  as detailed below. Referring to equations (33), (37) in conjunction with  FIG. 10 , the control block comprises a sub-block  10   b  for load impedance estimation and a sub-block  10   a  for iterative learning. Firstly, regarding for load impedance estimation, utilizing an adder  111  to subtract the feedback current I fb (n) of the present cycle from the reference current I ref (n+1) of the next cycle to obtain the feedforward component e(n) (which is (I ref (n+1)−I ref (n)), and a multiplexer  112  multiplies the feedforward component e(n) with 1/R to obtain the current variation of the resistive load, as shown in equation (19). Then, for the current variation of the capacitive load, an adder  113  subtracts the reference current I ref (n+1) of the next cycle and the feedback current I fb (n) of the present cycle from the reference current I ref (n+2) of the next two cycle, and adding the feedback current I fb (n−1) of the previous cycle, then utilizing a multiplexer  114  to multiplies the outcome of the adder  113  with C/2T, as shown in equation (32). Then, for the current variation of the inductive load, an adder  115  subtracts the feedback current I fb (n) of the present cycle from the reference current I ref (n+1) of the next cycle, then utilizing a multiplier  116  to multiplies the outcome of the adder  115  with T/2L. Then, an adder  117  adds the outcomes of the multipliers  112 ,  114  and  116  to obtain the total current variation Δi (•) (n+1) due to the load in the next cycle, as depicted in equation (33). Then the total current variation Δi (•) (n+1) can be multiplied by a coefficient G C  to obtain the variation d e (n+1) of the duty ratio estimated from the load. 
     Secondly, regarding for iterative learning control, an adder  121  subtrates the reference reference voltage V ref (n+1) of the next cycle from the feedback V′ fb (n+1) of the next cycle, and utilizing multipliers  122 ,  123 ,  125  and  126  and an adder  124  to obtain the variation d i (n+1) of the duty ratio for iterative learning. An adder  131  addes the variation d e (n+1) of the duty ratio estimated from the load, the variation d e (n+1) of the duty ratio for iterative learning and the duty ratio D(n+1) of the next cycle, then the single-phase three-wire inverter  14  operates according to the duty cycle d(n+1) to obtain an AC voltage v O (n+1) of the next cycle which is converted through a transfer function G p  of a multiplier  132 . 
     In short, when the single-phase three-wire power control system operates in the voltage-control mode, the processing unit  17  not only calculates the total current variation of the inductor to obtain the duty ratio D(n+1) according to the inductor&#39;s variation, the processing unit  17  also utilizes the reference voltage V ref  and the feedback voltage V fb  to obtain the total current variation Δi (•)  due to the load so as to obtain the variatoin d e (n+1) of the duty ratio estimated from the load, in which the load is equivalent to the resistive load R, the inductive load L and the capacitive load C connected in parallel and the total current variation Δi (•)  due to the load is the summation of the current variation of the resistive load, the current variation of the resistive load and the current variation of the capacitive load depicted in equation (33). Further, the processing unit  17  also calculates the variatoin d i (n+1) of the duty ratio for iterative learning The processing unit  17  adds the duty ratio D(n+1), the variation d e (n+1) of the duty ratio estimated from the load and the variation d i (n+1) of the duty ratio for iterative learning to control the outputted AC voltage v O (n+1). 
     Referring to  FIG. 11  showing a waveform diagram of an output voltage and an output current when a single-phase three-wire inverter depicted in  FIG. 10  operating in a voltage-control mode with total power of 1.1 kW is applied to a resistive load. The output voltages are V AN  and V NB , wherein the voltage V AN  is the voltage across the first power line  11  and the third power line  13 , and the voltage V NB  is the voltage across the third power line  13  and the second power line  12 . The current i AN  is the current flowing through the load connected between the first power line  11  and the third power line  13 . The current i NB  is the current flowing through the load connected between the third power line  13  and the second power line  12 . Further, for the resistive load, the total harmonic distortions are 2.458%, 2.946% and 3.321% while utilizing control block shown in  FIG. 10  to operate the single-phase three-wire inverter in 1.1 kW, 2.2 kW and 3.3 kW respectively. The specification requirement of total harmonic distortion for the uninterruptible power supply (UPS) is below 5%, in general, the total harmonic distortion of the conventional circuit is about 4%. The single-phase three-wire inverter of this embodiment can obtain lower total harmonic distortion. 
     Referring to  FIG. 12  showing a waveform diagram of an output voltage and an output current when a single-phase three-wire inverter depicted in  FIG. 10  operating in a voltage-control mode with total power of 1.02 kVA is applied to a capacitive load. For the capacitive load, the total harmonic distortions are 2.590%, 2.955% and 3.305% while utilizing control block shown in  FIG. 10  to operate the single-phase three-wire inverter in 1.02 kVA, 1.88 kVA and 2.86 kVA respectively. In general, the total harmonic distortion of the conventional circuit is about 4%. The single-phase three-wire inverter of this embodiment can obtain lower total harmonic distortion. 
     Referring to  FIG. 13  showing a waveform diagram of an output voltage and an output current when a single-phase three-wire inverter depicted in  FIG. 10  operating in a voltage-control mode with total power of 1.04 kVA is applied to an inductive load. For the inductive load, the total harmonic distortions are 2.375%, 2.949% and 3.268% while utilizing control block shown in  FIG. 10  to operate the single-phase three-wire inverter in 1.04 kVA, 1.81 kVA and 2.72 kVA respectively. In general, the total harmonic distortion of the conventional circuit is about 4%. The single-phase three-wire inverter of this embodiment can obtain lower total harmonic distortion. 
     [An Embodiment of a Power Control Method] 
     Please refer to  FIG. 14  in conjunction with  FIG. 2A ,  FIG. 2B ,  FIG. 2C  and  FIG. 3 ,  FIG. 14  shows a flow chart of a power control method according to an embodiment of the instant disclosure. The power control method for controlling the single-phase three-wire power control system (which is the single-phase three-wire emergency power system  1 ) shown in  FIG. 3 . The single-phase three-wire power control system has the single-phase three-wire inverter  14 . The single-phase three-wire inverter  14  is coupled between the DC power supply device  2  and the AC power source  4  (shown in  FIG. 2A ) for converting the DC voltage V DC  of the DC power supply device  2  to the output voltage V S  and integrating the electricity of the DC power supply device  2  to the AC power source  4  through the inductor L S  of the first power line  11 , the second power line  12  and the third power line  13 . The single-phase three-wire inverter  14  has a first half-bridge DC-AC power converter and a second half-bridge DC-AC power converter parallel-coupled to each other. Details of the circuit can be referred to the previous embodiment. The power control method comprises following steps. First, in step S 110 , obtaining the duty ratio D(n+1) of the next cycle according to the inductance L S  of the inductor, the total variation Δi LS  of the inductor current, the DC voltage V DC  and the output voltage V S . It is worth mentioning that the step S 110  may comprise determining the single-phase three-wire inverter to operate in the grid-connection mode, the rectification mode or the voltage-control mode. Implementation of determining the mode switching of the single-phase three-wire inverter may be achieved in a variety of ways. The user may configure the mechanism of the mode switching arbitrarily as needed. For example, the user may manually control the operation mode, or utilize a sensor to the sense the voltage and current of the AC power source to be the basis for auto-switching of the operation mode, and an artisan of ordinary skill in the art will easily appreciate the implementation manner of the mode switching, thus there is no need to go into details. 
     Then, in step S 120 , obtaining a current variation Δi L1  of exciting the inductor and a current variation Δi L2  of demagnetizing the inductor according to the DC voltage V DC , the output voltage V S , the inductance L S  of the inductor in the present cycle and the duty ratio D(n) of the present cycle. Then, in step S 130 , obtaining the total variation ΔI LS  of the inductor current in the present cycle according to the current variation ΔI L1  of exciting the inductor and the current variation ΔI L2  of demagnetizing the inductor in the present cycle. After step S 130  is finished, repeat step S 110  again for calculating the duty ratio after the next cycle. 
     Specifically, when the single-phase three-wire inverter  14  operates in the grid-connection mode, the step S 110  utilizes equation (5) to calculate the duty ratio D(n+1) of the next cycle. When the single-phase three-wire inverter  14  operates in the rectification mode, the step S 110  utilizes equation (11) to calculate the duty ratio D(n+1) of the next cycle. 
     Further, when the single-phase three-wire inverter  14  operates in the voltage-control mode, the step S 110  obtaining the total current variation Δi(•) of the load according to a reference voltage V ref  and a feedback voltage V fb , equalizing the load as a resistive load R, a inductive load L and a capacitive load C connected in parallel, wherein the total current variation Δi(•) of the load is the summation of the current variation of the resistive load R, the current variation of the inductive load L and the current variation of the capacitive load C as indicated in equation (33), then calculating the variation d e (n+1) of the duty ratio estimated from the load according to the total current variation Δi(•) of the load. Further, utilizing the iterative learning control to calculate the variation d i (n+1) of the duty ratio for iterative learning, in order to compensate the output voltage V S , wherein the variation d i (n+1) of the duty ratio for iterative learning is obtained from aforementioned equation (37). Finally, utilizing the duty ratio D(n+1), variation d e (n+1) of the duty ratio estimated from the load, and the variation d i (n+1) of the duty ratio for iterative learning to control the output AC voltage v O (n+1) (which is the output voltage V S ), referring to  FIG. 10 . 
     According to above descriptions, the offered single-phase three-wire power control system and control method introduce the variation of inductor into the control mechanism for effectively reducing the current oscillation and the current ripple as well as increasing the accuracy current tracking. Also, the control mechanism only needs one sampling to obtain the average of the feedback current, the processing time of the processing unit (e.g. a single-chip) can be reduced, and the switching noise occurred when turning-on and turning-off of the switches can be avoided. The single-phase three-wire power control system can switch operation modes comprising the grid-connection mode and the rectification mode according to the status of the AC power source. Further, the system can operates in the voltage-control mode when the AC power source (e.g. utility grid) fails, in which the single-phase three-wire power control system further utilizes the load impedance estimation and iterative learning control to compensate the output AC voltage. 
     Especially, in the voltage-control mode, the single-phase three-wire power control system of the mentioned embodiment introduces dead-beat control while utilizing real-time voltage sampling and current sampling to dynamically estimate the impedance of the load, and further integrates the iterative learning control to update the upper-limit and the lower-limit of the impedance for preciously tracking the reference voltage and reducing the voltage distortions. The mentioned control mechanism achieves cycle by cycle control for increasing the response speed, thus good power quality can be obtained even if the load is varying. Additionally, the inductance of the inductor can be minimized and optimized by introducing the variation of the inductance into the control mechanism, in order to avoid using excessive large inductance which increases unnecessary cost. Finally, the control method only needs one sampling to obtain the average of the feedback current, the processing time of the single-chip can be reduced, and the switching noise occurred when turning-on and turning-off of the switches can be avoided. 
     The descriptions illustrated supra set forth simply the preferred embodiments of the instant disclosure; however, the characteristics of the instant disclosure are by no means restricted thereto. All changes, alternations, or modifications conveniently considered by those skilled in the art are deemed to be encompassed within the scope of the instant disclosure delineated by the following claims.