Patent Publication Number: US-2006013284-A1

Title: Phase stuffing spread spectrum technology modulation

Description:
BACKGROUND OF THE INVENTION  
      1. Field of the Invention  
      The present invention relates to spread spectrum modulation. More specifically, the present invention discloses a method of spread spectrum modulation utilizing phase stuffing spread spectrum technology modulation to reduce electromagnetic interference.  
      2. Description of the Prior Art  
      In addition to generating the desired electrical it is intended to, a frequency generator will also radiate electromagnetic waves over the frequency spectrum of the electrical signal it generates. These electromagnetic waves will have a frequency to which other devices may be sensitive. In this case, this may prevent these devices from functioning properly. Such electromagnetic emissions are considered electromagnetic interference (EMI). The higher the energy radiated by the signal, the worse the interference. EMI is therefore characterized by the energy radiated by the frequency source, usually in terms of the resulting electric field measured in dBμV/m at a given frequency.  
      Electromagnetic interferences are subject to very strict regulations by the United States Federal Communications Commission (FCC) and other international regulatory bodies. These regulations aim at limiting the amount of EMI electronic devices emit, preventing interference between electronic devices, and preventing possible damage to the human body.  
      Frequency synthesizers, crystal oscillators, clock signal generation integrated circuits, although essential to the proper performance of many electronic devices, are the principal sources of EMI in electronic circuitry. EMI reduction is therefore a major issue for designers of electronic devices that use components generating frequency and clock signals.  
      While conventional EMI reduction methods such as shielding, special coating, filtering components, etc. are common practice, the tightness of EMI regulations and the cost sensitivity of their impact have led to the search for alternative and less expensive solutions.  
      Therefore there is need for an improved method of spread spectrum modulation utilizing a phase stuffing spread spectrum technology modulator which reduces EMI at lower cost.  
     SUMMARY OF THE INVENTION  
      To achieve these and other advantages and in order to overcome the disadvantages of the conventional method in accordance with the purpose of the invention as embodied and broadly described herein, the present invention provides a method of spread spectrum modulation utilizing phase stuffing spread spectrum technology modulation to reduce EMI.  
      It is important to note that EMI emissions will be generated over the entire frequency spectrum of the signal causing the EMI. Therefore, when considering the EMI emissions over a given frequency spectrum, one may distinguish peak emissions from average emissions. Peak emissions are defined as the highest dBμV/m level reached over the frequency spectrum of the signal, while average emissions are defined as the average dBμV/m level radiated over the frequency spectrum of the signal.  
      In terms of EMI, existing regulations are essentially concerned about preventing interference at any given frequency. Therefore, regulatory bodies limit peak emissions, rather than average emissions.  
      For a given signal source, the radiated energy or EMI emission is concentrated within the frequency spectrum of the signal. Seen from another angle, this means that if the power of the signal is kept constant, the peak emissions will be reduced whenever the frequency spectrum of the signal can be spread across a broader bandwidth. The application of this principle is called spread spectrum.  
      Spread Spectrum Modulation (SSM) consists of varying the frequency of an original perfect clock in order to spread the peak energy content that is highly concentrated in the spectrum at the single original frequency. The spectral energy then spreads around such original frequency thereby lowering its peak value.  
      Frequency Modulation is one approach to SSM. Another approach is phase stuffing SST modulator (PSSM). PSSM implements consistent and systematic phase modulation using digital edge processing.  
      PSSM is finite and periodic as it corresponds to typical periodic and centered SST modulation waveforms. Synthesized clock waveforms are usually squared in shape and their phase information fixes the time position of the clock waveform&#39;s rising and falling edges. By processing the time position of such rising edges provides implementation of any type of finite periodic phase modulation. PSSM shifts the time position of the clock rising edges by stuffing or swallowing a variable time period in the clock waveform for each of its cycles. Stuffing and swallowing is done in discrete unit of time under control of a finite state machine in an orderly manner approximating the requested continuous phase modulation. The digital processing of clock edges requires a phase interpolator to accurately define the candidate clock edges to be selected.  
      PSSM is a digital technique robust against manufacturing defects. PSSM tracks the original clock frequency such that the SST modulation is independent of it. Additionally, PSSM is flexible to allow application in a large class of applications. The only requirements are small modulation index, centered and periodic FM modulation.  
      In application, an original clock signal is input and a modulated version of the clock is output. To build the output clock with processed clock edges, the candidate rising time edge positions which will be selected by a Phase Controller and Phase Selector need to be created first.  
      A Phase Interpolator generates a plurality of phases of the original clock each shifted by a fixed time unit tau=T/(2ˆN). N is a design parameter that is set according to the application requirements such as percent modulation range, acceptable jitter levels, and acceptable spurs in the output clock.  
      The Phase Selector is a digital circuit that will move the clock phase selection by a small unit from the presently selected phases. If the selected phase is increased (stuffing or positive slip) the output clock period is increased. If the selected phase is decreased (swallowing or negative slip) the output clock period is decreased.  
      Because the modulation has to follow a given modulation pattern, the phase increment will have to follow a given order to reflect such modulation. The dedicated processor for the purpose is the Phase Controller, which is implemented as a full arithmetic unit of a finite state machine, or simply a ROM in function of the complexity of the modulation waveform.  
      By varying the frequency of the original clock the peak energy content highly concentrated in the spectrum at a single original frequency is spread. The spectral energy spreads around such original frequency thereby lowering its peak value. As a result, an electronic device utilizing the phase spread spectrum technology modulation of the present invention benefits from a much lower peak electromagnetic interference.  
      These and other objectives of the present invention will become obvious to those of ordinary skill in the art after reading the following detailed description of preferred embodiments.  
      It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
      The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings,  
       FIG. 1  is a drawing illustrating a waveform of an unmodulated clock;  
       FIG. 2  is a drawing illustrating possible clock phases;  
       FIG. 3  is a block diagram illustrating a spread spectrum technology modulator according to an embodiment of the present invention;  
       FIG. 4  is a block diagram illustrating a phase stuffing spread spectrum technology modulator according to an embodiment of the present invention;  
       FIG. 5  is a block diagram of an embodiment utilizing filtered modulation;  
       FIG. 6  is a block diagram of an embodiment utilizing feedback filtering;  
       FIG. 7  is a block diagram of an embodiment utilizing unfiltered modulation;  
       FIG. 8  is a graph illustrating percent (r) versus r;  
       FIG. 9  is a graph illustrating m(t) versus t;  
       FIG. 10  is a graph illustrating  
         ϕ   ⁡     (   t   )         2   ·   π           
 versus t; 
 
       FIG. 11  is a graph illustrating δ k  versus k;  
       FIG. 12  is a graph illustrating  
         ϕ   ⁡     (     tr   k     )         2   ·   π           
 versus k; 
 
       FIG. 13  is a graph illustrating nk versus k;  
       FIG. 14  is a graph illustrating  
           F   k       2   ·   π           ϕ   ⁡     (     tr   k     )         2   ·   π             
 versus k; and 
 
       FIG. 15  is a graph illustrating  
           F   k     -     ϕ   ⁡     (     tr   k     )           ϕ   ⁡     (     tr     N   2       )             
 versus k.
 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
      Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.  
      Following is an outline of the basic principle of the present invention.  
      The calculations for modulation m(t) are as follows:  
           f   ⁡     (   t   )       ⁢           ⁢   is   ⁢           ⁢   the   ⁢           ⁢   frequency   ⁢           ⁢   and   ⁢           ⁢     ϕ   ⁡     (   t   )       ⁢           ⁢   is   ⁢           ⁢   the   ⁢           ⁢   phase   ⁢           ⁢   deviation     ⁢     
     ⁢         m   ⁡     (   t   )       ⁢           ⁢   is   ⁢           ⁢   periodic   ⁢           ⁢   of   ⁢           ⁢   period   ⁢           ⁢   Tm     ;           ⁢       m   ⁡     (     t   +   Tm     )       =     m   ⁡     (   t   )           ⁢     
     ⁢         m   ⁡     (   t   )       ⁢           ⁢   is   ⁢           ⁢   centered     ;         ∫     t   +   0       t   +   Tm       ⁢       m   ⁡     (   u   )       ⁢     ⅆ   u         =   0       ⁢     
     ⁢           f   ⁡     (   t   )       -   fo     fo     =         1     2   ⁢   π   ⁢           ⁢   fo       ⁢     ⅆ     ⅆ   t       ⁢     ϕ   ⁡     (   t   )         =       T     2   ⁢   π       ⁢     ⅆ     ⅆ   t       ⁢     ϕ   ⁡     (   t   )             ⁢     
     ⁢           f   ⁡     (   t   )       -   fo     fo     =     m   ⁡     (   t   )             
           ⅆ     ⅆ   t       ⁢     (     ϕ   ⁡     (   t   )       )       =         2   ⁢   π     T     ·     m   ⁡     (   t   )             
         ϕ   ⁡     (   t   )       =         2   ⁢   π     T     ⁢       ∫     t   o     t     ⁢       m   ⁡     (   u   )       ⁢     ⅆ   u               
         With   ⁢           ⁢     m   ⁡     (     t   o     )         =   0       
         ϕ   ⁡     (     t   o     )       =       ϕ   ⁡     (       t   o     +   Tm     )       =   0         
 
 Therefore φ(t) is defined once m(t) is given.  
             2   ⁢   π   ⁢           ⁢   fot     +     ϕ   ⁡     (   t   )         =       k   ·   2     ⁢   π       ;       
             t   k     +       ϕ   ⁡     (     t   k     )         2   ⁢   π   ⁢           ⁢   fo         =     k   ·   fo       ;       
             t     k   +   1       +       ϕ   ⁡     (     t       k   +   1     ⁢               )         2   ⁢   π   ⁢           ⁢   fo         =       (     k   +   1     )     fo       ;       
             (       t     k   +   1       -     t   k       )     +       T     2   ⁢   π       ⁢     (       ϕ   ⁡     (     t     k   +   1       )       -     ϕ   ⁡     (     t   k     )         )         =   T     ;       
             t     k   +   1       -     t   k       =     T   -       T     2   ⁢   π       ⁢     (       ϕ   ⁡     (     t     k   +   1       )       -     ϕ   ⁡     (     t   k     )         )           ;       
           ϕ   ⁡     (   t   )       =           2   ⁢   π     T     ⁢       ∫     t   o     t     ⁢       m   ⁡     (   u   )       ⁢     ⅆ   u           =     T   -     (         ∫     t   o       t     k   +   1         ⁢       m   ⁡     (   u   )       ⁢     ⅆ   u         -       ∫     t   o       t   k       ⁢       m   ⁡     (   w   )       ⁢     ⅆ   u           )           ;       
 
      Therefore,  
           ϕ   ⁡     (   t   )       =     T   -       ∫     t   k       t     k   +   1         ⁢       m   ⁡     (   u   )       ⁢     ⅆ   u             ;       
 
      Refer to  FIG. 1 , which is a drawing illustrating a waveform of an unmodulated clock.  
      The rising edges of an unmodulated digital clock occurs at time t k  such that 2πf 0 t=k·2π or t k =kT.  
      For all k; t k+1 −t k =T  
      Spread spectrum modulation transforms this into  
             t     k   +   1       -     t   k       =     T   -       ∫     t   k       t     k   +   1         ⁢       m   ⁡     (   u   )       ⁢     ⅆ   u             ;       
 
      The modulation m(t) being known (periodic and centered).  
      Refer to  FIG. 2 , which is a drawing illustrating possible clock phases.  
      This shows at every cycle the next rising edge has to be selected from a set of possible clock phases.  
      In application, the principle described above can be implemented in digital circuitry.  
      Refer to  FIG. 3  which is a block diagram illustrating a spread spectrum technology modulator according to an embodiment of the present invention.  
      As shown in  FIG. 3 , the spread spectrum technology modulator  300  comprises an edge selector  320  and a next edge finite state machine  330 . The original clock signal is CLK  310 . The modulated output clock is CLKOUT  340 . The original clock signal  310  is fed into an edge selector  320 . Because the modulation follows a given modulation pattern, the phase increment follows a given order to reflect such modulation. In order to achieve this a dedicated processor is utilized. In the embodiment shown in  FIG. 3 , a next edge Finite State Machine (FSM)  330  is used. However, other devices such as a read only memory (ROM) could be used.  
      The FSM  330  comprises a look-up table storing stuffing or swallowing values. SST modulation is specified in terms of profile and associated parameters for example, triangular modulation, 0.5% peak modulation (f0*0.995 to f0*1.005) and modulation rate of 33 KHz. Note that these values are given as way of example. The actual values can be selected to meet requirements. These parameters provide the frequency function of time f(t), and integration delivers the phase function of time phi(t). A discrete approximation of phi(t) is obtained in terms of accumulated stuffing or swallowing n(k). It is these n(k) which are stored in the look-up table.  
      Therefore, utilizing the edge selector  320  in conjunction with the next edge FSM  330 , the modulated CLKOUT  340  is achieved.  
      Refer to  FIG. 4 , which is a block diagram illustrating a phase stuffing spread spectrum technology modulator according to an embodiment of the present invention.  
      As shown in  FIG. 4 , the phase stuffing spread spectrum technology modulator  400  comprises a phase interpolator  420 , a phase selector  430 , and a phase controller  440 .  
      CLK  410  is the original clock input and CLKOUT  450  is the modulated version.  
      To build CLKOUT  450  with processed clock edges, the candidate rising time edge positions which will be selected by the phase controller  440  and phase selector  430  blocks need to be created first.  
      The Phase Interpolator  420  block generates 0, 1, . . . , 2ˆN−1 phases of the original clock CLK  410  each shifted by a fixed time unit tau=T/(2ˆN). N is a design parameter that is set according to the application requirements such as percent modulation range, acceptable jitter levels, and acceptable spurs in CLKOUT  450 . N is usually an integer number between 5 . . . 8. It should be noted that the 2ˆN phases do not need to be available at the same time, but only the one in the neighborhood of the last selected phase needs to be generated. For example, if N=8 it would only be about 5 out of the 256 phases. The reason for this is that usual modulations within a cycle of the clock are by very small index (%/a factor). Phase Octant selection is used and interpolation is within each Octant.  
      The Phase Selector  430  is a digital circuit that will move the clock phase selection by a small unit from the presently selected phases. If the selected phase is increased (stuffing or positive slip) the CLKOUT  450  period is increased. If the selected phase is decreased (swallowing or negative slip) the CLKOUT  450  period is decreased.  
      Because the modulation has to follow a given modulation pattern, the phase increment will have to follow a given order to reflect such modulation. The dedicated processor for the purpose is the Phase Controller  440  block that is implemented as a full arithmetic unit of a finite state machine or simply a ROM in function of the complexity of the modulation waveform.  
      As with the embodiment of the present invention as illustrated in  FIG. 3 , the embodiment shown in  FIG. 4  also discloses SST modulation which is specified in term of profile and associate parameters, for example, Triangular modulation, 0.5% peak modulation (f0*0.995 to f0*1.005 and modulation rate of 33 Khz. This provides the frequency function of time f(t), integration delivers the phase function of time φ(t). Then a discrete approximation of φ(t) is obtained in terms of accumulated stuffing or swallowing n(k). It is these n(k) which are stored in the ROM look-up table or Phase Controller.  
      Refer to  FIG. 5 , which is a block diagram of an embodiment utilizing filtered modulation,  FIG. 6 , which is a block diagram of an embodiment utilizing feedback filtering, and  FIG. 7 , which is a block diagram of an embodiment utilizing unfiltered modulation.  
      A phase locked loop can be used to filter the discrete phase jumps occurring at each stuffing or swallowing. The modulated clock can be either the REF clock of the filtering PLL (front filtering) as illustrated in  FIG. 5 , or the modulator can be embedded in the phase locked loop feedback path (feedback filtering) as illustrated in  FIG. 6 . In both cases the PLL output provides a filtered version of the discretely modulated clock. Alternately, an unfiltered modulated clock is provided by the embodiment illustrated in  FIG. 7 .  
      As shown in  FIG. 5 , the clock in  510  on the front end is modulated by a modulator  520  and then filtered by a PLL filter  530  and output  540 .  
      Alternatively, as shown in  FIG. 6 , the modulator  620  is in the phase locked loop feedback path. A voltage controlled oscillator VCO  610  provides the clock output  630 .  
      For an unfiltered modulated clock as shown in  FIG. 7 , the VCO  710  provides the reference clock which is then modulated by the modulator  720  and then output  730 .  
      The following calculations and analysis are given as an example of a method for SST modulation based on phase interpolation and the generation of the stuffing values.  
      VCO period: 
          f0:=400.0·10 6  T0:=1/f0 T0=2.5×10 −9  kstuff:=1        

      Interpolator granularity:  
       k   :=       5   ⁢           ⁢   τ     =         T0     2   k       ⁢           ⁢   τ     =     7.8125   ×     10     -   11                 
 
 acceptable added jitter. 
 
      For a case of a single k_stuffing every r time.  
         percent   ⁡     (   r   )       :=       10   2     ·       kstuff     r   ·     2   k           1   +     kstuff     r   ·     2   k                   
 
 in absolute value. 
 
      Refer to  FIG. 8 , which is a graph illustration peak values according to an embodiment of the present invention. As shown in  FIG. 8 , the peak value should be feasible: r:=2 . . . 16. 
 
 Ds:=16 Phase Updates (stretch or contract) only occur once per Ds period of the VCO.  
             fup   :=     f0   Ds             Tup   :=     1   fup             Tup   =     4   ⁢     x10     -   8       ⁢           ⁢   Update   ⁢           ⁢   Frequency                 fm   :=       (       30.0   +   33.0     2     )     ·     10   3               Tm   :=     1   fm             Tm   =     3.174603   ×     10     -   5       ⁢           ⁢   Modulation               
 
 Frequency  
         φ   ⁡     (   t   )       =       φ   ⁡     (   t0   )       +     2   ·   π   ·   f0   ·     (     t   -   t0     )       +     2   ·   π   ·   f0   ·       ∫   t0   t     ⁢       m   ⁡     (   u   )       ⁢           ⁢     ⅆ   u                 
         f   ⁡     (   t   )       =     f0   ·     (     1   +     m   ⁡     (   t   )         )           
       Assume   ⁢     :     ⁢             φ   ⁡     (   t0   )       =   0           t0   =   0               
         φ   ⁡     (   t   )       =       2   ·   π   ·   f0   ·   t     +     2   ·   π   ·   f0   ·       ∫   t0   t     ⁢       m   ⁡     (   u   )       ⁢           ⁢     ⅆ   u                 
         f   ⁡     (   t   )       =         1     2   ⁢   π       ·     ⅆ     ⅆ   t         ⁢     φ   ⁡     (   t   )             
         ϕ   ⁡     (   t   )       =       φ   ⁡     (   t   )       -     2   ·   π   ·   f0   ·   t           
             Define   ⁢     :               φ   ⁡     (     tr   k     )       =     k   ·   2   ·   π             Rising   ⁢           ⁢   Edge   ⁢           ⁢   at   ⁢           ⁢   Ds   ⁢           ⁢   rate                             ϕ   ⁡     (   t   )       =         2   ·   π     T0     ·       ∫   0   t     ⁢       m   ⁡     (   u   )       ⁢           ⁢     ⅆ   u                                 
                   2   ·   π     ⁢           ⁢     f0   ·     tr   k         +     ϕ   ⁡     (     tr   k     )       -     k   ·   2   ·   π   ·   Ds       =   0             tr   k     =       k   ·   Ds   ·   T0     -     To   ·       ϕ   ⁡     (     tr   k     )         2   ·   π                       Tup   =     Ds   ·   T0                           
 
      Phase interpolation will be by rising edge clock adjustment  
           (       tr   k     -     tr     k   -   1         )     -   T0     =         -   T0     ·         ϕ   ⁢     (     tr   k     )       -     ϕ   ⁡     (     tr     k   -   1       )           2   ·   π         =     -       ∫     tr     k   -   1         tr   k       ⁢       m   ⁡     (   u   )       ⁢           ⁢     ⅆ   u                 
               Center   ⁢           ⁢   Spread   ⁢           ⁢   with   ⁢           ⁢   x     :=   0.012             Δ   ⁢           ⁢   f     :=       x   2     ·   f0               Δ   ⁢           ⁢   f     =     2.4   ⁢     x10   6                 
 
      Δf is the peak frequency deviation  
         mod   ⁢           ⁢     u   ⁡     (   t   )         :=     2   ·   x   ·     t   Tm           
 
 Base modulation waveform. t&gt;=0. 
 
      To allow for a reduced ROM memory in the implementation some reasonable constraints are enforced on the modulation waveform.  
               m   ⁡     (   t   )       :=     t   ←     mod   ⁡     (     t   ,   Tm     )                 Periodic   ⁢           ⁢   with   ⁢           ⁢   period   ⁢           ⁢     Tm   .                 0   ⁢           ⁢   if   ⁢           ⁢       (     t   =   0     )     ⋁     (     t   =     Tm   2       )               Single   ⁢           ⁢   value   ⁢           ⁢   at   ⁢           ⁢   t   ⁢     -     ⁢   intervals   ⁢           ⁢   boundaries                   x   2     ⁢           ⁢   if   ⁢           ⁢   t     =     Tm   4                                 -     x   2       ⁢           ⁢   if   ⁢           ⁢   t     =     3   ·     Tm   4                                 mod   ⁢           ⁢     u   ⁡     (   t   )       ⁢           ⁢   if   ⁢           ⁢   0     &lt;   t   &lt;     Tm   4             Quadrantal   ⁢           ⁢   Symmetry             
         mod   ⁢           ⁢     u   ⁡     (       Tm   2     -   t     )       ⁢           ⁢   if   ⁢           ⁢     Tm   4       &lt;   t   &lt;       Tm   2     ⁢     
     -     mod   ⁢           ⁢     u   ⁡     (     t   -     Tm   2       )       ⁢           ⁢   if   ⁢           ⁢     Tm   2         &lt;   t   &lt;       3   ·     Tm   4       ⁢     
     -     mod   ⁢           ⁢     u   ⁡     (     Tm   -   t     )       ⁢           ⁢   if   ⁢           ⁢     3   ·     Tm   4           &lt;   t   &lt;   Tm       
 
         i   ⁢           ⁢   mod   ⁢           ⁢     u   ⁡     (   t   )         :=         2   ·   π     T0     ·   x   ·       t   2     Tm           
 
 Integral of the modulation function including the phase conversion factor. t&gt;=0.  
               ϕ   ⁡     (   t   )       :=           t   ←     mod   ⁡     (     t   ,   TM     )                                   i   ⁢           ⁢   mod   ⁢           ⁢     u   ⁡     (   t   )       ⁢           ⁢   if   ⁢           ⁢   0     &lt;   t     ,     Tm   4                                   2   ·   i     ⁢           ⁢   mod   ⁢           ⁢     u   ⁡     (     Tm   4     )         -     i   ⁢           ⁢   mod   ⁢           ⁢     u   ⁡     (       Tm   2     -   t     )       ⁢           ⁢   if   ⁢           ⁢     Tm   4         &lt;   t   &lt;     Tm   2                                   2   ·   i     ⁢           ⁢   mod   ⁢           ⁢     u   ⁡     (     Tm   4     )         -     i   ⁢           ⁢   mod   ⁢           ⁢     u   ⁡     (     t   -     Tm   2       )       ⁢           ⁢   if   ⁢           ⁢     Tm   2         &lt;   t   &lt;     3   ·     Tm   4                                 i   ⁢           ⁢   mod   ⁢           ⁢     u   ⁡     (     Tm   -   t     )       ⁢           ⁢   if   ⁢           ⁢     3   ·     Tm   4         &lt;   t   &lt;   Tm             
 
      Further one synchronizes the modulation frequency with the update frequency when sampling the modulation waveform.  
             N   :=     round   ⁢           ⁢       (       Tm   4     Tup     )     ·   4               N   =   792             N   4     =   198               Tm   :=     N   ·   Tup             fm   :=     1   Tm             fm   =     3.156566   ×     10   4                 
       Tm   =     3.168   ×     10     -   5             
         t   :=   0     ,       Tm   N     ⁢           ⁢   …   ⁢           ⁢   Tm         
 
      Refer to  FIG. 9 , which is a graph illustrating m(t) versus t, and to  FIG. 10 , which is a graph illustrating  
         ϕ   ⁡     (   t   )         2   ·   π         
 
 versus t. 
 
      Exact rising edge times induced by the modulation:  
             N   =   792             tr   k     =       k   ·   Tup     -     T0   ·       ϕ   ⁡     (     tr   k     )         2   ·   π                     tr   0     :=   0           Rising   ⁢           ⁢   edges   ⁢           ⁢   once             
         every   ⁢           ⁢   Ds   ⁢           ⁢   edges   ⁢           ⁢   of   ⁢           ⁢     T0   .     
     ⁢   k       :=     1   ⁢           ⁢   …   ⁢           ⁢   N         
         tr   k     :=     root   ⁡     [             y   -     k   ·   Tup     +     T0   ·       ϕ   ⁡     (   y   )         2   ·   π           ,               y   ,       tr     k   -   1       +     Tup   ·     (     1   -   x     )         ,       tr     k   -   1       +     Tup   ·     (     1   +   x     )                 ]           
               δ   ⁢           ⁢   k     :=       -   Tup     ·         ϕ   ⁢     (     tr   k     )       -     ϕ   ⁡     (     tr     k   -   1       )           2   ·   π                 k   :=     0   ⁢           ⁢   …   ⁢           ⁢   N               
 
      Refer to  FIG. 11 , which is a graph illustrating δ k  versus k, and to  FIG. 12 , which is a graph illustrating  
         ϕ   ⁡     (     tr   k     )         2   ·   π         
 
 versus k. 
 
      The generated edges (clock phases) have to track at best the ideal rising edges via the stuffing nk:  
               tr   k     =       tr     k   -   1       +   Tup   -     T0   ·         ϕ   ⁢     (     tr   k     )       -     ϕ   ⁡     (     tr     k   -   1       )           2   ·   π                     tr   0     =   0                 tg   k     =       tg     k   -   1       +   Tup   +       n   k     ·   τ                 tg   0     =   0             
         F   k     =       F     k   -   1       +         2   ·   π     T0     ·     [     Tup   -     (       tg   k     -     tg     k   -   1         )       ]             
               tg   k     :=   0             n   0     :=   0             F   0     :=   0             
       k   :=     1   ⁢           ⁢   …   ⁢           ⁢   N         
         tg   k     :=       tg     k   -   1       +   Tup   +       round   ⁡     (         tr   k     -     tg     k   -   1       -   Tup     τ     )       ·   τ           
         n   k     :=     round   ⁡     (         tr   k     -     tg     k   -   1       -   Tup     τ     )           
         F   k     :=       F     k   -   1       +         2   ·   π     T0     ·     [     Tup   -     (       tg   k     -     tg     k   -   1         )       ]             
       k   :=     0   ⁢           ⁢   …   ⁢           ⁢   N         
 
      Refer to  FIG. 13 , which is a graph illustrating nk versus k, to  FIG. 14 , which is a graph illustrating  
           F   k       2   ·   π           ϕ   ⁡     (     tr   k     )         2   ·   π           
 
 versus k, and to  FIG. 15 , which is a graph illustrating  
           F   k     -     ϕ   ⁡     (     tr   k     )           ϕ   ⁡     (     tr     N   2       )           
 
 versus k. 
 
      Utilizing the phase stuffing spread spectrum modulation method of the present invention offers numerous benefits and advantages. PSSM is a digital technique robust against manufacturing defects. PSSM tracks the original clock frequency such that the SST modulation is independent of it. And PSSM is flexible to allow a large class of applications.  
      Therefore, the present invention provides a method of phase stuffing spread spectrum modulation by varying the frequency of an original clock in order to spread the peak energy content highly concentrated in the spectrum at a single original frequency. The spectral energy spreads around such original frequency thereby lowering its peak value. As a result, an electronic device utilizing the phase spread spectrum technology modulation of the present invention benefits from a much lower peak electromagnetic interference.  
      It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the invention and its equivalent.