Patent Publication Number: US-2022216703-A1

Title: Energy transfer circuit and power storage system

Description:
TECHNICAL FIELD 
     The present invention relates to an energy transfer circuit and a power storage system that transfers energy among a plurality of cells or modules connected in series. 
     BACKGROUND ART 
     In recent years, secondary batteries such as lithium-ion batteries and nickel-metal-hydride batteries have been used for various purposes. The secondary batteries are each used for an in-vehicle (including an electric bicycle) application for supply of a power to a drive motor of an electric vehicle (EV), a hybrid electric vehicle (HEV), or a plug-in hybrid vehicle (PHV), for power storage for a peak shift or a backup, and for frequency regulation (FR) for stabilizing a frequency of a system, for example. 
     Generally, the secondary battery such as the lithium-ion battery executes an equalizing process for equalizing capacities among a plurality of cells connected in series from the viewpoint of maintaining power efficiency and ensuring safety. The equalizing process includes a passive method and an active method. The passive method is a method for equalizing capacities among a plurality of cells connected in series by connecting a discharge resistor to each of the plurality of cells, and discharging the other cells so as to match the voltages of the other cells with a voltage of a cell having the lowest voltage. The active method is a method for equalizing capacities among a plurality of cells connected in series by transferring energy among the plurality of cells. Although the active method has less power loss than the passive method and can reduce a heat generation amount, the passive method with a simple circuit configuration at low cost is currently the mainstream. 
     In recent years, a battery pack has been increased in energy capacity and output, especially in in-vehicle applications. That is, the capacity of each cell in the battery pack and a number of series connections of cells are increasing. This causes an imbalance of an energy amount among the plurality of cells to increase. Therefore, the equalizing process also increases a time required to eliminate the imbalance among the plurality of cells. 
     In contrast, reduction in time required for the equalizing process is required especially in the in-vehicle applications. In order to eliminate a large energy imbalance in a short time, it is necessary to apply a large current for equalization. The passive method eliminates an imbalance of energy by consuming a capacity of a cell having a high voltage using a resistor, so that increase in amount of current flowing into the resistor increases a heat generation amount. As the number of series connections of cells increases as described above, a heat dissipation area for heat generated in the resistor is less likely to be secured on a substrate. 
     This increases need for the active method in which energy is transferred to a cell having a small capacity instead of converting the energy into heat to consume the energy. As a configuration of an active equalizing circuit, there is a configuration in which an inductor is connected between the midpoint of two cells and the midpoint of two switches connected in parallel to the two cells (see, for example, PTL 1). 
     The above circuit configuration is a circuit for performing energy transfer between two adjacent cells, but when three or more cells are connected in series and configured such that energy can be transferred between any two cells, the circuit configuration becomes complicated. It is necessary to provide a cell selection circuit capable of arbitrarily selecting one of a plurality of cells, or to arrange a plurality of the above circuit configurations in series and transfer energy in a bucket relay manner. In the former case, a number of wirings and switches for constituting the cell selection circuit increases. In the latter case, a number of inductors increases according to a number of series connections of cells. 
     When the energy transfer is performed between two cells, an external short circuit of the cell or breakdown in withstand voltage of the switch may occur due to variations in on and off timings of a plurality of corresponding switches. 
     On the other hand, it is conceivable to perform control to insert a period in which a current flows through a body diode of the switch between transition from an excitation state of the inductor to an active clamp state and transition from the active clamp state to a demagnetization state. 
     CITATION LIST 
     Patent Literature 
     PTL 1: Unexamined Japanese Patent Publication No. 7-322516 
     SUMMARY OF THE INVENTION 
     Technical Problem 
     According to the study of the inventor of the present invention, it has been found that an abnormal spike occurs in an inductor current and an end-to-end voltage of the inductor depending on a control timing of the switch in the circuit adopting the above control. Noise due to this spike voltage may affect a drive signal of the switch and may cause the switch to malfunction. The breakdown in withstand voltage may occur in the switch due to this spike voltage. 
     The present disclosure has been made in view of such a situation, and an object of the present disclosure is to provide a technique for achieving a highly reliable and safe energy transfer circuit using an inductor. 
     Solution to Problem 
     In order to solve the above problems, an energy transfer circuit of one aspect of the present disclosure includes an inductor, a cell selection circuit that is provided between n cells connected in series, where n is an integer of 2 or more, and the inductor, and is capable of electrically connecting both ends of a selected cell including any one of the n cells or a plurality of cells connected in series and both ends of the inductor, a clamp circuit that includes clamp switches for forming a closed loop including the inductor in a state where the cell selection circuit does not select any cell, and a controller that controls the cell selection circuit and the clamp circuit. The cell selection circuit includes a first wiring that is connected to one end of the inductor, a second wiring that is connected to an other end of the inductor, a plurality of first wiring switches that selectively connect one of both the ends of the selected cell to the first wiring, and at least one second wiring switch that selectively connects an other end of both the ends of the selected cell to the second wiring. In the clamp switch, two switching elements, having diodes, are connected in series and formed in a state where the diodes are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements, in the first wiring switch, two switching elements, having diodes, are connected in series and formed in a state where the diodes are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements, and in the second wiring switch, two switching elements, having diodes, are connected in series and formed in a state where the diodes are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements. The controller controls states in order of an inductor current increase state where a discharge path through which both the ends of the inductor are connected to nodes on both sides of a discharge cell which is the selected cell to be discharged among the n cells is formed by controlling electrical connection states of the first wiring switch, the second wiring switch, and the clamp switch connected to the nodes on both the sides of the discharge cell, a current flowing to the inductor from the discharge cell, and the current flowing to the inductor is increased, a clamp state where a clamp path through which both the ends of the inductor are connected via the clamp switch is formed by controlling the electrical connection states of the first wiring switch, the second wiring switch, and the clamp switch connected to the nodes of both the sides of the discharge cell, a clamp current flowing between both the ends of the inductor, and the current flowing to the inductor is circulated through the clamp path, and an inductor current decrease state where a charge path through which both the ends of the inductor are connected to nodes of both sides of a charge cell which is the selected cell to be charged among the n cells is formed by controlling electrical connection states of the first wiring switch, the second wiring switch, and the clamp switch connected to the nodes of both the sides of the charge cell, a current flowing to the charge cell from the inductor, and the current flowing to the inductor is decreased. The clamp state includes a first clamp state where a clamp current flows through a diode in parallel with at least one switching element among a plurality of switching elements forming the clamp path by turning off the at least one switching element and a second clamp state where the switching element in the off state is turned on and all the plurality of switching elements are turned on. The controller forms the clamp path in the first clamp state by turning on all of a plurality of switching elements forming the discharge path in the inductor current increase state and then turning on a part of a plurality of switching elements constituting the clamp switch before the state is switched to a next first clamp state. 
     Advantageous Effect of Invention 
     According to the present disclosure, it is possible to achieve a highly reliable and safe energy transfer circuit using an inductor. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         FIG. 1  is a diagram showing a configuration of a power storage system according to an exemplary embodiment. 
         FIG. 2( a ) to ( h )  is circuit diagram for explaining a basic operation sequence example of an equalizing process of the power storage system according to the exemplary embodiment. 
         FIG. 3( a ) to ( c )  is diagram for explaining a specific example of the equalizing process of the power storage system according to the exemplary embodiment. 
         FIGS. 4( a ) and ( b )  is diagram showing a circuit configuration example when a first switch includes two N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs). 
         FIG. 5  is a diagram showing a circuit configuration example when a bidirectional switch shown in the configuration example of  FIG. 4( a )  is used for a switch of the power storage system according to the exemplary embodiment. 
         FIGS. 6( a ) and ( b )  is diagram obtained by extracting a path used for energy transfer between two cells in the circuit configuration example of the power storage system shown in  FIG. 5 .  FIGS. 7( a ) and ( b )  is diagram in which switches whose on and off states do not change during energy transfer between two cells are omitted in the circuit configuration example of the power storage system shown in  FIG. 6( a ) and ( b ) . 
         FIG. 8( a )  is a diagram showing a circuit configuration example of the power storage system shown in  FIG. 7( a )  in an organized manner for unified description, and  FIG. 8( b )  is a diagram showing a variation of  FIG. 8( a ) . 
         FIG. 9( a ) to ( e )  is diagram showing a circuit state in control according to a comparative example of the power storage system shown in  FIG. 8( a )  (part 1). 
         FIG. 10( a ) to ( e )  is diagram showing a circuit state in control according to the comparative example of the power storage system shown in  FIG. 8( a )  (part 2). 
         FIG. 11  is a diagram showing a switching pattern of eight switching elements, a time transition of an end-to-end voltage of an inductor, and a current of the inductor in the control according to the comparative example of the power storage system shown in  FIG. 8( a ) . 
         FIG. 12( a ) to ( c )  is diagram showing a circuit state in control according to the exemplary embodiment of the power storage system shown in  FIG. 8 . 
         FIG. 13  is a diagram showing a switching pattern of eight switching elements, a time transition of an end-to-end voltage of an inductor, and a current of the inductor in the control according to the exemplary embodiment of the power storage system shown in FIG. 
         8 ( a ). 
         FIG. 14  is a diagram showing a configuration of a power storage system according to another exemplary embodiment. 
         FIG. 15  is a diagram showing a configuration of a power storage system according to still another exemplary embodiment. 
     
    
    
     DESCRIPTION OF EMBODIMENTS 
       FIG. 1  is a diagram showing a configuration of power storage system  1  according to an exemplary embodiment. Power storage system  1  includes equalizing circuit  10  and power storage  20 . Power storage  20  includes n (n is an integer of 2 or more) cells connected in series.  FIG. 1  illustrates an example in which four cells C 1  to C 4  are connected in series. A number of cells connected in series varies according to voltage specifications required for power storage system  1 . 
     For each cell, a rechargeable power storage element such as a lithium-ion battery cell, a nickel-metal-hydride battery cell, a lead battery cell, an electric double layer capacitor cell, and a lithium ion capacitor cell is available. Hereinafter, an example using a lithium-ion battery cell (nominal voltage: 3.6 to 3.7V) is assumed in the description. 
     Equalizing circuit  10  includes voltage detector  14 , cell selection circuit  11 , energy retaining circuit  12 , and controller  13 . Voltage detector  14  detects a voltage of each of n (four in  FIG. 1 ) cells connected in series. Specifically, voltage detector  14  is connected to nodes of n cells connected in series by (n+1) voltage lines, and detects a voltage between two adjacent voltage lines, thereby detecting a voltage of each cell. Voltage detector  14  can be configured with, for example, a general-purpose analog front-end integrated circuit (IC) or an application specific integrated circuit (ASIC). Voltage detector  14  converts the detected voltage of each of the cells into a digital value and outputs the digital value to controller  13 . 
     Cell selection circuit  11  is a circuit provided between the n cells connected in series and inductor L 1  included in energy retaining circuit  12 , and capable of electrically connecting both ends of a cell selected from among the n cells to both ends of inductor L 1 . Cell selection circuit  11  includes first wiring W 1  connected to a first end of inductor L 1 , second wiring W 2  connected to a second end of inductor L 1 , a plurality of first wiring switches, and at least one second wiring switch. 
     The plurality of first wiring switches are connected between odd-numbered nodes and first wiring W 1  among nodes (n+1) of the n cells connected in series. At least one second wiring switch is connected between even-numbered nodes and second wiring W 2  among the nodes (n+1) of the n cells connected in series. 
     In the example shown in  FIG. 1 , n=4 and the number of nodes=5, and cell selection circuit  11  has three first wiring switches and two second wiring switches. In  FIG. 1 , first switch S 1 , fifth switch S 5 , and ninth switch S 9  are the first wiring switches, and fourth switch S 4  and eighth switch S 8  are the second wiring switches. 
     Energy retaining circuit  12  (also referred to as a clamp circuit) includes inductor L 1 , first clamp switch Sc 1 , second clamp switch Sc 2 , third clamp switch Sc 3 , and fourth clamp switch Sc 4 . First clamp switch Sc 1 , second clamp switch Sc 2 , third clamp switch Sc 3 , and fourth clamp switch Sc 4  form a full bridge circuit. Specifically, a first arm in which first clamp switch Sc 1  and second clamp switch Sc 2  are connected in series, and a second arm in which third clamp switch Sc 3  and fourth clamp switch Sc 4  are connected in series are connected in parallel between first wiring W 1  and second wiring W 2 . Inductor L 1  is connected between a node between first clamp switch Sc 1  and second clamp switch Sc 2  and a node between third clamp switch Sc 3  and fourth clamp switch Sc 4 . 
     First clamp switch Sc 1  to fourth clamp switch Sc 4  can electrically connect both the ends of inductor L 1  in energy retaining circuit  12 . Specifically, in a state where cell selection circuit  11  does not select any cell, first clamp switch Sc 1  and third clamp switch Sc 3  are controlled to an electrical connection state, and second clamp switch Sc 2  and fourth clamp switch Sc 4  are controlled to an electrical non-connection state, or first clamp switch Sc 1  and third clamp switch Sc 3  are controlled to an electrical non-connection state, and second clamp switch Sc 2  and fourth clamp switch Sc 4  are controlled to an electrical connection state, and thereby a closed loop including inductor L 1  can be formed in energy retaining circuit  12 . 
     First clamp switch Sc 1  to fourth clamp switch Sc 4  can switch a direction of a current flowing to inductor L 1  . Specifically, in a state where cell selection circuit  11  selects any cell, first clamp switch Sc 1  and fourth clamp switch Sc 4  are controlled to an electrical connection state, and second clamp switch Sc 2  and third clamp switch Sc 3  are controlled to an electrical non-connection state, or first clamp switch Sc 1  and fourth clamp switch Sc 4  are controlled to an electrical non-connection state, and second clamp switch Sc 2  and third clamp switch Sc 3  are controlled to an electrical connection state, and thereby the direction of the current flowing to inductor L 1  can be switched. 
     Controller  13  executes an equalizing process among the n cells connected in series based on the voltages of the n cells, the voltages being detected by voltage detector  14 . Controller  13  can be, for example, a microcomputer. Controller  13  and voltage detector  14  may be integrated into one chip. 
     In the present exemplary embodiment, controller  13  executes an equalizing process among the n cells connected in series by an active cell balance method. In the active cell balance method according to the present exemplary embodiment, energy is transferred from one cell (cell to be discharged) to another cell (cell to be charged) among the n cells connected in series to equalize capacities of one cell and the other cell. Repeating this energy transfer equalizes capacities among the n cells connected in series. 
     First, controller  13  controls first clamp switch Sc 1  and fourth clamp switch Sc 4  to an electrical connection state and second clamp switch Sc 2  and third clamp switch Sc 3  to an electrical non-connection state, or controls first clamp switch Sc 1  and fourth clamp switch Sc 4  to an electrical non-connection state and controls second clamp switch Sc 2  and third clamp switch Sc 3  to an electrical connection state, and controls cell selection circuit  11  to electrically connect both ends of the cell to be discharged among the n cells and both the ends of inductor L 1  for a predetermined time. Thus, a discharge path is formed. In a state where the discharge path is formed, a current flows between the cell to be discharged and inductor L 1 , and a state where a current flows from the cell to be discharged to inductor L 1  (also referred to as an inductor increase state) occurs, and energy is stored in inductor L 1 . 
     Subsequently, controller  13  controls cell selection circuit  11  to electrically shut off the n cells and inductor L 1 , and controls first clamp switch Sc 1  and third clamp switch Sc 3  to an electrical connection state, and second clamp switch Sc 2  and fourth clamp switch Sc 4  to an electrical non-connection state, or controls first clamp switch Sc 1  and third clamp switch Sc 3  to an electrical non-connection state, and second clamp switch Sc 2  and fourth clamp switch Sc 4  to an electrical connection state. Thus, a clamp path is formed. In this clamp state, a circulating current flows through the closed loop, and an inductor current is actively clamped in energy retaining circuit  12 . 
     Subsequently, controller  13  controls first clamp switch Sc 1  and fourth clamp switch Sc 4  to an electrical connection state, and second clamp switch Sc 2  and third clamp switch Sc 3  to an electrical non-connection state, or controls first clamp switch Sc 1  and fourth clamp switch Sc 4  to an electrical non-connection state, and second clamp switch Sc 2  and third clamp switch Sc 3  to an electrical connection state, and controls cell selection circuit  11  to electrically control both ends of the cell to be charged among the n cells and both the ends of inductor L 1  for a predetermined time. Thus, a charge path is formed. In a state where the charge path is formed, a current flows between the cell to be charged and inductor L 1 , and a state where an inductor current actively clamped in energy retaining circuit  12  flows in the cell to be charged (also referred to as an inductor current decrease state) occurs. Accordingly, the energy transfer from one cell to another is completed. 
       FIG. 2( a ) to ( h )  is circuit diagram for explaining a basic operation sequence example of the equalizing process of power storage system  1  according to the exemplary embodiment. In the present basic operation sequence example, the number of series connections of cells is set to two for the sake of simplicity of explanation. In a first state shown in  FIG. 2( a ) , controller  13  controls first switch S 1 , first clamp switch Sc 1 , fourth clamp switch Sc 4 , and fourth switch S 4  to an electrical connection state, and controls fifth switch S 5 , second clamp switch Sc 2 , and third clamp switch Sc 3  to an electrical non-connection state. Thus, a discharge path is formed. In this discharge state, a current flows from first cell C 1  to inductor L 1 , and the energy discharged from first cell C 1  is stored in inductor L 1 . 
     In a second state shown in  FIG. 2( b ) , controller  13  controls second clamp switch Sc 2  and fourth clamp switch Sc 4  to an electrical connection state, and controls first switch S 1 , fourth switch S 4 , fifth switch S 5 , first clamp switch Sc 1 , and third clamp switch Sc 3  to an electrical non-connection state. Thus, a clamp path is formed. In this clamp state, the energy stored in inductor L 1  flows as the inductor current in the closed loop and is actively clamped. 
     In a third state shown in  FIG. 2( c ) , controller  13  controls fourth clamp switch Sc 4 , fourth switch S 4 , fifth switch S 5 , and first clamp switch Sc 1  to an electrical connection state, and controls first switch S 1 , second clamp switch Sc 2 , and third clamp switch Sc 3  to an electrical non-connection state. Thus, a charge path is formed. In this charge state, the inductor current actively clamped in the closed loop flows to second cell C 2  to charge second cell C 2 . 
     In a fourth state shown in  FIG. 2( d ) , controller  13  controls first switch S 1 , fourth switch S 4 , fifth switch S 5 , and first clamp switch Sc 1  to fourth clamp switch Sc 4  to an electrical non-connection state. In this state, the energy transfer from first cell C 1  to second cell C 2  is completed. The description performed so far is the description of a mode in which the current of inductor L 1  is not inverted (a mode in which the current is not commutated). When the discharge from second cell C 2  is started simultaneously with the completion of the charge of second cell C 2  (commutation mode), the fourth state shown in  FIG. 2( d )  is omitted. The current of inductor L 1  becomes zero at the moment of commutation, and the state is changed from  FIG. 2( c )  to  FIG. 2( e )  in which the current of inductor L 1  is inverted. 
     In a fifth state shown in  FIG. 2( e ) , controller  13  controls fourth switch S 4 , second clamp switch Sc 2 , third clamp switch Sc 3 , and fifth switch S 5  to an electrical connection state, and controls first switch S 1 , first clamp switch Sc 1 , and fourth clamp switch Sc 4  to an electrical non-connection state. Thus, a discharge path is formed. In this discharge state, a current flows from second cell C 2  to inductor L 1 , and the energy discharged from second cell C 2  is stored in inductor L 1 . 
     In a sixth state shown in  FIG. 2( f ) , controller  13  controls first clamp switch Sc 1  and third clamp switch Sc 3  to an electrical connection state, and controls first switch S 1 , fourth switch S 4 , fifth switch S 5 , second clamp switch Sc 2 , and third clamp switch Sc 3  to an electrical non-connection state. Thus, a clamp path is formed. In this clamp state, the energy stored in inductor L 1  flows as the inductor current in the closed loop and is actively clamped. 
     In a seventh state shown in  FIG. 2( g ) , controller  13  controls third clamp switch Sc 3 , first switch S 1 , fourth switch S 4 , and second clamp switch Sc 2  to an electrical connection state, and controls fifth switch S 5 , first clamp switch Sc 1 , and fourth clamp switch Sc 4  to an electrical non-connection state. Thus, a charge path is formed. In this charge state, the inductor current actively clamped in the closed loop flows to first cell C 1  to charge first cell C 1 . 
     In an eighth state shown in  FIG. 2( h ) , controller  13  controls first switch S 1 , fourth switch S 4 , fifth switch S 5 , and first clamp switch Sc 1  to fourth clamp switch Sc 4  to an electrical non-connection state. In this state, the energy transfer from second cell C 2  to first cell C 1  is completed. 
     In the second or sixth state, the inductor current is actively clamped in the closed loop to ensure the continuity of the inductor current, which enables safe and reliable switch switching of cell selection circuit  11 . 
       FIG. 3( a ) to ( c )  is diagram for showing a specific example of the equalizing process of power storage system  1  according to the exemplary embodiment. In this specific example, an example in which four cells C 1  to C 4  are connected in series is assumed.  FIG. 3( a )  is a diagram schematically showing voltage states of first cell C 1  to fourth cell C 4  before start of the equalizing process. Controller  13  calculates an average value of voltages of first cell C 1  to fourth cell C 4  detected by voltage detector  14 , and sets the calculated average value as an equalization target voltage (hereinafter, simply referred to as a target voltage). 
     Controller  13  transfers energy from a cell with a voltage higher than the target voltage to a cell with a voltage lower than the target voltage. For example, energy is transferred from a cell with a highest voltage among cells with voltages higher than the target voltage (first cell C 1  in  FIG. 3( a ) ) to a cell with a lowest voltage among cells with voltages lower than the target voltage (fourth cell C 4  in  FIG. 3( a ) ). 
     Controller  13  determines an energy transfer amount within a range in which a transfer source cell (cell to be discharged) has a voltage equal to or higher than the target voltage and a transfer destination cell (cell to be charged) has a voltage less than or equal to the target voltage. Controller  13  determines a discharge time of the transfer source cell and a charge time of the transfer destination cell based on the determined energy transfer amount and a discharge current and a charge current based on the design. Assuming that an energy amount consumed while the inductor current is actively clamped in energy retaining circuit  12  can be ignored, the discharge time of the transfer source cell is basically equal to the charge time of the transfer destination cell. 
       FIG. 3( b )  illustrates a state where energy transfer from first cell C 1  being the transfer source cell to fourth cell C 4  being the transfer destination cell is completed. Controller  13  executes the above-described processing again. Specifically, energy is transferred from the cell with the highest voltage among cells with the voltage higher than the target voltage (third cell C 3  in  FIG. 3( b ) ) to the cell with the lowest voltage among cells with the voltage lower than the target voltage (second cell C 2  in  FIG. 3( b ) ). 
       FIG. 3( c )  illustrates a state where energy transfer from third cell C 3  being the source cell to second cell C 2  being the destination cell is completed. As described above, the equalizing process of first cell C 1  to fourth cell C 4  connected in series is completed. 
     In the specific example shown in  FIG. 3( a ) to ( c ) , first, the average value of the voltages of the plurality of cells connected in series is calculated, and the target value is set. In this regard, an algorithm without setting the target value is also available. At each time point, controller  13  transfers energy from the cell with the highest voltage among the plurality of cells connected in series to the cell with the lowest voltage to equalize voltages of the two cells. Controller  13  repeatedly executes this processing until the voltages of the plurality of cells connected in series are all equalized. 
     Further, in the above specific example, although the example of using a voltage as the equalization target value has been described, an actual capacity, a dischargeable capacity, or a rechargeable capacity may be used instead of the voltage. 
     It is advantageous to use a metal-oxide-semiconductor field-effect transistor (MOSFET) with a relatively high switching speed and relatively low cost for a plurality of switches included in cell selection circuit  11  and four clamp switches included in energy retaining circuit  12 . In an N-channel MOSFET, a parasitic diode (body diode) is formed in a direction from a source to a drain. Therefore, in applications where a current may flow in from both a source terminal and a drain terminal, it is common to connect two MOSFETs in series in opposite directions and use the MOSFETs as a bidirectional switch. 
       FIG. 4( a ) to ( b )  is diagram showing a circuit configuration example when first switch S 1  includes two N-channel MOSFETs.  FIG. 4( a )  shows an example in which source terminals of two N-channel MOSFETs are connected to each other to form a bidirectional switch. In this case, since anodes of two body diodes in series face each other, a current is prevented from flowing through the body diodes between both ends of the bidirectional switch. 
       FIG. 4( b )  shows an example in which drain terminals of two N-channel MOSFETs are connected to each other to form a bidirectional switch. In this case, since cathodes of two body diodes in series face each other, a current is prevented from flowing through the body diodes between both ends of the bidirectional switch. 
     Comparing the configuration example of  FIG. 4( a )  and the configuration example of  FIG. 4( b ) , the configuration example of  FIG. 4( a )  has an advantage that power source circuits (DC/DC converters) of gate drivers of the two N-channel MOSFETs can be shared. In the configuration example shown in  FIG. 4( a ) , since a source potential is common in the two N-channel MOSFETs, power source voltages of the two gate drivers can be shared. Therefore, the power source circuits (DC/DC converters) that supply the power source voltages to the two gate drivers can also be shared. As a result, the cost and the circuit area can be reduced. On the other hand, in the configuration example shown in  FIG. 4( b ) , since the source potential of the two N-channel MOSFETs cannot be shared, it is necessary to separately provide the power source circuits (DC/DC converters) that supply the power source voltages to the two gate drivers. 
       FIG. 5  is a diagram showing a circuit configuration example when the bidirectional switch shown in the configuration example of  FIG. 4( a )  is used for the switch of power storage system  1  according to the exemplary embodiment. In the example shown in  FIG. 5 , the bidirectional switch shown in the configuration example of  FIG. 4( a )  is used for each of first switch S 1 , fourth switch S 4 , fifth switch S 5 , eighth switch S 8 , ninth switch S 9 , first clamp switch Sc 1 , second clamp switch Sc 2 , third clamp switch Sc 3 , and fourth clamp switch Sc 4 . 
       FIGS. 6( a ) and ( b )  is diagram obtained by extracting a path used for energy transfer between two cells in the circuit configuration example of power storage system  1  shown in  FIG. 5 .  FIG. 6( a )  is a diagram obtained by extracting the path used for the energy transfer between first cell C 1  and second cell C 2 . In the energy transfer between first cell C 1  and second cell C 2 , a path passing through eighth switch S 8  and a path passing through ninth switch S 9  are not used.  FIG. 6( b )  is a diagram obtained by extracting the path used for the energy transfer between first cell C 1  and fourth cell C 4 . In the energy transfer between first cell C 1  and fourth cell C 4 , a path passing through fifth switch S 5  is not used. 
       FIGS. 7( a ) and ( b )  is diagram in which switches whose on or off states do not change during energy transfer between two cells are omitted in the circuit configuration example of power storage system  1  shown in  FIGS. 6( a ) and ( b ) .  FIG. 7( a )  is a diagram in which a switch whose on or off state does not change during energy transfer between first cell C 1  and second cell C 2  is omitted. In the energy transfer between first cell C 1  and second cell C 2 , fourth switch S 4  and fourth clamp switch Sc 4  are drawn as simple connection since the fourth switch and the fourth clamp switch are constantly in the on state, and third clamp switch Sc 3  is drawn as connection itself omitted since the third clamp switch is constantly in the off state. In  FIG. 7( a ) , when energy is transferred from first cell C 1  to inductor L 1 , first switch S 1  and first clamp switch Sc 1  are turned on, and fifth switch S 5  and second clamp switch Sc 2  are turned off. In this state, since a current flows from first cell C 1  to inductor L 1 , energy is transferred from first cell C 1  to inductor L 1 . Energy is stored in inductor L 1  by this energy transfer, and first clamp switch Sc 1  is turned off, and second clamp switch Sc 2  is turned on. Thus, a clamp state of inductor L 1  is formed. Subsequently, when energy is transferred from inductor L 1  to second cell C 2 , fifth switch S 5  and first clamp switch Sc 1  are turned on, and first switch S 1  and second clamp switch Sc 2  are turned off In this state, the energy stored in the clamp state that retains the energy of inductor L 1  is transferred from inductor L 1  to second cell C 2 . When a current flowing to inductor L 1  becomes zero, the energy transfer is completed by turning off eighth switch S 8  and ninth switch S 9 . 
       FIG. 7( b )  is a diagram in which a switch whose on or off state does not change during energy transfer between first cell C 1  and fourth cell C 4  is omitted. In  FIG. 7( b ) , when energy is transferred from first cell C 1  to inductor L 1 , first switch S 1 , fourth switch S 4 , and second clamp switch Sc 2  are turned on, and eighth switch S 8 , ninth switch S 9 , and first clamp switch Sc 1  are turned off. In this state, since a current flows from first cell C 1  to inductor L 1 , energy is transferred from first cell C 1  to inductor L 1  . Energy is stored in inductor L 1  by this energy transfer, and second clamp switch Sc 2  is turned off, and first clamp switch Sc 1  is turned on. Thus, a clamp state of inductor L 1  is formed. Subsequently, when energy is transferred from inductor L 1  to first cell C 4 , eighth switch S 8 , ninth switch S 9 , and second clamp switch Sc 2  are turned on, and first switch S 1 , fourth switch S 4 , and first clamp switch Sc 1  are turned off. In this state, the energy stored in the clamp state that retains the energy of inductor L 1  is transferred from inductor L 1  to fourth cell C 4 . When a current flowing to inductor L 1  becomes zero, the energy transfer is completed by turning off eighth switch S 8  and ninth switch S 9 . Although  FIGS. 7( a ) and ( b )  is described in a mode in which the current of inductor L 1  is not inverted (mode in which the current is not commutated), the inductor may operate in the commutation mode as described in  FIG. 2 . Hereinafter, an operation based on the commutation mode will be described with reference to  FIGS. 9 and 10 . 
       FIGS. 8( a ) and ( b )  is diagram showing a circuit configuration example of power storage system  1  in which the discharge path and the charge path are formed when energy is transferred from the cell to be discharged to the cell to be charged in an organized manner for unified description. In the circuit configuration example of power storage system  1  shown in  FIG. 8( a ) , eight switching elements Q 1  to Q 8  are used. A first switching element group in which first switching element Q 1  having first body diode D 1  and second switching element Q 2  having second body diode D 2  are connected in series as a pair in opposite directions is connected to a positive-electrode terminal of upper cell Ca. A second switching element group in which third switching element Q 3  having third body diode D 3  and fourth switching element Q 4  having fourth body diode D 4  are connected in series as a pair in opposite directions is connected to a negative-electrode terminal of lower cell Cb. 
     A negative-electrode terminal of upper cell Ca and a positive-electrode terminal of lower cell Cb are connected to the first end of inductor L 1 . A third switching element group in which fifth switching element Q 5  having fifth body diode D 5  and sixth switching element Q 6  having sixth body diode D 6  are connected in series as a pair in opposite directions is connected between both the ends of inductor L 1  . A fourth switching element group in which seventh switching element Q 7  having seventh body diode D 7  and eighth switching element Q 8  having eighth body diode D 8  are connected in series as a pair in opposite directions are connected between the second end of inductor L 1  and a node between the first switching element group and the second switching element group. 
     The first switching element group including first switching element Q 1  and second switching element Q 2  corresponds to first switch S 1  in  FIG. 7( a ) . The second switching element group including third switching element Q 3  and fourth switching element Q 4  corresponds to fifth switch S 5  in  FIG. 7( a ) . The third switching element group including fifth switching element Q 5  and sixth switching element Q 6  corresponds to second clamp switch Sc 2  in  FIG. 7( a ) . The fourth switching element group including seventh switching element Q 7  and eighth switching element Q 8  corresponds to first clamp switch Sc 1  in  FIG. 7( a ) . In power storage system  1  having the above-described configuration and shown in  FIG. 8( a ) , ten steps are controlled as one cycle. 
     In the circuit configuration example of power storage system  1  shown in  FIG. 8( b ) , eight switching elements Q 1  to Q 8  are used. The circuit configuration example shown in  FIG. 8( b )  is different from the circuit configuration example shown in  FIG. 8( a )  in that positions of a parallel circuit of inductor L 1  and the third switching element group (fifth switching element Q 5  and sixth switching element Q 6 ) and the fourth switching element group (seventh switching element Q 7  and eighth switching element Q 8 ) are switched. 
     In the control to be described below, the description will be given by using the circuit configuration example shown in  FIG. 8( a ) . 
       FIG. 9( a ) to ( e )  and  FIG. 10( a ) to ( e )  are two diagrams showing a circuit state in the control of all the ten steps according to a comparative example of power storage system  1  shown in  FIG. 8( a )  in correspondence with current IL of inductor L 1  (state transition of ten steps in total).  FIG. 11  is a diagram showing a switching pattern of eight switching elements Q 1  to Q 8 , a time transition of end-to-end voltage VL of inductor L 1 , and current IL of inductor L 1  in the control according to the comparative example of power storage system  1  shown in  FIG. 8( a ) . In current IL of inductor L 1  , an arrow direction shown in  FIG. 9( a )  is represented as positive, and an opposite direction of the arrow is represented as negative. 
     As shown in  FIG. 9( b ) , in state (1), controller  13  controls first switching element Q 1 , second switching element Q 2 , fifth switching element Q 5 , seventh switching element Q 7 , and eighth switching element Q 8  to an on state, and controls third switching element Q 3 , fourth switching element Q 4 , and sixth switching element Q 6  to an off state. A case where fifth switching element Q 5  is controlled to an on state is in preparation for a next clamp period. 
     As shown in  FIG. 9( c ) , in state (2), controller  13  maintains the switching pattern of state (1). In state (2), a discharge current flows from upper cell Ca to inductor L 1 . 
     As shown in  FIG. 9( d ) , in state (3), controller  13  turns off first switching element Q 1 , second switching element Q 2 , seventh switching element Q 7 , and eighth switching element Q 8 . In state (3), a current flows through a clamp path formed by inductor L 1 - fifth switching element Q 5 - sixth body diode D 6 - inductor L 1  . 
     As shown in  FIG. 9( e ) , in state (4), controller  13  turns off fifth switching element Q 5 , and turns on third switching element Q 3  and eighth switching element Q 8  in preparation for a next charge period. In state (4), a current flows through a clamp path formed by inductor L 1 - fifth switching element Q 5 - sixth switching element Q 6 - inductor L 1 . 
     Comparing the clamp path shown in state (3) with the clamp path shown in state (4), since the current passes through sixth body diode D 6  in the former, a loss corresponding to forward drop voltage Vf of sixth body diode D 6  occurs. Accordingly, the state is switched from state (3) to state (4) in order to reduce an energy loss. 
     State (3) is provided for smooth and safe transition from the discharge state to the clamp state. For example, when the turning-on of fifth switching element Q 5  and sixth switching element Q 6  and the turning-off of first switching element Q 1 , second switching element Q 2 , seventh switching element Q 7 , and eighth switching element Q 8  are simultaneously executed, an external short circuit may occur in upper cell Ca or breakdown in withstand voltage may occur in first switching element Q 1  or eighth switching element Q 8  due to a shift in switching timing. 
     Specifically, when a state where all fifth switching element Q 5 , sixth switching element Q 6 , first switching element Q 1 , second switching element Q 2 , seventh switching element Q 7 , and eighth switching element Q 8  are turned on appears, an external short circuit occurs in upper cell Ca. When fifth switch S 5  and the sixth switch S 6  are in the off state and the turning-off of first switching element Q 1  is earlier than the turning-off of second switching element Q 2 , seventh switching element Q 7 , and eighth switching element Q 8 , breakdown in withstand voltage occurs in first switching element Q 1 . When the turning-off of eighth switching element Q 8  is earlier than the turning-off of first switching element 
     Q 1 , second switching element Q 2 , and seventh switching element Q 7 , breakdown in withstand voltage occurs in eighth switching element Q 8 . On the other hand, in state (3), since sixth body diode D 6  is electrically connected, it is possible to prevent the external short circuit of the cell or the breakdown in withstand voltage of the switching element. 
     As shown in  FIG. 10( a ) , in state (5), controller  13  turns off fifth switching element Q 5  and sixth switching element Q 6 . In state (5), a charge current flows through a path formed by inductor L 1 - lower cell Cb- third switching element Q 3 - fourth body diode D 4 - eighth switching element Q 8 - seventh body diode D 7 - inductor L 1 . 
     As shown in  FIG. 10( b ) , in state (6), controller  13  turns on fourth switching element Q 4  and seventh switching element Q 7 . In state (6), a charge current flows through a path formed by inductor L 1 - lower cell Cb- third switching element Q 3 - fourth switching element Q 4 - eighth switching element Q 8 - seventh switching element Q 7 - inductor L 1  . Comparing the path shown in  FIG. 10( a )  with the path shown in  FIG. 10( b ) , since the current passes through fourth body diode D 4  and seventh body diode D 7  in the former, a loss of 2 Vf in total corresponding to forward drop voltage Vf of fourth body diode D 4  and a loss corresponding to forward drop voltage Vf of seventh body diode D 7  occur. Accordingly, the state is switched from state (5) to state (6) in order to reduce the energy loss. 
     State (5) is provided for smooth and safe transition from the clamp state to the charge state. For example, when the turning-off of fifth switching element Q 5  and sixth switching element Q 6  and the turning-on of third switching element Q 3 , fourth switching element Q 4 , seventh switching element Q 7 , and eighth switching element Q 8  are simultaneously executed, an external short circuit may occur in lower cell Cb or breakdown in withstand voltage may occur in third switching element Q 3  or eighth switching element Q 8  due to a shift in switching timing. On the other hand, in state (5), since fourth body diode D 4  and seventh body diode D 7  are electrically connected, it is possible to prevent the external short circuit of the cell or the breakdown in withstand voltage of the switching element. 
     In state (6), when the energy released from inductor L 1  to lower cell Cb disappears, the direction of the current is inverted, and the discharge current starts to flow from lower cell Cb to inductor L 1 . 
     As shown in  FIG. 10( c ) , in state (7), controller  13  turns on sixth switching element Q 6  in preparation for a next clamp period. 
     As shown in  FIG. 10( d ) , in state (8), controller  13  turns off third switching element Q 3 , fourth switching element Q 4 , seventh switching element Q 7 , and eighth switching element Q 8 . In state (8), a current flows through a clamp path formed by inductor L 1 - sixth switching element Q 6 - fifth body diode D 5 - inductor L 1 . 
     As shown in  FIG. 10( e ) , in state (9), controller  13  turns on fifth switching element Q 5 , and turns on second switching element Q 2  and seventh switching element Q 7  in preparation for a next charge period. In state (9), a current flows through a clamp path formed by inductor L 1 - fifth switching element Q 5 - sixth switching element Q 6 - inductor L 1 . 
     Comparing the clamp path shown in state (8) with the clamp path shown in state (9), since the current passes through fifth body diode D 5  in the former, a loss corresponding to forward drop voltage Vf of fifth body diode D 5  occurs. Accordingly, the state is switched from state (8) to state (9) in order to reduce the energy loss. 
     State (8) is provided for smooth and safe transition from the discharge state to the clamp state. For example, when the turning-on of fifth switching element Q 5  and sixth switching element Q 6  and the turning-off of third switching element Q 3 , fourth switching element Q 4 , seventh switching element Q 7 , and eighth switching element Q 8  are simultaneously executed, an external short circuit may occur in lower cell Cb or breakdown in withstand voltage may occur in fourth switching element Q 4  or seventh switching element Q 7  due to a shift in switching timing. On the other hand, in state (8), since sixth body diode D 6  is electrically connected, it is possible to prevent the external short circuit of the cell or the breakdown in withstand voltage of the switching element. 
     As shown in  FIG. 9( a ) , in state (10), controller  13  turns off fifth switching element Q 5  and sixth switching element Q 6 . In state (10), a charge current flows through a path formed by inductor L 1 - seventh switching element Q 7 - eighth body diode D 8 - second switching element Q 2 - first body diode D 1 - upper cell Ca- inductor L 1 . 
     As shown in  FIG. 9( b ) , in state (1), controller  13  turns on second switching element Q 2  and seventh switching element Q 7 , and turns on fifth switching element Q 5  in preparation for a next clamp period. In state (1), a charge current flows through a path formed by inductor L 1 - seventh switching element Q 7 - eighth switching element Q 8 - second switching element Q 2 - first switching element Q 1 - upper cell Ca- inductor L 1  . Comparing the path shown in  FIG. 9( a )  with the path shown in  FIG. 9( b ) , since the current passes through first body diode D 1  and eighth body diode D 8  in the former, a loss of 2 Vf in total corresponding to forward drop voltage Vf of first body diode D 1  and a loss corresponding to forward drop voltage Vf of eighth body diode D 8  occur. Accordingly, state (10) is switched to state (1) in order to reduce the energy loss. 
     State (10) is provided for smooth and safe transition from the clamp state to the charged state. For example, when the turning-off of fifth switching element Q 5  and sixth switching element Q 6  and the turning-on of first switching element Q 1 , second switching element Q 2 , seventh switching element Q 7 , and eighth switching element Q 8  are simultaneously executed, an external short circuit may occur in upper cell Ca or breakdown in withstand voltage may occur in first switching element Q 1  or eighth switching element Q 8  due to a shift in switching timing. On the other hand, in state (10), since first body diode D 1  and eighth body diode D 8  are electrically connected, it is possible to prevent the external short circuit of the cell or the breakdown in withstand voltage of the switching element. 
     In state (1), when the energy released from inductor L 1  to upper cell Ca disappears, the direction of the current is inverted, and the discharge current starts to flow from upper cell Ca to inductor L 1 . 
     In the cycle described above, the current of inductor L 1  changes with a positive slope in a period of state (10)- state (1)- state (2). In a period from state (3) to state (4), a circulating current flows to inductor L 1 . In state (3), the energy stored in inductor L 1  decreases by a loss corresponding to forward drop voltage Vf of the body diode. In state (3), the energy stored in inductor L 1  is maintained. 
     In a period of state (5)- state (6)- state (7), the current of inductor L 1  changes with a negative slope. In a period from state (8) to state (9), a circulating current flows to inductor L 1 . In state (8), the energy stored in inductor L 1  decreases by a loss corresponding to forward drop voltage Vf of the body diode. In state (9), the energy stored in inductor L 1  is maintained. As shown in  FIG. 11 , end-to-end voltage VL of inductor L 1  in each state is as follows. Vb is a cell voltage, and is 4 V in an example shown in  FIG. 11 . Vf is a forward drop voltage of the body diode, and is 0.75 V in the example shown in  FIG. 11 . 
     State (10): VL=Vb+2 Vf 
     States (1) and (2): VL=Vb 
     State (3): VL=−Vf 
     State (4): VL=0 
     State (5): VL=−Vb−2 Vf 
     States (6) and (7): VL=−Vb 
     State (8): VL=+Vf 
     State (9): VL=0 
     As shown in  FIG. 11 , current change ΔIL of inductor L 1  in each state is as follows. L is an inductance, and (tn−t(n−1)) is a time to stay in an n-th state. 
     State (10): ΔIL=(2 Vb+2 Vf)*(t10−t9)/L 
     State (1): ΔIL=2 Vb*(t1−t10)/L 
     State (2): ΔIL=2 Vb*(t2−t1)/L 
     State (3): ΔIL=−Vf*(t3−t2)/L 
     State (4): ΔIL=0*(t4−t3)/L 
     State (5): ΔIL=(−2 Vb−2 Vf)*(t5−t4)/L 
     State (6): ΔIL=−2 Vb*(t6−t5)/L 
     State (7): ΔIL=−2 Vb*(t7−t6)/L 
     State (8): ΔIL=Vf*(t8−t7)/L 
     State (9): ΔIL=0*(t9−t8)/L 
     In  FIG. 11 , the states are drawn at equal intervals for the sake of convenience, but times of the states can be arbitrarily set. For example, the clamp periods (states (3), (4), (8), and (9)) may be set shorter than the other periods (states (1), (2), (5), (6), (7), and (10)). The period in which the current flows through the body diode may be set shorter than the period in which the current does not flow through the body diode. For example, the period of state (3) may be set shorter than the period of state (4). In this case, the loss caused by the current passing through the body diode can be further reduced. A positive energy transfer amount of the cell to be discharged and a negative energy transfer amount of the cell to be charged are indicated in a region on a positive side with 0 A of current IL of inductor L 1  as a boundary, and a negative energy transfer amount of the cell to be discharged and a positive energy transfer amount of the cell to be charged are indicated in a region on a negative side with 0 A of current IL of inductor L 1  as a boundary. Thus, the equalizing process of the cell to be discharged and the cell to be charged is executed by appropriately setting the times in the states. 
     As shown in  FIG. 11 , when the state is switched from state (10) to state (1), that is, when end-to-end voltage VL of inductor L 1  changes from Vb+2 Vf to Vb, an unintended spike voltage is generated. Although end-to-end voltage VL of inductor L 1  shown in  FIG. 11  is obtained by rewriting an actual waveform obtained by an experiment into a schematic waveform, it is confirmed by an experiment that a spike occurs when the state is switched from state (10) to state (1). 
     This spike voltage may lead to breakdown of the switching element. The MOSFET used for the switching element is an element of which the turning-on or -off is controlled by a gate voltage, and when drain-source voltage Vds changes steeply (when dV/dt increases), a current flows through a junction capacity between the drain and the gate. This current may turn on a parasitic NPN transistor between the drain and the source of the MOSFET, the breakdown of the element of the MOSFET may be caused. 
     Noise generated by the spike voltage may invert high or low of the drive signal supplied from controller  13  to the gates of switching elements Q 1  to Q 8  and may cause equalizing circuit  10  to malfunction. Hereinafter, a method for suppressing the spike voltage will be described. 
       FIG. 12( a ) to ( c )  is diagram showing a circuit state in the control according to the exemplary embodiment of power storage system  1  shown in  FIG. 8( a )  in correspondence with current IL of inductor L 1  .  FIG. 13  is a diagram showing a switching pattern of eight switching elements Q 1  to Q 8  in which  FIG. 9( a ) to ( c )  is replaced with  FIG. 12( a ) to ( c )  in a switching order of ten steps shown in  FIGS. 9 and 10 , a time transition of end-to-end voltage VL of inductor L 1 , and current IL of inductor L 1  in the control according to the exemplary embodiment of power storage system  1  shown in  FIG. 8( a ) . A difference between  FIG. 9( a ) to ( c )  and  FIG. 12( a ) to ( c )  is only a difference in the state of fifth switching element Q 5  in  FIGS. 9( b ) and 12( b ) . 
     As shown in  FIG. 12( b ) , in state (1) according to the exemplary embodiment, controller  13  controls first switching element Q 1 , second switching element Q 2 , seventh switching element Q 7 , and eighth switching element Q 8  to an on state, and controls third switching element Q 3 , fourth switching element Q 4 , fifth switching element Q 5 , and sixth switching element Q 6  to an off state. 
     As shown in  FIG. 12( c ) , in state (2) according to the exemplary embodiment, controller  13  turns on fifth switching element Q 5  in preparation for a next clamp period. Other states (3) to (10) according to the exemplary embodiment are similar to states (3) to (10) according to the comparative example shown in  FIGS. 9( d ) to ( e ), 10( a ) to ( e ), and 9( a ) . 
     As described above, in the present exemplary embodiment, a timing at which fifth switching element Q 5  is turned on is delayed as preparation for a next clamp period. As shown in  FIG. 13 , in the present exemplary embodiment, when the state is switched from state (10) to state (1), the spike voltage is not generated. Although end-to-end voltage VL of inductor L 1  shown in  FIG. 13  is obtained by rewriting an actual waveform obtained by an experiment into a schematic waveform, it is confirmed by an experiment that the spike shown in  FIG. 11  does not occur when the state is switched from state (10) to state (1). 
     As described above, according to the present exemplary embodiment, the timing at which fifth switching element Q 5  constituting one of the bidirectional switch used as the clamp switch is turned on is delayed as the preparation for the next clamp period, and thus, the occurrence of the unintended spike can be suppressed. Accordingly, it is possible to achieve highly reliable and safe equalizing circuit  10 . 
     The present disclosure has been described above based on the exemplary embodiment. The exemplary embodiment is exemplified, and it is easily understood by the person of ordinary skill in the art that various modified examples are available for combinations of each of configuration elements of the examples and each of processing process thereof, and that such modifications are also within the scope of the present disclosure. 
     In  FIG. 6( a ) and ( b ) , the energy transfer between first cell C 1  and second cell C 2  and the energy transfer between first cell C 1  and fourth cell C 4  have been described. In this regard, the above exemplary embodiment is applicable to the overall energy transfer between any two cells.  FIG. 6( a ) and ( b )  corresponds to the configurations of the first wiring switch and the second wiring switch of cell selection circuit  11  of power storage system  1  shown in  FIG. 1 , and first clamp switch Sc 1  to fourth clamp switch Sc 4  of energy retaining circuit  12 , and each switch of the first wiring switch, the second wiring switch, and first clamp switch Sc 1  to fourth clamp switch Sc 4  includes two switching elements. The paths (discharge path and charge path) through which energy is transferred between the selected cell and inductor L 1  are formed by a total of four switches including one predetermined first wiring switch, one predetermined second wiring switch, and two predetermined clamp switches among first clamp switch Sc 1  to fourth clamp switch Sc 4 , that is, eight switching elements, in both the discharge path and the charge path. The clamp path for retaining the energy stored in inductor L 1  is formed by two predetermined clamp switches of first clamp switch Sc 1  to fourth clamp switch Sc 4 , that is, four switching elements. 
     In the period in which the discharge path is formed, a total of eight switching elements including two pairs of four switching elements present at positions where four clamp switches cross each other and one pair of two switching elements constituting the first wiring switch and the second wiring switch among the eight switching elements are controlled to the on state. Similarly to the period in which the charge path is formed, in the period in which the charge path is formed, a total of eight switching elements including two pairs of four switching elements constituting the clamp switch and one pair of two switching elements constituting the first wiring switch and the second wiring switch among the eight switching elements are controlled to an on state. In the period in which the clamp path is formed, two pairs of four switching elements among eight switching elements in the four clamp switches are controlled to an on state. 
     After the discharge state is ended, controller  13  switches the states in the order of a first clamp state (in the above exemplary embodiment, states (3) and (8)) where the clamp current flows through the body diode of the switching element by turning off at least one switching element among the four switching elements forming the clamp path and a second clamp state (in the above exemplary embodiment, states (4) and (9)) where the switching element in the off state is turned on and all the four switching elements are turned on. 
     In the first clamp state, two switching elements having body diodes in the same direction among the four switching elements forming the clamp path may be turned off. In this case, the loss increases, but safety is further improved. 
     After the second clamp state is ended, controller  13  switches the states in the order of a first charge state (in the above exemplary embodiment, states (5) and (10)) where the charge current flows through the body diode of the switching element by turning off at least one switching element among the eight switching elements forming the charge path and a second charge state (in the above exemplary embodiment, states (6) and (1)) where the switching element in the off state is turned on and all the eight switching elements are turned on. 
     In the above exemplary embodiment, in the first charge state, two switching elements of one switching element constituting the first wiring switch or the second wiring switch and one switching element constituting the clamp switch are turned off, but only one of the switching elements may be turned off. In this case, the safety against the breakdown in withstand voltage of the switching element is reduced, but the loss is reduced. 
     After the second clamp state is ended, controller  13  turns off two or four switching elements among the four switching elements forming the clamp path. In the above exemplary embodiment, the pair of two switching elements (fifth switching element Q 5  and sixth switching element Q 6 ) is turned off, but all the four switching elements forming the clamp path may be turned off. 
     Thereafter, at a timing delayed from a timing at which the state is switched from the first charge state to the second charge state and before the state is switched to the next first clamp state, controller  13  forms the clamp path in the first clamp state by turning on half of the turned-off two or four switching elements. In the above exemplary embodiment, the timing at which the state is switched from state (1) to state (2) is adopted as the timing delayed from the timing at which the state is switched from the first charge state to the second charge state (state (10)) and a timing before the state is switched to the next first clamp state (state (3)). In this regard, a timing in the middle of state (1) may be adopted, or a timing in the middle of state (2) may be adopted. 
     In the above-described exemplary embodiment, an exemplary embodiment in which the MOSFET is used as the switching element has been described. In this regard, a semiconductor switching element such as an insulated gate bipolar transistor (IGBT) in which a parasitic diode is not formed may be used. In this case, an external diode is connected in parallel to the semiconductor switching element instead of the parasitic diode. As the diode with lower forward drop voltage Vf is used, the loss can be reduced, and the efficiency is improved. 
     Further, in the above-described exemplary embodiment, an example of equalizing a plurality of cells connected in series by an active method has been described. In this regard, the equalizing circuit according to the exemplary embodiment can be used to equalize a plurality of modules connected in series. The “cell” in the present specification may be appropriately read as a “module”. 
       FIG. 14  is a diagram showing a configuration of a power storage system according to another exemplary embodiment.  FIG. 14  shows an exemplary embodiment of a power storage system including an equalizing circuit that executes an equalizing process among a plurality of modules connected in series. In  FIG. 14 , each of the plurality of modules includes a cell equalizing circuit and a power storage in which a plurality of cells are connected in series, as in power storage system  1  shown in  FIG. 1 . First module M 1  includes cell equalizing circuit  10 A and power storage  20 A, second module M 2  includes cell equalizing circuit  10 B and power storage  20 B, third module M 3  includes cell equalizing circuit  10 C and power storage  20 C, and fourth module M 4  includes cell equalizing circuit  10 D and power storage  20 D. 
     Module equalizing circuit  10 M includes voltage detector  14 M, module selection circuit  11 M, energy retaining circuit  12 M, and controller  13 M. 
     In the present exemplary embodiment, controller  13 M executes an equalizing process among m modules connected in series by an active module balance method. In the active module balance method according to the present exemplary embodiment, energy is transferred from one module (module to be discharged) to another module (module to be charged) among m modules connected in series, thereby equalizing the capacities between one module and the other module. Repeating this energy transfer equalizes the capacities among the m modules connected in series. 
     In addition to the above equalizing process among the plurality of modules, the equalizing process among the plurality of cells connected in series in each module is performed. The equalizing process among the plurality of cells connected in series in each module may be executed in a multiplexed manner with the equalizing process among the plurality of modules. In this case, module equalizing circuit  10 M and cell equalizing circuits  10 A to  10 D are operated in cooperation with each other by communication. The equalizing process among the modules is preferably executed with priority over the equalizing process among the cells, and after the equalizing process among the modules is completed, the equalizing process among the cells is completed, and thereby it is possible to eliminate the voltage difference between the cells generated by executing the equalizing process among the modules. 
       FIG. 15  is a diagram showing a configuration of a power storage system according to still another exemplary embodiment. In the exemplary embodiment shown in  FIG. 15 , cell selection circuit  11  includes first wiring W 1  connected to a first end of inductor L 1 , second wiring W 2  connected to a second end of inductor L 1 , (n+1) first wiring switches, and (n+1) second wiring switches. The (n+1) first wiring switches are connected between nodes of the n cells connected in series and first wiring W 1 , respectively. The (n+1) second wiring switches are connected between nodes of the n cells connected in series and second wiring W 2 , respectively. 
     Energy retaining circuit  12  (also referred to as a damper circuit) includes inductor L 1  and clamp switch Sc. Clamp switch Sc is a switch for electrically connecting both ends of inductor L 1  in energy retaining circuit  12 . Energy retaining circuit  12  can form a closed loop including inductor L 1  in a state where cell selection circuit  11  does not select any cell. That is, when clamp switch Sc is controlled to an on state, a closed loop including inductor L 1  and clamp switch Sc, that is, a clamp path is formed. In the exemplary embodiment shown in  FIG. 15 , paths (discharge path and charge path) through which energy is transferred between the selected cell and inductor L 1  are formed by one predetermined first wiring switch and one predetermined second wiring switch. However, since energy retaining circuit  12  does not have a function of switching a direction of a current flowing through inductor L 1  , the discharge path and the charge path are formed by selecting the first wiring switch and the second wiring switch for switching the state to the electrical connection state according to the direction of the current flowing through inductor L 1 . 
     Controller  13  forms the clamp path in the first clamp state by turning on all the plurality of switching elements forming the discharge path after the second clamp state is ended and then turning on one of the two switching elements forming clamp switch Sc before the state is switched to the next first clamp state. 
     In the above-described exemplary embodiment, the equalizing circuit of the active cell balance method has been described, but it can also be applied to energy transfer not intended for equalization among the plurality of cells or modules. For example, when temperatures of two modules are significantly different, at least a portion of the energy of a module having a high temperature may be transferred to a module having a low temperature in order to reduce storage degradation. 
     In the above-described exemplary embodiment, the energy transfer from one cell to another cell has been described, but energy transfer from a plurality of cells connected in series to a plurality of cells connected in series can also be performed. Energy transfer from one cell to a plurality of cells connected in series and energy from a plurality of cells connected in series to another cell can also be performed. The same applies to the modules. 
     The exemplary embodiment may be specified by the following items. 
     [Item 1] 
     Energy transfer circuit ( 10 ) including 
     inductor (L 1 ), 
     cell selection circuit ( 11 ) that is provided between n cells (C 1  to C 4 ) connected in series, where n is an integer of 2 or more, and inductor (L 1 ), and is capable of electrically connecting both ends of a selected cell including any one of n cells (C 1  to C 4 ) or a plurality of cells connected in series and both ends of inductor (L 1 ), clamp circuit ( 12 ) that includes clamp switches (Sc 1  to Sc 4  or Sc) for forming a closed loop including inductor (L 1 ) in a state where cell selection circuit ( 11 ) does not select any cell (any one of C 1  to C 4 ), and 
     controller ( 13 ) that controls cell selection circuit ( 11 ) and clamp circuit ( 12 ), 
     in which cell selection circuit ( 11 ) includes 
     first wiring (W 1 ) that is connected to one end of inductor (L 1 ), 
     second wiring (W 2 ) that is connected to an other end of inductor (L 1 ), 
     a plurality of first wiring switches (S 1 , S 5 , and S 9  or S 1 , S 3 , S 5 , S 7 , and S 9 ) that selectively connect one of both the ends of the selected cell to first wiring (W 1 ), and 
     at least one second wiring switch (S 4  or S 8 , or S 2 , S 4 , S 6 , S 8 , or S 10 ) that selectively connects another end of both the ends of the selected cell to second wiring (W 2 ), 
     in clamp switch (Sc 2  or Sc), two switching elements, having diodes, are connected in series and formed in a state where the diodes are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements, 
     in first wiring switch (S 1 ), two switching elements having, diodes, are connected in series and formed in a state where the diodes are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements, and 
     in second wiring switch (S 4 ), two switching elements having diodes, are connected in series and formed in a state where the diodes are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements, 
     controller ( 13 ) controls states in order of an inductor current increase state where a discharge path through which both the ends of inductor (L 1 ) are connected to nodes on both sides of discharge cell (C 1 ) which is the selected cell to be discharged among n cells (C 1  to C 4 ) is formed by controlling electrical connection states of first wiring switch (S 1 ), second wiring switch (S 4 ), and clamp switch (Sc 1  to Sc 4  or Sc) connected to the nodes on both the sides of discharge cell (C 1 ), a current flowing to inductor (L 1 ) from discharge cell (C 1 ), and the current flowing to inductor (L 1 ) is increased, a clamp state where a clamp path through which both the ends of inductor (L 1 ) are connected via clamp switch (Sc 1  or Sc 4 ) is formed by controlling the electrical connection states of first wiring switch (S 1 ), second wiring switch (S 4 ), and clamp switch (Sc 1  to Sc 4  or Sc) connected to the nodes of both the sides of discharge cell (C 1 ), a clamp current flowing between both the ends of inductor (L 1 ), and the current flowing to inductor (L 1 ) is circulated through the clamp path, and an inductor current decrease state where a charge path through which both the ends of inductor (L 1 ) are connected to nodes of both sides of charge cell (C 2 ) which is the selected cell to be charged among n cells (C 1  to C 4 ) is formed by controlling electrical connection states of first wiring switch (S 5 ), second wiring switch (S 4 ), and clamp switch (Sc 1  to Sc 4  or Sc) connected to the nodes of both the sides of charge cell (C 2 ), a current flowing to charge cell (C 2 ) from inductor (L 1 ), and the current flowing to inductor (L 1 ) is decreased, 
     the clamp state includes a first clamp state where a clamp current flows through a diode in parallel with at least one switching element among a plurality of switching elements forming the clamp path by turning off the at least one switching element and a second clamp state where the switching element in the off state is turned on and all the plurality of switching elements are turned on, and 
     controller ( 13 ) forms the clamp path in the first clamp state by turning on all of a plurality of switching elements forming the discharge path in the inductor current increase state and then turning on a part of a plurality of switching elements constituting the clamp switch before the state is switched to a next first clamp state. 
     Accordingly, it is possible to achieve highly reliable and safe energy transfer circuit ( 10 ). 
     [Item 2] 
     Energy transfer circuit ( 10 ) according to item 1, in which 
     cell selection circuit ( 11 ) includes 
     a plurality of first wiring switches (S 1 , S 5 , and S 9 ) that are connected between odd-numbered nodes among nodes (n+1) of n cells (C 1  to C 4 ) connected in series and first wiring (W 1 ), and 
     at least one second wiring switch (S 4  or S 8 ) that is connected between even-numbered nodes among the nodes (n+1) of n cells (C 1  to C 4 ) connected in series and second wiring (W 2 ), 
     clamp circuit ( 12 ) includes first clamp switch (Sc 1 ) and second clamp switch (Sc 2 ) connected to each other in series and third clamp switch (Sc 3 ) and fourth clamp switch (Sc 4 ) connected to each other in series, 
     inductor (L 1 ) is connected between a node between first clamp switch (Sc 1 ) and second clamp switch (Sc 2 ) and a node between third clamp switch (Sc 3 ) and fourth clamp switch (Sc 4 ), 
     ends of first clamp switch (Sc 1 ) and third clamp switch (Sc 3 ) that are not connected to inductor (L 1 ) are connected to first wiring (W 1 ), 
     ends of second clamp switch (Sc 2 ) and fourth clamp switch (Sc 4 ) that are not connected to inductor (L 1 ) are connected to second wiring (W 2 ), and 
     clamp circuit ( 12 ) is connected as a full bridge circuit by inductor (L 1 ), first clamp switch (Sc 1 ), second clamp switch (Sc 2 ), third clamp switch (Sc 3 ), and fourth clamp switch (Sc 4 ). 
     Accordingly, it is possible to achieve highly reliable and safe energy transfer circuit ( 10 ) having clamp circuit ( 12 ) constituted as a full bridge circuit. 
     [Item 3] 
     Energy transfer circuit ( 10 ) according to item 1, in which 
     cell selection circuit ( 11 ) includes 
     (n+1) first wiring switches (S 1 , S 3 , S 5 , S 7 , and S 9 ) that are connected between nodes of n cells (C 1  to C 4 ) connected in series and first wiring (W 1 ), and 
     (n+1) second wiring switches (S 2 , S 4 , S 6 , S 8 , and S 10 ) that are connected between the nodes of n cells (C 1  to C 4 ) connected in series and second wiring (W 2 ). 
     Accordingly, it is possible to constitute one clamp switch (Sc) used for clamp circuit ( 12 ). That is, one clamp switch can be constituted by two switching elements. 
     [Item 4] 
     Energy transfer circuit ( 10 ) according to item 2, in which 
     after the second clamp state is ended, controller ( 13 ) switches between states in order of a first charge state where a charge current flows through body diodes (D 1  and D 8 ) in parallel with two switching elements (Q 1  and Q 8 ) by turning off two switching elements (Q 1  and Q 8 ), the two switching elements being one switching element (Q 1 ) constituting first wiring switch (S 1 ) or the second wiring switch and one switching element (Q 8 ) constituting clamp switch (Sc 1 ) among eight switching elements (Q 1 , Q 2 , Q 7 , Q 8 , S 4 , and Sc 4 ) forming the charge path, and a second charge state where two switching elements (Q 1  and Q 8 ) in the off state are turned on and all eight switching elements (Q 1 , Q 2 , Q 7 , Q 8 , S 4 , and Sc 4 ) are turned on. 
     Accordingly, it is possible to safely switch from the clamp state to the charge state. 
     [Item 5] 
     Energy transfer circuit ( 10 ) according to item 4, in which 
     controller ( 13 ) switches between states in order of a first clamp state where a clamp current flows through diode (D 6 ) in parallel with one switching element (Q 6 ) among four switching elements (Q 5 , Q 6 , and Sc 4 ) forming the clamp path by turning off one switching element (Q 6 ), and a second clamp state where switching element (Q 6 ) in the off state is turned on and all four switching elements (Q 5 , Q 6 , and Sc 4 ) are turned on after the inductor current increase state is ended, and 
     forms the clamp path in the first clamp state by turning off two switching elements (Q 5  and Q 6 ) of one switching element (Q 6 ) in the off state and one switching element (Q 5 ) connected to switching element (Q 6 ) in series in an opposite direction among four switching elements (Q 5 , Q 6 , and Sc 4 ) forming the clamp path after the second clamp state is ended and turning on one (Q 5 ) of two switching elements (Q 5  and Q 6 ) turned off at a timing delayed from a timing at which the state is switched from the first charge state to the second charge state and before the state is switched to a next first clamp state. 
     Accordingly, it is possible to suppress the occurrence of the spike when the clamp path in the first clamp state is prepared. 
     [Item 6] 
     Energy transfer circuit ( 10 ) according to any one of items 1 to 5 further including 
     voltage detector ( 14 ) that detects voltages of n cells (C 1  to C 4 ), 
     in which controller ( 13 ) executes an equalizing process among n cells (C 1  to C 4 ) based on the voltages of n cells (C 1  to C 4 ) detected by voltage detector ( 14 ). 
     Accordingly, it is possible to achieve the equalizing circuit using the energy transfer. 
     [Item 7] 
     Energy transfer circuit ( 10 ) according to item 6, in which 
     controller ( 13 ) determines a target voltage or a target capacity of n cells (C 1  to C 4 ) based on the voltages of n cells (C 1  to C 4 ) detected by voltage detector ( 14 ), determines that a cell with a voltage or a capacity higher than the target voltage or the target capacity is a cell to be discharged, and determines that a cell with a voltage or a capacity lower than the target voltage or the target capacity is a cell to be charged. 
     Accordingly, active cell balance can be achieved by the energy transfer between cells (C 1  to C 4 ). 
     [Item 8] 
     Power storage system ( 1 ) including 
     n cells (C 1  to C 4 ) connected in series, where n is an integer of 2 or more; and 
     energy transfer circuit ( 10 ) according to any one of items 1 to 7. 
     Accordingly, it is possible to construct power storage system ( 1 ) that achieves highly reliable and safe energy transfer circuit ( 10 ). 
     [Item 9] 
     Energy transfer circuit ( 10 M) including: 
     inductor (L 1 M); 
     module selection circuit ( 11 M) that is provided between m modules (M 1  to M 4 ) connected in series, where m is an integer of 2 or more, and inductor (L 1 M), and is capable of electrically connecting both ends of a selection module including any one of m modules (M 1  to M 4 ) or a plurality of modules connected in series and both ends of inductor (L 1 M); 
     clamp circuit ( 12 M) that includes clamp switches (Sc 1 M to Sc 4 M) for forming a closed loop including inductor (L 1 M) in a state where module selection circuit ( 11 M) does not select any module (M 1  to M 4 ); and 
     controller ( 13 M) that controls module selection circuit ( 11 M) and clamp circuit ( 12 M), 
     in which module selection circuit ( 11 M) includes 
     first wiring (W 1 M) that is connected to one end of inductor (L 1 M), 
     second wiring (W 2 M) that is connected to another end of inductor (L 1 M), 
     a plurality of first wiring switches (S 1 M, S 5 M, and S 9 M) that selectively connect one of both the ends of the selection module to first wiring (W 1 M), and 
     at least one second wiring switch (S 4 M or S 8 M) that selectively connects an other end of both the ends of the selection module to second wiring (W 2 M), 
     in clamp switch (Sc 2 M), two switching elements (Q 5  and Q 6 ), having diodes(D 5  and D 6 ), are connected in series in a state where diodes (D 5  and D 6 ) are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements, 
     in first wiring switch (S 1 M), two switching elements (Q 1  and Q 2 ), having diodes (D 1  and D 2 ), are connected in series and formed in a state where diodes (D 1  and D 2 ) are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements, 
     in second wiring switch (S 4 ), two switching elements, having diodes, are connected in series and formed in a state where the diodes are in opposite directions, the diodes each being connected or formed in parallel with corresponding one of the two switching elements, 
     controller ( 13 M) controls states in order of an inductor current increase state where a discharge path through which both the ends of inductor (L 1 M) are connected to nodes on both sides of discharge module (M 1 ) which is the selection module to be discharged among m modules (M 1  to M 4 ) is formed by controlling electrical connection states of first wiring switch (S 1 M), second wiring switch (S 4 M), and clamp switch (Sc 1  to Sc 4 ) connected to the nodes on both the sides of discharge module (M 1 ), a current flowing to inductor (L 1 M) from discharge module (M 1 ), and the current flowing to inductor (L 1 M) is increased, a clamp state where a clamp path through which both the ends of inductor (L 1 M) are connected via clamp switch (Sc 1 M or Sc 4 M) is formed by controlling the electrical connection states of first wiring switch (S 1 M), second wiring switch (S 4 M), and clamp switch (Sc 1 M to Sc 4 M) connected to the nodes of both the sides of discharge module (M 1 ), a clamp current flowing between both the ends of inductor (L 1 M), and the current flowing to inductor (L 1 M) is circulated through the clamp path, and an inductor current decrease state where a charge path through which both the ends of inductor (L 1 M) are connected to nodes of both sides of charge module (M 2 ) which is the selection module to be charged among m modules (M 1  to M 4 ) is formed by controlling electrical connection states of first wiring switch (S 5 M), second wiring switch (S 4 M), and clamp switch (Sc 1 M to Sc 4 M) connected to the nodes of both the sides of charge module (M 2 ), a current flowing to charge module (M 2 ) from inductor (L 1 M), and the current flowing to inductor (L 1 M) is decreased, 
     the clamp state includes a first clamp state where a clamp current flows through diode (D 6 ) in parallel with at least one switching element (Q 6 ) among a plurality of switching elements (Q 5  and Q 6 ) forming the clamp path by turning off at least one switching element (Q 6 ) and a second clamp state where switching element (Q 6 ) in the off state is turned on and all the plurality of switching elements (Q 5  and Q 6 ) are turned on, and 
     controller ( 13 M) forms the clamp path in the first clamp state by turning on all of a plurality of switching elements (Q 1 , Q 2 , Q 7 , and Q 8 ) forming the discharge path in the inductor current increase state and then turning on a part (Q 5 ) of a plurality of switching elements (Q 5  and Q 6 ) constituting clamp switch (Sc 2 M) before the state is switched to a next first clamp state. 
     Accordingly, it is possible to achieve highly reliable and safe energy transfer circuit ( 10 M). 
     [Item 10] 
     Energy transfer circuit ( 10 M) according to item 9, in which 
     module selection circuit ( 11 M) includes 
     a plurality of first wiring switches (S 1 M, S 5 M, and S 9 M) that are connected between odd-numbered nodes among nodes (n+1) of m modules (M 1  to M 4 ) connected in series and first wiring (W 1 M), and 
     at least one second wiring side switch (S 4 M or S 8 M) that is connected between even-numbered nodes among the nodes (n+1) of m modules (M 1  to M 4 ) connected in series and second wiring (W 2 M), 
     clamp circuit ( 12 M) includes first clamp switch (Sc 1 M) and second clamp switch (Sc 2 M) connected to each other in series and third clamp switch (Sc 3 M) and fourth clamp switch (Sc 4 M) connected to each other in series, 
     inductor (L 1 M) is connected between a node between first clamp switch (Sc 1 M) and second clamp switch (Sc 2 M) and a node between third clamp switch (Sc 3 M) and fourth clamp switch (Sc 4 M), 
     ends of first clamp switch (Sc 1 M) and third clamp switch (Sc 3 M) that are not connected to inductor (L 1 M) are connected to first wiring (W 1 M), 
     ends of second clamp switch (Sc 2 M) and fourth clamp switch (Sc 4 M) that are not connected to inductor (L 1 M) are connected to second wiring (W 2 M), and 
     clamp circuit ( 12 M) is connected as a full bridge circuit by inductor (L 1 M), first clamp switch (Sc 1 M), second clamp switch (Sc 2 M), third clamp switch (Sc 3 M), and fourth clamp switch (Sc 4 M). 
     Accordingly, it is possible to achieve highly reliable and safe energy transfer circuit ( 10 M) having clamp circuit ( 12 ) constituted as a full bridge circuit. 
     [Item 11] 
     Energy transfer circuit ( 10 M) according to item 9, in which 
     module selection circuit ( 11 M) includes 
     (m+ 1 ) first wiring side switches (S 1 M, S 3 M, S 5 M, S 7 M, and S 9 M) that are connected between nodes of m modules (M 1  to M 4 ) connected in series and first wiring (W 1 M), and 
     (m+1) second wiring side switches (S 2 M, S 4 M, S 6 M, S 8 M, and S 10 M) that are connected between the nodes of m modules (M 1  to M 4 ) connected in series and second wiring (W 2 M). 
     Accordingly, it is possible to configure one clamp switch (ScM) used for clamp circuit ( 12 M). That is, one clamp switch can be constituted by two switching elements. 
     [Item 12] 
     Energy transfer circuit ( 10 M) according to item 10, in which 
     after the second clamp state is ended, controller ( 13 M) switches between states in order of a first charge state where a charge current flows through diodes (D 1  and D 8 ) in parallel with two switching elements (Q 1  and Q 8 ) by turning off two switching elements (Q 1  and Q 8 ), the two switching elements being one switching element (Q 1 ) constituting first wiring side switch (S 1 M) or the second wiring side switch and one switching element (Q 8 ) constituting clamp switch (Sc 1 M) among eight switching elements (Q 1 , Q 2 , Q 7 , Q 8 , S 4 M, and Sc 4 M) forming the charge path, and a second charge state where the two switching elements (Q 1  and Q 8 ) in the off state are turned on and all eight switching elements (Q 1 , Q 2 , Q 7 , Q 8 , S 4 M, and Sc 4 M) are turned on. 
     Accordingly, it is possible to safely switch from the clamp state to the charge state. 
     [Item 13] 
     Energy transfer circuit ( 10 M) according to item 12, in which 
     controller ( 13 M) switches between states in order of a first clamp state where a clamp current flows through diode (D 6 ) in parallel with one switching element (Q 6 ) among four switching elements (Q 5 , Q 6 , and Sc 4 M) forming the clamp path by turning off one switching element (Q 6 ), and a second clamp state where switching element (Q 6 ) in the off state is turned on and all four switching elements (Q 5 , Q 6 , and Sc 4 M) are turned on after the inductor current increase state is ended, and 
     forms the clamp path in the first clamp state by turning off two switching elements (Q 5  and Q 6 ) of one switching element (Q 6 ) in the off state and one switching element (Q 5 ) connected to one switching element (Q 6 ) in the off state in series in an opposite direction among four switching elements (Q 5 , Q 6 , and Sc 4 M) forming the clamp path after the second clamp state is ended and turning on one (Q 5 ) of two switching elements (Q 5  and Q 6 ) turned off at a timing delayed from a timing at which the state is switched from the first charge state to the second charge state and before the state is switched to a next first clamp state. 
     Accordingly, it is possible to suppress the occurrence of the spike when the clamp path in the first clamp state is prepared. 
     [Item 14] 
     Energy transfer circuit ( 10 M) according to any one of items 9 to 13 further including 
     voltage detector ( 14 M) that detects voltages of m modules (M 1  to M 4 ), 
     in which controller ( 13 M) executes an equalizing process among m modules (M 1  to M 4 ) based on the voltages of m modules (M 1  to M 4 ) detected by voltage detector ( 14 M). 
     Accordingly, it is possible to achieve the equalizing circuit using the energy transfer. 
     [Item 15] 
     Energy transfer circuit ( 10 M) according to item 14, in which 
     controller ( 13 M) determines a target voltage or a target capacity of m modules (M 1  to M 4 ) based on the voltages of m modules (M 1  to M 4 ) detected by voltage detector ( 14 M), determines that a module with a voltage or a capacity higher than the target voltage or the target capacity is a module to be discharged, and determines that a module with a voltage or a capacity lower than the target voltage or the target capacity is a module to be charged. 
     Accordingly, active module balance can be achieved by energy transfer between modules (M 1  to M 4 ). 
     [Item 16] 
     Energy transfer circuit ( 10 M) according to item 14, in which 
     each of m modules (M 1  to M 4 ) includes 
     a plurality of cells (C 1  to C 4 ) connected in series, 
     cell voltage detector ( 14 ) that detects cell voltages of the plurality of cells (C 1  to C 4 ), and 
     cell equalizing circuit (each of  10 A to  10 D) that equalizes a plurality of cell voltages within same module (each of M 1  to M 4 ) based on the cell voltages detected by cell voltage detector ( 14 ), 
     in which each of cell equalizing circuit ( 10 A to  10 D) operates in cooperation with controller ( 13 M) by communication, and executes an equalizing process among the plurality of cells (C 1  to C 4 ) after the equalizing process among m modules (M 1  to M 4 ) is executed. 
     Accordingly, it is possible to efficiently achieve equalization among all the cells by concurrently using active module balance by energy transfer between modules (M 1  to M 4 ) and active cell balance by energy transfer between cells (C 1  to C 4 ). 
     [Item 17] 
     Power storage system ( 1 M) including 
     m modules (M 1  to M 4 ) connected in series, where m is an integer of 2 or more; and 
     energy transfer circuit ( 10 M) according to any one of items 9 to 16. 
     According to this, it is possible to construct power storage system ( 1 M) achieving highly reliable and safe energy transfer circuit ( 10 M). 
     REFERENCE MARKS IN THE DRAWINGS 
       1 : power storage system 
       10 : equalizing circuit 
       11 : cell selection circuit 
       12 : energy retaining circuit 
       13 : controller 
       14 : voltage detector 
       20 : power storage 
     C 1 -C 4 , Ca, Cb: cell 
     L 1 : inductor 
     W 1 : first wiring 
     W 2 : second wiring 
     S 1 -S 10 : switch 
     Sc 1 -Sc 4 : clamp switch 
     Q 1 -Q 8 : switching element 
     D 1 -D 8 : body diode