Patent Publication Number: US-9887266-B2

Title: Ultra-low drain-source resistance power MOSFET

Description:
RELATED APPLICATION 
     This is a Divisional Application of, and claims benefit to, co-pending U.S. patent application Ser. No. 11/386,927, filed Mar. 21, 2006, now U.S. Pat. No. 8,409,954, to Chau et al., which is hereby incorporated herein by reference in its entirety. 
    
    
     TECHNICAL FIELD 
     Embodiments of the present invention relate to the fields of design and manufacturing semiconductors, and more particularly to systems and methods for forming ultra-low drain-source resistance power metal oxide semiconductor field effect transistors (MOSFETs). 
     BACKGROUND 
     Power metal oxide semiconductor field effect transistors (MOSFETs) have wide application in the electronic arts, for example in switching power supplies, motor driving circuits and the like. In many applications, a decreased ON resistance, or drain to source resistance, R DS , of a power MOSFET is desirable. 
     SUMMARY 
     Therefore, there is a need for systems and methods for ultra-low drain-source resistance power MOSFETs. In addition to the aforementioned need, there is a need for ultra-low drain-source resistance power MOSFETs with improved breakdown voltage characteristics. Further, there is a need for providing for the aforementioned needs in a manner that is compatible and complimentary with existing semiconductor processing systems and manufacturing processes. 
     Accordingly, an ultra-low drain-source resistance power metal oxide semiconductor field effect transistor is disclosed. In accordance with a first embodiment of the present invention, a semiconductor device comprises a substrate doped with red Phosphorus. 
     In accordance with another embodiment of the preset invention, a semiconductor device comprises a plurality of trench power MOSFETs. The plurality of trench power MOSFETs is formed in a second epitaxial layer. The second epitaxial layer is formed adjacent and contiguous to a first epitaxial layer. The first epitaxial layer is formed adjacent and contiguous to a substrate highly doped with red Phosphorus. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  illustrates a cross sectional view of power MOSFET, in accordance with embodiments of the present invention. 
         FIG. 2  illustrates a cross sectional view of power MOSFET, in accordance with alternative embodiments of the present invention. 
         FIG. 3  illustrates an exemplary doping profile of a semiconductor, in accordance with embodiments of the present invention. 
     
    
    
     BEST MODES FOR CARRYING OUT THE INVENTION 
     Reference will now be made in detail to the various embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with these embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be recognized by one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the present invention. 
     Ultra-Low Drain-Source Resistance Power MOSFET 
     Although embodiments of in accordance with the present invention are herein described in terms of power MOSFETs, it is to be appreciated that embodiments of in accordance with the present invention are well suited to other types of semiconductors, e.g., semiconductors in which a low substrate resistance is desirable, and that such embodiments are within the scope of the present invention. 
     Conventional semiconductor designs and processing techniques are generally unable to produce a power metal oxide semiconductor field effect transistor characterized as having a drain to source resistance, R DS , of less than about two milliohms percentimeter. For example, a conventional n-channel MOSFET is generally fabricated utilizing an Arsenic-doped substrate. The figure of two milliohms percentimeter is approximately a physical limit of such an Arsenic-doped substrate. Further, the substrate typically contributes about 40% of the ON resistance in conventional power MOSFETs. 
       FIG. 1  illustrates a cross sectional view of power MOSFET  100 , in accordance with embodiments of the present invention. It is appreciated that  FIG. 1  is not drawn to scale, and that relative dimensions have, in some cases, been exaggerated to illustrate specific features. MOSFET  100  comprises a novel red Phosphorus-doped substrate  110 . It is appreciated that red Phosphorus is one of the three main allotropes of Phosphorus. 
     In one embodiment of the present invention, substrate  110  is doped to a level of about 1.0×10 20  dopant atoms per cubic centimeter. At this doping level, substrate  110  achieves an advantageously low resistant of better than about 1.0 to 1.5 milliohms per square centimeter. It is to be appreciated that other doping levels are well suited to embodiments in accordance with the present invention. 
     In accordance with another embodiment of the present invention, substrate  110  is doped to a level of about 7.5×10 19  to 1.1×10 20  dopant atoms per cubic centimeter. At this doping level, substrate  110  achieves an advantageously low resistant of less than about 1.0 milliohms per square centimeter. 
     A conventional approach to reducing ON resistance of a power MOSFET is to reduce a thickness of an epitaxial layer and/or to create shallow drains. Deleteriously, semiconductor manufacturing techniques impose limits as to minimum size of such features. An additional drawback of such thin epitaxial layers is an undesirable reduction in breakdown voltage. 
     Red Phosphorus is generally characterized as having a high diffusion behavior. Such diffusion can lead to deleterious lowered breakdown voltages due to the Early effect. 
     Power MOSFET  100  further comprises a first epitaxial layer  120 , deposed adjacent to substrate  110 . In one embodiment of the present invention, first epitaxial layer  120  is doped to a level of about 1.0×10 18 ±about 5% dopant atoms per cubic centimeter. It is to be appreciated that other doping levels are well suited to embodiments in accordance with the present invention. One function of first epitaxial layer  120  is to limit the diffusion of red Phosphorus from substrate  110 . 
     Power MOSFET  100  further comprises a second epitaxial layer  130 , deposed adjacent to first epitaxial layer  120 . In one embodiment of the present invention, second epitaxial layer  130  is doped to a level of about 1.0×10 16  dopant atoms per cubic centimeter with, for example, Arsenic and/or Phosphorus. It is to be appreciated that other doping levels as well as different dopants are well suited to embodiments in accordance with the present invention. 
     Trench devices  140  of well-known design are constructed in second epitaxial layer  130 . 
     In accordance with embodiments of the present invention, the thickness, relative thickness, doping levels and dopant species of the first and second epitaxial layers can be designed to achieve a desirable high breakdown voltage in conjunction with an advantageous low ON resistance. For example, as the diffusion coefficient of Arsenic is smaller than that of Phosphorus, a first epitaxial layer comprising Arsenic dopants can be made thinner than a first epitaxial layer comprising Phosphorus dopants, beneficially decreasing ON resistance. 
       FIG. 2  illustrates a cross sectional view of power MOSFET  200 , in accordance with embodiments of the present invention. It is appreciated that  FIG. 2  is not drawn to scale, and that relative dimensions have, in some cases, been exaggerated to illustrate specific features. MOSFET  200  comprises a red Phosphorus-doped substrate  210 . Substrate  210  is generally similar to substrate  110  ( FIG. 1 ), e.g., doping levels are comparable. MOSFET  200  comprises a first epitaxial layer  220 . First epitaxial layer  220  may vary in thickness, dopants and/or doping levels from first epitaxial layer  120  ( FIG. 1 ) due to the presence of implant layer  250 . 
     MOSFET  200  comprises an implant layer  250  adjacent to a boundary between the substrate  210  and the first epitaxial layer  220 . Implant layer  250  may be formed at a depth considered to be within substrate  210 , at a depth considered to be within first epitaxial layer  220  or at a depth that crosses a boundary between substrate  210  and first epitaxial layer  220 , in accordance with embodiments of the present invention. Implant layer  250  may comprise implanted atoms of Arsenic or Antimony, for example. 
     One function of implant layer  250  is to limit the diffusion of red Phosphorus from substrate  210 . In this novel manner, first epitaxial layer  220  can be made thinner in comparison to a corresponding epitaxial layer in a semiconductor without an implant layer, e.g., first epitaxial layer  120  ( FIG. 1 ), beneficially decreasing ON resistance. 
       FIG. 3  illustrates an exemplary doping profile  300  of a semiconductor, in accordance with embodiments of the present invention. In doping profile  300 , the horizontal axis represents depth from a surface of a semiconductor, and the vertical axis represents dopant concentration. It is appreciated that doping profile  300  is not drawn to scale. 
     Region  310  of doping profile  300  represents a doping level of a substrate, e.g., substrate  110  of  FIG. 1 . In accordance with embodiments of the present invention, region  310  represents a doping level of red Phosphorus. Region  320  represents a doping level of a first epitaxial layer adjacent to the substrate, e.g., first epitaxial layer  120  of  FIG. 1 . 
     Region  330  represents a doping level of a second epitaxial layer adjacent to the first epitaxial layer, e.g., second epitaxial layer  130  of  FIG. 1 . Curve  340  represents a doping profile of a semiconductor after a thermal diffusion. In accordance with embodiments of the present invention, the thickness, relative thickness, doping levels and dopant species of the first and second epitaxial layers can be designed to achieve a desirable high breakdown voltage in conjunction with an advantageous low ON resistance. 
     In accordance with alternative embodiments of the present invention, a novel Antimony-doped substrate may be utilized. Antimony is characterized as having a very low diffusion coefficient, e.g., lower than that of Phosphorus. 
     Thus, embodiments in accordance with the present invention provide systems and methods ultra-low drain-source resistance power MOSFETs. Additionally, in conjunction with the aforementioned benefit, embodiments of the present invention provide systems and methods for ultra-low drain-source resistance power MOSFETs that enable improved breakdown voltage characteristics. As a further benefit, in conjunction with the aforementioned benefits, systems and methods of ultra-low drain-source resistance power MOSFETs are provided in a manner that is compatible and complimentary with existing semiconductor processing systems and manufacturing processes. 
     Embodiments in accordance with the present invention, ultra-low drain-source resistance power MOSFET, are thus described. While the present invention has been described in particular embodiments, it should be appreciated that the present invention should not be construed as limited by such embodiments, but rather construed according to the below claims.