Patent Publication Number: US-2005144613-A1

Title: Update firmware method and apparatus

Description:
BACKGROUND  
      The present invention relates to data update, and in particular to a method and apparatus for update firmware of a keyboard controller (KBC).  
      Generally, keyboard controllers are designed as multi-function control chips, further comprising control functions such as temperature monitor, fan status, monitor brightness adjustment, and the like, except a keyboard control function. In desktop computers, firmware applied to a keyboard controller and Basic Input/Output System (BIOS) are stored separately in different storage media.  
      The described firmware is stored in a storage medium to reduce costs. Firmware update of a keyboard controller is secure in a conventional operating system, such as Disk Operating System (DOS), which is a single-tasking operating system, however, a system or BIOS crash may occur in a Windows Operating System, which is a multi-tasking operating system, without a proper updating method. Thus, an improved update method is desirable.  
     SUMMARY  
      Embodiments of the invention provide an update firmware method, avoiding system or BIOS crashes during the firmware update process.  
      Accordingly, embodiments of the invention provide an update firmware method. First, a control chip, first firmware, and second firmware of the control chip are provided, both the first and second firmware are stored in a storage medium. Connections between the control chip and an operating system are interrupted. Next, write protection of the first and second firmware is disabled. The second firmware is updated and the write protection of the first and second firmware is re-enabled.  
      Embodiments of the invention further provide an update firmware apparatus. The apparatus comprises a first control chip managing all peripherals of a computer device, a second control chip managing a number of the peripherals of the computer device, and a storage medium storing first firmware and second firmware applied to the second control chip. Connections between the second control chip and an operating system are interrupted by the first firmware and write protection of the first and second firmware is then disabled. The second firmware is updated and the write protection of the first and second firmware is re-enabled.  
      A detailed description is given in the following embodiments with reference to the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
      Embodiments of the invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:  
       FIG. 1  is a schematic diagram of pins of a peripheral control chip and a storage medium according to an embodiment of the invention;  
       FIG. 2  is a schematic diagram of the architecture of the update firmware apparatus according to an embodiment of the invention; and  
       FIG. 3  is a flowchart of the update firmware method according to an embodiment of the invention. 
    
    
     DETAILED DESCRIPTION  
      Embodiments of the invention disclose a method and apparatus for updating firmware.  
       FIG. 1  is a schematic ping diagram of a peripheral control chip and a storage medium according to an embodiment of the invention.  
      A peripheral control chip  101  is a South Bridge control chip, comprising EGPIO8, EGPIO9, ECSMI#, and ECSCI# pins, # indicates the pins thereof are enabled at low level. A storage medium  102  is an Electronically Erasable Programmable Read-Only Memory (EEPROM), comprising FLASH_GPIO1 and FLASH_GPIO2 pins and ECSMI# and ECSCI# pins of KBC  103 . EGPI08, EGPI09, ECSMI#, and ECSCI# pin of the peripheral control chip  101  connect respectively to FLASH_CPIO1 and FLASH_CPIO2 pin of the storage medium  102  and ECSMI# and ECSCI# pin of the KBC  103 . Initially, the EGPIO8, EGPIO9, FLASH_GPIO1, and FLASH_GPIO2 pins are enabled at low level, enabling write protection of the BIOS.  
      Before a firmware update, a number of BIOS-level and OS-level routines are interrupted using the ECSMI# and ECSCI# pins of KBC  103 , and levels of the EGPIO8, EGPIO9, FLASH_GPIO1, and FLASH_GPIO2 pins then change to high to disable the BIOS write protection.  
       FIG. 2  is a schematic diagram of the architecture of the update firmware apparatus according to an embodiment of the invention.  
      The architecture at least comprises one South Bridge control chip  101 , a storage medium  102 , and a KBC  103 . South Bridge control chip  101  manages peripherals, such as a high-speed serial bus (IEEE 1394)  108  and Local Area Network  109 , of a computer device. KBC  103  manages a Touch Pad  106  and keyboard  107 .  
      When the firmware update begins, the central processing unit (CPU)  104  sends a control command to a North Bridge control chip  105  for firmware update. North Bridge control chip  105  forwards the control command to South Bridge control chip  101  and BIOS stored in storage medium  102  interrupts connections between KBC  103  and an operating system of the computer device. In addition, a number of BIOS-level and OS-level routines are interrupted. Thereafter, the BIOS sends a control command to disable write protection of the KBC firmware, and levels of the EGPIO8, EGPIO9, FLASH_GPIO1, and FLASH_GPIO2 pins then change to high to disable the write protection of the BIOS.  
      Next, the KBC firmware, stored in storage medium  102 , is updated and then re-enabled by a control command from the BIOS to re-enable the write protection of the KBC firmware. Thereafter, the levels of the EGPIO8, EGPIO9, FLASH_GPIO1, and FLASH_GPIO2 pins then change to low to re-enable the BIOS write protection.  
       FIG. 3  is a flowchart of the update firmware method according to an embodiment of the invention.  
      In step S 1 , connections between KBC firmware and an operating system are interrupted, indicating read and write of input/output (I/O) ports of the control chip, a keyboard, and a mouse. A number of BIOS-level and OS-level routines must be interrupted, leaving the others that are irrelevant to the firmware update unchanged.  
      In step S 2 , BIOS sends a system call KBC firmware to perform an update routine thereof.  
      In step S 3 , write protection of the KBC firmware is disabled by a control command.  
      In step S 4 , write protection of the BIOS is disabled. Two specific pins of a peripheral control chip couple to two specific pins of a storage medium. Initially, the pins are enabled at low level, enabling the write protection of the BIOS. Levels of the pins herein change to high to disable the BIOS write protection.  
      In step S 5 , the KBC firmware stored in the storage medium is updated.  
      In step S 6 , after firmware update, the write protection of the KBC firmware is re-enabled by a control command, and the levels of the pins change to low to re-enabled the BIOS write protection.  
      In step S 7 , the operating system reboots to activate the KBC firmware.  
      Embodiments of the invention provide a method for updating KBC firmware in a multi-tasking operating system, capable of preventing system or BIOS crashes.  
      While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto.