Patent Publication Number: US-10318463-B2

Title: Interface controller, external electronic device, and external electronic device control method

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application claims the benefit of U.S. Provisional Application No. 61/882,841, filed Sep. 26, 2013. 
     This Application claims priority of Taiwan Patent Application No. 103109867, filed on Mar. 17, 2014, the entirety of which is incorporated by reference herein. 
    
    
     BACKGROUND OF THE INVENTION 
     Field of the Invention 
     The present invention relates to external electronic devices and control methods thereof and further relates to interface controllers designed for external electronic devices. 
     Description of the Related Art 
     To complete the link between a host and an external electronic device, the host has to request link information from the external electronic device. Some of the link information is contained in the main body of the external electronic device and is inaccessible until the main body reaches a stable operation. For example, it requires time for the hard disc to rotate stably since the power-on process of the motor rotates the hard disc. Because of the delay of the link information, the host may erroneously determine that no external electronic device is connected to the host. 
     BRIEF SUMMARY OF THE INVENTION 
     An interface controller in accordance with an exemplary embodiment of the disclosure is shown, which couples a main body of an external electronic device to a host. The interface controller includes a non-volatile memory and a control unit. The control unit is configured to transmit a termination-on signal to the host when link information retrieved from the main body has been written into the non-volatile memory. When the host issues a link information request in response to the termination-on signal, the control unit uses the link information stored in the non-volatile memory to respond to the link information request. 
     In an exemplary embodiment, an external electronic device comprising the interface controller and the main body is shown. 
     A control method for an external electronic device in accordance with an exemplary embodiment of the disclosure comprises the following steps: providing an interface controller to couple a main body of the external electronic device to a host; retrieving link information from the main body and writing the link information into a non-volatile memory; transmitting a termination-on signal to the host after writing the link information into the non-volatile memory; and using the link information stored in the non-volatile memory to respond to a link information request that is issued by the host in response to the termination-on signal. 
     A detailed description is given in the following embodiments with reference to the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The present invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
         FIG. 1  depicts an external electronic device  100  in accordance with an exemplary embodiment of the disclosure; 
         FIG. 2  is a flowchart depicting a control method  200  for an external electronic device in accordance with an exemplary embodiment of the disclosure; and 
         FIG. 3  is a flowchart depicting a control method  300  for an external electronic device in accordance with an exemplary embodiment of the disclosure. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims. 
       FIG. 1  depicts an external electronic device  100  in accordance with an exemplary embodiment of the disclosure, which comprises a main body  102  and an interface controller  104 . The interface controller  104  couples the main body  102  to a host  106 . The interface controller  104  comprises a non-volatile memory  108  and a control unit  110 . 
     In  FIG. 1 , the events between the interface controller  104 , the main body  102  and the host  106  are numbered  114 ,  116  and  118  from earlier to later. The main body  102  reaches a stable operation before event  114 . By event  114 , the control unit  110  of the interface controller  104  retrieves link information from the main body  102  and writes the link information retrieved from the main body  102  into the non-volatile memory  108 . Event  116  is scheduled after event  114  (link information retrieving). By event  116 , the control unit  110  transmits a termination-on signal to the host  106 . By event  118 , the host  106  issues a link information request in response to the termination-on signal. In one embodiment, the interface controller  104  communicates with the host  106  via universal serial bus (USB), the host  106  performs an enumeration process during event  118  in response to the termination-on signal. The link information request includes at least one setup command issued during the enumeration process. Preferably the setup command may be a port address setting command (Set_Address), a get descriptor command (Get_Descriptor) and so on. Furthermore, by event  118 , the control unit  110  uses the link information stored in the non-volatile memory  108  to respond to the link information request issued from the host  106  and thereby the enumeration process performed on the external electronic device  100  by the host  106  is accomplished to complete the link between the interface controller  104  and the host  106 . 
     In an exemplary embodiment, when a link trigger between the interface controller  104  and the host  106  is asserted, the control unit  110  determines whether link information contained in the main body  102  has been written into the non-volatile memory  108 . When the link information is not stored in the non-volatile memory  108  yet, the control unit  110  waits for the main body  102  to reach a stable operation. After the main body  102  reaches the stable operation, the control unit  110  retrieves the link information from the main body  102  and writes the link information retrieved from the main body  102  into the non-volatile memory  108  (by event  114 ) and then outputs the termination-on signal to the host  106  (by event  116 ). When the link trigger is asserted and the link information is already stored in the non-volatile memory  108 , the control unit  110  transmits the termination-on signal to the host  106  in response to the asserted link trigger and uses the link information stored in the non-volatile memory  108  to respond to the link information request no matter whether the main body  102  reaches the stable operation. 
     In some exemplary embodiments, the link trigger between interface controller  104  and the host  106  is asserted when the host  106  supplies power to the external electronic device  100 . In one embodiment, the interface controller  104  communicates with the host  106  via universal serial bus (USB) interface, and the link trigger is the voltage variations on the D+ and D− connection terminals of USB connector. In other exemplary embodiments, the link trigger may be asserted when the external electronic device  100  is physically connected to the host  106  or when the host  106  is resumed from sleep mode. In an exemplary embodiment, the external electronic device  100  switches to a sleep state from a normal working state accomplishing with the host  106  entering sleep mode (e.g. S3 or S4 power state). When resuming from sleep mode, the host  106  may wake up the external electronic device  100  accordingly and thereby the link trigger is asserted. It takes a long time for the main body  102  to reach a stable operation to provide the link information. It may be too late if the termination-on signal is transmitted after the main body  102  reaches the stable operation. The host  106  waiting for the termination-on signal for a long time may erroneously determine that the external electronic device  100  has been disconnected from the host  106 . In cases wherein the host  106  was copying data of the main body  102  before sleep mode, the host  106  resuming from sleep mode and erroneously determining that the external electronic device  100  has been disconnected from the host  106  may regard the external electronic device  100  as a new device and thereby the interrupted copy operation fails. However, according to the disclosure, when the host  106  resumes from sleep mode and the link trigger is asserted accordingly, the link information previously loaded in the non-volatile memory  108  is still available. Thus, the interface controller  104  may output the termination-on signal to the host  106  in response to the asserted link trigger without waiting for the main body  120  to reach the stable operation. No time is wasted in waiting for the main body  102  to reach the stable operation. The external electronic device  100  is not erroneously regarded as a newly plugged-in device. 
     In an exemplary embodiment, the control unit  110  retrieves at least one of a vendor identification number (VID), a product identification number (PID), a device serial number and a product string from the main body  102  as the link information to be written into the non-volatile memory  108 . 
       FIG. 2  is a flowchart depicting how the control unit  110  works when a link trigger between the interface controller  104  and the host  106  is asserted. In a case wherein the host  106  supplies power to the external electronic device  100  via universal serial bus (USB) interface, the link trigger is asserted according to the voltage variations on the D+ and D− terminal of USB connector connecting the host  106  and the interface controller  104 . In step S 202 , the non-volatile memory  108  is checked to ensure whether link information originating from the main body  102  is already stored in the non-volatile memory  108 . When it is determined in step S 202  that the link information is not stored in the non-volatile memory  108  yet, step S 204  is performed to wait for the main body  102  to reach a stable operation. Once the main body  102  reaches the stable operation, step S 206  is performed to read the main body  102  for the link information and write the link information into the non-volatile memory  108 . After step S 206 , step S 208  is performed to transmit a termination-on signal to the host  106 . In step S 210 , the link information retrieved from the main body  102  and stored in the non-volatile memory  108  is transmitted to the host  106  in response to at least one link information request. The at least one link information request is issued by the host  106  in response to the termination-on signal. 
     When it is determined in step S 202  that the link information originated from the main body  102  is stored in the non-volatile memory  108 , steps S 204  and S 206  are skipped and step S 208  is performed. Thus, the termination-on signal, in response to the asserted link trigger, is transmitted to the host  106  no matter whether the main body  102  reaches the stable operation. Step S 210  is performed after step S 208 . In step S 210 , the link information retrieved from the main body  102  and stored in the non-volatile memory  108  is transmitted to the host  106  in response to at least one link information request. The at least one link information is issued by the host  106  in response to the termination-on signal. 
     All in all, no matter whether the main body  102  reaches a stable operation, the link information request issued from the host  106  in response to the termination-on signal is timely responded by the link information stored in the non-volatile memory  108 . 
     The power states S3 or S4 are discussed in this paragraph. When the host  106  enters sleep mode (S3 or S4 power state), the external electronic device  100  may switch to a sleep state accordingly. When the host  106  resumes and thereby a link trigger between the host  106  and the external electronic device  100  is asserted, considerable time is required for the start-up main body  102  to reach a stable operation. Fortunately, according to the disclosed technique, the link information must have been ready in the non-volatile memory  108  before the sleep state. Thus, when the control unit  110  resumes from the sleep state, steps S 204  and S 206  are skipped and step S 208  is performed in accordance with that shown in  FIG. 2 . The link between the host  106  and the external electronic device  100  is successfully established no matter of whether the main body  102  reaches the stable operation. The host  106  does not erroneously recognize the external electronic device just resumed from the sleep state as a reconnected device. 
     In an exemplary embodiment, a sleep state indicator is provided to indicate whether the host  106  resumed from sleep mode. The sleep state indicator may be a software flag, which is asserted when the host  106  enters sleep mode. When the host  106  resumed from the sleep state and the link trigger between the host  106  and the interface controller  104  is asserted, the control unit  110  observes that the sleep state indicator has been asserted. According to the asserted sleep state indicator, the control unit  110  determines that link information originated from the main body  102  is already stored in the non-volatile memory  108 . Thus, steps S 204  and S 206  are skipped and step S 208  is performed. The link between the host  106  and the external electronic device  100  is successfully established even though the main body  102  resumed from the sleep state has not reached the stable operation. It is because steps S 204  and S 206  have been performed to retrieve the link information from the main body  102  and write the link information into the non-volatile memory  108  at the first time the external electronic device  100  connected to the host  106 . In a case wherein the external electronic device  100  is an add-on card, the host  106  shuts down the power of the external electronic device  100  when entering sleep mode. When the host  106  resumes, the power of the external electronic device  100  is resumed by the host  106  and a link trigger between the host  106  and the external electronic device  100  is asserted. In a case wherein the external electronic device  100  is an on-board card, the power of the external electronic device  100  is uninterrupted when the host  106  enters sleep mode. However, the link trigger between the host  106  and the external electronic device  100  is also asserted when the host  106  wakes up. The external electronic device  100  powered off by the sleep state of the host  106  taking more considerable time to resume (reaching stable operation) especially benefits from the disclosed techniques. 
     When the main body  102  is swappable, a device indicator is provided to indicate whether the main body  102  has been changed. The device indicator also indicates whether the link information contained in the non-volatile memory  108  is still valid. The control unit  110  may check the device indicator when a link trigger (for example, when the voltage levels of D+ and D− terminals of a USB connector vary) between the host  106  and the interface controller  104  is asserted. When the device indicator indicates that the main body  102  has been changed, it means that the link information stored in the non-volatile memory  108  is invalid now and the control unit  110  determines that the link information originated from the new main body  102  is not ready in the non-volatile memory  108 . According to  FIG. 2 , steps S 204  and S 206  are performed to update the link information of the new main body  102  into the non-volatile memory  108  and steps S 208  and S 210  are performed to complete the link between the host  106  and the new main body  102 . 
       FIG. 3  is a flowchart depicting an external electronic device control method  300  in accordance with an exemplary embodiment of the disclosure.  FIG. 3  is discussed with respect to  FIG. 1 . 
     To implement the flowchart of  FIG. 3 , an interface controller  104  is provided to couple a main body  102  to a host  106 . In  FIG. 3 , it is the first time for the external electronic device  100  to connect to the host  106  and link information originated from the main body  102  is not stored in the non-volatile memory  108 . Step S 302 , therefore, is performed to wait for the main body  102  to reach a stable operation. After the main body  102  reaches the stable operation, the link information is retrieved from the main body  102  and written into the non-volatile memory  108 . After step S 302 , step S 304  is performed by which a termination-on signal is transmitted to the host  106 . In step S 306 , the link information stored in the non-volatile memory  108  is provided to respond at least one link information request that is issued from the host  106  in response to the termination-on signal. 
     In a case wherein the main body  102  is a hard disc, the hard disc is inaccessible until the motor of the hard disc rotates stably. A hard disc—especially a large capacity hard disc (&gt;2TB)—takes seconds from start-up to stable rotation. According to the disclosed techniques, the link between the host  106  and the hard disc is successfully established even though considerable time is required for the hard disc to reach stable rotation. 
     In an exemplary embodiment, the main body  102  communicates with the interface controller  104  via serial advanced technology attachment (SATA) interface and communicates with the host  106  via universal serial bus (USB) interface. For example, the main body  102  may be a SATA hard drive, transformed by the interface controller  104  to communicate with the host  106  via the USB interface. In an exemplary embodiment, the interface controller  104  is a bridge device between the USB communication protocol and the SATA communication protocol. In an exemplary embodiment, the interface controller  104  may be packaged with the main body  102  and is produced as an external electronic device  100  with a USB interface. 
     Furthermore, the external electronic device control methods of the disclosure are not limited to the architecture shown in  FIG. 1 . Any technique using the aforementioned concept to control an external electronic device is within the scope of the invention. 
     While the invention has been described by way of example and in terms of the embodiments, it should be understood that the invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.