Patent Publication Number: US-9406840-B2

Title: Semiconductor layer including compositional inhomogeneities

Description:
REFERENCE TO RELATED APPLICATIONS 
     The current application is a continuation-in-part application of U.S. application Ser. No. 14/285,738, titled “Semiconductor Layer Including Compositional Inhomogeneities,” which was filed on 23 May 2014, and which claims the benefit of U.S. Provisional Application No. 61/826,788, titled “Semiconductor Layer with Compositional Inhomogeneities,” which was filed on 23 May 2013, and U.S. Provisional Application No. 61/943,162, titled “Group III Nitride Semiconductor Composition and Ultraviolet Optoelectronic Device Containing the Same,” which was filed on 21 Feb. 2014, all of which are hereby incorporated by reference. 
    
    
     TECHNICAL FIELD 
     The disclosure relates generally to emitting devices, and more particularly, to an emitting device including a semiconductor layer with compositional inhomogeneous regions. 
     BACKGROUND ART 
     Compositional band fluctuations were first considered for indium-gallium-nitride (InGaN) systems. It was found that the material properties of InGaN alloys change as the amount of indium in the alloy is increased. With the proper growth conditions, however, it was discovered that a material could be grown in which the indium did not incorporate uniformly throughout the InGaN layer (i.e., the material had areas of high and low concentrations of indium spread throughout). These compositional fluctuations, also known as localized inhomogeneities, result in carrier localization and lead to an enhancement in the radiative efficiency despite the high dislocation density. The discovery of the effects of the localized inhomogeneities enabled the development of commercially successful blue InGaN-based LEDs and laser diodes (LDs). It has been reported that the intense red-shifted photoluminescence (PL) peaks observed in InGaN alloys at room temperature result from the recombination of excitons localized at potential minima originating from large compositional fluctuations. 
     Similar localization effects were observed for aluminum-indium-gallium-nitride (AlInGaN) and aluminum-gallium-nitride (AlGaN) systems. The use of aluminum gallium nitride (Al x Ga 1-x N), as opposed to InAlGaN, is currently preferred as the base material for manufacturing ultraviolet (UV) light emitting diode (LED) devices for ultraviolet semiconductor optical sources operating at wavelengths between 260 to 360 nanometers (nm) due to its tunable band gap from 3.4 eV to 6.2 eV. 
     One approach discloses a semiconductor structure containing compositional fluctuations as well as a method for depositing group III-nitride films called molecular beam epitaxy (MBE). The structure comprises self-assembled nanometer-scale localized compositionally inhomogeneous regions. Within these regions, the luminescence occurs due to radiative recombination of carriers in the self-assembled nanometer-scale localized compositionally inhomogeneous regions having band-gap energies less than surrounding material. Further, another approach discloses self-assembled nanometer-scale localized compositionally inhomogeneous regions that include a fine scale facetted surface morphology or pits with diameters of about ten to one hundred nanometers. The approach also discloses the semiconductor device comprising of such semiconductor structures. 
     Group-III nitride based semiconductors are materials of choice for ultraviolet light emitting diodes, photomultipliers and photodiodes. Currently, wall plug operating efficiencies of deep ultraviolet light emitting devices reach only a few percent and a large effort is devoted to improving their efficiency. 
     Similar to InGaN-based semiconductor devices, carrier localization plays an important role in light emission from devices based on AlGaN semiconductor layers. Even though these materials are typically grown with a large number of threading dislocations and point defects, emission efficiency is higher than anticipated and radiative lifetimes obtained from photoluminescence studies are smaller than predicted by theory. This effect can be attributed to the carriers being isolated from nonradiative recombination centers due to localization in sites containing a smaller band gap than the surrounding semiconductor material. 
       FIG. 1  shows a schematic of compositional fluctuation according to the prior art. During the initial growth stage, adjacent small islands, from which the growth starts, coalesce into larger grains. As the islands enlarge, Ga adatoms, having a larger lateral mobility than Al adatoms, reach the island boundaries more rapidly. As a result, the Ga concentration in the coalescence regions is higher than in the center of the islands. The composition pattern, which is formed during the coalescence, is maintained as the growth proceeds vertically. As a result of the coalescence, the domain boundaries usually contain extended defects that form to accommodate the relative difference in crystal orientation among the islands. Even in layers with smooth surfaces containing elongated layer steps, screw/mixed dislocations occur due to the local compositional inhomogeneities. 
     SUMMARY OF THE INVENTION 
     In light of the above, the inventors recognize that compositional inhomogeneous regions in a semiconductor layer of a device can allow for increasing radiative recombination of carriers and decreasing nonradiative recombination time by preventing electrons from reaching threading dislocation cores. 
     Aspects of the invention provide a device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions, which can be configured to, for example, improve internal quantum efficiency (IQE) and the overall reliability of the device. A difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer. 
     A first aspect of the invention provides a device comprising: a semiconductor layer comprising a plurality of compositional inhomogeneous regions, wherein a difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer is at least thermal energy, and wherein a characteristic size of the plurality of compositional inhomogeneous regions is smaller than an inverse of a dislocation density for the semiconductor layer. 
     A second aspect of the invention provides a device comprising: a semiconductor structure including an active region, wherein the active region comprises a multiple quantum well structure including: a plurality of barriers alternating with a plurality of quantum wells, wherein at least one of: a barrier in the plurality of barriers or a quantum well in the plurality of quantum wells includes a plurality of compositional inhomogeneous regions, wherein a difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer is at least thermal energy, and wherein a characteristic size of the plurality of compositional inhomogeneous regions is smaller than an inverse of a dislocation density for the semiconductor layer. 
     A third aspect of the invention provides a method comprising: forming an active region of a semiconductor structure, wherein the active region comprises a light emitting heterostructure, the forming including: forming a plurality of barriers alternating with a plurality of quantum wells, wherein forming at least one of: a barrier in the plurality of barriers or a quantum well in the plurality of quantum wells includes forming a plurality of compositional inhomogeneous regions, wherein an average band gap for the plurality of compositional inhomogeneous regions exceeds a thermal energy of a remaining portion of the semiconductor layer and a characteristic size for each compositional inhomogeneous region is smaller than an inverse of a dislocation density. 
     The illustrative aspects of the invention are designed to solve one or more of the problems herein described and/or one or more other problems not discussed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       These and other features of the disclosure will be more readily understood from the following detailed description of the various aspects of the invention taken in conjunction with the accompanying drawings that depict various aspects of the invention. 
         FIG. 1  shows a schematic of compositional fluctuation according to the prior art. 
         FIG. 2  shows a schematic structure of an illustrative emitting device according to an embodiment. 
         FIG. 3A  shows a hybrid structure/band diagram corresponding to a portion of an active region of an illustrative emitting device, while  FIG. 3B  shows a plane of the quantum well within the active region of the device according to an embodiment. 
         FIG. 4A  shows an illustrative plane within a multiple quantum well structure for a device according to an embodiment, while  FIG. 4B  shows an illustrative band gap map for the plane as a function of the y-axis according to an embodiment. 
         FIG. 5  shows a hybrid structure/band diagram of an illustrative multiple quantum well structure according to an embodiment. 
         FIG. 6A  shows a hybrid structure/band diagram of an illustrative multiple quantum well structure according to an embodiment, while  FIG. 6B  shows a plane at an interface between a quantum well and a barrier within the illustrative multiple quantum well structure according to an embodiment. 
         FIG. 7A  shows a hybrid structure/band diagram of an illustrative multiple quantum well structure according to an embodiment, while  FIG. 7B  shows a plane of a tilted quantum well within the illustrative multiple quantum well structure according to an embodiment. 
         FIG. 8A  shows additional details of a hybrid structure/band diagram of an illustrative plane within a multiple quantum well structure of a device according to an embodiment, while  FIG. 8B  shows an illustrative band gap map for the plane as a function of the y-axis according to an embodiment. 
         FIGS. 9A and 9B  show band diagrams of portions of illustrative multiple quantum well structures according to embodiments. 
         FIGS. 10A and 10B  show hybrid structure/band diagrams of portions of an illustrative multiple quantum well structure according to an embodiment. 
         FIG. 11  shows a band diagram of an illustrative quantum well according to embodiment. 
         FIGS. 12A-12C  show illustrative heterostructures according to embodiments. 
         FIGS. 13A and 13B  show band diagrams of illustrative quantum wells according to embodiments. 
         FIGS. 14A-14C  show illustrative topographical images corresponding to sample AlGaN layers with increasing Al molar fractions. 
         FIGS. 15A-15C  show illustrative maps corresponding to sample AlGaN layers with increasing Al molar fractions. 
         FIGS. 16A-16C  show illustrative maps corresponding to sample AlGaN layers with increasing Al molar fractions. 
         FIG. 17  shows a portion of an illustrative layer according to an embodiment. 
         FIGS. 18A and 18B  show illustrative strain modulation for reducing threading dislocations for a device according to an embodiment. 
         FIGS. 19A and 19B  show illustrative bright field optical microscope images of layers according to an embodiment. 
         FIG. 20  shows a graph showing the reduction of the full width at half maximum (FWHM) as a function of increasing the AlN layer thickness according to an embodiment. 
         FIGS. 21A and 21B  show illustrative patterning for compressive and tensile layers in a device according to an embodiment. 
         FIG. 22  shows an illustrative contact to a layer including compositional inhomogeneities according to an embodiment. 
         FIGS. 23A and 23B  show an illustrative contact to a layer including compositional inhomogeneities and compositional variations according to an embodiment. 
         FIG. 24  shows an illustrative contact including a plurality of metallic protrusions to a semiconductor layer including a plurality of compositional inhomogeneous regions according to an embodiment. 
         FIGS. 25A-25C  show illustrative etched surfaces of a semiconductor layer according to embodiments. 
         FIGS. 26A and 26B  show illustrative etched surfaces of a semiconductor layer with non-uniform etching according to embodiments. 
         FIG. 27  shows an illustrative flow diagram for fabricating a circuit according to an embodiment. 
     
    
    
     It is noted that the drawings may not be to scale. The drawings are intended to depict only typical aspects of the invention, and therefore should not be considered as limiting the scope of the invention. In the drawings, like numbering represents like elements between the drawings. 
     DETAILED DESCRIPTION OF THE INVENTION 
     As indicated above, aspects of the invention provide a device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions, which can be configured to, for example, improve internal quantum efficiency (IQE) and the overall reliability of the device. A difference between an average band gap (e.g., an energy difference between a top of the valence band and a bottom of the conduction band in the semiconductor) for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer. As used herein, a depth of a compositional inhomogeneous region is defined as a difference between the conductive band energy level at the location of the compositional inhomogeneous region and the average conductive band energy level, which is the average between the hills and valleys of the energy landscape of the semiconductor layer. As also used herein, a lateral area of the compositional inhomogeneous regions comprises the physical area corresponding to the location of the compositional inhomogeneous region. As used herein, unless otherwise noted, the term “set” means one or more (i.e., at least one) and the phrase “any solution” means any now known or later developed solution. 
     Turning to the drawings,  FIG. 2  shows a schematic structure of an illustrative emitting device  10  according to an embodiment. In a more particular embodiment, the emitting device  10  is configured to operate as a light emitting diode (LED), such as a conventional or super luminescent LED. Alternatively, the emitting device  10  can be configured to operate as a laser diode (LD) or a photo-detector. When operated as an emitting device  10 , application of a bias comparable to the band gap results in the emission of electromagnetic radiation from an active region  18  of the emitting device  10 . The electromagnetic radiation emitted by the emitting device  10  can comprise a peak wavelength within any range of wavelengths, including visible light, ultraviolet radiation, deep ultraviolet radiation, infrared light, and/or the like. In an embodiment, the device is configured to emit radiation having a dominant wavelength within the ultraviolet range of wavelengths. In a more specific embodiment, the dominant wavelength is within a range of wavelengths between approximately 210 and approximately 350 nanometers. 
     The emitting device  10  includes a heterostructure comprising a substrate  12 , a buffer layer  14  adjacent to the substrate  12 , an n-type cladding layer  16  (e.g., an electron supply layer) adjacent to the buffer layer  14 , and an active region  18  having an n-type side  19 A adjacent to the n-type cladding layer  16 . Furthermore, the heterostructure of the emitting device  10  includes a p-type layer  20  (e.g., an electron blocking layer) adjacent to a p-type side  19 B of the active region  18  and a p-type cladding layer  22  (e.g., a hole supply layer) adjacent to the p-type layer  20 . 
     In a more particular illustrative embodiment, the emitting device  10  is a group III-V materials based device, in which some or all of the various layers are formed of elements selected from the group III-V materials system. In a still more particular illustrative embodiment, the various layers of the emitting device  10  are formed of group III nitride based materials. Group III nitride materials comprise one or more group III elements (e.g., boron (B), aluminum (Al), gallium (Ga), and indium (In)) and nitrogen (N), such that B W Al X Ga Y In Z N, where 0≦W, X, Y, Z≦1, and W+X+Y+Z=1. Illustrative group III nitride materials include binary, ternary and quaternary alloys such as, AlN, GaN, InN, BN, AlGaN, AlInN, AIBN, AlGaInN, AlGaBN, AlInBN, and AlGaInBN with any molar fraction of group III elements. 
     An illustrative embodiment of a group III nitride based emitting device  10  includes an active region  18  (e.g., a series of alternating quantum wells and barriers) composed of In y Al x Ga 1-x-y N, Ga z In y Al x B 1-x-y-z N, an Al x Ga 1-x N semiconductor alloy, or the like. Similarly, both the n-type cladding layer  16  and the p-type layer  20  can be composed of an In y Al x Ga 1-x-y N alloy, a Ga z In y Al x B 1-x-y-z N alloy, or the like. The molar fractions given by x, y, and z can vary between the various layers  16 ,  18 , and  20 . The substrate  12  can be sapphire, silicon carbide (SiC), silicon (Si), GaN, AlGaN, AlON, LiGaO 2 , or another suitable material, and the buffer layer  14  can be composed of AlN, an AlGaN/AlN superlattice, and/or the like. 
     As shown with respect to the emitting device  10 , a p-type metal  24  can be attached to the p-type cladding layer  22  and a p-type contact  26  can be attached to the p-type metal  24 . Similarly, an n-type metal  28  can be attached to the n-type cladding layer  16  and an n-type contact  30  can be attached to the n-type metal  28 . The p-type metal  24  and the n-type metal  28  can form ohmic contacts to the corresponding layers  22 ,  16 , respectively. In an embodiment, the p-type metal  24  and the n-type metal  28  each comprise several conductive and reflective metal layers, while the n-type contact  30  and the p-type contact  26  each comprise highly conductive metal. In an embodiment, the p-type cladding layer  22  and/or the p-type contact  26  can be transparent (e.g., semi-transparent or transparent) to the electromagnetic radiation generated by the active region  18 . For example, the p-type cladding layer  22  and/or the p-type contact  26  can comprise a short period superlattice lattice structure, such as a transparent magnesium (Mg)-doped AlGaN/AlGaN short period superlattice structure (SPSL). Furthermore, the p-type contact  26  and/or the n-type contact  30  can be reflective of the electromagnetic radiation generated by the active region  18 . In another embodiment, the n-type cladding layer  16  and/or the n-type contact  30  can be formed of a short period superlattice, such as an AlGaN SPSL, which is transparent to the electromagnetic radiation generated by the active region  18 . 
     As used herein, a layer is transparent to radiation of a particular wavelength when the layer allows a significant amount of the radiation radiated at a normal incidence to an interface of the layer to pass there through. For example, a layer can be configured to be transparent to a range of radiation wavelengths corresponding to a peak emission wavelength for the light (such as ultraviolet light or deep ultraviolet light) emitted by the active region  18  (e.g., peak emission wavelength+/−five nanometers). As used herein, a layer is transparent to radiation if it allows more than approximately five percent of the radiation to pass there through. In a more particular embodiment, a transparent layer is configured to allow more than approximately ten percent of the radiation to pass there through. Similarly, a layer is reflective when the layer reflects at least a portion of the relevant electromagnetic radiation (e.g., light having wavelengths close to the peak emission of the active region). In an embodiment, a reflective layer is configured to reflect at least approximately five percent of the radiation. In a more particular embodiment, a reflective layer has a reflectivity of at least thirty percent for radiation of the particular wavelength radiated normally to the surface of the layer. In a more particular embodiment, a highly reflective layer has a reflectivity of at least seventy percent for radiation of the particular wavelength radiated normally to the surface of the layer. 
     As further shown with respect to the emitting device  10 , the device  10  can be mounted to a submount  36  via the contacts  26 ,  30 . In this case, the substrate  12  is located on the top of the emitting device  10 . To this extent, the p-type contact  26  and the n-type contact  30  can both be attached to a submount  36  via contact pads  32 ,  34 , respectively. The submount  36  can be formed of aluminum nitride (AlN), silicon carbide (SiC), and/or the like. 
     Any of the various layers of the emitting device  10  can comprise a substantially uniform composition or a graded composition. For example, a layer can comprise a graded composition at a heterointerface with another layer. In an embodiment, the p-type layer  20  comprises a p-type blocking layer having a graded composition. The graded composition(s) can be included to, for example, reduce stress, improve carrier injection, and/or the like. Similarly, a layer can comprise a superlattice including a plurality of periods, which can be configured to reduce stress, and/or the like. In this case, the composition and/or width of each period can vary periodically or aperiodically from period to period. 
     It is understood that the layer configuration of the emitting device  10  described herein is only illustrative. To this extent, an emitting device/heterostructure can include an alternative layer configuration, one or more additional layers, and/or the like. As a result, while the various layers are shown immediately adjacent to one another (e.g., contacting one another), it is understood that one or more intermediate layers can be present in an emitting device/heterostructure. For example, an illustrative emitting device/heterostructure can include an undoped layer between the active region  18  and one or both of the p-type cladding layer  22  and the electron supply layer  16 . 
     Furthermore, an emitting device/heterostructure can include a Distributive Bragg Reflector (DBR) structure, which can be configured to reflect light of particular wavelength(s), such as those emitted by the active region  18 , thereby enhancing the output power of the device/heterostructure. For example, the DBR structure can be located between the p-type cladding layer  22  and the active region  18 . Similarly, a device/heterostructure can include a p-type layer located between the p-type cladding layer  22  and the active region  18 . The DBR structure and/or the p-type layer can comprise any composition based on a desired wavelength of the light generated by the device/heterostructure. In one embodiment, the DBR structure comprises a Mg, Mn, Be, or Mg+Si-doped p-type composition. The p-type layer can comprise a p-type AlGaN, AlInGaN, and/or the like. It is understood that a device/heterostructure can include both the DBR structure and the p-type layer (which can be located between the DBR structure and the p-type cladding layer  22 ) or can include only one of the DBR structure or the p-type layer. In an embodiment, the p-type layer can be included in the device/heterostructure in place of an electron blocking layer. In another embodiment, the p-type layer can be included between the p-type cladding layer  22  and the electron blocking layer. 
     Regardless, as described herein, one or more of the semiconductor layers of the device  10  can comprise nano-scale and/or micron-scale localized compositional and/or doping inhomogeneous regions along the lateral dimensions of the device die. Inclusion of the inhomogeneous regions in one or more of the semiconductor layers of the device  10  can result in an improvement in the efficiency of the device  10 . The inhomogeneous regions can be included in any layer of the semiconductor device  10 . To this extent, the inhomogeneous regions can be included in a superlattice region, a nucleation region, a buffer layer, a cladding layer, an active region, and/or the like, of the device  10 . In an embodiment, the inhomogeneities are incorporated into one or more injection layers, such as the n-type cladding layer  16 , the p-type layer  20 , the p-type cladding layer  22 , the n-type contact  30 , the p-type contact  26 , and/or the like. 
     Additional aspects are shown and described in conjunction with a quantum well, such as a quantum well included in the active region  18  of the device  10 , including inhomogeneous regions as an illustrative embodiment. Turning to  FIGS. 3A and 3B , a hybrid structure/band diagram corresponding to a portion of the active region  18  (e.g., a multiple quantum well structure including a plurality of quantum wells alternating with a plurality of barriers) according to an embodiment is shown. In  FIG. 3A , the multiple quantum well structure of the active region  18  is shown including only one quantum well  38  between two barriers  40 . However, it is understood that a single quantum well  38  is shown for clarity, and the quantum well structure of the active region  18  can include any number of quantum wells alternating with any number of barriers. 
       FIG. 3B  shows a plane  38 A within the quantum well  38  according to an embodiment. The plane  38 A includes a plurality of compositional inhomogeneous regions  42  and a plurality of threading dislocations  44 . As shown, the compositional inhomogeneous regions  42  can be in the plane  38 A of the quantum well  38 . In an embodiment, the in-plane dimensions of the inhomogeneous regions  42  are significantly larger than a thickness of the quantum well  38  (e.g., approximately a few nanometers). However, it is understood that the compositional inhomogeneous regions  42  also can be across the thickness of a quantum well  38  ( FIG. 5 ) and/or at an interface between a quantum well  38  and a barrier  40  ( FIGS. 6A and 6B ). The plurality of compositional inhomogeneous regions  42  can form localized variations in the band gap of the quantum well  38 . 
       FIG. 4B  shows an illustrative band gap map as a function of the y-axis for a location (x, z) on a plane  38 A of a quantum well shown in  FIG. 4A . As shown in  FIG. 4A , the quantum well plane  38 A includes a plurality of compositional inhomogeneous regions  42  and a plurality of threading dislocations  44 . As seen in  FIG. 4B , the band gap for each of the plurality of compositional inhomogeneous regions  42  is less than the band gap of the remaining portion of the quantum well. Furthermore, the plurality of compositional inhomogeneous regions  42  are located between the threading dislocations  44 . 
     Inclusion of the plurality of compositional inhomogeneous regions  42  in a quantum well can enhance radiative recombination, which can improve IQE, delay non-radiative recombination, and/or the like. The plurality of compositional inhomogeneous regions  42  can be located away from the threading dislocations  44  and their corresponding concentration areas, so that a diffusion length of an electron before capture at a localized compositional inhomogeneous region  42  is smaller than a characteristic distance to the threading dislocations. The delay in non-radiative recombination can be achieved by preventing the electrons from reaching the cores of the threading dislocations  44 . 
     In an embodiment, an average band gap for the plurality of compositional inhomogeneous regions  42  is less than an average band gap of the remaining portion of the quantum well  38  by at least half of a thermal voltage multiplied by a carrier charge. In a further embodiment, a difference between an average band gap for the plurality of compositional inhomogeneous regions  42  and an average band gap for a remaining portion of the semiconductor layer (e.g., quantum well  38 ) is at least thermal energy, e.g., at least 26 meV at room temperature. 
     In an embodiment, e.g., to increase the IQE of a device, the characteristic size (e.g., the square root of the average lateral area) of the plurality of compositional inhomogeneous regions  42  is smaller than an inverse of a threading dislocation density for the quantum well  38 . The characteristic size of the compositional inhomogeneous regions  42  can be calculated, for example, as 1/N dis   0.5 , where N dis  is the dislocation density per unit area. In an embodiment, the dislocation density per unit area is on the order of 10 8  cm −2  for samples grown using a metalorganic chemical vapor deposition solution. Additionally, a characteristic distance between threading dislocations  44  can be greater than a smallest size for a compositional inhomogeneous region  42 . Furthermore, a lateral area for the plurality of compositional inhomogeneous regions  42  can be smaller than a square of the characteristic distance between threading dislocations  44 . A characteristic distance, d, between dislocations, which can be an upper bound of the characteristic size of the plurality of compositional inhomogeneous regions  42 , can be characterized by: 
                   d   =     1       N     -   1               (   1   )               
where N is the dislocation density. For example, if N=10 9  dislocations per cm 2 , the characteristic distance, d, between the dislocations is
 
             d   =         1       N     -   1       ≈     3   *     10     -   5       ⁢           ⁢   cm       =     300   ⁢           ⁢     nm   .               
Therefore, the lateral area of the compositional inhomogeneous regions  42  can be configured to be smaller than 90,000 nm 2 . The lateral area of the regions  42  can be adjusted using any solution, e.g., by adjusting one or more conditions during epitaxial growth of the semiconductor (e.g., the quantum well  38 ).
 
     The average distance between compositional inhomogeneous regions  42  can be on the order of or less than an ambipolar diffusion length L. The ambipolar diffusion length L is characterized by:
 
 L =( D   a τ) 0.5   (2)
 
wherein D a  is the am bipolar diffusion coefficient and τ is the overall recombination time. For example, in an embodiment, D a  for AlGaN is approximately 10 cm 2 /s, so the diffusion length L can be on the order of 1 micron for τ at approximately one nanosecond.
 
     The internal quantum efficiency (IQE) of a device also can depend on the density, average lateral size, as well as the depth of the compositional inhomogeneous regions. Furthermore, the IQE can depend on the Auger recombination at high injection levels. For example, consider compositional inhomogeneous regions of a small size having a certain density throughout the semiconductor layer, which is small enough for the compositional inhomogeneous regions to have substantially no overlap. In this case, an expected concentration of carriers at such localization centers will be higher than the average concentration, thereby leading to smaller radiation recombination times at such regions. This may increase the IQE under conditions so that a considerable fraction of the carriers are captured by the compositional inhomogeneous regions for radiative recombination. In an embodiment, a characteristic size of the compositional inhomogeneous regions is smaller than 1/N reg   0.5 , where N reg  is the average density of the compositional inhomogeneous regions per unit area. 
     The area and the density of the compositional inhomogeneous regions  42  also can affect a reliability and/or performance of a device. For example, radiation can lead to radiation-enhanced dislocation glide (REDG). REDG is characterized by a reduction of activation energy for glide velocity. The REDG shares features common with similar effects in point defects known as the recombination-enhanced defect reaction (REDR). To improve reliability of a device, the radiation and recombination process can be configured to occur away from threading dislocation cores in order to reduce radiation-enhanced dislocation glide. For example, for a case of compositional inhomogeneous regions  42  having a small characteristic lateral area (e.g., as defined herein) and low density (e.g., much smaller than the dislocation density), radiation emitted in those regions may be spatially isolated from the threading dislocation cores  44  as long as the compositional inhomogeneous regions  42  are located between the threading dislocation core regions. This can result in improved reliability of the device. 
     Turning now to  FIGS. 6A and 6B , in an embodiment, the plurality of compositional inhomogeneous regions  42  can be located along a plane located proximate to (e.g., at or within a few atomic layers of) an interface  46  between a quantum well  38  and a barrier  40 . In this embodiment, the compositional inhomogeneous regions  42  can be configured to capture carriers for radiative recombination. To this extent, the regions  42  can have a depth of at least thermal energy. In a more specific embodiment, the compositional inhomogeneous regions  42  have an energy depth of at least one optical phonon energy. 
     In an embodiment, the semiconductor layers of the device  10  ( FIG. 2 ) can comprise an Al x B y In z Ga 1-x-y-z N alloy with 0≦x≦1, 0≦y≦1, 0≦z≦1, 0≦1-x-y-z≦1. Semiconductor heterostructures formed of Al x B y In z Ga 1-x-y-z N alloys contain polarization fields due to spontaneous polarization and piezo-polarization. This results in the tilting and bending of the band diagram, as shown, for example, in  FIG. 7A . In a particular embodiment, the active region  18  can include a heterostructure (e.g., a multiple quantum well structure) of barriers and quantum wells. An energy on one side of a conductive band for the quantum wells can be higher than the energy on the other side (e.g., a tilted conductive band). Similarly, the valence band is called a “tilted” valence band. This tilting of the conductive band results in electron localization in the region with lower energy, i.e., the low side of the band diagram. In a more specific embodiment, the compositional inhomogeneous regions  42  can be located along a plane  48  located proximate to the low side of the conductive band of a quantum well  38 . In another embodiment, compositional inhomogeneous regions  42  with greater depth can be located along a plane proximate to the high side of the conductive band of the quantum well  38 , e.g., to promote tunneling of the electron wave function from the low side to the high side. This can result in a better spread of the electron wave function, improved overlap with holes, and/or the like. 
     In an embodiment shown in  FIG. 8A , a semiconductor layer can include both large and small scale compositional inhomogeneous regions (which can be achieved, for example, by varying conditions of the epitaxial growth). The large scale compositional inhomogeneous regions  42 A can have large lateral areas of inhomogeneous regions. For example, the lateral area for the large scale compositional inhomogeneous regions  42 A can be configured to be larger than the square of the characteristic distance between the threading dislocations  44  (which can be achieved, for example, by varying conditions of the epitaxial growth). An energy depth of the large scale compositional inhomogeneous regions  42 A can be on the order of one thermal energy or more. The large scale compositional inhomogeneous regions  42 A can allow for an efficient capture of the carriers, relative localization of the carriers within the large energy valleys (e.g.,  42 A in the band gap map of  FIG. 8B ), and/or the like. Subsequent localization of carriers can be due to capture at the small scale compositional inhomogeneous regions  42 B. The small scale compositional inhomogeneous regions  42 B also can have a depth on the order of one thermal energy or more. The small scale compositional inhomogeneous regions  42 B have a lateral area that is smaller than the square of the characteristic distance between the threading dislocations  44 . The small scale compositional inhomogeneous regions  42 B allow for capturing the carriers before the carriers are captured by the threading dislocations  44 . 
     In another embodiment shown in  FIGS. 9A and 9B , a distribution of the compositional inhomogeneous regions  42  can be graded. For example, a depth of the energy level across a quantum well  38  can increase or decrease from an area proximate to a first barrier  40  to an area proximate to a second barrier (not shown). In  FIG. 9A , the distribution of the compositional inhomogeneous regions  42  is graded such that the energy depth decreases towards the first barrier  40 . In  FIG. 9B , the distribution of the compositional inhomogeneous regions  42  is graded such that the energy depth increases toward the first barrier  40 . 
     For quantum wells with tilted conduction bands, such as the quantum wells  38  shown in  FIG. 7A , distributed grading of the compositional inhomogeneous regions  42  can promote tunneling of carriers to the regions having higher band gaps. For example, in  FIG. 10A , a quantum well  38  is shown including a first localization region  50  and a second localization region  52 . The first localization region  50  can have a deeper energy band gap level than the second localization region  52 , e.g., for tunneling to occur between the regions  50 ,  52 . This tunneling effect can improve an overlap of the electron/hole wave function and promote higher recombination rates. The black curved line included at the bottom of the quantum well  38  in  FIG. 10B  corresponds to an electron wave function, which has a concentration in the corresponding portion of the quantum well  38 . 
     Turning now to  FIG. 11 , a graded distribution of compositional inhomogeneous regions can be combined or enhanced with compositional grading of a quantum well  38 . For example, the quantum well  38  can have graded composition that results in band bending at the first and/or second side of the quantum well  38 . When the first side of the quantum well  38  is a high side and contains deeper compositional inhomogeneous regions than the second side, the tunneling of carriers can be promoted by further reducing the energy of the conducting band at the first side through compositional grading. Illustrative distributions of electron (top) and hole (bottom) wave functions are shown by the curved lines. 
     In an embodiment, multiple semiconductor layers in a device  10  ( FIG. 2 ) can include compositional inhomogeneous regions. For example, turning to  FIGS. 12A-12C , layers that include compositional inhomogeneous regions can, in addition to improving carrier localization for radiative recombination, affect the stress and strain in the device  10 . Controlling the stress and strain within the device  10  can control the propagation of threading dislocations throughout the layers of the device  10 . For example, with semiconductor layers including group III materials, if the compositional difference between the layers is at least five percent in at least one molar fraction (e.g., x, y, z), the layers with the compositional inhomogeneous regions can enhance or reduce compressive and tensile stresses in the semiconductor layers. 
     Controlling the stress and strain within the device  10  also can affect the three dimensional growth of layers epitaxially grown above the layers with compositional inhomogeneous regions. For example, compressive strain promotes three dimensional island formation, while tensile strain promotes layer-by-layer two dimensional crystal formation. The type and magnitude of the strain can be used to control the compositional inhomogeneous regions. For example, adjacent layers with compositional inhomogeneous regions that differ by at least a few percent in average band gap fluctuation amplitude, density, lateral size, and/or the like, can be grown.  FIG. 12C  shows a layer  113 C, which includes compositional inhomogeneous regions that differ from the compositional inhomogeneous regions in layer  114 C. 
     Although the embodiments shown in the figures include compositional inhomogeneous regions in the quantum well, it is understood that the compositional inhomogeneous regions can be included in any layer. For example, the barrier  40  ( FIG. 3A ) can include a plurality of compositional inhomogeneous regions, e.g., for stress/strain control. The plurality of compositional inhomogeneous regions in the barrier  40  can control the stress/strain without altering the average band gap characteristic of the barrier  40 . For example, in  FIG. 12B , the layer  114 B includes a plurality of compositional inhomogeneous regions and is adjacent to a layer  113 B grown at a high V/III ratio. The layer  112 B includes a plurality of compositional inhomogeneous regions and is adjacent to the layer  111 B that is grown at a low V/III ratio. In a more particular embodiment,  FIG. 12B  can be a multi-layer barrier comprising a AlGaN/AlGaN superlattice to control the compressive strain in the quantum wells and also affect the compositional inhomogeneous regions in the quantum wells, which can be misplaced relative to each other in different superlattice layers. 
     In another embodiment, a superlattice of semiconductor layers can include layers with relatively uniform composition alternating with layers with compositional inhomogeneous regions. In  FIG. 12A , layers  111 A and  113 A have relatively uniform composition, while layers  112 A and  114 A include compositional inhomogeneous regions. Relatively uniform composition includes compositional variation of less than three thermal energies across the layer. In another embodiment, a layer in the superlattice of semiconductor layers can vary from an adjacent layer by more than five percent in band gap amplitude, density, and/or the like for the compositional inhomogeneous regions. Regardless, at least two layers in the superlattice of semiconductor layers can be substantially equal (e.g., within a few (e.g., three) percent) in at least one of: a distribution grading, a band gap magnitude, a density, and/or the like of the plurality of compositional inhomogeneous regions. 
     In another embodiment, variations in band gap can be achieved by localized doping. Turning to  FIG. 13A , localized p-doping at a region  56 , which can be located anywhere within the semiconductor layer (e.g., a quantum well), induces localized energy maxima for electrons  58  and localized energy minimum for holes  60 . In an embodiment, the localized p-doping inhomogeneities include a characteristic size less than the electron Bohr radius. With the p-doping inhomogeneities, the electrons  58  can tunnel through the energy maxima and recombine with holes  60  localized at the hole energy minima. In a more specific embodiment, the p-doping can be located within the valleys of the compositional inhomogeneous regions. For example, in  FIG. 13B , the large scale compositional inhomogeneous region  42 A can contain the localized doping inhomogeneities  56  within the valley of the small scale compositional inhomogeneous region  42 B. The valley of the small scale compositional inhomogeneous region  42 B can be defined as the region with the conduction energy value that is less than the average conduction band energy level. The p-doping inhomogeneities  56  can promote further carrier localization and carrier recombination. The localized p-doping can be an impurity, such as silicon, magnesium, beryllium, germanium, carbon, and/or the like. 
     Control over energy depth, distribution grading, lateral area size, and/or the like, of the compositional inhomogeneous regions can be achieved by controlling the epitaxial growth parameters during metal organic chemical vapor deposition (MOCVD) growth. Alloy fluctuations can be induced by fundamental difference in the mobility of the particular metal (Al, Ga, In, etc.) adatoms on the surface at particular growth conditions. Therefore, compositional inhomogeneous regions can be regulated by controlling parameters which influence the mobility of the adatoms, such as growth temperature, V/III ratio, growth rate, and layer-strain. Growth temperature in the range of 600-1300° C., V/III ratio in the range of 10-50000, growth rate in the range of 1-200 nm/min, and/or the like, can be used to create compositional inhomogeneous regions. For example, in a specific embodiment, compositional inhomogeneous regions in Al 0.5 Ga 0.5 N can be enhanced by reducing growth temperature (e.g., less than 1200° C.) and increasing V/III ratio (e.g., greater than one hundred) at faster growth rates (e.g., greater than five nanometers/minute). Regardless, the semiconductor layer including the compositional inhomogeneous regions can be epitaxially grown partially or completely pseudomorphically (e.g., with the same lattice constant as the substrate) over another layer or substrate. Partially pseudomorphic is defined as epitaxial growth with less than 95% degree of relaxation. 
     Turning now to  FIGS. 14A-14C , illustrative topographic images corresponding to sample AlGaN layers with increasing Al molar fractions are shown. The surface morphology image indicates the presence of defects and inhomogeneous regions in the material. In  FIGS. 14A and 14B , the molar fraction of Al is increased from 0.3 to 0.42.  FIG. 14B  clearly illustrates that the surface of the material has more pronounced features for the higher Al molar fraction. In  FIG. 14C , the molar fraction of Al is increased to 0.5 and the defects and inhomogeneous regions are readily apparent. In a specific embodiment of the device, the active region can contain an AlN molar fraction of between approximately twenty and approximately eighty percent. 
     Analysis of compositional inhomogeneous regions in a semiconductor layer can be performed using scanning near field optical microscopy (SNOM), which provides sub-wavelength spatial resolution. Electroluminescence and photoluminescence (PL) SNOM studies of c-plane AlGaN quantum wells (QWs) have identified carrier localization and non-radiative recombination centers. Furthermore, these studies reveal potential barriers around the extended defects. Near-field maps of the PL peak intensity, and peak energy, are presented for Al 0.3 Ga 0.7 N, Al 0.42 Ga 0.58 N, and Al 0.5 Ga 0.5 N layers in  FIGS. 15A, 15C, and 15C , respectively. Comparing the intensity of emission with peak energy map illustrates that the alloys containing low-to-modest molar ratios of aluminum, such as a molar fraction of 0.3 or 0.42, have domain-like areas emitting at red shifted wavelengths. As the aluminum content is increased, domain-like structures give way to smaller compositional inhomogeneous regions distributed uniformly throughout the structure. These compositional inhomogeneous regions have a red shifted emission. 
     Additionally, in  FIGS. 15A and 15B , a correlation between the intensity peak and the energy peak is shown. In particular, the red shifted regions radiate at somewhat smaller intensity than blue shifted counterparts. This is consistent with growth models, where during the initial growth stage, adjacent small islands, from which the growth starts, coalesce into larger grains. As the islands enlarge, Ga adatoms, having a larger lateral mobility than Al adatoms, reach the island boundaries more rapidly. Therefore, it is expected that the Ga concentration in the coalescence be higher than in the center of the islands. At the same time, the coalescent boundaries contain large numbers of defects. It is reasonable to expect lower emission intensity in these areas. 
     Turning now to  FIGS. 16A-16C , illustrative maps corresponding to sample AlGaN layers with increasing Al molar fractions are shown. The band gap illustrates how increasing the Al molar fraction increases the amplitude of the band gap for the small scale compositional inhomogeneous regions to be similar to the amplitude of the large scale compositional inhomogeneous regions. 
       FIG. 17  shows a portion of a layer according to an embodiment of the invention. The layer can include a plurality of domains  60  and the compositional inhomogeneous regions can be grown to be away from the domain boundaries  62 , where a large concentration of threading dislocations and defects are located. The semiconductor layer can be grown using Migration Enhanced Metalorganic Chemical Vapor Deposition (MEMOCVD), which has a higher growth rate than Molecular Beam Epitaxy (MBE). The exact growth rate of the MEMOCVD can be selected to control the diffusion length, di, of the Ga atoms, such that the diffusion length is smaller than the average length, L, between threading dislocations. 
     The average length, L, between threading dislocation cores is determined by the density of the threading dislocations in the semiconductor layer. In an embodiment, a method of growth takes advantage of an approach disclosed in U.S. Patent Application Publication No. 2014/0110754, which is hereby incorporated by reference. The methods of growth discloses the art of epitaxial growth of semiconductor layers with low dislocation density due to growth of alternating compressive and tensile layers.  FIGS. 18A and 18B  show possible embodiments of the method, where in  FIG. 18A , the buffer layer is grown on a substrate with compressive layer following the buffer layer alternating with tensile layer for several periods of epitaxial growth.  FIG. 18B  shows another embodiment of the method in which the tensile layer is grown on the buffer layer with subsequent compressive layer grown above the tensile layer. It is understood that the buffer layer is optional and may not be needed for some embodiments. 
     The advantages of this method are shown in  FIGS. 19A and 19B , which illustrate the bright field optical microscope image of a layer grown without any strain modulation ( FIG. 19A ) and a layer with strain modulation ( FIG. 19B ). As clearly seen from the figures, the number of cracks (e.g., threading dislocations) is significantly reduced using the present methods. Other methods of analyzing dislocation density include analysis of a rocking curve full width at half maximum (FWHM) shown in  FIG. 20 . Reduction in AlN ( 102 ) XRD rocking curve FWHM, shown in  FIG. 20 , as a function of layer thickness indicates reduced edge dislocations density. 
     U.S. Patent Application Publication No. 2014/0110754 also provides that dislocation reduction may be obtained by reducing build up stress in semiconductor layers by patterning the substrate, the buffer layer, and/or one or more of the semiconductor layers.  FIGS. 21A and 21B  show that patterning of a substrate and/or intermediate semiconductor layers can be employed to produce compressed and tensile layers having a common boundary not only in vertical direction of growth, but also, in lateral layer direction. Possible patterns comprise stripes, rectangular windows  66 , and/or the like. Also, the relative position of patterning elements between sets of layers may be varied. For example, in one embodiment, the position of patterning elements on one layer may form a checkerboard-like formation with the patterning elements on another layer ( FIG. 21A ). Alternatively, in an embodiment, the position of patterning element on one layer may be the same lateral location as the patterning elements on another layer ( FIG. 21B ). 
     In an embodiment, a contact can be formed for a semiconductor layer including a plurality of compositional inhomogeneous regions. For example,  FIG. 22  shows a contact  80  for a semiconductor layer  15  including a plurality of compositional inhomogeneous regions (not shown) according to an embodiment. The semiconductor layer  15  is located between the substrate  12  and a buffer layer  14  and can include any embodiment of compositional inhomogeneous regions discussed herein. A plurality of metallic protrusions  82  extend from the contact  80  through the buffer layer  14  in order to contact the semiconductor layer  15 . 
     The plurality of metallic protrusions  82  can be formed using any solution. For example, the plurality of metallic protrusions  82  can be formed by etching the buffer layer  14  and at least a portion of the semiconductor layer  15  prior to the deposition of the metallic protrusions  82  and the contact  80 . In another example, selective overgrowth can be used when growing the semiconductor layer  15  and the buffer layer  14  prior to the deposition of the metallic protrusions  82  and the contact  80 . The metallic protrusions  82  and the contact  80  can be deposited through evaporation or a sputtering technique followed by a subsequent annealing. Alternatively, instead of the etching or selective overgrowth technique, the buffer layer  14  and the semiconductor layer  15  can be grown to contain a plurality of voids or pores for the plurality of metallic protrusions  82 . A porous semiconductor layer including a plurality of voids can be formed by utilizing 3-dimensional (3D) growth techniques for semiconductor layers. The buffer layer  14  can comprise a high adhesion to the metallic contact  80  and the semiconductor layer  15  can be a highly conductive layer. In an embodiment, the buffer layer  14  can have a higher aluminum nitride molar fraction than the average aluminum nitride molar fraction of the semiconductor layer  15 . In an embodiment, the semiconductor layer  15  can be a thin layer with a thickness of approximately 10 nanometers (nm) to approximately 300 nm. In an embodiment, the thickness of the semiconductor layer  15  is comparable to the length of the plurality of metallic protrusions  82 . The buffer layer  14  can be partially transparent to radiation (e.g., at least 30% of the radiation is transmitted through the buffer layer  14 ) when the radiation is normal to the surface of the layer  14 . 
     Turning now to  FIGS. 23A and 23B , a contact for a semiconductor layer including a plurality of compositional inhomogeneous regions according to embodiments is shown. In  FIG. 23A , the semiconductor layer  15  can include a set of alternating sublayers (e.g., a first sublayer  17 A and a second sub layer  17 B). Although only four sublayers are shown, it is understood that any number of sublayers can be included. Further, although only two types of sublayers are shown, it is understood that any number of types of sublayers can be included. In an embodiment, an average bandgap for the first sublayer  17 A is different than the average bandgap of the second sublayer  17 B. For example, the first sublayers  17 A can comprise quantum well structures including a plurality of compositional inhomogeneous regions  42  ( FIG. 3A ), while the second sublayers  17 B can comprise barrier structures (having a wider bandgap than quantum wells) including a plurality of compositional inhomogeneous regions  42 . In another embodiment, the variance of the bandgap for the first sublayer  17 A can be different than the variance of the bandgap for the second sublayer  17 B. The variance refers to the degree of variation of the bandgap within a layer. For example, a bandgap variation of 100 meV refers to a layer with fluctuations in the bandgap on the order of 100 meV. 
     In an embodiment, the inhomogeneous regions in the second sublayer  17 B can form a sufficiently dense structure to allow percolation. For example, the structure of the second sublayer  17 B (e.g., barrier) can comprise an Al x Ga 1-x N layer with a varying molar fraction x. The variation in the molar fraction x allows for variation in the bandgap energies within the second sublayer  17 B. That is, some regions within the second sublayer  17 B can have higher bandgap energies, while other regions can have lower bandgap energies. The regions in the second sublayer  17 B with the lower bandgap energies have a sufficient density so that there is an overlap of such regions or close proximity of such regions, which leads to an interconnected (or percolated) low bandgap structure. Such a structure can promote conductivity of the barrier layer  14 . It is understood that the embodiment shown in  FIG. 22  can also support a percolated low bandgap structure in the semiconductor layer  15 . It is also understood that the first sublayer  17 A can contain structures that allow percolation. 
     A 2-dimensional (2D) gas is formed at the interface of a quantum well/barrier (e.g., the interface between the first sublayer  17 A and the second sublayer  17 B). The formation of a 2D gas is particularly important for semiconductors which have a large degree of polarization, such as group III nitrides (e.g., AlGaN, and/or the like). The regions forming the 2D gas are contacted by the plurality of metallic protrusions  82 . Due to the inhomogeneous regions at the interface of the quantum well and barrier (e.g., the first sublayer  17 A and the second sublayer  17 B), the 2D gas can have a diffusive profile and can partially penetrate through the second sublayer  17 B (e.g., barriers) in the regions with low bandgap energies. The conductivity of the contact  80  can be improved by the plurality of metallic protrusions  82  penetrating the second sublayer  17 B (e.g., barriers). In order to have a sufficient conductivity, each of the plurality of metal protrusions  82  are located at a distance away from each other that does not exceed the current spreading length in the semiconductor layer  15 . 
     Turning to  FIG. 23B , a contact for a semiconductor layer including a plurality of inhomogeneous regions according to an embodiment is shown. In this embodiment, the semiconductor layer  15  can include a plurality of domains  84 A,  84 B that have compositional inhomogeneous regions. The plurality of domains  84 A,  84 B can form any structure, including larger domains that have several protrusions embedded into them, or smaller domains. The plurality of domains  84 A,  84 B can have a lateral dimensions ranging from 1 nanometer (nm) to several microns. A plurality of metallic protrusions  82  from a contact  80  extend into each of the domains  84 A,  84 B. In an embodiment, each domain  84 A,  84 B can include a lower aluminum nitride molar fraction as compared to the average molar fraction of aluminum within the semiconductor layer  15  and result in regions having higher conductivity. The domains  84 A,  84 B can be formed using any solution, such as, for example, by depositing a material into an etched valley in the semiconductor layer  15 . 
     A plurality of compositional inhomogeneous regions in a semiconductor layer including compositional inhomogeneous regions can increase the diffusion of a metallic contact through the semiconductor layer during the process of annealing, depending on the semiconductor&#39;s characteristics. For example, in  FIG. 24 , an illustrative contact  180  to a semiconductor layer  15  including a plurality of compositional inhomogeneous regions according to an embodiment is shown. The semiconductor layer  15  can include a graded composition with an amplitude that varies throughout the layer. In an embodiment, the annealing of the contact  180  can depend on the composition of the semiconductor layer  15 . For example, the annealing of the contact  180  can depend on the lattice quality of the semiconductor layer  15 . In an embodiment, the lattice containing a large number of dislocations and inhomogeneous regions can promote a deep penetration of the contact  180  into the semiconductor layer  15  (via metallic protrusion  182 ). This can increase the diffusion area of the metal of the contact  180  into the semiconductor layer  15 . Therefore, a semiconductor layer  15  including a graded composition allows for additional control during the process of contact annealing. For example, a layer with compositional inhomogeneous regions can be grown using three dimensional growth and allow for improved diffusion of the metallic contact  180  into the semiconductor layer  15 , which provides improved metal penetration into the semiconductor layer  15 , and as a result, improved ohmic properties of the contact  180 . Additionally, the semiconductor layer  15  can provide improved alloying (e.g., mixing) of the metallic regions within the semiconductor layer  15 . In an embodiment, the degree of mixing can be controlled by the degree of compositional inhomogeneous regions within the semiconductor layer  15 . Each metallic protrusion  182  can be characterized by a diffusion distance DA, which is generally indicative of the distance that the metallic elements associated with the metallic protrusion  182  diffuses within the semiconductor layer  15 . Each semiconductor layer has a mobility and overall quality that determines the spread or diffusion of carriers and is characterized by a carrier diffusion length D l . In an embodiment, the distance between adjacent protruding metallic protrusions  182  is selected to be comparable to a carrier diffusion length D l . Another length scale present in the design is a diffusion distance D A . The density of metallic protrusions  182  can be estimated based on these two length scales as follows: N=1/(π(D A +D l ) 2 ), where N is the number of metallic protrusions per unit area. In an embodiment, the length scale Di can be substituted by the current spreading length, which can be approximated as: D L =√{square root over (2D A (rb)/a tan(2rb/D A ))}, where b is the semiconductor layer thickness, and r=ρ ⊥ ρ ∥ , where ρ ∥  is a resistivity along the semiconductor layer direction and ρ ⊥  is a resistivity in the layer normal direction. 
     In an embodiment, etching the surfaces of a semiconductor layer can improve annealing of a contact to a semiconductor layer. Turning now to  FIGS. 25A-25C , illustrative etched surfaces of a semiconductor layer according to embodiments are shown.  FIG. 25C  shows that a buffer layer  14  and/or a semiconductor layer  15  including a plurality of compositional inhomogeneous regions can be etched. As shown in  FIG. 25A , in an embodiment, wet etching can be used. The parameters of the wet etching are selected to produce porous morphology on the scale of approximately 20 nanometers (nm). In another embodiment, as shown in  FIG. 25B , larger pores can have a characteristic scale of approximately 40 nm to approximately 60 nm. In general, wet etching is selected to produce the optimal metallic contact after annealing. In an embodiment, optimal parameters for etching are selected in order to produce optimal optical properties of the metal-semiconductor interface (e.g., the interface between the contact  80  and the semiconductor layer  15  ( FIG. 22 )) for optical scattering. To select the optimal parameters, such as composition of the bath, temperature, presence of light, duration of etching, presence of catalyst, and/or the like, for etching, the scattering and contact characteristics can be evaluated and interpolated for several etching processes. In an embodiment, wet etching is selected to produce the porous morphology that is at least on the order of the target wavelength of the light emitting or light absorbing device. 
     In an embodiment, wet etching the semiconductor layer  15  results in a porous morphology that is correlated to the length scales of the compositional inhomogeneous regions within the semiconductor layer  15 . During the wet etching process, regions with a higher aluminum molar fraction are etched more than domains with higher gallium nitride molar fractions. In an embodiment, the wet etching can be accompanied by electro-chemical etching, photo-chemical etching, or a combination. In a further embodiment, a photo-chemical etching can further control the length scales of the pores generated throughout the etching process. 
     In another embodiment, dry etching can also be used either independently of wet etching, or after the wet etching process. Dry etching can produce variations on the surface structure (of the barrier layer  14  surface and/or the semiconductor layer  15  surface) on the scale of approximately 0.5 micrometers to approximately 50 micrometers. In an embodiment, masking the area prior to etching can result in the formation of user determined patterns (e.g., a periodic structure). For example, such a structure can comprise a photonic crystal. 
     In an embodiment, non-uniform etching can be applied to a semiconductor layer including compositional inhomogeneous regions. Turning now to  FIGS. 26A and 26B , illustrative etched surfaces of a semiconductor layer with non-uniform etching according to embodiments is shown.  FIG. 26A  shows that the etching can be different at the sides (e.g., along the width, along the perimeter, and/or the like) of the semiconductor layer  15  and the middle of the semiconductor layer  15 . For example, a size and a depth of an etching domain  86 A located at the side of the semiconductor layer  15  can be different than a size and a depth of an etching domain  86 B located in the middle of the semiconductor layer  15 . In an embodiment, as shown in  FIG. 26B , the etching can vary both in an x direction and a y direction. A dark region  88 A corresponds to an etching that is different than an etching in a lighter region  88 B. The difference in the etching process in each region/domain can include masking, several etching steps, electrochemical and photochemical etching, and/or the like. Additionally, the difference in the etching process can include initially preparing the semiconductor layer  15  with a variation in the plurality of compositional inhomogeneous regions. For example, the variation in the plurality compositional inhomogeneous regions can be formed by patterning and masking or can be a byproduct of the Metalorganic Chemical Vapor Deposition (MOCVD) growth process. Due to the presence of compositional inhomogeneous regions, the areas having higher aluminum nitride content are etched at a higher rate that areas having a higher gallium nitride content. 
     In one embodiment, the invention provides a method of designing and/or fabricating a circuit that includes one or more of the devices designed and fabricated as described herein (e.g., including one or more devices fabricated using a semiconductor structure described herein). To this extent,  FIG. 27  shows an illustrative flow diagram for fabricating a circuit  1026  according to an embodiment. Initially, a user can utilize a device design system  1010  to generate a device design  1012  for a semiconductor device as described herein. The device design  1012  can comprise program code, which can be used by a device fabrication system  1014  to generate a set of physical devices  1016  according to the features defined by the device design  1012 . Similarly, the device design  1012  can be provided to a circuit design system  1020  (e.g., as an available component for use in circuits), which a user can utilize to generate a circuit design  1022  (e.g., by connecting one or more inputs and outputs to various devices included in a circuit). The circuit design  1022  can comprise program code that includes a device designed as described herein. In any event, the circuit design  1022  and/or one or more physical devices  1016  can be provided to a circuit fabrication system  1024 , which can generate a physical circuit  1026  according to the circuit design  1022 . The physical circuit  1026  can include one or more devices  1016  designed as described herein. 
     In another embodiment, the invention provides a device design system  1010  for designing and/or a device fabrication system  1014  for fabricating a semiconductor device  1016  as described herein. In this case, the system  1010 ,  1014  can comprise a general purpose computing device, which is programmed to implement a method of designing and/or fabricating the semiconductor device  1016  as described herein. Similarly, an embodiment of the invention provides a circuit design system  1020  for designing and/or a circuit fabrication system  1024  for fabricating a circuit  1026  that includes at least one device  1016  designed and/or fabricated as described herein. In this case, the system  1020 ,  1024  can comprise a general purpose computing device, which is programmed to implement a method of designing and/or fabricating the circuit  1026  including at least one semiconductor device  1016  as described herein. 
     In still another embodiment, the invention provides a computer program fixed in at least one computer-readable medium, which when executed, enables a computer system to implement a method of designing and/or fabricating a semiconductor device as described herein. For example, the computer program can enable the device design system  1010  to generate the device design  1012  as described herein. To this extent, the computer-readable medium includes program code, which implements some or all of a process described herein when executed by the computer system. It is understood that the term “computer-readable medium” comprises one or more of any type of tangible medium of expression, now known or later developed, from which a stored copy of the program code can be perceived, reproduced, or otherwise communicated by a computing device. 
     In another embodiment, the invention provides a method of providing a copy of program code, which implements some or all of a process described herein when executed by a computer system. In this case, a computer system can process a copy of the program code to generate and transmit, for reception at a second, distinct location, a set of data signals that has one or more of its characteristics set and/or changed in such a manner as to encode a copy of the program code in the set of data signals. Similarly, an embodiment of the invention provides a method of acquiring a copy of program code that implements some or all of a process described herein, which includes a computer system receiving the set of data signals described herein, and translating the set of data signals into a copy of the computer program fixed in at least one computer-readable medium. In either case, the set of data signals can be transmitted/received using any type of communications link. 
     In still another embodiment, the invention provides a method of generating a device design system  1010  for designing and/or a device fabrication system  1014  for fabricating a semiconductor device as described herein. In this case, a computer system can be obtained (e.g., created, maintained, made available, etc.) and one or more components for performing a process described herein can be obtained (e.g., created, purchased, used, modified, etc.) and deployed to the computer system. To this extent, the deployment can comprise one or more of: (1) installing program code on a computing device; (2) adding one or more computing and/or I/O devices to the computer system; (3) incorporating and/or modifying the computer system to enable it to perform a process described herein; and/or the like. 
     The foregoing description of various aspects of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and obviously, many modifications and variations are possible. Such modifications and variations that may be apparent to an individual in the art are included within the scope of the invention as defined by the accompanying claims.