Patent Publication Number: US-7714518-B2

Title: Ballast for cold cathode fluorescent lamp

Description:
BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention generally relates to a ballast, and more particularly relates to a ballast for a cold cathode fluorescent lamp (CCFL). 
   2. Description of Related Art 
   Liquid crystal displays (LCDs) are used in a variety of environments ranging from televisions to computers. Cold cathode fluorescent lamps (CCFL) are common light sources used in the LCDs, because of their high brightness, low power consumption and low heat-generation. 
   Ballasts are used for controlling the CCFL during startup and operation. Typically, a ballast includes an oscillator, a drive circuit, a half-bridge inverter, and a resonant LC circuit. The oscillator is used for generating a series of pulses, and applying the pulses to the drive circuit. The drive circuit is configured for outputting two drive signals to the half-bridge inverter on receiving the pulses. The two drive signals are applied to two field effect transistors (FET) in the half-bridge inverter, for driving the two FETs, to be turned on alternatively. The half-bridge inverter outputs a square wave accordingly. The square wave is applied to the resonant LC circuit, thus the resonant LC circuit sends a high-level signal, for driving the CCFL to start to work. 
   The output of the half-bridge inverter directly depends on a non-overlapping time of the two drive signals, further affecting the startup of the CCFL. However, as the drive circuit outputs the drive signals without any feedback, it is difficult to adjust the non-overlapping time of the two drive signals, thus the non-overlapping time of the two drive signals may not be consistent with each other. Furthermore, as there are a lot of external and internal interferences and noise, the non-overlapping time becomes unstable, which causes difficulty in the starting of the CCFL. 
   Therefore, it is an object of the present invention to provide a kind of ballast which is able to stably drive the CCFL. 
   SUMMARY OF THE INVENTION 
   A ballast includes a drive circuit, a half-bridge inverter, a transformer, and a filter. The drive circuit is configured for generating a drive signal on receiving a power. The half-bridge inverter is configured for generating a power AC signal according to the drive signal generated by the driver. The power AC signal is fed back to the drive circuit, for determining a non-overlap time of the drive signal. The transformer is configured for generating a high frequency signal based on the power AC signal. The high frequency signal is configured for lightening a lamp, and maintaining the lightening of the lamp. The filter is used for filtering out noise in the feedback power AC signal. 
   A ballast includes a driver, an inverter, and a transformer. The driver is configured for outputting a high-side drive signal and low-side drive signal. The high-side drive signal and the low-side drive signal are high-leveled alternatively. The inverter includes a high switch transistor for receiving the high-side drive signal and a low switch transistor for receiving the low-side drive signal. The high switch transistor and the low switch transistor are serially connected, for outputting a power AC signal. The transformer is configured for outputting a high frequency signal based on the power AC signal, for lightening a lamp and maintaining the lightening of the lamp. The power AC signal is also fed back to the driver, for controlling a non-overlap time of the drive signal outputted from the driver. 
   Other systems, methods, features, and advantages of the present ballast will be or become apparent to one with skill in the art upon examination of the following drawings and detailed description. It is intended that all such additional systems, methods, features, and advantages be included within this description, be within the scope of the present system and method, and be protected by the accompanying claims. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Many aspects of the present ballast can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the inventive system and method. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views. 
       FIG. 1  is a block diagram of a ballast in accordance with an exemplary embodiment; 
       FIG. 2  is a terminal pin arrangement for a ballast driver IC; 
       FIG. 3  is the function of each pin of the ballast driver IC illustrated in  FIG. 2 ; 
       FIG. 4  is a schematic diagram of the ballast in accordance with an exemplary embodiment; 
       FIG. 5  is a timing diagram of the oscillation signal CF, the drive signals GH and GL, the power AC signal, and the feedback signal ACM; 
       FIG. 6  is a signal timing diagram of the lamp voltage; 
       FIG. 7  is a schematic diagram of a notch type filter; 
       FIG. 8  is an equivalent circuit of the notch type filter as shown in the  FIG. 7 ; 
       FIG. 9A  and  FIG. 9B  are characteristic diagrams of the notch type filter as shown in the  FIG. 7 ; and 
       FIG. 10  is a schematic diagram of the filter in accordance with an exemplary embodiment. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   Reference will now be made to the drawings to describe a preferred embodiment of the inventive ballast. 
   Referring to  FIG. 1 , a block diagram of a ballast in accordance with an exemplary embodiment is illustrated. The ballast  100  includes an input end  110 , a drive circuit  120 , a half-bridge inverter  130 , a filter  140 , and a transformer  150 . 
   The input end  110  is configured for receiving a power for the Cold Cathode Fluorescent Lamp (CCFL)  200 . The input end  110  forwards the power to the drive circuit  120 . 
   The drive circuit  120  includes a drive controller  122 , a driver  124 , and an adaptive non-overlap timer  126 . The drive controller  122  is used for driving the driver  124  to output a drive signal when the power signal is received. The drive signal is applied to the half-bridge inverter  130 . 
   The half-bridge inverter  130  outputs a power AC signal according to the drive signal. The power AC signal is sent to the transformer  150  and the transformer  150  sends a high frequency signal to the CCFL  200 , thus, powering the CCFL  200 . 
   The power AC signal is further fed back to the adaptive non-overlap timer  126  via the filter  140 . The adaptive non-overlap timer  126  determines a non-overlap time of the drive signal outputted by the driver  124  according to a slope of a feedback signal generated by the filter  140 . The adaptive non-overlap timer  126  controls the drive controller  124  according to the determined non-overlap time. 
   Referring to  FIG. 2  and  FIG. 3 , a terminal pin arrangement for a ballast driver IC and a function of each pin is illustrated. In the preferred embodiment, The ballast driver IC is the UBA2070 manufactured by Philips. The ballast driver IC is used for driving fluorescent lamps, and especially for ballast circuits used in a drive circuit for cold cathode fluorescent lamps (CCFL). 
   Referring to  FIG. 4 , a schematic diagram of the ballast in accordance with an exemplary embodiment is illustrated. The driver IC UBA2070 as shown in  FIG. 2  is incorporated in the ballast  200  as the drive circuit (as the drive circuit  120  shown in  FIG. 1 ). The ballast  400  includes a drive circuit  410 , a half-bridge inverter  450 , a transformer  460 , and a filter  470 . 
   The driver circuit  410  includes a high side driver  418  and a low side driver  420 . Pin  10  and pin  6  of the driver circuit  410  are respectively connected to the high side driver  418  and the low side driver  420 . The high side driver  418  and the low side driver  420  make up of a driver (not labeled) as the driver  124  illustrated in  FIG. 1 . The high side driver  418  and the low side driver  420  are used for outputting drive signals to the half-bridge inverter  450 . The half-bridge inverter  450  includes a high switch transistor T hs  and a low switch transistor T ls . The signal GH, which is outputted by the high side driver  418  to the pin  10  of the drive circuit  410 , is applied to the high switch transistor T hs . The signal GL, which is outputted by the low side driver  418  to the pin  6  of the drive circuit  410 , is applied to the low switch transistor T ls . The half-bridge inverter  450  thus outputs the power AC signal to the transformer  460 . The transformer  460  provides a high frequency signal for the CCFLs that are connected in parallel with the transformer  460  according to the power AC signal. 
   A work principle of the ballast  400  will be described to show a further detailed structure of the ballast  400 . Referring to  FIG. 4 , after a power supply V DC  is applied to the ballast  400 , a charge current, which flows through a start-up resistor R VDD , charges a capacitor C VDD . Accordingly, a voltage V DD  on the capacitor C VDD  is increased. 
   When the V DD  reaches a predetermined value, such as 13V, a voltage controlled oscillator  426  starts oscillation. The oscillation frequency of the voltage controlled oscillator  426  is determined by a capacitance of a grounded capacitor C CF  and a resistance of the reference resistor R IREF , The voltage controlled oscillator  426  outputs an oscillation signal CF with a sawtooth waveform to the pin  3  of the drive circuit  410 . 
   Referring to  FIG. 5 , a timing diagram of the oscillation signal CF, the drive signals GH, GL, the power AC signal, and the feedback signal ACM is illustrated. The frequency of the oscillation signal CF is twice that of the drive signals GH, GL. The high switch transistor T hs  and a low switch transistor T ls  conducts in an alternating manner, thus the non-overlap time of the AC signal is about a quarter of its period time. 
   After the voltage controlled oscillator  426  starts oscillating, the frequency of the oscillation signal CF tends to decrease because an internally fixed current charges a capacitor C CSW  at pin  2  of the drive circuit  410 . When the frequency of the oscillation signal CF approaches a resonant frequency of the CCLs  500 , the transformer  460  outputs a high level signal that is applied to the CCFLs  500 , thus causing the CCFLs  500  to be ignited. The signal applied to the CCFLs  500  (hereinafter refers to lamp voltage) is rectified by a diode D LVS1 , and filtered by a capacitor C LVS2 , before being detected by a lamp voltage sensor  430  of the drive circuit  410  via pin  13 . 
   Referring to  FIG. 6 , a timing diagram of the lamp voltage is illustrated. When the lamp voltage becomes higher than a minimum value MIN, an ignition timer  412  of the drive circuit  410  starts. The ignition timer  412  stops when the lamp voltage drops below the minimum value MIN. When the lamp voltage is between the minimum value MIN and a maximum value MAX, a voltage on the pin  2  of the drive circuit  410  will increase to a clamp level, and the frequency of the oscillation signal CF will decrease. 
   When the frequency of the oscillation signal CF decreases to a threshold f MIN , the drive circuit enters a burn state, and the average current sensor  428  is enabled. As soon as the average voltage over a sense resistor R sense  reaches a reference level at pin  15  of the drive circuit  410 , the average current sensor  428  will allow an average current through the sense resistor R sense  to flow to the voltage controlled oscillator  426 . This is done to regulate the frequency of the oscillation signal CF, and to regulate a current over the CCFLs  500 . 
   Referring also to  FIG. 5 , during the non-overlap time, if the feedback signal ACM is not beyond a range of V CMD  (greater than V CMD+  or less than V CMD− ), the capacitive mode detector  424  will send an instruction, which indicating that the drive circuit  410  is in capacitive mode of operation. The frequency of the oscillation signal CF will increase to a maximum value f MAX . 
   The high switch transistor T hs  and the low switch transistor T ls  conducts in an alternating manner, this will cause a lot of noise in the ballast  400 . Frequencies of the noise are often different from that of the power AC signal outputted from the half-bridge inverter  450 . The noise will thus be fed back to the adaptive non-overlap timer  422  with the feedback signal ACM. The non-overlap time tends be unstable since it is determined by the slope of the feedback signal ACM. The unstable non-overlap time will cause the light emitted by the CCFLs  500  to have an unstable brightness, and may even cause the CCFLs  500  to be unable to be ignited. 
   The filter  470  is used for filtering the noise in the feedback signal ACM. The filter  470  is a notch type filter, which is used for allowing signals with all-band to pass through except some particular frequencies. 
   Referring to  FIG. 7 , a schematic diagram of a notch type filter is illustrated. The notch type filter  700  includes a high-pass filter circuit  702  and a low-pass filter circuit  704 . The high-pass filter circuit  702  and the low-pass filter circuit  704  are connected in parallel with each other. 
   The high-pass filter circuit  702  includes a first resistor R 1  with a resistance R and two first capacitors C 1 , each of the capacitors have a capacitance C. The first resistor R 1  and the two first capacitors C 1  are connected in a “T” shape. The low-pass filter circuit  704  includes a second capacitor C 2  and two second resistors R 2 . The second capacitor has a capacitance  2 C, and the second resistors R 2  have a uniform resistance  2 R. The second capacitor C 2  and the two second resistors R 2  are also connected in a “T” shape. 
   Referring to  FIG. 8 , an equivalent circuit of the notch type filter  700  as shown in the  FIG. 7  is illustrated. In the equivalent circuit, Z 1 , Z 2 , and Z 3  are equivalent impedances that may be expressed by the following equations: 
               Z   1     =         4   ⁢     R   ⁡     (     1   +     2   ⁢   sRC       )           1   +     4   ⁢       (   sRC   )     2           =       4   ⁢     R   ⁡     (     1   +     2   ⁢   jω   ⁢           ⁢   RC       )           1   +     4   ⁢       (     jω   ⁢           ⁢   RC     )     2               ;   and                   Z   2     =       Z   3     =         1   2     ⁢     (       2   ⁢   R     +     1   sC       )       =       1   2     ⁢     (       2   ⁢   R     +     1     jω   ⁢           ⁢   C         )             ;         
wherein s refers to the operator in S domain.
 
A transfer function of the notch type filter  700  can be written in a following equation:
 
                   F   ⁡     (   jω   )       =       Z   3         Z   1     +     Z   3                     =       1   -     4   ⁢       (     ω   ⁢           ⁢   RC     )     2             [     1   -     4   ⁢       (     ω   ⁢           ⁢   RC     )     2         ]     +     8   ⁢   jω   ⁢           ⁢   RC                       =       1   -       (     ω   /     ω   0       )     2         [     1   -       (     ω   /     ω   0       )     2     +     4   ⁢   j   ⁢           ⁢     ω   /     ω   0           ]         ,               
wherein j refers to the operator in frequency domain ω stands for an angular frequency, and ω 0  stands for a characteristic angular frequency of the notch type filter  700 . ω 0  is expressed by
 
   
     
       
         
           
             ω 
             0 
           
           = 
           
             
               1 
               
                 2 
                 ⁢ 
                 RC 
               
             
             . 
           
         
       
     
   
   An amplitude-frequency characteristic and a phase-frequency characteristic of the notch type filter  700  can be concluded by the transfer function: 
   
     
       
         
           
             
                
               
                 F 
                 ⁡ 
                 
                   ( 
                   jω 
                   ) 
                 
               
                
             
             = 
             
               
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                       ( 
                       
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                         / 
                         
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                       ) 
                     
                     2 
                   
                 
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                             ) 
                           
                           2 
                         
                       
                       ] 
                     
                     2 
                   
                   + 
                   
                     
                       [ 
                       
                         4 
                         ⁢ 
                         
                           ( 
                           
                             ω 
                             / 
                             
                               ω 
                               0 
                             
                           
                           ) 
                         
                       
                       ] 
                     
                     2 
                   
                 
               
             
           
           ; 
           and 
         
       
     
     
       
         
           φ 
           = 
           
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                       ⁢ 
                       
                         
                           4 
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                             2 
                           
                         
                       
                     
                   
                   
                     
                       
                         when 
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                             4 
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                       &gt; 
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               . 
             
           
         
       
     
   
   Referring to  FIGS. 9A and 9B , characteristic diagrams of the notch type filter  700  as shown in the  FIG. 7  are illustrated.  FIG. 9A  illustrates the characteristic diagram of the amplitude-frequency characteristic. When the angular frequency of an input signal is equal to the characteristic angular frequency of the notch type filter  700 , the amplitude of an output signal is about zero.  FIG. 9B  illustrates the characteristic diagram of the phase-frequency characteristic. As the angular frequency of the input signal approaches infinitely large or infinitely small, the phase shifted in the output signal decreases. 
   Referring to  FIG. 10 , a schematic diagram of the filter in accordance with an exemplary embodiment is illustrated. The filter  1000  includes a notch type filter  1002 , an amplifier  1004 , and two voltage-divide resistors  1006 ,  1008 . The notch type filter  1002  has a similar structure to that of the notch type filter  700  as shown in  FIG. 7 . The amplifier  1004  has an inverting input and a non-inverting input. The outputted signal of the notch type filter  1002  is applied to the non-inverting input of the amplifier  1004 . The amplifier  1004  outputs an amplified signal after amplifying the outputted signal of the notch type filter  1002 . The amplified signal is fed back to the inverting input of the amplifier  1004  after divided by the two voltage-divide resistors  1006  and  1008 . 
   The transfer function of the filter  1000  can be represented by the equation: 
                   A   ⁡     (   s   )       =         V   o     ⁡     (   s   )           V   i     ⁡     (   s   )                       =           A   VF     ⁡     [     1   +     s   /     ω   0         ]       2       1   +     2   ⁢     (     2   -     A   VF       )     ⁢     s   /     ω   0         +       (     s   /     ω   0       )     2           ,   or                             A   ⁡     (   jω   )       =         V   o     ⁡     (   s   )           V   i     ⁡     (   s   )                     =         A   VF     ⁡     [     1   +       (     jω   /     ω   0       )     2       ]         1   +     2   ⁢     (     2   -     A   VF       )     ⁢     jω   /     ω   0         +       (     jω   /     ω   0       )     2                       =         A   VF     ⁡     [     1   +       (     jω   /     ω   0       )     2       ]         1   +       1   Q     ·     jω   /     ω   0         +       (     jω   /     ω   0       )     2           ;               
wherein A VF  refers to an amplification of the amplifier  1004 , and Q refers to a Quality factor (Q factor) of the filter  1000 . The amplification A VF  can be expressed by an equation
 
               A   VF     =     1   +       R   b       R   a           ,         
wherein R a  and R b  respectively stand for the resistances of the two voltage-divide resistors  1006  and  1008 . The quality factor Q can be expressed by an equation
 
           Q   =       1     2   ⁢     (     2   -     A   VF       )         .           
As the amplification A VF  of the amplifier  1004  approaches 2, the quality factor tends to become infinitely large. The filter  1000  may adjust a frequency pass band by adjusting the amplification A VF  of the amplifier  1004 . The adjustment of the amplification A VF  of the amplifier  1004  may be accomplished by choosing different voltage-divide resistors  1006  and  1008 .
 
   By incorporating the filter  1000 , the ballast is able to filter out noise in the feedback signal ACM, thus the non-overlap time which is determined according to the feedback signal ACM is stable. Further, the brightness of the CCFLs may be stablized, and ignition failures may be avoided.