Patent Publication Number: US-8971675-B2

Title: Interconnect structure for MEMS device

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 11/331,705, filed on Jan. 13, 2006, which is incorporated herein by reference in its entirety. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The field of the invention relates to microelectromechanical systems (MEMS). More specifically, the invention relates to a MEMS device having interconnect structure. 
     2. Description of the Related Technology 
     Microelectromechanical systems (MEMS) include micro mechanical elements, actuators, and electronics. Micromechanical elements may be created using deposition, etching, and or other micromachining processes that etch away parts of substrates and/or deposited material layers or that add layers to form electrical and electromechanical devices. One type of MEMS device is called an interferometric modulator. As used herein, the term interferometric modulator or interferometric light modulator refers to a device that selectively absorbs and/or reflects light using the principles of optical interference. In certain embodiments, an interferometric modulator may have a pair of conductive plates, one or both of which may be transparent and/or reflective in whole or part and capable of relative motion upon application of an appropriate electrical signal. In this type of device, one plate may be a stationary layer deposited on a substrate and the other plate may be a metallic membrane separated from the stationary layer by an air gap. The position of one plate in relation to another can change the optical interference of light incident on the interferometric modulator. Such devices have a wide range of applications, and it would be beneficial in the art to utilize and/or modify the characteristics of these types of devices so that their features can be exploited in improving existing products and creating new products that have not yet been developed. 
     SUMMARY OF CERTAIN EMBODIMENTS 
     The system, method, and devices of the invention each have several aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope of this invention, its more prominent features will now be discussed briefly. After considering this discussion, and particularly after reading the section entitled “Detailed Description of Certain Embodiments” one will understand how the features of this invention provide advantages over other display devices. 
     One embodiment is an electronic device, including a substrate, an array of interferometric light modulators formed on the substrate, and a plurality of interconnects formed adjacent a plurality of the interferometric modulators, where each interconnect is configured to connect a single light modulator to a circuit. 
     Another embodiment is a method of manufacturing an electronic device, the method including providing a substrate including an array of interferometric light modulators formed on the substrate, and forming a plurality of interconnects adjacent a plurality of the interferometric modulators, where each interconnect is configured to connect a single light modulator to a circuit. 
     Another embodiment is an electronic device, including a substrate, and an interferometric modulator disposed on the substrate. The interferometric modulator includes a cavity defined by an upper layer and a lower layer, and an encapsulation layer formed adjacent to the interferometric modulator. The encapsulation layer has an electrical connection that connects the interferometric modulator to an electronic circuit, and the encapsulation layer hermetically seals the cavity from the ambient environment. 
     Another embodiment is a method of manufacturing a light modulator device. This method includes forming an interferometric modulator having first and second layers defining a cavity and configured to interferometrically modulate light, forming an encapsulation layer adjacent to the cavity, the layer including one or more orifices, inducing a vacuum or inert atmosphere in the cavity, and sealing the one or more holes where the sealing maintains the vacuum or inert atmosphere in the cavity. 
     Another embodiment is an electronic device, including means for transmitting light, an array of means for modulating light formed on the transmitting means, and a plurality of means for interconnecting formed adjacent a plurality of the light modulating means, where each of the interconnecting means is configured to connect a single light modulating means to a circuit. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is an isometric view depicting a portion of one embodiment of an interferometric modulator display in which a movable reflective layer of a first interferometric modulator is in a relaxed position and a movable reflective layer of a second interferometric modulator is in an actuated position. 
         FIG. 2  is a system block diagram illustrating one embodiment of an electronic device incorporating a 3×3 interferometric modulator display. 
         FIG. 3  is a diagram of movable mirror position versus applied voltage for one exemplary embodiment of an interferometric modulator of  FIG. 1 . 
         FIG. 4  is an illustration of a set of row and column voltages that may be used to drive an interferometric modulator display. 
         FIGS. 5A and 5B  illustrate one exemplary timing diagram for row and column signals that may be used to write a frame of display data to the 3×3 interferometric modulator display of  FIG. 2 . 
         FIGS. 6A and 6B  are system block diagrams illustrating an embodiment of a visual display device comprising a plurality of interferometric modulators. 
         FIG. 7A  is a cross section of the device of  FIG. 1 . 
         FIG. 7B  is a cross section of an alternative embodiment of an interferometric modulator. 
         FIG. 7C  is a cross section of another alternative embodiment of an interferometric modulator. 
         FIG. 7D  is a cross section of yet another alternative embodiment of an interferometric modulator. 
         FIG. 7E  is a cross section of an additional alternative embodiment of an interferometric modulator. 
         FIG. 8  is a cross section of an embodiment of an interferometric modulator with additional features. 
         FIG. 9  is another cross section of an embodiment of an interferometric modulator with additional features. 
         FIGS. 10A and 10B  are cross-sectional and top views, respectively, of another embodiment of an interferometric modulator with additional features. 
     
    
    
     DETAILED DESCRIPTION OF CERTAIN EMBODIMENTS 
     The following detailed description is directed to certain specific embodiments of the invention. However, the invention can be embodied in a multitude of different ways. In this description, reference is made to the drawings wherein like parts are designated with like numerals throughout. As will be apparent from the following description, the embodiments may be implemented in any device that is configured to display an image, whether in motion (e.g., video) or stationary (e.g., still image), and whether textual or pictorial. More particularly, it is contemplated that the embodiments may be implemented in or associated with a variety of electronic devices such as, but not limited to, mobile telephones, wireless devices, personal data assistants (PDAs), hand-held or portable computers, GPS receivers/navigators, cameras, MP3 players, camcorders, game consoles, wrist watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and/or displays, display of camera views (e.g., display of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry). MEMS devices of similar structure to those described herein can also be used in non-display applications such as in electronic switching devices. 
     Some embodiments include an interferometric modulator with one or more additional features. One additional feature is an encapsulation layer which hermetically seals the interferometric modulator, and which may have one or more electrical connections to the interferometric modulator. Another additional feature is a connection bump formed near the interferometric modulator and configured to make an electrical connection to an electronic circuit. In some embodiments electrical circuitry may be included between the interferometric modulators and the bumps, and the electrical circuitry may connect to either or both of the interferometric modulators and the bumps. 
     One interferometric modulator display embodiment comprising an interferometric MEMS display element is illustrated in  FIG. 1 . In these devices, the pixels are in either a bright or dark state. In the bright (“on” or “open”) state, the display element reflects a large portion of incident visible light to a user. When in the dark (“off” or “closed”) state, the display element reflects little incident visible light to the user. Depending on the embodiment, the light reflectance properties of the “on” and “off” states may be reversed. MEMS pixels can be configured to reflect predominantly at selected colors, allowing for a color display in addition to black and white. 
       FIG. 1  is an isometric view depicting two adjacent pixels in a series of pixels of a visual display, wherein each pixel comprises a MEMS interferometric modulator. In some embodiments, an interferometric modulator display comprises a row/column array of these interferometric modulators. Each interferometric modulator includes a pair of reflective layers positioned at a variable and controllable distance from each other to form a resonant optical cavity with at least one variable dimension. In one embodiment, one of the reflective layers may be moved between two positions. In the first position, referred to herein as the relaxed position, the movable reflective layer is positioned at a relatively large distance from a fixed partially reflective layer. In the second position, referred to herein as the actuated position, the movable reflective layer is positioned more closely adjacent to the partially reflective layer. Incident light that reflects from the two layers interferes constructively or destructively depending on the position of the movable reflective layer, producing either an overall reflective or non-reflective state for each pixel. 
     The depicted portion of the pixel array in  FIG. 1  includes two adjacent interferometric modulators  12   a  and  12   b . In the interferometric modulator  12   a  on the left, a movable reflective layer  14   a  is illustrated in a relaxed position at a predetermined distance from an optical stack  16   a , which includes a partially reflective layer. In the interferometric modulator  12   b  on the right, the movable reflective layer  14   b  is illustrated in an actuated position adjacent to the optical stack  16   b.    
     The optical stacks  16   a  and  16   b  (collectively referred to as optical stack  16 ), as referenced herein, typically comprise of several fused layers, which can include an electrode layer, such as indium tin oxide (ITO), a partially reflective layer, such as chromium, and a transparent dielectric. The optical stack  16  is thus electrically conductive, partially transparent and partially reflective, and may be fabricated, for example, by depositing one or more of the above layers onto a transparent substrate  20 . The partially reflective layer can be formed from a variety of materials that are partially reflective such as various metals, semiconductors, and dielectrics. Some examples of suitable materials include oxides, nitrides, and fluorides. Other examples include germanium (Ge), nickel silicide (NiSi), molybdenum (Mo), titanium (Ti), tantalum (Ta), and platinum (Pt). The partially reflective layer can be formed of one or more layers of materials, and each of the layers can be formed of a single material or a combination of materials. 
     In some embodiments, the layers of the optical stack are patterned into parallel strips, and may form row electrodes in a display device as described further below. The movable reflective layers  14   a ,  14   b  may be formed as a series of parallel strips of a deposited metal layer or layers (orthogonal to the row electrodes of  16   a ,  16   b ) deposited on top of posts  18  and an intervening sacrificial material deposited between the posts  18 . When the sacrificial material is etched away, the movable reflective layers  14   a ,  14   b  are separated from the optical stacks  16   a ,  16   b  by a defined gap  19 . A highly conductive and reflective material such as aluminum may be used for the reflective layers  14 , and these strips may form column electrodes in a display device. 
     With no applied voltage, the cavity  19  remains between the movable reflective layer  14   a  and optical stack  16   a , with the movable reflective layer  14   a  in a mechanically relaxed state, as illustrated by the pixel  12   a  in  FIG. 1 . However, when a potential difference is applied to a selected row and column, the capacitor formed at the intersection of the row and column electrodes at the corresponding pixel becomes charged, and electrostatic forces pull the electrodes together. If the voltage is high enough, the movable reflective layer  14  is deformed and is forced against the optical stack  16 . A dielectric layer (not illustrated in this Figure) within the optical stack  16  may prevent shorting and control the separation distance between layers  14  and  16 , as illustrated by pixel  12   b  on the right in  FIG. 1 . The behavior is the same regardless of the polarity of the applied potential difference. In this way, row/column actuation that can control the reflective vs. non-reflective pixel states is analogous in many ways to that used in conventional LCD and other display technologies. 
       FIGS. 2 through 5  illustrate one exemplary process and system for using an array of interferometric modulators in a display application. 
       FIG. 2  is a system block diagram illustrating one embodiment of an electronic device that may incorporate aspects of the invention. In the exemplary embodiment, the electronic device includes a processor  21  which may be any general purpose single- or multi-chip microprocessor such as an ARM, Pentium®, Pentium II®, Pentium III®, Pentium IV®, Pentium® Pro, an 8051,a MIPS®, a Power PC®, an ALPHA®, or any special purpose microprocessor such as a digital signal processor, microcontroller, or a programmable gate array. As is conventional in the art, the processor  21  may be configured to execute one or more software modules. In addition to executing an operating system, the processor may be configured to execute one or more software applications, including a web browser, a telephone application, an email program, or any other software application. 
     In one embodiment, the processor  21  is also configured to communicate with an array driver  22 . In one embodiment, the array driver  22  includes a row driver circuit  24  and a column driver circuit  26  that provide signals to a display array or panel  30 . The cross section of the array illustrated in  FIG. 1  is shown by the lines  1 - 1  in  FIG. 2 . For MEMS interferometric modulators, the row/column actuation protocol may take advantage of a hysteresis property of these devices illustrated in  FIG. 3 . It may require, for example, a 10 volt potential difference to cause a movable layer to deform from the relaxed state to the actuated state. However, when the voltage is reduced from that value, the movable layer maintains its state as the voltage drops back below 10 volts. In the exemplary embodiment of  FIG. 3 , the movable layer does not relax completely until the voltage drops below 2 volts. There is thus a range of voltage, about 3 to 7 V in the example illustrated in  FIG. 3 , where there exists a window of applied voltage within which the device is stable in either the relaxed or actuated state. This is referred to herein as the “hysteresis window” or “stability window.” For a display array having the hysteresis characteristics of  FIG. 3 , the row/column actuation protocol can be designed such that during row strobing, pixels in the strobed row that are to be actuated are exposed to a voltage difference of about 10 volts, and pixels that are to be relaxed are exposed to a voltage difference of close to zero volts. After the strobe, the pixels are exposed to a steady state voltage difference of about 5 volts such that they remain in whatever state the row strobe put them in. After being written, each pixel sees a potential difference within the “stability window” of 3-7 volts in this example. This feature makes the pixel design illustrated in  FIG. 1  stable under the same applied voltage conditions in either an actuated or relaxed pre-existing state. Since each pixel of the interferometric modulator, whether in the actuated or relaxed state, is essentially a capacitor formed by the fixed and moving reflective layers, this stable state can be held at a voltage within the hysteresis window with almost no power dissipation. Essentially no current flows into the pixel if the applied potential is fixed. 
     In typical applications, a display frame may be created by asserting the set of column electrodes in accordance with the desired set of actuated pixels in the first row. A row pulse is then applied to the row  1  electrode, actuating the pixels corresponding to the asserted column lines. The asserted set of column electrodes is then changed to correspond to the desired set of actuated pixels in the second row. A pulse is then applied to the row  2  electrode, actuating the appropriate pixels in row  2  in accordance with the asserted column electrodes. The row  1  pixels are unaffected by the row  2  pulse, and remain in the state they were set to during the row  1  pulse. This may be repeated for the entire series of rows in a sequential fashion to produce the frame. Generally, the frames are refreshed and/or updated with new display data by continually repeating this process at some desired number of frames per second. A wide variety of protocols for driving row and column electrodes of pixel arrays to produce display frames are also well known and may be used in conjunction with the present invention. 
       FIGS. 4 and 5  illustrate one possible actuation protocol for creating a display frame on the 3×3 array of  FIG. 2 .  FIG. 4  illustrates a possible set of column and row voltage levels that may be used for pixels exhibiting the hysteresis curves of  FIG. 3 . In the  FIG. 4  embodiment, actuating a pixel involves setting the appropriate column to −V bias , and the appropriate row to +ΔV, which may correspond to −5 volts and +5 volts respectively Relaxing the pixel is accomplished by setting the appropriate column to +V bias , and the appropriate row to the same +ΔV, producing a zero volt potential difference across the pixel. In those rows where the row voltage is held at zero volts, the pixels are stable in whatever state they were originally in, regardless of whether the column is at +V bias , or −V bias . As is also illustrated in  FIG. 4 , it will be appreciated that voltages of opposite polarity than those described above can be used, e.g., actuating a pixel can involve setting the appropriate column to +V bias , and the appropriate row to −ΔV. In this embodiment, releasing the pixel is accomplished by setting the appropriate column to −V bias , and the appropriate row to the same −ΔV, producing a zero volt potential difference across the pixel. 
       FIG. 5B  is a timing diagram showing a series of row and column signals applied to the 3×3 array of  FIG. 2  which will result in the display arrangement illustrated in  FIG. 5A , where actuated pixels are non-reflective. Prior to writing the frame illustrated in  FIG. 5A , the pixels can be in any state, and in this example, all the rows are at 0 volts, and all the columns are at +5 volts. With these applied voltages, all pixels are stable in their existing actuated or relaxed states. 
     In the  FIG. 5A  frame, pixels ( 1 , 1 ), ( 1 , 2 ), ( 2 , 2 ), ( 3 , 2 ) and ( 3 , 3 ) are actuated. To accomplish this, during a “line time” for row  1 , columns  1  and  2  are set to −5 volts, and column  3  is set to +5 volts. This does not change the state of any pixels, because all the pixels remain in the 3-7 volt stability window. Row  1  is then strobed with a pulse that goes from 0, up to 5 volts, and back to zero. This actuates the ( 1 , 1 ) and ( 1 , 2 ) pixels and relaxes the ( 1 , 3 ) pixel. No other pixels in the array are affected. To set row  2  as desired, column  2  is set to −5 volts, and columns  1  and  3  are set to +5 volts. The same strobe applied to row  2  will then actuate pixel ( 2 , 2 ) and relax pixels ( 2 , 1 ) and ( 2 , 3 ). Again, no other pixels of the array are affected. Row  3  is similarly set by setting columns  2  and  3  to −5 volts, and column  1  to +5 volts. The row  3  strobe sets the row  3  pixels as shown in  FIG. 5A . After writing the frame, the row potentials are zero, and the column potentials can remain at either +5 or −5 volts, and the display is then stable in the arrangement of  FIG. 5A . It will be appreciated that the same procedure can be employed for arrays of dozens or hundreds of rows and columns. It will also be appreciated that the timing, sequence, and levels of voltages used to perform row and column actuation can be varied widely within the general principles outlined above, and the above example is exemplary only, and any actuation voltage method can be used with the systems and methods described herein. 
       FIGS. 6A and 6B  are system block diagrams illustrating an embodiment of a display device  40 . The display device  40  can be, for example, a cellular or mobile telephone. However, the same components of display device  40  or slight variations thereof are also illustrative of various types of display devices such as televisions and portable media players. 
     The display device  40  includes a housing  41 , a display  30 , an antenna  43 , a speaker  44 , an input device  48 , and a microphone  46 . The housing  41  is generally formed from any of a variety of manufacturing processes as are well known to those of skill in the art, including injection molding, and vacuum forming. In addition, the housing  41  may be made from any of a variety of materials, including but not limited to plastic, metal, glass, rubber, and ceramic, or a combination thereof. In one embodiment the housing  41  includes removable portions (not shown) that may be interchanged with other removable portions of different color, or containing different logos, pictures, or symbols. 
     The display  30  of exemplary display device  40  may be any of a variety of displays, including a bi-stable display, as described herein. In other embodiments, the display  30  includes a flat-panel display, such as plasma, EL, OLED, STN LCD, or TFT LCD as described above, or a non-flat-panel display, such as a CRT or other tube device, as is well known to those of skill in the art. However, for purposes of describing the present embodiment, the display  30  includes an interferometric modulator display, as described herein. 
     The components of one embodiment of exemplary display device  40  are schematically illustrated in  FIG. 6B . The illustrated exemplary display device  40  includes a housing  41  and can include additional components at least partially enclosed therein. For example, in one embodiment, the exemplary display device  40  includes a network interface  27  that includes an antenna  43  which is coupled to a transceiver  47 . The transceiver  47  is connected to a processor  21 , which is connected to conditioning hardware  52 . The conditioning hardware  52  may be configured to condition a signal (e.g. filter a signal). The conditioning hardware  52  is connected to a speaker  45  and a microphone  46 . The processor  21  is also connected to an input device  48  and a driver controller  29 . The driver controller  29  is coupled to a frame buffer  28 , and to an array driver  22 , which in turn is coupled to a display array  30 . A power supply  50  provides power to all components as required by the particular exemplary display device  40  design. 
     The network interface  27  includes the antenna  43  and the transceiver  47  so that the exemplary display device  40  can communicate with one ore more devices over a network. In one embodiment the network interface  27  may also have some processing capabilities to relieve requirements of the processor  21 . The antenna  43  is any antenna known to those of skill in the art for transmitting and receiving signals. In one embodiment, the antenna transmits and receives RF signals according to the IEEE 802.11 standard, including IEEE 802.11(a), (b), or (g). In another embodiment, the antenna transmits and receives RF signals according to the BLUETOOTH standard. In the case of a cellular telephone, the antenna is designed to receive CDMA, GSM, AMPS or other known signals that are used to communicate within a wireless cell phone network. The transceiver  47  pre-processes the signals received from the antenna  43  so that they may be received by and further manipulated by the processor  21 . The transceiver  47  also processes signals received from the processor  21  so that they may be transmitted from the exemplary display device  40  via the antenna  43 . 
     In an alternative embodiment, the transceiver  47  can be replaced by a receiver. In yet another alternative embodiment, network interface  27  can be replaced by an image source, which can store or generate image data to be sent to the processor  21 . For example, the image source can be a digital video disc (DVD) or a hard-disc drive that contains image data, or a software module that generates image data. 
     Processor  21  generally controls the overall operation of the exemplary display device  40 . The processor  21  receives data, such as compressed image data from the network interface  27  or an image source, and processes the data into raw image data or into a format that is readily processed into raw image data. The processor  21  then sends the processed data to the driver controller  29  or to frame buffer  28  for storage. Raw data typically refers to the information that identifies the image characteristics at each location within an image. For example, such image characteristics can include color, saturation, and gray-scale level. 
     In one embodiment, the processor  21  includes a microcontroller, CPU, or logic unit to control operation of the exemplary display device  40 . Conditioning hardware  52  generally includes amplifiers and filters for transmitting signals to the speaker  45 , and for receiving signals from the microphone  46 . Conditioning hardware  52  may be discrete components within the exemplary display device  40 , or may be incorporated within the processor  21  or other components. 
     The driver controller  29  takes the raw image data generated by the processor  21  either directly from the processor  21  or from the frame buffer  28  and reformats the raw image data appropriately for high speed transmission to the array driver  22 . Specifically, the driver controller  29  reformats the raw image data into a data flow having a raster-like format, such that it has a time order suitable for scanning across the display array  30 . Then the driver controller  29  sends the formatted information to the array driver  22 . Although a driver controller  29 , such as a LCD controller, is often associated with the system processor  21  as a stand-alone Integrated Circuit (IC), such controllers may be implemented in many ways. They may be embedded in the processor  21  as hardware, embedded in the processor  21  as software, or fully integrated in hardware with the array driver  22 . 
     Typically, the array driver  22  receives the formatted information from the driver controller  29  and reformats the video data into a parallel set of waveforms that are applied many times per second to the hundreds and sometimes thousands of leads coming from the display&#39;s x-y matrix of pixels. 
     In one embodiment, the driver controller  29 , array driver  22 , and display array  30  are appropriate for any of the types of displays described herein. For example, in one embodiment, driver controller  29  is a conventional display controller or a bi-stable display controller (e.g., an interferometric modulator controller). In another embodiment, array driver  22  is a conventional driver or a bi-stable display driver (e.g., an interferometric modulator display). In one embodiment, a driver controller  29  is integrated with the array driver  22 . Such an embodiment is common in highly integrated systems such as cellular phones, watches, and other small area displays. In yet another embodiment, display array  30  is a typical display array or a bi-stable display array (e.g., a display including an array of interferometric modulators). 
     The input device  48  allows a user to control the operation of the exemplary display device  40 . In one embodiment, input device  48  includes a keypad, such as a QWERTY keyboard or a telephone keypad, a button, a switch, a touch-sensitive screen, a pressure- or heat-sensitive membrane. In one embodiment, the microphone  46  is an input device for the exemplary display device  40 . When the microphone  46  is used to input data to the device, voice commands may be provided by a user for controlling operations of the exemplary display device  40 . 
     Power supply  50  can include a variety of energy storage devices as are well known in the art. For example, in one embodiment, power supply  50  is a rechargeable battery, such as a nickel-cadmium battery or a lithium ion battery. In another embodiment, power supply  50  is a renewable energy source, a capacitor, or a solar cell, including a plastic solar cell, and solar-cell paint. In another embodiment, power supply  50  is configured to receive power from a wall outlet. 
     In some implementations control programmability resides, as described above, in a driver controller which can be located in several places in the electronic display system. In some cases control programmability resides in the array driver  22 . Those of skill in the art will recognize that the above-described optimization may be implemented in any number of hardware and/or software components and in various configurations. 
     The details of the structure of interferometric modulators that operate in accordance with the principles set forth above may vary widely. For example,  FIGS. 7A-7E  illustrate five different embodiments of the movable reflective layer  14  and its supporting structures.  FIG. 7A  is a cross section of the embodiment of  FIG. 1 , where a strip of metal material  14  is deposited on orthogonally extending supports  18 . In  FIG. 7B , the moveable reflective layer  14  is attached to supports at the corners only, on tethers  32 . In  FIG. 7C , the moveable reflective layer  14  is suspended from a deformable layer  34 , which may comprise a flexible metal. The deformable layer  34  connects, directly or indirectly, to the substrate  20  around the perimeter of the deformable layer  34 . These connections are herein referred to as support posts. The embodiment illustrated in  FIG. 7D  has support post plugs  42  upon which the deformable layer  34  rests. The movable reflective layer  14  remains suspended over the cavity, as in  FIGS. 7A-7C , but the deformable layer  34  does not form the support posts by filling holes between the deformable layer  34  and the optical stack  16 . Rather, the support posts are formed of a planarization material, which is used to form support post plugs  42 . The embodiment illustrated in  FIG. 7E  is based on the embodiment shown in  FIG. 7D , but may also be adapted to work with any of the embodiments illustrated in  FIGS. 7A-7C  as well as additional embodiments not shown. In the embodiment shown in  FIG. 7E , an extra layer of metal or other conductive material has been used to form a bus structure  44 . This allows signal routing along the back of the interferometric modulators, eliminating a number of electrodes that may otherwise have had to be formed on the substrate  20 . 
     In embodiments such as those shown in  FIG. 7 , the interferometric modulators function as direct-view devices, in which images are viewed from the front side of the transparent substrate  20 , the side opposite to that upon which the modulator is arranged. In these embodiments, the reflective layer  14  optically shields the portions of the interferometric modulator on the side of the reflective layer opposite the substrate  20 , including the deformable layer  34 . This allows the shielded areas to be configured and operated upon without negatively affecting the image quality. Such shielding allows the bus structure  44  in  FIG. 7E , which provides the ability to separate the optical properties of the modulator from the electromechanical properties of the modulator, such as addressing and the movements that result from that addressing. This separable modulator architecture allows the structural design and materials used for the electromechanical aspects and the optical aspects of the modulator to be selected and to function independently of each other. Moreover, the embodiments shown in  FIGS. 7C-7E  have additional benefits deriving from the decoupling of the optical properties of the reflective layer  14  from its mechanical properties, which are carried out by the deformable layer  34 . This allows the structural design and materials used for the reflective layer  14  to be optimized with respect to the optical properties, and the structural design and materials used for the deformable layer  34  to be optimized with respect to desired mechanical properties. 
       FIG. 8  is an illustration of an exemplary embodiment of an interferometric modulator array  800  showing a cross-sectional view of interferometric modulators  801   a ,  801   b , and  801   c . As shown, interferometric modulators  801   a ,  801   b , and  801   c  each have features similar to those previously discussed above. Also shown are additional features which have been formed above the structures previously discussed. In some embodiments the interferometric modulator array may be processed above these additional features. One skilled in the art will recognize that these features are combinable with interferometric modulators of any of the previously discussed embodiments, as well as other interferometric modulator embodiments not discussed. 
     Referring to  FIG. 8 , as in the embodiments previously discussed the interferometric modulator structures are formed on a transparent substrate  820 . Although in other embodiments an array may comprise various types of interferometric modulators, in this embodiment the interferometric modulators  801   a ,  801   b , and  801   c  are identical, and the structure of these interferometric modulators will now be described with reference to interferometric modulator  801   b  only. Posts  18   a  are formed on the substrate  820 , and define the boundaries for adjacent interferometric modulators. An optical stack  816   b  is formed on the substrate  820  between the posts  18   a . The posts  18   a  support a deformable layer  34   b  from which a reflective layer  814   b  is suspended. The reflective layer  814   b  is suspended so as to be spaced apart from the optical stack  816   b  such that an interferometric cavity  806   b  is formed between the optical stack  816   b  and the reflective layer  814   b . As discussed above, movement of the reflective layer  814   b  with respect to the optical stack  816   b  affects the dimensions, and therefore the interferometric properties, of the cavity  806   b . Movement of the reflective layer  814   b  is controlled by a providing a voltage difference between the optical stack  816   b  and the deformable layer  34   b . In this embodiment the additional features above the interferometric modulator provide an electrical connection to the deformable layer  34   b.    
     As shown in  FIG. 8 , posts  18   a  are extended vertically by addition of supports  18   b . An encapsulation layer  802  is supported by the supports  18   b , and has a via  804  adjacent to one of the supports  18   b . The via  804  electrically connects the deformable layer  34   b  to a first interconnect  810 , which is connected to additional circuitry. In this embodiment the circuitry comprises an inverter with PMOS transistor  822  and NMOS transistor  824 . The input to the inverter  822  is connected to a connection bump  840  which is part of a 3×3 array of connection bumps  841  that is formed on an upper layer  844  of the modulator array  800 . In some embodiments connection bumps  840  are not used. As can be envisioned, with this structure each deformable layer in the modulator array  800  can be directly connected to another circuit. For example, in the modulator array  800 , the deformable layer  34   b  directly connects through interconnect  810  to the connection bump  840 , which may be connected to another circuit. All other, or substantially all other, deformable layers within the modulator array can similarly connect through individual adjacent interconnects to individual connectors so that each deformable layer is capable of being individually addressed and controlled by the driver circuitry. Thus, the device has a plurality of interconnects formed adjacent a plurality of the interferometric modulators, where each interconnect is configured to connect a single light modulator to a circuit. Accordingly, this is a device with an array of means for modulating light formed on a transmitting means, and a plurality of means for interconnecting formed adjacent a plurality of the light modulating means, where each of the interconnecting means is configured to connect a single light modulating means to a circuit. 
     In some embodiments, the portion of deformable layers configured to be individually addressable is about 100%, however 1% through 99% of the deformable layers are individually addressable in other embodiments, for example one embodiment may have about 10%, about 20%, about 30%, about 40%, about 50%, about 60%, about 70%, about 80%, or about 90% of its deformable layers individually addressable. 
     A separate electronic device  860  provides a 3×3 array of connection pads  862  that is configured to mate with the a 3×3 array of connection bumps  841  on the interferometric modulator array  800 . As indicated in  FIG. 8 , a connection bump  840  on the interferometric modulator array  800  is configured to align with a connection pad  850  on the electronic device  860  in order to provide an electrical connection between the device  860  and the modulator  801   b.    
     In the embodiment shown in  FIG. 8 , the interferometric modulators  801   a - c  are enclosed by the encapsulation layer  802 . The encapsulation layer  802  may provide a hermetic seal for the interferometric modulator in order to protect it from environmental agents such as moisture and oxygen. The seal also allows for pressure within the interferometric modulators  801   a - c  to be maintained independent from external pressure of the ambient environment. Thus, the interferometric modulators  801   a - c  may be fabricated to maintain environments that differ from the ambient environment. For example, during manufacturing, the encapsulation layer  802  can be manufactured with via  804  that provides a through hole from the ambient environment to the interferometric modulator  801   b . The via  804  can then be filled by providing the first interconnect layer serves both to seal the encapsulation layer  802  and provides an electrical connection to the deformable layer  34   b . In some embodiments the encapsulation layer seals all interferometric modulators in an array from the ambient environment, while in other embodiments only a portion of the interferometric modulators are sealed by the encapsulation layer. For example, an array may comprise some interferometric modulators which are not addressed. Such interferometric modulators have a reflective layer manufactured at a known fixed position, and do not therefore need to have encapsulation layer comprising an electrical connection to them. 
     When the reflective layer  814   b , and the deformable layer  34   b  move between the actuated and relaxed states, orifices within the deformable layer  34   b  (not shown in the cross-section of  FIG. 8 ) allow for gasses to flow between the cavity  806   b  below the deformable layer  34   b  and the cavity  808   b  above the deformable layer  34   b . The viscosity of the gasses within the cavity may slow the movement between cavities. Sealing the interferometric modulator array at the time of manufacturing allows for deliberate customization of the cavity environment. Because of the permanent nature of the encapsulation, the environment within each cavity can persist throughout the lifetime of the array. For example, inducing a vacuum before sealing cavity  806   b  will substantially remove the gasses from the cavity portions  806   b , and  808   b , so that during use, the movement of the reflective layer  814   b  and the deformable layer  34   b  is not impeded by the cavity atmosphere. It should be realized that interferometric modulator arrays are typically sealed from the ambient environment by sealing a backplate to protect the array from the outside environment. While this type of sealant may still be used, it may also be unnecessary because the encapsulation layer  802  can also serve to protect the interior cavities from being affected by the ambient environment. Similarly, embodiments of the invention may also include the use of a desiccant to reduce the moisture levels within a cavity. However, the use of such desiccant may unnecessary in view of the fact that the cavities may be hermetically sealed by the encapsulation layer. 
     In some embodiments the encapsulation layer  802  is spaced apart from the relaxed state position of the deformable layer  34   b  by the introduction of an intermediate layer. The introduction of such an intermediate layer may also improve reliability of the device. During operation, the deformable layer  34   b  may forcefully move from an actuated position close to the optical stack  816   b  to the relaxed position away from the optical stack  816   b . Maintaining the cavity  808   b  above the deformable layer  34   b  allows for the deformable layer  34   b  to “overshoot” the final relaxed state because of the mechanical restorative force. Without the cavity, the deformable layer would collide with the encapsulating layer, potentially damaging the structure and shortening the life of the encapsulating layer and/or the mechanical interferometric modulator structure. 
     As shown in  FIG. 8 , in some embodiments the encapsulation layer  802  comprises the via  804  which makes an electrical connection between the deformable layer  34  and a first interconnect layer  810 . The interconnect layer  810  can be routed to circuitry to be connected to the interferometric modulator. The circuitry may comprise passive and active elements, such as routing wires, resistors, capacitors, inductors, diodes, and transistors. These elements may also include variable elements, such as variable resistors and variable capacitors. The type of circuit elements is not limited and other types of circuit elements may also be used. The circuitry may comprise display driver circuitry for at least one of rows, columns, portions of rows and/or columns, and individual deformable layers. The circuitry may additionally or alternatively comprise sense circuitry, used to determine the state of individual deformable layers or groups (such as rows or columns) of deformable layers. ESD protection, EM shielding, and interconnect routing may also be included in the circuitry. In some embodiments the circuitry may also comprise digital signal processing (DSP) functions such as data filtering and control information decoding. In some embodiments the circuitry may comprise RF functions such as an antenna and a power amp, as well as data converters. The type and function of the circuitry is not limited and other types and functions may be implemented. 
     The interferometric modulators may also be connected to intermediate connectors configured to make connections to other circuits. Such connectors include bond-pads and bumps, such as those used in a ball grid array (BGA). In some embodiments the circuitry and/or connectors are outside the perimeter of the interferometric modulator array. The interferometric modulators may be connected to the connectors through the interconnect layers only, or through the circuitry, as in  FIG. 8 , where the interferometric modulators are connected to the interconnect layer  810 , which is connected to the inverter (the circuitry), which is connected to the connector  840 . 
     In some embodiments circuitry and/or connectors are within the perimeter of the interferometric modulator array. An advantageous aspect of this arrangement is that it allows for short routing connections. Such an embodiment is shown in  FIG. 9  as interferometric modulator  900 . Similar to the embodiment described with reference to  FIG. 8 , interferometric modulator  900  is formed on a substrate  20 . Posts  18   a  are formed to define lateral boundaries, and an optical stack  16  is formed on the substrate  20  between the posts  18   a . A movable reflective layer  34  is formed on the posts. This embodiment has circuitry between the deformable layer  34  and a connection bump  940 , wherein the circuitry consists only of interconnect  910 , which comprises a via  912  sealing the encapsulation layer  902  from the ambient environment. In some embodiments the encapsulation layer is not present. The short interconnect  910  has lower parasitic parameters, such as resistance, capacitance, and inductance than it would if it were longer. Similarly, in some embodiments a second connector, such as a second bump, (not shown) can provide a short routing connection to an electrode in the optical stack  16 . The second bump may connect to the electrode in the optical stack  16  through, for example, a conductive element (not shown) adjacent to or as part of the supports  18  and  18   b . In some embodiments other types of connectors may be used, such as a bond pad. In some embodiments the connectors are arranged with a pitch between about 40 microns and about 60 microns. 
       FIGS. 10A and 10B  are cross-sectional and top views, respectively, of another embodiment of an interferometric modulator  1000 . One or more sacrificial layers are deposited during the fabrication of the interferometric modulator. The sacrificial layers at least provide a structural substrate for deposition of the layers which form the interferometric modulator. Once the layers forming the interferometric modulator are deposited, the sacrificial layers are removed, leaving only the interferometric modulator. In some cases the spaces previously occupied by the sacrificial layers then become cavities which allow for the mirror and the mechanical layer to move according to the operation of the interferometric modulator discussed above. 
     The interferometric modulator  1000  may be formed according to the following process. Posts  18  are formed on the substrate  20 , and optical stack  16  formed on the substrate  20  between the posts  18 . A first sacrificial layer is deposited on the optical stack  16 . A reflective layer  14  is then formed on the first sacrificial layer. Next, a second sacrificial layer is deposited on the reflective layer  14 . The second sacrificial layer is etched so as to expose the reflective layer  14  in a region between the posts  18 , and a mechanical layer  34  is then formed on the posts  18 , the etched second sacrificial layer, and the portion of the reflective layer  14  exposed by etching the second sacrificial layer. 
     In some embodiments, a third sacrificial layer is deposited above the mechanical layer. The third sacrificial layer may then be etched according to a desired contour for the encapsulation layer  1002 , which is deposited on the third sacrificial layer. As seen from  FIG. 10A , in this embodiment, the third sacrificial layer was etched so that the encapsulation layer contacts the mechanical layer in regions adjacent to the posts and is spaced apart from the mechanical layer in regions adjacent to the mirror. 
     In some embodiments the after the encapsulation layer is deposited, one or more orifices  1004  may be generated in the encapsulation layer by, for example, etching. After the orifices  1004  have been generated, the sacrificial layers may be removed. In some embodiments the orifices provide a path or the only path through which etching agents access the sacrificial layers and/or provide a path or the only path through which the etching agents and sacrificial layer materials are evacuated from the region between the encapsulation layer and the substrate. 
     Once the sacrificial layers are removed, the orifices  1004  in the encapsulation layer  1002  may be closed to hermetically seal the interferometric cavity from the ambient environment. In some embodiments prior to closing the orifices  1004 , the atmosphere within the interferometric cavity may be altered. For example, a vacuum may be induced, or an inert atmosphere may be generated between the encapsulation layer and the substrate. After the desired atmosphere is generated, the orifices may be closed while maintaining the desired atmosphere. The orifices may be closed with various materials including, but not limited to substantially non-conductive materials, and substantially conductive materials. 
     In some embodiments at least some of the orifices may be closed using a conductive material. The conductive material may contact the mechanical layer and form a via  1006 , as seen in  FIG. 10A . As discussed above, the via  1006  provides an electrical connection to the mechanical layer  34  through the encapsulation layer  1002 . 
     The via  1006  may be used to electrically connect the mechanical layer  34  to other interconnect layers and to circuitry. Using semiconductor fabrication techniques such as deposition of materials and sacrificial layers, and etching the materials and sacrificial layers, the other interconnect layers and the circuitry may be fabricated adjacent to the interferometric modulator. For example, as shown in  FIG. 10A , passive circuitry including an inductor  1008 , a capacitor  1010 , and a resistor  1012  have been fabricated adjacent to the device, above the encapsulation layer  1002 . In this embodiment, an active circuit element, a diode  1014 , has also been fabricated adjacent to the device. The active and passive circuit elements may be electrically connected either directly or indirectly to the interferometric device. 
     Also shown in  FIG. 10A  is a connection bump  1040 . In this embodiment the connection bump  1040  is connected to some of the circuitry fabricated adjacent to the interferometric modulator. The connection bump  1040  is configured to electrically connect the interferometric modulator to another circuit. As shown in  FIG. 10A , the connection bump  1040  may connect to the interferometric modulator indirectly, through other circuitry. In some embodiments the connection bump may directly connect to the device through the via  1006 . Such an embodiment is shown in  FIG. 9 . 
       FIG. 10B  shows a top view of the structures of  FIG. 10A  fabricated above the encapsulation layer  34 , indicating their relative arrangement in the orientation depicted. The connection bump  1040 , the diode  1014 , the resistor  1012 , the capacitor  1010 , and the inductor  1008  are each shown as well as certain interconnect  1016  layers which electrically connect the structures. 
     While the above detailed description has shown, described, and pointed out novel features as applied to various embodiments, it will be understood that various omissions, substitutions, and changes in the form and details of the device or process illustrated may be made by those skilled in the art without departing from the spirit of the invention. As will be recognized, the present invention may be embodied within a form that does not provide all of the features and benefits set forth herein, as some features may be used or practiced separately from others.