Patent Publication Number: US-11662660-B2

Title: Fabricating method of photomask, photomask structure thereof, and semiconductor manufacturing method using the same

Description:
PRIORITY DATA 
     This patent is a divisional application of U.S. patent application Ser. No. 16/548,876 filed Aug. 23, 2019, entitled of “FABRICATING METHOD OF PHOTOMASK, PHOTOMASK STRUCTURE THEREOF, AND SEMICONDUCTOR MANUFACTURING METHOD USING THE SAME”, which is incorporated herein by reference in its entirety. 
    
    
     BACKGROUND 
     The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling-down process generally provides benefits by increasing production efficiency and lowering associated costs while increasing the amount of functionality that can be provided in the reduced chip area. Such scaling down results in increased complexities of processing and manufacturing ICs, and the processes required for effective quality control of the products have become increasingly stringent. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Aspects of the embodiments of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, in accordance with the standard practice in the industry, various structures are not drawn to scale. In fact, the dimensions of the various structures may be arbitrarily increased or reduced for clarity of discussion. 
         FIG.  1    is a flowchart showing various stages of a method for fabricating a photomask in accordance with some embodiments of the present disclosure. 
         FIG.  2    is a flowchart showing various stages of a method for manufacturing a semiconductor in accordance with some embodiments of the present disclosure. 
         FIGS.  3  to  7    are schematic diagrams of various stages of a method in accordance with one or more embodiments of the present disclosure. 
         FIGS.  8  to  10    are top views of photomasks in accordance with some embodiments of the present disclosure. 
         FIGS.  11  to  16    are cross-sectional diagrams of photomask substrates at various stages of a method in accordance with some embodiments of the present disclosure. 
         FIGS.  17  to  18    are cross-sectional diagrams of photomask substrates at various stages of a method in accordance with some embodiments of the present disclosure. 
         FIGS.  19  to  28    are cross-sectional diagrams of photomask substrates at various stages of a method in accordance with some embodiments of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of elements and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. 
     Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “over,” “upper,” “on” and the like, may be used herein for ease of description to describe one element or feature&#39;s relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. 
     As used herein, although the terms such as “first,” “second” and “third” describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region, layer or section from another. The terms such as “first,” “second” and “third” when used herein do not imply a sequence or order unless clearly indicated by the context. 
     Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the disclosure are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. Any numerical value, however, inherently contains certain errors necessarily resulting from the standard deviation found in the respective testing measurements. Also, as used herein, the terms “substantially,” “approximately” and “about” generally mean within a value or range that can be contemplated by people having ordinary skill in the art. Alternatively, the terms “substantially,” “approximately” and “about” mean within an acceptable standard error of the mean when considered by one of ordinary skill in the art. People having ordinary skill in the art can understand that the acceptable standard error may vary according to different technologies. Other than in the operating/working examples, or unless otherwise expressly specified, all of the numerical ranges, amounts, values and percentages such as those for quantities of materials, durations of times, temperatures, operating conditions, ratios of amounts, and the likes thereof disclosed herein should be understood as modified in all instances by the terms “substantially,” “approximately” or “about,” Accordingly, unless indicated to the contrary, the numerical parameters set forth in the present disclosure and attached claims are approximations that can vary as desired. At the very least, each numerical parameter should at least be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Ranges can be expressed herein as from one endpoint to another endpoint or between two endpoints. All ranges disclosed herein are inclusive of the endpoints, unless specified otherwise. 
     A lithography process is commonly used in a semiconductor device fabrication process whereby the lithographic process transfers patterns of photomasks to a target substrate, typically a semiconductor substrate having a photosensitive layer disposed thereon. If the photomask has a defect, the defect or the change in a pattern of a photomask is likewise transferred to the target substrate as a defect in the pattern developed onto the semiconductor substrate. There are many causes of the defects. For example, the defects can result from deterioration of parts of a mask writer during fabrication of the photomask. If the defects are caused by the mask writer, a pattern of a photosensitive layer used in an exposure (or writing) operation of the photomask is distorted. However, tiny changes in the pattern of the photosensitive layer are difficult to detect, and the changes in the pattern eventually become the defects after multiple pattern-transferring operations are performed on multiple layers through the photosensitive layer. 
     The defects (can be resulted from tiny changes or roughness of boundaries of the pattern of the photosensitive layer) can be detected on a finished photomask. An after strip inspection (ASI) of the finished photomask is provided to ensure the quality of the photomask before the photomask is utilized in a patterning process of a semiconductor substrate, thereby improving product yield of the semiconductor substrate. The ASI can be performed to compare general shapes of the pattern of the photomask from a top view perspective without conducting detailed examinations that specific issues resulting the defect cannot be identified. In addition, at the time of the finding of the defects in the ASI, a next lot or even the next two lots of photomask substrates is already entered the mask writer, and similar defects in the next one or two lots of the photomasks is detected. A product yield of the photomasks is reduced. 
     The present disclosure provides a method for fabricating a photomask, including an after etching inspection (AEI) or an after developing inspection (ADI), is provided. The method of the present disclosure includes performing examinations of a pattern of a photomask with detailed variations in order to provide an accurate and on-line or instant inspection during the fabrication of the photomask. The inspection of the present disclosure can provide analysis of the defects of the photomask and a solution can be prepared based on the inspection result. If the photomask fails the inspection, the process can be halted and the issues can be instantly corrected. Similar defects and the scrapping of the next one or two lots of photomasks can be prevented, and thus product yield of the photomask can be enhanced. 
       FIG.  1    is a flowchart showing a method M 10  for fabricating a photomask in accordance with some embodiments of the present disclosure. The method M 10  includes several operations: (O 101 ) receiving a photomask substrate having a chip region and a peripheral region adjacent to the chip region; (O 102 ) forming a reference pattern by emitting one first radiation shot in the peripheral region; (O 103 ) forming a first beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein the plurality of second radiation shots are emitted along a first direction; (O 104 ) comparing a roughness of a boundary of the first beta pattern along the first direction and a roughness of a boundary of the reference pattern along the first direction from a top view perspective; (O 105 ) adjusting an alignment of the plurality of second radiation shots if a result of the comparison exceeds a tolerance; and (O 106 ) forming the photomask if the result of the comparison is within the tolerance. In some embodiments, after the adjusting of the alignment of the plurality of second radiation shots (O 105 ), the method M 10  can return to the operations O 102  and O 103 . In some embodiments, the operations O 105 , O 102 , O 103  and O 104  can be repeatedly performed until the result of the comparison is within the tolerance and the method M 10  proceeds to the operation O 106 . 
     If a photomask passes one or more inspections of the present disclosure, the photomask is utilized in a patterning operation of a semiconductor substrate. Thus, applying concepts similar to those applied in the method M 10 , a method M 20  for manufacturing a semiconductor is provided,  FIG.  2    is a flowchart showing the method M 20  for fabricating a photomask in accordance with some embodiments of the present disclosure. The method M 20  includes several operations: (O 201 ) receiving a photomask substrate including a shielding layer; (O 202 ) defining a chip region and a peripheral region adjacent to the chip region; (O 203 ) forming a design pattern in the chip region; (O 204 ) forming a reference pattern by emitting one first radiation shot in the peripheral region, and forming a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; (O 205 ) comparing a reference roughness of a boundary of the reference pattern and a beta roughness of a boundary of the beta pattern; (O 206 ) transferring the design pattern to the shielding layer if a difference between the reference roughness and the beta roughness is within a tolerance; and (O 207 ) transferring the design pattern to a semiconductor substrate. 
     In order to illustrate concepts and the methods M 10  and M 20  of the present disclosure, various embodiments are provided below. However, it is not intended to limit the present disclosure to specific embodiments. In addition, elements, conditions or parameters illustrated in different embodiments can be combined or modified to form different combinations of embodiments as long as the elements, parameters or conditions used are not conflicted. For ease of illustration, reference numerals with similar or same functions and properties are repeatedly used in different embodiments and figures. 
       FIGS.  3  to  4    are schematic diagrams illustrating the operation O 101  of the method M 10  and/or the operations O 201  to O 202  of the method M 20  in accordance with some embodiments of the present disclosure. A photomask substrate PS 1  or PS 2  is received, and includes a chip region A 1  and a peripheral region A 2 . In some embodiments, the photomask substrate PS 1  or PS 2  includes a carrier layer, a shielding layer over the carrier layer, a hard layer over the shielding layer, and optionally a mask layer over the hard layer. A detailed illustration of the structure of the photomask substrate PS 1  or PS 2  is provided later in the specification. 
     In some embodiments, the peripheral region A 2  surrounds the chip region A 1 . In some embodiments, the chip region A 1  is at a center of the photomask substrate PS 1 , and the peripheral region A 2  is along the boundaries of the photomask substrate PS 1  as shown in  FIG.  3   . In some embodiments, the patterns formed in the chip region A 1  are to be transferred to a semiconductor substrate, and patterns formed in the peripheral region A 2  are not to be transferred to the semiconductor substrate. In some embodiments, the chip region A 1  is an irradiated area during an exposure process. In some embodiments, the photomask substrate PS 2  includes several chip regions A 1  as shown in  FIG.  4   , and the peripheral region A 2  surrounds and separates each of the chip regions A 1 . In some embodiments, portions of the peripheral region A 2  between adjacent chip regions A 1  are spaces serving as scribe lines. In some embodiments, patterns formed in the peripheral region A 2  are for a comparison operation of the present disclosure. In some embodiments, the patterns formed in the peripheral region A 2  between the chip regions A 1  are transferred to a scribe line between chips of a semiconductor substrate. 
       FIGS.  5  to  7    are schematic diagrams illustrating the operations O 102  to O 103  of the method M 10  and/or the operations O 204  to O 205  of the method M 20  in accordance with some embodiments of the present disclosure. For ease of illustration, only a portion of the peripheral region A 2  is shown in  FIGS.  5  to  7   . 
       FIG.  5    illustrates the operation O 102  of the method. M 10  and/or the operation O 204  of the method M 20  in accordance with some embodiments. A reference pattern R 1  is formed by emitting one radiation shot P 1  in the peripheral region A 2 . A size of the reference pattern R 1  is the same as a pixel size of the radiation shot P 1 , and a pixel shape of the reference pattern R 1  is the same as a pixel shape of the radiation shot P 1 . In some embodiments, the method M 10  and/or the method M 20  further includes forming a reference pattern R 2  by emitting one radiation shot P 2 , wherein an orientation of the reference pattern R 2  is different from an orientation of the reference pattern R 1  so critical dimensions along different directions can be measured. A size of the reference pattern R 2  is the same as a pixel size of the radiation shot P 2 , and a pixel shape of the reference pattern R 2  is the same as a pixel shape of the radiation shot P 2 . In some embodiments, the radiation shot P 1  and/or the radiation shot P 2  includes electron beam or laser beam depending on the mask writers or application. 
     In the following description, a length of a pattern is measured along a longitudinal direction of the pattern, and a width of a pattern is measured along a lateral direction of the pattern, wherein the lateral direction is substantially perpendicular to the longitudinal direction. In addition, a roughness is focused on a boundary along the longitudinal direction of the pattern. A plurality of widths is measured at different positions of the pattern. For instance, a top width at one end of the pattern, a center width at a waist of the pattern, and a bottom width at the other end of the pattern are measured. 
     In additions, various reference patterns and beta patterns are provided in accordance with different embodiments. For ease of illustration and understanding, repeat description are omitted if similar parameters, conditions, characters, properties, functions, sub-operations or optional operations have already illustrated in other paragraphs or sections of the specification. However, it is not intended to limit the present disclosure. 
     In some embodiments, the reference pattern R 1  is polygonal. In some embodiments, the reference pattern R 1  is a rectangle having a longitudinal direction along a Y direction and a lateral direction along an X direction. In some embodiments, a width W 1  measured along the X direction of the reference pattern R 1  is in a range of 90 to 150 nm (nanometers). In some embodiments, a length L 1  measured along the Y direction of the configuration R 1  is in a range of 200 to 300 nm. In some embodiments, a boundary B 1  of the reference pattern R 1  is measured along the Y direction, and a reference roughness can be obtained by measuring or comparing the boundary  31  of the reference pattern R 1 . In some embodiments, the width W 1  and the length L 1  of the reference pattern R 1  formed comply with great precision to a desired width and length of the reference pattern R 1 . 
     In some embodiments, the reference pattern R 2  is polygonal. In some embodiments, the reference pattern R 2  is a rectangle. In some embodiments, the reference pattern R 1  and the reference pattern R 2  are substantially perpendicular. In some embodiments, the reference pattern R 1  has a longitudinal direction along the X direction and a lateral direction along the Y direction. In some embodiments, the reference pattern R 2  is separated from the reference pattern R 1  in the peripheral region A 2 . In some embodiments, the reference pattern R 2  is in contact with the reference pattern R 1  in the peripheral region A 2 . In some embodiments, a boundary  132  of the reference pattern R 2  is measured along the X direction, and a reference roughness can be obtained by measuring or comparing the boundary B 2  of the reference pattern R 2 . In some embodiments, a width W 2  and a length L 2  of the reference pattern R 2  formed comply with great precision to a desired width and length of the reference pattern R 2 . 
     In some embodiments, for ease of measurement and detection, the reference patterns R 1  and R 2  are formed with the same configuration (including size and shape) in the peripheral region A 2  with different orientations as shown in  FIG.  5   . However, the disclosure is not limited herein. In some embodiments, the reference patterns R 1  and R 2  are with different configurations and with different orientations. In some embodiments, the pixel size of the radiation shot P 1  is different from the pixel size of the radiation shot P 2 . In some embodiments, the shape of the reference pattern R 1  is different from the shape of the reference pattern R 2 . 
       FIG.  6    illustrates the operations O 103  to O 104  of the method M 10  and/or the operations O 204  to O 205  of the method M 20  in accordance with some embodiments. At least one beta pattern is formed by emitting a plurality of radiation shots in the peripheral region A 2 . A pixel size of each of the plurality of radiation shots for forming the beta patterns is smaller than a pixel size of a corresponding reference pattern (e.g., the reference pattern R 1  or R 2 ). In some embodiments, emission of the plurality of radiation shots includes repeatedly emitting the radiation shots along one direction, and thus the radiation shots are connected to each other to form the beta pattern corresponding to the reference pattern. In some embodiments, the plurality of radiation shots is emitted to form one beta pattern. In some embodiments, each of the plurality of radiation shots has a same exposure time and a same energy strength. 
     In some embodiments, a beta pattern T 1   a  according to the configuration of the reference pattern R 1  is formed by emitting a plurality of radiation shots P 1   a . In some embodiments, a dimension D 1   a  of the radiation shot P 1   a  along a longitudinal direction of the beta pattern T 1   a  is in a range of 5 to 30 nm depending on the application. In some embodiments, the dimension D 1   a  of the radiation shot P 1   a  is the same as a minimum dimension of the radiation shot used in fabricating a design pattern in the chip region A 1  of the photomask substrate PS 1 . 
     In some embodiments, the beta pattern T 1   a  formed has a configuration and an orientation that are substantially identical to those of the reference pattern R 1  from a top view perspective of the photomask substrate SSI. In some embodiments, the radiation shots P 1   a  are emitted and connected along the longitudinal direction of the beta pattern T 1   a . In some embodiments, the longitudinal direction of the beta pattern T 1   a  is the Y direction. In some embodiments, a roughness of a boundary B 1   a  of the beta pattern T 1   a  along the Y direction is obtained and compared to the roughness of the boundary B 1  of the reference pattern R 1 . In some embodiments, the roughness of the boundary B 1  of the reference pattern R 1  is relatively low due to the single radiation shot P 1  comparing with the roughness of the boundary B 1   a  resulted from connection of the multiple radiation shots Pia. In some embodiments, the roughness of the boundary B 1   a  is similar to or substantially same as the roughness of the boundary B 1  due to precise alignment of the radiation shots P 1   a  along the Y direction of the beta pattern T 1   a.    
     In some embodiments, the method M 10  or the method M 20  further includes comparing one or more widths W 1   a  with the width W 1  of the reference pattern R 1 . In some embodiments, the operation of comparing the widths is performed after or prior to the operation  104  or the operation  205 . In some embodiments, a width W 1   a  of the beta pattern T 1   a  is substantially equal to the width W 1  of the reference pattern R 1  due to effective control of time of exposure and energy of the radiation shot. In some embodiments, a length L 1   a  and a slope of the beta pattern T 1   a  are also substantially the same as those of the reference pattern R 1 . 
     In some embodiments, a beta pattern T 1   b  is further formed according to the configuration of the reference pattern R 1  by emitting a plurality of radiation shots P 1   b . In some embodiments, the beta pattern T 1   b  has a configuration and an orientation substantially identical to those of the reference pattern R 1  from a top view perspective of the photomask substrate PS 1 . In some embodiments, the radiation shots Pib are emitted and connected along a lateral direction (i.e., the X direction) of the beta pattern T 1   b . In some embodiments, a dimension D 1   b  of the radiation shot P 1   b  is measured along the X direction, which is the lateral direction of the beta pattern T 1   b . In some embodiments, a width W 1   b  along the X direction of the beta pattern T 1   b  is substantially equal to the width W 1  of the reference pattern R 1  due to effective control of time of exposure and energy of the radiation shots P 1   b . In some embodiments, a length L 1   b  and a slope of the beta pattern T 1   b  are also substantially the same as those of the reference pattern R 1 . 
     In some embodiments, a beta pattern T 2   a  is formed according to the configuration of the reference pattern R 2  by emitting a plurality of radiation shots P 2   a . In some embodiments, the beta pattern T 2   a  formed has a configuration and orientation that are substantially identical to the reference pattern R 2  in the peripheral region A 2  from a top view perspective of the photomask substrate PS 1 . In some embodiments, the radiation shots P 2   a  are emitted and connected along a lateral direction (e.g., the Y direction) of the beta pattern T 2   a . In some embodiments, a dimension D 2   a  of the radiation shot P 2   a  is measured along the Y direction, which is the lateral direction of the beta pattern T 2   a . In some embodiments, a width W 2   a  along the Y direction of the beta pattern T 2   a  is substantially equal to the width W 2  of the reference pattern R 2  due to effective control of time of exposure and energy of the radiation shots P 2   a . In some embodiments, a length L 2   a  and a slope of the beta pattern T 2   a  are also substantially the same as those of the reference pattern R 2 . 
     In some embodiments, a beta pattern T 2   b  is formed according to the configuration of the reference pattern R 2  by a plurality of radiation shots P 2   b . In some embodiments, the beta pattern T 2   b  formed has a configuration and an orientation that are substantially identical to the reference pattern R 2  in the peripheral region A 2  from a top view perspective of the photomask substrate PS 1 . In some embodiments, the radiation shots P 2   b  are emitted and connected along a longitudinal direction (e.g., the X direction) of the beta pattern T 2   b . In some embodiments, a roughness of a boundary B 2   b  of the beta pattern T 2   b  along the longitudinal direction is obtained and compared to the roughness of the boundary B 2 . In some embodiments, the roughness of the boundary B 2  of the reference pattern R 2  is relatively low due to the single radiation shot P 1  comparing with the roughness of the boundary B 2   b  resulted from connection of the multiple radiation shots P 2   b . In some embodiments, the roughness of the boundary B 2   b  is similar to or substantially same as the roughness of the boundary B 2  due to precise alignment of the radiation shots P 2   b  along the X direction of the beta pattern T 2   b . In some embodiments, a width W 2   b  of the beta pattern T 2   b  is substantially equal to the width W 2  of the reference pattern R 1  due to effective control of time of exposure and energy of the radiation shot. In some embodiments, a length L 2   b  and a slope of the beta pattern T 2   b  are also substantially the same as those of the reference pattern R 1 . 
     Accordingly, one or more reference patterns R 1  and R 2  and one or more of the beta patterns T 1   a , T 1   b , T 2   a  and T 2   b  are formed in the peripheral region A 2  depending on the factors to be tested. In some embodiments, the reference patterns R 1  and R 2 , and all of the beta patterns T 1   a , T 1   b , T 2   a  and T 2   b , are formed to test functions of the mask writer under various conditions so that causes of different defects can be identified. 
     In some embodiments, too much or too little radiation energy in the exposure or writing operation of fabrication of a photomask, or deterioration of a shaping deflector of the mask writer, can lead to different types of defects on the photomask.  FIG.  7    illustrates the operations O 103  to O 104  of the method M 10  and/or the operations O 204  to O 205  of the method M 20  in accordance with other embodiments. 
     In some embodiments, beta patterns TIa′ and T 1   b ′ and beta patterns T 2   a ′ and T 2   b ′ are formed in the peripheral region A 2  shown in  FIG.  7   . The beta patterns T 1   a ′, T 1   b ′, T 2   a ′ and T 2   b ′ are similar to the beta patterns T 1   a , T 1   b , T 2   a  and T 2   b , and the apostrophe mark indicates different embodiments for a purpose of ease of illustration but not intends to limit the present disclosure. In some embodiments, widths W 1   a ′, W 1   a ″ and W 1   a ′″ at different positions on the Y direction of the beta pattern T 1   a ′ are measured and compared. In some embodiments, a roughness of a boundary B 1   a ′ of the beta pattern T 1   a ′ is obtained and compared to the roughness of the boundary B 1 . In some embodiments, the roughness of the boundary Bla′ is greater than the roughness of the boundary B 1  of the reference pattern R 1  shown in  FIG.  5   . In some embodiments, if such comparison yields a difference that exceeds a tolerance, it is determined the photomask substrate PS 1  fails the inspection and a defect of roughness is detected. In some embodiments, the tolerance is within ±3 nm which is defined by the maximum difference of edge contour on the single edge side. In some embodiments, the tolerance can be adjusted depending on different applications, and it is not limited herein. 
     In some embodiments, the misalignment of the radiation shots P 1   a ′ occurs along the Y direction indicates the presence of radiation drift in the X direction. In some embodiments, the roughness of boundary B 1   a ′ represents degradation or contamination of a shaping deflector of the mask writer. In some embodiments, the shaping deflector is replaced or cleaned if the defect of roughness is detected. The alignment of the radiation shots P 1   a ′ along the Y direction is thereby adjusted or improved. 
     According to the above illustration and the operations O 105  and O 106 , the alignment of the radiation shots P 1   a ′ is adjusted if a result of the comparison exceeds the tolerance; however, if the result of the comparison is within the tolerance, a photomask is formed subsequently. The formations of the beta and reference patterns and the comparison can be repeatedly performed until the photomask substrate PS 1  passes the inspection (i.e. the difference of the roughness of the reference pattern and the beta pattern is within the tolerance). Since the inspection is performed at one or more early stages of a photomask fabrication (detailed illustration for fabricating the photomask is introduced later in the specification), defects on the photomask can be prevented. 
     In some embodiments, a width W 1   b ′ the beta pattern T 1   b ′ shown in  FIG.  7    is less than the width W 1  of the reference pattern R 1  shown in  FIG.  5   . In some embodiments, a plurality of widths W 1   b ′ are measured at different positions of the beta pattern T 1   b ′, and a roughness of a boundary B 1   b ′ is low. In some embodiments, a roughness of the boundary B 1   b ′ of the beta pattern T 1   b ′ is similar to or substantially equal to the roughness of the boundary B 1  of the reference pattern R 1 . That is, radiation shots Pib emitted to form the beta pattern T 1   b ′ are homogenously or generally too weak to form a pattern with a width substantially equal to the width W 1  of the reference pattern R 1 . In some embodiments, if a difference between the width W 1   b ′ and the width W 1  exceeds a tolerance, it is determined that the photomask substrate PS 1  fails the inspection and a defect of homo-small is detected. 
     In some embodiments, the tolerance is equal to 1% of the width W 1  of the reference pattern R 1 . In some embodiments, the tolerance is equal to 5% of the width W 1  of the reference pattern R 1 . In some embodiments, the tolerance is equal to 0.05% of the width W 1  of the reference pattern R 1 . In some embodiments, the tolerance is an absolute value instead of a percentage of the width W 1 . In some embodiments, the tolerance is 2 nm, and the acceptable range of the width W 1   b ′ of the beta patterns is within ±2 nm of the width W 1  of the reference pattern R 1 . In some embodiments, the tolerance is equal to 5 nm, and the acceptable range of the width W 1   b ′ of the beta patterns is within ±5 nm of the width W 1  of the reference pattern R 1 . The tolerance can be adjusted depending on different applications, and it is not limited herein. 
     In some embodiments, the homo-small width W 1   b ′ indicates that the radiation shots P 1   b ′ emitted on the photomask substrate PS 1  have insufficient radiation energies. In some embodiments, an exposure time of the radiation shot P 1   b ′ is increased if the defect of homo-small width W 1   b ′ of the beta pattern T 1   b ′ is detected. In some embodiments, a beam energy of the radiation shot P 1   b ′ is increased if the defect of homo-small width W 1   b ′ of the beta pattern T 1   b ′ is detected. Similarly, formation of another beta pattern and comparison of the widths can be repeatedly performed after the beam energy is adjusted until the photomask substrate PS 1  passes the inspection (i.e. the difference of the widths is within the tolerance). Therefore, defects of a photomask can be prevented. 
     In some embodiments, a width W 2   a ′ of the beta pattern T 2   a ′ shown in  FIG.  7    is greater than the width W 2  of the reference pattern R 2  shown in  FIG.  5   . In some embodiments, a plurality of widths are measured at different positions of the beta pattern T 1   b ′ are measured, and a roughness of a boundary B 2   a ′ is determined. In some embodiments, the roughness of a boundary B 2   a ′ of the beta pattern T 2   a ′ is similar to or substantially equal to the roughness of the boundary B 2  of the reference pattern R 2 . That is, radiation shots P 2   a ′ emitted to form the beta pattern T 2   a ′ are homogenously or generally too strong to form a pattern with a width that is substantially equal to the width W 2  of the reference pattern R 2 . In some embodiments, if a difference between the width W 2   a ′ and the width W 2  exceeds a tolerance, it is determined that the photomask substrate PS 1  fails the inspection and a defect of homo-large is detected. 
     In some embodiments, the homo-large width W 2   a ′ indicates that the radiation shots P 2   a ′ emitted on the photomask substrate PS 1  have excessive radiation energies. In some embodiments, an exposure time of the radiation shot P 1   b  is reduced if the defect of homo-large width W 2   a ′ of the beta pattern T 2   a ′ is detected. In some embodiments, a beam energy of the radiation shot P 2   a ′ is reduced if the defect of homo-large width W 2   a ′ of the beta pattern T 2   a ′ is detected. Similarly, formation of another beta pattern and comparison of the widths can be repeatedly performed after the beam energy is adjusted until the photomask substrate PS 1  passes the inspection (i.e. the difference of the widths is within the tolerance). Therefore, defects of a photomask can be prevented. 
     In the above-illustrated embodiments, the beta patterns T 1   a ′, T 1   b ′ and T 2   a ′ of  FIG.  7    respectively show different types of defects. In some embodiments, a combination of different types of defects can occur. 
     In some embodiments, as shown in the beta pattern T 2   b ′ in  FIG.  7   , widths W 2   b ′, W 2   b ″ and W 2   b ′″ measured at different positions of the beta pattern T 2   b ′ are generally too small compared to the width W 2  of the reference pattern R 2 . In addition, a roughness of a boundary B 2   b ′ of the beta pattern T 2   b ′ is greater than the roughness of the boundary B 2  of the reference pattern R 2  shown in  FIG.  5   . 
     In some embodiments, the misalignment of the radiation shots P 2   b ′ occurs along the X direction indicates the presence of radiation drift in the Y direction. In some embodiments, the roughness of the boundary B 2   b ′ represents degradation or contamination of a shaping deflector of the mask writer, and the homo-small widths W 2   b ′, W 2   b ″ and W 2   b ′″ indicates radiation energies of the radiation shots P 2   b ′ emitted on the photomask substrate PS 1  are generally too weak. In some embodiments, the shaping deflector is replaced or cleaned if the defect of roughness is detected, and an exposure time of the radiation shot P 2   b ′ is increased if the defect of homo-small of the beta pattern T 2   b ′ is detected. Similarly, formation of another beta pattern and comparisons of the widths and the roughnesses and adjustments of the beam energy and the alignment of the radiation shots P 2   b ′ can be repeatedly performed until the photomask substrate PS 1  passes the inspection (i.e. the difference of the widths and the difference of the roughnesses are both within the respective tolerance). Therefore, defects of a photomask can be prevented. 
     Locations and numbers of the reference patterns and the beta patterns are not limited herein as long as the reference patterns and the beta patterns are in the peripheral region A 2  of a photomask substrate. In some embodiments as shown in  FIG.  8   , only each of reference patterns R 1  and R 2  and each of beta patterns T 1   a , T 1   b , T 2   a  and T 2   b  are formed in the peripheral region A 2  of a photomask PM 1 . In some embodiments, defects of the mask writer tend to occur repeatedly across a photomask substrate and it is not necessary to form several of the same beta patterns and/or reference patterns. In some embodiments as shown in  FIG.  9   , multiple beta patterns T 1   a /T 1   b /T 2   a /T 2   b  are formed across a photomask PM 2 . In some embodiments, different defects can be examined if performance of the mask writer is unstable across a photomask substrate. In some embodiments as shown in  FIG.  10   , the beta patterns T 1   a /T 1   b /T 2   a /T 2   b  are formed between design patterns Ala and between chip regions A 1  of a photomask PM 3 . Only some chip regions A 1  include the design patterns are shown in  FIG.  10    for a purpose of simply illustration. In some embodiments, every of the chip regions A 1  includes same or different design patterns Ala. 
     In some embodiments as shown in  FIGS.  8  to  10   , the method M 10  further includes forming the design pattern Ala in the chip region A 1 . In some embodiments, the operations O 102  and O 103  are performed concurrently. In some embodiments, operation O 102  is performed after or prior to the operation O 103 . In some embodiments, the operations O 102  and O 103  are performed concurrently with, prior to, or after the formation of the design pattern Ala. In some embodiments, the design pattern Ala is formed after the photomask substrate passes the inspection, and then the patterns (including reference patterns, passed beta patterns, and the design patterns) are transferred to one or more layers underlying a photoresist layer of the photomask substrate. The order of the operations can depend on the fabrication and the mask writer, and it is not limited herein. Moreover, in some embodiments, an extra exposure time for forming the reference patterns and the beta patterns can be limited in less than 10 minutes. The extra exposure time should be short in comparison to an exposure time for forming the design pattern Ala due to simple configurations and large scales of the reference patterns and the beta patterns relative to the design pattern Ala. 
     Similarly, in some embodiments, the operation O 203  of the method M 20  is performed concurrently with the operation O 204 . In some embodiments, the operation O 203  of the method M 20  is performed after, prior to or concurrently with the operation O 204 . In some embodiments, formation of the reference patterns and formation of the beta patterns are performed concurrently in one writing procedure. In some embodiments, formation of the reference patterns is performed prior to or after formation of the beta patterns. 
     Therefore, different longitudinal directions of the reference patterns R 1  and R 2  and the beta patterns T 1   a /T 1   a ′ and T 2   b /T 2   b ′ can provide inspection results corresponding to different shaping deflector (e.g., X-direction deflector or Y-direction deflector). Moreover, different directions of alignment of the radiation shots for forming the beta patterns respectively can facilitate detection of different types of defects. The method for fabricating a photomask provided by the present disclosure provides detailed examinations under various conditions, and a product yield can be improved. 
     In order to detect defects of a photomask in an early stage of the fabrication, the comparing operation or the inspection can be performed after formation of a patterned photoresist layer. 
       FIGS.  11  to  16    are cross-sectional diagrams illustrating different stages of fabrication of a super binary mask (SBIM) in accordance with some embodiments of the present disclosure. For ease of illustration,  FIGS.  11  to  16    show a portion of a photomask substrate and formation of the beta patterns T 2   a  and T 2   b , but it is not intended to limit the following process of the present disclosure to the beta patterns T 2   a  and T 2   b.    
     Referring to  FIG.  11   , a photomask substrate PS 3  is received. The photomask substrate PS 3  includes a carrier layer  10 , a shielding layer  11  over the carrier layer  10 , and a hard layer  13  over the shielding layer  11 . In some embodiments, a photoresist layer  15  is formed over the hard layer  13  of the photomask substrate PS 3 . In some embodiments, the photoresist layer  15  includes a positive photoresist. In some embodiments, the carrier layer  10  is transparent. In some embodiments, the carrier layer  10  includes at least one of quartz and glass. In some embodiments, the shielding layer  11  includes molybdenum silicide (MoSi). In some embodiments, the hard layer  13  includes chromium (Cr). 
     Referring to  FIG.  12   , the photoresist layer  15  is patterned thereby forming a patterned photoresist layer  15 ′. In some embodiments, a lithographic operation (or writing operation) including emitting the radiation shots P 1 , P 2 , P 1   a , P 1   b , P 2   a  and P 2   b  is performed to form the patterned photoresist layer  15 ′. In some embodiments, the patterned photoresist layer  15 ′ includes the reference patterns, the beta patterns and the design patterns. In some embodiments, the comparing operation (the operation O 104  or O 205 ) is performed after the formation of the patterned photoresist layer  15 ′ and before patterning of the hard layer  13  or proceeding to a next operation. In some embodiments, the fabrication is suspended if the photomask substrate PS 3  fails the inspection, and proceeds if the photomask substrate PS 3  passes the inspection. In some embodiments with positive photoresist layer  15 , the reference patterns and the beta patterns include spaces between portions of the patterned photoresist layer  15 ′. The positive photoresist is a type of photoresist in which portions of the photoresist exposed to light become soluble to a photoresist developer, and thus spaces formed after a development of the lithographic operation is critical. In some embodiments, the roughness of the boundaries and the widths of the reference patterns and the beta patterns are determined by measuring widths of the spaces between the portions of the patterned photoresist layer  15 ′. If the inspection fails at the stage shown in  FIG.  12   , the patterned photoresist layer  15 ′ is removed and the operations shown in  FIGS.  11  to  12    are repeated. 
     Referring to  FIG.  13   , the reference patterns, the beta patterns (e.g., T 2   a  and T 2   b ) and the design patterns are transferred to the hard layer  13 . In some embodiments, portions of the hard layer  13  are removed through the patterned photoresist layer  15 ′ to form a patterned hard layer  13 ′. In some embodiments, the comparing operation (the operation O 104  or O 205 ) is performed after formation of the patterned hard layer  13 ′ and before removal of the patterned photoresist layer  15 ′ or proceeding to a next operation. In some embodiments, the fabrication is suspended if the photomask substrate PS 3  fails the inspection, and proceeds if the photomask substrate PS 3  passes the inspection. 
     Referring to  FIG.  14   , the patterned photoresist layer  15 ′ is removed. In some embodiments, the patterned hard layer  13 ′ includes the reference patterns, the beta patterns and the design patterns. In some embodiments, the comparing operation (the operation O 104  or O 205 ) is performed after removal of the patterned photoresist layer  15 ′ and before patterning of the shielding layer  11  or proceeding to a next operation. In some embodiments using the positive photoresist layer  15 , the roughness of the boundaries and the widths of the reference patterns and the beta patterns are determined by measuring widths of the spaces between portions of the patterned hard layer  13 ′. In some embodiments, the fabrication is suspended if the photomask substrate PS 3  fails the inspection, and proceeds if the photomask substrate PS 3  passes the inspection. 
     Referring to  FIG.  15   , the reference patterns, the beta patterns and the design patterns are transferred to the shielding layer  11 . In some embodiments, the design pattern Ala is transferred to the shielding layer  11  concurrently with the reference patterns and the beta patterns if the photomask substrate PS 3  passes the inspection. That is, in some embodiments, the design pattern is transferred to the shielding layer  11  if a difference between the roughness and/or the width of the beta pattern and a roughness and/or the width of the reference pattern is within a tolerance. In some embodiments, portions of the shielding layer  11  are removed through the patterned hard layer  13 ′ to form a patterned shielding layer  11 ′. In some embodiments, the patterned shielding layer  11 ′ includes the reference patterns, the beta patterns and the design patterns. In some embodiments, the correctness and quality of the design pattern of the patterned shielding layer  11 ′ are ensured by performing the comparing operation prior to the formation of the patterned shielding layer  11 ′. 
     Referring to  FIG.  16   , the patterned hard layer  13 ′ is removed, thereby forming a photomask PM 4 . In some embodiments, a pattern of the patterned shielding layer  11 ′ is the pattern of a photomask PM 4 . 
     The method M 10  can be applied on various types of photomasks.  FIGS.  17  to  18    are cross-sectional diagrams illustrating different stages of fabrication of an alternating phase-shift mask (APSM) using a positive photoresist in accordance with some embodiments of the present disclosure.  FIGS.  17  to  18    show only a portion of a photomask substrate and formation of the beta patterns T 2   a  and T 2   b , but it is not intended to limit the following process of the present disclosure to the beta patterns T 2   a  and T 2   b.    
     Referring to  FIG.  17   , a photomask substrate PS 4  is received. Operations similar to those illustrated in  FIGS.  11  to  15    are performed to form a patterned hard layer  13 ′ and a patterned shielding layer  11 ′. Another patterned photoresist layer  16 ′ is formed on the patterned hard layer  13 ′. In some embodiments, the comparing operation can be performed prior to patterning the patterned hard layer  13 ′. Referring to  FIG.  18   , portions of the patterned hard layer  13 ′ are removed through the patterned photoresist layer  16 ′ to form a patterned hard layer  13 ″. The patterned photoresist layer  16 ′ is then removed to form a photomask PM 5 . 
     In some embodiments, the photoresist layer  15  includes a negative photoresist.  FIGS.  19  to  28    are cross-sectional diagrams illustrating different stages of fabrication of an APSM using a negative photoresist in accordance with some embodiments of the present disclosure.  FIGS.  19  to  28    show only a portion of a photomask substrate and formation of the beta patterns T 2   a  and T 2   b , but it is not intended to limit the following process of the present disclosure to the beta patterns T 2   a  and T 2   b.    
     Referring to  FIG.  19   , a photomask substrate PS 5  is received. The photomask substrate PS 5  includes a carrier layer  10 , a shielding layer  11  over the carrier layer  10 , a hard layer  13  over the shielding layer  11 , a mask layer  14  over the hard layer  13 , and a photoresist layer  15  over the mask layer  14 . In some embodiments, the photoresist layer  15  includes a negative photoresist. In some embodiments, the carrier layer  10  is transparent. In some embodiments, the carrier layer  10  includes at least one of quartz and glass. 
     Referring to  FIG.  20   , the photoresist layer  15  is patterned, thereby forming a patterned photoresist layer  15 ′. In some embodiments, a lithographic operation (or writing operation) including emitting the radiation shots P 1 , P 2 , P 1   a , P 1   b , P 2   a  and P 2   b  is performed to form the patterned photoresist layer  15 ′. In some embodiments, the patterned photoresist layer  15 ′ includes the reference patterns, the beta patterns and the design patterns. In some embodiments, the comparing operation (the operation O 104  or O 205 ) is performed after the formation of the patterned photoresist layer  15 ′ and before patterning of the mask layer  14  or proceeding to a next operation. In some embodiments, the fabrication is suspended if the photomask substrate PS 5  fails the inspection, and proceeds if the photomask substrate PS 5  passes the inspection. In some embodiments with negative photoresist, the reference patterns and the beta patterns include portions of the patterned photoresist layer  15 ′. The negative photoresist is a type of photoresist in which portions of the photoresist exposed to light become insoluble to a photoresist developer, and unexposed portions of the photoresist is dissolved by the photoresist developer. In some embodiments, the roughness of the boundaries and the widths of the reference patterns and the beta patterns are determined by measuring widths of the portions of the patterned photoresist layer  15 ′. 
     Referring to  FIG.  21   , the reference patterns, the beta patterns (e.g., T 2   a  and T 2   b ) and the design patterns are transferred to the mask layer  14 . In some embodiments, portions of the mask layer  14  are removed through the patterned photoresist layer  15 ′ to form a patterned mask layer  14 ′. In some embodiments, the comparing operation (the operation O 104  or O 205 ) is performed after formation of the patterned mask layer  14 ′ and before removal of the patterned photoresist layer  15 ′ or proceeding to a next operation. In some embodiments, the fabrication is suspended if the photomask substrate PS 5  fails the inspection, and proceeds if the photomask substrate PS 5  passes the inspection. 
     Referring to  FIG.  22   , the patterned photoresist layer  15 ′ is removed. In some embodiments, the patterned mask layer  14 ′ includes the reference patterns, the beta patterns and the design patterns. In some embodiments, the comparing operation (the operation O 104  or O 205 ) is performed after removal of the patterned photoresist layer  15 ′ and before patterning of the hard layer  13  or proceeding to a next operation. In some embodiments, the comparing operation is performed prior to removal of the patterned mask layer  14 ′. In some embodiments using the negative photoresist layer  15 , the roughness of the boundaries and the widths of the reference patterns and the beta patterns are determined by measuring widths of portions of the patterned mask layer  14 ′. In some embodiments, the fabrication is suspended if the photomask substrate PS 5  fails the inspection, and proceeds if the photomask substrate PS 5  passes the inspection. 
     Referring to  FIG.  23   , the reference patterns, the beta patterns (e.g., T 2   a  and T 2   b ) and the design patterns are transferred to the hard layer  13 . In some embodiments, portions of the hard layer  13  are removed through the patterned mask layer  14 ′ to form a patterned hard layer  13 ′. In some embodiments, the comparing operation (the operation O 104  or O 205 ) is performed after formation of the patterned hard layer  13 ′ and before removal of the patterned mask layer  14 ′ or proceeding to a next operation. In some embodiments, the fabrication is suspended if the photomask substrate PS 5  fails the inspection, and proceeds if the photomask substrate PS 5  passes the inspection. 
     Referring to  FIG.  24   , the patterned mask layer  14 ′ is removed. In some embodiments, the patterned mask layer  14 ′ includes the reference patterns, the beta patterns and the design patterns. In some embodiments, the comparing operation (the operation O 104  or O 205 ) is performed after removal of the patterned mask layer  14 ′ and before patterning of the shielding layer  11  or proceeding to a next operation. In some embodiments using the negative photoresist layer  15 , the roughness of the boundaries and the widths of the reference patterns and the beta patterns are determined by measuring portions of the patterned hard layer  13 ′. In some embodiments, the fabrication is suspended if the photomask substrate PS 5  fails the inspection, and proceeds if the photomask substrate PS 5  passes the inspection. 
     Referring to  FIG.  25   , the reference patterns, the beta patterns and the design patterns are transferred to the shielding layer  11 . In some embodiments, the design pattern is transferred to the shielding layer  11  concurrently with the reference patterns and the beta patterns if the photomask substrate PS 5  passes the inspection. That is, in some embodiments, the design pattern is transferred to the shielding layer  11  if a difference between the roughness and/or the width of the beta pattern and the roughness and/or the width of the reference pattern is within a tolerance. In some embodiments, portions of the shielding layer  11  are removed through the patterned hard layer  13 ′ to form a patterned shielding layer  11 ′. In some embodiments, the patterned shielding layer  11 ′ includes the reference patterns, the beta patterns and the design patterns. In some embodiments, the correctness and quality of the design pattern of the patterned shielding layer  11 ′ are ensured by performing the comparing operation prior to formation of the patterned shielding layer  11 ′. 
     Referring to  FIG.  26   , a patterned photoresist layer  16 ′ is formed covering portions of the patterned hard layer  13 ′. Referring to  FIG.  27   , portions of the patterned hard layer  13 ′ exposed through the patterned photoresist layer  16 ′ are removed to form a patterned hard layer  13 ″. Referring to  FIG.  28   , the patterned photoresist layer  16 ′ is then removed to form a photomask PM 6 . 
     A photomask formed following the above-illustrated methods is used in a lithographic/patterning operation of a semiconductor substrate. The photomask may include one or more reference patterns and one or more beta patterns in the peripheral region. In some embodiments, the photomask includes a chip region A 1  and a peripheral region A 2  adjacent to the chip region A 1 . In some embodiments, the photomask includes a design pattern Ala in the chip region A 1 , and a plurality of test patterns, including at least one of the reference patterns and at least one of the beta patterns, in the peripheral region A 2 . The test patterns are separated from the design pattern. In some embodiments, the reference pattern has a first boundary (B 1  or B 2 ) and the beta pattern has a second boundary (Bla, B 1   b , B 2   a  or B 2   b ), wherein a roughness of the second boundary is greater than a roughness of the first boundary. In some embodiments, a roughness of the second boundary is greater than a roughness of the first boundary, and a difference between a width of the beta pattern and a width of the reference pattern is within a tolerance. 
     In some embodiments, a photomask can include one or more beta patterns T 1   a , T 1   b , T 2   a  and T 2   b , which are formed in a manner similar to that of the beta patterns shown in  FIG.  7    (e.g., with a slightly greater roughness, a slightly smaller width, a slightly greater width or a combination thereof relative to the corresponding reference patterns R 1  and/or R 2 ), but the photomask can still pass the inspection if the variations detected are within the respective tolerances. In some embodiments, the design pattern of the photomask is transferred to the semiconductor substrate if the photomask passes one or more inspections during the fabrication. In some embodiments, if the photomask fails the inspection, the patterned layer (e.g. the patterned photoresist layer  15 ′, the patterned hard layer  13 ′ or the patterned mask layer  14 ′) is removed and reformed over the shielding layer  11 . A quality of the patterned semiconductor substrate is ensured, and defects of the semiconductor substrate resulting from a low-quality photomask are prevented. A product yield of semiconductor substrates or devices is therefore enhanced. 
     Some embodiments of the present disclosure provide a method for manufacturing a semiconductor. The method includes: receiving a photomask substrate including a shielding layer; defining a chip region and a peripheral region adjacent to the chip region; forming a design pattern in the chip region; forming a reference pattern by emitting one first radiation shot and a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; comparing a reference roughness of a boundary of the reference pattern and a beta roughness of a boundary of the beta pattern; transferring the design pattern to the shielding layer if a difference between the reference roughness and the beta roughness is within a tolerance; and transferring the design pattern of the photomask to a semiconductor substrate. 
     Some embodiments of present disclosure provides a method for forming a semiconductor. The method includes following operations. A photomask substrate is received. A reference pattern is formed over the photomask substrate by emitting one first radiation shot. A beta pattern is formed over the photomask substrate by emitting a plurality of second radiation shots along a first direction. A pixel size of the first radiation shot is greater than a pixel size of the second radiation shots. A roughness of a boundary of the reference pattern and a roughness pf a boundary of the beta pattern are compared along the direction from a top view. A design pattern is formed over the photomask substrate when a result of the comparison is within a tolerance. 
     Some embodiments of the present disclosure provides a method for manufacturing a semiconductor. The method includes following operations. A photomask substrate is received. A reference pattern is formed over the photomask substrate by emitting one first radiation shot. A beta pattern is formed over the photomask substrate by emitting a plurality of second radiation shots. A pixel size of the first radiation shot is greater than a pixel size of the second radiation shots. A roughness of a boundary of the reference pattern and a roughness of a boundary of the beta pattern are compared. An alignment of the plurality of second radiation shots are adjusted when a result of the comparison exceeds a tolerance. A design pattern is formed over the photomask substrate when a result of the comparison is within the tolerance. The design patter is transferred to a semiconductor substrate. 
     The advanced lithography process, method, and materials described in the current disclosure can be used in many applications, including fin-type field effect transistors (FinFETs). For example, the fins may be patterned to produce a relatively close spacing between features, for which the above disclosure is well suited. In addition, spacers used in forming fins of FinFETs can be processed according to the above disclosure. 
     The foregoing outlines structures of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.