Patent Publication Number: US-2004044512-A1

Title: Method and apparatus for increasing a number of operating states of a circuit device

Description:
FIELD OF THE INVENTION  
       [0001] The present invention relates generally to circuit devices with static operating states, and, more particularly, to a method and apparatus for increasing the number of effective operating states of such circuit devices.  
       BACKGROUND OF THE INVENTION  
       [0002] Applications of an electrical circuit often require that the response or operating parameters of the electrical circuit be changed electronically during operation. Generally, the electrical circuit must be designed with a number of static operational states that correspond to the accuracy or resolution of the required changes.  
       [0003] For example, a filtering circuit might be implemented with a number of similar static elements, such as capacitors, which are connected to the circuit via switches. Electronically opening or closing selected switches can select a desired filter operational response. However, a separate switch and capacitor branch is required for each desired filter response. Increasing the number of filter responses requires adding a corresponding number of switches and branches. Such a design would be very difficult and costly. However, a high number of filter responses are necessary in order to tune a circuit with a high degree of accuracy or resolution.  
       [0004] Therefore, what is needed is a device that can increase the number of operating states of an electrical circuit with limited, if any, modifications to the electrical circuit.  
     
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0005] Objects and advantages of the present invention will be more readily apparent from the following detailed description of the preferred embodiments thereof when taken together with the accompanying drawings in which:  
     [0006]FIG. 1 is a block diagram of a device according to the present invention;  
     [0007]FIG. 2 is a block diagram of a preferred embodiment of a filter circuit according to the present invention;  
     [0008]FIG. 3 is a graph illustrating different levels of an input signal applied to a modulator of the device of FIG. 1;  
     [0009]FIG. 4 is a graph illustrating an output signal of the modulator for the different levels of the input signal;  
     [0010]FIG. 5 is a graph illustrating the performance of a filter device for the different levels of the input signals; and  
     [0011]FIG. 6 is a block diagram of a preferred embodiment of a modulator of the device according to the present invention.  
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
     [0012] The instant disclosure is provided to further explain in an enabling fashion the best modes of performing the embodiments of the present invention. The disclosure is further offered to enhance an understanding and appreciation for the inventive principles and advantages thereof, rather than to limit in any manner the invention. The invention is defined solely by the appended claims including any amendments made during the pendency of this application and all equivalents of those claims as issued.  
     [0013] It is further understood that the use of relational terms such as first and second, and the like, if any, are used solely to distinguish one from another entity, item, or action without necessarily requiring or implying any actual such relationship or order between such entities, items or actions. Much of the inventive functionality and many of the inventive principles are best implemented with or in software programs or instructions and integrated circuits (ICs) such as application specific or custom ICs. It is expected that one of ordinary skill, notwithstanding possibly significant effort and many design choices motivated by, for example, available time, current technology, and economic considerations, when guided by the concepts and principles disclosed herein will be readily capable of generating such software instructions and programs and ICs with minimal experimentation. Therefore, in the interest of brevity and minimization of any risk of obscuring the principles and concepts according to the present invention, further discussion of such software and ICs, if any, will be limited to the essentials with respect to the principles and concepts used by the preferred embodiments.  
     [0014] Referring now to the drawings in which like numerals reference like parts, FIG. 1 shows a block diagram of the device (device)  10  according to a generic implementation of the present invention. As will be more fully discussed below, the device  10  is for increasing a number of effective operating states of a circuit device  18 . The device  10  includes an input device  12 , a modulator  14 , an output device  16 , and the circuit device  18 . Each of these will be discussed in detail below.  
     [0015] The input device  12  is for receiving an input control signal and may be, for example, one or more input terminals. As will be more fully discussed below, the input control signal applied to the input device  12  should be within a range corresponding to and preferably between control signals for or that set the static operating states of the circuit device  18 .  
     [0016] The modulator  14  is for quantizing the input control signal for matching the input control signal to one or more static operating states of the circuit device. In the preferred form the modulator will switch or toggle between two states corresponding to two states of the circuit device in such a manner as to spend on a percentage basis a proportion of time that corresponds to the input control signal at one of the states and thus the other state as well. An exemplary modulator is shown in FIG. 6 in which the modulator  14  is a second order sigma delta modulator. However, the modulator  14  of the present invention is not limited to second order sigma delta modulators. Other modulators of different order may also be used.  
     [0017] The exemplary modulator  14  includes a first amplifier  48  for amplifying the input control signal with a buffered feedback for generating a first amplified output, a first integrator  50  for integrating the first amplified output to generate a first integrated output, a second amplifier  52  for amplifying the first integrated output with the buffered feedback and generating a second amplified output, a second integrator  54  for integrating the second amplified output and generating a second integrated output, a quantizer circuit  56  for generating a quantized signal based upon the second integrated output, a latch circuit  58  for providing clock control to switch the quantized signal to an output “BIT” and “BITX” and a buffer  60  for comparing the output BIT to a reference level (1.35 V in the preferred form) to provide the buffered feedback or feedback signal.  
     [0018] The amplifiers  48 ,  52  above are functionally adders or unity gain amplifiers whose outputs are equal to the difference between the signals at their respective inputs, e.g. (IN—buffered feedback) for amplifier  48 . The quantizer circuit includes a comparator that compares the second integrator output to a ground potential and provide a maximum positive output if the integrator output is greater than ground and a maximum negative output if the integrator output is less than ground. The latch circuit operates as a D flip flop that is clocked by a clock V 2  that in a preferred form is a 4 MHz square wave. The latch circuit controls the maximum frequency that the output BIT can change. Note the output will not necessarily change at this frequency but cannot switch at any greater frequency. Usually this clock frequency is set at approximately 10 times the largest frequency of interest. The buffer  60  is a comparator that provides a maximum output of 2.7V if the BIT is positive (2.7V) exceeding the 1.35V reference and a minimum or zero output if the BIT is zero.  
     [0019] During operation of the modulator  14 , an input control signal, such as an analog signal of 1.35 V is received via the input terminal  12 . This input control signal is added to the buffered feedback or the buffered feedback is subtracted from the input signal and amplified with gain one by the first amplifier  48  to provide or generate the first amplified output. The buffered feedback is either 0 or 2.7 V (logic level 0 or 1) for this particular embodiment of modulator  14 . The first integrator  50  either adds or subtracts the first amplified output to a sum that is stored therein depending on whether the first amplified output is positive or negative, respectively. This sum (first integrated output) is coupled to the second amplifier  52 , which subsequently adds (or subtracts given the input polarities) the first integrated output to the buffered feedback and amplifies with gain one the result in a manner similar to the first amplifier  48  to provide or for generating a second amplified output. The second integrator  54  in a manner similar to the first integrator  50  integrates this second amplified output. The second integrated output is coupled to the quantizer circuit  56 . In this particular modulator  14 , the quantizer circuit  56  is a one-bit quantizer for a two state circuit device. Therefore, if the second integrated output is greater than zero or ground, the quantizer circuit  56  generates a high output signal, such as 2.7 V. The quantizer circuit  56  generates a low signal, such as −2.7 V if the second integrated output is less than zero or ground. This signal is fed to the latch circuit  58 , which subsequently generates the output signal at, preferably a 4 MBit rate, as a digital 1 or 0 corresponding to 2.7V or 0V, respectively. The maximum frequency of the switching is determined by the clock signal, which is selected in accordance with the frequency range of signals to be processed by the circuit device  18  (here 4 MHz is used as the upper frequency of signals to be processed by the circuit device is less than 400 KHz. The output signal is returned to a buffer  60  for amplifying the output signal and coupling it back to the amplifiers  48 ,  52  as either 2.7 V or 0 V. Note that the modulator includes an output BIT and an inverted output BITX that is a logically inverted version of BIT.  
     [0020] Referring back to FIG. 1, the device  10  also includes an output device  16 , such as one or more terminals for applying the quantized signal to the circuit device  18  and activating, one at a time, the static operating states of the circuit device  18 . The circuit device  18 , via the quantizer circuit  56  as limited by the latch circuit  58 , switches between static operating states in a specific pattern based on the output signals provided by the latch circuit  58 . The specific pattern of the output of the latch circuit  58  is a psuedo random pattern that over the long term repeats but over any short-term period resembles a random signal. The pattern has known and time invariant statistical properties such as a mean that will correspond to the input control signal. Another way of viewing this is that the output signal at the latch circuit will spend a given proportion of time at one of the two static operating state levels that directly corresponds or correlates to the input control signal and conversely at the other static operating state a proportion of time that inversely corresponds to the input control signal. The input device  12  and the output device  16  are essentially inputs and outputs of the modulator  14 . The modulator  14  and circuit device  18  can be fabricated as a single integrated circuit using generally known and available semiconductor fabrication processes.  
     [0021] The circuit device  18  may be, for example, an amplifier, oscillator, filter or any frequency generating device with a number of static operating states. The term ‘static operating states’ refers to the number of preset or predetermined or predefined operating states for the circuit device  18 . For example, a filter may have two static filtering levels or frequency responses or an amplifier may have two static gain levels. As will be discussed below, the modulator  14  can dynamically and advantageously add new effective operating states to the circuit device  18 .  
     [0022] During operation of the device  10 , an input control signal is chosen that corresponds to an input control signal for activating a new operating state that is within a range of the static operating states of the circuit device  18 . For example, if a filter has two operating states, such as two corner frequencies or two frequency responses with one response activated with a 0 V input and another with a 2.7 V input a control signal within the range of 0 V to 2.7 V will result in a new operating state or effective operating state with a corner frequency somewhere between the static corner frequencies. This input control signal is applied to the modulator  14  via the input device  12 . The modulator  14  generates a signal or quantized signal that matches or corresponds to the input control signal and that has states that are equivalent to the control signal required to activate the static operating states of the circuit device  18 . More specifically, the quantizer circuit  56  generates output signals corresponding to the static operating states of the circuit device  18 , however the proportion of time spent at each operating state will vary with the input control signal. This may be thought of as the modulator  14  providing output signals in accordance with a specific pattern where the specific pattern is determined by the internal modulator feedback (via the buffer  60 ) and the specifics of the input control signal. In accordance of this specific pattern provided at the modulator  14  output, the circuit device  18  is commanded or driven, via the output terminal  16 , to rapidly and correspondingly switch between its static operating states. The rate of this switching is also in accordance with the specific pattern. A time averaged response of the circuit device  18  shows that it is operating at the new operating state consistent with the input control signal.  
     [0023] Referring to FIG. 2, an embodiment of the present invention will be discussed in which the present invention is implemented in a filter device  19 . The filter device  19  is a specific embodiment of the circuit device  18  together with the just discussed modulator  14  of FIG. 6. The filter device  19  includes a filter input circuit  20  and a filtering operation circuit  22 . The filter input circuit  20  includes a voltage source V2  24  for setting a common mode bias voltage, input voltage source V1  26  and a unity gain voltage controlled voltage source E0  28  (tracks V1 and generates a differential input signal) for generating the input signal that will be filtered, a ground connection  30  for providing a substrate connection to ground and voltage source V0  32 , here 2.7 VDC, for providing a power supply bias for transmission gates in the filtering circuit  22 .  
     [0024] The filtering circuit  22  includes a first high resistor R0  34  and a second high resistor R1  36  for generating a high frequency filtering or high corner frequency or high frequency response, and a first low resistor R2  35  and a second low resistor R3  37  for generating a low frequency filtering or low corner frequency or low frequency response when series coupled with R0 and R1, respectively. The filtering circuit  22  also includes a first high transmission gate  38  and a second high transmission gate  40  in electronic communication with the first and second high resistors  34 ,  36 , a first low transmission gate  42  and a second low transmission gate  44  in electronic communication with the first and second low resistors  35 ,  37 , and a filter capacitor  46  in electronic communication with and series coupled between the high and low transmission gates  38 ,  40  and  42 ,  44 , respectively. The output signal from the filter is a differential signal that appears across capacitor  46 .  
     [0025] The modulator  14  is in electronic communication with or coupled to the transmission gates  38 ,  40 , and  42 ,  44  via the output device  16  or more specifically the BIT and BITX outputs from the modulator  14 . The filter device  19  has two static filtering levels that correspond to the high resistors  34 ,  36  and the low resistors  35 ,  37 , respectively, as noted above. The high filtering level or high frequency response is activated by enabling high transmission gates  38  and  40  while disabling low transmission gates  42 ,  44  thereby creating an RC filter including a series connection of R0, capacitor  46 , and R1. More specifically the high filtering level or high frequency response is activated by applying a voltage of 2.7 V via the BITX output to the SEL inputs of high transmission gates  38 ,  40  and to the SELX input of low transmission gates  42 ,  44  and applying a voltage of 0 V via the BIT output to the SELX inputs of high transmission gates  38 ,  40  and the SEL inputs of low transmission gates  42 ,  44 . Conversely the low filtering level or low frequency response with low frequency corner is activated by enabling low transmission gates  42 ,  44  by applying 2.7 V to their SEL inputs and disabling high transmission gates  38 .  40  by applying a voltage of 0 V to their SEL inputs, with the details left to the reader given the above discussion. This results in forming a second RC filter including a series connection of R0 plus R2, capacitor  46 , and R3 plus R1, which will have a lower corner frequency than the above discussed RC filter.  
     [0026] Operation of the filter device  19  will be discussed with reference to FIGS.  3 - 5 . These figures represent surprising results arising from simulation and experimental activities that were conducted. As shown in FIG. 3, input control signals of different levels within the input values associated with the static filtering levels were applied to the modulator  14  via the input device  12  for four different time periods, each nominally 100 microseconds in length. During a first time period through the fourth time period, the input control signal was 0 V, 0.67V, 2.0 V and 2.7 V respectively. As shown in FIG. 4, during these time periods the quantized signal of the modulator  14  rapidly switched between 0 V and 2.7 V at different varying frequencies but with ever increasing proportions of time spent at the high voltage state for activating the low and high static filtering levels or frequency responses. Although the filter device  19  is switching between the high and low frequency responses, the specific pattern of this switching will result in the filter device  19  obtaining or effecting a performance level that corresponds to a new frequency response or corner frequency or filter level. FIG. 5 shows the performance of the filter device  19  during the four time periods. As shown via different amplitudes and phase shifts between the input and output signals, the four input control signals have caused the filter device  19  to obtain or generate four different corner frequencies or filtering levels, even though the device only has two static filtering levels. The filtering level obtained is proportional to the input control signal applied to the modulator  18 . More specifically, during the second and third time periods, the performance of the filter device  19  demonstrates and corresponds to two new corner frequencies or frequency responses or filtering levels that are different and distinct from either of the two static filtering levels.  
     [0027] In the above example, the filter device  19  only has two static filtering levels. However, the present invention is not limited to circuit devices having two operating states. The present invention could be applied to circuit devices having numerous static operating states. The modulator  14  would only need to generate outputs that correspond to all of the operating states. For example, if a circuit device had four operating states, the modulator  14  would have to generate a quantized signal with four different states and would have to switch between these four quantized signals with the proportion of time spent at each state corresponding to the input control signal. In this case, where the quantizer  56  would require four possible output states rather than two, these could be represented by two signals, each with two possible states.  
     [0028] The present invention is not limited to filter devices  19 . The present invention could be applied to other circuit devices such as amplifiers (not shown) or oscillators (not shown). In an amplifier, for example, an input control signal would be selected that corresponds to a gain level within static gain levels of the amplifier. The input control signal would be quantized for generating a quantized signal that switches between the two gain levels of the amplifier with the proportion of time spent at any one level corresponding to the control signal. The result when the quantized signal was applied to the amplifier would be a new gain level for the amplifier lying between the two static levels and corresponding to the input control signal. A similar technique can be used to provide a new effective frequency for an oscillator with two selectable frequencies.  
     [0029] Some of the advantages of the present invention include providing an ability to dynamically choose a new operating state of a circuit device by applying an input signal that is proportional to the new operating state. Also, the present invention eliminates a need to replace a circuit device if more operating states are needed than those provided by the circuit device, which can result in a reduced associated cost.  
     [0030] Therefore, the present invention provides a novel methodology and device for dynamically increasing the effective operating states of a circuit device by selecting an input control signal that is within a range corresponding to static operating states of the circuit device  18 , quantizing the input control signal by, for example, a modulator  14  for generating a quantized signal that corresponds to static operating states of the circuit device, and applying the quantized signal to the circuit device  18  in a specific pattern for generating a new operating state different than the static operating states of the circuit device.  
     [0031] This disclosure is intended to explain how to fashion and use various embodiments in accordance with the invention rather than to limit the true, intended, and fair scope and spirit thereof. The foregoing description is not intended to be exhaustive or to limit the invention to the precise form disclosed. Modifications or variations are possible in light of the above teachings. The embodiment(s) was chosen and described to provide the best illustration of the principles of the invention and its practical application, and to enable one of ordinary skill in the art to utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. All such modifications and variations are within the scope of the invention as determined by the appended claims, as may be amended during the pendency of this application for patent, and all equivalents thereof, when interpreted in accordance with the breadth to which they are fairly, legally, and equitably entitled.