Patent Publication Number: US-6667556-B2

Title: Flip chip adaptor package for bare die

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of application Ser. No. 09/911,160, filed Jul. 23, 2001, now U.S. Pat. No. 6,512,303, issued Jan. 28, 2003, which is a continuation of application Ser. No. 09/483,483, filed Jan. 14, 2000, now U.S. Pat. No. 6,265,766, issued Jul. 24, 2001, which is a continuation of application Ser. No. 08/948,936, filed Oct. 10, 1997, now U.S. Pat. No. 6,201,304 B1, issued Mar. 13, 2001, which is a continuation of application Ser. No. 08/574,662, filed Dec. 19, 1995, now U.S. Pat. No. 5,719,440, issued Feb. 17, 1998. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an apparatus for connecting a bare semiconductor die having a size and bond pad arrangement, either solder ball arrangement, or pin arrangement (hereinafter referred to generally as a “terminal arrangement”), which does not conform to a printed circuit board with a specific or standardized pin out, connector pad, or lead placement (hereinafter referred to generally as a “connection arrangement”). More particularly, the present invention relates to an intermediate conductor-carrying substrate (hereinafter referred to generally as an “adaptor board”) for connecting a nonconforming bare die to another printed circuit board having a given connection arrangement (hereinafter referred to generally as a “master board”). 
     2. State of the Art 
     Definitions: The following terms and acronyms will be used throughout the application and are defined as follows: 
     BGA—Ball Grid Array: An array of minute solder balls disposed on an attachment surface of a semiconductor die wherein the solder balls are refluxed for simultaneous attachment and electrical communication of the semiconductor die to a printed circuit board. 
     COB—Chip On Board: The techniques used to attach semiconductor dice to a printed circuit board, including flip chip attachment, wirebonding, and tape automated bonding (“TAB”). 
     Flip Chip: A chip or die that has bumped terminations spaced around the active surface of the die and is intended for facedown mounting. 
     Flip Chip Attachment: A method of attaching a semiconductor die to a substrate in which the die is flipped so that the connecting conductor pads on the face of the die are set on mirror-image pads on the substrate (i.e. printed circuit board) and bonded by refluxing the solder. 
     Glob Top: A glob of encapsulant material (usually epoxy or silicone or a combination thereof) surrounding a semiconductor die in the COB assembly process. 
     PGA—Pin Grid Array: An array of small pins extending substantially perpendicularly from the major plane of a semiconductor die, wherein the pins conform to a specific arrangement on a printed circuit board for attachment thereto. 
     SLICC—Slightly Larger than Integrated Circuit Carrier: An array of minute solder balls disposed on an attachment surface of a semiconductor die similar to a BGA, but having a smaller solder ball pitch and diameter than a BGA. 
     State-of-the-art COB technology generally consists of three semiconductor dice to printed circuit boards attachment techniques: flip chip attachment, wirebonding, and TAB. 
     Flip chip attachment consists of attaching a semiconductor die, generally having a BGA, a SLICC or a PGA, to a printed circuit board. With the BGA or SLICC, the solder ball arrangement on the semiconductor die must be a mirror-image of the connecting bond pads on the printed circuit board such that precise connection is made. The semiconductor die is bonded to the printed circuit board by refluxing the solder balls. With the PGA, the pin arrangement of the semiconductor die must be a mirror-image of the pin recesses on the printed circuit board. After insertion, the semiconductor die is generally bonded by soldering the pins into place. An under-fill encapsulant is generally disposed between the semiconductor die and the printed circuit board to prevent contamination. A variation of the pin-in-recess PGA is a J-lead PGA, wherein the loops of the J&#39;s are soldered to pads on the surface of the circuit board. Nonetheless, the lead and pad locations must coincide, as with the other referenced flip chip techniques. 
     Wirebonding and TAB attachment generally begins with attaching a semiconductor die to the surface of a printed circuit board with an appropriate adhesive. In wirebonding, a plurality of bond wires are attached, one at a time, from each bond pad on the semiconductor die and to a corresponding lead on the printed circuit board. The bond wires are generally attached through one of three industry-standard wirebonding techniques: ultrasonic bonding—using a combination of pressure and ultrasonic vibration bursts to form a metallurgical cold weld; thermocompression bonding—using a combination of pressure and elevated temperature to form a weld; and thermosonic bonding—using a combination of pressure, elevated temperature, and ultrasonic vibration bursts. The die may be oriented either face up or face down (with its active surface and bond pads either up or down with respect to the circuit board) for wire bonding, although face up orientation is more common. With TAB, metal tape leads are attached between the bond pads on the semiconductor die and the leads on the printed circuit board. An encapsulant is generally used to cover the bond wires and metal tape leads to prevent contamination. 
     Although the foregoing methods are effective for bonding semiconductor dice to printed circuit boards, the terminal arrangements of the dice and the connection arrangements of the boards must be designed to accommodate one another. Thus, it may be impossible to electrically connect a particular semiconductor die to a printed circuit board for which the semiconductor die terminal arrangement was not designed to match the board&#39;s connection arrangement. With either wirebond or TAB attachment, the semiconductor die bond pad may not correspond to the lead ends on the circuit board, and thus attachment is either impossible or extremely difficult due to the need for overlong wires and the potential for inter-wire contact and shorting. With flip chip attachment, if the printed circuit board connection arrangement is not a mirror-image of the solder ball or pin arrangement (terminal arrangement) on the semiconductor die, electrically connecting the flip chip to the printed circuit board is impossible. 
     Therefore, it would be advantageous to develop an apparatus for connecting a semiconductor die having a size and bond pad arrangement, solder ball arrangement, or pin arrangement (“I/O pattern”) which does not conform to a printed circuit board with a specific or standardized pin out, connection pad location, or lead placement (“I/O pattern”). 
     SUMMARY OF THE INVENTION 
     The present invention relates to an intermediate printed circuit board or other conductor-carrying substrate that functions as an adaptor board for electrically connecting one or more bare semiconductor dice of a variety of sizes and bond pad locations, solder ball arrangement, or pin arrangement, to a master printed circuit board with a specific or standardized pin out, connector pad location, or lead placement. 
     An adaptor printed circuit board or substrate (“adaptor board”) is sized and configured with an I/O pattern to accommodate its attachment to the master printed circuit board (“master board”). If the master board is configured to receive a specific pin out or specific connector pad locations, the adaptor board is configured on its master board attachment surface with pins or solder balls in mirror-image to the master board connection arrangement to make electrical contact with the specific pin out or connector pads on the printed circuit board. If the master board is configured to receive a bond wire, the adaptor board is configured and sized to provide wire bond pads on its upper surface closely adjacent the bond pads of the master board leads. The adaptor board can, of course, be configured to accommodate other attachment and electrical connection means known in the industry, as well as other components in addition to the semiconductor die or dice carried thereon. 
     On the semiconductor die side of the adaptor board, one or more semiconductor dice are attached. If a “flip chip” die is attached to the adaptor board, the adaptor board will, of course, be configured with an I/O pattern to receive the flip chip with a specific pin out or connector pad locations. The pin out or connector pads on the adaptor board are connected to circuit traces on or through the adaptor board. The circuit traces form the electrical communication path from the pin recesses or connector pads on the adaptor board to the connection points to the master board. 
     If a “leads over” die is used with the adaptor board, the bond pads on the die are wirebonded to the adaptor board. Preferably, the leads over die are attached to the adaptor board with the bond pads facing the adaptor board. The bond wires are attached to the leads over die bond pads and extend into a via or vias in the adaptor board. The bond wires are attached to an I/O pattern of adaptor board bond pads within the via from which circuit traces extend, or to leads on the master board side of the adaptor board. 
     It is, of course, understood that the leads over die can be attached to the adaptor board with the bond pads facing away from the adaptor board. Thus, the bond wires are simply attached to the bond pads on the leads over die and to a corresponding I/O pattern of adaptor board pad on the semiconductor die side of the adaptor board. 
     Preferably, the exposed circuitry of the die and the die-to-adaptor board interconnection is sealed from contamination by a glob top after wire bonding or an underflow compound in the case of a flip chip attachment. 
     Furthermore, it is understood that with the use of wire bonds, the adaptor boards can be stacked on top of each other and connected to the adaptor board as by wire bonding. 
    
    
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
     While the specification concludes with claims particularly pointing out and distinctly claiming that which is regarded as the present invention, the advantages of this invention can be more readily ascertained from the following description of the invention when read in conjunction with the accompanying drawings in which: 
     FIG. 1 is a side view of one embodiment of the present invention; 
     FIG. 2 is a side view of a second embodiment of the present invention; 
     FIG. 2A is a top view of the second embodiment of the present invention shown in FIG. 2; 
     FIG. 3 is a side view of a third embodiment of the present invention; and 
     FIG. 4 is a side view of a fourth embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1 illustrates a first embodiment of the present invention designated as a flip chip style/flip chip attachment assembly  100 . Assembly  100  comprises a semiconductor die  12  having an inverted active surface  14  with at least one flip chip electric connection  16  (such as a C4 solder bump connection, a pin connection, or a surface mount j-lead connection, by way of example) extending substantially perpendicularly from a bond pad  15  on the semiconductor die active surface  14 . The flip chip electric connections  16  are attached to an upper surface  20  of an adaptor board  18  in such a manner that the flip chip electric connections  16  make electrical contact with electrical contact elements  21  in or on the surface of adaptor board  18 . The electrical contact elements  21  make electrical communication between each flip chip electric connection  16 , through circuit traces  23  (exemplary traces shown in broken lines) in the adaptor board  18 , to at least one master board connector  22  extending substantially perpendicularly from a lower surface  24  of the adaptor board  18  to connect adaptor board  18  to an aligned terminal  31  on master board  30 . Preferably, a sealing compound  26  is disposed between the semiconductor die  12  and the adaptor board  18  to prevent contamination of the flip chip electric connections  16  and to more firmly secure semiconductor die  12  to adaptor board  18 . 
     In actual practice, there will be a plurality of terminals  31  arranged in a specific, perhaps industry-standard pattern, on master board  30 , and master board connectors will be arranged in a mirror-image pattern to terminals  31  for mating connection therewith. Master board connectors  22  and terminals  31  may comprise any electrical connection mechanism known in the art, in addition to those previously described herein. 
     FIGS. 2 and 2A illustrate a second embodiment of the present invention designated as a flip chip style/wire bond attachment assembly  200 . Components common to both FIG.  1  and FIG. 2 retain the same numeric designation. The assembly  200  comprises the semiconductor die  12  having active surface  14  with at least one flip chip electric connection  16 , as known in the art, extending substantially perpendicularly from a bond pad  15  on the semiconductor die active surface  14 . The flip chip electric connections  16  are attached to the adaptor board upper surface  20  in such a manner that the flip chip electric connections  16  make electrical contact with electrical contact elements  21  on the adaptor board  18 . The electrical contact elements  21  communicate between each flip chip electric connection  16  to bond pads  28  on the adaptor board upper surface  20  through circuit traces  23 . The adaptor board lower surface  24  is bonded to an upper surface  36  of a master board  30  with an adhesive  32 , which may comprise a liquid or gel adhesive, or an adhesive tape, all as known in the art. If desired, adhesive  32  may be a heat-conductive adhesive. A wire bond  34  extends from each adaptor board bond pad  28  to a corresponding bond pad or lead end  35  on the upper surface  36  of master board  30 , bond pad or lead end  35  communicating with other components mounted to master board  30  or with other components on other boards or other assemblies through circuit traces or other conductors known in the art. 
     FIG. 3 illustrates a third embodiment of the present invention designated as a wire bond style/flip chip attachment assembly  300 . Components which are common to the previous figures retain the same numeric designation. The assembly  300  comprises an inverted semiconductor die  12  having active surface  14  with at least one bond pad  38  on the semiconductor die active surface  14 . As illustrated, the bond pads  38  are arranged in two rows extending down the longitudinal axis of semiconductor die  12  being located transverse to the plane of the page, such an arrangement commonly being used for a “leads over” connection to frame leads extending over the die in its normal, upright position. The semiconductor die active surface  14  is bonded to the adaptor board upper surface  20  with an insulating, sealing adhesive  40 . The adaptor board  18  includes at least one or more wire bond via  42  which is located in a position or positions aligned with the semiconductor die bond pads  38 . Each individual wire bond  134  is connected to each corresponding individual semiconductor die bond pad  38 . Each wire bond  134  extends from the semiconductor die bond pad  38  to a corresponding bond pad or lead  39  on the adaptor board lower surface  24 , which communicates with master board connectors  22  through circuit traces  23 . The master board terminals  31  are in electrical communication with at least one master board connector  22  extending substantially perpendicularly from the adaptor board lower surface  24 . Preferably, a sealant  44  encases the bond wires  134  and seals the wire bond via  42  to prevent contamination and damage to the wire bonds. 
     FIG. 4 illustrates a fourth embodiment of the present invention designated as a wire bond style/wire bond attachment assembly  400 . Components which are common to the previous figures retain the same numeric designation. The assembly  400  comprises the semiconductor die  12  having active surface  14  with at least one bond pad  38  on the semiconductor die active surface  14 . As with the embodiment of FIG. 3, semiconductor die  12 , in this instance, employs bond pads  38  in a “leads over” configuration. The semiconductor die active surface  14  is bonded to the master board upper surface  20  with an insulating, sealing adhesive  40 . The adaptor board  18  includes at least one wire bond via  42  which is located in a position or positions aligned with the semiconductor die bond pads  38 . Each individual wire bond  134  is connected to each corresponding semiconductor die bond pad  38 . Each wire bond  134  extends from the semiconductor die bond pad  38  to a corresponding bond pad  46  within the wire bond via  42 . The via bond pads  46  are in electrical communication through circuit traces  23  with at least one corresponding adaptor board bond pad  28 . The adaptor board lower surface  24  is bonded to the master board upper surface  36  with the adhesive  32 . Wire bonds  34  extend from the master board upper surface  20  to a corresponding bond pad or lead on the master board upper surface  36 . Preferably, the wire bond via sealant  44  encases the bond wires  134  and seals the wire bond via  42  to prevent contamination. 
     Having thus described in detail preferred embodiments of the present invention, it is to be understood that the invention defined by the appended claims is not to be limited by particular details set forth in the above description as many apparent variations thereof are possible without departing from the spirit or scope thereof.