Patent Publication Number: US-11047686-B2

Title: System for digital cancellation of clock jitter induced noise in a gyroscope with provides better power effect

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application claims priority to U.S. Provisional Application Ser. No. 62/691,576 entitled “DIGITAL CANCELATION OF CLOCK JITTER INDUCED NOISE” by Mayer et al., filed Jun. 28, 2018, the disclosure of which is hereby incorporated herein by reference in its entirety. 
    
    
     TECHNICAL FIELD 
     This disclosure relates generally to gyroscopic sensors and, more particularly, to circuits for correcting error in an output signal from a gyroscopic sensor. 
     BACKGROUND 
     Gyroscopes are often used for sensing a rotation or an attitude of an object along one or more axes of rotation. For example, gyroscopes have long been used in naval vessels, aircraft, and spacecraft to identify rotation of the craft and for use in stability control systems. More recently, gyroscopes have been incorporated in micro-electromechanical (MEMs) devices. While classical gyroscopes rotate around an axis, MEMS gyroscopes typically include vibrating elements that are formed using photolithographic processes in an integrated circuit that is suitable for mounting to a printed circuit board or with other electronic components. As the MEMS device rotates around an axis, the plane of oscillation for the vibrating element tends to remain constant, and a modulated electrical signal from the MEMS sensor corresponds to the attitude of the support for the MEMS device around the axis. Some MEMS devices include multiple vibrating gyroscope elements that enable sensing of rotation along multiple axes in a three-dimensional space 
     For the continued expansion of gyroscopes into more demanding CE applications, a move to smaller process nodes for the ASIC implementation and a shift to more digital centric designs can be observed. An efficient way to implement the shift to more digital is to digitize the signals coming from the gyroscope right at the beginning. 
     The output of a vibratory MEMS gyroscope has two main signal components. The desired so-called rate signal and the so-called quadrature signal. The latter is an unwanted error signal that has the same frequency but 90° phase shift compared to the rate signal. This quadrature signal can be several factors larger than the full scale rate signal that needs to be measured by the system. 
     Since the quadrature signal has the same frequency as the rate signal the sampling of the quadrature signal will fold the close-in phase noise of the oscillator into the signal band and therefore degrade the noise performance of the system. The larger the quadrature the larger the noise penalty. 
     Due to the large quadrature signals of today&#39;s MEMS gyroscopes, the direct sampling of the gyroscope output requires a clock signal with very small clock jitter in order to avoid noise folding of that jitter in the presence of a large quadrature signal. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  depicts a first embodiment of a circuit for canceling clock jitter induced noise in a digital gyroscope. 
         FIG. 2  depicts a second embodiment of a circuit for canceling clock jitter induced noise in a digital gyroscope. 
         FIG. 3  depicts a third embodiment of a circuit for canceling clock jitter induced noise in a digital gyroscope. 
     
    
    
     DETAILED DESCRIPTION 
     For the purposes of promoting an understanding of the principles of the disclosure, reference will now be made to the embodiments illustrated in the drawings and described in the following written specification. It is understood that no limitation to the scope of the disclosure is thereby intended. It is further understood that the present disclosure includes any alterations and modifications to the illustrated embodiments and includes further applications of the principles of the disclosure as would normally occur to a person of ordinary skill in the art to which this disclosure pertains. 
     As used herein, the term in-phase signal refers to a signal from a sensor, such as a gyroscope sensor, that carries information from the sensor corresponding to a property that the sensor measures during operation. For example, the in-phase signal from a vibratory gyroscope is a modulated signal that corresponds to a motion of a vibrating element in the gyroscope sensor. 
     As used herein, the term quadrature-signal refers to another signal from the sensor that has a quadrature phase (90° phase offset) from the in-phase signal. The quadrature-phase signal is also referred to as a quadrature error signal. Ideally, the in-phase signal is completely separated from the quadrature-phase signal. However, in practical circuits, the phase-offset error can make measurement of only the in-phase signal difficult. 
     In a highly digital gyroscope not only the rate signal (including the quadrature) but also the displacement signal of the drive part is sampled with an ADC. This displacement signal has the same frequency and phase as the quadrature signal that gets sampled in the rate channels. Since the drive signal is sampled with the same clock, the sampled drive signal will have the same close-in phase noise folded into the signal band as the sampled quadrature in the rate signal. Therefore we can subtract the sampled drive signal from the sampled rate signal to eliminate the clock jitter induced noise in the rate signal. The advantage of this technique is that it relaxes the close-in phase noise requirement of the PLL, since it can eliminate this noise in the digital backend, and therefore allows for a low power PLL implementation. 
     In contrast to building a very low noise oscillator that puts high restrictions on the power and noise trade off, the technique presented here allows to cancel the clock-jitter-induced noise later on in the digital part. Therefore the noise requirement for the oscillator becomes less stringent and a much better power and noise trade off can be achieved. 
       FIG. 1  is a schematic diagram of one embodiment of an open-loop gyroscope circuit  100  that is configured to cancel clock jitter induced noise from the output signal. The circuit  100  includes a gyroscope  102  and an integrated circuit  103 , such as an application-specific integrated circuit (ASIC). The gyroscope  102  includes at least one sensing element  108  for sensing along at least one axis. The gyroscope  102  may include three sensing elements  108  for sensing along the three axes (e.g., x, y, z). The gyroscope also includes at least one drive axis  110 . 
     In the circuit  100 , the gyroscope  102  is a vibratory gyroscope such as a MEMS gyroscope that is used in mobile electronic devices or any other suitable vibratory gyroscope. The sensing elements  108  sense rotation about three sensing axes, each of which is configured to generate a signal corresponding to the motion of a vibrating element and corresponding rotation of the gyroscope along each of an x, y, and z axis, respectively. The x, y, and z axes correspond to three orthogonal axes of rotation in the physical world. In another embodiment, the gyroscope includes only one axis or a different configuration of multiple sensing elements that are arranged on multiple axes. 
     In  FIG. 1 , the ASIC  103  includes sensing channels  106 , a drive channel  104 , and digital processors  119 ,  125 . A separate sensing channel  106  is electrically connected to the output of each sensing axis  108 . Each sensing channel  106  includes an analog-to-digital converter (ADC)  124  and a digital processor  125  (i.e., digital backend). The digital processors  119 ,  125  is embodied as a microprocessor, microcontroller, digital signal processor (DSP), application specific integrated circuit (ASIC), field programmable gate array (FPGA), or any other digital processing device. The digital processor  125  is configured to implement a digital in-phase demodulator  126 , a digital quadrature-phase demodulator  128 , and filters  130 ,  132  for the demodulators. 
     The in-phase demodulator  126  generates a demodulated signal corresponding to the in-phase component (I sense ) of the digitized output signal from the associated sense channel  106  via the ADC  124 . The quadrature-phase demodulator  128  generates a demodulated signal corresponding to the quadrature-phase component (Q sense ) of the digitized output signal from the ADC  124 . The digital processor  125  applies at least one filter  130  filter, e.g., low-pass filter, to the in-phase signal (I sense ) from the in-phase demodulator  126  and at least one filter  132 , e.g., low-pass filter, to the quadrature-phase signal (Q sense ) from the quadrature-phase demodulator  128 . 
     The drive axis  110  receives a drive signal that generates oscillation in the vibrating members of each of the sensing axes  108 . The drive axis  110  drives the sense mass at a predetermined frequency to enable each of the sense axes  108  to oscillate at a predetermined frequency. The drive channel  104  is connected to the output of the drive axis  110 . The drive channel  104  includes an ADC  112 , a digital in-phase demodulator  114  for demodulating an in-phase component (I drive ) of the drive signal, a digital quadrature-phase demodulator  116  for demodulating a quadrature-phase component (Q drive ) of the drive signal, and at least one filter  118 , e.g., low-pass filter, for filtering the in-phase component I drive  of the drive signal. 
     The drive channel  104  may also include a phase-locked loop (PLL) controller  120  and an amplitude regulator  122 . The output of the quadrature-phase demodulator  116  (Q drive ) is received by the amplitude regulator  122 . The amplitude regulator  122  generates the drive signal that is fed back to the drive axis  110 . The amplitude regulator  122  controls the amplitude of the drive signal to maintain the amplitude of the oscillation for the gyroscope  102  at a predetermined level. The demodulators  114 ,  116  and filter(s)  118  may be implemented by the digital processor. 
     The PLL controller  120  receives the filtered in-phase component (I drive ) of the drive signal from the filter  118  and generates a clock control signal that is supplied to a digital controlled oscillator (DCO)  121 . The DCO  121  outputs a clock signal based on the clock control signal to a demodulation clock signal generator  123  which generates demodulation clock signals for the I/O demodulators  114 ,  116 ,  126 ,  128 . 
     To cancel the clock jitter induced noise, the filtered in-phase component (I drive ) of the drive signal from filter  118  and the filtered in-phase component (I sense ) of the rate signal from filter  130  are supplied as inputs to a digital adder/subtractor  134  where the digital in-phase drive signal (I drive ) is subtracted from the digital in-phase rate signal I sense  to cancel the clock jitter induced noise from the rate signal. Prior to reaching the adder/subtractor  134 , the in-phase component (I drive ) of the drive signal may be scaled by a scaling factor at multiplier  131 . The scaling factor is set by the output of the quadrature-phase demodulator  128  which is supplied to the multiplier  131  after being filtered by at least one filter  132 , e.g., low-pass filter. The output of the digital adder/subtractor  134  is the output signal for the associated sense axis of the gyroscope. 
       FIG. 2  depicts another embodiment of an open-loop gyroscope readout circuit  100 ′ that is configured to cancel clock jitter induced noise in a digital gyroscope.  FIG. 2  represents a more general solution to the problem of canceling clock jitter induced noise. In  FIG. 2 , the circuit  100 ′ includes a gyroscope  102  and an ASIC  103  with at least one drive channel  104 , and at least one sense channel  106 . In the embodiment of  FIG. 2 , the drive channel  104  includes an ADC  112 , a digital PLL controller  120  and a digital amplitude regulator  122 . The at least one sense channel  106  includes an ADC  124  and digital signal processing  140 . In this embodiment, the backend digital signal processing  140  is configured to subtract the sampled drive signal from the sampled rate signal to eliminate the clock jitter induced noise in the rate signal. 
     The embodiment of  FIG. 3  is similar to the embodiment of  FIG. 1  except the quadrature phase demodulator  114  and filter  118  for the in-phase drive signal I drive  are incorporated into the digital processing circuits for the sense channel. In the embodiments described above, the sense and drive ADCs may be realized by delta-sigma modulators. In addition, in the embodiments described above, the digital filters may be realized by decimation filters. 
     While the disclosure has been illustrated and described in detail in the drawings and foregoing description, the same should be considered as illustrative and not restrictive in character. It is understood that only the preferred embodiments have been presented and that all changes, modifications and further applications that come within the spirit of the disclosure are desired to be protected.