Patent Publication Number: US-2022239952-A1

Title: Filters for motion compensation interpolation with reference down-sampling

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     The disclosure claims the benefits of priority to U.S. Provisional Application No. 62/904,608, filed Sep. 23, 2019, and U.S. Provisional Application 62/906,930, filed Sep. 27, 2019, both of which are incorporated herein by reference in their entireties. 
    
    
     TECHNICAL FIELD 
     The present disclosure generally relates to video processing, and more particularly, to filters for motion compensation interpolation with reference resampling. 
     BACKGROUND 
     A video is a set of static pictures (or “frames”) capturing the visual information. To reduce the storage memory and the transmission bandwidth, a video can be compressed before storage or transmission and decompressed before display. The compression process is usually referred to as encoding and the decompression process is usually referred to as decoding. There are various video coding formats which use standardized video coding technologies, most commonly based on prediction, transform, quantization, entropy coding and in-loop filtering. The video coding standards, such as the High Efficiency Video Coding (HEVC/H.265) standard, the Versatile Video Coding (VVC/H.266) standard, AVS standards, specifying the specific video coding formats, are developed by standardization organizations. With more and more advanced video coding technologies being adopted in the video standards, the coding efficiency of the new video coding standards get higher and higher. 
     SUMMARY OF THE DISCLOSURE 
     Embodiments of the disclosure provide a computer-implemented method for performing motion compensation interpolation with reference resampling. The method can include: in response to a target picture and a reference picture having different resolutions, applying a band-pass filter to the reference picture, to perform a motion compensated interpolation with reference down-sampling to generate a reference block; and processing a block of the target picture using the reference block. 
     Embodiments of the disclosure further provide a system for performing motion compensation interpolation. The system can include: a memory storing a set of instructions; and at least one processor configured to execute set of instructions to cause the device to perform: in response to a target picture and a reference picture having different resolutions, applying a band-pass filter to the reference picture, to perform a motion compensated interpolation with reference down-sampling to generate a reference block; and processing a block of the target picture using the reference block. 
     Embodiments of the disclosure further also provide a non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computer system to cause the computer system to perform a method for processing video content. The method can include: in response to a target picture and a reference picture having different resolutions, applying a band-pass filter to the reference picture, to perform a motion compensated interpolation with reference down-sampling to generate a reference block; and processing a block of the target picture using the reference block. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Embodiments and various aspects of the present disclosure are illustrated in the following detailed description and the accompanying figures. Various features shown in the figures are not drawn to scale. 
         FIG. 1  illustrates structures of an exemplary video sequence, consistent with embodiments of the disclosure, consistent with embodiments of the disclosure. 
         FIG. 2A  illustrates a schematic diagram of an exemplary encoding process of a hybrid video coding system, consistent with embodiments of the disclosure. 
         FIG. 2B  illustrates a schematic diagram of another exemplary encoding process of a hybrid video coding system, consistent with embodiments of the disclosure. 
         FIG. 3A  illustrates a schematic diagram of an exemplary decoding process of a hybrid video coding system, consistent with embodiments of the disclosure. 
         FIG. 3B  illustrates a schematic diagram of another exemplary decoding process of a hybrid video coding system, consistent with embodiments of the disclosure. 
         FIG. 4  is a block diagram of an exemplary apparatus for encoding or decoding a video, consistent with embodiments of the disclosure. 
         FIG. 5  illustrates a schematic diagram of reference pictures and a current picture, consistent with embodiments of the disclosure. 
         FIG. 6  illustrates a table of exemplary 6-tap DCT-based interpolation filter coefficients for a 4×4 luma block, consistent with embodiments of the disclosure. 
         FIG. 7  illustrates a table of exemplary 8-tap interpolation filter coefficients for luma components, consistent with embodiments of the disclosure. 
         FIG. 8  illustrates a table of exemplary 4-tap 32-phase interpolation filter coefficients for chroma components, consistent with embodiments of the disclosure. 
         FIG. 9  illustrates frequency response of an exemplary ideal low pass filter, consistent with embodiments of the disclosure. 
         FIG. 10  illustrates a table of exemplary 12-tap cosine-windowed-sinc interpolation filter coefficients for 2:1 down-sampling, consistent with embodiments of the disclosure. 
         FIG. 11  illustrates a table of exemplary 12-tap cosine-windowed-sinc interpolation filter coefficients for 1.5:1 down-sampling, consistent with embodiments of the disclosure. 
         FIG. 12  illustrates an exemplary luma sample interpolation filtering process for reference down-sampling, consistent with embodiments of the disclosure. 
         FIG. 13  illustrates an exemplary chroma sample interpolation filtering process for reference down-sampling, consistent with embodiments of the disclosure. 
         FIG. 14  illustrates an exemplary luma sample interpolation filtering process for reference down-sampling, consistent with embodiments of the disclosure. 
         FIG. 15  illustrates an exemplary chroma sample interpolation filtering process for reference down-sampling, consistent with embodiments of the disclosure. 
         FIG. 16  illustrates an exemplary luma sample interpolation filtering process for reference down-sampling, consistent with embodiments of the disclosure. 
         FIG. 17  illustrates an exemplary chroma sample interpolation filtering process for reference down-sampling, consistent with embodiments of the disclosure. 
         FIG. 18  illustrates an exemplary chroma sample interpolation filtering process for reference down-sampling, consistent with embodiments of the disclosure. 
         FIG. 19  illustrates an exemplary 8-tap filter for MC interpolation with reference down-sampling at ratio 2:1, consistent with embodiments of the disclosure. 
         FIG. 20  illustrates an exemplary 8-tap filter for MC interpolation with reference down-sampling at ratio 1.5:1, consistent with embodiments of the disclosure. 
         FIG. 21  illustrates an exemplary 8-tap filter for MC interpolation with reference down-sampling at ratio 2:1 with 32 phases, consistent with embodiments of the disclosure. 
         FIG. 22  illustrates an exemplary 8-tap filter for MC interpolation with reference down-sampling at ratio 1.5:1 with 32 phases, consistent with embodiments of the disclosure. 
         FIG. 23  illustrates a table of exemplary 6-tap filter coefficients for 4×4 luma block MC interpolation with reference down-sampling ratio 2:1 with 16 phases, consistent with embodiments of the disclosure. 
         FIG. 24  illustrates a table of exemplary 6-tap filter coefficients for luma 4×4 block MC interpolation with reference down-sampling ratio 1.5:1 with 16 phases, consistent with embodiments of the disclosure. 
         FIG. 25  illustrates a table of an exemplary 8-tap filter for MC interpolation with reference down-sampling at ratio 2:1, consistent with embodiments of the disclosure. 
         FIG. 26  illustrates an exemplary 8-tap filter for MC interpolation with reference down-sampling at ratio 1.5:1, consistent with embodiments of the disclosure. 
         FIG. 27  illustrates an exemplary 6-tap filter for MC interpolation with reference down-sampling at ratio 2:1 with 16 phases, consistent with embodiments of the disclosure. 
         FIG. 28  illustrates an exemplary 6-tap filter for MC interpolation with reference down-sampling at ratio 1.5:1 with 16 phases, consistent with embodiments of the disclosure. 
         FIG. 29  illustrates an exemplary 4-tap filter for MC interpolation with reference down-sampling at ratio 2:1 with 32-phases, consistent with embodiments of the disclosure. 
         FIG. 30  illustrates an exemplary 4-tap filter for MC interpolation with reference down-sampling at ratio 1.5:1 with 32-phases, consistent with embodiments of the disclosure. 
         FIG. 31  illustrates an exemplary 8-tap filter for MC interpolation with reference down-sampling at ratio 2:1, consistent with embodiments of the disclosure. 
         FIG. 32  illustrates an exemplary 8-tap filter for MC interpolation with reference down-sampling at ratio 1.5:1, consistent with embodiments of the disclosure. 
         FIG. 33  illustrates an exemplary 6-tap filter for MC interpolation with reference down-sampling at ratio 2:1 with 16 phases, consistent with embodiments of the disclosure. 
         FIG. 34  illustrates an exemplary 6-tap filter for MC interpolation with reference down-sampling at ratio 1.5:1 with 16 phases, consistent with embodiments of the disclosure. 
         FIG. 35  illustrates an exemplary 4-tap filter for MC interpolation with reference downsampling at ratio 2:1 with 32-phases, consistent with embodiments of the disclosure. 
         FIG. 36  illustrates an exemplary 4-tap filter for MC interpolation with reference downsampling at ratio 1.5:1 with 32-phases, consistent with embodiments of the disclosure. 
         FIG. 37  illustrates an example of filter coefficient signaling, consistent with embodiments of the disclosure. 
         FIG. 38  illustrates an exemplary syntax structure to signal the resampling ratio and corresponding filter set, consistent with embodiments of the disclosure. 
         FIG. 39  is a flowchart of an exemplary method for processing video content, consistent with embodiments of the disclosure. 
         FIG. 40  is a flowchart of an exemplary method for rounding filter coefficients of a cosine windowed-sinc filter, consistent with embodiments of the disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the invention. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the invention as recited in the appended claims. Particular aspects of the present disclosure are described in greater detail below. The terms and definitions provided herein control, if in conflict with terms and/or definitions incorporated by reference. 
     Video coding systems are often used to compress digital video signals, for instance to reduce storage space consumed or to reduce transmission bandwidth consumption associated with such signals. With high-definition (HD) videos (e.g., having a resolution of 1920×1080 pixels) gaining popularity in various applications of video compression, such as online video streaming, video conferencing, or video monitoring, it is a continuous need to develop video coding tools that can increase compression efficiency of video data. 
     For example, video monitoring applications are increasingly and extensively used in many application scenarios (e.g., security, traffic, environment monitoring, or the like), and the numbers and resolutions of the monitoring devices keep growing rapidly. Many video monitoring application scenarios prefer to provide HD videos to users to capture more information, which has more pixels per frame to capture such information. However, an HD video bitstream can have a high bitrate that demands high bandwidth for transmission and large space for storage. For example, a monitoring video stream having an average 1920×1080 resolution can require a bandwidth as high as 4 Mbps for real-time transmission. Also, the video monitoring generally monitors 7×24 continuously, which can greatly challenge a storage system, if the video data is to be stored. The demand for high bandwidth and large storage of the HD videos has therefore become a major limitation to its large-scale deployment in video monitoring. 
     A video is a set of static pictures (or “frames”) arranged in a temporal sequence to store visual information. A video capture device (e.g., a camera) can be used to capture and store those pictures in a temporal sequence, and a video playback device (e.g., a television, a computer, a smartphone, a tablet computer, a video player, or any end-user terminal with a function of display) can be used to display such pictures in the temporal sequence. Also, in some applications, a video capturing device can transmit the captured video to the video playback device (e.g., a computer with a monitor) in real-time, such as for monitoring, conferencing, or live broadcasting. 
     For reducing the storage space and the transmission bandwidth needed by such applications, the video can be compressed before storage and transmission and decompressed before the display. The compression and decompression can be implemented by software executed by a processor (e.g., a processor of a generic computer) or specialized hardware. The module for compression is generally referred to as an “encoder,” and the module for decompression is generally referred to as a “decoder.” The encoder and decoder can be collectively referred to as a “codec.” The encoder and decoder can be implemented as any of a variety of suitable hardware, software, or a combination thereof. For example, the hardware implementation of the encoder and decoder can include circuitry, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, or any combinations thereof. The software implementation of the encoder and decoder can include program codes, computer-executable instructions, firmware, or any suitable computer-implemented algorithm or process fixed in a computer-readable medium. Video compression and decompression can be implemented by various algorithms or standards, such as MPEG-1, MPEG-2, MPEG-4, H.26x series, or the like. In some applications, the codec can decompress the video from a first coding standard and re-compress the decompressed video using a second coding standard, in which case the codec can be referred to as a “transcoder.” 
     The video encoding process can identify and keep useful information that can be used to reconstruct a picture and disregard unimportant information for the reconstruction. If the disregarded, unimportant information cannot be fully reconstructed, such an encoding process can be referred to as “lossy.” Otherwise, it can be referred to as “lossless.” Most encoding processes are lossy, which is a tradeoff to reduce the needed storage space and the transmission bandwidth. 
     The useful information of a picture being encoded (referred to as a “current picture”) include changes with respect to a reference picture (e.g., a picture previously encoded and reconstructed). Such changes can include position changes, luminosity changes, or color changes of the pixels, among which the position changes are mostly concerned. Position changes of a group of pixels that represent an object can reflect the motion of the object between the reference picture and the current picture. 
     A picture coded without referencing another picture (i.e., it is its own reference picture) is referred to as an “I-picture.” A picture coded using a previous picture as a reference picture is referred to as a “P-picture.” A picture coded using both a previous picture and a future picture as reference pictures (i.e., the reference is “bi-directional”) is referred to as a “B-picture.” 
     As previously mentioned, video monitoring that uses HD videos faces challenges of demands of high bandwidth and large storage. For addressing such challenges, the bitrate of the encoded video can be reduced. Among the I-, P-, and B-pictures, I-pictures have the highest bitrate. Because the backgrounds of most monitoring videos are nearly static, one way to reduce the overall bitrate of the encoded video can be using fewer I-pictures for video encoding. 
     However, the improvement of using fewer I-pictures can be trivial because the I-pictures are typically not dominant in the encoded video. For example, in a typical video bitstream, the ratio of I-, B-, and P-pictures can be 1:20:9, in which the I-pictures can account for less than 10% of the total bitrate. In other words, in such an example, even all I-pictures are removed, the reduced bitrate can be no more than 10%. 
       FIG. 1  illustrates structures of an example video sequence  100 , consistent with embodiments of the disclosure. Video sequence  100  can be a live video or a video having been captured and archived. Video  100  can be a real-life video, a computer-generated video (e.g., computer game video), or a combination thereof (e.g., a real-life video with augmented-reality effects). Video sequence  100  can be inputted from a video capture device (e.g., a camera), a video archive (e.g., a video file stored in a storage device) containing previously captured video, or a video feed interface (e.g., a video broadcast transceiver) to receive video from a video content provider. 
     As shown in  FIG. 1 , video sequence  100  can include a series of pictures arranged temporally along a timeline, including pictures  102 ,  104 ,  106 , and  108 . Pictures  102 - 106  are continuous, and there are more pictures between pictures  106  and  108 . In  FIG. 1 , picture  102  is an I-picture, the reference picture of which is picture  102  itself. Picture  104  is a P-picture, the reference picture of which is picture  102 , as indicated by the arrow. Picture  106  is a B-picture, the reference pictures of which are pictures  104  and  108 , as indicated by the arrows. In some embodiments, the reference picture of a picture (e.g., picture  104 ) can be not immediately preceding or following the picture. For example, the reference picture of picture  104  can be a picture preceding picture  102 . It should be noted that the reference pictures of pictures  102 - 106  are only examples, and this disclosure does not limit embodiments of the reference pictures as the examples shown in  FIG. 1 . 
     Typically, video codecs do not encode or decode an entire picture at one time due to the computing complexity of such tasks. Rather, they can split the picture into basic segments, and encode or decode the picture segment by segment. Such basic segments are referred to as basic processing units (“BPUs”) in this disclosure. For example, structure  110  in  FIG. 1  shows an example structure of a picture of video sequence  100  (e.g., any of pictures  102 - 108 ). In structure  110 , a picture is divided into 4×4 basic processing units, the boundaries of which are shown as dash lines. In some embodiments, the basic processing units can be referred to as “macroblocks” in some video coding standards (e.g., MPEG family, H.261, H.263, or H.264/AVC), or as “coding tree units” (“CTUs”) in some other video coding standards (e.g., H.265/HEVC or H.266/VVC). The basic processing units can have variable sizes in a picture, such as 128×128, 64×64, 32×32, 16×16, 4×8, 16×32, or any arbitrary shape and size of pixels. The sizes and shapes of the basic processing units can be selected for a picture based on the balance of coding efficiency and levels of details to be kept in the basic processing unit. 
     The basic processing units can be logical units, which can include a group of different types of video data stored in a computer memory (e.g., in a video frame buffer). For example, a basic processing unit of a color picture can include a luma component (Y) representing achromatic brightness information, one or more chroma components (e.g., Cb and Cr) representing color information, and associated syntax elements, in which the luma and chroma components can have the same size of the basic processing unit. The luma and chroma components can be referred to as “coding tree blocks” (“CTBs”) in some video coding standards (e.g., H.265/HEVC or H.266/VVC). Any operation performed to a basic processing unit can be repeatedly performed to each of its luma and chroma components. 
     Video coding has multiple stages of operations, examples of which will be detailed in  FIGS. 2A-2B and 3A-3B . For each stage, the size of the basic processing units can still be too large for processing, and thus can be further divided into segments referred to as “basic processing sub-units” in this disclosure. In some embodiments, the basic processing sub-units can be referred to as “blocks” in some video coding standards (e.g., MPEG family, H.261, H.263, or H.264/AVC), or as “coding units” (“CUs”) in some other video coding standards (e.g., H.265/HEVC or H.266/VVC). A basic processing sub-unit can have the same or smaller size than the basic processing unit. Similar to the basic processing units, basic processing sub-units are also logical units, which can include a group of different types of video data (e.g., Y, Cb, Cr, and associated syntax elements) stored in a computer memory (e.g., in a video frame buffer). Any operation performed to a basic processing sub-unit can be repeatedly performed to each of its luma and chroma components. It should be noted that such division can be performed to further levels depending on processing needs. It should also be noted that different stages can divide the basic processing units using different schemes. 
     For example, at a mode decision stage (an example of which will be detailed in  FIG. 2B ), the encoder can decide what prediction mode (e.g., intra-picture prediction or inter-picture prediction) to use for a basic processing unit, which can be too large to make such a decision. The encoder can split the basic processing unit into multiple basic processing sub-units (e.g., CUs as in H.265/HEVC or H.266/VVC), and decide a prediction type for each individual basic processing sub-unit. 
     For another example, at a prediction stage (an example of which will be detailed in  FIG. 2A ), the encoder can perform prediction operation at the level of basic processing sub-units (e.g., CUs). However, in some cases, a basic processing sub-unit can still be too large to process. The encoder can further split the basic processing sub-unit into smaller segments (e.g., referred to as “prediction blocks” or “PBs” in H.265/HEVC or H.266/VVC), at the level of which the prediction operation can be performed. 
     For another example, at a transform stage (an example of which will be detailed in  FIG. 2A ), the encoder can perform a transform operation for residual basic processing sub-units (e.g., CUs). However, in some cases, a basic processing sub-unit can still be too large to process. The encoder can further split the basic processing sub-unit into smaller segments (e.g., referred to as “transform blocks” or “TBs” in H.265/HEVC or H.266/VVC), at the level of which the transform operation can be performed. It should be noted that the division schemes of the same basic processing sub-unit can be different at the prediction stage and the transform stage. For example, in H.265/HEVC or H.266/VVC, the prediction blocks and transform blocks of the same CU can have different sizes and numbers. 
     In structure  110  of  FIG. 1 , basic processing unit  112  is further divided into 3×3 basic processing sub-units, the boundaries of which are shown as dotted lines. Different basic processing units of the same picture can be divided into basic processing sub-units in different schemes. 
     In some implementations, to provide the capability of parallel processing and error resilience to video encoding and decoding, a picture can be divided into regions for processing, such that, for a region of the picture, the encoding or decoding process can depend on no information from any other region of the picture. In other words, each region of the picture can be processed independently. By doing so, the codec can process different regions of a picture in parallel, thus increasing the coding efficiency. Also, when data of a region is corrupted in the processing or lost in network transmission, the codec can correctly encode or decode other regions of the same picture without reliance on the corrupted or lost data, thus providing the capability of error resilience. In some video coding standards, a picture can be divided into different types of regions. For example, H.265/HEVC and H.266/VVC provide two types of regions: “slices” and “tiles.” It should also be noted that different pictures of video sequence  100  can have different partition schemes for dividing a picture into regions. 
     For example, in  FIG. 1 , structure  110  is divided into three regions  114 ,  116 , and  118 , the boundaries of which are shown as solid lines inside structure  110 . Region  114  includes four basic processing units. Each of regions  116  and  118  includes six basic processing units. It should be noted that the basic processing units, basic processing sub-units, and regions of structure  110  in  FIG. 1  are only examples, and this disclosure does not limit embodiments thereof. 
       FIG. 2A  illustrates a schematic diagram of an example encoding process  200 A, consistent with embodiments of the disclosure. For example, the encoding process  200 A can be performed by an encoder. As shown in  FIG. 2A , the encoder can encode video sequence  202  into video bitstream  228  according to process  200 A. Similar to video sequence  100  in  FIG. 1 , video sequence  202  can include a set of pictures (referred to as “original pictures”) arranged in a temporal order. Similar to structure  110  in  FIG. 1 , each original picture of video sequence  202  can be divided by the encoder into basic processing units, basic processing sub-units, or regions for processing. In some embodiments, the encoder can perform process  200 A at the level of basic processing units for each original picture of video sequence  202 . For example, the encoder can perform process  200 A in an iterative manner, in which the encoder can encode a basic processing unit in one iteration of process  200 A. In some embodiments, the encoder can perform process  200 A in parallel for regions (e.g., regions  114 - 118 ) of each original picture of video sequence  202 . 
     In  FIG. 2A , the encoder can feed a basic processing unit (referred to as an “original BPU”) of an original picture of video sequence  202  to prediction stage  204  to generate prediction data  206  and predicted BPU  208 . The encoder can subtract predicted BPU  208  from the original BPU to generate residual BPU  210 . The encoder can feed residual BPU  210  to transform stage  212  and quantization stage  214  to generate quantized transform coefficients  216 . The encoder can feed prediction data  206  and quantized transform coefficients  216  to binary coding stage  226  to generate video bitstream  228 . Components  202 ,  204 ,  206 ,  208 ,  210 ,  212 ,  214 ,  216 ,  226 , and  228  can be referred to as a “forward path.” During process  200 A, after quantization stage  214 , the encoder can feed quantized transform coefficients  216  to inverse quantization stage  218  and inverse transform stage  220  to generate reconstructed residual BPU  222 . The encoder can add reconstructed residual BPU  222  to predicted BPU  208  to generate prediction reference  224 , which is used in prediction stage  204  for the next iteration of process  200 A. Components  218 ,  220 ,  222 , and  224  of process  200 A can be referred to as a “reconstruction path.” The reconstruction path can be used to ensure that both the encoder and the decoder use the same reference data for prediction. 
     The encoder can perform process  200 A iteratively to encode each original BPU of the original picture (in the forward path) and generate predicted reference  224  for encoding the next original BPU of the original picture (in the reconstruction path). After encoding all original BPUs of the original picture, the encoder can proceed to encode the next picture in video sequence  202 . 
     Referring to process  200 A, the encoder can receive video sequence  202  generated by a video capturing device (e.g., a camera). The term “receive” used herein can refer to receiving, inputting, acquiring, retrieving, obtaining, reading, accessing, or any action in any manner for inputting data. 
     At prediction stage  204 , at a current iteration, the encoder can receive an original BPU and prediction reference  224 , and perform a prediction operation to generate prediction data  206  and predicted BPU  208 . Prediction reference  224  can be generated from the reconstruction path of the previous iteration of process  200 A. The purpose of prediction stage  204  is to reduce information redundancy by extracting prediction data  206  that can be used to reconstruct the original BPU as predicted BPU  208  from prediction data  206  and prediction reference  224 . 
     Ideally, predicted BPU  208  can be identical to the original BPU. However, due to non-ideal prediction and reconstruction operations, predicted BPU  208  is generally slightly different from the original BPU. For recording such differences, after generating predicted BPU  208 , the encoder can subtract it from the original BPU to generate residual BPU  210 . For example, the encoder can subtract values (e.g., greyscale values or RGB values) of pixels of predicted BPU  208  from values of corresponding pixels of the original BPU. Each pixel of residual BPU  210  can have a residual value as a result of such subtraction between the corresponding pixels of the original BPU and predicted BPU  208 . Compared with the original BPU, prediction data  206  and residual BPU  210  can have fewer bits, but they can be used to reconstruct the original BPU without significant quality deterioration. Thus, the original BPU is compressed. 
     To further compress residual BPU  210 , at transform stage  212 , the encoder can reduce spatial redundancy of residual BPU  210  by decomposing it into a set of two-dimensional “base patterns,” each base pattern being associated with a “transform coefficient.” The base patterns can have the same size (e.g., the size of residual BPU  210 ). Each base pattern can represent a variation frequency (e.g., frequency of brightness variation) component of residual BPU  210 . None of the base patterns can be reproduced from any combinations (e.g., linear combinations) of any other base patterns. In other words, the decomposition can decompose variations of residual BPU  210  into a frequency domain. Such a decomposition is analogous to a discrete Fourier transform of a function, in which the base patterns are analogous to the base functions (e.g., trigonometry functions) of the discrete Fourier transform, and the transform coefficients are analogous to the coefficients associated with the base functions. 
     Different transform algorithms can use different base patterns. Various transform algorithms can be used at transform stage  212 , such as, for example, a discrete cosine transform, a discrete sine transform, or the like. The transform at transform stage  212  is invertible. That is, the encoder can restore residual BPU  210  by an inverse operation of the transform (referred to as an “inverse transform”). For example, to restore a pixel of residual BPU  210 , the inverse transform can be multiplying values of corresponding pixels of the base patterns by respective associated coefficients and adding the products to produce a weighted sum. For a video coding standard, both the encoder and decoder can use the same transform algorithm (thus the same base patterns). Thus, the encoder can record only the transform coefficients, from which the decoder can reconstruct residual BPU  210  without receiving the base patterns from the encoder. Compared with residual BPU  210 , the transform coefficients can have fewer bits, but they can be used to reconstruct residual BPU  210  without significant quality deterioration. Thus, residual BPU  210  is further compressed. 
     The encoder can further compress the transform coefficients at quantization stage  214 . In the transform process, different base patterns can represent different variation frequencies (e.g., brightness variation frequencies). Because human eyes are generally better at recognizing low-frequency variation, the encoder can disregard information of high-frequency variation without causing significant quality deterioration in decoding. For example, at quantization stage  214 , the encoder can generate quantized transform coefficients  216  by dividing each transform coefficient by an integer value (referred to as a “quantization parameter”) and rounding the quotient to its nearest integer. After such an operation, some transform coefficients of the high-frequency base patterns can be converted to zero, and the transform coefficients of the low-frequency base patterns can be converted to smaller integers. The encoder can disregard the zero-value quantized transform coefficients  216 , by which the transform coefficients are further compressed. The quantization process is also invertible, in which quantized transform coefficients  216  can be reconstructed to the transform coefficients in an inverse operation of the quantization (referred to as “inverse quantization”). 
     Because the encoder disregards the remainders of such divisions in the rounding operation, quantization stage  214  can be lossy. Typically, quantization stage  214  can contribute the most information loss in process  200 A. The larger the information loss is, the fewer bits the quantized transform coefficients  216  can need. For obtaining different levels of information loss, the encoder can use different values of the quantization parameter or any other parameter of the quantization process. 
     At binary coding stage  226 , the encoder can encode prediction data  206  and quantized transform coefficients  216  using a binary coding technique, such as, for example, entropy coding, variable length coding, arithmetic coding, Huffman coding, context-adaptive binary arithmetic coding, or any other lossless or lossy compression algorithm. In some embodiments, besides prediction data  206  and quantized transform coefficients  216 , the encoder can encode other information at binary coding stage  226 , such as, for example, a prediction mode used at prediction stage  204 , parameters of the prediction operation, a transform type at transform stage  212 , parameters of the quantization process (e.g., quantization parameters), an encoder control parameter (e.g., a bitrate control parameter), or the like. The encoder can use the output data of binary coding stage  226  to generate video bitstream  228 . In some embodiments, video bitstream  228  can be further packetized for network transmission. 
     Referring to the reconstruction path of process  200 A, at inverse quantization stage  218 , the encoder can perform inverse quantization on quantized transform coefficients  216  to generate reconstructed transform coefficients. At inverse transform stage  220 , the encoder can generate reconstructed residual BPU  222  based on the reconstructed transform coefficients. The encoder can add reconstructed residual BPU  222  to predicted BPU  208  to generate prediction reference  224  that is to be used in the next iteration of process  200 A. 
     It should be noted that other variations of the process  200 A can be used to encode video sequence  202 . In some embodiments, stages of process  200 A can be performed by the encoder in different orders. In some embodiments, one or more stages of process  200 A can be combined into a single stage. In some embodiments, a single stage of process  200 A can be divided into multiple stages. For example, transform stage  212  and quantization stage  214  can be combined into a single stage. In some embodiments, process  200 A can include additional stages. In some embodiments, process  200 A can omit one or more stages in  FIG. 2A . 
       FIG. 2B  illustrates a schematic diagram of another example encoding process  200 B, consistent with embodiments of the disclosure. Process  200 B can be modified from process  200 A. For example, process  200 B can be used by an encoder conforming to a hybrid video coding standard (e.g., H.26x series). Compared with process  200 A, the forward path of process  200 B additionally includes mode decision stage  230  and divides prediction stage  204  into spatial prediction stage  2042  and temporal prediction stage  2044 . The reconstruction path of process  200 B additionally includes loop filter stage  232  and buffer  234 . 
     Generally, prediction techniques can be categorized into two types: spatial prediction and temporal prediction. Spatial prediction (e.g., an intra-picture prediction or “intra prediction”) can use pixels from one or more already coded neighboring BPUs in the same picture to predict the current BPU. That is, prediction reference  224  in the spatial prediction can include the neighboring BPUs. The spatial prediction can reduce the inherent spatial redundancy of the picture. Temporal prediction (e.g., an inter-picture prediction or “inter prediction”) can use regions from one or more already coded pictures to predict the current BPU. That is, prediction reference  224  in the temporal prediction can include the coded pictures. The temporal prediction can reduce the inherent temporal redundancy of the pictures. 
     Referring to process  200 B, in the forward path, the encoder performs the prediction operation at spatial prediction stage  2042  and temporal prediction stage  2044 . For example, at spatial prediction stage  2042 , the encoder can perform the intra prediction. For an original BPU of a picture being encoded, prediction reference  224  can include one or more neighboring BPUs that have been encoded (in the forward path) and reconstructed (in the reconstructed path) in the same picture. The encoder can generate predicted BPU  208  by extrapolating the neighboring BPUs. The extrapolation technique can include, for example, a linear extrapolation or interpolation, a polynomial extrapolation or interpolation, or the like. In some embodiments, the encoder can perform the extrapolation at the pixel level, such as by extrapolating values of corresponding pixels for each pixel of predicted BPU  208 . The neighboring BPUs used for extrapolation can be located with respect to the original BPU from various directions, such as in a vertical direction (e.g., on top of the original BPU), a horizontal direction (e.g., to the left of the original BPU), a diagonal direction (e.g., to the down-left, down-right, up-left, or up-right of the original BPU), or any direction defined in the used video coding standard. For the intra prediction, prediction data  206  can include, for example, locations (e.g., coordinates) of the used neighboring BPUs, sizes of the used neighboring BPUs, parameters of the extrapolation, a direction of the used neighboring BPUs with respect to the original BPU, or the like. 
     For another example, at temporal prediction stage  2044 , the encoder can perform the inter prediction. For an original BPU of a current picture, prediction reference  224  can include one or more pictures (referred to as “reference pictures”) that have been encoded (in the forward path) and reconstructed (in the reconstructed path). In some embodiments, a reference picture can be encoded and reconstructed BPU by BPU. For example, the encoder can add reconstructed residual BPU  222  to predicted BPU  208  to generate a reconstructed BPU. When all reconstructed BPUs of the same picture are generated, the encoder can generate a reconstructed picture as a reference picture. The encoder can perform an operation of “motion estimation” to search for a matching region in a scope (referred to as a “search window”) of the reference picture. The location of the search window in the reference picture can be determined based on the location of the original BPU in the current picture. For example, the search window can be centered at a location having the same coordinates in the reference picture as the original BPU in the current picture and can be extended out for a predetermined distance. When the encoder identifies (e.g., by using a pel-recursive algorithm, a block-matching algorithm, or the like) a region similar to the original BPU in the search window, the encoder can determine such a region as the matching region. The matching region can have different dimensions (e.g., being smaller than, equal to, larger than, or in a different shape) from the original BPU. Because the reference picture and the current picture are temporally separated in the timeline (e.g., as shown in  FIG. 1 ), it can be deemed that the matching region “moves” to the location of the original BPU as time goes by. The encoder can record the direction and distance of such a motion as a “motion vector.” When multiple reference pictures are used (e.g., as picture  106  in  FIG. 1 ), the encoder can search for a matching region and determine its associated motion vector for each reference picture. In some embodiments, the encoder can assign weights to pixel values of the matching regions of respective matching reference pictures. 
     The motion estimation can be used to identify various types of motions, such as, for example, translations, rotations, zooming, or the like. For inter prediction, prediction data  206  can include, for example, locations (e.g., coordinates) of the matching region, the motion vectors associated with the matching region, the number of reference pictures, weights associated with the reference pictures, or the like. 
     For generating predicted BPU  208 , the encoder can perform an operation of “motion compensation.” The motion compensation can be used to reconstruct predicted BPU  208  based on prediction data  206  (e.g., the motion vector) and prediction reference  224 . For example, the encoder can move the matching region of the reference picture according to the motion vector, in which the encoder can predict the original BPU of the current picture. When multiple reference pictures are used (e.g., as picture  106  in  FIG. 1 ), the encoder can move the matching regions of the reference pictures according to the respective motion vectors and average pixel values of the matching regions. In some embodiments, if the encoder has assigned weights to pixel values of the matching regions of respective matching reference pictures, the encoder can add a weighted sum of the pixel values of the moved matching regions. 
     In some embodiments, the inter prediction can be unidirectional or bidirectional. Unidirectional inter predictions can use one or more reference pictures in the same temporal direction with respect to the current picture. For example, picture  104  in  FIG. 1  is a unidirectional inter-predicted picture, in which the reference picture (i.e., picture  102 ) precedes picture  104 . Bidirectional inter predictions can use one or more reference pictures at both temporal directions with respect to the current picture. For example, picture  106  in  FIG. 1  is a bidirectional inter-predicted picture, in which the reference pictures (i.e., pictures  104  and  108 ) are at both temporal directions with respect to picture  104 . 
     Still referring to the forward path of process  200 B, after spatial prediction  2042  and temporal prediction stage  2044 , at mode decision stage  230 , the encoder can select a prediction mode (e.g., one of the intra prediction or the inter prediction) for the current iteration of process  200 B. For example, the encoder can perform a rate-distortion optimization technique, in which the encoder can select a prediction mode to minimize a value of a cost function depending on a bit rate of a candidate prediction mode and distortion of the reconstructed reference picture under the candidate prediction mode. Depending on the selected prediction mode, the encoder can generate the corresponding predicted BPU  208  and predicted data  206 . 
     In the reconstruction path of process  200 B, if intra prediction mode has been selected in the forward path, after generating prediction reference  224  (e.g., the current BPU that has been encoded and reconstructed in the current picture), the encoder can directly feed prediction reference  224  to spatial prediction stage  2042  for later usage (e.g., for extrapolation of a next BPU of the current picture). If the inter prediction mode has been selected in the forward path, after generating prediction reference  224  (e.g., the current picture in which all BPUs have been encoded and reconstructed), the encoder can feed prediction reference  224  to loop filter stage  232 , at which the encoder can apply a loop filter to prediction reference  224  to reduce or eliminate distortion (e.g., blocking artifacts) introduced by the inter prediction. The encoder can apply various loop filter techniques at loop filter stage  232 , such as, for example, deblocking, sample adaptive offsets, adaptive loop filters, or the like. The loop-filtered reference picture can be stored in buffer  234  (or “decoded picture buffer”) for later use (e.g., to be used as an inter-prediction reference picture for a future picture of video sequence  202 ). The encoder can store one or more reference pictures in buffer  234  to be used at temporal prediction stage  2044 . In some embodiments, the encoder can encode parameters of the loop filter (e.g., a loop filter strength) at binary coding stage  226 , along with quantized transform coefficients  216 , prediction data  206 , and other information. 
       FIG. 3A  illustrates a schematic diagram of an example decoding process  300 A, consistent with embodiments of the disclosure. Process  300 A can be a decompression process corresponding to the compression process  200 A in  FIG. 2A . In some embodiments, process  300 A can be similar to the reconstruction path of process  200 A. A decoder can decode video bitstream  228  into video stream  304  according to process  300 A. Video stream  304  can be very similar to video sequence  202 . However, due to the information loss in the compression and decompression process (e.g., quantization stage  214  in  FIGS. 2A-2B ), generally, video stream  304  is not identical to video sequence  202 . Similar to processes  200 A and  200 B in  FIGS. 2A-2B , the decoder can perform process  300 A at the level of basic processing units (BPUs) for each picture encoded in video bitstream  228 . For example, the decoder can perform process  300 A in an iterative manner, in which the decoder can decode a basic processing unit in one iteration of process  300 A. In some embodiments, the decoder can perform process  300 A in parallel for regions (e.g., regions  114 - 118 ) of each picture encoded in video bitstream  228 . 
     In  FIG. 3A , the decoder can feed a portion of video bitstream  228  associated with a basic processing unit (referred to as an “encoded BPU”) of an encoded picture to binary decoding stage  302 . At binary decoding stage  302 , the decoder can decode the portion into prediction data  206  and quantized transform coefficients  216 . The decoder can feed quantized transform coefficients  216  to inverse quantization stage  218  and inverse transform stage  220  to generate reconstructed residual BPU  222 . The decoder can feed prediction data  206  to prediction stage  204  to generate predicted BPU  208 . The decoder can add reconstructed residual BPU  222  to predicted BPU  208  to generate predicted reference  224 . In some embodiments, predicted reference  224  can be stored in a buffer (e.g., a decoded picture buffer in a computer memory). The decoder can feed predicted reference  224  to prediction stage  204  for performing a prediction operation in the next iteration of process  300 A. 
     The decoder can perform process  300 A iteratively to decode each encoded BPU of the encoded picture and generate predicted reference  224  for encoding the next encoded BPU of the encoded picture. After decoding all encoded BPUs of the encoded picture, the decoder can output the picture to video stream  304  for display and proceed to decode the next encoded picture in video bitstream  228 . 
     At binary decoding stage  302 , the decoder can perform an inverse operation of the binary coding technique used by the encoder (e.g., entropy coding, variable length coding, arithmetic coding, Huffman coding, context-adaptive binary arithmetic coding, or any other lossless compression algorithm). In some embodiments, besides prediction data  206  and quantized transform coefficients  216 , the decoder can decode other information at binary decoding stage  302 , such as, for example, a prediction mode, parameters of the prediction operation, a transform type, parameters of the quantization process (e.g., quantization parameters), an encoder control parameter (e.g., a bitrate control parameter), or the like. In some embodiments, if video bitstream  228  is transmitted over a network in packets, the decoder can depacketize video bitstream  228  before feeding it to binary decoding stage  302 . 
       FIG. 3B  illustrates a schematic diagram of another example decoding process  300 B, consistent with embodiments of the disclosure. Process  300 B can be modified from process  300 A. For example, process  300 B can be used by a decoder conforming to a hybrid video coding standard (e.g., H.26x series). Compared with process  300 A, process  300 B additionally divides prediction stage  204  into spatial prediction stage  2042  and temporal prediction stage  2044 , and additionally includes loop filter stage  232  and buffer  234 . 
     In process  300 B, for an encoded basic processing unit (referred to as a “current BPU”) of an encoded picture (referred to as a “current picture”) that is being decoded, prediction data  206  decoded from binary decoding stage  302  by the decoder can include various types of data, depending on what prediction mode was used to encode the current BPU by the encoder. For example, if intra prediction was used by the encoder to encode the current BPU, prediction data  206  can include a prediction mode indicator (e.g., a flag value) indicative of the intra prediction, parameters of the intra prediction operation, or the like. The parameters of the intra prediction operation can include, for example, locations (e.g., coordinates) of one or more neighboring BPUs used as a reference, sizes of the neighboring BPUs, parameters of extrapolation, a direction of the neighboring BPUs with respect to the original BPU, or the like. For another example, if inter prediction was used by the encoder to encode the current BPU, prediction data  206  can include a prediction mode indicator (e.g., a flag value) indicative of the inter prediction, parameters of the inter prediction operation, or the like. The parameters of the inter prediction operation can include, for example, the number of reference pictures associated with the current BPU, weights respectively associated with the reference pictures, locations (e.g., coordinates) of one or more matching regions in the respective reference pictures, one or more motion vectors respectively associated with the matching regions, or the like. 
     Based on the prediction mode indicator, the decoder can decide whether to perform a spatial prediction (e.g., the intra prediction) at spatial prediction stage  2042  or a temporal prediction (e.g., the inter prediction) at temporal prediction stage  2044 . The details of performing such spatial prediction or temporal prediction are described in  FIG. 2B  and will not be repeated hereinafter. After performing such spatial prediction or temporal prediction, the decoder can generate predicted BPU  208 . The decoder can add predicted BPU  208  and reconstructed residual BPU  222  to generate prediction reference  224 , as described in  FIG. 3A . 
     In process  300 B, the decoder can feed predicted reference  224  to spatial prediction stage  2042  or temporal prediction stage  2044  for performing a prediction operation in the next iteration of process  300 B. For example, if the current BPU is decoded using the intra prediction at spatial prediction stage  2042 , after generating prediction reference  224  (e.g., the decoded current BPU), the decoder can directly feed prediction reference  224  to spatial prediction stage  2042  for later usage (e.g., for extrapolation of a next BPU of the current picture). If the current BPU is decoded using the inter prediction at temporal prediction stage  2044 , after generating prediction reference  224  (e.g., a reference picture in which all BPUs have been decoded), the encoder can feed prediction reference  224  to loop filter stage  232  to reduce or eliminate distortion (e.g., blocking artifacts). The decoder can apply a loop filter to prediction reference  224 , in a way as described in  FIG. 2B . The loop-filtered reference picture can be stored in buffer  234  (e.g., a decoded picture buffer in a computer memory) for later use (e.g., to be used as an inter-prediction reference picture for a future encoded picture of video bitstream  228 ). The decoder can store one or more reference pictures in buffer  234  to be used at temporal prediction stage  2044 . In some embodiments, when the prediction mode indicator of prediction data  206  indicates that inter prediction was used to encode the current BPU, prediction data can further include parameters of the loop filter (e.g., a loop filter strength). 
       FIG. 4  is a block diagram of an example apparatus  400  for encoding or decoding a video, consistent with embodiments of the disclosure. As shown in  FIG. 4 , apparatus  400  can include processor  402 . When processor  402  executes instructions described herein, apparatus  400  can become a specialized machine for video encoding or decoding. Processor  402  can be any type of circuitry capable of manipulating or processing information. For example, processor  402  can include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), a neural processing unit (“NPU”), a microcontroller unit (“MCU”), an optical processor, a programmable logic controller, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a Programmable Logic Array (PLA), a Programmable Array Logic (PAL), a Generic Array Logic (GAL), a Complex Programmable Logic Device (CPLD), a Field-Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), or the like. In some embodiments, processor  402  can also be a set of processors grouped as a single logical component. For example, as shown in  FIG. 4 , processor  402  can include multiple processors, including processor  402   a , processor  402   b , and processor  402   n.    
     Apparatus  400  can also include memory  404  configured to store data (e.g., a set of instructions, computer codes, intermediate data, or the like). For example, as shown in  FIG. 4 , the stored data can include program instructions (e.g., program instructions for implementing the stages in processes  200 A,  200 B,  300 A, or  300 B) and data for processing (e.g., video sequence  202 , video bitstream  228 , or video stream  304 ). Processor  402  can access the program instructions and data for processing (e.g., via bus  410 ), and execute the program instructions to perform an operation or manipulation on the data for processing. Memory  404  can include a high-speed random-access storage device or a non-volatile storage device. In some embodiments, memory  404  can include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or the like. Memory  404  can also be a group of memories (not shown in  FIG. 4 ) grouped as a single logical component. 
     Bus  410  can be a communication device that transfers data between components inside apparatus  400 , such as an internal bus (e.g., a CPU-memory bus), an external bus (e.g., a universal serial bus port, a peripheral component interconnect express port), or the like. 
     For ease of explanation without causing ambiguity, processor  402  and other data processing circuits are collectively referred to as a “data processing circuit” in this disclosure. The data processing circuit can be implemented entirely as hardware, or as a combination of software, hardware, or firmware. In addition, the data processing circuit can be a single independent module or can be combined entirely or partially into any other component of apparatus  400 . 
     Apparatus  400  can further include network interface  406  to provide wired or wireless communication with a network (e.g., the Internet, an intranet, a local area network, a mobile communications network, or the like). In some embodiments, network interface  406  can include any combination of any number of a network interface controller (NIC), a radio frequency (RF) module, a transponder, a transceiver, a modem, a router, a gateway, a wired network adapter, a wireless network adapter, a Bluetooth adapter, an infrared adapter, an near-field communication (“NFC”) adapter, a cellular network chip, or the like. 
     In some embodiments, optionally, apparatus  400  can further include peripheral interface  408  to provide a connection to one or more peripheral devices. As shown in  FIG. 4 , the peripheral device can include, but is not limited to, a cursor control device (e.g., a mouse, a touchpad, or a touchscreen), a keyboard, a display (e.g., a cathode-ray tube display, a liquid crystal display, or a light-emitting diode display), a video input device (e.g., a camera or an input interface coupled to a video archive), or the like. 
     It should be noted that video codecs (e.g., a codec performing process  200 A,  200 B,  300 A, or  300 B) can be implemented as any combination of any software or hardware modules in apparatus  400 . For example, some or all stages of process  200 A,  200 B,  300 A, or  300 B can be implemented as one or more software modules of apparatus  400 , such as program instructions that can be loaded into memory  404 . For another example, some or all stages of process  200 A,  200 B,  300 A, or  300 B can be implemented as one or more hardware modules of apparatus  400 , such as a specialized data processing circuit (e.g., an FPGA, an ASIC, an NPU, or the like). 
     One of the key requirements of the VVC standard is to offer video conferencing applications the ability to tolerate diversity of networks and devices, and to be able to rapidly adapt to varying network environments, including rapidly reducing encoded bit rate when network conditions deteriorate, and to rapidly increasing video quality when network conditions improve. The expected video quality may vary from very low to very high. The standard shall also support fast representation switching in the case of adaptive streaming services that offer multiple representations of the same content, each having different properties (e.g. spatial resolution or sample bit depth). During switching from one representation to another representation (such as switching from one resolution to another resolution), the standard shall enable the use of efficient prediction structure without compromising the fast and seamless switching capability. 
     The aim of adaptive resolution change (ARC) is to allow a stream to change spatial resolution between coded pictures within the same video sequence, with or without requiring a new IDR frame and with or without requiring multi-layers as in scalable video codec. Instead, at a switch point, pictures change resolution and may be predicted from reference pictures with the same resolution (if available) and from reference pictures of a different resolution. If a reference picture is of a different resolution, then the reference picture is resampled as shown in  FIG. 5 . For example, as shown in  FIG. 5 , a resolution of a reference picture  506  is the same as a current picture  502 , but resolutions of reference pictures  504  and  508  are different from that of the current picture  502 . After reference pictures  504  and  508  are resampled to the resolution of the current picture  502 , motion compensated prediction from these references may be performed. Hence, adaptive resolution change (ARC) is also sometimes referred to as reference picture resampling (RPR), and these two terms are used interchangeably in this disclosure. 
     When the resolution of a reference frame is different from that of the current frame, one way to generate the motion compensated prediction signal is picture-based resampling, where the reference picture is first resampled to the same resolution as the current picture, and the existing motion compensation process with motion vectors can be applied. The motion vectors may be scaled (if they are sent in units before resampling is applied), or not scaled (if they are sent in units after resampling is applied). With the picture-based resampling, in particular for reference picture down-sampling (that is, resolution of the reference picture is larger than that of the current picture), information may be lost in the reference resampling step before the motion compensated interpolation, because down-sampling is usually achieved with a low-pass filtering followed by decimation). 
     Another way is block-based resampling, where resampling is performed at the block level. This is done by examining the reference picture(s) used by the current block, and if one or both of them have different resolutions than the current picture, than resampling is performed in combination with the sub-pel motion compensated interpolation process. 
     In the block-based resampling, combining the resampling and motion compensated interpolation into one filtering operation may reduce the information loss mentioned above. Take the following case as an example: the motion vector of the current block has half-pel precision in one dimension (e.g., the horizontal dimension), and the reference picture&#39;s width is 2 times that of the current picture. In this case, compared to the picture-level resampling, which will reduce the width of the reference picture by half to match the width of the current picture, and then doing half-pel motion interpolation, the block-based resampling method can directly fetch the odd positions in the reference pictures as the reference block at half-pel precision. In the 15 th  JVET meeting, a block-based resampling method for ARC was adopted in VVC, where the motion compensation (MC) interpolation and reference resampling is combined and performed in one-step filter. In VVC draft 6, the existing filters for MC interpolation with no reference resampling are reused for the MC interpolation with reference resampling. The same filter is used for both reference up-sampling and reference down-sampling. The detail of filter selection is described below. 
     For luma components, if half-pel AMVR mode is selected and interpolated position is half-pel, a 6-tap filter [3, 9, 20, 20, 9, 3] is used. If motion compensated block size is 4×4, the following 6-tap filters as shown in Table 6 of  FIG. 6  are used. And otherwise 8-tap filters as shown Table 7 of  FIG. 7  are used. 
     For chroma components, the 4-tap filters shown in Table 8 of  FIG. 8  below are used. 
     In VVC, the same filters are used for MC interpolation without reference resampling and MC interpolation with reference resampling. While the VVC motion compensated interpolation filter (MCIF) is designed based on DCT up-sampling, it may not be appropriate to use it as a one-step filter combining reference down-sampling and MC interpolation. For example, for phase 0 filtering (e.g., scaled motion vector is integer), the VVC 8-tap MCIF coefficients are [0, 0, 0, 64, 0, 0, 0, 0], which means the prediction sample is directly copied from the reference sample. While it may not be a problem for MC interpolation without reference down-sampling or with reference up-sampling, it may cause aliasing artifact for reference down-sampling case, due to the lack of low-pass filter before decimation. 
     This present disclosure provides methods of using cosine windowed-sinc filters for MC interpolation with reference down-sampling. 
     Windowed-sinc filters are band-pass filters that separate one band of frequency from others. The windowed-sinc filter is a low-pass filter with a frequency response that allows all frequencies below a cutoff frequency pass through with amplitude 1 and stops all frequencies above the cutoff frequency with zero amplitude, as shown in  FIG. 9 . 
     The filter kernel, also known as the impulse response of the filter, is obtained by taking the Inverse Fourier Transform of the frequency response of the ideal low-pass filter. The impulse response of the low-pass filter is in the general form of a sinc function based on Equation (1) below. 
     
       
         
           
             
               
                 
                   
                     
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     The sinc function is infinite. To make the filter kernel in finite length, a window function is applied to truncate the filter kernel to L points. To obtain a smooth tapered curve, a cosine-windowed function is used, which is based on Equation (3) below. 
     
       
         
           
             
               
                 
                   
                     
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     The kernel of the cosine windowed-sinc filter is the product of the ideal response function h(n) and the cosine-window function w(n) based on Equation (4) below. 
     
       
         
           
             
               
                 
                   
                     
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     There are two parameters selected for a windowed-sinc kernel, the cutoff frequency fc and the kernel length L. By adjusting the value of L and fc, the desired filter response can be achieved. For instance, for down-sampling filters used in the scalable HEVC test model (SHM), fc=0.9 and L=13. 
     Filter coefficients obtained in Equation (4) are real numbers. Applying a filter is equivalent to calculate the weighted average of reference samples, with the weights being the filter coefficients. For efficient calculation in digital computers or hardware, the coefficients are normalized, multiplied by a scaler and rounded to integers, such that the sum of the coefficients is equal to 2{circumflex over ( )}N, where N is an integer. The filtered sample is divided by 2{circumflex over ( )}N (equivalent to right shift N bits). For example, in VVC draft 6, the sum of interpolation filter coefficients is 64. 
     In some embodiments, the down-sampling filters can be used in SHM for the VVC motion compensation interpolation with reference down-sampling, for both luma and chroma components, and the existing MCIF for motion compensation interpolation with reference up-sampling can be used. While the kernel length L=13, the first coefficient is small and rounded to zero, the filter length can be reduced to 12, without impact to the filter performance. 
     As an example, the filter coefficients for 2:1 down-sampling and 1.5:1 down-sampling are shown in Table 10 of  FIG. 10  and Table 11 of  FIG. 11 , respectively. 
     Besides the value of the coefficients, there are several other differences between the designs of SHM filter and the existing MCIF. 
     As a first difference, the SHM filter requires filtering in an integer sample position as well as in a fractional sample position, while the MCIF only requires filtering in the fractional sample position. An example of modification to the VVC draft 6 luma sample interpolation filtering process for reference down-sampling case is described in Table 12 of  FIG. 12  below. 
     An example of modification to the VVC draft 6 chroma sample interpolation filtering process for reference down-sampling case is described in Table 13 of  FIG. 13  below. 
     As a second difference, the sum of filter coefficients is 128 for SHM filters, while the sum of filter coefficients is 64 for the existing MCIF. In VVC draft 6, in order to reduce the loss caused by rounding error, the intermediate prediction signals are kept in a higher precision (represented by higher bit-depth) than the output signal. The precision of the intermediate signal is called internal precision. In some embodiments, in order to keep the internal precision being the same as in VVC draft 6, the output of SHM filters needs to right shift 1 additional bit comparing to using existing MCIF. An example of modification to the VVC draft 6 luma sample interpolation filtering process for reference down-sampling case is shown in Table 14 of  FIG. 14  below. 
     An example of modification to the VVC draft 6 chroma sample interpolation filtering process for reference down-sampling case is shown in Table 15 of  FIG. 15  below. 
     According to some embodiments, the internal precision can be increased by 1-bit, and addition 1-bit right shift can be used to convert the internal precision to the output precision. An example of modification to the VVC draft 6 luma sample interpolation filtering process for reference down-sampling case is shown in Table 16 of  FIG. 16 . 
     An example of modification to the VVC draft 6 chroma sample interpolation filtering process for reference down-sampling case is shown in Table 17 of  FIG. 17  below. 
     As a third difference, SHM filter has 12 taps. Therefore, to generate an interpolated sample, 11 neighboring samples (5 to the left and 6 to the right, or 5 above or 6 below) are needed. Comparing to MCIF, additional neighboring samples are fetched. In VVC draft 6, the chroma my precision is 1/32. However, the SHM filter has only 16 phases. Therefore, the chroma my can be rounded to 1/16 for reference down-sampling. This can be done by right shifting the last 5 bit of the chroma my by 1 bit. An example of modification to the VVC draft 6 chroma fractional sample position calculation for reference down-sampling case is shown in Table 18 of  FIG. 18 . 
     According to some embodiments, in order to align to the existing MCIF design in VVC draft, it is proposed to use 8-tap cosine windowed-sinc filters. The filter coefficients can be derived by setting L=9 in the cosine windowed-sinc function in Equation (4). The sum of filter coefficients may be set to 64 for further alignment to the existing MCIF filters. In the disclosed embodiments, the filters for complementary phases may be symmetric (e.g., the filter coefficients of complementary phase are reversed) or non-symmetric. Example filter coefficients for 2:1 and 1.5:1 ratios are shown in Table 19 of  FIG. 19  and Table 20 of  FIG. 20 , respectively. 
     According to some embodiments, to adapt to the 1/32-sample precision for chroma component, a 32-phase cosine windowed-sinc filter set may be used in chroma motion compensation interpolation with reference down-sampling. Examples of filter coefficients for 2:1 and 1.5:1 ratios are shown in the following Table 21 of  FIG. 21  and Table 22 of  FIG. 22 , respectively. 
     According to some embodiments, for 4×4 luma block, 6-tap cosine windowed-sinc filter may be used for MC interpolation with reference down-sampling. Examples of filter coefficients for 2:1 and 1.5:1 ratios are shown in the following Table 23 of  FIG. 23  and Table 24 of  FIG. 24 , respectively. 
     In VVC, different interpolation filters are used in different motion compensation cases. For example, in regular motion compensation, 8-tap DCT-based interpolation filters are used. In motion compensation for 4×4 sub-blocks, 6-tap DCT-based interpolation filters are used. In motion compensation with MVD precision being ½ and MVD phase being ½, a different 6-tap filter is used. In chroma motion compensation, 4-tap DCT-based interpolation filters are used. 
     In some embodiments, the DCT-based interpolation filter can be replaced with the cosine windowed-sinc filter of the same filter length, when the reference picture has a higher resolution than the currently coded picture. In these embodiments, the 8-tap DCT-based interpolation filters can be replaced with 8-tap cosine windowed-sinc filter for regular motion compensation; the 6-tap DCT-based interpolation filters can be replaced with 6-tap cosine windowed-sinc filter for 4×4 sub-block motion compensation. The 4-tap DCT-based interpolation filters can be replaced with 4-tap cosine-windowed-sinc filters for chroma motion compensation. Moreover, the 6-tap DCT-based interpolation filter may be used in motion compensation when MVD precision is ½ and phase is ½. And the filter selection may depend on ratio between the reference picture resolution and the current picture resolution. Exemplary 8-tap, 6-tap and 4-tap cosine-windowed-sinc filters for 2:1 and 1.5:1 down-sampling ratios are shown in Tables 19-24  FIGS. 19-24 . The filters shown in Tables 25-30 of  FIGS. 25-30  are symmetric on complementary phases. 
     The filter coefficients obtained in Equation (4) are real values. After normalization, scaling, the filter coefficients can be rounded to integers. The sum of the filter coefficients, also known as filter gain, represents filter precision. In digital processing, the filter gain usually is set to 2{circumflex over ( )}N. Due to the rounding operation, the sum of filter coefficients may not be equal to the filter gain (2{circumflex over ( )}N). Additional adjustments to the filter coefficients are performed such that the sum of the filter coefficients is equal to the gain (2{circumflex over ( )}N). In some embodiments, the adjustment includes a determination of a proper rounding direction. The rounding direction can include rounding up or rounding down. Therefore, the adjusted filter coefficients can be summed up to the filter gain to minimize/maximize a cost function. In some embodiments, the cost function may be the sum of absolute difference (SAD) or the sum of squared error (SSE) between the rounded filter coefficients and the real filter coefficients before rounding. In some embodiments, the cost function may be SAD or SSE between a frequency response of the rounded filter coefficients and a frequency response of a reference. The reference may be the real filter coefficients before rounding, or the frequency response of an ideal filter, or the frequency response of a filter with a longer length than the filter being designed. For example, in designing an 8-tap filter, the reference may be a 12-tap filter. Based on the above rounding methods, another set of cosine windowed sinc filters with 8-tap, 6-tap and 4-tap length is exemplified in Tables 31-36 of  FIGS. 31-36 . 
     Since in adaptive resolution change application, the source picture down-sampling and reconstructed picture up-sampling process may not be normatively defined in the standard, which means the user can use any re-sampling filters. While the user selected filter may not match the reference resampling filter, the performance may be degraded due to the filter mismatch. In some disclosed embodiments, the coefficients of reference resample filters are signaled in the bitstream. And the encoder/decoder may use the user defined filter for reference resampling. The signaling of filter coefficients is exemplified as in Tables 37 and 38 of  FIGS. 37-38 . 
     The syntax structures exemplified in Tables 37 and 38 may be presented in high-level syntax, such as Sequence Parameter Set (SPS), Picture Parameter Set (PPS), Adaptation Parameter Set (APS), slice header, and the like. 
     The use of the user-defined RPR filters and the presence of the above exemplary syntax structures may be controlled by flag(s) in the high-level syntax, including SPS, PPS, APS, slice header, and the like. 
     Consistent with the disclosed embodiments, the hardware implementation may be more efficient when one or more of the signaled filters use a fixed filter length and filter norm. Therefore, in some embodiments, the filter norm and/or filter taps may not be signaled and may instead be implied (e.g., implied to be default values defined in the standard). The filter norm, filter taps, filter precision, or maximum bit-depth may be part of the encoder conformance requirement. 
     In some embodiments, the encoder may send supplemental enhancement information (SEI) messages to suggest what non-normative up-sampling filters should be used at the receiving device after the pictures are decoded. Such SEI message is optional. However, with the SEI message, decoders that use the suggested up-sampling filters can obtain better video quality. The filter coefficients( ) syntax structure in Table 31 ( FIG. 31 ) can be used to specify the suggested up-sampling filters in such an SEI message. 
       FIG. 39  is a flowchart of an exemplary method  3900  for processing video content, consistent with embodiments of the disclosure. In some embodiments, method  3900  can be performed by a codec (e.g., an encoder using encoding processes  200 A or  200 B in  FIGS. 2A-2B  or a decoder using decoding processes  300 A or  300 B in  FIGS. 3A-3B ). For example, the codec can be implemented as one or more software or hardware components of an apparatus (e.g., apparatus  400 ) for encoding or transcoding a video sequence. In some embodiments, the video sequence can be an uncompressed video sequence (e.g., video sequence  202 ) or a compressed video sequence that is decoded (e.g., video stream  304 ). In some embodiments, the video sequence can be a monitoring video sequence, which can be captured by a monitoring device (e.g., the video input device in  FIG. 4 ) associated with a processor (e.g., processor  402 ) of the apparatus. The video sequence can include multiple pictures. The apparatus can perform method  3900  at the level of pictures. For example, the apparatus can process one picture at a time in method  3900 . For another example, the apparatus can process a plurality of pictures at a time in method  3900 . Method  3900  can include steps as below. 
     At step  3902 , in response to a target picture and a reference picture having different resolutions, a band-pass filter can be applied to the reference picture, to perform a motion compensated interpolation with reference down-sampling to generate a reference block. 
     The band-pass filter can be a cosine windowed-sinc filter generated based on an ideal low-pass filter and a window function. For example, a kernel function ƒ (n) of the cosine windowed-sinc filter can be a product of the ideal low-pass filter h(n) and the window function w(n), which can be based on Equation (4). 
     Therefore 
     
       
         
           
             
               
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     wherein fc is a cutoff frequency of the cosine windowed-sinc filter ƒ (n), L being a kernel length, and r being a down-sampling ratio of the reference down-sampling. 
     Filter coefficients of the cosine windowed-sinc filter can be rounded before being applied.  FIG. 40  is a flowchart of an exemplary method  4000  for rounding filter coefficients of the cosine windowed-sinc filter, consistent with embodiments of the disclosure. It is appreciated that method  4000  can be implemented independently or as part of method  3900 . Method  4000  can include steps as below. 
     At step  4002 , real filter coefficients of the band-pass filter can be obtained. 
     At step  4004 , a plurality of rounding directions for the real filter coefficients can be determined respectively. 
     At step  4006 , a plurality of combinations of rounded filter coefficients can be generated by rounding the real filter coefficients according to the plurality of rounding directions, respectively. 
     At step  4008 , among the plurality of combinations, a combination of rounded filter coefficients that causes a cost function to be minimum or maximum can be selected. In some embodiments, the cost function can be associated with the rounded filter coefficients and a reference. The reference can be the real filter coefficients of the band-pass filter before the rounding, a frequency response of an ideal filter, or a frequency response of a filter having a longer length than the band-pass filter. For example, the cost function can be a sum of absolute difference (SAD) or a sum of squared error (SSE) between the rounded filter coefficients and the real filter coefficients before rounding, when the reference can be the real filter coefficients of the band-pass filter before the rounding. As another example, the cost function can be SAD or SSE between a frequency response of the rounded filter coefficients and a frequency response of the ideal filter, when the reference is a frequency response of an ideal filter. As discussed above, the reference can also be a frequency response of a filter having a longer length than the band-pass filter. For example, if the band-pass filter is an 8-tap filter, the reference can be a 12-tap filter, which has a longer length than the 8-tap band-pass filter. 
     The selected combination of rounded filter coefficients of the band-pass filter can be signaled in at least one of Sequence Parameter Set (SPS), a Picture Parameter Set (PPS), an Adaptation Parameter Set (APS), and a slice header, along with the syntax structures associated with the filter coefficients. 
     It is appreciated that the cosine windowed-sinc filter is an 8-tap filter, a 6-tap filter, or a 4-tap filter, as shown in Tables 19-36 ( FIGS. 19-36 ). In some embodiments, the band-pass filter can be determined to be one of an 8-tap filter, a 6-tap filter, and a 4-tap filter, based on a ratio between the resolution of the reference picture and the resolution of the target picture. 
     In applying the band-pass filter to the reference picture, a luma sample or a chroma sample can be obtained at a fractional sample position. Filter coefficients for the obtained luma sample or chroma sample can be determined with reference to the look-up table (e.g., Tables 19-36) using the fractional sample position. 
     With reference back to  FIG. 39 , at step  3904 , a block of the target picture can be processed using the reference block. For example, the block of the target picture can be coded or decoded using the reference block. 
     In some embodiments, a non-transitory computer-readable storage medium including instructions is also provided, and the instructions may be executed by a device (such as the disclosed encoder and decoder), for performing the above-described methods. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a CD-ROM, any other optical data storage medium, any physical medium with patterns of holes, a RAM, a PROM, and EPROM, a FLASH-EPROM or any other flash memory, NVRAM, a cache, a register, any other memory chip or cartridge, and networked versions of the same. The device may include one or more processors (CPUs), an input/output interface, a network interface, and/or a memory. 
     The embodiments may further be described using the following clauses: 
     1. A computer-implemented method for performing motion compensation interpolation, comprising: 
     in response to a target picture and a reference picture having different resolutions, applying a band-pass filter to the reference picture, to perform a motion compensated interpolation with reference down-sampling to generate a reference block; and processing a block of the target picture using the reference block. 
     2. The method according to clause 1, wherein the band-pass filter is a cosine windowed-sinc filter generated based on an ideal low-pass filter and a window function. 
     3. The method according to clause 2, wherein the cosine windowed-sinc filter is based on a kernel function 
     
       
         
           
             
               
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     wherein 
     
       
         
           
             
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     wherein fc is a cutoff frequency of the cosine windowed-sinc filter, L is a kernel length, and r is a down-sampling ratio of the reference down-sampling. 
     4. The method according to clause 1, further comprising: 
     obtaining real filter coefficients of the band-pass filter; 
     determining a plurality of rounding directions for the real filter coefficients, respectively; 
     generating a plurality of combinations of rounded filter coefficients by rounding the real filter coefficients according to the plurality of rounding directions; and 
     selecting, among the plurality of combinations, a combination of rounded filter coefficients that causes a cost function to be minimum or maximum. 
     5. The method according to clause 4, wherein the cost function is associated with the rounded filter coefficients and a reference. 
     6. The method according to clause 5, wherein 
     the reference is the real filter coefficients of the band-pass filter before the rounding, a frequency response of an ideal filter, or a frequency response of a filter having a longer length than the band-pass filter. 
     7. The method according to clause 2, wherein the cosine windowed-sinc filter is an 8-tap filter, a 6-tap filter, or a 4-tap filter. 
     8. The method according to clause 1, wherein applying the band-pass filter to the reference picture comprises: 
     obtaining a luma sample or a chroma sample at a fractional sample position. 
     9. The method according to clause 1, further comprising: 
     determining the band-pass filter to be one of an 8-tap filter, a 6-tap filter, and a 4-tap filter, based on a ratio between the resolution of the reference picture and the resolution of the target picture. 
     10. The method according to clause 4, further comprising: 
     signaling the selected combination of rounded filter coefficients of the band-pass filter in at least one of Sequence Parameter Set (SPS), a Picture Parameter Set (PPS), an Adaptation Parameter Set (APS), and a slice header. 
     11. A system for performing motion compensation interpolation, comprising: 
     a memory storing a set of instructions; and 
     at least one processor configured to execute set of instructions to cause the system to perform: 
     in response to a target picture and a reference picture having different resolutions, applying a band-pass filter to the reference picture, to perform a motion compensated interpolation with reference down-sampling to generate a reference block; and 
     processing a block of the target picture using the reference block. 
     12. The system according to clause 11, wherein the band-pass filter is a cosine windowed-sinc filter generated based on an ideal low-pass filter and a window function. 
     13. The system according to clause 12, wherein the cosine windowed-sinc filter is based on a kernel function 
     
       
         
           
             
               
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     wherein 
     
       
         
           
             
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     fc being a cutoff frequency of the cosine windowed-sinc filter, L being a kernel length, and r being a down-sampling ratio of the reference down-sampling. 
     14. The system according to clause 11, wherein at least one processor configured to execute set of instructions to cause the system to further perform: 
     obtaining real filter coefficients of the band-pass filter; 
     determining a plurality of rounding directions for the real filter coefficients, respectively; 
     generating a plurality of combinations of rounded filter coefficients by rounding the real filter coefficients according to the plurality of rounding directions; and 
     selecting, among the plurality of combinations, a combination of rounded filter coefficients that causes a cost function to be minimum or maximum. 
     15. The system according to clause 14, wherein the cost function is associated with the rounded filter coefficients and a reference. 
     16. The system according to clause 15, wherein 
     the reference is the real filter coefficients of the band-pass filter before the rounding, a frequency response of an ideal filter, or a frequency response of a filter having a longer length than the band-pass filter. 
     17. The system according to clause 12, wherein the cosine windowed-sinc filter is an 8-tap filter, a 6-tap filter, or a 4-tap filter. 
     18. The system according to clause 11, wherein applying the band-pass filter to the reference picture comprises: 
     obtaining a luma sample or a chroma sample at a fractional sample position. 
     19. The system according to clause 11, wherein at least one processor configured to execute set of instructions to cause the system to further perform: 
     determining the band-pass filter to be one of an 8-tap filter, a 6-tap filter, and a 4-tap filter, based on a ratio between the resolution of the reference picture and the resolution of the target picture. 
     20. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computer system to cause the computer system to perform a method for processing video content, the method comprising: 
     in response to a target picture and a reference picture having different resolutions, applying a band-pass filter to the reference picture, to perform a motion compensated interpolation with reference down-sampling to generate a reference block; and 
     processing a block of the target picture using the reference block. 
     It should be noted that, the relational terms herein such as “first” and “second” are used only to differentiate an entity or operation from another entity or operation, and do not require or imply any actual relationship or sequence between these entities or operations. Moreover, the words “comprising,” “having,” “containing,” and “including,” and other similar forms are intended to be equivalent in meaning and be open ended in that an item or items following any one of these words is not meant to be an exhaustive listing of such item or items, or meant to be limited to only the listed item or items. 
     As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a database may include A or B, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or A and B. As a second example, if it is stated that a database may include A, B, or C, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. 
     It is appreciated that the above described embodiments can be implemented by hardware, or software (program codes), or a combination of hardware and software. If implemented by software, it may be stored in the above-described computer-readable media. The software, when executed by the processor can perform the disclosed methods. The computing units and other functional units described in this disclosure can be implemented by hardware, or software, or a combination of hardware and software. One of ordinary skill in the art will also understand that multiple ones of the above described modules/units may be combined as one module/unit, and each of the above described modules/units may be further divided into a plurality of sub-modules/sub-units. 
     In the foregoing specification, embodiments have been described with reference to numerous specific details that can vary from implementation to implementation. Certain adaptations and modifications of the described embodiments can be made. Other embodiments can be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims. It is also intended that the sequence of steps shown in figures are only for illustrative purposes and are not intended to be limited to any particular sequence of steps. As such, those skilled in the art can appreciate that these steps can be performed in a different order while implementing the same method. 
     In the drawings and specification, there have been disclosed exemplary embodiments. However, many variations and modifications can be made to these embodiments. Accordingly, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation.