Patent Publication Number: US-9886930-B2

Title: Control circuit and display device

Description:
CROSS REFERENCE 
     This application claims the priority of Chinese Patent Application No. 201510229355.2, entitled “Control circuit and display device”, filed on May 7, 2015, the disclosure of which is incorporated herein by reference in its entirety. 
     FIELD OF THE INVENTION 
     The present invention relates to an electronic technology field, and more particularly to a control circuit and a display device. 
     BACKGROUND OF THE INVENTION 
     In display devices, the connection lines are formed among the output channels of the source driver and the data lines of the pixel array for respectively coupling the output channels of the source driver with the data lines. The data signal outputted by the output channels of the source driver is transmitted from the first row to the last row of the pixel array. The connection line is longer, and the resistance of the line is larger. The voltage charge quantity of the liquid crystal units in the pixel array changes according to the resistances of the lines. The voltage charge quantity of the liquid crystal unit coupled to the data line with large line resistance is smaller than the voltage charge quantity of the liquid crystal unit coupled to the data line with relatively smaller line resistance. Because the voltage charge quantity of the liquid crystal unit varies with the change of the connection line resistance, the display image of the display device has nonuniform defects. 
     SUMMARY OF THE INVENTION 
     An objective of the present invention is to provide a control circuit and display device to enforce the uniformity of the display image of the display device. 
     For realizing the aforesaid objective, the technical solution provided by the embodiments of the present invention is: 
     The present invention provides a drive control circuit, comprising a driver, a pixel array and a resistor, and the pixel array comprises M×N pixels aligned in a form M rows×N columns, and M is a natural number larger than 1, and N is a natural number, and the driver is coupled to the N columns pixels of the pixel array through the resistor to charge the N columns pixels, and the resistor comprises a first resistor and a second resistor, and a resistance of the first resistor is larger than a resistance of the second resistor, and an area surrounded by the pixel array is divided into a first area and a second area, and both the first area and the second area comprise at least one row pixels, and a length of a connection line of the driver with any row pixels in the first area is smaller than a length of a connection line of the driver with any row pixels in the second area, and when the driver determines that it is required to sequentially supply power to each row pixels of the first area, the first resistor is activated to make a power supply signal outputted by the driver pass through the first resistor and be sequentially outputted to each row pixels of the first area for sequentially supplying power to the each row pixels of the first area, and when the driver determines that it is required to sequentially supply power to each row pixels of the second area, the second resistor is activated to make the power supply signal outputted by the driver pass through the second resistor and be sequentially outputted to each row pixels of the second area for sequentially supplying power to the each row pixels of the second area to balance charge quantity of the each row pixels. 
     The pixel array further comprises R×N pixels aligned in a form R rows×N columns, and the R×N pixels are aligned under the M×N pixels to construct a pixel array of M+R rows×N columns, and the R×N pixels surround a third area, and R is a natural number larger than 1, and a length of a connection line of the driver with any row pixels in the third area is larger than the length of the connection line of the driver with any row pixels in the second area, and the resistor further comprises a third resistor, and a resistance of the third resistor is smaller than the resistance of the second resistor, and when the driver determines that it is required to sequentially supply power to each row pixels of the third area, the third resistor is activated to make the power supply signal outputted by the driver pass through the third resistor and be sequentially outputted to each row pixels of the third area for sequentially supplying power to the each row pixels of the third area to balance charge quantity of the each row pixels in the pixel array of (M+R) rows×N columns. 
     A length in the first area of the lines of the driver coupling to the first to the M+Rth row pixels through the resistors is equal to a length in the second area of the lines of the driver coupling to the first to the M+Rth row pixels through the resistors and a length in the third area of the lines of the driver coupling to the first to the M+Rth row pixels through the resistors. 
     An amount of the resistor is one. 
     An amount of the resistors is N, and each column pixels are coupled to the driver through one resistor, and the resistances of the first resistors in the N resistors are equal, and the resistances of the second resistors in the N resistors are equal, and the resistances of the third resistors in the N resistors are equal. 
     All the resistances of the first resistors, the second resistors and the third resistors in the N resistors are gradually increased from the first column and the Nth column respectively to a middle position. 
     The N columns pixels are symmetric with the pixel array of (M+R) rows×N columns being a central line, and two first resistors coupled with two columns pixels which are mutually symmetric are equal, and two second resistors coupled with the two columns pixels which are mutually symmetric are equal, and two third resistors coupled with the two columns pixels which are mutually symmetric are equal. 
     The present invention further provides a display device, comprising a driver, a display panel, a pixel array and a resistor, and the pixel array comprises M×N pixels aligned in a form M rows×N columns, and M is a natural number larger than 1, and N is a natural number, and the driver is coupled to the N columns pixels of the pixel array through the resistor to charge the N columns pixels, and the resistor comprises a first resistor and a second resistor, and a resistance of the first resistor is larger than a resistance of the second resistor, and an area surrounded by the pixel array is divided into a first area and a second area, and both the first area and the second area comprise at least one row pixels, and a length of a connection line of the driver with any row pixels in the first area is smaller than a length of a connection line of the driver with any row pixels in the second area, and when the driver determines that it is required to sequentially supply power to each row pixels of the first area, the first resistor is activated to make a power supply signal outputted by the driver pass through the first resistor and be sequentially outputted to each row pixels of the first area for sequentially supplying power to the each row pixels of the first area, and when the driver determines that it is required to sequentially supply power to each row pixels of the second area, the second resistor is activated to make the power supply signal outputted by the driver pass through the second resistor and be sequentially outputted to each row pixels of the second area for sequentially supplying power to the each row pixels of the second area to balance charge quantity of the each row pixels. 
     The pixel array further comprises R×N pixels aligned in a form R rows×N columns, and the R×N pixels are aligned under the M×N pixels to construct a pixel array of M+R rows×N columns, and the R×N pixels surround a third area, and R is a natural number larger than 1, and a length of a connection line of the driver with any row pixels in the third area is larger than the length of the connection line of the driver with any row pixels in the second area, and the resistor further comprises a third resistor, and a resistance of the third resistor is smaller than the resistance of the second resistor, and when the driver determines that it is required to sequentially supply power to each row pixels of the third area, the third resistor is activated to make the power supply signal outputted by the driver pass through the third resistor and be sequentially outputted to each row pixels of the third area for sequentially supplying power to the each row pixels of the third area to balance charge quantity of the each row pixels in the pixel array of (M+R) rows×N columns. 
     A length in the first area of the lines of the driver coupling to the first to the M+Rth row pixels through the resistors is equal to a length in the second area of the lines of the driver coupling to the first to the M+Rth row pixels through the resistors and a length in the third area of the lines of the driver coupling to the first to the M+Rth row pixels through the resistors. 
     An amount of the resistor is one. 
     An amount of the resistors is N, and each column pixels are coupled to the driver through one resistor, and the resistances of the first resistors in the N resistors are equal, and the resistances of the second resistors in the N resistors are equal, and the resistances of the third resistors in the N resistors are equal. 
     All the resistances of the first resistors, the second resistors and the third resistors in the N resistors are gradually increased from the first column and the Nth column respectively to a middle position. 
     The N columns pixels are symmetric with the pixel array of (M+R) rows×N columns being a central line, and two first resistors coupled with two columns pixels which are mutually symmetric are equal, and two second resistors coupled with the two columns pixels which are mutually symmetric are equal, and two third resistors coupled with the two columns pixels which are mutually symmetric are equal. 
     The driver of the present invention needs to charge each row pixels of the pixel array. Because the pixel array comprises a plurality of rows of pixels, the plurality of rows of pixels are sequentially aligned in a form of array to be arranged under the driver. The distances of the different rows of pixels with the driver are different. The lengths of the connection lines of the driver with each row pixels are different. Meanwhile, with the distance between the row of the pixels and the driver gets larger and larger, the length of the connection line of the driver with the corresponding row of the pixels also gets longer and longer. The longer the connection is, the larger the connection resistance is, too. Thus, the charging quantity of the driver to the corresponding row of pixels is smaller. Consequently, the charge quantity to the entire pixel array is not even. The display brightness of the entire pixel array becomes uneven. The drive control circuit of the present invention comprises a resistor. The driver is coupled to the N columns pixels of the pixel array through the resistor to charge the N columns pixels. The resistor comprises a first resistor and a second resistor. An area surrounded by the pixel array is divided into a first area and a second area. Both the first area and the second area comprise at least one row pixels. A length of a connection line of the driver with any row pixels in the first area is smaller than a length of a connection line of the driver with any row pixels in the second area. When the driver determines that it is required to sequentially supply power to each row pixels of the first area, the first resistor is activated to make a power supply signal outputted by the driver pass through the first resistor and be sequentially outputted to each row pixels of the first area for sequentially supplying power to the each row pixels of the first area. When the driver determines that it is required to sequentially supply power to each row pixels of the second area, the second resistor is activated to make the power supply signal outputted by the driver pass through the second resistor and be sequentially outputted to each row pixels of the second area for sequentially supplying power to the each row pixels of the second area. Because the resistance of the first resistor is larger than the resistance of the second resistor, the first total resistance (a sum of the corresponding line resistance and the first resistor) of the lines of the driver with the pixels in the first area and the second total resistance (a sum of the corresponding line resistance and the second resistor) of the lines of the driver with the pixels in the second area are balanced. Thus, the charge quantity of the driver to the corresponding row pixels is balanced. Therefore, the display brightness of the entire pixel array is balanced. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       In order to more clearly illustrate the embodiments of the present invention, the following figures will be described in the embodiments are briefly introduced. It is obvious that the drawings are only some embodiments of the present invention, those of ordinary skill in this field can obtain other figures according to these figures without paying the premise. 
         FIG. 1  is a block diagram of a drive control circuit provide by the first embodiment of the first solution according to the present invention; 
         FIG. 2  is a block diagram of a drive control circuit provide by the second embodiment of the first solution according to the present invention; 
         FIG. 3  is a block diagram of a display device provided by the embodiment of the second solution according to the present invention. 
     
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
     For better explaining the technical solution and the effect of the present invention, the present invention will be further described in detail with the accompanying drawings in the specific embodiments. 
     Please refer to  FIG. 1 . The first embodiment of the first solution according to the present invention provides a drive control circuit  100 . The drive control circuit  100  comprises a driver  10 , a pixel array  20  and a resistor  30 . The pixel array  20  comprises M×N pixels (not shown) aligned in a form M rows×N columns, wherein M is a natural number larger than 1, and N is a natural number. The driver  10  is coupled to the N columns pixels of the pixel array  20  through the resistor  30  to charge the N columns pixels. The resistor  30  comprises a first resistor R 1  and a second resistor R 2 . A resistance of the first resistor R 1  is larger than a resistance of the second resistor R 2 . An area surrounded by the pixel array  20  is divided into a first area  21  and a second area  22 . Both the first area  21  and the second area  22  comprise at least one row pixels. A length of a connection line of the driver  10  with any row pixels in the first area  21  is smaller than a length of a connection line of the driver  10  with any row pixels in the second area  22 . When the driver  10  determines that it is required to sequentially supply power to each row pixels of the first area, the first resistor R 1  is activated to make a power supply signal outputted by the driver  10  pass through the first resistor R 1  and be sequentially outputted to each row pixels of the first area  21  for sequentially supplying power to the each row pixels of the first area  21 . when the driver  10  determines that it is required to sequentially supply power to each row pixels of the second area  22 , the second resistor R 2  is activated to make the power supply signal pass through the second resistor R 2  and be sequentially outputted to each row pixels of the second area  22  for sequentially supplying power to the each row pixels of the second area  22  to balance charge quantity of the each row pixels. 
     Specifically, a first predetermined interval and a second predetermined interval are recorded in the driver  10 , wherein the second predetermined interval is equal to the first predetermined interval multiply by row number of the pixels in the first area  21 . After the display device is powered on, the driver  10  determines that it is required to charge a plurality of rows of pixels in the first area  21 . First, the driver  10  automatically charges the first row pixels in the first area  21  through the first resistor R 1 , and times. After reaching the first predetermined interval, the second row pixels in the first area  21  is charged simultaneously right after the charge to the first row pixels in the first area  21  is stopped, and so on. In every first predetermined interval, the next row pixels are charged right after the charge to the present row pixel is stopped. After the last row pixels in the first area  21  are charged in the first predetermined interval, then, the driver  10  recognizes that the second predetermined interval is reached. The driver  10  determines that it is required to charge a plurality of rows of pixels in the second area  22 . The driver  10  activates the second resistor R 2  and charges the plurality of rows of pixels in the second area  22  through the second resistor R 2 , and times. After reaching the first predetermined interval, the second row pixels in the second area  22  is charged simultaneously right after the charge to the first row pixels in the second area  22  is stopped, and so on. In every first predetermined interval, the next row pixels are charged right after the charge to the present row pixel is stopped. After the last row pixels in the second area  22  are charged in the first predetermined interval, one charge cycle to the pixel array  20  is accomplished. 
     In this embodiment, an amount of the resistor  30  is one. The first resistor R 1  and the second resistor R 2  are connected in parallel. 
     The driver  10  is required to charge each row pixels of the pixel array  20 . Because the pixel array  20  comprises a plurality of rows of pixels. The plurality of rows of pixels are sequentially aligned in a form of array to be arranged under the driver  10 . The distances of the different rows of pixels with the driver  10  are different. The lengths of the connection lines of the driver  10  with each row pixels are different. Meanwhile, with the distance between the row of the pixels and the driver  10  gets larger and larger, the length of the connection line of the driver  10  with the corresponding row of the pixels also gets longer and longer. The longer the connection is, the larger the connection resistance is, too. Thus, the charging quantity of the driver  10  to the corresponding row of pixels is smaller. Consequently, the charge quantity to the entire pixel array  20  is not even. The display brightness of the entire pixel array  20  becomes uneven. In this embodiment, the drive control circuit  100  comprises a resistor  30 . The driver  10  is coupled to the N columns pixels of the pixel array  20  through the resistor  30  to charge the N columns pixels. The resistor  30  comprises a first resistor R 1  and a second resistor R 2 . An area surrounded by the pixel array  20  is divided into a first area  21  and a second area  22 . Both the first area  21  and the second area  22  comprise at least one row pixels. A length of a connection line of the driver  10  with any row pixels in the first area  21  is smaller than a length of a connection line of the driver  10  with any row pixels in the second area  22 . When the driver  10  determines that it is required to sequentially supply power to each row pixels of the first area, the first resistor R 1  is activated to make a power supply signal outputted by the driver  10  pass through the first resistor R 1  and be sequentially outputted to each row pixels of the first area  21  for sequentially supplying power to the each row pixels of the first area  21 . when the driver  10  determines that it is required to sequentially supply power to each row pixels of the second area  22 , the second resistor R 2  is activated to make the power supply signal pass through the second resistor R 2  and be sequentially outputted to each row pixels of the second area  22  for sequentially supplying power to the each row pixels of the second area  22 . Because the resistance of the first resistor R 1  is larger than the resistance of the second resistor R 2 , the first total resistance (a sum of the corresponding line resistance and the first resistor) of the lines of the driver  10  with the pixels in the first area  21  and the second total resistance (a sum of the corresponding line resistance and the second resistor) of the lines of the driver  10  with the pixels in the second area  22  are balanced. Thus, the charge quantity of the driver  10  to the corresponding row pixels is balanced. Therefore, the display brightness of the entire pixel array  20  is balanced. 
     Please refer to  FIG. 2 . The second embodiment of the present invention provides a drive control circuit  200 . The drive control circuit  200  provided by the second embodiment is similar with the drive control circuit  100  provided by the first embodiment. The difference between the two is: in the second embodiment, the pixel array  210  further comprises R×N pixels aligned in a form R rows×N columns. The R×N pixels are aligned under the M×N pixels to construct a pixel array of M+R rows×N columns. The R×N pixels surround a third area  23 , wherein R is a natural number larger than 1. A length of a connection line of the driver  10  with any row pixels in the third area  23  is larger than a length of a connection line of the driver  10  with any row pixels in the second area  22 . The resistor  220  further comprises a third resistor R 3 . A resistance of the third resistor R 3  is smaller than the resistance of the second resistor R 2 , and when the driver  10  determines that it is required to sequentially supply power to each row pixels of the third area  23 , the third resistor R 3  is activated to make the power supply signal outputted by the driver  10  pass through the third resistor R 3  and be sequentially outputted to each row pixels of the third area for sequentially supplying power to the each row pixels of the third area  23  to balance charge quantity of the each row pixels in the pixel array  210  of (M+R) rows×N columns. 
     Specifically, a third predetermined interval is recorded in the driver  10 , wherein the third predetermined interval is equal to the first predetermined interval multiply by row number of the pixels in the second area  22 . After the last row pixels in the second area  22  are charged in the first predetermined interval, then, the driver  10  recognizes that the third predetermined interval is reached. The driver  10  determines that it is required to charge a plurality of rows of pixels in the third area  23 . The driver  10  activates the third resistor R 3 , and charges the first row pixels in the third area  23  through the third resistor R 3 , and times. After reaching the first predetermined interval, the second row pixels in the third area  23  is charged simultaneously right after the charge to the first row pixels in the third area  23  is stopped, and so on. In every first predetermined interval, the next row pixels are charged right after the charge to the present row pixel is stopped. After the last row pixels in the third area  23  are charged in the first predetermined interval, one charge cycle to the pixel array  210  is accomplished. 
     The first resistor R 1 , the second resistor R 2  and the third resistor R 3  in each resistor  220  are connected in parallel. 
     In this embodiment, the driver  10  is required to charge each row pixels of the pixel array  210 . Because the pixel array  210  comprises a plurality of rows of pixels, the plurality of rows of pixels are sequentially aligned in a form of array to be arranged under the driver  10 . The distances of the different rows of pixels with the driver  10  are different. The lengths of the connection lines of the driver  10  with each row pixels are different. Meanwhile, with the distance between the row of the pixels and the driver  10  gets larger and larger, the length of the connection line of the driver  10  with the corresponding row of the pixels also gets longer and longer. The longer the connection is, the larger the connection resistance is, too. Thus, the charging quantity of the driver  10  to the corresponding row of pixels is smaller. Consequently, the charge quantity to the entire pixel array  20  is not even. The display brightness of the entire pixel array  20  becomes uneven. In this embodiment, the drive control circuit  100  comprises a resistor  30 . The driver  10  is coupled to the N columns pixels of the pixel array  210  through the resistor  30  to charge the N columns pixels. The resistor  30  comprises a first resistor R 1 , a second resistor R 2  and a third resistor R 3 . An area surrounded by the pixel array  20  is divided into a first area  21 , a second area  22  and a third area  23 . A length of a connection line of the driver  10  with any row pixels in the first area  21  is smaller than a length of a connection line of the driver  10  with any row pixels in the second area  22 . A length of a connection line of the driver  10  with any row pixels in the second area  22  is smaller than a length of a connection line of the driver  10  with any row pixels in the third area  23 . When the driver  10  determines that it is required to sequentially supply power to each row pixels of the first area, the first resistor R 1  is activated to make a power supply signal outputted by the driver  10  pass through the first resistor R 1  and be sequentially outputted to each row pixels of the first area  21  for sequentially supplying power to the each row pixels of the first area  21 . when the driver  10  determines that it is required to sequentially supply power to each row pixels of the second area  22 , the second resistor R 2  is activated to make the power supply signal pass through the second resistor R 2  and be sequentially outputted to each row pixels of the second area  22  for sequentially supplying power to the each row pixels of the second area  22 . when the driver  10  determines that it is required to sequentially supply power to each row pixels of the third area  23 , the third resistor R 3  is activated to make the power supply signal pass through the third resistor R 3  and be sequentially outputted to each row pixels of the third area  23  for sequentially supplying power to the each row pixels of the third area  23 . Because the resistance of the first resistor R 1  is larger than the resistance of the second resistor R 2  and the resistance of the second resistor R 2  is larger than the resistance of the third resistor R 3 , the first total resistance (a sum of the corresponding line resistance and the first resistor R 1 ) of the lines of the driver  10  with the pixels in the first area  21  and the second total resistance (a sum of the corresponding line resistance and the second resistor R 2 ) of the lines of the driver  10  with the pixels in the second area  22 , the third total resistance (a sum of the corresponding line resistance and the third resistor R 3 ) of the lines of the driver  10  with the pixels in the third area  23  are balanced. Thus, the charge quantity of the driver  10  to the pixels of the pixel array  210  is balanced. Therefore, the display brightness of the entire pixel array  210  is balanced. 
     Furthermore, a length in the first area  21  of the lines of the driver  10  coupling to the first to the M+Rth row pixels through the resistors  220  is equal to a length in the second area  22  of the lines of the driver  10  coupling to the first to the M+Rth row pixels through the resistors  220  and a length in the third area  23  of the lines of the driver  10  coupling to the first to the M+Rth row pixels through the resistors  220 . 
     In this embodiment, an amount of the resistors  220  is N. Each column pixels are coupled to the driver  10  through one resistor  220 , and the resistances of the first resistors R 1  in the N resistors  220  are equal. The resistances of the second resistors R 2  in the N resistors  220  are equal. The resistances of the third resistors R 3  in the N resistors  220  are equal. 
     Furthermore, all the resistances of the first resistors R 1 , the second resistors R 2  and the third resistors R 3  in the N resistors  230  are gradually increased from the first column and the Nth column respectively to a middle position. 
     Specifically, as considering the length condition of the connection lines of the driver  10  coupling to the first row pixels of the pixel array  210 : the lengths of the lines are gradually decreased from the first column and the Nth column respectively to a middle position. Therefore, all the resistances of the first resistors R 1 , the second resistors R 2  and the third resistors R 3  in the N resistors  230  are gradually increased from the first column and the Nth column respectively to a middle position to balance the total resistance of the lines of the driver coupling to the respective row pixels of the pixel array  210  for balancing the charge quantity of the driver  10  to the pixels of the pixel array  210 . Therefore, the display brightness of the entire pixel array  210  is balanced. 
     Specifically, the N columns pixels are symmetric with the pixel array  210  of (M+R) rows×N columns being a central line, and two first resistors R 1  coupled with two columns pixels which are mutually symmetric are equal; two second resistors R 2  coupled with the two columns pixels which are mutually symmetric are equal; two third resistors R 3  coupled with the two columns pixels which are mutually symmetric are equal. 
     Please refer to  FIG. 3 , a display device  300  provided by the second solution according to the present invention. The display device  300  comprises a display panel  310  and a drive control circuit. The drive control circuit can be the drive control circuit  100  provided by the first embodiment of the first solution or the drive control circuit  200  provided by the second embodiment. In this embodiment, the drive control circuit is the drive control circuit  200  provided by the second embodiment of the first solution. The pixel array  210  of the drive control circuit  200  is located on the display panel  310 . The specific structure and function of the drive control circuit  200  have already been described in detail in the aforesaid first solution. The repeated description is omitted here. 
     In this embodiment, the driver  10  is required to charge each row pixels of the pixel array  210 . Because the pixel array  20  comprises a plurality of rows of pixels, the plurality of rows of pixels are sequentially aligned in a form of array to be arranged under the driver  10 . The distances of the different rows of pixels with the driver  10  are different. The lengths of the connection lines of the driver  10  with each row pixels are different. Meanwhile, with the distance between the row of the pixels and the driver  10  gets larger and larger, the length of the connection line of the driver  10  with the corresponding row of the pixels also gets longer and longer. The longer the connection is, the larger the connection resistance is, too. Thus, the charging quantity of the driver  10  to the corresponding row of pixels is smaller. Consequently, the charge quantity to the entire pixel array  210  is not even. The display brightness of the entire pixel array  210  becomes uneven. In this embodiment, the drive control circuit  200  comprises a resistor  220 . The driver  10  is coupled to the N columns pixels of the pixel array  210  through the resistor  220  to charge the N columns pixels. The resistor  220  comprises a first resistor R 1 , a second resistor R 2  and a third resistor R 3 . An area surrounded by the pixel array  20  is divided into first to third areas  21 - 23 . All the first area  21  to the third area  23  comprise at least one row pixels. A length of a connection line of the driver  10  with any row pixels in the first area  21  is smaller than a length of a connection line of the driver  10  with any row pixels in the second area  22 . A length of a connection line of the driver  10  with any row pixels in the second area  22  is smaller than a length of a connection line of the driver  10  with any row pixels in the third area  23 . When the driver  10  determines that it is required to sequentially supply power to each row pixels of the first area  21 , the first resistor R 1  is activated to make a power supply signal outputted by the driver  10  pass through the first resistor R 1  and be sequentially outputted to each row pixels of the first area  21  for sequentially supplying power to the each row pixels of the first area  21 . when the driver  10  determines that it is required to sequentially supply power to each row pixels of the second area  22 , the second resistor R 2  is activated to make the power supply signal pass through the second resistor R 2  and be sequentially outputted to each row pixels of the second area  22  for sequentially supplying power to the each row pixels of the second area  22 . when the driver  10  determines that it is required to sequentially supply power to each row pixels of the third area  23 , the third resistor R 3  is activated to make the power supply signal pass through the third resistor R 3  and be sequentially outputted to each row pixels of the third area  23  for sequentially supplying power to the each row pixels of the third area  23 . Because the resistance of the first resistor R 1  is larger than the resistance of the second resistor R 2  and the resistance of the second resistor R 2  is larger than the resistance of the third resistor R 3 , the first total resistance (a sum of the corresponding line resistance and the first resistor R 1 ) of the lines of the driver  10  with the pixels in the first area  21  and the second total resistance (a sum of the corresponding line resistance and the second resistor R 2 ) of the lines of the driver  10  with the pixels in the second area  22 , the third total resistance (a sum of the corresponding line resistance and the third resistor R 3 ) of the lines of the driver  10  with the pixels in the third area  23  are balanced. Thus, the charge quantity of the driver  10  to the corresponding row pixels is balanced. Therefore, the display brightness of the display device  300  is balanced. 
     Above are only specific embodiments of the present invention, the scope of the present invention is not limited to this, and to any persons who are skilled in the art, change or replacement which is easily derived should be covered by the protected scope of the invention. Thus, the protected scope of the invention should go by the subject claims.