Patent Publication Number: US-6211062-B1

Title: Method for manufacturing semiconductor device having multiple wiring layer

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a semiconductor device manufacturing method, particularly to a method for manufacturing a semiconductor device having a multiple wiring layer and using hydrogen silsesquioxance (hereafter referred to as HSQ) as a interlayer insulating film. 
     2. Description of the Related Art 
     In accordance with miniaturization of recent years, the wiring pitch of semiconductor devices having a multiple wiring layer has been decreased. When a wiring pitch decreases, the distance between adjacent wirings decreases and the capacitance between adjacent wirings referred to as wiring capacitance increases. Thereby, operating speed is lowered and power consumption is increased. It is proposed for these problems to use a film having a low dielectric constant (low dielectric constant film) as an interlayer insulating film instead of a silicon oxide film having been used so far. By using the low dielectric constant film, it is possible to realize a small wiring capacitance even for a semiconductor device having a small wiring pitch. 
     Low dielectric constant films made of various materials are already researched and developed. Particularly, HSQ is one of the most-prospective low dielectric constant films because it has heat resistance for a temperature of 1,400° C. or higher. 
     A conventional semiconductor device manufacturing method using HSQ as a interlayer insulating film is described in, for example, T. Zoes, B. Ahlburn, K. Erz, and M. Marsden, “Planarization Performance of Flowable Oxide in the Sub 0.5 μm Regime,” Conference Proceedings ULSI XI 1996 Materials Research Society pp. 121-125 (1996). 
     A conventional semiconductor device manufacturing method same as the method described in the above document is described below by referring to FIGS. 7A and 7B and FIGS. 8A and 8B. 
     In FIG. 7A, on a first interlayer insulating film  1  made of BPSG (Boro-Phospho-Silicate Glass) film having a thickness of approx. 0.8 μm, a first refractory metal film  2  made of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm, a first metal film  3  made of an AlCu film having a thickness of approx. 0.5 μm, and a first antireflection film  4  made of a titanium nitride film having a thickness of approx. 50 nm for preventing reflection in a photolithographic process are formed from the bottom in this order through the sputtering method. Then, patterning is performed through a photolithographic process and reactive-ion etching to form a first wiring layer made of the first refractory metal film  2 , first metal film  3 , and first antireflection film  4 . Thereafter, a first plasma oxide film  5  having a thickness of approx. 50 nm is formed through the plasma CVD method using, for example, a mixed gas of SiH 4  and NH 3 . Further, HSQ is applied onto the first wiring layer so that the film thickness of HSQ reaches approx. 0.4 μm and then, baking is performed to form an HSQ film  6  as a interlayer insulating film. Furthermore, a second plasma oxide film  7  having a thickness of approx. 1.4 μm is formed on the HSQ film  6  using the plasma CVD method. At least either of chemical polishing and mechanical polishing is performed so that the sum of the thicknesses of the HSQ film  6  and the second plasma oxide film  7  reaches approx. 0.8 μm on the first wiring layer. 
     Then, as shown in FIG. 7B, a first via hole  8  is formed through a photolithographic process and reactive-ion etching. Then, a second refractory metal film  9  made up of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm is formed in the first via hole  8  and on the second plasma oxide film  7  through the sputtering method. Moreover, tungsten is deposited to approx. 0.5 μm through the CVD method using WF 6  or the like as a source gas and thereafter, a first tungsten film  10  is left only in the via hole  8  by etching-back. Then, a second metal film  11  made of an AlCu film having a thickness of approx. 0.5 μm and a second antireflection film  12  made of a titanium nitride film having a thickness of approx. 50 nm are formed on the entire surface by the sputtering method. Furthermore, patterning is performed through a photolithographic process and reactive-ion etching to form a second wiring layer made of the second refractory metal film  9 , the second metal film  11  and the second antireflection film  12 . 
     Then, as shown in FIG. 8A, a third plasma oxide film  14  having a thickness of approx. 50 nm is formed through the plasma CVD method using, for example, a mixed gas of SiH 4  and Mn. Thereafter, an HSQ film  15  having a thickness of approx. 1.4 μm is formed by applying HSQ onto the second wiring layer and baking it. Moreover, a fourth plasma oxide film  16  having a thickness of approx. 1.4 μm is formed on the HSQ film  15  through the plasma CVD method. Then, at least either of chemical polishing and mechanical polishing is performed so that the sum of the thicknesses of the HSQ film  15  and fourth plasma oxide film  16  reaches approx. 0.8 μm on the second wiring layer. Then, a second via hole  17  is formed through a photolithographic process and reactive-ion etching. Then, a third refractory metal film  18  made of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm is formed in the second via hole  17  through the sputtering method. Moreover, tungsten is deposited to approx. 0.5 μm through the CVD method using WF 6  or the like as a source gas and thereafter, the tungsten is left only in the via hole  17  by etching-back to form a second tungsten film  100 . Then, a third metal film  19  made of an AlCu film having a thickness of approx. 0.5 μm and a third antireflection film  20  made of a titanium nitride film having a thickness of approx. 50 nm are formed on the entire surface through the sputtering method. Then, patterning is performed through a photolithographic process and reactive-ion etching to form a third wiring layer made up of the third refractory metal film  18 , the third metal film  19 , and the third antireflection film  20 . 
     Then, as shown in FIG. 8B, a cover film  22  made up of a plasma oxide film having a thickness of approx. 0.8 μm and a plasma SiON film having a thickness of approx. 0.3 μm is formed. 
     The above conventional manufacturing method has a problem that the dielectric constant of HSQ rises in the manufacturing process though an HSQ film serving as a low dielectric constant film is used as a interlayer insulating film and thus, the wiring capacitance increases. 
     That is, when high-temperature heat is applied to an HSQ film after it is formed, some of Si-H bonds are broken down and they are changed to, for example, Si-OH bonds. Therefore, the number of Si-H bonds in the HSQ film decreases and thereby, the dielectric constant of the HSQ film increases. It is estimated that in the above conventional method the breakdown of Si-H bonds occurs when the plasma oxide film is formed at a temperature of approx. 300 to 400° C. or the tungsten film is formed at a temperature of approx. 400 to 450° C. Particularly, the number of Si-H bonds is greatly decreased at 400° C. or higher. Therefore, the number of Si-H bonds is greatly decreased under formation of a tungsten film when the highest temperature is used in the process, and the process causes the wiring capacitance to greatly increase. 
     SUMMARY OF THE INVENTION 
     It is an object of the present invention to provide a semiconductor device manufacturing method capable of manufacturing a semiconductor device having a small wiring capacitance even if a wiring pitch is small. 
     According to the present invention, a semiconductor device manufacturing method comprising the steps of forming a interlayer insulating film containing a hydrogen silsesquioxance (HSQ) film on the wiring layer, implanting hydrogen ions into the HSQ film, and annealing the semiconductor device is obtain. 
     Moreover, according to the present invention, a semiconductor device manufacturing method further comprising the steps of forming a via hole in the interlayer insulating film and embedding a tungsten film in the via hole, wherein the ion-implanting step and the annealing step are performed after the tungsten-embedding step is obtain. 
     Furthermore, according to the present invention, a semiconductor device manufacturing method in which the annealing step is performed in an atmosphere containing hydrogen is obtain. 
     According to the above methods, hydrogen is replenished into HSQ in which the number of Si-H bonds is decreased due to some of Si-H bonds being broken. Broken-down Si-H bonds are reconstructed, and the number of Si-H bonds again increases. Thereby, the dielectric constant of the HSQ lowers again, the wiring capacitance is reduced, and resultantly high operation speed and low power consumption are realized. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The above and other objects, advantages, and features of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings, in which: 
     FIGS. 1A and 1B are sectional views showing the semiconductor device manufacturing method of the first embodiment of the present invention; 
     FIGS. 2A and 2B are sectional views showing the semiconductor device manufacturing method of the first embodiment of the present invention; 
     FIGS. 3A and 3B are sectional views showing the semiconductor device manufacturing method of the first embodiment of the present invention; 
     FIG. 4 is an illustration showing the comparison between dielectric constants of HSQ films of the first embodiment of the present invention and a conventional example; 
     FIGS. 5A and 5B are sectional views showing the semiconductor device manufacturing method of the second embodiment of the present invention; 
     FIGS. 6A and 6B are sectional views showing the semiconductor device manufacturing method of the second embodiment of the present invention; 
     FIGS. 7A and 7B are sectional views showing the semiconductor device manufacturing method of a conventional example; and 
     FIGS.  8 A and  8 B.are sectional views showing the semiconductor device manufacturing method of a conventional example. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     [First embodiment] 
     As shown in FIG. 1A, a first refractory metal film  2  made of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm, a first metal film  3  made of an AlCu film having a thickness of approx. 0.5 μm, and a first antireflection film  4  made of a titanium nitride film having a thickness of approx. 50 nm to prevent reflection in a photolithographic process are formed on a first interlayer insulating film  1  made of a BPSG film having a thickness of approx. 0.8 μm in order from the bottom through the sputtering method. In this case, the first refractory metal film  2  and first antireflection film  4  are formed at a temperature of approx. 150 to 300° C. and the first metal film  3  is formed at a temperature of approx. 100 to 400° C. Then, patterning is performed through a photolithographic process and reactive-ion etching to form a first wiring layer made up of the first refractory metal film  2 , the first metal film  3 , and the first antireflection film  4 . Thereafter, a first plasma oxide film  5  having a thickness of approx. 50 nm is formed through the plasma CVD method using a mixed gas of SiH 4  and NH 3  at, for example, approx. 300 to 400° C. The plasma oxide film  5  is formed to improve the adhesiveness between an HSQ film to be formed next and the first wiring layer. HSQ is applied onto the first wiring layer so that a formed HSQ film has a thickness of approx. 0.4 μm. Then, baking is performed for 1 min at 150, 200, and 350° C. respectively and further in a nitrogen atmosphere at 400° C. for 60 min to form an HSQ film  6  as an interlayer insulating film. Moreover, a second plasma oxide film  7  having a thickness of approx. 1.4 μm is formed on the HSQ film  6  at 300 to 400° C. through the plasma CVD method. At least either of chemical polishing or mechanical polishing is performed so that the sum of thicknesses of the HSQ film  6  and second plasma oxide film  7  becomes approx. 0.8 μm on the first wiring layer. Since the HSQ film is a coating film, by itself, the thickness of the film is insufficient as an interlayer insulating film. Also, the quality of the HSQ film is deteriorated when it is exposed to an abrasive or cleaning solution. Therefore, in this embodiment, the second plasma oxide film  7  is formed on the HSQ film  6  to enable sufficient amount of CMP required to achieve a sufficiently planar surface. 
     Then, as shown in FIG. 1B, a first via hole  8  is formed through a photolithographic process and reactive-ion etching. Then, a second refractory metal film  9  made up of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm is formed in the first via hole  8  at approx. 150 to 300° C. through a sputtering method. Further, tungsten is deposited to a thickness of approx. 0.5 μm at a temperature of 400 to 450° C. through the CVD method using WF 6  or the like as a source gas and then the tungsten is left only in the first via hole  8  through etching-back to form a first tungsten film  10 . Then, a second metal film  11  made of an AlCu film having a thickness of approx. 0.5 μm and a second antireflection film  12  made of a titanium nitride film having a thickness of approx. 50 nm are formed on the entire surface through the sputtering method similarly to the case of the first metal film  3  and first antireflection film  4 . Then, patterning is performed through a photolithographic process and reactive-ion etching to form a second wiring layer made up of the second refractory metal film  9 , second metal film  11 , and second antireflection film  12 . 
     Then, as shown in FIG. 2A, hydrogen ions  13  are implanted at, for example, an energy of 50 keV and with a dose of approx. 1×10 −16 /cm 2 . Then, annealing is applied for approx. 10 min at a temperature of approx. 400° C. In this case, it is preferable to use a mixed gas of hydrogen and nitrogen at the ratio 1:1 as an annealing atmosphere. According to the above treatment, Si-H bonds broken down by preceding heat treatments, mainly at the time of forming tungsten film  10  are reconstructed to lower the dielectric constant that had increased. 
     Then, as shown in FIG. 2B, a third plasma oxide film  14  having a thickness of approx. 50 nm is formed at a temperature of approx. 300 to 400° C. by the plasma CVD method using, for example, a mixed gas of SiH 4  and NH 3 . Then, an HSQ film  15  is formed on the second wiring layer so as to have a thickness of approx. 0.4 μm by applying and baking HSQ, similar to the HSQ film  6 . Then, a fourth plasma oxide film  16  having a thickness of approx. 1.4 μm is formed on the film  15  through the plasma CVD method. Then, at least either of chemical polishing or mechanical polishing is applied to the fourth plasma oxide film  16  on the second wiring layer so that the sum of thicknesses of the HSQ film  15  and the fourth plasma oxide film  16  becomes approx. 0.8 μm. 
     Thereafter, a second via hole  17  is formed through a photolithographic process and reactive-ion etching. A third refractory metal film  18  made of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm is formed in the second via hole  17  through the sputtering method. Moreover, tungsten is deposited up to approx. 0.5 μm at a temperature of 400 to 450° C. through the CVD method by using WF 6  or the like as a source gas, and then the tungsten is left only in the via hole  17  through an etch-back process to form a tungsten film  100 . Then, a third metal film  19  made of an AlCu film having a thickness of approx. 0.5 μm and a third antireflection film  20  made of a titanium nitride film having a thickness of approx. 50 nm are formed on the entire surface through the sputtering method. Then, patterning is performed through a photolithographic process and reactive-ion etching to form a third wiring layer made up of the third refractory metal film  18 , third metal film  19 , and third antireflection film  20 . 
     Then, as shown in FIG. 3A, hydrogen ions  21  are implanted at, for example, an energy of 50 keV and with a dose of approx. 1×10 16 /cm 2 . Then, annealing is performed at a temperature of approx. 400° C. for approx. 10 min. In this case, it is preferable to use a mixed gas of hydrogen and nitrogen at the ratio 1:1 as an annealing atmosphere. According to this ion implantation and annealing, Si-H bonds in the HSQ films  15  and  6  broken down mainly when the second tungsten film  100  is formed are reconstructed and it is possible to lower the dielectric constants of the HSQ films  15  and  6 . 
     Then, as shown in FIG. 3B, a cover film  22  made up of a plasma oxide film having a thickness of approx. 0.8 μm and a plasma SiON film having a thickness of approx. 0.3 μm is formed. Differently from the first and second wiring layers, an HSQ film is not formed on the third wiring layer. This is because the wiring on the uppermost layer is normally used only as power-supply wiring or ground wiring having a large pitch and therefore, a slight wiring capacitance does not become a problem. Therefore, when a wiring capacitance is a problem, it is preferable to also use an HSQ film for this layer. 
     In the case of the first embodiment of the present invention described above, the HSQ film  6  is formed and then, a second wiring layer is formed on the film  6  and thereafter, hydrogen ions  13  are implanted and after that, annealing is performed. Therefore, in the HSQ film  6 , Si-H bonds broken down due to high-temperature heat treatment, particularly due to formation of the tungsten film  10  for embedding the first via hole  8 , are reconstructed and the raised dielectric constant is lowered again. Similarly, the HSQ film  15  is formed, then the third wiring layer is formed on the film  15 , and thereafter hydrogen ions  21  are implanted and after that annealing is performed. Thereby, in the HSQ film  15 , Si-H bonds broken down due to formation of the tungsten film  100  for embedding the second via hole  17  are reconstructed and the raised dielectric constant is lowered again. In this case, in the HSQ film  6 , Si-H bonds broken down due to formation of the tungsten film  100  are simultaneously reconstructed and the dielectric constant is reduced. 
     The above effect is described below by referring to FIG.  4 . FIG. 4 is an illustration showing the comparison between dielectric constants of HSQ films of the first embodiment and the conventional example shown in FIGS. 7 and 8. In FIG. 4, in the case of the conventional example, it is found that the dielectric constant of the HSQ film  6  between the first and second wiring layers is extremely increased due to the heating process experienced by the HSQ films. When the cover film  22  is finally formed, the dielectric constant rises up to approx. 3.7. Moreover, the dielectric constant of the HSQ film  15  between the second and third wiring layers rises up to approx. 3.4. In the case of the first embodiment of the present invention, however, the dielectric constants of the HSQ films  6  and  15  are kept at approx. 3.1. 
     In the case of this embodiment, hydrogen ions are implanted after forming a wiring layer. This is because the tungsten films  10  and  100  are formed through a method of forming a tungsten film on a refractory metal film and thereafter leaving the tungsten film in a via hole through etching-back. That is, in the case of the above method, immediately after forming the tungsten films  10  and  100 , the entire surfaces of the plasma oxide films  7  and  16  are covered with the refractory metal films  9  and  18 . Thus, hydrogen ions hardly reach the HSQ films  6  and  15  even if hydrogen ions are implanted under the above state. Therefore, ions are implanted after wirings are patterned. 
     However, hydrogen ion implantation and annealing can be performed in the heating process or any time after tungsten films are formed. For example, by embedding the tungsten films  10  and  100  in a via hole not through etching-back but through CMP, it is possible to perform the embedding of the films  10  and  100  immediately after the films  10  and  100  are formed if the upper sides of the oxide films  7  and  16  are exposed. 
     [Second Embodiment] 
     In FIGS. 5A and 5B and FIGS. 6A and 6B, portions same as those of the first embodiment are provided with the same symbol as those in FIGS. 1 to  4 . 
     First, FIG. 5A shows a state in which up to a second wiring layer is formed in the same manufacturing process as the first embodiment shown in FIGS. 1A and 1B and the description of the manufacturing process up to here is omitted. 
     Then, as shown in FIG. 5B, a third plasma oxide film  14  having a thickness of approx. 50 nm is formed through the plasma CVD method using, for example, a mixed gas of SiH 4  and NH 3 . Then, an HSQ film  15  is formed on the second wiring layer so that it has a thickness of approx. 0.4 μm by applying HSQ onto the wiring layer and baking it. Moreover, a fourth plasma oxide film  16  having a thickness of approx. 1.4 μm is formed on the film  15  through the plasma CVD method. Then, at least either of chemical polishing or mechanical polishing is applied to the fourth plasma oxide film  16  so that the sum of thicknesses of the HSQ film  15  and fourth plasma oxide film  16  becomes approx. 0.8 μm on the second wiring layer. 
     Moreover, a second via hole  17  is formed through a photolithographic process and reactive-ion etching. A third refractory metal film  18  made up of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm is formed in the second via hole  17  and on the fourth plasma oxide film  16  through the sputtering method. Then, tungsten is deposited up to a thickness of approx. 0.5 μm through the CVD method using WF 6  or the like as a source gas and then, the tungsten is left only in the via hole  17  through an etch-back process to form a second tungsten film  100 . Then, a third metal film  19  made of an AlCu having a thickness of approx. 0.5 μm and a third titanium nitride film  20  having a thickness of approx. 50 nm are formed on the entire surface through the sputtering method. Moreover, patterning is performed through a photolithographic process and reactive-ion etching to form a third wiring layer made of the third refractory metal film  18 , third metal film  19 , and third titanium nitride film  20 . 
     Then, as shown in FIG. 6A, hydrogen ions  13  are implanted at an energy of approx. 100 keV and with a dose of approx. 1×10 16 /cm 2 . In this case, most hydrogen ions  13  are particularly implanted into the HSQ film  6  between the first and second wiring layers. Then, annealing is performed at a temperature of approx. 400° C. for approx. 10 min. In this case, it is preferable to use a mixed gas of hydrogen and nitrogen at the ratio 1:1 as an annealing atmosphere. 
     Finally, as shown in FIG. 6B, a cover film  22  made up of a plasma oxide film having a thickness of approx. 0.8 μm and a plasma SiON film having a thickness of approx. 0.3 μm is formed. 
     In the case of the second embodiment, implantation of hydrogen ions is performed only once after up to the uppermost wiring layer (second wiring layer in the case of this embodiment) is formed. Therefore, the second embodiment has a less number of steps than the first embodiment. Because the HSQ film  6  passes through the step of forming the first and second tungsten films  10  and  100 , it has the maximum rise of the dielectric constant. However, because the hydrogen-ion implantation energy level is made higher than that of the first embodiment, hydrogen ions are adequately implanted into the HSQ film  6 . Therefore, it is possible to increase the decreased number of Si-H bonds again. 
     Thus, by properly adjusting the implantation energy and dose of hydrogen ions, it is possible to reconstruct Si-H bonds by a one-time ion implantation process even in case of semiconductor devices in which interlayer insulating films including a plurality of HSQ films are laminated. 
     Moreover, in the case of the second embodiment, it is not restricted to perform hydrogen ion implantation and annealing after patterning of wiring layers similarly to the case of the first embodiment. 
     Further, in the present invention, for supplementing shortage of hydrogen in a HSQ film, it is preferable to use a gas including hydrogen as an annealing atmosphere after hydrogen-ion implanting. However, if a gas including too much hydrogen is used, Si-O bonds in the HSQ film are broken and Si-H bonds increase excessively. Consequently, the HSQ film is lowered in mechanical strength and it becomes to be easily peeled off thus lowering the reliability of wirings. Therefore, in the first and second embodiment, a mixed gas of hydrogen and nitrogen at the ratio 1:1 as an annealing atmosphere is used. 
     Further, in the present invention, protons or deuterium may be used instead of the hydrogen ions. In particular, since deuterium is heavy compared with hydrogen, it has easier control over a depth of implanting. 
     A semiconductor device manufacturing method of the present invention comprises the step of forming a interlayer-insulting film containing HSQ and thereafter implanting hydrogen ions into the semiconductor device and the step of annealing the semiconductor device. Therefore, it is possible to manufacture a semiconductor device having a small wiring capacitance even for a small wiring pitch. 
     That is, hydrogen is replenished to a interlayer insulating film in which some of Si-H bonds are broken down due to the heating process such as tungsten film formation and thereby the number of Si-H bonds is decreased, and thus broken-down Si-H bonds are reconstructed and the number of Si-H bonds is increased again. Thereby, the dielectric constant of HSQ is lowered again, the wiring capacitance is reduced, and resultant high speed operation and low power consumption are realized. 
     It is apparent that the present invention is not limited to the above embodiments, but may be modified and changed without departing from the scope and spirit of the invention.