Patent Publication Number: US-9889653-B2

Title: Printhead with nanotips for nanoscale printing and manufacturing

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a division of U.S. patent application Ser. No. 13/855/105 filed Apr. 2, 2013, the disclosure of which is hereby incorporated herein by reference in its entirety. 
    
    
     FIELD OF THE EMBODIMENTS 
     The present teachings relate to the field of material deposition and printing and, more particularly, to a nanoprinthead including an array of nanotips and structures for actuation of the nanotips. 
     BACKGROUND 
     The ability to precisely deposit and pattern diverse materials such as metals, polymers, photoresists, conductive inks, etc., on a wide range of substrates at nanoscale dimensions (e.g., a feature size of 100 nm or less) is useful in a variety of technologies. For example, micro-images for security, biosensors, micro- and nano-sized lenses, plasmonic antennas, printed electronics, indentation, and other applications ail benefit from nanoscafe-sized patterns and features. Technologies such as dip-pen nanolithography, nanomachining using atomic force microscope (AFM) probe tips, and nanomachining have ail been used to form patterned features for various uses. 
     Existing methods for forming: nano-scale devices based on photolithographic processes such as e-beam lithography, ultraviolet (UV) lithography, x-ray lithography, and femtosecond laser machining are complex and expensive. Further, processes that provide self-assembly of printing structures are prone to variability and are not reproducible. 
     Different methods and structures that provide additional pattern formation alternatives would be desirable. 
     SUMMARY OF THE EMBODIMENTS 
     The following presents a simplified summary in order to provide a basic understanding of some aspects of one or more embodiments of the present teachings. This summary is not an extensive overview, nor is it intended to identify key or critical elements of the present teachings nor to delineate the scope of the disclosure. Rather, its primary purpose is merely to present one or more concepts in simplified form as a prelude to the detailed description presented later. 
     In an embodiment of the present teachings, a method for forming a nanoprinthead comprising a nanotip cantilever array including a plurality of nanotip cantilevers may include forming a patterned first mask having a first pattern over a first side of a substrate and a patterned second mask having a second pattern over a second side of the substrate, wherein the second side is opposite to the first side, etching the first side of the substrate using the first mask as a pattern to form a plurality of nanotips, etching the second side of the substrate using the second mask as a pattern, wherein the etching of the first side and the second side forms a plurality of bridges wherein each bridge comprises substrate material adjacent to each nanotip, and forming a sacrificial layer over the first side of the substrate, over the plurality of nanotips, and over the plurality of bridges. The method can further include etching the second side of the substrate to remove the plurality of bridges, to separate the substrate into a plurality of discrete structures held together by the sacrificial layer, and to form the nanotip cantilever array with each nanotip cantilever comprising a cantilever connected to the nanotip, and attaching the nanotip cantilever array to an array of actuation devices, wherein the array of actuation devices is configured to move each nanotip in a direction toward a surface to be contacted by the nanotip, and each nanotip cantilever of the nanotip cantilever array is individually addressable. 
     In another embodiment, a method for forming a nanoprinthead including a nanotip cantilever array including a plurality of nanotip cantilevers can include forming a patterned first mask comprising a first pattern over a surface of a substrate, etching a plurality of grooves within the surface of the substrate using the patterned first mask as a pattern, and removing the patterned first mask, forming a nanotip cantilever layer within the plurality of grooves and over the surface of the substrate, wherein the forming of the nanotip cantilever layer forms a plurality of nanotip cantilevers each comprising a nanotip within one of the plurality of grooves and a cantilever over the surface of the substrate, wherein the plurality of nanotip cantilevers are physically interconnected, and etching the nanotip cantilever layer to separate the plurality of nanotip cantilevers that are physically interconnected into a plurality of discrete nanotip cantilevers and to form the nanotip cantilever array. The method can further include attaching the nanotip cantilever array to an array of actuation devices, wherein the array of actuation devices is configured to move each nanotip in a direction toward a surface to be contacted by the nanotip, and each nanotip cantilever of the nanotip cantilever array is individually addressable, and releasing the plurality of discrete nanotip cantilevers from the substrate, 
     In another embodiment, a nanoprinthead can include a plurality of nanotip cantilevers, wherein each nanotip cantilever comprises a nanotip connected to a cantilever, a flexible diaphragm, wherein the plurality of nanotip cantilevers are physically connected to a first side of the flexible diaphragm, and a plurality of piezoelectric elements physically connected to a second side of the flexible diaphragm, and configured to move each nanotip in a direction toward a surface to be contacted by the nanotip upon activation of one of the plurality of piezoelectric elements. 
     In another embodiment of the present teachings, a method for forming an electrical circuit can include applying a voltage to at least one piezoelectric element of a piezoelectric element array to contact a surface with a nanotip that is part of a nanotip cantilever array of a nanoprinthead, and transferring a material from the at least one nanotip to the surface through physical contact between the material and the surface. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the present teachings and together with the description, serve to explain the principles of the disclosure. In the figures: 
         FIGS. 1A-1F  are cross sections depicting an embodiment of the present teachings for forming one or more nanotip cantilevers; 
         FIGS. 2A-2F  are cross sections depicting another embodiment of the present teachings for forming one or more nanotip cantilevers; 
         FIG. 3  is a cross section of a nanotip cantilever and an optional bonding surface in accordance with an embodiment of the present teachings; and 
         FIGS. 4A and 4B  are perspective depictions of two different layouts of piezoelectric element subarrays in embodiments of the present teachings. 
     
    
    
     It should be noted that some details of the FIGS. have been simplified and are drawn to facilitate understanding of the present teachings rather than to maintain strict structural accuracy, detail, and scale. 
     DESCRIPTION OF THE EMBODIMENTS 
     Reference will now be made in detail to exemplary embodiments of the present teachings, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts. 
     Embodiments of the present teachings include nanoprinting structures, nanoindenting/nanoscratching structures, and methods for forming the nanoprinting and nanoindenting/nanoscratching structures. Embodiments of the present teachings can further include a method and structure for a nanotip cantilever array, and a method and structure for individually addressing each nanotip cantilever of the nanotip cantilever array. Methods for forming the various structures such as sharp nanotips can be accomplished using simplified techniques compared to some conventional manufacturing techniques. For purposes of the present disclosure, unless stated otherwise, a “nanoprinthead” is a marking device including an array of nanotip cantilevers as described below. The nanoprinthead can provide additive marking capabilities, for example by applying an ink, a dielectric layer, a conductive layer, etc., subtractive capabilities, for example by removing a portion of a layer through nanoscratching, or marking capabilities by nanoindenting or nanopunching a layer. 
     An embodiment of the present teachings can include a method for forming a nanoprinthead, specifically a nanoprinthead cantilever array as depicted in  FIGS. 1A-1E .  FIG. 1A  depicts a starting substrate  10 , for example a semiconductor wafer or wafer section that can be a silicon wafer as used with microelectronic manufacture. A patterned first mask  12  having a first pattern is formed on a first side or surface  14  of the substrate, and a patterned second mask  16  having a second pattern different than the first pattern is formed on a second side or surface  18  of the substrate  10  that is opposite to the first side  14  as depicted in  FIG. 1A . A first opening  20  in the first mask  12  can generally align with a second opening  22  in the second mask  16  in a direction perpendicular to the first side  14  and the second side  18  of the substrate  10 . The masks  12 , 16  may be an oxide such as silicon dioxide (SiO 2 ) or another material that has a much slower etch rate than the material of the substrate  10  when exposed to a selected etchant 
     After forming a structure similar to that depicted in  FIG. 1A , the structure is exposed to an etch, for example a wet etch such as potassium hydroxide (KOH) or another wet or dry etchant that removes the substrate  10  at a much faster rate than it removes the masks  12 ,  16 . This results in a structure similar to that depicted in  FIG. 1B . This etch forms a nanotip  24 , for example a silicon nanotip. In an embodiment, the pattern of masks  12 ,  16  can be repeated across the substrate  10  to form a nanotip array comprising a plurality of nanotips  24 . During this etch, exposed portions of the first side  14  and the second side  18  are etched which forms a thin bridge  26  of substrate  10  material at a location adjacent to the nanotip  24  and between the nanotip  24  and a sacrificial portion  23  the substrate  10 . At this point in the process, the substrate  10  remains as a continuous patterned layer that may include a plurality of nanotips  24 . 
     Next, as depicted in  FIG. 1C , the masks  12 ,  16  are removed from the substrate  10 , and a sacrificial layer  30  is formed over the first side  14  of the substrate  10 . The sacrificial layer  30  is formed to a sufficient thickness to hold individual sections of the substrate  10  together during subsequent processing. The sacrificial layer  30  may be a conformal layer or a planar layer formed using any sufficient technique. In an embodiment, the sacrificial layer  30  may be a silicon nitride (Si 3 N 4 ) layer having a thickness of between about 0.010 μm and about 2.0 μm, or between about 0.015 μm and about 1.0 μm, or between about 0.20 μm and about 0.500 μm. Other materials are also contemplated for the sacrificial layer  30 , for example photoresist, silicon dioxide, chromium, aluminum, or other materials with a suitable etch selectivity that are compatible with processing. 
     As depicted in  FIG. 1C , a patterned mask  32  may be formed on the second side  18  (the surface opposite the nanotip  24 ) as an option that will provide a bonding surface during subsequent processing as described below. The mask  32  may be the same material as the sacrificial layer  30 , for example Si 3 Na 4 , or a different material. 
     Next, the second side  18  is exposed to a vertical anisotropic etch to remove exposed portions of the second side  18  of the substrate  10  and, optionally, to form a bonding surface  34  as depicted in  FIG. 1D . This etch also removes the bridge  26  ( FIG. 1C ) of substrate  10  material adjacent to the nanotip  24 , and separates the substrate  10  into a plurality of discrete structures including one or more discrete nanotip  24  connected to one or more cantilever  36  (referred to together herein as a “nanotip cantilever  37 ”) and one or more sacrificial portions  28  of the substrate. At this point, the different structures including the sacrificial portions  28  and the one or more cantilevers  36  are held together by the sacrificial layer  30 . 
     As depicted in  FIG. 1E , each bonding surface  34  may be attached to an actuation device  38 . The actuation device  38  is configured to move the nanotip in a direction toward a surface to be contacted by the nanotip. The actuation device  38  may include a flexible membrane or diaphragm  40  and a piezoelectric element  42  (i.e., P2T or piezoelectric transducer). Piezoelectric elements  42  as part of a piezoelectric element array are known in the art of ink jet printhead manufacture. For example, the formation of piezoelectric elements is described in U.S. Ser. No. 13/011,409, filed Jan. 21, 2011 and titled “Polymer Layer Removal on PZT Arrays Using a Plasma Etch,” which is incorporated herein by reference in its entirety. 
     As depicted in  FIG. 1E , the third mask  32  may remain on the bonding surface  34  when the bonding surface  34  is attached to the diaphragm  40 . In another embodiment, the third mask  32  may be a different material than the sacrificial layer  30 , and may be etched away prior to attachment of the bonding surface  34  to the diaphragm  40 , for example as depicted in  FIG. 1F . In either case, the bonding surface  34  may be attached to the diaphragm  40  using any sufficient adhesive (not individually depicted for simplicity) such as an epoxy or a thermoset. Once the nanotip cantilevers  37  are attached to the diaphragm, the sacrificial layer  30  may be etched away to leave at least one nanotip cantilever  37  attached to the diaphragm  30 , and to remove the sacrificial portions  28  of the substrate  10 . 
     As depicted in  FIG. 1F , simultaneous processing of a plurality of nanotip cantilevers  37  to form a nanotip cantilever array can be performed. This results in a plurality of nanotip cantilevers  37  (which includes elements  24 ,  36 ) attached to a diaphragm  40  and to a plurality of piezoelectric elements  42 . The nanotip cantilever array may be formed using the process of  FIGS. 1A-1E , or a different process. 
     The completed structure of  FIG. 1F  can further include an interstitial dielectric material  44  interposed between each piezoelectric element  42 , and an electrical circuit  48 , for example a flexible printed circuit (i.e., flex circuit) or printed circuit board (PCB), having a plurality of conductive traces  50 . Each trace  60  of the circuit  48  is electrically coupled with a conductive surface of one of the piezoelectric elements  42  such that each piezoelectric element  42  is individually addressable. Each trace  50  is electrically coupled to a voltage source. 
     Once a nanoprinthead including the nanotip cantilever array has been completed, it may be installed as part of a printer or marking system as depicted in  FIG. 1F . In operation, a selected piezoelectric element  42  is activated by applying a voltage to the trace  50  attached to the selected piezoelectric element  42 . The diaphragm  40  may function as a common bottom (ground) electrode for each piezoelectric element  42 . Upon the application of the voltage, the activated piezoelectric element  42  bends or deflects, causing the diaphragm  40  to flex. Flexing of the diaphragm  40  at a location between a piezoelectric element  42  and a nanotip cantilever  37  attached to the diaphragm  40  causes movement of the nanotip cantilever  37  which, in turn, causes the nanotip  24  to move in a direction away from the diaphragm  40 . A surface  52  to be printed or marked is loaded into the printer or marking system, and the printhead, including the nanotips  24 , can descend into light contact with the surface  52 . The nanotips  24  and printhead may then be lifted away from the surface  52  to establish a standby distance that may be based on the vertical distance the nanotip  24  travels during actuation of its associated piezoelectric element  42 . Activating the actuation device  38  moves the nanotip  24  toward the surface  52 , and thus the surface is physically contacted by the nanotip  24  during the application of a voltage to its associated piezoelectric element  42 , and is not contacted by the nanotip  24  if no voltage is applied to the piezoelectric element  42 . In an embodiment, the end of the nanotip  24  may dent or scratch a surface  52  or a coating on the surface  52  placed near the nanotip  24  during flexing of a piezoelectric element  42 . In another embodiment, the end of the nanotip  24  may be dipped in a liquid material or a powder material, which is then dispensed or transferred to the surface  52  during flexing of an associated piezoelectric element  42  to form a layer  54 . 
     In an embodiment, layer  54  may be, for example, an ink or pigment used to complete an image such as text, a pictorial image, or an encoded image on the surface  52 . To form the image, coordinate image data may be supplied to the printer or marker by, for example, a digital device such as a processor. The coordinate image data is read by the printer or marker, which is then used by the device to move or scan the printhead over the surface  52  to an appropriate location. At the appropriate location, the piezoelectric element  42  is activated such that the nanotip  24  contacts the surface  52  and transfers the ink or powder  54  to the surface  52 . As discussed above, the ink or powder  54  can be disposed onto the nanotip  24  by dipping the nanotip into a receptacle containing the ink or powder  54 . In another embodiment, the ink or powder can be disposed onto the nanotip  24  by spraying or by using an electrostatic dispensing process. 
     Additionally, element  54  in  FIG. 1F  can represent a conductive or dielectric material that functions as a circuit component on a substrate surface  52  such as a printed circuit board. A piezoelectric element  42  may be activated such that the nanotip  24  contacts the substrate  52  to transfer the conductor or dielectric material from the nanotip  24  to the substrate  52  to form a patterned layer of material  54 . In an embodiment, the material  54  may form one or more conductive traces and/or conductive pads that form part of an electric circuit. In another embodiment, the material  54  may provide a patterned dielectric layer that may be used, for example, as a mask to form a patterned conductive layer during a damascene deposition process. In an embodiment, the nanotip cantilever  37  including nanotip  24  and cantilever  36  can function as part of a 3D printer which uses the selective deposition of material to form a patterned conductive or dielectric structure. 
     It will be appreciated that the  FIG. 1F  structure may also represent a subtractive process where portions of conductive or dielectric layer  54  are scratched or scraped from the surface  52  using the actuated nanotips  24  to form a patterned structure  54 . 
     In another embodiment, instead of scanning the nanotip  24  across the surface  52 , the surface  52  itself may be moved so that the nanotip  24  overlies an appropriate location, then the piezoelectric element  42  is activated such that the nanotip  24  contacts the surface. In another embodiment, the nanotip  24  and the surface  52  may be a conductive material, so that physical contact between the nanotip  24  and the surface  52  establishes electrical contact therebetween to function, for example, as a probe tip. In embodiments, the nanotip  24  may be a conductor, a semiconductor, or a dielectric. 
     Another embodiment for forming at least one nanotip cantilever, or a nanotip cantilever array comprising a plurality of nanotip cantilevers, is depicted in  FIGS. 2A-2F . In  FIG. 2A , a patterned first mask  62 , such as a photoresist layer, is formed over a substrate  60 , for example a semiconductor wafer such as a silicon wafer. An anisotropic etch such as a KOH wet etch is performed to undercut the first mask  62  and to form at least one, or a plurality, of “V” shaped or “U” shaped grooves  64  within the substrate  60  as depicted. 
     After etching the substrate  60 , the first mask  62  is removed and an optional conformal release layer  66  is formed over the surface of the substrate  60 , followed by a planar or nanotip cantilever layer  68 . The optional conformal release layer  66  may be, for example, a polymer, while the nanotip cantilever layer  68  may be metal such as copper, a metal alloy, a dielectric such as Si 3 N 4 , or another suitable material depending on the intended use of the completed nanotip. The nanotip cantilever layer  68  is formed within the grooves and over the surface of the substrate  60  as depicted. In an embodiment, the nanotip cantilever layer  68  may be a material that releases from the substrate  60  such as a polymer, in which case a release layer  66  need not be used. In another embodiment, a metal or Si 3 N 4  layer may be formed that releases from the substrate without the need for a release layer  66 . In this embodiment, the formation of the nanotip cantilever layer  68  forms a plurality of nanotips and a plurality of cantilevers all physically interconnected (i.e., connected to form a continuous layer) as depicted in  FIG. 2B . 
     After forming the nanotip cantilever layer  68 , a patterned second mask  70  as depicted in  FIG. 2B  is formed that will be used to define a length of each nanotip cantilever. An anisotropic vertical etch is performed on the  FIG. 2B  structure, specifically on the nanotip cantilever layer  68 , to define the length of each nanotip cantilever and to separate the plurality of physically interconnected nanotip cantilevers into a plurality of discrete nanotip cantilevers as depicted in  FIG. 2C . The release layer  66 , if used, or the substrate  60  may be used as an etch stop layer. After etching, the patterned second mask  70  is removed. 
     Next, a patterned third mask  72  is formed which exposes an end of each nanotip cantilever  68 . A plurality of supports  74  may then be formed, for example using the exposed portion of the nanotip cantilevers  68  as an electroplating seed layer during formation of the supports  74 , with the openings in the patterned third mask  72  defining the location and shape of the supports  74 . In another embodiment, a dielectric layer such as Si 3 N 4  may be used as the supports  74  using a patterning process. If the supports  74  are formed using electroplating, a dielectric layer  76  ( FIG. 2E ), for example a polymer layer, may be formed to encapsulate each support  74  and to form a standoff layer for each nanotip cantilever, for example using a patterning process. 
     Next, a lift-off layer  78  may be attached to each standoff layer  76  as depicted in  FIG. 2E . In an embodiment, the lift-off layer  78  may be a handle wafer that is used to transport and/or further process the nanotip cantilevers  68 . In another embodiment, the lift-off layer  78  can include an actuation device  38  ( FIG. 1F ), for example an array of piezoelectric elements  42  and a flex circuit or PCB  48  having traces  50  electrically coupled to each piezoelectric element  42 . 
     After attachment of the lift-off layer  78 , the plurality of nanotip cantilevers  68  may be released from the substrate  60  as depicted in  FIG. 2F . In an embodiment, the structure of  FIG. 2E  may be heated to soften the release layer  66  to facilitate release of the nanotip cantilevers  68  from the substrate  60 . In another embodiment, differences in thermal coefficients of expansion between the nanotip cantilevers  68  and the substrate  60  are utilized to release the nanotip cantilevers  68  from the substrate  60  during a heating or cooling process without the use of a release layer. 
     Using an embodiment of the present teachings, and referring to  FIG. 3 , each nanotip cantilever  80  may include a nanotip  82  connected to a cantilever  84 . The nanotip cantilever  80  may optionally be connected to a bonding surface  86 . The cantilever  84  can have a length  88  of between about 80 μm and about 400 μm and a thickness of between about 2 μm and about 6.5 μm. The nanotip  82  may have a height  90  of between about 5 μm and about 25 μm and a width  92  of between about 20 μm and about 40 μm. The nanotip sharpness (tip radius) may be between 1 nanometer to 100 nm. The tip radius will depend upon the resolution of the nanostructure desired. The bonding surface  86 , if used, may have a width  94  of between about 80 μm and about 450 μm and a height  96  of between about 200 nm and about 1 μm. It will be understood that the size of the features will depend on the use of the structure, and that dimensions outside the described ranges may be formed using an embodiment of the present teachings. 
     In an embodiment, referring back to  FIG. 2F , the substrate  60  may be reused as a substrate for the formation of additional nanotip cantilevers  68 , in an embodiment, the release layer  66  may also be reused, or the release layer  66  can be stripped and reformed for a subsequent production lot of nanotip cantilevers  68 . Further, the lift-off  78  may also be reused. 
     Exemplary piezoelectric element layouts are depicted in the isometric depictions of  FIGS. 4A and 4B .  FIG. 4A  depicts an exemplary layout for a 600 dot per inch (dpi) piezoelectric element array (and thus a 600 dpi nanotip cantilever array) having a 600 μm pitch, while  FIG. 4B  depicts a layout for a 1200 dpi piezoelectric array (and thus a 1200 dpi nanotip cantilever array) having a 300 μm pitch. 
     It is contemplated that a plurality of modular subarrays such as those depicted in  FIGS. 4A and 4B  may he fabricated and assembled together to form an entire array. For example,  FIG. 4A  depicts an 8×10 subarray  100  which may be part of a 64×100 array of piezoelectric elements, and  FIG. 4B  depicts a 10×12 subarray  102  which may be part: of a 400×480 array of piezoelectric elements. Any number of subarrays may be assembled to form a desired array, but maintaining planarity of the subarrays within the array becomes more difficult as array size increases. Each subarray  100 , 102  may be an individual module that includes a piezoelectric element  42  ( FIG. 1F ) subarray, a subcircuit assembly such as a flex circuit or PCS  48  ( FIG. 1F ), and a nanotip cantilever  37  ( FIG. 1D ) subarray. If damage or wear occurred within the module, only the module itself may be replaced rather than requiring replacement of the entire array. Further, each module may be separately tested for proper functionality before assembly info the array, thus simplifying the manufacturing process. Further, testing a module before assembly may simplify rework. 
     It is contemplated that a nanotip  24  or cantilever  36  may become damaged during use. Detection of missing nanotips may be achieved through a variation of missing jet detection or self sensing as implemented by some piezoelectric ink jet printheads. Further, characterization, measurement, calibration, and qualification of cantilever operation may be established through methods based on optical interferometry. Optical interferometry, cantilever deflection sensors, and self-sensing can be used for feedback, and printer control electronics and motion can be used as drive controls for a printer or marker/marking system that includes a nanotip cantilever  37  in accordance with the present teachings. 
     Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the present teachings are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. Any numerical value, however, inherently contains certain errors necessarily resulting from the standard deviation found in their respective testing measurements. Moreover, all ranges disclosed herein are to be understood to encompass any and all sub-ranges subsumed therein. For example, a range of “less than 10” can include any and all sub-ranges between (and including) the minimum value of zero and the maximum value of 10, that is, any and all sub-ranges having a minimum value of equal to or greater than zero and a maximum value of equal to or less than 10, e.g., 1 to 5. In certain cases, the numerical values as stated for the parameter can take on negative values. In this case, the example value of range stated as “less than 10” can assume negative values, e.g. −1, −2, −3, −10, −20, −30. etc. 
     While the present teachings have been illustrated with respect to one or more implementations, alterations and/or modifications can be made to the illustrated examples without departing from the spirit and scope of the appended claims. For example, it will be appreciated that while the process is described as a series of acts or events, the present teachings are not limited by the ordering of such acts or events. Some acts may occur in different orders and/or concurrently with other acts or events apart from those described herein. Also, not all process stages may be required to implement a methodology in accordance with one or more aspects or embodiments of the present teachings. It will be appreciated that structural components and/or processing stages can be added or existing structural components and/or processing stages can be removed or modified. Further, one or more of the acts depicted herein may be carried out in one or more separate acts and/or phases. Furthermore, to the extent that the terms “including,” “includes,” “having,” “has,” “with,” or variants thereof are used in either the detailed description and the claims, such terms are intended to be inclusive in a manner similar to the term “comprising.” The term “at least one of” is used to mean one or more of the listed items can be selected. Further, in the discussion and claims herein, the term “on” used with respect to two materials, one “on” the other, means at least some contact between the materials, while “over” means the materials are in proximity, but possibly with one or more additional intervening materials such that contact is possible but not required. Neither “on” nor “over” implies any directionality as used herein. The term “conformal” describes a coating material in which angles of the underlying material are preserved by the conformal material. The term “about” indicates that the value listed may be somewhat altered, as long as the alteration does not result in nonconformance of the process or structure to the illustrated embodiment. Finally, “exemplary” indicates the description is used as an example, rather than implying that it is an ideal. Other embodiments of the present teachings will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the present teachings being indicated by the following claims. 
     Terms of relative position as used in this application are defined based on a plane parallel to the conventional plane or working surface of a workplace, regardless of the orientation of the workplace. The term “horizontal” or “lateral” as used in this application is defined as a plane parallel to the conventional plane or working surface of a workplace, regardless of the orientation of the workplace. The term “vertical” refers to a direction perpendicular to the horizontal. Terms such as “on,” “side” (as in “sidewall”), “higher,” “lower,” “over,” “top,” and “under” are defined with respect to the conventional plane or working surface being on the top surface of the workplace, regardless of the orientation of the workpiece.