Patent Publication Number: US-2019181628-A1

Title: Arc fault current detector

Description:
FIELD 
     This invention relates to an arc fault current detector. 
     BACKGROUND 
     Arcing is a normal function of switching loads or equipment on or off or running certain types of equipment such as motors, etc. Such arcing is not dangerous and will not normally pose an electric fire threat. On the other hand, arc fault currents that are sustained can pose a fire threat and should preferably be detected and interrupted before posing a serious fire risk. This is the function of arc fault current detectors. 
     U.S. Pat. No. 8,743,513 (Ref: WA/47A) describes a technique for detecting arc fault currents, and also describes various techniques employed by other inventors. In the vast majority of examples cited, a current transformer is used as the main sensor for detection of a signal arising from an arc fault current. Current transformers (CTs) provide a simple means of detecting arc fault currents but they tend to be bulky and expensive, and the passing of main conductors through the aperture of CTs can present problems of space, manufacturability and cost, etc. 
     Shunts placed in series with one or more main conductors have also been used for the detection of a signal arising from an arc fault current. The use of shunts as the detecting means gives rise to the appearance of high voltages on the electronic detecting circuitry, and possible isolation problems, and it can also be technically very challenging to use shunts on more than one conductor. For these and other reasons, shunts are rarely used for arc fault current detection. 
     U.S. Pat. No. 6,972,572 describes a technique using an inductor in series with at least one of the supply conductors, and deriving from the series inductor a signal arising from an arc fault current. It should be noted that the detecting circuitry is connected directly across the inductor part of the main conductor which may give rise to the appearance of high voltages on the electronic detecting circuitry, and possible isolation problems. US2004/0156153 discloses an arc fault detection system comprising a pick-up coil to sense and pick up a broadband arc fault signal from a power cable and to provide the signal to an amplifier. The amplified signal is applied to a high-pass filter to only pass frequency components above a predetermined frequency. The high-passed frequency components are then applied to band-pass filters, using a plurality of non-harmonically related center frequencies to generate narrow frequency slices of the signal. Each slice of the signal is rectified to generate a DC level signal. Detection can be made for each DC level signal using level detectors. Using a logic matrix, an arc fault can be determined when all DC level signals from the event indicate detection, while signals from power and ground sources indicate no system noise. 
     SUMMARY 
     According to the present invention there is provided an arc fault current detector according to claim  1 . 
     Embodiments of the invention use one or more inductors for the detection of arc fault currents, the inductors being used merely as detection means and not being required to carry currents or voltages associated with a load or protected circuit. Problems of isolation are not encountered and the inductors can be relatively small and inexpensive and mitigate many of the problems outlined above. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings, in which: 
         FIG. 1  is a basic embodiment illustrating the principles of operation of the invention. 
         FIGS. 2 to 6  are circuit diagrams of progressively more sophisticated embodiment of the invention. 
         FIG. 7  is a diagram of a microprocessor control unit (MCU) used in the embodiments. 
         FIGS. 8 a  and 8 b    illustrate the high and low frequency inductors L 1 , L 2  used in embodiments of the invention, and their corresponding circuit symbols. 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 1  shows two conductors P 1  and P 2  connected from a mains electricity supply to a load  10 . The conductors could be the Live and Neutral conductors of a single phase system or the Phase  1  and Phase  2  conductors of a two phase system. An inductor L 1  comprising a coil W 1  wound on a bobbin  12  ( FIG. 8 a   ) is placed in close proximity to the two conductors P 1 , P 2 . However, the conductors P 1 , P 2  neither pass through the coil W 1  nor is the coil electrically connected to either of them. The core of the coil  14  (i.e. the centre of the bobbin  16 ) may be air but is preferably a magnetically responsive material such as ferrite. In  FIG. 8 a    the winding W 2  is an optional test winding and will be described later, together with the test circuitry to the left of P 1  in  FIGS. 2 to 6 . 
     The coil W 1  is connected to an electronic circuit  14  to detect any signal produced by the coil. The point X shown on conductor P 1  represents a break in the conductor which can be intermittently closed and opened so as to cause arcing within the conductor. It can be demonstrated that by suitable choice of the characteristics of the inductor L 1 , an output signal can be produced by the inductor in response to arcing currents over a wide range of frequencies into the MHz range i.e. at frequencies greater than 1 Mhz. L 1  resonates in the MHz range due to self or parasitic capacitance, or may be encouraged to resonate in this range by the optional addition of a capacitor C 1  as shown for  FIG. 2 . The inductor output signal can be detected by the electronic circuit  14 . It should be noted that there is no direct electrical connection between the inductor and either of the main conductors. 
     Thus, this simple technique alone can be used for the detection of an arc fault current. However, for practical applications, the arc fault current detector will need to meet the requirements of various product standards such as UL1699 or IEC 62606, etc. These standards set out the requirements for arc fault current detection levels, response times for clearing a fault, detection of arc fault currents on circuits with parallel loads, and tests to verify immunity to nuisance or false tripping in the presence of non-fault arcing which occurs during the operation of certain loads such as power tools and vacuum cleaners, etc. 
       FIG. 2  shows how the arcing current detection technique outlined in  FIG. 1  can be used as the basis for a more practical arc fault current detection circuit. 
     Generally, in  FIG. 2 , the high frequency (MHz) analog signal from L 1  is amplified by an amplifier circuit U 1  and converted to a digital signal MCU 1  by a comparator U 2 . The output signal from U 2  can swing between 0V and V+. The microcontroller analyses signal MCU 1  by checking pulse widths and periods and looks for signal patterns having frequency characteristics that are typical for an arc fault current. 
     More specifically, the two mains supply conductors P 1  and P 2  are placed in close proximity to inductor L 1 , and may advantageously be placed on opposite sides of L 1 , as for  FIG. 1 . An arc fault current flowing in P 1  or P 2  will induce energy into L 1  with a very wide frequency spectrum up to the MHz range. L 1  resonates at frequencies into the MHz range due to self or parasitic capacitance, or may be encouraged to resonate in this range by the optional addition of a capacitor C 1 . In any event the resultant output is preferably dampened by the inclusion of a resistor R 1  across L 1 . The resultant signal produced by L 1  is AC coupled to an AC amplifier U 1  via a capacitor C 2 , the gain of U 1  being set by R 4 , R 5  and C 3 . The input to U 1  is normally tied to a voltage level between +v and 0v as set by resistors R 2  and R 3  with the result that this node can swing positive or negative about this DC level as determined by the signal passed to this node via C 2 . The output of U 1  is AC coupled to a comparator U 2  which will produce a series of positive-going pulses over a wide frequency spectrum. These pulses can be fed directly to the input MCU 1  of a microprocessor control unit (MCU),  FIG. 7 , and the MCU can be used to analyse the pulses and to determine the individual pulse widths, the duration of a burst of pulses, discriminate between broad and narrow pulses or the repetition rate of pulses or the frequency of pulses, so as to determine when an arc fault current is present as opposed to normal arcing associated with switching of appliances, etc. When the MCU has determined that an arc fault current is present it can output a FAULT signal which can be used to activate an alarm or activate a circuit breaking means such as a circuit breaker, a contactor or a relay to disconnect the supply and terminate the arc fault current. Such techniques will be familiar to those versed in the art. 
     It may be desirable for the MCU to carry out its analysis during intermittent periods of time related to the mains supply, for example for part of or for one or more half cycles of the mains supply.  FIG. 3  shows how this can be done very simply where a resistor R 9  and a zener diode D 2  are connected from one of the mains conductors to the 0V supply of the electronic circuit without making any significant change to the detecting means of  FIG. 2  which remains the same in  FIG. 3 . This will produce a series of pulses that can be fed to an input MCU 2  of the MCU. In response, the MCU will only carry out its analysis during the occurrence of a pulse on MCU 2 . In  FIG. 3 , the breakdown voltage of D 2  is less than the supply voltage of the MCU. 
       FIG. 4  shows an additional method for discriminating between normal arcing and an arc fault current whilst retaining the detecting means of  FIGS. 2 and 3 . 
     The output of U 2  is connected to the +ve input of U 2  and ground via resistors R 8  and R 7 , with the result that U 2  has hysteresis that will cause the +ve input of U 2  to change when the output of U 2  changes state. On initial power up, U 2  −ve input is pulled to ground so U 2  output will be high. Diode D 1  protects U 2  against negative voltage on input. The signals arriving from U 1  will swing positive and negative, and positive going signals that exceed U 2  +ve input will cause U 2  output to go low. This will result in positive going pulses of varying frequencies and varying pulse width to appear at U 2  output. As stated previously, the signal produced by L 1  can extend up to the MHz range so U 2  output pulses can also extend up to this level. 
     It is well known that the mains wiring in homes is now commonly used for the transmission of signals around the home, for example to replace the use of wi-fi® in rooms not provided with a modem, etc. Plug-in adaptors are commonly used for such applications because they can be fitted in any socket outlet in any room in the home to facilitate the reception of Ethernet signals. Such signals could be detected by the simple circuits of  FIG. 2  or  FIG. 3  and could be mistaken for arc fault current signals and result in nuisance tripping of an arc fault current detector. 
     In  FIG. 4 , resistor R 11  and capacitor C 5  form a first filter which will pass pulses at frequencies up to a first level F 1  which has a roll off frequency that extends into the MHz range and captures most of the pulses produced by L 1 . These pulses are fed to the MCU as input MCU 3 . Resistor R 12  and capacitor C 6  form a second filter which will pass pulses at frequencies up to a second level F 2  which preferably has a lower roll off frequency than F 1 . It follows that by manipulation of the values of R 12  and C 6 , the roll off frequency of F 2  can be set at any value up to and including the F 1  value. The F 2  pulses are fed to the MCU as input MCU 4 . 
     The MCU can be programmed such that substantially all pulses up to the F 2  roll off frequency are ignored by the MCU with the result that the MCU sees only pulses in the frequency window between the roll off frequency of F 2  and that of F 1 . These pulses will vary in frequency and pulse width. The effect of this arrangement is to produce a window of visibility which can exclude signals produced by mains borne signalling devices such as Ethernet powerline transmitters, etc. 
     For the purpose of discriminating between normal arcing and an arc fault current, the circuit can be subjected to a range of arcing conditions from switching appliances or equipment on and off to running motors to creating genuine arc fault currents etc. and the MCU can then be calibrated to ignore the normal arcing and just respond to the arc fault currents. 
     It will be seen that when two conductors P 1  and P 2  are coupled as shown to L 1 , it may not be practical to obtain an accurate measurement of the level of a load or an arc fault current without the addition of specific current detection or measuring means. It would be advantageous to know the level of the arc fault current so as to provide another level of discrimination such that currents below a certain level could be disregarded and only arc fault currents above a certain level would be considered for detection and thereby reduce the risk of nuisance tripping.  FIG. 5  shows an arrangement for providing such discrimination. 
     L 2  is a second inductor which is used to indicate the magnitude of the load current and to produce signals indicative of arcing. One of the load carrying conductors, in this case P 2 , is looped around the outside of the inductor so as to induce a signal into the inductor at power (e.g. mains) frequency; see  FIG. 8 b   . Looping as shown provides a closer inductive coupling between P 2  and the coil W 1 , which in the present embodiment is necessary for detecting power frequency signals. However, such looping may not be necessary in all embodiments. Higher frequency signals will also be induced into L 2  under arcing conditions. C 7  and L 2  form a tuned circuit which preferably has a resonant frequency within the range 10 KHz to 150 KHz but in any event is responsive to arcing currents in this range. This is a substantially narrower frequency spectrum than that produced by  FIG. 2  and is also centred on a much lower frequency. Provided that the current flowing in conductor P 2  is above a certain level, the resultant output across C 7  will have a power frequency component that will be detected by low pass filter R 13 , C 8  and will feed a corresponding signal to the MCU as input MCU 6 . Under arcing conditions, the signal generated within the range 10 KHz to 150 KHz will be fed to comparator U 3  by capacitor C 9  and U 3  will produce corresponding output pulses when the input signals exceed the level of Vref 1 . These pulses will be fed to the MCU as input MCU 5 . Thus, the circuit driven by L 2  will provide an indication of the power frequency, e.g. 50 Hz or 60 Hz, the magnitude of the power frequency current, and the presence of an arc fault with a current above a certain threshold. 
     The MCU can then optionally be programmed to produce an output indicative of an arc fault current only when MCU 1 , MCU 2 , MCU 5  and MCU 6  are all present. Using MCU 5  in particular enables the MCU to discriminate between relatively low frequency signals and relatively high frequency signals. 
     It may be advantageous to include detection of ground fault currents to the arc fault current detector, and a means to achieve this is shown in  FIG. 6 . The mains conductors P 1  and P 2  are passed through a current transformer CT whose output is tied to a reference voltage vref 3 , and any residual current flowing in the mains conductors will produce an output which is fed to the MCU as input MCU 7 . When MCU 7  exceeds a certain threshold it will indicate the presence of a ground fault current above a certain level. Ground fault current detectors are very well known and no further description thereof is thought necessary. 
     It may also be advantageous to be able to test the circuit from L 1  through to the MCU. This is facilitated with a TEST from the MCU output that can be activated by manual operation of a test button, not shown. When the test button is operated, a serious of pulses will be produced at TEST output and these will be fed to a test winding W 2  ( FIG. 8 a   ) on L 1  via a resistor R 10 . The test winding on L 1  may be one or more turns and is wound in the same direction as the inductor winding W 1  on L 1 . In this case L 1  will produce an output that will be detected and amplified by U 1  and result in an output from MCU 1 . When the test button is operated and the TEST pulses are produced the MCU will be looking for a signal at MCU 1  even in the absence of all other MCU inputs and will cause the FAULT output to be activated when it detects MCU 1  under the test conditions. 
       FIG. 7  shows all of the inputs to the MCU, i.e. MCU 1  to MCU 7 . The MCU will produce an output at the FAULT pin if MCU 7  exceeds a certain level and is sustained for a certain period or duration. Likewise, if MCU 1  and MCU 5  are both present and sustained for a certain period the MCU can be programmed to produce a FAULT output, or if MCU 1 , MCU 2  and MCU 5  are all present and sustained for a certain period the MCU can be programmed to produce a FAULT output, if MCU 2 , MCU 3 , MCU 4  and MCU 5  or if MCU 1 , MCU 2 , MCU 5  and MCU 6  are all present and sustained for a certain period the MCU can be programmed to produce a FAULT output. 
     The invention is not limited to the embodiments described here in which may be modified or varied without departing from the scope of the invention. 
       FIG. 1  shows an example of a series arc fault condition, but the invention could be used to also detect parallel arc fault currents without any significant modification. 
     The supply in  FIG. 1  could be a DC supply to a suitable load, and an arc fault current arising from the break at point X would still produce arcing signals that could be detected by Signal Detection Circuit  14 . 
     The circuit of  FIG. 2  could be supplied from the DC supply and the arc fault current signals would be detected and produce an output at MCU 1  as previously described. 
     The arrangement of  FIG. 3  for synchronisation to an AC mains supply (i.e. R 9  and D 2  and MCU 2 ) could be omitted for DC applications. However, even with the omission of R 9  and D 2 , the arrangement of  FIG. 4  could still be used for detection of DC arc fault currents. 
     In  FIG. 5 , L 2  is used to provide an indication of the magnitude of the AC load current and to produce signals over a certain frequency range, e.g. 10 KHz to 150 KHz arising from an arc fault current. Similar signals would still be produced by a DC arc fault current, and alternative means for measuring the magnitude of the DC load current could be readily provided if required.