Patent Publication Number: US-2013229163-A1

Title: Overvoltage protection circuit and electronic device

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure relates to an overvoltage protection circuit and an electronic device using the overvoltage protection circuit. 
     2. Description of Related Art 
     Electronic devices (for example, mobile phones, cameras, or notebooks) are often provided with suitable adapters for powering or charging the batteries of the electronic devices. However, when an electronic device is connected to an unsuitable adapter which may provide an overlarge voltage to the electronic device, the electronic device may be damaged. Therefore, it is desirable to provide an overvoltage protection circuit to protect the electronic device. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The components in the drawing are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. 
         FIG. 1  is a module diagram of an overvoltage protection circuit arranged in an electronic device in accordance with an exemplary embodiment. 
         FIG. 2  is a circuit diagram of the overvoltage protection circuit in  FIG. 1  in accordance with an exemplary embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     The disclosure is illustrated by way of example and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one. 
       FIG. 1  is an overvoltage protection circuit  100  arranged in an electronic device  200  for providing a proper voltage to the electronic device  200 . The electronic device  200  may be a mobile phone, a camera, or a DVD player, for example. 
     The overvoltage protection circuit  100  includes a voltage input port V in  a voltage output port V out , a first selecting circuit  10 , and a second selecting circuit  20 . The voltage input port V in  receives an input voltage from an external device connected to the electronic device. The voltage output port V out  outputs a working voltage to internal components of the electronic device  200 . The first selecting circuit  10  and the second selecting circuit  20  are connected in parallel between the voltage input port V in  and the voltage output port V out . The first selecting circuit  10  includes a first switch circuit  101 . The second selecting circuit  20  includes a second switch circuit  201  and a voltage reducing circuit  202  connected in series to the second switch circuit  201 , with the second switch circuit  201  being connected to the voltage input port V in  and the voltage reducing circuit  202  being connected to the voltage output port V out . The voltage reducing circuit  202  reduces the value of the voltage input to the voltage reducing circuit  202 . 
     When the input voltage from the voltage input port V in  is less than a first value V 1 , the first switch circuit  101  is turned on and the second switch circuit  201  is turned off. The voltage from the voltage input port V in  is directly transmitted to the voltage output port V out , namely the voltage from the voltage input port V in  is provided to the internal components of the electronic device  200 . When the input voltage from the voltage input port V in  is greater than the first value V 1 , the first switch circuit  101  is turned off and the second switch circuit  201  is turned on. The voltage from the voltage input port V in  is transmitted to the voltage reducing circuit  202  to reduce the value of the voltage first, and then the reduced voltage is transmitted to the voltage output port V out . In this embodiment, when the value of the input voltage from the voltage input port V in  is greater than a second value V 2  which is greater than the first value V 1 , the first switch circuit  101  and the second switch circuit  201  are both turned off, and the overvoltage protection circuit  100  does not provide any voltage to the electronic device  200 . 
     Referring to  FIG. 2 , the first switch circuit  101  includes a first diode D 1 , a first Bipolar Junction Transistor (BJT) Q 1 , a second BJT Q 2 , and a first Metal-oxide semiconductor (MOS) transistor M 1 . A cathode of the first diode D 1  is connected to the voltage input port V in  through a first resistor R 1 , and an anode of the first diode D 1  is connected to a base of the first BJT Q 1 . The base of the first BJT Q 1  is also connected to ground through a second resistor R 2  and a first capacitor C 1  connected in parallel to the second resistor R 2 , a collector of the BJT Q 1  is connected to the voltage input port V in  through a third resistor R 3  and further connected to a base of the second BJT Q 2  through a fourth resistor R 4 , and an emitter of the BJT Q 1  is grounded. The base of the second BJT Q 2  is further connected to ground through a second capacitor C 2 , a collector of the BJT Q 2  is connected to the voltage input port V in  through a fifth resistor R 5  and further connected to a grid of the first MOS transistor M 1 , and an emitter of the BJT Q 2  is grounded. A source of the first MOS transistor M 1  is connected to the voltage input port V in , and a drain of the first MOS transistor M 1  is connected to the voltage output port V out . 
     The second switch circuit  201  includes a second diode D 2 , a third BJT Q 3 , a fourth BJT Q 4 , and a second MOS transistor M 2 . A cathode of the second diode D 2  is connected to the voltage input port V in  through a sixth resistor R 6 , and an anode of the second diode D 2  is connected to a base of the third BJT Q 3 . The base of the third BJT Q 3  is also connected to ground through a seventh resistor R 7  and a third capacitor C 3  connected in parallel to the seventh resistor R 7 , the base of the third BJT Q 3  is further connected to the collector of the first BJT Q 1  through an eighth resistor R 8 , a collector of the BJT Q 3  is connected to the voltage input port V in  through a ninth resistor R 9 , and an emitter of the BJT Q 3  is grounded. A base of the fourth BJT Q 4  is connected to the collector of the third BJT Q 3  and further connected to ground through a fourth capacitor C 4 , a collector of the BJT Q 4  is connected to the voltage input port V in  through a tenth resistor R 10 , and an emitter of the fourth BJT Q 4  is grounded. A grid of the second MOS transistor M 2  is connected to the collector of the BJT Q 4 , a source of the MOS transistor M 2  is connected to the voltage input port V in , and a drain of the MOS transistor M 2  is connected to an input port of the voltage reducing circuit  202 . 
     The voltage reducing circuit  202  includes a third diode D 3 , a fourth diode D 4 , a fifth diode D 5 , and a sixth diode D 6 . The diode D 3  is connected in series to the diode D 4 . The diode D 5  is connected in series to the diode D 6 . The anode of the diode D 3  and the anode of the diode D 5  are connected together to form the input port of the voltage reducing circuit  202 . The cathode of the diode D 4  and the cathode of the diode D 6  are connected together to form the voltage output port V out  of the overvoltage protection circuit  100 . 
     In this embodiment, the first BJT Q 1 , the second BJT Q 2 , the third BJT Q 3 , and the fourth BJT Q 4  are NPN BJT. The first MOS transistor M 1  and the second MOS transistor M 2  are PMOS transistors. The reverse turn-on voltage of the diode D 2  is greater than that of the diode D 1 . In this embodiment, the reverse turn-on voltage of the diode D 1  is substantially equal to the first value V 1 , and the reverse turn-on voltage of the diode D 2  is substantially equal to the second value V 2 . 
     When the overvoltage protection circuit  100  is applied in a vehicle power supply system, the voltage range the power supply system provides to the voltage input port V in  may be 10V-16V, the diode D 1  may be determined with the reverse turn-on voltage of 13V, and the diode D 2  may be determined with the reverse turn-on voltage of 15V. 
     When the voltage input into the voltage input port V in  is less than 13.7V (the reverse turn-on voltage of the first diode D 1  is 13V and the voltage drop of the BJT Q 1  is 0.7V), the first BJT Q 1  is turned off, and the second BJT Q 2  and the second BJT Q 3  are turned on. The grid of the first MOS transistor M 1  is connected to ground through the second BJT Q 2 , thus, the MOS transistor M 1  is turned on, and the first switch circuit  101  is turned on. The base of the fourth BJT Q 4  is connected to ground through the third BJT Q 3 , thus, the BJT Q 4  is turned off, and the grid of the second MOS transistor M 2  is connected to the voltage input port V in  to get a high level. The second MOS transistor M 2  is turned off, thus, the second switch circuit  201  is turned off. The overvoltage protection circuit  100  provides the voltage from the vehicle power supply system to the internal component of the electronic device  200  through the first switch circuit  101 . 
     When the voltage input into the voltage input port V in  is greater than 13.7V and less than 15.7V (the reverse turn-on voltage of the second diode D 2  is 15V and the voltage drop of the BJT Q 3  is 0.7V), the first BJT Q 1  is turned on, and the second BJT Q 2  and the third BJT Q 3  are both turned off. The grid of the first MOS transistor M 1  is connected to the voltage input port V in  through the fifth resistor R 5  to get a high level. Thus, the MOS transistor M 1  is turned off, and the first switch circuit  101  is turned off. The grid of the second MOS transistor M 2  is connected to ground through the fourth BJT Q 4 , thus, the second MOS transistor M 2  is turned on, and the second switch circuit  201  is turned on. The overvoltage protection circuit  100  provides the voltage from the vehicle power supply system to the voltage reducing circuit  202  to decrease the voltage by the fourth diodes D 3 , D 4 , D 5 , and D 6 , and then provides the decreased voltage to the internal component of the electronic device  200 . 
     When the voltage input into the voltage input port V in  is greater than 15.7V, the first BJT Q 1  and the third BJT Q 3  are turned on, and the second BJT Q 2 , the fourth Q 4 , the first MOS transistor M 1  and the second MOS transistor M 2  are all turned off. The first switch circuit  101  and the second switch circuit  201  are thus turned off. The overvoltage protection circuit  100  does not provide any voltage to the internal components of the electronic device  200 . 
     The overvoltage protection circuit  100  further includes a first voltage protecting circuit  30  and a second voltage protecting circuit  40 . The first voltage protecting circuit  30  is connected between the voltage input port V in  and ground, to prevent Electro Magnetic Interference (EMI) of the voltage of the voltage input port V in . The second voltage protecting circuit  40  is connected between the voltage output port V out  and ground, to prevent EMI of the voltage from the voltage output port V out . In this embodiment, the first voltage protecting circuit  30  includes a fifth capacitor C 5 , a sixth capacitor C 6 , and an eleventh resistor R 11 . The fifth capacitor C 5  is connected between the voltage input port V in  and ground. The sixth capacitor C 6  and the eleventh resistor R 11  are connected in series between the voltage input port V in  and ground. The second voltage protecting circuit  40  includes a seventh capacitor C 7 , an eighth capacitor C 8 , and a ninth capacitor C 9 . The capacitors C 7 , C 8 , and C 9  are connected in parallel between the voltage output port V out  and ground. In another embodiment, the first voltage protecting circuit  30  and the second voltage protecting circuit  30  can both be omitted. 
     In this embodiment, the values of the resistors R 1 , R 2 , R 4 , R 5 , R 6 , R 7 , R 8 , and R 10  are 10K, the values of the resistors R 3  and R 9  are 100K, the values of the capacitors C 1 , C 3 , and C 5  are 0.1 μF, the values of the capacitors C 2 , C 4 , and C 8  are 1 μF, and the values of the capacitors C 6  and C 9  are 1000 μF. 
     Although the present disclosure has been specifically described on the basis of the exemplary embodiment thereof, the disclosure is not to be construed as being limited thereto. Various changes or modifications may be made to the embodiment without departing from the scope and spirit of the disclosure.