Patent Publication Number: US-7213239-B2

Title: Method of generating and/or executing a diversified program flow

Description:
CROSS-REFERENCES TO RELATED APPLICATIONS 
   This application claims the priority of German Patent Application, Serial No. 101 58 317.6, filed Nov. 28, 2001, pursuant to 35 U.S.C. 119(a)–(d), the disclosure of which is incorporated herein by reference. 
   BACKGROUND OF THE INVENTION 
   The present invention relates to a method of generating and/or executing a diversified program flow from a program source code for or on at least two processing units of machine tools, production machines and robots. 
   Security zones are normally established in order to protect machines, production goods, persons against dangers in the security zone of machines or the like, and monitored, e.g. by sensors. A logical interconnection structure, related to the safety aspects of the machine and based on a programmable control, executes a defined action when the security zone is violated. The safety-related actions may involve, for example, a shutdown, certain operations in case of emergency, slowdown, position restrictions, etc. Hereby, the safety-related actions or security functions include system manipulations that may even involve the electric drives and measuring systems. A reliable function of secure operational modules in executable programs is hereby essential. 
   To ensure clarity, it is necessary to establish the definition of several important terms and expressions that will be used throughout this disclosure. The term “safety-related” designates hereby the recognition and managing of systematic and random errors, as well as failures. This can be realized, e.g., by the use of diversity in connection with computer systems or control systems of machine tools, production machines and robots, whereby the diversity involves the establishment of, e.g., several programs which satisfy the same specification. A comparison of the events, computed by the individual program variants, enables hereby a recognition of permanent and transient hardware errors in addition to the recognition of errors in design. 
   Typically, a logic program is used which involves redundant-parallel processing and cyclical comparison of results. When a deviation of the computed results has been ascertained, a secure state of the machine or of machine parts is immediately initiated. 
   It would be desirable and advantageous to provide an improved method of generating and/or executing a diversified program flow from a program source code. 
   SUMMARY OF THE INVENTION 
   According to one aspect of the present invention, a method of generating and/or executing a diversified program flow from a program source code for or on at least two processing units of a machine tool, production machine or robot, includes the steps of generating a machine code from a program source code by means of a compiler for at least one processing unit with a programmable processing module, generating a description file from the program source code, interpretively processing the description file in at least one further processing unit by at least one programmable processing module, saving data of the processing units in at least one common memory, and checking the data for a match through respective data comparison. 
   The present invention resolves prior art shortcomings by enabling the user to establish a single program source code for generating at least two diversified programs. The description file ensures conformity of the programs which are run parallel, e.g., simultaneously, by the processing units. The running time of the programs by the various processing units varies since at least one program code runs interpretively, thereby realizing program diversity. As a consequence, time and cost factors are reduced for the user or the system programmer because it is sufficient to input a program source code only once. 
   According to another feature of the present invention, the programmable processing modules may initiate a safe state of at least one part or section of the machine tool, production machine or robot, when the data comparison is negative. This ensures safe conditions of the machine or machine part, in the event of an inconsistency of the present data or data to be computed. 
   According to another feature of the present invention, the at least two programmable processing modules in the processing units may have same hardware. As an alternative, the at least two programmable processing modules in the processing units may have different hardware. In this way, the novel and inventive method according to the invention is also applicable for different processing modules. In particular, as the development becomes more and more sophisticated or also for cost-reasons, the processing modules may be of different configuration. On the basis of the description file, interpretively running commands are provided to suit the respective processing module. 
   According to another feature of the present invention, at least one of the processing modules may be a user-programmable or mask-programmable logic module. Thus, optical solutions by means of a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC) may be realized. 
   According to another feature of the present invention, the program source code may be generated substantially from a graphical programming editor. Thus, linkage and interrelations can be graphically programmed, whereby the graphic editor may also generate the program source code from the information contained in the graphical editor. 
   According to another feature of the present invention, the description file may be generated from the program source code directly or by means of a converter or interpreter. Thus, the description file can be automatically generated from the program source code. 
   According to another feature of the present invention, the machine code may be generated from the description file by means of a converter. Thus, the description file can be the basis of a compiled machine code as well as of a program code which runs interpretatively in a processing unit. 

   
     BRIEF DESCRIPTION OF THE DRAWING 
     Other features and advantages of the present invention will be more readily apparent upon reading the following description of currently preferred exemplified embodiments of the invention with reference to the accompanying drawing, in which: 
       FIG. 1  is a block diagram for generating a diversified program flow in accordance with the present invention; and 
       FIG. 2  is a schematic representation for executing distinct programs on processing units. 
   

   DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
   Throughout all the Figures, same or corresponding elements are generally indicated by same reference numerals. These depicted embodiments are to be understood as illustrative of the invention and not as limiting in any way. 
   Turning now to the drawing, and in particular to  FIG. 1 , there is shown a block diagram for generating a diversified program flow in accordance with the present invention. Hereby, in a first data path, a compiler C generates from a program source code Q a machine code MC which is run by a processing module PM 1  of a processing unit P 1 . 
   In accordance with the present invention, in a second data path, an interpreter or converter U generates from the program source code Q a description file D which is run interpretatively by the processing module PM 2  on the processing unit P 2 . The time to run a program interpretatively by the processing module PM 2  is different from the processing time required to run the machine code MC on the processing module PM 1 . The processing units P 1 , P 2 , as well as the processing modules PM 1 , PM 2  may have different configuration. Although they process the syntactic structure of the program source code Q in the source program, different command sequences are generated along different paths as a consequence of the different programs run by the processing modules PM 1 , PM 2 . The description files D contains hereby relevant information, which is stored in the program source code Q, and serves as base for the processing unit P 2  which runs interpretatively the content of the description file D by means of a permanently installed software interpreter module IM. 
   Graphical programming by means of a graphical program editor GP is a simple approach to input or visualize a program flow in a computer system. Therefore, a graphical programming editor GP can be used also in the present invention to directly generate the description file D and/or to generate the program source code Q, as indicated in  FIG. 1  by broken lines. The use of the graphical programming editor GP is optional. 
   Turning now to  FIG. 2 , there is shown a schematic representation for executing distinct programs by the processing units P 1 , P 2 . Parts corresponding with those in  FIG. 1  are denoted by identical reference numerals. Each of the processing units P 1 , P 2  is supplemented by a data comparison structure DC 1 , DC 2  and a secure functional module SF 1 , SF 2 , generated from the program source code Q by means of compiler C and interpreter or converter U. 
   Information, e.g., emergency-off signals or door sensor signals, is inputted via a sensor S 1 , S 2  into the processing units P 1 , P 2 , for producing computed results, under consideration of further programming commands. As a consequence, for example, an actuator A 1 , A 2 , e.g. a brake (brake signal) or safety contactor, may be addressed. Each of the sensors S 1 , S 2  and the actuators A 1 , A 2  is configured with at least two channels. Respective sensor signals S 1 , S 2  are inputted into the two processing units P 1 , P 2  and provide in view of the configuration same information through two channels. In the event of an error, i.e., when, for example, the sensor signal S 1  does not coincide with the sensor signal S 2 , the machine is transferred into a safe machine state by means of the secure functional modules SF 1 , SF 2 . 
   Further input-output information IO 1 , IO 2  may be transmitted to the sensor signals S 1 , S 2  and are written via a data bus DB 1 , DB 2  in a memory M, e.g. a dual port RAM. The memory M further contains computation data of the processing units P 1 , P 2 . After each, or after defined program flow steps, plausibility of the data saved in the memory M is checked by the processing units P 1 , P 2  by means of data comparison DC 1 , DC 2 . When determining an inconsistency, the respective processing units P 1 , P 2  change to a safe machine mode by activating the secure functional modules SF 1 , SF 2  (software modules). 
   To prevent systemic and/or transient hardware errors, or product errors or data errors from being undetected, at least one of the processing units P 1 , P 2  runs a complicated machine code MC, while the other one of the processing units P 1 , P 2  runs interpretatively the content of the description file D. Examples of programmable processing modules PM 1 , PM 2  include similar or different controllers, FPGAs or ASICs. Involved are hereby user-programmable or mask-programmable logical modules which can be suited in an optimum manner to the application at hand. 
   While the invention has been illustrated and described in connection with currently preferred embodiments shown and described in detail, it is not intended to be limited to the details shown since various modifications and structural changes may be made without departing in any way from the spirit of the present invention. The embodiments were chosen and described in order to best explain the principles of the invention and practical application to thereby enable a person skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated.