Patent Publication Number: US-6992918-B2

Title: Methods of increasing write selectivity in an MRAM

Description:
RELATED APPLICATION 
   The present application is a divisional application of U.S. patent application Ser. No. 10/327,581, by Li et al., filed on Dec. 20, 2002 now U.S. Pat. No. 6,791,856, which is a continuation application of U.S. patent application Ser. No. 09/964,218, by Li et al., filed on Sep. 25, 2001, which issued as U.S. Pat. No. 6,522,574 on Feb. 18, 2003, which in turn is a divisional application of U.S. patent application Ser. No. 09/618,504 by Li et al., filed on Jul. 18, 2000, which issued as U.S. Pat. No. 6,424,561 on Jul. 23, 2002. The present application is also related to U.S. Pat. No. 6,424,564. 

   GOVERNMENT RIGHTS 
   This invention was made with Government support under Contract Number MDA972-98-C-0021 awarded by DARPA. The Government has certain rights in this invention. 

   BACKGROUND OF THE INVENTION 
   The present invention relates to non-volatile memories, and more particularly to Giant Magneto Resistive (GMR) memories that use one or more word lines and one or more digital lines to select and write individual memory bits. 
   Digital memories of various kinds are used extensively in computer and computer system components, digital processing systems and the like. Such memories can be formed, to considerable advantage, based on the storage of digital bits as alternative states of magnetization of magnetic materials in each memory cell, typically thin-film materials. These films may be thin magneto-resistive films having information stored therein based on the direction of the magnetization occurring in those films. The information is typically obtained either by inductive sensing to determine the magnetization state, or by magneto-resistive sensing of each state. 
   Such thin-film magneto-resistive memories may be conveniently provided on the surface of a monolithic integrated circuit to thereby provide easy electrical interconnection between the memory cells and the memory operating circuitry on the monolithic integrated circuit. When so provided, it is desirable to reduce the size and increase the packing density of the thin-film magneto-resistive memory cells to achieve a significant density of stored digital bits. 
   Many thin-film magneto-resistive memories include a number of parallel word lines intersected by a number of parallel digital lines. A thin magneto-resistive film is provided at the intersection of each word line and digital line. As such, the thin film magneto-resistive memory cells typically are configured an array configuration having a number of rows and a number of columns. 
     FIG. 1  is a schematic diagram illustrating a conventional thin film Magnetic Random Access Memory (MRAM) architecture. Parallel word lines  12 ,  14 ,  16 ,  18  and  20  are provided in a vertical direction and parallel digital lines  22  and  24  are provided in a horizontal direction. In the diagram shown, only a portion of the MRAM array is shown. A thin film magneto-resistive memory cell is provided at the intersection of each word line and digital line. Referring specifically to  FIG. 1 , thin film magneto-resistive memory cells  28   a ,  28   b ,  28   c ,  28   d  and  28   e  are provided at the intersection of digital line  22  and word lines  12 ,  14 ,  16 ,  18  and  20 , respectively. Likewise, thin film magneto-resistive memory cells  30   a ,  30   b ,  30   c ,  30   d  and  30   e  are provided at the intersection of digital line  24  and word lines  12 ,  14 ,  16 ,  18  and  20 , respectively. 
   The thin film magneto-resistive memory cells in each row are typically connected in a string configuration to form a corresponding sense line. For example, thin film magneto-resistive memory cells  28   a ,  28   b ,  28   c ,  28   d  and  28   e , which correspond to row  32 , are connected in a string configuration to form sense line  34 . Sense line  34  typically includes a number of non-magnetic connectors  34   a ,  34   b ,  34   c ,  34   d ,  34   e , and  34   f  to connect each end of the thin film magneto-resistive memory cells to the end of the adjacent thin film magneto-resistive memory cells. The non-magnetic connectors  34   a ,  34   b ,  34   c ,  34   d ,  34   e , and  34   f  are typically formed using a conventional metal interconnect layer. The sense lines are used to provide current to a particular row of thin film magneto-resistive memory cells, and ultimately, to sense the resistance of a selected one of the cells. 
   To write a value (i.e. zero or one) to a selected memory cell, a word line current is provided to the word line that extends adjacent the selected memory cell. Likewise, a digital line current is provided to the digital line that extends adjacent the selected memory cell. In some instances, a sense line current is also provided to the sense line that that includes the selected memory cell. 
   The polarity of the word line current typically determines the value to be written into the selected memory cell. To illustrate this further, the magnetic fields produced by word line current  40 , digital line current  42  and sense current  44  at memory cell  30   a  are shown in  FIG. 1 , assuming digital line  46  and word line  12  extend above memory cell  40 . The polarity of the various currents would change if the corresponding word or digital line extend below the memory cell. 
   The magnetic field H wl    48  produced by word line current  40  extends to the right and along the major axis of the memory cell  40  as shown. The magnetic field H dl    50  produced by digital line current  42  extends upward and along the minor axis of the memory cell  40 . Finally, the magnetic field H sl    52  produced by sense line current  44  extends upward and along the minor axis of the memory cell  40 . 
   The magnetic field H wl    48  produced by word line current  40  provides the longitudinal force to switch the magnetization vector of the selected memory cell to the right, which in the example shown, corresponds to the desired value to be written. The magnetic fields H dl    50  and H sl    52  produced by digital line current  42  and sense line current  44 , respectively, provide the lateral torque necessary to initiate the switching of the magnetic vector of the selected memory cell. 
     FIG. 2  is a graph showing a typical write margin curve for an MRAM memory cell. The x-axis of the graph represents the magnetic field component H wl    48  that extends down the major axis of the memory cell  30   a , typically provided by the word line current. The y-axis represents the magnetic field component H dl    50  that extends across the minor axis of the memory cell  30   a , typically provided by the digital line current (and sense line current when so provided). The various combinations of H wl    48  and H dl    50  that are required to write the memory cell  30   a  are represented by curve  56 . 
   To provide some write margin, the sum of H wl    48  and H dl    50  (which produce a vector  58 ) must extend to the right of curve  56 . The closer that the sum of H wl    48  and H dl    50  is to curve  56 , the less write margin is present. As the write margin decreases, it becomes more difficult to reliably write a selected memory cell. It also becomes more difficult to prevent other non-selected memory cells from being inadvertently written. To overcome these limitations, there are often very stringent process requirements for control of bit dimensions, edge roughness, and bit end contamination levels in the memory cells. These process requirements can become particularly burdensome as the memory cell size decreases to increase packing density. 
   The magneto-resistive memory cells are often GMR type memory cells. GMR type cells typically include a number of magnetically layers separated by a number of non-magnetic coercive layers. To considerable advantage, the magnetic vectors in one or all of the layers of a GMR type cell can often be switched very quickly from one direction to an opposite direction when a magnetic field is applied over a certain threshold. The states stored in a GMR type cell can typically be read by passing a sense current through the memory cell via the sense line and sensing the difference between the resistances (GMR ratio) when one or both of the magnetic vectors switch. 
   A limitation of many GMR type cells is that the magnetic field required to switch the magnetic vectors can be relatively high, which means that relatively high switching currents are required. This increase in current, or magnetic field, can result in a substantial operating power, especially in large memory arrays. As the size of the GMR cells shrink to accommodate higher density applications, the switching fields that are required also increase. It is expected under such circumstances that the current density in the word and/or digital lines may become too high even for Cu metallization. 
   One way to increase the write margin and reduce the current density requirements of such a device is shown in  FIG. 5  of the article “Experimental and Analytical Properties of 0.2 Micron Wide, Multi-Layer, GMR, Memory Elements”, Pohm et al., IEEE Transactions on Magnetics, Volume 32, No. 5, September 1996.  FIG. 5  of Pohm et al. shows a digital line traversing the memory cells at an angle relative to the major axis of the memory cell, and in a triangle shaped pattern. Referring to  FIG. 3 , such an arrangement may produce a magnetic field H dl    70  that has two components: a component along the minor axis of the memory cell and a component along the major axis of the memory cell. When this is combined with the magnetic field Hwl  48  of the word line, the resulting magnetic vector  72  may extend further beyond curve  56  as shown, resulting in an increased write margin  74  and increased write selectivity relative to the MRAM architecture illustrative in  FIG. 1 . 
   A limitation the Pohm et al. is that the triangle shaped pattern of the digital line may significantly reduce the packing density of the memory, at least relative to a memory that uses substantially straight parallel digital lines and word lines. As can be seen in  FIG. 5  of Pohm et al., the minimum spacing between the digital lines is shown to be 0.25 um, which is presumably dictated by the particular design rules of the process used. Assuming the digital lines traverse the memory cells at a 30 degree, the effective spacing between the digital lines in the y direction is 0.29 um (0.25 um/cos (30 degrees)), which represents a 16% reduction in packing density. 
   Another limitation of Pohm et al. is that the digital line configuration shown in  FIG. 5  only produces a limited magnetic field component along the major axis of the memory cell. For some MRAM applications, it may be desirable to maximize the magnetic field component down the major axis of the memory cell. What would be desirable, therefore, is an MRAM architecture that produces an increased write margin and write selectivity without significantly reducing the packing density of the memory. What would also be desirable is an MRAM architecture that maximizes the magnetic field component along the major axis of the memory cell. 
   SUMMARY OF THE INVENTION 
   The present invention overcomes many of the disadvantages associated with the prior art by providing MRAM architectures that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The present invention also provides MRAM architectures that maximize the magnetic field component along the major axis of the memory cell. 
   In a first illustrative embodiment of the present invention, a magneto-resistive storage element is provided that includes an elongated magneto-resistive bit at the intersection of an elongated word line and an elongated digital line. The elongated digital line is substantially straight and extends substantially perpendicular to the elongated word line. In contrast to the prior art, however, the axis of the elongated magneto-resistive bit is offset relative to the axis of the elongated digital line and the axis of the elongated word line so as to be not parallel with the axis of the elongated digital line and not perpendicular to the axis of the elongated word line. 
   The elongated magneto-resistive storage element discussed above is preferably provided in an array of like elongated magneto-resistive bits to form a magneto-resistive (MRAM) memory. The array of magneto-resistive bits is preferably arranged to have a number of rows and columns. A number of elongated word lines are provided so as to extend substantially parallel to one another and adjacent only those magneto-resistive bits in a corresponding column. A number of elongated digital lines are also provided so as to extend substantially parallel to one another and adjacent only those magneto-resistive bits in a corresponding row. The magneto-resistive bits in each row of magneto-resistive bits are preferably electrically connected in a string configuration to form a corresponding sense line. 
   The major axis of each elongated magneto-resistive bits is preferably offset relative to the axes of the elongated digital lines and the axes of the elongated word lines so as to be not parallel with the axes of the elongated digital lines and not perpendicular to the axes of the elongated word lines. Because the major axis of the magneto-resistive bits are offset relative to axis of the digital line, the magnetic field H dl  produced by the digital line current at the magneto-resistive bit includes a component along the major axis of the magneto-resistive bit. As described above, this may help increase the write margin and write selectivity of the memory. 
   In another illustrative embodiment of the present invention, the relative orientation of the magneto-resistive bits to the digital lines is the same as described above. However, in this embodiment, the axes of the word lines are not perpendicular to the axes of the digital word lines. Rather, the axes of the word lines are substantially perpendicular to the major axis of the magneto-resistive bits. Like the previous embodiment, and because the major axis of the magneto-resistive bits are offset relative to axis of the digital line, the magnetic field H dl  produced by the digital line current at the magneto-resistive bit includes a component along the major axis of the magneto-resistive bit. As described above, this may help increase the write margin and write selectivity of the memory. 
   Unlike the previous embodiment, however, the axes of the word lines are substantially perpendicular to the major axis of the magneto-resistive bits. This helps keep the entire magnetic field H wl  produced by the word line current aligned with the major axis of the magneto-resistive bit, which may further help increase the write margin and write selectivity of the memory. 
   In another illustrative embodiment of the present invention, a MRAM memory is provided that maximizes the magnetic field components along the major axis of the memory cell. This may improve overall write margins and write selectivity of the memory, while reducing write line and/or digital line current requirements. In this embodiment, two or more elongated magneto-resistive bits are provided, each having an elongated word line and an elongated digital line extending adjacent thereto. 
   The axis of each of the elongated magneto-resistive bits is preferably substantially perpendicular to the axis of a corresponding elongated word line. This helps keep the entire magnetic field H wl  produced by the word line current aligned with the major axis of the magneto-resistive bit. In addition, however, the axis of each of the elongated digital lines extends substantially parallel to the axis of the elongated word line, at least in the region of each magneto-resistive bit. This may be accomplished by, for example, providing a zig-zag shaped digital line. 
   In this configuration, and because the elongated digital lines extend substantially parallel to the axis of the elongated word lines (and perpendicular to the axis of the elongated magneto-resistive bits), the entire magnetic field H dl  produced by the digital line current may be substantially aligned with the major axis of the magneto-resistive bits. For some applications, this may significantly improve the overall write margins and write selectivity of the memory, while reducing write line and/or digital line current requirements. When necessary, a magnetic field H sl  produced by a sense line current can be used to provide lateral torque to initially rotate the magnetic field vector of the magneto-resistive bits. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Other objects of the present invention and many of the attendant advantages of the present invention will be readily appreciated as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, in which like reference numerals designate like parts throughout the figures thereof and wherein: 
       FIG. 1  is a schematic diagram showing a conventional prior art MRAM architecture; 
       FIG. 2  is a graph showing a typical write margin curve for an MRAM memory device; 
       FIG. 3  is a schematic diagram of a first illustrative MRAM architecture in accordance with the present invention; 
       FIG. 4  is a schematic diagram of another illustrative MRAM architecture in accordance with the present invention; and 
       FIG. 5  is a schematic diagram of yet another illustrative MRAM architecture in accordance with the present invention. 
   

   DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 3  is a schematic diagram of a first illustrative MRAM architecture in accordance with the present invention. In this embodiment, an array of elongated magneto-resistive bits  100   a ,  100   b ,  100   c ,  100   d ,  100   e ,  102   a ,  102   b ,  102   c ,  102   d , and  102   e  are provided. The array of magneto-resistive bits includes a number of columns  104   a ,  104   b ,  104   c ,  104   d , and  104   e  and a number of rows  106   a  and  106   b . For clarity, only a portion of a typical MRAM array is shown. 
   A number of parallel extending word lines  108   a ,  108   b ,  108   c ,  108   d , and  108   e  are also provided adjacent respective columns of the array of magneto-resistive bits. For example, word line  108   a  extends adjacent magneto-resistive bits  100   a  and  102   a , word line  108   b  extends adjacent magneto-resistive bits  100   b  and  102   b , word line  108   c  extends adjacent magneto-resistive bits  100   c  and  102   c , word line  108   d  extends adjacent magneto-resistive bits  100   d  and  102   d  and word line  108   e  extends adjacent magneto-resistive bits  100   e  and  102   e . It is contemplated that the word lines  108   a ,  108   b ,  108   c ,  108   d , and  108   e  may extend above or below the corresponding magneto-resistive bits. 
   A number of parallel digital lines  110   a  and  110   b  are provided adjacent respective rows of the array of magneto-resistive bits. Each of the digital lines corresponds to a corresponding row of magneto-resistive bits, and extends adjacent to only those magneto-resistive bits that are in the corresponding row. For example, digital line  110   a  extends adjacent to magneto-resistive bits  100   a ,  100   b ,  100   c ,  100   d  and  100   e , and digital line  110   b  extends adjacent to magneto-resistive bits  102   a ,  102   b ,  102   c ,  102   d  and  102   e . It is contemplated that the digital lines  110   a  and  110   b  may extend above or below the magneto-resistive bits. In this configuration, each magneto-resistive bit is provided at the intersection of one word line and one digital line. 
   Preferably, each of the digital lines  110   a  and  110   b  is substantially straight and parallel to all other digital lines. Likewise, each of the word lines  108   a ,  108   b ,  108   c ,  108   d  and  108   e  is preferably substantially straight and parallel to all other word lines. This may allow for an optimum packing density for the memory. 
   The magneto-resistive bits in each row of magneto-resistive bits are preferably connected in a string configuration to form a corresponding sense line. For example, magneto-resistive bits  100   a ,  100   b ,  100   c ,  100   d  and  100   e  are shown electrically connected in a string configuration to form sense line  120   a . Likewise, magneto-resistive bits  102   a ,  102   b ,  102   c ,  102   d  and  102   e  are shown electrically connected in a string configuration to form sense line  120   b . In a preferred embodiment, the sense lines are formed by electrically connected each magneto-resistive bit to an adjacent magneto-resistive bit using a non-magnetic segment, such as non-magnetic segment  127 . 
   The memory may also include a number of current generators and a control block. Each sense line  120   a  and  120   b  has a corresponding sense current generator circuit  130   a  and  130   b , respectively. Likewise, each digital line  110   a  and  110   b  has a corresponding digital line current generator circuit  132   a  and  132   b . Finally, each word line  108   a ,  108   b ,  108   c ,  108   d , and  108   e  has a corresponding write line current generator circuit  134   a ,  134   b ,  134   c ,  134   d  and  134   e , respectively. 
   Each of the sense current generator circuit  130   a  and  130   b  selectively providing a sense current to the corresponding sense line. Each word line current generator circuit  134   a ,  134   b ,  134   c ,  134   d  and  134   e  selectively provides a word line current to the corresponding word line. Each digital line generator circuit  132   a  and  132   b  selectively provides a digital line current to the corresponding digital line. 
   The polarity of the current provided by the word line current generator circuits  134   a ,  134   b ,  134   c ,  134   d  and  134   e , and in some cases, the digital line generator circuits  132   a  and  132   b , determines the state to be written into the selected magneto-resistive bit. For example, to write a first state to magneto-resistive bit  102   a , the word line current generator  134   a  may provide a current in an upward direction and the digital line generator circuit  132   b  may provide a current in a rightward direction. In contrast, to write a second opposite state to magneto-resistive bit  102   a , the word line current generator  134   a  may provide a current in an downward direction and the digital line generator circuit  132   b  may provide a current in a leftward direction. 
   Controller  140  controls the sense current generator circuits  130   a  and  130   b , the digital line current generator circuits  132   a  and  132   b , and the word line current generator circuits  134   a ,  134   b ,  134   c ,  134   d  and  134   c . In one illustrative embodiment, the controller  140  initiates a write to a selected magneto-resistive bit by causing the corresponding digital line current generator circuit  132   a  or  132   b  to provide a digital line current to the digital line that extends adjacent the row that includes the selected magneto-resistive bit. The controller also causes the corresponding word line current generator circuit  134   a ,  134   b ,  134   c ,  134   d  or  134   e  to provide a word line current to the word line that extends adjacent the column that includes the selected magneto-resistive bit. In some embodiments, the controller  140  may also cause the corresponding sense current generator circuit  130   a  or  130   b  to provide a sense current to the sense line that includes the selected magneto-resistive bit. The controller preferably accepts and decodes an address that uniquely identifies the particular digital line, word line and sense line that correspond to the selected magneto-resistive bit. 
   Each of the magneto-resistive bits preferably has a major axis along its length and a minor axis along its width. The major axis of each of the elongated magneto-resistive bit is preferably parallel to the major axis of all of the other elongated magneto-resistive bits. In the illustrative embodiment shown in  FIG. 3 , the major axis of each elongated magneto-resistive bit is offset relative to the axes of the elongated digital lines and the axes of the elongated word lines so as to be not parallel with the axes of the elongated digital lines and not perpendicular to the axes of the elongated word lines. For example, the major axis  122  of magneto-resistive bit  100   a  is not parallel with the axis of elongated digital line  110   a , and not perpendicular to the axis of elongated word line  108   a . Because the major axis of the magneto-resistive bits are offset relative to axis of the digital line, the magnetic field H dl  produced by the digital line current at the magneto-resistive bit includes a component along the major axis of the magneto-resistive bit. For example, and referring to magneto-resistive bit  102   a , the magnetic field H dl    124  produced by the digital line current  126  includes a component along the major axis of the magneto-resistive bit  102   a . As indicated above with reference to  FIG. 2 , this may help increase the write margin and write selectivity of the memory. 
     FIG. 4  is a schematic diagram of another illustrative MRAM architecture in accordance with the present invention. In this illustrative embodiment, the relative orientation of the magneto-resistive bits to the digital lines is the same as described above with reference to  FIG. 3 . However, in this embodiment, the axes of the word lines  150   a ,  150   b ,  150   c ,  150   d  and  150   e  are not perpendicular to the axis of the digital line  154 . Rather, the axes of the word lines  150   a ,  150   b ,  150   c ,  150   d  and  150   e  are substantially perpendicular to the major axis of the magneto-resistive bits  152   a ,  152   b ,  152   c ,  152   d  and  152   e . The digital line  154  extends generally along an axis along 2 points of the MRAM. Like the previous embodiment, and because the major axis of the magneto-resistive bits are offset relative to axis of the digital line  154 , the magnetic field H dl    156  produced by the digital line current at the magneto-resistive bits includes a component along the major axis of the magneto-resistive bits. As described above, this may help increase the write margin and write selectivity of the memory. 
   Unlike the previous embodiment, however, the axes of the word lines  150   a ,  150   b ,  150   c ,  150   d  and  150   e  are substantially perpendicular to the major axis of the magneto-resistive bits  152   a ,  152   b ,  152   c ,  152   d  and  152   e . This helps keep the entire magnetic field H wl    158  produced by the word line current aligned with the major axis of the magneto-resistive bit, which further may increase the write margin and write selectivity of the memory. 
     FIG. 5  is a schematic diagram of yet another illustrative MRAM architecture in accordance with the present invention. This embodiment maximizes the magnetic field components along the major axis of the memory cell. This may help improve the overall write margins and write selectivity, while reducing write line and/or digital line current requirements. 
   Like the embodiment shown in  FIG. 3 , the axis of each of the elongated magneto-resistive bits  160   a ,  160   b ,  160   c ,  160   d  and  160   e  is preferably substantially perpendicular to the axis of a corresponding elongated word line  162   a ,  162   b ,  162   c ,  162   d ,  162   e , respectively. As indicated above, this helps keep the entire magnetic field H wl    164  produced by the word line current aligned with the major axis of the magneto-resistive bits. In addition, however, the axis of each of the elongated digital lines  166  extends substantially parallel to the axis of the elongated word lines, at least in the region of the magneto-resistive bits  160   a ,  160   b ,  160   c ,  160   d  and  160   e . This may be accomplished by, for example, providing a zig-zag shaped digital line  166 . 
   For the illustrative zig-zag shape digital line, digital line  166  has a number of vertical segments  172   a ,  172   b ,  172   c ,  172   d  and  172   e  that extend adjacent magneto-resistive bits  160   a ,  160   b ,  160   c ,  160   d  and  160   e , respectively. The digital line  166  further has a number of horizontal segments  170   a ,  170   b ,  170   c  and  170   d  interconnecting the vertical segments between the magneto-resistive bits  160   a ,  160   b ,  160   c , and  160   d . In this configuration, and because the elongated digital line  166  extends substantially parallel to the axis of the elongated word lines  162   a ,  162   b ,  162   c ,  162   d ,  162   e , and perpendicular to the major axis of the elongated magneto-resistive bits  160   a ,  160   b ,  160   c ,  160   d  and  160   e , the entire magnetic field H dl    180  produced by the digital line current may be substantially aligned with the major axis of the magneto-resistive bits  160   a ,  160   b ,  160   c ,  160   d  and  160   e . For some applications, this may significantly improve the overall write margins and write selectivity of the memory, while reducing write line and/or digital line current requirements. When necessary, a magnetic field H sl    182  produced by a sense line current  184  can be used to provide lateral torque to initially rotate the magnetic field vector of the magneto-resistive bits  160   a ,  160   b ,  160   c ,  160   d  and  160   e.    
   It is recognized that to align the magnetic field H dl   180  produced by the digital line current and the magnetic field H wl   164  produced by the word line current, the polarity of the word line current must be provided in the same direction as the digital line current. Thus, and referring to  FIG. 5 , the word line currents provided to adjacent word lines must have opposite polarities. Accordingly, word line current  190  extends in a downward direction through word line  162   a  in the same direction as digital line current  192 . For the adjacent word line  162   b , the word line current  194  extends in an upward direction through word line  162   b  in the same direction as digital line current  196 . The remaining word line currents  200 ,  202  and  204  are provided in a like manner. This produces a word line magnetic field (e.g. H wl   164 ) and the digital line magnetic field (e.g. H dl   180 ) that are in the same direction, at least in the region of the magneto-resistive bits. 
   Having thus described the preferred embodiments of the present invention, those of skill in the art will readily appreciate that the teachings found herein may be applied to yet other embodiments within the scope of the claims hereto attached.