Patent Publication Number: US-7583064-B2

Title: Booster circuit

Description:
CROSS-REFERENCE TO RELATED APPLICATION(S) 
   This application claims the foreign priority benefit under Title 35, United States Code, §119 (a)-(d), of Japanese Patent Application No. 2006-090522, filed on Mar. 29, 2006 in the Japan Patent Office, the disclosure of which is herein incorporated by reference in its entirety. 
   BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention relates to a booster circuit that is used in a power supply circuit, a power supply device, or the like, and is capable of outputting a boosted input voltage. 
   2. Description of the Related Art 
   As disclosed in Japanese Laid-open Patent Application No. 2005-224058, the applicant of the present invention has proposed a booster DC/DC converter wherein even a small-sized converter can handle a large amount of electricity by preventing magnetic saturation in a core of the converter by magnetic offset. Specifically, the booster DC/DC converter includes a transformer having the first and the second coils wound around the same core in reverse direction (opposite phase), and a pair of switches. An exciting current flows through the first coil, and at the same time a current is generated in the second coil in such a direction that magnetic flux of the core is offset. Then, the current in the second coil is fed into an output side via a diode, thereby obtaining an output voltage, which is approximately twice as high as the input voltage. 
   Another example of a booster circuit is shown in  FIG. 12 .  FIG. 12  illustrates an electric diagram of a configuration of a conventional booster circuit. A booster circuit  9  has a classical circuit configuration, which is a prototype of various types of booster DC/DC converters. The booster circuit  9  includes a capacitor C 11  interposed between an input terminal Vin and a common terminal COMMON, an inductor L 11  provided on an input side and having one end connected to the input terminal Vin, a diode D 11  having its anode connected to another end of the inductor L 11  and its cathode connected to an output terminal Vout, a switch element SW 11  interposed between the common terminal COMMON and a connection point of the inductor L 11  and the diode D 11 , and a capacitor C 12  interposed between the output terminal Vout and the common terminal COMMON. 
   Furthermore, there has been proposed a direct-current power supply device for obtaining an output voltage, which is more than twice as high as the input voltage, as disclosed, for example, in Japanese Laid-open Patent Application H11-146635.  FIG. 13  illustrates an electric diagram of a booster circuit disclosed in the application. In the booster circuit, a winding wound around a transformer T 15  is provided with a center tap P 13 , and taps P 12 , P 14 , which are arranged symmetrically about the center tap P 13 . One input voltage is applied to the center tap P 13 , and the other input voltage is applied to the taps P 12 , P 14  via switch elements SW 15 , SW 16 , so that an output voltage is obtained from both ends of the winding via diodes D 15 , D 16  by a wired OR technique. 
   However, the booster DC/DC converter disclosed in the above-mentioned Japanese Laid-open Patent Application No. 2005-224058, which employs a principle of converting a voltage by a converter, is required to have a higher voltage boost ratio. 
   Because the reactor (inductor) L 11  itself performs a boost function in principle in the booster circuit shown in  FIG. 12 , the large reactor L 11  is required and the output smoothing capacitor C 12  is required to have a large capacity so as to withstand a large ripple current. Therefore, it is difficult to reduce the whole size of the booster circuit shown in  FIG. 12 . 
   In the direct-current power supply device disclosed in the above-mentioned Japanese Laid-open Patent Application H11-146635, for example, when the switch element SW 15  is turned on, a raised voltage is induced in a terminal P 15  of the transformer T 15 , and at the same time a negative voltage occurs in a terminal P 11  of the transformer T 15 . As a result, inverse voltage is applied to the diode D 15  (when the switch element SW 16  is turned on, an inverse voltage is applied to the diode D 16 ), and therefore the diodes D 15 , D 16  need to have a higher inverse voltage withstand. Furthermore, a current does not flow in the negative voltage in the terminal P 11 , thereby easily causing a surge voltage. 
   In the booster chopper circuit, which employs a transformation function of a transformer as described above, a large core is required in order to prevent magnetic saturation upon direct-current magnetization, thereby making it difficult to reduce the size and the weight of the circuit. 
   SUMMARY OF THE INVENTION 
   The present invention is accomplished to solve the above-mentioned problem, and the object of the present invention is to provide a booster circuit that is capable of generating an output voltage, which is more than twice as high as an input voltage, and can be reduced in the size and the weight. 
   According to an aspect of the present invention, there is provided a booster circuit configured as follows. Specifically, a booster circuit includes: an input terminal and a common terminal, an input voltage applied to the input terminal and the common terminal; an output terminal, in which an output voltage is provided on the common terminal; a transformation unit that includes a first winding, a second winding, and a third winding, the windings wound in a same direction and connected in series; a first rectifier unit (D 1 ) provided between the input terminal and a connection point of the first winding and the second winding; a second rectifier unit (D 2 ) provided between the input terminal and a connection point of the second winding and the third winding; a first switching unit provided between one end of the transformation unit and the common terminal; a second switching unit provided between other end of the transformation unit and the common terminal; a third rectifier unit (D 3 ) provided between a connection point of the one end of the transformation unit and the first switching unit and the output terminal; a fourth rectifier unit (D 4 ) provided between a connection point of the other end of the transformation unit and the second switching unit and the output terminal. In the booster circuit, the first winding and the third winding have an approximately same number of turns, and the first switching unit and the second switching unit alternately open and close in response to a pair of control signals. 
   With the configuration of the booster circuit, when one of the switching units is turned on and a current flows through the first winding, the same voltage as the one applied in the first winding occurs in the second and third windings. Then, the voltage three times as high as the one applied in the first winding is output through a path, on which another switching unit is connected, thereby generating the output voltage, which is more than twice as high as an input voltage. 
   According to another aspect of the present invention, there is provided the booster circuit wherein the circuit includes a choke coil provided with a conductor connecting the input terminal and a connection point of the first rectifier unit and the second rectifier unit. 
   With the configuration of the booster circuit, it is possible to prevent a rapid change of a current by a choke coil. 
   According to a further aspect of the present invention, there is provided the booster circuit wherein the circuit includes a generation unit for generating the pair of control signals having a duty cycle to set the output voltage to a predetermined value. 
   With such a configuration, it is possible to adjust an output voltage by adjusting the duty cycle of the control signal. 
   According to a still further aspect of the present invention, there is provided a booster circuit wherein the circuit includes a capacitor disposed between the input terminal and the common terminal. 
   Thereby, it is possible to prevent fluctuation of an output voltage by the capacitor within its tolerance range. 
   According to a still further aspect of the present invention, there is provided a booster circuit wherein the circuit includes a capacitor disposed between the output terminal and the common terminal. 
   With such a configuration, it is possible to reduce the ripple content because the capacitor absorbs the voltage fluctuation. 
   According to a still further aspect of the present invention, there is provided a booster circuit wherein the first winding includes the a fourth winding and a fifth winding connected in series to the fourth winding, the fourth winding connected in series to the second winding and having a predetermined ratio of a number of turns to that of the second winding; the third winding includes a sixth winding and a seventh winding connected in series to the sixth winding, the sixth winding connected in series to the second winding and having the predetermined ratio of the number of turns to that of the second winding, the fourth, the fifth, the second, the sixth, and the seventh windings wound in a same direction; a first selection switching unit is disposed between a connection point of the fourth and the fifth windings and a connection point of the first switching unit and the third rectifier unit; a second selection switching unit is disposed between a connection point of the sixth and the seventh windings and a connection point of the second switching unit and the fourth rectifier unit; two circuits including a third selection switching unit and a fourth selection switching unit are disposed between the one end of the transformation unit and the common terminal, and between the other end of the transformation unit and the common terminal, respectively, each of the two circuits having a same configuration as the circuit connected between the connection point of the fourth and the fifth windings and the common terminal; two diodes, which are provided to prevent a reverse current, are disposed between the one end of the transformation unit and the third selection switching unit, and between the other end of the transformation unit and the fourth selection switching unit, respectively; the first selection switching unit and the second selection switching unit are switched by a selection signal to select an output voltage; and the third and the fourth selection switching units are switched by a signal generated by inverting the selection signal. 
   With the above configuration, it is possible to select a circuit to be operated by a selection signal, thereby changing an output voltage. 
   According to the booster circuit of the present invention, it is possible to generate an output voltage, which is more than twice as high as an input voltage, and reduce the size and the weight of the circuit. Therefore, by the circuit of the present invention, it is possible to provide power supply circuit and system which has a superior function of boosting a voltage. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The object and features of the present invention will become more readily apparent from the following detailed description taken in conjunction with the accompanying drawings in which: 
       FIG. 1  illustrates a circuit diagram of a configuration of a booster circuit according to the first embodiment of the present invention; 
       FIG. 2  illustrates an example of waveforms of driving signals, which are applied to gate terminals of switch elements in  FIG. 1 ; 
       FIG. 3A  illustrates a flow of a current when a first switch element is turned on in the booster circuit according to the first embodiment of the present invention; 
       FIG. 3B  illustrates a flow of a current when a second switch element is turned on in the booster circuit according to the first embodiment of the present invention; 
       FIG. 4  is a graph showing signal waveforms of each of devices in the booster circuit according to the first embodiment of the present invention; 
       FIG. 5  schematically illustrates the principle of operations of the booster circuit according to the first embodiment of the present invention; 
       FIG. 6  is a circuit diagram illustrating an example of a configuration of a more practical booster circuit according to the first embodiment of the present invention; 
       FIG. 7  is a graph showing signal waveforms of each of devices of the booster circuit on the condition that the numbers of turns of windings n 1 , n 2 , n 3  in a transformer in  FIG. 1  is determined such that N 1 : N 2 : N 3 =1:2:1; 
       FIGS. 8A and 8B  are views to compare ripple currents in a classical booster circuit in  FIG. 12  and the booster circuit according to the present invention in  FIG. 6 ; 
       FIG. 9  is a circuit diagram showing an example of a booster circuit according to the second embodiment of the present invention; 
       FIG. 10  illustrates a modified example of the booster circuit according to the second embodiment of the present invention; 
       FIG. 11  is a block diagram schematically showing a configuration of a power supply circuit according to the third embodiment of the present invention; 
       FIG. 12  illustrates an electric diagram of a configuration of a conventional booster circuit; and 
       FIG. 13  illustrates an electric diagram of another conventional booster circuit. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   Hereinafter, an embodiment of the present invention will be described in detail with reference to the attached drawings. 
   The same components in the drawings will be denoted by the same reference numerals. 
   First Embodiment 
     FIG. 1  illustrates a circuit diagram of a configuration of a booster circuit according to the first embodiment of the present invention. In  FIG. 1 , the booster circuit  1  includes an input terminal Vin and a common terminal COMMON, to both of which an input voltage to be converted is applied, a smoothing capacitor C 1  interposed between the input terminal Vin and the common terminal COMMON, a inductor L 1  provided on an input side and having one end connected to a connection point of the input terminal Vin and the capacitor C 1 , diodes D 1 , D 2  each having its anode connected to another end of the inductor L 1 , a transformer T 1  (transformation unit) having windings n 1 , n 2 , n 3 , which are divided by taps P 2 , P 3  connected to cathodes of the diodes D 1 , D 2 , respectively, switch elements, SW 1 , SW 2  interposed between the common terminal COMMON and conducting wires (hereinafter, referred to as a lead wire of the winding n 1  and a lead wire of the winding n 3  so as to be distinguished from the taps P 2 , P 3 ) led from ends of the windings n 1 , n 3  of the transformer T 1 , a diode D 3  having its anode connected to a connection point of the lead wire of the winding n 1  and the switch element SW 1 , a diode D 4  having its anode connected to a connection point of the lead wire of the winding n 3  and the switch element SW 2 , an output terminal Vout, to which cathodes of the diodes D 3 , D 4  are connected, that provides an output voltage between the output terminal and the common terminal, and a smoothing capacitor C 2  interposed between the common terminal COMMON and the output terminal Vout. 
   The transformer T 1 , which is a transformation unit, includes a winding wound around a core (for example, ferrite core or iron core), the winding divided into the windings n 1 , n 2 , n 3 , by the taps P 2 , P 3 . Lead wires or terminals, which are led from both ends of the whole winding including the windings n 1 , n 2 , n 3 , are denoted by P 1  and P 4 , respectively. Hereinafter, the each winding is simply referred to as a winding, and the whole winding including the respective windings is denoted by n 0 . In the following description, the number of turns of the windings n 1 , n 2 , n 3 , are denoted by N 1 , N 2 , N 3 , respectively. According to the present invention, the number of turns of the winding n 1  and the winding n 3  must be equal, that is N 1 =N 3 . In this embodiment, the taps P 2 , P 3  are provided in the process of forming the winding n 0  so that the numbers of turns of the windings n 1  and n 3  become equal, and therefore naturally the windings n 1 , n 2 , n 3  are wound in the same direction. Thereby, when electricity is applied between the terminals P 1 , P 4  of the winding n 0 , each winding ni (i=1, 2, 3) forms magnetic flux in the core in the same direction. In order to illustrate this in the drawings, black circles are marked in each of the winding ni in the same direction. 
   The capacitor C 1  on the input side is not necessarily indispensable except when a power source or battery, which supplies power for the booster circuit  1 , is located nearby, and the capacitor C 1  is provided to reduce source impedance in the circuit and stabilize its operation. 
   The inductor L 1  provided on the input side functions as a choke coil. Unlike a coil in a classical booster circuit, wherein the coil is used to accumulate and release energy so as to step up a voltage, the inductor L 1  is provided to keep in a certain range a current change rate di/dt, which could become large on the switch element SW 1  (a first switching unit) and the SW 2  (a second switching unit) being switched, that is, the inductor L 1  is provided to reduce the current change rate di/dt. For this reason, the inductor L 1  shown in  FIG. 1  may have a smaller size than the conventional inductor as shown in  FIG. 12 . 
   Each of the diodes D 1 , D 2 , each of which serves as a rectifier unit, has its anode connected to the inductor L 1  on the input side and its cathode connected to the taps P 2 , P 3 , respectively, of the transformer T 1 . A diode is used as each of the rectifier units D 1  to D 4  in the booster circuit  1  of  FIG. 1 , but any appropriate element may be used as long as it has a rectification function. 
   The diodes D 1 , D 2  automatically operates to select a path, through which a current flows into the transformer T 1  when the switch elements SW 1 , SW 2  are alternately turned on. As schematically illustrated in  FIG. 5 , an operation is automatically performed as if a supporting point of a seesaw shifts every time the switch elements SW 1 , SW 2  are turned on/off. Specifically, when the switch element SW 1  is turned on, a current is fed into the transformer T 1  though the diode D 1  so that a voltage is applied to the winding n 1  and a current does not flow through the diode D 2 . In the transformer T 1 , a voltage is induced in the windings n 2 , n 3 , and then the voltage is output from the winding n 3  side through the diode D 4 . When SW 1  is turned off and SW 2  is turned on, a current is fed through D 2  so that a voltage is applied to n 3  and a current does not flow through D 1 . A voltage is induced in the windings n 1 , n 2 , and then the voltage is output from the winding n 1  side through the diode D 3 . When a high speed switching operation is required, the diodes D 1  to D 4  (rectifier element) are preferably a fast recovery diode (FRD) or a schottky barrier diode (SBD). 
   In  FIG. 1 , an insulated gate bipolar transistor (IGBT) is used as the switch elements SW 1 , SW 2 , which serve as an opening and closing unit, but any appropriate element such as a MOSFET (metal-oxide semiconductor field-effect transistor) or a bipolar transistor may be used as long as the element can open and close at the speed required for the application. 
   The element C 2  is a capacitor that is provided on the output side and is dedicated to filtering ripples. The booster circuit  1  according to the present invention may have a small capacity because there occurs a smaller amount of a ripple current when the capacitor C 2  is charged and discharged, compared to a classical booster circuit, as described later. 
   Next, a description will be given on an operation of the booster circuit  1  configured as above with reference to  FIGS. 3 to 5 . In the booster circuit  1  shown in  FIG. 1 , rectangular waves (referred to as a driving signal A and a driving signal B), which have a duty cycle of less than or equal to 50% and nearly opposite phases to each other, are applied to control terminals (gate terminals in  FIG. 1 ) A, B of the switch elements SW 1 , SW 2 , which serve as an opening and closing unit.  FIG. 2  illustrates an example of waveforms of the driving signals A and B. 
     FIG. 3A  illustrates an operation when the switch element SW 2  is turned off and the switch element SW 1  is turned on.  FIG. 3B  illustrates an operation when the switch element SW 1  is turned off and the switch element SW 2  is turned on.  FIG. 4  is a graph showing signal waveforms of each of the devices in the booster circuit  1 .  FIG. 5  schematically illustrates the principle of operations of the booster circuit  1  shown in  FIG. 1 . 
   In  FIG. 3A , a current that flows through the inductor L 1  is denoted by Iin, currents that flow through the diodes D 1 , D 2  are denoted respectively by Id 1 , Id 2 , a current that flows from the lead wire P 1  through the winding n 1  is denoted by I 2 , a current that flows from the tap P 3  to the tap P 2  through the winding n 2  is denoted by I 2 , a current that flows from the lead wire P 4  through the winding n 3  is denoted by I 3 . An input voltage is denoted by Vin, cathode voltages of the diodes D 1 , D 2  are respectively denoted by Vd 1 , Vd 2 , voltages of the switch elements SW 1 , SW 2  on the winding side are respectively denoted by Vsw 1 , Vsw 2 , and an output voltage is denoted by Vout. 
   When the switch elements SW 1 , SW 2  are both turned off, as shown in  FIG. 5A , the input voltage Vin is more or less directly output through the inductor L 1  on the input side, the diodes D 1 , D 2 , the windings n 1 , n 3 , and the diodes D 3 , D 4 , although the input voltage Vin decreases by the voltage drop. 
   With reference to  FIGS. 3A and 7 , a description will be given on an operation when the switch element SW 2  is turned off and the switch element SW 1  is turned on. In this case, because the switch element SW 1  is electrically conducted, a connection point of the switch element SW 1  and the terminal P 1  becomes grounded. For this reason, the voltage Vsw 1  of the connection point is 0 (zero) while the switch element SW 1  is left on. Therefore, the current I 1  flows through the inductor L 1 , the diode D 1 , the winding n 1 , and the switch element SW 1 . The current I 1  continuously increases while the switch element SW 1  is left on, and the current I 1  is reduced to zero when the switch element SW 1  is turned off. When the current I 1  flows through the winding n 1 , at the same time an induced current I 3  is generated in the windings n 2 , n 3  due to mutual induction effect. The current I 3  flows through the inductor L 1 , the diode D 1 , the windings n 2 , n 3 , and the diode D 4  so as to be applied to the load side. As mentioned above, the input current Iin (which is equal to Id 1  when SW 1  is turned on) is divided into the currents I 1  and I 3  at the tap P 2 . As is well known, the windings having common magnetic flux path have equal magnetic force (ampere turns), which is the product of a current flowing through each winding and the number of turns of the winding. If the windings n 1 , n 2 , n 3  have the same number of turns, the ratio of the current I 1  and the current I 3  is 2:1 because the current I 1  flows through the winding n 1  and the current I 3  flows through the windings n 2  and n 3 . That is, ⅔ of the input current Iin is the current I 1 , and ⅓ of the input current Iin is the current I 3 . 
   The current I 2  flowing through the winding n 2  is determined to flow in the direction from P 3  to P 2 , as shown in  FIG. 3A . As shown in  FIG. 4 , a waveform of the current I 2  is negative during the ON period of SW 1  and the subsequent decay time, which means that the current I 3  flows from P 2  to P 3 . 
   When the windings have the ratio of n 1 : n 2 : n 3 =1:1:1, an equal voltage is induced in each winding ni, that is, a voltage between P 1  and P 2 =a voltage between P 2  and P 3 =a voltage between P 3  and P 4 =Vd 1 . A voltage on the path where the current I 1  flows has the following relation.
 
 V in= V   L1   +Vd 1  (1)
 
   V L1  is a voltage between both ends of the inductor L 1  on the input side. 
   On the other hand, a voltage on the path where the current I 3  flows has the following relation.
 
 V out= V in +V   L1 +2 ·Vd 1  (2)
 
   Therefore, an output voltage is derived from the equations (1) and (2).
 
 V out=3 ·V in− V   L1   (3)
 
   In the booster circuit  1  according to the present invention, the inductor L 1  on the input side serves as a choke coil. 
   As is well know, a voltage of the inductor L 1  depends on the ON period of SW 1 , that is, a duty cycle. Therefore, when the inductor L 1  is provided in the circuit, a voltage of the inductor L 1  can be changed by changing a duty cycle of the driving signal A, which is applied to the gate terminal A of the switch element SW 1 . However, when the inductor L 1  is not provided in the circuit, the output voltage Vout becomes three times as high as the input voltage Vin irrespective of a duty cycle of the driving signal. The above description assumes that there is no loss in the inductor L 1  and the transformer T 1 , or no resistance in the diodes D 1 , D 4 , and the switch element SW 1 . In fact there are such loss and resistance, and therefore the output voltage Vout does not become three times as high as the input voltage Vin on the assumption that the windings n 1 , n 2 , n 3  have the same number of turns. By adjusting the ratio of the number of turns, the output voltage Vout can be more than three times as high as the input voltage Vin. 
   As mentioned above, in the booster circuit  1  according to the present invention, the currents having the same ampere turns flow from the tap P 2  in opposite directions so that magnetic flux in the core of the transformer T 1  is offset and a density of the magnetic flux in the core becomes very small. In the booster circuit  1 , as mentioned above, the density of the magnetic flux in the core of the transformer T 1  becomes very small, thereby reducing the possibility of magnetic saturation. Therefore, the size of the transformer T 1  can be reduced. 
   When the switch element SW 1  is changed from on to off, the current I 1  flowing from the winding n 1  through the lead wire P 1  is attenuated and then reduced to zero. During this period, the current I 1  is applied to the load side through the diode D 3 . Accordingly, the current I 3  is attenuated and reduced to zero. The current I 3  flows on the same path as when SW 1  is turned on. Therefore, the input current Iin (which is equal to Id 1 ) is attenuated and reduced to zero as well as the currents I 1 , I 3 . 
   When the switch element SW 1  is changed from on to off, a flyback voltage occurs at the connection point of the cathode of the diode D 1  and the tap P 2  of the transformer T 1  due to the energy accumulated in the inductor L 1 , thereby extremely raising the cathode voltage of the diode D 1  for a moment. However, the voltage is output through the diodes D 3 , D 4 , and then the voltage is clamped at the output voltage Vout. When the voltage Vd 1  is lower than the output voltage Vout, the voltage Vd 1  vibrates and disappears due to floating LCR component, which occurs from the inductor L 1  to the diodes D 3 , D 4 . The voltage Vsw 1  of the lead wire P 1  of the winding n 1  rises up to the output voltage Vout simultaneously when the switch element SW 1  is turned off, and the voltage Vsw 2  of the lead wire P 4  of the winding n 3  becomes nearly twice as high as the voltage Vd 1  of the tap P 2 . Because the voltage Vsw 1  of the lead wire P 1  of the transformer T 1  and the voltage Vsw 2  of the lead wire P 4  are output through the diodes D 3  and D 4 , respectively, the output voltage Vout is determined to be a higher voltage between the voltage Vsw 1  and the voltage Vsw 2 . 
   The above description is given on the case where the switch element SW 2  is turned off. As shown in  FIG. 3B , when the switch element SW 2  is turned on, a contrary operation to the above operation is performed by the diode D 2 . When the switch element SW 1  is turned off and the switch element SW 2  is turned on, the voltage Vsw 2  of the lead wire P 4  of the transformer T 1  becomes zero. The cathode voltage (which is equal to the voltage of the tap P 3  of the transformer T 1 ) Vd 2  of the diode D 2  is equal to the cathode voltage Vd 1  of the diode D 1  as when SW 2  is turned off and SW 1  is turned on, and the voltage Vsw 1  of the lead wire P 1  of the transformer T 1  becomes twice as high as the voltage Vd 2 . 
   As shown in  FIG. 5 , the above-mentioned operation of the booster circuit  1  is similar to an operation of a see-saw. Specifically, as shown in  FIG. 5B , when the switch element SW 1  is turned on, the voltage of the lead wire P 1  is reduced to zero and the diode D 1  serves as a supporting point to perform the operation. As a result, the voltage of the lead wire P 4  becomes three times as high as the voltage Vd 1  of P 2 , and is output through the diode D 4 . On the contrary, as shown in  FIG. 5C , when the switch element SW 2  is turned on, the voltage of the lead wire P 4  is reduced to zero and the diode D 2  serves as a supporting point to perform the operation. As a result, the voltage of the lead wire P 1  becomes three times as high as the voltage Vd 2  of the lead wire P 3 , and is output through the diode D 3 . 
   &lt;The Ratio of the Number of Turns&gt; 
   The above description assumes that the windings n 1 , n 2 , n 3  have the same number of turns. According to the present invention, it is sufficient that the windings n 1 , n 3 , between which the winding n 2  is interposed, have the same number of turns. Therefore, a voltage boost ratio can be controlled by changing the ratio of the number of turns N 2 :N 1  (=N 3 ). The number of turns of the windings n 1 , n 3  are respectively denoted by N 1 , N 3 , thereby obtaining the following equation, which is determined by the above equation (2). 
   
     
       
         
           
             
               
                 
                   
                     
                       Vout 
                       = 
                       
                         Vin 
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                             ⁢ 
                             1 
                           
                         
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                               ( 
                               
                                 N 
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                                 ⁢ 
                                 
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                                 ⁢ 
                                 1 
                               
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                           ⁢ 
                           1 
                         
                         + 
                         
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                                   1 
                                 
                               
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                             · 
                             Vd 
                           
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                 ( 
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   The equation (1) determines that Vin=V L1 +Vd 1 , and therefore the output voltage is determined as follows.
 
 V out=(2 +N 2 /N 1) V in−( N 2 /N 1)· V   L1   (5)
 
   For example, when the ratio of the number of turns is N 2 :N 1  (=N 3 )=2:1, the output voltage Vout is determined as 4Vin−2V L1  by the equation (5). 
   According to the present invention, the output voltage can be adjusted in the range of voltages, which are more than twice as high as the input voltage, by changing the ratio of the number of turns of the windings of the transformer T 1 . 
   Preferred Embodiment 
     FIG. 6  is a circuit diagram illustrating an example of a configuration of a more practical booster circuit according to the first embodiment of the present invention. 
   A booster circuit  1   a  shown in  FIG. 6  has the same configuration as the booster circuit  1  in  FIG. 1  except for the following points (a) to (d). 
   (a) A MOSFET is used as the switch elements SW 1 , SW 2 . 
   (b) Resistances R 1 , R 2  are disposed in front of the gate terminal A of SW 1  and the gate terminal B of SW 2 , respectively. 
   (c) Resistances R 3 , R 4  are disposed between terminals or lead wires, which are not connected to SW 1 , SW 2 , of the resistance R 1 , R 2  and the input/output common terminals. 
   (d) A smoothing capacitor C 3  is connected in parallel to the capacitor C 2  on the output side. 
   In the booster circuit  1   a , the resistances R 1 , R 2 , which are disposed in front of the gate terminals A, B, limits a current to charge or discharge the gate capacity, and prevents a vibration of a waveform of the gate voltage. Furthermore, the resistances R 1 , R 2  provided in the booster circuit  1   a  prevent the potentials of the gate terminals A, B from becoming unstable when the power source of the booster circuit  1   a  is turned on and off. In the booster circuit  1   a , a MOSFET is used as the switch elements SW 1 , SW 2 , thereby making it possible to operate at a high speed. Furthermore a ripple current can be reduced because a switching frequency becomes high. In the booster circuit  1   a , the smoothing capacitor C 3  is connected in parallel to the capacitor C 2  on the output side, and therefore the ripple current can be further reduced. 
   EXAMPLE 1 
   In the circuit configuration shown in  FIG. 6 , the duty ratios, which are defined as the ratios of the ON periods relative to the repetition periods of the driving signals A, B, are determined to be 26%, respectively, and the input voltage 30V is applied. 
   When the switch elements SW 1 , SW 2  are both turned off on the above condition, the input voltage DC 30V is applied to the inductor L 1 , the diodes D 1 /D 2 , the windings n 1 /n 3 , and the diodes D 3 /D 4 , and thereby the output voltage of about 28V is obtained. The voltage decreases when passing through each of the devices by the voltage drop. 
   When the switch element SW 1  is turned on and the switch element SW 2  is turned off, voltages of the lead wires P 1  to P 4  are 0V, 20V, 40V, and 60V, respectively. 
   EXAMPLE 2 
   Next, a description will be given on an operation when the number of turns N 2  is twice as large as the number of turns N 1 , N 3 , that is, N 1 :N 2 :N 3 =10 T:20 T:10 T. The duty ratios of the driving signals A, B are determined to be 25% and the input voltage 25V is applied, thereby obtaining the output voltage 65V and the output current 0.5A.  FIG. 7  is a graph showing signal waveforms of each of the devices of the booster circuit  1   a  on the above condition. As shown in  FIG. 7 , when the switch element SW 1  is electrically conducted (turned on), the drain voltage Vsw 1  is reduced to 0V (indicated by # 1  in  FIG. 7 ). In this instance, the whole input current Vin flows through D 1 , and the cathode voltage Vd 1  of the diode D 1  is about 15V. Although not shown in  FIG. 7 , the cathode voltage Vd 2  of the diode D 2  (see  FIG. 6 ) is equal to Vd 1  (# 2 ) as when SW 2  is turned on, and therefore Vd 2  is about 49V. The output voltage Vout is the drain voltage Vsw 2  of the switch element SW 2  (not shown in  FIG. 7 ), and is equal to the drain voltage Vsw 1  (# 3 ) of the switch element SW 1  as when SW 2  is turned on. In this case, the output voltage Vout is 65V. Therefore, the voltages of about 15V, 34V (=49V−15V), and 16V (=65V−49V) are applied to the windings n 1 , n 2 , n 3 , respectively. Although measurements performed by experimental devices cause certain errors, voltage ratios of the windings n 1 , n 2 , n 3  are determined to be 1:2:1, which are equal to ratios of the number of turns. 
   A waveform of the current I 1 , which flows through the winding n 1 , when SW 1  is turned on is denoted by # 4 , and a waveform of the current I 1  induced when SW 2  is turned on is indicated by # 5 . The ratio of the peak values of the waveforms # 4 , # 5  is 3:1. 
   To summarize the above, when SW 1  is turned on and the voltage 15V is applied to the winding  1 , the voltage 50V (=34V+16V), which is about three times higher than 15V, is induced in the windings n 2  and n 3 . In this instance, the current I 3  flowing through the windings n 2 , n 3  is approximately ⅓ of the current I 1  flowing through the winding n 1 . Therefore, the current I 1  and the current I 3  flow through the winding n 1  and the windings n 2 , n 3 , respectively, in the direction such that magnetic fluxes in the core of the transformer T 1  are offset, thereby generating equal ampere turns in the windings. As described above, the magnetic offset is carried out in the same manner as when N 1 :N 2 :N 3 =1:1:1. 
   As is evidenced from the equation (5), the increase of the number of turns of the central winding n 2  improves the voltage boost ratio, and at the same time an effect of the magnetic offset is maintained. This is effective where N 1 :N 2 :N 3 =1:1.5:1=12 T:18 T: 12 T, although an image of the measurement is not shown here. According to the present invention, as described above, a current flows through the windings of the transformer T 1  such that the magnetic fluxes in the core of the transformer T 1  are offset, thereby reducing the possibility of magnetic saturation in the core and making it possible to reduce the size of the transformer T 1 . It is, therefore, possible to reduce the size of a power supply circuit or system, which employs the booster circuit according to the present invention. 
   The voltage values illustrated in  FIG. 7  are obtained by setting up a specific circuit constant and an operating condition in order to explain the embodiment. The voltage value can be greatly changed by changing a circuit constant and an operating condition. 
   &lt;Low Ripple Property&gt; 
   A secondary effect of the present invention is to generate a very small amount of output current ripples. A description will be given on this with reference to  FIGS. 6 ,  12 , and  8 .  FIG. 8A  is a graph showing the input current Ii and the current Ic 12  flowing through the capacitor C 12  on the output side in the booster circuit shown in  FIG. 12 .  FIG. 8B  is a graph showing the input current Iin and the ripple current Ic flowing through the smoothing capacitor on the output side when the booster circuit  1   a  in  FIG. 6  operates under the condition mentioned below. 
   The booster circuit  9  shown in  FIG. 12  is experimentally produced with the 50 μH inductor L 11  and the 100 μF capacitor C 12 , and operates with the input voltage 30V, the output voltage 60V, and the current 1 A. On the other hand, as an example of the embodiment, the booster circuit  1   a  in  FIG. 6  is experimentally produced with the 20 μH inductor L 1  and a parallel capacity 66 μF of the capacitors C 2 , C 3 , and operates with the input voltage 30V, the output voltage 60V, and the current 1 A. 
   As mentioned above, the booster circuit  1   a  of the present invention has smaller circuit constants of the inductor on the input side and the output smoothing capacitor than the conventional booster circuit  9  shown in  FIG. 12 . As shown in  FIG. 8 , an effective value of the ripple current Ic 12  in the conventional booster circuit  9  is 2.2 Arms (root mean square), and on the contrary an effective value of the ripple current Ic in the booster circuit  1   a  is 1.2 Arms. Therefore, the booster circuit  1   a  has less ripple current than the conventional booster circuit  9 . 
   Furthermore, only ⅔ of the current Iin (the current I 1  in  FIG. 3A  and the current I 3  in  FIG. 3B ) flows through each of the switch elements SW 1 , SW 2 , and therefore it is sufficient to provide the switch element having a smaller current capacitance value than the conventional one when the same voltage and current (capacity) are output by a DC/DC converter. 
   Specifically, in the booster circuit  9  shown in  FIG. 12 , the current, which flows through the switch element when the switch element is electrically conducted, is completely equal to the input current Ii shown in  FIG. 8A , and the maximum value of the current is about  8 A. On the contrary, in the booster circuit  1   a  of the present invention, when the switch element SW 1  or SW 2  is turned on, the current I 1  or the current I 3 , which respectively flows through SW 1  or SW 2 , becomes the maximum value of 4 A while the current Iin of the inductor L 1  becomes the maximum value of 6 A. In other words, in the booster circuit according to the embodiment of the present invention, the total current of 6 A can be controlled by the switch having the capacity of 4A, thereby making it possible to reduce the size of the switch element. 
   The above description has been given to explain the present invention by taking as an example the embodiment having the specific configuration, but the present invention is not limited to such a configuration. 
   Second Embodiment 
   For example,  FIG. 9  is a circuit diagram showing an example of a booster circuit, which selects an output voltage between two voltage values, according to the second embodiment of the present invention. A booster circuit  2  in  FIG. 9  has the same configuration as the booster circuit  1  in  FIG. 1 , except that the transformer T 1  is replaced by a transformer T 2 , and switch elements SW 3  to SW 8 , diodes D 5 , D 6 , D 7 , D 8 , and an inverter INV are added in the circuit. The windings n 2 , n 1 , n 2  in the booster circuit  2  in  FIG. 9  correspond to the windings n 1 , n 2 , n 3  in the booster circuit  1  in  FIG. 1 . In  FIG. 9 , the windings having the same number of turns are denoted by the same reference mark. 
   In the transformer T 2 , the windings n 13  having the same number of turns are added on both ends of the winding n 0  of the transformer T 1 , the lead wires P 1 , P 4  are provided as a tap, and lead wires P 0 , P 5  are added. A winding between P 0  and P 2  and a winding between P 3  and P 5  are defined as a winding n 4 . A switch element SW 5 , which is dedicated to selecting a winding, is disposed on the wire connecting the tap P 1  and the switch element SW 1 , and a switch element SW 6 , which is dedicated to selecting a winding, is disposed on the wire connecting the tap P 4  and the switch element SW 2 . The switch elements SW 5 , SW 6  are turned on when a winding selection signal n 2 /n 4  is, for example, a logical 1. The reference “n 2  (H)/n 4  (L)” shown in  FIG. 9  means that the winding n 2  is selected when a “HIGH” is input to SW 5 , SW 6 , and the winding n 4  is selected when a “LOW” is input to SW 5 , SW 6 . 
   The lead wires P 0 , P 5  of the transformer T 2  are respectively connected to one end of each of switch elements SW 7 , SW 8 , which are dedicated to selecting a winding, via the diodes D 7 , D 8 , the switch element SW 3 , SW 4  are interposed between other end of each of SW 7 , SW 8  and the input/output common conductor. Anodes of the diodes D 5 , D 6  are connected to a connection point of SW 3  and SW 7  and a connection point of SW 4  and SW 8 , respectively. Cathodes of the diodes D 5 , D 6  are connected to the output terminal Vout, together with cathodes of the diodes D 3 , D 4 . A signal, which is generated by inverting the winding selection signal n 2 (H)/n 4 (L) by the inverter INV, is applied to control terminals of SW 7 , SW 8 . As mentioned above, either of the windings n 2  and n 4  of the transformer T 2  can be selectively used by the winding selection signal n 2 (H)/n 4 (L). Therefore, when the number of turns of the windings n 1 , n 2 , n 4  are N 1 , N 2 , N 4 , the two different output voltages, which are determined by the two different ratios of the number of turns, that is, N 1 :N 2 , and N 1 :N 4 , are switched from one to another by the winding selection signal n 2 (H)/n 4 (L). 
   In the present embodiment, when a current is chopped at the taps P 1 , P 4  of the transformer T 2  by the switch elements SW 1 , SW 2 , a negative voltage occurs at the lead wires P 0 , P 5  side. For this reason, when a normal MOSFET or IGBT is used as the switch element, the current flows from the common terminal COMMON to the lead wires P 0 /P 5  through the switch element SW 3 , SW 4 , SW 7 , SW 8 , which include a parasitic diode. The diodes D 7 , D 8  are provided to prevent this current. 
     FIG. 10  illustrates a modified example of the booster circuit according to the second embodiment of the present invention. A booster circuit  2   a  in  FIG. 10  has the same configuration as the booster circuit  2  in  FIG. 9 , except that the diodes D 7 , D 8  are removed, and instead, the switch element SW 7 , SW 8  are replaced by reverse blocking IGBTs including a diode dedicated to preventing a reverse current. The above description of the second embodiment of the present invention is applied to the booster circuit  2   a  in  FIG. 10 . 
   The duty cycles of the driving signals A 1 , B 1  of the switch elements SW 1 , SW 2  in  FIG. 9  and the duty cycles of the driving signals A 2 , B 2  of the switch elements SW 3 , SW 4  may be the same or different. 
   In the second embodiment, the windings having the same number of turns are added on both ends of the winding n 0  of the transformer T 1  shown in  FIG. 1 . However, the taps P 0 , P 5  may be added in the winding between P 1  and P 2  and the winding between P 3  and P 4  such that the winding between P 1  and P 2  and the winding between P 3  and P 4  are divided in the same ratio. 
   Furthermore, in the second embodiment, a circuit is added on the output side of the transformer T 2 , and the output voltage is selected from the two voltages by switching the originally provided output path and the added output path. Instead of this, the added lead wires or the taps P 0 , P 5  may be used as an input terminal from the inductor L 1  on the input side (the diodes D 5 , D 6  are interposed between the taps P 0 , P 5  and the inductor L 1 ), and branches of the originally provided diodes D 1 , D 2  and branches of the added diodes D 5 , D 6  can be switched from one to another by the winding selection signal. When such a circuit is configured by using the transformer T 2  in  FIG. 9 , the ratios of the numbers of turns are N 1 :N 4  and (N 1 +2·N 2 ):N 13 . The reference N 13  denotes the number of turns of the winding n 13 . 
   The above-mentioned embodiment assumes that the input/output voltage is a positive voltage, but the input/output voltage may be a negative voltage in the present invention. In this instance, a polarity of a semiconductor element, such as a diode or a switch element, or an electrolytic capacitor may be reversed. 
   Third Embodiment 
     FIG. 11  is a block diagram schematically showing a configuration of a power supply circuit according to the third embodiment of the present invention. A power source circuit  5  includes the above-mentioned booster circuit (booster DC/DC converter)  1 ,  1   a ,  2 , or  2   a  (hereinafter referred to as a booster circuit  1 / 2  as a representative), and a driving signal generation circuit  10 . Any booster circuit may be used as long as it uses the principle of the present invention. The driving signal generation circuit  10  monitors the output voltage Vout of the booster circuit  1 / 2 , and supplies the driving signals A, B (or A 1 , B 1 , A 2 , B 2 ) to the booster circuit  1 / 2  so that the output voltage Vout is in the range of a predetermined voltage value. The power supply circuit  5  in  FIG. 11  makes it possible to obtain the boost voltage ratio, by which an output voltage is more than twice as high as an input voltage, as well as the booster circuits in  FIGS. 1 ,  6 ,  9 , and  10 . 
   Furthermore, the driving signal generation circuit  10  may set the output voltage Vout by a signal (in  FIG. 11 , referred to as an output adjustment signal) applied from an external device within the range to be adjusted by the driving signals A, B. With such a configuration, it is possible to fine-tune the output voltage. 
   In the above-mentioned booster circuit according to the embodiments of the present invention, various modifications, changes, or additions can be made within the scope of the technical idea and principle of the present invention. 
     FIG. 1  shows an example of the transformer T 1  where the taps are used, but the transformer T 1  including three windings separately formed on the core may be used. In this instance, if two of the three windings have the same number of turns, each winding may be wound in any direction. However, it is necessary to connect the wire such that the windings having the same number of turns are located on both ends of the whole winding when the three windings are connected in series, and each winding forms a magnetic flux in the core in the same direction when a current is applied to the three serially connected windings. The three serially connected windings are denoted by n 1 , n 2 , and n 3  from the end. A connection point of the windings n 1  and n 2  is denoted by P 2 , a connection point of the windings n 2  and n 3  by P 3 , the n 1  side end of the three windings by P 1 , and the n 3  side end of the three windings by P 4 , and thereby it is possible to operate such a circuit in the same manner as the circuit including the above-mentioned transducer using the taps.