Patent Publication Number: US-11026304-B2

Title: Systems and methods for stage-based control related to TRIAC dimmers

Description:
1. CROSS-REFERENCES TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 16/385,327, filed Apr. 16, 2019, which is a continuation of U.S. patent application Ser. No. 15/849,452, filed Dec. 20, 2017, which claims priority to Chinese Patent Application No. 201711235958.9, filed Nov. 30, 2017, all of the above-referenced applications being incorporated by reference herein for all purposes. 
     Additionally, this application is related to U.S. patent application Ser. Nos. 15/364,100, 14/593,734 and 14/451,656, all of which are incorporated by reference herein for all purposes. 
    
    
     2. BACKGROUND OF THE INVENTION 
     Certain embodiments of the present invention are directed to integrated circuits. More particularly, some embodiments of the invention provide a system and method for stage-based control related to TRIAC dimmer. Merely by way of example, some embodiments of the invention have been applied to driving one or more light emitting diodes (LEDs). But it would be recognized that the invention has a much broader range of applicability. 
     A conventional lighting system may include or may not include a TRIAC dimmer that is a dimmer including a Triode for Alternating Current (TRIAC). For example, the TRIAC dimmer is either a leading-edge TRIAC dimmer or a trailing-edge TRIAC dimmer. Often, the leading-edge TRIAC dimmer and the trailing-edge TRIAC dimmer are configured to receive an alternating-current (AC) input voltage, process the AC input voltage by clipping part of the waveform of the AC input voltage, and generate a voltage that is then received by a rectifier (e.g., a full wave rectifying bridge) in order to generate a rectified output voltage. 
       FIG. 1  shows certain conventional timing diagrams for a leading-edge TRIAC dimmer and a trailing-edge TRIAC dimmer. The waveforms  110 ,  120 , and  130  are merely examples. Each of the waveforms  110 ,  120 , and  130  represents a rectified output voltage as a function of time that is generated by a rectifier. For the waveform  110 , the rectifier receives an AC input voltage without any processing by a TRIAC dimmer. For the waveform  120 , an AC input voltage is received by a leading-edge TRIAC dimmer, and the voltage generated by the leading-edge TRIAC dimmer is received by the rectifier, which then generates the rectified output voltage. For the waveform  130 , an AC input voltage is received by a trailing-edge TRIAC dimmer, and the voltage generated by the trailing-edge TRIAC dimmer is received by the rectifier, which then generates the rectified output voltage. 
     As shown by the waveform  110 , each cycle of the rectified output voltage has, for example, a phase angel (e.g., ϕ) that changes from 0° to 180° and then from 180° to 360°. As shown by the waveform  120 , the leading-edge TRIAC dimmer usually processes the AC input voltage by clipping part of the waveform that corresponds to the phase angel starting at 0° or starting at 180°. As shown by the waveform  130 , the trailing-edge TRIAC dimmer often processes the AC input voltage by clipping part of the waveform that corresponds to the phase angel ending at 180° or ending at 360°. 
     Various conventional technologies have been used to detect whether or not a TRIAC dimmer has been included in a lighting system, and if a TRIAC dimmer is detected to be included in the lighting system, whether the TRIAC dimmer is a leading-edge TRIAC dimmer or a trailing-edge TRIAC dimmer. In one conventional technology, a rectified output voltage generated by a rectifier is compared with a threshold voltage V th_on  in order to determine a turn-on time period T on . If the turn-on time period T on  is approximately equal to the duration of a half cycle of the AC input voltage, no TRIAC dimmer is determined to be included in the lighting system; if the turn-on time period T on  is not approximately equal to but is smaller than the duration of a half cycle of the AC input voltage, a TRIAC dimmer is determined to be included in the lighting system. If a TRIAC dimmer is determined to be included in the lighting system, a turn-on voltage slope V on_slope  is compared with the threshold voltage slope V th_slope . If the turn-on voltage slope V on_slope  is larger than the threshold voltage slope V th_slope , the TRIAC dimmer is determined to be a leading-edge TRIAC dimmer; if the turn-on voltage slope V on_slope  is smaller than the threshold voltage slope V th_slope , the TRIAC dimmer is determined to be a trailing-edge TRIAC dimmer. 
     If a conventional lighting system includes a TRIAC dimmer and light emitting diodes (LEDs), the light emitting diodes may flicker if the current that flows through the TRIAC dimmer falls below a holding current that is, for example, required by the TRIAC dimmer. As an example, if the current that flows through the TRIAC dimmer falls below the holding current, the TRIAC dimmer may turn on and off repeatedly, thus causing the LEDs to flicker. As another example, the various TRIAC dimmers made by different manufacturers have different holding currents ranging from 5 mA to 50 mA. 
     The light emitting diodes (LEDs) are gradually replacing incandescent lamps and becoming major lighting sources. The LEDs can provide high energy efficiency and long lifetime. The dimming control of LEDs, however, faces significant challenges because of insufficient dimmer compatibility. For certain historical reasons, the TRIAC dimmers often are designed primarily suitable for incandescent lamps, which usually include resistive loads with low lighting efficiency. Such low lighting efficiency of the resistive loads often helps to satisfy the holding-current requirements of TRIAC dimmers. Hence the TRIAC dimmers may work well with the incandescent lamps. In contrast, for highly efficient LEDs, the holding-current requirements of TRIAC dimmers usually are difficult to meet. The LEDs often need less amount of input power than the incandescent lamps for the same level of illumination. 
     In order to meet the holding-current requirements of the TRIAC dimmers, some conventional techniques use a bleeder for a lighting system.  FIG. 2  is a simplified diagram of a conventional lighting system that includes a bleeder. As shown, the conventional lighting system  200  includes a TRIAC dimmer  210 , a rectifier  220 , a bleeder  224 , a diode  226 , capacitors  230 ,  232 ,  234 ,  236  and  238 , a pulse-width-modulation (PWM) controller  240 , a winding  260 , a transistor  262 , resistors  270 ,  272 ,  274 ,  276 ,  278  and  279 , and one or more LEDs  250 . The PWM controller  240  includes controller terminals  242 ,  244 ,  246 ,  248 ,  252 ,  254 ,  256  and  258 . For example, the PWM controller  240  is a chip, and each of the controller terminals  242 ,  244 ,  246 ,  248 ,  252 ,  254 ,  256  and  258  is a pin. In yet another example, the winding  260  includes winding terminals  263  and  265 . 
     The TRIAC dimmer  210  receives an AC input voltage  214  (e.g., VAC) and generates a voltage  212 . The voltage  212  is received by the rectifier  220  (e.g., a full wave rectifying bridge), which then generates a rectified output voltage  222 . The rectified output voltage  222  is larger than or equal to zero. The resistor  279  includes resistor terminals  235  and  239 , and the capacitor  236  includes capacitor terminals  281  and  283 . The resistor terminal  235  receives the rectified output voltage  222 . The resistor terminal  239  is connected to the capacitor terminal  281 , the controller terminal  252 , and a gate terminal of the transistor  262 . The gate terminal of the transistor  262  receives a gate voltage  237  from the resistor terminal  239 , the capacitor terminal  281 , and the controller terminal  252 . The capacitor terminal  283  receives a ground voltage. 
     As shown in  FIG. 2 , the rectified output voltage  222  is used to charge the capacitor  236  through the resistor  279  to raise the gate voltage  237 . In response, if the result of the gate voltage  237  minus a source voltage at a source terminal of the transistor  262  reaches or exceeds a transistor threshold voltage, the transistor  262  is turned on. When the transistor  262  is turned on, through the transistor  262  and the controller terminal  254 , a current flows into the PWM controller  240  and uses an internal path to charge the capacitor  232 . In response, the capacitor  232  generates a capacitor voltage  233 , which is received by the controller terminal  244 . If the capacitor voltage  233  reaches or exceeds an undervoltage-lockout threshold of the PWM controller  240 , the PWM controller  240  starts up. 
     After the PWM controller  240  has started up, a pulse-width-modulation (PWM) signal  255  is generated. The PWM signal  255  has a signal frequency and a duty cycle. The PWM signal  255  is received by the source terminal of the transistor  262  through the terminal  254 . The transistor  262  is turned on and off, in order to make an output current  266  constant and provide the output current  266  to the one or more LEDs  250 , by working with at least the capacitor  238 . 
     As shown in  FIG. 2 , a drain voltage at a drain terminal of the transistor  262  is received by a voltage divider that includes the resistors  276  and  278 . The drain terminal of the transistor  262  is connected to the winding terminal  265  of the winding  260 , and the winding terminal  263  of the winding  260  is connected to the capacitor  230  and the resistor  279 . In response, the voltage divider generates a voltage  277 , which is received by the controller terminal  256 . The PWM controller  240  uses the voltage  277  to detect the end of a demagnetization process of the winding  260 . The detection of the end of the demagnetization process is used to control an internal error amplifier of the PWM controller  240 , and through the controller terminal  246 , to control charging and discharging of the capacitor  234 . 
     Also, after the PWM controller  240  has started up, the resistor  274  is used to detect a current  261 , which flows through the winding  260 . The current  261  flows from the winding  260  through the resistor  274 , which in response generates a sensing voltage  275 . The sensing voltage  275  is received by the PWM controller  240  at the controller terminal  258 , and is processed by the PWM controller  240  on a cycle-by-cycle basis. The peak magnitude of the sensing voltage  275  is sampled, and the sampled signal is sent to an input terminal of the internal error amplifier of the PWM controller  240 . The other input terminal of the internal error amplifier receives a reference voltage V ref . 
     As shown in  FIG. 2 , the rectified output voltage  222  is received by a voltage divider that includes the resistors  270  and  272 . In response, the voltage divider generates a voltage  271 , which is received by the controller terminal  242 . The PWM controller  240  processes the voltage  271  and determines phase angle of the voltage  271 . Based on the detected range of phase angle of the voltage  271 , the PWM controller  240  adjusts the reference voltage V ref , which is received by the internal error amplifier. 
     The bleeder  224  is used to ensure that, when the TRIAC dimmer  210  is fired on, an input current  264  that flows through the TRIAC dimmer  210  is larger than a holding current required by the TRIAC dimmer  210 , in order to avoid misfire of the TRIAC dimmer  210  and also avoid flickering of the one or more LEDs  250 . For example, the bleeder  224  includes a resistor, which receives the rectified output voltage  222  at one resistor terminal of the resistor and receives the ground voltage at the other resistor terminal of the resistor. The resistor of the bleeder  224  allows a bleeder current  268  to flow through as at least part of the input current  264 . In another example, if the holding current required by the TRIAC dimmer  210  is small and if the average current that flows through the transistor  262  can satisfy the holding current requirement of the TRIAC dimmer  210 , the bleeder  224  is not activated or is simply removed. 
     As shown in  FIG. 2 , the lighting system  200  includes, for example, a quasi-resonant system with a buck-boost topology. The output current  266  of the quasi-resonant system is received by the one or more LEDs  250  and is determined as follows: 
                     I   o     =       1   2     ×       V     r   ⁢   e   ⁢   f         R     c   ⁢   s                   (     Equation   ⁢           ⁢   1     )               
where I o  represents the output current  266  of the quasi-resonant system of the lighting system  200 . Additionally, V ref  represents the reference voltage received by the internal error amplifier of the PWM controller  240 . Moreover, R cs  represents the resistance of the resistor  274 .
 
       FIG. 3  is a simplified diagram showing certain conventional components of the lighting system  200  as shown in  FIG. 2 . The pulse-width-modulation (PWM) controller  240  includes a dimming control component  300  and a transistor  350 . The dimming control component  300  includes a phase detector  310 , a reference voltage generator  320 , a pulse-width-modulation (PWM) signal generator  330 , and a driver  340 . 
       FIG. 4  shows certain conventional timing diagrams for the lighting system  200  as shown in  FIGS. 2 and 3 . The waveform  471  represents the voltage  271  as a function of time, the waveform  412  represents the phase signal  312  as a function of time, the waveform  475  represents the sensing voltage  275  as a function of time, and the waveform  464  represents cycle-by-cycle average of the input current  264  as a function of time. 
     As shown by  FIGS. 3 and 4 , the lighting system  200  uses a closed loop to perform dimming control. The phase detector  310  receives the voltage  271  through the terminal  242 , detects phase angle of the voltage  271 , and generates a phase signal  312  that indicates the detected range of phase angle of the voltage  271 . As shown by the waveform  471 , the voltage  271  becomes larger than a dim-on threshold voltage (e.g., V th_dimon ) at time t a  and becomes smaller than a dim-off threshold voltage (e.g., V th_dimoff ) at time t b . The dim-on threshold voltage (e.g., V th_dimon ) is equal to or different from the dim-off threshold voltage (e.g., V th_dimoff ). The time duration from time t a  to time t b  is represented by T R , during which the phase signal  312  is at the logic high level, as shown by the waveform  412 . The time duration T R  represents the detected range of phase angle of the voltage  271 . 
     During the time duration T R , the sensing voltage  275  ramps up and down. For example, during the time duration T R , within a switching period (e.g., T SW ), the sensing voltage  275  ramps up, ramps down, and then remains constant (e.g., remains equal to zero) until the end of the switching period (e.g., until the end of T SW ). 
     The phase signal  312  is received by the reference voltage generator  320 , which uses the detected range of phase angle of the voltage  271  to generate the reference voltage  322  (e.g., V ref ). As shown in  FIG. 3 , the reference voltage  322  (e.g., V ref ) is received by the PWM signal generator  330 . For example, the PWM signal generator  330  includes the internal error amplifier of the PWM controller  240 . In another example, the PWM signal generator  330  also receives the sensing voltage  275  and generates a pulse-width-modulation (PWM) signal  332 . The PWM signal  332  is received by the driver  340 , which in response generates a drive signal  342  and outputs the drive signal  342  to the transistor  350 . The transistor  350  includes a gate terminal, a drain terminal, and a source terminal. The gate terminal of the transistor  350  receives the drive signal  342 . The drain terminal of the transistor  350  is coupled to the controller terminal  254 , and the source terminal of the transistor  350  is coupled to the controller terminal  258 . 
     As shown by the waveform  475 , the reference voltage  322  (e.g., V ref ) is used by the PWM signal generator  330  to generate the PWM signal  332 , which is then used to control the peak magnitude (e.g., CS_peak) of the sensing voltage  275  for each PWM cycle during the time duration T R . For example, each PWM cycle corresponds to a time duration that is equal to the switching period (e.g., T SW ) in magnitude. In another example, if the detected range of phase angle of the voltage  271  (e.g., corresponding to T R ) becomes larger, the reference voltage  322  (e.g., V ref ) also becomes larger. In yet another example, if the detected range of phase angle of the voltage  271  (e.g., corresponding to T R ) becomes smaller, the reference voltage  322  (e.g., V ref ) also becomes smaller. 
     According to Equation 1, if the reference voltage  322  (e.g., V ref ) becomes larger, the output current  266  (e.g., I o ) of the quasi-resonant system of the lighting system  200  also becomes larger; if the reference voltage  322  (e.g., V ref ) becomes smaller, the output current  266  (e.g., I o ) of the quasi-resonant system of the lighting system  200  also becomes smaller. 
     As shown by  FIG. 2 , the cycle-by-cycle average of the input current  264  is approximately equal to the sum of cycle-by-cycle average of the output current  266  (e.g., I o ) and the bleeder current  268 . During the time duration T R , within each switching cycle of the PWM signal  332 , the output current  266  changes with time, so the average of the output current  266  within each switching cycle is used to determine the cycle-by-cycle average (e.g., I_PWM_av) of the output current  266  as a function of time. When the time duration T R  becomes smaller, the reference voltage  322  (e.g., V ref ) also becomes smaller and the one or more LEDs  250  are expected to become dimmer. When the time duration T R  becomes too small, the reference voltage  322  (e.g., V ref ) also becomes too small and the cycle-by-cycle average (e.g., I_PWM_av) of the output current  266  during the time duration T R  becomes smaller than the holding current (e.g., I_holding) required by the TRIAC dimmer  210 . In order to avoid misfire of the TRIAC dimmer  210  and also avoid flickering of the one or more LEDs  250 , the bleeder current  268  (e.g., I_bleed) is provided in order to increase the cycle-by-cycle average of the input current  264  during the time duration T R . As shown by the waveform  464 , the cycle-by-cycle average of the input current  264  during the time duration T R  becomes larger than the holding current required by the TRIAC dimmer  210 . 
     As shown in  FIG. 3 , the driver  340  outputs the drive signal  342  to the transistor  350 . The transistor  350  is turned on if the drive signal  342  is at a logic high level, and the transistor  350  is turned off if the drive signal  342  is at a logic low level. When the transistor  262  and the transistor  350  are turned on, the current  261  flows through the winding  260 , the transistor  262 , the controller terminal  254 , the transistor  350 , the controller terminal  258 , and the resistor  274 . If the transistor  350  becomes turned off when the transistor  262  is still turned on, the transistor  262  then also becomes turned off and the winding  260  starts to discharge. If the transistor  350  becomes turned on when the transistor  262  is still turned off, the transistor  262  then also becomes turned on and the winding  260  starts to charge. 
     As shown in  FIGS. 2-4 , the lighting system  200  uses a closed loop to perform dimming control. For example, the lighting system  200  detects the range of phase angle of the voltage  271 , and based on the detected range of phase angle, adjusts the reference voltage V ref  that is received by the internal error amplifier of the PWM controller  240 . In another example, the lighting system  200  provides energy to the one or more LEDs  250  throughout the entire time period of each switching cycle during the time duration T R , which corresponds to the unclipped part of the waveform of the AC input voltage  214  (e.g., VAC). 
     As discussed above, a bleeder (e.g., the bleeder  224 ) can help a lighting system (e.g., the lighting system  200 ) to meet the holding-current requirement of a TRIAC dimmer (e.g., the TRIAC dimmer  210 ) in order to avoid misfire of the TRIAC dimmer (e.g., the TRIAC dimmer  210 ) and avoid flickering of one or more LEDs (e.g., the one or more LEDs  250 ). But the bleeder (e.g., the bleeder  224 ) usually increases heat generation and reduces energy efficiency of the lighting system (e.g., the lighting system  200 ). Such reduction in energy efficiency usually becomes more severe if a bleeder current (e.g., the bleeder current  268 ) becomes larger. This reduced energy efficiency often prevents the lighting system (e.g., the lighting system  200 ) from taking full advantage of high energy efficiency and long lifetime of the one or more LEDs (e.g., the one or more LEDs  250 ). 
     Hence it is highly desirable to improve the techniques of dimming control. 
     3. BRIEF SUMMARY OF THE INVENTION 
     Certain embodiments of the present invention are directed to integrated circuits. More particularly, some embodiments of the invention provide a system and method for stage-based control related to TRIAC dimmer. Merely by way of example, some embodiments of the invention have been applied to driving one or more light emitting diodes (LEDs). But it would be recognized that the invention has a much broader range of applicability. 
     According to one embodiment, a system controller for a lighting system includes a first controller terminal configured to receive a first signal, and a second controller terminal coupled to a first transistor terminal of a transistor. The transistor further includes a second transistor terminal and a third transistor terminal. The second transistor terminal is coupled to a first winding terminal of a winding, and the winding further includes a second winding terminal coupled to a capacitor. Additionally, the system controller includes a third controller terminal coupled to the third transistor terminal of the transistor, and a fourth controller terminal coupled to a resistor and configured to receive a second signal. The second signal represents a magnitude of a current flowing through at least the winding, the third controller terminal, the fourth controller terminal, and the resistor. The system controller is configured to: in response to the first signal becoming larger than a first threshold in magnitude at a first time, cause the second signal to ramp up and down during a first duration of time; and in response to the first signal becoming smaller than a second threshold in magnitude at a third time, cause the second signal to ramp up and down during a second duration of time. The first duration of time starts at the first time and ends at a second time. The second duration of time starts at the third time and ends at a fourth time. The system controller is further configured to cause the second signal to remain equal to a constant magnitude from the second time to the third time. The first time is earlier than the second time, the second time is earlier than the third time, and the third time is earlier than the fourth time. 
     According to another embodiment, a system controller for a lighting system includes a first controller terminal configured to receive a first signal, and a second controller terminal coupled to a first transistor terminal of a transistor. The transistor further includes a second transistor terminal and a third transistor terminal, and the second transistor terminal is coupled to a winding. Additionally, the system controller further includes a third controller terminal coupled to the third transistor terminal of the transistor, and a fourth controller terminal coupled to a resistor and configured to receive a second signal. The second signal represents a magnitude of a current flowing through at least the winding, the third controller terminal, the fourth controller terminal, and the resistor. The system controller is configured to: in response to the first signal becoming larger than a first threshold in magnitude at a first time, cause the second signal to ramp up and down during a duration of time. The duration of time starts at a second time and ends at a third time. The third time is a time when the first signal becomes smaller than a second threshold in magnitude. The system controller is further configured to cause the second signal to remain equal to a constant magnitude from the first time to the second time. The first time is earlier than the second time, and the second time is earlier than the third time. 
     According to yet another embodiment, a system controller for a lighting system includes a first controller terminal configured to receive a first signal. The first signal is related to a dimming-control phase angle. Additionally, the system controller includes a second controller terminal coupled to a first transistor terminal of a transistor. The transistor further includes a second transistor terminal and a third transistor terminal, and the second transistor terminal is coupled to a winding. Moreover, the system controller includes a third controller terminal coupled to the third transistor terminal of the transistor, and a fourth controller terminal coupled to a resistor and configured to receive a second signal. The second signal represents a magnitude of a current flowing through at least the winding, the third controller terminal, the fourth controller terminal, and the resistor. The system controller is configured to, in response to the first signal satisfying one or more predetermined conditions: cause the second signal to ramp up and down during a first duration of time; and cause the second signal to ramp up and down during a second duration of time. The first duration of time starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The system controller is further configured to: in response to the dimming-control phase angle increasing from a first angle magnitude to a second angle magnitude, keep the first duration of time at a first predetermined constant; in response to the dimming-control phase angle increasing from the second angle magnitude to a third angle magnitude, increase the first duration of time; and in response to the dimming-control phase angle increasing from the third angle magnitude to a fourth angle magnitude, keep the first duration of time at a second predetermined constant. 
     According to yet another embodiment, a system controller for a lighting system includes a first controller terminal configured to receive a first signal. The first signal is related to a dimming-control phase angle. Additionally, the system controller includes a second controller terminal coupled to a first transistor terminal of a transistor. The transistor further includes a second transistor terminal and a third transistor terminal, and the second transistor terminal is coupled to a winding. Moreover, the system controller includes a third controller terminal coupled to the third transistor terminal of the transistor, and a fourth controller terminal coupled to a resistor and configured to receive a second signal. The second signal represents a magnitude of a current flowing through at least the winding, the third controller terminal, the fourth controller terminal, and the resistor. The system controller is configured to, in response to the first signal satisfying one or more predetermined conditions: cause the second signal to ramp up and down during a first duration of time; and cause the second signal to ramp up and down during a second duration of time. The first duration of time starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The system controller is further configured to: in response to the dimming-control phase angle increasing from a first angle magnitude to a second angle magnitude, keep the second duration of time at a first predetermined constant; in response to the dimming-control phase angle increasing from the second angle magnitude to a third angle magnitude, increase the second duration of time; and in response to the dimming-control phase angle increasing from the third angle magnitude to a fourth angle magnitude, keep the second duration of time at a second predetermined constant. 
     According to yet another embodiment, a system controller for a lighting system includes a first controller terminal configured to receive a first signal. The first signal is related to a dimming-control phase angle. Additionally, the system controller includes a second controller terminal coupled to a first transistor terminal of a transistor. The transistor further includes a second transistor terminal and a third transistor terminal, and the second transistor terminal is coupled to a winding. Moreover, the system controller includes a third controller terminal coupled to the third transistor terminal of the transistor, and a fourth controller terminal coupled to a resistor and configured to receive a second signal. The second signal represents a magnitude of a current flowing through at least the winding, the third controller terminal, the fourth controller terminal, and the resistor. The system controller is configured to, in response to the first signal satisfying one or more predetermined conditions: cause the second signal to ramp up and down during a first duration of time; and cause the second signal to ramp up and down during a second duration of time. The first duration of time starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The sum of the first duration of time and the second duration of time is equal to a total duration of time. The system controller is further configured to: in response to the dimming-control phase angle increasing from a first angle magnitude to a second angle magnitude, keep the total duration of time at a first predetermined constant; in response to the dimming-control phase angle increasing from the second angle magnitude to a third angle magnitude, increase the total duration of time; and in response to the dimming-control phase angle increasing from the third angle magnitude to a fourth angle magnitude, keep the total duration of time at a second predetermined constant. 
     According to yet another embodiment, a system controller for a lighting system includes a first controller terminal configured to receive a first signal, and a second controller terminal coupled to a first transistor terminal of a transistor. The transistor further includes a second transistor terminal and a third transistor terminal, and the second transistor terminal is coupled to a first winding terminal of a winding. The winding further includes a second winding terminal coupled to a capacitor. Additionally, the system controller includes a third controller terminal coupled to the third transistor terminal of the transistor, and a fourth controller terminal coupled to a resistor and configured to receive a second signal. The second signal represents a magnitude of a current flowing through at least the winding, the third controller terminal, the fourth controller terminal, and the resistor. The system controller is configured to determine whether or not a TRIAC dimmer is detected to be included in the lighting system and if the TRIAC dimmer is detected to be included in the lighting system, whether the TRIAC dimmer is a leading-edge TRIAC dimmer or a trailing-edge TRIAC dimmer. The system controller is further configured to, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the leading-edge TRIAC dimmer: in response to the first signal becoming larger than a first threshold in magnitude at a first time, cause the second signal to ramp up and down during a first duration of time; and in response to the first signal becoming smaller than a second threshold in magnitude at a third time, cause the second signal to ramp up and down during a second duration of time. The first duration of time starts at the first time and ends at a second time, and the second duration of time starts at the third time and ends at a fourth time. The system controller is further configured to, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the trailing-edge TRIAC dimmer: in response to the first signal becoming larger than the first threshold in magnitude at a fifth time, cause the second signal to ramp up and down during a duration of time. The duration of time starts at a sixth time and ends at a seventh time. The seventh time is a time when the first signal becomes smaller than the second threshold in magnitude. 
     According to yet another embodiment, a method for a lighting system includes receiving a first signal, and receiving a second signal. The second signal represents a magnitude of a current flowing through at least a winding. Additionally, the method includes: in response to the first signal becoming larger than a first threshold in magnitude at a first time, causing the second signal to ramp up and down during a first duration of time; and in response to the first signal becoming smaller than a second threshold in magnitude at a third time, causing the second signal to ramp up and down during a second duration of time. The first duration of time starts at the first time and ends at a second time, and the second duration of time starts at the third time and ends at a fourth time. Moreover, the method includes causing the second signal to remain equal to a constant magnitude from the second time to the third time. The first time is earlier than the second time, the second time is earlier than the third time, and the third time is earlier than the fourth time. 
     According to yet another embodiment, a method for a lighting system includes receiving a first signal and receiving a second signal. The second signal represents a magnitude of a current flowing through at least a winding. Additionally, the method includes: in response to the first signal becoming larger than a first threshold in magnitude at a first time, causing the second signal to ramp up and down during a duration of time. The duration of time starts at a second time and ends at a third time, and the third time is a time when the first signal becomes smaller than a second threshold in magnitude. Moreover, the method includes causing the second signal to remain equal to a constant magnitude from the first time to the second time. The first time is earlier than the second time, and the second time is earlier than the third time. 
     According to yet another embodiment, a method for a lighting system includes receiving a first signal. The first signal is related to a dimming-control phase angle. Additionally, the method includes receiving a second signal. The second signal represents a magnitude of a current flowing through at least a winding. Moreover, the method includes, in response to the first signal satisfying one or more predetermined conditions: causing the second signal to ramp up and down during a first duration of time; and causing the second signal to ramp up and down during a second duration of time. The first duration of time starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The causing the second signal to ramp up and down during a first duration of time includes: in response to the dimming-control phase angle increasing from a first angle magnitude to a second angle magnitude, keeping the first duration of time at a first predetermined constant; in response to the dimming-control phase angle increasing from the second angle magnitude to a third angle magnitude, increasing the first duration of time; and in response to the dimming-control phase angle increasing from the third angle magnitude to a fourth angle magnitude, keeping the first duration of time at a second predetermined constant. 
     According to yet another embodiment, a method for a lighting system includes receiving a first signal. The first signal is related to a dimming-control phase angle. Additionally, the method includes receiving a second signal. The second signal represents a magnitude of a current flowing through at least a winding. Moreover, the method includes, in response to the first signal satisfying one or more predetermined conditions: causing the second signal to ramp up and down during a first duration of time; and causing the second signal to ramp up and down during a second duration of time. The first duration of time starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The causing the second signal to ramp up and down during a second duration of time includes: in response to the dimming-control phase angle increasing from a first angle magnitude to a second angle magnitude, keeping the second duration of time at a first predetermined constant; in response to the dimming-control phase angle increasing from the second angle magnitude to a third angle magnitude, increasing the second duration of time; and in response to the dimming-control phase angle increasing from the third angle magnitude to a fourth angle magnitude, keeping the second duration of time at a second predetermined constant. 
     According to yet another embodiment, a method for a lighting system includes receiving a first signal. The first signal is related to a dimming-control phase angle. Additionally, the method includes receiving a second signal. The second signal represents a magnitude of a current flowing through at least a winding. Moreover, the method includes, in response to the first signal satisfying one or more predetermined conditions: causing the second signal to ramp up and down during a first duration of time; and causing the second signal to ramp up and down during a second duration of time. The first duration of time starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. A sum of the first duration of time and the second duration of time is equal to a total duration of time. The causing the second signal to ramp up and down during a first duration of time and the causing the second signal to ramp up and down during a second duration of time include: in response to the dimming-control phase angle increasing from a first angle magnitude to a second angle magnitude, keeping the total duration of time at a first predetermined constant; in response to the dimming-control phase angle increasing from the second angle magnitude to a third angle magnitude, increasing the total duration of time; and in response to the dimming-control phase angle increasing from the third angle magnitude to a fourth angle magnitude, keeping the total duration of time at a second predetermined constant. 
     According to yet another embodiment, a method for a lighting system includes receiving a first signal and receiving a second signal. The second signal represents a magnitude of a current flowing through at least a winding. Additionally, the method includes determining whether or not a TRIAC dimmer is detected to be included in the lighting system and if the TRIAC dimmer is detected to be included in the lighting system, whether the TRIAC dimmer is a leading-edge TRIAC dimmer or a trailing-edge TRIAC dimmer. Moreover, the method includes, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the leading-edge TRIAC dimmer: in response to the first signal becoming larger than a first threshold in magnitude at a first time, causing the second signal to ramp up and down during a first duration of time; and in response to the first signal becoming smaller than a second threshold in magnitude at a third time, causing the second signal to ramp up and down during a second duration of time. The first duration of time starts at the first time and ends at a second time, and the second duration of time starts at the third time and ends at a fourth time. Also, the method includes, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the trailing-edge TRIAC dimmer: in response to the first signal becoming larger than the first threshold in magnitude at a fifth time, causing the second signal to ramp up and down during a duration of time. The duration of time starts at a sixth time and ends at a seventh time. The seventh time is a time when the first signal becomes smaller than the second threshold in magnitude. 
     Depending upon embodiment, one or more benefits may be achieved. These benefits and various additional objects, features and advantages of the present invention can be fully appreciated with reference to the detailed description and accompanying drawings that follow. 
    
    
     
       4. BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  shows certain conventional timing diagrams for a leading-edge TRIAC dimmer and a trailing-edge TRIAC dimmer. 
         FIG. 2  is a simplified diagram of a conventional lighting system that includes a bleeder. 
         FIG. 3  is a simplified diagram showing certain conventional components of the lighting system as shown in  FIG. 2 . 
         FIG. 4  shows certain conventional timing diagrams for the lighting system  200  as shown in  FIGS. 2 and 3 . 
         FIG. 5  is a simplified diagram of a lighting system according to an embodiment of the present invention. 
         FIG. 6A  shows certain timing diagrams for the lighting system as shown in  FIG. 5  if the TRIAC dimmer is a leading-edge TRIAC dimmer according to one embodiment of the present invention. 
         FIG. 6B  shows certain timing diagrams for the lighting system as shown in  FIG. 5  if the TRIAC dimmer is a trailing-edge TRIAC dimmer according to another embodiment of the present invention. 
         FIG. 7  shows certain dimming-control phase angle diagrams for the lighting system as shown in  FIG. 5  according to certain embodiments of the present invention. 
         FIG. 8  is a simplified diagram showing certain components of the lighting system as shown in  FIG. 5  according to one embodiment of the present invention. 
         FIG. 9A  shows certain timing diagrams for the lighting system as shown in  FIG. 5  and  FIG. 6A  if the TRIAC dimmer is a leading-edge TRIAC dimmer according to one embodiment of the present invention. 
         FIG. 9B  shows certain timing diagrams for the lighting system as shown in  FIG. 5  and  FIG. 6B  if the TRIAC dimmer is a trailing-edge TRIAC dimmer according to another embodiment of the present invention. 
     
    
    
     5. DETAILED DESCRIPTION OF THE INVENTION 
     Certain embodiments of the present invention are directed to integrated circuits. More particularly, some embodiments of the invention provide a system and method for stage-based control related to TRIAC dimmer. Merely by way of example, some embodiments of the invention have been applied to driving one or more light emitting diodes (LEDs). But it would be recognized that the invention has a much broader range of applicability. 
       FIG. 5  is a simplified diagram of a lighting system according to an embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The lighting system  500  includes a TRIAC dimmer  510 , a rectifier  520 , a diode  526 , capacitors  530 ,  532 ,  534 ,  536  and  538 , a modulation controller  540 , a winding  560 , a transistor  562 , resistors  524 ,  570 ,  572 ,  574 ,  576 ,  578  and  579 , and one or more LEDs  550 . For example, the modulation controller  540  includes controller terminals  542 ,  544 ,  546 ,  548 ,  552 ,  554 ,  556  and  558 . In another example, the modulation controller  540  is a chip, and each of the controller terminals  542 ,  544 ,  546 ,  548 ,  552 ,  554 ,  556  and  558  is a pin. In yet another example, the modulation controller  540  is a pulse-width-modulation (PWM) controller. In yet another example, the winding  560  includes winding terminals  568  and  569 . 
     In one embodiment, the TRIAC dimmer  510  receives an AC input voltage  514  (e.g., VAC) and generates a voltage  512 . For example, the voltage  512  is received by the rectifier  520  (e.g., a full wave rectifying bridge), which generates a rectified output voltage  522 . In another example, the rectified output voltage  522  is larger than or equal to zero. 
     In another embodiment, the resistor  579  includes resistor terminals  535  and  539 , and the capacitor  536  includes capacitor terminals  581  and  583 . For example, the resistor terminal  535  receives the rectified output voltage  522 . In another example, the resistor terminal  539  is connected to the capacitor terminal  581 , the controller terminal  552 , and a gate terminal of the transistor  562 . In yet another example, the gate terminal of the transistor  562  receives a gate voltage  537  from the resistor terminal  539 , the capacitor terminal  581 , and the controller terminal  552 . In yet another example, the capacitor terminal  583  receives a ground voltage. 
     In yet another embodiment, the rectified output voltage  522  is used to charge the capacitor  536  through the resistor  579  to raise the gate voltage  537 . For example, if the result of the gate voltage  537  minus a source voltage at a source terminal of the transistor  562  reaches or exceeds a transistor threshold voltage, the transistor  562  is turned on. 
     According to one embodiment, when the transistor  562  is turned on, through the transistor  562  and the controller terminal  554 , a current flows into the modulation controller  540  and uses an internal path to charge the capacitor  532 . For example, in response, the capacitor  532  generates a capacitor voltage  533 , which is received by the controller terminal  544 . In another example, if the capacitor voltage  533  reaches or exceeds an undervoltage-lockout threshold of the modulation controller  540 , the modulation controller  540  starts up. 
     According to another embodiment, after the modulation controller  540  has started up, a pulse-width-modulation (PWM) signal  555  is generated. For example, the PWM signal  555  has a signal frequency and a duty cycle. In another example, the PWM signal  555  is received by the source terminal of the transistor  562  through the controller terminal  554 . In yet another example, in response, the transistor  562  is turned on and off, in order to make an output current  566  constant and provide the output current  566  to the one or more LEDs  550 , by working with at least the capacitor  538 . 
     In one embodiment, as shown in  FIG. 5 , a drain voltage at a drain terminal of the transistor  562  is received by a voltage divider that includes the resistors  576  and  578 . For example, the drain terminal of the transistor  562  is connected to the winding terminal  569  of the winding  560 , and the winding terminal  568  of the winding  560  is connected to the capacitor  530  and the resistor  579 . In another example, in response to receiving the drain voltage, the voltage divider generates a voltage  577 , which is received by the controller terminal  556 . In yet another example, the modulation controller  540  uses the voltage  577  to detect the end of a demagnetization process of the winding  560 . In yet another example, the detection of the end of the demagnetization process is used to control an internal error amplifier of the modulation controller  540 , and through the controller terminal  546 , to control charging and discharging of the capacitor  534 . 
     In another embodiment, after the modulation controller  540  has started up, the resistor  574  is used to detect a current  561 , which flows through the winding  560 . For example, the winding  560  is connected to a drain terminal of the transistor  562 . In another example, the current  561  flows from the winding  560  through the resistor  574 , which in response generates a sensing voltage  575 . In yet another example, the sensing voltage  575  is received by the controller terminal  558 , and is processed by the modulation controller  540  on a cycle-by-cycle basis. In yet another example, the peak magnitude of the sensing voltage  575  is sampled, and the sampled signal is sent to an input terminal of the internal error amplifier of the modulation controller  540 . In yet another example, the other input terminal of the internal error amplifier receives a reference voltage V ref . 
     As shown in  FIG. 5 , the voltage  512  is received by the resistor  570  according to one embodiment. For example, the resistors  570 ,  572 , and  524  together generates a voltage  571 . In another example, the voltage  571  is received by the controller terminal  542 . In yet another example, the modulation controller  540  processes the voltage  571  and determines phase angle of the voltage  571 . According to yet another embodiment, the lighting system  500  does not include a bleeder. For example, the lighting system  500  ensures, without using any bleeder, that when the TRIAC dimmer  510  is fired on, an input current  564  that flows through the TRIAC dimmer  510  is larger than a holding current required by the TRIAC dimmer  510 , in order to avoid misfire of the TRIAC dimmer  510  and also avoid flickering of the one or more LEDs  550 . In another example, the lighting system  500  does not use a bleeder, so heat generation is not increased and energy efficiency of the lighting system  500  is not reduced. 
     In one embodiment, the lighting system  500  operates according to  FIG. 6A  and/or  FIG. 6B . For example, the lighting system  500  operates according to  FIG. 6A . In another example, the lighting system  500  operates according to  FIG. 6B . In yet another example, the lighting system  500  operates according to  FIGS. 6A and 6B . In another embodiment, the lighting system  500  operates according to  FIG. 7 . In yet another embodiment, the lighting system  500  operates according to  FIGS. 6A, 6B, and 7 . 
     As discussed above and further emphasized here,  FIG. 5  is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the lighting system  500  does not include the TRIAC dimmer  510 . In another example, the TRIAC dimmer  510  is removed from the lighting system  500 , and the AC input voltage  514  (e.g., VAC) is directly received by the rectifier  520 . 
       FIG. 6A  shows certain timing diagrams for the lighting system  500  as shown in  FIG. 5  if the TRIAC dimmer  510  is a leading-edge TRIAC dimmer according to one embodiment of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The waveform  671  represents the voltage  571  as a function of time, and the waveform  675  represents the sensing voltage  575  as a function of time. 
     In one embodiment, each cycle of the voltage  571  has a phase angel (e.g., ϕ) that changes from ϕ i  to ϕ f . For example, ϕ i  is equal to 0°, and ϕ f  is equal to 180°. In another example, ϕ i  is equal to 180°, and ϕ f  is equal to 360°. In yet another example, the voltage  571  is larger than or equal to zero. 
     In another embodiment, the phase angel ϕ i  corresponds to time to, the phase angel ϕ c  corresponds to time t 2 , and the phase angel of corresponds to time t 5 . For example, a time duration T M  that starts from time t 0  and ends at time t 5  represents one period of the voltage  571 . In another example, a time duration that starts from time t 0  and ends at time t 2  corresponds to ϕ dim_off . In yet another example, a time duration that starts from time t 2  and ends at time t 5  corresponds to ϕ dim_on . 
     In yet another embodiment, the TRIAC dimmer  510  is a leading-edge TRIAC dimmer, which clips part of the waveform that corresponds to the phase angel from ϕ i  to ϕ c . For example, ϕ c  is larger than or equal to ϕ i  and is smaller than or equal to ϕ f . In another example, ϕ c  minus ϕ i  is equal to ϕ dim_off , which corresponds to a time duration when the TRIAC dimmer  510  is not fired on. 
     In yet another embodiment, the unclipped part of the waveform corresponds to the phase angel from ϕ c  to ϕ f . For example, ϕ f  minus ϕ c  is equal to ϕ dim_on , which corresponds to a time duration when the TRIAC dimmer  510  is fired on. In another example, ϕ dim_on  represents a dimming-control phase angle. In yet another example, the sum of ϕ dim_off  and ϕ dim_on  is equal to 180°. 
     In yet another example, ϕ dim_off  is larger than or equal to 0° and smaller than or equal to 180°, and ϕ dim_on  is larger than or equal to 0° and smaller than or equal to 180°. In yet another example, if ϕ dim_off  is equal to 180° and ϕ dim_on  is equal to 0°, the TRIAC dimmer  510  clips the entire waveform that corresponds to the phase angel starting at 0° and ending at 180° or starting at 1800 and ending at 360°. In yet another example, if ϕ dim_off  is equal to 0° and ϕ dim_on  is equal to 180°, the TRIAC dimmer  510  does not clip any part of the waveform that corresponds to the phase angel starting at 0° and ending at 180° or starting at 180° and ending at 360°. 
     According to one embodiment, if the dimming-control phase angle ϕ dim_on  becomes larger, the one or more LEDs  550  becomes brighter, and if the dimming-control phase angle ϕ dim_on  becomes smaller, the one or more LEDs  550  becomes dimmer. According to another embodiment, as shown by the waveform  675 , for a particular dimming-control phase angle ϕ dim_on , the sensing voltage  575  ramps up and down during a stage-1 time duration T s1  and during a stage-2 time duration T s2 . For example, during the stage-1 time duration T s1 , within a switching period (e.g., T sw1 ), the sensing voltage  575  ramps up, ramps down, and then remains constant (e.g., remains equal to zero) until the end of the switching period (e.g., until the end of T sw1 ). In another example, during the stage-2 time duration T s2 , within a switching period (e.g., T sw2 ), the sensing voltage  575  ramps up, ramps down, and then remains constant (e.g., remains equal to zero) until the end of the switching period (e.g., until the end of T sw2 ). In yet another example, the switching period T sw1  and the switching period T sw2  are equal in time duration. 
     According to yet another embodiment, corresponding to one period of the voltage  571  (e.g., from time t 0  to time t 5 ), the stage-1 time duration T s1  starts at time t 2  and ends at time t 3 , and the stage-2 time duration T s2  starts at time t 4  and ends at time t 6 . For example, corresponding to a previous period of the voltage  571  (e.g., a previous period ending at time to), the stage-2 time duration T s2  ends at time t 1 . In another example, the time duration from time t 1  to time t 2  is longer than the switching period T sw1  and is also longer than the switching period T sw2 , and during the entire time duration from time t 1  to time t 2 , the sensing voltage  575  remains constant (e.g., remains equal to zero). In yet another example, the time duration from time t 3  to time t 4  is longer than the switching period T sw1  and is also longer than the switching period T sw2 , and during the entire time duration from time t 3  to time t 4 , the sensing voltage  575  remains constant (e.g., remains equal to zero). 
     According to yet another embodiment, time t 2  represents the time when the voltage  571  becomes larger than a threshold voltage V th1_a , and time t 4  represents the time when the voltage  571  becomes smaller than a threshold voltage V th1_b . For example, the threshold voltage V th1_a  and the threshold voltage V th1_b  are equal. In another example, the threshold voltage V th1_a  and the threshold voltage V th1_b  are not equal. According to yet another embodiment, time t 0  represents the beginning time of one period of the voltage  571  that ends at time t 5 , and time t 0  also represents the ending time of a previous period of the voltage  571 . For example, during the previous period of the voltage  571 , time t −1  represents the time when the voltage  571  becomes smaller than the threshold voltage V th1_b . 
     As discussed above and further emphasized here,  FIG. 6A  is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, time t 5  is approximately equal to time t 4 , and the phase angel ϕ f  approximately corresponds to time t 4 . In another example, the time duration T M  starts at time t 0  and ends approximately at time t 4 , and the time duration T M  represents one period of the voltage  571 . In yet another example, a time duration that starts at time t 2  and ends at time t 4  approximately corresponds to ϕ dim_on . 
       FIG. 6B  shows certain timing diagrams for the lighting system  500  as shown in  FIG. 5  if the TRIAC dimmer  510  is a trailing-edge TRIAC dimmer according to another embodiment of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The waveform  681  represents the voltage  571  as a function of time, and the waveform  685  represents the sensing voltage  575  as a function of time. 
     In one embodiment, each cycle of the voltage  571  has a phase angel (e.g., ϕ) that changes from ϕ i  to ϕ f . For example, ϕ i  is equal to 0°, and ϕf is equal to 180°. In another example, ϕ i  is equal to 180°, and ϕ f  is equal to 360°. In yet another example, the voltage  571  is larger than or equal to zero. 
     In another embodiment, the phase angel ϕ i  corresponds to time t 10 , the phase angel ϕ c  corresponds to time t 13 , and the phase angel ϕ f  corresponds to time t 15 . For example, a time duration T M  that starts from time t 10  and ends at time t 15  represents one period of the voltage  571 . In another example, a time duration that starts from time t 10  and ends at time t 13  corresponds to ϕ dim_on . In yet another example, a time duration that starts from time t 13  and ends at time t 15  corresponds to ϕ dim_off . 
     In yet another embodiment, the TRIAC dimmer  510  is a trailing-edge TRIAC dimmer, which clips part of the waveform that corresponds to the phase angel from ϕ c  to ϕ f . For example, ϕ c  is larger than or equal to ϕ i  and is smaller than or equal to ϕ f . In another example, ϕ f  minus ϕ c  is equal to ϕ dim_off , which corresponds to a time duration when the TRIAC dimmer  510  is not fired on. 
     In yet another embodiment, the unclipped part of the waveform corresponds to the phase angel from ϕ i  to ϕ c . For example, ϕ c  minus ϕ i  is equal to ϕ dim_on , which corresponds to a time duration when the TRIAC dimmer  510  is fired on. In another example, ϕ dim_on  represents a dimming-control phase angle. In yet another example, the sum of ϕ dim_off  and ϕ dim_on  is equal to 180°. 
     In yet another example, ϕ dim_off  is larger than or equal to 0° and smaller than or equal to 180°, and ϕ dim_on  is larger than or equal to 0° and smaller than or equal to 180°. In yet another example, if ϕ dim_off  is equal to 180° and ϕ dim_on  is equal to 0°, the TRIAC dimmer  510  clips the entire waveform that corresponds to the phase angel starting at 0° and ending at 180° or starting at 180° and ending at 360°. In yet another example, if ϕ dim_off  is equal to 0° and ϕ dim  is equal to 180°, the TRIAC dimmer  510  does not clip any part of the waveform that corresponds to the phase angel starting at 0° and ending at 180° or starting at 180° and ending at 360°. 
     According to one embodiment, if the dimming-control phase angle ϕ dim_on  becomes larger, the one or more LEDs  550  becomes brighter, and if the dimming-control phase angle ϕ dim_on  becomes smaller, the one or more LEDs  550  becomes dimmer. According to another embodiment, as shown by the waveform  685 , for a particular dimming-control phase angle ϕ dim_on , the sensing voltage  575  ramps up and down during a stage-1 time duration T s1  and during a stage-2 time duration T s2 . For example, the stage-1 time duration T s1  starts at time t 12  and ends at time t 13 . In another example, the stage-2 time duration T s2  starts at time t 13  and ends at time t 14 . In yet another example, the combination of the stage-1 time duration T s1  and the stage-2 time duration T s2  starts at time t 12  and ends at time t 14 . 
     According to yet another embodiment, during the time duration from time t 12  to time t 14 , the sensing voltage  575  ramps up and down. For example, during the combination of the stage-1 time duration T s1  and the stage-2 time duration T s2 , within a switching period (e.g., T sw11 ), the sensing voltage  575  ramps up, ramps down, and then remains constant (e.g., remains equal to zero) until the end of the switching period (e.g., T sw11 ). In another example, during the combination of the stage-1 time duration T s1  and the stage-2 time duration T s2 , within a switching period (e.g., T sw12 ), the sensing voltage  575  ramps up, ramps down, and then remains constant (e.g., remains equal to zero) until the end of the switching period (e.g., T sw12 ). 
     According to yet another embodiment, time t 11  represents the time when the voltage  571  becomes larger than a threshold voltage V th2_a , and time t 14  represents the time when the voltage  571  becomes smaller than a threshold voltage V th2_b . For example, the threshold voltage V th2_a  and the threshold voltage V th2_b  are equal. In another example, the threshold voltage V th2_a  and the threshold voltage V th2_b  are not equal. In yet another example, the time duration from time till to time t 12  is longer than the switching period T sw11  and is also longer than the switching period T sw12 , and during the entire time duration from time till to time t 12 , the sensing voltage  575  remains constant (e.g., remains equal to zero). In yet another example, the time duration from time t 14  to time t 15  is longer than the switching period T sw11  and is also longer than the switching period T sw12 , and during the entire time duration from time t 14  to time t 15 , the sensing voltage  575  remains constant (e.g., remains equal to zero). 
     As discussed above and further emphasized here,  FIG. 6B  is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, time t 10  is approximately equal to time t 11 , and the phase angel ϕ i  approximately corresponds to time t 11 . In another example, the time duration T M  that starts at time till and ends at time t 15  approximately represents one period of the voltage  571 . In yet another example, a time duration that starts at time till and ends at time t 13  approximately corresponds to ϕ dim_on . 
       FIG. 7  shows certain dimming-control phase angle diagrams for the lighting system  500  as shown in  FIG. 5  according to certain embodiments of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The waveform  766  represents the output current  566  as a function of dimming-control phase angle ϕ dim_on , the waveform  710  represents the stage-1 time duration T s1  as a function of dimming-control phase angle ϕ dim_on , the waveform  720  represents the stage-2 time duration T s2  as a function of dimming-control phase angle ϕ dim_on , and the waveform  730  represents the two-stage total time duration T st  as a function of dimming-control phase angle ϕ dim_on . 
     In one embodiment, as shown by the waveform  710 , the stage-1 time duration T s1  remains equal to T s1_min  if the dimming-control phase angle ϕ dim_on  increases from 0° to ϕ A  and from ϕ A  to ϕ B , the stage-1 time duration T s1  increases (e.g., increases linearly at a constant slope SL 1 ) from T s1_min  to T s1_max  if the dimming-control phase angle ϕ dim_on  increases from ϕ B  to ϕ c , and the stage-1 time duration T s1  remains equal to T s1_max  if the dimming-control phase angle ϕ dim_on  increases from ϕ C  to 180°. For example, T s1_min  is equal to zero. In another example, T s1_min  is larger than zero. In yet another example, T s1_max  is larger than T s1_min  and is also larger than zero. 
     In another embodiment, as shown by the waveform  720 , the stage-2 time duration T s2  remains equal to T s2_min  if the dimming-control phase angle ϕ dim_on  increases from 0° to ϕ A , the stage-2 time duration T s2  increases (e.g., increases linearly at a constant slope SL 2 ) from T s2_min  to T s2_max  if the dimming-control phase angle ϕ dim_on  increases from ϕ A  to ϕ B , and the stage-2 time duration T s2  remains equal to T s2_max  if the dimming-control phase angle ϕ dim_on  increases from ϕ B  to ϕ C  and from ϕ C  to 180°. For example, the slope SL 1  and the slope SL 2  are different. In another example, the slope SL 1  and the slope SL 2  are equal. In yet another example, ϕ B  is smaller than 90°. In yet another example, T s2_min  is equal to zero. In yet another example, T s2_min  is larger than zero. In yet another example, T s2_max  is larger than T s2_min  and is also larger than zero. 
     In yet another embodiment, as shown by the waveform  730 , the two-stage total time duration T st  is equal to the sum of the stage-1 time duration T s1  and the stage-2 time duration T s2 . For example, the two-stage total time duration T st  remains equal to T st_min  if the dimming-control phase angle ϕ dim_on  increases from 0° to ϕ A , the two-stage total time duration T st  increases (e.g., increases linearly at a slope STL 1 ) from T st_min  to T st_mid  if the dimming-control phase angle ϕ dim_on  increases from ϕ A  to ϕ B , the two-stage total time duration T st  increases (e.g., increases linearly at a slope STL 2 ) from T st_mid  to T st_max  if the dimming-control phase angle ϕ dim_on  increases from ϕ B  to ϕ C , and the two-stage total time duration T st  remains equal to T st_max  if the dimming-control phase angle ϕ dim_on  increases from ϕ C  to 180°. For example, the slope STL 1  is equal to the slope SL 2 , and the slope STL 2  is equal to the slope SL 1 . In another example, the slope STL 1  and the slope STL 2  are equal. In yet another example, the slope STL 1  and the slope STL 2  are not equal. In yet another example, T st_min  is equal to the sum of T s1_min  and T s2_min , T st_mid  is equal to the sum of T s1_min  and T s2_max , and T st_max  is equal to the sum of T s1_max  and T s2_max . In yet another example, T st_min  is equal to zero. In yet another example, T st_min  is larger than zero. In yet another example, T st_mid  is larger than T st_min  and is also larger than zero, but is smaller than T st_max . In yet another example, T st_max  is larger than T st_min  and T st_mid , and is also larger than zero. 
     In yet another embodiment, as shown by the waveform  766 , the output current  566  remains equal to zero if the dimming-control phase angle ϕ dim_on  increases from 0° to ϕ A , the output current  566  increases (e.g., increases linearly at a slope SL o_1 ) from zero to I o_mid  if the dimming-control phase angle ϕ dim_on  increases from ϕ A  to ϕ B , the output current  566  increases (e.g., increases linearly at a slope SL o_2 ) from I o_mid  to I o_max  if the dimming-control phase angle ϕ dim_on  increases from (B to (c, and the output current  566  remains equal to I o_max  if the dimming-control phase angle ϕ dim_on  increases from ϕ C  to 180°. For example, the slope SL o_1  and the slope SL o_2  are different. In another example, the slope SL o_1  and the slope SL o_2  are equal. In yet another example, I o_max  is equal to the magnitude of the output current  566  if the dimmer  510  is removed and the AC input voltage  514  (e.g., VAC) is directly received by the rectifier  520 . In yet another example, I o_mid  is smaller than 10% of I o_max . 
     According to one embodiment, if the dimming-control phase angle ϕ dim_on  increases from ϕ A  to ϕ B , the dimming control of the one or more LEDs  550  is performed by changing the stage-2 time duration T s2 , and if the dimming-control phase angle ϕ dim_on  increases from ϕ B  to ϕ C , the dimming control of the one or more LEDs  550  is performed by changing the stage-1 time duration T s1 . For example, the slope SL o_1  for the output current  566  depends on the slope SL 2  of the stage-2 time duration T s2 . In another example, the slope SL o_2  for the output current  566  depends on the slope SL 1  of the stage-1 time duration T s1 . 
     According to another embodiment, magnitudes of ϕ A , ϕ B , and ϕ C  are adjusted, and 0°≤ϕ A ≤ϕ B ≤ϕ c ≤180° is satisfied. For example, magnitudes of ϕ A , ϕ B , and ϕ C  are adjusted, and 0°&lt;ϕ A &lt;ϕ B &lt;ϕ C &lt;180° is satisfied. In another example, magnitudes of ϕ A , ϕ B , and ϕ C  are adjusted, and 0°≤ϕ A &lt;ϕ B &lt;ϕ C &lt;180° is satisfied. 
       FIG. 8  is a simplified diagram showing certain components of the lighting system  500  as shown in  FIG. 5  according to one embodiment of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The modulation controller  540  includes a dimming control component  800  and a transistor  880 . For example, the dimming control component  800  includes a signal detector  810 , a mode detector  850 , a stage-timing signal generator  860 , a reference voltage generator  820 , a modulation signal generator  830 , an AND gate  870 , and a driver  840 . For example, the modulation signal generator  830  is a pulse-width-modulation (PWM) signal generator. 
     As discussed above and further emphasized here,  FIG. 8  is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, the lighting system  500  does not include the TRIAC dimmer  510 . In another example, the TRIAC dimmer  510  is removed from the lighting system  500 , and the AC input voltage  514  (e.g., VAC) is directly received by the rectifier  520 . 
     In one embodiment, the mode detector  850  receives the voltage  571  through the terminal  542 , and determines, based at least in part on the voltage  571 , whether or not the TRIAC dimmer  510  is detected to be included in the lighting system  500  and if the TRIAC dimmer  510  is detected to be included in the lighting system  500 , whether the TRIAC dimmer  510  is a leading-edge TRIAC dimmer or a trailing-edge TRIAC dimmer. For example, the mode detector  850  generates a mode signal  852  that indicates whether or not the TRIAC dimmer  510  is detected to be included in the lighting system  500  and if the TRIAC dimmer  510  is detected to be included in the lighting system  500 , whether the TRIAC dimmer  510  is a leading-edge TRIAC dimmer or a trailing-edge TRIAC dimmer. In another example, the mode signal  852  is received by the reference voltage generator  820  and the stage-timing signal generator  860 . 
     In yet another example, the mode signal  852  includes three logic signals  852   a ,  852   b , and  852   c . In yet another example, if the logic signal  852   a  is at the logic high level and the logic signals  852   b  and  852   c  are at the logic low level, the mode signal  852  indicates that the TRIAC dimmer  510  is not included in the lighting system  500 . In yet another example, if the logic signal  852   b  is at the logic high level and the logic signals  852   a  and  852   c  are at the logic low level, the mode signal  852  indicates that the TRIAC dimmer  510  is detected to be included in the lighting system  500  and the TRIAC dimmer  510  is a leading-edge TRIAC dimmer. In yet another example, if the logic signal  852   c  is at the logic high level and the logic signals  852   a  and  852   b  are at the logic low level, the mode signal  852  indicates that the TRIAC dimmer  510  is detected to be included in the lighting system  500  and the TRIAC dimmer  510  is a trailing-edge TRIAC dimmer. 
     In another embodiment, the signal detector  810  receives the voltage  571  through the terminal  542 , detects the voltage  571 , and generates a signal  812 . For example, the signal  812  indicates approximately the magnitude of the dimming-control phase angle ϕ dim_on  of the voltage  571  (e.g., as shown in  FIG. 6A ,  FIG. 6B , and/or  FIG. 7 ). 
     In yet another embodiment, the signal detector  810  generates the signal  812  based at least in part on the voltage  571 . For example, if the voltage  571  becomes larger than a threshold voltage V th_aa , the signal  812  changes from a logic low level to a logic high level. In another example, if the voltage  571  becomes smaller than a threshold voltage V th_bb , the signal  812  changes from the logic high level to the logic low level. In yet another example, the threshold voltage V th_aa  and the threshold voltage V th_bb  are equal. In yet another example, the threshold voltage V th_aa  and the threshold voltage V th_bb  are not equal. 
     According to one embodiment, as shown in  FIG. 6A , the signal  812  changes from the logic high level to the logic low level at time t −1 , remains at the logic low level from time t −1  to time t 2 , changes from the logic low level to the logic high level at time t 2 , remains at the logic high level from time t 2  to time t 4 , changes from the logic high level to the logic low level at time t 4 , and remains at the logic low level from time t 4  to time t 5 . For example, the threshold voltage V th_aa  is the threshold voltage V th1_a . In another example, the threshold voltage V th_bb  is the threshold voltage V th1_b . 
     According to another embodiment, as shown in  FIG. 6B , the signal  812  remains at the logic low level from time t 10  to time t 11 , changes from the logic low level to the logic high level at time t 11 , remains at the logic high level from time till to time t 14 , changes from the logic high level to the logic low level at time t 14 , and remains at the logic low level from time t 14  to time t 15 . For example, the threshold voltage V th_aa  is the threshold voltage V th2_a . In another example, the threshold voltage V th_bb  is the threshold voltage V th2_b . 
     According to some embodiments, the reference voltage generator  820  receives the mode signal  852  and the signal  812 , and generates a reference voltage  822  (e.g., V ref ). In one embodiment, if the mode signal  852  indicates that the TRIAC dimmer  510  is not included in the lighting system  500 , the reference voltage generator  820  generates the reference voltage  822  (e.g., V ref ) that is a predetermined constant, regardless of the magnitude of the dimming-control phase angle ϕ dim_on . 
     In another embodiment, if the mode signal  852  indicates that the TRIAC dimmer  510  is detected to be included in the lighting system  500  and the TRIAC dimmer  510  is a leading-edge TRIAC dimmer, the reference voltage generator  820  generates the reference voltage  822  (e.g., V ref ). For example, the reference voltage  822  (e.g., V ref ) is a predetermined constant, regardless of the magnitude of the dimming-control phase angle ϕ dim_on . In another example, the reference voltage  822  (e.g., V ref ) changes with the magnitude of the dimming-control phase angle ϕ dim_on . In yet another example, the reference voltage  822  (e.g., V ref ) increases proportionally with the increasing magnitude of the dimming-control phase angle ϕ dim_on . 
     In yet another embodiment, if the mode signal  852  indicates that the TRIAC dimmer  510  is detected to be included in the lighting system  500  and the TRIAC dimmer  510  is a trailing-edge TRIAC dimmer, the reference voltage generator  820  generates the reference voltage  822  (e.g., V ref ). For example, the reference voltage  822  (e.g., V ref ) is a predetermined constant, regardless of the magnitude of the dimming-control phase angle ϕ dim_on . In another example, the reference voltage  822  (e.g., V ref ) changes with the magnitude of the dimming-control phase angle ϕ dim_on . In yet another example, the reference voltage  822  (e.g., V ref ) increases proportionally with the increasing magnitude of the dimming-control phase angle ϕ dim_on . 
     In yet another embodiment, the reference voltage  822  (e.g., V ref ) when the mode signal  852  indicates that the TRIAC dimmer  510  is not included in the lighting system  500  is smaller than the reference voltage  822  (e.g., V ref ) when the mode signal  852  indicates that the TRIAC dimmer  510  is detected to be included in the lighting system  500 . 
     According to certain embodiments, the reference voltage  822  (e.g., V ref ) is received by the modulation signal generator  830 , which also receives the sensing voltage  575  through the terminal  558 . For example, the sensing voltage  575  represents the magnitude of the current  561 , which flows through the winding  560  and the resistor  574 . 
     In one embodiment, the modulation signal generator  830  processes the reference voltage  822  (e.g., V ref ) and the sensing voltage  575  and generates a modulation signal  832 . For example, the modulation signal generator  830  is a pulse-width-modulation (PWM) signal generator, and the modulation signal  832  is a pulse-width-modulation (PWM) signal. In another example, within each switching cycle, the modulation signal generator  830  determines an integral of the reference voltage  822  (e.g., V ref ) over time, converts the integral to an intermediate voltage that is proportional to the integral, and determines whether the sensing voltage  575  reaches or exceeds the intermediate voltage. In yet another example, within each switching cycle, if the sensing voltage  575  reaches or exceeds the intermediate voltage, the modulation signal generator  830  changes the modulation signal  832  from a logic high level to a logic low level to cause the end of the pulse width for the switching cycle if the pulse width is not larger than the maximum pulse width predetermined by the modulation controller  540 . In yet another example, if the rectified output voltage  522  is large, within each switching cycle, the sensing voltage  575  reaches or exceeds the intermediate voltage fast enough so that the pulse width ends before the pulse width becomes larger than a maximum pulse width predetermined by the modulation controller  540 . In yet another example, if the rectified output voltage  522  is small (e.g., if the capacitor  530  has been completely discharged), within each switching cycle, the sensing voltage  575  cannot reach or exceed the intermediate voltage fast enough, and the pulse width of the modulation signal  832  for the switching cycle is set equal to the maximum pulse width predetermined by the modulation controller  540 . In yet another example, the modulation signal  832  is received by the AND gate  870 . 
     In another embodiment, the modulation signal generator  830  processes the sensing voltage  575 , detects whether the capacitor  530  has been completely discharged based at least in part on the sensing voltage  575 , and when the capacitor  530  has been detected to be completely discharged, generate a timing signal  834  that indicates the capacitor  530  has been completely discharged. For example, the timing signal  834  indicates the capacitor  530  becomes completely discharged at time t 6  as shown in  FIG. 6A . In another example, the timing signal  834  is received by the stage-timing signal generator  860 . 
     In yet another embodiment, the modulation signal generator  830  processes the sensing voltage  575 , detects whether a pulse width of the modulation signal  832  for a switching cycle is set equal to the maximum pulse width predetermined by the modulation controller  540 , and if the pulse width of the modulation signal  832  is set equal to the maximum pulse width, generate the timing signal  834  that indicates the capacitor  530  has been completely discharged. For example, the timing signal  834  indicates the capacitor  530  becomes completely discharged at time t 6  as shown in  FIG. 6A . In another example, the timing signal  834  is received by the stage-timing signal generator  860 . 
     According to some embodiments, the stage-timing signal generator  860  receives the mode signal  852 , the signal  812  and the timing signal  834  and generates a stage-timing signal  862  based at least in part on the mode signal  852 , the signal  812  and/or the timing signal  834 . For example, the stage-timing signal  862  is received by the AND gate  870 . 
     In one embodiment, as shown in  FIG. 6A , if the mode signal  852  indicates the TRIAC dimmer  510  is detected to be included in the lighting system  500  and the TRIAC dimmer  510  is a leading-edge TRIAC dimmer, the stage-timing signal  862  indicates the beginning and the end of the stage-1 time duration T s1  and the beginning and the end of the stage-2 time duration T s2 . For example, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic low level to the logic high level at time t 2 , indicating the beginning of the stage-1 time duration T s1 . In another example, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic high level to the logic low level at time t 3 , indicating the end of the stage-1 time duration T s1 , if the stage-1 time duration T s1  is not larger than T s1_max  in magnitude as shown by the waveform  710  of  FIG. 7 . In yet another example, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic low level to the logic high level at time t 4 , indicating the beginning of the stage-2 time duration T s2 . In another example, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic high level to the logic low level at time t 6 , indicating the end of the stage-2 time duration T s2 , if the stage-2 time duration T s2  is not larger than T s2_max  in magnitude as shown by the waveform  720  of  FIG. 7 . 
     In another embodiment, as shown in  FIG. 6B , if the mode signal  852  indicates the TRIAC dimmer  510  is detected to be included in the lighting system  500  and the TRIAC dimmer  510  is a trailing-edge TRIAC dimmer, the stage-timing signal  862  indicates the beginning of the stage-1 time duration T s1  and the end of the stage-2 time duration T s2 . For example, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic low level to the logic high level at time t 12 , indicating the beginning of the stage-1 time duration T s1 . In another example, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic high level to the logic low level at time t 14 , indicating the end of the stage-2 time duration T s2 . In yet another example, the stage-1 time duration T s1  is not larger than T s1_max  in magnitude as shown by the waveform  710  of  FIG. 7 , and the stage-2 time duration T s2  is not larger than T s2_max  in magnitude as shown by the waveform  720  of  FIG. 7 . 
     In yet another embodiment, if the mode signal  852  indicates the TRIAC dimmer  510  is not included in the lighting system  500 , the stage-timing signal  862  is the same as the signal  812 . For example, if the voltage  571  becomes larger than the threshold voltage V th_aa , the stage-timing signal  862  changes from the logic low level to the logic high level. In another example, if the voltage  571  becomes smaller than the threshold voltage V th_bb , the stage-timing signal  862  changes from the logic high level to the logic low level. In yet another example, the stage-timing signal  862  remains at the logic high level from a time when the voltage  571  becomes larger than the threshold voltage V th_aa  to a time when the voltage  571  becomes smaller than the threshold voltage V th_bb  for the first time since the voltage  571  becomes larger than the threshold voltage V th_aa . In yet another example, the stage-timing signal  862  remains at the logic low level from a time when the voltage  571  becomes smaller than the threshold voltage V th_bb  to a time when the voltage  571  becomes larger than the threshold voltage V th_aa  for the first time since the voltage  571  becomes smaller than the threshold voltage V th_bb . 
     According to certain embodiments, the AND gate  870  receives the modulation signal  832  and the stage-timing signal  862  and generates a control signal  872  based at least in part on the modulation signal  832  and the stage-timing signal  862 . In one embodiment, if the mode signal  852  indicates the TRIAC dimmer  510  is included in the lighting system  500 , the stage-timing signal  862  remains at the logic high level during the stage-1 time duration T s1  and during the stage-2 time duration T s2 , and the stage-timing signal  862  remains at the logic low level outside the stage-1 time duration T s1  and the stage-2 time duration T s2 . For example, if the mode signal  852  indicates the TRIAC dimmer  510  is included in the lighting system  500 , during the stage-1 time duration T s1  and during the stage-2 time duration T s2 , the control signal  872  is the same as the modulation signal  832 . In another example, if the mode signal  852  indicates the TRIAC dimmer  510  is included in the lighting system  500 , outside the stage-1 time duration T s1  and the stage-2 time duration T s2 , the control signal  872  remains at the logic low level. 
     According to some embodiments, if the mode signal  852  indicates the TRIAC dimmer  510  is not included in the lighting system  500 , the stage-timing signal  862  remains at the logic high level throughout entire each half cycle of the voltage  571 . In one embodiment, the voltage  571  has a phase angel (e.g.,  0 ), which changes from 0° to 180° for a half cycle of the voltage  571  and then changes from 180° to 360° for another half cycle of the voltage  571 . In another embodiment, if the mode signal  852  indicates the TRIAC dimmer  510  is not included in the lighting system  500 , the control signal  872  is the same as the modulation signal  832 . In yet another embodiment, if the mode signal  852  indicates the TRIAC dimmer  510  is not included in the lighting system  500 , the modulation signal generator  830  operates under quasi-resonant (QR) constant-current (CC) mode. For example, under the quasi-resonant (QR) constant-current (CC) mode, each half cycle of the voltage  571  includes multiple switching cycles of the modulation signal  832 . In another example, each switching cycle of the modulation signal  832  includes an on-time period and an off-time period. In yet another example, during each half cycle of the voltage  571 , the on-time period of the modulation signal  832  remains constant in magnitude but the off-time period of the modulation signal  832  changes in magnitude, in order to achieve satisfactory power factor (PF). 
     According to one embodiment, the driver  840  receives the control signal  872  and generates a drive signal  842 . For example, if the control signal  872  is at the logic high level, the drive signal  842  is also at the logic high level. In another example, if the control signal  872  is at the logic low level, the drive signal  842  is also at the logic low level. In yet another example, the driver  840  outputs the drive signal  842  to the transistor  880 . 
     According to another embodiment, the transistor  880  is turned on if the drive signal  842  is at the logic high level, and the transistor  880  is turned off if the drive signal  842  is at the logic low level. For example, when the transistor  562  and the transistor  880  are turned on, the current  561  flows through the winding  560 , the transistor  562 , the controller terminal  554 , the transistor  880 , the controller terminal  558 , and the resistor  574 . In another example, if the transistor  880  becomes turned off when the transistor  562  is still turned on, the transistor  562  also becomes turned off and the winding  560  starts to discharge. In yet another example, if the transistor  880  becomes turned on when the transistor  562  is still turned off, the transistor  562  also becomes turned on and the winding  560  starts to charge. 
     As shown in  FIGS. 5 and 8 , the lighting system  500  includes a quasi-resonant system with a buck-boost topology according to certain embodiments. For example, the output current  566  of the quasi-resonant system is received by the one or more LEDs  550  and is determined as follows: 
                     I   o     =       1   2     ×       V     r   ⁢   e   ⁢   f         R     c   ⁢   s         ×         T     s   ⁢   1       +     T     s   ⁢   2           T   M                 (     Equation   ⁢           ⁢   2     )               
where I o  represents the output current  566  of the quasi-resonant system of the lighting system  500 . Additionally, V ref  represents the reference voltage  822  (e.g., the reference voltage received by an internal error amplifier of the modulation controller  540 ), and R cs  represents the resistance of the resistor  574 . Moreover, T s1  represents a stage-1 time duration, and T s2  represents a stage-2 time duration. Also, T M  represents one period of the voltage  571 . For example, one period of the voltage  571  is equal to half period of the AC input voltage  514  (e.g., VAC).
 
       FIG. 9A  shows certain timing diagrams for the lighting system  500  as shown in  FIG. 5  and  FIG. 6A  if the TRIAC dimmer  510  is a leading-edge TRIAC dimmer according to one embodiment of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The waveform  671  represents the voltage  571  as a function of time as shown in  FIG. 6A , the waveform  675  represents the sensing voltage  575  as a function of time as shown in  FIG. 6A , and the waveform  962  represents the stage-timing signal  862  as a function of time. 
     In one embodiment, the TRIAC dimmer  510  is a leading-edge TRIAC dimmer, which clips part of the waveform that corresponds to the phase angel from ϕ i  to ϕ c . For example, ϕ c  minus ϕ i  is equal to ϕ dim_off , which corresponds to a time duration (e.g., T dim_off ) when the TRIAC dimmer  510  is not fired on. In another embodiment, the unclipped part of the waveform corresponds to the phase angel from ϕ c  to ϕ f . For example, ϕ f  minus ϕ c  is equal to ϕ dim_on , which corresponds to a time duration (e.g., T dim_on ) when the TRIAC dimmer  510  is fired on. 
     In another embodiment, time t 5  is approximately equal to time t 4 , and the phase angel ϕ f  approximately corresponds to time t 4 . For example, the time duration T dim_off  when the TRIAC dimmer  510  is not fired on starts at time t 0  and ends at t 2 . In another example, the time duration T dim_on  when the TRIAC dimmer  510  is fired on starts at time t 2  and ends approximately at t 4 . In yet another example, one period T M  of the voltage  571  starts at time t 0  and ends approximately at time t 4 . 
     In yet another embodiment, one period T M  of the voltage  571  is determined as follows:
 
 T   M   =T   dim_off   +T   dim_on   (Equation 3)
 
where T M  represents one period of the voltage  571 . Additionally, T dim_off  represents a time duration when the TRIAC dimmer  510  is not fired on, and T dim_on  represents a time duration when the TRIAC dimmer  510  is fired on.
 
     According to one embodiment, the stage-1 time duration T s1  starts at time t 2  and ends at time t 3 . For example, as shown by the waveform  962 , the stage-timing signal  862  changes from a logic low level to a logic high level at time t 2 , remains at the logic high level from time t 2  to time t 3 , and changes from the logic high level back to the logic low level at time t 3 . 
     According to another embodiment, the stage-2 time duration T s2  starts at time t 4  and ends at time t 6 . For example, as shown by the waveform  962 , the stage-timing signal  862  changes from the logic low level to the logic high level at time t 4 , remains at the logic high level from time t 4  to time t 6 , and changes from the logic high level back to the logic low level at time t 6 . In another example, time t 4  is after time t 3 . 
     In one embodiment, the stage-1 time duration T s1  starts at time t 2 , which is the end of the time duration T dim_off  when the TRIAC dimmer  510  is not fired on. For example, the signal  812  changes from the logic low level to the logic high at time t 2 , and in response, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic low level to the logic high level at time t 2 , indicating the beginning of the stage-1 time duration T s1 . 
     In another embodiment, the stage-1 time duration T s1  ends at time t 3 , which is the end of a predetermined time duration T P  from the time when the voltage  571  becomes smaller than the threshold voltage V th1_b . For example, the signal  812  changes from the logic high level to the logic low level at time t −1 , and in response, the stage-timing signal generator  860 , after the predetermined time duration T P , changes the stage-timing signal  862  from the logic high level to the logic low level at time t 3 , indicating the end of the stage-1 time duration T s1 . 
     In yet another embodiment, the stage-1 time duration T s1  is larger than or equal to zero but smaller than or equal to T s1_max  in magnitude, as shown by the waveform  710  of  FIG. 7 . For example, time t 3  is larger than or equal to time t 2  in magnitude. In another example, time t 3  minus time t 2  is smaller than or equal to T s1_max  in magnitude. 
     According to one embodiment, as shown in  FIG. 9A , time t −1  is approximately equal to time t 4 , and the following can be obtained:
 
 T   dim_off   +T   s1   ≈T   P   (Equation 4)
 
where T dim_off  represents the time duration when the TRIAC dimmer  510  is not fired on, and T s1  represents a stage-1 time duration. Additionally, T P  represents a predetermined time duration. For example, the stage-1 time duration T s1  satisfies Equation 4, and the stage-1 time duration T s1  is also larger than or equal to zero but smaller than or equal to T s1_max  in magnitude as shown by the waveform  710  of  FIG. 7 .
 
     According to another embodiment, based on Equations 3 and 4, the following can be obtained:
 
 T   s1   ≈T   dim_on −( T   M   −T   P )  (Equation 5)
 
where T s1  represents the stage-1 time duration, and T dim_on  represents the time duration when the TRIAC dimmer  510  is fired on. Additionally, T M  represents one period of the voltage  571 , and T P  represents a predetermined time duration. For example, the stage-1 time duration T s1  satisfies Equation 5, and the stage-1 time duration T s1  is also larger than zero but smaller than T s1_max  as shown by the waveform  710  of  FIG. 7 .
 
     According to yet another embodiment, a time duration when the TRIAC dimmer  510  is fired on has the following relationship with a dimming-control phase angle:
 
 T   dim_on   =k×ϕ   dim_on   (Equation 6)
 
where T dim_on  represents the time duration when the TRIAC dimmer  510  is fired on, and ϕ dim_on  represents the dimming-control phase angle. Additionally, k represents a constant. For example, based on Equations 5 and 6, the following can also be obtained:
 
 T   s1   ≈k×ϕ   dim_on −( T   M   −T   P )  (Equation 7)
 
where T s1  represents the stage-1 time duration, and ϕ dim_on  represents the dimming-control phase angle. Additionally, k represents a constant. Moreover, T M  represents one period of the voltage  571 , and T P  represents a predetermined time duration. In another example, the stage-1 time duration T s1  satisfies Equation 7, and the stage-1 time duration T s1  is also larger than or equal to zero but smaller than or equal to T s1_max  in magnitude, as shown by the waveform  710  of  FIG. 7 .
 
     In one embodiment, the stage-2 time duration T s2  starts at time t 4 . For example, the signal  812  changes from the logic high level to the logic low at time t 4 , and in response, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic low level to the logic high level at time t 4 , indicating the beginning of the stage-2 time duration T s2 . 
     In another embodiment, the stage-2 time duration T s2  ends at time t 6 , which is the time when the capacitor  530  is completely discharged. For example, the timing signal  834  indicates that the capacitor  530  becomes completely discharged at time t 6 , and in response, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic high level to the logic low level at time t 6 , indicating the end of the stage-2 time duration T s2 . 
     In yet another embodiment, the stage-2 time duration T s2  is larger than or equal to zero but smaller than or equal to T s2_max  in magnitude, as shown by the waveform  720  of  FIG. 7 . For example, time t 6  is larger than or equal to time t 4  in magnitude. In another example, time t 6  minus time t 4  is smaller than or equal to T s2_max  in magnitude. 
     As shown in  FIG. 9A , corresponding to each period (e.g., corresponding to each T M ) of the voltage  571 , there are a stage-1 time duration (e.g., T s1 ) and a stage-2 time duration (e.g., T s2 ) according to certain embodiments. In one embodiment, corresponding to one period of the voltage  571  (e.g., from time t 0  to time t 5 ), the stage-1 time duration T s1  starts at time t 2  and ends at time t 3 , and the stage-2 time duration T s2  starts at time t 4  and ends at time t 6 . In another embodiment, corresponding to a previous period of the voltage  571  (e.g., ending at time to), the stage-2 time duration T s2  starts at time t −1  and ends at time t 1 . 
     In yet another embodiment, the stage-timing signal  862  changes from the logic low level to the logic high level at time t −1 , remains at the logic high level from time t −1  to time t 1 , changes from the logic high level to the logic low level at time t 1 , remains at the logic low level from time t 1  to time t 2 , changes from the logic low level to the logic high level at time t 2 , remains at the logic high level from time t 2  to time t 3 , changes from the logic high level to the logic low level at time t 3 , remains at the logic low level from time t 3  to time t 4 , changes from the logic low level to the logic high level at time t 4 , remains at the logic high level from time t 4  to t 6 , and changes from the logic high level to the logic low level at time t 6 . 
     According to one embodiment, corresponding to one period of the voltage  571  (e.g., from time t 0  to time t 5 ), the stage-1 time duration (e.g., T s1  from time t 2  to time t 3 ) falls within the time duration when the TRIAC dimmer  510  is fired on (e.g., T dim_on  from time t 2  to time t 5 ), and the stage-2 time duration (e.g., T s2  from time t 4  to time t 6 ) at least mostly falls outside of the time duration when the TRIAC dimmer  510  is fired on (e.g., T dim_on  from time t 2  to time t 5 ). For example, corresponding to the period of the voltage  571  (e.g., from time t 0  to time t 5 ), during the stage-1 time duration (e.g., T s1 ) and during the stage-2 time duration (e.g., T s2 ), the sensing voltage  575  ramps up and down and the current  561  also ramps up and down. In another example, corresponding to the period of the voltage  571  (e.g., from time t 0  to time t 5 ), outside the stage-1 time duration (e.g., T s1 ) and the stage-2 time duration (e.g., T s2 ), the sensing voltage  575  remains equal to zero. In yet another example, corresponding to the period of the voltage  571  (e.g., from time t 0  to time t 5 ), outside the stage-1 time duration (e.g., T s1 ) and the stage-2 time duration (e.g., T s2 ), the current  561  charges the capacitor  532 . According to another embodiment, corresponding to a previous period of the voltage  571  (e.g., ending at time t 5 ), during the stage-2 time duration T s2  (e.g., starting at time t −1  and ending at time t 1 ), the sensing voltage  575  ramps up and down and the current  561  also ramps up and down. 
       FIG. 9B  shows certain timing diagrams for the lighting system  500  as shown in  FIG. 5  and  FIG. 6B  if the TRIAC dimmer  510  is a trailing-edge TRIAC dimmer according to another embodiment of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The waveform  681  represents the voltage  571  as a function of time as shown in  FIG. 6B , the waveform  675  represents the sensing voltage  575  as a function of time as shown in  FIG. 6B , and the waveform  972  represents the stage-timing signal  862  as a function of time. 
     In one embodiment, the TRIAC dimmer  510  is a trailing-edge TRIAC dimmer, which clips part of the waveform that corresponds to the phase angel from ϕ c  to ϕ f . For example, ϕ f  minus ϕ c  is equal to ϕ dim_off , which corresponds to a time duration (e.g., T dim_off ) when the TRIAC dimmer  510  is not fired on. In another embodiment, the unclipped part of the waveform corresponds to the phase angel from ϕ i  to ϕ c . For example, ϕ c  minus ϕ i  is equal to ϕ dim_on , which corresponds to a time duration (e.g., T dim_on ) when the TRIAC dimmer  510  is fired on. 
     In another embodiment, time t 10  is approximately equal to time t 11 , and the phase angel ϕ i  approximately corresponds to time t 11 . For example, the time duration T dim_off  when the TRIAC dimmer  510  is not fired on starts at time t 13  and ends at t 15 . In another example, the time duration T dim_on  when the TRIAC dimmer  510  is fired on starts at approximately time till and ends at t 13 . In yet another example, one period T M  of the voltage  571  starts approximately at time till and ends at time t 15 . 
     In yet another embodiment, one period T M  of the voltage  571  is determined as follows:
 
 T   M   =T   dim_off   +T   dim_on   (Equation 8)
 
where T M  represents one period of the voltage  571 . Additionally, T dim_off  represents a time duration when the TRIAC dimmer  510  is not fired on, and ϕ dim_on  represents a time duration when the TRIAC dimmer  510  is fired on.
 
     According to one embodiment, the stage-1 time duration T s1  starts at time t 12  and ends at time t 13 . For example, as shown by the waveform  972 , the stage-timing signal  862  changes from a logic low level to a logic high level at time t 12 , remains at the logic high level from time t 12  to time t 13 . According to another embodiment, the stage-2 time duration T s2  starts at time t 13  and ends at time t 14 . For example, as shown by the waveform  972 , the stage-timing signal  862  remains at the logic high level from time t 13  to time t 14 , and changes from the logic high level back to the logic low level at time t 14 . According to yet another embodiment, the combination of the stage-1 time duration T s1  and the stage-2 time duration T s2  starts at time t 12  and ends at time t 14 . For example, as shown by the waveform  972 , the stage-timing signal  862  changes from the logic low level to the logic high level at time t 12 , remains at the logic high level from time t 12  to time t 14 , and changes from the logic high level back to the logic low level at time t 14 . 
     In one embodiment, the stage-1 time duration T s1  starts at time t 12 , which is the end of a predetermined time duration T Q  from the time when the voltage  571  becomes larger than the threshold voltage V th2_a . For example, the phase signal  812  changes from the logic low level to the logic high level at time t 11 , and in response, the stage-timing signal generator  860 , after the predetermined time duration T Q , changes the stage-timing signal  862  from the logic low level to the logic high level at time t 12 , indicating the beginning of the stage-1 time duration T s1 . 
     In another embodiment, the stage-1 time duration T s1  ends at time t 12 , which is the end of the time duration T dim_on  when the TRIAC dimmer  510  is fired on. For example, the stage-1 time duration T s1  is larger than or equal to zero but smaller than or equal to T s1_max  in magnitude, as shown by the waveform  710  of  FIG. 7 . For example, time t 13  is larger than or equal to time t 12  in magnitude. In another example, time t 13  minus time t 12  is smaller than or equal to T s1_max  in magnitude. 
     According to one embodiment, as shown in  FIG. 9B , the following can be obtained:
 
 T   Q   +T   s1   ≈T   dim_on   (Equation 9)
 
where T Q  represents a predetermined time duration, and T s1  represents a stage-1 time duration. Additionally, T dim_on  represents the time duration when the TRIAC dimmer  510  is fired on. For example, the stage-1 time duration T s1  satisfies Equation 9, and the stage-1 time duration T s1  is also larger than or equal to zero but smaller than or equal to T s1_max  in magnitude as shown by the waveform  710  of  FIG. 7 .
 
     According to another embodiment, based on Equation 9, the following can be obtained:
 
 T   s1   ≈T   dim_on   −T   Q   (Equation 10)
 
where T s1  represents the stage-1 time duration, and T dim_on  represents the time duration when the TRIAC dimmer  510  is fired on. Additionally, T Q  represents a predetermined time duration. For example, the stage-1 time duration T s1  satisfies Equation 10, and the stage-1 time duration T s1  is also larger than zero but smaller than T s1_max  as shown by the waveform  710  of  FIG. 7 .
 
     According to yet another embodiment, a time duration when the TRIAC dimmer  510  is fired on has the following relationship with a dimming-control phase angle:
 
 T   dim_on   =k×ϕ   dim_on   (Equation 11)
 
where T dim_on  represents the time duration when the TRIAC dimmer  510  is fired on, and ϕ dim_on  represents the dimming-control phase angle. Additionally, k represents a constant. For example, based on Equations 10 and 11, the following can also be obtained:
 
 T   s1   ≈k×ϕ   dim_on   −T   Q   (Equation 12)
 
where T s1  represents the stage-1 time duration, and ϕ dim_on  represents the dimming-control phase angle. Additionally, k represents a constant, and T Q  represents a predetermined time duration. In another example, the stage-1 time duration T s1  satisfies Equation 12, and the stage-1 time duration T s1  is also larger than or equal to zero but smaller than or equal to T s1_max  in magnitude, as shown by the waveform  710  of  FIG. 7 .
 
     In one embodiment, the stage-2 time duration T s2  starts at time t 13 , which is the end of the stage-1 time duration T s1 . For example, at time t 13 , the stage-timing signal generator  860  keeps the stage-timing signal  862  at the logic high level. In another embodiment, the stage-2 time duration T s2  ends at time t 14 . For example, the signal  812  changes from the logic high level to the logic low at time t 14 , and in response, the stage-timing signal generator  860  changes the stage-timing signal  862  from the logic high level to the logic low level at time t 14 , indicating the end of the stage-2 time duration T s2 . 
     In yet another embodiment, the stage-2 time duration T s2  is larger than or equal to zero but smaller than or equal to T s2_max  in magnitude, as shown by the waveform  720  of  FIG. 7 . For example, time t 14  is larger than or equal to time t 13  in magnitude. In another example, time t 14  minus time t 13  is smaller than or equal to T s2_max  in magnitude. In yet another embodiment, the stage-timing signal  862  changes from the logic low level to the logic high level at time t 12 , remains at the logic high level from time t 12  to time t 14 , and changes from the logic high level back to the logic low level at time t 14 . For example, time t 12  is no later than time t 14 . 
     As shown in  FIG. 9B , corresponding to each period (e.g., corresponding to each T M ) of the voltage  571 , there are a stage-1 time duration (e.g., T s1 ) and a stage-2 time duration (e.g., T s2 ) according to certain embodiments. In one embodiment, corresponding to one period of the voltage  571  (e.g., from time t 10  to time t 15 ), the stage-1 time duration T s1  starts at time t 12  and ends at time t 13 , and the stage-2 time duration T s2  starts at time t 13  and ends at time t 14 . In another embodiment, the stage-timing signal  862  changes from the logic low level to the logic high level at time t 12 , remains at the logic high level from time t 12  to time t 14 , and changes from the logic high level to the logic low level at time t 14 . 
     According to one embodiment, corresponding to one period of the voltage  571  (e.g., from time t 10  to time t 15 ), the stage-1 time duration (e.g., T s1  from time t 12  to time t 13 ) falls within the time duration when the TRIAC dimmer  510  is fired on (e.g., T dim_on  from time t 10  to time t 13 ), and the stage-2 time duration (e.g., T s2  from time t 13  to time t 14 ) falls within the time duration when the TRIAC dimmer  510  is not fired on (e.g., T dim_off  from time t 13  to time t 15 ). For example, corresponding to the period of the voltage  571  (e.g., from time t 10  to time t 15 ), during the stage-1 time duration (e.g., T s1 ) and during the stage-2 time duration (e.g., T s2 ), the sensing voltage  575  ramps up and down and the current  561  also ramps up and down. In another example, corresponding to the period of the voltage  571  (e.g., from time t 10  to time t 15 ), outside the stage-1 time duration (e.g., T s1 ) and the stage-2 time duration (e.g., T s2 ), the sensing voltage  575  remains equal to zero. In yet another example, corresponding to the period of the voltage  571  (e.g., from time t 10  to time t 15 ), outside the stage-1 time duration (e.g., T s1 ) and the stage-2 time duration (e.g., T s2 ), the current  561  charges the capacitor  532 . 
     Certain embodiments of the present invention provide stage-based dimmer control systems and methods with high compatibility, low costs, and/or high efficiency. For example, the stage-based dimmer control systems and methods do not include a bleeder; hence the system layouts are simplified with high compatibility achieved. In another example, the stage-based dimmer control systems and methods use one or more control mechanisms in order to reduce bill of materials (BOM), raise energy efficiency, and lower system costs, while providing users with satisfactory dimming effects for light emitting diodes. In yet another example, the stage-based dimmer control systems and methods use a stage-1 time duration (e.g., T s1 ) and a stage-2 time duration (e.g., T s2 ), and each of these time durations is a function of dimming-control phase angle ϕ dim_on  as shown in  FIG. 7 . 
     According to another embodiment, a system controller (e.g., the modulation controller  540 ) for a lighting system (e.g., the lighting system  500 ) includes a first controller terminal (e.g., the controller terminal  542 ) configured to receive a first signal (e.g., the voltage  571 ), and a second controller terminal (e.g., the controller terminal  552 ) coupled to a first transistor terminal of a transistor (e.g., the gate terminal of the transistor  562 ). The transistor further includes a second transistor terminal (e.g., the drain terminal of the transistor  562 ) and a third transistor terminal (e.g., the source terminal of the transistor  562 ). The second transistor terminal is coupled to a first winding terminal of a winding (e.g., the winding  560 ), and the winding (e.g., the winding  560 ) further includes a second winding terminal coupled to a capacitor (e.g., the capacitor  530 ). Additionally, the system controller includes a third controller terminal (e.g., the controller terminal  554 ) coupled to the third transistor terminal of the transistor (e.g., the source terminal of the transistor  562 ), and a fourth controller terminal (e.g., the controller terminal  558 ) coupled to a resistor (e.g., the resistor  574 ) and configured to receive a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least the winding (e.g., the winding  560 ), the third controller terminal (e.g., the controller terminal  554 ), the fourth controller terminal (e.g., the controller terminal  558 ), and the resistor (e.g., the resistor  574 ). The system controller (e.g., the modulation controller  540 ) is configured to: in response to the first signal (e.g., the voltage  571 ) becoming larger than a first threshold (e.g., the threshold voltage V th1_a ) in magnitude at a first time (e.g., the time t 2 ), cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and in response to the first signal (e.g., the voltage  571 ) becoming smaller than a second threshold (e.g., the threshold voltage V th1_b ) in magnitude at a third time (e.g., the time t 4 ), cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at the first time (e.g., the time t 2 ) and ends at a second time (e.g., the time t 3 ). The second duration of time (e.g., the stage-2 time duration T s2 ) starts at the third time (e.g., the time t 4 ) and ends at a fourth time (e.g., the time t 6 ). The system controller (e.g., the modulation controller  540 ) is further configured to cause the second signal (e.g., the sensing voltage  575 ) to remain equal to a constant magnitude from the second time (e.g., the time t 3 ) to the third time (e.g., the time t 4 ). The first time (e.g., the time t 2 ) is earlier than the second time (e.g., the time t 3 ), the second time (e.g., the time t 3 ) is earlier than the third time (e.g., the time t 4 ), and the third time (e.g., the time t 4 ) is earlier than the fourth time (e.g., the time t 6 ). For example, the system controller (e.g., the modulation controller  540 ) is implemented according to at least  FIG. 5 ,  FIG. 6A , and/or  FIG. 9A . 
     In another example, the system controller (e.g., the modulation controller  540 ) is further configured to: in response to the first signal (e.g., the voltage  571 ) becoming smaller than the second threshold (e.g., the threshold voltage V th1_b ) in magnitude at a previous time (e.g., the time t −1 ) earlier than the first time (e.g., the time t 2 ), determine the second time (e.g., the time t 3 ) to be a predetermined time duration (e.g., the predetermined time duration T P ) after the previous time (e.g., the time t −1 ). 
     In yet another example, the fourth time (e.g., the time t 6 ) is a time when the capacitor (e.g., the capacitor  530 ) becomes completely discharged. In yet another example, the first threshold (e.g., the threshold voltage V th1_a ) and the second threshold (e.g., the threshold voltage V th1_b ) are equal. In yet another example, the first threshold (e.g., the threshold voltage V th1_a ) and the second threshold (e.g., the threshold voltage V th1_b ) are not equal. In yet another example, the constant magnitude is equal to zero. In yet another example, each of the first controller terminal (e.g., the controller terminal  542 ), the second controller terminal (e.g., the controller terminal  552 ), the third controller terminal (e.g., the controller terminal  554 ), and the fourth controller terminal (e.g., the controller terminal  558 ) is a pin. 
     According to yet another embodiment, a system controller (e.g., the modulation controller  540 ) for a lighting system (e.g., the lighting system  500 ) includes a first controller terminal (e.g., the controller terminal  542 ) configured to receive a first signal (e.g., the voltage  571 ), and a second controller terminal (e.g., the controller terminal  552 ) coupled to a first transistor terminal of a transistor (e.g., the gate terminal of the transistor  562 ). The transistor further includes a second transistor terminal (e.g., the drain terminal of the transistor  562 ) and a third transistor terminal (e.g., the source terminal of the transistor  562 ), and the second transistor terminal is coupled to a winding (e.g., the winding  560 ). Additionally, the system controller (e.g., the modulation controller  540 ) further includes a third controller terminal (e.g., the controller terminal  554 ) coupled to the third transistor terminal of the transistor (e.g., the source terminal of the transistor  562 ), and a fourth controller terminal (e.g., the controller terminal  558 ) coupled to a resistor (e.g., the resistor  574 ) and configured to receive a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least the winding (e.g., the winding  560 ), the third controller terminal (e.g., the controller terminal  554 ), the fourth controller terminal (e.g., the controller terminal  558 ), and the resistor (e.g., the resistor  574 ). The system controller (e.g., the modulation controller  540 ) is configured to: in response to the first signal (e.g., the voltage  571 ) becoming larger than a first threshold (e.g., the threshold voltage V th2_a ) in magnitude at a first time (e.g., the time t 11 ), cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a duration of time (e.g., the two-stage total time duration T st ). The duration of time (e.g., the two-stage total time duration T st ) starts at a second time (e.g., the time t 12 ) and ends at a third time (e.g., the time t 14 ). The third time (e.g., the time t 14 ) is a time when the first signal (e.g., the voltage  571 ) becomes smaller than a second threshold (e.g., the threshold voltage V th2_b ) in magnitude. The system controller (e.g., the modulation controller  540 ) is further configured to cause the second signal (e.g., the sensing voltage  575 ) to remain equal to a constant magnitude from the first time (e.g., the time t 11 ) to the second time (e.g., the time t 12 ). The first time (e.g., the time t 11 ) is earlier than the second time (e.g., the time t 12 ), and the second time (e.g., the time t 12 ) is earlier than the third time (e.g., the time t 14 ). For example, the system controller (e.g., the modulation controller  540 ) is implemented according to at least  FIG. 5 ,  FIG. 6B , and/or  FIG. 9B . 
     In another example, the system controller (e.g., the modulation controller  540 ) is further configured to: in response to the first signal (e.g., the voltage  571 ) becoming larger than the first threshold (e.g., the threshold voltage V th2_a ) in magnitude at the first time (e.g., the time t 11 ), determine the second time (e.g., the time t 12 ) to be a predetermined time duration (e.g., the predetermined time duration T Q ) after the first time (e.g., the time t 11 ). In yet another example, the first threshold (e.g., the threshold voltage V th2_a ) and the second threshold (e.g., the threshold voltage V th2_b ) are equal. In yet another example, the first threshold (e.g., the threshold voltage V th2_a ) and the second threshold (e.g., the threshold voltage V th2_b ) are not equal. In yet another example, the constant magnitude is equal to zero. In yet another example, each of the first controller terminal (e.g., the controller terminal  542 ), the second controller terminal (e.g., the controller terminal  552 ), the third controller terminal (e.g., the controller terminal  554 ), and the fourth controller terminal (e.g., the controller terminal  558 ) is a pin. 
     According to yet another embodiment, a system controller (e.g., the modulation controller  540 ) for a lighting system (e.g., the lighting system  500 ) includes a first controller terminal (e.g., the controller terminal  542 ) configured to receive a first signal (e.g., the voltage  571 ). The first signal is related to a dimming-control phase angle (e.g., ϕ dim_on ). Additionally, the system controller (e.g., the modulation controller  540 ) includes a second controller terminal (e.g., the controller terminal  552 ) coupled to a first transistor terminal of a transistor (e.g., the gate terminal of the transistor  562 ). The transistor further includes a second transistor terminal (e.g., the drain terminal of the transistor  562 ) and a third transistor terminal (e.g., the source terminal of the transistor  562 ), and the second transistor terminal is coupled to a winding (e.g., the winding  560 ). Moreover, the system controller (e.g., the modulation controller  540 ) includes a third controller terminal (e.g., the controller terminal  554 ) coupled to the third transistor terminal of the transistor (e.g., the source terminal of the transistor  562 ), and a fourth controller terminal (e.g., the controller terminal  558 ) coupled to a resistor (e.g., the resistor  574 ) and configured to receive a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least the winding (e.g., the winding  560 ), the third controller terminal (e.g., the controller terminal  554 ), the fourth controller terminal (e.g., the controller terminal  558 ), and the resistor (e.g., the resistor  574 ). The system controller (e.g., the modulation controller  540 ) is configured to, in response to the first signal (e.g., the voltage  571 ) satisfying one or more predetermined conditions: cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time (e.g., the stage-2 time duration T s2 ) starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The system controller (e.g., the modulation controller  540 ) is further configured to: in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from a first angle magnitude (e.g., 0°) to a second angle magnitude (e.g., ϕ B ), keep the first duration of time at a first predetermined constant; in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ B ) to a third angle magnitude (e.g., ϕ C ), increase the first duration of time; and in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the third angle magnitude (e.g., ϕ C ) to a fourth angle magnitude (e.g., 180°), keep the first duration of time at a second predetermined constant (e.g., T s1_max ). For example, the system controller (e.g., the modulation controller  540 ) is implemented according to at least  FIG. 5 ,  FIG. 6A ,  FIG. 6B ,  FIG. 7 ,  FIG. 9A , and/or  FIG. 9B . 
     In another example, the second time is earlier than the third time. In yet another example, the second time is the same as the third time. In yet another example, the first angle magnitude is equal to 0°, and the fourth angle magnitude is equal to 180°. In yet another example, the first predetermined constant is equal to zero. In yet another example, the system controller (e.g., the modulation controller  540 ) is further configured to, in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ B ) to the third angle magnitude (e.g., ϕ C ), increase the first duration of time linearly with the increasing dimming-control phase angle at a constant slope (e.g., the slope SL 1 ). In yet another example, the second predetermined constant (e.g., T s1_max ) is larger than zero. 
     According to yet another embodiment, a system controller (e.g., the modulation controller  540 ) for a lighting system (e.g., the lighting system  500 ) includes a first controller terminal (e.g., the controller terminal  542 ) configured to receive a first signal (e.g., the voltage  571 ). The first signal is related to a dimming-control phase angle (e.g., ϕ dim_on ). Additionally, the system controller (e.g., the modulation controller  540 ) includes a second controller terminal (e.g., the controller terminal  552 ) coupled to a first transistor terminal of a transistor (e.g., the gate terminal of the transistor  562 ). The transistor further includes a second transistor terminal (e.g., the drain terminal of the transistor  562 ) and a third transistor terminal (e.g., the source terminal of the transistor  562 ), and the second transistor terminal is coupled to a winding (e.g., the winding  560 ). Moreover, the system controller (e.g., the modulation controller  540 ) includes a third controller terminal (e.g., the controller terminal  554 ) coupled to the third transistor terminal of the transistor (e.g., the source terminal of the transistor  562 ), and a fourth controller terminal (e.g., the controller terminal  558 ) coupled to a resistor (e.g., the resistor  574 ) and configured to receive a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least the winding (e.g., the winding  560 ), the third controller terminal (e.g., the controller terminal  554 ), the fourth controller terminal (e.g., the controller terminal  558 ), and the resistor (e.g., the resistor  574 ). The system controller (e.g., the modulation controller  540 ) is configured to, in response to the first signal (e.g., the voltage  571 ) satisfying one or more predetermined conditions: cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time (e.g., the stage-2 time duration T s2 ) starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The system controller (e.g., the modulation controller  540 ) is further configured to: in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from a first angle magnitude (e.g., 0°) to a second angle magnitude (e.g., ϕ A ), keep the second duration of time at a first predetermined constant; in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to a third angle magnitude (e.g., ϕ B ), increase the second duration of time; and in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the third angle magnitude (e.g., ϕ B ) to a fourth angle magnitude (e.g., 180°), keep the second duration of time at a second predetermined constant (e.g., T s2_max ). For example, the system controller (e.g., the modulation controller  540 ) is implemented according to at least  FIG. 5 ,  FIG. 6A ,  FIG. 6B ,  FIG. 7 ,  FIG. 9A , and/or  FIG. 9B . 
     In another example, the second time is earlier than the third time. In yet another example, the second time is the same as the third time. In yet another example, the first angle magnitude is equal to 0°, and the fourth angle magnitude is equal to 180°. In yet another example, the first predetermined constant is equal to zero. In yet another example, the system controller (e.g., the modulation controller  540 ) is further configured to, in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to the third angle magnitude (e.g., ϕ B ), increase the second duration of time linearly with the increasing dimming-control phase angle at a constant slope (e.g., the slope SL 2 ). In yet another example, the second predetermined constant (e.g., T s2_max ) is larger than zero. 
     According to yet another embodiment, a system controller (e.g., the modulation controller  540 ) for a lighting system (e.g., the lighting system  500 ) includes a first controller terminal (e.g., the controller terminal  542 ) configured to receive a first signal (e.g., the voltage  571 ). The first signal is related to a dimming-control phase angle (e.g., ϕ dim_on ). Additionally, the system controller (e.g., the modulation controller  540 ) includes a second controller terminal (e.g., the controller terminal  552 ) coupled to a first transistor terminal of a transistor (e.g., the gate terminal of the transistor  562 ). The transistor further includes a second transistor terminal (e.g., the drain terminal of the transistor  562 ) and a third transistor terminal (e.g., the source terminal of the transistor  562 ), and the second transistor terminal is coupled to a winding (e.g., the winding  560 ). Moreover, the system controller (e.g., the modulation controller  540 ) includes a third controller terminal (e.g., the controller terminal  554 ) coupled to the third transistor terminal of the transistor (e.g., the source terminal of the transistor  562 ), and a fourth controller terminal (e.g., the controller terminal  558 ) coupled to a resistor (e.g., the resistor  574 ) and configured to receive a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least the winding (e.g., the winding  560 ), the third controller terminal (e.g., the controller terminal  554 ), the fourth controller terminal (e.g., the controller terminal  558 ), and the resistor (e.g., the resistor  574 ). The system controller (e.g., the modulation controller  540 ) is configured to, in response to the first signal (e.g., the voltage  571 ) satisfying one or more predetermined conditions: cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time (e.g., the stage-2 time duration T s2 ) starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The sum of the first duration of time (e.g., the stage-1 time duration T s1 ) and the second duration of time (e.g., the stage-2 time duration T s2 ) is equal to a total duration of time (e.g., the two-stage total time duration T st ). The system controller (e.g., the modulation controller  540 ) is further configured to: in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from a first angle magnitude (e.g., 0°) to a second angle magnitude (e.g., ϕ A ), keep the total duration of time at a first predetermined constant; in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to a third angle magnitude (e.g., ϕ C ), increase the total duration of time; and in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the third angle magnitude (e.g., ϕ C ) to a fourth angle magnitude (e.g., 180°), keep the total duration of time at a second predetermined constant (e.g., T st  max). For example, the system controller (e.g., the modulation controller  540 ) is implemented according to at least  FIG. 5 ,  FIG. 6A ,  FIG. 6B ,  FIG. 7 ,  FIG. 9A , and/or  FIG. 9B . 
     In another example, the second time is earlier than the third time. In yet another example, the second time is the same as the third time. In yet another example, the first angle magnitude is equal to 0°, and the fourth angle magnitude is equal to 180°. In yet another example, the first predetermined constant is equal to zero. In yet another example, the second predetermined constant (e.g., T st_max ) is larger than zero. 
     In yet another example, the system controller (e.g., the modulation controller  540 ) is further configured to, in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to the third angle magnitude (e.g., ϕ C ): increase the total duration of time linearly at a first constant slope (e.g., the slope STL 1 ) in response to the dimming-control phase angle increasing from the second angle magnitude (e.g., ϕ A ) to a fourth angle magnitude (e.g., ϕ B ); and increase the total duration of time linearly at a second constant slope (e.g., the slope STL 2 ) in response to the dimming-control phase angle increasing from the fourth angle magnitude (e.g., (B) to the third angle magnitude (e.g., ϕ C ). The fourth angle magnitude (e.g., ϕ B ) is larger than the second angle magnitude (e.g., ϕ A ) and smaller than the third angle magnitude (e.g., ϕ C ). In yet another example, the first constant slope (e.g., the slope STL 1 ) and the second constant slope (e.g., the slope STL 2 ) are equal. In yet another example, the first constant slope (e.g., the slope STL 1 ) and the second constant slope (e.g., the slope STL 2 ) are not equal. 
     In yet another example, the total duration of time is equal to the first predetermined constant in response to the dimming-control phase angle (e.g., ϕ dim_on ) being equal to the second angle magnitude (e.g., ϕ A ); the total duration of time is equal to an intermediate magnitude (e.g., T st_mid ) in response to the dimming-control phase angle being equal to the fourth angle magnitude (e.g., ϕ B ); and the total duration of time is equal to the second predetermined constant in response to the dimming-control phase angle (e.g., ϕ dim_on ) being equal to the third angle magnitude (e.g., ϕ C ). The intermediate magnitude (e.g., T st_mid ) is larger than the first predetermined constant and smaller than the second predetermined constant. 
     According to yet another embodiment, a system controller (e.g., the modulation controller  540 ) for a lighting system (e.g., the lighting system  500 ) includes a first controller terminal (e.g., the controller terminal  542 ) configured to receive a first signal (e.g., the voltage  571 ), and a second controller terminal (e.g., the controller terminal  552 ) coupled to a first transistor terminal of a transistor (e.g., the gate terminal of the transistor  562 ). The transistor further includes a second transistor terminal (e.g., the drain terminal of the transistor  562 ) and a third transistor terminal (e.g., the source terminal of the transistor  562 ), and the second transistor terminal is coupled to a first winding terminal of a winding (e.g., the winding  560 ). The winding (e.g., the winding  560 ) further includes a second winding terminal coupled to a capacitor (e.g., the capacitor  530 ). Additionally, the system controller (e.g., the modulation controller  540 ) includes a third controller terminal (e.g., the controller terminal  554 ) coupled to the third transistor terminal of the transistor (e.g., the source terminal of the transistor  562 ), and a fourth controller terminal (e.g., the controller terminal  558 ) coupled to a resistor (e.g., the resistor  574 ) and configured to receive a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least the winding (e.g., the winding  560 ), the third controller terminal (e.g., the controller terminal  554 ), the fourth controller terminal (e.g., the controller terminal  558 ), and the resistor (e.g., the resistor  574 ). The system controller (e.g., the modulation controller  540 ) is configured to determine whether or not a TRIAC dimmer is detected to be included in the lighting system and if the TRIAC dimmer is detected to be included in the lighting system, whether the TRIAC dimmer is a leading-edge TRIAC dimmer or a trailing-edge TRIAC dimmer. The system controller (e.g., the modulation controller  540 ) is further configured to, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the leading-edge TRIAC dimmer: in response to the first signal (e.g., the voltage  571 ) becoming larger than a first threshold (e.g., the threshold voltage V th_aa ) in magnitude at a first time (e.g., the time t 2 ), cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and in response to the first signal (e.g., the voltage  571 ) becoming smaller than a second threshold (e.g., the threshold voltage V th_bb ) in magnitude at a third time (e.g., the time t 4 ), cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at the first time (e.g., the time t 2 ) and ends at a second time (e.g., the time t 3 ), and the second duration of time (e.g., the stage-2 time duration T s2 ) starts at the third time (e.g., the time t 4 ) and ends at a fourth time (e.g., the time t 6 ). The system controller (e.g., the modulation controller  540 ) is further configured to, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the trailing-edge TRIAC dimmer: in response to the first signal (e.g., the voltage  571 ) becoming larger than the first threshold (e.g., the threshold voltage V th_aa ) in magnitude at a fifth time (e.g., the time t 11 ), cause the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a duration of time (e.g., the two-stage total time duration T st ). The duration of time (e.g., the two-stage total time duration T st ) starts at a sixth time (e.g., the time t 12 ) and ends at a seventh time (e.g., the time t 14 ). The seventh time (e.g., the time t 14 ) is a time when the first signal (e.g., the voltage  571 ) becomes smaller than the second threshold (e.g., the threshold voltage V th_bb ) in magnitude. For example, the system controller (e.g., the modulation controller  540 ) is implemented according to at least  FIG. 5 ,  FIG. 8 ,  FIG. 9A , and/or  FIG. 9B . 
     In another example, the system controller (e.g., the modulation controller  540 ) is further configured to, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the leading-edge TRIAC dimmer, cause the second signal (e.g., the sensing voltage  575 ) to remain equal to a constant magnitude from the second time (e.g., the time t 3 ) to the third time (e.g., the time t 4 ). In yet another example, the system controller (e.g., the modulation controller  540 ) is further configured to, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the trailing-edge TRIAC dimmer, cause the second signal (e.g., the sensing voltage  575 ) to remain equal to a constant magnitude from the fifth time (e.g., the time t 11 ) to the sixth time (e.g., the time t 12 ). 
     According to yet another embodiment, a method for a lighting system (e.g., the lighting system  500 ) includes receiving a first signal (e.g., the voltage  571 ), and receiving a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least a winding (e.g., the winding  560 ). Additionally, the method includes: in response to the first signal (e.g., the voltage  571 ) becoming larger than a first threshold (e.g., the threshold voltage V th1_a ) in magnitude at a first time (e.g., the time t 2 ), causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and in response to the first signal (e.g., the voltage  571 ) becoming smaller than a second threshold (e.g., the threshold voltage V th1_b ) in magnitude at a third time (e.g., the time t 4 ), causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at the first time (e.g., the time t 2 ) and ends at a second time (e.g., the time t 3 ), and the second duration of time (e.g., the stage-2 time duration T s2 ) starts at the third time (e.g., the time t 4 ) and ends at a fourth time (e.g., the time t 6 ). Moreover, the method includes causing the second signal (e.g., the sensing voltage  575 ) to remain equal to a constant magnitude from the second time (e.g., the time t 3 ) to the third time (e.g., the time t 4 ). The first time (e.g., the time t 2 ) is earlier than the second time (e.g., the time t 3 ), the second time (e.g., the time t 3 ) is earlier than the third time (e.g., the time t 4 ), and the third time (e.g., the time t 4 ) is earlier than the fourth time (e.g., the time t 6 ). For example, the method is implemented according to at least  FIG. 5 ,  FIG. 6A , and/or  FIG. 9A . 
     In another example, the method further includes: in response to the first signal (e.g., the voltage  571 ) becoming smaller than the second threshold (e.g., the threshold voltage V th1_b ) in magnitude at a previous time (e.g., the time t −1 ) earlier than the first time (e.g., the time t 2 ), determining the second time (e.g., the time t 3 ) to be a predetermined time duration (e.g., the predetermined time duration T P ) after the previous time (e.g., the time t −1 ). In yet another example, the constant magnitude is equal to zero. 
     According to yet another embodiment, a method for a lighting system (e.g., the lighting system  500 ) includes receiving a first signal (e.g., the voltage  571 ) and receiving a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least a winding (e.g., the winding  560 ). Additionally, the method includes: in response to the first signal (e.g., the voltage  571 ) becoming larger than a first threshold (e.g., the threshold voltage V th2_a ) in magnitude at a first time (e.g., the time t 11 ), causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a duration of time (e.g., the two-stage total time duration T st ). The duration of time (e.g., the two-stage total time duration T st ) starts at a second time (e.g., the time t 12 ) and ends at a third time (e.g., the time t 14 ), and the third time (e.g., the time t 14 ) is a time when the first signal (e.g., the voltage  571 ) becomes smaller than a second threshold (e.g., the threshold voltage V th2_b ) in magnitude. Moreover, the method includes causing the second signal (e.g., the sensing voltage  575 ) to remain equal to a constant magnitude from the first time (e.g., the time t 11 ) to the second time (e.g., the time t 12 ). The first time (e.g., the time t 11 ) is earlier than the second time (e.g., the time t 12 ), and the second time (e.g., the time t 12 ) is earlier than the third time (e.g., the time t 14 ). For example, the method is implemented according to at least  FIG. 5 ,  FIG. 6B , and/or  FIG. 9B . 
     In another example, the method further includes: in response to the first signal (e.g., the voltage  571 ) becoming larger than the first threshold (e.g., the threshold voltage V th2_a ) in magnitude at the first time (e.g., the time t 11 ), determining the second time (e.g., the time t 12 ) to be a predetermined time duration (e.g., the predetermined time duration T Q ) after the first time (e.g., the time t 11 ). In yet another example, the constant magnitude is equal to zero. 
     According to yet another embodiment, a method for a lighting system (e.g., the lighting system  500 ) includes receiving a first signal (e.g., the voltage  571 ). The first signal is related to a dimming-control phase angle (e.g., ϕ dim_on ). Additionally, the method includes receiving a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least a winding (e.g., the winding  560 ). Moreover, the method includes, in response to the first signal (e.g., the voltage  571 ) satisfying one or more predetermined conditions: causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time (e.g., the stage-2 time duration T s2 ) starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ) includes: in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from a first angle magnitude (e.g., 0°) to a second angle magnitude (e.g., ϕ B ), keeping the first duration of time at a first predetermined constant; in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ B ) to a third angle magnitude (e.g., ϕ C ), increasing the first duration of time; and in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the third angle magnitude (e.g., ϕ C ) to a fourth angle magnitude (e.g., 180°), keeping the first duration of time at a second predetermined constant (e.g., T s1_max ). For example, the method is implemented according to at least  FIG. 5 ,  FIG. 6A ,  FIG. 6B ,  FIG. 7 ,  FIG. 9A , and/or  FIG. 9B . 
     In another example, the second time is earlier than the third time. In yet another example, the second time is the same as the third time. In yet another example, the first angle magnitude is equal to 0°, and the fourth angle magnitude is equal to 180°. In yet another example, the first predetermined constant is equal to zero. In yet another example, the process of, in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ B ) to a third angle magnitude (e.g., ϕ C ), increasing the first duration of time includes: in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ B ) to the third angle magnitude (e.g., ϕ C ), increasing the first duration of time linearly with the increasing dimming-control phase angle at a constant slope (e.g., the slope SL 1 ). In yet another example, the second predetermined constant (e.g., T s1_max ) is larger than zero. 
     According to yet another embodiment, a method for a lighting system (e.g., the lighting system  500 ) includes receiving a first signal (e.g., the voltage  571 ). The first signal is related to a dimming-control phase angle (e.g., ϕ dim_on ). Additionally, the method includes receiving a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least a winding (e.g., the winding  560 ). Moreover, the method includes, in response to the first signal (e.g., the voltage  571 ) satisfying one or more predetermined conditions: causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time (e.g., the stage-2 time duration T s2 ) starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. The causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ) includes: in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from a first angle magnitude (e.g., 0°) to a second angle magnitude (e.g., ϕ A ), keeping the second duration of time at a first predetermined constant; in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to a third angle magnitude (e.g., ϕ B ), increasing the second duration of time; and in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the third angle magnitude (e.g., ϕ B ) to a fourth angle magnitude (e.g., 180°), keeping the second duration of time at a second predetermined constant (e.g., T s2_max ). For example, the method is implemented according to at least  FIG. 5 ,  FIG. 6A ,  FIG. 6B ,  FIG. 7 ,  FIG. 9A , and/or  FIG. 9B . 
     In another example, the second time is earlier than the third time. In yet another example, the second time is the same as the third time. In yet another example, the first angle magnitude is equal to 0°, and the fourth angle magnitude is equal to 180°. In yet another example, the first predetermined constant is equal to zero. In yet another example, the process of, in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to a third angle magnitude (e.g., ϕ B ), increasing the second duration of time includes: in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to the third angle magnitude (e.g., ϕ B ), increasing the second duration of time linearly with the increasing dimming-control phase angle at a constant slope (e.g., the slope SL 2 ). In yet another example, the second predetermined constant (e.g., T s2_max ) is larger than zero. 
     According to yet another embodiment, a method for a lighting system (e.g., the lighting system  500 ) includes receiving a first signal (e.g., the voltage  571 ). The first signal is related to a dimming-control phase angle (e.g., ϕ dim_on ). Additionally, the method includes receiving a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least a winding (e.g., the winding  560 ). Moreover, the method includes, in response to the first signal (e.g., the voltage  571 ) satisfying one or more predetermined conditions: causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at a first time and ends at a second time, and the second time is the same as or later than the first time. The second duration of time (e.g., the stage-2 time duration T s2 ) starts at a third time and ends at a fourth time, and the fourth time is the same as or later than the third time. A sum of the first duration of time (e.g., the stage-1 time duration T s1 ) and the second duration of time (e.g., the stage-2 time duration T s2 ) is equal to a total duration of time (e.g., the two-stage total time duration T st ). The causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ) and the causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ) include: in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from a first angle magnitude (e.g., 0°) to a second angle magnitude (e.g., GA), keeping the total duration of time at a first predetermined constant; in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to a third angle magnitude (e.g., ϕ C ), increasing the total duration of time; and in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the third angle magnitude (e.g., ϕ C ) to a fourth angle magnitude (e.g., 180°), keeping the total duration of time at a second predetermined constant (e.g., T st_max ). For example, the method is implemented according to at least  FIG. 5 ,  FIG. 6A ,  FIG. 6B ,  FIG. 7 ,  FIG. 9A , and/or  FIG. 9B . 
     In another example, the second time is earlier than the third time. In yet another example, the second time is the same as the third time. In yet another example, the first angle magnitude is equal to 0°, and the fourth angle magnitude is equal to 180°. In yet another example, the first predetermined constant is equal to zero. In yet another example, the second predetermined constant (e.g., T st_max ) is larger than zero. 
     In yet another example, the process of, in response to the dimming-control phase angle (e.g., ϕ dim_on ) increasing from the second angle magnitude (e.g., ϕ A ) to a third angle magnitude (e.g., ϕ C ), increasing the total duration of time includes: increasing the total duration of time linearly at a first constant slope (e.g., the slope STL 1 ) in response to the dimming-control phase angle increasing from the second angle magnitude (e.g., ϕ A ) to a fourth angle magnitude (e.g., ϕ B ); and increasing the total duration of time linearly at a second constant slope (e.g., the slope STL 2 ) in response to the dimming-control phase angle increasing from the fourth angle magnitude (e.g., ϕ B ) to the third angle magnitude (e.g., ϕ C ). The fourth angle magnitude (e.g., ϕ B ) is larger than the second angle magnitude (e.g., ϕ A ) and smaller than the third angle magnitude (e.g., ϕ C ). In yet another example, the first constant slope (e.g., the slope STL 1 ) and the second constant slope (e.g., the slope STL 2 ) are equal. In yet another example, the first constant slope (e.g., the slope STL 1 ) and the second constant slope (e.g., the slope STL 2 ) are not equal. In yet another example, the total duration of time is equal to the first predetermined constant in response to the dimming-control phase angle (e.g., ϕ dim_on ) being equal to the second angle magnitude (e.g., ϕ A ), the total duration of time is equal to an intermediate magnitude (e.g., T st_mid ) in response to the dimming-control phase angle being equal to the fourth angle magnitude (e.g., ϕ B ), and the total duration of time is equal to the second predetermined constant in response to the dimming-control phase angle (e.g., ϕ dim_on ) being equal to the third angle magnitude (e.g., ϕ C ). The intermediate magnitude (e.g., T st_mid ) is larger than the first predetermined constant and smaller than the second predetermined constant. 
     According to yet another embodiment, a method for a lighting system (e.g., the lighting system  500 ) includes receiving a first signal (e.g., the voltage  571 ) and receiving a second signal (e.g., the sensing voltage  575 ). The second signal represents a magnitude of a current (e.g., the current  561 ) flowing through at least a winding (e.g., the winding  560 ). Additionally, the method includes determining whether or not a TRIAC dimmer is detected to be included in the lighting system and if the TRIAC dimmer is detected to be included in the lighting system, whether the TRIAC dimmer is a leading-edge TRIAC dimmer or a trailing-edge TRIAC dimmer. Moreover, the method includes, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the leading-edge TRIAC dimmer: in response to the first signal (e.g., the voltage  571 ) becoming larger than a first threshold (e.g., the threshold voltage V th_aa ) in magnitude at a first time (e.g., the time t 2 ), causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a first duration of time (e.g., the stage-1 time duration T s1 ); and in response to the first signal (e.g., the voltage  571 ) becoming smaller than a second threshold (e.g., the threshold voltage V th_bb ) in magnitude at a third time (e.g., the time t 4 ), causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a second duration of time (e.g., the stage-2 time duration T s2 ). The first duration of time (e.g., the stage-1 time duration T s1 ) starts at the first time (e.g., the time t 2 ) and ends at a second time (e.g., the time t 3 ), and the second duration of time (e.g., the stage-2 time duration T s2 ) starts at the third time (e.g., the time t 4 ) and ends at a fourth time (e.g., the time t 6 ). Also, the method includes, if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the trailing-edge TRIAC dimmer: in response to the first signal (e.g., the voltage  571 ) becoming larger than the first threshold (e.g., the threshold voltage V th_aa ) in magnitude at a fifth time (e.g., the time t 11 ), causing the second signal (e.g., the sensing voltage  575 ) to ramp up and down during a duration of time (e.g., the two-stage total time duration T st ). The duration of time (e.g., the two-stage total time duration T st ) starts at a sixth time (e.g., the time t 12 ) and ends at a seventh time (e.g., the time t 14 ). The seventh time (e.g., the time t 14 ) is a time when the first signal (e.g., the voltage  571 ) becomes smaller than the second threshold (e.g., the threshold voltage V th_bb ) in magnitude. For example, the method is implemented according to at least  FIG. 5 ,  FIG. 8 ,  FIG. 9A , and/or  FIG. 9B . 
     In another example, the method further includes: if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the leading-edge TRIAC dimmer, causing the second signal (e.g., the sensing voltage  575 ) to remain equal to a constant magnitude from the second time (e.g., the time t 3 ) to the third time (e.g., the time t 4 ). In yet another example, the method further includes: if the TRIAC dimmer is detected to be included in the lighting system and the TRIAC dimmer is the trailing-edge TRIAC dimmer, causing the second signal (e.g., the sensing voltage  575 ) to remain equal to a constant magnitude from the fifth time (e.g., the time t 11 ) to the sixth time (e.g., the time t 12 ). 
     For example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components. In another example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented in one or more circuits, such as one or more analog circuits and/or one or more digital circuits. In yet another example, various embodiments and/or examples of the present invention can be combined. 
     Although specific embodiments of the present invention have been described, it will be understood by those of skill in the art that there are other embodiments that are equivalent to the described embodiments. Accordingly, it is to be understood that the invention is not to be limited by the specific illustrated embodiments, but only by the scope of the appended claims.