Patent Publication Number: US-8542174-B2

Title: Display panel and driving method thereof

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application is a divisional of application Ser. No. 11/380,669, filed Apr. 28, 2006, now U.S. Pat. No. 7,893,911, which claims priority to Taiwanese Application No. 94115752, filed May 16, 2005, the entireties of which are incorporated herein. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The invention relates to display panels, and in particular relates to display panels capable of buffering display data from a data driver. 
     2. Description of the Related Art 
       FIG. 1A  shows a conventional display panel, and  FIG. 1B  shows a timing chart thereof. As shown, the conventional display panel comprises K scan lines G 1 ˜GK, N data lines DL 1 ˜DLN, a plurality of pixels P 11 ˜PNK, a scan driver and a data driver. The scan driver scans the scan lines G 1 ˜GK in sequence, such that pixels P 11 ˜PNK can be driven by display data on the data lines DLF˜DLN from the data driver. For example, display data on the data line DLF˜DLN from the data driver drives the pixels P 11 ˜PN 1  connected to the scan line G 1  when the scan line G 1  is scanned by the scan driver. Similarly, display data on the data line DL 1 ˜DLN from the data driver drives the pixels P 12 ˜PN 2  connected to the scan line G 2  when the scan line G 2  is scanned by the scan driver, and so on. Display data on the data line DL 1 ˜DLN from the data driver drives the pixels P 1 K˜PNK connected to the scan line GN when the scan line GN is scanned by the scan driver. 
     Generally, the data driver comprises a plurality of driving integrated circuits (ICs) corresponding to the data lines DL 1 ˜DLK, each driving a predetermined number of data lines. As data lines increase, more driving ICs are required as are flexible printed circuit (FPC) boards for the driving ICs are increased. Thus, time spent bonding the driving ICs to the FPC board and the FPC board to the display panel is increased during fabrication. 
     BRIEF SUMMARY OF THE INVENTION 
     A detailed description is given in the following embodiments with reference to the accompanying drawings. 
     Embodiments of display panels are disclosed. The display panel comprises a first signal line, a first data line, a first scan line interlaced with the first data line, a first pixel coupled to the first data line and the first scan line, a first switching element comprising a first terminal coupled to the first data line, a first storage capacitor coupled between a second terminal of the first switching element and a ground, and a second switching element coupled to the first storage capacitor and the first signal line. 
     The invention also provides driving methods for a display panel, comprising providing driving voltages thereof, in which a first set of data stored in N first storage capacitors in an M−1 th  period is transferred to N corresponding first pixels through N data lines, driving the same, and a second set of data on a second data line from a data driver is stored to N second storage capacitors, during an M th  period. The second set of data stored in the N second storage capacitors is transferred to N corresponding second pixels through the N data lines, driving the same, and a third set of data on a first data line from the data driver is stored to the N first storage capacitors, during an M+1 th  period. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
         FIG. 1A  shows a conventional display panel; 
         FIG. 1B  shows a timing chart of the display panel shown in  FIG. 1A ; 
         FIG. 2A  and  FIG. 2B  show an embodiment of a display panel; 
         FIG. 3  is a timing chart of the display panel; 
         FIG. 4  is another timing chart of the display panel; 
         FIG. 5  is another timing chart of the display panel; and 
         FIG. 6  schematically shows an embodiment of an electronic device. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims. 
       FIG. 2A  and  FIG. 2B  show an embodiment of a display panel. As shown, the display panel  100  comprises a scan driver  110 , a data driver, a pixel array  130 , and a plurality of signal control circuits SWC 1 ˜SWC 12 . For simplification, the pixel array  130  is a 6×4 pixel array, but can also be a 1024×768 or a 800×600 pixel array. 
     The scan driver  110 , according to control signals from a timing controller (not shown), scans pixel array  130 . Namely, the scan driver  110  scans lines G 1 ˜G 4  in the pixel array  130  in sequence. In this embodiment, the scan driver  110  only scans one of the scan lines G 1 ˜G 4  during a scan period. The data driver  120  outputs data to the pixel array  130  through signal lines SL 1 ˜SL 4  according to control signals from the timing controller (not shown). 
     The pixel array  130  comprises data lines DL 1 ˜DL 6 , scan lines G 1 ˜G 4 , and a plurality of pixel units P 11 ˜P 64 . Each pixel unit comprises a switching element, a storage capacitor, and a liquid capacitor, in which the switching element comprises a control terminal coupled to a corresponding scan line, a first terminal coupled to a corresponding data line, and a second terminal coupled to a corresponding storage capacitor and a corresponding liquid capacitor. Each pixel is coupled to a corresponding data line and a corresponding scan line. For example, the pixel P 11  is coupled to a data line DL 1  and a scan line G 1 , the pixel P 21  is coupled to a data line DL 2  and a scan line G 2 , and the pixel P 31  is coupled to a data line DL 3  and a scan line G 3 , and so on. 
     The signal control circuits SWC 1 ˜SWC 12  each comprise a first switching element, a second switching element and a capacitor, each disposed between a data line and a signal line of the data driver. For example, the signal control circuit SWC 1  is disposed between the data line DL 1  and the signal line SL 1 , the signal control circuit SWC 2  is disposed between the data line DL 1  and the signal line SL 2  the signal control circuit SWC 3  is disposed between the data line DL 2  and the signal line SL 1  the signal control circuit SWC 1  is disposed between the data line DL 2  and the signal line SL 2 , and so on. It should be noted that the first switching elements of the signal control circuits SWC 1 , SWC 3 , SWC 5 , SWC 7 , SWC 9  and SWC 11  are coupled to a control signal Godd, and the first switching elements of the signal control circuits SWC 2 , SWC 4 , SWC 6 , SWC 8 , SWC 10  and SWC 12  are coupled to a control signal Geven. The second switching elements of the signal control circuits SWC 1 , SWC 2 , SWC 7  and SWC 8  are coupled to a control signal Gr, the second switching elements of the signal control circuits SWC 3 , SWC 4 , SWC 9  and SWC 10  are coupled to a control signal Gg, and the second switching elements of the signal control circuits SWC 5 , SWC 6 , SWC 11  and SWC 12  are coupled to a control signal Gb. 
     In this embodiment, all switching elements can be formed by low-temperature poly-silicon (LTPS) process or amorphous silicon process, and the data driver  120  can transfer data three times on one signal line SL 1  (or SL 2 ) in sequence during a scan period. In the invention, due to operation of the signal control circuits, the data driver can transfer display data required by three data lines through two signal lines. 
     First Embodiment 
       FIG. 3  is timing chart of the display panel. Operation of the display panel is disclosed hereafter, with reference to  FIGS. 2A and 2B  and  FIG. 3 . 
     During period PD 1 , the scan driver  110  scans (asserts) the scan lines G 1 , the switching elements M 11 , M 21 , M 31 , M 41 , M 51  and M 61  are turned on according to the control signal Godd, and the switching elements M 13 , M 23 , M 33 , M 43 , M 53  and M 63  are turned off according to the control signal Geven. Because the switching elements M 11 , M 21 , M 31 , M 41 , M 51  and M 61  are turned on due to the control signal Godd, the display data previously stored in capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61  is output to data lines DL 1 ˜DL 6 , driving the pixels P 11 ˜P 61  connected by the scanned scan line G 1 . 
     Further, according to the control signals Gr, Gg and Gb, the data driver  120  outputs display data D 10   r , D 10   g , D 10   b , D 20   r , D 20   g  and D 20   b  on the signal line SL 2  and SL 4  in sequence, such that the display data D 10   r , D 10   g , D 10   b , D 20   r , D 20   g  and D 20   b  is stored in the capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62  respectively. In particular, when the data driver  120  outputs display data D 10   r  and D 20   r  on the signal line SL 2  and SL 4  respectively, the switching elements M 14  and M 44  are turned on according to the control signal Gr, such that display data D 10   r  and D 20   r  on the signal lines SL 2  and SL 4  is stored in the capacitors C 12  and C 42  respectively. When the data driver  120  outputs display data D 10   g  and D 20   g  on the signal lines SL 2  and SL 4  respectively, the switching elements M 24  and M 54  are turned on according to the control signal Gg, such that display data D 10   g  and D 20   g  on the signal lines SL 2  and SL 4  is stored in the capacitors C 22  and C 52  respectively. When the data driver  120  outputs display data D 10   b  and D 20   b  on the signal lines SL 2  and SL 4  respectively, the switching elements M 34  and M 64  are turned on according to the control signal Gb, such that display data D 10   b  and D 20   b  on the signal line SL 2  and SL 4  is stored in the capacitors C 32  and C 62  respectively. In the period PD 1 , because the switching elements M 13 , M 23 , M 33 , M 43 , M 53  and M 63  are turned off according to the control signal Geven, the display data D 10   r , D 10   g , D 10   b , D 20   r , D 20   g  and D 20   b  stored in the capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62  is not output to the data lines DL 1 ˜DL 6 . 
     During period PD 2 , the scan driver  110  scans (asserts) the scan lines G 2 , the switching elements M 11 , M 21 , M 31 , M 41 , M 51  and M 61  are turned off according to the control signal Godd, and the switching elements M 13 , M 23 , M 33 , M 43 , M 53  and M 63  are turned on according to the control signal Geven. Because the switching elements M 13 , M 23 , M 33 , M 43 , M 53  and M 63  are turned on due to the control signal Geven, the display data D 10   r , D 10   g , D 10   b , D 20   r , D 20   g  and D 20   b  stored in capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62  in the period PD 1  is output to data lines DL 1 ˜DL 6 , driving the pixels P 12 ˜P 62  connected by the scanned scan line G 2 . 
     Further, according to the control signals Gr, Gg and Gb, the data driver  120  outputs display data D 11   r , D 11   g , D 11   b , D 21   r , D 21   g  and D 21   b  on the signal line SL 1  and SL 3  in sequence, such that the display data D 11   r , D 11   g , D 11   b , D 21   r , D 21   g  and D 21   b  is stored in the capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61  respectively. In particular, when the data driver  120  outputs display data D 11   r  and D 21   r  on the signal lines SL 1  and SL 3  respectively, the switching elements M 12  and M 42  are turned on according to the control signal Gr, such that display data D 11   r  and D 21   r  on the signal lines SL 1  and SL 3  is stored in the capacitors C 11  and C 41  respectively. When the data driver  120  outputs display data D 11   g  and D 21   g  on the signal lines SL 1  and SL 3  respectively, the switching elements M 22  and M 52  are turned on according to the control signal Gg, such that display data D 11   g  and D 21   g  on the signal lines SL 1  and SL 3  is stored in the capacitors C 21  and C 51  respectively. 
     When the data driver  120  outputs display data D 11   b  and D 21   b  on the signal lines SL 1  and SL 3  respectively, the switching elements M 32  and M 62  are turned on according to the control signal Gb, such that display data D 11   b  and D 21   b  on the signal lines SL 1  and SL 3  is stored in the capacitors C 31  and C 61  respectively. In the period PD 2 , because the switching elements M 11 , M 21 , M 31 , M 41 , M 51  and M 61  are turned off according to the control signal Godd, the display data D 11   r , D 11   g , D 11   b , D 21   r , D 21   g  and D 21   b  stored in the capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61  is not output to the data lines DL 1 ˜DL 6 . 
     Similarly, during period PD 3 , the display data D 11   r , D 11   g , D 11   b , D 21   r , D 21   g  and D 21   b  stored in capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61  in the period PD 2  is output to data lines DL 1 ˜DL 6 , driving the pixels P 13 ˜P 63  connected by the scanned scan line G 3 . The data driver  120  outputs display data D 12   r , D 12   g , D 12   b , D 22   r , D 22   g  and D 22   b  on the signal lines SL 2  and SL 4  in sequence, such that the display data D 12   r , D 12   g , D 12   b , D 22   r , D 22   g  and D 22   b  is stored in the capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62  respectively. 
     During period PD 4 , the display data D 12   r , D 12   g , D 12   b , D 22   r , D 22   g  and D 22   b  stored in capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62  in the period PD 2  is output to data lines DL 1 ˜DL 6 , driving the pixels P 14 ˜P 64  connected by the scanned scan line G 4 . The data driver  120  outputs display data D 13   r , D 13   g , D 13   b , D 23   r , D 23   g  and D 23   b  on the signal lines SL 1  and SL 3  in sequence, such that the display data D 13   r , D 13   g , D 13   b , D 23   r , D 23   g  and D 23   b  is stored in the capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61  respectively. Operation of periods PD 5 ˜PD 8  is similar to that of the periods PD 1 ˜PD 4  and this is omitted for simplification. 
     In this embodiment, the data driver stores display data to capacitors in the signal control circuits through a signal line and outputs display data previously stored to corresponding data lines in the pixel array through the other signal line during the same period. Thus, the display panel can transfer display data required by three data lines in the pixel array by two signal lines. Namely, the number of signal lines connected to the data driver can be reduced, as can driving ICs in the data driver accordingly. 
     Second Embodiment 
       FIG. 4  is another timing chart of the display panel. Operation of the display panel is disclosed hereafter, with reference to  FIGS. 2A and 2B  and  FIG. 4 . 
     During period PD 1 , the scan driver  110  scans (asserts) the scan lines G 1 , the switching elements M 11 , M 21 , M 31 , M 41 , M 51  and M 61  are turned on according to the control signal Godd, and the switching elements M 13 , M 23 , M 33 , M 43 , M 53  and M 63  are turned off according to the control signal Geven. The data driver  120 , according to the control signals Gr, Gg and Gb, outputs display data D 10   r , D 10   g  and D 10   b  on the signal line SL 1  in sequence, display data D 11   r , D 11   g  and D 11   b  on the signal line SL 2  in sequence, display data D 20   r , D 20   g  and D 20   b  on the signal line SL 3  in sequence, and display data D 21   r , D 21   g  and D 21   b  on the signal line SL 4  in sequence. 
     In particular, when the data driver  120  outputs display data D 10   r , D 11   r , D 20   r  and D 21   r  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 12  and M 42  are turned on according to the control signal Gr, such that the pixel P 11  is driven by display data D 10   r  on the signal SL 1  and the display data previously stored in the capacitor C 11 , and the pixel P 41  is driven by display data D 20   r  on the signal SL 3  and the display data previously stored in the capacitor C 41 . Meanwhile, because the switching elements M 14  and M 44  are turned on according to the control signal Gr, display data D 11   r  and D 21   r  on the signal lines SL 2  and SL 4  are stored in the capacitors C 12  and C 42  respectively. 
     When the data driver  120  outputs display data D 10   g , D 11   g , D 20   g  and D 21   g  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 22  and M 52  are turned on according to the control signal Gg, such that the pixel P 21  is driven by display data D 10   g  on the signal SL 1  and the display data previously stored in the capacitor C 21 , and the pixel P 51  is driven by display data D 20   g  on the signal SL 3  and the display data previously stored in the capacitor C 51 . Meanwhile, because the switching elements M 24  and M 54  are turned on according to the control signal Gg, the display data D 11   g  and D 21   g  on the signal lines SL 2  and SL 4  are stored in the capacitors C 22  and C 52  respectively. 
     When the data driver  120  outputs display data D 10   b , D 11   b , D 20   b  and D 21   b  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 32  and M 62  are turned on according to the control signal Gb, such that the pixel P 31  is driven by display data D 10   b  on the signal SL 1  and the display data previously stored in the capacitor C 31 , and the pixel P 61  is driven by display data D 20   b  on the signal SL 3  and the display data previously stored in the capacitor C 61 . Meanwhile, because the switching elements M 34  and M 64  are turned on according to the control signal Gb, the display data D 11   b  and D 21   b  on the signal lines SL 2  and SL 4  are stored in the capacitors C 32  and C 62  respectively. 
     During period PD 2 , the scan driver  110  scans (asserts) the scan lines G 2 , the switching elements M 11 , M 21 , M 31 , M 41 , M 51  and M 61  are turned off according to the control signal Godd, and the switching elements M 13 , M 23 , M 33 , M 43 , M 53  and M 63  are turned on according to the control signal Geven. The data driver  120 , according to the control signals Gr, Gg and Gb, outputs display data D 12   r , D 12   g  and D 12   b  on the signal line SL 1  in sequence, display data D 11   r , D 11   g  and D 11   b  on the signal line SL 2  in sequence, display data D 22   r , D 22   g  and D 22   b  on the signal line SL 3  in sequence, and display data D 21   r , D 21   g  and D 21   b  on the signal line SL 4  in sequence. 
     In particular, when the data driver  120  outputs display data D 12   r , D 11   r , D 22   r  and D 21   r  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 14  and M 44  are turned on according to the control signal Gr, such that the pixel P 12  is driven by display data D 11   r  on the signal SL 2  and the display data D 11   r  stored in the capacitor C 11  in period PD 1 , and the pixel P 42  is driven by display data D 21   r  on the signal SL 4  and the display data D 21   r  stored in the capacitor C 42  in the period PD 1 . Meanwhile, because the switching elements M 12  and M 42  are turned on according to the control signal Gr, the display data D 12   r  and D 22   r  on the signal lines SL 1  and SL 3  are stored in the capacitors C 11  and C 41  respectively. 
     When the data driver  120  outputs display data D 12   g , D 11   g , D 22   g  and D 21   g  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 24  and M 54  are turned on according to the control signal Gg, such that the pixel P 22  is driven by display data D 12   g  on the signal SL 2  and the display data D 12   g  stored in the capacitor C 22  in the period PD 1 , and the pixel P 52  is driven by display data D 22   g  on the signal SL 4  and the display data D 22   g  stored in the capacitor C 52  in the period PD 1 . Meanwhile, because the switching elements M 22  and M 52  are turned on according to the control signal Gg, the display data D 12   g  and D 22   g  on the signal lines SL 1  and SL 3  are stored in the capacitors C 21  and C 51  respectively. 
     When the data driver  120  outputs display data D 12   b , D 11   b , D 22   b  and D 21   b  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 34  and M 64  are turned on according to the control signal Gb, such that the pixel P 32  is driven by display data D 11   b  on the signal SL 2  and the display data D 11   b  stored in the capacitor C 32  in the period PD 1 , and the pixel P 61  is driven by display data D 21   b  on the signal SL 4  and the display data D 21   b  stored in the capacitor C 62  in the period PD 1 . Meanwhile, because the switching elements M 32  and M 62  are turned on according to the control signal Gb, the display data D 12   b  and D 22   b  on the signal lines SL 1  and SL 3  are stored in the capacitors C 31  and C 61  respectively. 
     During period PD 3 , the data driver  120  drives the pixels P 13 ˜P 63  connected to the scanned scan line G 3  by data lines DL 1 ˜DL 6 , according to display data D 12   r , D 12   g , D 12   b , D 22   r , D 22   g  and D 22   b  on the signal lines SL 1  and SL 3  and display data D 12   r , D 12   g , D 12   b , D 22   r , D 22   g  and D 22   b  stored in the capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61 . The data driver  120  further outputs display data D 13   r , D 13   g , D 13   b , D 23   r , D 23   g  and D 23   b  on the signal lines SL 2  and SL 4  in sequence to store in the capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62  respectively. 
     During period PD 4 , the data driver  120  drives the pixels P 14 ˜P 64  connected to the scanned scan line G 4  by data lines DL 1 ˜DL 6 , according to display data D 13   r , D 13   g , D 13   b , D 23   r , D 23   g  and D 23   b  on the signal lines SL 2  and SL 4  and display data D 13   r , D 13   g , D 13   b , D 23   r , D 23   g  and D 23   b  stored in the capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62 . The data driver  120  further outputs display data D 14   r , D 14   g , D 14   b , D 24   r , D 24   g  and D 24   b  on the signal lines SL 1  and SL 3  in sequence to store in the capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61  respectively. Operation of periods PD 5 ˜PD 8  is similar to that of the periods PD 1 ˜PD 4  and this is omitted for simplification. 
     In this embodiment, the data driver outputs the same display data on the same signal line in sequence during the continuous two periods, such that the display panel not only keeps the advantages in the first embodiment but also increases charge time of the capacitors in the signal control circuits for preventing voltage distortion. 
     Third Embodiment 
       FIG. 5  is another timing chart of the display panel. Operation of the display panel is disclosed hereafter, with reference to  FIGS. 2A and 2B  and  FIG. 5 . 
     During period PD 1 , the scan driver  110  scans (asserts) the scan lines G 1 , the switching elements M 11 , M 21 , M 31 , M 41 , M 51  and M 61  are turned on according to the control signal Godd, and the switching elements M 13 , M 23 , M 33 , M 43 , M 53  and M 63  are turned off according to the control signal Geven. The data driver  120 , according to the control signals Gr, Gg and Gb, outputs display data D 10   r , D 10   g  and D 10   b  on the signal line SL 1  in sequence, display data  D 11   r   ,  D 11   g    and  D 11   b    on the signal line SL 2  in sequence, display data D 20   r , D 20   g  and D 20   b  on the signal line SL 3  in sequence, and display data  D 21   r   ,  D 21   g    and  D 21   b    on the signal line SL 4  in sequence. 
     In particular, when the data driver  120  outputs display data D 10   r ,  D 11   r   , D 20   r  and  D 21   r    on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 12  and M 42  are turned on according to the control signal Gr, such that the pixel P 11  is driven by display data D 10   r  on the signal SL 1  and the display data stored in the capacitor C 11  in the previous period, and the pixel P 41  is driven by display data D 20   r  on the signal SL 3  and the display data stored in the capacitor C 41  in the previous period. In the meanwhile, because the switching elements M 14  and M 44  are turned on according to the control signal Gr, such that the display data  D 11   r    and  D 21   r    on the signal lines SL 2  and SL 4  are stored in the capacitors C 12  and C 42  respectively. 
     When the data driver  120  outputs display data D 10   g ,  D 11   g   , D 20   g  and  D 21   g    on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 22  and M 52  are turned on according to the control signal Gg, such that the pixel P 21  is driven by display data D 10   g  on the signal SL 1  and the display data previous stored in the capacitor C 21 , and the pixel P 51  is driven by display data D 20   g  on the signal SL 3  and the display data previously stored in the capacitor C 51 . Meanwhile, because the switching elements M 24  and M 54  are turned on according to the control signal Gg, the display data  D 11   g    and  D 21   g    on the signal lines SL 2  and SL 4  are stored in the capacitors C 22  and C 52  respectively. 
     When the data driver  120  outputs display data D 10   b ,  D 11   b   , D 20   b  and  D 21   b    on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 32  and M 62  are turned on according to the control signal Gb, such that the pixel P 31  is driven by display data D 10   b  on the signal SL 1  and the display data previously stored in the capacitor C 31 , and the pixel P 61  is driven by display data D 20   b  on the signal SL 3  and the display data previous stored in the capacitor C 61 . Meanwhile, because the switching elements M 34  and M 64  are turned on according to the control signal Gb, the display data  D 11   b    and  D 21   b    on the signal lines SL 2  and SL 4  are stored in the capacitors C 32  and C 62  respectively. 
     During period PD 2 , the scan driver  110  scans (asserts) the scan lines G 2 , the switching elements M 11 , M 21 , M 31 , M 41 , M 51  and M 61  are turned off according to the control signal Godd, and the switching elements M 13 , M 23 , M 33 , M 43 , M 53  and M 63  are turned on according to the control signal Geven. The data driver  120 , according to the control signals Gr, Gg and Gb, outputs pre-charge data  D 12   r   ,  D 12   g    and  D 12   b    on the signal line SL 1  in sequence, display data D 11   r , D 11   g  and D 11   b  on the signal line SL 2  in sequence, pre-charge data  D 22   r   ,  D 22   g    and  D 22   b    on the signal line SL 3  in sequence, and display data D 21   r , D 21   g  and D 21   b  on the signal line SL 4  in sequence. 
     In particular, when the data driver  120  outputs data  D 12   r   , D 11   r ,  D 22   r    and D 21   r  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 14  and M 44  are turned on according to the control signal Gr, such that the pixel P 12  is driven by display data D 11   r  on the signal SL 2  and the pre-charge data  D 11   r    stored in the capacitor C 11  in the period PD 1 , and the pixel P 42  is driven by display data D 21   r  on the signal SL 4  and the pre-charge data  D 12   r    stored in the capacitor C 42  in the period PD 1 . In the meanwhile, because the switching elements M 12  and M 42  are turned on according to the control signal Gr, such that the pre-charge data  D 12   r    and  D 22   r    on the signal lines SL 1  and SL 3  are stored in the capacitors C 11  and C 41  respectively. 
     When the data driver  120  outputs display data  D 12   g   , D 11   g ,  D 22   g    and D 21   g  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 24  and M 54  are turned on according to the control signal Gg, such that the pixel P 22  is driven by display data D 12   g  on the signal SL 2  and the pre-charge data  D 11   g    stored in the capacitor C 22  in the period PD 1 , and the pixel P 52  is driven by display data D 22   g  on the signal SL 4  and the pre-charge data  D 21   g    stored in the capacitor C 52  in the period PD 1 . Meanwhile, because the switching elements M 22  and M 52  are turned on according to the control signal Gg, the display data  D 12   g    and  D 22   g    on the signal lines SL 1  and SL 3  are stored in the capacitors C 21  and C 51  respectively. 
     When the data driver  120  outputs display data  D 12   b   , D 11   b ,  D 22   b    and D 21   b  on the signal lines SL 1 , SL 2 , SL 3  and SL 4  respectively, the switching elements M 34  and M 64  are turned on according to the control signal Gb, such that the pixel P 32  is driven by display data D 11   b  on the signal SL 2  and the pre-charge data  D 11   b    stored in the capacitor C 32  in the period PD 1 , and the pixel P 61  is driven by display data D 21   b  on the signal SL 4  and the pre-charge data  D 21   b    stored in the capacitor C 62  in the period PD 1 . Meanwhile, because the switching elements M 32  and M 62  are turned on according to the control signal Gb, the display data  D 12   b    and  D 22   b    on the signal lines SL 1  and SL 3  are stored in the capacitors C 31  and C 61  respectively. 
     During period PD 3 , the data driver  120  drives the pixels P 13 ˜P 63  connected to the scanned scan line G 3  by data lines DL 1 ˜DL 6 , according to display data D 12   r , D 12   g , D 12   b , D 22   r , D 22   g  and D 22   b  on the signal lines SL 1  and SL 3  and pre-charge data  D 12   r   ,  D 12   g   ,  D 12   b   ,  D 22   r   ,  D 22   g    and  D 22   b    stored in the capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61 . The data driver  120  further outputs pre-charge data  D 13   r   ,  D 13   g   ,  D 13   b   ,  D 23   r   ,  D 23   g    and  D 23   b    on the signal lines SL 2  and SL 4  in sequence to store in the capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62  respectively. 
     During period PD 4 , the data driver  120  drives the pixels P 14 ˜P 64  connected to the scanned scan line G 4  by data lines DL 1 ˜DL 6 , according to display data D 13   r , D 13   g , D 13   b , D 23   r , D 23   g  and D 23   b  on the signal lines SL 2  and SL 4  and pre-charge data  D 13   r   ,  D 13   g   ,  D 13   b   ,  D 23   r   ,  D 23   g    and  D 23   b    stored in the capacitors C 12 , C 22 , C 32 , C 42 , C 52  and C 62 . The data driver  120  further outputs pre-charge data  D 14   r   ,  D 14   g   ,  D 14   b   ,  D 24   r   ,  D 24   g    and  D 24   b    on the signal lines SL 1  and SL 3  in sequence to store in the capacitors C 11 , C 21 , C 31 , C 41 , C 51  and C 61  respectively. Operation of period PD 5 ˜PD 8  is similar to that of the period PD 1 ˜PD 4  and this is omitted for simplification. 
     In this embodiment, the data driver outputs pre-charge data corresponding to the required display data for the next period to store in the capacitors during one period and outputs the required display data to drive pixels with the stored pre-charge data during the next period. The pre-charge data can be overdriven voltages corresponding to the required display data. For example, when display data is a voltage signal of 3V, the overdriven voltage signal can be a voltage signal multiplied by a predetermined parameter, such as 3.3V voltage signal. Thus, the display panel not only keeps the advantages of the first and embodiments but also increases voltage level of pre-charge to prevent insufficient charging time. 
     In the display panels of the invention, each two signal lines of the data driver can drive three data lines in the pixel array, the driving ICs in the data driver are reduced. Thus, time spent bonding the driving ICs to the FPC board and the FPC board to the display panel is increased during fabrication. 
     In the three embodiments, for display images, two signal lines are used to transfer data required by three data lines in pixel array according to three control signals Gr, Gg and Gb, but it is to be understood that the invention is not limited thereto. The invention also can use two signal lines with four control signals to transfer data for four data lines, two signal lines with five control signals to transfer data for fifth data lines, two signal lines with six control signals to transfer data for sixth data lines, and so on. Namely, the invention employs two signal lines to transfer data required by N data lines in pixel array according to N control signals for display images. In a case of A×B pixel array, N&gt;2 and is a positive integer, such as 3, 4, 5, and so on, but 
     
       
         
           
             N 
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     In the three embodiments, each signal line and three control signals, such as Gr, Gg and Gb, operate in coordination to gather display data during an operating period. Namely, in these embodiments, while each signal line can transfer three display data during one operating period, it is to be understood that the invention is not limited thereto. Each signal line can also transfer 3×M display data, in which M is 1, 2, 3, 4, 5 . . . and so on. Namely, the scan frequency during one operation period can be increased. 
       FIG. 6  schematically shows an embodiment of an electronic device  600 , employing display panel  100  shown in  FIGS. 2A and 2B . The electronic device  600  may be a device such as a PDA, notebook computer, tablet computer, cellular phone or a display monitor device, for example. 
     Electronic device  200  comprises a housing  210 , a display panel  100  and a power supply  220 , although it is to be understood that various other components can be included, such components not shown or described here for ease of illustration and description. In operation, the power supply  220  powers the display panel  100  so that the display panel  100  can display color images. 
     While the invention has been described by way of example and in terms of the preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.