Patent Publication Number: US-8525541-B2

Title: Test method of liquid crystal display panel

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention generally relates to a test method, and more particularly, to a test method of a liquid crystal display panel. 
     2. Description of Related Art 
     A liquid crystal on silicon (LCOS) panel is a liquid crystal panel constructed on a silicon wafer. LCOS panel has been broadly applied to different types of liquid crystal projectors thanks to its small volume and high resolution. 
     In a LCOS panel, MOS transistors are disposed for replacing the thin film transistors (TFTs) in a conventional liquid crystal display (LCD), and pixel electrodes are mainly made of metal materials. Thus, a LCOS panel is a reflective liquid crystal panel. As to a reflective liquid crystal panel, a higher reflectivity results in a higher light efficiency. Thus, pixels of a LCOS panel should be closely arranged to achieve a higher reflectivity of the LCOS panel. 
     However, short circuit between pixel electrodes may be produced if the pixels are arranged close to each other. Because any abnormity on a LCOS panel is usually detected through a lit image after the LCOS panel is assembled, the fabrication time of the LCOS panel is prolonged and the fabrication cost thereof is increased. Thereby, how to detect short circuit between pixel electrodes right after a silicon wafer is manufactured has become one of the major subjects in the testing of LCOS panels. 
     SUMMARY OF THE INVENTION 
     Accordingly, the present invention is directed to a test method adaptable to a liquid crystal display panel, wherein the liquid crystal display panel has a color filter, and the test method can reduce the fabrication cost 
     The present invention is also directed to a test method adaptable to a liquid crystal display panel, wherein the liquid crystal display panel adopts a color sequential technique, and the test method can reduce the fabrication time of the display panel. 
     The present invention is further directed to a test method adaptable to a liquid crystal display panel, wherein the liquid crystal display panel adopts a color sequential technique, and the test method can detect any wrong connection of liquid crystal capacitors right after a silicon wafer is manufactured. 
     The present invention provides a test method of a liquid crystal display panel. The liquid crystal display panel includes a plurality of pixels and a testing pad. The pixels are disposed at intersections between a first data line, a second data line, and a third data line and a plurality of scan lines. The test method includes following steps. Each of the scan lines is driven to connect liquid crystal capacitors of the pixels to the first data line, the second data line, and the third data line. A first test voltage and a second test voltage are respectively supplied to the first data line and the second data line, wherein the first test voltage is not equal to the second test voltage. The first data line is floated. The floated first data line is measured through the testing pad to determine whether the liquid crystal capacitors of the pixels electrically connected to the first data line and the second data line are electrically connected with each other. 
     According to an embodiment of the present invention, the test method further includes following steps. The first test voltage is supplied to the third data line. The third data line is floated. The floated third data line is measured through the testing pad to determine whether the liquid crystal capacitors of the pixels electrically connected to the third data line and the second data line are electrically connected with each other. 
     The present invention provides a test method of a liquid crystal display panel. The liquid crystal display panel includes a plurality of pixels and a plurality of testing pads. Each of the pixels includes a precharged capacitor, a buffer, and a liquid crystal capacitor. The pixels are electrically connected to a scan line, a display line, and a plurality of data lines. The test method includes following steps. The buffer of each of the pixels is disabled. The scan line and the display line are driven to connect the liquid crystal capacitors and the precharged capacitors of the pixels to the data lines. A first test voltage is sent to odd data lines among the data lines, and a second test voltage is set to even data lines among the data lines, wherein the second test voltage is not equal to the first test voltage. The odd data lines or the even data lines are floated. The floated odd data lines or even data lines are measured through a part of the testing pads to determine whether the liquid crystal capacitors of the pixels are electrically connected with each other. 
     The present invention provides a test method of a liquid crystal display panel. The liquid crystal display panel includes M pixels and a testing pad, each of the pixels includes a precharged capacitor, a buffer, and a liquid crystal capacitor, and the pixels are electrically connected to M scan lines, M display lines, and a data line, wherein M is an integer greater than or equal to 2. The test method includes following steps. The buffer of each of the pixels is disabled. The liquid crystal capacitor and the precharged capacitor of the j th  pixel are charged to a first test voltage, wherein j is a positive integer smaller than M. The liquid crystal capacitor and the precharged capacitor of the (j+1) th  pixel are charged to a second test voltage, wherein the first test voltage is not equal to the second test voltage. While the (j+1) th  scan line and the (j+1) th  display line are driven, the buffer of the j th  pixel is enabled, and the data line is floated. While the (j+1) th  scan line and the (j+1) th  display line are driven, the floated data line is measured through the testing pad to determine whether the liquid crystal capacitors of the j th  pixel and the (j+1) th  pixel are electrically connected with each other. 
     As described above, in the present invention, pixels are respectively charged to different test voltages, and some of the data lines are switched to a floating state. Measurement voltages are obtained by measuring the floated data lines, and whether liquid crystal capacitors of the pixels are wrongly connected due to short circuit between pixel electrodes is determined according to the measurement voltages. In addition, the test method provided by the present invention can detect any incorrect connection of the liquid crystal capacitors before a display panel is assembled, so that both the fabrication time and the fabrication cost of the display panel are reduced. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. 
         FIG. 1  is a flowchart of a test method of a liquid crystal display panel according to an embodiment of the present invention. 
         FIG. 2  is a schematic diagram of a LCOS panel having a color filter according to an embodiment of the present invention. 
         FIG. 3  is a diagram illustrating the layout of upper electrodes of liquid crystal capacitors in  FIG. 2 . 
         FIG. 4  is a flowchart of a test method of a liquid crystal display panel according to another embodiment of the present invention. 
         FIG. 5  is a schematic diagram of a LCOS panel adopting a color sequential technique according to an embodiment of the present invention. 
         FIG. 6  is a schematic diagram of a LCOS panel adopting a color sequential technique according to another embodiment of the present invention. 
         FIG. 7  is a flowchart of a test method of a liquid crystal display panel according to another embodiment of the present invention. 
     
    
    
     DESCRIPTION OF THE EMBODIMENTS 
     Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts. 
       FIG. 1  is a flowchart of a test method of a liquid crystal display panel according to an embodiment of the present invention. Wherein, the liquid crystal display panel is, for example, a liquid crystal on silicon (LCOS) panel having a color filter. Herein, the structure of the LCOS panel having the color filter will be described before the embodiment illustrated in  FIG. 1  is described. 
       FIG. 2  is a schematic diagram of the LCOS panel having the color filter according to an embodiment of the present invention. Referring to  FIG. 2 , the LCOS panel  200  includes a plurality of pixels P 21 -P 26 , a plurality of switches SW 21 -SW 23 , a switch unit  210 , and a testing pad  220 . A color filter (not shown) is respectively disposed above each of the pixels P 21 -P 26 . For example, the pixels P 21 -P 23  are respectively corresponding to a red, a green, and a blue color filters. Besides, the pixels P 21 -P 26  are disposed at intersections between a first data line DL 21 , a second data line DL 22 , and a third data line DL 23  and a plurality of scan lines SL 21 -SL 22 . The switches SW 21 -SW 23  are electrically connected to the first data line DL 21 , the second data line DL 22 , and the third data line DL 23 . Thus, the on/off states of the switches SW 21 -SW 23  determine whether the first data line DL 21 , the second data line DL 22 , and the third data line DL 23  are floated. The switch unit  210  connects one of the first data line DL 21 , the second data line DL 22 , and the third data line DL 23  to the testing pad  220  to measure the pixels P 21 -P 26 . 
     Each of the pixels P 21 -P 26  includes a liquid crystal capacitor and a pixel switch. For example, the pixel P 21  includes a liquid crystal capacitor CL 21  and a pixel switch M 21 . Regarding the actual layout, the upper electrodes of the liquid crystal capacitors CL 21 -CL 26  are all disposed on the same circuit layer.  FIG. 3  is a diagram illustrating the layout of upper electrodes of the liquid crystal capacitors in  FIG. 2 . Referring to  FIG. 3 , the metal electrodes R 11 , G 11 , and B 11  are respectively the upper electrodes of the liquid crystal capacitors CL 21 -CL 23 , and the metal electrodes R 12 , G 12 , and B 12  are respectively the upper electrodes of the liquid crystal capacitors CL 24 -CL 26 . Besides, along with the reduction in the space between the pixels P 21 -P 26 , two adjacent metal electrodes may be connected with each other. For example, the incorrect connection caused by short-circuited pixel electrodes may form a parasitic resistor R 3  between the metal electrodes G 11  and B 11  such that the metal electrodes G 11  and B 11  are electrically connected with each other. 
     In order to immediately detect short-circuited pixel electrodes (i.e., incorrect connections of liquid crystal capacitors) when a silicon wafer leaves the factory, how the LCOS panel  200  illustrated in  FIG. 2  is tested will be explained with reference to the flowchart illustrated in  FIG. 1 . Referring to both  FIG. 1  and  FIG. 2 , in step S 111 , each scan line is driven. For example, a high voltage is supplied to the scan lines SL 21 -SL 22  to turn on the pixel switches M 21 -M 26  of the pixels P 21 -P 26 . Accordingly, the liquid crystal capacitors CL 21 -CL 26  of the pixels P 21 -P 26  are respectively electrically connected to the corresponding data lines. 
     Then, in step S 112 , the liquid crystal capacitors CL 21 -CL 26  of the pixels P 21 -P 26  are charged to a common voltage. For example, the common voltage is transmitted through a common line CDL and is simultaneously or sequentially received by the first data line DL 21 , the second data line DL 22 , and the third data line DL 23  when the switches SW 21 -SW 23  are simultaneously or sequentially turned on. As a result, the liquid crystal capacitors CL 21 -CL 26  of the pixels P 21 -P 26  are set to the common voltage. Next, in steps S 113  and S 114 , a first test voltage is supplied to the first data line and the third data line, and a second test voltage is supplied to the second data line, wherein the first test voltage is not equal to the second test voltage. 
     For example, a panel driver (not shown) sequentially outputs the first test voltage (for example, 5V), the second test voltage (for example, 10V), and the first test voltage (for example, 5V) to the common line CDL according to a test pattern (for example, FF/00/FF). Thus, along with the switches SW 21 -SW 23  being sequentially turned on, the liquid crystal capacitor CL 21  electrically connected to the first data line DL 21  are charged to the first test voltage (for example, 5V), the liquid crystal capacitor CL 22  electrically connected to the second data line DL 22  are charged to the second test voltage (for example, 10V), and the liquid crystal capacitor CL 23  electrically connected to the third data line DL 23  are charged to the first test voltage (for example, 5V). 
     Thereafter, in steps S 115  and S 116 , the first data line and the third data line are floated, and the floated first data line and third data line are measured through the testing pad, so as to determine whether the liquid crystal capacitors of the pixels are electrically connected with each other. For example, the switches SW 21  and SW 23  are not turned on so that the first data line DL 21  and the third data line DL 23  are kept in the floating state. When the metal electrodes G 11  and B 11  are wrongly connected (as shown in  FIG. 3 ), the liquid crystal capacitor CL 22  is electrically connected to the liquid crystal capacitor CL 23  through the parasitic resistor R 3 . Since the liquid crystal capacitor CL 22  in the second column and the liquid crystal capacitor CL 23  in the third column have different voltage levels, the voltage levels on the liquid crystal capacitors CL 22  and CL 23  change due to a charge sharing effect. 
     On the other hand, when the switch unit  210  electrically connects the testing pad  220  to the floated third data line DL 23 , a measurement voltage is obtained. Whether the liquid crystal capacitor CL 22  in the second column and the liquid crystal capacitor CL 23  in the third column are electrically connected with each other is then determined by comparing the measurement voltage with the first test voltage. When the measurement voltage is not equal to the first test voltage (i.e., the voltage levels of the liquid crystal capacitor CL 22  and/or the liquid crystal capacitor CL 23  change), it is determined that the liquid crystal capacitor CL 22  in the second column and the liquid crystal capacitor CL 23  in the third column are electrically connected with each other. Contrarily, when the measurement voltage is equal to the first test voltage (i.e., the voltage levels of the liquid crystal capacitors CL 22  and CL 23  do not change), it is determined that the liquid crystal capacitor CL 22  in the second column and the liquid crystal capacitor CL 23  in the third column are not electrically connected with each other. 
     Similarly, the testing pad  220  is further electrically connected to the floated first data line DL 21  through the switching of the switch unit  210  so that another measurement voltage is obtained. Herein since the liquid crystal capacitor CL 21  in the first column and the liquid crystal capacitor CL 22  in the second column have different voltage levels, whether the liquid crystal capacitor CL 21  in the first column and the liquid crystal capacitor CL 22  in the second column are electrically connected with each other can be further determined by comparing this another measurement voltage with the first test voltage. Herein the liquid crystal capacitor CL 21  in the first column is the liquid crystal capacitor electrically connected to the first data line DL 21 , and the correspondences between other liquid crystal capacitors and data lines can be understood accordingly. 
     To be more specific, as shown in  FIG. 3 , incorrect connections of the metal electrodes include the connection between R 11  and G 11 , the connection between G 11  and B 11 , and the connection between R 11  and B 11  based on the arrangement of the metal electrodes. Namely, the incorrect connections of the liquid crystal capacitors include the incorrect connection between the liquid crystal capacitors in the first column and the second column, the incorrect connection between the liquid crystal capacitors in the second column and the third column, and the incorrect connection between the liquid crystal capacitors in the first column and the third column. In steps S 111 -S 116 , the incorrect connection between the liquid crystal capacitors in the first column and the second column and the incorrect connection between the liquid crystal capacitors in the second column and the third column have been detected. Thus, how the incorrect connection between the liquid crystal capacitors in the first column and the third column is detected in steps S 121 -S 124  will be described below. 
     Referring to  FIG. 1  and  FIG. 2  again, in step S 121 , when another incorrect connection is tested, the liquid crystal capacitors CL 21 -CL 26  of the pixels P 21 -P 26  are re-charged to the common voltage. For example, the common voltage is transmitted again through the common line CDL, and the liquid crystal capacitors CL 21 -CL 26  of the pixels P 21 -P 26  are reset to the common voltage through the switching of the switches SW 21 -SW 23 . Next, in step S 122 , the first test voltage and the second test voltage are respectively supplied to the third data line and the first data line. 
     For example, the panel driver (not shown) sequentially outputs the first test voltage (for example, 5V), the first test voltage (for example, 5V), and the second test voltage (for example, 10V) to the common line CDL according to another test pattern (for example, FF/FF/00). Along with the switches SW 21 -SW 23  being sequentially turned on, the liquid crystal capacitors CL 21  and CL 22  electrically connected to the first data line DL 21  and the second data line DL 22  are charged to the first test voltage (for example, 5V), and the liquid crystal capacitor CL 23  electrically connected to the third data line DL 23  are charged to the second test voltage (for example, 10V). 
     After that, in steps S 123  and S 124 , the first data line is floated, and the floated first data line is measured through the testing pad, so as to determine whether the liquid crystal capacitors in the first column and the third column are electrically connected with each other. For example, the testing pad  220  is electrically connected to the floated first data line DL 21  through the switching of the switch unit  210  so that another measurement voltage is obtained. Since the liquid crystal capacitor CL 21  in the first column and the liquid crystal capacitor CL 23  in the third column have different voltage levels, whether the liquid crystal capacitor CL 21  in the first column and the liquid crystal capacitor CL 23  in the third column are electrically connected with each other is determined by comparing this another measurement voltage with the first test voltage. 
       FIG. 4  is a flowchart of a test method of a liquid crystal display panel according to another embodiment of the present invention. Wherein, the liquid crystal display panel is, for example, a LCOS panel adopting a color sequential technique. Namely, light emitting diodes (LEDs) are disposed as the backlight source of the liquid crystal display panel. Thereby, the structure of the LCOS panel adopting the color sequential technique will be explained herein before the embodiment illustrated in  FIG. 4  is described. 
       FIG. 5  is a schematic diagram of a LCOS panel adopting a color sequential technique according to an embodiment of the present invention. Referring to  FIG. 5 , the LCOS panel  500  includes a plurality of pixels P 51 -P 54 , a plurality of switches SW 51 -SW 52 , a plurality of switch units  511 - 512 , and a plurality of testing pads  521 - 522 . A precharge mechanism is adopted by the pixels P 51 -P 54 . Accordingly, each pixel includes a precharged capacitor, a liquid crystal capacitor, a buffer, and two pixel switches. For example, the pixel P 51  includes a precharged capacitor CP 51 , a liquid crystal capacitor CL 51 , a buffer  501 , and two pixel switches M 512  and M 513 . Besides, in order to respectively control the two pixel switches in the precharge mechanism, each pixel is electrically connected to a scan line, a display line, and a data line. For example, the pixel P 51  is electrically connected to the scan line SL 51 , the display line PL 51 , and the data line DL 51 . 
     In addition, in order to directly measure the voltage variation on the liquid crystal capacitor when a pixel is tested, each pixel further includes a pixel switch electrically connected between the data line and the output terminal of the buffer. For example, besides the pixel switches M 512  and M 513 , the pixel P 51  further includes another pixel switch M 511 , wherein the pixel switch M 511  is electrically connected between the data line DL 51  and the output terminal of the buffer  501 . Moreover, in order to test the pixels, one end of each data line is electrically connected to a switch, and the other end thereof is electrically connected to a testing pad through a switch unit. For example, one end of the data line DL 51  is electrically connected to the switch SW 51 , and the other end thereof is electrically connected to the testing pad  521  through the switch unit  511 . 
     Regarding the actual layout, the upper electrodes of the liquid crystal capacitors CL 51 -CL 54  are all disposed on the same circuit layer and are arranged in a grid shape. Thus, the incorrect connections of the liquid crystal capacitors may be connections between the liquid crystal capacitors of horizontally adjacent pixels (i.e., adjacent pixels arranged from left to right) and connections between liquid crystal capacitors of vertically adjacent pixels (i.e., adjacent pixels arranged from top to bottom). For example, as shown in  FIG. 5 , the incorrect connection caused by short-circuited pixel electrodes may form a parasitic resistor R 51  between the liquid crystal capacitor CL 53  and the liquid crystal capacitor CL 54 , such that the liquid crystal capacitors CL 53  and CL 54  of the two horizontally adjacent pixels P 53  and P 54  are wrongly connected.  FIG. 6  is a schematic diagram of a LCOS panel adopting a color sequential technique according to another embodiment of the present invention. As shown in  FIG. 6 , the incorrect connection caused by short-circuited pixel electrodes may also form a parasitic resistor R 52  between the liquid crystal capacitor CL 51  and the liquid crystal capacitor CL 53 , such that the liquid crystal capacitors CL 51  and CL 53  of the two vertically adjacent pixels P 51  and P 53  are wrongly connected. 
     Below, how the liquid crystal capacitors of two horizontally adjacent pixels are tested will be explained with reference to both  FIG. 4  and  FIG. 5 . In step S 410 , while testing incorrect connections of liquid crystal capacitors, the buffer of each pixel is disabled. For example, the buffers  501 - 504  of the pixels P 51 -P 54  are not activated. In step S 420 , the scan lines and the display lines are driven. For example, a high voltage is supplied to the scan lines SL 51 -SL 52  and the display lines PL 1 -PL 52  to turn on each pixel switch in the pixels P 51 -P 54 . Accordingly, the liquid crystal capacitors CL 51 -CL 54  and the precharged capacitors CP 51 -CP 54  of the pixels P 51 -P 54  are respectively electrically connected to the corresponding data lines. 
     Next, in step S 430 , a first test voltage is transmitted to odd data lines among a plurality of data lines, and a second test voltage is transmitted to even data lines among the data lines, wherein the second test voltage is not equal to the first test voltage. For example, the switches SW 51  and SW 52  are turned on so that the panel driver (not shown) respectively transmits the first test voltage (for example, 0V) and the second test voltage (for example, 6V) to the data lines DL 51  and DL 52 . Accordingly, the liquid crystal capacitor CL 53  electrically connected to the data line DL 51  are charged to the first test voltage (for example, 0V), and the liquid crystal capacitor CL 54  electrically connected to the data line DL 52  are charged to the second test voltage (for example, 6V). 
     After that, in steps S 440  and S 450 , the odd data lines or the even data lines are floated, and the floated odd data lines or even data lines are measured through some of the testing pads, so as to determine whether the liquid crystal capacitors of the horizontally adjacent pixels are electrically connected with each other. For example, if the data line DL 51  is kept in the floating state, the testing pad  521  is electrically connected to the floated data line DL 51  through the switching of the switch unit  511 , and a measurement voltage is obtained. 
     Since the liquid crystal capacitor CL 53  in the first column and the liquid crystal capacitor CL 54  in the second column have different voltage levels, when the parasitic resistor R 51  is formed due to short-circuited pixel electrodes, the charge sharing between the liquid crystal capacitors CL 53  and CL 54  is caused through the parasitic resistor R 51  (as indicated by the current path  530 ). As a result, the voltage level on the liquid crystal capacitor CL 53  changes. Accordingly, when the data line DL 51  is kept in the floating state, whether the liquid crystal capacitors of horizontally adjacent pixels are electrically connected with each other can be determined by comparing the measurement voltage with the first test voltage. 
     When the measurement voltage is not equal to the first test voltage, it is determined that the liquid crystal capacitor CL 53  in the first column and the liquid crystal capacitor CL 54  in the second column are electrically connected with each other. Contrarily, when the measurement voltage is equal to the first test voltage, it is determined that the liquid crystal capacitor CL 53  in the first column and the liquid crystal capacitor CL 54  in the second column are not electrically connected with each other. On the other hand, when the data line DL 52  is kept in the floating state, a measurement voltage is obtained by measuring the floated data line DL 52  and whether the liquid crystal capacitors of horizontally adjacent pixels are electrically connected with each other can be determined by comparing the measurement voltage with the second test voltage. 
       FIG. 7  is a flowchart of a test method of a liquid crystal display panel according to another embodiment of the present invention. Wherein, the liquid crystal display panel is, for example, a LCOS panel adopting a color sequential technique, and the test method illustrated in  FIG. 7  is used to detect any incorrect connection between liquid crystal capacitors of vertically adjacent pixels. Below, how incorrect connection between liquid crystal capacitors of vertically adjacent pixels is detected will be explained with reference to both  FIG. 6  and  FIG. 7 , and M pixels P 51  and P 53  electrically connected to the data line DL 51  will be taken as examples, wherein M is 2. 
     In S 710 , while detecting any incorrect connection of liquid crystal capacitors, the buffer of each pixel is disabled. For example, at the beginning of the test, the buffers  501 - 504  of the pixels P 51 -P 54  are not activated. In step S 720 , the liquid crystal capacitor and the precharged capacitor of the j th  pixel are charged to a first test voltage, wherein j is a positive integer smaller than M. 
     Taking the first pixel P 51  as an example, a high voltage is supplied to the scan line SL 51  and the display line PL 1  to turn on the pixel switches M 511 -M 513  of the pixel P 51 . Besides, the switch SW 51  is turned on so that the panel driver (not shown) transmits the first test voltage (for example, 6V) to the data line DL 51 . The pixel switches M 511 -M 513  then transmit the first test voltage (for example, 6V) to the liquid crystal capacitor CL 51  and the precharged capacitor CP 51 , so as to charge the liquid crystal capacitor CL 51  and the precharged capacitor CP 51  to the first test voltage (for example, 6V). In other words, the detailed procedure of step S 720  includes driving the j th  scan line and the j th  display line and transmitting the first test voltage to the data line. 
     Next, in step S 730 , the liquid crystal capacitor and the precharged capacitor of the (j+1) th  pixel are charged to the second test voltage, wherein the first test voltage is not equal to the second test voltage. 
     For example, the next pixel P 53  is charged after the first pixel P 51  is charged. Herein the scan line SL 52  and the display line PL 52  are driven, while other scan lines or display lines are not driven. Accordingly, the pixel switches M 531 -M 533  of the pixel P 53  are turned on. Besides, the panel driver transmits the second test voltage (for example, 0V) to the data line DL 51  through the switch SW 51  that is turned on. After that, the second test voltage (for example, 0V) from the data line DL 51  is sent to the liquid crystal capacitor CL 53  and the precharged capacitor CP 53  to charge the liquid crystal capacitor CL 53  and the precharged capacitor CP 53  to the second test voltage (for example, 0V). In other words, the detailed procedure of step S 730  includes driving the (j+1) th  scan line and the (j+1) th  display line and transmitting the second test voltage to the data line. 
     Thereafter, in step S 740 , while driving the (j+1) th  scan line and the (j+1) th  display line, the buffer of the j th  pixel is enabled, and the data line is floated. For example, while driving the scan line SL 52  and the display line PL 52 , the buffer  501  of the previous pixel P 51  is enabled, and the data line DL 51  is switched to a floating state by turning off the switch SW 51 . Namely, while driving the scan line SL 52  and the display line PL 52 , the pixel P 53  is charged, and after that, the buffer  501  of the previous pixel P 51  is driven, and the data line DL 51  is floated. 
     Next, in step S 750 , while driving the (j+1) th  scan line and the (j+1) th  display line, the floated data line is measured through the testing pad, so as to determine whether the liquid crystal capacitors of the j th  pixel and the (j+1) th  pixel are electrically connected with each other. For example, the testing pad  521  is electrically connected to the floated data line DL 51  through the switching of the switch unit  511 , so as to obtain a measurement voltage. Since the liquid crystal capacitor CL 51  in the first column and the liquid crystal capacitor CL 53  in the second column have different voltage levels, as shown in  FIG. 6 , when the parasitic resistor R 52  is formed due to short-circuited pixel electrodes, the driven buffer  501  causes the charge sharing between the liquid crystal capacitors CL 51  and CL 53  through the parasitic resistor R 52  (as indicated by the current path  540 ). As a result, the voltage level on the liquid crystal capacitor CL 53  changes. Accordingly, whether the liquid crystal capacitors of the vertically adjacent pixels are electrically connected with each other can be determined by comparing the measurement voltage with the second test voltage. 
     When the measurement voltage is not equal to the second test voltage (i.e., the voltage level on the liquid crystal capacitor CL 53  changes), it is determined that the liquid crystal capacitor CL 51  in the first column and the liquid crystal capacitor CL 53  in the second column are electrically connected with each other. Contrarily, when the measurement voltage is not equal to the second test voltage (i.e., the voltage level on the liquid crystal capacitor CL 53  does not change), it is determined that the liquid crystal capacitor CL 51  in the first column and the liquid crystal capacitor CL 53  in the second column are not electrically connected with each other. 
     In summary, in the present invention, pixels are respectively charged to different test voltages, and some of the data lines are switched to a floating state. Measurement voltages are obtained by measuring the floated data lines, and whether liquid crystal capacitors of the pixels are wrongly connected due to short circuit between pixel electrodes is determined according to the measurement voltages. In addition, the test method provided by the present invention can detect any incorrect connection of the liquid crystal capacitors right when a silicon wafer leaves the factory. Thus, both the fabrication time and the fabrication cost of a display panel are reduced. 
     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.