Patent Publication Number: US-2023145900-A1

Title: Half bridge power converter, and switching method for half bridge power converter and power switch

Description:
TECHNICAL FIELD 
     The present disclosure concerns power converters composed of at least one half bridge comprising two switches driven in a complementary way from blocking to conducting and conducting to blocking and proposes an improved control process and system that eliminates dead-times between commutations of the two switches. 
     BACKGROUND ART 
     In power converters, between transitions of switches, dead-times where both switches are OFF, are used. The main reason of such dead-times is to avoid the risk of overlapping of the control voltage due to multiple factors including propagation delay, mismatch between turn-on and turn-off, drifting of the threshold voltage over the temperature and so on, leading to shoot-through current which could damage the devices. To avoid this and to assure current continuity during dead-time either freewheeling diodes, intrinsic reverse capability of the switch devices such as body diode in case of a MOSFET or the third quadrant conduction capability of a lateral Gallium Nitride (GaN) device are used. 
     Although absolutely necessary, the reverse conduction phase during dead-times is the cause of disadvantages in the converter operation. To reduce the component number and the associated cost, some power modules are not equipped with antiparallel diode and rely on the reverse capability of the switch. However, the switching performance or the conduction performance of this intrinsic diode is often strongly lower than the ones of an external diode especially, Schottky barrier diodes. Thus, the dead-time operation time has a significant impact on the losses of the converter. An additional issue is that it is not possible to adjust a dead-time that will always ensure no diode conduction. 
     In addition, some distortion is also induced in the control loops due to the non-linearity related to dead-time. Smart control methods can be implemented to reduce the dead-time according to the operation point, by using a look-up table. The reverse conduction time is then limited as much as possible. Meanwhile fast computation capabilities are required, usually more expensive. Even if dead-time duration is optimized it is still present. 
     A fast and precise control of the two switches is necessary in a power converter. Due to fast switching capabilities of Wide Band Gap devices (WBG) such as Silicon Carbide (SiC) or GaN, an increase in the switching frequency increases the constraints on the control. 
     The commonly implemented half-bridge configurations require a dead-time avoiding cross-conduction and shoot-through current which can lead to significant additional losses or even the destruction of the semiconductors if not properly controlled. 
     During the dead-time/freewheeling transition one of the semiconductor device can carry the current in reverse conduction mode. However, high losses may be generated during the reverse conduction mode, mainly due to the poor characteristic of the body-diode, e.g. high forward voltage, reverse recovery charge. 
     To mitigate the losses issue, an antiparallel diode (e.g. SiC Schottky Barrier Diode) with better performance (lower voltage drop and zero recovery charge) can be added to operate during the dead-time. However, this is a costly solution which generally leads to bigger systems (two components instead of one) and additional stray inductance due to complementary wiring and even if the reverse recovery issue is alleviated there is still additional loss due capacitive charge. 
     Problem Addressed by the Invention 
     The invention of the present disclosure aims to reduce the dead-time duration and to prevent the use of additional fast and expensive diodes and counteracts the apparition of shoot-through current in a cost effective way. 
     SUMMARY OF INVENTION 
     An objective of the present disclosure is to replace the dead-time and reverse conduction of power semiconductors by a time period during which the two switches of a half bridge commutation cell are both conducting the current of the load with adjusted control signals. To achieve this, the shoot-through current during the transition is controlled by modulating the gate-voltage of the two switch devices in parallel. The control is based on sensors sensing the current derivative in such devices. The combination of the output of these sensors is amplified to control the gate voltage enabling a smooth commutation without reverse conduction of any device. 
     More precisely, the present disclosure proposes a switching method for a half bridge power converter comprising at least a pair of power switches in a leg of said converter providing an upper branch power switch and a lower branch power switch and comprising a first gate control circuit for said upper branch power switch and a second gate control circuit for said lower branch power switch, characterized in that said switching method comprises:
         sensing a current derivative in said upper branch and a current derivative in said lower branch during switching of said pair of power switches to provide a first signal       

     
       
         
           
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     proportional to the current derivative of a power current in said upper power switch and a second signal 
     
       
         
           
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     proportional to the current derivative of a power current in said lower power switch,
         summing said first and second signals to provide a summed current derivative signal       

     
       
         
           
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     and;
         adding said summed current derivative signal to a power switch command signal of said first gate control circuit and a power switch command signal of said second gate control circuit causing the summed derivative signal to modulate gate commutation signals of said gate control circuits such that a current variation in both power switches is equalized by slowing down a commutation of a faster power switch of said pair of power switches while accelerating a commutation of a slower switch of said pair of power switches.       

     This method allows reducing of the commutation dead time and allows controlling current overshoot in such commutation. 
     In Realization Modes: 
     The method may comprise amplifying said summed current derivative signal prior to adding said summed current derivative signal to the power switch command signals. 
     Sensing the current derivative in said upper branch may be done with separate first and second upper sensors and sensing the current derivative in said lower branch may be done with separate first and second lower sensors to provide a first summed current derivative signal to be added to the switch command signal of said first gate control circuit and a second summed current derivative signal to be added to the switch command signal of said second gate control circuit. 
     This permits to have the sensors of the command circuits of the branches isolated from each other. 
     Said method may comprise referencing said first summed current derivative to the voltage of the bottom end of said upper branch power switch and referencing said second summed current derivative to the voltage of the bottom end of said lower branch power switch. The upper branch command circuit having a floating power supply is required as the source of the Mosfet switch or the emitter of a bipolar switch of the upper branch is at a variable voltage dependent of the switching state. 
     The present invention also concerns a half bridge power converter comprising an upper power switch on an upper branch of the converter, said upper power switch being driven by a first gate-control driver, and a lower power switch on a lower branch of the converter, said lower power switch being driven by a second gate-control driver, where said gate control drivers each comprises an electronic circuit for implementing the switching method of the present disclosure wherein said electronic circuits comprise, for each of said upper and lower switch, at least a first current derivative sensor on said upper branch providing a first current derivation signal, at least a second current derivative sensor on said lower branch providing a second current derivation signal, a modulating and conditioning circuit for adding and amplifying said first and second current derivation signals to provide an amplified summed derivation signal and an adder for adding said derivation signal to the command signals of said first and second gates drivers. 
     Such a configuration provides a closed-loop control of the switches during commutation which does not influence the on or off state of the switches outside the commutations. 
     Said modulating and conditioning circuits may be powered through power supplies having a mid-point referenced to the low end voltage of the power switch they act on. 
     This provides independent power supplies for each circuit. 
     Each of said modulating and conditioning circuits is located before a gate buffer and after a pre-driver circuit part of the gate-control driver of each of the power switches. 
     Said current derivative sensors may be made with Rogowski coils. 
     Rogowski coils are isolated from the branch conductors and provide an adequate signal of the sensed current derivatives. 
     Said Rogowski coils may be annular Rogowski coils located around power conductors of the power switches. 
     Said Rogowski coils are each routed with lines in multiple layers of a multilayer PCB having a central aperture for receiving a power conductor in a direction perpendicular to said PCB. 
     In a particular embodiment, two Rogowski coils may be interleaved on the upper branch power switch power conductor and/or on the lower branch power switch power conductor. 
     This improves the accuracy of the two sensors placed on the upper branch power switch power conductor and the lower branch power switch power conductor. 
     In a specific embodiment, said current derivative sensors may be straight Rogowski coils each routed in multiple layers of a multilayer PCB and surrounded by a power conductor track routed from an upper side to a lower side of said PCB around said planar coils in a perpendicular direction to said coils. 
     Such an embodiment is useful to reduce wiring and provide more compact circuitry. 
     Two straight Rogowski coils may be interleaved on the power conductor of the upper branch power switch and/or the power conductor of the lower branch power switch are interleaved. 
     The invention also applies to converters having several half bridge converters as disclosed. 
     A detailed description of exemplary embodiments of the invention will be discussed hereunder in reference to the attached drawings. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         FIG.  1    is a schematic view of a converter on which the present disclosure applies. 
         FIG.  2    is a schematic view of a gate-control with the system of the present disclosure. 
         FIG.  3    is a chart of an example of commutation in accordance with the present disclosure. 
         FIG.  4    is an example of adder and amplifier circuit of the present disclosure. 
         FIG.  5 A  is a general schematic of a Rogowski coil applicable. 
         FIG.  5 B  is a first embodiment of Rogowski coil of the present disclosure. 
         FIG.  6 A  is a schematic view of another embodiment of Rogowski coil of the present disclosure. 
         FIG.  6 B  is a schematic view of a dual straight Rogowski coil of  FIG.  6 A . 
     
    
    
     DESCRIPTION OF EMBODIMENTS 
     The following description is based on a MOSFET application but can be extended to any unipolar (JFET, IGFET, HEMT) or bipolar transistor (BJT or IGBT) for which only the name of the electrodes need to be changed. 
       FIG.  1    is a schematic view of a DC/DC converter  1  with two power switches  10 ,  11  in the leg of a half bridge converter having a DC voltage source  2  with capacitor  3  and where the inductive load  20  is connected in parallel with an upper power switch  10  in an upper branch  4  of the leg between the high potential V DC  line of a DC voltage of the DC source  2  and the midpoint of the complete leg and where the lower power switch is located in a lower branch  5  of the leg between the midpoint of the complete leg and the low potential of the DC source. 
     The upper power switch is driven by a first gate-control circuit  12  and the lower power switch  11  is driven by a second gate-control circuit  13 . 
     In accordance with the present disclosure two current derivative sensors  141 ,  142  oriented in a same direction are positioned on the upper branch conductor and two current derivative sensors  151 ,  152  oriented in a same direction are positioned on the lower branch  5  conductor. 
     The principle of the disclosure is based on:
         sensing the current derivative       

     
       
         
           
             
               
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     flowing through the upper and lower branches power switches during commutation,
         adding the upper branch current derivative and the lower branch current derivative, amplifying the leg derivative current       

     
       
         
           
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     obtained,
         modulating the power device gate voltage according to       

     
       
         
           
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     sensor signals, 
     And complete the commutation. 
     Filtering the signals coming from the current derivative sensors can also be done if necessary. 
     This process ensures zero dead-time in the commutation and uses:
         means for sensing the current derivative flowing through each device of the switching cell;   means for conditioning the current derivative signals coming from the sensors;   means for modulating the power device gate voltage with the sum of these current derivative signals.       

       FIG.  2    represents gate-control circuits  12 ,  13  of the present disclosure. Each of the upper branch and the lower branch has its own gate-control circuit. On each of these gate-control circuits are connected one derivative current sensor  141 ,  142  of the upper branch and one current derivative sensor  151 ,  152  of the lower branch. Each gate-control circuit comprise a pre-driver  16  with an insulating barrier between a controller input module powered by an upstream power supply V DDI , V EE1  and an output module powered by a downstream power supply V DD2x , V EE2x . The downstream power supply also powers a modulating and conditioning circuit  18  also called shoot through circuit STC receiving the derivative current sensors outputs and a gate control circuit. 
     The modulating and conditioning circuit  18  receives the derivative currents sensed by the upper branch and the lower branch derivative current sensors and has its output signal  18   a  mixed at the mixer  19  with the pre-driver  16  output signal  16   a  to provide the command signal  17   a  buffered through a gate buffer  17  connected to the gate of the power switch of the branch to which the gate-control circuit is connected. 
     According to the nature of the different signals, the conditioning and modulating functions are identical for the upper and lower power switches defining the switching cell. However due to the different potentials needed to command the switches, e.g. in  FIG.  1    the upper MOSFET switch source is at a higher potential than the lower MOSFET switch source, two gate-control circuits  12 ,  13 , each having its upper  141 ,  142  and lower  151 ,  152  sensors, pre-driver  16 , modulating and conditioning circuit  18  and gate buffer  17 , are needed. The current derivative sensors are also identical and a particular care on the design is required to be able to insert the sensors at the same location in the circuit to ensure same current derivative measurement for the two power devices. 
     The detailed operation of the invention will be done according to the following assumption and initial state with respect to  FIG.  1    where MOSFET devices  10 ,  11  are considered in the switching cell, the symbol includes the intrinsic body-diode and output capacitor COSS. 
     The load  20  is connected between the middle point of the switching cell and the high potential of the DC voltage source  2 , the load current is considered positive, meaning the current goes from the positive DC bus to the middle node of the switching cell, the load current is considered constant during the transition time scale, the upper switch Q 1   10  is considered “ON”, meaning that it is conducting the load current, the lower switch Q 2   11  is considered “OFF”, meaning that it is blocking the DC voltage and no current is flowing through it. 
     The description hereunder focuses the transition from Q 1  conducting/Q 2  blocking to Q 1  blocking/Q 2  conducting but applies to the inverse transition. 
     According to  FIG.  1    and the Kirchhoff&#39;s current law the relation between the different currents are as in (1). 
         IQ 1 +I Load− IQ 2=0  (1)
 
     The detailed description of dead-time less operation is done according to  FIG.  3   . For 0≤t≤aT the top switch Q 1  is ON and the bottom switch Q 2  is OFF. The gate voltages are respectively V GS1  in high (positive) and V GS2  in low (negative) state. The load current I Load  is flowing through Q 1  from Source (S) to Drain (D) meaning that I Q1 =−I Load . At t=αT complementary control signals Sig 1  and Sig 2  from the controller are sent to Q 1  and Q 2 , in parallel nearly without any dead-time which allows having nearly simultaneous control on both switches within the limit of the tolerances of the components. The gate-source voltages V GS1 , V GS2  of the two switches start moving with a slight delay due to propagation times. The current flowing through the switches increases with a positive current derivative because of the start of cross-conduction. The 
     
       
         
           
             
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     sensors placed as presented in  FIG.  2    react with a negative coupling; therefore the sensor output voltages V Sensor =V Bx =V Tx , where V Tx  and V Bx  are respectively the voltages of the upper and lower sensor, is negative. The output voltages of the upper and lower sensor are summed and amplified by the modulating and amplifying circuit  18  (shoot through circuit STC) placed in parallel of the conventional pre-driver  16 . Therefore, the signal at the input of the gate buffer  17  is a combination of the pre-driver output  16   a  and the STC output  18   a  of  FIG.  2   . The two gate-source voltages are independently modulated according to the current derivative to avoid any surge current, normally present during cross-conduction and that could potentially lead to the destruction of the switching cell. The switch currents I Q1  and I Q2  are oscillating before reaching the steady state. Oscillations are also managed by the current derivative sensors and the STC circuit. In practice the oscillations are reduced with the proposed invention. This would apply mutatis-mutandis to the V GE  Gate-emitter voltage of an insulated gate bipolar transistor (IGBT). 
     At t=αT=t 1  the commutation can be considered complete as the current I Q2  in Q 2  is almost equal to the load current and the current I Q1  in Q 1  almost equal to zero. Even if some oscillations remain the current derivative is not big enough to fully activate the STC circuit. As soon as the two currents become constant the STC circuit is no more operative until the next transition orders. 
     The following steps are summing-up the operation of the zero-dead time control system: 
     Complementary orders are sent from the Controller to the gate control circuit without any dead-time, 
     Q 2  start conducting while Q 1  is not completely OFF, 
     The current flowing through the top and bottom devices start rising, 
     The current derivative sensors sense the current derivative of the leg current, 
     The output voltage of the two current derivative sensors related to each power device are summed, 
     If it is needed a filtering stage can be applied to the coil&#39;s output voltage, 
     The sum of the 
     
       
         
           
             
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     signals from coils are amplified, 
     The gate voltage of each device is modulated according to the 
     
       
         
           
             
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     to control the transition current to have Q 1  turn-OFF sped up and Q 2  turn-ON slowed down. 
     When the commutation is complete Q 1  is “OFF” and Q 2  is “ON”; 
     This operation procedure is the same in the case of Q 2  turning OFF and Q 1  turning ON. 
     Back to  FIG.  2   , the circuits of a gate-control  12 ,  13  are as follows. 
     The pre-driver  16  transfers the control signal from a controller to the gate node and isolates the “power circuit” from the controller part as usual in a converter. According to the driver architecture there are no particular constraints on the pre-driver&#39;s current capabilities. The pre-driver function can be fulfilled by any standard component of the art. 
     The current derivative sensors  141 ,  142 ,  151 ,  152  generate signals that are proportional to the time rate of change of the drain-source current of the power switches. When the current I DS  flowing through a power device is going from a highest value to a lowest value the output signal of the corresponding sensor is positive. Conversely when the current I DS  of the power device is going from a lowest value to a highest value the output signal of such sensor is negative. This function can be done by using Rogowski coils which are wound coils surrounding a main conductor as presented in  FIG.  5 A  discussed hereunder. 
     The modulating and amplifying circuit (STC circuit) of  FIG.  2    is presented in more details in  FIG.  4   . This circuit is duplicated for the two controlled power switches and amplifies the signal coming from the derivative sensors TB X  and TT X , x being 1 or 2 (e.g. sensors  141  and  151  or sensors  142  and  152 ) respectively for switch Q 1   10  and Q 2   11 . In the preferred implementation, the STC is composed of two transistors  101  and  102 , the respective emitter of each transistor is connected to a middle point through an R-C circuit, (R 3   103 -C 2   105  and R 4   104 -C 3   106 ). R 3   103  and R 4   104  are used as a negative feedback in case of a thermal drift of the transistors. C 2   105  and C 3   106  assure a very low impedance path for the amplified AC signal. The zener diode (DZ 1 )  107 , the capacitor C 6   108  and the resistors R 9   109 -R 10   110  are acting as decoupled voltage source as the value for R 9 -R 10  are selected to be relatively high. 
     The resistance network composed of resistor R 5   111 , R 8   112 , R 6   113  and R 7   114  is implemented to polarize the two transistors  101 ,  102 , meaning the base-emitter voltages (VBE) are close to 0.6 V. With this polarization the two transistors are at the limit of the blocking state and the linear portion. All this assembly composed of the two transistors and passive components act as a class AB amplifier, amplifying the signal from the current derivative sensors connected through the AC coupling capacitors C 4   115  and C 5   116 . The last R-C combination formed by C 1   117  and R 2   118  connected between the output of the amplifier and the gate buffer can be tuned to obtain the desired gain. 
     Power supplies of the gate-control circuits and amplifier circuit are referenced to the bottom end voltage, or source voltage in case of a MOSFET, of the power switch they act on. Here this corresponds to the mid-point of the leg for the upper switch and the lower point of the leg for the bottom switch. Each circuit is then provided with its own V DD  and V EE  that is V DD2x  and V EE2x  with x in correspondence to the upper or the lower switch reference. 
     The principle disclosed for a converter having one leg with two branches  4 ,  5  and two switches can be extended to an unlimited number of switches as long as the total number of switches of a switching cell is pair. 
     With respect to the current derivative sensors a possible implementation is a Rogowski coil  30  such as schematically represented in  FIG.  5 A . Such a coil has a toroidal winding  31  and a return conductor inside the winding  32 . The coil lies in a plane perpendicular to a conductor  40  to be sensed and has two output terminals A, B. 
     To assure that the two current derivative sensors surrounding the same conductor are sensing the same H-field a particular care is mandatory during the design process. The selected solution is to interleave the two windings, which is easy to do by designing the sensors as interleaved Rogowski coils made with a multilayer PCB, as presented in  FIG.  5 B . This configuration can be used as an external sensor. 
     In such implementation where the PCB has four layers, the toroidal windings of a first coil may be done through lines  33  going from an upper level to a lower level line  39  through vias  37 ,  38  and the return line  35  of said coil through an intermediate level, said first coil having input/output terminals  33   a ,  35   a . The second coil may have input/output terminals  34   a ,  36   a , a toroidal winding  34 ,  39  interleaved with the winding of the first coil in the first and fourth level and a return line  36  on a second intermediate level. Such a design is easy to manufacture, compact and provides a good matching of the two interleaved coils. 
     In a specific embodiment which may be used in other applications than the present converter, a reversed or straight Rogowski coil sensor is provided as presented in  FIG.  6 A , where the coil is between branches of a conductor to sense. Such coil can also be integrated in inner layers of a multilayer PCB. The coil winding is done with tracks  51  in a first layer, vias  53 ,  54  and tracks  52  in a second layer. The first and second layers and vias are inner tracks and vias of the PCB and the reversed Rogowski coil is sensing the current derivative flowing through surface power tracks  41   a ,  41   b  surrounding the coil and connected through  41   c.    
     In  FIG.  6 B  a double coil is designed and a second coil  6  having input output terminals  60   a ,  60   b  and second tracks  61 ,  62  is interleaved with the first coil tracks and connected through vias  63 ,  64  parallel to the first coil vias. This provides a compact design that can be directly embedded in the converter PCB or any other device PCB and that does not necessitate wiring of cables and soldering of terminals. 
     As stated above the present invention is not limited to the disclosed embodiment as the converter may also be of the inverter type with three legs with sensors in each leg and adding and amplifying circuit for each gate control circuit or a converter having multiple parallel switches per leg where the gate control circuits for such parallel switch are equipped with the sensing and current modulating circuits of the invention.