Patent Publication Number: US-6992405-B2

Title: Dynamic voltage scaling scheme for an on-die voltage differentiator design

Description:
COPYIGHT NOTICE 
   Contained herein is material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction of the patent disclosure by any person as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all rights to the copyright whatsoever. 
   FIELD OF THE INVENTION 
   The present invention relates to integrated circuits; more particularly, the present invention relates to generating multiple power supply voltages on an integrated circuit. 
   BACKGROUND 
   Recently, power consumption has become an important concern for high performance computer systems. Consequently, low power designs have become significant for present-day very large scale integration (VLSI) systems. The most effective way to reduce power dissipation in an integrated circuit (IC) is by decreasing the power supply voltage (V CC ) at the IC. 
   In order to simultaneously achieve high performance and low power, multi-V CC  design, various techniques have been developed. However, due to the high cost of packaging and routing, it is typically difficult to generate multi-V CC  designs using traditional off-chip voltage regulators. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the invention. The drawings, however, should not be taken to limit the invention to the specific embodiments, but are for explanation and understanding only. 
       FIG. 1  is a block diagram of one embodiment of an integrated circuit; 
       FIG. 2  is a block diagram of one embodiment of a circuit block; 
       FIG. 3  illustrates one embodiment of a voltage differentiator; 
       FIG. 4  illustrates one embodiment of a reference voltage selector; and 
       FIG. 5  illustrates one embodiment of a linear voltage regulator. 
   

   DETAILED DESCRIPTION 
   A mechanism to dynamically scale voltage at one or more circuit blocks on an integrated circuit (IC) using on-die voltage differentiators is described. In the following description, numerous details are set forth. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the present invention. 
   Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment. 
     FIG. 1  is a block diagram of one embodiment of an IC  100 . According to one embodiment, IC  100  is partitioned into twenty-five circuit blocks  110 . In a further embodiment, each circuit block  110  includes a voltage differentiator  120 . Each voltage differentiator  120  generates a local power supply (V CC     —   local) from an external power supply (V CC     —   global). 
   In one embodiment, differentiator  120  dynamically changes V CC     —   local based upon the operation status of the particular circuit block  110  in which the differentiator  120  is included. One of ordinary skill in the art will appreciate that other quantities of circuit blocks  110  may be implemented within IC  100 . 
     FIG. 2  is a block diagram of one embodiment of a circuit block  110 . Circuit block  110  includes voltage differentiator  120 , a functional unit block (FUB)  230  and a control module  250 . FUB  230  is coupled to voltage differentiator  120 . In one embodiment, FUB  230  is logic circuitry that may encompass various components within IC  100  (e.g., microprocessor logic, microcontroller logic, memory logic, etc.). FUB  230  is powered by V CC     —   local received from voltage differentiator  120 . 
   Control module  250  is coupled to voltage differentiator  120  and FUB  230 . According to one embodiment, control module  250  transmits a binary encoded signal to voltage differentiator  120  that is used to scale the local operating voltage generated at voltage differentiator  120 . In a further embodiment, control module  250  transmits either a local control signal or a global control signal. In yet another embodiment, the global control signal overrides the local control signal. 
     FIG. 3  illustrates one embodiment of voltage differentiator  120  coupled to control module  250 . Voltage differentiator  120  includes bandgap reference circuit  310 , reference voltage selector  320  and linear voltage regulator  330 . Bandgap reference circuit  310  generates a bandgap reference voltage V BG . In one embodiment, V BG  is a stable voltage source that is insensitive to temperature and process variations. 
   Reference voltage selector  320  is coupled to bandgap reference circuit  310  and control module  250 . Reference voltage selector  320  generates a reference voltage (V REF ) for linear voltage regulator  330 .  FIG. 4  illustrates one embodiment of reference voltage selector  320 . Reference voltage selector  320  includes PMOS voltage divider transistors P 1 –Pn, PMOS pass transistors P 11 –Pn−1 and a NMOS transistor N. According to one embodiment, up to n−1 voltage levels can be selected. For instance, if four voltage levels are needed, four PMOS pass transistors P 11 –P 14  are used. 
   In one embodiment, voltage divider transistors P 1 –Pn are series connected transistors that provide a variable resistance to V BG  received from bandgap reference circuit  310  in order to generate V REF . For instance, if the number of transistors in the voltage divider is n, the granularity of V REF  is V BG /n. 
   In one embodiment, V REF  is determined by the encoded control signal received at transistors P 11 –P 14  from control module  250 . The received signal is determined by the operation status of FUB  230 . For example, if a relatively high V REF  is needed, the binary control signal 01110 is received at transistors P 11 –P 14  and transistor N, respectively. As a result, only transistor P 11  is activated and V REF  is equal to V BG *(1-1/n), where n is the number of transistors in the voltage divider. Similarly, V REF  is equal to V BG *(1-2/n), V BG *(1-3/n) and V BG *(1-4/n) when the control signal is 10110, 11010, 11100, respectively. 
   According to one embodiment, the value of V CC     —   local changes dynamically based upon the activity of the corresponding FUB  230 . For instance, if a FUB  230  requires a relatively high voltage, a higher V REF  is generated by reference voltage selector  320 . Consequently, a higher V CC     —   local is generated by line voltage regulator  330 . Conversely, if a FUB  230  requires a relatively low voltage, lower V REF  and V CC     —   local voltages are generated. 
   In a further embodiment, a higher V REF  may be needed to satisfy performance requirements for circuit blocks  110  that are in a critical path. However, for other circuit blocks  110  that are not in a critical path, a lower V REF  can be selected to reduce power dissipation. In a further embodiment, control module  250  may cause circuit block  110  to enter a standby mode by transmitting 11111 as the control signal. In such an instance, only transistor N is activated, and a V REF  of 0V is transmitted to linear voltage regulator  330 . 
   Referring back to  FIG. 3 , linear voltage regulator  330  generates V CC     —   local for circuit block  110 .  FIG. 5  illustrates one embodiment of linear voltage regulator  330 . Linear voltage regulator  330  includes a comparator  530 , a PMOS transistor (P), resistors R 1  and R 2  and a capacitor. Comparator compares the V REF  received from reference voltage selector  320  with a feedback voltage (V FB ) received from transistor P through resistors R 1  and R 2 . 
   If V FB  falls below V REF , the output of comparator  530  is activated at a low logic level (e.g., logic 0). Otherwise, the output of comparator  530  remains at high logic level (e.g., logic 1). According to one embodiment, comparator  530  is an operational amplifier. However, one of ordinary skill in the art will recognize that other comparison logic circuitry may be used to implement comparator  530 . 
   The output of comparator  530  is coupled to the gate of transistor P. The source of transistor P is coupled to V CC     —   global, while the drain is coupled to resistor R 1 , the capacitor and FUB  230  through V CC     —   local. Transistor P is activated whenever comparator  530  is activated to logic 0. 
   Resistor R 1  is coupled to resistor R 2  and comparator  530 . Resistors R 1  and R 2  are used to generate V FB  for comparator  530 . Resistors R 1  and R 2 , and the generation of V FB , help to control the output of linear voltage regulator  330  by providing a larger voltage range. However, one of ordinary skill in the art will appreciate that resistors R 1  and R 2  are not necessary to implement linear voltage regulator  330 . 
   As described above, the value of V CC     —   local changes dynamically based upon the activity of the corresponding FUB  230 . During the active mode, transistor P is activated whenever V FB  falls below V REF . In particular, comparator  530  senses such a condition and is activated to logic 0. Consequently, the gate of transistor P is activated to logic 0. Transistor P charges the decouple capacitor, thus increasing V CC     —   local. In the active mode, linear voltage regulator  330  generates V CC     —   local=V REF *(1+R 1 /R 2 ). 
   During the standby mode, V REF  is 0. Accordingly, V FB  is always greater than or equal to V REF , and the output of the comparator is logic 1 and transistor P is turned off. As a result, V CC     —   local is floating to reduce the leakage power at circuit block  110 . 
   The use of on-die voltage differentiators enables the generation of a local power supply voltage for each circuit block within an IC. The local power supply voltage changes dynamically based on the activity of the corresponding circuit block. This reduces the power dissipation while maintaining performance. Moreover, the dynamic voltage scaling mechanism using on-die voltage differentiator has a standby control capability, which can drastically reduce leakage power during idle time for a circuit block. 
   Whereas many alterations and modifications of the present invention will no doubt become apparent to a person of ordinary skill in the art after having read the foregoing description, it is to be understood that any particular embodiment shown and described by way of illustration is in no way intended to be considered limiting. Therefore, references to details of various embodiments are not intended to limit the scope of the claims which in themselves recite only those features regarded as the invention.