Patent Publication Number: US-6909984-B2

Title: Wafer alignment system

Description:
This application is a continuation of U.S. patent application Ser. No. 09/652,218, filed Aug. 30, 2000, now U.S. Pat. No. 6,708,131 issued Mar. 16, 2004. 

   FIELD OF THE INVENTION 
   The present invention relates to photolithography processes for manufacturing integrated circuits. More particularly, the invention relates to a method of aligning wafers for successive stepping and scanning stages of a photolithographic process. 
   BACKGROUND OF THE INVENTION 
   Photolithography is used to manufacture integrated circuits by exposing a suitably prepared wafer to light passing through a mask. The entire wafer can be exposed at once. Often, however, separate sub-areas of a wafer are successively exposed in a stepping process, or a band of light is directed synchronously across a mask and a region of a wafer in a scanning process. Alignment is critically important when multiple photolithographic processes are used to manufacture an integrated circuit. 
   Alignment refers to, among other things, the process of registering a mask to a wafer. Many methods of alignment are known. In one method, a wafer is carried on a fixture called a wafer stage. The wafer is indexed to the wafer stage by a notch in its periphery and the wafer stage is supported by a movable carriage. The carriage positions the wafer stage as part of stepping and/or scanning processes. 
   Mirrors are typically affixed to the wafer stage and as the wafer stage is moved interferometers focused on the mirrors precisely locate the wafer stage to align the wafer stage with the appropriate mask and light source. Typically the wafer stage is rectilinear. Therefore, only two sets of two mirrors, one set parallel to the x-axis and one set parallel to the y-axis, are required to appropriately locate the wafer stage in the x-y plane. 
   An example of a photolithographic process including stepping and scanning steps is illustrated in  FIGS. 1-3 . In  FIG. 1 , a light source and mask are aligned to expose a first region  1  of a wafer A. In  FIG. 2 , the light source and mask are aligned to expose a second region  2  of wafer A. This constitutes a two-step stepping process. A scanning process then commences. In the first step of the scanning process, a mask is aligned with a third region  3  of wafer A, and a light source traverses the mask exposing region  3  in FIG.  3 . 
   Alignment of the masks used in the scanning process with the existing stepped regions is critical. This alignment becomes more difficult when the scanning process is completed on a different machine from the stepping process. Moreover, the surfaces of the mirrors used to align the wafer stage are not completely flat, and mirror imperfections will affect alignment when critical dimensions are small. The mirrors, therefore, must be calibrated. 
   One method to accomplish this inter-machine alignment uses a calibration wafer. According to this method, a calibration wafer is placed in a first machine, and a calibration pattern is printed by the first machine on the calibration wafer. The actual position of the points of the calibration pattern are carefully measured. The calibration pattern measurement data, along with the position of the calibration wafer according to the alignment mirrors of the first machine, is stored in a memory. 
   The calibration wafer is placed in the second machine in the same orientation as the first machine. A nominally identical calibration pattern is printed by the second machine on the calibration wafer. The actual position of the points of the second calibration pattern are carefully measured. The second calibration pattern measurement data, along with the position of the calibration wafer according to the alignment mirrors of the second machine, is stored in a memory. 
   The first calibration pattern measurement data, first alignment mirror position, second calibration pattern measurement data and second alignment mirror position are processed to account for, among other things, the disparities of the alignment mirrors. When a production wafer is processed in a first machine, then transferred to a second machine in the same orientation, the processed data from the calibration process is used to adjust the position of the production wafer in the second machine to bring it into true alignment with the regions exposed on the production wafer by the first machine. 
   When scanning is done in the same linear direction as stepping, once the wafer is placed in the apparatus, its only movement will be along the x and y axes and no rotation to change wafer orientation is necessary. For instance, in  FIG. 10 , a shallow, rectangular first region  1   a  is exposed on a wafer C, followed by a similar second region  2   a  as shown in FIG.  11 . These stepping processes could be followed by one scanning process similar to those shown in FIG.  3 . Sometimes, however, it is advantageous to carry out stepping and scanning processes in different directions with respect to a wafer. For example, as shown in  FIG. 12 , under certain geometries a single pass of the scanner  200  in a direction 90° to the path of the stepper  100  can expose a single region  3   a  covering both regions  1   a  and  2   a.    
   Many integrated circuit manufacturing centers are not equipped to execute stepping and scanning in different directions. In these manufacturing centers, the wafer must be rotated 90° to accommodate stepping passes orthogonal to scanning passes. This is illustrated in  FIG. 13 , where the wafer C has been rotated 90° to accommodate a region  4   a  scanned in the same linear direction as the stepping processes. When multi-directional stepping and scanning requires a rotation of a wafer, the alignment process described above cannot be used. What is required then, is a method of aligning and manufacturing a rotated production wafer. 
   SUMMARY OF THE INVENTION 
   The invention concerns a method for aligning wafers in machines used to manufacture integrated circuits. 
   In the invention, a first pattern is formed in a calibration wafer in a first orientation in a first machine and a second pattern is formed in the calibration wafer in said first orientation in a second machine. Next, the difference between the first pattern and the second pattern is measured and stored in a memory. The difference is transformed to account for a change in orientation, typically a 90° rotation. 
   Next, regions in a production wafer in the first orientation are processed in the first machine and the location of the production wafer in the first machine is determined. 
   The production wafer is then transferred to the second machine in a second orientation, typically at a 90° rotation. 
   The location of the production wafer in the second machine is determined next, and then adjusted using the transformed difference. Finally, the production wafer is aligned in the second machine using the adjusted location data; and the regions in the production wafer are processed in the second machine. 
   In one example of the invention, the first machine is a stepper and the second machine is a scanner, each with their own processor and memory. The scanner processor retrieves the coordinates of the cruciform patterns, transforms them, and adjusts the alignment of the production wafer in the scanner using the transformed coordinates. 
   A 90° change in the orientation of the production wafer is useful when two successive regions of the production wafer are exposed in the stepper in a first direction, the scanning breadth of the scanner exceeds the length of the two successive stepped regions in the first direction, and a single scanning pass in a second direction exposes both successive stepped regions in the production wafer in a single scanning pass. 
   According to one aspect of the invention, positional differences may be transformed by switching the x-coordinates of the cruciform pattern in the scanner with the y-coordinates of the cruciform pattern in the scanner. 
   The above and other advantages and features of the invention will be more readily understood from the following detailed description of the invention which is provided in connection with the accompanying drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  is a plan view of a wafer with a first stepped area exposed according to a conventional process. 
       FIG. 2  is a plan view of the wafer of  FIG. 1  with a second stepped area exposed according to a conventional process. 
       FIG. 3  is a plan view of the wafer of  FIGS. 1 and 2  with a first scanned area exposed according to a conventional process. 
       FIGS. 4A and 4B  illustrate a partial schematic drawing of a stepper and a scanner. 
       FIG. 5  is a plan view of a calibration wafer with a nominal cruciform pattern. 
       FIG. 6  is a plan view of a calibration wafer with an actual cruciform pattern formed in a stepper. 
       FIG. 7  is a plan view of a calibration wafer with a second actual cruciform pattern formed in a scanner. 
       FIG. 8  is a plan view of a portion of the calibration wafer of FIG.  6  and FIG.  7 . 
       FIG. 9  is a flow chart for an integrated circuit manufacturing process including stepping and scanning. 
       FIG. 10  is a plan view of a wafer with a first stepped area exposed according to a conventional process. 
       FIG. 11  is a plan view of a wafer with a second stepped area exposed according to a conventional process. 
       FIG. 12  is a plan view of a wafer with a single scanned area exposed according to a conventional process. 
       FIG. 13  is a plan view of a wafer rotated to accommodate a single scanning process according to a conventional process. 
       FIGS. 14A and 14B  illustrate a partial schematic drawing of a stepper and scanner wherein a production wafer is rotated when transferred from the stepper to the scanner. 
       FIG. 15  is a flow chart for an integrated circuit manufacturing process wherein a wafer is rotated when transferred from a stepper to a scanner. 
   

   DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
   As shown in  FIGS. 4A and 4B  a calibration wafer  10  is placed in a wafer stage  112  of a first, or reference machine, in this case, the stepper  100 . The wafer stage  112  of the stepper  100  is supported by a carriage (not shown). The carriage is capable of moving the wafer stage in the x and y directions, as indicated by the arrows  12 . The wafer stage  112  has an x-location mirror  114  attached to a side  115  parallel to the y-axis and a y-location mirror  116  attached to a side  117  parallel to the x-axis. An x-location interferometer  118  focused on the x-location mirror  114  is attached to the frame (not shown) of the stepper  100 , and a y-location interferometer  120  also attached to the frame, is focused on the y-location mirror  116 . The movement and location of the wafer stage is very precisely controlled. 
   As shown in  FIG. 5 , a cruciform pattern  14  is printed on the calibration wafer  10  consisting of points arranged in a vertical bar  16 , a nominally straight line parallel to the y-axis, and a horizontal bar  18 , a nominally straight line parallel to the x-axis. This pattern is produced by moving the wafer stage  112 , under a light source (not shown) focused at a non-moving point on the surface of the calibration wafer  10 . The wafer stage  112  is then incrementally traversed through the range of the carriage in the y-direction while holding a single position of the carriage in the x-direction as indicated by the x-location interferometer  118  reading of the x-location mirror  114 . Next, the wafer stage  112  is incrementally traversed throughout the range of the carriage in the x-direction while holding a single position of the carriage in the y-direction as indicated by the y-location interferometer  120  reading of the y-location mirror  116 . Because the mirrors are not perfectly flat the actual cruciform pattern  14   a  produced will be slightly curved as shown in FIG.  6 . 
   The actual positions of the points along the nominally cruciform pattern  14   a  formed on the calibration wafer  10  are precisely determined using the stepper metrology. The x and y coordinates of these points constitute an array, x A , y A ={x A1 , y A1 , x A , y A2 , x A3 , y A3  . . . x An , y An }. Returning to  FIGS. 4A and 4B , this array of points is transmitted by the processor  122  of the stepper  100  to its memory  123 . 
   The calibration wafer  10  is removed from the wafer stage  112  of the stepper  100  and is placed in the wafer stage  212  of the scanner  200 . During this transfer step, the calibration wafer  10  is maintained in the same orientation in the x-y plane with the notch  11  of the wafer  10  facing right. A second nominally cruciform pattern  14   b  is printed on the calibration wafer  10  in the same manner as the pattern  14   a  was formed on the stepper  100 . The second actual cruciform pattern  14   b  is also curved and is shown in FIG.  7 . The first actual cruciform pattern  14   a  is omitted from  FIG. 7  for clarity. 
   The actual positions of the points along the second nominally cruciform pattern  14   b  formed on the calibration wafer  10  are then precisely determined using the scanner metrology. The x and y coordinates of these points constitute an array, x B , y B ={x B1 , y B1 , x B2 , y B2 , x B3 , y B3  . . . x Bn , y Bn }. This array is transmitted by the processor  222  of the scanner  200  to its memory  223 . 
   The coordinates of the array x A , y A  stored in the stepper memory  123  are transmitted to the scanner memory  223  by any of a number of means known in the art. A calibration array is then calculated by the scanner processor  222  using the difference between the actual cruciform pattern  14   a  produced by the stepper  100  and the actual cruciform  14   b  pattern produced by the scanner  200 . This difference is the aggregate differences in the actual positions of corresponding locations on the x-axis for each point on the vertical bar  16  of the cruciform pattern  14  and the actual positions of corresponding locations on the y-axis for each point on the horizontal bar  18  of the cruciform pattern  14 . 
   To illustrate this calculation,  FIG. 8  is a top view of an enlarged part of the calibration wafer showing the part of the vertical bars  16   a ,  16   b  of the superimposed actual cruciform pattern  14   a  of the stepper  100  and the actual cruciform pattern  14   b  of the scanner  200 . For each incremental position on the vertical bar  16 , the horizontal distance between the corresponding points on the cruciform pattern is calculated. For example, for position y 1 , shown in  FIG. 8 , the horizontal distance x A1 -x B1  between corresponding points of the actual cruciform pattern  14   a  of the stepper  100  and the actual cruciform pattern  14   b  of the scanner  200  is calculated. This calculation is repeated for each incremental position on the vertical bar  16 , and is assembled into the vertical component of the calibration array (x A -x B ), y=(x A1 -x B2 ), y 1 , (x A2 -x B2 ), y 2 , . . . (x An -x Bn ), y n . This vertical calibration array accounts for the difference in profile between the x-location mirror  114  of the stepper  100  and the x-location mirror  214  of the scanner  200 . 
   Similarly, for each incremental position on the horizontal bar, the vertical distances between the corresponding points in the cruciform patterns are calculated, and are assembled into the horizontal component of the calibration array x, (y A -y B )={x 1 , (y A1 -y B1 ), x 2  (y A2 -y B2 ), . . . x n  (y AN -y BA )}. The horizontal calibration array component accounts for the difference in profile between the y-location mirror  116  of the stepper  100  and the y-location mirror  216  of the scanner  200 . The complete calibration array (x A -x B ), y, x (y A -y B ) includes both the vertical and horizontal components. 
   During the manufacture of an integrated circuit according to the stepping and scanning pattern of  FIGS. 1-3 , the calibration array is used to determine and control the position of a production wafer  22  in the integrated circuit manufacturing center of  FIGS. 4A and 4B  as follows: The production wafer  22  is placed in the wafer stage  112  of the stepper  100 . The wafer stage  112 , light source, lens, and mask are aligned to produce region  1  and region  1  is exposed. During alignment, location data for the wafer stage  112  is obtained using the alignment mirrors  114 ,  116  and interferometers  118 ,  120  of the stepper. The wafer stage location is processed by the processor  122  of the stepper  100 , and is stored in memory  123 . After exposure of region  1 , the wafer stage  112  moves to region  2  and the mask is aligned and region  2  is exposed. 
   For the next layer, the production wafer  22  is removed from the stepper  100  and placed in the wafer stage  212  of the scanner  220 . During this transfer step, the production wafer  22  is maintained in the same orientation in the x-y plane. The wafer stage  212 , light source, lens and mask of the scanner are aligned in order to commence scanning of region  3  of the production wafer. In order for scanned sub-area  3  to align with sub-areas  1  and  2  previously produced, the scanner processor  222  transforms the location data obtained from the stepper  100  using the calibration array according to mathematical models known in the art, and the scanner  200  locates the wafer stage  212  according to the transformed location data using the alignment mirrors  214 ,  216  and interferometers  218 ,  220 . The transformed location data used to align wafer stage  212  accommodates the imperfections of the location mirrors of the wafer stages of the stepper  100  and scanner  200 . By using the transformed location data the wafer stage  212  can be correctly positioned so that the scanning process aligns with the previously exposed regions from the stepping process. 
   This manufacturing process may be illustrated using the flow chart set forth in  FIG. 9. A  production wafer  22  is placed in the wafer stage  112  of stepper  100  at step  400 . Next, the location of the wafer stage is determined using the interferometers  118 ,  120  and mirrors  114 ,  116  of the stepper  100  at step  402 . This location data of the wafer stage  112  of the stepper constitutes stepper array x PA , y PA . The stepper location array x PA , y PA  is processed by the processor  122  at step  404  and transmitted to the stepper memory  123  at step  406 . At step  408 , the photolithographic manufacturing process of the stepper  100  is completed. At step  410 , the production wafer  22  is transferred from the wafer stage  112  of the stepper  100  and placed in the wafer stage  212  of the scanner  200 . During this transfer step, the production wafer  22  maintains the same orientation in the x-y plane. In  FIGS. 4A and 4B  this orientation is with the notch  23  facing up. 
   In order to align the wafer stage  212  in the scanner  200 , the stepper location array x PA , y PA  of the wafer stage  112  of the stepper  100  is transformed by the calibration array. Specifically, the scanner processor  222  retrieves stepper location array x PA , y PA  from the memory  223  at step  412  and retrieves the calibration array from the memory  223  at step  414 . At step  416 , the calibration array (x A -x B ), y, x, (y A -y B ) is used to transform the stepper location array x PA , y PA  to produce a scanner location array x PB  y PB . The scanner location array x PB , y PB  is used to align the wafer stage  212  of the scanner  200  in step  420 . The scanner  200  completes its photolithographic manufacturing process at step  422 . 
   Under the improved alignment method for accommodating rotated wafers during the manufacture of an integrated circuit, an existing calibration array obtained using a calibration wafer  10  that is not rotated, is modified and used to determine and control the position of a production wafer  23  that is rotated when transferred from a stepper to a scanner. As shown in  FIGS. 14A and 14B , the production wafer  23  is placed in the wafer stage  512  of the stepper  500  with its notch  24  facing in a first direction (x). The wafer stage  512 , light source, lens, and mask (not shown) are aligned to produce sub-area  1  and sub area  1  is exposed as shown in FIG.  10 . During alignment, location data x NA , y NA  for the wafer stage  512  is obtained using the alignment mirrors  514 ,  516  and interferometers  518 ,  520  of the stepper  500 . This location is processed by the processor  522  of the stepper  500  at step  504  and transmitted to the stepper memory  523 . After exposure of sub-area  1 , the wafer stage  512  moves to sub-area  2  and the mask is aligned and sub-area  2 ,  FIG. 11 , is exposed. 
   For the next layer, after other processes, the production wafer  23  is placed in the wafer stage  612  of the scanner  620 . During this step, the production wafer  23  is rotated 90° in the x-y plane, so that its notch  24  faces in a second direction (y), to accommodate a single scanning pass. In the illustrated embodiment, the second direction (y) is orthogonal to the first direction (x). The present invention should not be limited, however, to the preferred embodiments shown and described in detail herein. Because of the rotation of the production wafer  23 , the calibration array obtained with a calibration wafer that was not rotated is modified by switching the sub-array x B  for the sub-array y B . Substituting y B  for x B  in the vertical component of the calibration array, (x A -y B ), y, accounts for the difference in profile between the x-location mirror  514  of the stepper  500  and the y-location mirror  616  of the scanner  600 . Similarly, substituting x B  for y B  in the horizontal component of the calibration array, x, (y A -x B ), accounts for the difference in profile between the y-location mirror  516  of the stepper  500  with the x-location mirror  614  of the scanner  600 . These modifications effect a switch of the vertical bar  16   a  with the horizontal bar  18   b  of the actual cruciform pattern produced in the calibration wafer  10  by the scanner  600 . The complete, modified calibration array is represented by (x A -y B ), y, x, (y A -x B ). 
   The wafer stage  612 , light source, lens and mask of the scanner  600  are aligned to commence scanning of sub-area  3  of the production wafer. In order for scanned sub-area  3  to align with sub-areas  1  and  2  previously produced, the scanner processor  622  transforms the location data x NA , y NA  obtained from the stepper  500  using the modified calibration array and mathematical models known in the art. Then the transformed location x NB , y NB  data is used by the scanner  600  to locate the wafer stage  612  according to the transformed location data x NB , y NB  using the alignment mirrors  614 ,  616  and interferometers  618 ,  620 . The transformed location data x NB , y NB  correctly locates the wafer stage  612  so that the scanning step aligns with the previously exposed areas from the stepping process. 
   Referring now to  FIG. 15 , a production wafer  23  is placed in the wafer stage  512  of stepper  500  at step  800 . Next, the location of the wafer stage is determined using the interferometers  518 ,  520  and mirrors  514 ,  516  of the stepper  500  at step  802 . This location data of the wafer stage  512  of the stepper  500  constitutes an array x NA , y NA . The stepper location array data x NA , y NA  is processed by the processor  522  of the stepper  500  at step  804  and is stored in memory  523  at step  806 . At step  808 , the photolithographic manufacturing process of the stepper  500  is completed. At step  810   a , the production wafer  23  is removed from the wafer stage  512  of the stepper  500 , rotated  900  at step  810   b  and placed in the wafer stage  612  of the scanner  600  at step  810   c . In  FIGS. 14A and 14B , the orientation of the production wafer  23  changes from the notch facing in the first direction (x) in the stepper  500  to facing in the second direction (y) in the scanner  600 . 
   To align the wafer stage  612  in the scanner  600 , the location data x NA , y NA  of the wafer stage  512  of the stepper  500  is transformed by the modified calibration array. Specifically, the scanner processor  622  retrieves the stepper location array data x NA , y NA  from the memory  623  at step  812  and retrieves the modified calibration array from the memory  623  at step  814 . At step  816 , the modified calibration array (x A -y B ), y, x, (y A -x B ) is used to transform the stepper location array x NA , y NA  to produce a scanner location sub-array x NB , y NB . The scanner location array data x NB , y NB  is used to align the wafer stage  612  of the scanner  600  in step  820 . The scanner  600  completes its photolithographic manufacturing process at step  822 . 
   The invention provides a method of transforming calibration data to accommodate the rotation of production wafers in successive stepping and scanning stages in the manufacture of integrated circuits. Variations of the disclosed embodiment will be readily apparent to those skilled in the art. For instance, different stepping and scanning processes could be used to practice the invention and different mathematical nomenclature could be used. In addition the various processors and memory devices could be distributed differently than the components of the manufacturing center described. Accordingly, it is to be understood that although the present invention has been described with reference to exemplary embodiments, various modifications may be made without departing from the spirit or scope of the invention which is defined solely by the claims appended hereto.