Patent Publication Number: US-7915651-B2

Title: Transparent double-injection field-effect transistor

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a divisional application claiming priority to and the benefit of U.S. patent application having Ser. No. 11/237,444, filed on Sep. 27, 2005 now U.S. Pat. No. 7,132,319 and entitled “TRANSPARENT DOUBLE-INJECTION FIELD EFFECT TRANSISTOR” which is a divisional application of U.S. patent application having Ser. No. 10/361,065 filed Feb. 7, 2003, issued as U.S. Pat. No. 6,998,656, granted Feb. 14, 2006 and entitled “TRANSPARENT DOUBLE-INJECTION FIELD EFFECT TRANSISTOR”. 
     This application is related to and commonly assigned application Ser. No. 10/361,045 filed Feb. 7, 2003, now U.S. Pat. No. 7,250,930, the entire disclosure of which is incorporated herein by reference. 
    
    
     TECHNICAL FIELD 
     This invention relates to transparent transistors and more particularly to transparent double-injection field-effect transistors. 
     BACKGROUND 
     Thin film transistors that have been used for driving display devices have generally comprised amorphous silicon, polycrystalline silicon, or the like. Since these materials exhibit photosensitivity to light in the visible spectrum, carriers are generated by incident light, and resistivity of a thin film in such transistors is lowered. For this reason, when the transistors are irradiated with light, the transistors may switch to an ON state, despite a need for the transistor to be controlled in an OFF state. Accordingly, heretofore, to keep the transistors at the OFF state when needed, the lowering of the carrier resistivity of the thin films due to the radiation by light has been prevented by the use of a light shielding layer made of a metal film or the like. 
     Liquid crystal display devices in particular have been widely used for portable electronic devices such as notebook personal computers. Requirements for such displays include high luminance, miniaturization, and energy saving. To meet these requirements, it is necessary to increase the area ratio of an effective emitting portion to the total area of each pixel in a display. However, the presence of a light shielding layer in the transistor for driving the liquid crystal display device as described above reduces the area ratio (“opening ratio”) of the light transmission portion to the area of the light shielding layer in each pixel. Accordingly, a reduction of transistor area by improving performance of the transistor or an improvement of luminance of a backlight are necessary to develop a display device having high luminance. However, the measure to improve the performance characteristics of the transistor limits manufacturing yield, leading to an increase in cost. Moreover, the measure to improve the luminance of the backlight increases energy consumption. Thus, elimination of the need for a light shielding layer is desirable. 
     Double-injection field-effect transistors have been known for some years and their advantages over some other types of transistors are known. Heretofore, double-injection field-effect transistors have conventionally been made mostly from materials that are optically opaque. 
     In the field of displays and in other technological fields, there is a need for transparent transistors. Among the applications of displays employing transparent transistors are displays known as “heads-up” displays and “augmented reality” displays which allow a user to view a real environment beyond the screen of the display. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The features and advantages of the disclosure will readily be appreciated by persons skilled in the art from the following detailed description when read in conjunction with the drawings, wherein: 
         FIGS. 1-8  are side elevation cross-sections of various embodiments of field-effect transistors made in accordance with the invention. 
         FIG. 9  is a flow chart illustrating an embodiment of a fabrication method performed in accordance with the invention. 
     
    
    
     The drawings are not drawn to any uniform scale. In particular, vertical and horizontal scales may differ from each other and may vary from one drawing to another. 
     DETAILED DESCRIPTION OF EMBODIMENTS 
     In the following detailed description, various embodiments of field-effect transistors made in accordance with the invention are described. Some embodiments are made entirely of substantially transparent materials. Some embodiments include some materials that are not transparent, but in specific applications these embodiments also provide benefits accruing from at least partial transparency. The terms “transparent” and “transparency” as used in the present specification and the appended claims means having substantial transmittance in some spectral range. Thus, in the sense used here, “transparent” and “transparency” include translucence. The spectral range of transparency may be in the visible portion of the electromagnetic spectrum, or in a non-visible portion of the electromagnetic spectrum such as the infrared portion, or may extend through portions of both visible and non-visible spectral ranges. 
     In accordance with the present invention, all of the embodiments illustrated in  FIGS. 1-8  include a field-effect transistor  10  having an anode  20 , a cathode  30 , a substantially transparent channel  40 , at least one substantially transparent gate insulator  50 ,  70 , and/or  90 , and at least one substantially transparent gate electrode  60 ,  80 , and/or  100 . The anode  20  and/or the cathode  30  of transistor  10  may also be substantially transparent. The transistor may also be formed on a substantially transparent substrate  15 . Electrode contacts and electrical interconnection leads (otherwise conventional and not shown in the drawings) may also be substantially transparent. 
     The “stack” consisting of the channel  40 , gate insulators  50 ,  70 , and/or  90 , and gate electrodes  60 ,  80 , and/or  100  should in general be substantially transparent, but for some applications, one or both of the anode and cathode may be made opaque, without losing the advantages of transparency in the remainder of the device. 
       FIG. 1  shows an embodiment of a field-effect transistor  10  with a single anode  20 , a single cathode  30  spaced apart from the anode, and a channel  40  extending across the space between the anode and cathode to conduct carriers. An anode gate insulator  50  at least partially covers channel  40 , overlapping a region of channel  40  adjacent to anode  20 . An anode gate electrode  60  extends over anode gate insulator  50  and overlaps a region of channel  40  adjacent to anode  20 . Optionally, anode gate electrode  60  may overlap at least part of anode  20 , as shown in  FIG. 1 . Similarly, a cathode gate insulator  70  at least partially covers channel  40 , overlapping a region of channel  40  adjacent to cathode  30 . A cathode gate electrode  80  extends over cathode gate insulator  70  and overlaps a region of channel  40  adjacent to cathode  30 . Optionally, cathode gate electrode  80  may overlap at least part of cathode  30 , as shown in  FIG. 1 . 
     An electrical bias voltage applied to anode gate electrode  60  can control a current of carriers in channel  40  near anode  20 . Similarly, a separate electrical bias voltage applied to cathode gate electrode  80  can control a current of carriers in channel  40  near cathode  30 . Thus, the embodiment shown in  FIG. 1  has four terminals: anode  20 , cathode  30 , anode gate electrode  60 , and cathode gate electrode  80 . 
     Channel  40 , anode gate insulator  50 , anode gate electrode  60 , cathode gate insulator  70 , and cathode gate electrode  80  are substantially transparent. 
     Either anode  20  or cathode  30  may also be made substantially transparent, thereby increasing the fractional portion of the field-effect device that is transparent. If both the anode and cathode are formed of transparent conductors or transparent semiconductors, the field-effect transistor  10  may be made entirely transparent. In any case, the transparent portions of field-effect transistor device  10  may be aligned over a light-emissive or light-transmissive portion of a display pixel, for example, providing a high fill factor. A display comprising an array of pixel elements may be made with one or more such field-effect transistors in each pixel element. 
     Anode gate electrode  60  and cathode gate electrode  80  may or may not partially overlap one another. If anode gate electrode  60  and cathode gate electrode  80  overlap one another at least partially (as shown in  FIG. 1 ), they are disposed facing opposite surfaces of the channel layer  40  (as shown in  FIG. 1 ). If anode gate electrode  60  and cathode gate electrode  80  do not overlap one another, they may be disposed facing opposite surfaces or on the same surface of the channel  40 . 
     Generally, the embodiment of a field-effect transistor device  10  of  FIG. 1  is operable by double injection: injection of positive carriers (holes) from anode  20  into channel  40 , and injection of negative carriers (electrons) from cathode  30  into channel  40 . Anode  20  is capable of extracting electrons from channel  40 , is not capable of injecting electrons into channel  40 , and is optionally capable of injecting holes into channel  40 . Cathode  30  is capable of extracting holes from channel  40 , is not capable of injecting holes into channel  40 , and is optionally capable of injecting electrons into channel  40 . One or both of the anode and cathode are capable of injecting carriers (electrons or holes) into channel  40  in accordance with the restrictions described above. 
     Materials suitable for anode  20 , cathode  30 , channel  40 , anode gate insulator  50 , anode gate electrode  60 , cathode gate insulator  70 , and cathode gate electrode  80  are described hereinbelow, in the section titled “FABRICATION.” 
       FIG. 2  shows another embodiment of a field-effect transistor  10  made in accordance with the invention. The embodiment of  FIG. 2  is a general double-gate (non-overlapping) device structure having four terminals (anode  20 , cathode  30 , anode gate electrode  60 , and cathode gate electrode  80 .) A single gate insulator  90  extends over the entire length of channel  40 . Anode gate electrode  60  and cathode gate electrode  80  are disposed facing the same side of channel  40 , but laterally spaced apart from each other. Anode gate electrode  60  at least partially overlaps channel  40 , optionally overlapping at least part of anode  20 . Cathode gate electrode  80  at least partially overlaps channel  40 , optionally overlapping at least part of cathode  30 . 
       FIG. 3  shows a third embodiment of a field-effect transistor  10  made in accordance with the invention. The embodiment of  FIG. 3  illustrates a general single-gate structure having three terminals (anode  20 , cathode  30 , and a single gate electrode  100 ). Gate electrode  100  at least partially overlaps channel  40 , optionally overlapping at least part of anode  20  and optionally overlapping at least part of cathode  30 . 
     While  FIGS. 1-3  do not show a substrate, those skilled in the art will recognize that the devices shown may be formed on a substrate. The substrate (shown in  FIGS. 4-8  and identified with reference numeral  15 ) may also be substantially transparent. In some applications, it may be convenient to form field-effect transistor  10  on a substrate  15 , and then remove the substrate, e.g., by conventional chemical etching or conventional chemical-mechanical polishing. In some applications, channel  40  may be formed in a substrate, whereby it may be made with a channel surface substantially flush with a surface of the substrate. In such cases, if the substrate is sufficiently thin, the entire thickness of the substrate may be occupied by channel  40 . 
       FIG. 4  shows a side elevation cross-section of a fourth embodiment of a field-effect transistor  10  made on a substrate  15  in accordance with the invention. This embodiment is an exemplary double-gate (overlapping) device structure with four terminals: anode  20 , cathode  30 , anode gate electrode  60 , and cathode gate electrode  80 . Channel  40  at least partially overlaps anode  20  and cathode  30 . The channel length is defined by the separation between anode  20  and cathode  30 . Anode gate electrode  60  at least partially overlaps channel  40  and optionally overlaps at least part of anode  20 . Cathode gate electrode  80  overlaps at least part of channel  40  and optionally overlaps at least part of cathode  30 . In this embodiment, the anode  20 , cathode  30 , and channel  40  may be layered in any order. 
       FIG. 5  shows a side elevation cross-section of a fifth embodiment of a field-effect transistor  10  made on a substrate  15  in accordance with the invention. This embodiment is an exemplary single-top-gate device structure with three terminals: anode  20 , cathode  30 , and a single gate electrode  100 . Channel  40  at least partially overlaps both anode  20  and cathode  30 . The channel length is defined by the separation between anode and cathode. Gate electrode  100  overlaps at least part of channel  40 , optionally overlaps at least part of anode  20 , and optionally overlaps at least part of cathode  30 . Anode  20 , cathode  30 , and channel  40  may be layered in any order. 
     This layer-ordering flexibility is illustrated by  FIG. 6 , which shows a side elevation cross-section of a sixth embodiment of a field-effect transistor  10  made on a substrate  15  in accordance with the invention. This embodiment is an exemplary single-top-gate device structure with three terminals: anode  20 , cathode  30 , and a single gate electrode  100 . Channel  40  at least partially overlaps both anode  20  and cathode  30 . The channel length is defined by the separation between anode and cathode. Gate electrode  100  overlaps at least part of channel  40 , optionally overlaps at least part of anode  20 , and optionally overlaps at least part of cathode  30 . Anode  20 , cathode  30 , and channel  40  may be layered in any order. Thus, in  FIG. 6 , anode  20 , cathode  30 , and channel  40  are layered in a different order from the order used to form the embodiment shown in  FIG. 5 . 
       FIG. 7  shows a side elevation cross-section of a seventh embodiment of a field-effect transistor  10  made on a substrate  15  in accordance with the invention. This embodiment is an exemplary single-bottom-gate device structure with three terminals: anode  20 , cathode  30 , and a single gate electrode  100 . Channel  40  at least partially overlaps both anode  20  and cathode  30 . The channel length is defined by the separation between anode and cathode. Gate electrode  100  overlaps at least part of channel  40 , optionally overlaps at least part of anode  20 , and optionally overlaps at least part of cathode  30 . Anode  20 , cathode  30 , and channel  40  may be layered in any order. 
       FIG. 8  shows a side elevation cross-section of an eighth embodiment of a field-effect transistor  10  made on a substrate  15  in accordance with the invention. This embodiment is an exemplary single-bottom-gate device structure with three terminals: anode  20 , cathode  30 , and a single gate electrode  100 . Channel  40  at least partially overlaps both anode  20  and cathode  30 . The channel length is defined by the separation between anode and cathode. Gate electrode  100  overlaps at least part of channel  40 , optionally overlaps at least part of anode  20 , and optionally overlaps at least part of cathode  30 . Anode  20 , cathode  30 , and channel  40  may be layered in any order. 
     Gate electrode  100  as shown in  FIGS. 7 and 8  may be considered a buried electrode as it is covered by other elements of the device structure. In practice, electrical connections to such a buried electrode are made by conventional via openings filled with conductive material and connecting to external connections. 
     The conventional interconnection leads needed to provide external connections to all the device terminals are not shown in the drawings. Those skilled in the art will recognize that such interconnection leads may be made substantially transparent through the use of transparent conductors. Such substantially transparent interconnection leads are electrically coupled to each of the anode  20 , cathode  30 , and each gate electrode  60 ,  80 , or  100 . 
     To make a substantially transparent field-effect transistor based on any one of the embodiments of  FIGS. 1-8 , the device includes a substantially transparent substrate, a substantially transparent anode, a substantially transparent cathode, a substantially transparent channel adapted to selectively conduct carriers between the anode and the cathode (which are spaced apart), at least one substantially transparent gate electrode adapted for controlling current in the channel, a substantially transparent gate insulator, and a substantially transparent interconnection lead electrically coupled to each of the anode, cathode, and gate electrode. The substantially transparent field-effect transistor is made to be operable by double injection. 
     Irrespective of transparency, a related device structure employs a source contact that is capable of injecting carriers (electrons for an n-channel device or holes for a p-channel device) into the channel (as in a conventional field-effect transistor), whereas the drain contact can efficiently extract carriers from the channel but cannot inject either carrier type into the channel region. A blocking interface is formed for injection into the channel from this drain contact. Although the forward current flow of this device is essentially identical to that of a conventional field-effect transistor, reverse current flow is suppressed (as for the double-injection field-effect transistor) due to the fact that neither contact (source or drain) is able to supply carriers to the channel for current flow in the reverse direction. Such a blocking contact may be formed by a Schottky diode junction, for example. 
     By forming a blocking contact for injection of the appropriate carrier type at either anode  20  or cathode  40 , a field-effect transistor may be formed with a channel  40  adapted to selectively conduct carriers between the anode and the cathode and wherein only one of the anode and cathode is adapted to inject carriers into the channel. Carrier injection from the other is blocked. The transistor has at least one gate electrode  60 ,  80 , or  100  adapted for controlling current in the channel; and at least one gate insulator  50 ,  70 , or  90 . As in the other embodiments described, the channel, gate insulator, and gate electrode may all be made substantially transparent. If full transparency is desired, the anode and cathode may also be made substantially transparent. 
     Fabrication 
       FIG. 9  shows an embodiment of a method for fabricating a double-injection field-effect transistor in accordance with the invention. Reference numerals S 10 -S 50  denote steps of the method embodiment illustrated. A suitable substrate  15  is provided (step S 10 ). Suitable transparent substrate materials include sapphire (Al 2 O 3 ), glass, and silicon dioxide. In step S 20 , a first conductive layer is deposited and patterned to form an anode  20 . Anode  20  may be formed of a p-type semiconductor (e.g., NiO, CuO x , SrCu 2 O 2 , BaCu 2 S 2 , LaCuOS, CuAIO 2 , CuYO 2 , CuScO 2 , or CuCrO 2 ) or may be formed of a high work function metal (e.g., Au, Pt, or Ni). In step S 25 , a second conductive layer is deposited and patterned to form a cathode  30  spaced apart from the anode. 
     Cathode  30  may be formed of an n-type semiconductor (e.g., In 2 O 3 , SnO 2 , ZnO, or GaN) or of low work function metal (e.g., Ca, Li, Na, or LaB 6 ). In some embodiments, steps S 20  and S 30  can be performed simultaneously by depositing and patterning a single conductive layer suitable for both anode and cathode. In step S 30 , a transparent channel extending at least between the anode and cathode is formed. Channel  40  may be formed of a transparent semiconductor (e.g., In 2 O 3 , SnO 2 , ZnO, GaN, NiO, SrCu 2 O 2 , BaCu 2 S 2 , LaCuOS, CuAIO 2 , CuYO 2 , CuScO 2 , CuCrO 2 , CulnO 2 , ZnS, BaS, or SrS) and may be insulating, semi-insulating, or lightly doped (n-type or p-type). At least one thin transparent insulating layer is deposited (step S 40 ) and optionally patterned (step S 45 ) to form at least one gate insulator  50 ,  70 , or  90 . In the embodiments of  FIGS. 7 and 8 , for example, it may not be necessary to pattern the gate insulator. Gate insulators  50 ,  70 , and  90  are formed of a wide-bandgap insulator (e.g., SiO x , SiN x , SiO x N y , AlO x , or TaO x ); such wide-bandgap insulators are generally transparent. The thickness of the gate insulators  50 ,  70 , and  90  should be less than about 500 nanometers for conventional dielectrics. The thickness may be made less than 50 nm for some gate insulator materials and may be more that 500 nanometers for high-k dielectrics used as the gate insulator. 
     In step S 50 , at least one transparent conductive layer is deposited and patterned to form at least one gate electrode  60 ,  80 , or  100  overlapping at least a portion of the transparent channel  40  and at least partially aligned with the gate insulator. Gate electrodes  60 ,  80 , and  100  are formed of a metal (e.g., Au, Al, Cu, In, Ti, W, Ni, or Pt) or doped semiconductor (e.g., In 2 O 3 , SnO 2 , or ZnO), optionally transparent. 
     Those skilled in the art will readily understand that the order of these steps may be varied according to the details of the embodiment to be fabricated, as in the examples of  FIGS. 5 and 6  and  FIGS. 7 and 8 , which have different layer orders. The order of steps may also depend on whether there is to be a top or bottom gate or both, which side of the completed device is to be adjacent to the substrate, etc. 
     In applications to displays, a substrate including a previously formed pixel element may be provided. Then steps of depositing and patterning first and second transparent conductive layer(s) to form anode  20  and cathode  30  includes at least partially aligning the anode and cathode with the previously formed pixel element. Thus, practice of the present invention provides a method for using a substantially transparent double-injection field-effect transistor in an array of pixel elements of a display. An array of substantially transparent double-injection field-effect transistors (one or more per pixel element) is formed as described above, aligned with the pixels of the display. 
     Specifically, a method of using a substantially transparent double-injection field-effect transistor includes forming an array of pixel elements for a display, forming at least one substantially transparent double-injection field-effect transistor in at least partial alignment with each pixel element of the array and electrically coupled with each pixel element, and controlling each pixel element of the array with the field-effect transistor corresponding to the pixel element. 
     While the invention should not be construed as being limited to the consequences of any particular theory of operation, principles of light transmittance through thin films are quite well understood by those skilled in the art and are believed to apply to the embodiments described herein. Generally, light that is reflected at an interface or absorbed within a particular film is not transmitted. Thus, conventional anti-reflection coatings may be beneficial for some applications of the invention to reduce or prevent reflection and therefore allow increased transmission. Materials may be selected for low absorption coefficient and film thicknesses may be kept sufficiently small to reduce undesirable absorption to an acceptable level. 
     In a broad sense, one aspect of the invention is a field-effect transistor structure comprising an anode, a cathode spaced apart from the anode, a substantially transparent channel adapted to selectively conduct carriers between the anode and the cathode, a substantially transparent gate electrode adapted for controlling current in the channel, and a substantially transparent gate insulator, the field-effect transistor being adapted to be operable by double injection. 
     As mentioned hereinabove, a transparent display having an array of pixel elements may be made in which each pixel element of the display has at least one such double-injection field-effect transistor. Field-effect transistors made in accordance with the invention can be used to make an integrated circuit, a substrate with microelectronics, or an electronic device, in addition to the displays discussed above. 
     Another aspect of the invention is a double-injection field-effect transistor structure including a substantially transparent substrate and substantially transparent anode and cathode. Yet another aspect of the invention is a field-effect transistor having first and second gate electrodes, both adapted for controlling current in the channel and at least one substantially transparent gate insulator. Yet another aspect of the invention is a field-effect transistor in which only one of the anode and cathode is adapted to inject carriers into the channel, the other electrode having injection blocked. 
     Another aspect of the invention is a method for fabricating a double-injection field-effect transistor, the method embodiment described and illustrated above and its variations. 
     INDUSTRIAL APPLICABILITY 
     The transparent double-injection transistor and associated methods are especially useful in displays such as liquid-crystal displays and in display applications such as heads-up displays and augmented reality displays. 
     Although the foregoing has been a description and illustration of specific embodiments of the invention, various modifications and changes thereto can be made by persons skilled in the art without departing from the scope and spirit of the invention as defined by the following claims. For example, the order of process steps may be varied, multiple layers of transparent transistors may be stacked with interlayer dielectrics separating the layers, and the transparent device structures may be applied for other purposes, such as switchable holograms or reconfigurable optical filters.