Patent Publication Number: US-7589417-B2

Title: Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same

Description:
BACKGROUND OF THE INVENTION 
   1). Field of the Invention 
   This invention relates generally to a microelectronic assembly having a microelectronic die, and more specifically to systems that are used to cool a microelectronic die of such an assembly. 
   2). Discussion of Related Art 
   As semiconductor devices, such as processors and processing elements, operate at continually higher data rates and higher frequencies, they generally consume greater current and produce more heat. It is desirable to maintain operation of these devices within certain temperature ranges for reliability reasons, among others. Conventional heat transfer mechanisms have restricted the operation of such devices to lower power levels, lower data rates, and/or lower operating frequencies. Conventional heat transfer mechanisms have limited heat transfer capability due to size and location restrictions, as well as thermal limitations. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention is described by way of examples with reference to the accompanying drawings, wherein: 
       FIG. 1  is a cross-sectional side view of a portion of a wafer substrate which is partially processed to manufacture a microelectronic assembly, according to an embodiment of the invention; 
       FIG. 2  is a view similar to  FIG. 1 , after an opening is etched in a dielectric layer of the partially processed wafer substrate and one thermoelectric element is formed in the opening; 
       FIG. 3  is a view similar to  FIG. 1 , after another thermoelectric element, having an opposite doping conductivity type and the thermoelectric element that is formed in  FIG. 2 , is formed, as well as other components above an integrated circuit of the partially processed wafer; 
       FIG. 4  is a view similar to  FIG. 3 , after the wafer is finally processed, singulated into individual dies, and one die is flipped onto a carrier substrate and mounted to the carrier substrate to finalize the manufacture of a microelectronic assembly according to an embodiment of the invention; 
       FIG. 5  is a side view representing a microelectronic assembly according to another embodiment of the invention having thermoelectric components on a side opposing an active side of a singulated die, and wirebonded to a package substrate on an active side of the die; 
       FIG. 6  is a side view representing a microelectronic assembly according to a further embodiment of the invention, which defers from the embodiment of  FIG. 5  in that short plugs electrically connect thermoelectric elements on one side of the die with conductive interconnection elements formed on an opposing, active side of the die; 
       FIG. 7  is a side view of two wafer substrates, one carrying active integrated circuits, and the other one carrying thermoelectric elements, used to manufacture a microelectronic assembly according to a further embodiment of the invention; 
       FIG. 8  is a view similar to  FIG. 7 , after the thermoelectric elements are located against and attached to contact pads on the integrated circuit; 
       FIG. 9  is a view similar to  FIG. 8 , after the assembly of  FIG. 8  is singulated into individual pieces, and an integrated circuit and a heat sink are mounted to one of the pieces; 
       FIG. 10  is a top plan view illustrating components of an electronic assembly according to a further embodiment of the invention, wherein portions of a thermoelectric module are formed on a die and on a heat spreader, and the thermoelectric module is completed when the heat spreader is placed on the die; 
       FIG. 11  is a cross-sectional side view illustrating a microelectronic assembly according to a further embodiment of the invention, having a metal layer plated on a backside of a die to spread heat from a hot spot to a thermoelectric module; and 
       FIG. 12  is a top plan view illustrating relative sizes of hot spots and thermoelectric modules to cool the hot spots. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   A microelectronic assembly is provided, having thermoelectric elements formed on a die so as to pump heat away from the die when current flows through the thermoelectric elements. In one embodiment, the thermoelectric elements are integrated between conductive interconnection elements on an active side of the die. In another embodiment, the thermoelectric elements are on a backside of the die and electrically connected to a carrier substrate on a front side of the die. In a further embodiment, the thermoelectric elements are formed on a secondary substrate and transferred to the die. 
     FIG. 1  of the accompanying drawings illustrates a portion of wafer  10  which is partially processed to manufacture a microelectronic assembly, according to an embodiment of the invention. The wafer  10  includes a wafer substrate  12 , an integrated circuit  14 , and a dielectric material  16 . 
   The wafer substrate  10  is typically made of silicon or another semiconductor material. The integrated circuit  14  includes integrated circuit elements  18  that are formed in and on the wafer substrate  12 . The integrated circuit elements  18  include transistors, capacitors, diodes, etc. The integrated circuit  14  further includes a plurality of alternating dielectric layers and metal layers. The metal layers include a power plane  20  and a ground plane  22 . The integrated circuit  14  further includes contact pads  24 , including a power contact  24 P, a ground contact  24 G, and a signal contact  24 I. 
   Further, plugs, vias, and metal lines in the dielectric layers of the integrated circuit  14  form electric links  26 , only a few of the electric links  26  being shown. 
   The electric links  26  include a power electric link  26 P 1  interconnecting the power contact pad  24 P with the power plane  7 , and a power electric link  26 P 2  interconnecting the power plane  20  with the integrated circuit elements  18 . As such, power can be provided through the power contact pad  24 P, the power electric link  26 P 1 , the power plane  7 , and the power electric link  26 P 2  to one or more of the integrated circuit elements  18 . 
   The electric links  26  include a ground electric link  26 G 1  interconnecting the ground contact pad  24 G with the ground plane  22 , and a ground electric link  26 G 2  interconnecting the ground plane  22  with the integrated circuit elements  18 . As such, ground can be provided through the ground contact pad  24 G, the ground electric link  26 G 1 , the ground plane  22 , and the ground electric link  26 G 2  to one or more of the integrated circuit elements  18 . 
   A signal electric link  26 I interconnects a signal contact pad  24 I with one or more of the integrated circuit elements  18 , and is disconnected from both the power plane  20  and the ground plane  22 . Signals can be provided to and from the integrated circuit elements  18  through more signal electric links such as the signal electric link  26 I. 
   The dielectric material  16  is formed in a layer over the integrated circuit  14 . The dielectric material  16  initially covers the contact pads  24 . A first opening  28  is then etched in the dielectric material  16 , which exposes an area of the power contact pad  24 P. 
   As illustrated in  FIG. 2 , an thermoelectric element  30  is subsequently formed in the opening  28  of  FIG. 1 . Layers of the thermoelectric element  30  may be electrolessly plated or sputtered, and include a diffusion barrier layer  32 , a p-doped semiconductor material  34  such as p-doped Bi 2 Te 3 , alloys of Bi 2 Te 3  and Sb 2 Te 3 , or alloys of Si and Ge, and a diffusion barrier layer  36 , formed sequentially on top of one another. 
   As illustrated in  FIG. 3 , another thermoelectric element  40  is formed adjacent to the thermoelectric element  30  on the power contact pad  24 P. The thermoelectric element  40  is formed in an opening that is formed in the dielectric material  16  after the thermoelectric element  30  is formed. In order to form the opening for the thermoelectric element  40 , a photoresist layer is formed over the dielectric material  16 , and an opening is masked in the photoresist layer above where the thermoelectric element  40  is to be formed. Using the photoresist layer as a mask, the opening where the thermoelectric element  40  is to be formed is then etched in the dielectric material  16 . The thermoelectric element  40  includes a diffusion barrier layer  42 , an n-doped semiconductor material  44  such as n-doped Sb 2 Te 3 , alloys of Bi 2 Te 3  and Sb 2 Te 3 , or alloys of Si and Ge, and a diffusion barrier layer  46  formed sequentially on top of one another. The thermoelectric element  40  is thus the same as the thermoelectric element  30 , except that the semiconductor material  34  is p-doped, whereas the semiconductor material  44  is n-doped. 
   Conductive spacer components  48  and  50  are subsequently formed on the ground and signal contact pads  24 G and  24 I, respectively. Openings in which the conductive spacer components  48  and  50  are formed may be etched by forming a photoresist layer over the dielectric material  16  and the thermoelectric elements  30  and  40 , masking the photoresist layer, and then using openings in the masked photoresist layer to etch the openings where the conductive spacer components  48  and  50  are to be formed in the dielectric material  16 . The conductive spacer components  48  and  50  are typically made of a metal. 
   Conductive interconnection elements  54  are subsequently formed, each on a respective one of the thermoelectric elements  30  or  40 , or the conductive spacer components  48  or  50 . The conductive interconnection elements  54  stand proud of the dielectric material  16  so as to have upper surfaces  56  that are in a common plane above an upper plane of the dielectric material  16 . 
   Only a portion of the wafer  10  is illustrated in  FIGS. 1 to 3 . It should, however, be understood that the wafer includes a plurality of the integrated circuits  14  that are formed in rows and columns extending in x- and y-directions across the wafer, each having an identical layout of thermoelectric elements  30  and  40 , conductive spacer components  48  and  50 , and conductive interconnection elements  54 . 
   The wafer  10  is subsequently diced or singulated into individual dies, each die carrying a respective integrated circuit and related connections. Each die will include components represented in the portion of the wafer  10  illustrated in  FIG. 3 . 
     FIG. 4  illustrates one such die  10 A, which is flipped and located on a carrier substrate in the form of a package substrate  60 . Package terminals  62  are formed on an upper surface of the package substrate  60 . Each one of the conductive interconnection elements  54  is in contact with a respective package terminal  62 . 
   The entire microelectronic assembly  70 , including the die  10 A and the package substrate  60 , is then inserted in a furnace to reflow the conductive interconnection elements  54 . The conductive interconnection elements  54  soften and melt, and are subsequently allowed to cool and again solidify. Each conductive interconnection element  54  is then attached to a respective package terminal  62 , thereby mounting the die  10 A to the package substrate  60  and electrically interconnecting the die  10 A and the package substrate  60 . 
   In use, power can be provided through the package substrate  60  through one of the package terminals  62 A to the thermoelectric element  30 . The current flows toward the die through the n-doped semiconductor material  44 . As will be understood in the art of thermoelectrics, current flowing through an n-doped semiconductor material causes heat to be pumped in a direction opposite to the direction that the current flows. As such, heat is pumped in a direction away from the integrated circuit  14  through the thermoelectric element  30  toward the package substrate  60 . The current flowing through the thermoelectric element  30  is bifurcated. One portion of the current provides power to some of the integrated circuit elements  18 , while some of the current flows through the power contact pad  24 P and then through the thermoelectric element  40  to the package terminal  62 B. The current flowing through the p-doped semiconductor material  34  causes heat to be pumped in a direction that the current flows. The current flowing through the p-doped semiconductor material  34  flows away from the integrated circuit  14 , and thus pumps heat away from the integrated circuit  14 . 
   In another embodiment, the power contact pads providing power to the thermoelectric elements may be separate from power contact pads providing power to the circuit. This will allow separate control over the thermoelectric unit. Such a configuration may be useful where it is necessary to maintain voltage provided to the circuit and not have the voltage be affected by power provided to the thermoelectric module. 
   It can thus be seen that the p-doped semiconductor material  34  and n-doped semiconductor material  44  both pump heat away from the integrated circuit  14 . Localized cooling can thus be provided to the integrated circuit  14 . More structures, such as the structure including the thermoelectric elements  30  and  40  may be formed at desired locations across the integrated circuit  14 , where additional cooling may be required. What should also be noted is that the same array of package terminals  62  that provide current to the thermoelectric elements  30  and  40  also provide power, ground, and signal to the integrated circuit  14 . What should further be noted is that cooling is provided where it is required. When a certain region in an x-y direction of an integrated circuit requires power, the power is provided through thermoelectric elements in the same region. An increase in power requirements in a particular area will correspond with an increase in heat being generated in that particular area. An increase in power in the particular area will also correspond with an increase in current flowing through thermoelectric elements in that particular area. As such, current flowing through thermoelectric elements in a particular area will increase when there is an increase of heat being generated in the particular area. 
     FIG. 5  illustrates another microelectronic assembly  70 , including a carrier substrate in the form of a package substrate  72 , a die  74  mounted to the package substrate  72 , thermoelectric elements  76  on the die  74 , an integrated heat spreader  78 , and a heat sink  80 . The die  74  is mounted and electrically connected through conductive interconnection elements  82  to the package substrate  72 . 
   The thermoelectric elements  76  are formed in the same manner as the thermoelectric elements  30  and  40  of  FIG. 3 . Some of the thermoelectric elements  76  have p-doped semiconductor materials, and some have n-doped semiconductor material. The thermoelectric elements  76  are arranged such that, when current flows therethrough, heat is pumped from an upper surface of the die  76  toward the integrated heat spreader  78 . 
   The integrated heat spreader  78  is in direct contact with the thermoelectric elements  76 , and the heat sink  80  is located on the integrated heat spreader  78 . As will be commonly understood, the heat sink  80  includes a base and plurality of fins extending from the base, from which the heat can be convected to surrounding atmosphere. 
   Wirebonding wires  84  are provided, through which current can be provided to or be conducted away from the thermoelectric elements  76 . Each wirebonding wire  84  has one end connected to a pad on an upper surface of the die  74 , the pad being connected to a first of the thermoelectric elements  76 . An opposing end of the respective wirebonding wire  84  is bonded to a package terminal on the package substrate  72 . The current flows from the package terminal through the respective wirebonding wire  84  and the respective contact through the first thermoelectric element  76 . The current can then flow through an even number of the thermoelectric elements  76  and return through another one of the wirebonding wires  84  to the package substrate  72 . 
     FIG. 6  illustrates a microelectronic assembly  86  according to a further embodiment of the invention. The microelectronic assembly  86  is the same as the microelectronic assembly  70  of  FIG. 5 , and like reference numerals indicate like components. The primary difference is that the microelectronic assembly  86  includes a die  88  which is much thinner than the die  74  of  FIG. 5 . Short plugs  90  are formed through the die  88 . Some of the thermoelectric elements  76  are aligned with respective ones of the plugs  90  and respective ones of the conductive interconnection elements  82 . Current can be provided through a respective conductive interconnection element  82  and a respective plug  90  to a respective thermoelectric element  76 . The current can then flow through an even number of the thermoelectric elements  76  and return through another one of the plugs  90  and another one of the conductive interconnection elements  82  aligned with one another. 
     FIGS. 7 through 8  illustrate the manufacture of a microelectronic assembly, wherein thermoelectric elements are manufactured on a separate substrate and then transferred to integrated circuits at wafer level. The combination wafer is then singulated into individual pieces. 
   Referring specifically to  FIG. 7 , a wafer  94  is provided, having a wafer substrate  96 , integrated circuits  98  formed on the wafer substrate  96 , and contact pads  100  formed on the integrated circuits  98 .  FIG. 7  also illustrates a transfer substrate  102  having thermoelectric elements  104  formed thereon in a manner similar to the thermoelectric elements  30  and  40  of  FIG. 3 .  FIG. 7  also illustrates interconnection structures in the form of spacers  106 . The thermoelectric elements  104  and spacers  106  have conductive interconnection elements  108  formed thereon. 
   As illustrated in  FIG. 7 , each conductive interconnection element  108  is brought into contact with a respective one of the contact pads  100 . The conductive interconnection elements  108  are then attached to the contact pads  100  by a thermal reflow process. A combination wafer  110  is provided that includes the wafer substrates  96  and  102 . 
   Reference is now made to  FIG. 9 . The combination wafer  110  of  FIG. 8  is singulated into separate pieces  112 . The wafer  96  is thus separated into pieces  96 A and  96 B, and the wafer  102  is separated into pieces  102 A and  102 B. The pieces  112  are identical, and each includes a respective integrated circuit  98 . Metallization is provided in an upper level of the pieces  102 A and  102 B. The pieces may be mounted on supporting substrates and wirebonded to the supporting substrates. Alternatively, the pieces  102 A and  102 B may be thinned down and through-vias in the pieces  102 A and  102 B may connect the metallization electrically to the supporting substrates. 
   An integrated heat spreader  114  can then be mounted to a backside of the wafer substrate portion of a piece  96 A, i.e., opposing the integrated circuit  98 , and a heat sink  116  can be located and mounted against the integrated heat spreader  114 . 
     FIG. 10  illustrates components of a microelectronic assembly  120  which is partially manufactured according to a further embodiment of the invention. The components of the microelectronic assembly  120  include a die  122 , a thermally conductive metal heat spreader  124 , a first plurality of conductive copper components  126 , a second plurality of conductive copper components  128 , and a plurality of thermoelectric elements  130 . 
   The die  122  is as hereinbefore described, for example, with reference to  FIG. 5 , and is first mounted to a package substrate as described with reference to  FIG. 5 . A microelectronic circuit is thus formed on a front side of a supporting substrate of the die  122 . The first copper components  126  are subsequently formed, e.g., by plating, on a backside of the supporting substrate. 
   A thin layer of electrically insulating material is formed on a surface of the heat spreader  124 . The second plurality of components  128  are formed, e.g., by plating, on the thin layer of electrically insulating material. The thermoelectric elements  130  are subsequently formed on the second plurality of components  128 . One p-doped thermoelectric element  130 A and one n-doped thermoelectric element  130 B is formed on each respective one of the second plurality of components  128 . 
   The heat spreader  124  is flipped so that the thermoelectric elements  130  are an opposing side than shown in  FIG. 10 . The thermoelectric elements  130  are positioned above the first plurality of components  126 . The die  122  and heat spreader  124  are then brought relatively toward one another until the thermoelectric elements  130  contact the first plurality of components  126 . The first plurality of components  126  provide missing connections between the thermoelectric elements  130  so that the thermoelectric elements  130 , together with the components  126  and  128 , are connected in series. 
   It can thus be seen that a thermoelectric circuit is formed directly on the die  122  and between the die  122  and the heat spreader  124 . The thermoelectric elements  130  are manufactured at a high temperature and under processing conditions that may cause damage to the microelectronic circuit of the die  122 . However, by manufacturing the thermoelectric elements  130  first on the separate heat spreader  124 , and subsequently placing the thermoelectric elements  130  on the die  122 , damage to the die  122  can be avoided. 
     FIG. 11  illustrates a microelectronic assembly  140 , according to a further embodiment of the invention, including a package substrate  142 , a die  144 , a thermally conductive metal heat spreader  145 , a copper metal layer  146 , a thermoelectric module  148 , and a thermal interface material  150 . 
   The die  144  has a microelectronic circuit formed on a front side of a supporting substrate thereof. The die  144  is typically thinned down to a thickness of less than  100  microns. Interconnection elements  151  are formed on a front side of the die  144 , and are used to connect the die  144  electrically and structurally to the package substrate  142 . The die  144  and package substrate  142  are thus similar to the die  74  and package substrate  72  described with reference to  FIG. 5 . 
   The metal layer  146  is plated on a backside of the supporting substrate of the die  144 . An opening is made in the metal layer  146 , and the thermoelectric module  148  is manufactured within the opening. 
   In use, the metal layer  146  between the thermoelectric module  148  and the die  144  serves to spread heat from a hot spot created by the microelectronic circuit of the die  144 .  FIG. 12  illustrates that more than one hot spot  152 A and  152 B may be formed over an area of the die  144 . A respective thermoelectric module  148 A and  148 B is manufactured over a respective one of the hot spots  152 A and  152 B. The thermoelectric modules  148 A and  148 B are relatively large when compared to the hot spots  152 A and  152 B, so that they can remove a relatively large amount of heat. Notwithstanding the sizes of the thermoelectric modules  148 A and  148 B, when compared to the hot spots  152 A and  152 B, outer regions of the thermoelectric modules  148 A and  148 B can still remove heat from the hot spots  152 A and  152 B, because heat from the hot spot will spread laterally as it flows through the silicon and the portion of the metal layer ( 146  in  FIG. 11 ) between the respective thermoelectric module  148 A or  148 B and the respective hot spot  152 A or  152 B. 
   Referring again to  FIG. 11 , the interface material  150  is subsequently formed over the thermoelectric module  148  and the metal layer  146 , and the heat spreader  145  is located against the thermal interface material  150 . Heat conducting through the metal layer  146  and being pumped by the thermoelectric module  148  can conduct through the interface material  150  and the heat spreader  145  and be convected to atmosphere. 
   A power cable  154  is connected to the thermoelectric module  148  to provide power thereto. In the present embodiment, an opening  156  is formed through the heat spreader  145 , and the cable  154  extends through the opening  156 . Additionally, a heat sink (not shown) with fins can be placed upon the heat spreader  145 . 
   While certain exemplary embodiments have been described and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative and not restrictive of the current invention, and that this invention is not restricted to the specific constructions and arrangements shown and described since modifications may occur to those ordinarily skilled in the art.