Patent Publication Number: US-9846756-B2

Title: Layout method for printed circuit board

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application is a Continuation of pending U.S. patent application Ser. No. 14/043,197, filed on Oct. 1, 2013 and entitled “LAYOUT METHOD FOR PRINTED CIRCUIT BOARD”, which claims the benefit of China Patent Application No. PCT/CN2012/082884, filed on Oct. 12, 2012, the entirety of which is incorporated by reference herein. 
    
    
     BACKGROUND OF THE INVENTION 
     Field of the Invention 
     The invention relates to a layout method for a printed circuit board (PCB), and more particularly, to a layout method of an embedded multi-chip package (eMCP) for a PCB. 
     Description of the Related Art 
     Recently, electrical products tend to have higher efficiencies and be smaller. Therefore, sizes of printed circuit boards (PCB) and chips mounted on the PCBs are continuing to be miniaturized, while frequencies of electronic signals transmitted on the PCBs are being increased. 
     A PCB layout diagram file (design) is created based on a circuit schematic diagram, and includes a plurality of layout modules. When designing a PCB using layout software (e.g. an electronic design automation (EDA) tool), signal performances of the components should be considered. For example, time is needed to arrange the placement of a memory and other related chips and the traces of high speed buses between the memory and the chips for a product manufacturer. 
     BRIEF SUMMARY OF THE INVENTION 
     Layout methods for a printed circuit board (PCB) are provided. An embodiment of a layout method for a PCB is provided. A memory type of a dynamic random access memory (DRAM) to be mounted on the PCB is obtained. A module group is obtained from a database according to the memory type of the DRAM, wherein the module group comprises a plurality of routing modules. A plurality of PCB parameters are obtained. A specific routing module is selected from the module group according to the PCB parameters. The specific routing module is implemented into a layout design of the PCB. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip. 
     Furthermore, another embodiment of a layout method for a PCB is provided. Electronic design automation (EDA) information regarding a PCB EDA tool is obtained. A memory type of a dynamic random access memory (DRAM) to be mounted on the PCB is obtained. A module group is obtained from a database according to the memory type of the DRAM and the EDA information, wherein the module group comprises a plurality of routing modules. A plurality of PCB parameters are obtained. A specific routing module is selected from the module group according to the PCB parameters. The specific routing module is implemented into a layout design of the PCB provided by the PCB EDA tool. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip. 
     Moreover, another embodiment of a layout method for a PCB is provided, wherein the layout method is performed by a server. A project ID corresponding to the PCB from a client is obtained. The project ID is recognized to determine whether the project ID exists in an account list. At least one module group from a database of a server is obtained according to the project ID when the project ID does not exist in the account list, wherein the module group comprises a plurality of routing modules. A plurality of PCB parameters are obtained. At least one specific routing module is selected from the module group according to the PCB parameters. The specific routing module is provided to the client. The project ID is added into the account list. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip. The client implements the specific routing module into a layout design of the PCB. 
     A detailed description is given in the following embodiments with reference to the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
       The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
         FIG. 1  shows a schematic illustrating an embedded multi-chip package (eMCP); 
         FIG. 2  shows a circuit design simulation system for a printed circuit board according to an embodiment of the invention; 
         FIG. 3A  shows a schematic illustrating a layout module for a PCB according to an embodiment of the invention; 
         FIG. 3B  shows an example illustrating a routing configuration of the layout module of  FIG. 3A ; 
         FIG. 3C  shows a table illustrating a module group of a specific eMCP chip (e.g. LPDDR2+eMMC); 
         FIG. 4  shows a layout method for a PCB according to an embodiment of the invention, wherein the layout method is performed by the circuit design simulation system of  FIG. 2 ; 
         FIG. 5  shows a schematic illustrating a layout design according to an embodiment of the invention; 
         FIG. 6A  shows a schematic illustrating a layout module for a PCB according to another embodiment of the invention; 
         FIG. 6B  shows a schematic illustrating a layout module for a PCB according to another embodiment of the invention; 
         FIG. 7  shows a layout server and a plurality of clients according to an embodiment of the invention; and 
         FIG. 8  shows a layout method for a PCB according to another embodiment of the invention, wherein the layout method is performed by the layout server of  FIG. 7 . 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims. 
       FIG. 1  shows a schematic illustrating an embedded multi-chip package (eMCP)  100 . In general, eMCP is a kind of package type for mobile memory which integrates a mobile DRAM and a flash memory into one chip. In  FIG. 1 , the eMCP  100  comprises an Embedded MultiMediaCard (eMMC)  120  and a mobile DDR  150 . The eMMC  120  conforms to a flash memory card standard, which describes an architecture consisting of an embedded storage solution with a controller  130  and a flash memory  140 . Furthermore, the controller  130  and the flash memory  140  are integrated in a ball grid array (BGA) package. Moreover, Mobile DDR  150  (also known as Low Power DDR (LPDDR)) is a type of double data rate (DDR) synchronous DRAM for mobile computers. Using the eMCP  100  helps to save a lot of hardware space, thus allowing mobile devices (e.g. a smart phone) to be thinner and casings to be enclosed more properly. The major defect of an eMCP is the design issues of high-speed memory buses on PCBs. 
       FIG. 2  shows a circuit design simulation system  200  for a printed circuit board according to an embodiment of the invention. The circuit design simulation system  200  comprises a processor  210 , a display  220 , a storage unit  230  and a user interface  240 . The display  220 , the storage unit  230  and the user interface  240  are coupled to the processor  210 . The user interface  240  is used to receive layout information or settings (e.g. layout parameters, net-lists and so on) provided by a designer. The storage unit  230  comprises a database for storing a plurality of layout modules. The processor  210  is used to perform a PCB electronic design automation (EDA) tool, which obtains the layout information or settings from the user interface  240  and performs a PCB circuit layout design according to the layout modules from the storage unit  230 , so as to display a layout design on the display  220 . In one embodiment, the storage unit  230  is disposed in a server. 
       FIG. 3A  shows a schematic illustrating a layout module  300  for a PCB according to an embodiment of the invention. The layout module  300  comprises a memory chip  310  and a main chip  320 , wherein the memory chip  310  is an eMCP package and the main chip  320  is a system on chip (SOC) chip. By designing the PCB routing between the chips  310  and  320  to be a routing module in advance, the design of high-speed memory buses is simplified for the PCB, whereby it is easy to mount or repair the components of the PCB and costs and design times are decreased for a product manufacturer. 
       FIG. 3B  shows an example illustrating a routing configuration of the layout module  300  of  FIG. 3A . In  FIG. 3B , the chips  310  and  320  are BGA packages. In  FIG. 3B , only a portion of the pads/vias  330 , a portion of the pads/vias  340  and a portion of the traces  350  are displayed to simplify description, wherein the pads/vias  330  are designed for the pins of the chip  310 , the pads/vias  340  are designed for the pins of the chip  320 , and the traces  350  are designed for interconnection between the chips  310  and  320 . According to various PCB standard parameters (e.g. layers, stack-up and via type, etc.), a plurality of routing modules can be provided for the same eMCP chip  310  and the same SOC chip  320 .  FIG. 3C  shows a table illustrating a module group of a specific eMCP chip (e.g. LPDDR2+eMMC). In the table of  FIG. 3C , the module group comprises 12 routing modules MMD_S 1 -MMD_S 6  and MMD_D 1 -MMD_D 6  for the chips  310  and  320 . Furthermore, the PCB standard parameters comprise a layer count (e.g. 8 or 10 Layers), a stack-up setting (e.g. high density interconnect (HDI)+1 or HDI+2) and a via type (stagger via or stacked via). For example, the routing modules MMD_S 1 -MMD_S 6  are provided for 8-layer PCBs, and the routing modules MMD_D 1 -MMD_D 6  are provided for 10-layer PCBs. Moreover, a component placement parameter indicates that the components can be mounted on a single-sided or double-sided PCB. 
       FIG. 4  shows a layout method for a PCB according to an embodiment of the invention, wherein the layout method is performed by the circuit design simulation system of  FIG. 2 . Referring to  FIG. 2  and  FIG. 4  together, in step S 410 , electronic design automation (EDA) information regarding a PCB EDA tool is obtained by the processor  210 . Next, in step S 420 , a memory type of a mobile DRAM is obtained by the processor  210 , wherein an eMCP chip comprising the mobile DRAM is to be mounted on the PCB. In one embodiment, the memory type of the mobile DRAM is input by a user via the user interface  240 . In another embodiment, the memory type of the mobile DRAM is obtained according to a net-list of the PCB from the user interface  240  or the storage unit  230 . Next, in step S 430 , the processor  210  transmits a requirement corresponding to the memory type of the mobile DRAM and the EDA information to the storage unit  230 , so as to obtain a module group from the database of the storage unit  230 , wherein the module group comprises a plurality of routing modules corresponding to the memory type of the mobile DRAM. Next, in step S 440 , a plurality of PCB parameters are obtained by the processor  210 , wherein the PCB parameters comprises a layer count, a stack-up setting, a via type and component placement information of the PCB. In one embodiment, the PCB parameters are input by a user via the user interface  240 . In another embodiment, the PCB parameters are obtained according to a net-list of the PCB from the user interface  240  or the storage unit  230 . Next, in step S 450 , a suitable routing module is selected from the module group according to the PCB parameters. For example, if the layer count is “8”, the stack-up setting is “HDI+1”, the via type is “1+6+1” and the component placement is “double-sided”. The processor  210  may select the routing module MMD_S 2  from the table of  FIG. 2  as the suitable routing module. Next, in step S 460 , the suitable routing module is implemented into a layout design displayed in the display via the PCB EDA tool, as shown in  FIG. 5 . In one embodiment, the suitable routing module is fully implemented in the layout design. In another embodiment, the suitable routing module is partially implemented in the layout design. For example, the placement of an eMCP chip, a SOC chip and peripheral components (e.g. bypass capacitors) are copied to the layout design. Next, the traces, the vias and the power/ground planes are copied to the layout design, and then the traces, the vias and the power/ground planes are modified by a user via the user interface  240 . Specifically, the eMCP chip and the main chip are completely implemented in the layout design, and the routing configuration is partially implemented in the layout design. 
       FIG. 6A  shows a schematic illustrating a layout module  600  for a PCB according to another embodiment of the invention. The layout module  600  comprises a package-on-package (POP) package  610  and a power management chip  620 . The POP package  610  comprises at least two chips, wherein one of the chips is a main chip and the other chip is a memory chip. In the embodiment, the memory chip is a DRAM. Furthermore, the power management chip  620  is used to provide various voltages to the POP package  610  and other devices on the PCB. In the embodiment, no DRAM is mounted on the PCB because the DRAM has been integrated into the POP type package, thereby decreasing design complexity. Furthermore, by designing the PCB routing between the POP package  610  and the power management chip  620  to be a routing module according to power delivery network (PDN) on the PCB in advance, the design of power arrangement is simplified for the PCB. As described above, according to various PCB standard parameters (e.g. layers, stack-up and via type, etc.) and the type of the memory chip of the POP package  610 , a plurality of routing modules can be provided for the POP package  610  and the power management chip  620 . Similarly, according to various power requirements, a table illustrating a module group of a specific power management chip can also be established. 
     Furthermore, the amount of the chips of a layout module can be more than two.  FIG. 6B  shows a schematic illustrating a layout module  650  for a PCB according to another embodiment of the invention. The layout module  650  comprises a memory chip  660 , a main chip  670  and a power management chip  680 , wherein the memory chip  660  is a DARM chip and the main chip  670  is a SOC chip. In the embodiment, by designing the PCB routing between the memory chip  660 , the main chip  670  and the power management chip  680  to be a routing module in advance, the design of power arrangement and high-speed memory buses is simplified for the PCB, whereby it is easy to mount or repair the components of the PCB and costs and design times are decreased for a product manufacturer. As described above, according to various PCB standard parameters (e.g. layers, stack-up and via type, etc.) and the type of memory chip  660 , a plurality of routing modules can be provided for the memory chip  660 , the main chip  670  and the power management chip  680 . Furthermore, the placement of the memory chip  660 , the main chip  670  and the power management chip  680  is determined according to the memory type of the memory chip  660  and the PDN of the PCB. Specifically, the PCB routing between the large and complex chips can be designed to be a routing module in advance, so as to simplify the PCB design. 
       FIG. 7  shows a layout server  710  and a plurality of clients  720 A- 720 D according to an embodiment of the invention. The layout server  710  comprises at least one database  730  for storing a plurality of layout groups. Furthermore, the database  730  further comprises a look up table which records the relationships between the module groups and various PCB projects. Each of the clients  720 A- 720 D may comprises a processor (e.g. the processor  210  of  FIG. 2 ), a display (e.g. the display  220  of  FIG. 2 ) and the user interface (e.g. the user interface  240  of  FIG. 2 ). In one embodiment, each of the clients  720 A- 720 D may be the circuit design simulation system  200  of  FIG. 2 . The user interface is used to receive layout information or settings (e.g. layout parameters, net-lists and so on) provided by a designer. The processor is used to perform a PCB electronic design automation (EDA) tool, which obtains the layout information or settings from the user interface and performs a PCB circuit layout design according to the layout modules from the layout server  710 , so as to display a layout design on the display. If  FIG. 7 , the layout modules stored in the database of the layout server  710  can be accessed by the clients  720 A- 720 D, respectively. As described above, according to various PCB standard parameters (e.g. layers, stack-up and via type, etc.) and the types of a memory chip, a plurality of routing modules can be provided. Similarly, according to various power requirements, a table illustrating a module group of a specific power management chip can also be established. Furthermore, a user of the client can find the suitable routing modules by checking required parameters on the look up table. 
       FIG. 8  shows a layout method for a PCB according to another embodiment of the invention, wherein the layout method is performed by the layout server  710  of  FIG. 7 . Referring to  FIG. 7  and  FIG. 8  together, in step S 810 , electronic design automation (EDA) information regarding a PCB EDA tool is obtained by the layout server  710 , wherein the EDA information is provided by one of the clients  720 A- 720 D. Next, in step S 820 , the layout server  710  obtains a project ID from the client. Next, in step S 830 , the layout server  710  recognizes the project ID to determine whether the project ID exists in an account list, wherein the account list is stored in the database  730  and records the information regarding the project IDs that have logged in successfully. If the project ID does not exist in the account list, the layout server  710  obtains the required module groups from the database  730  according to the EDA information, the project ID and the look up table of the database  730  (step S 840 ), wherein each required module group comprises a plurality of routing modules corresponding to the project ID. Furthermore, the look up table can be modified by the client. In one embodiment, the look up table is provided by the client. Next, in step S 850 , a plurality of PCB parameters are obtained by the layout server  710 , wherein the PCB parameters comprises a layer count, a stack-up setting, a via type and component placement information of the PCB. In the embodiment, the PCB parameters are stored in the database  730 , and the PCB parameters can be modified by the client. In one embodiment, the PCB parameters are input by a user via the client. In another embodiment, the PCB parameters are obtained according to a net-list of the PCB from the client or the database  730 . Next, in step S 860 , the suitable routing modules are selected from the module groups according to the PCB parameters. Next, in step S 870 , the layout server  710  provides the suitable routing modules to the client (i.e. the suitable routing modules are downloaded to the client), so as to implement the suitable routing modules to a layout design via the PCB EDA tool. Simultaneously, the layout server  710  adds the project ID into the account list. As described above, the client can fully or partially implements the suitable routing modules into the layout design of the PCB. Referring back to step S 830 , if the project ID exists in the account list, the layout server  710  will determine whether the suitable routing modules corresponding to the project ID have been updated in the database  730 . If yes, the layout server  710  provides the updated version of the routing modules to the client (step S 880 ). Thus, the layout design can be updated. 
     Furthermore, the module groups and the look up table, and the PCB parameters can be stored in a storage media, such as a Flash memory device or an optical disc. Thus, the storage media can be delivered to various users. The routing modules of the module groups are compatible with the user&#39;s PCB EDA tool, thereby the users can easily copy and use the routing modules on various PCB layout design. 
     While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.