Patent Publication Number: US-10326636-B1

Title: Miniature on-chip quadrature phase generator for RF communications

Description:
FIELD OF THE INVENTION 
     Embodiments of the present invention relate generally to quadrature phase generation circuit for radio frequency (RF) circuit. More particularly, embodiments of the invention relate to miniature on-chip phase generation circuit. 
     BACKGROUND 
     International Telecommunication Unit (ITU) is doing a research for possible band between 24.25 to 43.5 GHz for 5G frequency band and therefore wide band as 24 to 43.5 GHz has become significant for 5G development. 
     Quadrature signals have been used wildly for frontend circuit, for instance, a frequency modulator, a phase shifter etc. Traditional quarter wavelength coupled transmission line as known as Lange coupler can generates quadrature signals with low insertion loss and good return loss simultaneously. However, the coupled line needs large chip size which is not suitable for consumer electronic device design. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Embodiments of the invention are illustrated by way of example and not limitation in the figures of the accompanying drawings in which like references indicate similar elements. 
         FIG. 1  is a block diagram illustrating an example of a wireless communication device according one embodiment of the invention. 
         FIG. 2  is a block diagram illustrating an example of an RF frontend integrated circuit according to one embodiment of the invention. 
         FIG. 3  is a block diagram illustrating an RF frontend integrated circuit according to another embodiment of the invention. 
         FIG. 4  is a block diagram illustrating an RF frontend integrated circuit according to another embodiment of the invention. 
         FIG. 5  is a schematic diagram illustrating an example of an on-chip quadrature phase generator according to one embodiment. 
         FIG. 6  shows a perspective view of a quadrature phase generator structure according to one embodiment. 
         FIG. 7  shows a top view of a quadrature phase generator structure according to one embodiment. 
         FIGS. 8A-8C  show statistics of a quadrature phase generator according to one embodiment. 
         FIG. 9  shows a top view of a quadrature phase generator structure according to another embodiment. 
         FIG. 10  shows an insertion loss of a quadrature phase generator according to one embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Various embodiments and aspects of the inventions will be described with reference to details discussed below, and the accompanying drawings will illustrate the various embodiments. The following description and drawings are illustrative of the invention and are not to be construed as limiting the invention. Numerous specific details are described to provide a thorough understanding of various embodiments of the present invention. However, in certain instances, well-known or conventional details are not described in order to provide a concise discussion of embodiments of the present inventions. 
     Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in conjunction with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification do not necessarily all refer to the same embodiment. 
     According to some embodiments, an on-chip quadrature phase generator (QPG) with a miniature size on in integrated circuit (IC) is utilized to produces quadrature signals in different phases. The QPG generator uses a multi-layer benefit of complementary metal-oxide-semiconductor (CMOS) process for small size achievement. A high coupling coefficient, which can enhances wide band performance and flat quadrature phase difference response, is obtained from small thickness between layers. The QPG generator uses these inherent benefits of the standard CMOS process and no customized CMOS process is needed. 
     According to one aspect, a QPG generator circuit to generate quadrature signals in different phases for modulating and demodulating RF signals includes a first transformer (e.g., on-chip transformer) having a first primary winding disposed on a first substrate layer of an IC and a secondary winding disposed on a second substrate layer of the IC. The first transformer produces a first quadrature signal in a first phase based on a local oscillator (LO) signal produced by a local oscillator. The QPG circuit further includes a second transformer having a second primary winding disposed on the first substrate layer of the IC and a second secondary winding on the second substrate layer of the IC. The second transformer produces a second quadrature signal in a second phase based on the LO signal, where the second phase is different than the first phase. The first quadrature signal and the second quadrature signal are utilized by a mixer circuit of an RF transceiver to modulate and/or demodulate RF signals for the purpose of transmitting and receiving the RF signals. 
     According to another aspect, an RF frontend IC device includes an RF transceiver and a frequency synthesizer. The RF transceiver is to transmit and receive RF signals within a predetermined frequency band. The frequency synthesizer is to perform a frequency synthetization in a wide frequency spectrum including the predetermined frequency band. The frequency synthesizer generates an LO signal to the RF transceiver to enable the RF transceiver to transmit and receive RF signals within the predetermined frequency band. The frequency synthesizer includes a quadrature signal generator to generate multiple quadrature signals based on the LO signal, each corresponding to one of the different phases. The quadrature signal generator includes a first transformer having a first primary winding disposed on a first substrate layer of the IC and a first secondary winding disposed on a second substrate layer of the IC. The first transformer produces a first quadrature signal in a first phase. The quadrature signal generator further includes a second transformer having a second primary winding disposed on the first substrate layer of the IC and a second secondary winding disposed on the second substrate layer of the IC. The second transformer produces a second quadrature signal in a second phase, which is different than the first phase. 
       FIG. 1  is a block diagram illustrating an example of a wireless communication device according one embodiment of the invention. Referring to  FIG. 1 , wireless communication device  100  (also simply referred to as a wireless device) includes, amongst others, an RF frontend module  101  and a baseband processor  102 . Wireless device  100  can be any kind of wireless communication devices such as, for example, mobile phones, laptops, tablets, network appliance devices (e.g., Internet of thing or IOT appliance devices), etc. Wireless communication device  100  may be a CPE device. 
     In a radio receiver circuit, the RF frontend is a generic term for all the circuitry between the antenna up to and including the mixer stage. It consists of all the components in the receiver that process the signal at the original incoming radio frequency, before it is converted to a lower intermediate frequency (IF). In microwave and satellite receivers it is often called the low-noise block (LNB) or low-noise down-converter (LND) and is often located at the antenna, so that the signal from the antenna can be transferred to the rest of the receiver at the more easily handled intermediate frequency. A baseband processor is a device (a chip or part of a chip) in a network interface that manages all the radio functions (all functions that require an antenna). 
     In one embodiment, RF frontend module  101  includes an array of RF transceivers, where each of the RF transceivers transmits and receives RF signals within a particular frequency band (e.g., a particular range of frequencies such as non-overlapped frequency ranges) via one of a number of RF antennas. The RF frontend integrated circuit (IC) chip further includes a full-band frequency synthesizer coupled to the RF transceivers. The full-based frequency synthesizer generates and provides a local oscillator (LO) signal to each of the RF transceivers to enable the RF transceiver to mix, modulate, and/or demodulate RF signals within a corresponding frequency band. The array of RF transceivers and the full-band frequency synthesizer may be integrated within a single IC chip as a single RF frontend IC chip or package. 
       FIG. 2  is a block diagram illustrating an example of an RF frontend integrated circuit according to one embodiment of the invention. Referring to  FIG. 2 , RF frontend  101  includes, amongst others, a full-base frequency synthesizer  200  coupled to an array of RF transceivers  211 - 213 . Each of transceivers  211 - 213  is configured to transmit and receive RF signals within a particular frequency band or a particular range of RF frequencies via one of RF antennas  221 - 223 . In one embodiment, each of transceivers  211 - 213  is configured to receive a LO signal from full-band frequency synthesizer  200 . The LO signal is generated for the corresponding frequency band. The LO signal is utilized to mix, modulate, demodulated by the transceiver for the purpose of transmitting and receiving RF signals within the corresponding frequency band. 
       FIG. 3  is a block diagram illustrating an RF frontend integrated circuit according to another embodiment of the invention. Referring to  FIG. 3 , full-band frequency synthesizer  300  may represent full-band frequency synthesizer  101  as described above. In one embodiment, full-band frequency synthesizer  300  is communicatively coupled to an array of transceivers, each transceiver corresponding to one of a number of frequency bands. In this example, full-band frequency synthesizer  300  is coupled to transmitter  301 A, receiver  302 A, transmitter  301 B, and receiver  302 B. Transmitter  301 A and receiver  302 A may be a part of a first transceiver operating in a lower frequency band, referred to as a low-band (LB) transmitter and LB receiver. Transmitter  301 B and receiver  302 B may be a part of a second transceiver operating in a higher frequency band, referred to as a high-band (HB) transmitter and HB receiver. Note that although there are only two transceivers as shown in  FIG. 3 , more transceivers may also be coupled to full-band frequency synthesizer  300  as shown in  FIG. 2 . 
     In one embodiment, frequency synthesizer  300  includes, but is not limited to, phase-lock loop (PLL) circuitry or block  311 , a LO buffer  312 , LB in-phase/quadrature (IQ) generator  313 , and LB phase rotators  314 . A PLL is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal, and the phase detector compares the phase of that signal with the phase of the input periodic signal, adjusting the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is “fed back” toward the input forming a loop. 
     Keeping the input and output phase in lock step also implies keeping the input and output frequencies the same. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. These properties are used for computer clock synchronization, demodulation, and frequency synthesis. Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. 
     Referring back to  FIG. 3 , PLL block  311  is to receive a clock reference signal and to lock onto the frequency of the clock reference signal to generate a first LO signal, i.e., a low-band LO signal or LBLO signal. The first LO signal may be optionally buffered by a LO buffer  312 . Based on the LBLO signal, LB IQ generator  313  generates IQ signals that are suitable for mixing, modulating, and demodulating in-phase and quadrature components of RF signals. The IQ signals may be rotated by a predetermined angle or delayed by LB phase rotators  314 . The rotated IQ signals are then provided to LB transmitter  301 A and receiver  302 A. Particularly, the IQ signals may include transmitting IQ (TXIQ) signals  321 A to be provided to LB transmitter  301 A and in-phase and quadrature receiving IQ (RXIQ) signals  322 A to be provided to LB receiver  302 A. 
     In one embodiment, frequency synthesizer  300  further includes a frequency converter  315 , injection locked oscillator  316 , HB IQ generator  317 , and HB phase rotators  318 . Frequency converter  315  is to convert the first LO signal generated from the PLL block  311  to a signal with higher frequency (e.g., within a higher frequency band). In one embodiment, frequency converter  315  includes a frequency doubler to double the frequency of the first LO signal. Injection locked oscillator  316  is to lock onto the doubled-frequency signal received from frequency converter  315  to generator the second LO signal having the second LO frequency approximately twice as the first LO frequency. Note that in this example, the second LO frequency is twice as the first LO frequency. However, frequency converter  315  can convert and generate a frequency in any frequency range. If there are more frequency bands to be integrated within the RF frontend device, more frequency converters may be utilized to convert a reference frequency to a number of other lower or higher frequencies. 
     Injection locking and injection pulling are the frequency effects that can occur when a harmonic oscillator is disturbed by a second oscillator operating at a nearby frequency. When the coupling is strong enough and the frequencies near enough, the second oscillator can capture the first oscillator, causing it to have essentially identical frequency as the second. This is injection locking. When the second oscillator merely disturbs the first but does not capture it, the effect is called injection pulling. Injection locking and pulling effects are observed in numerous types of physical systems, however the terms are most often associated with electronic oscillators or laser resonators. 
     Referring back to  FIG. 3 , HB IQ generator  317  generates IQ signals that are suitable for mixing, modulating, and demodulating in-phase and quadrature components of RF signals in a high band frequency range. In electrical engineering, a sinusoid with angle modulation can be decomposed into, or synthesized from, two amplitude-modulated sinusoids that are offset in phase by one-quarter cycle (π/2 radians). All three functions have the same frequency. The amplitude modulated sinusoids are known as in-phase and quadrature components. Some people find it more convenient to refer to only the amplitude modulation (baseband) itself by those terms. 
     The IQ signals may be rotated by a predetermined angle or delayed by HB phase rotators  318 . The rotated IQ signals are then provided to HB transmitter  301 B and receiver  302 B. Particularly, the IQ signals may include transmitting IQ (TXIQ) signals  321 B to be provided to HB transmitter  301 B and in-phase and quadrature receiving IQ (RXIQ) signals  322 B to be provided to HB receiver  302 B. Thus, components  312 - 314  are configured to generate TXIQ and RXIQ signals for LB transmitter  301 A and LB receiver  302 A, while components  315 - 318  are configured to generate TXIQ and RXIQ signals for HB transmitter  301 B and HB receiver  302 B. If there are more transmitters and receivers of more frequency bands involved, more sets of components  312 - 314  and/or components  315 - 318  may be maintained by frequency synthesizer  300  for generating the necessary TXIQ and RXIQ signals for the additional frequency bands. 
     In one embodiment, LB transmitter  301 A includes a filter  303 A, a mixer  304 A, and an amplifier  305 A. Filter  303 A may be a low-pass (LP) filter that receives LB transmitting (LBTX) signals to be transmitted to a destination, where the LBTX signals may be provided from a baseband processor such as baseband processor  102 . Mixer  301 A (also referred to as an up-convert mixer or an LB up-convert mixer)) is configured to mix and modulate the LBTX signals onto a carrier frequency signal based on TXIQ signal provided by LB phase rotators  314 . The modulated signals (e.g., low-band RF or LBRF signals) are then amplified by amplifier  305 A and the amplified signals are then transmitted to a remote receiver via antenna  310 A. 
     In one embodiment, LB receiver  302 A includes an amplifier  306 A, mixer  307 A, and filter  308 A. Amplifier  306 A is to receive LBRF signals from a remote transmitter via antenna  310 A and to amplify the received RF signals. The amplified RF signals are then demodulated by mixer  307 A (also referred to as a down-convert mixer or an LB down-convert mixer) based on RXIQ signal received from LB phase rotators  314 . The demodulated signals are then processed by filter  308 A, which may be a low-pass filter. In one embodiment, LB transmitter  301 A and LB receiver  302 A share antenna  310 A via a transmitting and receiving (T/R) switch  309 A. T/R switch  309 A is configured to switch between LB transmitter  301 A and receiver  302 A to couple antenna  310 A to either LB transmitter  301 A or LB receiver  302 A at a particular point in time. 
     Similarly, HB transmitter  301 B includes filter  303 B, mixer  304 B (also referred to as a HB up-convert mixer), and amplifier  305 B having functionalities similar to filter  303 A, mixer  304 A, and amplifier  305 A of LB transmitter  301 A, respectively, for processing high-band transmitting (HBTX) signals. HB receiver  302 B includes filter  306 B, mixer  307 B (also referred to as a HB down-convert mixer), and filter  308 B having functionalities similar to amplifier  306 A, mixer  307 A, and filter  308 A of LB receiver  302 A, respectively, for processing high-band receiving (HBRX) signals. HB transmitter  301 B and HB receiver  302 B are coupled to antenna  310 B via T/R switch  309 B similar to the configuration of LB transmitter  301 A and receiver  302 A. Antenna  310 A- 310 B may represent any one or more of antennas  221 - 223  of  FIG. 2 , which are not part of the RF frontend circuit. 
       FIG. 4  is a block diagram illustrating an example of an RF frontend integrated circuit according to another embodiment of the invention. Referring to  FIG. 4 , in this embodiment, each of LB transmitter  301 A, LB receiver  302 A, HB transmitter  301 B, and HB receiver  302 B includes two paths: 1) I path for processing in-phase component signals and 2) Q-path for processing quadrature component signals. In one embodiment, LB transmitter  301 A includes an I-path low-pass filter (e.g., a tunable low-pass filter) to receive I-path baseband signals and an I-path up-convert mixer to mix and modulate the I-path baseband signals. LB transmitter  301 A includes a Q-path low pass filter (e.g., a tunable low-pass filter) to receive Q-path baseband signals and a Q-path up-convert mixer to mix and modulate the Q-path baseband signals. LB transmitter  301 A further includes a tunable band selection filter and an amplifier. The band selection filter (e.g., a band-pass filter) is to select the corresponding frequency band to remove noises that are outside of the corresponding band. The amplifier is to amplify the modulated RF signals to be transmitted to a remote device via antenna  310 A. HB transmitter  301 B includes similar components as of LB transmitter  301 A for processing signals in a higher frequency band. 
     Similarly, according to one embodiment, LB receiver  302 A includes an amplifier (e.g., a low-noise amplifier or LNA) to receive LBRF signals from a remote device via antenna  310 A and a band selection filter (e.g., a band-pass filter). LB receiver  302 A further includes an I-path down-convert mixer and a Q-path down-convert mixer to mix and demodulate the RF signal into I-path baseband signals and Q-path baseband signals. LB receiver  302 A further includes an I-path low-pass filter and a Q-path low-pass filter to processing the I-path baseband signals and the Q-path baseband signals, which can then be provided to the baseband processor. HB receiver  302 B includes similar components as of LB receiver  302 A for processing signals in a higher frequency band. 
     In one embodiment, frequency synthesizer  300  includes a PLL block having a charge pump with a phase frequency detector, a loop filter, a programmable divider, a voltage-controlled oscillator. The frequency synthesizer  300  further includes a frequency doubler and an injection locking oscillator as described above with respect to  FIG. 3 . 
     In addition, frequency synthesizer  300  includes in-phase transmitting (TXI) phase rotator  314 A, quadrature transmitting (TXQ) phase rotator  314 B, in-phase receiving (RXI) phase rotator  314 C, and quadrature receiving (RXQ) phase rotator  314 D, which are specifically configured to perform phase rotation to generate in-phase LO signals and quadrature LO signals for LB transmitter  301 A and LB receiver  302 A. Specifically, TXI phase rotator  314 A is coupled to the I-path up-convert mixer of LB transmitter  301 A and TXQ phase rotator  314 B is coupled to the Q-path up-convert mixer of LB transmitter  301 A to enable the I-path and Q-path baseband signals to be mixed and modulated within the corresponding frequency band. RXI phase rotator  314 C is coupled to the I-path down-convert mixer of LB receiver  302 A and RXQ phase rotator  314 D is coupled to the Q-path down-convert mixer of LB receiver  302 A to enable the I-path and Q-path baseband signals to be mixed and demodulated within the corresponding frequency band. 
     In one embodiment, frequency synthesizer  300  includes in-phase transmitting (TXI) phase rotator  318 A, quadrature transmitting (TXQ) phase rotator  318 B, in-phase receiving (RXI) phase rotator  318 C, and quadrature receiving (RXQ) phase rotator  318 D, which are specifically configured to perform phase rotation to generate in-phase LO signals and quadrature LO signals for HB transmitter  301 B and HB receiver  302 B. Specifically, TXI phase rotator  318 A is coupled to the I-path up-convert mixer of HB transmitter  301 B and TXQ phase rotator  318 B is coupled to the Q-path up-convert mixer of HB transmitter  301 B to enable the I-path and Q-path baseband signals to be mixed and modulated within the corresponding frequency band. RXI phase rotator  318 C is coupled to the I-path down-convert mixer of HB receiver  302 A and RXQ phase rotator  318 D is coupled to the Q-path down-convert mixer of HB receiver  302 B to enable the I-path and Q-path baseband signals to be mixed and demodulated within the corresponding frequency band. 
     Again, in this example as shown in  FIG. 4 , there are two frequency bands covered by the frequency synthesizer  300 . However, more frequency bands may be implemented within the integrated RF frontend. If there are more frequency bands to be implemented, more sets of TXI, TXQ, RXI, and RXQ phase rotators may be required. 
       FIG. 5  is a block diagram illustrating a transformer-based quadrature signal generator according to one embodiment of the invention. The quadrature signal generator  500 , also referred to as QPG generator, may be implemented as a part of IQ generators  313  and  317  and/or phase rotators  314  and  318  of  FIG. 3 . Referring to  FIG. 5 , in this embodiment, QPG generator  500  includes a first transformer  511  and a second transformer  512  coupled to each other in series, forming an input terminal  501 , a ground terminal  502  via a termination resistor (e.g., 50 ohms), a first output terminal  503 , and a second output terminal  504 . In one embodiment, QPG generator  500  receives a LO signal from input terminal  501 , produces a first quadrature signal in a first phase shift or delay such as +45 degrees in phase shift at output terminal  503 , and produces a second quadrature signal in a second phase shift or delay such as −45 degrees in phase shift at output terminal  504 . 
     In one embodiment, transformers  511 - 512  are implemented as a part of CMOS process. In one embodiment, a primary winding (e.g., a first winding) and a secondary winding (e.g., a second winding) of each transformer is disposed on different substrate layers of the IC. In this example, first or primary winding  521  of transformer  511  is disposed on substrate layer  513  while second or secondary winding  522  of transformer  511  is disposed on substrate layer  514 . Winding  521  and winding  522  are disposed on the opposite sides of dielectric material  550 . Similarly, first or primary winding  523  of transformer  512  is disposed on substrate layer  513  while second or secondary winding  524  of transformer  512  is disposed on substrate layer  514 . Winding  523  and winding  524  are disposed on the opposite sides of dielectric material  550 . Winding  521  is connected with winding  523  in series, while winding  522  is connected with winding  524  in series. 
       FIG. 6  shows a perspective view of a quadrature phase generator structure according to one embodiment. The QPG structure  600  may represent the QPG  500  of  FIG. 5 . Referring to  FIG. 6 , in this embodiment, the windings of a transformer are implemented using a set of electrically conductive traces disposed on a substrate layer in a spiral shape. Although in this example, the spiral shape is in a rectangular spiral shape, other shapes such as circular, ellipse, or square spiral shapes may also be applicable. 
     As shown in  FIG. 6 , a first set of electrically conductive traces representing the primary winding  521  of transformer  511  is disposed on the first substrate layer of an IC such as substrate layer  513 . A second set of electrically conductive traces representing the secondary winding  522  of transformer  511  is disposed on the second substrate layer of the IC such as substrate layer  514 . Input terminal  501  is coupled to the center tab of the electrically conductive traces of the first set on the first substrate layer. The first output terminal  503  is coupled to the center tab of the electrically conductive traces of the second set on the second substrate layer. 
     Similarly, a first set of electrically conductive traces representing the primary winding  523  of transformer  512  is disposed on the first substrate layer of an IC such as substrate layer  513 . A second set of electrically conductive traces representing the secondary winding  524  of transformer  512  is disposed on the second substrate layer of the IC such as substrate layer  514 . Ground terminal  502  is coupled to the center tab of the electrically conductive traces of the first set via a termination resistor  530  (e.g., 50 ohms) on the first substrate layer. The second output terminal  504  is coupled to the center tab of the electrically conductive traces of the second set on the second substrate layer. A terminal end of the outer ring of the electrically conductive traces of first transformer  511  is coupled to a terminal end of the outer ring of the electrically conductive traces of second transformer  512  on the same substrate layer, such that transformer  511  is coupled in series with transformer  512 . In one embodiment, the length of the electrically conductive trace forming a spiral shape of each winding is approximately equal to a quarter of a wavelength associated with an operating frequency of the QPG generator. The space between two electrically conductive traces (or tracks, wires, or strips) desires to be as close as possible. 
     An electrically conductive trace can be implemented as a part of a microstrip. Microstrip is a type of electrical transmission line which can be fabricated using printed circuit board (PCB) technology, and is used to convey microwave-frequency signals. It consists of a conducting strip separated from a ground plane by a dielectric layer known as the substrate. Microwave components such as antennas, couplers, filters, power dividers etc. can be formed from microstrip, with the entire device existing as the pattern of metallization on the substrate. Microstrip is thus much less expensive than traditional waveguide technology, as well as being far lighter and more compact. 
       FIG. 7  shows a top view of the QPG structure as shown in  FIG. 6 .  FIG. 8A  shows insertion loss across different operating frequencies for the QPG generator described above. As shown in  FIG. 8A , the performance shows low insertion loss as −2 to −5 dB and 88-92 phase difference over 24 to 43 GHz.  FIG. 8B  shows return loss and  FIG. 8C  shows isolation and phase difference. 
     As described above, by placing the primary winding and the secondary winding of a transformer on different substrate layers and align them properly, it provides a good coupling coefficient. In one embodiment, the primary winding and the secondary winding of the transformer can be shifted horizontally with an offset to modify the coupling coefficient as shown in  FIG. 9 . Such a configuration may alter certain transformer characteristics such as insertion loss as shown in  FIG. 10 . 
     In the foregoing specification, embodiments of the invention have been described with reference to specific exemplary embodiments thereof. It will be evident that various modifications may be made thereto without departing from the broader spirit and scope of the invention as set forth in the following claims. The specification and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.