Patent Publication Number: US-3972004-A

Title: Charge preamplifier

Description:
This invention relates to a charge preamplifier. 
     It is known that semiconductor detectors of the lithium-compensated silicon type are advantageously employed in the fluorescence analysis of light elements and therefore in the detection of low-energy X-rays. The detector is associated with a measuring system which is intended to measure the number of counts as a function of energy, tht is to say the number of pulses delivered by said detector, each pulse being intended to correspond to the arrival of a particle. The measuring system must clearly have a very high resolving power which in fact depends on the quality and dimensions of the detector as well as the associated electronic circuit and in particular on the charge preamplifier which is placed at the head of this electronic circuit. In general, efforts have consequently been directed to the reduction of noise of the components which constitute the input stage of the preamplifier. In order to reduce this noise, a certain number of devices have already been constructed. 
     The prior art can be illustrated by the preamplification device described in the review entitled &#34;Nuclear Instrument and Methods,&#34; 71, 1969, pages 273 to 279. In this device, the input of the preamplifier is constituted by a field-effect transistor which will be designated hereinafter as a FET, said transistor being placed within a cryostat in the vicinity of the detector, thus reducing its noise as well as stray capacitances. Moreover, a new feedback technique in the so-called optoelectronic field has been adopted for the preamplifier and permits a very appreciable improvement in the resolving power irrespective of the count rate. The feedback resistor is replaced by an electroluminescent diode which is intended to shine on the input FET. The noise contribution from the feedback element is much lower in this case. However, further high noise sources also exist and are primarily due to the nature of the resistance of the load on the input FET. 
     A clearer understanding of this problem will be gained by referring to the accompanying FIG. 1 in which the input stage of a preamplifier in accordance with the prior art is shown diagrammatically. 
     In this figure, the signal delivered by the detector is applied to the input gate G of the field-effect transistor T&#39; which is cooled. The source input of the transistor is connected to ground whilst its drain input is connected to the emitter of the bipolar transistor T. The common point of the two transistors is connected to the supply line 2 through the emitter resistor R 1 . The collector of the transistor T is connected to the second supply line through the collector resistor R 2 . The output of the input stage of the preamplifier is located at point A. 
     The noise sources which disturb the measurements have different origins. These noises are given by the following formulae: 
     i 0   2  represents the intensity of the noise produced by the channel current of the transistor T&#39;, 
     i b   2  = 2qI b  represents the partition noise produced within the transistor T. 
     The resistors R 1  and R 2  produce not-negligible levels of noise, 
     i 1   2  = (4KT/R 1 ) represents the intensity of the noise produced by the resistor R 1 . 
     i 2   2  = (4KT/R 2 ) represents the intensity of the noise produced by the resistor R 2 . 
     In these formulae, q is the elementary charge, K is the Boltzman constant and T is the absolute ambient temperature. 
     It is noted on the one hand that the values of the resistors R 1  and R 2  must be high in order to reduce the levels of noise i 1   2  and i 2   2  and on the other hand that the transistor T must be selected from those which have a very high current gain in order to reduce the noise i b   2 . The first of these observations presupposes a high value of the input voltage which is not always possible in practice. Moreover, it is recommended practice to employ a FET instead of the bipolar transistor T when the drive is applied through a high resistance as in this instance. The n-type transistor could be replaced only by a p-type FET. Unfortunately, the noise level of this latter is much too high compared with an n-type transistor and even with a bipolar transistor. 
     This invention is precisely directed to a charge preamplifier which overcomes th disadvantages mentioned in the foregoing by suppressing or at least considerably reducing the noise produced by the input stage of the preamplifier. 
     The charge preamplifier essentially comprises an input stage driven by the signal to be amplified, said stage being connected to an amplification stage which is in turn associated with an output stage, and a circuit for applying feedback from the output to the input of said preamplifier, said feedback being of the optoelectronic type, said input stage being such as to comprise a cooled field-effect transistor, the signal to be amplified being applied to the input gate of said transistor, the load resistance of said transistor being provided by a second field-effect transistor mounted in series with an inductance coil. 
     In accordance with a first characteristic feature of the invention, the impedance of said inductance coil within the frequency range of the preamplifier is considerably higher than the reciprocal of the slope of the field-effect load transistor. 
     In accordance with a second characteristic feature, the drain output of the input transistor is connected on the one hand to the source input of the load transistor through said inductance coil which is mounted in series with a resistor and on the other hand to the input gate of said load transistor. 
     In accordance with a third characteristic feature, the input stage is followed by a differential stage comprising a field-effect transistor and a bipolar transistor. 
     In accordance with a further characteristic feature, the feedback circuit comprises a hysteresis comparator having one input connected to the output of the preamplifier output stage and the other output connected to a reference voltage source, the output of said comparator being connected to a device for initiating the supply of an electroluminescent diode placed opposite to the input transistor through a capacitor in which one plate is connected to the output of the preamplifier output stage and the other plate is connected to the input gate of the input field-effect transistor. 
    
    
     A more complete understanding of the invention will in any case be obtained from the following description of one embodiment which is given by way of example but not in any limiting sense, reference being made to the accompanying drawings, in which: 
     FIG. 1 as hereinabove described is a diagram of the input stage of a preamplifier in accordance with the prior art; 
     FIG. 2 is a diagram of the input stage of the preamplifier in accordance with the invention; 
     FIG. 3 is a circuit diagram of the complete preamplifier in accordance with the invention; 
     FIG. 4 shows two curves which give the resolution as a function of the count rate in the case of the preamplfier according to the invention and in the case of a preamplifier of known type. 
    
    
     The input of the preamplifier in accordance with the invention is shown in detail in FIG. 2. There can be seen in this figure the FET T&#39; 1 , the input gate of which is driven by the signal delivered by the detector. The source input of the FET T&#39; 1  is connected to ground whilst the drain of said FET is connected on the one hand to the source input of the load FET T&#39; 2  through the inductance coil L 1  and on the other hand to the gate of the FET T&#39; 2 . The drain of the FET&#39; 2  is connected to the line 4 for supplying voltage at +12 volts. The drain of the FET T&#39; 1  (at the point A) is connected to the gate of the FET T&#39; 3  which constitutes a differential circuit in conjunction with the bipolar transistor T 1 . The source of the FET T&#39; 3  and the emitter of the transistor T 1  are connected to the -12 volt supply line 4 through the bias resistor R 2 . The values of the supply voltages are obviously given only by way of example and correspond to types of components which are the most widely employed. The bipolar transistor T 2  constitutes a parallel cascode circuit in conjunction with the transistor T 1 . The collector of the transistor T 1  and the emitter of the transistor T 2  are connected to the line 2 through the resistor R 7 . The three transistors T&#39; 3 , T 1  and T 2  constitute the second amplification stage of the preamplifier. The collector output (point B) of the transistor T 2  is connected to the output stage of the preamplifier. 
     In this circuit arrangement, the transistor T&#39; 1  is provided with a load resistance by the field-effect transistor T&#39; 2 . Gain degeneration of the FET T&#39; 2  is caused by the presence of the inductance coil L 1  in order to reduce as far as possible the variations of the current which passes through said FET. The noise intensity i 2  at the point A&#39; is then obtained substantially as follows: ##EQU1## wherein i D1   2  and i D2   2  represent respectively the noise produced by the channel current of the FETs T&#39; 1  and T&#39; 2 . In this formula, S 2  is the slope of the FET T&#39; 2 . It is clearly necessary to ensure that the impedance L 1  ω is substantially higher than the term 1/S 2  within the frequency range employed by the filter of the amplifier. The value adopted for the inductance coil L 1  is approximately 200 to 300 mH, this value being determined experimentally by establishing that the noise level measured by the quadratic voltmeter at the output of the amplification circuit becomes practically insensitive to the type of transistor which is chosen as a load device. In the case of the transistor T&#39; 2 , it is preferable to employ a transistor of type 2N 4416 (Texas) and the same applies to the transistor T&#39; 1 . 
     The FET T&#39; 3  is selected from those which have a high slope although the value of current I D  SS must nevertheless not be too high, I D  SS being the value of the drain current in respect of a zero gate-source bias. The transistor T 1  which is the second element of the differential stage is preferably a bipolar transistor having a current gain ω which is at least equal to 200. In this circuit arrangement, there remains only one noise generator represented by the noise intensity of the transistor T&#39; 1  since the noise of the transistor T&#39; 2  can be considered as negligible. The Miller effect produced by this arrangement has practically no effect on the signal-to-noise ratio of the amplifier. 
     There is shown in FIG. 3 one example of construction of the preamplifier in accordance with the invention and comprising the input stage which has already been described with reference to FIG. 2. This figure shows the detector 6 (which is for example of the lithium-compensated silicon type) supplied by a voltage source -HT through a filter if necessary. The detector 6 and the FET T&#39; 1  are placed within a cryostat as shown by the dashed outline 7 and maintained at a very low temperature. The load resistance of the transistor T&#39; 1  comprises in addition to the transistor T&#39; 2  and the inductance coil L 1  a resistor R 1  which is mounted in series with said inductance coil. 
     The amplification stage proper of the preamplifier further comprises the bipolar transistors T 1  and T 2 , a filter network 8 and a load transistor T 3 . The filter network 8 comprises in known manner the resistors R 8 , R 9 , R 10  and the capacitor C 6 . The filter circuit 8 is connected to the transistor T 2  through the diode D 3  and to the collector of the load transistor T 3  through the diode D 1 . The filter circuit 8 which is a low-pass filter is intended to correct the frequency response of the preamplifier. There are also shown in the figure the different transistor bias resistors, namely the resistors R 6  and R 3  for the transistor T 3 , the resistor R 4 , the resistor R 5  and the potentiometer P 1  for the transistor T 1 , the resistor R 5  for the base of the transistor T 2 . Moreover, the supply lines 2 and 4 for the amplification stage and the input stage are connected to the voltage sources through two coupling cells 10 and 12 respectively which are constituted respectively by the resistor R 26  and the capacitor C 4 , and by the resistor R 25  and the capacitor C 5 . 
     The output stage 14 of the preamplifier is essentially constituted by the bipolar transistors T 4  and T 5 , the bases of which are connected respectively to the collectors of the transistors T 2  and T 3 . There are also shown the protective resistors R 11  and R 14  of these transistors and the emitter resistors R 12  and R 13  in which the point of connection constitutes at the same time the output S of the preamplifier. 
     The preamplifier further comprises a feedback system of the optoelectronic type. This system comprises a bipolar transistor T 6 , the base of which is connected to the point of output S of the preamplifier and the emitter of which is connected to the reverse input of a hysteresis comparator M 1  through a voltage divider which also serves to bias said transistor T 6  and is constituted by the resistors R 16  and R 15 . The forward input of the comparator is connected to a reference voltage source constituted by the potentiometer P 3  which is supplied between the voltages of -5 volt, +5 volts, and by the resistor R 17 . The comparator M 1  comprises a feedback circuit constituted by the resistor R 19  and the potentiometer P 2 . The potentiometer P 3  makes it possible to adjust the centering of the comparator M 1  whilst the potentiometer P 2  serves to adjust the dynamic output characteristics of the preamplifier. The (logical) output of the comparator M 1  is connected to the input of the logical gate M 2 . The second input of the logical gate M 2  is also connected to the output of the comparator M 1  through an integrating circuit 16 constituted in known manner by the inductance coil L 2  and by the resistor R 22 . This integrating circuit serves to introduce a time-delay in the logical signal delivered by the comparator M 1 . The output of the logical gate M 2  which is advantageously constituted by a NOR gate drives a circuit 18 for controlling an electroluminescent diode D 4  placed within the cryostat 7 opposite to the FET T&#39; 1 . The emitter output of the transistor T 9  is preferably connected to the supply line 4 through the resistor R 20 . The transistor collector T 9  comprises the resistor R 21  and the base of the transistor T 8  is connected to a voltage supply of +5 volts. The transistor T 7  which is associated with the transistor T 8  constitutes the bistable device 20. 
     The output S of the preamplifier is also connected to a feedback capacitor C 8  placed between the detector 8 and the FET T&#39; 1 . There is also placed within the cryostat 7 a Zener diode Z 1 , one terminal of which is connected to a voltage supply of +12 volts through the resistor R 28 . 
     The operation of the preamplifier is as follows. When the action of the charges stored in the detector is such that the voltage delivered by the preamplifier at its output S is higher than the threshold value preset by means of the potentiometers P 2  and P 3 , the hysteresis comparator circuit M 1  delivers the logical signal O. At the end of the period t corresponding to the time-delay introduced by the integrating circuit 16, two signals of logical level O appear at the inputs of the logical gate M 2  which is constituted by a NOR circuit. Said gate therefore delivers a signal of logical level 1 which initiates the transition of the circuit 20. This reversal of state triggers the transistor T 9  into conduction and this latter therefore supplies the electroluminescent diode T 4 . Said diode shines on the gate-drain junction of the FET T&#39; 1 . The resultant increase in the reverse current within said junction causes the feedback capacitor C 8  to discharge for a period of time which depends on the current within the transistor T 9  and therefore on the value of the resistor R 20 . When the output voltage of the preamplifier attains the bottom threshold value determined by the hysteresis comparator M 1 , the bistable circuit 20 returns to its initial state, with the result that the current within the diode D 4  is cut-off. The output I of the comparator M 1  constitutes an inhibition output for the device which serves to record the output voltage S of the preamplifier. 
     The drain voltage of the FET T 1  can be adjusted by means of the potentiometer P 1  to a value of the order of 5 volts. Depending on the transistor which is employed, it is usually necessary to set this value between 4 and 5  volts so as to obtain the best resolution. The resistor R 1  makes it possible to control the drain current of the transistor T&#39; 1  independently of its drain voltage. A value of 500 ohms is preferably employed for the resistor R 1  in the case in which the input FETs are of the type designated as 2N 4416 (Texas). The potentiometers P 2  and P 3  make it possible to adjust the dynamic output characteristics within a range which, in the example described, has a maximum value of +1.5 volts and a minimum value of -1.5 volts. 
     Under these conditions, in the case of count rates of 4300 counts per second and 130,000 counts per second, the reset period is respectively equal to 186 ms and 4.4 ms in the case of a Fe-55 source (of the order of 6 keV energy). The time of return of the preamplifier is adjustable by means of the resistor R 20  and is usually set at a value below 10 μs. 
     The temperature to which the transistor T&#39; 1  is usually brought is in the vicinity of -120°C in order to minimize its noise level. The optimum value is obtained by regulating the current flowing through the Zener diode Z 1  which is placed in the vicinity of the transistor T&#39; 1 . To this end, the value of the resistor R 28  is determined experimentally by means of a quadratic voltmeter placed at the output of the amplifier. By way of example in the case of the assembly consisting of cryostat and preamplifier which is employed in the inventors&#39; laboratory, the optimum value of the resistor R 28  was 62 ohms. 
     In FIg. 4, the resolution of the preamplifier (expressed in eV) is represented as a function of the count rate (expressed in counts per second on the logarithmic scale) in the case of a Fe-55 source. The curve H 1  corresponds to a preamplifier exactly as described above and employed in the prior art. The curve H 2  corresponds to the preamplifier in accordance with the invention. This figure shows that in respect of a given resolution, the count rate is approximately twice as high with the preamplifier in accordance with the invention. 
     The foregoing decription corresponds to the operation of the preamplifier in a pulsed regime. However, the operation of some amplifiers may be disturbed by a preamplifier which operates in a pulsed regime. In that case it is possible to modify the preamplifier to a slight extent so that the transistor T&#39; 1  should be continuously illuminated by the electroluminescent diode D 4 . The modification consists in connecting the base of the transistor T 7  to the analog output S of the preamplifier instead of joining it to the output of the gate M 1 . The base of the transistor T 8  is then connected to ground, with the result that the transistors T 7  and T 8  constitute a Class-A differential stage.