Patent Publication Number: US-7719176-B2

Title: Spacer configured to prevent electric charges from being accumulated on the surface thereof and electron emission display including the spacer

Description:
CLAIM OF PRIORITY 
   This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. §119 from an application for SPACER AND ELECTRON EMISSION DISPLAY DEVICE HAVING THE SAME, earlier filed in the Korean Intellectual Property Office on the 31 Oct. 2005 and there duly assigned Serial No. 10-2005-0103529. 
   BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention relates to a spacer and an electron emission display including the spacer. More particularly, the present invention relates to a spacer that is configured to prevent electric charges from being accumulated on the surface thereof and an electron emission display including the spacer. 
   2. Description of the Related Art 
   Generally, electron emission elements are classified into those using hot cathodes as an electron emission source, and those using cold cathodes as the electron emission source. There are several types of cold cathode electron emission elements, including Field Emitter Array (FEA) elements, Surface Conduction Emitter (SCE) elements, Metal-Insulator-Metal (MIM) elements, and Metal-Insulator-Semiconductor (MIS) elements. 
   A typical electron emission element includes an electron emission region and driving electrodes for controlling the electron emission of the electron emission region. The electron emission region emits electrons according to the voltage supplied to the driving electrodes. The electron emission elements are arrayed on a first substrate to form an electron emission device. The first substrate of the electron emission device is disposed to face a second substrate on which a light emission unit having a phosphor layer and an anode electrode are provided. The first and second substrates are sealed together at their peripheries using a sealing member and the inner space between the first and second substrates is exhausted to form an electron emission display having a vacuum envelope. 
   In addition, a plurality of spacers is disposed in the vacuum envelope to prevent the substrates from being damaged or broken by a pressure difference between the inside and outside of the vacuum envelope. 
   The spacers are generally formed of a nonconductive material, such as ceramic or glass, and disposed to correspond to non-emission areas between the phosphor layers so as not to interfere with traveling paths of the electrons emitted from the electron emission device toward the phosphor layers. 
   However, when the electrons emitted from the electron emission device travel toward the corresponding phosphor layers, an electron beam-diffusing phenomenon can occur due to a high electric field caused by the anode electrode. The electron beam-diffusing phenomenon cannot be completely suppressed even when a focusing electrode is provided. 
   Due to the electron beam-diffusing phenomenon, some of the electrons cannot land on the corresponding phosphor layers but collide with the spacers. The spacers, formed of glass or ceramic, have an electron emission coefficient higher than 1. Therefore, when the electrons collide with the spacers, many secondary electrons are emitted from the spacers and thus, the spacers are positively charged. When the spacers are charged, the electric field around the spacers varies to distort the electron beam path. 
   The electron beam distortion causes the electrons emitted from the electron emission device to move toward the spacers. In this case, a visible spacer problem can occur where the spacers are observed on a screen by a user, thereby deteriorating the display quality. 
   SUMMARY OF THE INVENTION 
   The present invention provides a spacer that can suppress an electron beam distortion to prevent the display quality from being deteriorated, and an electron emission display having the spacer. 
   In one exemplary embodiment of the present invention, a spacer is provided including: a main body; a resistive layer arranged on a side surface of the main body; a secondary electron emission preventing layer arranged on the resistive layer; and a diffusion preventing layer arranged between the resistive layer and the secondary electron emission layer, the diffusion preventing layer adapted to prevent interdiffusion between the resistive layer and the secondary electron emission preventing layer. 
   The diffusion preventing layer preferably has a resistivity lower than that of the secondary electron emission preventing layer but higher than that of the resistive layer. The diffusion preventing layer preferably includes either a metal nitride layer or a metal oxide layer. The metal nitride layer preferably includes either Cr or Ti. The metal oxide layer preferably includes a material selected from a group consisting of Cr, Ti, Zr, and Hf. 
   The resistive layer preferably includes a highly resistive material. The highly resistive material preferably includes a metal selected from a group consisting of Ag, Ge, Si, Al, W, Au, or an alloy thereof and a compound selected from a group consisting of Si 3 N 4 , AlN, PtN, GeN, or a combination thereof. 
   The secondary electron emission preventing layer preferably includes a material having a secondary electron emission coefficient within a range of 1 to 1.8. The secondary electron emission preventing layer preferably includes a material selected from a group consisting of diamond-like carbon, Nd 2 O 3 , and Cr 2 O 3 . 
   The spacer preferably further includes contact electrodes arranged on respective top and bottom surfaces of the main body. The contact electrodes preferably include a material selected from a group consisting of Ni, Cr, Mo, and Al. 
   In another exemplary embodiment of the present invention, an electron emission display is provided including: first and second substrates adapted to form a vacuum envelope; an electron emission unit arranged on the first substrate; a light emission unit arranged on the second substrate; and a spacer disposed between the first and second substrates, the spacer including: a main body; a resistive layer arranged on a side surface of the main body; a secondary electron emission preventing layer arranged on the resistive layer; and a diffusion preventing layer arranged between the resistive layer and the secondary electron emission layer and adapted to prevent interdiffusion between the resistive layer and the secondary electron emission preventing layer. 
   The electron emission unit preferably includes electron emission regions and electrodes adapted to drive the electron emission regions. The electron emission regions preferably include a material selected from a group consisting of carbon nanotubes, graphite, graphite nanofibers, diamonds, diamond-like carbon, fullerene (C 60 ), silicon nanowires, and a combination thereof. 
   The electron emission display preferably further includes a focusing electrode arranged between the first and second substrates. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     A more complete appreciation of the present invention and many of the attendant advantages thereof, will be readily apparent as the present invention becomes better understood by reference to the following detailed description when considered in conjunction with the accompanying drawings in which like reference symbols indicate the same or similar components, wherein: 
       FIG. 1A  is a partial exploded perspective view of an electron emission display according an embodiment of the present invention; 
       FIG. 1B  is an enlarged view of a portion A of  FIG. 1A ; 
       FIG. 2  is a partial sectional view of the electron emission display of  FIG. 1 ; and 
       FIG. 3  is a partial sectional view of an electron emission display according to another embodiment of the present invention. 
   

   DETAILED DESCRIPTION OF INVENTION 
   The present invention is described more fully below with reference to the accompanying drawings, in which exemplary embodiments of the present invention are shown. The present invention can, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein; rather these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present invention to those skilled in the art. 
     FIGS. 1A ,  1 B and  2  are views of an electron emission display according an embodiment of the present invention. In this embodiment, an electron emission display having an array of FEA elements is illustrated. 
   Referring to  FIGS. 1A and 2 , an electron emission display includes first and second substrates  10  and  20  facing each other and spaced apart by a predetermined interval. 
   An electron emission unit  100  for emitting electrons and a light emission unit  200  for emitting visible light using the electrons emitted from the electron emission unit  100  are respectively provided on facing surfaces of the first and second substrates  10  and  20 . 
   That is, a plurality of cathode electrodes (first electrodes)  110  are arranged on the first substrate  10  in a stripe pattern extending in a direction (a direction of a y-axis in  FIG. 1 ) and a first insulation layer  120  is arranged on the first substrate  10  to cover the cathode electrodes  110 . A plurality of gate electrodes (second electrodes)  130  are arranged on the first insulation layer  120  in a stripe pattern extending in a direction (a direction of an x-axis in  FIG. 1 ) to cross the cathode electrodes  110  at right angles. 
   One or more electron emission regions  160  are arranged on the cathode electrode at each crossed region of the gate and cathode electrodes  110  and  130 . Openings  120   a  and  130   a  corresponding to the electron emission regions  160  are arranged in the first insulation layer  120  and the gate electrodes  130  to expose the electron emission regions  160 . 
   The electron emission regions  160  are formed of a material which emits electrons when an electric field is applied thereto in a vacuum, such as a carbonaceous material or a nanometer-sized material. For example, the electron emission regions  160  can be formed of carbon nanotubes, graphite, graphite nanofibers, diamonds, diamond-like carbon, fullerene (C 60 ), silicon nanowires, or a combination thereof through a screen-printing, direct growth, chemical vapor deposition, or sputtering process. 
   In  FIG. 1A , three electron emission regions  160  are arranged in series along the cathode electrodes  110  at each crossed region and each of the electron emission regions  160  have a flat, circular top surface. The arrangement and top surface shape of the electron emission regions are, however, not limited thereto. 
   In the foregoing description, although the gate electrodes  130  are arranged above the cathode electrodes  110  with the first insulation layer  120  interposed therebetween, the present invention is not limited thereto. That is, the gate electrodes  130  can be disposed under the cathode electrodes  110  with the first insulation layer interposed therebetween. In such a case, the electron emission regions  160  can be arranged on sidewalls of the cathode electrodes on the first insulation layer. 
   One cathode electrode  110 , one gate electrode  130 , the first insulation layer  120 , and the three electron emission regions  160  form one electron emission element. That is, a plurality of the electron emission elements is arrayed on the first substrate  10  to form an electron emission device. 
   In addition, a second insulation layer  140  is arranged on the first insulation layer  120  while covering the gate electrodes  130  and a focusing electrode  150  is arranged on the second insulation layer  140 . Openings  140   a  and  150   a  through which electron beams pass are arranged in the second insulation layer  140  and the focusing electrode  150 . The openings  140   a  and  150   a  are arranged to correspond to one electron emission element to generally focus the electrons emitted from the electron emission regions  150  at each electron emission element  160 . The greater a level difference between the focusing electrode  150  and the electron emission regions  160 , the higher the focusing efficiency. Therefore, it is preferable that a thickness of the second insulation layer  140  is greater than that of the first insulation layer  120 . 
   In addition, the focusing electrode  150  can be arranged on an entire surface of the second insulation layer  140  or can be arranged in a predetermined pattern having a plurality of sections corresponding to the respective electron emission elements. 
   The focusing electrode  150  can be formed of a conductive layer deposited on the second insulation layer  140  or a metal plate having openings  150   a.    
   Phosphor layers  210  and a black layer  220  are arranged on a surface of the second substrate  20  facing the first substrate  10 . An anode electrode  230  formed of a conductive material, such as aluminum, is arranged on the phosphor and black layers  210  and  220 . The anode electrode  230  functions to heighten the screen luminance by receiving a high voltage required for accelerating the electron beams and reflecting the visible light rays radiated from the phosphor layers  210  to the first substrate  10  toward the second substrate  20 . 
   Alternatively, the anode electrode  230  can be formed of a transparent conductive material, such as Indium Tin Oxide (ITO), instead of the metallic material. In such a case, the anode electrode  230  is placed on the second substrate  20  and the phosphor and black layers  210  and  220  are arranged in a predetermined pattern on the anode electrode  230 . Alternatively, the anode electrode  230  can be arranged in a predetermined pattern corresponding to the pattern of the phosphor and black layers  210  and  220 . 
   Alternatively, the anode electrode  230  is formed of the transparent material and a metal layer for enhancing the luminance is arranged on the second substrate  20 . 
   The phosphor layers  210  can be arranged to correspond to the respective unit pixel regions defined on the first substrate  10 . Alternatively, the phosphor layers  210  can be arranged in a stripe pattern extending along a vertical direction (the y-axis of  FIG. 1 ) of the screen. The black layer  220  is formed of a non-transparent material, such as chrome or chromic oxide. 
   In the above-described electron emission display, the phosphor layers  210  are arranged to correspond to the respective electron emission elements  160 . One phosphor layer  210  and one electron emission element  160  that correspond to each other define one pixel of the electron emission display. 
   Disposed between the first and second substrates  10  and  20  are spacers  300  for uniformly maintaining a gap between the first and second substrates  10  and  20 . The spacers  300  are arranged at a non-emission region on which the black layer  220  is disposed. In this embodiment, a wall-type spacer is exampled. 
   Referring to  FIG. 1B , the spacer  300  includes a main body  310  formed of a non-conductive material, such as glass or ceramic, a resistive layer  321  covering side surfaces of the main body  310 , a diffusion preventing layer  322  arranged on the resistive layer  321 , and a secondary electron emission preventing layer  323  arranged on the diffusion preventing layer  322 . 
   The resistive layer  321  provides a traveling path for the electric charges that will be charged on the spacer  300  to prevent the electric charges from being accumulated on the spacer  300 . The resistive layer  321  is formed of a high resistive material having a relatively low electric conductivity. For example, the high resistive material includes a metal selected from a group consisting of Ag, Ge, Si, Al, W, and Au, or an alloy thereof and a compound selected from a group consisting of Si 3 N 4 , AlN, PtN, and GeN, or a combination thereof. Preferably, the high resistive material is selected from a group consisting of Ag/Si 3 N 4 , Ge/AlN, Si/AlN, Al/PtN, W/GeN, and Au/AlN. 
   The secondary electron emission preventing layer  323  minimizes the emission of the secondary electrons from the spacer  300  when the electrons collide with the spacer  300 . The secondary electron emission preventing layer  323  is formed of a material having a secondary electron emission coefficient within the range of 1 to 1.8, such as diamond-like carbon, Nd 2 O 3 , or Cr 2 O 3 . 
   The diffusion preventing layer  322  prevents the interdiffusion, which is generated between the resistive layer  321  and the secondary electron emission preventing layer  323  due to the heat applied during the sealing process for manufacturing the vacuum envelope by sealing the first and second substrates  10  and  20 , thereby preventing the surface reaction between the resistive layer  321  and the secondary electron emission preventing layer  323 . 
   The diffusion preventing layer  322  is formed a material having a resistivity lower than that of the secondary electron emission preventing layer  323  but higher than that of the resistive layer  321 . For example, the diffusion preventing layer  322  can be formed of a metal oxide material selected from a group consisting of CrN, TiN, CrO 2 , ZrO 2 , HfO 2 , and TiO 2 . 
   When the resistivity of the diffusion preventing layer  322  is lower than that of the resistive layer  321 , the current flows through the diffusion preventing layer  322  rather than the resistive layer  321  and thus the current flow of the resistive layer  321  cannot be effectively realized. In addition, when the resistivity of the diffusion preventing layer  322  is higher than that of the secondary electron emission preventing layer  323 , the electric charges can be accumulated on the diffusion preventing layer  322 . Therefore, it is preferable that the resistivity of the diffusion preventing layer  322  is less than that of the secondary electron emission preventing layer  323  but higher than that of the resistive layer  321 . 
   Contact electrode layers  331  and  332  can be further arranged on top and bottom surfaces of the spacer. The contact electrode layers  331  and  332  can be formed of Cr, Ni, Mo, or Al (see  FIG. 2 ). 
   Since the spacer  330  is electrically connected to the anode and focus electrodes  230  and  150  via the contact electrode layers  331  and  332 , the electrons charged on the spacer  300  are removed. 
   In addition, the spacer  300  can be formed in a cylinder-type having a circular-shape or cross-shape section in addition to the wall-type. 
   After the spacers  300  are disposed between the first and second substrates  10  and  20 , the first and second substrates  10  and  20  are sealed together at their peripheries using a sealing member through a high temperature thermal-bonding process and an inner space defined between the first and second substrate  10  and  20  is exhausted to form a vacuum envelope. 
   Since the surface reaction between the resistive layer  321  and the electron emission preventing layer  322  is prevented by the diffusion preventing layer  322  of the spacer  300 , the deterioration of the layer properties of the resistive layer  321  and secondary electron emission preventing layer  322  can be prevented. 
   The above-described electron emission display is driven when a predetermined voltage is supplied to the cathode, gate, focusing, and anode electrodes  110 ,  130 ,  150 , and  230 . For example, one of the cathode and gate electrodes  110  and  130  serves as scan electrodes receiving a scan drive voltage and the other functions as data electrodes receiving a data drive voltage. The focusing electrode  150  receives a negative voltage of several to tens volts. The anode electrode  230  receives a positive voltage of, for example, hundreds through thousands volts. 
   Electric fields are formed around the electron emission regions where a voltage difference between the cathode and gate electrodes  110  and  130  is equal to or higher than a threshold value and thus, electrons are emitted from the electron emission regions. The emitted electrons are converged while passing through the openings  150   a  of the focusing electrode  150  and strike the corresponding phosphor layers  210  by the high voltage supplied to the anode electrode  230 , thereby exciting the phosphor layers  210 . 
   During the above process, the electron beam is diffused despite the operation of the focusing electrode  150 . Therefore, some of the electrons cannot land on the corresponding phosphor layer  210  but collide with the spacer  300 . Even when the electrons collide with the spacer  300 , the secondary electron emission from the spacer  300  can be minimized by the secondary electron emission preventing layer  323 . In addition, even when the surface of the spacer  300  is charged with electric charges, the electric charges transfer to away from the spacer  300  by the resistive layer  321  and contact electrode layers  331  and  332  and thus the electric charges are not accumulated on the surface of the spacer  300 . 
   As a result, in the electron emission display, the electron beam distortion caused by the electric field distortion around the spacer  300  can be prevented. 
   Although an electron emission display having Field Emitter Array (FEA) elements is discussed in the above exemplary embodiment, the present invention is not limited to this example. That is, the present invention can be applied to an electron emission display having other types of electron emission elements, such as Surface Conduction Emitter (SCE) elements, Metal-Insulator-Metal (MIM) elements or Metal-Insulator-Semiconductor (MIS) elements. 
     FIG. 3  is a view of an electron emission display having an array of SCE elements, according to another embodiment of the present invention. In this embodiment, parts which are the same as those of the foregoing embodiment have been assigned like reference numerals and a detailed description thereof has been omitted. 
   Referring to  FIG. 3 , first and second substrates  40  and  20  face each other and are spaced apart by a predetermined interval. An electron emission unit  400  is provided on the first substrate  40  while a light emission unit  200  is provided on the second substrate  20 . 
   First and second electrodes  421  and  422  are arranged on the first substrate  40  and spaced apart from each other. Electron emission regions  440  are arranged between the first and second electrodes  421  and  422 . First and second conductive layers  431  and  432  are respectively arranged on the first substrate  40  between the first electrode  421  and the electron emission region  440  and between the electron emission region  440  and the second electrode  422  while partly covering the first and second electrodes  421  and  422 . That is, the first and second electrodes  421  and  422  are electrically connected to the electron emission region  440  by the first and second conductive layers  421  and  422 . 
   In this embodiment, the first and second electrodes  421  and  422  can be formed of a variety of conductive materials. The first and second conductive layers  431  and  432  can be a particle thin film formed of a conductive material, such as Ni, Au, Pt, or Pd. The electron emission regions  440  can be formed of graphite carbon or carbon compound. For example, the electron emission regions  440  can be formed of a material selected from a group consisting of carbon nanotubes, graphite, graphite nanofibers, diamonds, diamond-like carbon, fullerene (C 60 ), silicon nanowires, or a combination thereof. 
   When voltages are supplied to the first and second electrode  421  and  432 , current flows in a direction in parallel with surfaces of the electron emission regions  440  through the first and second conductive layers  431  and  432  to realize the surface-conduction electron-emission. The emitted electrons strike and excite the corresponding phosphor layers  210  by being attracted by the high voltage supplied to the anode electrode  230 . 
   According to the present invention, since the spacer includes the resistive layer, secondary electron emission preventing layer, and contact electrode layer, the electric field distortion around the spacer can be prevented and thus the electron beam distortion can be prevented. 
   Furthermore, since the spacer further includes the diffusion preventing layer arranged between the resistive layer and the secondary electron emission preventing layer, the deterioration of the layer properties due to the surface reaction between the secondary electron emission preventing layer and the resistive layer during the thermal bonding process can be prevented. 
   As a result, the visible spacer problem where the spacer is observed on the screen by a user can be solved and thus, the display quality of the electron emission display can be improved. 
   Although exemplary embodiments of the present invention have been described in detail hereinabove, it should be clearly understood that many variations and/or modifications of the basic inventive concept taught herein still fall within the spirit and scope of the present invention, as defined by the appended claims.