Patent Publication Number: US-2023142729-A1

Title: Integrated device package with an integrated heat sink

Description:
INCORPORATION BY REFERENCE TO ANY PRIORITY APPLICATIONS 
     Any and all applications for which a foreign or domestic priority claim is identified in the Application Data Sheet as filed with the present application are hereby incorporated by reference under 37 CFR 1.57. 
     BACKGROUND 
     Field of the Invention 
     The field relates to an electronic device and, in particular, to an integrated device package with an embedded heat sink. 
     Description of the Related Art 
     Various electronic devices (e.g., high power regulators), due to various inefficiencies, generate heat that should be dissipated. Otherwise, the generated heat may degrade or limit the product performance. Accordingly, there is a continuing need for improved electronic devices with efficient solutions for dissipating the generated heat. 
     SUMMARY 
     In one embodiment, an integrated device package can include an electronic component package. The electronic component package can comprise an electronic component; and a protective material in which the electronic component is at least partially embedded. The electronic component package can comprise a first surface and a second surface; and a heat sink plated onto the first surface. 
     In some embodiments, the electronic component comprises a passive electronic device. In some embodiments, the electronic component comprises an integrated device die. In some embodiments, the electronic component is partially embedded within the protective material, the heat sink plated onto an exposed surface of the electronic component. In some embodiments, the electronic component comprises an insulating layer over the protective material, wherein the electronic component is completely embedded within the protective material, the heat sink plated onto the insulating layer. In some embodiments, the electronic component is completely embedded within the protective material. In some embodiments, the heat sink is connected to the electronic component by at least one via, the at least one via disposed within the protective material and connecting the heat sink and the electronic component at least thermally. In some embodiments, the heat sink comprises a shaped metal layer provided over the first surface of the electronic component package. In some embodiments, the heat sink comprises a base portion and a plurality of projections extending in a direction away from the electronic component, the projections comprising fins spaced apart along one dimension of the first surface. In some embodiments, the heat sink comprises a base portion and a plurality of projections extending in a direction away from the electronic component, the projections comprising pins spaced apart in a two-dimensional (2D) array along a width and a length of the first surface. 
     In another embodiment, a method of manufacturing an integrated device package is disclosed. The method can include: at least partially embedding an electronic component within a protective material of an electronic component package, the electronic component package comprising a first surface and a second surface; and electroplating a heat sink onto the first surface. 
     In some embodiments, the electronic component comprises a passive electronic device. In some embodiments, the electronic component comprises an integrated device die. In some embodiments, at least partially embedding the electronic component comprises partially embedding the electronic component within the protective material so as to expose at least a portion of the electronic component through the protective material. In some embodiments, electroplating the heat sink comprises adding a metal layer over the first surface and plating the metal layer such that the metal layer directly contacts the electronic component. In some embodiments, at least partially embedding the electronic component comprises completely embedding the electronic component within the protective material. In some embodiments, electroplating the heat sink comprises adding a metal layer over the first surface and plating the metal layer such that the metal layer contacts an insulating layer over the protective material. In some embodiments, electroplating the heat sink comprises adding a metal layer over the first surface and forming, by a photolithography process, the metal layer in a shape for dissipating heat. In some embodiments, forming the metal layer in the shape for dissipating the heat comprises forming a plurality of projections extending in a direction away from the electronic component, the projections comprising fins spaced apart along one dimension of the first surface, wherein the space between the fins comprises a plurality of insulating portions. In some embodiments, forming the metal layer in the shape for dissipating the heat comprises forming a plurality of projections extending in a direction away from the electronic component, the projections comprising pins spaced apart in a two-dimensional (2D) array along a width and a length of the first surface, wherein the space between the pins comprises a plurality of insulating portions. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Embodiments of this disclosure will now be described, by way of non-limiting example, with reference to the accompanying drawings. 
         FIG.  1    is a schematic side sectional view of an electronic component package. 
         FIG.  2    is a schematic side sectional view showing an example of an integrated device package including an integrated heat sink, according to an embodiment. 
         FIG.  3    is a schematic perspective view showing an example of an electronic component package before a heat sink is added. 
         FIG.  4    is a schematic perspective view showing another example of an electronic component package before a heat sink is added. 
         FIG.  5    is a schematic perspective view showing an example of an integrated device package with a heat sink including a plurality of elongate fins. 
         FIG.  6    is a schematic perspective view showing another example of an integrated device package with a heat sink including an array of vertically-extending pins. 
         FIG.  7    is a flow chart showing a method of manufacturing an integrated device package including an embedded heat sink, according to an embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Electronic devices, including integrated circuit dies, can comprise devices that generate a significant amount of power. Heat generated from the dies can be dissipated in a variety of ways. With respect to electronic devices that generate heat, there are several ways in which the heat can be dissipated. An example heat dissipation pathway includes a pathway down into the system board (i.e., by a thermally-conductive pathway to the board). In many cases, the system boards are very dense and have many heat-generating components, and it is not feasible or desirable to pull all of the heat through the system board. Thus, other structures (e.g., heat sinks, cold plates, fans, etc.) are utilized with the electronic devices to improve the heat dissipation through the top of the components. 
     Some solutions typically add the other structures such as heat sinks as separate components. These increase cost (e.g., via added material and processes) and are not as efficient because of high thermally resistant polymers and adhesives used to attach, e.g., the heat sinks to the electronic devices. 
     Thus, as described herein, the package manufacturing process (e.g., to embed a die or component into a molding material) can be used to add an integrated heat sink into an electronic component package, which would not incur the increased costs discussed above. For example, a final top metal layer can be added and patterned to provide increased surface area to improve the convection cooling and heat dissipation characteristics of the package. The top metal pattern can mimic a heat sink (e.g., a pin-type or fin-type heat sink), but can be manufactured using plating technologies rather than being adhered to the package. 
       FIG.  1    is a schematic side sectional view of an electronic component package  1 , according to some implementations. The electronic component package  1  can be used in any suitable type of electronic system, and can be packaged in any suitable manner. The electronic component package  1  can include a first insulating layer  2 , a second insulating layer  3 , a plurality of first vias  4 , a plurality of second vias  10 , a plurality of laterally-extending traces  11 , a plurality of packaging terminations  5 , a protective material  6 , a second layer  7  of protective material, an electronic component  8  and a plurality of contact pads  9  that electrically connect the component  8  to the metallization  12 . The metallization  12  can comprise any suitable type of metal, such as, e.g., copper, as would be known to one of ordinary skill in the art. In various embodiments, the protective material can comprise an organic or polymer coating. For example, the protective material can comprise a molding compound in some embodiments. In other embodiments, the protective material can comprise a film, e.g., an organic epoxy resin which may include inorganic microparticle fillers, such as Ajinomoto Build-up Film (ABF), sold by Ajinomoto Group of Tokyo, Japan. 
     The electronic component  8  can comprise any suitable type of electronic component, such as an integrated device die (which can include active circuitry therein), a passive electronic device (such as a capacitor, an inductor, a resistor, a transformer, etc.), or any other suitable type of device. The component  8  can connect to the metallization  12  by way of the contact pads  9 . 
     As shown, the electronic component  8  can be embedded within the protective material  6 , and coupled to the packaging terminations  5  through the contact pads  9  and the second vias  10 . The electronic component  8  can be placed between the first insulating layer  2  and the second insulating layer  3 , wherein the first insulating layer  2  and the second insulating layer  3  can be connected by the first vias  4 . The second insulating layer  3  can be placed over a substrate such as a system board, e.g., a PCB (printed circuit board) (not shown). The packaging terminations  5  can be, e.g., a BGA (Ball Grid Array) or an LGA (Land Grid Array), and provide electrical connection to the PCB. The metallization  12  can include the vias  4 ,  10  which provide vertical communication through the protective material  6  and the second insulating layer  3 , respectively. The metallization  12  can also include the laterally-extending traces  11  that provide horizontal electrical communication within the package  1 . 
       FIG.  2    is a schematic side sectional view showing an example of an integrated device package  40  including an integrated heat sink  33 , according to an embodiment. The integrated device package  40  can also be used in any suitable type of electronic system. For example, the integrated device package  40  can be utilized for a high power application (e.g., a high power regulator). The integrated device package  40  can include an electronic component package  21  and the integrated heat sink  33 . The electronic component package  21  can include a first insulating layer  22 , a second insulating layer  23 , a plurality of first vias  24 , a plurality of second vias  30 , a plurality of laterally-extending traces  31 , a plurality of packaging terminations  25 , a protective material  26 , a second layer  27  of protective material, an electronic component  28  and a plurality of contact pads  29  (which electrically connect the electronic component  28  to the metallization  32 ), as well as a first surface  41  and a second surface  42 . The metallization  32  can include the vias  24 ,  30  which provide vertical communication through the protective material  26  and the second insulating layer  23 , respectively. Furthermore, the metallization  32  can also include the laterally-extending traces  31  that provide horizontal electrical communication within the integrated device package  40 . In some embodiments, the metallization  12  can comprise any suitable type of metal, such as, e.g., copper, as would be known to one of ordinary skill in the art. The heat sink  33  can include a plurality of projections  34  and a plurality of insulating portions  35  between corresponding projections  34 . The insulating portions  35  can comprise a gas (e.g., air) in some embodiments, such that the gas is provided between the projections  34 . In other embodiments, however, a solid state insulating materials (such as an organic or inorganic dielectric) can serve as the insulating portions  35  between adjacent projections  34 . 
     The electronic component  28  can comprise any suitable type of electronic component, such as an integrated device die (which can include active circuitry therein), a passive electronic device (such as a capacitor, an inductor, a resistor, a transformer, etc.), or any other suitable type of device. The electronic component  28  can connect to the metallization  32  by way of the contact pads  29 . 
     As shown, the electronic component  28  can be embedded within the protective material  26 , and coupled to packaging terminations  25  through the contact pads  29  and the second vias  30 . The electronic component  28  can be placed between the first insulating layer  22  and the second insulating layer  23 , wherein the first insulating layer  22  and the second insulating layer  23  can be connected by the first vias  24 . The second insulating layer  23  can be placed over a substrate such as a system board, e.g., a PCB (not shown) and coupled to the PCB, for example, by way of solder bumps (not shown). The packaging terminations  25  can be, e.g., a BGA or an LGA. The packaging terminations  25  can be disposed over the PCB and spaced apart along the second surface  42  in a pattern corresponding to, e.g., the BGA or the LGA, and provide electrical connection between the electronic component  28  and the PCB. 
     While not shown, in one embodiment, the electronic component  28  can comprise a die of one or more layers. In another embodiment, there can be more than one electronic component  28  embedded within the molding material  26 . 
     In some high power applications, the foregoing structure of the electronic component package  21  can generate power of at least 100 W, at least 500 W, at least 1 kW, or at least 3 kW. In some embodiments, it can generate power in a range of 100 W to 5 kW, in a range of 500 W to 5 kW, in a range of 1 kW to 5 kW, or in a range of 3 kW to 5 kW. In some applications, it can operate at one or more frequencies in a range of 30 kHz to 3 MHz, in a range of 100 kHz to 3 MHz, or in a range of 1 MHz to 3 MHz. It can also accommodate high relative currents, including current in a range of 50 A to 1000 A, in a range of 100 A to 1000 A, or in a range of 500 A to 1000 A. In some embodiments, it can comprise a passive device, such as an inductor or transformer. In embodiments that include an inductor, the inductance can be at least 10 μH, at least 50 μH, or at least 100 μH, for example, in a range of 10 μH to 100 μH. 
     Accordingly, high power devices like those disclosed herein can generate significant heat. Thus, it can be important to effectively remove the generated heat from, e.g., the electronic component  28 . As shown in  FIG.  2   , the heat sink  33  can be added to the first surface  41  of the electronic component package  21 , to dissipate the generated heat. For example, based on the heat sink  33  directly contacting the first vias  24 , most heat can be pulled away. 
     In one embodiment, the heat sink  33  can include the projections  34 , which can be spaced apart by the insulating portions  35 . The projections  34  can extend from a base portion that contacts the first surface  41 , and away from the electronic component package  21 . The first vias  24  can provide a thermal connection to the electronic component  28 , and provide, e.g., a thermal pathway for the generated heat discussed herein to be dissipated from the component  28  through the heat sink  33 . By providing a continuous connection between the vias  24 ,  30  and the heat sink  33  (i.e., without any added adhesive which may be highly thermally-resistant), the integrated device package  40  can achieve a more efficient heat dissipating characteristics than adding a heat sink with an adhesive. 
     In one embodiment, the heat sink  33  can comprise a metal layer that is added on the first surface  41  of the electronic component package  21 . For example, the heat sink  33  can be added by, e.g., electroplating the heat sink  33  onto (e.g., directly onto) the first insulating layer  22  and the upper pads  36  of the metallization  32 . In one embodiment, the dry film patterning or photolithography can allow the metal layer to be patterned to mimic a shape of a heat sink. For example, the metal layer can be plated with pins or fins. Electroplating the heat sink  33  onto the surface  41  of the electronic component package  21  can accordingly be performed without an adhesive between the electronic component package  21  and the heat sink  33 . Accordingly, in the illustrated embodiment, the electroplated metallic portion of the heat sink  33  can directly contact the portions of the insulating layer  22  and the portions of the metallization  32  over which the heat sink is deposited. The patterned metal layer (i.e., the heat sink  33 ), with its increased surface area, can provide an improved heat dissipation for the integrated device package  40  with convective cooling. As shown, for example, the projections  34  can be spaced apart by the insulating portions  35 , which can comprise a gas such as air or a solid-state insulating material, such that heat can be conveyed away from the integrated device package  40 . 
     Various embodiments utilizing the plating and photolithography processes developed as part of an embedded die manufacturing process can employ an inductor/ferrite manufacturing process to provide a thermally enhanced integrated device package  40  (e.g., high power inductors and transformers). This can be achieved by manufacturing inductors using the different metal layers in the structure to create parallel inductor windings between the metal layers, and can be further improved by incorporating ferrous dielectric layers between the metal layers to increase the inductance. Because the plating and photolithography process are used to provide the heat sink  33 , manufacturing of the integrated device package  40  provides a solution that does not add significantly to the material and process costs. By comparison, other solutions may experience increased material and processing costs, and may not be as efficient due to high thermally resistant polymers and adhesives used to attach separate components. In the embodiments disclosed herein, the integrated device package  40  with the integrated heat sink  33  can be integrated into a manufacturing process with little to no impact to pricing. Further, as explained above, increasing the available surface area of the heat sink by proper design of the heat sinks pins and fins for improved convective thermal dissipative properties can provide the ability to operate the finished module at high dissipative power densities. 
     In various embodiments, the heat sink  33  can be added onto (e.g., plated directly onto and contacting) the electronic component package  21  wherein the first surface  41  ( FIG.  3   ) may be, in some embodiments, the first insulating layer  22  (i.e., the entire surface of the electronic component package  21  facing the heat sink  33 ) or, in other embodiments, the first insulating layer  22  and the exposed upper surface of the electronic component  28  ( FIG.  4   ). This can be important when electrical isolation between the die and the heat sink is required. 
     Moreover, in various embodiments, the shape of the heat sink  33  can be formed or modified so as to include the heat-dissipating projections  34  as, e.g., a fin-type ( FIG.  5   ) or pin-type ( FIG.  6   ) heat sink. As illustrated herein in  FIG.  5   , for example, the projections  34  can comprise a plurality of elongated fins. The fins in  FIG.  5    can extend across a width of the first surface  41 . The fins in  FIG.  5    can be spaced along a length of the first surface  41  in a one-dimensional (1D) array of projections  34 . In other embodiments, as shown in  FIG.  6   , the projections  34  can comprise a plurality of pins disposed in an array over the first surface  41 . The pins of  FIG.  6    can be disposed in a two-dimensional (2D) array in which pins are spaced apart along the width and length of the first surface  41 . Beneficially, the integrated device package  40  may not include a separate heat sink structure that is adhered with an adhesive. 
     As explained herein, the integrated device package  40  can include any suitable type of electronic component  28 . For example, the electronic component  28  can comprise a semiconductor die, such as a processor die, a memory die, a sensor die, a microelectromechanical systems die, etc. The packaging terminations  25  can connect to any suitable carrier. In the illustrated embodiment, the packaging terminations  25  can be disposed on the second surface  42  of the electronic component package  21 . 
       FIG.  7    is a flow chart showing a method  50  of manufacturing an integrated device package  40  including an integrated heat sink  33 , according to an embodiment. 
     In step  51 , the method  50  comprises at least partially embedding an electronic component  28  within a protective material  26 . In one embodiment, the electronic component  28  can be only partially embedded within the protective material  26 . For example, the electronic component  28  may be exposed through the protective material  26  in some embodiments (see  FIG.  4   ). In another embodiment, the electronic component  28  can be embedded completely within the protective material  26  (see  FIG.  3   ). In some embodiments, the integrated device package  40  can have additional vias (e.g., through the protective material  26 ) to at least thermally connect the electronic component  28  to the heat sink  33 . 
     In step  52 , the method  50  comprises electroplating a heat sink  33  on a first surface of an electronic component package  21 . In one embodiment, as discussed herein, electroplating the heat sink  33  can include utilizing the plating and photolithography processes developed as part of an embedded die manufacturing process to provide a thermally enhanced integrated device package  40  (e.g., high power inductors and transformers). In the embodiments disclosed herein, the integrated device package  40  with the embedded heat sink  33  can be economically integrated into a molded packaging process. Further, as explained above, increasing the available surface area for improved convective thermal dissipative properties can provide the ability to operate the finished module at high dissipative power densities. Thus, while electroplating the heat sink  33  can comprise forming the projections  34  that are fin-type ( FIG.  5   ) or pin-type ( FIG.  6   ), it can also include forming the projections  34  in any other way so as to increase the available surface area of the heat sink  33  for heat dissipation. 
     Unless the context clearly requires otherwise, throughout the description and the claims, the words “comprise,” “comprising,” “include,” “including” and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense; that is to say, in the sense of “including, but not limited to.” The word “coupled”, as generally used herein, refers to two or more elements that may be either directly connected, or connected by way of one or more intermediate elements. Likewise, the word “connected”, as generally used herein, refers to two or more elements that may be either directly connected, or connected by way of one or more intermediate elements. Additionally, the words “herein,” “above,” “below,” and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Moreover, as used herein, when a first element is described as being “on” or “over” a second element, the first element may be directly on or over the second element, such that the first and second elements directly contact, or the first element may be indirectly on or over the second element such that one or more elements intervene between the first and second elements. Where the context permits, words in the above Detailed Description using the singular or plural number may also include the plural or singular number respectively. Regarding the word “or” in reference to a list of two or more items, that word covers all of the following interpretations of the word: any of the items in the list, all of the items in the list, and any combination of the items in the list. 
     Moreover, conditional language used herein, such as, among others, “can,” “could,” “might,” “may,” “e.g.,” “for example,” “such as” and the like, unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain embodiments include, while other embodiments do not include, certain features, elements and/or states. Thus, such conditional language is not generally intended to imply that features, elements and/or states are in any way required for one or more embodiments. 
     Although disclosed in the context of certain embodiments and examples, it will be understood by those skilled in the art that the present invention extends beyond the specifically disclosed embodiments to other alternative embodiments and/or uses and obvious modifications and equivalents thereof. Further, unless otherwise noted, the components of an illustration may be the same as or generally similar to like-numbered components of one or more different illustrations. In addition, while several variations have been shown and described in detail, other modifications, which are within the scope of this disclosure, will be readily apparent to those of skill in the art based upon this disclosure. It is also contemplated that various combinations or sub-combinations of the specific features and aspects of the embodiments may be made and still fall within the scope of the present disclosure. It should be understood that various features and aspects of the disclosed embodiments can be combined with, or substituted for, one another in order to form varying modes of the disclosed invention. Thus, it is intended that the scope of the present invention herein disclosed should not be limited by the particular disclosed embodiments described above, but should be determined only by a fair reading of the aspects that follow.