Patent Publication Number: US-2023141463-A1

Title: Touch display apparatus and test driving method for the same

Description:
RELATED APPLICATIONS 
     This application claims priority to Chinese Application Serial Number 202111326303.9 filed Nov. 10, 2021, which is herein incorporated by reference. 
     BACKGROUND 
     Field of Invention 
     The present invention relates to a touch display apparatus and a test driving method for the touch display panel. 
     Description of Related Art 
     With the evolution of display and panel production technologies, flat display panels are now applied in various types of electronic products. For example, smart phones, tablets, laptops, or monitors, etc., are all equipped with a flat display panel. Further, touch sensing technology can also be utilized for the production of flat display panels, so that flat display panels also have touch operation functions, thus facilitating convenience for user operation. Among the main touch technologies currently used for the display devices, an in-cell touch technology integrates production of touch sensing electrodes into a manufacturing process of display panel, in which common electrodes are also arranged for touch sensing. In a production process of in-cell touch display panel, an image display test is often performed to confirm display accuracy before a circuit board and a chip are assembled, such that a pixel structure can be tested and repaired in time if any problem is found. 
     However, when testing an in-cell touch display panel with touch sensing lines and dummy touch sensing lines, if the voltage level or load of the touch sensing lines and the dummy touch sensing lines are inconsistent, then straight streak phenomenon might occur in a displayed image due to different color scales, which leads an operator to misjudge or erroneous release of an in-cell touch display panel that is defective. 
     SUMMARY 
     The invention is to provide a touch display apparatus and a test driving method for the same, which can match voltage levels and impedances of touch sensing lines to those of dummy touch sensing lines for a test of touch sensing and image display, and thus can avoid straight streak phenomenon in a displayed image due to different color scales, so as to improve test accuracy. 
     According to the aforementioned objectives, the invention provides a touch display apparatus which includes a touch display panel with an active area and a peripheral area. The touch display panel includes a substrate, plural touch electrodes, plural touch sensing lines, plural dummy touch sensing lines and plural first transistors. The touch electrodes are disposed on the substrate and in the active area. The touch sensing lines are disposed on the substrate and each electrically connected to one of the touch electrodes. The dummy touch sensing lines are disposed on the substrate, the touch sensing lines and the dummy touch sensing lines are in parallel with each other in the active area, and the dummy touch sensing lines are electrically connected with each other. The first transistors are disposed on the substrate and in the peripheral area. Each first transistor has a first terminal, a second terminal and a control terminal; the first terminals of the first transistors are electrically connected with each other, the second terminal of each first transistor is electrically connected to one of the touch sensing lines, and the control terminals of the first transistors are electrically connected with each other. 
     In accordance with some implementations of the invention, the touch display panel further includes a potential line disposed on the substrate and in the peripheral area, and the potential line is electrically connected to the dummy touch sensing lines. 
     In accordance with some implementations of the invention, during an image display test period of the touch display panel, the control terminals of the first transistors are configured to receive an enabling signal to turn on the first transistors, and the first terminals of the first transistors and the potential lines are configured to receive a common voltage signal. 
     In accordance with some implementations of the invention, the touch display panel further includes a second transistor disposed on the substrate and in the peripheral area. The second transistor includes a first terminal, a second terminal and a control terminal, and the second terminal of the second transistor is electrically connected to the potential line. 
     In accordance with some implementations of the invention, during a screen testing period of the touch display panel, the control terminals of the first transistors and the control terminal of the second transistor are configured to receive an enabling signal to turn on the first transistors and the second transistor, and the first terminals of the first transistors and the first terminal of the second transistor are configured to receive a common voltage signal. 
     In accordance with some implementations of the invention, the touch display panel further includes plural first bonding pads and a second bonding pad disposed on the substrate and in the peripheral area. Each first bonding pad is electrically connected to one of the touch sensing lines, and the second bonding pad is electrically connected to the dummy touch sensing lines. 
     In accordance with some implementations of the invention, the touch display panel further includes a driver chip electrically connected to the first bonding pads and the second bonding pads. During a display period of the touch display apparatus, the driver chip is configured to transmit a common voltage signal to the first bonding pads and the second bonding pad. 
     In accordance with some implementations of the invention, the touch display panel further includes plural data lines, plural subpixels and plural third transistors. The data lines and the subpixels are disposed on the substrate and in the active area, and each subpixel is electrically connected to one of the data lines. The third transistors are disposed on the substrate and in the peripheral area. Each third transistor has a first terminal, a second terminal and a control terminal; the first terminals of the third transistors are electrically connected with each other, the second terminal of each third transistor is electrically connected to one of the data lines, and the control terminals of the third transistors are electrically connected with each other. 
     According to the aforementioned objectives, the invention provides a test driving method for a touch display panel with an active area and a peripheral area and having a substrate, plural touch electrodes, plural touch sensing lines, plural dummy touch sensing lines and plural first transistors. The touch electrodes are disposed on the substrate and in the active area. The touch sensing lines are disposed on the substrate and each electrically connected to one of the touch electrodes. The dummy touch sensing lines are disposed on the substrate, the touch sensing lines and the dummy touch sensing lines are in parallel with each other in the active area, and the dummy touch sensing lines are electrically connected with each other. The first transistors are disposed on the substrate and in the peripheral area. Each first transistor has a first terminal, a second terminal and a control terminal; the first terminals of the first transistors are electrically connected with each other, the second terminal of each first transistor is electrically connected to one of the touch sensing lines, and the control terminals of the first transistors are electrically connected with each other. The test driving method includes: transmitting an enabling signal to the control terminals of the first transistors to turn on the first transistors; transmitting a common voltage signal to the first terminals of the first transistors and to the touch sensing lines through the first transistors that are turned on; and transmitting the common voltage signal to the dummy touch sensing lines. 
     In accordance with some implementations of the invention, the touch display panel further includes a second transistor disposed on the substrate and in the peripheral area. The second transistor includes a first terminal, a second terminal and a control terminal, and the second terminal of the second transistor is electrically connected to the dummy touch sensing lines. The test driving method further includes transmitting an enabling signal to the control terminal of the second transistor to turn on the second transistor. In a step of transmitting the common voltage signal to the dummy touch sensing lines, the common voltage signal is transmitted to the first terminal of the second transistor and is then transmitted to the dummy touch sensing lines via the second transistor that is turned on. 
     An advantage of the invention is at least that, the touch display apparatus and the test driving method in accordance with the embodiments of the invention can match voltage levels and impedances of touch sensing lines to those of dummy touch sensing lines for a test of touch sensing and image display, and thus can avoid straight streak phenomenon in a displayed image due to different color scales, so as to improve test accuracy. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention can be more fully understood by reading the following detailed description of the embodiment, with reference made to the accompanying drawings as follows. 
         FIG.  1 A  is a schematic diagram of a touch display panel in accordance with a first embodiment of the invention. 
         FIG.  1 B  is a schematic diagram of a part of elements of the touch display panel in  FIG.  1 A . 
         FIG.  1 C  is a schematic diagram of a touch display apparatus in accordance with the first embodiment of the invention. 
         FIG.  2    is an example of the pixel structure in the active area of the touch display panel in  FIG.  1 A . 
         FIG.  3    is another example of the pixel structure in the active area of the touch display apparatus in  FIG.  1 A . 
         FIG.  4    is a schematic diagram illustrating the transmission paths of the common voltage signal in an image display test period of the touch display panel in  FIG.  1 A . 
         FIG.  5    is a schematic diagram illustrating the transmission paths of the common voltage signal in the display period of the touch display apparatus in  FIG.  1 C  for one example. 
         FIG.  6    is a schematic diagram illustrating the transmission paths of the common voltage signal in the display period of the touch display apparatus in  FIG.  1 C  for another example. 
         FIG.  7    is a schematic diagram illustrating signal transmissions of the touch display apparatus in  FIG.  1 C  in the touch sensing period. 
         FIG.  8 A  is a schematic diagram of a touch display panel in accordance with a second embodiment of the invention. 
         FIG.  8 B  is a schematic diagram of a part of elements of the touch display panel in  FIG.  8 A . 
         FIG.  8 C  is a schematic diagram of a touch display apparatus in accordance with the second embodiment of the invention. 
         FIG.  9    is a schematic diagram illustrating the transmission paths of the common voltage signal in an image display test period of the touch display panel in  FIG.  8 A . 
         FIG.  10    is a schematic diagram illustrating the transmission paths of the common voltage signal in the display period of the touch display apparatus in  FIG.  8 C  for one example. 
         FIG.  11    is a schematic diagram illustrating the transmission paths of the common voltage signal in the display period of the touch display apparatus in  FIG.  8 C  for another example. 
         FIG.  12    is a schematic diagram illustrating signal transmissions of the touch display apparatus in  FIG.  8 C  in the touch sensing period. 
         FIG.  13    is a schematic diagram of a touch display panel for a first variant example in accordance with the second embodiment of the invention. 
         FIG.  14 A  is a schematic diagram of a touch display panel for a second variant example in accordance with the second embodiment of the invention. 
         FIG.  14 B  is a schematic diagram showing connections of the touch sensing lines and the corresponding touch electrodes and transistors in the touch display panel in  FIG.  8 C . 
         FIG.  14 C  is a schematic diagram showing connections of the data lines and corresponding subpixels and transistors in the touch display panel in  FIG.  8 C . 
         FIG.  15    is a schematic diagram of a touch display panel for a third variant example in accordance with the second embodiment of the invention. 
         FIG.  16    is a schematic diagram of a touch display panel for a fourth variant example in accordance with the second embodiment of the invention. 
         FIG.  17 A  is a schematic diagram of a touch display panel for a fifth variant example in accordance with the second embodiment of the invention. 
         FIG.  17 B  is a schematic diagram of a touch display apparatus for the fifth variant embodiment in accordance with the second embodiment of the invention. 
         FIG.  18    is a schematic diagram of a touch display panel for a sixth variant example in accordance with the second embodiment of the invention. 
     
    
    
     DETAILED DESCRIPTION 
     Specific embodiments of the present invention are further described in detail below with reference to the accompanying drawings, however, the embodiments described are not intended to limit the present invention and it is not intended for the description of operation to limit the order of implementation. 
     Terms used herein are only used to describe the specific embodiments, which are not used to limit the claims appended herewith. Unless limited otherwise, the term “a,” “an,” “one” or “the” of the single form may also represent the plural form. 
     It will be understood that, although the terms “first,” “second,” “third” ... etc., may be used herein to describe various elements, components and/or signals, these elements, components and/or signals, should not be limited by these terms. These terms are only used to distinguish elements, components and/or signals. 
     The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. 
     The document may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. 
     In addition, for the purpose of simplifying the drawings, some conventional structures and elements in the art will be illustrated in the drawings in a simple and schematic manner, or will not appear in the drawings, and the actual size and proportion of each element herein are not limited to the content illustrated in the drawings. 
       FIG.  1 A  is a schematic diagram of a touch display panel  100 P in accordance with a first embodiment of the invention. The touch display panel  100 P may be, for example, a liquid crystal display (LCD) apparatus of twisted nematic (TN) mode, in-plane switching (IPS) mode, fringe-field switching (FFS) mode, vertical alignment (VA) mode or other different modes, or a light-emitting diode (LED) touch display panel of organic light-emitting diode (OLED) or micro light-emitting diode (micro LED). For the embodiment in which the touch display panel  100 P is a liquid crystal touch display panel, the touch display panel  100 P further includes another substrate and a liquid crystal layer (not shown) interposed between the two substrates. In addition, according to the structural type, the touch display panel  100 P may be an in-cell type touch display panel or another suitable type touch display panel. 
     The touch display panel  100 P has an active area AA and a peripheral area PA. Data lines DL, scan lines GLA, GLB, touch sensing lines SL and dummy touch sensing lines DSL are disposed on the substrate  110  (i.e. disposed on the substrate  110  in the direction D 1 ) and in the active area AA, and transistors T 1 -T 2 , signal lines EL 1 -EL 3 , a potential line VL, test pads PAD 1 -PAD 5  and bonding pads BP 1 -BP 5  are disposed on the substrate  110  (i.e. disposed on the substrate  110  in the direction D 1 ) and in the peripheral area PA. The data lines DL, the touch sensing lines SL and the dummy touch sensing lines DSL are in parallel with each other in the active area AA (i.e. the extending direction of the touch sensing lines SL in the active area AA and the extending direction of the dummy touch sensing lines DSL in the active area AA are parallel, when viewed in the top view direction), and all of these lines extend upward and downward (i.e. along the direction D 2  and the direction opposite to the direction D 2 ) to the peripheral area PA. The scan lines GLA extend toward left (i.e. along the direction opposite to the direction D 3 ) to the peripheral area PA and are electrically connected to the scan driving circuit  120 A, and the scan lines GLB extend toward right (i.e. along the direction D 3 ) to the peripheral area PA and are electrically connected to the scan driving circuit  120 B. The touch electrodes and the pixels of the touch display panel  100 P are omitted in  FIG.  1 A , the connections of the touch sensing lines SL and the touch electrodes are illustrated  FIG.  1    B, and the connections of the data lines DL, the scan lines GLA, GLB and the pixels are illustrated in  FIGS.  2 - 3   . 
     As shown in  FIG.  1 A , the transistors T 1 -T 2  are arranged in the peripheral area PA and outside of the side edge AA_S 1  of the active area AA in the direction D 2 . Each of the transistors T 1 -T 2  has a control terminal, a first terminal and a second terminal. In the context, “control terminal,” “first terminal” and “second terminal” of a transistor respectively represent the gate, the source and the drain of a transistor, or alternatively respectively represent the gate, the drain and the source of a transistor. The first terminals of the transistors T 1 -T 2  are respectively electrically connected to the signal lines EL 1 -EL 2 , and the control terminals of the transistors T 1 -T 2  are all electrically connected to the signal line EL 3 . The second terminal of each transistor T 1  is electrically connected to a corresponding touch signal line SL, and the second terminal of each transistor T 2  is electrically connected to a corresponding data line DL. 
     The test pads PAD 1 -PAD 5  are disposed on the substrate  110  and in the peripheral area PA. The test pads PAD 1  are electrically connected to the signal line EL 1 , the test pads PAD 2  are electrically connected to the potential line VL, the test pads PAD 3  are electrically connected to the signal line EL 2 , the test pads PAD 4  are electrically connected to the signal line EL 3 , and the test pads PAD 5  are divided into test pad groups PGA, PGB. As shown in  FIG.  1 A , when viewed in the top view direction (i.e. in the direction D 1 ), the two test pads PAD 1  are respectively at the left and right sides of the substrate  110  and are electrically connected with each other via the signal line EL 1 , the two test pads PAD 2  are respectively at the left and right sides of the substrate  110  and are electrically connected with each other via the potential line VL, the two test pads PAD 3  are respectively at the left and right sides of the substrate  110  and are electrically connected with each other via the signal line EL 2 , the two test pads PAD 4  are respectively at the left and right sides of the substrate  110  and are electrically connected with each other via the signal line EL 3 , and the two test pad groups PGA, PGB are respectively at the left and right sides of the substrate  110 . In the embodiment, the number of each of the test pads PAD 1 -PAD 4  is two, but the invention is not limited thereto. In a variant embodiment, the number of each of the test pads PAD 1 -PAD 4  may be one. The signal lines EL 1 -EL 3  are arranged at the upper, left and right sides of the substrate  110  and detour around the active area AA to be respectively electrically connected to the test pads PAD 1 , PAD 3 , PAD 4 . 
     The test pads PAD 5  in the test pad group PGA are electrically connected to the scan driving circuit  120 A, and test pads PAD 5  in the test pad group PGB are electrically connected to the scan driving circuit  120 B. The scan driving circuits  120 A and  120 B may be disposed on the substrate  110  and in the peripheral area PA and outside of the left and right sides of the active area AA. In some embodiments, the touch display panel  100 P may be a system on glass (SOG), in which the scan driving circuits  120 A and  120 B are formed directly on the substrate  110 . In other words, the scan driving circuits  120 A,  120 B are gate driver on array (GOA) structures. 
     A chip bonding area CA is in the peripheral area PA and outside of the side edge AA_S 2  of the active area AA. As shown in  FIG.  1 A , a bonding pad group BPG, which includes the bonding pads BP 1 -BP 5 , is disposed on the substrate  110  and in the chip bonding area CA. The bonding pads BP 1 , BP 2  are respectively electrically connected to the touch sensing lines SL and the data lines DL, the bonding pads BP 3  are all electrically connected to the potential line VL, the bonding pads BP 4  are electrically connected to the control terminals of the transistors T 1 -T 2 , and the bonding pads BP 5  respectively at the left and right sides of the substrate  110  are respectively electrically connected to the scan driving circuits  120 A and  120 B. As shown in  FIG.  1 A , the bonding pads BP 3  are electrically connected to the potential line VL via the test pads PAD 2 , the bonding pads BP 4  may be electrically connected to the control terminals of the transistors T 1 -T 2  via the test pads PAD 4  and the signal line EL 3 , the bonding pads BP 5  at the left side of the substrate  110  may be electrically connected to the scan driving circuit  120 A through the test pads PAD 5  of the test pad group PGA, and the bonding pads BP 5  at the right side of the substrate  110  may be electrically connected to the scan driving circuit  120 B through the test pads PAD 5  of the test pad group PGB, but the invention is not limited thereto. In another embodiment, the bonding pads BP 3  and the test pads PAD 2  may be individually coupled to the potential line VL, the bonding pads BP 4  and the test pads PAD 4  may be individually coupled to the signal line EL 3 , the bonding pad BP 5  at the left side of the substrate  110  and the test pads PAD 5  of the test pad group PGA may be individually coupled to the scan driving circuit  120 A, and the bonding pads BP 5  at the right side of the substrate  110  and the test pads PAD 5  of the test pad group PGB may be individually coupled to the scan driving circuit  120 B. It is noted that, the bonding pads BP 1 -BP 5  in the bonding area CA are arranged for bonding to connection pads of a driver chip (which will be further described in the following paragraphs in conjunction with  FIG.  3   ), and thus the size and area of each of the bonding pad BP 1 -BP 5  is usually small, causing the test pins of the test machine unable to be aligned with the bonding pads BP 1 -BP 5  precisely to verify whether the touch display panel  100 P is normal during an image display test on the touch display panel  100 P before shipping. In the embodiments of the invention, the size of each of the test pads PAD 1 -PAD 5  may be larger than the size of any one of the bonding pads BP 1 -BP 5 , such that the test pins of the test machine can be accurately aligned with and contact the test pads PAD 1 -PAD 5  during an image display test, so as to transmit test signals to the test pads PAD 1 -PAD 5  for the touch display panel  100 P to display a test image. For example, the length of each of the test pads PAD 1 -PAD 5  may be larger than the length of any of the bonding pads BP 1 -BP 5 , and/or the width of each of the test pads PAD 1 -PAD 5  may be larger than the width of any of the bonding pads BP 1 -BP 5 . 
       FIG.  1 B  is a schematic diagram of a part of the elements of the touch display panel  100 P in  FIG.  1 A , which omits illustration of the scan lines GLA and GLB in the active area AA. Referring to  FIGS.  1 A and  1 B  simultaneously, touch electrodes TP are disposed on the substrate  110  in the direction D 1  and in the active area AA, the potential line VL is in the peripheral area PA and surrounds the active area AA, each touch electrode TP is electrically connected to a corresponding touch sensing line SL, and the dummy touch sensing lines DSL are neither coupled to the touch electrodes TP. The dummy touch sensing lines DSL and the bonding pads BP 3  are electrically connected to the potential line VL. The length, width and shape of each dummy touch sensing line DSL in the active area AA are preferred to be the same as the length, width and shape of each touch sensing line SL in the active area AA, but the invention is not limited thereto. In the embodiment, the touch electrodes TP and the touch sensing lines SL are formed from different conductive layers (e.g. respectively formed from a transparent conductive layer and a metal layer), and thus each touch electrode TP may be electrically connected to a corresponding touch sensing line SL via a connection structure P 1  (e.g. a through hole penetrating through at least one insulating layer) for touch sensing, but the invention is not limited thereto. In another embodiment, the touch electrodes TP and the touch sensing lines SL may be formed from the same conductive layer, and each touch electrode TP may be directly coupled to a corresponding touch sensing line SL. In the embodiment, at least a part of the potential line VL and the dummy touch sensing lines DSL are formed form different conductive layers (e.g. at least a part of the potential line VL and the dummy touch sensing lines DSL are formed respectively from the a first metal layer and a second metal layer), and thus the two ends of each dummy touch sensing line DSL are electrically connected to the potential line VL respectively via connection structures P 2  (e.g. a through hole penetrating through at least one insulating layer). However, the invention is not limited thereto. In another embodiment, at least a part of the potential line VL and the dummy touch sensing lines DSL may be formed from the same conductive layer, and the dummy touch sensing lines DSL may be directly coupled to the potential line VL. 
       FIG.  1 C  is a schematic diagram of a touch display apparatus  100  in accordance with the first embodiment of the invention. The touch display apparatus  100  includes the touch display panel  100 P in  FIG.  1 A  and a driver chip  130  which is bonded to the bonding pads BP 1 -BP 5  on the substrate  110 . As shown in  FIG.  1 C , the driver chip  130  is in the chip bonding area CA of the substrate  110  and covers the bonding pad group BPG after being bonded to the substrate  110 . Some connection pads (not shown) of the driver chip  130  are electrically connected to the bonding pads BP 1 -BP 5 , such that various signals are provided to the touch sensing lines SL, the data lines DL, the potential line VL, the control terminals of the transistors T 1 -T 2  and the scan driving circuits  120 A,  120 B via the bonding pads BP 1 -BP 5  when the touch display apparatus  100  performs a display and touch sensing operation. The signals transmitted to the bonding pads BP 1 -BP 5  by the driver chip  130  in the display period and the touch sensing period of the touch display apparatus  100  will be further described in the following paragraphs. The driver chip  130  may be a chip having touch and display driving integration circuit (TDDI circuit) or another chip with touch detection driving and pixel data driving functions. 
       FIG.  2    is an example of the pixel structure in the active area AA of the touch display panel  100 P in  FIG.  1 A . The pixel structure shown in  FIG.  2    is a single-gate pixel structure; that is, subpixels PX 1 -PX 3  of each pixel PX are coupled to the same scan line GL and different data lines DL. The subpixels PX 1 -PX 3  may be a first color subpixel, a second color subpixel and a third color subpixel, and the first to three colors are different. In the embodiment, the subpixels PX 1 -PX 3  may be respectively a red subpixel, a green subpixel and a blue subpixel, but the invention is not limited thereto. The scan lines GL in  FIG.  2    may be the scan lines GLA or the scan lines GLB in  FIG.  1   , and each of the subpixels PX 1 -PX 3  has a thin-film transistor, a pixel electrode and a common electrode (not shown). When the scan signals respectively applied to the scan lines GL sequentially switch to an enabling level (e.g. a high-voltage level), the data lines DL transmit data signals to the pixel electrodes via the thin-film transistors. In addition, a touch sensing line SL or a dummy touch sensing line DSL is arranged at one side of each pixel PX (including three subpixels PX 1 -PX 3 ). As shown in  FIG.  2   , the arrangement of the data lines DL, the touch sensing lines SL and the dummy touch sensing lines DSL along the extending direction of the scan lines GL (e.g. the direction D 3 ) may be sequentially, for example, three data lines DL, one touch sensing line SL, three data lines DL, one touch sensing line SL, three data lines DL, one dummy touch sensing line DSL . . . , but the invention is not limited thereto. Specifically, in an area where six data lines DL are sequentially arranged in the extending direction of the gate lines GL (e.g. the direction D 3 ), one touch sensing line SL or one dummy touch sensing line DSL is arranged between three data lines DL electrically connected to subpixels of different colors and three other data lines DL electrically connected to subpixels of different colors. 
     The common electrodes of the subpixels PX 1 -PX 3  are electrically connected with each other to form a touch electrode TP. For example, if the touch display panel  100 P has 720×1536 pixels PX (i.e. 720×1536×3 subpixels PX 1 -PX 3 ) and 18×32 touch electrodes TP, each touch electrode TP may be formed of the common electrodes of 40×48×3 subpixels PX 1 -PX 3  that are electrically connected with each other. During the display period of the touch display apparatus  100 , the common electrodes of the subpixels PX 1 -PX 3  receive the common voltage signal, i.e. the touch electrodes receive the common voltage signal; during the touch sensing period of the touch display apparatus  100 , the touch electrodes TP are configured to detect a touch position of a user. 
       FIG.  3    is another example of the pixel structure in the active area AA of the touch display apparatus  100  in  FIG.  1 A . In comparison with the pixel structure shown in  FIG.  2   , the pixel structure shown in  FIG.  3    is a dual-gate pixel structure; that is, the pixel structure shown in  FIG.  3    has subpixel pairs each constituted of two neighboring pixels (e.g. the subpixels PX 1 -PX 2  electrically connected to the same data line DL), and the subpixels of the same subpixel pair are respectively coupled to the scan lines GLA, GLB and are coupled to the same data line DL, and a touch sensing line SL or a dummy touch sensing line DSL is arranged between adjacent subpixel pairs. As shown in  FIG.  3   , the arrangement of the data lines DL, the touch sensing lines SL and the dummy touch sensing lines DSL along the extending direction of the gate lines GL (e.g. the direction D 3 ) may be sequentially, for example, one data line DL, one touch sensing line SL, one data line DL, one dummy touch sensing line DSL, one data line DL, one touch sensing line SL, one data line DL . . . , but the invention is not limited thereto. Specifically, along the extending direction of the gate lines GL (e.g. the direction D 3 ), one touch sensing line SL or one dummy touch sensing line DSL is disposed between two adjacent data lines DL. For each subpixel, when the scan signal applied to the scan line switches to an enabling level (e.g. a high-voltage level), a corresponding data line DL provides a data signal to the pixel electrode via the thin-film transistor. 
     It is noted that the arrangement of the touch electrodes TP, the scan lines GL, GLA, GLB, the data lines DL, the touch sensing lines SL and the dummy touch sensing lines DSL and the number of the subpixels PX 1 -PX 3  shown in  FIGS.  1 B,  2  and  3    are merely an example, and are not intended to constitute any substantial limitation in the invention. 
     Referring to  FIGS.  1 A and  1 B , before the driver chip  130  is electrically connected to the touch display panel  100 P, such as before the driver chip  130  is mounted in the chip bonding area CA of the substrate  110 , an image display test (e.g. an all-white image display test) is performed on the touch display panel  100 P to verify whether the touch display panel  100 P is normal before shipping. During the test period of the touch display panel  100 P, the test pins of the test machine may be utilized to contact the test pads PAD 1 -PAD 5 . The test machine transmits an enabling signal (e.g. a high-voltage signal) to the test pads PAD 4 , such that the enabling signal is transmitted to the signal line EL 3  through the test pads PAD 4  for turning on the transistors T 1 -T 2 . The test machine transmits a first scan circuit test signal and a second scan circuit test signal respectively to the test pads PAD 5  of the test pad groups PGA and PGB, such that the first scan circuit testing signal is transmitted to the scan driving circuit  120 A via the test pads PAD 5  of the test pad group PGA for the scan driving circuit  120 A to generate and respectively transmit scan signals to the scan lines GLA, and the second scan circuit testing signal is transmitted to the scan driving circuit  120 B via the test pads PAD 5  of the test pad group PGB for the scan driving circuit  120 B to generate and respectively transmit scan signals to the scan lines GLB. The test machine transmits a data test signal to the test pads PAD 3 , such that the data test signal is transmitted to the data lines DL via the test pads PAD 3 , the signal line EL 2  and the turned on transistor T 2 . The test machine transmits the common voltage signal to the test pads PAD 1 , such that the common voltage signal is transmitted to the touch sensing lines SL via the test pads PAD 1 , the signal line EL 1  and the turned on transistor T 1  and further to the touch electrodes TP via the touch sensing lines SL. The test machine transmits the common voltage signal to the potential line VL via the test pads PAD 2  and further to the dummy touch sensing lines DSL via the potential line VL. According to the above configuration, the touch display panel  100 P may display a corresponding test image (e.g. an all-white image). In the embodiment, the dummy touch sensing lines DSL in the active area AA are all electrically connected to the potential line VL, and the potential line VL is electrically connected to the test pads PAD 2 . As such, during the test period of the touch display apparatus  100 , the test machine may provide the common voltage signal to the potential line VL via the test pads PAD 2  and further to all dummy touch sensing lines DSL in the active area AA via the potential line VL, so as to avoid occurrence of straight streaks in a test image displayed by the touch display panel  100 P due to floating of the dummy touch sensing lines DSL. In addition, in the invention, the potential line VL encloses the active area AA, and the two ends of each dummy touch sensing line DSL are all coupled to the potential line VL, and thus the loadings of the paths through which the common voltage signal is transmitted to the dummy touch sensing lines DSL can be reduced. 
       FIG.  4    is a schematic diagram illustrating the transmission paths of the common voltage signal in an image display test period of the touch display panel  100 P in accordance with the first embodiment of the invention. During the image display test period in which the touch display panel  100 P has not yet electrically connected to a driver chip, the test machine transmits an enabling signal ES to the test pads PAD 4  to turn on the transistors T 1  (labeled as “T 1 (ON)” in  FIG.  4   ); the test machine transmits the common voltage signal Vcom to the test pads PAD 1 , such that the common voltage signal Vcom is transmitted to the touch sensing lines SL and the touch electrodes TP via the signal line EL 1  and the turned on transistors; the test machine transmits the common voltage signal Vcom to the test pads PAD 2  and further to the potential line VL and the dummy touch sensing line DSL. 
     Referring to  FIG.  1 C , after the test on the touch display panel  100 P is performed and the test result is normal, the touch display panel  100 P may be electrically connected to the driver chip  130 , e.g., the driver chip  130  may be mounted in the chip bonding area CA of the substrate  110  by bonding. 
     During the display period of the touch display apparatus  100  (including the touch display panel  100 P and the driver chip  130  that are electrically connected with each other), the driver chip  130  transmits a first scan circuit control signal to the bonding pads BP 5  at the left side of the chip bonding area CA and a second scan circuit control signal to the bonding pads BP 5  at the right side of the chip bonding area CA, such that the first scan circuit control signal is transmitted to the scan driving circuit  120 A for generating and transmitting scan signals respectively to the scan lines GLA, and the second scan circuit control signal is transmitted to the scan driving circuit  120 B for generating and transmitting scan signals respectively to the scan lines GLB; the driver chip  130  transmits the data signals to the bonding pads BP 2  and then to the data lines DL, and also transmits the common voltage signal to the bonding pads BP 1 , BP 3 , such that the common voltage signal is transmitted to the touch electrodes TP via the touch sensing lines SL and to the dummy touch sensing lines DSL via the potential line VL. In the embodiment, all dummy touch sensing lines DSL are electrically connected to the potential line VL, and the potential line VL is electrically connected to the bonding pads BP 3 . As such, during the display period of the touch display apparatus  100 , the driver chip  130  may provide the common voltage signal to the potential line VL via the bonding pads BP 3 , and further transmits the common voltage signal to all dummy touch sensing lines DSL in the active area AA via the potential line VL, so as to avoid occurrence of streaks in a test image displayed by the touch display apparatus  100  due to floating of the dummy touch sensing lines DSL. 
     During the display period of the touch display apparatus  100 , the driver chip  130  may transmit a disabling signal to the bonding pals BP 4 , such that the disabling signal is transmitted to the transistors T 1 -T 2  to turn off the transistors T 1 -T 2  (as the description of  FIG.  5    below), but the invention is not limited thereto. In another embodiment, during the display period of the touch display apparatus  100 , the driver chip  130  may transmit an enabling signal to the bonding pads BP 4 , such that the enabling signal is transmitted to the transistors T 1 -T 2  via the signal line EL 3  to turn on the transistors T 1 -T 2  (as the description of  FIG.  6    below). 
       FIG.  5    is a schematic diagram illustrating the transmission paths of the common voltage signal in the display period of the touch display apparatus  100  for one example in accordance with the first embodiment of the invention. During the display period of the touch display apparatus  100 , the test pad PAD 4  receives the disabling signal DS to turn off the transistors T 1  (labeled as “T 1  (OFF)” in  FIG.  5   ), the driver chip  130  transmits the common voltage signal Vcom to the bonding pads BP 1 , BP 3  and further to the touch sensing lines SL, the touch electrodes TP, the potential line VL and the dummy touch sensing lines DSL. 
       FIG.  6    is a schematic diagram illustrating the transmission paths of the common voltage signal in the display period of the touch display apparatus  100  for another example in accordance with the first embodiment of the invention. During the display period of the touch display apparatus  100 , the test pad PAD 4  receives an enabling signal ES to turn on the transistors T 1 ; the common voltage signal Vcom is transmitted to the test pad PAD 1  and further to the touch sensing lines SL and the touch electrodes TP via the signal line EL 1  and the turned on transistors T 1 ; the driver chip  130  transmits the common voltage signal Vcom to the bonding pads BP 1 , BP 3  and further to the touch sensing lines SL, the touch electrodes TP, the potential line VL and the dummy touch sensing lines DSL. In the embodiment, the common voltage signal Vcom received by the test pad PAD 1  may be provided from the driver chip  130  or a circuit board. For example, the touch display apparatus  100  may include a circuit board with a circuitry for outputting the common voltage signal Vcom, and the circuit board is electrically connected to the test pad PAD 1  for outputting the common voltage signal Vcom to the test pad PAD 1  in the image display period. In addition, in  FIGS.  5 - 6   , the disabling signal DS and the enabling signal ES received by the test pad PAD 4  may be provided from the driver chip  130 , but the invention is not limited thereto. In another embodiment, the disabling signal DS and the enabling signal ES received by the test pad PAD 4  may be provided from a circuit board. For example, the touch display apparatus  100  may include a circuit board with a circuitry for outputting the disabling signal DS and the enabling signal ES, and the circuit board is electrically connected to the test pad PAD 4  for outputting the disabling signal DS or the enabling signal ES to the test pad PAD 4  during the image display period of the touch display apparatus  100 . 
     Referring to  FIGS.  5 - 6    simultaneously. In  FIG.  5   , during the display period of the touch display apparatus  100 , the common voltage signal Vcom is transmitted to each touch sensing line SL in the direction D 2  from an end of each touch sensing line SL (e.g. an end SLE 1  of the touch sensing line SL in  FIG.  5   ); in  FIG.  6   , during the display period of the touch display apparatus  100 , the common voltage signal Vcom is transmitted to each touch sensing line SL in the direction D 2  and the reversed direction of the direction D 2  respectively from two opposite ends of each touch sensing line SL (e.g. two opposite ends SLE 1 -SLE 2  of each touch sensing line SL in  FIG.  6   ). In other words, the illustration in  FIG.  5    is single-side driving, while the illustration in  FIG.  6    is dual-side driving, and consequently the loadings of the paths shown in  FIG.  6    through which the common voltage signal Vcom is transmitted to the touch sensing lines SL are less than those of the paths shown in  FIG.  5    through which the common voltage signal Vcom is transmitted to the touch sensing lines SL. 
     During the touch sensing period of the touch display apparatus  100  (the touch display panel  100 P and the driver chip  130  that are electrically connected with each other), the driver chip  130  transmits touch sensing signals to the bonding pads BP 1  and further to the touch electrodes TP via the touch sensing lines SL for detecting a touch position of a user. In addition, during the touch sensing period of the touch display apparatus  100 , the driver chip  130  may transmit an disabling signal (e.g. a low-voltage signal) to the bonding pads BP 4 , such that the disabling signal is transmitted to the transistors T 1 -T 2  via the signal line EL 3  to turn off the transistors T 1 -T 2  (as the description of  FIG.  7    below). 
       FIG.  7    is a schematic diagram illustrating signal transmissions of the touch display apparatus  100  in the touch sensing period in accordance with the first embodiment of the invention. During the touch sensing period of the touch display apparatus  100 , the test pad PAD 4  receives the disabling signal DS to turn off the transistors T 1 -T 2  (the transistor T 2  is not shown in  FIG.  7   ), and the driver chip  130  transmits touch sensing signals TDS to the bonding pads BP 1  and further to the touch electrodes TP via the touch sensing lines SL for detecting a touch position of a user. In the embodiment, the disabling signal DS may be provided from the driver chip  130 , but the invention is not limited thereto. In another embodiment, the disabling signal DS received by the test pad PAD 4  may be provided from a circuit board. For example, the touch display apparatus  100  may include a circuit board with a circuitry for outputting the disabling signal DS, and the circuit board is electrically connected to the test pad PAD 4  for outputting the disabling signal DS to the test pad PAD 4  during the touch sensing period of the touch display apparatus  100 . 
       FIG.  8 A  is a schematic diagram of a touch display panel  200 P in accordance with a second embodiment of the invention,  FIG.  8 B  is a schematic diagram of a part of elements of the touch display panel  200 P in  FIG.  8 A , and  FIG.  8 C  is a schematic diagram of a touch display apparatus  200  in accordance with the second embodiment of the invention. The touch display apparatus  200  in  FIG.  8 C  includes the touch display panel  200 P in  FIG.  8 A  and a driver chip  130 . The difference between the touch display panel  200 P in the second embodiment and the touch display panel  100 P in the first embodiment is, the touch display panel  200 P further includes transistors T 3  and a signal line EL 4  in the peripheral area PA, and the connection manner of the test pads PAD 2  and the potential line VL and the connection manner of the bonding pads BP 3  and the potential line VL are all different from those in the first embodiment. It is noted that the transistors T 1 -T 3  in the peripheral area PA according to the second embodiment (or the transistors T 1 -T 2  in the peripheral area PA according to the first embodiment) and the thin-film transistors of the subpixels PX 1 -PX 3  in the active area AA may be formed at the same time by utilizing the same process, but the invention is not limited thereto. In the embodiment, the first terminals of the transistors T 3  are electrically connected to the signal line EL 4 , the second terminals of the transistors T 3  are electrically connected to the potential line VL, and the control terminals of the transistors T 1 -T 3  are all electrically connected to the signal line EL 3 . The test pads PAD 2  are electrically connected to the signal line EL 4  which is arranged at the upper, left and right sides of the substrate  110  and detours around the active area AA, and the two ends of the signal line EL 4  are respectively coupled to the two test pads PAD 2 . In the first embodiment, as shown in  FIG.  1 A , the bonding pads BP 3  may be electrically connected to the potential line VL via a conductive line, the test pads PAD 2  and another conductive line, while in the second embodiment, as shown in  FIG.  8 A , the bonding pads BP 3  may be directly coupled to the potential line VL via a conductive line, the test pads PAD 2  are electrically connected to the first terminals of the transistors T 3  via the signal line EL 4 , and the second terminals of the transistors T 3  are electrically connected to the potential line VL. Therefore, when the transistors T 3  are turned on, the test pads PAD 2  may be electrically connected to the potential line VL via the signal line EL 4  and the turned on transistors T 3 . The other parts of the touch display panel  200 P in the second embodiment are similar to those in the first embodiment, and thus the description thereof is not repeated herein. 
     In comparison with the first embodiment, in the second embodiment, the test machine transmits the enabling signal to the signal line EL 3  via the test pads PAD 4  for turning on the transistors T 1 -T 3  during the image display test period of the touch display panel  200 P; the test machine also transmits the common voltage signal to the potential line VL via the test pads PAD 2 , the signal line EL 4  and the turned on transistors T 3 , and further transmits the common voltage signal to the dummy touch sensing lines DSL via the potential line VL. The other components in the second embodiment (e.g. the test machine transmits the first scan circuit test signal and the second scan circuit test signal respectively to the test pads PAD 5  in the test pad groups PGA and PGB, transmits the data test signals to the test pads PAD 3 , and transmits the common voltage signal to the test pads PAD 1 ) are similar to those in the first embodiment, and thus the description thereof is not repeated herein. Accordingly, the touch display panel  200 P may display a corresponding test image (e.g. an all-white image). 
       FIG.  9    is a schematic diagram illustrating the transmission paths of the common voltage signal in an image display test period of the touch display panel  200 P in accordance with the second embodiment of the invention. During the image display test period of the touch display panel  200 P, the test machine transmits an enabling signal ES to the test pads PAD 4  for turning on the transistors T 1  and T 3 , and transmits the common voltage signal Vcom to the test pads PAD 1  and then to the touch sensing lines SL and the touch electrodes TP through the signal line EL 1  and the turned on transistors T 1 . The test machine also transmits the common voltage signal Vcom to the test pads PAD 2  and then to the dummy touch sensing line DSL via the signal line EL 4 , the turned on transistors T 3  and the potential line VL. 
     Referring to  FIGS.  4  and  9    simultaneously. During the image display test period of the touch display apparatus, as shown in  FIG.  4   , according to the first embodiment, the common voltage signal Vcom received by the test pad PAD 1  is transmitted to the touch sensing lines SL via conductive lines (including the signal line EL 1 ) and the turned on transistors T 1 , and the common voltage signal Vcom received by the test pad PAD 2  is transmitted to the dummy touch sensing lines DSL via at least one conductive line (including the potential line VL). That is, the path through which the common voltage signal Vcom is transmitted to a corresponding touch sensing line SL includes turned on transistors, while the path through which the common voltage signal Vcom is transmitted to a corresponding dummy touch sensing line DSL does not include any turned on transistor. The channel layer of a transistor is usually formed from a semiconductor layer, and the material of the conductive line (including the signal line EL 1  and the potential line VL) is metal, and consequently the resistance of the turned on transistor T 1  is far greater than that of the conductive line and that of the potential line VL. As such, when performing an image display test on the touch display panel  100 P in accordance with the first embodiment, the loading of the path through which the common voltage signal is transmitted to the touch sensing line SL is far greater than the loading of the path through which the common voltage signal is transmitted to the dummy touch sensing line DSL, and thus the capacitive coupling effect between the touch sensing line SL and its neighboring subpixels is different than the capacitive coupling effect between the dummy touch sensing line DSL and its neighboring subpixels, causing the grayscales of the subpixels at two opposite sides of the dummy touch sensing line DSL are different from the grayscales of the subpixels at two opposite sides of the touch sensing line SL during the image (e.g. a white image) display test. In the second embodiment, as shown in  FIG.  9   , the common voltage signal Vcom received by the test PAD 1  is transmitted to the touch sensing lines SL via at least one conductive line (including the signal line EL 1 ) and the turned on transistors T 1 , and the common voltage signal Vcom received by the test PAD 2  is transmitted to the dummy touch sensing lines DSL via conductive lines (including the signal line EL 4  and the potential line VL) and the turned on transistors T 3 . That is, each of the path for transmitting the common voltage signal Vcom to a corresponding touch sensing line SL and the path for transmitting the common voltage signal Vcom to a corresponding dummy touch sensing line DSL has a turned on transistor. Therefore, when performing an image display test on the touch display panel  200 P in accordance with the second embodiment, the loading of the path through which the common voltage signal is transmitted to the touch sensing line SL are approximately that of the path through which the common voltage signal is transmitted to the dummy touch sensing line DSL, and thus the capacitive coupling effect between the touch sensing line SL and its neighboring subpixels is substantially the same as the capacitive coupling effect between the dummy touch sensing line DSL and its neighboring subpixels, such that the grayscales of the subpixels at two opposite sides of the dummy touch sensing line DSL are the same as the grayscales of the subpixels at two opposite sides of the touch sensing line SL during the image (e.g. a white image) display test. 
     Referring to  FIG.  8 C , after the test on the touch display panel  200 P is performed and the test result is normal, the touch display panel  200 P may be electrically connected to a driver chip  130 , e.g., the driver chip  130  may be mounted in the chip bonding area CA of the substrate  110  by bonding. 
     During the display period of the touch display apparatus  200  (including the touch display panel  200 P and the driver chip  130  that are electrically connected with each other), the driver chip  130  transmits a first scan circuit control signal to the bonding pads BP 5  at the left side of the chip bonding area CA and a second scan circuit control signal to the bonding pads BP 5  at the right side of the chip bonding area CA, such that the first and second scan circuit control signals are transmitted to the scan driving circuits  120 A and  120 B for generating and respectively transmitting scan signals to the scan lines GLA, GLB. The driver chip  130  transmits data signals to the bonding pads BP 2 , such that the data signals are transmitted to the data lines DL. The driver chip  130  also transmits the common voltage signal to the bonding pads BP 1  and BP 3 , such that the common voltage signal is transmitted to the touch electrodes TP and the dummy touch sensing line DSL respectively via the touch sensing lines SL and the potential line VL. 
     During the display period of the touch display apparatus  200 , the driver chip  130  may transmit an disabling signal to the bonding pads BP 4 , such that the disabling signal is transmitted to the transistors T 1 -T 3  via the signal line EL 3  to turn off the transistors T 1 -T 3  (as the description of  FIG.  10    below), but the invention is not limited thereto. In another embodiment, during the display period of the touch display apparatus  200 , the driver chip  130  may transmit the enabling signal to the bonding pads BP 4 , such that the enabling signal is transmitted to the transistors T 1 -T 3  via the signal line EL 3  to turn on the transistors T 1 -T 3  (as the description of  FIG.  11    below). 
       FIG.  10    is a schematic diagram illustrating the transmission paths of the common voltage signal in the display period of the touch display apparatus  200  for one example in accordance with the second embodiment of the invention. During the display period of the touch display apparatus  200 , the test pad PAD 4  receives the disabling signal DS to turn off the transistors T 1  and T 3 ; the driver chip  130  transmits the common voltage signal Vcom to the bonding pads BP 1  and BP 3  and further to the touch sensing lines SL, the touch electrodes TP, the potential line VL and the dummy touch sensing line DSL. 
       FIG.  11    is a schematic diagram illustrating the transmission paths of the common voltage signal in the display period of the touch display apparatus  200  for another example in accordance with the second embodiment of the invention. During the display period of the touch display apparatus  200 , the test pad PAD 4  receives an enabling signal ES to turn on the transistors T 1  and T 3 ; the common voltage signal Vcom is transmitted to the test pad PAD 1  and further to the touch sensing lines SL and the touch electrodes TP via the signal line EL 1  and the turned on transistors T 1 ; the common voltage signal Vcom is also transmitted to the test pad PAD 2  and further to the dummy touch sensing line DSL via the signal line EL 4 , the turned on transistor T 3  and the potential line VL. The driver chip  130  transmits the common voltage signal Vcom to the bonding pads BP 1  and BP 3  and further to the touch sensing lines SL, the touch electrodes TP and the dummy touch sensing line DSL. In the embodiment, the common voltage signal Vcom received by the test pads PAD 1 -PAD 2  may be provided form the driver chip  130  or a circuit board. For example, the touch display apparatus  200  may include a circuit board with a circuitry for outputting the common voltage signal Vcom, and the circuit board is electrically connected to the test pads PAD 1 -PAD 2  for outputting the common voltage signal Vcom to the test pads PAD 1 -PAD 2  during the image display period. In addition, in  FIGS.  10 - 11   , the disabling signal DS and the enabling signal ES received by the test pad PAD 4  may be provided from the driver chip  130 , but the invention is not limited thereto. In another embodiment, the disabling signal DS and the enabling signal ES received by the test pads PAD 4  may be provided from a circuit board. For example, the touch display apparatus  200  may include a circuit board with a circuitry for outputting the disabling signal DS and the enabling signal ES, and the circuit board is electrically connected to the test pad PAD 4  for outputting the disabling signal DS or the enabling signal ES to the test pads PAD 4  during the image display period of the touch display apparatus  200 . 
     Referring to  FIGS.  10 - 11    simultaneously. In  FIG.  10   , during the display period of the touch display apparatus  200 , the common voltage signal Vcom is transmitted to each touch sensing line SL in the direction D 2  from an end of each touch sensing line SL (e.g. an end SLE 1  of the touch sensing line SL in  FIG.  10   ), and to the dummy touch sensing line DSL in the direction D 2  from an end of the dummy touch sensing line DSL (e.g. an end DSLE 1  of the dummy touch sensing line DSL in  FIG.  10   ); in  FIG.  11   , during the display period of the touch display apparatus  200 , the common voltage signal Vcom is transmitted to each touch sensing line SL in the direction D 2  and the reversed direction of the direction D 2  respectively from two opposite ends of each touch sensing line SL (e.g. two opposite ends SLE 1 , SLE 2  of the touch sensing line SL in  FIG.  11   ), and to the dummy touch sensing line DSL in the direction D 2  and the reversed direction of the direction D 2  respectively from two opposite ends of the dummy touch sensing line DSL (e.g. two opposite ends DSLE 1 , DSLE 2  of the dummy touch sensing line DSL in  FIG.  11   ). In other words, in the example illustrated in  FIG.  10   , the common voltage signal Vcom is transmitted to any one of the touch sensing lines SL and the dummy touch sensing lines DSL in a single-side driving mode, while in the example illustrated in  FIG.  11   , the common voltage signal Vcom is transmitted to any one of the touch sensing lines SL and the dummy touch sensing lines DSL in a dual-side driving mode. Consequently, the loading of the path shown in  FIG.  11    through which the common voltage signal Vcom is transmitted to the touch sensing line SL is less than that of the path shown in  FIG.  10    through which the common voltage signal Vcom is transmitted to the touch sensing line SL, and the loading of the path shown in  FIG.  11    through which the common voltage signal Vcom is transmitted to the dummy touch sensing line DSL is less than that of the path shown in  FIG.  10    through which the common voltage signal Vcom is transmitted to the touch sensing line DSL. 
     During the touch sensing period of the touch display apparatus  200  (including the touch display panel  200 P and the driver chip  130  that are electrically connected with each other), the driver chip  130  transmits touch sensing signals to the bonding pads BP 1  and then to the touch electrodes TP via the touch sensing lines SL for detecting a touch position of a user. In addition, during the touch sensing period of the touch display apparatus  200 , the driver chip  130  may transmit a disabling signal (e.g. a low-voltage signal) to the transistors T 1 -T 3  via the bonding pads BP 4  and the signal lines EL 3  to turn off the transistors T 1 -T 3  (as the description of  FIG.  12    below). 
       FIG.  12    is a schematic diagram illustrating signal transmissions of the touch display apparatus  200  in the touch sensing period in accordance with the second embodiment of the invention. During the touch sensing period of the touch display apparatus  200 , the disabling signal DS is transmitted to the transistors T 1 -T 3  (the transistor T 2  is not shown in  FIG.  12   ) via the test pad PAD 4  to turn off the transistors T 1 -T 3 , and the driver chip  130  transmits touch sensing signals TDS to the bonding pads BP 1  and further to the touch electrodes TP via the touch sensing lines SL for detecting a touch position of a user. In the embodiment, the disabling signal DS may be provided from the driver chip  130 , but the invention is not limited thereto. In another embodiment, the disabling signal DS received by the test pads PAD 4  may be provided from a circuit board. For example, the touch display apparatus  200  may include a circuit board with a circuitry for outputting the disabling signal DS, and the circuit board is electrically connected to the test pads PAD 4  for outputting the disabling signal DS to the test pads PAD 4  in the touch sensing period of the touch display apparatus  200 . 
     The following is the description for variant examples of the first and second embodiments. It is noted that the following variant examples are exemplified according to the variant examples of the second embodiment, and the characteristics thereof may also be applicable for the variant examples of the first embodiment, and thus the description thereof is not repeated herein. 
       FIG.  13    is a schematic diagram of a touch display panel  300 P for a first variant example in accordance with the second embodiment of the invention. The touch display panel  300 P has an active area AA and a peripheral area PA; the scan driving circuits  120 A and  120 B are disposed on the substrate  310  and in the peripheral area PA, and are respectively at the left and right sides of the substrate  310 . The difference between the touch display panel  300 P and the touch display panel  200 P shown in  FIG.  8 A  is, the substrate  310  does not have the chip bonding area CA, and the bonding pad group BPG can be directly bonded to a circuit board (such as a flexible circuit board), and thus the area of the peripheral area PA can be further reduced. For example, a driver chip (e.g. the driver chip  130  in  FIG.  8 C ) may be disposed on a flexible circuit board with pins bonded to the bonding pads BP 1 -BP 5  in the bonding pad group BPG of the substrate  310 , such that the driver chip is electrically connected to the bonding pads BP 1 -BP 5 ; alternatively, the driver chip may be disposed on a circuit board (e.g. a system circuit board), a flexible circuit board is electrically connected to the circuit board with the driver chip, and pins of the flexible circuit board are bonded to the bonding pads BP 1 -BP 5  in the bonding pad group BPG of the substrate  310 , such that the driver chip is electrically connected to the bonding pads BP 1 -BP 5 , but the invention is not limited thereto. The driver chip described above may be the driver chip  130  in the first and second embodiments, but the invention is not limited thereto. In addition, the positions of the test pads PAD 1 -PAD 5  may be adjusted depending on the size of the peripheral area PA. The other components are respectively similar to those of the touch display panel  200 P in  FIG.  8 A , and thus the description thereof is not repeated herein. 
       FIG.  14 A  is a schematic diagram of a touch display panel  400 P for a second variant example in accordance with the second embodiment of the invention,  FIG.  14 B  is a schematic diagram showing connections of the touch sensing lines and corresponding touch electrodes and transistors in the touch display panel  400 P, and  FIG.  14 C  is a schematic diagram showing connections of the data lines and corresponding subpixels and transistors in the touch display panel  400 P. The difference between the touch display panel  400 P and the touch display panel  200 P in  FIG.  8 A  is, in the touch display panel  400 P, touch sensing lines SL 1  are electrically connected to touch electrodes TP 1  and the second terminals of transistors T 1 A, touch sensing lines SL 2  are electrically connected to touch electrodes TP 2  and the second terminals of transistors T 1 B, data lines DL 1  are electrically connected to the subpixels PX 1  and the second terminals of the transistors T 2 A, data lines DL 2  are electrically connected to the subpixels PX 2  and the second terminals of the transistors T 2 B, and data lines DL 3  are electrically connected to the subpixels PX 3  and the second terminals of the transistors T 2 C. It is noted that, in  FIG.  14 B , the touch electrodes TP 1  are illustrated having a dot pattern fill for distinguishing from the touch electrodes TP 2 . The first terminals of the transistors T 1 A, T 1 B are respectively electrically connected to signal lines EL 1 A, EL 1 B, the first terminals of transistors T 2 A-T 2 C are respectively electrically connected to signal lines EL 2 A-EL 2 C, and the control terminals of the transistors T 1 A-T 1 B, T 2 A-T 2 C and T 3  are all electrically connected to the signal line EL 3 . The test pads PAD 1 A, PAD 1 B are respectively electrically connected to the signal lines EL 1 A, EL 1 B, the test pads PAD 2  are all electrically connected to the signal line EL 4 , test pads PAD 3 A-PAD 3 C are respectively electrically connected to the signal lines EL 2 A-EL 2 C, the test pads PAD 4  are all electrically connected to the signal line EL 3 , and the test pads PAD 5  are divided into test pad groups PGA and PGB. Likewise, the test pads PAD 1 A are respectively at the left and right sides of the substrate  410  and are electrically connected with each other via the signal line EL 1 A; the test pads PAD 1 B are respectively at the left and right sides of the substrate  410  and are electrically connected with each other via the signal line EL 1 B; the test pads PAD 3 A are respectively at the left and right sides of the substrate  410  and are electrically connected with each other via the signal line EL 2 A; the test pads PAD 3 B are respectively at the left and right sides of the substrate  410  and are electrically connected with each other via the signal line EL 2 B; the test pads PAD 3 C are respectively at the left and right sides of the substrate  410  and are electrically connected with each other via the signal line EL 2 C. As such, when performing an image display test on the touch display panel  400 P, test signals may be provided to the data lines DL and the touch sensing lines SL to perform more types of tests (e.g. performing, but not limited to, a red image display test, a green image display test, a blue image display test and/or a checkerboard image display test). 
     The transistors T 1 A-T 1 B, T 2 A-T 2 C, the signal lines EL 1 A-EL 1 B, EL 2 A-EL 2 C and the test pads PAD 1 A-PAD 1 B, PAD 3 A-PAD 3 C are in the peripheral area PA of the substrate. In addition, the positions of the test pads PAD 1 A-PAD 1 B, PAD 2 , PAD 3 A-PAD 3 C, PAD 4 , PAD 5  may be adjusted depending on the size of the peripheral area PA. The other components are respectively similar to those of the touch display panel  200 P in  FIG.  8 A , and thus the description thereof is not repeated herein. 
       FIG.  15    is a schematic diagram of a touch display panel  500 P for a third variant embodiment in accordance with the second embodiment of the invention. The difference between the touch display panel  500 P and the touch display panel  200 P in  FIG.  8 A  is, in the touch display panel  500 P, the transistors T 1 -T 3  and the signal lines EL 1 -EL 4  are disposed in the chip bonding area CA of the peripheral area PA outside of the side edge AA_S 2  of the active area AA, the second terminals of the transistors T 1  are coupled to the bonding pads BP 1 , and the second terminals of the transistors T 2  are coupled to the bonding pads BP 2 . In comparison with the touch display panel  200 P in  FIG.  8 A , in this variant example, none of the transistors T 1 -T 3  and the signal lines EL 1 -EL 4  is arranged in the peripheral area PA outside of the side edge AA_S 1  of the active area AA, and thus the area of the peripheral area PA can be further reduced (e.g. by reducing the area of the peripheral area PA outside of the side edge AA_S 1  of the active area AA). In addition, in  FIG.  15   , the test pads PAD 4  are electrically connected to the signal line EL 3  via the bonding pads BP 4 , but the invention is not limited thereto. In another embodiment, the bonding pads BP 4  and the test pads PAD 4  may be directly coupled to the signal line EL 3 . The other components of the touch display panel  500 P in this variant example are respectively similar to those of the touch display panel  200 P in  FIG.  8 A , and thus the description thereof is not repeated herein. 
       FIG.  16    is a schematic diagram of a touch display panel  600 P for a fourth variant example in accordance with the second embodiment of the invention. The difference between the touch display panel  600 P and the touch display panel  200 P in  FIG.  8 A  is, in the touch display panel  600 P, the transistors T 1  and T 3  are disposed in the peripheral area PA outside of the side edge AA_S 1  of the active area AA, and the control terminals of the transistors T 1  and T 3  are electrically connected to the signal line EL 3 A, and the transistors T 2  and the signal lines EL 2 , EL 3 B are disposed in the chip bonding area CA of the peripheral area PA outside of the side edge AA_S 2  of the active area AA, the second terminals of the transistors T 2  are coupled to the bonding pads BP 2 , the control terminals of the transistors T 2  are electrically connected to the signal line EL 3 B, and the signal line EL 3 A is electrically connected to the signal line EL 3 B. Two bonding pads BP 4  are electrically connected with each other further via the signal line EL 3 B. The other components of the touch display panel  600 P in this variant example are respectively similar to those of the touch display panel  200 P in  FIG.  8 A , and thus the description thereof is not repeated herein. In comparison with the touch display panel  200 P in  FIG.  8 A , in this variant example, none of the transistors T 2  and the signal line EL 2  is arranged in the peripheral area PA outside of the side edge AA_S 1  of the active area AA, and thus the area of the peripheral area PA can be further reduced (e.g. by reducing the area of the peripheral area PA outside of the side edge AA_S 1  of the active area AA). In addition, in this variant example, the transistors T 1  and T 3  are arranged in the peripheral area PA outside of the side edge AA_S 1  of the active area AA, and thus during the display period of the touch display apparatus (including the touch display panel  600 P and a driver chip that are electrically connected with each other), the method of transmitting the common voltage signal Vcom to the touch sensing lines SL and the dummy touch sensing lines DSL may be similar to the dual-side driving method in  FIG.  11    for reducing the loadings. 
       FIG.  17 A  is a schematic diagram of a touch display panel  700 P for a fifth variant embodiment in accordance with the second embodiment of the invention. The difference between the touch display panel  700 P and the touch display panel  500 P in  FIG.  15    is, the touch display panel  700 P further includes transistors T 4 , a signal line ELS, bonding pads BP 6  and test pads PAD 6  but does not include the scan driving circuits  120 A,  120 B, the bonding pads BP 5  and the test pads PAD 5  shown in  FIG.  15   , and the scan lines GLA, GLB are electrically connected to the bonding pads BP 6 . The control terminals of the transistors T 4  are electrically connected to the signal line EL 3 , the first terminals of the transistors T 4  are electrically connected to the signal line ELS, the second terminals of the transistors T 4  are electrically connected to the bonding pads BP 6 , and the bonding pads BP 6  are electrically connected to the scan lines GLA or the scan lines GLB. The transistors T 4  and the signal line ELS are arranged in the chip bonding area CA. The two test pads PAD 6  are arranged respectively at the left and right sides of the substrate  710 , and are electrically connected with each other via the signal line ELS. The other components of the touch display panel  700 P according to this variant example are respectively similar to those of the touch display panel  500 P in  FIG.  15   , and thus the description thereof is not repeated herein. In addition, in  FIG.  17 A , the test pads PAD 4  are electrically connected to the signal line EL 3  via the bonding pads BP 4 , but the invention is not limited thereto. In another embodiment, the bonding pads BP 4  and the test pads PAD 4  may respectively be coupled to the signal line EL 3 . The difference between the variant example and the example in  FIG.  15    is, in this variant example, the test machine transmits an enabling signal to the signal line EL 3  via the test pads PAD 4  for turning on the transistors T 1 -T 4  and then transmits scan test signals to the scan lines GLA, GLB through the test pads PAD 5  and the turned on transistor T 4  during the image display test period of the touch display panel  700 P (such as before a driver chip is bonded to the touch display panel  700 P in the chip bonding area CA). The other parts are similar to those of the example in  FIG.  15    (e.g., the method of transmitting the common voltage signal to the test pads PAD 1 , PAD 2  and transmitting the data test signals to the test pads PAD 3  by the test machine in accordance with this variant example are similar to that of the example in  FIG.  15   ), and thus the touch display panel  700 P may display a corresponding test image (e.g. an all-white image). 
       FIG.  17 B  is a schematic diagram of a touch display apparatus  700  for the fifth variant embodiment in accordance with the second embodiment of the invention. The touch display apparatus  700  includes the touch display panel  700 P and a driver chip  730 . As shown in  FIG.  17 B , after the driver chip  730  is bonded to the substrate  710  and in the chip bonding area CA of the substrate  710 , and covers the bonding pad group BPG. Some connection pads of the driver chip  730  are respectively electrically connected to the bonding pads BP 1 -BP 4  and BP 6 , such that the driver chip  730  provides various signals to the data lines DL, the touch sensing lines SL, the potential line VL and the scan lines GLA and GLB via the bonding pads BP 1 -BP 4  and BP 6  when the touch display apparatus  700  is used for display and touch operating. The difference between this variant example and the example in  FIG.  15    is, in this variant example, during the display period of the touch display apparatus  700 , the driver chip  730  transmits a first scan signal to the scan lines GLA via the bonding pad BP 6  at the left side of the chip bonding area CA, and transmits a second scan signal to the scan lines GLB via the bonding pad BP 6  at the right side of the chip bonding area CA. The other parts of this variant example are similar to those of the example in  FIG.  15   , e.g., the signals transmitted from the driver chip  730  to the bonding pads BP 1 -BP 4  according to this variant example may be similar to those transmitted by the driver chip to the bonding pads BP 1 -BP 4  according to the example in  FIG.  15   , and thus the description thereof is not repeated herein. The driver chip  620  may be a touch and display driver integration (TDDI) chip or another chip with touch detection driving, pixel data driving and scan driving functions. 
     The touch display panel in the context may have another scan driving mechanism. For example,  FIG.  18    is a schematic diagram of a touch display panel  800 P in accordance with a sixth variant embodiment of the second embodiment of the invention. In comparison with the touch display panel  200 P shown in  FIG.  8 A , in the touch display panel  800 P, the scan driving circuit  820  is only disposed at the left side of the substrate  810 , and the gate lines GL are all electrically connected to the scan driving circuit  820 . The test pads PAD 1 -PAD 5  are all disposed at the left side of the substrate  810 , and the test pads PADS in test pad group PG are electrically connected to the scan driving circuit  820  and are respectively electrically connected to the bonding pads BP 5 . A driver chip (not shown) may be disposed in the chip bonding area CA of the substrate  810  and covers the bonding pad group BPG. Some connection pads of the driver chip are respectively electrically connected to the bonding pads BP 1 -BP 5 , such that the driver chip provides various signals to the data lines DL, the touch sensing lines SL, the potential line VL and the scan driving circuit  820  via the bonding pads BP 1 -BP 5  when the touch display panel  800 P is used for display and touch detection. The other components of the touch display panel  800 P in this variant example are respectively similar to those of the touch display panel  200 P in  FIG.  8 A , and thus the description thereof is not repeated herein. 
     As can be seen from the above description, the touch display apparatus and the test driving method in accordance with the embodiments of the invention can match voltage levels and impedances of touch sensing lines to those of dummy touch sensing lines for a test of touch sensing and image display, and thus can avoid straight streak phenomenon in a displayed image due to different color scales, so as to improve test accuracy. 
     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims.