Patent Publication Number: US-11665794-B2

Title: Dimming circuit and dimming control method

Description:
FIELD OF THE INVENTION 
     The present invention relates to a dimming circuit and a dimming control method, and more particularly to a dimming circuit and a dimming control method for increasing the accuracy of an output current. 
     BACKGROUND OF THE INVENTION 
     Lighting technology, such as LEDs, is developing towards energy saving and environmental protection. Generally, the brightness of the LEDs is proportional to the driving current. So a dimming circuit for driving the LEDs needs to provide a stable driving current to ensure the safety of LEDs and achieve brightness and accuracy required by the consumer. Therefore, it is important for the dimming circuit to output the stable driving current to the LEDs. 
       FIG.  1    is a schematic circuit diagram illustrating a conventional dimming circuit. The dimming circuit  1 ′ is used for driving a load such as a LED device. The dimming circuit  1 ′ comprises a control circuit  101 ′. The control circuit  101 ′ detects the current flowing through a power switch  102 ′ through a sampling resistor  103 ′. Moreover, the control circuit  101 ′ controls the on/off state of the power switch  102 ′ according to the current sampled by the resistor  103 ′. However, since the control circuit  101 ′ doesn&#39;t directly control the operation of the power switch  102 ′ according to the current of the load, which result in decrease of the accuracy of the load current. Moreover, while the current flowing through the sampling resistor  103 ′, which results in the increase of the power loss. 
     Moreover, the power switch  102 ′ and the diode have parasitic capacitances. The parasitic capacitance of the power switch  102 ′ and the parasitic capacitance of the diode may oscillate with an output inductor  104 ′. Due to the oscillation, the disturbance will be introduced into the current flowing through the output inductor  104 ′ and the current flowing through the load. In other words, there will be an error between the output current of the dimming circuit  1 ′ and the preset ideal output current, which will result in the decrease of the accuracy of the load. 
     Therefore, there is a need of providing an improved dimming circuit and an improved dimming control method so as to overcome the drawbacks of the conventional technologies. 
     SUMMARY OF THE INVENTION 
     An object of the present invention provides a dimming circuit and a dimming control method for increasing the accuracy of an output current. 
     In accordance with an aspect of the present invention, a dimming control method for a dimming circuit is provided. The dimming circuit includes a DC/DC conversion unit. The DC/DC conversion unit receives an input voltage and provides an output voltage to a load. And an output current of the DC/DC conversion unit is adjusted according to a switch control signal. The switch control signal has plural switching periods. Each of the plural switching periods contains a turn-on time and a turn-off time. Wherein the dimming control method includes the following steps. Firstly, a switching period reference is provided. Then, the input voltage and the output voltage are sampled, and a turn-on time is calculated according to the input voltage, the output voltage and a reference current signal. Then, a variation period signal which is cyclically-changed is provided. Then, a pulse width modulation signal is generated according to the switching period reference, the turn-on time and the variation period signal. Then, a switch control signal is generated according to the pulse width modulation signal, so that a power switch of the DC/DC conversion unit is controlled. 
     In accordance with another aspect of the present invention, a dimming circuit is provided. The dimming circuit includes a DC/DC conversion unit, a control module and a driving module. The DC/DC conversion unit receives an input voltage and provides an output voltage to a load. The DC/DC conversion unit includes at least one power switch. The power switch is controlled according to a switch control signal. The switch control signal includes plural switching periods. Each of the plural switching periods contains a turn-on time and a time-off time. The control module samples the input voltage and the output voltage, and includes a calculation unit and a pulse width modulation unit. The calculation unit provides a switching period reference. The calculation unit generates the turn-on time according to the input voltage, the output voltage and a reference current signal. The calculation unit generates a variation period signal which is cyclically changed. The pulse width modulation unit generates a pulse width modulation signal according to the switching period reference, the turn-on time and the variation period signal. The driving module is electrically connected with the control module and the power switch, and generates the switch control signal according to the pulse width modulation signal. 
     In accordance with another aspect of the present invention, a dimming circuit is provided. The dimming circuit includes a DC/DC conversion unit, a control module and a driving module. The DC/DC conversion unit receives an input voltage and provides an output voltage to a load. The DC/DC conversion unit includes at least one power switch. The power switch is controlled according to a switch control signal. An output current of the DC/DC conversion unit is adjusted according to the switch control signal. The switch control signal includes plural switching periods which are cyclically changed. 
     The above contents of the present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, in which: 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a schematic circuit diagram illustrating a conventional dimming circuit; 
         FIG.  2    is a schematic block diagram illustrating a dimming circuit according to an embodiment of the present invention; 
         FIG.  3    is a schematic circuit diagram of the dimming circuit according to the embodiment of the present invention; 
         FIG.  4    is a schematic circuit diagram illustrating the DC/DC conversion unit of the dimming circuit of  FIG.  2   ; 
         FIG.  5 A  is a schematic circuit diagram illustrating the DC/DC conversion unit of the dimming circuit of  FIG.  2    when the power switch is in the on state; 
         FIG.  5 B  is a schematic circuit diagram illustrating the DC/DC conversion unit of the dimming circuit of  FIG.  2    when the power switch is in the off state; 
         FIG.  6    is a schematic timing waveform diagram illustrating associated voltage and current processed by the dimming circuit of  FIG.  2   , in which the variation period signal is combined to the switching period reference; 
         FIG.  7 A  is a diagram of voltage and current waveforms of the dimming circuit of  FIG.  2   , in which the current flowing through the inductor is higher than 0 when the power switch is turned on; 
         FIG.  7 B  is a diagram of voltage and current waveforms of the dimming circuit of  FIG.  2   , in which the current flowing through the inductor is lower than 0 when the power switch is turned on; 
         FIG.  8 A  is a schematic timing waveform diagram illustrating plural switching periods of the switch control signal according to a first embodiment of the present invention; 
         FIG.  8 B  is a schematic timing waveform diagram illustrating plural switching periods of the switch control signal according to a second embodiment of the present invention; 
         FIG.  9    is a schematic timing waveform diagram illustrating associated voltage and current processed by the dimming circuit of  FIG.  2   , in which the variation period signal is combined to the turn-on time; and 
         FIG.  10    is a flowchart illustrating a dimming control method for the dimming circuit of  FIG.  2   . 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The present invention will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of preferred embodiments of this invention are presented herein for purpose of illustration and description only. It is not intended to be exhaustive or to be limited to the precise form disclosed. 
       FIG.  2    is a schematic block diagram illustrating a dimming circuit according to an embodiment of the present invention.  FIG.  3    is a schematic circuit diagram of the dimming circuit according to the embodiment of the present invention. As shown in  FIGS.  2  and  3   , the dimming circuit  1  comprises a DC/DC conversion unit  11 , a control module  12  and a driving module  13 . 
     An example of the DC/DC conversion unit  11  includes but it is not limited to a buck converter, a boost converter, a buck-boost converter or a flyback converter. The DC/DC conversion unit  11  comprises an input side, an output side and a power switch  111 . The input side of the DC/DC conversion unit  11  incudes a positive input terminal  21   a  and a negative input terminal  21   b . The output side of the DC/DC conversion unit  11  incudes a positive output terminal  22   a  and a negative output terminal  22   b . The input side of the DC/DC conversion unit  11  is electrically connected with a power source P to receive an input voltage Vin. The power switch  111  is alternately turned on and turned off. Consequently, the input voltage Vin is converted into an output voltage Vout by the DC/DC conversion unit  11 . The output voltage Vout is provided to a load L. For example, the load L is LED device. The power switch  111  of the DC/DC conversion unit  11  receives a switch control signal. According to the switch control signal, the power switch  111  is selectively turned on or turned off. The switch control signal has plural switching periods. Each switching period contains a turn-on time and a turn-off time. During the turn-on time, the power switch  111  is turned on. During the turn-off time, the power switch  111  is turned off. Since the operation of the power switch  111  is controlled according to the switch control signal, an output current Iout from the DC/DC conversion unit  11  is correspondingly adjusted. 
     The control module  12  comprises a calculation unit  122  and a pulse width modulation (PWM) unit  123 . A switching period reference Ts of the switch control signal is stored in the calculation unit  122 . Moreover, the control module  12  samples the input voltage Vin and the output voltage Vout. And the turn-on time Ton of switching period of the switch control signal is calculated by the input voltage Vin, the output voltage Vout and a reference current signal in the calculation unit  122 . Moreover, the calculation unit  122  stores a variation period signal which is cyclically-changed. According to the switching period reference Ts, the turn-on time Ton and the variation period signal, the PWM unit  123  generates a PWM signal. Wherein, the control module  12  may be digital processor, for example, MCU, DSP. 
     The dimming circuit  1  further comprises an input voltage detector  141  and an output voltage detector  142 . The input voltage detector  141  is electrically connected with the input side of the DC/DC conversion unit  11 . The input voltage detector  141  is used for sampling the input voltage Vin and sending to the calculation unit  122  according to the sampling result of the input voltage Vin. The output voltage detector  142  is electrically connected with the output side of the DC/DC conversion unit  11 . The output voltage detector  142  is used for sampling the output voltage Vout and sending to the calculation unit  122  according to the sampling result of the output voltage Vout. 
     The driving module  13  is electrically connected with the PWM unit  123  of the control module  12  and the power switch  111  of the DC/DC conversion unit  11 . The driving module  13  receives the PWM signal from the PWM unit  123  and generates the switch control signal to the power switch  111  of the DC/DC conversion unit  11  according to the PWM signal. According to the control switch signal, the operation of the power switch  111  is correspondingly controlled. 
       FIG.  4    is a schematic circuit diagram illustrating the DC/DC conversion unit of the dimming circuit of  FIG.  2   . As shown in  FIG.  4   , the DC/DC conversion unit  11  further comprises a diode  112 , an inductor  113  and a capacitor  114 . The power switch  111  comprises a first terminal  111   a , a second terminal  111   b  and a third terminal  111   c . The first terminal  111   a  of the power switch  111  is electrically connected with the driving module  13  to receive the switch control signal from the driving module  13 . The second terminal  111   b  of the power switch  111  is electrically connected with a ground terminal. The third terminal  111   c  of the power switch  111  is electrically connected with the anode of the diode  112  and a first terminal of the inductor  113 . The cathode of the diode  112  is electrically connected with the positive input terminal  21   a , a first terminal of the capacitor  114  and the positive input terminal  22   a . A second terminal of the inductor  113  is electrically connected with a second terminal of the capacitor  114  and the negative output terminal  22   b . Since the inductor  113  and the load L are connected with each other in series, the average current flowing through the inductor  113  and the average current flowing through the load L are equal. According to the switch control signal from the driving module  13 , the power switch  111  of the DC/DC conversion unit  11  is alternately turned on or turned off. Consequently, the output current Iout is correspondingly adjusted. 
     The operations of the DC/DC conversion unit  11  will be described with reference to  FIGS.  4 ,  5 A,  5 B and  6   .  FIG.  5 A  is a schematic circuit diagram illustrating the DC/DC conversion unit of the dimming circuit of  FIG.  2    when the power switch is in the on state.  FIG.  5 B  is a schematic circuit diagram illustrating the DC/DC conversion unit of the dimming circuit of  FIG.  2    when the power switch is in the off state.  FIG.  6    is a schematic timing waveform diagram illustrating associated voltage and current processed by the dimming circuit of  FIG.  2   , in which the variation period signal is combined to the switching period reference. 
     When the power switch  111  of the DC/DC conversion unit  11  is in the on state according to the switch control signal from the driving module  13 , the voltage between the first terminal  111   a  of the power switch  111  and the second terminal  111   b  of the power switch  111  is Vgs. Meanwhile, the power switch  111  is turned on, and the diode  112  is turned off. The input current Iin received by the DC/DC conversion unit  11  flows through the capacitor  114 , the inductor  113  and the power switch  111  sequentially. Consequently, the capacitor  114  is charged by the input current Iin. In the turn-on time of the power switch  111 , the current I L  flowing through the inductor  113  gradually increases. As shown in  FIG.  6   , the time interval between the time point t 0  and the time point t 1  is the turn-on time Ton. And the current flowing through the inductor  113  may be expressed by the following formula:
 
 I   peak   −I   min =( V   in   −V   out )× T   on   /L   (1)
 
     In the above formula, I peak  is the current flowing through the inductor  113  when the on state of the power switch  111  is ended, I min  is the current flowing through the inductor  113  when the on state of the power switch  111  is started, and L is an inductance of the inductor  113 . 
     After the turn-on time Ton, the power switch  111  of the DC/DC conversion unit  11  is in the off state according to the switch control signal from the driving module  13 . That is, the voltage between the first terminal  111   a  of the power switch  111  and the second terminal  111   b  of the power switch  111  is lower than or equal to 0. As shown in  FIG.  5 B , the power switch  111  is turned off. Since the current of the inductor  113  cannot undergo a sudden change, the reverse induced potential is sensed. Meanwhile, the diode  112  is conductive, and the current I L  flowing through the inductor  113  decreases linearly. When the DC/DC conversion unit  11  is operated in a continuous current mode (CCM), the time interval between the time point t 1  and the time point t 2  is the time-off time Toff as shown in  FIG.  6   . And the current flowing through the inductor  113  may be expressed by the following formula:
 
 I   L_Toff   =I   peak   −V   out   ×T   off   /L   (2)
 
     In the above formula, I peak  is the current flowing through the inductor  113  when the on state of the power switch  111  is ended, L is an inductance of the inductor  113 , I L_Toff  is the current flowing through the inductor  113  when the off state of the power switch  111  is ended, and T off  is the time duration of the power switch  111  in the off state. When the DC/DC conversion unit  11  is operated in a continuous current mode, I min  is equal to I L_Toff . 
     However, when the DC/DC conversion unit  11  is in a discontinuous current mode (DCM) and when the off state of the power switch  111  is ended, the current flowing through the inductor  113  decreases to 0. In the next switching period, the power switch  111  is turned on again. That is, I L_Toff =I min =0, and T′ off  is the time duration between the time point of turning off the power switch  111  and the time point when the current flowing through the inductor  113  is 0. According to the formulae (1) and (2), the following formulae are deduced:
 
 I   peak −0=( V   in   −V   out )× T   on   /L   (3)
 
0= I   peak   −V   out   ×T′   off   /L   (4)
 
     The average of the current I L  flowing through the inductor  113  in a period is calculated by the following formula: 
     
       
         
           
             
               
                 
                   
                     I 
                     L_avg 
                   
                   = 
                   
                     
                       
                         I 
                         peak 
                       
                       2 
                     
                     × 
                     
                       
                         
                           T 
                           on 
                         
                         × 
                         
                           T 
                           off 
                         
                       
                       Ts 
                     
                   
                 
               
               
                 
                   ( 
                   5 
                   ) 
                 
               
             
           
         
       
     
     On the above formula, I L_avg  is the average of the current I L  flowing through the inductor  113  in a switching period, Ts is the switching period of the power switch  111  (i.e., t 0 ˜t 3 ) including the turn-on time of the power switch  111  (i.e., t 0 ˜t 1 ) and the turn-off time of the power switch  111  (e.g., t 1 ˜t 3 ). At the time point t 2 , the current flowing through the inductor  113  is 0. The turn-off time of the power switch  111  (e.g., t 1 ˜t 3 ) is equal to the time interval between the time point t 1  and the time point t 2  plus a discontinuous period (i.e., t 2 ˜t 3 ). Ideally, the current is maintained at zero in the discontinuous period. 
     The relationship between the switching frequency and the switching period of the power switch  111  satisfies the following formula:
 
 Ts= 1/ fs   (6)
 
     In the above formula, fs is the switching frequency of the power switch  111 . 
     After the formulae (3), (4) and (6) are introduced into the formula (5), the ideal magnitude of the output current Iout is calculated by the following formula: 
     
       
         
           
             
               
                 
                   
                     I 
                     out 
                   
                   = 
                   
                     
                       I 
                       L_avg 
                     
                     = 
                     
                       
                         
                           
                             T 
                             on 
                           
                           × 
                           
                             ( 
                             
                               
                                 V 
                                 
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                                   ⁢ 
                                   n 
                                 
                               
                               - 
                               
                                 V 
                                 out 
                               
                             
                             ) 
                           
                         
                         
                           2 
                           ⁢ 
                           L 
                         
                       
                       × 
                       
                         
                           
                             T 
                             on 
                           
                           + 
                           
                             
                               
                                 T 
                                 on 
                               
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                                     V 
                                     
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                                       ⁢ 
                                       
                                           
                                       
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                                   - 
                                   
                                     V 
                                     out 
                                   
                                 
                                 ) 
                               
                             
                             
                               V 
                               out 
                             
                           
                         
                         
                           1 
                           
                             f 
                             s 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
           
         
       
     
     Consequently, the dimming circuit  1  of the present invention accurately calculates the output current Iout according to the input voltage Vin and the output voltage Vout. 
     As previously described, the conventional dimming circuit  1 ′ controls the current of the load according to the sample of the current flowing through the power switch  102 ′. Consequently, the accuracy of the output current from the conventional dimming circuit  1 ′ is impaired. In accordance with the present invention, the output current Iout from the DC/DC conversion unit  11  is adjusted according to the input voltage Vin and the output voltage Vout. Under this circumstance, the accuracy of the load current is enhanced, and there is no loss in the sampling resistor. 
     Ideally, in the discontinuous current mode, the current I L  flowing through the inductor  113  decreases to 0 and the diode  112  is not turned on. Consequently, the output current Iout is maintained at zero. However, referring to  FIG.  4   , in the actual condition, the power switch  111  possibly contains parasitic capacitance C 1  and the diode  112  possibly contains parasitic capacitance C 2 . When the power switch  111  is in the off state and the diode  112  does not conduct, the parasitic capacitance C 1  of the power switch  111  may oscillate with the inductor  113  and the parasitic capacitance C 2  of the diode  112  may oscillate with the inductor  113 . Consequently, the current I L  flowing through the inductor  113  fluctuates. As shown in  FIG.  6   , the oscillation of the inductor  113  has an oscillation period Tc. The oscillation period Tc may be expressed by the following formula:
 
 Tc= 2π√{square root over ( LC )}
 
     In the above formula, L is the inductance of the inductor  113 , and C is the total capacitance of the parasitic capacitance C 1  of the power switch  111  and the parasitic capacitance C 2  of the diode  112 . 
     As mentioned above, the oscillation will cause the initial value of the current I L  flowing through the inductor  113  is not equal to 0, when the power switch  111  is turned on again. Under this circumstance, the above formula (3) is deviated. That is, the actual output current Iout is deviated from the ideal output current that is obtained from the formula (6). 
       FIG.  7 A  is a schematic timing waveform diagram illustrating associated voltage and current by the dimming circuit of  FIG.  2   , in which the current I L  is higher than 0 when the power switch is turned on. For example, the current I L  flowing through the inductor  113  oscillates to a value higher than 0 when the on state of the power switch is started. As shown in  FIG.  7 A , the magnitude of the current I L  gradually increases from a value higher than zero. Consequently, the output current Iout is higher than the ideal value. 
       FIG.  7 B  is a schematic timing waveform diagram illustrating associated voltage and current by the dimming circuit of  FIG.  2   , in which the current I L  is lower than 0 when the power switch is turned on. For example, the current I L  flowing through the inductor  113  oscillates to a value lower than 0 when the on state of the power switch is started. As shown in  FIG.  7 B , the magnitude of the current I L  gradually increases from a value lower than zero. Consequently, the output current Iout is lower than the ideal value. 
     To avoid the above drawbacks, the present invention adjusts the switching period of the control switch signal according to the variation period signal to reduce the influence of the oscillation between the parasitic capacitance C 1  of the power switch  111  and the inductor  113  and the oscillation between the parasitic capacitance C 2  of the diode  112  and the inductor  113 . The associated control method and operating principle will be described as follows. 
     Referring to  FIG.  8 A  and  FIGS.  2  to  6   .  FIG.  8 A  is a schematic timing waveform diagram illustrating plural switching periods of the switch control signal according to a first embodiment of the present invention. In this embodiment, each switching period of the switch control signal is controlled according to the PWM signal related with the variation period signal. The calculation unit  122  sets the period of the variation period signal equal to an oscillation period Tc. The variation period signal has a trend waveform of a cyclic triangular wave or a cyclic sine wave. In this embodiment, each switching period of the switch control signal is controlled according to the PWM signal containing the variation period signal, and the each switching period is gradually changed by a setting variation ΔT. In some embodiments, the setting variation ΔT is equal to Tc/n, wherein Tc is the oscillation period, and n is an integer not lower than 2. In this embodiment, the variation period signal has the waveform of a cyclic triangular wave. Alternatively, in another embodiment, the variation period signal has the waveform of a cyclic sine wave. In some other embodiments, the setting variation in each switching period may be different. It is noted that the waveform of the variation period signal is not restricted. 
     In case that the variation period signal is not added, the time duration of the switching period (also referred as the switching period reference) corresponding to the first calculation signal is Ts. 
     In some embodiments, the variation period signal from the calculation unit  122  is combined to the switching period reference. In such way, the time duration Ts of the switching period is cyclically adjusted, and the change amount between every two adjacent switching period is equal to ΔT. Since the variation period signal is not added to the switching period reference, the time duration of the turn-on time is not changed which is depend on the input voltage and output voltage. The cyclically-changed time duration of the switching period indicates that the time duration of the time-off time of each switching period of the power switch  111  is cyclically changed. Referring to  FIG.  8 A . The time duration of the switching period reference is equal to Ts. Then, the time duration of each switching period is gradually increased by the setting variation ΔT. The time duration of the first switching period after the switching period reference is equal to Ts+ΔT (=Ts+Tc/n). The time duration of the second switching period after the switching period reference is equal to Ts+2ΔT (=Ts+2Tc/n). The rest may be deduced by analogy until the time duration of the switching period (also referred as the largest switching period) reaches Ts+Tc/2. Then, the time duration of each switching period is gradually decreased by the setting variation ΔT. The time duration of the first switching period after the largest switching period is equal to Ts+Tc/2−Tc/n. The time duration of the second switching period after the largest switching period is equal to Ts+Tc/2−2Tc/n. The rest may be deduced by analogy until the time duration of the switching period (also referred as the smallest switching period) reaches Ts−Tc/2. Then, the time duration of each switching period is gradually increased by the setting variation ΔT. After n/2 switching periods, the time duration of the switching period reaches Ts. The above processes are repeatedly done. Consequently, the time durations of plural switching periods of the switch control signal are cyclically adjusted. 
     Since the variation period signal is added to the switching period reference and the corresponding PWM signal is generated, the time durations of plural switching periods of the switch control signal are adjusted according to the variation period signal. Since the time duration of the time-off time of each switching period has the cyclic change, the output current Iout is correspondingly adjusted. 
     Referring to  FIGS.  6  and  8 A . The switch control signal with the plural switching periods is applied to the dimming circuit  1 . For example, for the first switching period, the time interval between the time point t 0  and the time point t 3  is the switching period reference Ts. Assumed that the turn-on time is fixed, for the second switching period, the turn-off time increases Tc/n with respect to first switching period. For the third switching period, the turn-off time increases Tc/n with respect to second switching period, and is equal to Ts+Tc/2. For the forth switching period, the turn-off time decreases Tc/n with respect to third switching period. Then, the time duration of the switching period is gradually decreased by the setting variation of Tc/n until the switching period is decreased to Ts−Tc/2. The above processes are repeatedly done. In other words, the time duration of the turn-off time of each switching period has been cyclically changed. When the on state of the power switch  111  is started, the magnitude of the current I L  in different switching periods may be higher than zero (i.e., the output current Iout is higher than the ideal value), equal to zero (i.e., the output current Iout is equal to the ideal value), or lower than zero (i.e., the output current Iout is lower than the ideal value). Since the output current Iout higher than the ideal value and the output current Iout lower than the ideal value are balanced, the average value of the output current Iout is close to the ideal value after a long time. Moreover, since the influences of the oscillation between the parasitic capacitance C 1  of the power switch  111  and the inductor  113  and the oscillation between the parasitic capacitance C 2  of the diode  112  and the inductor  113  are eliminated, the accuracy of the output current Iout is increased. 
       FIG.  8 B  is a schematic timing waveform diagram illustrating plural switching periods of the switch control signal according to a second embodiment of the present invention. The time duration of the switching period reference is equal to Ts. Then, the time duration of each switching period is gradually decreased by the setting variation ΔT. The time duration of the first switching period after the switching period reference is equal to Ts−ΔT (=Ts−Tc/n). The time duration of the second switching period after the switching period reference is equal to Ts−2ΔT (=Ts−2Tc/n). The rest may be deduced by analogy until the time duration of the switching period (also referred as the smallest switching period) reaches Ts−Tc/2. Then, the time duration of each switching period is gradually increased by the setting variation ΔT. The time duration of the first switching period after the smallest switching period is equal to Ts−Tc/2+Tc/n. The time duration of the second switching period after the smallest switching period is equal to Ts−Tc/2+2Tc/n. The rest may be deduced by analogy until the time duration of the switching period (also referred as the largest switching period) reaches Ts+Tc/2. Then, the time duration of each switching period is gradually decreased by the setting variation ΔT. After n/2 switching periods, the time duration of the switching period reaches Ts. The above processes are repeatedly done. Consequently, the time durations of plural switching periods of the switch control signal are cyclically adjusted. 
     In some embodiments, the variation period signal from the calculation unit  122  is added to the turn-on time. In such way, the time duration of the turn-on time of the switching period is cyclically adjusted.  FIG.  9    is a schematic timing waveform diagram illustrating associated voltage and current by the dimming circuit of  FIG.  2   . In this embodiment, the variation period signal is added to the turn-on time, and thus the corresponding PWM signal is generated. For example, the time interval between the time point t 0  and the time point t 3  is the switching period reference Ts. The time interval between the time point t 0  and the time point t 1  is the turn-on time of the switching period reference, and the variation period signal is equal to 0. Then, the time duration of the turn-on time of each switching period is gradually increased by the setting variation ΔT (=Tc/n) at a time until the increased time duration of the turn-on time is Tc/2. Then, the time duration of the turn-on time of each switching period is gradually decreased by the setting variation ΔT (=Tc/n) at a time until the decreased time duration of the turn-on time is Tc/2. The above processes are repeatedly done. When the driving module  13  generates the switch control signal according to the PWM signal, the time durations of the turn-on times of the plural switching periods of the switch control signal are adjusted according to the variation period signal. Since the time duration of the turn-on time of each switching period has the cyclic change, the efficacy similar to  FIG.  6    is achieved. That is, the output current Iout is correspondingly adjusted. Moreover, since the influences of the oscillation between the parasitic capacitance C 1  of the power switch  111  and the inductor  113  and the oscillation between the parasitic capacitance C 2  of the diode  112  and the inductor  113  are eliminated, the accuracy of the output current Iout is increased. The operations of the dimming circuit in  FIG.  9    are similar to the operations of the dimming circuit in  FIG.  6   , and are not redundantly described herein. 
     In some embodiments, the control module  12  of the dimming circuit  1  further comprises a dimming signal calculation unit  124  for receiving a dimming signal S. According to the dimming signal S, the dimming signal computation unit  124  generates a reference current signal. According to the input voltage, the output voltage and the reference current signal, the dimming signal computation unit  124  generates the turn-on time to the PWM unit  123 . Consequently, the PWM unit  123  generates the PWM signal to the driving module  13 . According to the PWM signal, the driving module  13  controls the turn-on time of the corresponding switching period. 
       FIG.  10    is a flowchart illustrating a dimming control method for the dimming circuit of  FIG.  2   . 
     Firstly, a step S 1  is providing a switching period reference. Then, a step S 2  is sampling an input voltage and an output voltage, and generating a turn-on time according to the input voltage, the output voltage and a reference current signal. Then, a step S 3  is providing a variation period signal which is cyclically-changed. Then, a step S 4  is generating a pulse width modulation signal according to the switching period reference, the turn-on time and the variation period signal. Then, a step S 5  is generating a switch control signal according to the pulse width modulation signal, so that the power switch of the DC/DC conversion unit is controlled. The switch control signal has plural switching periods. Each switching period includes a turn-on time and a turn-off time. According to variation period signal, the switch control signal is periodically adjusted to control the switching period of the power switch. 
     From the above descriptions, the present invention provides the dimming circuit. The output current from the DC/DC conversion unit is adjusted according to the input voltage and the output voltage of the DC/DC conversion unit. Since it is not necessary to sample the output current, the power loss is reduced and the efficiency of the dimming circuit is enhanced. Moreover, after the variation period signal is added to the switching period reference or the turn-on time, the PWM signal is generated and the time duration of the turn-off time or the turn-on time of each switching period is cyclically adjusted. Consequently, the average of the output current is close to the ideal value. Moreover, since the influences of the oscillation between the parasitic capacitances and the inductor are eliminated, the accuracy of the output current is increased. 
     While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.