Patent Publication Number: US-11038436-B2

Title: Inverter system

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     The present application is a National Stage of International Application No. PCT/KR2018/008109, filed on Jul. 18, 2018, which claims the benefit of earlier filing date and right of priority to Korean Application No. 10-2017-0123403, filed on Sep. 25, 2017, and Korean Application No. 10-2017-0123402, filed on Sep. 25, 2017 the contents of which are all hereby incorporated by reference herein in their entirety. 
     FIELD OF THE INVENTION 
     The present disclosure relates to an inverter system, and more particularly, to an inverter system including an inverter having new topology. 
     BACKGROUND OF THE INVENTION 
     High voltage inverter systems use input power sources with a root-mean-square (RMS) line voltage of 600 V or more and are generally used to operate a large-capacity motor with a capacity of hundreds of kW to tens of MW. High voltage inverter systems are generally used in fields such as fans, pumps, compressors, retractors, hoists, and conveyors. 
     The inverter systems include a form of series-type multi-level inverter (cascade multi-level inverter) that generates three levels or more of output voltage. Magnitude and a number of output voltage levels of the inverter system are determined based on a number of unit power cells including multi-level inverter, and each of unit power cells uses an isolated input voltage. 
     In the inverter system, unit power cells of a plurality of unit power cells are connected electrically in series to form each of phases and a multi-phase output voltage of the inverter is determined based on a sum of output voltages of the unit power cells included in phases. In this case, the inverters included in each unit power cell may have various topologies. 
       FIG. 1  shows a configuration of a unit power cell including an inverter having a topology in related art. 
     Referring to  FIG. 1 , a unit power cell including an inverter having topology in related art includes a rectifier  102 , a smoother  104 , and an inverter  106  that synthesizes an output voltage. 
     The rectifier  102  receives two three-phase voltages output from an input power source. The rectifier  102  includes a plurality of diodes and a voltage magnitude of the rectified direct current (DC)-link is determined based on a difference between input power of the rectifier  102  and output power of the unit power cell. 
     The output of the rectifier  102  is transferred to the smoother  104  including two DC-link capacitors C 1 , C 2  connected to each other electrically in series. The DC-link capacitors C 1  and C 2  function to solve instantaneous power imbalance at an input/output terminal. In  FIG. 1 , the capacitors C 1  and C 2  represent the same voltage of E. 
     The inverter  106  synthesizes the output voltage based on the DC voltage provided through the rectifier  102  and the DC-link capacitors C 1  and C 2 . As shown in  FIG. 1 , the inverter  106  is configured based on a T-type topology in related art and includes a plurality of switching elements S 1  to S 8  and a plurality of diodes D 1  to D 12 . 
     The switching elements S 1  to S 8  included in the inverter  106  are respectively connected to the corresponding diodes D 1  to D 8  electrically in inverse-parallel. In the present disclosure, the ‘inverse parallel’ between the switching element and the diode refers that a direction of current flowing through the diode and a direction of current flowing through the switching element when the switching element is turned on are opposite to each other. 
     The switching elements S 1  and S 5  and the switching elements S 3  and S 7  of the inverter  106  in related art shown in  FIG. 1  are turned on and off in a complementary manner and the switching elements S 2  and S 6  and the switching element S 4  and S 8  are turned on and turned off in a complementary manner. 
     For example, in the case where the voltages of the DC-link capacitors C 1  and C 2  are each E, when the switching element S 1  and the switching element S 2  are turned on, the switching element S 3  and the switching element S 4  are turned off, and at this time, an output pole voltage (Vu) becomes E. 
     In addition, when the switching element S 1  and the switching element S 3  are turned on, the switching element S 2  and the switching element S 4  are turned off, and in this case, the output pole voltage becomes 0. Similarly, when the switching element S 1  and the switching element S 2  are turned off, the switching element S 3  and the switching element S 4  are turned on, and in this case, the output pole voltage becomes −E. 
     Similarly, three levels of pole voltages Vv are output based on the complementary turn-on and turn-off operation of the switching elements S 5  to S 8 . Based on a combination of the two output pole voltages output as described above, the unit power cell in  FIG. 1  may represent five voltage levels of 2E, E, 0, −E, and −2E. 
     However, the inverter having the topology in related art as shown in  FIG. 1  includes too many switching elements and diodes. As described above, when each of unit power cells includes many elements, a possibility of failure of each of elements is increased as the number of used elements is increased. This increase in a possibility of failure results in degraded reliability of the high voltage inverter system including the inverter as shown in  FIG. 1   
     In particular, as the number of switching elements is increased, an amount of heat generated by repeating the switching operation (turn-on/turn-off) of the switching elements is increased. The increase in the amount of heat generation causes increase in the possibility of failure of the unit power cell and the inverter system. 
     In addition, when the inverter including excessive elements as shown in  FIG. 1  is used, there is a problem that the magnitude and the volume of the high-voltage inverter system are increased. 
     BRIEF SUMMARY OF THE INVENTION 
     The present disclosure provides an inverter and an inverter system to which new topology is applied, which may reduce a possibility of failure thereof by reducing a number of internal elements compared to an inverter having topology in related art. 
     The present disclosure also provides an inverter system having a reduced size and volume compared to an inverter system in the related art by reducing the number of internal elements compared to the inverter having the topology in related art. 
     The objects of the present disclosure are not limited to the above-mentioned objects, and the other objects and the advantages of the present disclosure which are not mentioned can be understood by the following description, and more clearly understood by the embodiments of the present disclosure. It will be also readily seen that the objects and the advantages of the present disclosure may be realized by features described in the patent claims and a combination thereof. 
     According to an embodiment of the present disclosure, an inverter system includes a phase shift transformer configured to convert and output a phase and magnitude of a voltage input from a power supply and a plurality of unit power cells configured to output a phase voltage based on voltage output from the phase shift transformer, and the unit power cell includes a first leg and a second leg. The first leg includes a first switching element and a fourth switching element connected to each other electrically in series, a second switching element and a third switching element connected to each other electrically in series between a connection point between the first switching element and the fourth switching element and a smoother, and a first diode, a second diode, a third diode, and a fourth diode respectively connected to the first switching element, the second switching element, the third switching element, and the fourth switching element electrically in inverse-parallel. The second leg includes a fifth switching element and a sixth switching element connected to each other electrically in series and a fifth diode and a sixth diode respectively connected to the fifth switching element and the sixth switching element electrically in inverse-parallel and is connected to the first leg electrically in parallel. 
     In addition, according to another embodiment of the present disclosure, the inverter system includes a phase shift transformer configured to convert and output the phase and the magnitude of the voltage input from the power supply and a plurality of unit power cells configured to output a phase voltage based on the voltage output from the phase shift transformer and the unit power cell includes a first leg and a second leg. The first leg includes a first switching element, a second switching element, a third switching element, and a fourth switching element connected to one another electrically in series, a first diode, a second diode, a third diode, and a fourth diode respectively connected to the first switching element, the second switching element, the third switching element, and the fourth switching element electrically in inverse-parallel, and a seventh diode and an eighth diode connected to each other electrically in series between a connection point between the first switching element and the second switching element and a connection point between the third switching element and the fourth switching element and the second leg includes a fifth switching element and a sixth switching element connected to each other electrically in series and a fifth diode and a sixth diode respectively connected to the fifth switching element and the sixth switching element electrically in inverse-parallel and is connected to the first leg electrically in parallel. 
     According to the present disclosure, inverters and inverter systems to which new topology is applied have an advantage in that a possibility of failure is reduced due to reduction in a number of internal elements compared to an inverter having topology in related art. 
     In addition, according to the present disclosure, the inverter system has an advantage in that a size and a volume is reduced compared to the inverter system in related art by reducing the number of internal elements compared to the inverter having the topology in related art. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         FIG. 1  shows a configuration of a unit power cell including an inverter having topology in related art. 
         FIG. 2  shows a configuration of an inverter system according to an embodiment of the present disclosure. 
         FIG. 3  is a circuit diagram showing a unit power cell included in an inverter system according to an embodiment of the present disclosure. 
         FIG. 4  shows waveforms of output pole voltages determined based on turn on/turn off states of switching elements of an inverter of the unit power cell shown in  FIG. 3 . 
         FIGS. 5 to 7  show current flow determined based on turn-on and turn-off states of switching elements of the inverter of the unit power cell shown in  FIG. 3 . 
         FIG. 8  shows a current flow determined when a unit power cell outputs a pole voltage according to another embodiment of the present disclosure. 
         FIG. 9  is a circuit diagram showing a unit power cell included in an inverter system according to another embodiment of the present disclosure. 
         FIGS. 10 to 13  show current flow determined based on turn-on and turn-off states of switching elements of the inverter of the unit power cell shown in  FIG. 9 . 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The above objects, features, and advantages will be described in detail with reference to the accompanying drawings, whereby those skilled in the art to which the present disclosure pertains may easily implement the technical idea of the present disclosure. In describing the present disclosure, when it is determined that the detailed description of the known technology related to the present disclosure may unnecessarily obscure the gist of the present disclosure, the detailed description will be omitted. Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to indicate the same or similar components. 
       FIG. 2  shows a configuration of an inverter system according to an embodiment of the present disclosure. 
     According to an embodiment of the present disclosure, as shown in  FIG. 2 , an inverter system  204  converts power input from a power supply  202  and provides the power to a three-phase motor  210 . For example, the power supply  202  may supply an inverter system  204  with three-phase power having a root-mean-square (RMS) voltage of 600 V or more. In addition, the three-phase motor  210  may be an induction motor or a synchronous motor as examples of a load connected to the inverter system  204 . According to embodiments, the load other than the three-phase motor  210  may be connected to the inverter system  204 . 
     Referring back to  FIG. 2 , the inverter system  204  includes a phase shift transformer  206  and a plurality of unit power cells  20   a   1 ,  20   a   2 ,  20   b   1 ,  20   b   2 ,  20   c   1 , and  20   c   2 . 
     The phase shift transformer  206  may convert the phase and magnitude of the voltage input from the power supply  202  and provide the voltage to the plurality of unit power cells  20   a   1 ,  20   a   2 ,  20   b   1 ,  20   b   2 ,  20   c   1 , and  20   c   2 . Total harmonic distortion (THD) of the input current may be improved through the phase shift. 
     The unit power cells  20   a   1 ,  20   a   2 ,  20   b   1 ,  20   b   2 ,  20   c   1 , and  20   c   2  receive the output voltage output from the phase shift transformer  206  and output a phase voltage suitable for a load, for example, a three-phase motor  210 . 
     In  FIG. 2 , the unit power cells  20   a   1 ,  20   a   2 ,  20   b   1 ,  20   b   2 ,  20   c   1 , and  20   c   2  output three-phase voltages for the three-phase motor  210 . That is, two unit power cells  20   a   1  and  20   a   2  connected to each other electrically in series output a-phase voltage, and two unit power cells  20   b   1  and  20   b   2  connected to each other electrically in series output b-phase voltage, and two unit power cells  20   c   1  and  20   c   2  connected to each other electrically in series output c-phase voltage.  FIG. 2  shows an example of two unit power cells being electrically connected to each other for each phase, but the number of unit power cells connected to each other for each phase may vary depending on the output voltage of the inverter system  204 . 
     The phase voltages output by the unit power cells  20   a   1 ,  20   a   2 ,  20   b   1 ,  20   b   2 ,  20   c   1 ,  20   c   2  of the inverter system  204  shown in  FIG. 2  have the same magnitude and the phases are different from one another by 120 degrees. In addition, the number of unit power cells of the inverter system  204  may be reduced and the THD of the output voltage and a voltage change rate (dv/dt) may be improved through various switching methods. 
     Configurations and operation of a unit power cell including an inverter having new topology according to the present disclosure are described below in detail with reference to  FIGS. 3 to 7 . 
       FIG. 3  is a circuit diagram showing a unit power cell of an inverter system according to an embodiment of the present disclosure. 
     According to an embodiment of the present disclosure, referring to  FIG. 3 , a unit power cell of an inverter system includes a rectifier  302 , a smoother  304 , and an inverter  306  that synthesizes an output voltage. 
     The rectifier  302  receives two three-phase voltages output from an input power source. The rectifier  302  includes a plurality of diodes and magnitude of the rectified DC-link voltage is determined based on a difference between input power of the rectifier  302  and output power of the unit power cell. 
     The output of the rectifier  302  is transmitted to the smoother  304  including two DC-link capacitors C 1  and C 2  connected to each other electrically in series. The DC-link capacitors C 1  and C 2  function to solve instantaneous power imbalance at the input/output terminal. 
     In the following embodiments, it is assumed that the magnitude of the voltage represented by each of the capacitors C 1  and C 2  is E. For reference, the magnitude of the voltage represented by each of the capacitors C 1  and C 2  may vary according to the embodiments. 
     The inverter  306  synthesizes the output voltage based on the DC voltage provided through the rectifier  302  and the DC-link capacitors C 1  and C 2 . As shown in  FIG. 3 , the inverter  306  includes a first leg  308  and a second leg  310  connected to each other electrically in parallel. 
     The first leg  308  may include a first switching element S 1  and a fourth switching element S 4  connected to each other electrically in series, and a second switching element S 2  and a third switching element S 2  connected to each other electrically in series between a connection point N 2  between the first switching element S 1  and the fourth switching element S 4  and a connection point N 1  of the rectifier  304 . Further, as shown in  FIG. 3 , the first leg  308  includes the first diode D 1 , the second diode D 2 , the third diode D 3 , and the fourth diode D 4  respectively connected to the first switching element S 1 , the second switching element S 2 , the third switching element S 3 , and the fourth switching element S 4  electrically in inverse-parallel. 
     The first diode D 1  and the second diode D 2  included in the first leg  308  are electrically connected to each other in a same direction. In addition, the third diode D 3  and the fourth diode D 4  are electrically connected to each other in a same direction. 
     Referring back to  FIG. 3 , the second leg  310  includes a fifth switching element S 5  and a sixth switching element S 6  connected to each other electrically in series, and a fifth diode D 5  and a sixth diode D 6  respectively connected to the fifth switching element S 5  and the sixth switching element S 6  electrically in inverse-parallel. The fifth diode D 5  and the sixth diode D 6  included in the second leg  310  are electrically connected to each other in the same direction. 
     The inverter  306  having the above configuration may output pole voltage having four levels, for example, a first voltage level, a second voltage level, a third voltage level, and a fourth voltage through the switching operation of the switching elements S 1  to S 6  described below. 
     The inverter  106  in related art shown in  FIG. 1  includes eight switching elements and twelve diodes, whereas the inverter  306  of the unit power cell of the present disclosure shown in  FIG. 3  includes six switching elements and sixth diodes. As described above, the unit power cell according to the present disclosure has less number of switching elements than that of the unit power cell in related art to relatively reduce the possibility of failure and reduce the size and the volume of the unit power cell through the arrangement of the switching elements compared to the unit power cell in related art. 
       FIG. 4  shows waveforms of output pole voltages determined based on turn on/turn off states of switching elements of the inverter of the unit power cell shown in  FIG. 3 . 
     In  FIG. 4 , V g1  to V g6  refer to gate signals applied to gate terminals of the switching elements S 1  to S 6 , respectively. That is, when gate signals V g1  to V g6  are displayed in black shades, the corresponding switching elements S 1  to S 6  are turned on. Otherwise, the switching elements S 1  to S 6  are turned off. 
     In addition, +E, 0, −E displayed at the top of  FIG. 4  indicate the magnitudes of phase voltages. 
     According to the present disclosure, as shown in  FIG. 4 , each of phases (U, V) of a unit power cell may output three levels (+E, 0, −E) of phase voltages based on a turn on/off state through switching operation of each of switching elements. The unit power cell may represent the pole voltages V UV  having four levels (+2E, +E, −E, and −2E) based on the combination of the U-phase voltage V UN1  and V-phase voltage V VN1 . 
     Output of the phase voltages V UN1  and V VN1  determined through the switching operation of each of switching elements and the pole voltage V UV  of the unit power cell determined based on a combination of the phase voltages V UN1  and V VN1  is described below in detail with reference to  FIGS. 4 and 5 to 8 . 
       FIGS. 5 to 8  respectively show a current flow determined based on a turn-on and turn-off states of switching elements of the inverter of the unit power cell shown in  FIG. 3 . 
     First,  FIG. 5  shows a current flow  502  determined when a unit power cell outputs a pole voltage having a first voltage level, that is, +2E. 
     Referring to  FIGS. 4 and 5 , when the first switching element S 1  and the second switching element S 2  included in the inverter  306  are turned on, the U-phase voltage V UN1  represents +E. In addition, when the sixth switching element S 6  is turned on, the V-phase voltage V VN1  represents −E. Accordingly, the pole voltage V UV  of the unit power cell, which corresponds to a difference (V UN1 −V VN1 ) between the U-phase voltage V UN1  and the V-phase voltage V VN1 , satisfies equation of +E−(−E)=+2E. 
     As a result, when the first switching element S 1 , the second switching element S 2 , and the sixth switching element S 6  included in the inverter  306  are turned on and the third switching element S 3 , the fourth switching element S 4 , and the fifth switching element S 5  are turned off, the pole voltage V UV  of the unit power cell is represented by the first voltage level, that is, +2E. In this case, as shown in  FIG. 5 , the current flows through the DC-link capacitors C 1  and C 2 , the first switching element S 1 , and the sixth switching element S 6  (see the current flow  502 ). 
       FIG. 6  shows a current flow  602  determined when a unit power cell outputs a pole voltage having a second voltage level, that is, +E. 
     Referring to  FIGS. 4 and 6 , when a second switching element S 2  and a third switching element S 3  included in an inverter  306  are turned on, a U-phase voltage V UN1  represents zero. In addition, based on a six and the switching element S 6  is turned on, a V-phase voltage V VN1  represents −E. Accordingly, a pole voltage V UV  of the unit power cell corresponding to the difference (V UN1 −V VN1 ) between the U-phase voltage V UN1  and the V-phase voltage V VN1  satisfies equation of 0−(−E)=+E. 
     As a result, when the second switching element S 2 , the third switching element S 3 , and the sixth switching element S 6  included in the inverter  306  are turned on and the first switching element S 1 , the fourth switching element S 4 , and the fifth switching element S 5  are turned off, the pole voltage V UV  of the unit power cell is represented by a second voltage level, that is, +E. In this case, as shown in  FIG. 6 , the current flows through the DC-link capacitor C 2 , the third switching element S 3 , the second diode D 2 , and the sixth switching element S 6  (see the current flow  602 ). 
     Next,  FIG. 7  shows a current flow  702  determined when a unit power cell outputs a pole voltage having a third voltage level, that is, −E. 
     Referring to  FIGS. 4 and 7 , when a second switching element S 2  and the third switching element S 3  included in an inverter  306  are turned on, a U-phase voltage V UN1  represents 0. In addition, when a fifth switching element S 5  is turned on, a V-phase voltage V VN1  represents +E. Accordingly, a pole voltage V UV  of the unit power cell corresponding to a difference (V UN1 −V VN1 ) between the U-phase voltage V UN1  and the V-phase voltage V VN1  satisfies equation of 0−(+E)=−E. 
     As a result, when the second switching element S 2 , the third switching element S 3 , and the fifth switching element S 5  included in the inverter  306  are turned on and the first switching element S 1 , the fourth switching element S 4 , and the sixth switching element S 6  are turned off, the pole voltage V UV  of the unit power cell is represented by a third voltage level, that is, −E. In this case, as shown in  FIG. 7 , the current flows through the DC-link capacitor C 1 , the third switching element S 3 , the second diode D 2 , and the fifth switching element S 5  (see the current flow  702 ). 
     Next,  FIG. 8  shows a current flow  802  determined when a unit power cell outputs a pole voltage having a fourth voltage level, that is, −2E. 
     Referring to  FIGS. 4 and 8 , when a third switching element S 3  and a fourth switching element S 4  included in an inverter  306  are turned on, a U-phase voltage V UN1  represents −E. In addition, when a fifth switching element S 5  is turned on, a V-phase voltage V VN1  represents +E. Accordingly, a pole voltage V UV  of the unit power cell corresponding a difference (V UN1 −V VN1 ) between the U-phase voltage V UN1  and the V-phase voltage V VN1  satisfies equation of −E−(+E)=−2E. 
     As a result, when the third switching element S 3 , the fourth switching element S 4 , and the fifth switching element S 5  included in the inverter  306  are turned on and a first switching element S 1 , a second switching element S 2 , and a sixth switching element S 6  are turned off, the pole voltage V UV  of the unit power cell is represented by a fourth voltage level, that is, −2E. In this case, as shown in  FIG. 8 , the current flows through DC-link capacitors C 1  and C 2 , the fifth switching element S 5 , and the fourth switching element S 4  (see the current flow  802 ). 
       FIG. 9  is a circuit diagram showing a unit power cell included in inverter system according to another embodiment of the present disclosure. 
     According to another embodiment of the present disclosure, referring to  FIG. 9 , the unit power cell included in the inverter system includes a rectifier  902 , a smoother  904 , and an inverter  906  that synthesizes an output voltage. 
     The rectifier  902  receives two three-phase voltages output from an input power source. The rectifier  902  includes a plurality of diodes and magnitude of the rectified DC-link voltage is determined based on a difference between input power of the rectifier  902  and output power of the unit power cell. 
     The output of the rectifier  902  is transmitted to the smoother  904  including two DC-link capacitors C 1  and C 2  connected to each other electrically in series. The DC-link capacitors C 1  and C 2  function to solve instantaneous power imbalance at the input/output terminal. 
     In the following embodiments, it is assumed that the magnitude of the voltage represented by each of the capacitors C 1  and C 2  is E. For reference, the magnitude of the voltage represented by each of the capacitors C 1  and C 2  may vary according to the embodiment. 
     The inverter  906  synthesizes the output voltage based on the DC voltage provided through the rectifier  902  and the DC-link capacitors C 1  and C 2 . As shown in  FIG. 9 , the inverter  906  includes a first leg  908  and a second leg  910  connected to each other electrically in parallel. 
     The first leg  908  includes a first switching element S 1 , a second switching element S 2 , a third switching element S 3 , and a fourth switching element S 4  connected to one another electrically in series. In addition, as shown in  FIG. 9 , the first leg  908  includes the first diode D 1 , the second diode D 2 , the third diode D 3 , and the fourth diode D 4  respectively connected to the first switching element S 1 , the second switching element S 2 , the third switching element S 3 , and the fourth switching element S 4  electrically in inverse-parallel. 
     In addition, the first leg  908  includes a seventh diode D 7  and an eighth diode D 8  connected to each other electrically in series between a connection point N 1  between the first switching element S 1  and the second switching element S 2  and a connection point N 2  between the third switching element S 3  and the fourth switching element S 4 . A connection point N 4  between the seventh diode D 7  and the eighth diode D 8  is electrically connected to the connection point N 3  between the DC-link capacitors C 1  and C 2 . 
     The first diode D 1 , the second diode D 2 , the third diode D 3 , and the fourth diode D 4  included in the first leg  908  are electrically connected to one another in the same direction. In addition, the seventh diode D 7  and the eighth diode D 8  included in the first leg  908  are electrically connected to each other in the same direction. 
     Referring back to  FIG. 9 , the second leg  910  includes a fifth switching element S 5  and a sixth switching element S 6  connected to each other electrically in series and a fifth diode D 5  and a sixth diode D 6  respectively connected to the fifth switching element S 5  and the sixth switching element S 6  electrically in inverse-parallel. The fifth diode D 5  and the sixth diode D 6  included in the second leg  910  are electrically connected to each other in the same direction. 
     The inverter  906  having the above configuration may output the pole voltage having four levels, for example, a first voltage level, a second voltage level, a third voltage level, and a fourth voltage through the switching operation of the switching elements S 1  to S 6  described below. 
     The inverter  106  in related art shown in  FIG. 1  includes eight switching elements and twelve diodes, whereas the inverter  906  of the unit power cell of the present disclosure shown in  FIG. 9  includes six switching elements and eight diodes. As described above, the unit power cell according to the present disclosure has less number of switching elements than that of the unit power cell in the related art to thereby relatively reduce the failure possibility and reduce the size and the volume of the unit power cell due to the arrangement of the switching elements compared to the unit power cell in related art. Accordingly, the possibility of failure, the size, and the volume of the inverter system  204  including the unit power cell in  FIG. 9  are reduced compared to the inverter system in related art. 
     Output of the phase voltages V UN1  and V VN1  determined based on switching operation of the switching elements and pole voltage V UV  of the unit power cell determined based on a combination of phase voltages V UN1  and V VN1  are described below in detail with reference to  FIGS. 4 and 10 to 13 . 
       FIGS. 10 to 13  show current flow determined based on turn-on and turn-off states of switching elements of the inverter of the unit power cell shown in  FIG. 9 . 
     First,  FIG. 10  shows a current flow  502  determined when a unit power cell outputs a pole voltage having a first voltage level, that is, +2E. 
     Referring to  FIGS. 4 and 10 , based on a first switching element S 1  and a second switching element S 2  included in an inverter  906  being turned on, a U-phase voltage V UN1  represents +E. In addition, when a sixth switching element S 6  is turned on, a V-phase voltage V VN1  represents −E. Accordingly, a pole voltage V UV  of the unit power cell corresponding to a difference (V UN1 −V VN1 ) between the U-phase voltage V UN1  and the V-phase voltage V VN1  satisfies equation of +E−(−E)=+2E. 
     As a result, when the first switching element S 1 , the second switching element S 2 , and the sixth switching element S 6  included in the inverter  906  are turned on and a third switching element S 3 , a fourth switching element S 4 , and a fifth switching element S 5  are turned off, the pole voltage V UV  of the unit power cell is represented by a first voltage level, that is, +2E. In this case, as shown in  FIG. 10 , the current flows through DC-link capacitors C 1  and C 2 , the first switching element S 1 , the second switching element S 2 , and the sixth switching element S 6  (see the current flow  502 ). 
     Next,  FIG. 11  shows a current flow  602  determined when a unit power cell outputs a pole voltage having a second voltage level, that is, +E. 
     Referring to  FIGS. 4 and 11 , when a second switching element S 2  and a third switching element S 3  included in an inverter  906  are turned on, a U-phase voltage V UN1  represents 0. In addition, when a sixth switching element S 6  is turned on, a V-phase voltage V VN1  represents −E. Accordingly, a pole voltage V UV  of the unit power cell corresponding to a difference (V UN1 −V VN1 ) between the U-phase voltage V UN1  and the V-phase voltage V VN1  satisfies equation of 0−(−E)=+E. 
     As a result, when the second switching element S 2 , the third switching element S 3 , and the sixth switching element S 6  included in the inverter  906  are turned on and the first switching element S 1  and the fourth switching element S 4 , and the fifth switching element S 5  are turned on, the pole voltage V UV  of the unit power cell is represented by a second voltage level, that is, +E. In this case, as shown in  FIG. 11 , the current flows through DC-link capacitor C 2 , a seventh diode D 7 , the second switching element S 2 , and the sixth switching element S 6  (see the current flow  602 ). 
     Next,  FIG. 12  shows a current flow  702  determined when a unit power cell outputs a pole voltage having a third voltage level, that is, −E. 
     Referring to  FIGS. 4 and 12 , when a second switching element S 2  and a third switching element S 3  included in an inverter  906  are turned on, a U-phase voltage V UN1  represents 0. In addition, when the fifth switching element S 5  is turned on, a V-phase voltage V VN1  represents +E. Accordingly, the pole voltage V UV  of the unit power cell corresponding to a difference (V UN1 −V VN1 ) between the U-phase voltage V UN1  and the V-phase voltage V VN1  satisfies equation of 0−(+E)=−E. 
     As a result, when the second switching element S 2 , the third switching element S 3 , and the fifth switching element S 5  included in the inverter  906  are turned on and the first switching element S 1  and the fourth switching element S 4 , and the sixth switching element S 6  are turned off, the pole voltage V UV  of the unit power cell is represented by a third voltage level, that is, −E. In this case, as shown in  FIG. 12 , the current flows through the DC-link capacitor C 1 , the seventh diode D 7 , the second switching element S 2 , and the fifth switching element S 5  (see the current flow  702 ). 
     Next,  FIG. 13  shows a current flow  802  determined when a unit power cell outputs a pole voltage having a fourth voltage level, that is, −2E. 
     Referring to  FIGS. 4 and 13 , when a third switching element S 3  and a fourth switching element S 4  included in an inverter  906  are turned on, a U-phase voltage V UN1  represents −E. In addition, when a fifth switching element S 5  is turned on, a V-phase voltage V VN1  represents +E. Accordingly, a pole voltage V UV  of the unit power cell corresponding to a difference (V VN1 −V VN1 ) between the U-phase voltage V UN1  and the V-phase voltage V VN1  satisfies equation of −E−(+E)=−2E. 
     As a result, when the third switching element S 3 , the fourth switching element S 4 , and the fifth switching element S 5  included in the inverter  906  are turned on and a first switching element S 1 , a second switching element S 2 , and a sixth switching element S 6  are turned off, the pole voltage V UV  of the unit power cell is represented by a fourth voltage level, that is, −2E. In this case, as shown in  FIG. 13 , the current flows through DC-link capacitors C 1  and C 2 , the third switching element S 3 , the fourth switching element S 4 , and the fifth switching element S 5  (see the current flow  802 ). 
     As described above, the unit power cell including the inverter having the new topology of the present disclosure may include less number of elements than that of the power unit cell in related art to output the pole voltages having four levels. As described above, the number of elements may be reduced to reduce the failure possibility of the unit power cell and the inverter system to thereby improve reliability and reduce the size, the volume, and production costs of the unit power cell and the inverter system. 
     In particular, as the number of switching elements used for the inverter is reduced, the amount of heat generated by the switching elements is also reduced compared inverter systems in related art. The possibility of failure of the entire inverter system is reduced due to the reduction in the amount of generated heat. In addition, the size of additional components, for example, heat sinks, to solve heat generation of the inverter system may be reduced, which helps to reduce the size and volume of the inverter system. 
     Various substitutions, modifications, and changes can be made within a range that does not deviate from the technical idea of the present disclosure for a person having ordinary skill in the art to which the present disclosure pertains, and thus, the above-mentioned present disclosure is not limited to the above-mentioned embodiments and accompanying drawings.