Patent Publication Number: US-6710642-B1

Title: Bias generation circuit

Description:
BACKGROUND 
     A circuit may be used to bias other components or circuits. For example, a circuit may generate a bias current and provide it to a component to establish the proper mode of operation of the component. As a particular example, a bandgap circuit may be used to provide a bias current to analog components, such as an amplifier. A constant and precise bias current allows these components to perform at their intended range of operation. 
     Existing bandgap circuits may be formed from diodes and take advantage of the Arrhenius dependence of current in a diode to generate currents and voltages that are proportional to the absolute temperature. Generally, existing bandgap circuits are used to generate a temperature-independent voltage which is then passed to an external precision resistor to convert this voltage into a temperature-independent current for use by components such as amplifiers. Due to packaging and other design constraints, it may be undesirable to dedicate two pins of a package to the generation of such a temperature-independent current. 
     Current in a diode is proportional to its area. Generally, existing bandgap circuits utilize diodes that are biased well above their turn-on voltages of approximately 0.7 Volts (V). Advances in process and fabrication technologies have led to the introduction of circuits and components having lower supply voltages. At lower supply voltages, many bandgap circuits which utilize diodes are not practical because it is difficult to generate the required voltage drop. Existing bandgap circuits are not suited for use in systems which have supply voltages in the range of 1V and lower, unless large amounts of valuable substrate area are allocated to the fabrication of the diodes. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram of a circuit according to some embodiments. 
     FIG. 2 is illustrates the relationship between a gate voltage, temperature, and current in a circuit such as the circuit of FIG.  1 . 
     FIG. 3 is a block diagram of a bandgap circuit according to some embodiments. 
     FIG. 4 is a block diagram of a further circuit according to some embodiments. 
     FIG. 5 is a block diagram of a system utilizing features of some embodiments. 
    
    
     DETAILED DESCRIPTION 
     Some embodiments are associated with circuits that generate a bias current for application to one or more components or circuits which is substantially insensitive to variations in temperature. Some embodiments are associated with circuits that operate in devices or systems having supply voltages of approximately 1V or less (although embodiments may be implemented in circuits having higher supply voltages as well as embodiments which are substantially supply-voltage independent). 
     Details of features of embodiments will be described by first referring to FIG. 1, where a voltage generation circuit  12  is shown connected to a gate of a Metal-Oxide-Semiconductor-Field-Effect-Transistor (“MOSFET” or “MOS transistor”)  14  to generate a reference current (I d ) for application to a load  16 . In the embodiment depicted, MOS transistor  14  is a p-channel MOSFET. Embodiments allow the generation of an I d  which is substantially insensitive to variations in temperature. This temperature insensitivity is achieved, in part, by applying a voltage to a gate of MOS transistor  14  which is only linearly dependent on temperature. Embodiments generate a temperature-insensitive current from a MOSFET by identifying a zero temperature coefficient (“ZTC”) gate voltage (V ZTC ) at which the drain current (I d ) of the MOSFET is substantially independent of temperature variations. Further, the drain current may be provided to load  16  on-chip (e.g., without need for routing the bias current to an off-chip precision resistor prior to delivery to the load). The current generated when the zero temperature coefficient gate voltage (V ZTC ) is applied to the gate of MOS transistor  14  is referred to as the zero temperature coefficient drain current (I ZTC ). 
     The voltage applied to the gate of MOS transistor  12  is of the form: 
     
       
           V   gs   =V   ZTC   +βT (1−I d /I ZTC ),  (1) 
       
     
     where β is the slope of V T  (the threshold voltage of MOS transistor  12 ) versus temperature and I d  is the resulting temperature-independent current. In general, this relationship holds only if both V T  follows the form V to +βT and if mobility is proportional to (1/T) 2  (where V to  is the threshold voltage extrapolated to absolute zero temperature). Applicants performed simulations to show the relationship between various applied gate voltages, the resulting drain currents, and temperature for a simulated device. These simulation results are depicted in FIG. 2 (those skilled in the art will appreciate that these results are for one sample simulated device, and that the actual values will depend on process and other design considerations). 
     As shown in FIG. 2, there is a zero temperature coefficient voltage (V ZTC ) which results in the generation of a zero temperature coefficient current, where the current remains substantially stable despite wide variations in temperature. In the simulation results depicted in FIG. 2, various V gs  values for various fixed currents forced into a diode-connected MOS transistor are shown. V gs , as shown, is linearly dependent on changes in temperature for the various fixed currents. In the simulation results depicted in FIG. 2, the zero temperature voltage is approximately 0.67 V, resulting in a zero temperature current of approximately 14 μA. At the zero temperature point of operation, MOS transistor  14  has its carrier mobility and V T  balanced and the device operates substantially without dependence on temperature. 
     Applicants have developed circuits which generate a V gs  for application to MOS transistor  14  which is substantially only linearly dependent on variations in temperature, which allows tuning of device operation using one or more adjustable resistors, and which may be used to generate a stable and temperature insensitive output current in systems having low supply voltages (e.g., including systems operating using supply voltages of approximately 1 V or even less). Reference is now made to FIG. 3, where a bandgap circuit  100  is shown which may be used to generate an output voltage (V out ) which is substantially only linearly dependent on variations in temperature. 
     Bandgap circuit  100  includes MOS transistors  102 ,  104  (depicted as p-channel MOS transistors) which are configured to operate as diode-connected transistors (i.e., having their gate and drains shorted together). Because transistors  102 ,  104  have their gates and drains shorted together, each remains biased in the saturation region so long as its gate-source voltage (V gs ) is less negative (or equal to) than its drain-source voltage (V ds ). While circuit  100  is shown implemented using p-channel MOSFETs, upon reading this disclosure, those skilled in the art will recognize that similar results may be attained by configuring circuit  100  (and circuit  200  discussed further below) using n-channel MOSFETs. 
     Transistors  102  and  104  each have a source connected to a voltage source (shown as a supply voltage V cc ). The drain of transistor  102  is coupled in series with resistors  106  and  108  (having resistances R 3  and R 2 , respectively), while the drain of transistor  104  is coupled in series with resistor  110  (having a resistance R 1 ). Transistors  102  and  104  are biased for operation in the subthreshold region, and are generally matched to have substantially the same threshold voltage. 
     An amplifier  112  is coupled to operate as a differential amplifier producing an output voltage (V out ) having a known temperature dependence which is only linearly dependent on variations in temperature. In particular, as depicted, amplifier  112  is coupled in a feedback configuration where V out  is coupled to inputs (+ and −) of amplifier  112  via resistors  108  and  110 . In general, amplifier  112  is selected to have sufficiently high gain to force the (+) and (−) inputs to be approximately equal and to reduce the impact of process variations in the fabrication of circuit  100 . 
     The two inputs received by amplifier  112  include a first input receiving a signal generated across resistor  110  and a second input receiving a signal generated across resistor  108 . The values of resistors  106 ,  108  and  110  (whose resistances are referred to herein as resistances R 3 , R 2 , and R 1 , respectively) are selected to introduce an extra voltage drop between MOS transistors  102 ,  104 . In some embodiments, resistor  108  is a variable resistor. By varying the resistance (R 2 ) of resistor  108 , as will be described further herein, various output characteristics of circuit  100  may be tuned. In other embodiments, the resistances of resistors  106  and/or  110  may additionally (or alternatively) be varied to achieve desired output characteristics. In general, resistors  106 ,  108 , and  110  are sized based on characteristics of transistors  102 ,  104  to achieve voltage values at the (+) and (−) inputs of amplifier  112  which are substantially equal given a relatively high gain in amplifier  112 . 
     In operation, bandgap circuit  100  generates an output voltage V out  having the form: 
     
       
           V   out   =V   to   +αT.   (2) 
       
     
     As shown in ( 2 ), and in the circuit of FIG. 3, V out  is relatively resistant to variations in temperature because both V to  and α are generally not dependent on temperature. In the circuit of FIG. 3, V to  is generally equal to the threshold voltage of transistors  102 ,  104  extrapolated to absolute zero temperature. In the circuit of FIG. 3, α predominantly depends on the ratio of resistors R 2 /R 1  and R 2 /R 3 . Accordingly, because V to  and α are generally not dependent on temperature, V out  is generated with a linear dependence on temperature. Further, in embodiments where one or more of resistors  106 ,  108 , and  110  are variable, the output voltage (V out ) may be varied by varying the resistance. For example, the value of resistor  108  (resistance R 2 ) may be varied to adjust or tune the output voltage as desired. 
     In some embodiments, the voltage output from circuit  100  may be passed directly to a MOS transistor (such as transistor  12  of FIG. 1) in order to provide a current to a load. That is, circuit  100  may be utilized in applications in which traditional diode-based bandgap circuits are used. Circuit  100  is suitable for use in environments having low supply voltages (e.g., including applications having supply voltages of approximately 1V or even lower). 
     Embodiments allow the generation of a temperature-insensitive current by combining bandgap circuit with an amplifier stage as will now be described by reference to FIG.  4 . As shown in FIG. 4, a current generation circuit  200  is shown which utilizes bandgap circuit  100  to generate an output current (I ref ) which is relatively temperature and supply voltage independent and which may be provided to a load device on-chip (e.g., without need to be routed to an external precision resistor prior to delivery to a load device). 
     Current generation circuit  200  includes a bandgap circuit portion (configured as described above in conjunction with FIG. 3) including diode-configured, p-channel MOSFETs  202 ,  204  coupled to an amplifier  212  and resistors  206 ,  208  and  210  to provide an intermediate output voltage (V out ) which is only linearly dependent on variations in temperature. The intermediate output voltage generated by the bandgap circuit portion is passed to an input of an amplifier  218  which is configured as a differential amplifier receiving a second input coupled to a resistor  214  (having a resistance R 4 ) coupled to a supply voltage (V cc ) and to a resistor  216  (having a resistance R 5 ) coupled to an output of amplifier  218 . The output of amplifier  218  is coupled to a gate of a p-channel MOSFET transistor  220 . Transistor  220  has a source coupled to the supply voltage (V cc ) and a drain coupled to a load  222 . 
     In operation, circuit  200  functions to scale the intermediate output (V out ) from the bandgap portion of the circuit by a factor (k) using amplifier  218 . The resulting output voltage presented at the gate of transistor  220  (V gs220 ) is represented as: 
     
       
           V   gs220   =kV   to   +αkT.   (3) 
       
     
     Circuit  200  may be designed to generate a desired output voltage (V gs220 ) using the relationships described above in conjunction with FIG.  1 . For example, circuit  200  may be voltage matched by tuning the various resistor values to set k=V ztc /V to  and α=β/k*(1−I d /I ztc ). Put another way, the output voltage at the gate of transistor  220  has the relationship: 
     
       
           V   gs220   =−k ( V   to   +αT ), where k=1+( R   5 / R   4 ).  (4) 
       
     
     The threshold voltages of each of the transistors  202 ,  204  and  220  are matched to be substantially the same. The threshold voltage, as described above in conjunction with FIG. 3, is selected to provide a desired drain current value at the zero temperature point of operation. The temperature-independent current generated by circuit  200  is the drain current of transistor  220 . Transistor  220  may be maintained in saturation mode by designing load  222  to keep V ds220  greater than V gs220 −V T . 
     Circuit  200  may be tuned to provide a desired temperature-independent current to load  222  by tuning one of two variables of equation (4): the variable k or the variable α. In some embodiments, k is generally fixed as a design choice (e.g., by the selection of the ratio of resistances R 5 /R 4  as described in eq. (4) above), and the variable α is tuned by varying the resistance of one of the resistors of circuit  200 . For example, as described above in conjunction with the circuit of FIG. 3, one or more of the resistors in the bandgap circuit portion may be implemented as variable resistors, allowing the tuning of the variable α. In some embodiments, resistor  208  is implemented as a variable resistor and its resistance may be varied to change the variable α. By varying α, the voltage applied to the gate of MOS transistor  220  may be varied to achieve a zero temperature voltage which results in the generation of a zero temperature current. In some embodiments, other voltages which are linearly dependent on temperature may be selected to provide temperature-insensitive currents (e.g., as described and shown in conjunction with the graph of FIG. 2, there may be a number of linearly-dependent gate voltages which may result in temperature-insensitive currents and providing desired characteristics). Other resistances in circuit  200  may also be varied to achieve desired tuning of α. 
     As described above in conjunction with FIG. 1 (and as illustrated in the example simulation results depicted in FIG.  2 ), when a zero temperature coefficient voltage (V ZTC ) is applied to a gate of MOS transistor  220 , a zero temperature coefficient current (I ZTC ) is generated. This temperature-independent current may be delivered on-chip to a load such as load  222  without need for off-chip precision resistors or the like. Load  222  may be any of a number of different types of loads, such as, for example, circuits using a differential pair configuration as a gain stage (e.g., such as an amplifier), a current mirror (e.g., to distribute the current to other circuits), or the like. Other loads may also beneficially utilize the temperature-independent current generated using circuit  200 . Because no off-chip precision resistors are needed, designs using circuit  200  may be manufactured with fewer pins. 
     FIG. 5 is a block diagram of a system  400  including an integrated circuit  410  according to some embodiments. The integrated circuit  410  includes a bandgap circuit  420  that receives V cc  and provides output signals (e.g., including an output current I ref ) to a load (such as a component or circuit in processor portion  430 ). The load may be any of a number of different types of circuits or components (e.g., such as, for example, analog devices or other circuits requiring a stable current source). Bandgap circuit  420  may utilize any of the embodiments described herein (e.g., bandgap circuit  420  may be configured to provide a temperature-resistant current as described above). According to some embodiments, bandgap circuit  420  is instead located outside of integrated circuit  410 . Moreover, integrated circuit  410  may be a processor or any other type of integrated circuit. According to some embodiments, integrated circuit  410  also communicates with an off-die cache  440 . Integrated circuit  410  may also communicate with a system memory  460  via a host bus and a chipset  450 . In addition, other off-die functional units, such as a graphics accelerator  470  and a Network Interface Controller (NIC)  480  may communicate with integrated circuit  410  via appropriate busses. 
     The several embodiments described herein are solely for the purpose of illustration. Persons skilled in the art will recognize from this description other embodiments may be practiced with modifications and alterations limited only by the claims.