Patent Publication Number: US-2023163568-A1

Title: Vertical cavity surface emitting laser

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application claims priority based on Japanese Patent Application No. 2021-190050 filed on Nov. 24, 2021, and the entire contents of the Japanese patent application are incorporated herein by reference. 
     TECHNICAL FIELD 
     The present disclosure relates to a vertical cavity surface emitting laser. 
     BACKGROUND 
     Patent Document 1 discloses a vertical cavity surface emitting laser including a substrate, a lower distributed Bragg reflector provided on the substrate, an active layer provided on the lower distributed Bragg reflector, and an upper distributed Bragg reflector provided on the active layer. The vertical cavity surface emitting laser includes a light emitting region including an active layer and a high-resistance region located around the light emitting region. The high-resistance region extends from the upper surface of the upper distributed Bragg reflector to the active layer. 
     [Patent Document 1] Japanese Unexamined Patent Application Publication No. 2002-111051 
     SUMMARY 
     A vertical cavity surface emitting laser according to one aspect of the present disclosure includes a post provided at a major surface of a substrate and extending along a first axis intersecting the major surface of the substrate, and an electrode provided at an upper surface of the post and surrounding the first axis. The post includes a first distributed Bragg reflector, an active layer, a current confinement layer, and a second distributed Bragg reflector. The substrate, the first distributed Bragg reflector, the active layer, the current confinement layer, and the second distributed Bragg reflector are disposed in order in a direction of the first axis. The second distributed Bragg reflector includes a semiconductor region and a high-resistance region surrounding the semiconductor region. The high-resistance region has an electrical resistance that is higher than an electrical resistance of the semiconductor region. The current confinement layer includes an aperture portion and an oxidized portion surrounding the aperture portion. The first axis passes through the semiconductor region and the aperture portion. A length of a longest line segment of line segments connecting any two points on an inner edge of the oxidized portion in a section orthogonal to the first axis is D1, a length of a longest line segment of line segments connecting any two points on an inner edge of the high-resistance region in the section orthogonal to the first axis is D2, and a value of D2/D1 is greater than 1 and is 2.5 or less. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a schematic cross-sectional view of a vertical cavity surface emitting laser according to an embodiment. 
         FIG.  2    is an enlarged cross-sectional view of a portion of the vertical cavity surface emitting laser of  FIG.  1   . 
         FIG.  3    is a plan view of a portion of the vertical cavity surface emitting laser of  FIG.  1   . 
         FIG.  4    is a graph showing an example of a spectrum of light emitted from a vertical cavity surface emitting laser. 
         FIG.  5    is a graph showing an example of a relationship between a spectrum width and a distance between an inner edge of an oxidized portion and an inner edge of a high-resistance region. 
         FIG.  6    is a plan view showing a post according to the first variation. 
         FIG.  7    is a sectional view showing a post according to the second variation. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     In some cases, a current is confined by using a current confinement layer including an aperture portion and an oxidized portion surrounding the aperture portion. Typically, the refractive index of the oxidized portion is less than the refractive index of the aperture portion, so some light is confined within the aperture portion. However, since the current confinement layer is relatively thin, an optical electric field of a transverse mode (particularly, a higher-order mode) may leak out of the aperture portion. In this case, the spectrum width of light emitted from the vertical cavity surface emitting laser is increased. 
     The present disclosure provides a vertical cavity surface emitting laser capable of emitting light having a smaller spectrum width. 
     Description of Embodiments of the Present Disclosure 
     A vertical cavity surface emitting laser according to an embodiment includes a post provided at a major surface of a substrate and extending along a first axis intersecting the major surface of the substrate, and an electrode provided at an upper surface of the post and surrounding the first axis. The post includes a first distributed Bragg reflector, an active layer, a current confinement layer, and a second distributed Bragg reflector. The substrate, the first distributed Bragg reflector, the active layer, the current confinement layer, and the second distributed Bragg reflector are disposed in order in a direction of the first axis. The second distributed Bragg reflector includes a semiconductor region and a high-resistance region surrounding the semiconductor region. The high-resistance region has an electrical resistance that is higher than an electrical resistance of the semiconductor region. The current confinement layer includes an aperture portion and an oxidized portion surrounding the aperture portion. The first axis passes through the semiconductor region and the aperture portion. A length of a longest line segment of line segments connecting any two points on an inner edge of the oxidized portion in a section orthogonal to the first axis is D1, a length of a longest line segment of line segments connecting any two points on an inner edge of the high-resistance region in the section orthogonal to the first axis is D2, and a value of D2/D1 is greater than 1 and is 2.5 or less. 
     According to the vertical cavity surface emitting laser, it is possible to reduce the distance between the inner edge of the oxidized portion and the inner edge of the high-resistance region in the direction orthogonal to the first axis. Since the high-resistance region absorbs light more easily than the semiconductor region, it is possible to absorb a transverse mode (particularly, a higher-order mode) generated at a position away from the first axis. The transverse mode increases a spectrum width of light emitted from the vertical cavity surface emitting laser. Therefore, according to the vertical cavity surface emitting laser, light having a smaller spectrum width can be emitted. 
     The value of D2/D1 may be 1.1 or greater. In this case, it is possible to prevent the distance between the inner edge of the oxidized portion and the inner edge of the high-resistance region from becoming excessively small. Therefore, the fundamental mode generated at a position of the first axis or a position close to the first axis can be prevented from being absorbed by the high-resistance region. 
     The value of D1 may be from 4 μm to 7 μm. In this case, the aperture portion having a desired size can be obtained. 
     In a direction orthogonal to the first axis, a distance between the inner edge of the oxidized portion and the inner edge of the high-resistance region may be 3 μm or less. In this case, the spectrum width can be reduced. 
     The high-resistance region may be a first high-resistance region. The second distributed Bragg reflector may include a second high-resistance region having an electrical resistance that is higher than the electrical resistance of the semiconductor region. The second high-resistance region may surround the semiconductor region. The second high-resistance region may be disposed between the electrode and the first high-resistance region in the direction of the first axis. The second high-resistance region may have an inner edge that is positioned farther away than an inner edge of the first high-resistance region from the first axis in the direction orthogonal to the first axis. The first high-resistance region and the second high-resistance region respectively may have a first thickness and a second thickness along the direction of the first axis. The second thickness may be smaller than the first thickness. In this case, since the second high-resistance region is positioned farther away from the first axis, the conduction area between the electrode and the semiconductor region can be increased. 
     A vertical cavity surface emitting laser according to an embodiment includes a post provided at a major surface of a substrate and extending along a first axis intersecting the major surface of the substrate, and an electrode provided at an upper surface of the post and surrounding the first axis. The post includes a first distributed Bragg reflector, an active layer, a current confinement layer, and a second distributed Bragg reflector. The substrate, the first distributed Bragg reflector, the active layer, the current confinement layer, and the second distributed Bragg reflector are disposed in order in a direction of the first axis. The second distributed Bragg reflector includes a semiconductor region and a high-resistance region surrounding the semiconductor region. The high-resistance region has an electrical resistance that is higher than an electrical resistance of the semiconductor region. The current confinement layer includes an aperture portion and an oxidized portion surrounding the aperture portion. The first axis passes through the semiconductor region and the aperture portion. In a direction orthogonal to the first axis, a distance between an inner edge of the oxidized portion and an inner edge of the high-resistance region is 3 μm or less. 
     According to the vertical cavity surface emitting laser, it is possible to reduce the distance between the inner edge of the oxidized portion and the inner edge of the high-resistance region in the direction orthogonal to the first axis. Since the high-resistance region absorbs light more easily than the semiconductor region, it is possible to absorb a transverse mode (particularly, a higher-order mode) generated at a position away from the first axis. The transverse mode increases a spectrum width of light emitted from the vertical cavity surface emitting laser. Therefore, according to the vertical cavity surface emitting laser, light having a smaller spectrum width can be emitted. 
     Details of Embodiments of the Present Disclosure 
     Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same reference numerals are used for the same or equivalent elements, and overlapping description will be omitted. In the drawings, XYZ coordinate axes are shown as necessary. X axis, Y axis, and Z axis intersect (for example, are orthogonal to) each other. 
       FIG.  1    is a schematic cross-sectional view of a vertical cavity surface emitting laser according to an embodiment.  FIG.  2    is an enlarged cross-sectional view of a portion of the vertical cavity surface emitting laser of  FIG.  1   .  FIG.  3    is a plan view of a portion of the vertical cavity surface emitting laser of  FIG.  1   . A vertical cavity surface emitting laser (VCSEL)  10  shown in  FIG.  1    emits a laser light L. A wavelength of laser light L may be 800 nm to 950 nm. 
     Vertical cavity surface emitting laser  10  includes a post PS provided on a major surface  12   a  of a substrate  12 , and an electrode  30  provided on an upper surface PSa of post PS. Post PS extends along a first axis Ax 1  intersecting major surface  12   a  of substrate  12 . The direction in which first axis Ax 1  extends coincides with the Z axis. Electrode  30  surrounds first axis Ax 1 . Electrode  30  is, for example, a ring-shaped electrode. 
     Substrate  12  has major surface  12   a  including a group III-V compound semiconductor. Substrate  12  may be a group III-V compound semiconductor substrate. Substrate  12  may be a substrate including a group III-V compound semiconductor layer and a base substrate. The group III-V compound semiconductor layer has major surface  12   a . The base substrate supports the group III-V compound semiconductor layer. The group III-V compound semiconductor includes, for example, GaAs. 
     Post PS includes a first distributed Bragg reflector  18 , an active layer  20 , a current confinement layer  26 , and a second distributed Bragg reflector  22 . Substrate  12 , first distributed Bragg reflector  18 , active layer  20 , current confinement layer  26 , and second distributed Bragg reflector  22  are disposed in order in a direction of first axis Ax 1 . 
     First distributed Bragg reflector  18  has a first conductivity type (for example, n-type) semiconductor stacked structure. The semiconductor stacked structure includes a semiconductor layer  18   a  and a semiconductor layer  18   b  alternately disposed in the direction of first axis Ax 1 . Semiconductor layer  18   a  and semiconductor layer  18   b  have different refractive indices. Semiconductor layer  18   a  has a lower refractive index than, for example, semiconductor layer  18   b . Each of semiconductor layer  18   a  and semiconductor layer  18   b  includes group III-V compound semiconductor such as AlGaAs. An example of an n-type dopant is silicon. 
     Active layer  20  has, for example, a multiple quantum well structure. The multi-quantum well structure may include GaAs layers (or AlGaAs layers) and AlGaAs layers alternately disposed along first axis Ax 1 . 
     Current confinement layer  26  includes an aperture portion  26   a  and an oxidized portion  26   b  surrounding aperture portion  26   a . First axis Ax 1  passes through aperture portion  26   a . Aperture portion  26   a  is a second conductivity-type (for example, p-type) semiconductor layer. Aperture portion  26   a  includes a group III-V compound semiconductor including aluminum as a group III element. Aperture portion  26   a  includes a group III-V compound semiconductor such as AlGaAs. Oxidized portion  26   b  includes aluminum oxide. An electrical resistance of aperture portion  26   a  is lower than an electrical resistance of oxidized portion  26   b.    
     Second distributed Bragg reflector  22  has a second conductivity type (for example, p-type) semiconductor stacked structure. The second conductivity type is a conductivity type opposite to the first conductivity type. The semiconductor stacked structure includes a semiconductor layer  22   a  and a semiconductor layer  22   b  alternately disposed in the direction of first axis Ax 1 . Semiconductor layer  22   a  and semiconductor layer  22   b  have different refractive indices. Semiconductor layer  22   a  has a lower refractive index than, for example, semiconductor layer  22   b . Each of semiconductor layer  22   a  and semiconductor layer  22   b  includes group III-V compound semiconductor such as AlGaAs. 
     A contact layer  29  of the second conductivity type (for example, p-type) may be provided on second distributed Bragg reflector  22 . Contact layer  29  has upper surface PSa of post PS. Contact layer  29  includes group III-V compound semiconductor such as AlGaAs. 
     A third distributed Bragg reflector  14  may be provided between substrate  12  and post PS. Third distributed Bragg reflector  14  has, for example, a first conductivity-type (for example, n-type) semiconductor stacked structure. The semiconductor stacked structure may have i-type. The semiconductor stacked structure includes a plurality of semiconductor layers alternately disposed in a direction of first axis Ax 1 . The plurality of semiconductor layers have different refractive indices. Each semiconductor layer includes group III-V compound semiconductor such as AlGaAs. 
     A contact layer  16  of the first conductivity type (for example, n-type) may be provided between third distributed Bragg reflector  14  and post PS. Contact layer  16  includes group III-V compound semiconductor such as AlGaAs. 
     Vertical cavity surface emitting laser  10  may include a semiconductor stacked structure LM provided on major surface  12   a  of substrate  12 . Third distributed Bragg reflector  14  and contact layer  16  are provided between substrate  12  and semiconductor stacked structure LM. Semiconductor stacked structure LM has the same layer structure as post PS. Semiconductor stacked structure LM and post PS are disposed in a direction (for example, the X axis) orthogonal to first axis Ax 1 . A trench TR surrounding post PS may be formed between semiconductor stacked structure LM and post PS. The bottom of trench TR reaches contact layer  16 . 
     An insulating layer  50  may be provided on semiconductor stacked structure LM, trench TR, and post PS. In upper surface PSa of post PS, insulating layer  50  has a first opening  50   a . Electrode  30  is provided in first opening  50   a . At the bottom of trench TR, insulating layer  50  has a second opening  50   b . An electrode  40  is provided in second opening  50   b.    
     Electrode  30  is in ohmic contact with upper surface PSa of post PS. A wiring  32  may be electrically connected to electrode  30 . Wiring  32  extends from upper surface PSa of post PS to semiconductor stacked structure LM beyond trench TR. 
     Electrode  40  is in ohmic contact with contact layer  16 . A wiring  42  may be electrically connected to electrode  40 . Wiring  42  extends from trench TR to semiconductor stacked structure LM. 
     Second distributed Bragg reflector  22  includes a semiconductor region SC and a high-resistance region HR. Semiconductor region SC includes semiconductor layer  22   a  and semiconductor layer  22   b . High-resistance region HR has a higher electrical resistance than semiconductor region SC. Each of high-resistance regions HR may include ions. Examples of ions include protons. High-resistance region HR includes crystal defects generated by ion implantation. High-resistance region HR may include the same semiconductor material as semiconductor region SC. First axis Ax 1  passes through the center of semiconductor region SC. The center of semiconductor region SC may be a center of gravity of a section shape of semiconductor region SC orthogonal to first axis Ax 1 . When the sectional shape of semiconductor region SC orthogonal to first axis Ax 1  includes an circular arc, the center of semiconductor region SC may be the center of the circular arc. High-resistance region HR surrounds semiconductor region SC and first axis Ax 1 . High-resistance region HR is, for example, a ring-shaped region. 
     High-resistance region HR may be formed in contact layer  29 . High-resistance region HR may be formed in a portion of current confinement layer  26 , semiconductor layer  22   b , active layer  20 , and first distributed Bragg reflector  18 . 
     As shown in  FIGS.  2  and  3   , high-resistance region HR has an inner edge HRE that is positioned farther away than an inner edge  30 E of electrode  30  from first axis Ax 1  in a direction (for example, the X-axis) orthogonal to first axis Ax 1 . Inner edge HRE may be in contact with semiconductor region SC. Oxidized portion  26   b  has an inner edge  26   b E located closer to first axis Ax 1  than inner edge  30 E of electrode  30  in a direction (for example, the X axis) orthogonal to first axis Ax 1 . Inner edge  26   b E may be in contact with aperture portion  26   a.    
     In a section (for example, an XY section) orthogonal to first axis Ax 1 , the longest line segment of line segments connecting any two points on inner edge  26   b E of oxidized portion  26   b  has a length D1. When inner edge  26   b E of oxidized portion  26   b  is a circle in the section orthogonal to first axis Ax 1 , length D1 is a diameter of the circle. Length D1 may be a maximum length of aperture portion  26   a  in a direction orthogonal to first axis Ax 1 . The value of length D1 may be from 4 μm to 7 μm. 
     In a section (for example, an XY section) orthogonal to first axis Ax 1 , the longest line segment of line segments connecting any two points on inner edge HRE of high-resistance region HR has a length D2. When inner edge HRE of high-resistance region HR is a circle in the section orthogonal to first axis Ax 1 , length D2 is a diameter of the circle. Length D2 may be the maximum length of semiconductor region SC in a direction orthogonal to first axis Ax 1 . The XY section having length D2 can be acquired at a position closest to current confinement layer  26  in the direction of first axis Ax 1 . The value of length D2 may be from 5 μm to 13 μm. 
     The value of D2/D1 may be greater than 1 and is 2.5 or less. The value of D2/D1 is the ratio of length D1 to length D2. The value of D2/D1 may be 1.1 or greater. The value of D2/D1 may be 2 or less. 
     A distance W 1  between inner edge  26   b E of oxidized portion  26   b  and inner edge HRE of high-resistance region HR in a direction (for example, the X-axis) orthogonal to first axis Ax 1  may be equal to a value of (D2−D1)/2. Distance W 1  may be a distance between a lower end of inner edge HRE of high-resistance region HR (a position closest to current confinement layer  26 ) and inner edge HRE of high-resistance region HR. Distance W 1  may be 3 μm or less, less than 3 μm, 2.5 μm or less, or 2.25 μm or less. Distance W 1  may be 0.5 μm or greater. 
     A distance W 2  between inner edge  30 E of electrode  30  and inner edge HRE of high-resistance region HR in a direction (for example, the X-axis) orthogonal to first axis Ax 1  may be equal to or less than distance W 1 . Distance W 2  may be 3 μm or less, less than 3 μm, 2.5 μm or less, or 2.25 μm or less. Distance W 2  may be 0.5 μm or greater. 
     According to vertical cavity surface emitting laser  10 , it is possible to reduce distance W 1  between inner edge  26   b E of oxidized portion  26   b  and inner edge HRE of high-resistance region HR in the direction (for example, the X-axis) orthogonal to first axis Ax 1 . Since high-resistance region HR absorbs light more easily than semiconductor region SC, high-resistance region HR can absorb a transverse mode (particularly, a higher-order mode) generated at a position away from first axis Ax 1  (a position farther from first axis Ax 1  than inner edge  26   b E). The transverse mode increases the spectrum width of laser light L emitted from vertical cavity surface emitting laser  10 . Therefore, according to vertical cavity surface emitting laser  10 , laser light L having a smaller spectrum width can be emitted. Further, when distance W 1  is small, the current is concentrated in the vicinity of aperture portion  26   a  by high-resistance region HR. 
     When the value of D2/D1 is 1.1 or greater, it is possible to prevent distance W 1  from becoming excessively small. Therefore, absorption of the fundamental mode generated at the position of first axis Ax 1  or at a position close to first axis Ax 1  by high-resistance region HR can be suppressed. 
     Hereinafter, various experiments performed to evaluate laser light emitted from a vertical cavity surface emitting laser will be described. The present disclosure is not limited to experiments described below. 
     In the first experiment and the second experiment, a vertical cavity surface emitting laser having the same configuration as post PS shown in  FIGS.  2  and  3    was prepared. In the first experiment, distance W 1  is 2.25 μm. Distance W 2  is 0.75 μm. The value of D1 is 5 μm. The value of D2 is 9.5 μm. The value of D2/D1 is 1.9. In the second experiment, distance W 1  is 6 μm. Distance W 2  is 3 μm. The value of D1 is 5 μm. The value of D2 is 17 μm. The value of D2/D1 is 3.4. 
     Spectra of laser light emitted by applying an 8 mA driving current to the vertical cavity surface emitting lasers of the first experiment and the second experiment were measured. The spectra were measured using an optical spectrum analyser with a resolution of 0.02 nm. 
       FIG.  4    is a graph showing a spectrum of light emitted from the vertical cavity surface emitting laser of the first experiment and the second experiment. The vertical axis in  FIG.  4    represents the level (relative intensity) of the emitted light. The horizontal axis represents wavelength (nm). A spectrum SP 1  represents a spectrum of laser light emitted from the vertical cavity surface emitting laser of the first experiment. An envelope E 1  connects the peaks of spectrum SP 1 . A spectrum SP 2  represents a spectrum of laser light emitted from the vertical cavity surface emitting laser of the second experiment. An envelope E 2  connects the peaks of spectrum SP 2 . As shown in  FIG.  4   , in spectrum SP 1 , the peak of the higher-order mode (peak in the vicinity of the wavelength 854 nm) is smaller than that in spectrum SP 2 . 
     A spectrum width Δλ RMS  was calculated from spectra SP 1  and SP 2  using the following Formula 1. λ i  represents the wavelength of each peak. Pi represents the intensity of each peak. P tot  represents the sum value of the intensities of all peaks. 
     
       
         
           
             
               
                 
                   
                     
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     Spectrum width Δλ RMS  of spectrum SP 1  was about 0.3 nm. Spectrum width Δλ RMS  of spectrum SP 2  was 0.4 nm. 
     Vertical cavity surface emitting lasers of the third experiment to the ninth experiment having the same configuration as that of the first experiment except that distances W 1  and W 2  were changed were prepared. 
     In the third experiment, distance W 1  is 1.25 μm. Distance W 2  is 0.25 μm. The value of D2 is 7.5 μm. The value of D2/D1 is 1.5. 
     In the fourth experiment, distance W 1  is 1.5 μm. Distance W 2  is 0.5 μm. The value of D2 is 8 μm. The value of D2/D1 is 1.6. 
     In the fifth experiment, distance W 1  is 1.75 μm. Distance W 2  is 0.25 μm. The value of D2 is 8.5 μm. The value of D2/D1 is 1.7. 
     In the sixth experiment, distance W 1  is 2 μm. Distance W 2  is 0.5 μm. The value of D2 is 9 μm. The value of D2/D1 is 1.8. 
     In the seventh experiment, distance W 1  is 2.5 μm. Distance W 2  is 1 μm. The value of D2 is 10 μm. The value of D2/D1 is 2.0. 
     In the eighth experiment, distance W 1  is 3 μm. Distance W 2  is 1.5 μm. The value of D2 is 11 μm. The value of D2/D1 is 2.2. 
     In the ninth experiment, distance W 1  is 4 μm. Distance W 2  is 1 μm. The value of D2 is 13 μm. The value of D2/D1 is 2.6. 
     For the vertical cavity surface emitting lasers of the third experiment to the ninth experiment, the spectrum width of the laser light was calculated in the same manner as in the first experiment and the second experiment. 
       FIG.  5    is a graph showing the relationship between distance W 1  and spectrum width in the first experiment to the ninth experiment. The horizontal axis in  FIG.  5    represents distance W 1  (μm). The vertical axis represents the spectrum width (nm). As shown in  FIG.  5   , it can be seen that the spectrum width decreases as distance W 1  decreases. In particular, when distance W 1  is less than 3 μm, the spectrum width is significantly reduced. In addition, when the value of D2/D1 is 2.5 or less, it can be seen that the spectrum bandwidth is reduced. 
       FIG.  6    is a plan view showing the post according to the first modification. Vertical cavity surface emitting laser  10  of  FIG.  1    may include a post PS 1  shown in  FIG.  6    instead of post PS. Post PS 1  has the same configuration as post PS except that the shape of a section orthogonal to first axis Ax 1  is different.  FIG.  6    shows an upper surface PS 1   a  of post PS 1 . However, electrode  30  and semiconductor region SC are omitted. Post PS 1  has a monoaxially symmetric shape in a section orthogonal to first axis Ax 1 , but may have an asymmetric shape. Post PS 1  may have an outer shape including an circular arc and a straight line connecting both ends of the circular arc in a section orthogonal to first axis Ax 1 . Inner edge HRE of high-resistance region HR may have a similar shape as a shape of post PS 1  in a section orthogonal to first axis Ax 1 . Inner edge  26   b E of oxidized portion  26   b  may have an asymmetric shape in a section orthogonal to first axis Ax 1 . Inner edge  26   b E of oxidized portion  26   b  may have a triangular shape with rounded corners. In a section orthogonal to first axis Ax 1 , the longest line segment of line segments connecting any two points on inner edge  26   b E of oxidized portion  26   b  has length D1. In the present modification, length D1 is, for example, a length along the Y-axis. In a section orthogonal to first axis Ax 1 , the longest line segment of line segments connecting any two points on inner edge HRE of high-resistance region HR has length D2. In the present modification, length D2 is, for example, a length along the Y-axis. The value of D2/D1 is greater than 1 and is 2.5 or less. 
     Even when vertical cavity surface emitting laser  10  includes post PS 1 , since distance W 1  can be reduced, laser light L having a smaller spectrum width may be emitted. 
       FIG.  7    is a sectional view showing the post according to the second modification. Vertical cavity surface emitting laser  10  of  FIG.  1    may include a post PS 2  shown in  FIG.  7    instead of post PS. Post PS 2  has the same configuration as that of vertical cavity surface emitting laser  10  except that a first high-resistance region HR 1  and a second high-resistance region HR 2  are provided instead of high-resistance region HR. 
     The electrical resistance of first high-resistance region HR 1  and the electrical resistance of second high-resistance region HR 2  are higher than the electrical resistance of semiconductor region SC. Each of first high-resistance region HR 1  and second high-resistance region HR 2  may include the same material as high-resistance region HR. First high-resistance region HR 1  and second high-resistance region HR 2  surround semiconductor region SC and first axis Ax 1 . First high-resistance region HR 1  and second high-resistance region HR 2  are, for example, ring-shaped regions. 
     Second high-resistance region HR 2  may be disposed between electrode  30  and first high-resistance region HR 1  in the direction of first axis Ax 1 . Second high-resistance region HR 2  is positioned closer to an upper surface PS 2   a  of post PS 2  than first high-resistance region HR 1 . Specifically, second high-resistance region HR 2  is formed at a shallower position than first high-resistance region HR 1  from upper surface PS 2   a . A lower surface of second high-resistance region HR 2  may be in contact with an upper surface of first high-resistance region HR 1 . 
     First high-resistance region HR 1  has an inner edge HR 1 E at the same position as inner edge  30 E of electrode  30  in a direction (for example, the X-axis) orthogonal to first axis Ax 1 . Inner edge HR 1 E may be in contact with semiconductor region SC. Second high-resistance region HR 2  has an inner edge HR 2 E that is positioned farther away than inner edge HR 1 E of first high-resistance region HR 1  from first axis Ax 1  in a direction (for example, the X-axis) orthogonal to first axis Ax 1 . Inner edge HR 2 E may be in contact with semiconductor region SC. 
     First high-resistance region HR 1  and second high-resistance region HR 2  respectively have a first thickness TH 1  and a second thickness TH 2  along the direction of first axis Ax 1 . Second thickness TH 2  is smaller than first thickness TH 1 . First thickness TH 1  is, for example, from 3 μm to 5 μm. Second thickness TH 2  is, for example, from 1 μm to 2 μm. 
     In a section (for example, an XY section) orthogonal to first axis Ax 1 , the longest line segment of line segments connecting any two points on inner edge HR 1 E of first high-resistance region HR 1  has length D2. The value of D2/D1 is greater than 1 and is 2.5 or less. Distance W 1  between inner edge  26   b E of oxidized portion  26   b  and inner edge HR 1 E of first high-resistance region HR 1  is the same as distance W 1  between inner edge  26   b E of oxidized portion  26   b  and inner edge HRE of high-resistance region HR. 
     Even when vertical cavity surface emitting laser  10  includes post PS 2 , distance W 1  may be reduced, and thus laser light L having a smaller spectrum width may be emitted. Further, since second high-resistance region HR 2  is positioned father away from first axis Ax 1 , the conduction area between electrode  30  and semiconductor region SC can be increased. 
     Although the preferred embodiments of the present disclosure have been described in detail, the present disclosure is not limited to the above embodiments. 
     It should be understood that the embodiments disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined not by the above description but by the claims, and is intended to include all modifications within the scope and meaning equivalent to the claims.