Patent Publication Number: US-2023138555-A1

Title: Plasma processing chamber with multilayer protective surface

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application claims the benefit of priority of U.S. Application No. 62/992,259, filed Mar. 20, 2020, which is incorporated herein by reference for all purposes. 
    
    
     BACKGROUND 
     The disclosure relates to a plasma processing chamber for forming semiconductor devices on a semiconductor wafer. 
     In the formation of semiconductor devices, plasma processing chambers are used to process the semiconductor devices. The plasma processes may deposit on or erode surfaces of the plasma processing chamber. 
     Ceramic coatings, such as yttria coatings may be used to protect components of the plasma processing chambers. However, such coatings are still damaged by plasma processing. 
     The background description provided here is for the purpose of generally presenting the context of the disclosure. Information described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure. 
     SUMMARY 
     To achieve the foregoing and in accordance with the purpose of the present disclosure, a plasma processing chamber is provided where the plasma processing chamber has a first component. A first plurality of multilayers is disposed over the first component, wherein each multilayer comprises a process layer and a conditioning layer adjacent to the process layer, wherein the process layer is more etch resistant to a processing plasma than the conditioning layer and wherein the conditioning layer is configured to be selectively etched with respect to the process layer; and wherein the process layer is configured to be selectively etched with respect to the conditioning layer. 
     In another manifestation, a component for use in a plasma processing chamber is provided with a component body. A first plurality of multilayers is disposed over the component body, wherein each multilayer comprises a process layer and a conditioning layer adjacent to the process layer, wherein the process layer is more etch resistant to a processing plasma than the conditioning layer and wherein the conditioning layer is configured to be selectively etched with respect to the process layer; and wherein the process layer is configured to be selectively etched with respect to the conditioning layer. 
     In another manifestation, a method of using a first component is provided, where the first component has a first plurality of multilayers disposed over the first component, wherein each multilayer comprises a process layer made of an etch-resistant material, wherein the etch-resistant material does not form a contaminant during plasma processing and a conditioning layer disposed adjacent to the process layer, wherein the conditioning layer is configured to be selectively etched with respect to the process layer and wherein the process layer is configured to be selectively etched with respect to the conditioning layer. The component is used in a plasma processing chamber to process a plurality of wafers in the plasma processing chamber. An exposed process layer is selectively removed with respect to the conditioning layer. An exposed conditioning layer is selectively removed with respect to a process layer. 
     These and other features of the present disclosure will be described in more detail below in the detailed description of the disclosure and in conjunction with the following figures. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which: 
         FIG.  1    is a flow chart of an embodiment. 
         FIGS.  2 A-E  are schematic cross-sectional views of a section of a component of a plasma processing chamber processed according to an embodiment. 
         FIG.  3    is a schematic view of a plasma processing chamber that may employ an embodiment. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The present disclosure will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art, that the present disclosure may be practiced without some or all of these specific details. In other instances, well-known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present disclosure. 
     During the processing of semiconductor devices, a plasma processing chamber may be used for plasma deposition, plasma etching, or for other processes used in manufacturing semiconductor devices. Such plasma processing may deposit on and/or etch surfaces of the plasma processing chamber. Components of the plasma processing chambers have surfaces used to maintain the plasma environment. Such components may be aluminum to provide electrical and thermal characteristics that are useful in maintaining the plasma. Aluminum also allows a reduction in weight and cost. A coating on the surface of the aluminum is needed to protect the aluminum surface. To minimize defects, depositions on the plasma processing chamber surfaces must be removed and surfaces that are etched may need to be replaced or reconditioned. 
       FIG.  1    is a flow chart of an embodiment. A component body is provided (step  104 ). In an example,  FIG.  2 A  is a cross-sectional schematic view of a section of a component body  204  of a component  206 . In this example, the component body  204  is made of aluminum (Al). In other embodiments, the component body  204  is made of some form of an aluminum oxide or a ceramic, such as alumina. The component body  204  has a surface  208  that is uncoated. The component body  204  may form gas injectors, showerheads, gas weldment assemblies, transformer coupled plasma windows, electrodes, or chamber liners. 
     A plurality of multilayers is deposited using a cyclical process (step  108 ). The cyclical process includes a plurality of cycles, where each cycle comprises depositing a multilayer. The multilayer can have multiple layers. In this embodiment, each multilayer includes a process layer and a conditioning layer, and each cycle comprises sequentially depositing the process layer (step  112 ) and depositing the conditioning layer on the process layer (step  116 ). In this embodiment, each of the plurality of multilayers is a bilayer with a process layer of yttrium oxide (Y 2 O 3 ) and a conditioning layer of SiO 2 . In other embodiments, the conditioning layer may be zirconium dioxide (ZrO 2 ). In this embodiment, eight bilayers, each including the process layer and the conditioning layer, are deposited. The process layer and the conditioning layer are deposited using a chemical vapor deposition (CVD) process. In other embodiments, the process layer and the conditioning layer are deposited using at least one of a chemical vapor deposition (CVD) process, an atomic layer deposition (ALD) process, an aerosol deposition (AD) process, a plasma-enhanced physical vapor deposition (PEPVD) process, a thermal spray process, or a physical vapor deposition (PVD) process. 
       FIG.  2 B  is a cross-sectional view of the component body  204  of the component  206  on which eight bilayers have been deposited. The bilayers have been deposited on the surface  208  of the component body  204 . Each bilayer comprises a process layer  216  of Y 2 O 3  and a conditioning layer  220  of SiO 2 . In other words, sixteen (16) alternating or interleaving process layers  216  and conditing layers  220  are formed. An additional process layer  222  is deposited over the bilayers, so that a process layer  216  is exposed during the processing of a wafer. The process layers  216  and conditioning layers  220  are not drawn to scale in order to better illustrate the different layers. In this example, the process layers  216  are shown as thicker than the conditioning layers  220 . In other embodiments, the process layers  216  may be thinner than the conditioning layers  220 . 
     In other embodiments, the process layers  216  and/or the conditioning layers  220  may be deposited or formed with one or more interlayer materials sandwiched in between such that a multilayer may be made up of more than just two material layers. 
     In other embodiments, the process layers  216  and/or the conditioning layers  220  may be uniquely patterned onto a localized surface region of the component body  204  during the depositing or forming of the process layer  216  and/or the conditioning layers  220 . The localized patterning provides more protection in specific areas that need more protection and less or no protection in specific areas that need less protection. The localized patterning can yield superior tunability within the chamber processing environment condition (i.e., more robust plasma erosion from sputtering or plasma-assisted chemical conversion characteristics of the surface). The plurality of multilayers provides a selectively resistant coating around high bias regions where ion sputtering occurs near coils. Localize patterning means the placement of the protective coating in one area but not in another area. As a result, regions of the component body  204  that are subjected to more plasma erosion are provided with more protection. In an example, high bias regions near coils may be subjected to higher plasma erosion. Therefore, more multilayer coatings are provided for such regions. 
     The component is mounted and used in a plasma processing chamber (step  124 ).  FIG.  3    is a schematic view of a plasma processing chamber in which the component may be installed. In one or more embodiments, the plasma processing system  300  comprises a gas distribution plate  306  providing a gas inlet and an electrostatic chuck (ESC)  308 , within a plasma processing chamber  309 , enclosed by a chamber wall  350 . Within the plasma processing chamber  309 , a substrate  307  is positioned on top of the ESC  308 . The ESC  308  may provide a bias from the ESC source  348 . A gas source  310  is connected to the plasma processing chamber  309  through the gas distribution plate  306 . An ESC temperature controller  351  is connected to the ESC  308  and provides temperature control of the ESC  308 . In this example, a first connection  313  provides power to an inner heater  311  for heating an inner zone of the ESC  308 . A second connection  314  provides power to an outer heater  312  for heating an outer zone of the ESC  308 . An RF source  330  provides RF power to a lower electrode  334  and an upper electrode. In this embodiment, the upper electrode is the gas distribution plate  306  and is grounded. The lower electrode is the ESC  308 . In a preferred embodiment, 13.56 (megahertz (MHz), 2 MHz, 60 MHz, and/or optionally, 27 MHz power sources make up the RF source  330  and the ESC source  348 . A controller  335  is controllably connected to the RF source  330 , the ESC source  348 , an exhaust pump  320 , and the gas source  310 . A high flow liner  360  is a liner within the plasma processing chamber  309 . The high flow liner  360  confines gas from the gas source and has slots  362 . The slots  362  maintain a controlled flow of gas to pass from the gas source  310  to the exhaust pump  320 . An example of such a plasma processing chamber is the Exelan Flex™ etch system manufactured by Lam Research Corporation of Fremont, Calif. The process chamber can be a CCP (capacitively coupled plasma) reactor or an ICP (inductively coupled plasma) reactor. In this embodiment, the gas distribution plate  306  and/or the high flow liner  360  may be the component body  204  with the coatings. A sensor  367  is positioned to measure part of the high flow liner  360 . In some embodiments, the sensor  367  is a trace detector that is able to measure a tracer etched from the high flow liner  360 . In other embodiments, the sensor  367  is an optical sensor that optically measures a portion of the high flow liner  360 . 
     The plasma processing chamber  309  is used to plasma process the substrate  307 . The plasma processing may be one or more processes of etching, depositing, passivating, or another plasma process. The plasma processing may also be performed in combination with nonplasma processing. Such processes may form byproduct deposits on the exposed process layer  216  and/or may erode material from the exposed process layer  216  and/or may affect the exposed process layer  216  in other ways.  FIG.  2 C  is a cross-sectional view of the component body  204  and alternating process layers  216  and conditioning layers  220  after a plurality of substrates  307  have been processed. Eroded regions  224  of the exposed process layer  216  are created when the plasma etches away or reacts with part of the exposed process layer  216 . Deposits  228  may also be formed on top of the exposed process layer  216 , during the plasma processing. 
     After several substrates are processed, the plasma processing chamber  309  is conditioned to improve uniformity and reduce defects. As part of the conditioning, the exposed process layer  216  is removed (step  128 ), which in turn exposes the next underlying conditioning layer  220 . An example of a recipe for selectively removing the exposed process layer such as Y 2 O 3  with respect to SiO 2  or ZrO 2  uses a wet clean process to selectively remove the top process layer  216  with respect to the conditioning layer  220 . In this embodiment, a wet etch provides infinite selectivity of removing the process layer  216  with respect to the conditioning layer  220 . In other words, the process layer  216  can be selectively removed while the conditioning layer  220  remains mostly intact. Inorganic acids such as hydrochloric acid (HCL), nitric acid (HNO 3 ), or sulfuric acid (H 2 SO 4 ) may be used to selectively remove the process layer  216  with respect to the conditioning layer  220 . 
       FIG.  2 D  is a cross-sectional view of the component body  204  after the exposed process layer  216  (shown in  FIG.  2 C ) along with the eroded regions  224  (shown in  FIG.  2 C ) and the deposits  228  (shown in  FIG.  2 C ) have been removed, exposing the next underlying conditioning layer  220 . 
     The exposed conditioning layer  220  is then selectively removed with respect to the process layer  216  (step  132 ). In other words, the exposed conditioning layer  220  is now removed while the process layer  216  remains mostly intact. An example of a recipe to selectively remove the exposed conditioning layer  220  uses a wet etch that selectively etches the conditioning layer  220  with respect to the process layer  216 . Hydrofluoric acid is used to selectively etch a conditioning layer  220  of SiO 2  or ZrO 2  without etching a process layer  216  of Y 2 O 3 . If a conditioning layer  220  of silicon is used with a process layer  216  of Y 2 O 3 , then potassium hydroxide may be used to selectively etch the conditioning layer  220  with respect to the process layer  216 . 
       FIG.  2 E  is a cross-sectional view of the component body  204  after the exposed conditioning layer  220  (shown in  FIG.  2 D ) has been removed, exposing the next underlying process layer  216 . The fresh unetched and clean exposed process layer  216  is used for processing subsequent wafers allowing for a decrease in defects and an increase in uniformity. The process is then looped back to the step of using the component in the plasma processing chamber (step  124 ). The steps of using the component in the plasma processing chamber (step  124 ) to process a plurality of wafers, selectively removing the process layer (step  128 ), and then selectively removing the conditioning layer (step  132 ) may be performed for a plurality of cycles. In this embodiment, the process may be repeated for seven cycles. 
     After all or a predetermined number of the multilayers are removed or consumed, remedial action(s), such as replacement or reconditioning, may be taken with respect to the component  206 . For example, the component  206  may be reconditioned by depositing another plurality of multilayers on the component body  204 . 
     This embodiment reduces the frequency of recoating. In this embodiment, the surface  208  of the component body  204  may be cleaned and/or reconditioned with minimal downtime. The reconditioning is provided by two stripping steps with one strip step stripping the process layer  216  and one strip step stripping the conditioning layer  220 . The two stripping steps may be wet stripping steps. If thick depositions of contaminants are deposited on the process layer  216 , both the process layer  216  and the conditioning layer  220  can be stripped to remove such depositions. This embodiment provides a protective surface for extending the life of a component  206 . By encapsulating the conditioning layer  220  with a process layer  216 , the conditioning layer  220  is protected from plasma. 
     In various embodiments, the process layer  216  is of a material that will not contaminate semiconductor processing of the semiconductor devices. In addition, the process layer  216  material is an etch-resistant material that is resistant to the plasma processing. An etch-resistant material is defined as a material where less than 1 nm of the etch-resistant material is etched during the plasma processing. 
     In various embodiments, each individual process layer  216  has a thickness of between 0.10 nm and 5 microns. In addition, each process layer  216  does not form or generate a contaminant that would interfere with the plasma processing. A contaminant may interfere with the plasma processing by either making the plasma processing less uniform or by contaminating the resulting device so that the resulting device has less desirable properties. In various embodiments, the process layers  216  comprise at least one of inorganic oxide, nitride, inorganic fluoride, or inorganic oxyfluoride. 
     In various embodiments, the etch-resistant material comprises at least one of a metal oxide, nitride, metal fluoride, or metal oxyfluoride. In various embodiments, the process layer  216  is a layer comprising at least one of a rare earth metal oxide or rare-earth oxyfluoride, or rare-earth fluoride. These can include cerium oxide (CeO 2 ), yttrium oxide (Y 2 O 3 ), samarium oxide (Sm 2 O 3 ), yttrium oxyfluoride (YOF), yttrium fluoride (YF 3 ), yttria-alumina composites, (YAG or Y 3 Al 5 O 12 ), doped composites, crystalline alumina, yttrium-aluminum-perovskite (YAP), yttrium aluminum monoclinic (YAM or Y 4 Al 2 O 9 ), aluminum yttria composite, aluminum oxide (Al 2 O 3 ), aluminum oxyfluorides, or erbium oxide (Er 2 O 3 ). 
     In various embodiments, the process layer  216  may be a mixture of the above materials and provide a transition gradient from one material to another in order to provide transition properties. Such a process layer  216  may be a mixture of two different materials mixed together such as aluminum oxide and yttrium oxide to make a composite film. The process layer  216  may have a transition gradient from aluminum oxide to yttrium oxide by weight percent. The transient gradient may be used to modulate plasma resistance and chemical reactivity of the film. 
     The conditioning layer  220  is formed from a conditioning material that can be selectively etched with respect to the process layer  216  and, conversely, the process layer  216  can be selectively etched with respect to the conditioning layer  220 . In various embodiments, the conditioning layer may be SiO 2 , silicon (Si), silicon nitride (SiN), zirconium oxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), titanium oxide, tantalum oxide, hafnium oxide, yttrium fluoride (YF 3 ), yttrium oxyfluoride (YOF), hafnium dioxide (HfO 2 ), titanium dioxide (TiO 2 ), tantalum pentoxide (Ta 2 O 5 ), silicon (Si), silicon nitride (Si 3 N 4 ), or a metal nitride, such as titanium nitride (TiN) and tantalum nitride (TaN). 
     In other embodiments, a conditioning layer  220  may be first deposited on the component body  204  followed by a process layer  216 . By depositing a conditioning layer first, a process layer  216  will be on the top of the multilayers. 
     In other embodiments, the multilayers may be trilayers comprising a process layer, a conditioning layer, and an additional layer. For example, a trilayer of aluminum oxide, zirconium oxide, and yttrium oxide may be used. In some embodiments, there may be at least sixteen multiple layers. 
     In other embodiments, the component may be a ceramic component or may be made of another mixed composite material. In various embodiments, 3D printing (or additive manufacturing) alongside patterning may be used to deposit either or both the process layer  216  or conditioning layer  220 . 3D printing provides precision films without requiring subsequent machining or patterning steps. 
     In various embodiments, an anneal may be used to further condition the process layers  216  and/or the conditioning layers  220 . Thermal treatment, such as sintering or annealing, may help reduce stress from different coefficients of expansion or change the process layers  216  to make the process layers  216  more etch resistant. In other embodiments, the process layers  216  and/or conditioning layers  220  are densified. Densifying reduces the inherent porosity of the film and relieves stress. Densifying improves etch selectivity. 
     In various embodiments, a detector tracer compound may be provided to detect exposure of the conditioning layer  220  or the process layer  216  or one of the underlayers. The tracer, as will be described below, may be applied as a coating or may be mixed into the materials used to deposit the conditioning layer  220  or process layer  216 . A sensor  367 , such as an optical sensor, would be used to determine when the process layer  216  or the conditioning layer  220  needs to be removed or when the component needs to be reconditioned. In various embodiment, different process layers  216  may be made from different materials, and/or different conditioning layers  220  may be made from different materials. The optical sensor may comprise a laser system that measures displacement or reflectance. 
     In one embodiment, each multilayer or group of multilayers is associated with a corresponding detector tracer. Tracers can include chemical compounds, dyes, isotopes, particles, ions, impurities with unique elemental signatures that distinguish a layer from another within the film stack. In such embodiments, the sensor  367  is a tracer detector, that is able to detect a specific detector tracer. In some embodiments, the tracer detector is a spectrometer, profilometer, optical laser, interferometer, X-ray spectrometer, or reflectometer. By detecting and identifying the specific detector tracer, the corresponding multilayer or group of multilayers can be identified and appropriate action(s) can be taken. For example, if the last multilayer or group of multilayers is identified, reconditioning of the component can be initiated. Different tracers may be added to a different component to indicate which component needs conditioning. 
     In another embodiment, a plasma processing chamber may have different components with different multilayers of process layers  216  and conditioning layers  220 . Such a plasma processing chamber may have a first component and a second component. For example, the first component may be an edge ring and the second component may be a liner. In this embodiment, the first component has a first subset of one or more of a first plurality of multiple layers of process layers and conditioning layers forming a coating on a surface of the first component. The second component has a second subset of one or more of a second plurality of multiple layers of process layers and conditioning layers forming a coating on a surface of the second component. In some embodiments, the conditioning layers of the first subset comprise different materials than the conditioning layers of the second subset. In some embodiments, the process layers of the first subset comprise different materials than the process layers of the second subset. Since the conditioning layer over the first component is of a different material than the conditioning layer of the second component, the sensor  367  is able to distinguish whether the conditioning layer from the first component or the second component is exposed. The sensor  367  is able to distinguish different conditioning layers  220  and thus determine which component has a process layer  216  that has been etched through. 
     In some embodiments, when the sensor  367  indicates that a conditioning layer  220  of the first component is exposed, a first remedial action is taken. In an embodiment, the first remedial action is a conditioning of the first component. In an embodiment, the conditioning of the first component would be to remove the exposed conditioning layer thereby revealing a new unprocessed coating underlayer from multiple layers on a surface of the first component. In another embodiment, the conditioning of the first component is the removal and replacement of the first component with a new first component with a plurality of multilayer components. 
     In some embodiments, when the sensor  367  indicates that a conditioning layer  220  of the second component is exposed a second remedial action is taken. In an embodiment, the second remedial action is a conditioning of the second component. In an embodiment, the conditioning of the second component would be to remove the exposed conditioning layer thereby revealing a new coating from multiple layers on a surface of the second component. In another embodiment, the conditioning of the second component is the removal and replacement of the second component with a new second component with a plurality of multilayer components. 
     In an example, a conditioning layer closest to the first component has a first tracer. A conditioning layer closest to the second component has a second tracer that is different than the first tracer. In such an example, when the sensor  367  senses the first tracer, this indicates that the conditioning layer closest to the first component is exposed to plasma, indicating that the first component needs remedial action. In an embodiment, where the conditioning layer closest to the first component is exposed, the remedial action may be removing the conditioning layer and forming multiple alternating layers of conditioning layers and process layers on the surface of the first component. When the sensor  367  senses the second tracer, this indicates that the conditioning layer closest to the second component is exposed to plasma, indicating that the second component needs remedial action. In an embodiment, where the conditioning layer closest to the second component is exposed, the remedial action may be removing the conditioning layer and forming multiple alternating layers of conditioning layers and process layers on the surface of the second component. 
     In various embodiments, the component may be one or more of a confinement ring, an edge ring, a pinnacle, an electrostatic chuck, an electrode, a ground ring, a chamber liner, and a door liner of a plasma processing chamber. In some embodiments, other semiconductor processing chambers may be used. Some semiconductor processing chambers may be inductively coupled or capacitively coupled or may be a system that uses both inductive coupling and capacitive coupling. Some inductively coupled semiconductor processing chambers have power windows through which inductively coupled power passes. In some embodiments, the semiconductor processing chamber may be used to process the bevel of a semiconductor wafer. 
     While this disclosure has been described in terms of several preferred embodiments, there are alterations, modifications, permutations, and various substitute equivalents, which fall within the scope of this disclosure. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present disclosure. It is therefore intended that the following appended claims be interpreted as including all such alterations, modifications, permutations, and various substitute equivalents as fall within the true spirit and scope of the present disclosure.