Patent Publication Number: US-2023139967-A1

Title: Image sensor, image acquisition apparatus, and electronic apparatus including the image acquisition apparatus

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application is based on and claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2021-0145863, filed on Oct. 28, 2021, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety. 
     BACKGROUND 
     1. Field 
     The disclosure relates to image sensors, image acquisition apparatuses, and electronic apparatuses including the image acquisition apparatuses. 
     2. Description of the Related Art 
     Image sensors receive light incident thereon from an object and photoelectrically convert the received light into an electrical signal. 
     The image sensors use a color filter including an array of filter elements capable of selectively transmitting red light, green light, and blue light for color expression, sense the amount of light that passed through each filter element, and then form a color image of an object through image processing. 
     Characteristics of the image sensors such as resolution, frame rate, low light imaging, and high dynamic range (hereinafter, referred to as HDR) have been gradually improved. In order to simultaneously improve the HDR and frame rate, a new imaging method has been proposed, and recently, an image sensor to which photon counting imaging technology is applied has been developed. 
     Photon counting imaging uses a fast photodiode, for example, a single photon avalanche diode (hereinafter, referred to as SPAD), to count the number of photons incident on a pixel for a certain period of time on a time axis, measures the amount of light for each pixel, and generates a two-dimensional image. 
     SUMMARY 
     Provided are image sensors, image acquisition apparatuses, and electronic apparatuses including the image acquisition apparatuses. 
     Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented example embodiments of the disclosure. 
     According to an aspect of an example embodiment, an image sensor includes a plurality of pixels, each pixel includes: a photodiode; a pulse generator configured to generate a pulse signal based on an electric signal generated according to a photon incident on the photodiode; and a counter configured to count a number of pulse signals generated by the pulse generator, wherein a period of the pulse signal is modulated according to an ambient illuminance of the image sensor. 
     The photodiode may include a single photon avalanche diode (SPAD). 
     Based on the ambient illuminance being greater than or equal to a threshold value, the period of the pulse signal may be increased by a predetermined length. 
     Based on a value counted by the counter being greater than or equal to a threshold value, the period of the pulse signal may be increased by a predetermined length. 
     According to an aspect of an example embodiment, an image acquisition apparatus includes: a pixel array including a plurality of pixels; pulse generators which are respectively connected to the pixels, each of the pulse generators being configured to generate a pulse signal based on an electric signal generated according to photons incident on the pixels; counters which are respectively connected to the pulse generators, each of the counters being configured to count and output a number of pulse signals generated by a respective pulse generator; and an image sensor controller configured to: generate an image signal based on an output value of each of the counters, and control the pulse generators to modulate a period of the pulse signal according to an ambient illuminance. 
     The image sensor controller may be further configured to control the pulse generators to increase the period of the pulse signal by a predetermined length, based on the output value of a respective counter being greater than or equal to a threshold value. 
     The image acquisition may further include an illuminance sensor configured to detect the ambient illuminance, and the image sensor controller may be further configured to control the pulse generators to increase the period of the pulse signal by a predetermined length, based on an illuminance value detected by the illuminance sensor being greater than or equal to a threshold value. 
     The image sensor controller may be further configured to divide a frame for generating the image signal, into a plurality of sub-frames. 
     The image sensor controller may be further configured to compare an output value of a respective counter for each of the sub-frames with a capacity of the respective counter, and control the pulse generators to modulate the period of the pulse signal according to a result of the comparison. 
     The image sensor controller may be further configured to, based on an output value a respective counter for a first sub-frame being greater than a capacity of the counter, control the pulse generators to increase a period of the pulse signal for a second sub-frame by a first time. 
     The image sensor controller may be further configured to, based on an output value of the counter for the second sub-frame being greater than the capacity of the counter, increase a period of the pulse signal for a third sub-frame by a second time that is greater than the first time. 
     The image sensor controller may be further configured to, based on an output value of the counter for the third sub-frame being less than the capacity of the counter, generate the image signal based on the output value of the counter for each of the first sub-frame, the second sub-frame and the third sub-frame and the period of the pulse signal for each of the first sub-frame, the second sub-frame and the third sub-frames. 
     The pixel may be a single photon avalanche diode (SPAD). 
     The image sensor controller may be further configured to: divide one frame into a plurality of sub-frames; and sequentially perform a photon counting operation for each of the plurality of sub-frames. 
     The image sensor controller may be further configured to control the pulse generators to sequentially modulate the period of the pulse signal for each of plurality of the sub-frames. 
     The photon counting operation may be performed up to a sub-frame in which the output value of the counter does not exceed a capacity of the counter, among the plurality of sub-frames. 
     A first period of the pulse signals in a first sub-frame may be equal to a second period of the pulse signals in a second sub-frame. 
     A first period of the pulse signal in a first sub-frame may be different from a second period of the pulse signals in a second sub-frame. 
     The pixel array, the pulse generators, and the counters may be arranged in the pixels, and the image sensor controller may be arranged outside the pixels. 
     According to an aspect of the disclosure, an electronic apparatus includes the image acquisition apparatus. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The above and other aspects, features, and advantages of certain example embodiments of the disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which: 
         FIG.  1    is a schematic block diagram of an image acquisition apparatus according to an example embodiment; 
         FIG.  2    is a detailed block diagram of an image sensor shown in  FIG.  1   ; 
         FIG.  3    is a circuit diagram of the image sensor shown in  FIG.  2   ; 
         FIG.  4    is a diagram illustrating a pixel structure of an image sensor according to the related art; 
         FIG.  5    is a diagram illustrating a modulation of a period of a pulse signal of an image sensor, according to another example embodiment; 
         FIG.  6    is a diagram illustrating a modulation of a period of a pulse signal of an image sensor, according to another example embodiment; 
         FIG.  7    is a schematic block diagram of an image acquisition apparatus according to another example embodiment; 
         FIG.  8    is a flowchart of a method of modulating a period of a pulse signal of an image signal, according to another example embodiment; 
         FIG.  9    is a flowchart of a method of modulating a period of a pulse signal of an image signal, according to another example embodiment; 
         FIG.  10    is a block diagram of a schematic structure of an electronic apparatus according to another example embodiment; 
         FIG.  11    is a block diagram schematically illustrating a camera module included in the electronic apparatus of  FIG.  10   ; and 
         FIGS.  12  to  21    are views illustrating various examples of an electronic apparatus including an image acquisition apparatus according to an example embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Reference will now be made in detail to example embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. In this regard, the example embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein. Accordingly, the example embodiments are merely described below, by referring to the figures, to explain aspects. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. 
     Hereinafter, example embodiments will be described in detail with reference to the accompanying drawings. The example embodiments described below are only examples, and thus, it should be understood that the example embodiments may be modified in various forms. In the drawings, like reference numerals refer to like elements throughout, and the sizes of elements may be exaggerated for clarity. 
     In the following description, when an element is referred to as being “above” or “on” another element, it may be directly on the other element while making contact with the other element or may be above the other element without making contact with the other element. 
     Although terms such as “first” and “second” are used to describe various elements, these terms are only used to distinguish one element from another element. These terms do not limit elements to having different materials or structures. 
     As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. In addition, it will be understood that when a unit is referred to as “comprising” another element, it does not preclude the possibility that one or more other elements may exist or may be added. 
     In the disclosure, terms such as “unit” or “module” may be used to denote a unit that has at least one function or operation and is implemented with hardware, software, or a combination of hardware and software. 
     An element referred to with the definite article or a demonstrative pronoun may be construed as the element or the elements even though it has a singular form. 
     Operations of a method may be performed in an appropriate order unless explicitly described in terms of order or described to the contrary. In addition, examples or exemplary terms (for example, “such as” and “etc.”) are used for the purpose of description and are not intended to limit the scope of the disclosure unless defined by the claims. 
     In an example embodiment, a single photon avalanche diode (SPAD) refers to a next-generation semiconductor light device with extremely high efficiency to the extent that a single photon is detected, due to very high gain characteristics of the device. In the SPAD, when a voltage greater than a breakdown voltage of the device is applied, carriers may be accelerated according to a very large electric field, causing a strong collision with an atom, and thus, an impact ionization phenomenon may occur in which electrons bound to the atom are released and the number of free electrons rapidly increases. This is referred to as an avalanche multiplication, and due to this effect, the number of free electrons created due to photons irradiated to an image sensor from the outside significantly increases. In other words, even when a surrounding environment is very dark or light is irradiated from very far away, and a very small level of photons enters, it may be recognized as if a very large number of photons entered, by amplifying the photons. 
     In photon counting imaging, a two-dimensional image may be implemented by counting the number of photons incident on a pixel during a certain period of time by using an SPAD, and measuring an amount of light per pixel. 
     In a related-art image sensor, a two-dimensional image is generated by accumulating, in floating diffusion, photons incident on the image sensor during a certain period of time, and transmitting the voltage change to an external readout circuit. On the other hand, in an image sensor using photon counting, a conversion into digital information may be performed in a pixel unit. 
     A pixel for photon counting imaging may include a high-speed photodiode, a pulse generator, and a counter circuit. Each pixel individually operates independently, and when a photon is incident on the pixel, a flow of current occurs in the high-speed photodiode, and a digital pulse is output from the pulse generator. The number of pulses of the digital pulse are continuously accumulated in a counter at a rear end. Accordingly, when the output pulses are counted within a given time, a digital value proportional to an amount of photons may be obtained, and thus, a two-dimensional image may be generated. The photon counting imaging has an advantage in that a high-speed shooting and a high dynamic range (HDR) compared to existing image sensors may be implemented, and that a dynamic range greater than or equal to 120 dB may be implemented. However, the number of pulses changes significantly according to an illuminance, and thus, it is difficult to select a size of the counter. In other words, the number of pulses decreases in a small illuminance, and the number of pulses increases in a high illuminance, and thus, a counter having a large memory is necessary for normal operation. 
     In an example embodiment, even when the counter in a pixel has a fixed capacity or fixed size, a pulse period may be modulated according to an ambient illuminance so that a value greater than the size of the counter may be counted even in a high illuminance. In addition, a pulse period of each sub-frame may be sequentially modulated so that a size of the pixel may be reduced and a frame rate may be improved. 
     In an example embodiment, the term “pixel” is used to refer to only a photodiode that receives light, or components or direct circuits implemented in the pixel. For example, the “pixel” may be used to collectively refer to a photodiode, a pulse generator, and a counter that implement one pixel. 
     In an example embodiment, the term “image sensor” is used to refer to a photoelectric conversion device that detects light and converts the detected light into an electric signal. Thus, the “image sensor” is used to refer to a pixel, a pixel array, or a pixel and a pixel circuit together. 
       FIG.  1    is a schematic block diagram of an image acquisition apparatus  100  according to an example embodiment. 
     Referring to  FIG.  1   , the image acquisition apparatus  100  may include a pixel array  200  and an image sensor controller  300 . 
     According to an example embodiment, a plurality of pixels  210  may be arranged in the pixel array  200 . The pixel array may be an M×N matrix, where M and N are greater than or equal 1. Each of the pixels  210  may be independently operated. According to an example embodiment, the image acquisition apparatus  100  may include peripheral circuits, a vertical scan circuit, a horizontal scan circuit, a reading circuit, an output circuit, and a control circuit. However, the disclosure is not limited thereto, and as such, other circuits and functionalities may be provided. The plurality of pixels  210  and the peripheral circuits may be arranged on different layers from each other. For example, a layer on which the plurality of pixels  210  are arranged may be stacked on a chip layer of a readout circuit. In an example embodiment, the pixel  210  includes an SPAD and counts a single photon, and thus may have low noise and an HDR. 
     Each of the pixels  210  may include a photodiode, a pulse generator, and a counter. In an example embodiment, the pulse generator may generate a pulse signal based on an electric signal generated according to photons incident on the photodiode. In an example embodiment, in the pulse generator, a period of the pulse signal may be modulated according to an ambient illuminance. For example, when the ambient illuminance is high, the period of the pulse signal may be increased. The counter may count and output the number of pulse signals output from the pulse generator. A structure and detailed operation of the pixel  210  are described below, with reference to  FIGS.  2  and  3   . 
     The image sensor controller  300  may generate an image signal by using an output value output from the pixel array  200 . Here, the output value may include a counting value of a counter of each pixel and a period of a pulse signal. The image sensor controller  300  may control the pulse generator of the pixel  210  according to an ambient illuminance to modulate the period of the pulse signal. For example, when an ambient illuminance value is a threshold value or greater, a predetermined period of the pulse signal may be increased by a certain time. Here, the certain time may be a value that may be arbitrarily determined, and may be a value determined differently according to an ambient illuminance. For instance, according to an example embodiment, the ambient illuminance value may be a magnitude of an amount of incident light. In addition, when a counting value output from the pixel array  200  is a threshold value or greater, the image sensor controller  300  may increase the period of the pulse signal of the pulse generator. 
     In order to generate an image signal, the image sensor controller  300  may divide one frame period into a plurality of sub-frame periods. In addition, an output value of the counter for each sub-frame time may be compared with the capacity of the counter, so that the period of the pulse signal may be modulated according to a result of the comparison. In addition, the image sensor controller  300  may compare the output value of the counter with the capacity of the counter and sequentially increase the period of the pulse signal for the sub-frame. The capacity of the counter is a value that may be determined according to the number of bits of the counter. Here, pulse periods of the same sub-frame are equal to each other, but may be different between pulse periods for different sub-frames. 
       FIG.  2    is a detailed block diagram of pixel  210  shown in  FIG.  1   . 
     Referring to  FIG.  2   , the pixel  210  may include a photodiode  211 , a pulse generator  212 , and a counter  213 . The pixel  210  may sense an amount of light by counting the number of photons incident during a predetermined time, that is, an exposure period, by using a trigger pulse induced by photons incident on the photodiode  211 . 
     The photodiode may include an avalanche photodiode (hereinafter, referred to as an APD) or SPAD operating in a Geiger mode. In the Geiger mode, a reverse voltage greater than a breakdown voltage is applied to the APD so as to detect a single photon. In the Geiger mode, because an intensity of an electric field applied to an amplification layer is large, even when a small amount of photons is absorbed, a breakdown phenomenon of an avalanche current occurs so that a large current pulse is output, and thus, a single photon may be detected. 
     The pulse generator  212  may generate a pulse signal based on an electric signal generated according to a photon incident on the photodiode  211 . The pulse generator  212  may generate a pulse at a frequency according to a frequency at which a photon is received. Here, a period of the pulse signal may be modulated according to an ambient illuminance. For example, when the ambient illuminance is high, the period of the pulse signal may be increased for a certain period of time. 
     The counter  213  may count and output the number of pulse signals. A counting value or counting result value output by the counter  213  may become a pixel value. Here, the counting value is a sum of the number of photons input within a frame period. The counter  213  may temporarily store the counting value, and output the counting value according to an external control signal. 
     According to an example embodiment, the image acquisition apparatus  100  may include an image signal generator may generate an image signal by using the output value of the counter  213 , that is, a pixel value. According to another example embodiment, the image signal generator may be provided external to the image acquisition apparatus  100 . 
       FIG.  3    is a circuit diagram of the pixel  210  shown in  FIG.  2   . 
     Referring to  FIGS.  2  and  3   , the pixel  210  includes a photodiode. In addition, the photodiode  211  may include an SPAD. A cathode electrode of the photodiode  211  may be connected to an operating voltage Vop, and an anode electrode may be connected to an n-type metal-oxide-semiconductor field-effect transistor (NMOS) and an input side of the pulse generator  212 . A gate electrode of the NMOS transistor may be connected to a bias voltage Vbias. 
     The pulse generator  212  may include an inverter circuit. An output of the pulse generator  212  may be connected to the counter  213 . However, the disclosure is not limited thereto, and as such, the pulse generator  212  may include other components and/or circuit elements. 
     The counter  213  may haven bits, for example, 8 to 12 bits. The size of the counter  213  is not limited thereto, and a counter of various sizes may be used according to a pixel size or applications of the image sensor. In addition, in an example embodiment, the number of incident photons may be counted by increasing the period of the pulse signal according to an ambient illuminance, that is, in a high illuminance or even when the number of photons is large, and thus, a counter overflow may be prevented without the increase in size of the counter. The counter  213  may include a synchronous counter, a non-synchronous counter, or a non-synchronous ripple counter. The counter  213  may include a D flip-flop circuit. 
     Referring to  FIG.  3   , when a reverse bias voltage greater than a breakdown voltage is applied to the cathode electrode of the SPAD  211  as the operating voltage Vop, carriers generated by the incidence of a single photon causes avalanche amplification, so that a large current is applied to the input side of the pulse generator  212  through the SPAD  211 . 
     The pulse generator  212  may generate an electric signal applied to the input side thereof, as a pulse signal. Here, the pulse generator  212  may include an inverter circuit. In an example embodiment, in the pulse generator  212 , the period of the pulse signal may be modulated or may vary according to an ambient illuminance. For example, an electric signal output from the SPAD  211  and a control signal value corresponding to an ambient illuminance value may be input to a certain logic circuit so that the period of the pulse signal is modulated. For example, when the ambient illuminance is high, when a control signal having a certain length is input, the pulse generator  212  may increase the period of the pulse signal by the corresponding length. In addition, the pulse generator  212  may receive a control signal of an external control circuit or an output signal of an external illuminance sensor, to modulate the period of the pulse signal. 
     The NMOS transistor may be turned on or off by applying a bias voltage to the gate electrode of the NMOS transistor, and a current generated by the SPAD  211  may be transmitted to the pulse generator  212 . Here, the NMOS transistor is shown, but the disclosure is not limited thereto, and various bias voltage application circuits may be applicable. 
     According to an example embodiment, the image acquisition apparatus  100  may include a quenching circuit for restricting an excess current due to avalanche amplification occurring in the SPAD  211 . The greater the reverse voltage applied to the SPAD, the greater the probability that thermal electrons are in an excited state and tunneling probability is present, and thus, a dark current in which an avalanche current occurs without an absorption of photons may increase. When the avalanche current occurs, an excess current may flow. Thus, a continuous flow of the avalanche current may be suppressed by the quenching circuit. 
     Referring to  FIG.  4   , a timing and period of a pulse signal of the pulse generator  212  are shown. P t1  is a pulse period of a first frame or a first sub-frame, and P t2  is a pulse period of a second frame or a second sub-frame. As shown in  FIG.  4   , when light is incident on the photodiode  211 , the pulse generator  212  may generate a pulse signal generated by a single photon during a period Pt of the pulse signal. In addition, after a standby time elapses, during a next period, the pulse generator  212  may generate a pulse signal generated by a single photon. Here, in a low light condition, the number of incident photons is small, and an interval at which a photon is incident increases, and thus, the standby time shown in  FIG.  4    increases so that a capacity of the counter  213  is not exceeded. However, in a high light condition, a standby time decreases or becomes zero, and thus, the capacity of the counter  213  is exceeded. 
     Referring to  FIG.  5   , a timing and period of a pulse signal of the pulse generator  212  are shown. P t1  is a pulse period of a first frame or a first sub-frame, and P t2  is a pulse period of a second frame or a second sub-frame. As shown, the period P t2  of the second pulse signal becomes greater than the period P t1  of the first pulse signal. In other words, when the period of the pulse signal increases, the number of counts performed during a single frame or a single sub-frame decreases, and thus, the capacity of the counter  213  may not be exceeded. 
       FIG.  6    is a diagram illustrating a modulation of a period of a pulse signal of an image sensor, according to another example embodiment. 
     Referring to  FIG.  6   , one frame may be divided into a plurality of sub-frames (first to n th  sub-frames). Here, a period of the sub-frame is 100 μs, the counter is in 10 bits, and a capacity of the counter is 2 10 , that is, 1024. A basic pulse period P t  of each of the sub-frames is 50 ns. Additional pulse periods (variables) of the first to n th  sub-frames may be different from each other. As shown, a period P t1  of a pulse signal of the first sub-frame may be 50 ns, a period P t2  of a pulse signal of the second sub-frame may be 60 ns, a period P t3  of a pulse signal of the third sub-frame may be 100 ns, and a period P tn  of a pulse signal \of the n th  sub-frame may be 150 ns. Here, the basic period Pt of the pulse signal is the same at 50 ns, and an additional period (variable) from the second sub-frame to the n th  sub-frame gradually increases by 10 ns, 50 ns, and 100 ns. Each of the additional periods may vary according to an ambient illuminance value or an amount of light. In an example embodiment, when the ambient illuminance is high, a period of a pulse signal of each sub-frame, that is, the additional period, may be increased. Here, the period of a sub-frame, the counter capacity, the basic period of the pulse signal, and the additional frequency are examples, and may be variously set according to a specification or application of the image sensor. 
     The maximum expected output value of the counter for each sub-frame and the counter capacity may be compared with each other, and when the maximum expected output value of the counter is greater than the counter capacity, the period of the pulse signal for the sub-frame may be increased. 
     The maximum expected output value of the counter for the second sub-frame may be 1666, and a 10-bit counter has a capacity of 1024. Thus, because the maximum expected output value of the counter is greater than the counter capacity, the period of the pulse signal for the third sub-frame may be increased by 50 ns. In addition, when the maximum expected output value of the counter for the n th  sub frame is 666, which is less than the counter capacity of 1024, an image signal may be generated by using output values of the counter and periods of the pulse signal up to the n th  frame. 
     In an example embodiment, in imaging using photon counting, a sequence may be started by dividing a single frame into a plurality of sub-frames. An image signal may be generated by using an output value of the counter (a counting value) and period information. A period may be sequentially increased based on two pieces of information generated for each sub-frame, that is, a counting value and a period, so that a sequence may be performed up to a sub-frame in which the counter value does not exceed the counter capacity, thereby obtaining one piece of frame information. An image may be generated by using a counting value and period modulation information of the sub-frame. 
     In an example embodiment, it is described that a measurement or determination of an ambient illuminance includes dividing a frame into sub-frames, and determining whether a counting value of each of the sub-frames exceeds a counter capacity. However, the disclosure is not limited thereto, and it may be determined whether to increase a period of a pulse signal considering counting values of a few sub-frames that are sequentially input. 
       FIG.  7    is a schematic block diagram of an image acquisition apparatus according to another example embodiment. 
     Referring to  FIG.  7   , the image acquisition apparatus may include an image sensor  200 , the image sensor controller  300 , and an illuminance sensor  400 . In an example embodiment, when an ambient illuminance is high, that is, when an ambient illuminance value is a threshold value or greater, the image sensor controller  300  may increase a period of a pulse signal for frames of the image sensor  200 . The illuminance sensor  400  may measure an ambient illuminance, and provide the measured illuminance value to the image sensor controller  300 . When the illuminance value received from the illuminance sensor  400  is a threshold value or greater, the image sensor controller  300  may increase a period of a pulse signal of a pulse generator of the image sensor  200 . Here, the sensing value of the illuminance sensor  400  is provided to the image sensor controller  300 . However, the disclosure is not limited thereto, and it may be implemented such that the sensing value of the illuminance sensor  400  may be provided to the input side of the pulse generator. 
       FIG.  8    is a flowchart of a method of modulating a period of a pulse signal of an image signal, according to another example embodiment. 
     Referring to  FIG.  8   , in operation  800 , an ambient illuminance of an image sensor may be determined. 
     In operation  802 , it may be determined whether the illuminance value is greater than a threshold value. In operation  804 , when the illuminance is greater than the threshold value, a period of a pulse signal may be increased. In operation  806 , a counting value of a counter may be output, and in operation  808 , an image signal may be generated. 
     When the illuminance value is not greater than the threshold value in operation  802 , the counting value of the counter may be output in operation  806 , and the image signal may be generated in operation  808 . 
     In an example embodiment, in a high illuminance, the pulse period may be increased so as not to exceed the capacity of the counter, so that the number of counts performed during a single frame time is reduced, thereby performing photon counting with a designed counter capacity. 
       FIG.  9    is a flowchart of a method of modulating a period of a pulse signal of an image signal, according to another example embodiment. 
     Referring to  FIG.  9   , in operation  900 , one frame may be divided into a plurality of sub-frames, and a variable period of a first sub-frame may be 0 ns. 
     In operation  902 , it may be determined whether a counting value of the counter with respect to a first sub-frame, that is, a total sum of the number of photons counted within a period of a plurality of pulse signals in a frame period of the first sub-frame, exceeds a counter capacity. When the counting value is greater than the counter capacity in operation  902 , the period of the pulse signal may be increased in operation  904 . 
     In operation  906 , it may be determined whether a counting value of a next n th  sub-frame is greater than the counter capacity during a period of a pulse signal, which is increased with respect to the n th  sub-frame. 
     When the counting value is greater than the counter capacity in operation  908 , the period of the pulse signal may be increased with respect to a next (n+1) st  sub-frame, in operations  910  and  904 . Here, the period of the pulse signal in operation  904  may be gradually increased with respect to each frame. Thus, the periods of the pulse signal between the sub-frames may be different from each other. 
     When the counting value is less than the counter capacity, in operation  908 , an image signal may be generated by using an output value of the counter and the periods of the pulse signal with respect to sub-frames up to the present, in operation  912 . 
     In an example embodiment, for photon counting in a low illuminance and a high illuminance, a period of a pulse signal may be changed, and a frame may be divided into a plurality of sub-frames, and thus, a value greater than the size of the counter may be counted with a size of the counter in a pixel being fixed. 
     In addition, by reducing the size of the counter, the pixel size may be reduced, and the frame rate may be improved. 
     The image acquisition apparatus  1000  described above may be employed in various high-performance optical apparatuses or electronic apparatuses. Examples of the electronic apparatuses may include smartphones, mobile phones, cellular phones, personal digital assistants (PDAs), laptop computers, personal computers (PCs), various portable devices, home appliances, security cameras, medical cameras, automobiles, Internet of Things (IoT) devices, and mobile or non-mobile computing devices, but are not limited thereto. 
     In addition to the image acquisition apparatus  1000 , the electronic apparatuses may further include a processor for controlling image sensors provided therein, for example, an application processor (AP). The electronic apparatuses may control a plurality of hardware or software components by driving an operating system or an application program in the processor and may perform various data processing and operations. The processor may further include a graphics processing unit (GPU) and/or an image signal processor (ISP). When the processor includes an ISP, an image (or video) obtained using an image sensor may be stored and/or output using the processor. 
       FIG.  10    is a block diagram of a schematic structure of an electronic apparatus ED 01  according to an example embodiment. Referring to  FIG.  10   , in a network environment ED 00 , the electronic apparatus ED 01  may communicate with another electronic apparatus ED 02  through a first network ED 98  (a near-field wireless communication network or the like) or may communicate with another electronic apparatus ED 04  and/or a server ED 08  through a second network ED 99  (a far-field wireless communication network or the like). The electronic apparatus ED 01  may communicate with the electronic apparatus ED 04  through the server ED 08 . The electronic apparatus ED 01  may include a processor ED 20 , a memory ED 30 , an input device ED 50 , a sound output device ED 55 , a display device ED 60 , an audio module ED 70 , a sensor module ED 76 , an interface ED 77 , a haptic module ED 79 , a camera module ED 80 , a power management module ED 88 , a battery ED 89 , a communication module ED 90 , a subscriber identification module ED 96 , and/or an antenna module ED 97 . Some (the display device ED 60 , etc.) of the components may be omitted from the electronic apparatus ED 01 , or other components may be added to the electronic apparatus ED 01 . Some of the components may be implemented in one integrated circuit. For example, the sensor module ED 76  (a fingerprint sensor, an iris sensor, an illuminance sensor, etc.) may be embedded in the display device ED 60  (a display or the like). In addition, when an image sensor has a spectral function, some sensor-module functions (color sensing, illuminance sensing, etc.) may be implemented in the image sensor instead of being in the sensor module ED 76 . 
     The processor ED 20  may execute software (a program ED 40  or the like) to control one or more other components (hardware or software components, etc.) of the electronic apparatus ED 01  connected to the processor ED 20 , and may perform a variety of data processing or operations. As a portion of the data processing or operations, the processor ED 20  may load instructions and/or data received from other components (the sensor module ED 76 , the communication module ED 90 , etc.) into a volatile memory ED 32 , process the instructions and/or data stored in the volatile memory ED 32 , and store result data in a nonvolatile memory ED 34 . The processor ED 20  may include a main processor ED 21  (a central processing unit, an AP, or the like) and an auxiliary processor ED 23  (a GPU, an ISP, a sensor hub processor, a communication processor, or the like), which is operated independently or together with the main processor ED 21 . The auxiliary processor ED 23  may consume less power than the main processor ED 21  and may perform specialized functions. 
     The auxiliary processor ED 23  may control functions and/or states related to some (the display device ED 60 , the sensor module ED 76 , the communication module ED 90 , etc.) of the components of the electronic apparatus ED 01  on behalf of the main processor ED 21  while the main processor ED 21  is in an inactive (e.g., sleep) state or together with the main processor ED 21  while the main processor ED 21  is in an active (e.g., application execution) state. The auxiliary processor ED 23  (an ISP, a communication processor, or the like) may be implemented as a portion of other functionally relevant components (the camera module ED 80 , the communication module ED 90 , etc.). 
     The memory ED 30  may store a variety of data required by the components (the processor ED 20 , the sensor module ED 76 , etc.) of the electronic apparatus ED 01 . The data may include, for example, software (the program ED 40 , etc.) and input data and/or output data for commands related thereto. The memory ED 30  may include the volatile memory ED 32  and/or the nonvolatile memory ED 34 . The nonvolatile memory ED 34  may include an internal memory ED 36  fixed to the electronic apparatus ED 01  and an external memory ED 38  removable from the electronic apparatus ED 01 . 
     The program ED 40  may be stored as software in the memory ED 30 , and may include an operating system ED 42 , middleware ED 44 , and/or an application 
     The input device ED 50  may receive commands and/or data to be used for the components (the processor ED 20 , etc.) of the electronic apparatus ED 01  from the outside (a user, etc.) of the electronic apparatus ED 01 . The input device ED 50  may include a microphone, a mouse, a keyboard, and/or a digital pen (a stylus pen or the like). 
     The audio output device ED 55  may output an audio signal to the outside of the electronic apparatus ED 01 . The audio output device ED 55  may include a speaker and/or a receiver. The speaker may be used for general purposes such as multimedia playback or record playback, and the receiver may be used to receive incoming calls. The receiver may be provided as a portion of the speaker or may be implemented as a separate device. 
     The display device ED 60  may visually provide information to the outside of the electronic apparatus ED 01 . The display device ED 60  may include a display, a hologram device, or a projector, and a control circuit for controlling devices. The display device ED 60  may include touch circuitry set to sense a touch, and/or sensor circuitry (a pressure sensor, etc.) configured to measure the intensity of force generated by the touch. 
     The audio module ED 70  may convert sound into an electrical signal, and vice versa. The audio module ED 70  may obtain sound through the input device ED 50 , or may output sound through the audio output device ED 55  and/or speakers and/or headphones of another electronic apparatus (the electronic apparatus ED 02  or the like) directly or wirelessly connected to the electronic apparatus ED 01 . 
     The sensor module ED 76  may detect an operating state (power, temperature, etc.) of the electronic apparatus ED 01  or an external environmental state (user status, etc.), and may generate an electrical signal and/or a data value corresponding to the detected state. The sensor module ED 76  may include a gesture sensor, a gyro sensor, a barometric sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biological sensor, a temperature sensor, a humidity sensor, and/or an illuminance sensor. 
     The interface ED 77  may support one or more designated protocols, which may be used to directly or wirelessly connect the electronic apparatus ED 01  with other electronic apparatuses (the electronic apparatus ED 02 , etc.). The interface ED 77  may include a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, and/or an audio interface. 
     A connection terminal ED 78  may include a connector through which the electronic apparatus ED 01  may be physically connected to other electronic apparatuses (the electronic apparatus ED 02 , etc.). The connection terminal ED 78  may include an HDMI connector, a USB connector, an SD card connector, and/or an audio connector (a headphone connector, etc.). 
     The haptic module ED 79  may convert an electrical signal into a mechanical stimulus (vibration, movement, etc.) or an electrical stimulus that a user may perceive through tactile sensation or kinesthesia. The haptic module ED 79  may include a motor, a piezoelectric element, and/or an electric stimulation device. 
     The camera module ED 80  may capture a still image and a moving image. The camera module ED 80  may include the image acquisition apparatus  1000  described above, and may further include a lens assembly, an ISP, and/or a flash. The lens assembly included in the camera module ED 80  may collect light coming from an object to be imaged. 
     The power management module ED 88  may manage power supplied to the electronic apparatus ED 01 . The power management module ED 88  may be implemented as a portion of a power management integrated circuit PMIC. 
     The battery ED 89  may supply power to components of the electronic apparatus ED 01 . The battery ED 89  may include a non-rechargeable primary battery, a rechargeable secondary battery, and/or a fuel cell. 
     The communication module ED 90  may support establishment of a direct (wired) communication channel and/or a wireless communication channel between the electronic apparatus ED 01  and other electronic apparatuses (the electronic apparatus ED 02 , the electronic apparatus ED 04 , the server ED 08 , etc.), and communication through the established communication channel. The communication module ED 90  operates independently of the processor ED 20  (an AP, etc.) and may include one or more communication processors supporting direct communication and/or wireless communication. The communication module ED 90  may include a wireless communication module ED 92  (a cellular communication module, a short-range wireless communication module, a global navigation satellite system (GNSS), or the like) and/or a wired communication module ED 94  (a local area network (LAN) communication module, a power line communication module, or the like). A corresponding communication module from among these communication modules may communicate with other electronic apparatuses through the first network ED 98  (a local area network such as Bluetooth, WiFi Direct, or infrared data association (IrDA)) or the second network ED 99  (a telecommunication network such as a cellular network, the Internet, or computer networks (LAN, WAN, etc.)). These various types of communication modules may be integrated into a single component (a single chip or the like) or may be implemented as a plurality of separate components (multiple chips). The wireless communication module ED 92  may identify and authenticate the electronic apparatus ED 01  within a communication network such as the first network ED 98  and/or the second network ED 99  using subscriber information (an international mobile subscriber identifier (IMSI), etc.) stored in the subscriber identity module ED 96 . 
     The antenna module ED 97  may transmit and/or receive signals and/or power to and/or from the outside (other electronic apparatuses, etc.). An antenna may include a radiator made of a conductive pattern formed on a substrate (a PCB, etc.). The antenna module ED 97  may include one or more such antennas. When a plurality of antennas are included in the antenna module ED 97 , the communication module ED 90  may select an antenna suitable for a communication method used in a communication network, such as the first network ED 98  and/or the second network ED 99 , among the plurality of antennas. Signals and/or power may be transmitted or received between the communication module ED 90  and other electronic apparatuses through the selected antenna. Other components (an RFIC, etc.) besides the antenna may be included as part of the antenna module ED 97 . 
     Some of the components may be connected to each other and exchange signals (commands, data, etc.) through a communication method between peripheral devices (a bus, general purpose input and output (GPIO), a serial peripheral interface (SPI), a mobile industry processor interface (MIPI), or the like). 
     Commands or data may be transmitted or received between the electronic apparatus ED 01  and an external apparatus such as the electronic apparatus ED 04  through the server ED 08  connected to the second network ED 99 . The other electronic apparatuses ED 02  and ED 04  may be the same as or different from the electronic apparatus ED 01 . All or some of the operations of the electronic apparatus ED 01  may be executed by one or more of the other electronic apparatuses ED 02  and ED 04  and the server ED 08 . For example, when the electronic apparatus ED 01  needs to perform certain functions or services, the electronic apparatus ED 01  may request one or more other electronic apparatuses to perform some or all of the functions or services instead of directly executing the functions or services. One or more other electronic apparatuses that have received the request may execute an additional function or service related to the request, and may transfer results of the execution to the electronic apparatus ED 01 . To this end, cloud computing, distributed computing, and/or client-server computing techniques may be used. 
       FIG.  11    is a block diagram schematic illustrating a camera module ED 80  included in the electronic apparatus ED 01  shown in  FIG.  10   . The camera module ED 80  may include the image acquisition apparatus  1000  described above, or may have a structure modified therefrom. Referring to  FIG.  11   , the camera module ED 80  may include a lens assembly CM 10 , a flash CM 20 , an image sensor CM 30 , an image stabilizer CM 40 , a memory CM 50  (a buffer memory, etc.), and/or an ISP CM 60 . 
     The image sensor CM 30  is an image sensor described with reference to  FIGS.  1  to  3   , and uses photon counting. Thus, an HDR and a high frame rate may be realized while minimizing a pixel size of the image sensor CM 30 . According to an example embodiment, a pixel of an image sensor includes an SPAD, generates a pulse signal based on an electric signal generated according to a photon incident on the pixel, and includes a counter that counts and outputs the number of pulse signals, and a period of the pulse signal may be modulated according to an ambient illuminance of the image sensor. Thus, in the image sensor CM 30 , the pixel size may be reduced, and the frame rate may be improved. 
     The lens assembly CM 10  may collect light coming from an object to be imaged. The camera module ED 80  may include a plurality of lens assemblies CM 10 , and in this case, the camera module ED 80  may be a dual camera, a 360-degree camera, or a spherical camera. Some of the plurality of lens assemblies CM 10  may have the same lens properties (field of view, focal length, autofocus, F Number, optical zoom, etc.) or different lens properties. Each of the lens assemblies CM 10  may include a wide-angle lens or a telephoto lens. 
     The lens assembly CM 10  may be configured and/or focused such that an image sensor included in the image sensor CM 30  may form optical images of an object. 
     The flash CM 20  may emit light used to enhance light emitted or reflected from an object. The flash CM 20  may include one or more light emitting diodes (a red-green-blue (RGB) LED, a white LED, an infrared LED, an ultraviolet LED, etc.), and/or a xenon lamp. 
     The image stabilizer CM 40  may move one or more lenses included in the lens assembly CM 10  or the image sensor CM 30  in a specific direction in response to a movement of the camera module ED 80  or the electronic apparatus ED 01  including the camera module ED 80 , or may control operating characteristics of the image sensor CM 30  (adjustment of read-out timing, etc.) to compensate for negative effects caused by movement. The image stabilizer CM 40  may detect a movement of the camera module ED 80  or the electronic apparatus ED 01  by using a gyro sensor (not shown) or an acceleration sensor (not shown) arranged inside or outside the camera module ED 80 . The image stabilizer CM 40  may be an optical image stabilizer. 
     In the memory CM 50 , some or all of data obtained through the image sensor CM 30  may be stored for the next image processing operation. For example, when a plurality of images are obtained at a high speed, the obtained original data (Bayer-patterned data, high-resolution data, or the like) may be stored in the memory CM 50  and only a low-resolution image may be displayed. Then, the original data of a selected image (user selection, etc.) may be transferred to the ISP CM 60 . The memory CM 50  may be integrated into the memory ED 30  of the electronic apparatus ED 01  or may be configured as a separate memory that may be independently operated. 
     The ISP CM 60  may perform one or more image processes on an image obtained through the image sensor CM 30  or image data stored in the memory CM 50 . 
     In addition, the one or more image processes may include depth map generation, three-dimensional modeling, panorama generation, feature point extraction, image synthesis, and/or image compensation (noise reduction, resolution adjustment, brightness adjustment, blurring, sharpening, softening, etc.). The ISP CM 60  may control (exposure time control, read-out timing control, etc.) components (the image sensor CM 30 , etc.) included in the camera module CM 80 . An image processed by the ISP CM 60  may be stored again in the memory CM 50  for additional processing or may be provided to external components (the memory ED 30 , the display device ED 60 , the electronic apparatus ED 02 , the electronic apparatus ED 04 , the server ED 08 , etc.) of the camera module ED 80 . The ISP CM 60  may be integrated into the processor ED 20  or may be configured as a separate processor that operates independently of the processor ED 20 . When the ISP CM 60  is provided separately from the processor ED 20 , an image processed by the ISP CM 60  may be displayed on the display device ED 60  after being further processed by the processor ED 20 . 
     The electronic apparatus ED 01  may include a plurality of camera modules ED 80  having different attributes or functions. In this case, one of the plurality of camera modules ED 80  may be a wide-angle camera, and another of the plurality of camera modules ED 80  may be a telephoto camera. Similarly, one of the plurality of camera modules ED 80  may be a front camera, and another of the plurality of camera modules ED 80  may be a rear camera. 
       FIGS.  11  to  21    are views illustrating various examples of an electronic apparatus including the image acquisition apparatus according to example embodiments. 
     According to example embodiments, the image acquisition apparatus  1000  may be applied to a mobile phone or smartphone  5100   m  shown in  FIG.  12   , a tablet or smart tablet  5200  shown in  FIG.  13   , a digital camera or camcorder  5300  shown in  FIG.  14   , a laptop computer  5400  shown in  FIG.  15   , or a television or smart television  5500  shown in  FIG.  19   . For example, the smartphone  5100   m  or the smart tablet  5200  may include a plurality of high-resolution cameras each having a high-resolution image sensor mounted thereon. The high-resolution cameras may be used to extract depth information of objects in an image, adjust out of focus of an image, or automatically identify objects in an image. 
     In addition, the image acquisition apparatus  1000  may be applied to a smart refrigerator  5600  shown in  FIG.  17   , a security camera  5700  shown in  FIG.  18   , a robot  5800  shown in  FIG.  19   , a medical camera  5900  shown in  FIG.  20   , and the like. For example, the smart refrigerator  5600  may automatically recognize food contained in the smart refrigerator  5600  by using the image acquisition apparatus  1000 , and may inform a user of whether a specific food is contained in the smart refrigerator  5600 , the type of food put into or out of the smart refrigerator  5600 , and the like through a smartphone. The security camera  5700  may provide an ultra-high-resolution image and may recognize an object or a person in the ultra-high-resolution image even in a dark environment owing to high sensitivity of the security camera  5700 . The robot  5800  may be sent to a disaster or industrial site that cannot be directly accessed by humans and may provide high-resolution images. The medical camera  5900  may provide a high-resolution image for diagnosis or surgery, and may have a dynamically adjustable field of view. 
     In addition, the image acquisition apparatus  1000  may be applied to a vehicle  6000  as shown in  FIG.  21   . The vehicle  6000  may include a plurality of vehicle cameras  6010 ,  6020 ,  6030 , and  6040  arranged at various positions. Each of the vehicle cameras  6010 ,  6020 ,  6030 , and  6040  may include an image acquisition apparatus according to an example embodiment. The vehicle  6000  may use the vehicle cameras  6010 ,  6020 ,  6030 , and  6040  to provide a driver with a variety of information about the interior or surroundings of the vehicle  6000 , and may provide information necessary for autonomous driving by automatically recognizing objects or people in images. 
     In an image sensor according to example embodiments, with the capacity or size of the counter in a pixel being fixed, a value greater than the size of the counter may be counted by changing a pulse period or by using a sub-frame technique. 
     In addition, by reducing the size of the counter, the pixel size may be reduced, and the frame rate may be improved. 
     The image acquisition apparatus may be employed in various electronic apparatuses. 
     It should be understood that example embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each example embodiment should typically be considered as available for other similar features or aspects in other example embodiments. While one or more example embodiments have been described with reference to the figures, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope as defined by the following claims.