Patent Publication Number: US-11398791-B2

Title: Model predictive control of a converter based on pulse width modulated switching patterns

Description:
FIELD OF THE INVENTION 
     The invention relates to a method, a computer program, a computer-readable medium and a controller for controlling an electrical converter. Furthermore, the invention relates to an electrical converter. 
     BACKGROUND OF THE INVENTION 
     For electrical converters model predictive control is used for determining switching states of the converter circuit via determining future states of the electrical converter based on a model of the converter and connected components, such as electrical motors, electrical generators, electrical grids, etc. 
     In WO 2015 078 656 A1 pre-computed optimized pulse patterns are further optimized with model predictive control by manipulating their switching instants. In such a way, the harmonic content of the produced currents may be reduced. 
     The harmonic benefit of optimized pulse patterns over other modulation methods is particularly high at low pulse numbers (i.e. the ratio between the switching frequency and the fundamental frequency). At very high pulse numbers and low fundamental frequencies, however, optimized pulse patterns may be difficult to calculate and may use much controller memory. Optimized pulse pattern-based control methods typically solve this issue by switching to other control methods. 
     In EP 2 469 692 A1 an electrical system is controlled in such a way that switching sequences with switching time instants for the converter that have been determined with respect to a certain first optimization goal are modified in a second step. A resultant flux error is determined. The switching time instants are modified to reduce the flux error. 
     In the article of JAMES SCOLTOCK ET AL: “A Comparison of Model Predictive Control Schemes for MV Induction Motor Drives”, IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, IEEE SERVICE CENTER, NEW YORK, N.Y., US, vol. 9, no. 2, 10 Oct. 2012 (2012 Oct. 10), pages 909-919, several model predictive controls schemes are compared with pulse width modulation and optimized pulse patterns. It is mentioned that a common mode component can be added to the reference voltage. 
     In the article of NIKOLAOS OIKONOMOU ET AL: “Model Predictive Pulse Pattern Control for the Five-Level Active Neutral-Point-Clamped Inverter”, IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, vol. 49, no. 6, 15 May 2013 (2013 May 15), pages 2583-2592, it is described how optimized pulse patterns can be selected dependent on a fundamental frequency and that reference flux values can be stored together with the optimized pulse patterns. 
     DESCRIPTION OF THE INVENTION 
     It is an objective of the invention to provide an electrical converter adapted for producing an output current with low harmonic distortions at low fundamental frequencies. It is a further objective of the invention to provide a simple and computationally less demanding model predictive control scheme, which also may be used at high pulse numbers. 
     These objectives are achieved by the subject-matter of the independent claims. Further exemplary embodiments are evident from the dependent claims and the following description. 
     A first aspect of the invention relates to a method for controlling an electrical converter. The electrical converter is adapted for converting a DC voltage into a multi-phase voltage with at least two voltage levels. The electrical converter may comprise a converter circuit with semiconductor switches, which may be arranged in at least two (such as three) phase branches. The phase branches may be connected in parallel to a DC link and/or may be adapted for converting a DC link voltage or more generally a DC voltage into an AC phase voltages. Each phase branch may be adapted for generating at least two voltage levels. 
     For example, the phase branches may be adapted for generating three voltage levels, such as a positive DC link voltage, a negative DC link voltage and a neutral point voltage. The neutral point voltage may be provided by a split DC link. The electrical converter may be a neutral point clamped converter. However, in general the method also may be performed with other types of converters. 
     The electrical converter may be connected with its AC side to an electrical machine, such as a generator or motor and/or may supply this electrical machine with electrical power. The stator and/or rotor flux mentioned below may refer to magnetic fluxes in the stator and/or rotor of this electrical machine. It also may be the case that the electrical converter is connected to an electrical grid with its AC side. In this case, also virtual stator and/or virtual rotor fluxes may be defined for the electrical grid. 
     The electrical converter may be a power converter. Its semiconductor switches may be adapted for switching currents of more than 10 A and/or voltages of more than 1000 V. 
     The electrical converter may comprise a controller, which performs the method. For example, the method may be performed at each sampling time instant. 
     According to an embodiment of the invention, the method comprises: determining a modulating signal vector from a stator flux reference vector. The stator flux reference vector may be provided by an outer control loop, which based on measurements and on a reference speed and/or reference frequency determines the stator flux reference vector. 
     The modulating signal vector is a signal indicative of the output voltages to be generated by the converter. For example, the modulating signal vector may be a normalized voltage vector determined by differentiating the stator flux reference vector. 
     The invention is also applicable to grid-side converters, i.e. the stator flux vector may be a virtual stator flux vector. Also, a rotor flux vector may be a virtual rotor flux vector. For example, in the case of a converter supplying an electrical grid, the stator flux vector may be a virtual converter flux vector, and the rotor flux vector may be a grid flux vector, which may be defined at a point of common coupling (PCC). 
     It has to be noted that here and in the following, vectors may be quantities with two or three components. 
     According to an embodiment of the invention, the method further comprises: determining a switching pattern from the modulating signal vector via pulse width modulation, the switching pattern comprising a sequence of switching transitions, wherein a switching transition defines a switch position, at which a phase of the converter is switched from one voltage level to another voltage level, and a transition time instant at which the phase of the converter is switched. 
     The modulating signal vector may be indicative of the actual output voltages to be generated. Together with an actual frequency and/or actual speed, the movement of the modulating signal vector may be extrapolated into the future and therefrom, a sequence of future switching sequences may be determined. For example, the trajectories of the components of the extrapolated modulating signal vector may be compared with one or more carrier signals (which may be triangular signals with a carrier frequency). The switching transitions may be determined from the trajectories and the carrier signal(s) with pulse width modulation. For example, a crossing point of a trajectory with a carrier signal may determine a switching time instant and/or the direction of the crossing may determine, whether the voltage level is raised or lowered at the switching time instant. 
     It has to be noted that these calculations all may be performed online during a sampling time interval, i.e. the time between two sampling time instants, and/or may be performed numerically. 
     According to an embodiment of the invention, the method further comprises: determining a stator flux error by subtracting from the stator flux reference vector an estimated stator flux vector, which is estimated from measurements in the electrical converter. The estimated stator flux vector may be provided by an outer control loop. The difference of the stator flux reference vector and the estimated stator flux vector or the magnitude of the difference may be seen as error, which may be minimized by the following step of the method and/or with model predictive control. 
     According to an embodiment of the invention, the method further comprises: modifying the switching pattern by moving transition time instants of switching transitions of the switching pattern, such that the stator flux error is minimized. The transition time instants may be moved forward and backward in time, such that the switching pattern, which was generated by pulse width modulation, is modified. The transition time instants may be moved such that the modified switching pattern results in a stator flux, which is closer to the stator flux reference. In such a way, the modified switching pattern may result in lower amplitudes for the higher order harmonics than the unmodified switching pattern. 
     It may be the case that constraints are present on the movement of the switching time instants. For example, the order of the switching transitions in one phase or all the phases may not be changed. 
     Furthermore, it may be the case that additional switching time instants are included in the unmodified switching pattern, which, for example, would result in pulses of zero length. After optimization, these pulses may have a nonzero length and may contribute to the compensation of the stator flux error. 
     The optimization of the switching pattern may be performed online by solving a quadratic program, by minimizing an objective function subject to constraints, etc. 
     According to an embodiment of the invention, the method further comprises: applying at least a part of the modified switching pattern to the electrical converter. The switching transitions may be translated into switching times and switching states of the semiconductor switches of the electrical converter. Corresponding gate signals for the semiconductor switches may be generated. 
     It may be the case that the switching pattern and/or the modified switching pattern is longer than the sampling time interval. In this case, only a part of the switching pattern may be converted into switching times and switching states. 
     According to an embodiment of the invention, a stator flux correction is defined as the sum of products of a voltage level difference and a time difference, the voltage level difference of a switching transition being the difference of the voltage level before and after the switching transition, and the time difference being the difference between a moved and an unmodified transition time instant. This stator flux correction may be determined per phase or for all phases. The switching pattern may be optimized such that the stator flux correction at least partially compensates the stator flux error. The stator flux correction may be optimized by moving the transition time instants, such that the stator flux correction is equal to the stator flux error. 
     According to an embodiment of the invention, the switching pattern is regularly determined at each sampling time instant over a prediction horizon. The prediction horizon may be longer than a difference between consecutive sampling time instants. For example, only a part of the modified switching pattern shorter than the prediction horizon, such as a difference between consecutive sampling time instants may be applied to the electrical converter. In other words, the method may predict a future behavior of the electrical converter and/or the supplied electrical machine for a prediction horizon that may be longer than a sampling time interval. At each sampling time instant, the future behavior for more than the sampling time interval may be determined. 
     According to an embodiment of the invention, the switching transitions of the switching pattern are determined over a prediction horizon by: determining future samples of the modulating signal vector over the prediction horizon by rotating the modulating signal vector in the αβ0-coordinate system with an actual angular frequency to a time instant of the respective future sample; and generating a switching transition when a carrier signals crosses a value of the future sample during a time interval of the future sample. The future samples may determine a trajectory and/or function of the modulating signal over time. The future samples may be determined by extrapolating the components of the modulating signal vector into the future. This may be done by translating the modulating signal vector into the αβ0-coordinate system, for example with a Clarke transformation. After that the modulating signal vector may be rotated with the actual angular frequency, which may be determined from the actual speed and/or actual frequency, to the time instant of the future sample. This rotation may be a rotation of the αβ-components by the actual angular frequency times the time instant of the future sample. Thus, it may be assumed that the modulating signal vector is rotating with constant angular frequency. After that rotation, the rotated modulating signal vector may be transformed back into the system, in which it was provided, for example an abc-system. This back transformation may be performed with an inverse Clarke transformation. 
     The carrier signal may be represented as a triangular signal, and intersections of the trajectories of the extrapolated components of the modulating signal vector may be determined with the carrier signal. For example, the trajectories may be step (or piecewise constant) trajectories over time, whose values are determined from the values of the future samples at the time instants of the future samples. Each crossing may determine a switching time instant for a switching transition. Depending on the direction of the crossing, it may be determined, whether the voltage level increases or decreases at the intersection. 
     According to an embodiment of the invention, the stator flux reference vector is a three-component vector in the αβ0-coordinate system. A 0-component of the stator flux reference vector may be used for controlling a neutral point potential. Also, the stator flux error may be a three-component vector in the αβ0-coordinate system. 
     According to an embodiment of the invention, a common-mode component is added to the modulating signal vector. A common-mode component may be the sum of the phase components of the modulating signal vector. With this common-mode component, the output voltages of the electrical converter may be influenced without changing the output current, assuming that a star point of a load floats. This may be beneficial for influencing further optimization goals of the electrical converter and/or for complying with physical restrictions of the electrical converter. 
     According to an embodiment of the invention, when a modulation index determined from a magnitude of the stator flux reference vector is smaller than a threshold, the common-mode component is at least the modulation index plus a minimal pulse width divided by a carrier interval length of a carrier signal, such that pulse lengths of pulses generated by pulse width modulation with the carrier signal are longer than a minimal pulse width. 
     The modulation index may indicate the ratio of the magnitude of the actual output voltage with respect to a possible maximal output voltage, such as (half the DC voltage provided by a DC link. When the modulation index is rather small, it may be necessary to make sure that pulse lengths, i.e. intervals of the switching pattern with nonzero output voltage levels, are longer than a minimal pulse length. This minimal pulse length may correspond to a minimal time for which the semiconductor switches must remain in the on state before they may be turned off. 
     According to an embodiment of the invention, the common-mode component is controlled with a hysteresis controller, which sets the common-mode component to a first value, when a neutral point potential is larger than a maximal value and which sets the common-mode component to a second value, when the common-mode component is smaller than a minimal value. The second value may be of opposite sign with respect to the first value, for example, the negative first value. The first value may be in a direction of the power flow, which may be positive in motoring operation and negative in generating mode. 
     For example, in the case when the modulation index is higher than the threshold, the common-mode component may be used for controlling the neutral point potential of a split DC link. Since a common-mode component may increase and/or decrease the neutral point potential, the neutral point potential may be controlled to stay within bounds by inverting the neutral point potential each time the bound is exceeded. 
     According to an embodiment of the invention, the flux reference vector is determined from a reference angle and a reference magnitude. The reference angle and the reference magnitude may be provided by an outer control loop, which determines them from a reference speed and/or reference frequency and optional measurements of currents and/or voltages in an electrical machine supplied by the electrical converter. 
     According to an embodiment of the invention, a pulse number for the switching pattern is determined from a fundamental frequency and a maximum allowed switching frequency. The pulse number may be the ratio of the maximum allowed switching frequency and the fundamental frequency rounded to the closest lower integer. The fundamental frequency may be based on the reference speed and/or the reference frequency for the electrical converter. The pulse number may determine the number of pulses for the optimized pulse pattern, which may be used, when the pulse number is smaller or equal to a threshold. 
     According to an embodiment of the invention, when the pulse number exceeds a threshold, the switching pattern is determined with (for example carrier-based) pulse width modulation and otherwise, the switching pattern is determined from a table of optimized pulse patterns. 
     In general, for low pulse numbers (i.e. lower or equal to the threshold), optimized pulse patterns may be used as switching patterns, while for higher pulse numbers, (for example carrier-based) pulse width modulated switching patterns may be used, as described above and below. Thus, the same outer control loops and/or the same switching pattern optimizer may be used in both cases. 
     The optimized pulse patterns may have been optimized offline and may have the advantage that they may result in a lower total harmonic distortion than the (for example carrier-based) pulse width modulated switching patterns. However, for high pulse numbers, it may be difficult to store large optimized pulse patterns and/or to determine them offline. 
     The pulse width modulated switching pattern may be used to extend an optimized pulse pattern based control method to high pulse numbers. The pulse width modulated switching patterns may be generated online and may be fed to the same switching pattern optimizer as the optimized pulse pattern. In a variable speed drive, for example, this extension may make the switching pattern optimization, which moves switching time instants, applicable to all operating points, ranging from standstill operation to field weakening at high speeds. 
     According to an embodiment of the invention, the optimized pulse patterns are indexed in the table by a pulse number and a modulation index. Contrary to the pulse width modulated switching patterns, the optimized pulse patters are determined from these two quantities and not from the stator flux reference and/or modulating signal vector. The pulse number and the modulation index may be provided by an outer control loop. 
     According to an embodiment of the invention, in the case, when an optimized pulse pattern is used as switching pattern, the stator flux reference vector is determined from the optimized pulse pattern. The stator flux reference may be determined by integrating a voltage waveform of the optimized switching pattern. For performing the integration, a flux reference angle and a reference magnitude, which may be provided by an outer control loop, may be needed. 
     A further aspect of the invention relates to a computer program, which when being executed on a processor is adapted for executing the steps of the method as described in the above and in the following. For example, the controller of the electrical converter may provide such a processor and the method is performed by software running in the controller. However, it may also be possible that the method is at least partially implemented in software. For example, at least parts of the methods may be performed by an FPGA and/or DSP. 
     A further aspect of the invention relates to a computer-readable medium on which such a computer program is stored. A computer-readable medium may be a floppy disk, a hard disk, an USB (Universal Serial Bus) storage device, a RAM (Random Access Memory), a ROM (Read Only Memory), an EPROM (Erasable Programmable Read Only Memory) or a FLASH memory. A computer readable medium may also be a data communication network, e.g. the Internet, which allows downloading a program code. In general, the computer-readable medium may be a non-transitory or transitory medium. 
     A further aspect of the invention relates to a controller for controlling an electrical converter, which controller is adapted for executing the steps of the method as described in the above and in the following. As already mentioned, such a controller may comprise a processor running software, which performs the method. Furthermore, the controller may comprise an FPGA and/or DSP at least partially implementing the method. 
     A further aspect of the invention relates to an electrical converter, which comprises a converter circuit adapted for converting a DC voltage into a multi-phase voltage with at least two voltage levels and such a controller adapted for controlling semiconductor switches of the converter circuit. 
     It has to be understood that features of the method as described in the above and in the following may be features of the computer program, the computer-readable medium and the electrical converter as described in the above and in the following, and vice versa. 
     These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The subject matter of the invention will be explained in more detail in the following text with reference to exemplary embodiments, which are illustrated in the attached drawings. 
         FIG. 1  schematically shows a converter system with an electrical converter according to an embodiment of the invention. 
         FIG. 2  shows a diagram illustrating a controller and a control method according to an embodiment of the invention. 
         FIG. 3  shows a diagram illustrating a part of the controller and the control method of  FIG. 2 . 
         FIG. 4  shows a diagram illustrating a part of the controller and the control method of  FIG. 2 . 
         FIG. 5  shows a diagram illustrating a common-mode controller used in the control method of  FIG. 2 . 
         FIG. 6  shows a diagram with examples for a modulating signal vector and a switch position vector. 
         FIG. 7  shows a diagram with an example of a switching pattern used in the control method of  FIG. 2 . 
         FIG. 8  shows a diagram indicating how switching transitions may be determined in the control method of  FIG. 2 . 
         FIG. 9  shows a diagram indicating how additional switching transitions may be determined in the control method of  FIG. 2 . 
         FIG. 10  shows a diagram indicating how switching transitions may be moved in the control method of  FIG. 2 . 
         FIG. 11  shows a diagram illustrating receding horizon used in the control method of  FIG. 2 . 
         FIGS. 12 a  to 12 d    show diagrams with modulating signals, voltages, fluxes and currents produced by the method of  FIG. 2  during normal-speed operation. 
         FIGS. 13 a  to 13 d    show diagrams with modulating signals, voltages, fluxes and currents produced by the method of  FIG. 2  during low-speed operation. 
         FIGS. 14 a  and 14 b    show a flux reference and generated switching patterns during a change from optimized pulse patterns to carrier-based pulse width modulated pulse patterns as performed by the method of  FIG. 2 . 
     
    
    
     In principle, identical parts are provided with the same reference symbols in the figures. 
     Detailed Description of Exemplary Embodiments 
     Three-Level Converter System 
       FIG. 1  shows a converter system  10  comprising an electrical converter  12 , which is supplied with a DC voltage v dc  and which generates a three-phase output or stator voltage, which is supplied to an electrical machine  14 . It may be that the electrical machine  14  is a generator or a motor, and that the stator current i s,abc  flows to or from the electrical machine  14 . It also may be that the electrical converter is connected to an electrical grid instead of the electrical machine  14 . 
     As shown, the electrical converter  12  is a three-phase three-level neutral point clamped voltage source converter. However, also other topologies are possible with the control method described above and below. 
     The electrical converter comprises a split DC link  16  providing a neutral point N. A converter circuit  20  is composed of phase branches  18 , which are connected in parallel to the DC link and to the neutral point N. For each phase a, b, c (three as shown in  FIG. 1 ), a phase branch is present. Each phase branch  18  comprises an output connected to the electrical machine  14  through which the corresponding component of the output current i s,abc  flows. At its respective output, each phase branch  18  is adapted for providing an output or stator voltage at different voltage levels. These voltage levels may be synthesized by switching the semiconductor switches  22  of the phase branches  18  accordingly. 
       FIG. 2  shows a diagram with components of a controller  24  for the electrical converter  12 . In particular, an overall control diagram is shown, including outer control loops, the converter  12  and the load  14 . 
     Throughout the following text, normalized quantities are used. To this end, a per unit system may be introduced. Typical base values may be the peak value of a rated phase voltage of the electrical machine  14  and/or the peak value of a rated machine current, as well as a rated fundamental frequency. 
     All variables ξ abc =[ξ a  ξ b  ξ c ] T  in the three-phase system (abc) may be transformed to ξ αα0 =[ξ α  ξ β  ξ 0 ] T  in the stationary orthogonal αβ0-coordinate system through a Clarke transformation ξ αβ0 =Kξ abc . The inverse Clarke transformation may be given by ξ abc =K −1 ξ αβ0 . The transformation matrices of the Clarke and the inverse Clarke transformation may be 
     
       
         
           
             
               
                 
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     The first two elements of ξ αβ0 , ξ α  and ξ β , are the so-called differential-mode components, whereas the third element, ξ 0 , is the common-mode component. When only differential-mode components are required, the reduced Clarke transformation ξ αβ ={tilde over (K)}ξ abc  and the reduced inverse Clarke transformation ξ abc ={tilde over (K)} 1 ξ αβ  may be defined with the corresponding matrices 
     
       
         
           
             
               
                 
                   
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     Note that {tilde over (K)} holds the first two rows of K, and {tilde over (K)} −1  holds the first two columns of K −1 . K −1  is the pseudo-inverse of {tilde over (K)}, in which the 0-component is implicitly assumed to be zero. 
     In the following text, bold variables refer either to two-dimensional vectors of the form ξ αβ =[ξ α  ξ β ] T  or to three-dimensional vectors, such as ξ αβ0 =[ξ α  ξ β  ξ 0 ] T  and ξ abc =[ξ a  ξ b  ξ c ] T . 
     The variable t is used to denote a continuous time axis, with t∈ . The controller  24  may operate at regularly spaced discrete time steps or sampling time instants kT s , where k∈  is the controller time step and T s  is the controller sampling interval. For example, T s =25 μs may be chosen. 
     The total (instantaneous) DC-link voltage may be υ dc =υ dc,up +υ dc,lo  where υ dc,up  and υ dc,lo  denote the voltages over the upper and lower DC-link capacitors, respectively. The potential
 
υ n =½(υ dc,lo −υ dc,up )
 
of the neutral point N between the two DC-link capacitors may float.
 
     The electrical converter  12  may produce three voltage levels at its outputs with respect to the neutral point N. The voltage levels may be given by 
               {       -       υ   dc     2       ,   0   ,       υ   dc     2       }     .         
These voltages can be described by the integer variables u x ∈{−1,0,1}, with x∈{a,b,c} denoting one of the three phases. The three-phase switch position is defined as u abc =[u a  u b  u c ] T . In general, the switch positions u abc  also may be seen as normalized voltage levels.
 
     The phase voltages with respect to the neutral point N are given by 
     
       
         
           
             
               
                 
                   
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     The three-phase voltage is equal to υ abc =[υ a  υ b  υ c ] T . When the neutral point potential is close to zero, or equivalently, when the voltages over the upper and the lower DC-link capacitors in  FIG. 1  are approximately equal, the three-phase voltage can be written as 
     
       
         
           
             
               
                 
                   
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     In case an electrical machine is connected to the converter phase terminals, the machine&#39;s stator voltage in stationary orthogonal coordinates is
 
υ s,αβ   ={tilde over (K)}υ   abc .  (5)
 
     The machine is conveniently described by its stator and rotor flux linkage vectors in stationary orthogonal coordinates, i.e. by ψ s,αβ =[ψ sα  ψ sβ ] T  and ψ r,αβ =[ψ rα  ψ rβ ] T . Ψ s =∥ψ s,αβ ∥ T  is the magnitude of the stator flux vector. The magnitude of the rotor flux vector Ψ r  is defined accordingly. The angular frequency of the stator is denoted by ω s . Note that the stator and the rotor flux vectors rotate at this angular frequency. The electrical angular speed of the rotor is ω r =pω m , where p is the number of pole pairs and ω m  is the mechanical angular speed of the rotor. The difference between ω s  and ω r  is the slip frequency. 
     Alternatively, when the converter is connected to an electrical grid, the stator and rotor flux linkage vectors are replaced by virtual flux vectors. Specifically, the stator flux vector is replaced by the virtual converter flux vector, and the rotor flux vector is replaced by the grid flux vector, which is typically defined at the point of common coupling (PCC). 
     Outer Control Loop 
     Returning to  FIG. 2 , an inner control loop  26 , which generates a switch position signal u abc , is supplied by an outer control loop  28  with the modulation index m, a pulse number d, a stator flux reference magnitude Ψ* s , a stator flux reference angle θ* and an estimated stator flux vector ψ s,αβ . Furthermore, the neutral point potential υ n  and the carrier interval T c =1/f c , where f c  is the carrier frequency, are supplied to the inner control loop. 
     As described below, the inner control loop may either determine the switch position signal u abc  based on optimized pulse patterns or on (carrier-based) pulse width modulated switching patterns depending on the pulse number d. 
     The outer control loop  28  operates as following: 
     Based on the measured stator current vector i s,αβ  and the stator voltage υ s,αβ , the flux observer  30  estimates the estimated stator flux vector ψ s,αβ , the estimated rotor flux vector ψ r,αβ  and the estimated electromagnetic torque T e . From the estimated rotor flux vector ψ r,αβ , its magnitude Ψ r  and its angle position &lt;ψ r,αβ  are determined with blocks  32 ,  34 . 
     The speed controller  36  regulates the (electrical) angular speed ω r  of the rotor along its reference ω* r  by manipulating the setpoint of the electromagnetic torque T* e . The angular speed ω r  may be determined by an encoder  38 , which measures the speed of the rotor of the electrical machine  14 . 
     The torque controller  40  manipulates the desired load angle γ*, i.e. the desired angle between the stator flux vector and the rotor flux vector. The torque controller  40  requires the reference of the stator flux magnitude Ψ* s  and the actual magnitude of the rotor flux vector Ψ r . 
     The flux controller  42  maintains the magnitude of the stator flux vector close to its reference Ψ* s  by manipulating the modulation index m. In its simplest form, the feedforward term 
     
       
         
           
             
               
                 
                   m 
                   = 
                   
                     
                       2 
                       
                         υ 
                         dc 
                       
                     
                     ⁢ 
                     
                       ω 
                       s 
                     
                     ⁢ 
                     
                       Ψ 
                       s 
                       * 
                     
                   
                 
               
               
                 
                   ( 
                   6 
                   ) 
                 
               
             
           
         
       
     
     can be used for this purpose. In (6), υ dc  is the (instantaneous) total DC-link voltage and ω s  denotes the angular stator frequency. The angular stator frequency ω s  is determined in block  44  and is the angular speed at which the flux vectors rotate. 
     Optimized Pulse Patterns 
     The inner control loop  26  will either use optimized pulse patterns or pulse width modulated switching patterns for determining the switch position signal u abc . This is dependent on the pulse number d. For a pulse number d smaller as a threshold, optimized pulse patterns are used, while for a pulse number d higher as the threshold, the pulse width modulated switching patterns are used. 
     The use of optimized pulse patterns with high pulse numbers (for example in excess of d=20) may face the following practical limitations: (i) the offline computation of such optimized pulse patterns may be demanding and time consuming, (ii) these optimized pulse patterns may require a significant amount of storage capacity in the controller memory, and (iii) the incentive to use optimized pulse patterns diminishes, as the harmonic benefit of optimized pulse patterns over established modulation methods is significantly reduced at high pulse numbers. Thus it may be beneficial to determine pulse width modulated switching patterns online. 
     The need to operate at high pulse numbers arises naturally when operating at low fundamental frequencies. In drive applications, low fundamental frequencies correspond to low-speed operation. In power converters, the semiconductor losses and the adopted cooling technology usually impose an upper bound f sw,max  on the switching frequency. When the fundamental frequency f 1  varies, the pulse number needs to be adjusted according to 
     
       
         
           
             
               
                 
                   d 
                   = 
                   
                     floor 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       ( 
                       
                         
                           f 
                           
                             sw 
                             , 
                             max 
                           
                         
                         
                           f 
                           1 
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
           
         
       
     
     Thus, as the fundamental frequency reduces with lowering the drive speed, the required pulse number d increases, theoretically towards infinity at zero fundamental frequency. 
     The switching angles and switch positions of an optimized pulse pattern may be computed for one phase over a quarter of a fundamental period, assuming quarter- and half-wave symmetry and 1200 phase shift between the three phases. The number of (primary) switching angles over a quarter period is the so called pulse number d, which is a natural number. For three-level optimized pulse patterns and a neutral point clamped converter  12 , the switching frequency of a semiconductor device may be given by
 
 f   sw   =df   1 ,  (8)
 
     where f 1  denotes the frequency of the fundamental component. 
       FIG. 3  shows the parts of the inner control loop  26 , which are used for the storage, retrieval and modification of optimized pulse patterns. 
     The pattern loader  46  provides an operating point specific optimized pulse pattern  48 , which is determined by the modulation index m and the pulse number d. In order to ensure that the switching frequency does not exceed its maximum f sw,max , the pulse number d may be selected as the largest integer that does not exceed f sw,max /f 1  through (7). 
     The pattern loader  46  provides the vector of d primary switching angles A=[α 1  α 2  . . . α d ] T  and the corresponding vector of single-phase switch positions U=[u 1  u 2  . . . u d ] T . The latter is commonly referred to as the (single-phase) switching sequence. A three-phase optimized pulse pattern  48  over a complete period may be constructed based on the vectors A and U by using quarter- and half-wave symmetry. 
     A flux reference generator  50  may determine the stator flux reference ψ* s,αβ  from the vectors A and U as well as the modulation index m, the stator flux reference magnitude ψ* s  and the stator flux reference angle provided by the outer control loop  28 . The stator flux reference ψ* s,αβ  with the magnitude Ψ* s  and the angle (where the notation &lt;ξ αβ  is used to denote the angular position of the vector ξ αβ )
 
θ*=&lt;ψ r,αβ +γ*  (9)
 
     may be derived by integrating over time the voltage waveform of the optimized pulse pattern  48 . Alternatively, the stator flux reference ψ* s,αβ  may be derived from the corner points of the stator flux reference trajectory, which may be computed offline and stored in a look-up table. 
     Additionally, a common-mode flux reference component ψ* s0  may be added to the stator flux reference ψ* s,αβ  in order to control the neutral point potential υ n . Such a common-mode flux reference component ψ* v0  may be determined by a neutral point controller  56 , which may monitor the deviation of the neutral point potential through a virtual common-mode flux error. By correcting it, in effect, a common-mode voltage is injected that drives the neutral point potential υ n  to its reference. 
     The instantaneous stator flux error
 
ψ* s,err,αβ0 =ψ* s,αβ0 −ψ* s,αβ0   (10)
 
     is determined as the difference between the stator flux reference ψ* s,αβ0  and its estimate ψ s,αβ0 , of which the αβ components are provided by the outer control loop  28 . 
     With a switching pattern generator  52 , switching patterns  54  are constructed that hold in each phase the upcoming switching transitions. More specifically, the vector of single-phase switch positions
 
 U   x =[ u   x1   u   x2    . . . u   xn     x   ] T   (11)
 
     with n x  entries is constructed for the phase x, with x∈{a,b,c}. The nominal switching angles relative to the angle reference θ* are translated into nominal switching time instants or transition time instants (relative to the current time instant) by dividing them by the angular stator frequency ω s . This leads to the corresponding vector of nominal transition time instants
 
 T*   x =[ t*   x1   t*   x2    . . . t*   xn     x   ] T   (12)
 
     The pair U x  and T* x  forms the switching pattern  54  for phase x. A transition time instant t* xi  and its corresponding switch position u xi  may be seen as a switching transition. The pair U x  and T* x  may be seen as a sequence of switching transitions. 
     The pattern controller  58  receives the switching pattern  54  and manipulates the transition time instant t* xi  to reduce the stator flux error ψ s,err,αβ0 . In doing so, the stator flux vector is controlled along its reference trajectory and closed-loop control of the stator flux error ψ s,err,αβ0  is achieved. The optimization of the switching pattern  54  will be described in more detail with respect to  FIG. 4 . The result is a modified switching pattern. 
     In the present case of a three-phase converter  12 , the modified switching pattern (as well as the switching pattern  54 ) can be interpreted as a sequence of three-phase switch positions u abc =[u a  u b  u c ] T . The (integer) three-phase switch position  55  for the first sampling time interval is computed from the modified switching pattern and applied to the converter  12 . At the next sampling instant, the modified switching pattern is recomputed, in accordance with the receding horizon policy. 
     Pulse Width Modulated Switching Pattern 
       FIG. 4  shows the parts of the inner control loop  26 , which are used, when the pulse number d is higher than the threshold. In this case, the switching patterns  54  determined from offline computed optimized pulse patterns  48  are replace with online generated switching patterns  54 , which are based on pulse width modulation. 
     However, the same pattern controller  58  is used again. Also the pulse width modulated switching patterns  54  are modified by moving the transition time instants t* xi  to control the stator flux of the machine  12 . Switching to another control loop is avoided. Only the switching pattern  54  is changed, which may be compared to a switch between two optimized pulse patterns  48  with different pulse numbers. 
     In the case of  FIG. 4 , a flux reference generator  59  determines the stator flux reference vector ψ* s,αβ  directly from the stator flux reference magnitude Ψ* s  and the stator flux reference angle θ* provided by the outer control loop  24 . A common-mode flux reference component ψ* s0  may be added to the stator flux reference vector ψ* s,αβ  as described with respect to  FIG. 3 . The stator flux ψ* s,err,αβ0  may be determined as described with respect to  FIG. 3 . 
     In summary, a modulating signal generator  60  determines from the stator flux reference vector ψ* s,αβ  a modulating signal vector u* abc , which may be generated as a differential-mode modulating signal vector u* abc . A common-mode generator  62  may generate and add a common-mode component u* 0  to the modulating signal vector u* abc . A pattern generator  64  then generates the switching pattern  54  online from the modulating signal vector u* abc  based on (for example carrier-based) pulse width modulation. 
     In the following, the controller blocks  59 ,  60 ,  62 ,  64  and  58  will be described in more detail. 
     Differential-Mode Modulating Signal Generation 
     When the pulse number d is high, the ratio between the switching frequency and the fundamental frequency is high. Thus, the stator flux trajectory may be approximated by a circle, thus simplifying the implementation of the flux reference generator  59 . 
     Given the stator flux reference in terms of its angle θ*, see (9), and magnitude Ψ* s , the stator flux reference vector ψ* s,αβ  in stationary orthogonal coordinates directly follows to 
     
       
         
           
             
               
                 
                   
                     ψ 
                     
                       s 
                       , 
                       αβ 
                     
                     * 
                   
                   = 
                   
                     
                       
                         Ψ 
                         s 
                         * 
                       
                       ⁡ 
                       
                         [ 
                         
                           
                             
                               
                                 cos 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 
                                   ( 
                                   
                                     θ 
                                     * 
                                   
                                   ) 
                                 
                               
                             
                           
                           
                             
                               
                                 sin 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 
                                   ( 
                                   
                                     θ 
                                     * 
                                   
                                   ) 
                                 
                               
                             
                           
                         
                         ] 
                       
                     
                     . 
                   
                 
               
               
                 
                   ( 
                   13 
                   ) 
                 
               
             
           
         
       
     
     During steady-state operation, the reference angle is given by θ*=ω s t, where ω s  is the angular stator frequency. Therefore, the stator flux vector rotates with ω s . The stator flux reference vector ψ* s,αβ  is computed by the flux reference generator  59  based on (13). 
     Neglecting the stator resistance, the stator voltage is the derivative of the stator flux: 
     
       
         
           
             
               
                 
                   
                     υ 
                     
                       s 
                       , 
                       
                         a 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         β 
                       
                     
                     * 
                   
                   = 
                   
                     
                       d 
                       
                         d 
                         ⁢ 
                         t 
                       
                     
                     ⁢ 
                     
                       ψ 
                       
                         s 
                         , 
                         
                           a 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           β 
                         
                       
                       * 
                     
                   
                 
               
               
                 
                   ( 
                   14 
                   ) 
                 
               
             
           
         
       
     
     Inserting (13) into (14) leads to 
     
       
         
           
             
               
                 
                   
                     υ 
                     
                       s 
                       , 
                       
                         α 
                         ⁢ 
                         β 
                       
                     
                     ⋆ 
                   
                   = 
                   
                     
                       
                         Ψ 
                         s 
                         * 
                       
                       ⁢ 
                       
                         
                           ω 
                           s 
                         
                         ⁡ 
                         
                           [ 
                           
                             
                               
                                 
                                   
                                     - 
                                     s 
                                   
                                   ⁢ 
                                   in 
                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   
                                     ( 
                                     
                                       θ 
                                       * 
                                     
                                     ) 
                                   
                                 
                               
                             
                             
                               
                                 
                                   cos 
                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   
                                     ( 
                                     
                                       θ 
                                       * 
                                     
                                     ) 
                                   
                                 
                               
                             
                           
                           ] 
                         
                       
                     
                     = 
                     
                       
                         
                           ω 
                           s 
                         
                         ⁡ 
                         
                           [ 
                           
                             
                               
                                 0 
                               
                               
                                 
                                   - 
                                   1 
                                 
                               
                             
                             
                               
                                 1 
                               
                               
                                 0 
                               
                             
                           
                           ] 
                         
                       
                       ⁢ 
                       
                         ψ 
                         
                           s 
                           , 
                           αβ 
                         
                         * 
                       
                     
                   
                 
               
               
                 
                   ( 
                   15 
                   ) 
                 
               
             
           
         
       
     
     where it was used that the time derivative of the reference angle θ* is the angular stator frequency ω s . The stator voltage reference is thus equal to the stator flux reference rotated forward by 90 degrees and scaled by the angular stator frequency. 
     To obtain the three-phase (differential-mode) modulating signal vector u* abc , it is used that the converter voltage is equal to the stator voltage, see (5). Assuming the neutral point potential υ n  to be zero, and according to (4), the three-phase modulating signal vector u* abc  is scaled by half the total DC-link voltage v dc . This leads to 
     
       
         
           
             
               
                 
                   
                     u 
                     
                       a 
                       ⁢ 
                       b 
                       ⁢ 
                       c 
                     
                     * 
                   
                   = 
                   
                     
                       2 
                       
                         υ 
                         
                           d 
                           ⁢ 
                           c 
                         
                       
                     
                     ⁢ 
                     
                       
                         K 
                         ˜ 
                       
                       
                         - 
                         1 
                       
                     
                     ⁢ 
                     
                       
                         υ 
                         
                           s 
                           , 
                           
                             α 
                             ⁢ 
                             β 
                           
                         
                         ⋆ 
                       
                       . 
                     
                   
                 
               
               
                 
                   ( 
                   16 
                   ) 
                 
               
             
           
         
       
     
     The modulating signal generator  60  determines from the stator flux reference vector ψ* s,αβ  the modulating signal vector u* abc  based on (15) and (16). 
     Common-Mode Voltage Injection 
     The common-mode generator  62  may generate and add a common-mode component u* 0  to the modulating signal vector u* abc . In general, the common-mode component u* 0  may be added to the modulating signal vector u* abc  via u* abc +u* 0  or via 
     
       
         
           
             
               u 
               abc 
               * 
             
             = 
             
               
                 
                   K 
                   
                     - 
                     1 
                   
                 
                 ⁡ 
                 
                   [ 
                   
                     
                       
                         
                           u 
                           
                             α 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             β 
                           
                           * 
                         
                       
                     
                     
                       
                         
                           u 
                           0 
                           * 
                         
                       
                     
                   
                   ] 
                 
               
               . 
             
           
         
       
     
     One may distinguish between operation at very low speed and operation in the remaining (normal) operating range. At very low speed, the objective may be twofold: (1) avoidance of overly narrow switching pulses that violate the minimum on-time and must be typically dropped, and (2) avoidance of an uneven distribution of the semiconductor losses between the upper and the lower halves of the converter  12 . In normal speed operation, the current distortions may be reduced by injecting an appropriate common-mode voltage. 
     Low-Speed Common-Mode Voltage Injection 
     When operating at very low speed and correspondingly very low modulation indices, such as m∈[0,0.02], the modulating signal vector u* abc  may have a very small amplitude. As a result, the switch positions or the voltage levels are mostly zero with short positive (negative) pulses during the positive (negative) half-wave of the modulating signal vector u* abc . These pulses may have to meet a certain minimum width in time, the so called on-time. In high-power converters, the minimum on-time can be as long as t min =50 μs. Pulses of width between 0 and t min  may be either extended to t min  or removed by a post processing unit. As a result, switching may be avoided altogether when operating at very low modulation indices m, jeopardizing closed-loop control of the machine currents and flux vectors. 
     To avoid a dropping of pulses, a suitable common-mode component u* 0  may be injected. For instance, when operating at a small (non-negative) modulation index m&lt;&lt;1, the positive common-mode signal 
     
       
         
           
             
               
                 
                   
                     u 
                     0 
                     * 
                   
                   = 
                   
                     m 
                     + 
                     
                       
                         t 
                         min 
                       
                       
                         T 
                         c 
                       
                     
                   
                 
               
               
                 
                   ( 
                   17 
                   ) 
                 
               
             
           
         
       
     
     may shift the modulating signal vector u* abc  into the positive half and ensures that the minimum pulse width of t min  is met. Note that the offset t min /T c  in (17) may directly result from the rule of proportions applied to the carrier interval and the modulating signals. 
     The second issue, the uneven distribution of the semiconductor losses, may be caused by the low fundamental frequency. For a sinusoidal carrier-based pulse width modulation, during half the fundamental period, only the switches in the upper (or the lower) converter half may be used. To mitigate this issue, the injection of a sufficiently large common-mode signal as in (17) may be used to periodically shift the semiconductor losses between the two converter halves. This approach may distribute the losses more evenly, avoiding the need to derate the converter or to lower the switching frequency. 
     As a side effect, an offset in the modulating signal adds a bias to the neutral point current, thus increasing or decreasing the neutral point potential υ n . More specifically, in motoring mode, a positive u* 0  leads to a positive drift, dυ n (t)/dt&gt;0, whereas in generating mode a negative drift results. By flipping the sign of the common-mode term, the sign of the derivative of the neutral point potential υ n  can be reversed. This relation between u* 0  and dυ n  (t)/dt may be exploited to construct a hysteresis controller that keeps the neutral point potential υ n  within a pre-defined interval [υ n,min , υ n,max ]. Symmetrical bounds, i.e. υ n,max =−υ n,min  may be chosen. 
     An example of such a hysteresis controller is 
                       σ   0     ⁡     (   k   )       =     {           -       σ   p     ⁡     (   k   )                 if   ⁢           ⁢       υ   n     ⁡     (   k   )         ≥     υ     n   ,   max                     σ   p     ⁡     (   k   )               if   ⁢           ⁢       υ   n     ⁡     (   k   )         ≤     υ     n   ,   min                     σ   0     ⁡     (     k   -   1     )           otherwise                   (   18   )               
operating at the discrete time steps k∈ , where σ p (k)∈{−1,1} is the sign of the electrical power flow. By definition, the power flow is positive i motoring operation and negative in generating mode. The output of the hysteresis controller is the integer σ 0 (k)∈{−1,1}. The to-be-injected common-mode component is then
 
 u*   0 ( k )= û   0 σ 0 ( k ),  (19)
 
     where the non-negative scalar û 0  is a design parameter. For the modulation indices considered at low-speed operation, û 0 &gt;&gt;m+t min /T c  may be chosen. 
     The choice of û 0  is a trade-off between two considerations. On the one hand, for û 0 =0, the neutral point potential υ n  is characterised by a ripple with a particularly strong third harmonic component. On the other hand, a non-zero DC-offset ±û 0  adds to this ripple a linear increase or decrease of the neutral point potential υ n  over time. For large û 0 , this linear trend dominates over the ripple, thus facilitating the use of the hysteresis controller (18) and (19). However, an overly large û 0  requires frequent flipping of the sign σ 0  and increases the current distortions. 
     The selection of û 0  is thus determined by the magnitude of neutral point potential ripple and the degradation of harmonic performance. 
     Determining the sign of the power flow σ p  might be erroneous at low electrical power, owing to errors in the current and voltage measurements. An alternative hysteresis controller avoids the dependency on σ p , by simply reversing the sign whenever the bound is exceeded. This simplifies (18) to 
     
       
         
           
             
               
                 
                   
                     
                       σ 
                       0 
                     
                     ⁡ 
                     
                       ( 
                       k 
                       ) 
                     
                   
                   = 
                   
                     { 
                     
                       
                         
                           
                             
                               - 
                               
                                 
                                   σ 
                                   0 
                                 
                                 ⁡ 
                                 
                                   ( 
                                   
                                     k 
                                     - 
                                     1 
                                   
                                   ) 
                                 
                               
                             
                           
                           
                             
                               
                                 if 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 
                                    
                                   
                                     
                                       υ 
                                       n 
                                     
                                     ⁡ 
                                     
                                       ( 
                                       k 
                                       ) 
                                     
                                   
                                    
                                 
                               
                               ≥ 
                               
                                 υ 
                                 
                                   n 
                                   , 
                                   max 
                                 
                               
                             
                           
                         
                         
                           
                             
                               
                                 σ 
                                 0 
                               
                               ⁡ 
                               
                                 ( 
                                 
                                   k 
                                   - 
                                   1 
                                 
                                 ) 
                               
                             
                           
                           
                             otherwise 
                           
                         
                       
                       . 
                     
                   
                 
               
               
                 
                   ( 
                   20 
                   ) 
                 
               
             
           
         
       
     
     This control scheme, which balances the neutral point potential υ n  at low-speed operation while ensuring switching pulses of a minimum width may be implemented by the common-mode generator  62  according to (19) with (18) or (20). 
     Normal-Speed Common-Mode Voltage Injection 
     At higher modulation indices, say m&gt;0.02, the issue of overly short switching pulses is not present. Instead, it may be expedient to inject an appropriate common-mode component to the modulating signal to reduce the current distortions. 
     During normal speed operation one or more of the following terms may be added as common-mode component to the modulating signal vector u* abc : 
     
       
         
           
             
               
                 
                   
                     u 
                     0 
                     * 
                   
                   = 
                   
                     
                       m 
                       6 
                     
                     ⁢ 
                     
                       sin 
                       ⁡ 
                       
                         ( 
                         
                           
                             3 
                             ⁢ 
                             
                               ω 
                               1 
                             
                             ⁢ 
                             t 
                           
                           + 
                           
                             ϕ 
                             1 
                           
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   21 
                   ) 
                 
               
             
             
               
                 
                   
                     u 
                     0 
                     * 
                   
                   = 
                   
                     
                       - 
                       
                         1 
                         2 
                       
                     
                     ⁢ 
                     
                       ( 
                       
                         
                           min 
                           ⁡ 
                           
                             ( 
                             
                               u 
                               
                                 a 
                                 ⁢ 
                                 b 
                                 ⁢ 
                                 c 
                               
                               * 
                             
                             ) 
                           
                         
                         + 
                         
                           max 
                           ⁡ 
                           
                             ( 
                             
                               u 
                               
                                 a 
                                 ⁢ 
                                 b 
                                 ⁢ 
                                 c 
                               
                               * 
                             
                             ) 
                           
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   22 
                   ) 
                 
               
             
             
               
                 
                   
                     u 
                     0 
                     * 
                   
                   = 
                   
                     
                       
                         u 
                         _ 
                       
                       0 
                       * 
                     
                     + 
                     
                       1 
                       2 
                     
                     - 
                     
                       
                         1 
                         2 
                       
                       ⁢ 
                       
                         
                           ( 
                           
                             
                               min 
                               ⁡ 
                               
                                 ( 
                                 
                                   
                                     u 
                                     ¯ 
                                   
                                   abc 
                                   * 
                                 
                                 ) 
                               
                             
                             + 
                             
                               max 
                               ⁡ 
                               
                                 ( 
                                 
                                   
                                     u 
                                     ¯ 
                                   
                                   abc 
                                   * 
                                 
                                 ) 
                               
                             
                           
                           ) 
                         
                         . 
                       
                     
                   
                 
               
               
                 
                   ( 
                   23 
                   ) 
                 
               
             
           
         
       
     
     The first term (21) is a sinusoidal signal with the amplitude m/6, three times the angular fundamental frequency ω 1 =2πf 1  and the same phase ϕ 1  as the modulating signal. The addition of the second term (22) centers the three-phase modulating signal around zero. As a result, at any given time instant, −min(u* abc +u* 0 )=max(u* abc +u* 0 ) holds. The third term (23) is based on the scalar and three-phase terms
 
 ū*   0 =−½(min( u   abc   0 )+max( u*   abc ))  (24)
 
 ū*   abc =(( u*   abc   +ū*   0 +1)mod 1.  (25)
 
     Note that the term (24) is the same as in (22). The expression ξ mod 1 in (25) is defined as the remainder of the Euclidean division of ξ by one. The result is bounded between zero and one. 
     Any one of the three common-mode terms increases the linear modulation region from m=1 to 1.155. They also tend to reduce the current distortions. 
     During normal-speed operation, the common-mode generator  62  may implement the generation according to (21), (22) or (23). 
     As a further example, control of the neutral point potential υ n  may be achieved by manipulating the common-mode component u* 0  of the modulating signal vector u* abc . A positive common-mode component u* 0 , for example, shifts the phase voltages to the upper converter half. Depending on the sign of the phase current (or the direction of the power flow), this shift adds a positive or negative bias to the average current drawn from the neutral point, which, in turn, modifies the neutral point potential υ n . 
       FIG. 5  shows an example of such a controller  62 . The neutral point potential υ n  is low-pass filtered with a filter  66 , whose cut-off frequency is adapted in accordance with the angular stator frequency ω s . The filtered error of the neutral point potential υ n  is fed to a proportional controller with the gain k p  and multiplied by the sign of the electrical power flow σ p . The resulting common-mode voltage reference υ* 0  is scaled by half the DC-link voltage v dc  to obtain the common-mode component of the modulating signal. 
     This type of neutral point controls may tend to be slow, addressing the drift of the neutral point potential υ n  rather than its instantaneous value. On the other hand, instantaneous control of the common-mode voltage, and thus of the neutral point potential υ n , may be achieved by exploiting the redundancy in the voltage vectors. 
     Pulse Width Modulation 
     Pulse width modulation translates the modulating signal vector u* abc , which may be seen as a real-valued input signal, into the three-phase switch position vector u abc , which may be seen as a discrete-valued output signal using pulses of fixed amplitude but variable width. The output waveform u abc  approximates u* abc  regarding the magnitude and phase of its fundamental component. 
     An electrical converter  12  with DC-link voltage υ dc  may be used as actuator to translate the switch position vector u abc  into the switched voltage waveform υ abc  at the converter terminals. By appropriately scaling the reference voltage υ* abc , the converter voltage υ abc  approximates its reference υ* abc . This principle applies to both (machine-side) inverters and (grid-side) active rectifier. 
       FIG. 6  shows a diagram with examples for a modulating signal vector u* abc  and a switch position vector u abc . In this and all following diagrams the time axis is given in ms. 
     Carrier-based pulse width modulation for three-level (or N-level) converters is based on two (or N−1) carrier signals  68 . The carrier signals  68  may have triangular waveforms with the carrier frequency f c . Typically, the carrier frequency is (significantly) higher than the fundamental frequency, i.e. f c &gt;&gt;f 1 . The peak-to-peak magnitude of each carrier signal  68  is one. For a three-level converter, the carrier signals  68  are arranged such that they cover the range from −1 to 1 without overlapping. The phase shift between the two carrier signals is a design parameter. When choosing phase disposition, the two carrier signals are in phase, whereas in the phase opposite disposition, their phases are shifted by 180° with respect to each other. The former option is commonly used, because it results in lower harmonic distortions. The carrier interval 
     
       
         
           
             
               
                 
                   
                     T 
                     c 
                   
                   = 
                   
                     1 
                     
                       f 
                       c 
                     
                   
                 
               
               
                 
                   ( 
                   26 
                   ) 
                 
               
             
           
         
       
     
     is the time interval between the upper peaks of the carrier signal. The three phases a, b, c use the same carrier signals  68 . 
     Using asymmetric regular sampling and a carrier interval T c , a carrier signal  68  may be sampled every 0.5 T c  at the discrete time steps k c 0.5T c , k c ∈ . In general, the subscript c refers to “carrier”. 
     Carrier-based pulse width modulation is achieved by comparing each component u* a , u* b  and u* c  of the modulating signal vector u* abc  with the two (or more) carrier signals  68 . In phase a, for example, the switch position u a  is chosen based on the modulating signal u* a  and the following three rules: 
     When u* a  is less than both carrier signals, choose u a =−1. 
     When u* a  is less than the upper carrier signal, but exceeds the lower one, select u a =0. 
     When u* a  is greater than both carrier signals, choose u a =1. 
     In a digital implementation, u* abc  is a sampled signal, giving rise to regularly sampled pulse width modulation. With symmetric sampling, the modulating signal is sampled once per carrier interval T c , for example, at the upper triangular peaks. Throughout the remainder of the carrier interval, the modulating signal is held constant. With asymmetric sampling, the modulating signal is sampled twice per carrier interval, i.e. at the upper and at the lower peaks of the carrier. The modulating signal is held constant for half the carrier interval. 
     In  FIG. 6 , the dashed lines are continuous modulating signals, while the solid lines show asymmetric regularly sampled modulating signals. 
     Consider phase disposition and asymmetric sampling. The sampling instants of the modulating signal may be defined as t c =0.5T c k c , with k c ∈  being the discrete time step. Switching is performed when the sampled modulating signal u* abc (k c ) intersects with a carrier signal. This time instant (relative to the sampling instant t c ) is the switching instant or transition time instant. For phase a, for example, the variable t a  is introduced to denote the switching instant. The switching instants and the new switch positions can be derived as a function of the polarity of the modulating signal and the carrier slope. 
     The switching instants or transition time instants are shown in  FIG. 6  as vertical dashed lines. The resulting time evolution of the switching position u abc  is shown below. 
     Online Generation of Pulse Width Modulated Switching Pattern 
     The pattern generator  64  in  FIG. 4  generates a switching pattern  54  that is composed of the pair of vectors T* x  and U x  for each phase x∈{a,b,c}. The vectors T* x  contains the nominal transition time instants, whereas the vector U x  contains the single-phase switch positions or voltage levels of phase x. The definitions of these vectors is provided in (11) and (12). The switching patterns  54  are updated at the discrete time steps k c , as indicated in  FIG. 7 . Each switching pattern  54  spans a prediction horizon of K carrier half-intervals from 0.5T c k c  to 0.5T c (k c +K−1). The time step    c  denotes these half-intervals, where    c ∈{0, 1, . . . , K−1}. 
     To compute the switching pattern  54  at time step k c , the sampled modulating signal u* abc (k c ) is translated into the αβ0-coordinate system through the Clarke transformation matrix K, see (1), and then rotated forward    c  times assuming a constant angular frequency ω s . This allows one to predict future samples of the modulating signal at time steps k c +   c  according to 
     
       
         
           
             
               
                 
                   
                     
                       
                         u 
                         abc 
                         * 
                       
                       ⁡ 
                       
                         ( 
                         
                           
                             k 
                             c 
                           
                           + 
                           
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                             c 
                           
                         
                         ) 
                       
                     
                     = 
                     
                       
                         
                           K 
                           
                             - 
                             1 
                           
                         
                         ⁡ 
                         
                           [ 
                           
                             
                               
                                 
                                   cos 
                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   
                                     ( 
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                                     - 
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                                   ⁡ 
                                   
                                     ( 
                                     ρ 
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                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   
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                           * 
                         
                         ⁡ 
                         
                           ( 
                           
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                   , 
                 
               
               
                 
                   ( 
                   27 
                   ) 
                 
               
             
           
         
       
     
     where    c ∈{0, 1, . . . , K−1} and ρ=ω s 0.5T c     c . Recall that K −1  is the matrix of the inverse Clarke transformation. 
     The integer variable σ c (k c +   c )=(−1) (k     c     +       c     ) , with σ c ∈{−1,1}, indicates the sign of the carrier slope at time step k c +   c . The nominal switching instants relative to the time instant t c  are obtained through linear mappings of the modulating signals u* a , u* b , u* c . This mapping needs to be done depending on the polarity of the modulating signal and the carrier slope. This leads to four different cases for the first carrier half-interval (with    c =0) as shown in  FIG. 8 . The (   c +1)th switching transition in phase x occurs at the nominal time instant 
     
       
         
           
             
               
                 
                   
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                       ⁢ 
                       
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                           . 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   28 
                   ) 
                 
               
             
           
         
       
     
     The new switch positions are identified based on the polarity of the modulating signal 
     
       
         
           
             
               
                 σ 
                 x 
               
               ⁡ 
               
                 ( 
                 
                   u 
                   x 
                   * 
                 
                 ) 
               
             
             = 
             
               { 
               
                 
                   
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     and the sign of the carrier slope σ c . Thus,
 
 u   x(       c     +1) =½(σ x ( u*   x ( k   c +   c ))−σ c ( k   c +   c )).  (29)
 
     Additional switching transitions might occur at time step k c +   c  when the modulating signal changes its sign. An example is shown in  FIG. 9 , where an additional watching transition occurs at the time step k c +1. These additional transitions need to be captured and included when generating the witching patterns  54 . 
     Pattern Controller 
     The pattern controller  58  manipulates the switching instants of the switching pattern  54  to achieve fast closed-loop control of the stator flux.  FIG. 10  shows an example how switching instants may be moved by the pattern controller  58 . 
     As an example, a pattern controller based on deadbeat control is described in the following. 
     The pattern controller  58  operates at the sampling instants t=kT s , where T s &lt;&lt;T c . The inputs to the pattern controller  58  are the flux error ψ s,err,αβ0  and a switching pattern  54  with the pair of vectors T* x  and U x  as defined in (11) and (12) for each phase x, with x∈{a,b,c}. 
     The vector T=[t* x1  t* x2  . . . t* xn     x   ] T  captures the nominal, unmodified switching instants. In the case of  FIG. 4 , where a pulse width modulated switching pattern  54  is generated, these switching instants are given relative to the carrier sampling instant t c . At the input to the pattern controller  58 , the nominal switching instants are redefined as t* xi =t* xi −(t−t c ). As a result, by subtracting the time interval t−t c , the nominal switching instants in T* x  are defined relative to the current time instant t. In the case of  FIG. 3 , when using optimized pulse patterns, no modification of T* x  is required. 
     The vector U x  contains the single-phase switch positions of phase x. To denote changes in the switch positions, for phase x the ith switching transition is introduced
 
Δ u   xi   =u   xi   −u   x(i-1)  
 
     from the switch position u x(i-1)  to u xi . Typically, Δu xi  is limited to {−1,1}, but {−2,−1,1,2} etc. is also possible during large transients and disturbances. 
     The deadbeat control algorithm of the pattern controller  58  is summarized in the following. 
     Step 1. The required stator flux correction is translated from αβ0 to abc according to
 
Δψ s,abc   =K   −1 ψ s,err,αβ0 ,  (30)
 
     where the transformation matrix of the inverse Clarke transformation K −1  was defined in (1). 
     Step 2. The flux correction is scaled by the inverse of the instantaneous DC-link voltage to make it independent thereof. To this end, Δψ′ s,abc =[Δψ′ sa  Δψ′ sb  Δψ′ sc ] T  is introduced and defined as 
     
       
         
           
             
               
                 
                   
                     Δψ 
                     
                       s 
                       , 
                       abc 
                     
                     ′ 
                   
                   = 
                   
                     
                       2 
                       
                         υ 
                         dc 
                       
                     
                     ⁢ 
                     
                       
                         Δψ 
                         
                           s 
                           , 
                           abc 
                         
                       
                       . 
                     
                   
                 
               
               
                 
                   ( 
                   31 
                   ) 
                 
               
             
           
         
       
     
     For phase a, for example, this implies that the required volt-second modification in phase a is achieved by modifying n a  switching transitions in phase a by Δt ai , i.e. 
     
       
         
           
             
               
                 
                   
                     Δψ 
                     sa 
                     ′ 
                   
                   = 
                   
                     - 
                     
                       
                         ∑ 
                         
                           i 
                           = 
                           1 
                         
                         
                           n 
                           a 
                         
                       
                       ⁢ 
                       
                         Δ 
                         ⁢ 
                         
                           u 
                           ai 
                         
                         ⁢ 
                         Δ 
                         ⁢ 
                         
                           
                             t 
                             ai 
                           
                           . 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   32 
                   ) 
                 
               
             
           
         
       
     
     Similar statements hold for phases b and c. 
     Step 3. Phase x is considered and i is set to 1. For the ith switching transition in this phase with the nominal switching instant t* xi  and the switching transition Δu xi , the following operations are performed (see  FIG. 10 ): 
     1. The desired modification Δt xi =−Δψ* sx /Δu xi  is computed. 
     2. The switching instant is modified to t xi =t* xi +Δt xi . 
     3. The switching instant t xi  is constrained by imposing timing constraints. For i=1, 0≤t x1 ≤t* x2  is imposed, whereas for i&gt;1, t x(i 1) ≤t xi ≤t* x(i|1)  is imposed. 
     4. The desired volt-second correction in phase x is updated by replacing Δψ′ sx  with Δψ′ sx +Δu xi (t xi −t* xi ) 
     While the desired volt-second correction Δψ′ sx  in this phase is nonzero and a stopping criteria on i (such as i=n x ) has not been reached, i=i+1 is set and this procedure is repeated for the next switching transition. Step 3 is performed for each of the three phases. 
     As the deadbeat controller aims to remove the stator flux error as quickly as possible, and because corrections in the switching instants are not penalized, the deadbeat controller tends to be aggressive and it achieves fast responses during transients and disturbances. The prediction horizon is the time interval starting at the current time instant such that a certain number of switching transitions per phases is covered. In the simplest version, the prediction horizon is the shortest time interval until switching transitions in all three phases are included. In both cases, the length of the prediction horizon is time-varying. 
     Alternatively, an optimal control problem can be formulated with a quadratic cost function and linear constraints, which leads to a quadratic program (QP). The numerical result of the QP are the optimal modifications Δt xi  of the switching instants. 
       FIG. 11  shows, how the switching pattern  54  may be regularly determined at each sampling time instant kT s  over a prediction horizon T p . The upper part of the diagram shows the prediction horizon T p  at sampling time instant kT s , while the lower part shows the prediction horizon T p  at sampling time instant (k+1)T s . A modified pulse pattern  54  may be determined only for time interval within the moving prediction horizon T p . After that, the unmodified pulse pattern may be present. 
     Even though at time kT s  a sequence of switch positions is planned over the prediction horizon T p , only the switching sequence over the sampling interval T s  is applied to the converter  12 . Only the part of the modified switching pattern  54  that has a length in time equal to a difference between consecutive sampling time instants may be applied to the electrical converter  12 . 
     The predictions are recomputed at the next sampling instant (k+1)T s  using new measurements; a shifted and/or revised sequence of switch positions may be derived. This is referred to as receding horizon policy. This policy provides feedback and makes the controller robust to flux observer noise and modelling errors. 
     Simulation Results 
       FIGS. 12 a  to 12 d    show quantities of a converter system  10  during normal-speed operation and under the control of the controller  24  as described above. The carrier frequency is chosen as f c =400 Hz, which leads to a device switching frequency of approximately 200 Hz.  FIG. 12  shows simulation results for the system  10  operating at rated torque and 20% speed with the fundamental frequency f 1 =10 Hz. The corresponding pulse number is d=20. The modulating signal is shown in  FIG. 12 a   . The common-mode component (23) is added to the modulating signal to produce switching patterns  54  that are equivalent to space vector modulation. The resulting three-phase switch positions are shown in  FIG. 12 b   .  FIG. 12 c    shows the (piecewise affine) trajectory of the stator flux vector in the stationary orthogonal αβ-coordinate system. The stator flux trajectory is almost circular at this high pulse number. The rotor flux trajectory is the inner circular trajectory. The three-phase stator currents of the machine are shown in  FIG. 12 d   . The total demand distortion of the current is 7.5%. 
       FIGS. 13 a  to 13 d    show quantities of a converter system  10  during low-speed operation and under the control of the controller  24  as described above. The system  10  is operated at 2% speed, i.e. at f 1 =1 Hz, and rated torque. A quarter of the fundamental period is shown. The carrier frequency is kept at f c =400 Hz, resulting in the high pulse number d=200. A large common-mode offset of ±û 0  is added to the modulating signal. Specifically, û 0 =0.1 is chosen, which allows one to use the hysteresis controller (18) to control the neutral point potential υ n . The large common-mode offset ±û 0  shifts the three-phase switching pattern completely into the upper or the lower half, see  FIG. 13 b   . Whenever the neutral point potential υ n  hits its bounds at υ n,min =−0.025 and υ n,max =0.025, the hysteresis controller (18) flips the sign of the common-mode component. This happens at the time instants t=37.5 ms, 113.75 ms and 190 ms. Despite the significant common-mode component, the stator currents are almost sinusoidal, as can be seen in  FIG. 13   d.    
       FIGS. 14 a  and 14 b    show a switch from optimized pulse patterns to carrier-based pulse width modulated pulse patterns at time t=0. Before time t=0, an optimized pulse pattern with pulse number d=11 is used, whereas after time t=0, the switching patterns are generated online with the carrier to fundamental frequency ratio f c /f 1 =22. 
       FIG. 14 a    shows that the change in switching pattern generation does not cause any transient or disturbance. At time t=0, the shape of the flux reference changes from piecewise affine (for optimized pulse patterns) to sinusoidal. The stator flux ripple increases when using the online generated switching patterns, since these switching patterns and their flux trajectory are suboptimal. The corresponding three-phase switch positions are depicted in  FIG. 14 b   . The shift from optimized pulse patterns to pulse width modulated switching patterns with a fixed modulation cycle at time t=0 is clearly visible. 
     While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments. 
     Other variations to the disclosed embodiments can be understood and effected by those skilled in the art and practising the claimed invention, from a study of the drawings, the disclosure, and the appended claims. In the claims, the word “comprising” does not exclude other elements or steps, and the indefinite article “a” or “an” does not exclude a plurality. A single processor or controller or other unit may fulfil the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be construed as limiting the scope.