Patent Publication Number: US-2004048420-A1

Title: Method for embedding an air dielectric transmission line in a printed wiring board(PCB)

Description:
RELATED APPLICATIONS  
     [0001] The present application claims priority from U.S. Provisional Application No. 60/391,021 filed on Jun. 25, 2002 for Method for making an air dielectric transmission line in a printed wiring board by Ronald Brooks Miller.  
     [0002] U.S. patent application Ser. No. 10/094,761 filed Mar. 11, 2002, Publication no. 2003/0001698 A1 “Transmission structure with an Air Dielectric” describes an air dielectric transmission structure with dielectric cut-outs to provide partial air dielectric.  
     [0003] The notable differences between the cited invention and this invention are:  
     [0004] 1. The cited invention is for an assembly made from dielectric spacer layers with cut-out areas for air, while this invention is primarily for metallic spacer layers which can be readily manufactured in standard PCB fabrication process.  
     [0005] 2. The cited invention is for a structure, whereas this invention is for a laminated PCB.  
     [0006] 3. The cited invention uses arbitrary located cut-outs in the dielectric while this invention uses a channel that follows the signal trace where ever it goes.  
     [0007] 4. Wheras the cited invention uses a dielectric spacer, this invention uses dielectric materials plated or otherwise covered with metal to mimic a solid piece of metal in order to shield the trace for improved EMI performance  
     [0008] U.S. patent application Ser. No. 10/015,985 filed Nov. 2, 2001, Publication no 2002/0125967 A1, “An Air Dielectric Backplane Interconnection System” describes a backplane with an open transmission line insulated from main backplane using a series of dielectric spacers.  
     [0009] The notable differences between the cited Invention and this invention is that:  
     [0010] 1. The cited invention describes an assembly external to a PCB, the backplane, whereas this invention describes a method of embedding the transmission line into the PCB itself.  
     [0011] U.S. patent application Ser. No. 09/751,944 filed on Jan. 2, 2001 by Kim et al, publication no 2001/0015684, “Circuit Board, and method of Manufacturing Therefore” describes a transmission line on the outside of a printed circuit board with supports which hold the line up from the board creating a partial air dielectric for that line and different methods for manufacturing it.  
     [0012] The notable difference between the cited invention and this invention is that whereas the cited invention describes a transmission line on the outside of the printed circuit board this invention is for an internal line with air dielectric. Also, whereas the manufacture of the cited board relies on plating and building up the several layers and then removing them to expose an air transmission line, this board focuses on the shaping of the metal plates used for shielding and positioning the dielectric carrier which is then assembled or laminated with the dielectric layers which is nearly continuous across the planar surface. The dielectric layer carries the signal traces.  
     [0013] U.S. Pat. application Ser. No. 09/997,937 filed on Dec. 3, 2001 by David Lee, publication no 2003/0102249 A1, “Method and Apparatus for an Air-Cavity Package.” describes a method for encapsulating a PCB with many individually packaged components installed in an air-cavity to form a multi-component assembly.  
     [0014] The cited patent does not address the design or manufacture of the PCB as does the present patent.  
     [0015] U.S. patent application Ser. No. 10-162,277 filed on Jun. 3, 2002 by Noel A. Lopez publication no 2002/0186090 A1, “Method and apparatus for low loss High Radio Frequency Transmission” describes high frequency transmission system using suspended substrate transmission line for coupling several stages of a radio transmission system.  
     [0016] The present patent is not for a radio transmission system but is intended primarily for high speed digital or analog systems.  
     [0017] The cited patent does not address how the design in great detail but leaves implementation undefined. Typically in high frequency equipment suspended substrate is accomplished by sandwiching a piece of circuit board between metal plates and screwing them together.  
     [0018] The present patent is different in that the suspended substrate is embedded in the circuit board.  
     [0019] U.S. patent application Ser. No. 09/752,059 filed on Dec. 29, 2000 by Michael Wright publication no 2002/0084876 A1, “Slotted Ground Plane for Controlling the Impedance of High Speed Signals on a Printed Circuit Board”, describes using cut-outs in the ground plane of several shapes in order to raise the impedance of a trace on a particular layer, with no air dielectric used. No claim is made for improved electrical performance other than raising or varying the impedance.  
     [0020] The present patent in contrast uses air as the primary dielectric on these high speed lines, and has several other beneficial performance features.  
     [0021] U.S. patent application Ser. No. 09/794,066 filed on Feb. 28, 2001 by Albert Pergande publication no 2002/0118083 A1, “Millimeterwave Module Compact Interconnect” describes a method for interconnecting modules using an aperture cut in a ground plane as a coupling medium, for millimeter wavelength applications, and has nothing whatsoever to do with air dielectric printed circuit boards. Whereas the present patent focuses on air dielectric printed circuit boards.  
     [0022] U.S. patent application Ser. No. 09/963,641 filed on Sep. 27, 2001 by Yuichi Koga publication no 2002/0050870 A1, “Printed Board, Method for Producing the same and Electronic Device having the same, describes a method for equalizing the propagation time of traces with differing lengths in the same printed circuit board by using different dielectric constants and trace widths. The present patent focuses on air dielectric printed circuit boards.  
     [0023] U.S. Pat. No. 6,247,939 B1 issued on Jun. 19, 2001 by Bestul et al, “Connector for making multiple pressed co-axial connections having an air dielectric” describes a method of making an air dielectric connection vertically through a board board laying flat with a pin or in this case with pogo-pins connecting from top to bottom. Since the present patent deals with traces running through the board in a flat dimension with the board laying flat there is no conflict.  
     [0024] U.S. Pat. No. 7,712,607 issued on Jan. 27, 1998 by Dittmer, et al, “Air-Dielectric Stripline” describes a method for making a PCB with a partial air dielectric by the inclusion of dielectric spacers laminated into the board. In contrast, the present patent deals with an entire metal layer with the metal removed or absent in some places to provide an air dielectric.  
     [0025] U.S. Pat. No. 5,966,103 issued on Oct. 12, 1999, by Pons et al, “Electromagnetic lens of the printed circuit type with a suspended strip line” describes the making of a lens on suspended substrate.  
     [0026] The important differences between this cited patent and the present patent are:  
     [0027] Sited patent deals with a lense where the present patent does not.  
     [0028] and the present patent deals with a suspended line imbedded within a PCB where the cited patent does not.  
     [0029] U.S. Pat. No. 4,614,922 issued on Sep. 20, 1986 by Bauman describes a delay line or a microwave transmission line constructed of discrete plates and a PCB to make up a suspended substrate assembly for use in the Radio or RF domain.  
     [0030] The important difference between this patent and the cited patent is:  
     [0031] Cited patent is made from discrete components whereas this patent is for a PCB assembly.  
     [0032] Cited patent is for microwave, or RF usage while this patent is for a analog and high-speed digital usage.  
     [0033] U.S. Pat. No. 6,518,844 issued on Feb. 11, 2003 by Sherman et al. “Suspended transmission line with embedded amplifier” describes the integration of an assembly of an amplifier or other circuit, with a suspended transmission line assembly.  
     [0034] The cited patent applies to use in the Radio, Microwave and Radar fields. The novelty of this invention is the integration of an amplifier or other discrete circuit into a discretely assembled Suspended Substrate package.  
     [0035] All Claims of the cited patent are for an amplifier or other discrete assembly integrated into a transmission line assembly for RF applications.  
     [0036] In contrast, this patent is for a PCB with improved performance high-speed analog and digital performance.  
     [0037] U.S. Pat. No. 6,535,088 issued on Mar. 18, 2003 by Sherman et al. “suspended transmission line and Method” 
     [0038] Is similar to U.S. Pat. No. 6,518,844 by Sherman, with the the only difference being that:  
     [0039] The cited patent does not use an embedded amplifier or assembly,  
     [0040] The cited patent is different from U.S. Pat. No. 4,614,922 by Bauman only in that  
     [0041] the assembly uses a top and bottom trace on the carrier connected together at several points  
     [0042] Claim 1 that it is a method for transmitting a signal at a specified frequency.  
     [0043] The figures and most of the detailed text are identical to U.S. Pat. No. 6,518,844  
     [0044] Accordingly, this patent is different from U.S. Pat. No. 6,535,088 in that this one:  
     [0045] only uses one signal trace as in the origional patent by Bauman above contrasted with the cited patent claim using two traces tied together at several points.  
     [0046] Is a PCB(not discrete) for the interconnection of digital and analog signals. contrasted with the cited patent claim for transmitting a signal at a specified frequency.  
     [0047] U.S. Pat. No. 6,542,048 issued on Apr. 1, 2003 by Sherman et al. “Suspended Transmission Line with Signal Channeling Device” is similar to U.S. Pat. No. 6,518,844 by Sherman, and differs only in that a signal channeling device (microwave power divider) is implemented in the transmission lines.  
     [0048] The present patent is different from the patent cited in the same way that it is different from U.S. Pat. No. 6,535,088.  
     [0049] U.S. Pat. No. 6,552,635 issued on Apr. 22, 2003 by Sherman eta al. “Integrated Broadside Conductor for Suspended Transmission Line and Method” is similar to  6 , 535 , 088  and is different only in that no amplifier is embedded in it.  
     [0050] The present patent is different from the patent cited in the same way that it is different from U.S. Pat. No. 6,535,088. 
    
    
     
       BACKGROUND  
       [0051] 1. Field of the Invention  
       [0052] The present invention relates to a PCB design for application in analog and high speed digital applications using a air-dielectric suspended substrate. This will allow improved signal integrity, lower bit-error-rate, better eye pattern and higher-speed data signals.  
       [0053] 2. Description of the Related Art—the Need  
       [0054] Electronic data rates are ever increasing. Today we have gigahertz data rates and looking to terrahertz data rates in the future. Also, size reduction and cost reduction is constantly being pressed.  
       [0055] Some of the technical problems associated with designing and fabricating reliable interconnect of devices at these frequencies are:  
       [0056] 1. High Frequency attenuation  
       [0057] 2. Degradation of state transitions(dispersion of signal edge)  
       [0058] 3. Delay in the signal from one place to another  
       [0059] 4. Eye pattern distortion and closure  
       [0060] 5. Data errors.  
       [0061] 6. Group delay  
       [0062] 7. Reflections  
       [0063] These problems can be caused by the following factors  
       [0064] 1. The dielectric loss tangent  
       [0065] 2. Frequency dependency of loss tangent  
       [0066] 3. The dielectric Constant  
       [0067] 4. Frequency dependency of dielectric constant  
       [0068] 5. Skin effect  
       [0069] 6. Crosstalk  
       [0070] 7. Impedance variations  
       [0071] 8. Frequency dependency of impedance variations(stubs etc.)  
       [0072] By using air as the primary dielectric, the dielectric constant and the dielectric loss tangent are at the optimal values, namely 1 and 0. Also, since the trace is surrounded by a metal shield nearly all crosstalk is eliminated.  
       [0073] The remaining degradation to the signal is:  
       [0074] skin effect which cannot be improved without increasing the size and  
       [0075] impedance variations which are geometry based.  
       Suspended Substrate—a Possible Answer  
       [0076] Definition: Suspended substrate, is a mechanical means for mounting a thin substrate with a conductive trace between two conductive planes with an air dielectric between the trace and the top and bottom conductive planes.  
       Microwave Implimentation:—Historical  
       [0077] In the past Suspended Substrate was used in RF and Microwave applications. The implimentation method was to sandwich the substrate layer between the top and bottom conductive planes, with channels milled into the conductive planes above and below the trace, so that the trace would not short out to the planes.  
       [0078] The top and bottom plates are milled images of each other.  
       [0079] One or more signal traces are positioned between the plates by a thin dielectric carrier layer.  
       [0080] The milling in the conductive planes forms an air channel which follows the conductive traces.  
       [0081] The channel is wider than the conductive trace to ensure that the traces are not connected or shorted to the planes.  
       [0082] The milling is to a controlled depth.  
       [0083] The top and bottom conductive planes and the dielectric carrier layer are connected mechanically and electrically together using nuts and bolts.  
       [0084] When viewing the traces from the edge of the structure the trace rides on a thin dielectric membrane in an air channel surrounded by a conductor, mimicking a coaxial structure.  
       PCB Implementation of Suspended Substrate—this Patent is the Answer  
       [0085] Several methods for improving the signal integrity in Printed Circuit Boards(PCB&#39;s), by the use of embedded air dielectric suspended on a thin dielectric are mentioned in the claims above. The most cost effective means to improve the performance is to use a metal layer as a spacer with metal removed to preclude shorting the signal trace. The metal can be easily removed by several inexpensive methods.  
       SUMMARY OF INVENTION  
       [0086] Air used as a dielectric has the lowest dissipation factor and the lowest dielectric constant of all dielectric materials. Since the dissipation factor is nearly zero, the high frequency losses in the dielectric are nearly eliminated, and for high frequency signals, the dominant remaining losses are skin effect and radiation losses. Since the dielectric constant of air is essentially one (1) the velocity of propagation is nearly the speed of light.  
       [0087] In contrast standard PCB materials have dielectric losses which are the dominant loss factor above 1 or 2 Ghz. The skin effect and radiation are the same as in air but being a smaller percentage of the total loss. Also, typical PCB materials have a dielectric factor ranging from 2 to 4, which results in the propagation through the board being reduced to 1/sqrt(dielectric factor) or from 0.7 or 0.5 which alternatively stated, the delay is increased by 50 percent to about 100 percent of the velocity in air.  
       [0088] Both the dielectric constant and the dielectric loss factor are frequency dependent which causes dispersion of the transition from one voltage state to another. The result is deformed and extended rise-time and fall-time, and jitter in the eye pattern. This results in data errors and poor bit-error-rates.  
       [0089] In order to use air as the primary dielectric in a PCB, a structure resembling suspended substrate is used. A metal trace is suspended in air on a thin dielectric much like a road on a bridge across a large air space is suspended. The bridge being the thin dielectric, the road being the trace, and the air being the air above and below.  
       [0090] In the PCB, two conductive planes, one above and one below provide the signal return, reference and shielding. These two planes may be power or ground planes but are not required to be power or ground.  
       [0091] The air dielectric is typically formed by adding spacing layers above and below the thin dielectric layer supporting the signal trace. Conductive planes above and below the spacers provide the AC ground return for the signal on the signal trace. The spacing material may be either conductive, resistive, or insulated, and need not be uniform in composition. The spacing may also be made by milling or otherwise forming an indentation to insulate the conductive planes from the traces, by any process including, but not limited to etching, plating, milling, punching, drawing, forming, or stamping  
       [0092] The dielectric layer(s) is(are) laminated with the formed metal planes, or the metal planes with the metal spacer layer.  
       [0093] A simple method for making interconnect(vias) is to drill oversized holes in the metal planes or spacers before lamination. Add dielectric to fill the oversized holes either before, or after lamination. After lamination, via holes are drilled and plated as in standard PCB processing.  
       [0094] A mixture of standard PCB layers and air dielectric layers can be used as needed within the same PCB. Adhesive sheets, or coatings may be used to adhere the metal layers together. Thin adhesive material has no degrading effects because if it is conductive the metal shell is conductive and if it is not, the capacitance across the gap will be make it appear to be connected for all high-speed signals.  
       Improved Performance  
       [0095] The PCB will have much better impedance control compared to standard PCB tolerances for two reasons. First, the depth tolerance of can be much better controlled than the tolerance of standard dielectric material which flows and is non-uniform compared with sheet metal spacer that sets the spacing. Secondly, the dielectric constant of air one and does not vary, compared with standard materials which vary across a broad range.  
       [0096] The use of air dielectric provides a very low dielectric loss factor for high frequency, microwave and high speed digital signals up into the gigahertz and gigabit frequencies, compared to standard dielectric materials.  
       [0097] The use of air dielectric provides the shortest time delay or the fastest transition time for a given trace length, compared to standard dielectric materials. Epoxy fiberglass material has a delay of approximately 2× the free space velocity of light while this application of air dielectric can approach the free space velocity of light.  
       [0098] Air dielectric also minimizes the dispersion of the transition of the signal from one voltage to another caused by frequency dependent dielectric losses and phase shift which are not present in air.  
       [0099] The use of air dielectric increases the trace impedance for traces with the same width to height ratio by a factor of approximately 2. Alternatively stated, for a given impedance and trace width, the height may be reduced by a factor of approximately 2.  
       [0100] Where a data-bus or non-synchronous signals share the same channel, the cross-talk from signal to signal within the same channel can be reduced by the use of an air dielectric and by reducing the height spacing of the trace to the metal plate compared to the cross-talk of a strip-line transmission line with the same impedance and the same spacing of traces. 
     
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0101]FIG. 1 shows an expanded orthogonal view of a cross section of a single layer of signal suspended in air per claim 1 for the purposes of envisioning the invention. The assembly is made by laminating the three layers together.  
     [0102]FIG. 2 shows the basic structure of claim 1 with (1) a top metal plate, (2) a central dielectric layer, and (2) a bottom metal plates. The conductive trace on the central dielectric is located in the middle of the channel in the two metal plates.  
     [0103]FIG. 3 is similar to FIG. 2 in all respects except that the top metal plate is made up of a top plane or shield, and a spacer plate. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT  
     [0104] The most likely embodiment at the present time is the configuration of FIG. 2 with the top conductive layer and bottom conductive layer being a sheet of 1 mill copper. The two spacer layers would be photo-etched metal approximately 4 mils thick available from several vendors. The signal trace will be approximately 6 mils wide on a dielectric layer of FR4 approximately 1 mil thick. The channel will be approximately 10 mills wide. The impedance will be approximately 50 ohms and will have a transit time approximately 90% of the speed of light, and an RF attenuation attributable only to skin effect and DC loss.  
     [0105] Via preparation will use oversize drilling of the metal sheets, filling these drill holes with dielectric material by squeegee or by pressing, and curing the dielectric. At this point standard PCB fabrication and assembly will begin complete the process.  
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0106]FIG. 1 is an expanded orthogonal view of one layer with three parallel lines intended to help in visualizing how the signal trace is suspended in air riding on the dielectric carrier. Note that the top channels are mirror image of the bottom channels so that when the assembly is laminated the trace is in a shielded enclosure.  
     [0107] The metal plates have the metal removed, most likely by milling or forming or some other method depending on cost.  
     [0108] Also, note that the dielectric carrier layer is thin and provides a virtual short due to the capacitance from one plate to the other.  
     [0109]FIG. 2 is an end-on view of a single air dielectric trace in the metal channels.  
     [0110]FIG. 2A is an end-on view of a differential pair in air dielectric  
     [0111]FIG. 2B is an end-on view of a 4 signal data-bus in air dielectric  
     [0112]FIG. 3 is an alternative fabrication method using separate spacer layers and top and bottom shields.  
     [0113] An adhesive may be either applied to the metal or may be a sheet.  
     [0114] The advantage of this method that the spacing from signal trace to the top and bottom plate is precisely determined by the thickness of the spacer layer, at very little cost but provides very accurate impedance control.  
     [0115]FIG. 4 illustrates:  
     [0116] The stacking of multiple layers of air-dielectric assembly.  
     [0117] The use of a single metal plate between dielectric layers.  
     [0118] And can be applied to any other combination such as differential pairs and data busses.  
     [0119]FIG. 5 illustrates an offset method of construction for a multi-layer assembly:  
     [0120] For improved signal trace density  
     [0121] With cost effective forming or stamping possible with sheet metals.  
     [0122]FIG. 5A 
     [0123] illustrates a offset construction method  
     [0124] combined with differential traces.  
     DETAILED DESCRIPTION OF THE INVENTION  
     Cost Saving  
     [0125] The present invention of embedding an air dielectric in a PCB is targeted at analog and digital markets with highly improved performance at minimum cost differential compared to standard PCB manufacture. In fact, the material cost will be lower than required using standard materials and techniques.  
     [0126] The impedance of all the applications and figures used in this invention is especially uniform through the structure, both from layer to layer, and from trace to trace on the same layer because we do not deal with a dielectric material which varies in thickness, in dielectric constant and loss factor from piece to piece, from batch to batch, from location to location on the same laminate, but only with the thickness of metal sheet or foil which is rolled to very tight tolerances.  
     [0127] The manufacture of standard PCBs with impedance controlled within 10% typically adds 20 percent to the cost of the boards and tolerances tighter than 7% are not obtainable except at huge cost premiums. The reason for this cost premium is that the partially laminated board must be tested for impedance, the etching time and material selection adjusted to make up for material variations and finally assembled. No process adjustment can make up for variations in thickness and material across the board.  
     [0128] This invention will make possible the manufacture of boards with impedances controlled under 5 percent standard, and 2 percent economically practical when needed.  
     Loadboards  
     [0129] In the digital applications, the first focus is on assemblies like “test boards” and “load boards”, used in automatic test equipment(ATE). The time delay of these boards, typically 3 to 5 nS, can nearly be cut in half, which means twice as many devices can be tested in a given time on a given tester. Since the testers typically cost between 1 and 5 million dollars, the value proposition of these boards is enormous.  
     [0130] Loadboards would normally use FIG. 1, FIG. 2, and FIG. 3 as the simplest method for making completely isolated test signal traces.  
     Personal Computers  
     [0131] Secondly, in digital applications, the PCI bus comes to mind. The PCI bus is limited in its speed by reflections because it is an un-terminated bus. So, the set-time requirement is long, requiring that the signal and its reflections settle out to a stable state before the receiving device can latch the data with the clock. Accordingly, when the delay of the signal up and down the bus is shorter the settling of the data to a stable state can occur faster. The use of air-dielectric can cut this delay in half, and increase the speed by two.  
     [0132] Since the bottle-neck in increasing the speed of personal computers is not the processor or the memory, but the PCI bus, this can have a huge effect in improving the performance and should make personal computers an even better cost to value proposition.  
     [0133] On the PCI bus several parallel traces parallel can be encompassed within a single channel in the metal plates.  
     [0134] Cross-talk between traces of the data bus is reduced by using air-dielectric because for a given impedance and trace width, the height can be reduced by a factor of SQRT(0.5) or about 0.7. As the height between the ground-planes is reduced the cross-talk from trace to trace is also reduced by about half.  
     [0135] PCI would normally use a configuration similar to FIG. 2B with 4 or more traces per channel. Using 8 or more traces might cause manufacturing yields to drop if the channel height becomes compressed from lamination.  
     [0136] Other parallel data busses would use similar structures.  
     High Speed Differential Signals  
     [0137] High speed differential signals, especially at 1 Gigahertz and above suffer excess attenuation from standard dielectric materials and dispersion of the signal transitions, which limit the length they can traverse a PCB. Using air-dielectric can allow much longer traces for the same performance or better performance for the same trace lengths.  
     [0138] In some high speed digital PCB Assemblies, trace compensation using pre-emphasis at the driving end of the signals, passive equalization, or receive end signal equalization hardware is used.  
     [0139] The use of air-dielectric will in many applications make trace compensation unnecessary in many cases, simplifying design and reducing costs.  
     [0140]FIG. 2A illustrates a typical method of implementing a differential trace on a high speed PCB. Such a trace should provide satisfactory performance for 4 inch traces or more up to 10 GBS, compared to 2 inches in FR4.  
     Motherboards and Backplanes  
     [0141] Backplanes and motherboards require very high-density interconnect with minimum spacing and maximum trace lengths, and are subject to maximum crosstalk and external EMI.  
     [0142]FIG. 5 shows 4 signal traces mounted on two dielectric layers traversing a honeycomb structure made up of formed metal corrugations offset to pass the signal traces without shorting. This arrangement provides maximum trace density, minimum crosstalk, minimum signal degradation and is impervious to external EMI, and allows minimum radiated EMI.  
     [0143] For High-Speed Differential traces within a motherboard or backplane, FIG. 5A illustrates an optimum solution  
     BACKGROUND  
     Description of the Related Art—the Need  
     [0144] Electronic data rates are ever increasing. Today we have gigahertz data rates and looking to terrahertz data rates in the future. Also, size reduction and cost reduction is constantly being pressed.  
     [0145] Some of the technical problems associated with designing and fabricating reliable interconnect of devices at these frequencies are:  
     [0146] 1. High Frequency attenuation  
     [0147] 2. Degradation of state transitions(dispersion of signal edge)  
     [0148] 3. Delay in the signal from one place to another  
     [0149] 4. Eye pattern distortion and closure  
     [0150] 5. Data errors.  
     [0151] 6. Group delay  
     [0152] 7. Reflections  
     [0153] These problems can be caused by the following factors  
     [0154] 1. The dielectric loss tangent  
     [0155] 2. Frequency dependency of loss tangent  
     [0156] 3. The dielectric Constant  
     [0157] 4. Frequency dependency of dielectric constant  
     [0158] 5. Skin effect  
     [0159] 6. Crosstalk  
     [0160] 7. Impedance variations  
     [0161] 8. Frequency dependency of impedance variations(stubs etc.)  
     [0162] By using air as the primary dielectric, the dielectric constant and the dielectric loss tangent are at the optimal values, namely 1 and 0. Also, since the trace is surrounded by a metal shield nearly all crosstalk is eliminated.  
     [0163] The remaining degradation to the signal is:  
     [0164] skin effect which cannot be improved without increasing the size and  
     [0165] impedance variations which are geometry based.  
     Suspended Substrate—a Possible Answer  
     [0166] Definition: Suspended substrate, is a mechanical means for mounting a thin substrate with a conductive trace between two conductive planes with an air dielectric between the trace and the top and bottom conductive planes.  
     Microwave Implimentation:—Historical  
     [0167] In the past Suspended Substrate was used in RF and Microwave applications. The implimentation method was to sandwich the substrate layer between the top and bottom conductive planes, with channels milled into the conductive planes above and below the trace, so that the trace would not short out to the planes.  
     [0168] The top and bottom plates are milled images of each other.  
     [0169] One or more signal traces are positioned between the plates by a thin dielectric carrier layer.  
     [0170] The milling in the conductive planes forms an air channel which follows the conductive traces.  
     [0171] The channel is wider than the conductive trace to ensure that the traces are not connected or shorted to the planes.  
     [0172] The milling is to a controlled depth.  
     [0173] The top and bottom conductive planes and the dielectric carrier layer are connected mechanically and electrically together using nuts and bolts.  
     [0174] When viewing the traces from the edge of the structure the trace rides on a thin dielectric membrane in an air channel surrounded by a conductor, mimicking a coaxial structure.  
     PCB Implementation of Suspended Subetrat—this Patent is the Answer  
     [0175] Several methods for improving the signal integrity in Printed Circuit Boards(PCB&#39;s), by the use of embedded air dielectric suspended on a thin dielectric are mentioned in the claims above. The most cost effective means to improve the performance is to use a metal layer as a spacer with metal removed to preclude shorting the signal trace. The metal can be easily removed by several inexpensive methods.  
     SUMMARY OF INVENTION  
     [0176] Air used as a dielectric has the lowest dissipation factor and the lowest dielectric constant of all dielectric materials. Since the dissipation factor is nearly zero, the high frequency losses in the dielectric are nearly eliminated, and for high frequency signals, the dominant remaining losses are skin effect and radiation losses. Since the dielectric constant of air is essentially one (1) the velocity of propagation is nearly the speed of light.  
     [0177] In contrast standard PCB materials have dielectric losses which are the dominant loss factor above 1 or 2 Ghz. The skin effect and radiation are the same as in air but being a smaller percentage of the total loss. Also, typical PCB materials have a dielectric factor ranging from 2 to 4, which results in the propagation through the board being reduced to 1/sqrt(dielectric factor) or from 0.7 or 0.5 which alternatively stated, the delay is increased by 50 percent to about 100 percent of the velocity in air.  
     [0178] Both the dielectric constant and the dielectric loss factor are frequency dependent which causes dispersion of the transition from one voltage state to another. The result is deformed and extended rise-time and fall-time, and jitter in the eye pattern. This results in data errors and poor bit-error-rates.  
     [0179] In order to use air as the primary dielectric in a PCB, a structure resembling suspended substrate is used. A metal trace is suspended in air on a thin dielectric much like a road on a bridge across a large air space is suspended. The bridge being the thin dielectric, the road being the trace, and the air being the air above and below.  
     [0180] In the PCB, two conductive planes, one above and one below provide the signal return, reference and shielding. These two planes may be power or ground planes but are not required to be power or ground.  
     [0181] The air dielectric is typically formed by adding spacing layers above and below the thin dielectric layer supporting the signal trace. Conductive planes above and below the spacers provide the AC ground return for the signal on the signal trace. The spacing material may be either conductive, resistive, or insulated, and need not be uniform in composition. The spacing may also be made by milling or otherwise forming an indentation to insulate the conductive planes from the traces, by any process including, but not limited to etching, plating, milling, punching, drawing, forming, or stamping  
     [0182] The dielectric layer(s) is(are) laminated with the formed metal planes, or the metal planes with the metal spacer layer.  
     [0183] A simple method for making interconnect(vias) is to drill oversized holes in the metal planes or spacers before lamination. Add dielectric to fill the oversized holes either before, or after lamination. After lamination, via holes are drilled and plated as in standard PCB processing.  
     [0184] A mixture of standard PCB layers and air dielectric layers can be used as needed within the same PCB. Adhesive sheets, or coatings may be used to adhere the metal layers together. Thin adhesive material has no degrading effects because if it is conductive the metal shell is conductive and if it is not, the capacitance across the gap will be make it appear to be connected for all high-speed signals.  
     Improved Performance  
     [0185] The PCB will have much better impedance control compared to standard PCB tolerances for two reasons. First, the depth tolerance of can be much better controlled than the tolerance of standard dielectric material which flows and is non-uniform compared with sheet metal spacer that sets the spacing. Secondly, the dielectric constant of air one and does not vary, compared with standard materials which vary across a broad range.  
     [0186] The use of air dielectric provides a very low dielectric loss factor for high frequency, microwave and high speed digital signals up into the gigahertz and gigabit frequencies, compared to standard dielectric materials.  
     [0187] The use of air dielectric provides the shortest time delay or the fastest transition time for a given trace length, compared to standard dielectric materials. Epoxy fiberglass material has a delay of approximately 2× the free space velocity of light while this application of air dielectric can approach the free space velocity of light.  
     [0188] Air dielectric also minimizes the dispersion of the transition of the signal from one voltage to another caused by frequency dependent dielectric losses and phase shift which are not present in air.  
     [0189] The use of air dielectric increases the trace impedance for traces with the same width to height ratio by a factor of approximately 2. Alternatively stated, for a given impedance and trace width, the height may be reduced by a factor of approximately 2.  
     [0190] Where a data-bus or non-synchronous signals share the same channel, the cross-talk from signal to signal within the same channel can be reduced by the use of an air dielectric and by reducing the height spacing of the trace to the metal plate compared to the cross-talk of a strip-line transmission line with the same impedance and the same spacing of traces.  
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0191]FIG. 1 shows an expanded orthogonal view of a cross section of a single layer of signal suspended in air per claim 1 for the purposes of envisioning the invention. The assembly is made by laminating the three layers together.  
     [0192]FIG. 2 shows the basic structure of claim 1 with (1) a top metal plate,(2) a central dielectric layer, and(2) a bottom metal plates. The conductive trace on the central dielectric is located in the middle of the channel in the two metal plates.  
     [0193]FIG. 3 is similar to FIG. 2 in all respects except that the top metal plate is made up of a top plane or shield, and a spacer plate.  
     DESCRIPTION OF THE PREFERRED EMBODIMENT  
     [0194] The most likely embodiment at the present time is the configuration of FIG. 2 with the top conductive layer and bottom conductive layer being a sheet of 1 mill copper. The two spacer layers would be photo-etched metal approximately 4 mils thick available from several vendors. The signal trace will be approximately 6 mils wide on a dielectric layer of FR4 approximately 1 mil thick. The channel will be approximately 10 mills wide. The impedance will be approximately 50 ohms and will have a transit time approximately 90% of the speed of light, and an RF attenuation attributable only to skin effect and DC loss.  
     [0195] Via preparation will use oversize drilling of the metal sheets, filling these drill holes with dielectric material by squeegee or by pressing, and curing the dielectric. At this point standard PCB fabrication and assembly will begin complete the process.  
     BRIEF DESCRIPTION OF THE DRAWINGS  
     [0196]FIG. 1 is an expanded orthogonal view of one layer with three parallel lines intended to help in visualizing how the signal trace is suspended in air riding on the dielectric carrier. Note that the top channels are mirror image of the bottom channels so that when the assembly is laminated the trace is in a shielded enclosure.  
     [0197] The metal plates have the metal removed, most likely by milling or forming or some other method depending on cost.  
     [0198] Also, note that the dielectric carrier layer is thin and provides a virtual short due to the capacitance from one plate to the other.  
     [0199]FIG. 2 is an end-on view of a single air dielectric trace in the metal channels.  
     [0200]FIG. 2A is an end-on view of a differential pair in air dielectric  
     [0201]FIG. 2B is an end-on view of a 4 signal data-bus in air dielectric  
     [0202]FIG. 3 is an alternative fabrication method using separate spacer layers and top and bottom shields.  
     [0203] An adhesive may be either applied to the metal or may be a sheet.  
     [0204] The advantage of this method that the spacing from signal trace to the top and bottom plate is precisely determined by the thickness of the spacer layer, at very little cost but provides very accurate impedance control.  
     [0205]FIG. 4 illustrates:  
     [0206] The stacking of multiple layers of air-dielectric assembly.  
     [0207] The use of a single metal plate between dielectric layers.  
     [0208] And can be applied to any other combination such as differential pairs and data busses.  
     [0209]FIG. 5 illustrates an offset method of construction for a multi-layer assembly:  
     [0210] For improved signal trace density  
     [0211] With cost effective forming or stamping possible with sheet metals.  
     [0212]FIG. 5A 
     [0213] illustrates a offset construction method  
     [0214] combined with differential traces.  
     DETAILED DESCRIPTION OF THE INVENTION  
     Cost Saving  
     [0215] The present invention of embedding an air dielectric in a PCB is targeted at analog and digital markets with highly improved performance at minimum cost differential compared to standard PCB manufacture. In fact, the material cost will be lower than required using standard materials and techniques.  
     [0216] The impedance of all the applications and figures used in this invention is especially uniform through the structure, both from layer to layer, and from trace to trace on the same layer because we do not deal with a dielectric material which varies in thickness, in dielectric constant and loss factor from piece to piece, from batch to batch, from location to location on the same laminate, but only with the thickness of metal sheet or foil which is rolled to very tight tolerances.  
     [0217] The manufacture of standard PCBs with impedance controlled within 10% typically adds 20 percent to the cost of the boards and tolerances tighter than 7% are not obtainable except at huge cost premiums. The reason for this cost premium is that the partially laminated board must be tested for impedance, the etching time and material selection adjusted to make up for material variations and finally assembled. No process adjustment can make up for variations in thickness and material across the board.  
     [0218] This invention will make possible the manufacture of boards with impedances controlled under 5 percent standard, and 2 percent economically practical when needed.  
     Loadboards  
     [0219] In the digital applications, the first focus is on assemblies like “test boards” and “load boards”, used in automatic test equipment(ATE). The time delay of these boards, typically 3 to 5 nS, can nearly be cut in half, which means twice as many devices can be tested in a given time on a given tester. Since the testers typically cost between 1 and 5 million dollars, the value proposition of these boards is enormous.  
     [0220] Loadboards would normally use FIG. 1, FIG. 2, and FIG. 3 as the simplest method for making completely isolated test signal traces.  
     Personal Computers  
     [0221] Secondly, in digital applications, the PCI bus comes to mind. The PCI bus is limited in its speed by reflections because it is an un-terminated bus. So, the set-time requirement is long, requiring that the signal and its reflections settle out to a stable state before the receiving device can latch the data with the clock. Accordingly, when the delay of the signal up and down the bus is shorter the settling of the data to a stable state can occur faster. The use of air-dielectric can cut this delay in half, and increase the speed by two.  
     [0222] Since the bottle-neck in increasing the speed of personal computers is not the processor or the memory, but the PCI bus, this can have a huge effect in improving the performance and should make personal computers an even better cost to value proposition.  
     [0223] On the PCI bus several parallel traces parallel can be encompassed within a single channel in the metal plates.  
     [0224] Cross-talk between traces of the data bus is reduced by using air-dielectric because for a given impedance and trace width, the height can be reduced by a factor of SQRT(0.5) or about 0.7. As the height between the ground-planes is reduced the cross-talk from trace to trace is also reduced by about half.  
     [0225] PCI would normally use a configuration similar to FIG. 2B with 4 or more traces per channel. Using 8 or more traces might cause manufacturing yields to drop if the channel height becomes compressed from lamination.  
     [0226] Other parallel data busses would use similar structures.  
     High Speed Differential Signals  
     [0227] High speed differential signals, especially at 1 Gigahertz and above suffer excess attenuation from standard dielectric materials and dispersion of the signal transitions, which limit the length they can traverse a PCB. Using air-dielectric can allow much longer traces for the same performance or better performance for the same trace lengths.  
     [0228] In some high speed digital PCB Assemblies, trace compensation using pre-emphasis at the driving end of the signals, passive equalization, or receive end signal equalization hardware is used.  
     [0229] The use of air-dielectric will in many applications make trace compensation unnecessary in many cases, simplifying design and reducing costs.  
     [0230]FIG. 2A illustrates a typical method of implementing a differential trace on a high speed PCB. Such a trace should provide satisfactory performance for 4 inch traces or more up to 10 GBS, compared to 2 inches in FR4.  
     Motherboards and Backplanes  
     [0231] Backplanes and motherboards require very high-density interconnect with minimum spacing and maximum trace lengths, and are subject to maximum crosstalk and external EMI.  
     [0232]FIG. 5 shows 4 signal traces mounted on two dielectric layers traversing a honeycomb structure made up of formed metal corrugations offset to pass the signal traces without shorting. This arrangement provides maximum trace density, minimum crosstalk, minimum signal degradation and is impervious to external EMI, and allows minimum radiated EMI.  
     [0233] For High-Speed Differential traces within a motherboard or backplane, FIG. 5A illustrates an optimum solution