Patent Publication Number: US-7719504-B2

Title: Liquid crystal display and driving method thereof

Description:
This application claims the benefit of Taiwan application Ser. No. 95137211, filed Oct. 5, 2006, the subject matter of which is incorporated herein by reference. 
   BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The invention relates in general to a liquid crystal display and a driving method thereof, and more particularly to a liquid crystal display and a driving method thereof for driving pixels according to a color sequential method. 
   2. Description of the Related Art 
   With the thinned trend of the display, liquid crystal displays are widely used in various electronic products, such as a mobile phone, a notebook computer and a color television. The conventional color liquid crystal display achieves the color displaying effect using red, green and blue color filters. Unlike the conventional display principle, the liquid crystal display for driving pixels according to the color sequential method achieves the color displaying effect using red, green and blue colors of light sources to display the colors directly through a backlight module and then using the continuous color addition. 
   However, because the color sequential method has to divide one frame period into three sub-frame periods so that the red, green and blue colors of light sources turn on within different sub-frame periods to mix the colors. Assume a display frame completely turns from black to white and is scanned from top to bottom sequentially within a sub-frame period. When the response speed of the liquid crystal is not high enough, liquid crystal molecules in a lower half portion of a panel do not reach the complete response state yet when the color light source turns on so that the corresponding pixels cannot reach the required brightness. At this time, the brightness of the display frame in the lower half portion of the panel is lower than the brightness of the display frame in an upper half portion of the panel, and the overall frame brightness is not uniform. 
   Similarly, assume the display frame completely turns from white to black and is scanned from top to bottom sequentially within the sub-frame period. When the response speed of the liquid crystal is not high enough, the liquid crystal molecules in the lower half portion of the panel cannot reach the complete response state yet when the color light source turns on so that the corresponding pixels cannot reach the required black frame. At this time, the color of the display frame in the lower half portion of the panel is different from the color of the display frame in the upper half portion of the panel, so the overall frame color is not uniform or the mixed color is incorrect. 
   SUMMARY OF THE INVENTION 
   The invention is directed to a liquid crystal display and a driving method thereof capable of improving the non-uniform color or the incorrectly mixed color to enhance the image quality of the display. 
   According to a first aspect of the present invention, a liquid crystal display is provided. This liquid crystal display includes a first substrate, a second substrate, a liquid crystal layer, at least one first color light source and a second color light source, a gate driver and a common line. The first substrate includes a common electrode. The second substrate includes at least one data line, at least one scanning line and a pixel array. The pixel array is coupled to the at least one data line and the at least one scanning line. The pixel array includes a first pixel having a first storage capacitor and a first pixel electrode. The liquid crystal layer is disposed between the first substrate and the second substrate. The common electrode, the first pixel electrode and the liquid crystal layer form a first liquid crystal capacitor. The gate driver drives the pixel array through the at least one scanning line within a frame period. The frame period includes a first sub-frame period and a second sub-frame period. The first sub-frame period includes a first data writing interval, and the second sub-frame period includes a second data writing interval. The common line provides at least one first common voltage and a second common voltage. The first storage capacitor is coupled to and between the common line and the first pixel electrode. 
   In the first data writing interval, a first data voltage is transmitted to the first pixel. After the first data writing interval, the first color light source illuminates the first pixel. In the second data writing interval, a second data voltage is transmitted to the first pixel. After the second data writing interval, the second color light source illuminates the first pixel. In a reset interval between the first data writing interval and the second data writing interval, a voltage of the common line is changed from the first common voltage to the second common voltage so that the voltage of the first liquid crystal capacitor is changed. 
   According to a second aspect of the present invention, a liquid crystal display is provided. The liquid crystal display includes a first substrate, a second substrate, a liquid crystal layer, at least one first color light source and a second color light source and a gate driver. The first substrate includes a common electrode. The second substrate includes at least one data line, multiple scanning lines and a pixel array. The at least one data line includes a first data line. The scanning lines include a first scanning line and a second scanning line. The pixel array is coupled to the at least one data line and the scanning lines. The pixel array includes a first pixel and a second pixel. The first pixel is coupled to the first data line and the first scanning line, and the second pixel is coupled to the first data line and the second scanning line. The first pixel has a first storage capacitor and a first pixel electrode, and the second pixel has a second storage capacitor and a second pixel electrode. The liquid crystal layer is disposed between the first substrate and the second substrate. The common electrode, the first pixel electrode and the liquid crystal layer form a first liquid crystal capacitor, while the common electrode, the second pixel electrode and the liquid crystal layer form a second liquid crystal capacitor. The gate driver drives the pixel array through the scanning lines within a frame period. The frame period includes a first sub-frame period and a second sub-frame period. The first sub-frame period includes a first data writing interval, while the second sub-frame period includes a second data writing interval. 
   In the first data writing interval, a first data voltage and a second data voltage are respectively transmitted to the first pixel and the second pixel. After the first data writing interval, the first color light source illuminates the first pixel and the second pixel. In the second data writing interval, a third data voltage and a fourth data voltage are respectively transmitted to the first pixel and the second pixel. After the second data writing interval, the second color light source illuminates the first pixel and the second pixel. In a first pulse cycle between the first data writing interval and the second data writing interval, the first scanning line and the second scanning line are simultaneously enabled, while a predetermined voltage is inputted to the first pixel and the second pixel to change the voltages of the first liquid crystal capacitor and the second liquid crystal capacitor simultaneously. 
   The invention will become apparent from the following detailed description of the preferred but non-limiting embodiments. The following description is made with reference to the accompanying drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  is an equivalent circuit diagram showing a pixel array of a liquid crystal display according to a first embodiment of the invention. 
       FIG. 2  is a schematic illustration showing a portion of the liquid crystal display according to the first embodiment of the invention. 
       FIG. 3  shows driving waveforms in a driving method of the liquid crystal display according to the first embodiment of the invention. 
       FIG. 4  shows driving waveforms in a driving method of a liquid crystal display according to a second embodiment of the invention. 
       FIG. 5  shows driving waveforms in a driving method of a liquid crystal display according to a third embodiment of the invention. 
       FIG. 6  shows driving waveforms in a driving method of a liquid crystal display according to a fourth embodiment of the invention. 
       FIG. 7  shows driving waveforms in a driving method of a liquid crystal display according to a fifth embodiment of the invention. 
       FIG. 8  shows driving waveforms in a driving method of a liquid crystal display according to a sixth embodiment of the invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   First Embodiment 
     FIG. 1  is an equivalent circuit diagram showing a pixel array of a liquid crystal display  200  according to a first embodiment of the invention.  FIG. 2  is a schematic illustration showing a portion of the liquid crystal display according to the first embodiment of the invention.  FIG. 3  shows driving waveforms in a driving method of the liquid crystal display according to the first embodiment of the invention. Referring to  FIGS. 1 to 3 , the liquid crystal display  200  of this embodiment includes a first substrate  202 , a second substrate  204 , a liquid crystal layer  206 , at least one first color light source  208  and a second color light source  210 , a gate driver  116  and a common line L 1 . 
   The first substrate  202  includes a common electrode CE. The second substrate  204  includes at least one data line, at least one scanning line and a pixel array  118 . The at least one data line includes, for example, data lines D 1  to DN, wherein N is a positive integer. The at least one scanning line includes multiple scanning lines, such as scanning lines G 1  to G 4  depicted in  FIG. 1  for the sake of simplicity. The pixel array  118  is coupled to the data lines D 1  to DN and all scanning lines. The pixel array  118  includes a pixel, such as a first pixel P 1 . The first pixel P 1  has a first storage capacitor Cst 1  and a first pixel electrode PE 1 . 
   The liquid crystal layer  206  is disposed between the first substrate  202  and the second substrate  204 . The common electrode CE, the first pixel electrode PE 1  and the liquid crystal layer  206  form a first liquid crystal capacitor Clc 1 . The gate driver  116  drives the pixel array  118  through the multiple scanning lines within a frame period. One frame period includes a first sub-frame period TSF 1  and a second sub-frame period TSF 2 . The first sub-frame period TSF 1  includes a first data writing interval T 11 , and the second sub-frame period TSF 2  includes a second data writing interval T 21 . 
   The common line L 1  provides at least one first common voltage VCO( 1 ) and a second common voltage VCO( 2 ). The first storage capacitor Cst( 1 ) is coupled to and between the common line L 1  and the first pixel electrode PE 1 . 
   In the first data writing interval T 11 , a first data voltage VD 1 ( 1 ) is transmitted to the first pixel P 1 . After the first data writing interval T 11 , the first color light source  208  illuminates the first pixel P 1 . In the second data writing interval T 21 , a second data voltage VD 1 ( 2 ) is transmitted to the first pixel P 1 . After the second data writing interval T 21 , the second color light source  210  illuminates the first pixel P 1 . In a reset interval T 14  between the first data writing interval T 11  and the second data writing interval T 21 , a voltage of the common line L 1  is changed from the first common voltage VCO( 1 ) to the second common voltage VCO( 2 ) so that a voltage of the first liquid crystal capacitor Clc 1  is changed. 
   Accordingly, after the voltage of the common line L 1  is changed, the voltage of the first pixel electrode PE 1  may be changed according to the coupling of the first storage capacitor Cst 1 . Thus, a crossover voltage of the first liquid crystal capacitor Clc 1  is correspondingly changed so that the first pixel P 1  is equivalent to a pixel receiving a data voltage corresponding to a discriminated gray-scale value. The discriminated gray-scale value is the gray-scale value corresponding to a substantially highest response speed of the liquid crystal molecule. Taking a normally-white twisted nematic (TN) type liquid crystal molecule as an example, the liquid crystal molecule of the low gray-scale value has the highest response speed, so the discriminated gray-scale value of the TN type liquid crystal display is preferably a low gray-scale value, such as 0. The above-mentioned discriminated gray-scale value may be selected according to the property of the liquid crystal molecule of the liquid crystal display. Consequently, enabling the first pixel P 1  to receive one data voltage of the discriminated gray-scale value may speed up the response speed of the liquid crystal molecule in a next sub-frame so that the first pixel P 1  may have the required brightness in the next sub-frame when the color light source turns on. 
   Consequently, when the same data voltage is inputted to an upper half portion of the panel and a lower half portion of the panel, the color of the display frame in the lower half portion of the panel may be closer to that in the upper half portion of the panel so that the color uniformity can be enhanced, the color error may be reduced, and it is possible to prevent the incorrect color from being displayed. In addition, changing the voltage of the liquid crystal capacitor may also increase the discrimination of different colors displayed by the pixel within the adjacent sub-frame periods so that the image quality may be enhanced. 
   Detailed descriptions will be described in the following. The pixel P 1  is equivalent to a thin film transistor T 1 , a liquid crystal capacitor Clc 1  and a storage capacitor Cst 1 , while the pixel P 2  is equivalent to a thin film transistor T 2 , a liquid crystal capacitor Clc 2  and a storage capacitor Cst 2 . The pixels P 3  and P 4  are respectively equivalent to thin film transistors T 3  and T 4 , liquid crystal capacitors Clc 3  and Clc 4  and storage capacitors Cst 3  and Cst 4 . The common electrode CE is applied with a common voltage Vcom (not shown), which is substantially always kept constant. 
   The thin film transistor T 1  includes a first gate, a first source and a first drain. The first gate is controlled by the scanning line G 1 , the first source is coupled to the data line D 1 , and the first drain is coupled to the pixel electrode PE 1 . The thin film transistor T 2  includes a second gate, a second source and a second drain. The second gate is controlled by the scanning line G 2 , the second source is coupled to the data line D 1  and the second drain is coupled to a pixel electrode PE 2 . The thin film transistor T 3  is coupled to the data line D 1  and the scanning line G 3 , while the thin film transistor T 4  is coupled to the data line D 1  and the scanning line G 4 . 
   A data driver  120  is coupled to the data lines D 1  to DN to provide the voltages for the corresponding pixels. The gate driver  116  is coupled to the scanning lines G 1  to G 4  to control the corresponding pixels. 
   A common bus line LCO is preferably substantially disposed parallel to the data lines D 1  to DN and coupled to each of the odd-numbered rows of common lines L 1  and L 3 . Each of the odd-numbered rows of common lines L 1  and L 3  is preferably disposed perpendicular to the common bus line LCO. For the sake of simplification,  FIG. 1  only representatively labels two odd-numbered rows of common lines L 1  and L 3 . 
   Similarly, a common bus line LCE is preferably disposed substantially parallel to the data lines D 1  to DN and coupled to each of the even-numbered rows of common lines L 2  and L 4 . Each of the even-numbered rows of common lines L 2  and L 4  is preferably disposed perpendicular to the common bus line LCE. For the sake of simplicity,  FIG. 1  only representatively labels two even-numbered rows of common lines L 2  and L 4 . 
   Preferably, the liquid crystal display  200  further includes a third color light source, and one frame period preferably further includes a third sub-frame period (not shown). The first color light source  208 , the second color light source  210  and the third color light source are preferably red, green and blue color light sources. 
   The red, green and blue color light sources sequentially turn on in the first sub-frame period TSF 1 , the second sub-frame period TSF 2 , and the third sub-frame period so that the first pixel P 1  sequentially generates red, green and blue images, which are mixed so that the desired color of the first pixel P 1  may be obtained. 
   In addition, each sub-frame period is preferably divided into four time intervals including a data writing interval, a waiting interval, a turn-on interval and a reset interval. For example, the sub-frame period TSF 1  is divided into a data writing interval T 11 , a waiting interval T 12 , a turn-on interval T 13  and a reset interval T 14 . 
   As shown in  FIG. 3 , in the data writing interval T 11 , the gate driver  116  sequentially provides gate voltages VG 1  and VG 2  through the scanning lines G 1  and G 2  to control the pixels P 1  and P 2 . At this time, when the embodiment adopts a row inversion driving method, the data driver  120  provides first data voltages VD 1 ( 1 ) and VD 2 ( 1 ) with inverse polarities to the pixels P 1  and P 2  through the data line D 1  so that the pixel electrodes PE 1  and PE 2  reach the desired data voltages VPE 1 ( 1 ) and VPE 2 ( 1 ). 
   The waiting interval T 12  enables the liquid crystal molecule to have enough time to response to the required tilt angle. Next, one of the red, green and blue color light sources will be turned on in the turn-on interval T 13  to illuminate the pixels P 1  and P 2 . The color light source may be a cold cathode fluorescent lamp or a light emitting diode. 
   Thereafter, the voltage of the common line L 1  is changed from the first common voltage VCO( 1 ) to the second common voltage VCO( 2 ), and the voltage of the common line L 2  is changed from a first common voltage VCE( 1 ) to a second common voltage VCE( 2 ) in the reset interval T 14 . When the liquid crystal display  200  adopts the row inversion driving method to drive the pixels, the pixels P 1  and P 2  have reverse voltage polarities, so the common lines L 1  and L 2  have inverse voltages. 
   A difference between the first common voltage VCO( 1 ) and the second common voltage VCO( 2 ) is a constant difference, which does not relate to the first data voltage VD 1 ( 1 ) and the second data voltage VD 1 ( 2 ). A difference between the first common voltage VCE( 1 ) and the second common voltage VCE( 2 ) is another constant difference, which does not relate to the data voltage VD 2 ( 1 ) and the second data voltage VD 2 ( 2 ). 
   Illustrations will be made in an example, which takes a crossover voltage of the liquid crystal capacitor corresponding to the discriminated gray-scale value of the liquid crystal display as a maximum crossover voltage. After the voltage of the common line L 1  is changed from the first common voltage VCO( 1 ) to the second common voltage VCO( 2 ), the voltage of the first liquid crystal capacitor Clc 1  is the maximum voltage among all voltages corresponding to the liquid crystal capacitors when all gray-scale values are displayed. After the voltage of the common line L 2  is changed from the first common voltage VCE( 1 ) to the second common voltage VCE( 2 ), the absolute value of the voltage of the liquid crystal capacitor Clc 2  is a maximum value among all the absolute values of all the voltages corresponding to the liquid crystal capacitor when all the gray-scale values are displayed. 
   That is, when the voltage of the common line L 1  is increased from the first common voltage VCO( 1 ) to the second common voltage VCO( 2 ), the voltage of the pixel electrode PE 1 , which is positively driven is increased, so that the voltage difference between the pixel electrode PE 1  and the common electrode CE, which has the common voltage Vcom, is increased and the crossover voltage of the liquid crystal capacitor Clc( 1 ) is increased. Thus, the pixel P 1  is equivalent to a pixel, which receives the data voltage of the discriminated gray-scale value. At this time, the response speed of the liquid crystal molecule is increased, and the response speed of the liquid crystal molecule in the next sub-frame period is simultaneously increased. 
   Similarly, when the voltage of the common line L 2  is decreased from the first common voltage VCE( 1 ) to the second common voltage VCE( 2 ), the voltage of the negatively driven pixel electrode PE 2  is also decreased, so that the voltage difference between the common electrode CE, which has the common voltage Vcom, and pixel electrode PE 2  is increased, and the absolute value of the crossover voltage of the liquid crystal capacitor Clc( 2 ) is increased. Consequently, the pixel P 2  is equivalent to a pixel, which receives the data voltage of the discriminated gray-scale value. At this time, the response speed of the liquid crystal molecule is increased, and the response speed of the liquid crystal molecule in the next sub-frame period is simultaneously increased. 
   Thus, the pixels P 1  and P 2  in the next sub-frame period can rapidly represent the desired brightnesses, and the phenomena of the non-uniform color or the incorrectly mixed color can be effectively improved. 
   Second Embodiment 
     FIG. 4  shows driving waveforms in a driving method of a liquid crystal display according to a second embodiment of the invention. The difference between the first and second embodiments will be described in the following. In the first embodiment, the reset interval follows the first data writing interval within one sub-frame period. In the second embodiment, however, the data writing interval follows the reset interval within the sub-frame period. For example, the second data writing interval T 41  follows the reset interval T 44 . Consequently, the response speed of the liquid crystal molecule within the sub-frame period TSF 4  may also be increased. 
   Third Embodiment 
     FIG. 5  shows driving waveforms in a driving method of a liquid crystal display according to a third embodiment of the invention. Unlike the first embodiment, a predetermined voltage is further simultaneously transmitted to the first pixel P 1  and the second pixel P 2  through the data line D 1  within the reset interval in the third embodiment so that the voltages of the first liquid crystal capacitor Clc 1  and the second liquid crystal capacitor Clc 2  are changed. 
   In detail, as shown in  FIG. 5 , the scanning lines G 1  and G 2  are simultaneously enabled in the reset interval T 54  so that the thin film transistors T 1  and T 2  simultaneously turn on. Thus, the thin film transistors T 1  and T 2  simultaneously receive the data voltage VDX to change the voltages of the liquid crystal capacitors Clc 1  and Clc 2  of the pixels P 1  and P 2 . Thereafter, the voltages of the common lines L 1  and L 2  are changed. After the voltages of the common lines L 1  and L 2  are changed, the absolute values of the voltages of the liquid crystal capacitors Clc 1  and Clc 2  according to the third embodiment may be greater than the absolute values of the voltages of the liquid crystal capacitors Clc 1  and Clc 2  according to the first embodiment. Thus, the response speed of the liquid crystal molecule may be faster. 
   The predetermined voltage VDX is the data voltage corresponding to the discriminated gray-scale value. For example, when the data voltage of the discriminated gray-scale value corresponds to the black data voltage, the predetermined voltage VDX is substantially the black data voltage. That is, when the first data voltage VD 1 ( 1 ) is the black data voltage, the predetermined voltage VDX is substantially equal to the first data voltage VD 1 ( 1 ). 
   In addition, the first pixel P 1  and the second pixel P 2  in this embodiment are preferably driven by the data voltages with different polarities. The time instant of changing the voltages of the common lines L 1  and L 2  may also be earlier than the time instant when the thin film transistors T 1  and T 2  simultaneously receive the data voltage VDX. 
   Fourth Embodiment 
     FIG. 6  shows driving waveforms in a driving method of a liquid crystal display according to a fourth embodiment of the invention. Unlike the first embodiment, the fourth embodiment further sequentially enables the first scanning line G 1  and the second scanning line G 2  in the reset interval, such as T 64 , and the first predetermined voltage VDX 1  and the second predetermined voltage VDX 2  are further sequentially inputted to the first pixel P 1  and the second pixel P 2  so that the voltages of the first liquid crystal capacitor Clc 1  and the second liquid crystal capacitor Clc 2  may be sequentially changed. 
   This embodiment also has the advantage of enabling the response speed of the liquid crystal molecule to be higher than that of the first embodiment. This embodiment is suitable for the condition that the first pixel P 1  and the second pixel P 2  are respectively driven by the data voltages with different polarities. When the first data voltage VD 1 ( 1 ) is the black data voltage, the first predetermined voltage VDX 1  is equal to the first data voltage VD 1 ( 1 ). 
   Similarly, the time instant of changing the voltages of the common lines L 1  and L 2  may be earlier than the time instant when the thin film transistors T 1  and T 2  sequentially receive the data voltages VDX 1  and VDX 2 . 
   Fifth Embodiment 
     FIG. 7  shows driving waveforms in a driving method of a liquid crystal display according to a fifth embodiment of the invention. Unlike the first embodiment, the fifth embodiment enables the first scanning line G 1  and the second scanning line G 2  simultaneously in the first data writing interval, such as T 71 , and a first pulse cycle PT 1  within the second data writing interval (not shown) of the next sub-frame period, and the predetermined voltage VDX 3  is simultaneously inputted to the first pixel P 1  and the second pixel P 2  so that the voltages of the first liquid crystal capacitor Clc 1  and the second liquid crystal capacitor Clc 2  are changed simultaneously. The common lines L 1  and L 2  of this embodiment can keep in a constant voltage during the reset interval T 74 , and no voltage change occurs. 
   The first pulse cycle PT 1  is preferable located within the reset interval T 74  of the sub-frame period TSF 7 . The reset interval T 74  may also be earlier than the data writing interval T 11  of the sub-frame period TSF 7 . The predetermined voltage VDX 3  is preferably the data voltage of the discriminated gray-scale value. Thus, the response speed of the liquid crystal molecule in the next sub-frame period may also be increased without changing the voltages of the common lines L 1  and L 2 . 
   In addition, the first scanning line G 1  and the second scanning line G 2  may also be sequentially enabled within the first pulse cycle PT 1  so that the predetermined voltage VDX 3  may be sequentially inputted to the first pixel P 1  and the second pixel P 2 . 
   Sixth Embodiment 
     FIG. 8  shows driving waveforms in a driving method of a liquid crystal display according to a sixth embodiment of the invention. Unlike the fifth embodiment, all the scanning lines of the liquid crystal display  200  are classified into a first group of scanning lines and a second group of scanning lines. This embodiment includes the first pulse cycle PT 1 , in which the predetermined voltage VDX 4  is inputted to the pixels corresponding to the first group of scanning lines, and further includes a second pulse cycle PT 2 , in which the predetermined voltage VDX 5  is inputted to the pixels corresponding to the second group of scanning lines. For example, the first group of scanning lines includes the first scanning line G 1  and the second scanning line G 2 , and the second group of scanning lines includes the third scanning line G 3  and the fourth scanning line G 4 . In the first data writing interval, such as the first data writing interval T 71 , the data voltages VD 3 ( 1 ) and the data voltage VD 4 ( 1 ) are respectively transmitted to the third pixel P 3  and the pixel P 4 . In another data writing interval (not shown in  FIG. 8 ) of the next sub-frame period, other two data voltages are respectively transmitted to the third pixel P 3  and the fourth pixel P 4 . During the second pulse cycle PT 2 , which is between the data writing interval T 71  and another data writing interval of the next sub-frame period, the third scanning line G 3  and the fourth scanning line G 4  are simultaneously enabled so that the predetermined voltage VDX 5  is inputted to the third pixel P 3  and the fourth pixel P 4 , and the voltages of the third liquid crystal capacitor Clc 3  and the fourth liquid crystal capacitor Clc 4  may be simultaneously changed. The first pulse cycle PT 1  and the second pulse cycle PT 2  do not overlap with each other. 
   The liquid crystal displays and the driving methods of the color sequential methods according to the embodiments of the invention have the advantages of enhancing the color uniformity of the panel, decreasing the color error, and preventing the incorrect color from being displayed. In addition, the discrimination between different colors displayed by the pixel within adjacent sub-frame periods can be enhanced so that the image quality may be enhanced. 
   While the invention has been described by way of examples and in terms of preferred embodiments, it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.