Patent Publication Number: US-7720101-B2

Title: Wideband cable modem with narrowband circuitry

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
   This application claims priority of U.S. provisional patent application No. 60/574,506, filed May 25, 2004, and U.S. provisional patent application No. 60/574,876, filed May 26, 2004, and U.S. provisional patent application No. 60/622,312, filed Oct. 25, 2004, and U.S. provisional patent application No. 60/624,490, filed Nov. 1, 2004, and U.S. provisional patent application No. 60/635,995, filed Dec. 13, 2004, and U.S. provisional patent application No. 60/588,635, filed Jul. 16, 2004, U.S. provisional patent application No. 60/582,732, filed Jun. 22, 2004, and U.S. provisional patent application No. 60/590,509, filed Jul. 23, 2004. 

   BACKGROUND 
     FIG. 1  shows how data over cable service interface specifications (DOCSIS) traffic is currently transferred over a cable network  8 . A server or other type of Internet Protocol (IP) network processing device  10 , such as a personal computer (PC), is connected to a wide area network (WAN)  12 . The device  10  communicates over cable network  8  with a device  22  or device  26 . In one example, the device  22  is an Internet Protocol (IP) set top box (STB) and the device  26  is a PC. Of course the devices  10 ,  22  and  26  can be any type computing device configured for exchanging data over a network. 
   A communication link is established between a cable modem termination system (CMTS)  14  on the cable provider end of a hybrid fiber cable (HFC) plant  19  and a cable modem (CM)  20  on the customer premises end of the HFC  19 . The CMTS  14  operates at a cable system headend and receives and sends IP traffic over the WAN  12  in one example using an Ethernet connection. Other types of network interfaces may also be used such as Dynamic Packet Transport/Resilient Packet Ring (DPT/RPR) or Packet-over-SONET/SDH (POS). Data is transferred from the CMTS  14  to the CM  20  over a downstream channel  16  and data is transferred from the CM  20  to the CMTS  14  over an upstream channel  18 . 
   The cable network  8  is referred to as “narrowband” because a single radio frequency (RF) downstream channel  16  and a single RF upstream channel  18  are used over the HFC plant  19  for transferring data. The single downstream channel  16  supplies downstream IP connectivity to multiple cable modems  20  connected to the same cable plant  19 . Each cable modem  20  demodulates and formats the downstream traffic for transport over IP network  21 . Upstream IP traffic sent by the IP device  22  or  26  is modulated by the associated CM  20  onto the upstream channel  18  on the HFC plant  19 . The CMTS  14  demodulates the signals on the upstream channel  18  and then sends the demodulated IP data to a device on WAN  12 , such as device  10 . 
     FIG. 2  shows the internal elements in one of the narrowband cable modems  20 . A diplexor  30  connects to the two-way HFC plant  19 . The diplexer  30  separates the frequency spectrum for downstream channel  16  from the frequency spectrum for upstream channel  18 . A radio frequency (RF) tuner  32  selectively outputs different baseband frequencies  36  to a DOCSIS narrowband cable modem integrated circuit (IC)  37 . The baseband frequencies  36  are converted into digital signals by an analog/digital (A/D) converter  38  and then fed into a quadrature amplitude modulation (QAM) demodulator  40 . 
   Both a DOCSIS media access controller (MAC)  46  and a central processing unit (CPU)  48  process the data output from the QAM  40 . The MAC  46  is an open system interconnection (OSI) layer-2 element that provides DOCSIS framing and signaling. The MAC  46  frames the data into IP packets or frames that are then sent to the appropriate device  22  or  26  over Ethernet interface  52 . Other data may be received or sent by the cable modem  20  over a universal serial bus (USB) connection  41  via USB interface  42 . 
   Data received over Ethernet interface  52  is formatted for transport over the upstream channel  18  of the HFC  19  by the MAC  46  and then otherwise processed by the CPU  48 . The formatted data is modulated by a QAM modulator  51  and then converted into analog signals by a digital/analog (D/A) converter  50 . The output of D/A converter  50  is then amplified by an amplifier  56  before being transmitted by the diplexor  30  over the upstream channel  18  of the HFC  19 . For clarity, the physical connections between the different functional elements  38 - 52  have not been shown. 
   The bandwidth provided by a single downstream channel  16  and a single upstream channel  18  on the HFC  19  may not be sufficient for the bursty traffic that can be transmitted and received by a large numbers of cable modems  20 . Therefore, current cable systems may not be capable of supporting applications that have a high average bandwidth such as constant bit rate (CBR) or variable bit rate (VBR) video. 
   Wideband cable systems have been developed that increase bandwidth in cable networks. Wideband packets are associated with logical wideband channels that extend over multiple RF cable channels. The multiple wideband channels contain a number of wideband transport sub-channels which can be dynamically adjusted for varying bandwidth requirements. 
   The narrowband cable modem architecture shown in  FIGS. 1 and 2  does not support wideband cable systems. However, it would be desirable to leverage this conventional narrowband DOCSIS cable modem circuitry in new wideband DOCSIS systems. The present invention addresses this and other problems associated with the prior art. 
   SUMMARY OF THE INVENTION 
   A hybrid cable modem includes wideband circuitry configured to receive data over multiple different downstream channels at the same time. The wideband circuitry demodulates signals on the different downstream channels and then formats the demodulated signals back into packets or frames for sending out over an Internet Protocol (IP) home network. Narrowband cable modem circuitry is coupled to the wideband circuitry and selectively extracts Data Over Cable Service Interface Specifications (DOCSIS) data from one of the multiple downstream channels being processed by the wideband circuitry. 
   The foregoing and other objects, features and advantages of the invention will become more readily apparent from the following detailed description of a preferred embodiment of the invention which proceeds with reference to the accompanying drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  is a diagram of a narrowband cable network. 
       FIG. 2  is a block diagram of a narrowband cable modem used in the cable network shown in  FIG. 1 . 
       FIG. 3  is a diagram of a wideband cable network that uses a hybrid wideband cable modem. 
       FIG. 4  is a detailed diagram of the hybrid wideband cable modem shown in  FIG. 3 . 
       FIG. 5  shows in more detail an Ethernet multiplexer used in the hybrid wideband cable modem of  FIG. 4 . 
       FIG. 6  shows another embodiment of the cable modem where certain packet processing operations are conducted in hardware without accessing external memory. 
   

   DETAILED DESCRIPTION 
   Referring to  FIG. 3 , a hybrid wideband cable modem  70  leverages legacy narrowband cable modem circuitry and provides backward compatibility with existing narrowband cable modem protocols while at the same time providing wideband connectivity. In the description below packets and frames are used interchangeably. Thus, a frame is alternatively referred to as a packet and a packet is alternatively referred to as a frame. 
   A wideband CMTS (WCMTS)  60  includes a wideband transmit framer and a media access control (MAC) interface  61 . In one embodiment, the wideband framer separates Ethernet frames from WAN  12  into wideband packets that are transmitted simultaneously over multiple downstream channels  64 . The WCMTS  60  frames DOCSIS media access control (MAC) frames into Motion Picture Experts Group-Transport Stream (MPEG-TS) packets and transports the MPEG packets over the different downstream channels  64  in parallel. The multiple downstream channels  64  are referred to collectively as wideband channel  62 . 
   In one example, the WCMTS  60  modulates the wideband channel  62  using quadrature amplitude modulation (QAM). Each downstream RF channel  64  is associated with a QAM and up-converter (U) (not shown). The Q&amp;U&#39;s together modulate the MPEG digital data over multiple RF channels  64 . The MAC  61  is used for transmitting DOCSIS IP data over one or more RF channels  64 . For example, downstream channel  65  carries DOCSIS IP data in the downstream path to the hybrid WCMs  70 . 
   Multiple upstream channels  71  can be established at the same time over the HFC plant  19  for sending data from the hybrid cable modems  70  to the WCMTS  60 . The multiple upstream channels  71  are referred to collectively as the wideband upstream channel  72 . The WCMTS  60  demodulates the IP traffic on the upstream channel  72  and the MAC  61  in the WCMTS  60  then formats the data for sending over the WAN  12 . The MAC  61  can use the same Q&amp;U for transmitting narrowband traffic, wideband traffic, or both narrowband and wideband traffic. 
   The downstream channels  64  can originate from a single multi-channel WCMTS  60  or from different WCMTSs  60  and can be directed to the same hybrid WCM  70  or to different hybrid WCMs  70 . The RF upstream channels  71  can also operate independently or in conjunction with each other and can originate from the same or from different hybrid cable modems  70 . The same cable network  59  can use any combination of narrowband CMs  20  ( FIGS. 1 and 2 ), hybrid WCMs  70 , and any other wideband cable modems. 
   Different architectures and protocols may be used for establishing the narrowband and wideband functionality between the WCMTS  60  and the hybrid WCM  70 . Incorporated herein by reference are the following U.S. patent applications: WIDEBAND CABLE SYSTEM, application Ser. No. 10/358,416, filed Feb. 4, 2003; UPSTREAM PHYSICAL INTERFACE FOR MODULAR CABLE MODEM TERMINATION SYSTEM, application Ser. No. 11/131,766, filed May 17, 2005; WIDEBAND CABLE DOWNSTREAM PROTOCOL, application Ser. No. 11/137,606, filed May 24, 2005; and WIDEBAND UPSTREAM PROTOCOL application Ser. No. 11/135,777, filed May 23, 2005, issued as U.S. Pat. No. 7,532,627 that describe different wideband and narrowband systems that can be used with the hybrid WCM  70 . Of course, other cable modem architectures can also be used. 
   The hybrid WCMs  70  simultaneously demodulates each of the different downstream channels  64  and regenerates the different portions of the original data stream received over IP network  12 . In one example, the different portions of the data streams distributed over the different downstream channels  64  are reformatted back into Ethernet frames and sent over IP home network  21  either to the IP STB  22  or to PC  26 . The IP STB  22  converts digital data contained in the Ethernet frames into analog signals for displaying on television  24 . Ethernet frames received by PC  26  contain any type of digital data that is conventionally transmitted to a computing device over an IP network. 
   A “flow” refers to contiguous bytes of data used by a given application. The wideband implementation described below has the ability to spread the same flow over multiple downstream channels simultaneously. 
   Hybrid Cable Modem 
     FIG. 4  describes the hybrid WCM  70  in more detail. The wideband circuitry in the hybrid WCM  70  provides high bandwidth cable communications that is efficient and scalable in transporting Variable Bit Rate (VBR) data/voice/video IP streams in a DOCSIS compatible environment. Legacy DOCSIS narrowband cable modem (NBCM)  95  is interlaced with the wideband circuitry to maintain backward compatibility with existing narrowband cable systems. 
   Downstream 
   A diplexer  79  sends signaling from the downstream wideband channel  62  to a block down converter  80  that outputs RF signals  81  to a wideband (WB) tuner  82 . The WB tuner  82  includes an internal A/D converter  90 , a QAM demodulator  86 , and an MPEG framer  84  all configured for processing signaling from the multiple downstream wideband channels  64  at the same time. The WB tuner  82  outputs MPEG frames  92  for all of the N downstream channels  62  to a WB downstream framer  94 . The wideband downstream framer  94  reassembles the MPEG data from WB tuner  82  into the Ethernet frames originally received by the WCMTS  60  over WAN  12  and outputs the Ethernet frames to an Ethernet multiplexer (MUX)  96 . 
   The NBCM  95  is coupled between the WB tuner  82  and the Ethernet MUX  96  and has similar functional elements as the narrowband cable modem circuitry  37  described above in  FIG. 2 . However, the CPU  48  in the NBCM  95  now controls the WB tuner  82  through an I 2 C bus interface. Alternatively, a Serial Peripheral Interconnect (SPI) bus interface  44  or some other type of interface can be used. The CPU  48  both programs and reads register information from the WB tuner  44  through the SPI bus  106 . 
   The bus  106  is typically used for reading and writing registers from cable modem physical interfaces. Each bus  106  has a master device which may be the MAC  46 . Alternatively, the bus  106  master may be some other device, such as the CPU  48 . The WB tuner  82  in this implementation is the slave device. The SPI, or  12 C bus  106  in general is known to those skilled in the art and is therefore not described in further detail. 
   The CPU  48 , or MAC  46 , sends instructions to the WB tuner  82  to connect a particular digital data stream  88  from A/D converter  90  to an external D/A converter  102 . For example, the CPU  48  may configure the WB tuner  82  via bus  106  to connect one of the outputs  88  carrying DOCSIS IP data to D/A converter  102 . For instance, the D/A converter  102  may be connected to the data stream  88  that corresponds with downstream channel  65  in  FIG. 3 . 
   The analog output  104  from D/A converter  102  is then processed as a conventional narrowband downstream channel by the NBCM  95 . For example, the analog baseband signal  104  is converted into a digital signal by A/D converter  38 , demodulated by a QAM demodulator  40 , and then framed into Ethernet packets by MAC  46 . The Ethernet frames are then sent out Ethernet interface  52  to Ethernet MUX  96 . The Ethernet MUX  96  then forwards the Ethernet packets out IP network  21 . Thus, the NBCM  95  can use the same A/D converter  38 , QAM  40 , CPU  48 , MAC  46  and Ethernet interface  52  previously used in the narrowband cable modem  37  shown in  FIG. 2 . 
   The entire digital spectrum of the wideband downstream channel  62  is available to the NBCM  95 . The CPU  48  can select any of the multiple available outputs  88  from the WB tuner  82 . This eliminates having to use an additional narrowband tuner, such as tuner  32  in  FIG. 2 , for extracting DOCSIS data from the wideband channel  62 . In an alternative embodiment, a separate narrowband tuner can be used with the NBCM  95 . It should also be understood that any logical flow can extend over any combination of the multiple wideband downstream channels  62 . 
   Upstream 
   The Ethernet MUX  96  directs packets received from IP network  21  to the NBCM  95  or to the wideband upstream framer  98 . This allows the wideband upstream framer  98  to replace or co-exist with the upstream DOCSIS framing provided in NBCM  95 . The DOCSIS protocol allows multiple devices to transmit on the same upstream frequency. Thus both the NBCM  95  and the WB upstream framer  98  can transmit over a common upstream channel  72 . 
   The WB upstream framer  98  frames the Ethernet frames received from Ethernet MUX  96  into wideband DOCSIS data that is formatted into multiple different wideband upstream data streams  99 . The DOCSIS data in the multiple different data streams  99  is modulated by multiple QAM modulators  100  onto multiple associated wideband RF channels  72  and output through diplexor  79  over the HFC  19 . 
   The NBCM  95  may be required to also send data over one of the wideband upstream channels  72 . In one implementation, the NBCM  95  sends the received Ethernet frames over the Ethernet MUX  96  to the WB upstream framer  98 . The framer  98  and QAM modulator  100  then process and send the Ethernet frames received from the NBCM  95  over one of the wideband upstream channels  72 . 
   In an alternative implementation, the Ethernet frames received by the NBCM  95  are formatted into DOCSIS frames by the local MAC  46  and then modulated onto one of the wideband upstream channels  72  by the local QAM modulator  51 . The D/A converter  50  then outputs an analog RF signal over alternative connection  101  to the diplexor  79 . The alternative path  101  is used by the NBCM  95  to send DOCSIS data over either one of the wideband upstream channels  72  or over some alternative upstream channel not used as one of the wideband upstream channels  72 . 
   In some instances it may be more efficient to send and receive information from one of the narrowband or wideband elements and then share the results with the other wideband and narrowband circuitry. For example, data such as ranging information, may normally be sent and received from both the NBCM  95  and the WB upstream or downstream framers  98  or  94 , respectively. However, the timing skew for both the wideband circuitry and the narrowband circuitry may be close to the same. Therefore, in one implementation, only one functional wideband or narrowband element, such as the NBCM  95  can be used for exchanging timing synchronization information with the CMTS  60  ( FIG. 3 ). The timing information is then distributed to the other wideband functional elements in the hybrid cable modem  70 . 
   Snooping Circuitry 
   The WCMTS  60  ( FIG. 3 ) may send certain IP or DOCSIS messages over different wideband channels  62  that the CPU  48  in NBCM  95  needs to process. However, the D/A converter  102  may not be connected to the downstream channel that contains the IP or DOCSIS messages sent by the WCMTS  60 . Snooping circuitry  97  in the WB downstream framer  94  in combination with a loop-back path  120  in the Ethernet MUX  96  allows the CPU  48  to receive and process DOCSIS messages sent on any WB channel  62 . 
   The snooping circuitry  97  snoops all of the Ethernet packets  111  generated from all of the wideband channel data streams  92  received from the WB tuner  82 . The snooping circuitry  97  is programmed to detect any Ethernet frames having a particular predetermined identifier and forward the detected Ethernet frames through the Ethernet MUX  96  to the CPU  48 . For example, the snooping circuitry  97  can be programmed to identify any Ethernet frame with a header identifying DOCSIS control or signaling data. 
   The snooping circuitry  97 , in combination with the Ethernet MUX  96 , provides for fast forwarding plane switching path to the CPU  48 . The snooping circuitry  97  also operates as a filter providing only relevant Ethernet frames to CPU  48 . This relieves the processing burden on the CPU  48  having to listen to each Ethernet frame passing through the WB downstream framer  94  and also allows the same QAMs  86  in the WB tuner  82  to be used for both narrowband and wideband processing. 
   Ethernet Multiplexer 
     FIG. 5  shows the Ethernet MUX  96  in more detail. The Ethernet MUX  96  includes a first Ethernet port  120 A that connects with a corresponding Ethernet port  120 B on the WB downstream framer  60 . A second Ethernet port  122 A on the MUX  96  is connected to a corresponding Ethernet port  122 B on the NBCM  95 . A third Ethernet port  124 A on the MUX  96  connects with a corresponding Ethernet port  124 B on the WB upstream framer  98 . An external Ethernet port  126  is coupled to the IP home network  21  as described above in  FIG. 3 . 
   Switching circuit  140  in the Ethernet multiplexer  96  sends Ethernet frames received from WB downstream framer  84  or from NBCM  95  out over IP network  21 . Ethernet frames are also switched between the NBCM  95  and the WB downstream framer  94  and between the NBCM  95  and the WB upstream framer  98 . The Ethernet MUX  96  also forwards Ethernet frames received over IP network  21  either to the NBCM  95  or to the WB upstream framer  98 . 
     FIG. 5  shows the logical paths taken by Ethernet frames or other IP packets though the different ports  120 - 126  in MUX  96 . In a first path  130 , the switching circuit  140  transfers packets or frames from the WB downstream framer  94  to external Ethernet port  126 . In a path  132 , the switching circuit  140  transfers packets between the WB downstream framer  94  and the NBCM  95 . The switching circuit  140  in path  134  transfers packets between external Ethernet port  126 , the NBCM  95 , and the WB upstream framer  98 . A path  136  transports packets between the NBCM  95  and the WB upstream framer  98 . 
   In one embodiment of the Ethernet MUX  96 , the switching circuit  140  switches frames or packets to the different Ethernet ports  120 ,  122 ,  124  and  126  according to tags that are identified in an Ethernet packet header. For example, a packet directed from WB downstream framer  94  to external Ethernet port  126  may have a first tag value in the Ethernet packet header. Other packets switched from the WB downstream framer  94  to the NBCM  95  are assigned a second tag value. Similarly, an Ethernet frame switched from the external Ethernet port  126  to the WB upstream framer  98  has a third tag value, etc. 
   The switching logic  140  in the Ethernet MUX  96  reads the tag value in the Ethernet header to determine where to direct the frame or packet. For example, a packet received over Ethernet port  120 A having the first tag value is sent by switching logic  140  to the external Ethernet port  126  over path  130 . Another packet received over Ethernet port  120 A having the second tag value is sent by switching logic  140  to Ethernet port  122 A over path  132 . 
   In an alternative embodiment, the Ethernet MUX  96  operates more like a conventional Ethernet switch. In this implementation, the switching logic  140  reads an IP address in the Ethernet frames and outputs the frames to the different ports  120 A- 126 A according to the addresses. 
   The Ethernet MUX  96  can be implemented on an individual Integrated Circuit (IC) or can be integrated on a same IC with any other logical elements in hybrid CM  70 . For example, the Ethernet MUX  96  can be implemented on the same IC with the WB downstream framer  94 . Any other combination of the logical devices  79 ,  80 ,  82 ,  94 ,  95 ,  96 ,  98  and  100  can be implemented in separate ICs or combined with the other logical devices on the same IC. 
   Some, but not all, of the important aspects of the hybrid cable modem  70  include using the D/A converter  102  to simulate a regular DOCISIS narrowband downstream channel. This in combination with using the SPI bus  44  to connect selected individual wideband channel data streams  88  to the NBCM  95  eliminates having to use separate tuners for wideband and narrowband processing. 
     FIG. 6  shows another embodiment of a wideband cable modem  150  that can also include the functionality described above in  FIGS. 3-5 . An integrated circuit contains all the cable modem circuitry  150 . In  FIG. 6 , the RF signals from the cable plant are received by a Block Down Converter (BDC) and multi-channel tuner  154 . An MPEG processing engine  156  converts the output from tuner  152  into un-sequenced MPEG packets  157  that are then stored by memory controller  174  into an external memory  176 , such as a Dynamic Random Access Memory (DRAM). The external memory  176  may be implemented in a different Integrated Circuit (IC), than the IC implementing cable modem circuitry  150 . However, the external memory  176  could also be implemented in the same IC. A deskew engine  158  and a deskew control memory  160  use associated control information to re-sequence the packets in the correct order when read out of memory  176 . The re-sequenced packets  175  are then sent to sequential packet processing circuitry  162 . 
   In one embodiment, the sequential packet processing circuitry  162  is mostly performed in hardware in the same integrated circuit that implements cable modem  150 . However, it is also possible that some of the higher level sequential packet processing operations may be performed in software by a CPU  172 . If required, software operations performed by the CPU  172  use internal packet buffer  166 . 
   The sequential packet processing circuitry  162  can include a DOCSIS header parser, MAC Destination Address (DA) filter, Baseline Privacy Interface (BPI) Decryption engine, Cyclic Redundancy Check (CRC) circuit, Management Information Base (MIB) filter, and a Network Address Translator (NAT). These packet processing algorithms are known to those skilled in the art and are therefore not described in further detail. However, conducting some or all of these packet processing operations in hardware is believed to be novel. 
   In one embodiment, each element or engine in sequential packet processing circuitry  162  passes the packet sequentially onto a subsequent element or engine. For example, the DOCSIS header parsing engine receives a packet from memory controller  174 , processes the packet, and sends the processed packet to the MAC DA filtering engine. The MAC DA filtering engine processes the packet and sends the processed packet to the BPI decryption engine, etc. 
   Of course these are just examples of the packet processing operations that can be included in circuitry  162 . Additional packet processing operations may be included in sequential packet processing circuitry  162  or some of the listed operations may not be included in the packet processing circuitry  162 . Further, some of the packet processing operations, such as the NAT and other security packet processing operations, may be implemented by software operated by the CPU  172 . 
   Implementing at least some of the above listed packet processing operations in hardware circuitry  162 , prevents the cable modem  150  from having to repeatedly access external memory  176 . For example, the cable modem  150  may only have to use external memory  176  to load un-sequenced packets  157  into memory and then read the re-sequenced packet  175  back out of external memory  176 . The cable modem  150  then sequentially conducts subsequent packet processing operations internally with hardware circuitry  162 . An internal packet buffer  166  can be used for any temporary buffering required by the sequential packet processing circuitry  162  or for any other software operations that may need to be performed on the packets by CPU  172 . 
   The output of the sequential packet processing circuitry  162  is re-sequenced Ethernet frames  164  that are then processed by an Ethernet MAC  168  before being output over an Ethernet physical interface  170  to customer premise equipment  178 , such as a personal computer, television, set-top box, etc. 
   Typical, cable modems perform some or all of the operations referred to in sequential packet processing circuitry  162  in software. This requires a CPU to repeatedly access external memory substantially increasing memory bandwidth utilization and processing cycles. 
   The cable modem  150  extracts packets once from memory  176 . Subsequent processing is performed sequentially, and “on-the-fly” by internal hardware (or software if so desired). This saves memory bandwidth, and also allows for an architecture where packets can be temporarily stored in the internal packet buffer  166 . The CPU  172  can then work on the packets without the added cycles required to access external memory  176 . 
   The system described above can use dedicated processor systems, micro controllers, programmable logic devices, or microprocessors that perform some or all of the operations. Some of the operations described above may be implemented in software and other operations may be implemented in hardware. 
   For the sake of convenience, the operations are described as various interconnected functional blocks or distinct software modules. This is not necessary, however, and there may be cases where these functional blocks or modules are equivalently aggregated into a single logic device, program or operation with unclear boundaries. In any event, the functional blocks and software modules or features of the flexible interface can be implemented by themselves, or in combination with other operations in either hardware or software. 
   Having described and illustrated the principles of the invention in a preferred embodiment thereof, it should be apparent that the invention may be modified in arrangement and detail without departing from such principles. I claim all modifications and variation coming within the spirit and scope of the following claims.