Patent Publication Number: US-6660543-B1

Title: Method of measuring implant profiles using scatterometric techniques wherein dispersion coefficients are varied based upon depth

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention is generally directed to the field of semiconductor processing, and, more particularly, to a method of measuring implant profiles using scatterometric techniques wherein dispersion coefficients are varied based upon depth. 
     2. Description of the Related Art 
     There is a constant drive within the semiconductor industry to increase the operating speed of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for computers and electronic devices that operate at increasingly greater speeds. This demand for increased speed has resulted in a continual reduction in the size of semiconductor devices, e.g., transistors. That is, many components of a typical field effect transistor (FET), e.g., channel length, junction depths, gate insulation thickness, and the like, are reduced. For example, all other things being equal, the smaller the channel length of the transistor, the faster the transistor will operate. Thus, there is a constant drive to reduce the size, or scale, of the components of a typical transistor to increase the overall speed of the transistor, as well as integrated circuit devices incorporating such transistors. 
     During the course of manufacturing integrated circuit devices, a variety of doped regions may be formed in a semiconducting substrate. Typically, these doped regions are formed by performing an ion implant process wherein a dopant material, e.g., arsenic, phosphorous, boron, boron difluoride, etc., is implanted into localized areas of the substrate. For example, for CMOS technology, various doped regions, sometimes referred to as wells, are formed in the substrate. The wells may be formed using either N-type or P-type dopant atoms. After the wells are formed, semiconductor devices, e.g., transistors, may be formed in the region defined by the well. Of course, other types of doped regions may also be formed in modern semiconductor manufacturing operations. 
     As modem device dimensions continue to shrink, the implant profiles of the various doped regions become very important. That is, as device dimensions shrink, parameters of the doped region, such as depth, width, dopant concentration profile, etc., become more important. Small variations in one or more of these parameters may adversely affect device performance. For example, if well implants in a given device are formed too shallow or not formed deep enough, the devices formed in the wells may exhibit excessive leakage currents. 
     Various parameters reflecting the profile of implanted regions, e.g., depth, have here-tofore been determined by performing a number of calculations. These calculations are typically based upon the implant energy, the type of dopant material, the implant dose and/or the angle of the implant process. Ultimately, the accuracy of these various calculations could be determined by performing destructive testing on the device after it was completed. For example, a completed device could be cross-sectioned, and the profile of the implant region of interest could be determined by observation using a tunneling electron microscope (TEM). In some cases, resistance measurements were made of a doped region. Based upon the determined resistance value, the doped region was assumed to have a given profile. Various implant region profiles were associated with various resistance levels. 
     The aforementioned techniques for determining profiles of implanted regions was problematic in that, in order to confirm any calculations of the profile, time-consuming destructive testing of at least some devices, either production or test devices, was required. Moreover, such destructive testing was performed at a point so far removed in time from the implantation process that the results were not readily available to enable, if desired, timely adjustment of the implant process performed on subsequently processed wafers and later processing (e.g., RTA, diffusion) of the measured wafers. Thus, there is a need for a non-destructive testing methodology for determining at least some profile parameters of an implanted region formed in a semiconducting substrate. 
     The present invention is directed to various methods that may solve, or reduce, at least some of the problems described above. 
     SUMMARY OF THE INVENTION 
     The present invention is directed to several inventive methods. In one illustrative embodiment, the method comprises providing a semiconducting substrate, forming a first plurality of implant regions in the substrate, and illuminating at least one of the first plurality of implant regions with a light source in a scatterometry tool, wherein the scatterometry tool generates a profile trace corresponding to an implant profile of the illuminated implant region. The method further comprises creating at least one profile trace corresponding to an anticipated profile of the implant region, wherein, in creating the profile trace, values of at least one of an index of refraction (n) and a dielectric constant (k) are varied, and comparing the generated profile trace to at least one created profile trace. 
     In another illustrative embodiment, the method comprises providing a semiconducting substrate, forming a first plurality of implant regions in the substrate, and illuminating at least one of the first plurality of implant regions with a light source in a scatterometry tool, wherein the scatterometry tool generates a profile trace corresponding to an implant profile of the illuminated implant region. The method further comprises creating a library comprised of a plurality of created profile traces, wherein the created profile traces are representative of implant regions having varying implant profiles, and, in creating the created profile traces, values of at least one of an index of refraction (n) and a dielectric constant (k) are varied, and matching the generated profile trace to at least one of the created profile traces in the library. 
     In yet another illustrative embodiment, the method comprises providing a semiconducting substrate, forming a first plurality of implant regions in the substrate, and illuminating at least one of the first plurality of implant regions with a light source in a scatterometry tool, wherein the scatterometry tool generates a profile trace corresponding to an implant profile of the illuminated implant region. The method further comprises creating a target profile trace that is representative of a desired profile of the implant region, wherein, in creating the target profile trace, values of at least one of an index of refraction (n) and a dielectric constant (k) are varied, and comparing the generated profile trace to the target profile trace. In further embodiments, the method comprises modifying, based upon the comparison of the generated profile trace and the target profile trace, at least one parameter of an ion implant process used to form implant regions on subsequently processed substrates. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention may be understood by reference to the following description taken in conjunction with the accompanying drawings, in which like reference numerals identify like elements, and in which: 
     FIG. 1 is a cross-sectional view of a portion of a substrate having a plurality of implant regions formed therein, and a patterned layer of photoresist positioned above the substrate; 
     FIG. 2 is a cross-sectional view of the device shown in FIG. 1 after the patterned layer of photoresist has been removed; 
     FIG. 3 is an isometric view of the structure depicted in FIG. 2; 
     FIGS. 4A and 4B are illustrative depictions of implant regions post-implant and post-RTA, respectively, the profiles of which may be measured by employing one embodiment of the present invention; 
     FIG. 5 is a graphical depiction of the concentration profile of the doped regions shown in FIGS. 4A-4B as a function of depth; and 
     FIG. 6 is a schematic representation of an illustrative system in which the present invention may be employed. 
    
    
     While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the invention to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims. 
     DETAILED DESCRIPTION OF THE INVENTION 
     Illustrative embodiments of the invention are described below. In the interest of clarity, not all features of an actual implementation are described in this specification. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions must be made to achieve the developers&#39; specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure. 
     The present invention will now be described with reference to the attached figures. Although the various regions and structures of a semiconductor device and the doped regions are depicted in the drawings as having very precise, sharp configurations and profiles, those skilled in the art recognize that, in reality, these regions and structures are not as precise as indicated in the drawings. Additionally, the relative sizes of the various features and doped regions depicted in the drawings may be exaggerated or reduced as compared to the size of those features or regions on fabricated devices. Nevertheless, the attached drawings are included to describe and explain illustrative examples of the present invention. The words and phrases used herein should be understood and interpreted to have a meaning consistent with the understanding of those words and phrases by those skilled in the relevant art. No special definition of a term or phrase, i.e., a definition that is different from the ordinary and customary meaning as understood by those skilled in the art, is intended to be implied by consistent usage of the term or phrase herein. To the extent that a term or phrase is intended to have a special meaning, i.e., a meaning other than that understood by skilled artisans, such a special definition will be expressly set forth in the specification in a definitional manner that directly and unequivocally provides the special definition for the term or phrase. 
     In general, the present invention is directed to various methods of measuring implant profiles using scatterometric techniques wherein dispersion coefficients are varied based upon depth. In some embodiments, the measured implant profiles are used to control one or: more parameters of an ion implant process to be performed on subsequently processed wafers. As will be readily apparent to those skilled in the art upon a complete reading of the present application, the present method is applicable to a variety of technologies, e.g., NMOS, PMOS, CMOS, etc., and is readily applicable to a variety of devices, including, but not limited to, logic devices, memory devices, etc. 
     The present invention is related to a previously filed application, Ser. No. 09/824,156, entitled “Method of Measuring Implant Profiles Using Scatterometric Techniques,” filed Apr. 2, 2001. That application is currently assigned to the assignee of the present invention, Advanced Micro Devices, Inc. The present invention is also related to application Ser. No. 10/285,041, entitled “Method of Monitoring Anneal Processes Using Scatterometry, and System for Performing Same,” filed concurrently with the present application. 
     FIG. 1 depicts an illustrative structure  11  that may be used in accordance with the present invention. The structure  11  is formed on part of a wafer comprised of, for example, silicon. As will become clear upon a complete reading of the present application, the structure  11  may be a test structure, or it may be part of an actual production integrated circuit device. As shown in FIG. 1, a patterned layer of photoresist  12  is formed above a semiconducting substrate  10 . The patterned layer of photoresist  12  has a plurality of photoresist features  14  defined therein. An ion implantation process, as indicated by arrows  16 , is used to form a plurality of implant regions  18  in the areas of the substrate  10  not covered by the patterned layer of photoresist  12 . 
     The patterned layer of photoresist  12  may be formed by a variety of known photolithography techniques. For example, the patterned layer of photoresist  12  may be comprised of a negative or a positive photoresist. The thickness  13  of the patterned layer of photoresist  12  may be varied as a matter of design choice. In one illustrative embodiment, the patterned layer of photoresist  12  has a thickness  13  that ranges from approximately 1.2-2.5 μm (12,000-25,000 Å). Moreover, the features  14  in the patterned layer of photoresist  12  may have a width  15  that may be varied as a matter of design choice. The spacing  15   a  between the photoresist features  14  may also vary. The ion implantation process may be performed by a variety of tools used in modern semiconductor fabrication facilities for performing such operations. Moreover, the implant energy, the dopant material implanted, the concentration of dopant material, as well as the implant angle, may be varied in forming the implant regions  18  in the substrate  10 . 
     Next, as shown in FIG. 2, the patterned layer of photoresist  12  is removed, or stripped, using a variety of known techniques, e.g., ashing. More particularly, as shown in FIG. 2, each of the implant regions  18  has a width  17  and a depth  19  beneath the surface  21  of the substrate  10 . FIG. 3 is an isometric view of the substrate  10 , and the implant regions  18 , shown in FIG.  2 . As will be recognized by those skilled in the art after a complete reading of the present application, the implant regions  18  constitute a grating pattern that may be measured using scatterometric techniques. In some cases, such a grating pattern may be formed in the scribe lines of a semiconducting substrate. The number of these implant regions  18  that may be formed on an actual device may vary. For example, the grating pattern may be formed in a 100 nm×120 nm region in which approximately 300-400 implant regions  18  are formed (the length of which are parallel to the short side of the region). The implant regions  18  depicted in FIGS. 1-3 reflect the as-implanted location of those regions. However, as will be described further below, the present invention may also be used in cases where the implant regions  18  have been subjected to one or more heat treatment or anneal processes that are performed in a furnace of a rapid thermal anneal (RTA) chamber. As used herein, the term anneal should be understood to refer to any type of heating process at any level of temperature. 
     As stated previously, scatterometric techniques will be used to measure the implant profiles of the implant regions  18 . As used herein, measuring the implant profile of the implant region  18  means measuring one or more characteristics of the implant region  18 , e.g., depth, width, dopant concentration, etc. For example, the implant profiles may reflect dopant concentration levels at various depths into a substrate. A variety of scatterometry type tools may be used with the present invention, e.g., so-called 2θ-type systems and lens-type scatterometry tools. An illustrative scatterometry tool  24  comprised of a light source  20  and a detector  22  is schematically depicted in FIG.  2 . In general, the light source  20  is used to illuminate the structure  11 , and the detector  22  takes optical measurements, such as intensity, of the reflected light. The scatterometry tool  24  may use white light, or some other wavelength or combination of wavelengths, depending on the specific implementation. Typically, the light source  20  will generate an incident beam that has a wide spectral composition and wherein the intensity of the reflected light changes slowly in comparison to changes in wavelength. The angle of incidence of the light may also vary, depending on the specific implementation. For example, a spectroscopic ellipsometer (single angle, many wavelengths), or a laser (single wavelength, many angles) may be used with the present invention. Additionally, the light source  20  and the detector  22  may be arranged in a concentric circle configuration, with the light source  20  illuminating the structure  11  from a perpendicular orientation, e.g., a reflectometer. The intensity of the reflected light may be measured as s- and p- polarization over either multiple angles or at multiple wavelengths. 
     In general, the scatterometry tool  24  (see FIG. 4) includes optical hardware, such as an ellipsometer or reflectometer, and a data processing unit loaded with a scatterometry software application for processing data collected by the optical hardware. For example, the optical hardware may include a Model OP5230 or OP5240 with a spectroscopic ellipsometer offered by Thermawave, Inc. of Fremont, Calif. The data processing unit may comprise a profile application server manufactured by Timbre Technologies, a fully owned subsidiary of Tokyo Electron America, Inc. of Austin, Tex. and distributed by Thermawave, Inc. 
     The implant regions  18  are schematically depicted in FIGS. 1-3 as having a generally rectangular cross-sectional configuration. FIGS. 4A-4B are enlarged views of the implant regions  18  wherein the implant regions  18  have a more realistic, non-rectangular implant profile. Even more specifically, FIGS. 4A-4B depict the implant profiles post-implant (FIG. 4A) and post-anneal (FIG.  4 B). As is well known to those skilled in the art, after the implant regions  18  are initially formed in the substrate, one or more anneal processes may be performed to activate the implanted dopant material and/or to repair the damage to the lattice structure resulting from the ion implant process performed to form the implant regions  18 . The temperature and duration of this anneal process may vary depending upon the application. In one illustrative embodiment, the anneal process may be performed in an RTA chamber at a temperature ranging from 1000-1200° C. for a duration of approximately 5-10 seconds. 
     As implanted, the implant regions  18  have a profile defined by the line  62  and a depth  64 , as shown in FIG.  4 A. FIG. 4B depicts the implant regions  18  after one or more anneal processes have been performed in, for example, an RTA chamber. The post-anneal profile of the implant region  18  after the anneal process is performed is indicated by the line  66 , and it has a post-anneal depth  68 . 
     With the decrease in modem device dimensions, and the increase in packing density, it is very important to be able to accurately and reliably determine one or more characteristics of the implant regions  18  before and/or after the anneal process is performed on the implant regions  18 . According to the present invention, scatterometric techniques are employed to determine one or more characteristics of a profile of the implant regions  18 . In the present invention, the scatterometric measurements involve varying the dispersion coefficients “n” (index of refraction) and “k” (dielectric constant) as a function of depth. That is, due to the graduation in the concentration of the dopant atoms in the implant regions  18 , the values of “n” and “k” also vary. Even more specifically, the concentration of dopant atoms will, in one embodiment, be greater toward the surface  21  of the substrate and the concentration will tend to decrease with increasing depth into the substrate. In other embodiments, the ion implant process may be performed such that the peak concentration of dopant atoms is at a certain depth below the surface  21  of the substrate  10 . By varying the values of “n” and/or “k” with depth, a more accurate depiction of the implant profile may be determined. Such a technique is to be contrasted with the situation where the values of “n” and “k” are assumed to be constant throughout the depth of the implant region. 
     In FIG. 4A, the line  62  is an illustrative depiction of the outline of the implant regions  18  shown therein after the implant process is performed. In FIG. 4B, the line  66  depicts the outline of the implant regions  18  after one or more anneal processes have been performed on the implant regions  18 . The original outline  62  of the implant regions  18 , as implanted, is depicted by the dashed lines shown in FIG.  4 B. As can be seen from FIG. 4B, the dopant materials tend to migrate in an approximately isotropic nature due to the anneal process. FIG. 5 are graphical depictions of the dopant concentration “C” as a function of depth “D” of the doped regions  18  after implant (left-most graph) and after anneal (right-most graph). As can be seen from these plots, in one embodiment, the dopant concentration is higher toward the surface  21  of the substrate  10  and decreases with increasing depth into the substrate  10 . As will be clear to those skilled in the art upon a complete reading of the present application, the present invention may be used to measure implant profiles either before or after such anneal processes are performed. 
     According to one embodiment of the present invention, the values of “n” and “k” are varied with the depth of the implant regions  18 . That is, as shown in FIG. 4A, the implant regions  18  may be, in effect, modeled as several different layers  70   a ,  70   b ,  70   c  and  70   d  wherein the values of “n” and “k” for each layer may be different. In FIG. 4B, additional layers  70   e  and  70   f  may be added to account for the additional depth of the implant regions  18  after the anneal process. The number, thickness and location of the various layers  70   a - 70   f  may vary depending upon the particular application. Moreover, the thickness of all of the various layers  70   a - 70   f  need not be the same, and the values for “n” and/or “k” may not change at every layer  70   a - 70   f . That is, for example, more than one layer  70   a - 70   f  may exhibit the same value for “n.” Moreover, the variations in “n” and “k” values between layers  70   a - 70   f  need not be linear. In one illustrative embodiment, the thickness of the layers  70   a - 70   f  may each be approximately 10-20 nm. 
     By allowing the “n” and “k” values to vary with depth, a more accurate representation of one or more characteristics of the implant regions  18  may be determined. The values for “n” and “k” may be estimated for every layer  70   a - 70   f , and these estimated values for “n” and “k” may be used as part of the process of establishing a characteristic signature or profile trace, associated with a particular implant profile or characteristic of an implant profile. Such a signature or profile trace may be calculated (using Maxwell&#39;s equations and rigorous coupled wave analysis (RCWA)) for a vast variety, if not all, possible combinations of implant profiles readily anticipated by the design process. The correlation between the scatterometry profile trace and the actual implant region  18  profile may be based on a variety of characteristics or factors, including, but not limited to, the width  17  and the depth  19  of the implant regions  18 , the concentration of the dopant material, and the dopant concentration profile. 
     Variations in one or more of the characteristics will cause a significant change in the diffraction characteristics of the incident light from the light source  20 . Thus, using scatterometric techniques, a unique profile trace may be established for each unique combination of implant profile characteristics, e.g., depth, width, concentration, etc. A library of profile traces corresponding to each unique combination of implant profile characteristics may be generated and stored in a library. Scatterometry libraries are commercially available from Timbre Technologies, Inc. Although not necessary, if desired, the library of calculated profile traces may be confirmed by various destructive metrology tests, where a scatterometry profile trace is generated and the actual profile of the features is subsequently measured using a cross sectional tunneling electron microscope metrology technique. Obviously, the number of combinations used to create the library may vary as a matter of design choice. Moreover, the greater the number of combinations, the greater will be the library containing the appropriate signature profiles of the implant regions. By allowing “n” and “k” to vary with depth, the library of signature traces may be relatively large due to the additional variables in the values for “n” and “k.” However, given the importance of accurately forming various implant regions  18  in a substrate  10 , the additional computing power and storage required may be warranted. 
     FIG. 6 depicts an illustrative system  50  that may be employed with the present invention. As shown therein, the system  50  is comprised of a scatterometry tool  24 , a controller  40 , and an ion implant tool  35 . The scatterometry tool  24  is used to measure one or more of the implanted regions  18  formed on wafers  37  that have been processed through the implant tool  35 . Based upon this measurement, the scatterometry tool  24  is used to generate a profile trace for the measured implant region  18 . Thereafter, in one embodiment of the present invention, the generated profile trace of the implant region  18  is compared to a preselected target profile trace. The preselected target profile trace corresponds to a desired characteristic of the implant regions  18 , e.g., implant profiles of a certain desired depth or concentration profile. The target profile trace may be created by varying the values for “n” and “k” as a function of depth and using Maxwell&#39;s equations (using these varied values of “n” and “k”) to derive the target profile trace. A determination is then made, by either the controller  40  or the scatterometry tool  24 , if there is a deviation between the generated (or measured) profile trace and the target profile trace. If so, the controller  40  may then change one or more parameters of the operating recipe of the implant tool  35 , such that implanted regions  18  formed in the subsequently processed wafers  39  are closer to the target profile. For example, one or more parameters of the implant process, e.g., implant angle, implant energy, dopant material, and/or dopant concentration, to be performed on the subsequently processed wafers  39  may be adjusted to achieve the target implant profile. 
     In another embodiment, the present invention may be employed to compare a generated profile trace to a library of traces, each of which corresponds to a particular anticipated implant profile. That is, in this embodiment, the method comprises generating additional profile traces for implant regions  18  having different implant profiles, and establishing a library comprised of a plurality of the profile traces, wherein each of the plurality of traces in the library is correlated to a particular implant profile. The traces in the library may all be created on the basis of values for “n” and “k” that are allowed to vary based upon depth into the substrate. There after, using known matching techniques, the generated profile trace (from the scatterometry tool) may be matched to the closest corresponding trace in the library. Based upon this match, the measured implant region  18  is determined to have an implant profile that corresponds to the implant profile associated with the matched trace from the library. 
     The scatterometry tool  24  is used to generate a profile trace for a given structure  11  with implant regions  18  formed thereon. The scatterometry tool  24  may sample one or more structures  11  in a given wafer in a lot or even generate a profile trace for each structure  11  in the lot, depending on the specific implementation. Moreover, the profile traces from a sample of the structures  11  may be averaged or otherwise statistically analyzed. A controller, either in the scatterometry tool  24  or elsewhere in the manufacturing plant, e.g., controller  40 , then compares the profile trace (i.e., individual or averaged) generated by the scatterometry tool  24  to a library of calculated profile traces with known implant region profiles to correlate or match the generated or measured profile trace to a trace from the library having a known implant region profile. Based upon these comparisons, the controller  40 , if needed, may adjust one or more parameters of an ion implant process to be performed on subsequently processed wafers  39  in the implant tool  35 . 
     Based on the determined implant region profile, control equations may be employed to adjust the operating recipe of the ion implant tool  35  to, for example, account for deviations between the measured implant profile and the target implant profile. The control equations may be developed empirically using commonly known linear or non-linear techniques. The controller  40  may automatically control the operating recipes of the implant tool  35  used to form implant regions  18  on subsequently processed wafers  37 . Through use of the present invention, the deviations between the profiles of implant regions formed on subsequently processed wafers and a target implant profile may be reduced. 
     In the illustrated embodiment, the controller  40  is a computer programmed with software to implement the functions described herein. Moreover, the functions described for the controller  40  may be performed by one or more controllers spread through the system. For example, the controller  40  may be a fab level controller that is used to control processing operations throughout all or a portion of a semiconductor manufacturing facility. Alternatively, the controller  40  may be a lower level computer that controls only portions or cells of the manufacturing facility. Moreover, the controller  40  may be a stand-alone device, or it may reside on the implant tool  35 . However, as will be appreciated by those of ordinary skill in the art, a hardware controller (not shown) designed to implement the particular functions may also be used. 
     Portions of the invention and corresponding detailed description are presented in terms of software, or algorithms and symbolic representations of operations on data bits within a computer memory. These descriptions and representations are the ones by which those of ordinary skill in the art effectively convey the substance of their work to others of ordinary skill in the art. An algorithm, as the term is used here, and as it is used generally, is conceived to be a self-consistent sequence of steps leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of optical, electrical, or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like. 
     It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise, or as is apparent from the discussion, terms such as “processing” or “computing” or “calculating” or “determining” or “displaying” or the like, refer to the actions and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical, electronic quantities within the computer system&#39;s registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices. 
     An exemplary software system capable of being adapted to perform the functions of the controller  40 , as described, is the Catalyst system offered by KLA Tencor, Inc. The Catalyst system uses Semiconductor Equipment and Materials International (SEMI) Computer Integrated Manufacturing (CIM) Framework compliant system technologies, and is based on the Advanced Process Control (APC) Framework. CIM (SEMI E81-0699—Provisional Specification for CIM Framework Domain Architecture) and APC (SEMI E93-0999—Provisional Specification for CIM Framework Advanced Process Control Component) specifications are publicly available from SEMI. 
     The present invention is directed to several inventive methods. In one embodiment, the method comprises providing a semiconducting substrate, forming a first plurality of implant regions  18  in the substrate, and illuminating at least one of the first plurality of implant regions  18  with a light source in a scatterometry tool  24 , wherein the scatterometry tool  24  generates a profile trace corresponding to an implant profile of the illuminated implant region  18 . The method further comprises creating at least one profile trace corresponding to an anticipated profile of the implant region, wherein, in creating the profile trace, values of at least one of an index of refraction (n) and a dielectric constant (k) are varied, and comparing the generated profile trace to at least one created profile trace. 
     In another illustrative embodiment, the method comprises providing a semiconducting substrate, forming a first plurality of implant regions  18  in the substrate, and illuminating at least one of the first plurality of implant regions  18  with a light source in a scatterometry tool  24 , wherein the scatterometry tool  24  generates a profile trace corresponding to an implant profile of the illuminated implant region  18 . The method further comprises creating a library comprised of a plurality of created profile traces, wherein the created profile traces are representative of implant regions having varying implant profiles, and, in creating the created profile traces, values of at least one of an index of refraction (n) and a dielectric constant (k) are varied, and matching the generated profile trace to at least one of the created profile traces in the library. 
     In yet another illustrative embodiment, the method comprises providing a semiconducting substrate, forming a first plurality of implant regions  18  in the substrate, and illuminating at least one of the first plurality of implant regions  18  with a light source in a scatterometry tool  24 , wherein the scatterometry tool  24  generates a profile trace corresponding to an implant profile of the illuminated implant region  18 . The method further comprises creating a target profile trace that is representative of a desired profile of at least one implant region  18 , wherein, in creating the target profile trace, values of at least one of an index of refraction (n) and a dielectric constant (k) are varied, and comparing the generated profile trace to the target profile trace. In further embodiments, the method comprises modifying, based upon the comparison of the generated profile trace and the target profile trace, at least one parameter of an ion implant process used to form implant regions on subsequently processed substrates. 
     By adjusting one or more parameters of the implant tool  35  used to form the implant regions  18  on the wafer, as described above, the resultant implant profiles can be adjusted to reduce the overall profile variations for wafers manufactured in a given manufacturing line. Reduced variation equates directly to reduced process cost, increased device performance, and increased profitability. 
     The particular embodiments disclosed above are illustrative only, as the invention may be modified and practiced in different but equivalent manners apparent to those skilled in the art having the benefit of the teachings herein. For example, the process steps set forth above may be performed in a different order. Furthermore, no limitations are intended to the details of construction or design herein shown, other than as described in the claims below. It is therefore evident that the particular embodiments disclosed above may be altered or modified and all such variations are considered within the scope and spirit of the invention. Accordingly, the protection sought herein is as set-forth in the claims below.