Patent Publication Number: US-7221213-B2

Title: Voltage regulator with prevention from overvoltage at load transients

Description:
BACKGROUND OF THE INVENTION  
     1. Field of the Invention 
     The present invention relates to a voltage regulator and, more particularly, to a voltage regulator capable of stabilizing output voltages at load transients. 
     2. Description of the Prior Art 
       FIG. 1(A)  is a circuit diagram showing a first example of a conventional linear regulator  11 . The linear regulator  11  converts an input voltage V in  into an output voltage V out , and supplies an output current I out  in accordance with a requirement of a load I d . A resistive voltage divider formed of series-connected resistors R 1  and R 2  generates a feedback voltage V fb  representative of the output voltage V out . Through comparing the feedback voltage V fb  and a predetermined reference voltage V ref , an error amplifier  13  generates and applies an error voltage V err  to a gate electrode of a transistor PQ. The drain-source current channel of the transistor PQ is connected between the input voltage V in  and the output voltage V out . As the error voltage V err  is applied to control the resistance of the drain-source current channel, the linear regulator  11  maintains the output voltage V out  at a regulated value and supplies the output current I out  in accordance with the requirement of the load I d . As shown in  FIG. 1(B) , which is a second example of a conventional linear regulator  12 , an NMOS transistor NS may replace the PMOS transistor PQ and then function as a passive element between the input voltage V in  and the output voltage V out . However in this case, the non-inverting input terminal of the error amplifier  13  is changed to receive the reference voltage V ref  while the inverting input terminal is changed to receive the feedback voltage V fb . 
     When the load I d  makes a transient from heavy loading to light loading, e.g., the load I d  is suddenly removed, an excessive portion of the output current I out  turns to charge the output capacitor C out  before the output current I out  eventually reduces to become equal to the light load I d  in response to this transient. As a result, the output voltage V out  is raised out of the regulated value. In order to overcome this problem and suppress the overshooting of the output voltage V out , the prior art suggests a current sinking circuit for providing the excessive portion of the output current I out  with a sinking path when the load transients occur. 
     In the first example of  FIG. 1(A) , the current sinking circuit  14   a  primarily includes a voltage comparator  15  and a switching transistor PS. When the load I d  makes a transient from heavy loading to light loading and then causes the output voltage V out  to rise as mentioned earlier, the error amplifier  13  also correspondingly generates a rising error voltage V err . Once the error voltage V err  reaches a predetermined trigger voltage V trg , the voltage comparator  15  turns on the switching transistor PS so as to form a sinking path for short-circuiting the output current I out  into the ground potential. In the second example of  FIG. 1(B) , the voltage comparator  15  of the current sinking circuit  14   b  is provided to compare the reference voltage V ref  and the feedback voltage V fb  level-shifted by a predetermined offset voltage V ofs . When the feedback voltage V fb  becomes large enough to trigger the voltage comparator  15 , the switching transistor NS is turned on so as to form a sinking path for short-circuiting the output current I out  into the ground potential. 
     Although the prior art of  FIG. 1(A)  or  1 (B) uses the current sinking circuit  14   a  or  14   b  to provide the sinking path for suppressing the overshooting of output voltage V out , the output current I out  is in fact dramatically pulled down since the switching transistor PS or NS when turned on short-circuits the output terminal of the linear regulator  11  or  12  directly to the ground potential. As an adverse result, the output voltage V out  is prone to oscillating at a high frequency and actually causes the current sinking circuit  14   a  or  14   b  to repeatedly turn the switching transistor PS or NS between on and off. 
     SUMMARY OF THE INVENTION  
     In view of the above-mentioned problems, an object of the present invention is to provide a voltage regulator capable of preventing from overshooting and oscillating of the output voltage at load transients, thereby providing a stable output voltage. 
     According the present invention, a voltage regulator includes a voltage converting circuit, an event detecting circuit, and a current sinking circuit. The voltage converting circuit has an output terminal for supplying an output current at an output voltage to a load. The event detecting circuit detects a transient of the load. In response to the transient of the load, the current sinking circuit allows a current source to provide a sink current flowing from the output terminal of the voltage converting circuit into a ground potential. The sink current is finite and stable. When the output voltage decreases to a predetermined threshold voltage, the current sinking circuit allows the current source to continuously provide the finite and stable sink current for a predetermined extension time, causing the output voltage to decrease from the threshold voltage to a regulated value. 
     These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS  
       The above-mentioned and other objects, features, and advantages of the present invention will become apparent with reference to the following descriptions and accompanying drawings, wherein: 
         FIG. 1(A)  is a circuit diagram showing a first example of a conventional linear regulator; 
         FIG. 1(B)  is a circuit diagram showing a second example of a conventional linear regulator; 
         FIG. 2(A)  is a circuit block diagram showing a voltage regulator according to the present invention; 
         FIG. 2(B)  is a timing chart showing an operation of a voltage regulator according to the present invention; and 
         FIG. 3  is a detailed circuit diagram showing one example of a voltage regulator according to the present invention. 
     
    
    
     DETAILED DESCRIPTION  
     The preferred embodiments according to the present invention will be described in detail with reference to the drawings. 
       FIG. 2(A)  is a circuit block diagram showing a voltage regulator  20  according to the present invention. Referring to  FIG. 2(A) , the voltage regulator  20  primarily includes a voltage converting circuit  21 , an event detecting circuit  22 , and a current sinking circuit  23 . The current sinking circuit  23  primarily includes a discharge controlling circuit  24  and a switchable current source  25 . 
     Speaking in general, the voltage converting circuit  21  is a type of circuit that converts an input voltage V in  into an output voltage V out  and supplies an output current I out  at the output voltage V out  through an output terminal in accordance with a requirement of a load I d . The voltage converting circuit  21  may be implemented by the linear regulator  11  or  12  shown in  FIG. 1(A)  or  1 (B), i.e. consisting of a voltage divider, an error amplifier, and a transistor as a passive element. In addition, the voltage converting circuit  21  may also be implemented by a switching regulator utilizing a pulse width modulation or pulse frequency modulation technique. Still alternatively, the voltage converting circuit  21  may be implemented by a charge pump regulator. Since both of the switching regulator and the charge pump regulator are well known in the prior art, the detailed descriptions thereof are omitted hereinafter. 
     The event detecting circuit  22  is provided to detect for a transient of the load I d , especially for a transient from heavy loading to light loading. Since the output voltage V out  is raised due to the charging of the output capacitor C out , as mentioned earlier, when the load I d  makes a transient from heavy loading to light loading, the event detecting circuit  22  may be implemented by a voltage comparator for determining whether the output voltage V out  is rising over a predetermined threshold voltage V th . In addition to the direct detection of the output voltage V out , the event detecting circuit  22  may detect any of the signals associated with the output voltage V out , for example, the error voltage V err  or the feedback voltage V fb , both of which changes depending on the output voltage V out . Therefore, the event detecting circuit  22  may be implemented by the voltage comparator  15  of  FIG. 1(A) , which effectively determines the transient of the load I d  by comparing the error voltage V err  and the trigger voltage V trg . Alternatively, the event detecting circuit  22  may be implemented by the voltage comparator  15  of  FIG. 1(B) , which effectively determines the transient of the load I d  by comparing the feedback voltage V fb  minus the offset voltage V ofs  and the reference voltage V ref . 
     In response to the transient of the load I d  detected by the event detecting circuit  22 , the discharge controlling circuit  24  generates a discharge control signal DP for controlling the switchable current source  25 . More specifically, when the output voltage V out  is rising above a predetermined threshold voltage V th , the discharge control signal DP activates or turns on the switchable current source  25  for allowing a sink current I sk  to flow from the output terminal of the voltage converting circuit  21  into the ground potential. However, once the output voltage V out  decreases below the threshold voltage V th  due to the sink current I sk , the discharge control signal DP starts extending a predetermined time for continuously allowing the switchable current source  25  to provide the sink current I sk  in order to make sure the output voltage V out  returns to the regulated value prior to the transient event. It should be noted that the switchable current source  25  is activated or turned on for providing a finite and stable sink current I sk , instead of short-circuiting the output terminal of the voltage converting circuit  21  directly to the ground potential, thereby achieving a stable decrease in the output voltage V out  without oscillations. 
       FIG. 2(B)  is a timing chart showing an operation of a voltage regulator  20  according to the present invention. At time T 0 , the load I d  makes a transient from heavy loading I hy  to light loading I lt , resulting in some of the output current I out  turns to charge the output capacitor C out  as a capacitor current I c . Therefore, the output voltage V out  starts rising at time T 0 . After the output voltage V out  reaches a predetermined threshold voltage V th  at time T 1 , the event detecting circuit  22  is triggered to activate or turn on the current sinking circuit  23 . Delayed slightly by the realistic, finite operation speed of circuit, at time T 2  is the switchable current source  25  activated or turned on to provide the finite and stable sink current I sk . As a result, the capacitor current I c  is subjected to a sudden but finite change and most likely reverses from the positive direction (+) to the negative direction (−) to discharge the output capacitor C out  as shown in figure. It should be noted that at time T 3  the output voltage V out  decreases to the threshold voltage V th , but the sink current I sk  is continuously supplied by the switchable current source  25 . The sink current I sk  is kept flowing from time T 3  through time T 4  such that the output voltage V out  returns to the original regulated value V 0  from the threshold voltage V th . In other words, the current sinking circuit  23  is designed to maintain the supply of the sink current I sk  until the output voltage V out  returns to the original regulated value V o . Now assumed that during time T 3  through time T 4 , the sink current I sk  is dedicated to discharging the extra charge of the output capacitor C out , i.e. at this phase the output current I out  has almost completely been modulated to the light loading lit in response to the transient. If in one embodiment the current sinking circuit  23  provides a constant sink current I sk , the extension time dT can be approximately calculated by the equation: dT=C out /I sk *(V th −V o ). 
       FIG. 3  is a detailed circuit diagram showing one example of a voltage regulator  30  according to the present invention. In a voltage converting circuit  31 , a differential amplifying pair is made up of transistors P 1  and P 2  and current mirrors M 1 , M 2 , and M 3  for comparing the feedback voltage V fb  and the reference voltage V ref , and then generating the error voltage V err  to control the current channel resistance of the transistor PQ connected between the input voltage V in  and the output voltage V out . Therefore, the voltage converting circuit  31  is implemented by a linear regulator. 
     In an event detecting circuit  32 , based on the current mirroring symmetry of design, through a transistor N 3  flows a current I a , which is proportional to the current flowing through the transistor P 1  of the differential amplifying pair, and through a transistor P 3  flows a current I b , which is proportional to the current flowing through the transistor P 2  of the differential amplifying pair. Because the differential amplifying pair distributes the currents among the transistors P 1  and P 2  in accordance with the feedback voltage V fb  and the reference voltage V ref , the difference between the currents I a  and I b  appropriately reflects the difference between the feedback voltage V fb  and the reference voltage V ref . When an error current I err  between the currents I a  and I b  rises above a predetermined offset current I ofs , a Schmidt trigger STI is triggered. For this reason, the event detecting circuit  32  may be considered as a current comparator utilizing the current comparison to detect for the transient of the load I d . 
     After the Schmidt trigger STI is triggered to output a low level, in a discharge controlling circuit  34  is a transistor P 4  turned on and a transistor N 4  off, resulting in a charge current flowing through the transistor P 4  into a capacitor C 3 . Rapidly, the potential difference across the capacitor C 3  becomes large enough for triggering a Schmidt trigger ST 2  to generate a discharge control signal DP at a low level. In response to the low level of the discharge control signal DP, a switching transistor PS of a switchable current source  35  is turned on to allow a current source CC to provide a finite and stable sink current I sk . In one embodiment, the current source CC may be implemented by a constant current source for supplying a constant sink current I sk . When the Schmidt trigger ST 1  of the event detecting circuit  32  changes its output to a high level, i.e. the output voltage V out  decreases to the threshold voltage V th  due to the sink current I sk , the transistor P 4  is turned off and the transistor N 4  is turned on in the discharge controlling circuit  34 . As a result, the capacitor C 3  is discharged through a resistor R 3  and the transistor N 4 . Because the discharge rate of the capacitor C 3  is made slower than the charge rate due to the resistor R 3 , the discharge control signal DP maintains at the low level for an extension time dT to allow the switchable current source  35  to continuously supply the sink current I sk . 
     While the invention has been described by way of examples and in terms of preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications. 
     Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.