Patent Publication Number: US-9417649-B2

Title: Method and apparatus for a floating current source

Description:
TECHNICAL FIELD 
     The present invention generally relates to electrical circuits configured as current sources, and particularly relates to two-transistor floating current source, e.g., for providing a biasing current to a resistor or other load at a desired float voltage. 
     BACKGROUND 
     Current sources are used in a variety of applications. An ideal current source has infinite source impedance and is insensitive to the voltage present at its source terminal. An ideal current sink behaves similarly, i.e., the magnitude of current drawn by the sink terminal is insensitive to the voltage present on the sink terminal. 
     Although practical current sources deviate from ideal behavior, current sources find wide use in a range of circuit applications and practical current sources having good real-world behavior can be constructed. While current sources may be implemented using relatively simple circuitry, more complex circuitry is typically used for more sophisticated application, such as in the implementation of so called floating current sources. 
     For example, certain types of sensors operate as variable resistors and require a bias voltage across their resistor terminals in order to operate properly. Similarly, some controllable resistors also require a bias voltage across the controllable resistor pins. Because a true floating current source presents high impedance to both pins of the resistor being biased, it is possible to use it to bias variable or controllable resistors in applications where both pins of the resistor must appear to float with respect to the bias network. 
     In some applications, it is also useful to float the resistor at some known DC voltage with respect to circuitry used to vary the resistance of a controllable resistor or circuitry used to detect the resistance of a variable resistor, while still presenting high AC impedance to both pins of the resistor being biased. Some known circuits are referred to as floating current sources although they do not truly “float,” because one terminal exhibits low impedance with respect to some voltage source, e.g., ground or power. In other instances, circuits referred to as floating current sources in reality operate as floating current sinks and require some minimum external voltage across the current sink terminals. 
     Further, while true floating current sources are known, such circuits generally use multiple operational amplifiers and/or combinations of several transistors and supporting circuitry, which circuitry is comparatively complex as compared to the teachings presented herein. Such complexity leads to undesirable cost and, in some cases, excessive component count and/or consumption of limited circuit board area. 
     SUMMARY 
     As taught herein, a floating current source outputs a load biasing current from a source terminal into an external load which may have a variable resistance, and sinks the load biasing current from the load into a sink terminal. Advantageously, the floating current source includes a single-transistor current sink having a bias control that sets the magnitude of the load biasing current desired, and further includes a single-transistor current source that self-biases to produce the same magnitude of current as the single transistor current sink with the source pin biased to a known high impedance DC float Voltage. After a short period of stabilization, both the source and sink terminals of the floating current source will provide a constant current through a variable resistance load. One or more AC shunts within the self-biasing network prevent any AC fluctuations present or impressed on the source terminal of the floating current source from changing the operating point of the single-transistor current source, thereby imparting a high effective impedance to the single-transistor current source. 
     The above arrangement enables a simple, high-impedance, two-transistor circuit to provide a fixed bias current to a variable resistance load, while floating the load at a known DC voltage. 
     Of course, the present invention is not limited to the above features and advantages. Indeed, those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  depicts a block diagram of a floating current source according to an embodiment. 
         FIG. 2  depicts a circuit configuration of a single-transistor current source according to an embodiment. 
         FIGS. 3A-3C  depict circuit configurations of a single-transistor current sink component of a floating current source according to embodiments. 
         FIGS. 4A-4B  depict additional circuit configurations of a single-transistor current sink component of a floating current source according to embodiments. 
         FIGS. 5A-5B  depict circuit configurations of a single-transistor current source component of the floating current source according to embodiments. 
         FIG. 6  depicts an additional circuit configuration of a single-transistor current source component of the floating current source according to an embodiment. 
         FIG. 7  depicts a floating current source coupled to a resistive load and configured to source a load biasing current across the resistive load according to an embodiment. 
         FIG. 8  depicts a block diagram of a floating current source as part of a communication signal test circuit. 
         FIG. 9  is a diagram of a Junction Field-Effect Transistor (JFET) configured as a variable resistance load, for use with the floating current source contemplated herein. 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 1  illustrates one embodiment of a floating current source  10  that provides a load biasing current I LBC . The load biasing current I LBC  is provided across an external load  12  having first and second terminals  14 ,  16 . The floating current source  10  includes a single-transistor current source  18  that supplies the load biasing current I LBC  across the external load  12 . The floating current source  10  additionally includes a single-transistor current sink  20  that sinks the load biasing current I LBC . The magnitude of the load biasing current I LBC  to be sunk by the single-transistor current sink  20  is set by a biasing network of the single-transistor current sink  20 , in dependence on the biasing signal input to that biasing network. 
     In more detail, the single-transistor current sink  20  includes a first transistor  22 . The first transistor  22  has a first terminal  24 , a second terminal  26  and a third terminal  30 . The second terminal  26  is coupled to a reference ground  28 . The third terminal  30  is coupled to the second terminal  16  of the load  12  and operative as a sink terminal of the floating current source  10 . The first terminal  24  is coupled to a first biasing network  32 , which, in combination with its input bias signal, controls the magnitude of the load biasing current, I LBC . 
     The single-transistor current source  18  includes a second transistor  36 . The second transistor  36  has a first terminal  38 , a second terminal  40  and a third terminal  44 . The second terminal  40  is coupled to a voltage supply  42 . The third terminal  44  is coupled to the first terminal  14  of the external load  12  and operative as a source terminal of the floating current source  10 . The first terminal  38  is coupled to a second biasing network  46 . As further detailed below, the second biasing network  46  is configured such that the single-transistor current source  18  self-biases as taught herein. 
     In particular, second biasing network  46  automatically biases the second transistor  36  to source current I LBC , as set according to the bias of the first transistor  22  in the single-transistor current sink  20 , and to fix the DC voltage drop from the voltage supply  42  to the source terminal  44  to a constant value proportional to I LBC . According to this contemplated arrangement, the DC voltage between the supply voltage  42  and the source terminal  44  of the floating current source  10  can be expressed as
 
 V=I/K+C  
 
where I is the positive current source from the source terminal  44 , V is the voltage across the single-transistor current source  18 —i.e., the voltage drop between the voltage supply  42  and the source terminal  44 , K is the transconductance of the single-transistor current source  18 , and C is a constant offset that is determined by the implementation of the single-current source  18 .
 
     From a DC perspective, the single-transistor current source  18  will appear like a resistor with a resistance inversely proportional to K. However, the single-transistor current source  18  presents high-impedance to any AC voltage developed on the source terminal  44  because of the AC shunting included in the biasing network  46 . Consider  FIG. 2 , which illustrates an example embodiment of the single-transistor current source  18 , where a capacitor is used as the AC shunt  48 , and where the second transistor  36  is implemented as a PNP Bipolar Junction Transistor (BJT). 
     The DC collector-emitter current, I ce , through the transistor  36 . This current may be calculated as 
                 I   ce     =       (         V   ce     -     V   be       R     )     ·     h   fe         ,         
where V ce  is the collector-emitter voltage across the transistor  36 , V be  is the base-emitter voltage across the transistor  36 , R is the resistance of resistor  50 , and h fe  is the DC Current Gain of the transistor  36 . The capacitor C used to implement the AC shunt  48  is operative to shunt any AC current to the positive supply, denoted as V SUPPLY  in the drawing. As a result, the base-emitter current I be  through transistor  36  remains constant in the presence of an AC voltage on the source terminal  44 .
 
     Now, because I ce =I be ·h fe , the use of AC shunting to make the current I be  insensitive to AC fluctuations on the source terminal  44  also means that the current I ce  remains constant in the presence of such fluctuations (within overall practical operating limits). Moreover, one sees that the transistor  36  in the single-transistor current source  18  will be biased as a function of I LBC . Since the current I being sourced from terminal  44  must be I LBC  as set by the first transistor  22 , V FLOAT  must be a function of I LBC . 
     Viewed another way, with the depicted biasing arrangement, the transistor  36  will self-set to an operating point at which 
               V   =       I   K     +   C       ,         
and V FLOAT  therefore can be expressed as
 
     
       
         
           
             
               V 
               FLOAT 
             
             = 
             
               
                 V 
                 SUPPLY 
               
               - 
               
                 
                   ( 
                   
                     
                       I 
                       K 
                     
                     + 
                     C 
                   
                   ) 
                 
                 . 
               
             
           
         
       
     
     In other words, the biasing network  46  in the single-transistor current source  18  biases the second transistor  36  so that the current sourced from source terminal  44  is equal to I LBC  as set by the single-transistor current sink  20 . The self-biasing operation of the single-transistor current source  18  occurs as a result of coupling the first terminal  38  to the third terminal  44  of the second transistor  36 . 
     As shown in the examples of  FIGS. 1 and 2 , a resistor  50  of the second biasing network  45  is coupled between the first terminal  38  and the third terminal  44 . This coupling pairs the base-emitter current I be  with the float voltage, V FLOAT , on the source terminal  44 . Because I LBC  is set by the single-transistor current sink  20  and because the collector-emitter current I ce  of the second transistor  36  must be equal to I LBC , the base-emitter I be  current must be 
     
       
         
           
             
               I 
               be 
             
             = 
             
               
                 
                   I 
                   LBC 
                 
                 
                   h 
                   fe 
                 
               
               . 
             
           
         
       
     
     From this, one sees that the float voltage on the source terminal  44  will be automatically set by the current through the resistor  50  (which must be equal to I be ) and the voltage across the resistor  50  (which is proportional to the resistor value). 
     Advantageously, however, the self-biasing operation is “isolated” from AC fluctuations that are impressed on the third terminal  44  of the second transistor  36  (i.e., the source terminal  44 ) or that otherwise appear on that terminal. To achieve such isolation, the second biasing network  46  that self-biases the transistor  36  of the single-transistor current source  18  includes one or more AC shunt(s)  48  that prevent AC components appearing at the source terminal  44  from affecting the (DC) biasing signal used for self-biasing the single-transistor current source  18 . Here, the word “prevent” should be understood within the context of practical circuit limitations—e.g., “prevent” means to substantially suppress, at least within a given frequency range. 
     The component quality used in the one or more AC shunt(s), and the electrical layout (e.g., wire/PCB trace arrangements, etc.) can be optimized for desired frequency ranges and desired levels of shunting performance. In one example, the AC fluctuations arise from communication signals impressed across the load by an external communication transmitter, and the AC shunt(s)  48  shunt the corresponding AC signals into the voltage supply  42  from which the load biasing current I LBC  is sourced. 
     Different types of transistors may be used in the contemplated floating current source  10 , and different biasing network arrangements may be used.  FIGS. 3A-3C  illustrate the single-transistor current sink  20  in which the transistor  22  is implemented as a NPN Bipolar Junction Transistor (BJT), where each figure illustrates a non-limiting example configuration for the biasing network  32 . 
     In  FIG. 3A , the biasing network  32  includes a resistor  60  in series between the biasing input and the base terminal  24  of the transistor  22 . A shunt capacitor  62  from the base terminal  24  adds a filtering component, and (resistive) element  34  provides emitter generation feedback, which improves stability and linearity of the transistor  22  at the desired operating point. 
       FIG. 3B  omits the shunt capacitor  62  and  FIG. 3C  uses a Zener diode  64  on the base terminal  24  to fix the bias of the transistor  22 . In this regard, it will be understood that circuit elements referenced with the same reference numeral do not necessarily have the same value. For example, while resistor  60  is a series input resistor in  FIGS. 3A, 3B and 3C , it may have a different value in the various configurations to suit the overall biasing arrangement being used. 
       FIGS. 4A-4B  are similar, but depict the use of an n-type Metal Oxide Semiconductor Field Effect Transistor (MOSFET) configuration for the transistor  22 .  FIG. 4A  illustrates a voltage divider formed on the biasing input of the biasing network  32 , using resistors  70  and  72 .  FIG. 4B  illustrates the use of a Zener diode  74  to set the bias of the transistor  22 . 
       FIGS. 5A and 5B  illustrate a PNP BJT based implementation of the single-transistor current source  18 , where these implementations naturally complement the BJT-based implementations of the single-transistor current sink  20 . One sees that the example biasing network  46  is set forth in much the same configuration as was detailed in  FIG. 2 .  FIG. 5B , however, depicts the use of (resistive) element  52  as an emitter degeneration resistor for improved stability and linearity of the transistor  36  at its desired operating point. 
       FIG. 6  illustrates a p-type MOSFET-based implementation of the transistor  36 . Here, the biasing network  46  includes a voltage divider arrangement comprising a resistor  80  between the supply voltage input (the source terminal of the transistor  36 ) and the gate of the transistor  36 , and the resistor  50  between the gate and the drain terminal of the transistor  36 . 
       FIG. 7  presents an overall example embodiment of the contemplated floating current source  10 , based on BJT-based transistors  22  and  36  and correspondingly configured biasing networks  32  and  46 . The arrangement in  FIG. 7 , or variations of it, may be used in various applications. 
       FIG. 8  depicts an example application, wherein the contemplated floating current source  10  is used to implement a variable differential attenuator  100 . The input to the differential attenuator is a communication signal transmitter  102  with one transmitter port attached to a capacitor  117 , which in turn couples to the load terminal  14  through a resistor  112 . The other transmitter port attaches to a capacitor  119 , which in turn couples to the load terminal  16  through a resistor  114 . Further, one input of a signal receiver  104  is attached to the load terminal  14  through a capacitor  113 , while the other input of the signal receiver  104  is attached to the load terminal  16  through a capacitor  115 . 
     In this example, the load  12  is a variable resistor that is used in concert with resistors  112  and  114  to create a differential variable attenuator. The floating current source  10  is used to properly bias the variable resistor with a fixed DC current. In some cases, this fixed DC current may be used to directly control the variable resistance. However, there will normally be a control voltage, VCTRL, that will be applied to load  12  to vary the resistance. Since this control voltage will normally be relative to a fixed DC voltage, it is important that the variable resistor  12  float at a known DC voltage relative to the control voltage reference. The floating current source  10  provides both the ability to supply a fixed known bias current and simultaneously float the load  12  at a known DC voltage. Further, as noted, the floating current source  10  is not perturbed by AC fluctuations on the source terminal  44 , or on the sink terminal  30 . 
     With the above example in mind, in at least one embodiment, the load  12  comprises a variable resistor whose resistance is proportional to the current through the variable resistor, which current is ideally provided by the floating current source  10 . In the same or another embodiment, the load  12  comprises a variable resistor that must be biased at a specific current to operate properly and where the variable resistor must float at a known voltage with respect to a control voltage. In one example, the variable resistor is operative as a variable differential attenuator. Further, in at least one example, the variable resistor is a JFET. 
     As employed in this specification, the term “coupled” does not require that the elements must be directly coupled together. Intervening elements may be provided between the “coupled” elements. 
     As employed in this specification and the drawings, reference numerals are used for convenience in referring to the connectivity of various circuit elements. The reference numerals do not impose particular parameter values, such as a resistance or capacitance of the circuit elements described herein. Furthermore, identically numbered circuit elements in two or more of the embodiments described do not necessarily have the same parameter values. For instance, the resistor  60  depicted in  FIG. 3A  is not necessarily that same resistance as the resistor  60  in  FIG. 3C . Parameter values of the individual circuit elements may be adapted according to design considerations, such as the circuit element type, e.g. MOSFET, BJTs, capacitors, etc. and parameter values, e.g. resistance and capacitance values, particular to a floating current source implementation as well as external requirements particular to a floating current source implementation. 
     Notably, modifications and other embodiments of the disclosed invention(s) will come to mind to one skilled in the art having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the invention(s) is/are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of this disclosure. Although specific terms may be employed herein, they are used in a generic and descriptive sense only, and not for purposes of limitation.