Patent Publication Number: US-8122267-B2

Title: Power control circuit for hard disk drive

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure relates to control circuits, and in particular, to a power control circuit for a hard disk drive (HDD). 
     2. Description of Related Art 
     Generally, an HDD includes a magnetic pickup head, a spindle motor, and a platter including a number of sectors. When the HDD is powered on, the spindle motor rotates the platter quickly to enable the magnetic pickup head to read data from the sectors. Since the HDD can employ a plurality of platters to increase storage volume, the magnetic pickup head must move rapidly and accurately to read data correctly. Accordingly, any vibration of the HDD may cause the magnetic pickup head to read data erroneously under the high-speed rotation of the platters. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block diagram of an embodiment of a power control circuit connecting a power supply and a hard disk drive. 
         FIG. 2  is a circuit diagram of an embodiment of the power control circuit of  FIG. 1 . 
     
    
    
     DETAILED DESCRIPTION 
     Referring to  FIG. 1 , an exemplary embodiment of a power control circuit  100  for a hard disk drive (HDD)  300  includes a first connector  10 , a first control circuit  20 , a second control circuit  30 , and a second connector  40 . The first connector  10  is connected to the first control circuit  20 , the second control circuit  30  and a power supply  200 . The power supply  200  supplies power to the first control circuit  20  and the second control circuit  30  via the first connector  10 . The second connector  40  is connected to the first control circuit  20  and the HDD  300 . The first control circuit  20  supplies power to the HDD  300  via the second connector  40 . The second control circuit  30  is also connected to the first control circuit  20  to control the first control circuit  20 . In one embodiment, the power control circuit  100  is formed on a printed circuit board. The second connector  40  may be an external serial advanced technology attachment (SATA) power connector. The power supply  200  may be a computer power supply, such as an advanced technology extended power supply. The HDD  300  may be a SATA HDD. 
     Referring to  FIG. 2 , the first connector  10  includes a first power input pin  1 , a second power input pin  4 , and two ground pins  2 ,  3 . When the first connector  10  is connected to the power supply  200 , the first power input pin  1  receives a first voltage signal, such as a 12V voltage signal, from the power supply  200 , and the second power input pin  4  receives a second voltage signal, such as a 5V voltage signal, from the power supply  200 , and the ground pins  2 ,  3  are grounded. A capacitor C 1  includes a positive terminal connected to the first power input pin  1  and grounded via a capacitor C 2 , and a grounded negative terminal. A capacitor C 3  includes a positive terminal connected to the second power input pin  4  and grounded via a capacitor C 4 , and a grounded negative terminal. 
     The second connector  40  includes a first power output pin  5 , a grounded ground pin  6 , a detection pin  7 , and a second power output pin  8 . When the second connector  40  is connected to the HDD  300 , the first power output pin  5  outputs the first voltage signal to the HDD  300 , the second power output pin  8  outputs the second voltage signal to the HDD  300 . A capacitor C 5  includes a positive terminal connected to the first power output pin  5  and grounded via a capacitor C 6 , and a grounded negative terminal. A capacitor C 7  includes a positive terminal connected to the second power output pin  8  and grounded via a capacitor C 8 , and a grounded negative terminal. In one embodiment, the capacitors C 1 , C 3 , C 5 , and C 7  are electrolytic capacitors, and function as filtering elements to filter noise signals of high frequencies. The capacitors C 2 , C 4 , C 6 , and C 8  are ceramic capacitors, and function as filtering elements to filter noise signals of low frequencies. In other embodiments, the capacitors C 1 -C 8  may be deleted to save costs. 
     The first control circuit  20  includes four transistors Q 1 -Q 4  functioning as electric switches, and five resistors R 1 -R 5 . A first terminal of the transistor Q 1  is connected to the detection pin  7  of the second connector  40 , receiving a detection signal D, and connected to the second power input pin  4  of the first connector  10  via the resistor R 1 . A second terminal of the transistor Q 1  is connected to the second power input pin  4  of the first connector  10  via the resistor R 2 . A third terminal of the transistor Q 1  is grounded. A first terminal of the transistor Q 2  is connected to the second terminal of the transistor Q 1 , and grounded via the resistor R 3 . A second terminal of the transistor Q 2  is connected to the first power input pin  1  of the first connector  10  via the resistor R 4 . A third terminal of the transistor Q 2  is grounded. A first terminal of the transistor Q 3  is connected to the second terminal of the transistor Q 2 . A second terminal of the transistor Q 3  is connected to the first power output pin  5  of the second connector  40 . A third terminal of the transistor Q 3  is connected to the first power input pin  1  of the first connector  10 . A first terminal of the transistor Q 4  is connected to the second terminal of the transistor Q 3  via the resistor R 5 . A second terminal of the transistor Q 4  is connected to the second power input pin  4  of the first connector  10 . A third terminal of the transistor Q 4  is connected to the second power output pin  8  of the second connector  40 . 
     The second control circuit  40  includes four transistors Q 5 -Q 8  functioning as electric switches, five resistors R 6 -R 10 , and a manual switch K. A first terminal of the transistor Q 5  is connected to the second power input pin  4  of the first connector  10  via the resistor R 6 , and grounded via the manual switch K. A second terminal of the transistor Q 5  is connected to the second power input pin  4  of the first connector  10  via the resistor R 7 . A third terminal of the transistor Q 5  is grounded. A first terminal of the transistor Q 6  is connected to the second terminal of the transistor Q 5 . A second terminal of the transistor Q 6  is connected to the second power input pin  4  of the first connector  10  via the resistor R 8 . A third terminal of the transistor Q 6  is grounded. A first terminal of the transistor Q 7  is connected to the second terminal of the transistor Q 6 . A second terminal of the transistor Q 7  is connected to the second terminal of the transistor Q 1  of the first control circuit  20 . A third terminal of the transistor Q 7  is grounded. A first terminal of the transistor Q 8  is connected to the third terminal of the transistor Q 4  of the first control circuit  20  via the resistor R 9 , and grounded via the resistor R 10 . A second terminal of the transistor Q 8  is connected to the second terminal of the transistor Q 6 . A third terminal of the transistor Q 8  is grounded. In one embodiment, the transistors Q 1 -Q 8  are metal-oxide-semiconductor field-effect transistors (MOSFETs), and the first, second, and third terminals of each of the transistors Q 1 -Q 8  are gates, drains, and sources respectively. In this embodiment, the transistors Q 1 , Q 2 , Q 4 -Q 8  are N-channel MOSFETs, the transistor Q 3  is a P-channel MOSFET. The manual switch K includes a button, the manual switch K is closed when the button is press down, and the manual switch K is open when the button is without pressure. 
     In use, the first connector  10  is connected to the power supply  200  and the second connector  40  is connected to the HDD  300 , the first power input pin  1  receives the first voltage signal from the power supply  200 , and transmits the first voltage signal to the first control circuit  20 . The second power input pin  4  receives the second voltage signal from the power supply  200 , and transmits the second voltage signal to the first control circuit  20  and the second control circuit  30 . If a power connector of the HDD  300  is connected to the second connector  40  properly, because a pin of the power connector of the HDD  300  corresponding to the detection pin  7  is grounded, the detection pin  7  outputs the detection signal D at a low level to turn off the transistor Q 1 , the transistors Q 2 -Q 4  are turned on. The first voltage signal is transmitted to the first power output pin  5  via the transistor Q 3 , and further transmitted to the HDD  300  via the second connector  400 . The second voltage signal is transmitted to the second power output pin  8  via the transistor Q 4 , and further transmitted to the HDD  300  via the second connector  400 . Therefore, the HDD  300  is power on. In this embodiment, only when the transistor Q 3  is turn on, the first voltage signal is transmitted to the first terminal of the transistor Q 4  via the transistor Q 3  to turn on the transistor Q 4 , the second voltage signal can be transmitted to the second power output pin  8  via the transistor Q 4 . That is, the second connector  40  receives the second voltage signal after receiving the first voltage signal, and outputs the first voltage signal and the second voltage signal to the HDD  300  in order to satisfy a timing sequence of the HDD  300  receiving voltage signals. 
     When the manual switch K is open, the transistor Q 5  is turned on, the transistor Q 6  is turned off, the transistor Q 7  is turned on. The second terminal of the transistor Q 7  is at low level to turn off the transistor Q 2 , the transistors Q 3 , Q 4  are turned off. Therefore, the first and second voltage signals cannot be transmitted to the second connector  40  via the first control circuit  20 , and the second connector  40  cannot supply power to the HDD  300  accordingly. 
     When the manual switch K is closed, voltage at the first terminal of the transistor Q 5  is pulled down to a low level to turn off the transistor Q 5 , the transistor Q 6  is turned on, the transistor Q 7  is turned off, the first control circuit  20  works normally, the first and second voltage signals are transmitted to the second connector  40 . At this time, the second voltage signal is transmitted to the first terminal of the transistor Q 8  via the transistor Q 4  and the resistor R 9  to turn on the transistor Q 8 , the transistor Q 7  maintains a turned off state whether the manual switch K is closed or open. In summary, when the manual switch K is open, the first control circuit  20  cannot transmit the first and second voltage signals to the second connector  40 , and once the manual switch K is closed, the first control circuit  20  works normally. 
     When the power connector of the HDD  300  is received in the second connector  40 , vibration may occur, and some pins may suffer poor connection. If some pins of the HDD  300  are bad and power is supplied to the HDD  300  immediately, the HDD  300  may be damaged. Therefore, the power control circuit  100  employs the detection pin  7 , the first control circuit  20 , and the second control circuit  30  to protect the HDD  300  from damage. The detection pin  7  detects whether the power connector of the HDD  300  is connected to the second connector  40  properly, and only when the power connector of the HDD  300  is connected to the second connector  40  properly, does the first control circuit  20  begin operating. The first control circuit  20  converts the first and second voltage signals into a form to compatible with a timing sequence of the HDD  300  receiving voltage signals. With activation and deactivation of the manual switch K when the HDD  300  is connected to the second connector  40  and is not vibrating, the second control circuit  30  enables the first control circuit  20  to work normally. In other embodiments, if the power connector of the HDD  300  is connected to the second connector  40  without vibration, the second control circuit  30  can be deleted to save costs. 
     It is to be understood, however, that even though numerous characteristics and advantages of the present disclosure have been set forth in the foregoing description, together with details of the structure and function of the disclosure, the disclosure is illustrative only, and changes may be made in details, especially in matters of shape, size, and arrangement of parts within the principles of the disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.