Patent Publication Number: US-7218087-B2

Title: Low-dropout voltage regulator

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
   This application claims the priority benefit of Taiwan application serial no. 94131436, filed on Sep. 13, 2005. All disclosure of the Taiwan application is incorporated herein by reference. 
   BACKGROUND OF THE INVENTION 
   1. Field of Invention 
   The present invention relates to a low dropout voltage regulator. More particularly, the present invention relates to a low dropout voltage regulator, suitable for use in a hand-held electronic apparatus. 
   2. Description of Related Art 
   The hand-held electronic apparatus has been in wide applications, and the battery duration is therefore requested to be longer and longer. If the power consumption due to quiescent current in the whole system can be reduced, the operation duration for the hand-held electronic apparatus in use can be prolonged. However, for the usual low dropout voltage regulator, the quiescent current does not vary with the loading current. 
   For example,  FIG. 1  is a drawing, schematically illustrating the conventional low dropout voltage regulator  100 . In  FIG. 1 , the low dropout voltage regulator  100  receives a reference voltage VREF, and provides an output voltage Vout. Since the current consumed by the buffer  101  is almost constant, the consumption due to the quiescent current is still greater than at a certain level even if the whole circuit is at a low loading condition, that is, the loading current on the resistor R L  being small. This continuous power consumption would decrease the operation duration of the hand-held apparatus. 
   SUMMARY OF THE INVENTION 
   The invention provides a low dropout voltage regulator, capable of reducing the power consumption of the quiescent current under a low loading condition, so as to further prolong the operation duration of the hand-held electronic apparatus. 
   In accordance with the foregoing or other objectives, the invention proposes a low dropout voltage regulator, including a feedback circuit, an operational amplifier, a transconductor, a current mirror, and a power transistor. The feedback circuit provides a voltage according to a current provided by the power transistor. An invert-phase input terminal of the operational amplifier is coupled with the feedback circuit, and the positive-phase input terminal of the operational amplifier receives a reference voltage. The transconductor is coupled to an output terminal of the operational amplifier, and controls the current, which is fed to the transconductor from the current mirror, according to the output voltage from the operational amplifier. The current mirror is coupled with the transconductor and drives the power transistor. The power transistor is coupled between the current mirror and the feedback circuit, so as to provide current to the feedback circuit. 
   In the foregoing low dropout voltage regulator, for an embodiment, the quantity of the current fed to the transconductor from the current mirror is an increasing function of the output voltage from the operational amplifier. 
   In the foregoing low dropout voltage regulator, for an embodiment, the power transistor is a power MOSFET (metal oxide semiconductor field effect transistor). 
   In the foregoing low dropout voltage regulator, for an embodiment, the low dropout voltage regulator further includes a compensation capacitor and a compensation network. One coupling terminal of the compensation capacitor is coupled to the output terminal of the operational amplifier, while the other coupling terminal is grounded. The compensation network is coupled between the output terminal of the feedback circuit and the invert-phase input terminal of the operational amplifier. The compensation capacitor results in a pole point of a loop gain in the low dropout voltage regulator, and the compensation network results in a zero point of the loop gain. The pole point and the zero point affect the unit-gain frequency of the loop gain, so that the phase margin of the loop gain is greater than zero. 
   In the foregoing low dropout voltage regulator, for an embodiment, the compensation network is a voltage-to-current converter. 
   In accordance with the foregoing embodiments, since the low dropout voltage regulator of the invention has used the current mirror to serve as a buffer, the current of the current mirror becomes large when loading current becomes large, and the current of the current mirror becomes small when loading current becomes small. When the circuit is operated under a low loading condition, the power consumption of the quiescent current is accordingly reduced. In other words, the invention can reduce the quiescent power when it is under a low loading condition, so that the operation duration of the hand-held electronic apparatus can be prolonged. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. 
       FIG. 1  is a circuit diagram, schematically illustrating the conventional low dropout voltage regulator. 
       FIG. 2  is a circuit diagram, schematically illustrating a low dropout voltage regulator, according to an embodiment of the invention. 
       FIG. 3  is a drawing, schematically illustrating a comparison of the quiescent current and loading current between the conventional technology and the embodiment of the invention. 
   

   DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 2  is a circuit diagram, schematically illustrating a low dropout voltage regulator  200 , according to an embodiment of the invention. The low dropout voltage regulator  200  can receive the reference voltage VREF, and provide a stable output voltage Vout. In the circuit of  FIG. 2 , the circuit other than the loading resistor R L  is a part of the low dropout voltage regulator  200 . More specifically, the low dropout voltage regulator  200  includes a feedback circuit  204 , an operational amplifier (OP), a transconductor  202 , a current mirror  201 , a power transistor M PW , a series circuit  203 , a compensation capacitor C COMP , and a compensation network  205 . A main part of the low dropout voltage regulator  200  is formed from the feedback circuit  204 , the operational amplifier (OP), the transconductor  202 , the current mirror  201 , and the power transistor M PW , so as to form a feedback loop. The compensation capacitor C COMP  and the compensation network  205  are used to improve the stability of the voltage regulator  200 . 
   The feedback circuit  204  is coupled between the power transistor M PW  and the operational amplifier OP, for providing an output voltage according to a current size fed from the power transistor M PW , and providing a feedback voltage VFB to an invert-phase input terminal of the operational amplifier OP. In the embodiment, since the output voltage Vout is not equal to the reference voltage VREF, and the feedback voltage VFB is quite approaching to the reference voltage VREF, so that the feedback circuit  204  actually is a voltage divider, for receiving the output voltage Vout and sustaining a proportional relation between the output voltage Vout and the feedback voltage VFB. In order to have the voltage dividing function, the feedback circuit  204  is composed of resistors R 1  and R 2 . A terminal of the resistor R 1  is coupled to the feedback voltage VFB, which is the invert-phase input terminal of the operational amplifier OP. Another terminal of the resistor R 1  is grounded. The resistor R 2  is coupled between the output voltage Vout and the feedback voltage VFB. In  FIG. 2 , a proportional relation between the output voltage Vout and the feedback voltage VFB is Vout=(1+R 2 /R 1 )*VFB. 
   The invert-phase input terminal of the operational amplifier OP is coupled to the feedback terminal  204  and the positive-phase input terminal of the operational amplifier OP receives the reference voltage VREF. The transconductor  202  is coupled between the operational amplifier OP and the current mirror  201 . The transconductor  202  is used for converting the voltage signal outputting from the operational amplifier OP into a current signal inputting to the feedback circuit  204 . Actually, the transconductor  202  can control the current size, which is fed to the transconductor  202  from the current mirror  201 , according to the output voltage of the operational amplifier OP. The transconductor  202  further controls the current size being fed to the feedback current  204  from the power transistor M PW , and the current size being output to the load resistor R 1  from the power transistor M PW . 
   In the embodiment, the transconductor  202  includes N-type MOSFET&#39;s (NMOS transistors) M 1  and M 2 . For the NMOS transistors M 1  and M 2 , the drain electrodes are coupled to the current mirror  201 , the gate electrodes are coupled to the output terminal of the operational amplifier OP, and the source electrodes are grounded. Therefore, the current being fed to the transconductor  202  from the current mirror  201  is an increase function of the output voltage of the operational amplifier OP. 
   The current mirror  201  is coupled between the transconductor  202  and the power transistor M PW , for driving the power transistor M PW . In the embodiment, the current mirror  201  is a wide-swing cascode current mirror. However, in the invention, any other current mirror, such as cascode current mirror, can be used. 
   The power transistor M PW  is coupled between the current mirror  201  and the feedback circuit  204 , for providing current to the feedback circuit  204  and loading resistor R L . In the embodiment, the power transistor M PW  can be power MOSFET. In  FIG. 2 , the source electrodes, the gate electrodes, and the drain electrodes of the power transistor M PW  and the P-type MOSFET (PMOS transistor) M 6  are respectively connected. As a result, the power transistor M PW  and the PMOS transistor M 6  can be considered as a single transistor. The power transistor M PW  is larger, in size, than the PMOS transistor M 6 , and the resistance is relative small during conducting state. As a result, the power transistor M PW  and the current mirror  201  together can serve as a current amplifier. After the current being fed to the NMOS transistor M 1  from the current mirror  201  is amplified, the current is input to the feedback circuit  204  and the loading resistor R L  from the power transistor M PW . 
   The voltage regulating capability of the low dropout voltage regulator  200  is achieved by a feedback loop including the feedback circuit  204 , the operational amplifier OP, the transconductor  202 , the current mirror  201 , and the power transistor M PW . In order to reduce the quiescent current during the low loading condition, the invention uses the current mirror instead of the conventional buffer. In this manner, the current mirror causes an additional pole point in the signal path for the low dropout voltage regulator  200 , and the pole point is varying with the loading current, which is the current flowing through the loading resistor R L . In this situation, the compensation capacitor C COMP  and the compensation network  205 , associating with the series circuit  203 , are used for compensation. 
   The series circuit  203  can be a simple circuit of a resistor and a capacitor coupled in series. One terminal of the series circuit  203  is coupled to the output voltage Vout, and the other terminal of the series circuit  203  is grounded, so that a dominant pole in the voltage regulator can be created. A terminal of the compensation capacitor C COMP  is coupled to the output terminal of the operational amplifier OP, another terminal of the compensation capacitor C COMP  is grounded. This adds one more pole point for the loop gain of the low dropout voltage regulator  200 . This pole point is different from the pole point resulting from the series circuit  203  and the current mirror  201 . The compensation network  205  is coupled between the output voltage Vout and the invert-phase input terminal of the operational amplifier OP, so that the foregoing loop gain add one zero point. In the embodiment, the compensation network  205  is a voltage-to-current converter. The pole point caused by the compensation capacitor C COMP  and the zero point caused by the compensation network  205  affect the unit-gain frequency of the loop gain in the bode plot, so that the phase margin of the loop gain is greater than zero, and thereby the voltage regulator  200  is stable. 
   In the embodiment, the improvement about reducing the power consumption of the quiescent current is referred to  FIG. 3 .  FIG. 3  is a drawing, schematically illustrating a comparison of the quiescent current I Q  and the loading current I L  between the conventional technology and the embodiment of the invention. The curve  301  represents the current for the prior art, and the curve  302  represents the current for the invention. In  FIG. 3 , in comparing the invention with the prior art, the quiescent current I Q  at the low loading condition can be reduced by half. 
   In summary, since the low dropout voltage regulator of the invention has used the current mirror to serve as a buffer, the current of the current mirror becomes large when the loading current becomes large, and the current of the current mirror becomes small when the loading current becomes small. When the circuit is operated under a low loading condition, the power consumption of the quiescent current is accordingly reduced. In other words, the invention can reduce the quiescent power when it is under a low loading condition, so that the operation duration of the hand-held electronic apparatus can be prolonged. 
   It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing descriptions, it is intended that the present invention covers modifications and variations of this invention if they fall within the scope of the following claims and their equivalents.