Patent Publication Number: US-9892684-B2

Title: Pixel compensation circuit and method

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present disclosure generally relates to display technologies, and particularly relates to a pixel compensation circuit and a related method. 
     2. The Related Arts 
     Currently Organic Light Emitting Diode (OLED) display devices are gaining widespread attention as they enjoy advantages such as small dimension, simple structure, self-illumination, high brightness, wide viewing angle, and short response time, etc. 
     Current OLED display devices have a driving transistor controlling the current passing through OLED. The driving transistor usually suffers shift in its threshold voltage due to factors such as the driving transistor&#39;s exposure to light, the stress from its source-drain voltage. The threshold voltage&#39;s positive or negative shift leads to different amount of current passing through OLED under a same data signal, causing OLED&#39;s deterioration and display panel&#39;s un-uniform brightness. 
     SUMMARY OF THE INVENTION 
     The present disclosure teaches a pixel compensation circuit and a related method that can provide recovery to threshold voltage shift and achieve uniform brightness of a display panel. 
     The pixel compensation circuit contains the following components: 
     a first controllable switch having a control terminal connected to a first scan line, a first terminal connected to a data line, and a second terminal; 
     a driving switch having a control terminal connected to the second terminal of the first controllable switch, a first terminal, and a second terminal; 
     an Organic Light Emitting Diode (OLED) having an anode connected to the second terminal of the driving switch and a cathode connected to ground; 
     a second controllable switch having a control terminal connected to a lighting control terminal, a first terminal connected to a voltage terminal, and a second terminal connected to the first terminal of the driving switch; 
     a third controllable switch having a control terminal connected to a second scan line, a first terminal connected to the first terminal of the second controllable switch, and a second terminal connected to the control terminal of the driving switch; 
     a fourth controllable switch having a control terminal connected to the second scan line, a first terminal connected to the first terminal of the driving switch, and a second terminal connected to a reference voltage terminal; 
     a fifth controllable switch having a control terminal connected to the second scan line, a first terminal connected to the second terminal of the driving switch, and a second terminal connected to the reference voltage terminal; and 
     a storage capacitor having a first terminal connected to the control terminal of the driving switch and a second terminal connected to the first terminal of the driving switch. 
     For the pixel compensation circuit described above, the driving switch and the first to the fifth controllable switches are P-type metal oxide semiconductor (PMOS) thin-film transistors, N-type metal oxide semiconductor (NMOS) thin-film transistors, or a combination of PMOS and NMOS thin-film transistors; and the control terminal, first terminal, and second terminal of the driving switch and first to fifth controllable switches correspond to the gate, drain, and source of thin-film transistors, respectively. 
     The present disclosure teaches another pixel compensation circuit which contains the following components: 
     a first controllable switch having a control terminal connected to a first scan line, a first terminal connected to a data line, and a second terminal; 
     a driving switch having a control terminal connected to the second terminal of the first controllable switch, a first terminal, and a second terminal; 
     an Organic Light Emitting Diode (OLED) having an anode connected to the second terminal of the driving switch and a cathode connected to ground; 
     a second controllable switch having a control terminal connected to a lighting control terminal, a first terminal connected to a voltage terminal, and a second terminal connected to the first terminal of the driving switch; 
     a third controllable switch having a control terminal connected to a second scan line, a first terminal connected to the first terminal of the second controllable switch, and a second terminal connected to the control terminal of the driving switch; 
     a fourth controllable switch having a control terminal connected to the second scan line, a first terminal connected to the first terminal of the driving switch, and a second terminal connected to a reference voltage terminal; 
     a fifth controllable switch having a control terminal connected to the second scan line, a first terminal connected to the second terminal of the driving switch, and a second terminal connected to the reference voltage terminal; and 
     a storage capacitor having a first terminal connected to the control terminal of the driving switch and a second terminal connected to the second terminal of the driving switch. 
     For the pixel compensation circuit described above, the driving switch and the first to the fifth controllable switches are P-type metal oxide semiconductor (PMOS) thin-film transistors, N-type metal oxide semiconductor (NMOS) thin-film transistors, or a combination of PMOS and NMOS thin-film transistors; and the control terminal, first terminal, and second terminal of the driving switch and first to fifth controllable switches correspond to the gate, drain, and source of thin-film transistors, respectively. 
     The pixel compensation method contains the following steps: 
     in a programming/lighting stage, a second scan line providing a high-level signal so that a third controllable switch, a fourth controllable switch, and a fifth controllable switches are cut off, and a first scan line and the lighting control terminal providing low-level signals so that a driving switch, a first controllable switch, and a second controllable switches are turned on, and an OLED is lighted up; and 
     in an electrical recovery stage, the second scan line providing a low-level signal so that the third, fourth, and fifth controllable switches are turned on, and the first scan line and the lighting control terminal providing high-level signals so that the driving switch, and the first and second controllable switches where, at the moment, the voltage at the control terminal of the driving switch is equal to a voltage output from a voltage terminal, the voltages at a first terminal and a second terminal of the driving switch are equal to a negative reference voltage output from a reference voltage terminal, and the driving switch electrically recovers while the OLED electrically recovers from the negative reference voltage at the first terminal of the driving switch. 
     For the pixel compensation method described above, the driving switch and the first to the fifth controllable switches are P-type metal oxide semiconductor (PMOS) thin-film transistors, N-type metal oxide semiconductor (NMOS) thin-film transistors, or a combination of PMOS and NMOS thin-film transistors; and the control terminal, first terminal, and second terminal of the driving switch and first to fifth controllable switches correspond to the gate, drain, and source of thin-film transistors, respectively. 
     The benefit of the present disclosure is as follows. In contrast to the prior art, the pixel compensation circuit and method provide recovery to threshold voltage shift of the driving switch and OLED by employing a number of transistors, thereby achieving uniform brightness on a display panel. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       To make the technical solution of the embodiments according to the present disclosure, a brief description of the drawings that are necessary for the illustration of the embodiments will be given as follows. Apparently, the drawings described below show only example embodiments of the present disclosure and for those having ordinary skills in the art, other drawings may be easily obtained from these drawings without paying any creative effort. In the drawings: 
         FIG. 1  is a circuit diagram showing a pixel compensation circuit according to a first embodiment of the present disclosure; 
         FIG. 2  is a circuit diagram showing a pixel compensation circuit according to a second embodiment of the present disclosure; 
         FIG. 3  is a waveform diagram of a pixel compensation circuit according to the present disclosure; 
         FIG. 4  is a schematic diagram showing a scan driver circuit according to the present disclosure; and 
         FIG. 5  is a schematic diagram showing a flat panel display device according to the present disclosure. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       FIG. 1  is a circuit diagram showing a pixel compensation circuit according to a first embodiment of the present disclosure. As illustrated, the pixel compensation circuit contains the following components. There is a first controllable switch T 1  having a control terminal, a first terminal, and a second terminal. The control terminal is connected to a first scan line (scan). The first terminal is connected to a data line (Data). 
     There is a driving switch TO having a control terminal, a first terminal, and a second terminal. The control terminal is connected to the second terminal of the first controllable switch T 1 . 
     There is an Organic Light Emitting Diode (OLED) D 1  having an anode and a cathode. The anode is connected to the second terminal of the driving switch T 0 , and the cathode is connected to ground. 
     There is a second controllable switch T 2  having a control terminal, a first terminal, and a second terminal. The control terminal is connected to a lighting control terminal Em. The first terminal is connected to a voltage terminal VDD 1 . The second terminal is connected to the first terminal of the driving switch T 0 . 
     There is a third controllable switch T 3  having a control terminal, a first terminal, and a second terminal. The control terminal is connected to a second scan line (scan 2 ). The first terminal is connected to the first terminal of the second controllable switch T 2 . The second terminal is connected to the control terminal of the driving switch T 0 . 
     There is a fourth controllable switch T 4  having a control terminal, a first terminal, and a second terminal. The control terminal is connected to the second scan line (scan 2 ). The first terminal is connected to the first terminal of the driving switch T 0 . The second terminal is connected to a reference voltage terminal VREF. 
     There is a fifth controllable switch T 5  having a control terminal, a first terminal, and a second terminal. The control terminal is connected to the second scan line (scan 2 ). The first terminal is connected to the second terminal of the driving switch T 0 . The second terminal is connected to the reference voltage terminal VREF. 
     There is a storage capacitor C 1  having a first terminal and a second terminal. The first terminal is connected to the control terminal of the driving switch T 0 . The second terminal is connected to the first terminal of the driving switch T 0 . 
     In the present embodiment, the driving switch T 0  and the first to the fifth controllable switches T 1  to T 5  are all P-type metal oxide semiconductor (PMOS), or are all N-type metal oxide semiconductor (NMOS) thin-film transistors, or are a combination of PMOS and NMOS thin-film transistors. The above-mentioned control terminal, first terminal, and second terminal of the driving switch T 0  and first to fifth controllable switches T 1  to T 5  correspond to the gate, drain, and source of thin-film transistors, respectively. 
       FIG. 2  is a circuit diagram showing a pixel compensation circuit according to a second embodiment of the present disclosure. Compared to the previous embodiment, the difference lies in that the storage capacitor C 1  of the present embodiment has its first terminal connected to the control terminal of the driving switch T 0  and its second terminal connected to the second terminal of the driving switch T 0   
       FIG. 3  is a waveform diagram of a pixel compensation circuit according to the present disclosure. Together with  FIGS. 1 and 2 , the pixel compensation circuit of the present disclosure operates as follows (i.e., a pixel compensation method). 
     In a programming/lighting stage, the second scan line (scan 2 ) provides a high-level signal. The third, fourth, and fifth controllable switches T 3 , T 4 , and T 5  are cut off. Low-level signals appear on the first scan line (scan) and the lighting control terminal Em so that the driving switch T 0 , and the first and second controllable switches T 1  and T 2  are turned on, and OLED D 1  is lighted up. 
     In an electrical recovery stage, the second scan line (scan 2 ) provides a low-level signal. The third, fourth, and fifth controllable switches T 3 , T 4 , and T 5  are turned on. The first scan line (scan) and the lighting control terminal Em provide high-level signals so that the driving switch T 0 , and the first and second controllable switches T 1  and T 2  are cut off. At the moment, the voltage at the control terminal of the driving switch T 0  is equal to a voltage VDD output from the voltage terminal VDD 1 . The voltages at the first and second terminals of the driving switch T 0  are equal to a negative reference voltage Vref output from the reference voltage terminal VREF. The driving switch TO electrically recovers, while OLED D 1  also electrically recovers from the negative reference voltage at the first terminal of the driving switch T 0 . Therefore, the pixel compensation circuit provides recovery to threshold voltage shift, achieving uniform brightness on a display panel. 
       FIG. 4  is a schematic diagram showing a scan driver circuit according to the present disclosure. The scan driver circuit contains one of the pixel compensation circuits described above to provide recovery to threshold voltage shift of the scan driver circuit, thereby achieving uniform brightness on a display panel. 
       FIG. 5  is a schematic diagram showing a flat panel display device according to the present disclosure. The flat panel display device can be one based on OLED or a liquid crystal display (LCD) device, containing the above-described scan driver circuit and pixel compensation circuit. The scan driver circuit having the pixel compensation circuit is configured to the flat panel display device&#39;s circumference such as along its two lateral sides. 
     As described above, the pixel compensation circuit and method provide recovery to threshold voltage shift of the driving switch and OLED by employing a number of transistors, thereby achieving uniform brightness on a display panel. 
     Embodiments of the present disclosure have been described, but not intending to impose any unduly constraint to the appended claims. Any modification of equivalent structure or equivalent process made according to the disclosure and drawings of the present disclosure, or any application thereof, directly or indirectly, to other related fields of technique, is considered encompassed in the scope of protection defined by the clams of the present disclosure.