Patent Publication Number: US-5832278-A

Title: Cascaded round robin request selection method and apparatus

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention relates to the field of circuitry for selecting one of a plurality of requests in a prioritized manner, and more particularly to methods of performing round robin selection of requests. 
     2. Description of the Relevant Art 
     Electronic circuits commonly require logic for selecting one requester from a plurality of requesters which are requesting use of a shared resource. For example, a communications system may comprise a plurality of direct memory access (DMA) channels each requesting use of a shared data bus in order to transfer data from a source location to a destination location. In such a system, logic is required to function as an arbiter for the shared resource, i.e., the data bus, to grant only one of the DMA channels ownership of the data bus at a time. 
     The arbiter, by its very nature, incorporates a priority scheme for selecting among the various DMA channels. That is, the arbiter associates a priority with each of the DMA channels. The priority scheme may individually assign priorities based on some prior knowledge. For example, the priority scheme may be such that each DMA channel has an associated channel number, and the higher the channel number the higher the priority of the channel. In such a scheme, the channel with highest channel number requesting the bus, will be granted the bus by the arbiter at the next available arbitration period. 
     Another common priority scheme is to assign each of the requesters an equal priority. In such as case, requesters are chosen in turn. Such a scheme is commonly referred to as a &#34;round robin &#34; scheme. A round robin scheme of selecting or arbitrating among a set of requesters may be defined as a scheme which selects one of a plurality of requesters in a fixed cyclical order. By way of example, the operation of a round robin arbiter shown in FIG. 1 is described below. 
     FIG. 1 illustrates a 12-input round robin arbiter 12 which may be used in such an application as the communications system described above to arbitrate between 12 DMA channels requesting use of a data bus to transfer data. Each of the 12 DMA channels is assigned a number, 0 through 11, and may request use of the bus via its corresponding request signal, current --  req, corresponding to its channel number. The 12-input round robin arbiter receives the current --  req 11:0! signals 16 , selects one of the 12 request signals, and asserts the selected --  req signal corresponding to the channel number selected. The selected --  req 11:0! signals 18 are latched by latch 14 and fed back as prev --  selected 11:0! signals 20 as inputs to the 12-input round robin arbiter 12. The prev --  selected 11:0! signals provide a history of the request previously selected by the arbiter 12 which enables the arbiter 12 to determine which of the requests to select next according to the fixed cyclical order of the requests. 
     Appendix A includes Verilog source code to describe an implementation of the arbiter 12 of FIG. 1. In the arbiter 12, select --  req 11:0! correspond to requesters 11 through 0 respectively. The arbiter 12 selects requesters in a fixed cyclical order from 11 through 0. Thus, if in a given arbitration period requesters 8, 4, and 3 are all requesting, i.e., if signals current --  req 8!, current --  req 4!, and current --  req 3! are all asserted, then the arbiter 12 will determine which requester was previously selected. If requester 2, 1, 0, 11, 10, or 9 was the previously selected requester, then the arbiter 12 will select requester 8, as can be ascertained from Appendix A. If requesters 8, 7, 6, or 5 was the previously selected requester, then the arbiter 12 will select requester 4. If requester 4 was the previously selected requester, then the arbiter 12 will select requester 3. Thus, the arbiter 12 always determines the previously selected requester and selects the currently requesting requester which is next lowest in the fixed order of requesters, taking into account the cycling, or &#34;wrapping&#34;, around of the fixed order. That is, once the arbiter 12 reaches requester 0, the arbiter 12 &#34;wraps &#34; back up to requester 11 to determine the next currently requesting requester. Thus, essentially requester 11 is &#34;next lowest &#34; in the fixed cyclic order after requester 0. 
     While the round robin priority scheme provides fairness among requesters, a property of the round robin scheme is that the time required to select a requester increases with the number of requesters requesting use of the resource being arbitrated for. That is, according to conventional methods, the number of maximum possible decodes to compare the current requesters with the previously selected requester which must be performed by a round robin arbiter increases essentially linearly with the number of requesters which are being arbitrated between. Therefore, in situations where the number of requesters is relatively high, the round robin scheme may prove prohibitive to use. 
     For example, consider again the arbiter 12 described above. Appendix B includes a timing report indicating the data arrival time, i.e., the worst case propagation delay for the arbiter 12 described in Appendix A to select one of the 12 requesters, in this case to select requester 4. The worst case time for at least one implementation using current technology is approximately 19.76 nanoseconds. Considering a communications system employing the arbiter 12, for example, in which the communications protocols being used require relatively high clock rates, such as 50 MHz (i.e., with 20 nanosecond cycle times), then it may be readily observed that the arbiter 12 may require essentially the entire clock cycle time to select a requester. This fact essentially renders the use of the round robin arbiter unusable, even though the application requires a round robin arbitration scheme. Therefore, an improved round robin arbitration method and apparatus is desired. 
     SUMMARY OF THE INVENTION 
     The problems outlined above are in large part solved by a cascaded round robin arbitration method and apparatus of the present invention. In one embodiment, a two-level cascaded arbitration mechanism receives a plurality of requester inputs and selects one of the requesters for each arbitration period to award use of a shared resource, such as a data bus, or service by a processor. The arbiter comprises a series of first level arbiters coupled in parallel, the output of which is forwarded to a second level arbiter. The requesters are grouped, and each group of requesters is provided to a corresponding first level arbiter. An exemplary embodiment is described in which a 12 requester arbiter comprises three first level arbiters which each receive a group of four requesters, and a second level arbiter selects from among the three groups. It is understood, however, that more or less than 12 requesters may be serviced by the present scheme. If the number of first level arbiters is three, then the total number of requesters being serviced are grouped approximately equally among the three first level arbiters. However, the number of first level arbiters can be more or less than three depending on the desired application. 
     The first level arbiters operate in parallel to select one of the currently active requesters in their group. The requester selected from each group, i.e., by each first level arbiter, is provided to the second level arbiter. The second level arbiter selects the selected requester from one of the groups as the final selected requester, i.e., the winner of the arbitration. That is, the second level arbiter in cooperation with the first level arbiters selects which of the plurality of requesters to award use of the shared resource. 
     The requester selected by the second level arbiter is latched at the end of the arbitration period. The latched selected requester is provided as feedback to the first and second level arbiters. Each of the first level arbiters selects from among the requesters in their group in a round robin fashion using the fed back previous selected requester indication as history. In particular, if the requester previously selected by the second level arbiter is in the group belonging to the first level arbiter, the first level arbiter selects the next currently active requester in the fixed cyclical order. Otherwise, the first level arbiter selects the currently active requester with the highest requester number. 
     Each of the first level arbiters determines whether or not a wrap condition has occurred during the time in which one of the requesters in its group is being selected. A wrap condition occurs when, in the process of selecting a requester, a first level arbiter has cycled from the previously selected requester through the fixed round robin order to down to the lowest number requester and back up to the highest number requester. Each first level arbiter provides an indication of a wrap condition to the second level arbiter. 
     The second level arbiter selects from among the groups in a round robin fashion using the fed back previous selected requester indication as history and additionally in response to the wrap indication from each first level arbiter. In particular, the second level arbiter continues to select a requester from the same group previously selected until a wrap condition has been indicated by the first level arbiter of that same group. When a wrap condition has been indicated, the second level arbiter selects the next group in the fixed cyclical order, i.e., in a round robin fashion, which has an active requester. 
     Since a substantial number of the comparisons required are performed in parallel by the series of first level arbiters, the overall worst case arbitration time required by the arbitration mechanism of the present invention is less than the worst case time of conventional methods. Furthermore, the amount of logic, and therefore circuit area, required to embody an arbiter according to the present invention is less than that of conventional arbiters. Thus, the first and second level arbiters cooperate to perform round robin arbitration among a plurality of requesters in an improved, more time-expedient manner. 
     Broadly speaking, the present invention contemplates an arbiter comprising a series of first level arbiters connected in parallel, wherein each first level arbiter is configured to select a request signal from among a group of request signals forwarded thereto. The arbiter further comprises a second level arbiter configured to receive and discern which request signal forwarded from the first level arbiters to select. The second level arbiter is configured to select another request signal forwarded from the sarne first level arbiter which forwarded the previous selected request signal before selecting a request signal forwarded from a first level arbiter different from the first level arbiter which forwarded the previous selected request signal. 
     The present invention firther contemplates a method for selecting one of a plurality of requests, comprising receiving a plurality of groups of requests and selecting, in parallel, an intermediate request from each of the plurality of groups. The method further comprises selecting a request from among the intermediate requests wherein the request is selected from the same group from which the previous request was selected before a request is selected from a different group from which the previous request was selected. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Other objects and advantages of the invention will become apparent upon reading the following detailed description and upon reference to the accompanying drawings in which: 
     FIG. 1 is a block diagram illustrating a conventional round robin arbiter; and 
     FIG. 2 is a block diagram of a 2-level cascaded arbiter according to a preferred embodiment of the present invention. 
     While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present invention as defined by the appended claims. 
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
     Turning now to FIG. 2, a block diagram of a 2-level cascaded arbiter 32 according to a preferred embodiment of the present invention is shown. The arbiter 32 is an arbiter configured to select one request signal from among a plurality of request signals. Arbiter 32 selects one of twelve request signals and is intended to be a representative implementation of the present invention. Thus, it may be readily observed that the present invention is not limited in the number of requests which may be selected from, but rather the present invention may be expanded to accommodate any number of requests to be selected from. 
     Arbiter 32 comprises three first level arbiters 36A-36C (referred to collectively as 36) coupled in parallel to a second level arbiter 34. Preferably, first level arbiters 36 and second level arbiter 34 comprise combinatorial digital logic. The first level arbiters 36 each select one request signal from among a group of request signals and forward the selected request signal to the second level arbiter 34 which selects one group from among the groups as the final selected request signal. The 2-level, or &#34;cascaded&#34;, architecture of arbiter 32 advantageously provides improved performance over conventional single level arbiters and further advantageously may be implemented with fewer logic gates than conventional single level arbiter implementations, as will be discussed below. 
     First level arbiters 36A, 36B and 36C each receive a group of four request signals: current --  req 11:8! signals 44A, current --  req 7:4! signals 44B, and current --  req 3:0! signals 44C, respectively, referred to collectively as current --  req 11:0! signals 44. The current --  req signals 44 are the request signals being generated by the requesters requesting use of a shared resource. Each of current --  req signals 44 correspond to a different requester according to the signal index. That is, requester 3 asserts the current --  req 3! signal to request use of the shared resource being arbitrated for by the arbiter 32, for example. In one application, current --  req signals 44 may be generated by 12 DMA channels requesting use of a shared data bus in a round robin fashion, for example. In another application, the current --  req signals 44 may be 12 interrupt request signals requesting service from a processor in a round robin fashion. 
     Any or all of the current --  req signals 44 may be active, i.e., asserted, at any time. When one of the current --  req signals 44 is active it is said to be &#34;requesting.&#34; During each arbitration period the arbiter 32 selects one of the currently requesting current --  req signals 44 to award ownership of the shared resource. The arbitration period is determined by a latch signal 54 which causes latch 38 to latch selected --  req 11:0! signals 40 which indicate which requester was selected by the arbiter 32. For example, a data bus may be shared among a set of DMA channels according to time slices. That is, a first DMA channel may be granted ownership of the data bus for a first period of time and perform data transfers on the data bus, then a second DMA channel may be granted ownership of the data bus for a second period of time and perform data transfers on the data bus. If the first DMA channel did not complete its data transfer during the first period of time, it may continue to request the data bus and be granted the data bus during a third period of time and transfer more data. In this example the arbitration period is determined according to a fixed amount of time. 
     In another example, the latch signal 54 may be configured such that each DMA channel is allowed to complete its entire data transfer on the data bus before another DMA channel is awarded ownership of the data bus. In this example, the arbitration period varies according to the time required for a given DMA channel to complete a given DMA transfer. In another example, the arbitration period may correspond to a bus clock or system clock, such as a 50 MHz clock signal. Thus, it may be readily appreciated that the arbiter 32 advantageously arbitrates between a plurality of requesters in a flexible manner to accommodate the arbitration period requirements of the particular application in which the arbiter 32 is employed. 
     First level arbiters 36A-36C also receive prev --  selected 11:8! signals, prev --  selected 7:4! signals, and prev --  selected 3:0! signals, respectively, referred to collectively as prev --  selected 11:0! signals 42. The prev --  selected signals 42 indicate which one of the current --  req signals 44 was selected by the arbiter 32 during the previous arbitration period. The prev --  selected signals 42 correspond to the current --  req signals 44 latched across the arbitration period, e.g., the prev --  selected 5! signal corresponds to the current --  req 5! signal in that they both correspond to requester 5. The prev --  selected signals 42 are generated by latch 38 latching selected --  req 11:0! signals 40, also referred to as selected --  req signals 40. 
     The selected --  req signals 40 correspond to the current --  req signals 44, e.g., the selected --  req 5! signal corresponds to the current --  req 5! signal. The selected --  req signals 40 are generated by second level arbiter 34 and indicate which of the currently requesting current --  req signals 44 is to be granted use of the shared resource. Since only one of the current --  req signals 44 is selected by the arbiter 32 during a given arbitration period, only one of the selected --  req signals 40 is active. Consequently, only one of the prev --  selected signals 42 is active. If none of the current --  req signals 44 are active, none of the selected --  req signals 40 will be active. 
     The prev --  selected signals 42 are fed back as inputs to the first level arbiters 36 and second level arbiter 34 to provide history of the selection performed by the arbiter 32 during the previous arbitration period prior to the &#34;next &#34; current --  req signal. This history enables the first level arbiters 36 and second level arbiter 34 to work in a cooperative manner to select from among the current --  req signals 44 in a round robin, or fixed cyclical order. 
     By convention, the four current --  req signals 44 selected by first level arbiter 36A are referred to as group 2, the four current --  req signals 44 selected by first level arbiter 36B are referred to as group 1, and the four current --  req signals 44 selected by first level arbiter 36C are referred to as group 0. First level arbiter 36A selects one of the current --  req signals 44 in group 2 and indicates its selected requester on selected --  group2 3:0! signals 46A. First level arbiter 36B selects one of the current --  req signals 44 in group 1 and indicates its selected requester on selected --  group1 3:0! signals 46B. First level arbiter 36C selects one of the current --  req signals 44 in group 0 and indicates its selected requester on selected --  group0 3:0! signals 46C. Selected --  group0 3:0! signals 46C, selected --  group1 3:0! signals 46B, and selected --  group2 3:0! signals 46A are referred to collectively as selected --  group signals 46. 
     Each of the first level arbiters 36 determines which of its four current --  req signals 44 is active and selects one of them in a round robin manner. Thus, only one of the selected --  group signals 46 from each of the three groups is active at any given time. In one embodiment, the fixed cyclical order of the round robin scheme is from highest to lowest requester number and then cycling back, i.e., &#34;wrapping &#34; from the lowest requester number up to the highest requester number to repeat the fixed highest-to-lowest arbitration. For example, if current --  req signal 10! and current --  req signal 8! are active, and prev --  selected signal 9! is active (indicating that requester 9 was chosen in the previous arbitration period), then first level arbiter 36A will assert selected --  group2 0! to indicate that requester 8 is selected. In other words, current --  req 11:8! signals 44A correspond to selected --  group2 3:0! signals 46A, current --  req 7:4! signals 44B correspond to selected --  group1 3:0! signals 46B, and current --  req 3:0! signals 44C correspond to selected --  group0 3:0! signals 46C. It may be readily observed that a different convention or the fixed cyclical order may be chosen, such as from lowest to highest and wrapping back to lowest, if desired. 
     Each of the first level arbiters 36 also asserts a corresponding wrap signal (i.e., wrap2 signal 48A, wrap1 signal 48B, and wrap0 signal 48C, referred to collectively as wrap signals 48) to indicate a wrap condition. A wrap condition occurs when, in the process of selecting a requester, a first level arbiter 36 has cycled from the previously selected requester through the fixed cyclical order down to the lowest number requester and back up to the highest number requester. In the example of the previous paragraph, the first level arbiter 36A would not assert the wrap2 signal 48A since it did not need to wrap in order to select requester 8. However, assume that the previous requester had been requester 8. In this example, the first level arbiter 36A would have selected requester 10, thereby causing a wrap condition to occur. Thus, the first level arbiter 36A would have asserted the wrap2 signal 48A. An active wrap signal indicates to the second level arbiter 34 that the corresponding group will have lower priority than the other groups in being selected by the second level arbiter 34, as will be discussed. 
     The second level arbiter 34 receives the selected --  group signals 46 and selects one of the asserted selected --  group signals 46 to award ownership of the shared resource. The second level arbiter 34 asserts one of the selected --  req signals 40 associated with the selected one of the selected --  group signals 46. The second level arbiter 34 selects one of the selected --  group signals 46 in a round robin manner using feedback history regarding the previously selected requester as indicated by the prev --  selected signals 42. The second level arbiter 34 also receives the wrap signals 48 and uses the wrap signals 48 to determine which group of requesters to select next. 
     Prev --  group2 signal 52A, prev --  group1 signal 52B, and prev --  group0 signal 52C (referred to collectively as prev --  group signals 52) are generated by four-input OR gates 50A, SOB, and SOC (referred to collectively as OR gates 50), respectively, which receive prev --  selected 11:8! signals, prev --  selected 7:4!, and prev --  selected 3:0! signals, respectively. Preferably, OR gates 50 are implemented as part of second level arbiter 34. The second level arbiter 34 employs the selection history provided by the prev --  group signals 52 to select from among the requester groups in a round robin manner, as modified by the wrap signals 48. 
     The second level arbiter 34 selects from among the three groups as follows. If the previously selected group still has a requester currently requesting use of the shared resource, i.e., if one of the selected --  group signals 46 in the previously selected group is asserted, then as long as the wrap signal of that group is not asserted, the second level arbiter 34 will select that group, i.e., the active one of the selected --  group signals 46 from the previously selected group. However, if the wrap signal of the previously selected group is active, then the second level arbiter 34 will attribute a lower priority to that group, i.e., the previously selected group, and choose the next group in the fixed cyclical order. Thus, if the wrap signal of the previously selected group is active, the second level arbiter 34 will only select the previously selected group if no other groups currently have an active request. 
     Operation of the arbiter 32 will be described subsequently by way of example with reference to Table 1. 
     
                                           TABLE 1                                 
__________________________________________________________________________
arb prev                wrap                                              
period                                                                    
    selected                                                              
        current.sub.-- req                                                
              selected.sub.-- group2, 1, 0                                
                        2, 1, 0                                           
                            prev.sub.-- group                             
                                  selected.sub.-- req                     
__________________________________________________________________________
1   10  8, 5, 4                                                           
              8, 5, N   0, 0, 0                                           
                            2     8                                       
2   8   5, 4  N, 5, N   1, 0, 0                                           
                            2     5                                       
3   5   9, 6, 4                                                           
              9, 4, N   0, 0, 0                                           
                            1     4                                       
4   4   9, 6  9, 6, N   0, 1, 0                                           
                            1     9                                       
5   9   6, 2  N, 6, 2   1, 0, 0                                           
                            2     6                                       
6   6   2     N, N, 2   0, 1, 0                                           
                            1     2                                       
7   2   N     N, N, N   0, 0, 1                                           
                            0     N                                       
__________________________________________________________________________
 
    
     In the example illustrated in Table 1, the currently requesting requesters, denoted by current --  req, are chosen to illustrate the operation of the arbiter 32. In table 1, an &#34;N&#34; indicates &#34;None&#34;, i.e., no active signals for the indicated signal group. The prev --  selected column corresponds to prev --  selected signals 42, the current --  req column corresponds to current --  req signals 44, the selected --  group 2,1,0 column corresponds to selected --  group2 signals 46A, selected --  group1 signals 46B, and selected --  group0 signals 46C, respectively. The wrap 2,1,0 column corresponds to wrap2 signal 48A, wrap1 signal 48B, and wrap0 signal 48C, respectively. The prev --  group column indicates which of prev --  group2 signal 52A, prev --  group1 signal 52B, and prev --  group0 signal 52C is active. The selected --  req column corresponds to selected --  req signals 40. The wrap signals are denoted as binary values. All other values are described as decimal values corresponding to the associated requester for simplicity, rather than describing the value of each binary signal. 
     Let us assume that arbitration period 1 describes a set of initial conditions, namely that the previously selected requester was requester 10. Thus, prev --  selected signals 11:0! 42 would have a hexadecimal value of 0×400. Let us assume requesters 8, 5, and 4 are requesting use of the shared resource during arbitration period 1, i.e., current --  req 11:0! signals 44 have a hexadecimal value of 0×130. 
     In response to these inputs, group 2 first level arbiter 36A selects requester 8 since it is the only requesting requester in group 2, i.e., first level arbiter 36A generates selected --  group2 3:0! signals 46A with a hexadecimal value of 0×1; group 1 first level arbiter 36B selects requester 5 since requester 5 has a higher requester number than requester 4 (i.e., has the highest current requester number in group 1) and the previously selected requester is not from group 1, i.e., first level arbiter 36B generates selected --  group1 3:0! signals 46B with a hexadecimal value of 0×2; group 0 first level arbiter 36C selects no requester since no requesters in group 0 are currently active, i.e., first level arbiter 36C generates selected group0 3:0! signals 46C with a hexadecimal value of 0×0. 
     Group 2 first level arbiter 36A does not assert its wrap signal since it did not have to wrap in order to select requester 8. Group 1 and 0 first level arbiters 36B and 36C do not assert their wrap signals since their group was not the previously selected group and therefore cannot generate a wrap condition. Since the previously selected requester, 10, is in group 2, the prev --  group value indicates group 2. Finally, the second level arbiter 34 selects group 2, i.e., requester 8, since the previously selected group was group 2 and the group 2 wrap signal is not asserted. That is, the second level arbiter 34 generates selected --  req 11:0! signals 40 with a hexadecimal value of 0×100. 
     In arbitration period 2, the previously selected requester is now 8. Let us assume requesters 5 and 4 are active. Since requesters 5 and 4 are both in group 1, no requesters are selected in groups 2 and 0. Group 1 first level arbiter 36B selects requester 5 since requester 5 has the highest current requester number in group 1 and the previously selected requester is not from group 1. The group 2 wrap signal is active since the group 2 arbiter 36A had to wrap from requester 8 up to requester 11 and down through requesters 10, 9 and 8 to look for an active requester, even though it found none. The previous group is 2 since requester 8 is in group 2. The second level arbiter 34 selects group 1, i.e., requester 5, since group 1 is the only group with an active requester. 
     In arbitration period 3, the previously selected requester is now 5. Let us assume requesters 9, 6 and 4 are active. Since requester 9 is the only requester in group 2, it is selected. Since no requesters are active in group 0, none are selected. In group 1, requester 4 is selected since it is next in the fixed cyclical order from the previous requester 5, even though requester 6 has a higher requester number. The group 1 wrap signal is not asserted since a wrap condition did not occur in choosing requester 4 for group 1. Since the previously selected requester 5 is in group 1, the previous group is group 1. The second level arbiter 34 selects group 1, i.e., requester 4, since group 1 was the previously selected group and the group 1 wrap signal is not asserted. 
     In arbitration period 4, the previously selected requester is now 4. Let us assume requesters 9 and 6 are active. Since requester 9 is the only requester in group 2, it is selected. Since requester 6 is the only requester in group 1, it is selected. The group 1 wrap signal is asserted since a wrap condition was generated to select requester 6, i.e., since the group 1 arbiter 36B had to wrap from requester 4 back up to requester 7 and down to 6. The previous group is 1 since the previously selected requester 4 is in group 1. The second level arbiter 34 selects group 2, i.e., requester 9, since the previously selected group is group 1, but group 1 has wrapped, and group 0 does not have any active requesters. 
     In arbitration period 5, the previously selected requester is now 9. Let us assume requesters 6 and 2 are active. Since requester 6 is the only requester in group 1, it is selected. Since requester 2 is the only requester in group 0, it is selected. The group 2 wrap signal is asserted since a wrap condition was generated in searching for an active requester in group 2 even though none were found. The previously selected group was 2. The second level arbiter 34 selects group 1, i.e., requester 6, since the previously selected group was group 2, but group 2 has no active requesters and group 1 is next in the fixed cyclical order among the groups. 
     In arbitration period 6, the previously selected requester is now 6. Let us assume requester 2 is active. Since requester 2 is the only requester in group 0, it is selected. The group 1 wrap signal is asserted since a wrap condition occurred looking for an active requester in group 1, but none were found. The previously selected group was 1. The second level arbiter 34 selects group 0, i.e., requester 2, since it is the only group with an active requester. 
     In arbitration period 7, the previously selected requester is now 2. Let us assume no requesters are active. The group 0 wrap signal is asserted since a wrap condition occurred in searching for an active requester in group 0 although none were found. The previously selected group is 0. The second level arbiter 34 selects no groups and therefore no requesters since none are active, i.e., no requesters are requesting use of the shared resource. 
     Appendix C includes Verilog source code to describe an implementation of the arbiter 32 of FIG. 2. Signal names in the source code of Appendix C correspond to signal names of FIG. 2. 
     Appendix D includes a timing report indicating the data arrival time, i.e., the worst case propagation delay for the arbiter 32 described in Appendix C to select one of the 12 requesters, in this case requester 8. The worst case time for at least one implementation using current technology is 9.59 nanoseconds. As may be readily observed, the worst case data arrival time of the arbiter 32 described in Appendix C of the present invention is advantageously less than half the data arrival time of the conventional arbiter 12 described in Appendix A. 
     A second advantage is realized by the arbiter 32 of the present invention with relation to the conventional arbiter 12, namely, reduced real estate requirements. As indicated in Appendix B, the estimated cell area of the arbiter 12 described in Appendix A is 44905.246094 square microns using a current technology. In contrast, the estimated cell area of the arbiter 32 described in Appendix C is 24423.289062 square microns using the same current technology. As may be readily observed, the estimated cell area of the arbiter 32 described in Appendix C of the present invention is advantageously only a little more than half the cell area of the conventional arbiter 12 described in Appendix A. 
     Generally speaking, the 2-level cascaded arbitration mechanism architecture of the present invention may be embodied in a variety of manners regarding numbers of groups and numbers of requesters per group. For example, a 12-input (i.e., 12 requester) 2-level cascaded arbiter may be embodied as six 2-input first level arbiters and a second level arbiter which receives 6 groups of selected requests. Furthermore, embodiments comprising four 3-input first level arbiters providing four groups of selected requests to a second level arbiter, or two 6-input first level arbiters providing two groups are contemplated. It is noted however, that generally speaking, the number of groups selected should be an integer multiple of the square root of the number of requesters being arbitrated between in order to realize optimal performance. 
     It will be appreciated by those skilled in the art having the benefit of this disclosure that the form of the invention shown and described is to be taken as exemplary, presently preferred embodiments. Various modifications and changes may be made without departing from the spirit and scope of the invention as set forth in the claims. It is intended that the following claims be interpreted to embrace all such modifications and changes. ##SPC1##