Patent Publication Number: US-11049755-B2

Title: Semiconductor substrate supports with embedded RF shield

Description:
TECHNICAL FIELD 
     The present technology relates to components and apparatuses for semiconductor manufacturing. More specifically, the present technology relates to substrate support assemblies and other semiconductor processing equipment. 
     BACKGROUND 
     Integrated circuits are made possible by processes which produce intricately patterned material layers on substrate surfaces. Producing patterned material on a substrate requires controlled methods for forming and removing material. The temperature at which these processes occur may directly impact the final product. Substrate temperatures are often controlled and maintained with the assembly supporting the substrate during processing. Internally located heating devices may generate heat within the support that may be transferred conductively to the substrate. The substrate support may also be utilized in some technologies to develop a substrate-level plasma. Plasma generated near the substrate may cause bombardment of components, as well as parasitic plasma formation in unfavorable regions of the chamber. Additionally, utilizing the pedestal for both heat generation and plasma generation may cause interference effects. 
     As a variety of operational processes may utilize increased temperature as well as substrate-level plasma formation, constituent materials of the substrate support may be exposed to corrosive and erosive materials. Thus, there is a need for improved systems and methods that can be used to produce high quality devices and structures. These and other needs are addressed by the present technology. 
     SUMMARY 
     Exemplary support assemblies may include a top puck defining a substrate support surface, where the top puck is also characterized by a height. The assemblies may include a stem coupled with the top puck on a second surface of the top puck opposite the substrate support surface. The assemblies may include an RF electrode embedded within the top puck proximate the substrate support surface. The assemblies may include a heater embedded within the top puck. The assemblies may also include a ground shield or Faraday cage embedded within the top puck. The ground shield may be characterized by an inner region extending radially through the top puck. The ground shield may further be characterized by an outer region extending perpendicular to the inner region. 
     In some embodiments, the ground shield may be further characterized by an outer region extending perpendicular to the inner region, and the outer region of the ground shield may extend vertically at least partially through the height of the top puck. The top puck may define a recess within the substrate support surface configured to receive a substrate for processing. The top puck may include a ceramic material. The heater may be positioned within the top puck between the RF electrode and the ground shield. The heater may be configured to heat a substrate supported by the top puck to a temperature greater than or about 300° C. The heater may include a first heater and a second heater, the second heater may be independently controllable from the first heater, and the second heater may extend about an outer edge of the first heater. The assembly may further include a stem coupled with the top puck on a second surface of the top puck opposite the substrate support surface. The stem may define an internal channel through which an RF rod extends and couples with the RF electrode. The assembly may also include a ground return extending through the internal channel coaxially with the RF rod. The assembly may also include a ground impedance electrode disposed within the top puck proximate the substrate support surface. 
     Some embodiments of the present technology may also encompass substrate support assemblies. The assemblies may include a top puck defining a substrate support surface and characterized by a height. The assemblies may include a stem coupled with the top puck on a second surface of the top puck opposite the substrate support surface. The assemblies may include an RF electrode embedded within the top puck proximate the substrate support surface. The assemblies may include a heater embedded within the top puck. The assemblies may also include a ground shield embedded within the top puck. The ground shield may include a base extending radially through the top puck. The ground shield may also include an intermediate ring positioned vertically between the ground shield base and the RF electrode, and the intermediate ring may be electrically coupled with the base. 
     In some embodiments the top puck may define a recess within the substrate support surface configured to receive a substrate for processing. The top puck and the stem may include a ceramic material. The heater may be positioned within the top puck between the RF electrode and the ground shield. The heater may be configured to heat a substrate supported by the top puck to a temperature greater than or about 300° C. The heater may include a first heater and a second heater. The second heater may be independently controllable from the first heater, and the second heater may extend about an outer edge of the first heater. The assemblies may also include a ground impedance electrode disposed within the top puck proximate the substrate support surface. The ground impedance electrode may be coupled with ground along a separate ground path from the ground shield. The assemblies may also include a conductive post extending vertically within the top puck and electrically coupling the intermediate ring of the ground shield with the base of the ground shield. The intermediate ring may include a plurality of intermediate rings vertically offset from one another within the top puck. Each ring of the plurality of intermediate rings may be positioned within 1 cm of an adjacent ring within the top puck. 
     Such technology may provide numerous benefits over conventional systems and techniques. For example, embodiments of the present technology may provide substrate supports that may both generate substrate-level plasmas, and afford high-temperature operations. Additionally, by incorporating internal ground shields, material erosion and corrosion may be limited or prevented. These and other embodiments, along with many of their advantages and features, are described in more detail in conjunction with the below description and attached figures. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the drawings. 
         FIG. 1  shows a top plan view of an exemplary processing system according to some embodiments of the present technology. 
         FIG. 2A  shows a schematic cross-sectional view of an exemplary processing chamber according to some embodiments of the present technology. 
         FIG. 2B  shows a detailed view of an exemplary showerhead according to some embodiments of the present technology. 
         FIG. 3  shows a bottom plan view of an exemplary showerhead according to some embodiments of the present technology. 
         FIG. 4  shows a schematic partial cross-sectional view of an exemplary semiconductor processing chamber according to some embodiments of the present technology. 
         FIG. 5  shows a schematic partial cross-sectional view of an exemplary substrate support assembly according to some embodiments of the present technology. 
         FIG. 6  shows a schematic partial cross-sectional view of an exemplary substrate support assembly according to some embodiments of the present technology. 
     
    
    
     Several of the figures are included as schematics. It is to be understood that the figures are for illustrative purposes, and are not to be considered of scale unless specifically stated to be of scale. Additionally, as schematics, the figures are provided to aid comprehension and may not include all aspects or information compared to realistic representations, and may include exaggerated material for illustrative purposes. 
     In the appended figures, similar components and/or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label by a letter that distinguishes among the similar components. If only the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the letter. 
     DETAILED DESCRIPTION 
     Some etching processes may include multiple operations including both an ion bombardment operation occurring at the substrate level from a plasma developed by an inert precursor, as well as a chemical process that may or may not include plasma generation, but may include an etchant precursor, such as a halogen-containing precursor. Additionally, with developed small-scale etching processes, such as some atomic layer etching, higher temperature operation may be beneficial to the etch process. When substrate support assemblies are utilized for plasma generation as well as heat generation, challenges may arise with respect to operating conditions and parameters. 
     For example, an embedded electrode within a substrate support may be utilized to generate a bias plasma at the substrate level. As the electrode emits energy, such as RF energy, for example, the waves may be emitted in all directions, and plasma may be generated based on where greater amounts of ground coupling may occur. In many operations, a lid or faceplate may reside above the substrate support, and a processing region may be defined between the substrate on the support and the overlying component. Often, this is the region in which plasma generation is preferred. However, based on many chamber designs, the substrate support may be positioned near chamber sidewalls and/or a chamber floor beneath the substrate support. Accordingly, a relatively close path to ground may be afforded to the chamber side walls. This may develop parasitic plasma on the sides of the substrate support as well as beneath the substrate support. Not only does this plasma limit processing capability, but it may also cause additional damage to exposed chamber components in these regions. 
     Consequently, a ground shield is often formed about the substrate support. Many conventional ground shields include a conductive material extending up the stem and proceeding along the base and sides of the puck on which the substrate resides. The ground shield may then operate to limit emissions through the pedestal, and plasma may be better contained within the processing region. However, the ground shield in this configuration is exposed to both ion bombardment that may erode the ground shield material, as well as chemical etchants that may corrode the ground shield material. Accordingly, many of these configurations are limited to lower temperature operations, which may allow protection of the ground shield that can be in the form of coatings that cannot be maintained at higher temperature operations. For example, an aluminum ground shield may begin to deform or melt at temperatures over 450° C., and may actively corrode from chemical etchants at these temperatures. Additionally, many oxide coatings will begin to peel as temperatures exceed 300° C., which may expose underlying materials that may be etched or eroded by plasma species. 
     The present technology overcomes these challenges by forming a ground shield or Faraday cage, which may be synonymously used throughout this disclosure, within the substrate support. In such configurations, the ground shield may not be exposed to process precursors, which may protect the shield during operation. Additionally, operations may be performed at higher temperatures where conventional technologies may suffer from coatings on the ground shield peeling, as well as the ground shield itself deforming or melting. 
     Although the remaining disclosure will routinely identify specific etching processes utilizing the disclosed technology, it will be readily understood that the systems and methods are equally applicable to deposition and cleaning chambers and processes as may occur in the described chambers. Accordingly, the technology should not be considered to be so limited as for use with etching processes or chambers alone. The disclosure will discuss one possible system and chamber in which pedestals according to embodiments of the present technology can be used before additional variations and adjustments to this system according to embodiments of the present technology are described. 
       FIG. 1  shows a top plan view of one embodiment of a processing system  100  of deposition, etching, baking, and curing chambers according to embodiments. In the figure, a pair of front opening unified pods (FOUPs)  102  supply substrates of a variety of sizes that are received by robotic arms  104  and placed into a low pressure holding area  106  before being placed into one of the substrate processing chambers  108   a - f , positioned in tandem sections  109   a - c . A second robotic arm  110  may be used to transport the substrate wafers from the holding area  106  to the substrate processing chambers  108   a - f  and back. Each substrate processing chamber  108   a - f , can be outfitted to perform a number of substrate processing operations including the dry etch processes described herein in addition to cyclical layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etch, pre-clean, degas, orientation, and other substrate processes including, annealing, ashing, etc. 
     The substrate processing chambers  108   a - f  may include one or more system components for depositing, annealing, curing and/or etching a dielectric film on the substrate wafer. In one configuration, two pairs of the processing chambers, e.g.,  108   c - d  and  108   e - f , may be used to deposit dielectric material on the substrate, and the third pair of processing chambers, e.g.,  108   a - b , may be used to etch the deposited dielectric. In another configuration, all three pairs of chambers, e.g.,  108   a - f , may be configured to etch a dielectric film on the substrate. Any one or more of the processes described may be carried out in chamber(s) separated from the fabrication system shown in different embodiments. It will be appreciated that additional configurations of deposition, etching, annealing, and curing chambers for dielectric films are contemplated by system  100 . 
       FIG. 2A  shows a cross-sectional view of an exemplary process chamber system  200  with partitioned plasma generation regions within the processing chamber. During film etching, e.g., titanium nitride, tantalum nitride, tungsten, silicon, polysilicon, silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, etc., a process gas may be flowed into the first plasma region  215  through a gas inlet assembly  205 . A remote plasma system (RPS)  201  may optionally be included in the system, and may process a first gas which then travels through gas inlet assembly  205 . The inlet assembly  205  may include two or more distinct gas supply channels where the second channel, not shown, may bypass the RPS  201 , if included. 
     A cooling plate  203 , faceplate  217 , ion suppressor  223 , showerhead  225 , and a substrate support  265 , having a substrate  255  disposed thereon, are shown and may each be included according to embodiments. The pedestal  265  may have a heat exchange channel through which a heat exchange fluid flows to control the temperature of the substrate, which may be operated to heat and/or cool the substrate or wafer during processing operations. The wafer support platter of the pedestal  265 , which may comprise aluminum, ceramic, or a combination thereof, may also be resistively heated in order to achieve relatively high temperatures, such as from up to or about 100° C. to above or about 1100° C., using an embedded resistive heater element. 
     The faceplate  217  may be pyramidal, conical, or of another similar structure with a narrow top portion expanding to a wide bottom portion. The faceplate  217  may additionally be flat as shown and include a plurality of through-channels used to distribute process gases. Plasma generating gases and/or plasma excited species, depending on use of the RPS  201 , may pass through a plurality of holes, shown in  FIG. 2B , in faceplate  217  for a more uniform delivery into the first plasma region  215 . 
     Exemplary configurations may include having the gas inlet assembly  205  open into a gas supply region  258  partitioned from the first plasma region  215  by faceplate  217  so that the gases/species flow through the holes in the faceplate  217  into the first plasma region  215 . Structural and operational features may be selected to prevent significant backflow of plasma from the first plasma region  215  back into the supply region  258 , gas inlet assembly  205 , and fluid supply system  210 . The faceplate  217 , or a conductive top portion of the chamber, and showerhead  225  are shown with an insulating ring  220  located between the features, which allows an AC potential to be applied to the faceplate  217  relative to showerhead  225  and/or ion suppressor  223 . The insulating ring  220  may be positioned between the faceplate  217  and the showerhead  225  and/or ion suppressor  223  enabling a capacitively coupled plasma (CCP) to be formed in the first plasma region. A baffle (not shown) may additionally be located in the first plasma region  215 , or otherwise coupled with gas inlet assembly  205 , to affect the flow of fluid into the region through gas inlet assembly  205 . 
     The ion suppressor  223  may comprise a plate or other geometry that defines a plurality of apertures throughout the structure that are configured to suppress the migration of ionically-charged species out of the first plasma region  215  while allowing uncharged neutral or radical species to pass through the ion suppressor  223  into an activated gas delivery region between the suppressor and the showerhead. In embodiments, the ion suppressor  223  may comprise a perforated plate with a variety of aperture configurations. These uncharged species may include highly reactive species that are transported with less reactive carrier gas through the apertures. As noted above, the migration of ionic species through the holes may be reduced, and in some instances completely suppressed. Controlling the amount of ionic species passing through the ion suppressor  223  may advantageously provide increased control over the gas mixture brought into contact with the underlying wafer substrate, which in turn may increase control of the deposition and/or etch characteristics of the gas mixture. For example, adjustments in the ion concentration of the gas mixture can significantly alter its etch selectivity, e.g., SiNx:SiOx etch ratios, Si:SiOx etch ratios, etc. In alternative embodiments in which deposition is performed, it can also shift the balance of conformal-to-flowable style depositions for dielectric materials. 
     The plurality of apertures in the ion suppressor  223  may be configured to control the passage of the activated gas, i.e., the ionic, radical, and/or neutral species, through the ion suppressor  223 . For example, the aspect ratio of the holes, or the hole diameter to length, and/or the geometry of the holes may be controlled so that the flow of ionically-charged species in the activated gas passing through the ion suppressor  223  is reduced. The holes in the ion suppressor  223  may include a tapered portion that faces the plasma excitation region  215 , and a cylindrical portion that faces the showerhead  225 . The cylindrical portion may be shaped and dimensioned to control the flow of ionic species passing to the showerhead  225 . An adjustable electrical bias may also be applied to the ion suppressor  223  as an additional means to control the flow of ionic species through the suppressor. 
     The ion suppressor  223  may function to reduce or eliminate the amount of ionically charged species traveling from the plasma generation region to the substrate. Uncharged neutral and radical species may still pass through the openings in the ion suppressor to react with the substrate. It should be noted that the complete elimination of ionically charged species in the reaction region surrounding the substrate may not be performed in embodiments. In certain instances, ionic species are intended to reach the substrate in order to perform the etch and/or deposition process. In these instances, the ion suppressor may help to control the concentration of ionic species in the reaction region at a level that assists the process. 
     Showerhead  225  in combination with ion suppressor  223  may allow a plasma present in first plasma region  215  to avoid directly exciting gases in substrate processing region  233 , while still allowing excited species to travel from chamber plasma region  215  into substrate processing region  233 . In this way, the chamber may be configured to prevent the plasma from contacting a substrate  255  being etched. This may advantageously protect a variety of intricate structures and films patterned on the substrate, which may be damaged, dislocated, or otherwise warped if directly contacted by a generated plasma. Additionally, when plasma is allowed to contact the substrate or approach the substrate level, the rate at which oxide species etch may increase. Accordingly, if an exposed region of material is oxide, this material may be further protected by maintaining the plasma remotely from the substrate. 
     The processing system may further include a power supply  240  electrically coupled with the processing chamber to provide electric power to the faceplate  217 , ion suppressor  223 , showerhead  225 , and/or pedestal  265  to generate a plasma in the first plasma region  215  or processing region  233 . The power supply may be configured to deliver an adjustable amount of power to the chamber depending on the process performed. Such a configuration may allow for a tunable plasma to be used in the processes being performed. Unlike a remote plasma unit, which is often presented with on or off functionality, a tunable plasma may be configured to deliver a specific amount of power to the plasma region  215 . This in turn may allow development of particular plasma characteristics such that precursors may be dissociated in specific ways to enhance the etching profiles produced by these precursors. 
     A plasma may be ignited either in chamber plasma region  215  above showerhead  225  or substrate processing region  233  below showerhead  225 . In embodiments, the plasma formed in substrate processing region  233  may be a DC biased plasma formed with the pedestal acting as an electrode. Plasma may be present in chamber plasma region  215  to produce the radical precursors from an inflow of, for example, a fluorine-containing precursor or other precursor. An AC voltage typically in the radio frequency (RF) range may be applied between the conductive top portion of the processing chamber, such as faceplate  217 , and showerhead  225  and/or ion suppressor  223  to ignite a plasma in chamber plasma region  215  during deposition. An RF power supply may generate a high RF frequency of 13.56 MHz but may also generate other frequencies alone or in combination with the 13.56 MHz frequency. 
       FIG. 2B  shows a detailed view  253  of the features affecting the processing gas distribution through faceplate  217 . As shown in  FIGS. 2A and 2B , faceplate  217 , cooling plate  203 , and gas inlet assembly  205  intersect to define a gas supply region  258  into which process gases may be delivered from gas inlet  205 . The gases may fill the gas supply region  258  and flow to first plasma region  215  through apertures  259  in faceplate  217 . The apertures  259  may be configured to direct flow in a substantially unidirectional manner such that process gases may flow into processing region  233 , but may be partially or fully prevented from backflow into the gas supply region  258  after traversing the faceplate  217 . 
     The gas distribution assemblies such as showerhead  225  for use in the processing chamber section  200  may be referred to as dual channel showerheads (DCSH) and are additionally detailed in the embodiments described in  FIG. 3 . The dual channel showerhead may provide for etching processes that allow for separation of etchants outside of the processing region  233  to provide limited interaction with chamber components and each other prior to being delivered into the processing region. 
     The showerhead  225  may comprise an upper plate  214  and a lower plate  216 . The plates may be coupled with one another to define a volume  218  between the plates. The coupling of the plates may be so as to provide first fluid channels  219  through the upper and lower plates, and second fluid channels  221  through the lower plate  216 . The formed channels may be configured to provide fluid access from the volume  218  through the lower plate  216  via second fluid channels  221  alone, and the first fluid channels  219  may be fluidly isolated from the volume  218  between the plates and the second fluid channels  221 . The volume  218  may be fluidly accessible through a side of the showerhead  225 . 
       FIG. 3  is a bottom view of a showerhead  325  for use with a processing chamber according to embodiments. Showerhead  325  may correspond with the showerhead  225  shown in  FIG. 2A . Through-holes  365 , which show a view of first fluid channels  219 , may have a plurality of shapes and configurations in order to control and affect the flow of precursors through the showerhead  225 . Small holes  375 , which show a view of second fluid channels  221 , may be distributed substantially evenly over the surface of the showerhead, even amongst the through-holes  365 , and may help to provide more even mixing of the precursors as they exit the showerhead than other configurations. 
       FIG. 4  shows a schematic partial cross-sectional view of an exemplary semiconductor processing chamber  400  according to some embodiments of the present technology.  FIG. 4  may include one or more components discussed above with regard to  FIG. 2 , and may illustrate further details relating to that chamber. The chamber  400  may be used to perform semiconductor processing operations including modification and etching as previously described. Chamber  400  may show a partial view of a processing region of a semiconductor processing system, and may not include all of the components, such as additional lid stack components previously described, which are understood to be incorporated in some embodiments of chamber  400 . 
     As noted,  FIG. 4  may illustrate a portion of a processing chamber  400 . The chamber  400  may include a showerhead  405 , as well as a substrate support assembly  410 . Along with chamber sidewalls  415 , the showerhead  405  and the substrate support  410  may define a substrate processing region  420  in which plasma may be generated. The substrate support may include a top puck  425 , which may include one or more components embedded or disposed within the top puck. The components incorporated within the top puck may not be exposed to processing materials in some embodiments, and may be fully retained within the top puck  425 . Top puck  425  may define a substrate support surface  427 , and may be characterized by a height and length. In some embodiments the top puck may be elliptical, and may be characterized by one or more radial dimensions from a central axis through the top puck. It is to be understood that the top puck may be any geometry, and when radial dimensions are discussed, they may define any length from a central position of the top puck. 
     Top puck  425  may be coupled with a stem  430 , which may include channels as will be discussed below for delivering and receiving electrical and/or fluid lines that may couple with internal components of the top puck  425 . Top puck  425  may include associated channels or components to operate as an electrostatic chuck, a vacuum chuck, or any other type of chucking system. Stem  430  may be coupled with the top puck on a second surface of the top puck opposite the substrate support surface. The top puck  425  may include an electrode  435 , which may be an RF electrode, embedded within the top puck proximate the substrate support surface. Electrode  435  may be electrically coupled with a power source  440 . Power source  440  may be configured to provide energy or voltage to the electrically conductive puck electrode  435 . This may be operated to form a bias plasma of a precursor within the processing region  420  of the semiconductor processing chamber  400 . Ions formed within the processing region may be directed to a substrate seated on the substrate support. This may produce a modification of exposed films by damaging bonding structures, and facilitating removal in subsequent etching operations described previously. 
     Top puck  425  may also define a recessed region  445  within the substrate support surface. Recessed region  445  may be formed at an interior region of the top puck and may be configured to receive a substrate for processing. A substrate may be seated within the recessed region, and contained by an exterior region  447 , which may encompass the substrate. In some embodiments the height of exterior region  447  may be such that a substrate is level with or recessed below a surface height of the substrate support surface at exterior region  447 . A recessed surface may control edge effects during processing, which may improve uniformity of etching across the substrate in some embodiments. In some embodiments, an edge ring may be disposed about a periphery of the top puck, and may at least partially define the recess within which a substrate may be seated. In some embodiments, the surface of the top puck may be substantially planar, and the edge ring may fully define the recess within which the substrate may be seated. 
     In some embodiments the top puck  425  as well as the stem  430  may be insulative or dielectric materials. For example, oxides, nitrides, carbides, and other materials may be used to form the components. Exemplary materials may include ceramics, including aluminum oxide, aluminum nitride, silicon carbide, tungsten carbide, and any other metal or transition metal oxide, nitride, carbide, boride, or titanate, as well as combinations of these materials and other insulative or dielectric materials. Different grades of ceramic materials may be used to provide composites configured to operate at particular temperature ranges, and thus different ceramic grades of similar materials may be used for the top puck and stem in some embodiments. 
     Top puck  425  may also include an embedded heater  450 , contained within the top puck. Heater  450  may include a resistive heater or a fluid heater in embodiments. In some embodiments the electrode  435  may be operated as the heater, but by decoupling these operations, more individual control may be afforded, and extended heater coverage may be provided while limiting the region for plasma formation. Heater  450  may include a polymer heater bonded or coupled with the top puck material, although a conductive element may be embedded within the top puck and configured to receive current, such as AC current to heat the top puck. The current may be delivered through the stem  430  through a similar channel as the RF power discussed above. Heater  450  may include multiple heaters in embodiments, and may include a first heater  452  and a second heater  454 , as well as any greater number of heaters including at least about three heaters, greater than or about four heaters, greater than or about five heaters, greater than or about six heaters, greater than or about seven heaters, greater than or about eight heaters, greater than or about nine heaters, greater than or about ten heaters, or more. Each heater may be associated with a zone of the puck, and thus exemplary pucks may include a similar number or greater number of zones than heaters. 
     First heater  452  may be contained within the top puck at a first location, and second heater  454  may be contained within the top puck at a second location. First heater  452  may be positioned at an interior region of top puck  425 , and may be positioned within or in line with an interior region of the top puck, such as recessed region  445 . Second heater  454  may be positioned in line with the first heater, and may extend about the first heater in embodiments. Second heater  454  may extend across recessed region  445  as well as exterior region  447  and may be annular in shape to extend about first heater  452 . Second heater  454  may be positioned radially outward of the first heater  452  in embodiments. A gap may be defined between the two heaters, or the heaters may extend adjacent one another, or partially overlap one another. The gap may be located between first heater  452  and second heater  454 , and may be an annular gap located radially between the two heaters. 
     The first heater  452  and the second heater  454  may be operated independently of one another, and may be capable of adjusting temperatures across the top puck  425 , as well as a substrate residing on the top puck  425 . Each heater may have a range of operating temperatures to heat the top puck and/or a substrate above or about 100° C., and each heater may be configured to heat above or about 125° C., above or about 150° C., above or about 175° C., above or about 200° C., above or about 250° C., above or about 300° C., above or about 350° C., above or about 400° C., above or about 450° C., above or about 500° C., above or about 550° C., above or about 600° C., above or about 650° C., above or about 700° C., above or about 750° C., above or about 800° C., above or about 850° C., above or about 900° C., above or about 950° C., above or about 1000° C., or higher. The heaters may also be configured to operate in any range encompassed between any two of these stated numbers, or smaller ranges encompassed within any of these ranges. 
     The first heater  452  and the second heater  454  may also be configured to operate within a temperature range of one another, and configured to maintain a specific temperature across the surface of the top puck  425  or a substrate residing on top puck  425 . For example, first heater  452  may be configured to operate to maintain an interior zone, such as recessed region  445  or a portion of this region associated with an interior portion of a substrate, at a first temperature, and second heater  454  may be configured to operate to maintain exterior zone or region  447 , as well as an outer portion of the interior zone, for example a portion of this region associated with an exterior portion of a substrate, at a second temperature similar to or different from the first. Each temperature of either the heater or the zone may be any temperature stated or included above, which may allow the two heaters to operate at a difference of tens or hundreds of degrees. 
     Additionally, the difference between the operating temperature of the two heaters, or the maintained temperature of the interior zone and the exterior zone, may be less than 10° C. in embodiments. The temperature difference between the two heaters or maintained by the two zones may also be less than or about 5° C., less than or about 4° C., less than or about 3° C., less than or about 2° C., less than or about 1° C., less than or about 0.9° C., less than or about 0.8° C., less than or about 0.7° C., less than or about 0.6° C., less than or about 0.5° C., less than or about 0.4° C., less than or about 0.3° C., less than or about 0.2° C., less than or about 0.1° C., or less in embodiments. By allowing such minute temperature differences between the two zones, temperature fluctuations occurring due to precursor flow across a substrate, interference from other chamber components, reactions or operations occurring in one zone but not another based on a fabrication step, and other fluctuation sources may be controlled during operation in some embodiments. This may allow improved uniformity across the zones and across a substrate being processed compared to conventional technology. 
     Top puck  425  may also include a ground shield  460  embedded within the top puck, and which will be described further below. The ground shield may be one of several configurations encompassed by embodiments of the present technology, and which may limit or prevent parasitic plasma formation in regions away from processing region  420 . Ground shield  460  may be coupled with a ground return  465  extending through an interior of the stem. Ground shield  460  may be any number of materials which may be heated to any of the temperatures discussed above, and may include a number of conductive materials including tungsten, molybdenum, platinum, or any other conductive material that may be coupled within the top puck. For example, the conductive material of the ground shield may be selected to match thermal expansion of coupling materials, and the ceramic of the top puck, such as aluminum nitride, or any of the previously stated materials. Exemplary couplings may include a number of brazed or bonded materials connecting the ground shield with the ground return and top puck, such as kovar, molybdenum, tungsten, cobalt, nickel, or any other materials that may operate to reduce forces or strain during heating or processing operations. 
     The heater  450  may be positioned between the electrode  435  and the ground shield  460  in some embodiments, although the ground shield  460  may also be positioned between the electrode  435  and the heater  450  in some embodiments, such as where the illustrated heater and ground shield are positionally switched. When the positions are switched, and the heater resides below the ground shield, the heater may be shielded, which may improve performance. However, such a switch may position the heater further from a substrate which may challenge controlled heating. Additionally, a certain amount of distance may be maintained between the electrode and the ground shield to ensure power extends to the plasma and is not overly siphoned by the ground shield, which may increase puck thickness in this arrangement, and which may further challenge controlled heating. 
     In some embodiments top puck  425  may optionally include a ground impedance electrode  470  embedded within the top puck, and may include a plurality of ground impedance electrodes in some embodiments. Ground impedance electrode  470  may be coupled with a ground source separate from ground shield  460 . The ground impedance electrode  470  may be coupled with a ground return through a variable capacitor, which may allow adjustment to the plasma sheath. In some embodiments the ground impedance electrode may be incorporated about exterior region  447  of the top puck, and may be an annular electrode as illustrated. As previously explained, edge effects may occur in plasma generation due to properties of the plasma sheath on the edges. For example, if the sheath bends around an edge of the substrate, the direction of ion bombardment may be affected, which can direct ions at a less than perpendicular trajectory towards the substrate, and which can affect the uniformity of operations. By adjusting the capacitor on the return of the ground mesh, different potentials may be extended on the impedance electrode, which may allow control of the sheath potentials at the edges, and which may improve uniformity of operations. 
       FIG. 5  shows a schematic partial cross-sectional view of an exemplary substrate support assembly  500  according to embodiments of the present technology. Substrate support assembly  500  may be similar to substrate support or pedestal  265  discussed previously, and may include some or all features discussed above with that structure. Substrate support assembly  500  may also be similar to substrate support assembly  410 , and may include some or all of the components or characteristics as described above. As illustrated, the substrate support assembly  500  includes a top puck  505  and a stem  510 . As previously noted, both top puck  505  and stem  510  may be or include a ceramic or dielectric material. 
     Top puck  505  may define a substrate support surface  506 , and may include an interior region  507  and an exterior region  509 . Interior region  507  may be recessed from exterior region  509 , and may be configured to support a substrate within the recess as previously described. Within top puck  505  may be embedded one or more components. Electrode  515 , which may be an RF electrode, may be positioned proximate or adjacent substrate support surface  506 . In some embodiments, electrode  515  may not extend radially outward beyond interior region  507 , although in some embodiments the electrode may extend at least partially into the exterior region  509 . Electrode  515  may be coupled with RF source  520 , which may extend through stem  510 . For example, an RF rod  521  may extend through an internal channel  522  and connect with electrode  515 , which may be used to produce a bias plasma in a processing region above the substrate support surface  506 . Top puck  505  may also include a heater  525 , which may include a first internal heater  527  and a second external heater  529  as previously described, and which may heat the top puck and/or a substrate as discussed above. It is to be understood that any number of heaters may be included as previously described, and may include at least about 2, at least about 4, at least about 6, at least about 8, at least about 10, or more heaters and associated zones in some embodiments. 
     Top puck  505  may also include a ground shield  530  embedded within the top puck as previously described. Ground shield  530  may be characterized by a single piece or a multi-piece design in some embodiments. Ground shield  530  may include or be characterized by an inner region  532  and an outer region  534 . Inner region  532  may extend across the top puck  505 , and may extend radially from a central axis through the top puck. Inner region  532  may extend beyond the radial edge of electrode  515 , and may extend into the exterior region  509  of top puck  505  in some embodiments. Outer region  534  may be disposed radially outward from the inner region  532 , and may extend vertically through the height of the top puck  505 . For example, outer region  534  may extend substantially or essentially perpendicular to inner region  532  in some embodiments as illustrated, and may extend partially or substantially along the height of the top puck. Accordingly, ground shield  530  may resemble a dish profile having raised exterior surfaces about a centrally recessed region. The ground shield  530  may be a mesh, coil, solid base, or any number of other form factors within the top puck. 
     A central aperture may be formed in inner region  532 , which may allow electrode RF rod  521  to extend through the ground shield without electrically contacting the shield. Ground shield  530  may be coupled with ground  535  through a ground return  537  extending through internal channel  522  through the stem  510 . For example, ground return  537  may extend coaxially with RF rod  521  through internal channel  522 , and remain electrically isolated from RF rod  521 . In some embodiments an insulator, such as a cylindrical insulator, may be positioned between the RF rod  521  and the ground return  537 . Because ground shield  530  may be electrically coupled with ground, such a configuration may maintain the electrode and ground shield electrically isolated from one another. 
       FIG. 6  shows a schematic partial cross-sectional view of an exemplary substrate support assembly  600  according to some embodiments of the present technology. Substrate support assembly  600  may be similar to substrate support or pedestal  265  discussed previously, and may include some or all features discussed above with that structure. Substrate support assembly  600  may also be similar to substrate support assembly  410 , as well as substrate support assembly  500 , and may include some or all of the components or characteristics as described above. Substrate support assembly  600  may include an additional embedded ground shield configuration encompassed by the present technology. As illustrated, the substrate support assembly  600  includes a top puck  605  and a stem  610 . As previously noted, both top puck  605  and stem  610  may be or include a ceramic or dielectric material. 
     Top puck  605  may define a substrate support surface  606 , and may include an interior region  607  and an exterior region  609 . Interior region  607  may be recessed from exterior region  609 , and may be configured to support a substrate within the recess as previously described. Within top puck  605  may be embedded one or more components. Electrode  615 , which may be an RF electrode, may be positioned proximate or adjacent substrate support surface  606 . In some embodiments, electrode  615  may not extend radially outward beyond interior region  607 , although in some embodiments the electrode may extend at least partially into the exterior region  609 . Electrode  615  may be coupled with RF source  620 , which may extend through stem  610 . For example, an RF rod  621  may extend through an internal channel  622  and connect with electrode  615 , which may be used to produce a bias plasma in a processing region above the substrate support surface  606 . Top puck  605  may also include a heater  625 , which may include a first internal heater  627  and a second external heater  629  as previously described, and which may heat the top puck and/or a substrate as discussed above. 
     Top puck  605  may also include a ground shield  630  embedded within the top puck as previously described. Ground shield  630  may be characterized by a single piece or a multi-piece design in some embodiments. Ground shield  630  may include or be characterized by an inner region  632  and an outer region  634 . Inner region  632  may extend across the top puck  605 , and may extend radially from a central axis through the top puck forming a base of the ground shield. Inner region  632  may extend beyond the radial edge of electrode  615 , and may extend into the exterior region  609  of top puck  605  in some embodiments. Outer region  634  may be disposed radially outward from the inner region  632 , and may extend vertically through the height of the top puck  605 . For example, outer region  634  may extend substantially or essentially perpendicular to inner region  632  in some embodiments as illustrated, and may extend partially or substantially along the height of the top puck. Outer region  634  may differ from outer region  534  described above. Whereas the ground shield of  FIG. 5  may resemble a dish or platter profile, ground shield  630  may have connected components. 
     Outer region  634  of ground shield  630  may include one or more annular members or rings  640  distributed vertically through the height of top puck  605 . For example, ground shield  630  may include at least one intermediate ring  640  positioned vertically between the ground shield base and the electrode  615 . Ground shield  630  may also include a number of rings vertically disposed or offset from one another through the height of the top puck, and may include at least 2 rings, greater than or about 3 rings, greater than or about 4 rings, greater than or about 6 rings, greater than or about 8 rings, greater than or about 10 rings, greater than or about 15 rings, or more depending on the height of the top puck and the spacing between the rings. For example, the spacing between the rings may impact the amount of shielding of emissions. 
     The frequency of the RF delivery may also impact the amount of spacing between rings. For example, where plasma may be generated at lower frequency operation, such as around 13.56 MHz or lower, more space may be accommodated between the rings, whereas at higher frequency operation, such as 60 MHZ, closer spacing may be utilized to limit emissions through the shield. Consequently, when operating conditions are understood for a chamber, the spacing between rings and/or the number of rings may be used to accommodate the application. Thus, as frequency increases in an application, the number of rings may be increased and/or the spacing between rings may be decreased. In some embodiments the spacing between any two adjacent rings and/or the base may be less than or about 1 cm, and may be less than or about 9 mm, less than or about 8 mm, less than or about 7 mm, less than or about 6 mm, less than or about 5 mm, less than or about 4 mm, less than or about 3 mm, less than or about 2 mm, less than or about 1 mm, or less. 
     The one or more rings  640  may be electrically coupled with the base via one or more vertical posts  645 . For example, at least one post may electrically couple the ring or rings with the base to provide a ground path. In some embodiments the top puck may include at least 2 vertical posts, and may include greater than or about 3 posts, greater than or about 4 posts, greater than or about 6 posts, greater than or about 8 posts, greater than or about 10 posts, greater than or about 12 posts, greater than or about 14 posts, greater than or about 16 posts, greater than or about 18 posts, greater than or about 20 posts, or more posts in some embodiments. The posts may be distributed equidistantly about the top puck, or may be positioned in multiple regions about the top puck, as well as any other distribution. Additionally, when multiple rings are included, the rings may be sized similarly or differently in some embodiments. For example, rings may have different annular thicknesses or lengths from other rings, which may further accommodate different plasma frequencies, where increased surface area or individual rings may allow increased spacing between rings, or a reduction in the number of rings to provide a particular effect. 
     Similar to substrate support assembly  500 , a central aperture or throughway may be formed in inner region  632  of the ground shield, which may allow electrode RF rod  621  to extend through the ground shield without electrically contacting the shield. Ground shield  630  may be coupled with ground  635  through a ground return  637  extending through internal channel  622  through the stem  610 . For example, ground return  637  may extend coaxially with RF rod  621  through internal channel  622 , and remain electrically isolated from RF rod  621 . Because ground shield  630  may be electrically coupled with ground, such a configuration may maintain the electrode and ground shield electrically isolated from one another. By utilizing embedded ground shields according to some embodiments of the present technology, processing may be performed at higher temperatures without the risk of chemical corrosion, erosion, or melting of constituent shield components. 
     In the preceding description, for the purposes of explanation, numerous details have been set forth in order to provide an understanding of various embodiments of the present technology. It will be apparent to one skilled in the art, however, that certain embodiments may be practiced without some of these details, or with additional details. 
     Having disclosed several embodiments, it will be recognized by those of skill in the art that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the embodiments. Additionally, a number of well-known processes and elements have not been described in order to avoid unnecessarily obscuring the present technology. Accordingly, the above description should not be taken as limiting the scope of the technology. 
     Where a range of values is provided, it is understood that each intervening value, to the smallest fraction of the unit of the lower limit, unless the context clearly dictates otherwise, between the upper and lower limits of that range is also specifically disclosed. Any narrower range between any stated values or unstated intervening values in a stated range and any other stated or intervening value in that stated range is encompassed. The upper and lower limits of those smaller ranges may independently be included or excluded in the range, and each range where either, neither, or both limits are included in the smaller ranges is also encompassed within the technology, subject to any specifically excluded limit in the stated range. Where the stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included. 
     As used herein and in the appended claims, the singular forms “a”, “an”, and “the” include plural references unless the context clearly dictates otherwise. Thus, for example, reference to “a ring” includes a plurality of such rings, and reference to “the precursor” includes reference to one or more precursors and equivalents thereof known to those skilled in the art, and so forth. 
     Also, the words “comprise(s)”, “comprising”, “contain(s)”, “containing”, “include(s)”, and “including”, when used in this specification and in the following claims, are intended to specify the presence of stated features, integers, components, or operations, but they do not preclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.