PATENT ABSTRACT
Method for controlling a memory in a digital system, including the steps of (a) dividing the memory into a plurality of fixed sized memory blocks, (b) defining at least one of the memory blocks as a compression/decompression region, (c) assigning compression priorities to rest of the memory blocks except the memory blocks defined as the compression/decompression region, and (d) making the memory blocks to deal with an external data received according to an external command, and carrying out compression/decompression of data required in the dealing with the external data at the compression/decompression region according to the compression priorities.

PATENT DESCRIPTION
[0001]    This application claims the benefit of the Korean Application No. P2001-10321 filed on Feb. 28, 2001, which is hereby incorporated by reference. 
     
    
     
       BACKGROUND OF THE INVENTION  
         [0002]    1. Field of the Invention  
           [0003]    The present invention relates to a method for controlling a memory in a digital system.  
           [0004]    2. Background of the Related Art  
           [0005]    In embedded systems developed recently, there are ones that require processing and managing of a large amount of data. For an example, the digital system, such as a digital TV receiver, employs a web data used in a computer environment, or a data received from, and required for broadcasting, or an additional data. Recently, a broadcasting for transmission of data is under preparation.  
           [0006]    A current data base system developed and used for more convenient and effective processing of a large amount of data uses disks for recording data, and uses techniques of transaction management, query handling, synchronism control, indexing, hashing, and the like.  
           [0007]    Moreover, though a main memory resident type data base system that is made possible by development of a memory size also has a main data base on the memory, in most of the cases, the main memory resident type data base system is based on disks which can back up the main data base. The system having such a disk makes no assumption of a limitation of a maximum storage capacity of data.  
           [0008]    However, the case is limited, in which the disk is based in the embedded system actually, and, though memory technologies are developing currently, a system only having the memory is required to assume very limited use of the memory in comparison to a disk, to require a system that manage data in the system only having a limited memory.  
           [0009]    Moreover, though it does not matters for a system having an amount of data fixed in advance required to be stored in the system, there can be a storage demand greater than a memory size capable to store in a system the data is kept added, erased, and queried because a maximum required storage capacity is not fixed.  
         SUMMARY OF THE INVENTION  
         [0010]    Accordingly, the present invention is directed to a method for controlling a memory in a digital system that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.  
           [0011]    An object of the present invention is to provide a method for controlling a memory in a digital system having a limited size of memory, which can minimized a system performance deterioration, and facilitates storage of data greater than the limited capacity of the memory,  
           [0012]    Another object of the present invention is to provide a method for controlling a memory in a digital system, which has advantages of the present data base system, such as avoidance of duplication of data, and an easy access to a data, and the like.  
           [0013]    Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.  
           [0014]    To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the method for controlling a memory in a digital system includes the steps of (a) dividing the memory into a plurality of fixed sized memory blocks, (b) defining at least one of the memory blocks as a region for compression/decompression, (c) assigning compression priorities to rest of the memory blocks except the memory blocks defined as region for compression/decompression, and (d) making the memory blocks to deal with an external data received according to an external command, and carrying out compression/decompression of data required in the dealing with the external data according to the compression priorities.  
           [0015]    It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0016]    The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention:  
         [0017]    In the drawings:  
         [0018]    [0018]FIG. 1 illustrates a block diagram showing a system of a digital TV receiver in accordance with a preferred embodiment of the present invention;  
         [0019]    [0019]FIG. 2 illustrates a flow chart showing the steps of a process for controlling a memory in a digital system in accordance with a preferred embodiment of the present invention;  
         [0020]    [0020]FIG. 3 illustrates a flow chart showing the steps of a process for inserting a data in a memory in a digital system in accordance with a preferred embodiment of the present invention;  
         [0021]    [0021]FIG. 4 illustrates a flow chart showing the steps of a process for erasing a data from a memory in a digital system in accordance with a preferred embodiment of the present invention;  
         [0022]    [0022]FIG. 5 illustrates a flow chart showing the steps of a process for up-dating a data stored in a memory in a digital system in accordance with a preferred embodiment of the present invention; and,  
         [0023]    [0023]FIG. 6 illustrates a flow chart showing the steps of a process for reading a data stored in a memory in a digital system in accordance with a preferred embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0024]    Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. In this embodiment, a digital TV receiver is taken into account among the digital systems. FIG. 1 illustrates a block diagram showing a system of a digital TV receiver in accordance with a preferred embodiment of the present invention.  
         [0025]    Referring to FIG. 1, the digital TV receiver includes a tuner  10  for receiving a digital broadcasting signal, a TP (transport) signal analyzer  20  for analyzing a TP signal from the digital broadcasting signal, to detect an audio signal and a video signal, a separator  30  for separating, and respectively decoding the audio signal and the video signal detected at the TP signal analyzer  20 , a decoder  40  for decoding the audio signal and the video signal decoded at the separator  30 , and a microcomputer  50  for controlling parts of the TV receivers.  
         [0026]    The microcomputer  50  divides channel data, program data, and information data received through the tuner  10  into fixed size blocks, stores in the memory  90 , and manages the stored data blocks.  
         [0027]    The digital TV receiver also includes an OSD (On Screen Display) processor  70  for providing an OSD text, and a display  80  for selectively superimposing the audio signal and the video signal decoded at the decoder  40  with the OSD text from the OSD processor  70 , and displaying on a screen.  
         [0028]    The microcomputer  50  in the digital TV receiver includes a storage managing module  51  for storing all the data from the tuner  10  in forms of data blocks by indexing or hashing, and carrying out a function to find a desired block from the stored data blocks quickly, a request processing module  52  for facilitating storage of a desired data in the memory  90 , or erasing or finding the desired data from the memory, a synchronism control module  53  for processing various requests on the sane time, and a memory managing module  54  for managing the memory  90  with the memory  90  divided into same sized blocks.  
         [0029]    The operation of the digital TV receiver of the present invention will be explained with reference to the attached drawings in detail. FIG. 2 illustrates a flow char showing the steps of a process for controlling a memory in a digital TV receiver in accordance with a preferred embodiment of the present invention,  
         [0030]    Referring to FIG. 2, the memory managing module  54  in the microcomputer  50  divides the memory  90 , to be used as a storage space, into fixed size blocks. Then, memory managing module  54  combines at least one of the memory blocks and designates as a compression/decompression region for temporary storage of a compressed data, or compressing a data.  
         [0031]    The memory managing module  54  records a number of access times to the data in each memory block, and measures an access frequency of the memory block based on the number of access times. The memory managing module  54  sets up priorities of compression of the memory blocks based on the access frequency for compressing data when a capacity of the memory  90  lacks. The lower the frequency of access, the higher the compression priority, Then, the microcomputer processes the received data.  
         [0032]    The data processing includes data insertion, data erasure, data up-dating, and data read. The steps of the data processing will be explained with reference to the attached drawings. FIG. 3 illustrates a flow chart showing the steps of a process for inserting a data in a memory in a digital system in accordance with a preferred embodiment of the present invention.  
         [0033]    Referring to FIG. 3, as explained, after the microcomputer  50  divides the memory  90  into a plurality of fixed size memory blocks according to the process shown in FIG. 2, the microcomputer  50  designates at least one of the memory blocks as the compression/decompression region.  
         [0034]    Then, the microcomputer  50  assigns the priorities of compression to rest of fixed size memory blocks except the compression/decompression region. It is determined if the memory  90  has an empty memory space for the data to be inserted.  
         [0035]    As a result of the comparison, it is known that there is no space in the memory  90  for receiving a data to be inserted therein even after all the memory blocks are compressed, the microcomputer  50  proceeds to an error processing state. Opposite to this, if there is an empty memory block or blocks as large as the data to be inserted, the data is inserted in the empty memory block or blocks of the memory  90 .  
         [0036]    Then, upon completion of insertion of the data, the microcomputer  50  compares a number of the empty memory blocks remained presently to a preset threshold value (a number of minimum memory blocks required). As a result of the comparison, if the preset threshold value is smaller than the number of empty memory blocks, the process for inserting a data is finished.  
         [0037]    Opposite to this, if the preset threshold value is greater than the number of empty memory blocks, the microcomputer  50  selects a memory block to be compressed presently from remained memory blocks according o the priorities of compression.  
         [0038]    The step for selecting the memory block to be compressed is started with reference to the compression priorities from a moment when use of a last memory block available for the data insertion is started, or the preset threshold value is exceeded.  
         [0039]    Then, the microcomputer  50  transfers the data in the memory block selected for the compression to the compression/decompression region, and compresses the data. The data in the selected memory block under compression can be accessed normally.  
         [0040]    The data in the compressed memory block is stored at other designated location of the memory  90  provided for the compressed memory block, and the compressed memory block is defined as an empty memory block by the microcomputer  50 .  
         [0041]    References representing the data in the compressed memory block are changed to a first starting address of the compressed memory block. Accordingly, when it is intended to make an indirect access to the data in the compressed memory block, the microcomputer  50  is required to determine the memory block under access presently is a compressed memory block.  
         [0042]    If it is determined that the memory block under access presently is a compressed memory block, the microcomputer  50  decompresses the compressed memory block in the compression/decompression region, and reads the decompressed memory block.  
         [0043]    [0043]FIG. 4 illustrates a flow chart showing the steps of a process for erasing a data from a memory in a digital TV receiver in accordance with a preferred embodiment of the present invention.  
         [0044]    Referring to FIG. 4, the microcomputer  50  divides the memory  90  into fixed sized memory blocks according to the process in FIG. 2. The microcomputer  50  defines at least one of the memory blocks as a compression/decompression region. Then, the microcomputer  50  assigns to a memory block each having a compression priority set up according to a frequency of access.  
         [0045]    The microcomputer  50  determines the data intended to erase is a data stored in the compression/decompression region. As a result of the determination, if it is determined that the data intended to erase is a data, not in the compression/decompression region, but in the memory blocks, the data is erased.  
         [0046]    Opposite to this, as a result of the determination, if it is determined that the data intended to erase is a data in the compression/decompression region, the microcomputer  50  calculates a size of memory occupied by the data to be erased in respective data blocks in the compression/decompression region.  
         [0047]    That is, if the occupied memory size is large, the microcomputer  50  determines that the memory in the block having the data erased therefrom has most of the memory left as a room space, and if the occupied memory size is small, the microcomputer  50  determines that the memory in the block having the data erased therefrom has many other data still stored in the memory block even if the data to be erased is erased.  
         [0048]    Therefore, the microcomputer  50  compares the occupied memory size in the memory block in the compression/decompression region and the threshold occupied memory size.  
         [0049]    As a result of the comparison, the occupied memory size calculated for each of the memory blocks is smaller than the threshold occupied memory size, the microcomputer  50  erases the compressed data and finishes the erasing process. Opposite to this, if the occupied memory size for each of the memory blocks is larger than the threshold occupied memory size, the microcomputer  50  decompresses the data.  
         [0050]    In this instance, referring to FIG. 4, before decompression of the compressed memory, i.e., compressed memory block, the microcomputer  50  compares a number of empty memory blocks in the memory  90  to the threshold value of empty memory blocks. Only when the number of empty memory blocks are greater than the threshold value of empty memory blocks, i.e., only when room of the memory is adequate, the microcomputer  50  decompresses the compressed data. In this instance, as explained, the data in the memory block can be accessed normally until the erasing process is finished completely.  
         [0051]    When the memory block is decompressed other memory block can also be decompressed by the microcomputer  50 .  
         [0052]    [0052]FIG. 5 illustrates a flow chart showing the steps of a process for up-dating a data stored in a memory in a digital TV receiver in accordance with a preferred embodiment of the present invention.  
         [0053]    Referring to FIG. 5, the microcomputer  50  divides the memory  90  into fixed sized memory blocks according to the process in FIG. 2, The microcomputer  50  defines at least one of the memory blocks as a compression/decompression region. Then, the microcomputer  50  assigns memory blocks each having a compression priority set up according to a frequency of access.  
         [0054]    The microcomputer  50  determines whether the data to be updated is stored in the compression/decompression region, or in the memory block. As a result of the determination, if it is determined that the data to be updated is stored in the memory blocks, the data is updated.  
         [0055]    As a result of the determination, if it is determined that the data to be updated is stored in the compression/decompression region, the microcomputer  50  determines a type of the data to be updated is of a variable size type or not.  
         [0056]    As a result of the determination, if the data to be updated is not the variable size type, the microcomputer  50  decompresses the compressed memory block temporarily, and updates the data to be updated. That is, when a fixed size data, with a fixed total size, is updated, the microcomputer  50  decompresses the compressed memory block, updates the data, and compresses the updated data.  
         [0057]    On the other hand, as a result of the determination, if the data to be updated is the variable size type, the microcomputer  50  assigns a new memory block and updates the data to be updated. The microcomputer  50  erases the existing data. The updating process has the inserting process explained in FIG. 3 and the erasing process explained in FIG. 4.  
         [0058]    [0058]FIG. 6 illustrates a flow chart showing the steps of a process for reading a data stored in a memory in a digital TV receiver in accordance with a preferred embodiment of the present invention.  
         [0059]    Referring to FIG. 6, the microcomputer  50  divides the memory  90  into fixed sized memory blocks according to the process in FIG. 2. The microcomputer  50  defines at least one of the memory blocks as a compression/decompression region. Then, the microcomputer  50  assigns to memory blocks each having a compression priority set up according to a frequency of access.  
         [0060]    The microcomputer  50  determines whether the data to be read is stored in the compression/decompression region. As a result of the determination, if it is determined that the data to be read is stored in one of the memory blocks, the microcomputer  50  reads the data.  
         [0061]    On the other hand, as a result of the determination, if the data to be read is stored in the compression/decompression region, the microcomputer decompresses the memory block having the data to be read stored therein temporarily and reads the data.  
         [0062]    As explained, the microcomputer  50  is programmed such that an access to the memory block is possible when the memory block is compressed/decompressed during the time the microcomputer  50  processes the data in the memory block, such as insertion, erasure, updating, and reading.  
         [0063]    In this instance, it is required that access to a data stored in a memory block is possible during the data is compressed/decompressed. Therefore, it is required that a final address of a compressed memory is fixed after compression of the memory block is finished completely, and the memory block under compression is valid until all the references indirectly indicating the data in the compressed memory block are revised.  
         [0064]    Opposite to this, it is also required that a compressed memory block is valid until the compressed memory block is decompressed into a general memory block, and all the references indicating the data in the general memory block is restored into original values before compression.  
         [0065]    An has been explained, the method for controlling a memory in a digital TV receiver of the present invention has the following advantages.  
         [0066]    First, the division of a data into a plurality of storage units in managing the data, and the partial compression of the data permits reduce a system performance deterioration and storage of more data when it is required to store collected data in a limited memory size.  
         [0067]    Second, the system does not come into an error state, but remains operative even if an allocated memory capacity lacks due to continuous addition of data and the like.  
         [0068]    Third, the division of a memory into fixed sized memory blocks and compression of a part of the memory blocks permits to reduce an overall data processing time period required to process entire system.  
         [0069]    It will be apparent to those skilled in the art that various modifications and variations can be made in the method for controlling a memory in a digital system of the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.