PATENT ABSTRACT
An alternating current (AC) switching circuit comprises a first Field Effect Transistor (FET) having a first source, a first gate and a first drain and a second FET having a second drain, a second source coupled to the first source and a second gate coupled to the first gate. The AC switching circuit also comprises a first diode coupled to the first source and first drain and a second diode coupled to the second source and second drain.

PATENT DESCRIPTION
BACKGROUND  
       [0001]     Alternating Current (AC) power control provides a unique set of challenges to those working in the field. There are few solid state electrical devices, such as thyristors and triacs, that will allow AC power to be controlled directly. For both thyristor and triacs the switching times are comparatively long. These long switching times typically limit these devices to low frequency applications, typically AC frequencies of 50-60 Hz. Additionally, full wave rectification to convert AC to direct current (DC), to facilitate work with DC, can result in, among other things, undesirable current harmonics and high frequency conducted emissions that, if not filtered, result in unacceptable noise going back to the power company on the AC power supply lines. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0002]     Embodiments of the present invention will be described referencing the accompanying drawings in which like references denote similar elements, and in which:  
         [0003]      FIG. 1  illustrates an AC MOSFET switch, including anti-parallel diodes, in accordance with one embodiment.  
         [0004]      FIG. 2  illustrates a more detailed look at an AC MOSFET switch, including intrinsic parasitic diodes of the MOSFETs, in accordance with one embodiment.  
         [0005]      FIG. 3  illustrates current that is delivered to a load when one embodiment of the AC MOSFET switch is utilized to control current.  
         [0006]      FIGS. 4A-4C  illustrate a power filter and its effects on the current drawn by a load driven by an AC MOSFET switch, in accordance with one embodiment.  
         [0007]      FIG. 5  illustrates an AC MOSFET switch design including a snubbing device, in accordance with one embodiment.  
         [0008]      FIG. 6  illustrates a single IC device containing two NMOS type MOSFET devices of an AC MOSFET switch, in accordance with one embodiment.  
     
    
     DETAILED DESCRIPTION OF EMBODIMENTS  
       [0009]     Although specific embodiments will be illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a wide variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the embodiments discussed herein. Therefore, it is manifestly intended that this invention be limited only by the claims.  
         [0010]     The following discussion is presented in the context of MOSFET devices. It is understood that the principles described herein may apply to other transistor devices.  
         [0011]     Refer now to  FIG. 1  wherein an AC MOSFET switch  110 , including anti-parallel diodes  112   114 , is illustrated, in accordance with one embodiment. For the MOSFETs  142   144  illustrated, the sources of the MOSFET devices are coupled at junction  102 . In one embodiment, MOSFETs  142   144  are power MOSFETs. In addition, the gates are electrically coupled at junction  104 . These couplings are to facilitate the operation of the two MOSFETs  142   144  as a single AC MOSFET switch. Thus, by applying a gate to source voltage, V GS , greater than the threshold voltage, V TH , to the two MOSFETs  142   144 , both MOSFETs conduct current  120 .  
         [0012]     Also illustrated in  FIG. 1  are two diodes  112   114 . These diodes  112   114 , which may be parasitic or explicit, are anti-parallel to their respective MOSFETs. As described in further detail below, these diodes  112   114  may be utilized to bypass the intrinsic anti-parallel diodes of the MOSFETs. Thus, as illustrated, the anodes of the diodes  112   114  are coupled to the sources of the diodes&#39; respective MOSFET and the cathodes are coupled to the respective drains.  
         [0013]      FIG. 1  also illustrates the AC MOSFET switch in use in controlling power to a load. As previously mentioned, AC MOSFET switch  110  comprises two MOSFETs  142   144 . AC MOSFET switch  110  controls current  120  through load  130 . This may be accomplished by switch control circuit  140  which applies the gate-source voltages for the two MOSFETs  142   144  forming the AC MOSFET switch  110 . In the embodiment illustrated, charge pump biasing circuit  150  supplies current to switch control circuit  140  from line (L)  172  and neutral (N)  174  connections of the AC power source.  
         [0014]      FIG. 2  illustrates a more detailed look at an AC MOSFET switch, utilizing P type MOSFETs, including intrinsic parasitic diodes  232   234  of the MOSFETs  242   244 , in accordance with one embodiment. Also illustrated are antiparallel diodes  212   214  which may be utilized to bypass the intrinsic anti-parallel diodes  232   234  of the MOSFETs. Note that the sources of both MOSFETs  242   244  are coupled  204  to each other. In addition, the gates of both MOSFETs  242   244  are coupled  206  to each other. When a voltage, V SG    280  less than a threshold voltage V TH  is applied, the MOSFETs  242   244  will be “turned-off” and the internal reverse biased PN junctions will substantially prevent current from flowing through the MOSFETs.  
         [0015]     When a voltage, V SG    280  greater than a threshold voltage V TH  is applied to the common sources and gates of MOSFETs  242   244  are turned on to facilitate the flow of current through the AC MOSFET switch. Note that current will flow in the reverse direction in MOSFET  242  or  244  depending on the polarity of the AC voltage source. That is, in the reverse direction as is normally used in DC circuits, that is drain to source in an N type MOSFET or source to drain in a P type MOSFET. The reverse current flow causes no problem as the MOSFET transistor is truly a bidirectional device, that is, current may flow from drain to source or source to drain once the proper gate voltage is applied and the conductive channel forms. Normally, during reverse polarity across the source/drain of a MOSFET, an internal PN junction, represented by parasitic diodes  234  and  232  in  FIG. 2 , will eventually turn on allowing current  271  to flow. Note that parasitic diodes  234  and  232  are not separate from the MOSFET  244  and  242 ; e.g. parasitic diode  234  is a PN junction that is part of the structure of transistor  244 . Once the gate voltage is removed the parasitic diode conducts during reverse current flow which makes a single MOSFET unsuitable for the control of alternating current  271   273 . The common source configuration of MOSFET  242  and  244  of  FIG. 2  results in one of the parasitic diodes in a reverse biased state which substantially prevents current flow through the parasitic diodes  232   234  when the MOSFETs are in either the conducting or nonconducting states.  
         [0016]     Referring again to  FIG. 1 , switch control circuit  140  and charge pump circuitry  150  are utilized to provide control for the application of the voltage to the gates of MOSFETs  142   144 . In the embodiment illustrated, switch control circuit  140  may be an externally controlled pulse width modulation circuit. In the embodiment illustrated, charge pump  150  utilizes the AC line to power the pulse width modulation circuitry. In addition, the frequency of the modulated control signal may be fixed, whereas the duty cycle of the modulation, as described below, is utilized to determine the power to be delivered to the load  130 . In an alternative embodiment the gate and source of the AC MOSFET may be driven by a circuit which has a minimum conduction time combined with a variable frequency to determine the power to be delivered to the load  130 .  
         [0017]      FIG. 3  illustrates current that is delivered to a load when one embodiment of the AC MOSFET switch is utilized to control current. For example, as discussed above with respect to  FIG. 1 , the switch control circuit  140  may be a pulse width modulation circuit. In such a case, the power delivered to the load  130  can be controlled by changing the duty cycle of the pulse control signal.  FIG. 3  illustrates an example input voltage  310  from the line and neutral. Illustrated also, in the dark shaded regions  320 , are the periods where the AC MOSFET switch  110  is switched on to allow current to flow through the load  130 . The voltage  310  and current  320  are normalized so that they share a common envelope. Thus, in the illustrated embodiment, a 50% duty cycle signal driving the gate to source voltage will result in an effective power of one half the total power available being delivered the load. By utilizing a pulse width modulation technique, the level of power delivered to the load can be adjusted by controlling the width of the pulses generated by the pulse width modulation of the switch control circuit. The equation governing the power transfer to the load is:  
       Pavg   =         Vrms   2     R     ·     d   .             
 Where V rms  is the Root Mean Square (rms) voltage of the AC power source, R is the resistance of the load and d is the duty ratio of the pulse width modulator driving the AC MOSFET. By inspection of this equation, the power transferred to the load is a linear function of the duty ratio of the pulse width modulator. The load is at zero power when the duty ratio is zero and at maximum power when the duty ratio is 1. 
 
         [0018]     In an alternative embodiment in which the gate and source of the AC MOSFET switch are driven by a circuit which has a minimum conduction time combined with a Variable Frequency Oscillator (VFO) the power delivered to the load  130  is determined by 
 
 P=V   2   ÷R×f×T   min  
 
 Where V is the rms voltage of the AC power source, R is the resistance of the load, f the frequency of the VFO driving the AC MOSFET and T min  the minimum conduction time allowed. By inspection, this equation shows that the power transferred to the load is a linear function of the frequency of the VFO. The load is at zero power when the VFO frequency is 0 and at maximum power when the period of the frequency of the VFO is equal to or less than the minimum allowed conduction time T min . 
 
         [0019]     The above examples operate to facilitate the switching of the alternating current at relatively higher frequencies. There are advantages to switching the current at relatively higher frequencies. Switching frequencies out of the audio range (e.g. greater than 20 KHz) can be utilized to reduce human factor issues associated with audible switching noise. Another advantage of operation at higher frequencies may be a reduction in switching and conduction losses. Implementations operating at significantly lower frequencies spend more time in the linear region of operation. Spending more time in the linear region during switching may dissipate significant amounts of additional energy in the form of heat as relatively slow transitions are made through this linear region. In addition, because of the relatively low voltage drops associated with the disclosed switching of alternating current, less energy is dissipated from the product of the current flowing across the voltage drops of the devices. In addition, the AC MOSFET switching circuit above does not introduce significant harmonics into the alternating current. This can reduce costs associated with filtering these harmonics to meet international regulatory requirements.  
         [0020]      FIG. 4A  illustrates input circuitry for an AC MOSFET switch, in accordance with one embodiment. Illustrated is a filter stage  410  to provides a high frequency short to ground to any transients or conducted emissions that occur across the inputs. Illustrated also is a filtering stage  420  to provide smoothing of the alternating current drawn by the load  430 . The effect of this filter is to smooth the harmonic rich current drawn by the pulse width modulated, or VFO driven load, such that the power source experiences a continuous current flow with virtually no harmonic current content.  
         [0021]     In the embodiment, switch control circuit  450  switches the current  472  delivered to the load as illustrated in  FIG. 4B . During times of switching, assuming a purely resistive load, the current  472  through the load  430  will follow the line voltage provided, that is, it will be in phase. When the switch is turned off, the current delivered to the load will drop to zero  474 . Thus, as can be seen there will be dramatic shifts or steps in the current drawn by the load as the switch turns on and off. These step changes in the current represent unwanted current harmonics placed on the AC power source which may exceed regulatory limits. To solve this problem, filtering stage  420  is added to the circuit.  FIG. 4C  illustrates the current drawn from the AC power source at the line and neutral connections by the switched load as a result of the filtering stage  420 . When the switch is turned off, the filtering stage  420  smoothes current  476  drawn by the load  430 . In the case in which the switch is driven by a pulse width modulator, the total instantaneous current drawn by the circuit may be the sum of the fundamental current and the instantaneous value of the ripple current. This instantaneous current may be expressed as  
           i   L     ⁡     (   t   )       =           V   ·   d     R     ·     sin   ⁡     (     2   ·   π   ·     f   o     ·   t     )         +         π   2     4     ·     (     1   -   d     )     ·       (       f   c       f   s       )     2     ·       V   ·   d     R     ·     sin   ⁡     (     2   ·   π   ·     f   o     ·   t     )       ·       sin   ⁡     (     2   ·   π   ·     f   s     ·   t     )       .             
 
 where f C  is the resonant frequency of filtering stage  420 , f S  is the switch frequency of the pulse width modulator, f O  is the frequency of the AC power source, d is the duty cycle of the pulse width modulator, V is the peak source voltage, and R is the load resistance  430 . Under direct examination of this equation it is noted that, as the switch frequency of the pulse width modulator is increased, the resultant alternating current waveform at the Line and Neutral connections smoothes dramatically. 
 
         [0022]      FIG. 5  illustrates an AC MOSFET switch design including a snubbing device  580 , in accordance with one embodiment. Snubbing device  580  is utilized for dissipating energy stored in the circuit. Stored energy in a circuit exists due to various factors associated with the circuit such as: parasitic inductance associated with the wiring providing the AC current, parasitic inductance in the components leads, and inductance in the load itself. Snubber designs are designed to capture a portion of the stored energy in a circuit, when the circuit is switched off. These snubber designs are to reduce, among other things, the resonance of the circuit. However, these snubber designs are not engineered to dissipate all the energy; they are simply designed to dissipate enough energy to reduce resonance and the resulting resonant “over” voltages that may otherwise occur.  
         [0023]     To dissipate all the energy in the circuit, a significantly larged sized capacitor  573  may be used in snubber  580  design. It is desirable to have the resistance  577  approximately match the resistance in the load  530 . Thus, if the load resistance is approximately 20 ohms, then the resistance of the snubber should be selected to be about 20 ohms. In addition, the stored inductance  575  for a typical circuit driving the AC MOSFET switch has been measured at approximately 100 nanoHenries. In some snubber designs, a capacitor capable of capturing about ⅕ of the energy stored in the inductive parasitics may be utilized. As mentioned, this capacitor size is utilized to simply avoid resonance of the circuit. However, the remaining energy is dissipated via heat in the switching element or as Radio Frequency (RF) emissions. To avoid this heat or RF emissions, a larger snubber circuit may be utilized.  
         [0024]     In order to have the snubber dissipate substantially all the stored energy of the circuit, the energy dissipated by the snubber should equal the energy stored due to the inductance of the circuit. Thus, 
 
½  LI   2 =½  CV   2 , where I=V/R 
 
½  L ( V/R ) 2 =½  CV   2  
 
 Solving for C we find that: 
 
 C=L/R   2  
 
 Thus, the capacitor used is directly related to the value of the parasitic inductance. 
 
         [0025]     Dissipating heat may be undesirable as it may result in damage to the circuit. A solution to this may be to include a heat sink. However, the addition of the heat sink may add cost to the design. In addition, generation of RF emissions may be undesirable as it may result in poor classification during RF certification proceedings for the device containing the AC MOSFET switch. To protect from RF emissions, a shield for the RF emissions may be provided. Again, however, the addition of a shield may add cost to the design.  
         [0026]     Thus, in one embodiment, the capacitor that is part of the snubber illustrated in  FIG. 5  is designed to capture substantially all of the stored energy in the circuit associated with the AC MOSFET switch. In this manner, the design of RF shield and the design of any heat dissipating devices may be reduced.  
         [0027]      FIG. 6  illustrates a single integrated circuit (IC) device  600  containing two NMOS type MOSFET devices of an AC MOSFET switch, in accordance with one embodiment. In an alternative embodiment, two PMOS type MOSFET devices may be utilized in the construction of an AC MOSFET switch. Recall that the two sources from the two MOSFETs are logically coupled to each other in the AC MOSFET switch. By fabricating the two MOSFETs in a single package on an IC, the two MOSFETs may share a common source region  610  on the IC. In the embodiment illustrated in  FIG. 6 , a common source region  610  is implanted into the die containing the AC MOSFET switch. The sharing of the common source region  610  may allow the use of a single source lead emanating from the package containing the two MOSFETs of AC MOSFET switch. This, in turn, may result in decreased conduction resistance due to the elimination of one source lead and the source lead&#39;s associated wire bonding parasitics, such as ohmic resistance from the die to a package lead. For example, in one embodiment, the elimination of one of the source leads may reduce the impedance by 70 milliohms, corresponding to the impedance associated with one of the leads to the AC MOSFET switch.  
         [0028]     70 milliohms may be a substantial portion of the overall resistance associated with the AC MOSFET switch. For example, assume an R DSON  of 100 milliohms for each MOSFET in the AC MOSFET switch. Thus, with a 70 milliohm resistance for each lead for the source and drain, the overall path impedance across the source and drain is 240 milliohms. Two discrete series devices have an effective resistance through the AC MOSFET switch of 480 milliohms. Recall that the external source lead in the AC MOSFET is used for the application of gate bias and as a conduction path for certain types of snubber applications during switch turn off. By design the external source connection  610  has very low current flow and does not introduce series resistance to the AC MOSFET switch when the switch is conducting. This fact allows the conduction resistance of the AC MOSFET switch to be reduced by 140 milliohms, or a reduction in effective resistance 30% by using a common source region on the die of the AC MOSFET and the elimination of one lead. Since the power dissipated is directly related to the resistance, this results in a 15% reduction in power loss, for the embodiment described. Fabrication of the AC MOSFET switch on a single die also allows one of the gate terminals of the discrete implementation to be eliminated. The result of the common source region and eliminated gate terminal is a four pin device with two high current drain connections and two lower current gate and source connections. One pin of the four pin device is coupled to each of the gates of the two MOSFETs. Another pin is coupled to the common source region, and each of the two remaining pins are coupled to a different one of the drains.  
         [0029]     Thus, embodiments of an AC MOSFET switch design have been disclosed. This design generally allows for faster operation of the AC MOSFET switch to, among other things, allow operation significantly above the audio frequency spectrum (e.g. greater than 20 kHz). The AC MOSFET switch operation generally utilizes higher frequencies which, in turn, allows the device to be used in a broad range of AC power control, thus reducing the use of rectification and the resulting induction of harmonics to the power line. These advantages reduce the use of expensive filtering and allow for better operation in environments containing persons such as the home or office environment. The designs may also allow for single IC design of the AC MOSFET switch in many applications. This may reduce the number terminal thus reducing loss due to lead resistance.