data2/json/DLP/1038392.json

{
  "ticketNumber" : "1038392",
  "reporterName" : "Allen35065",
  "rankPoints" : "3245",
  "resolutionStatus" : "",
  "ticketName" : "TDA2SX: Memory access error when EVE read address more than 512MB DDR",
  "rankName" : "Expert",
  "replies" : "",
  "views" : "",
  "queryText" : "Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi expert, Customer used 512MB on TDA2 before while they increased DDR3 to 1GB recently. After modified EMIF and DMM configuration in gel file, we could access 0xB5000000 on DSP and ARM in CCS memory watch page. But on EVE, it reported error as below. Could you please suggest what we need to do to make EVE access correct? Thank you.",
  "imageList" : [ "Data/input/1038392/jpg" ],
  "partNumber" : "NA",
  "allResponseList" : [ {
    "contentId" : "",
    "userName" : "Stanley Liu",
    "rankPoints" : "50045",
    "rankName" : "TI__Guru",
    "date" : "",
    "userId" : "/members/22243",
    "content" : "Hi, You have to update the EVE MMU mapping in GEL file. The max page size per entry in EVE MMU is only 16MB. Regards, Stanley",
    "imageList" : null
  } ],
  "tags" : [ ],
  "fourmType" : "processors-forum"
}