Patent Application: US-17333802-A

Abstract:
a practical definition for determining an upper bound on information content is provided and used to reduce the widths of operators and edges of data flow graphs . a top down procedure for systematically pruning data flow graphs is described . the result is shown to enhance the mergeability of subgraphs and provide reduced data path widths . this may result in lower area , power requirements and other benefits as readily understood in the field of circuit design .

Description:
operations of a data flow graph ( dfg ) may include width extension of a signal , which is the padding the most significant bit ( msb ) side of the signal with multiple copies of a fixed bit to obtain a new signal of larger bitwidth . if the padding is done with a zero bit , the extension may be said to be unsigned . if it is done with the current msb of the original signal , the extension may be said to be signed . for example , 00011 and 11111 are obtained from the two bit signal 11 by a five bit unsigned and five bit signed extension respectively . as used in the instant specification , a dfg , which includes datapath operators , is a directed acyclic connected graph where nodes represent inputs , outputs and datapath operations . the term “ edges ” is used to identify the flow paths for data between operators . the interface of an edge with its source or destination node is referred to as a port . a port may be an input ( or output ) port representing an interface of an edge with its destination ( resp . source ) node . each input ( or output ) node may have one output ( resp . input ) port . each operator node may have one output port and one or two input ports depending on whether the datapath operator on the node is unary or binary . the following quantities may be defined for the nodes and edges in a dfg : each operator node n may have a width value w ( n ), which is a positive integer . for an input ( or output ) node , represents the bitwidth of the input ( resp . output ) signal represented by the node . for an operator node , it represents the number of bits used to represent the operands and / or result of the operation labeling the node . each edge e has a width value w ( e ), which is a positive integer . for an edge , the width represents the number of least significant bits of the result of the operation at the source node , which may be used as input by the operation at the destination node of the edge . each edge e may be labeled with a binary attribute t ( e ) called the signedness of the edge . the signedness is either signed or unsigned . the binary bits { 0 , 1 } may be used to represent the signedness types “ unsigned ” and “ signed ,” respectively . let n 1 and n 2 be the source and destination nodes of an edge e . let their widths be w ( n 1 ), w ( n 2 ) and w ( e ) respectively . if w ( e )≦ w ( n1 ), then a signal defined by w ( e )— many least significant bits of the result of n 1 , may be said to be carried by e . if w ( e )& gt ; w ( n 1 ), then e would carry a signal obtained by extending the result of n 1 to w ( e ) width . the type of extension may be determined by the signedness of the e . similarly if w ( n 2 )≦ w ( e ), the signal defined by w ( n 2 )— many least significant bits of the signal carried by e may be used as an input operand by the operator at the destination node . if w ( n 2 )& gt ; w ( e ) and implementation of the operator at n 2 requires an extension of its operand , then a w ( n 2 ) bit extension ( whose signedness is determined by signedness of e ) of the signal carried by e may be used as the input operand . referring to fig1 a , the idea of merging of datapath operators may be illustrated with a simple example . a dfg 100 has inputs a and b linked by edges 140 and 150 , respectively , to an operator n 1 illustrated at 125 . dfg 100 has inputs c and d linked by edges 145 and 160 , respectively , to an operator n 2 illustrated at 130 . operators n 1 and n 2 125 and 130 are illustrated as addition operators but could any of a variety of types of operators . the bitwidths of edges 140 , 145 , 150 , and 160 are each equal to 8 . the widths of operators n 1 and n 2 125 and 130 are equal to 9 . while an output edge 155 has a bitwidth of 9 , which corresponds to the output of operator n 2 130 , that of an output edge 165 , which corresponds to the output of operator n 1 125 , is equal to 7 so the output of node n 1 125 is obtained by truncating a 9 bit result to 7 bits by the operator n 1 125 . furthermore on the edge 165 , the truncated value may be sign - extended to 9 bits to be used as an operand for the operator n 3 135 . the output edge 170 of the operator n 3 135 indicated at 170 has a bitwidth of 10 , corresponding to a result r . observe that because the truncated value carried by the edge 165 may be sign - extended to 9 bits , to be used as an operand for operator n 3 135 , the output 190 of the dfg 100 is not directly expressible as sum of addends derived from input signals . therefore , the whole of the dfg 100 could not be in the same cluster . that is , it is not mergeable . referring now to fig1 b , the maximal merging possible in the dfg 100 is identified by broken lines 105 and 110 surrounding the mergeable extents . the situation where a signal is truncated and then subsequently extended in the downstream computation creates a mergeability bottleneck and forces a boundary that limits merging . the following two essential conditions may be identified as being required for a set of datapath operators in a dfg to be identified as a cluster : 1 . the subgraph formed by the operators is a connected induced subgraph with a unique output . 2 . the value of the output signal , at the unique output , is definable as a mergeable function of inputs to the cluster . for example , this function may be a sum of products of signals derived from inputs . note that an addend may be said to be derived from an input signal if it is obtained by truncation , extension or 2 &# 39 ; s complement of the input signal of products of signals derived from inputs . note also that since a product operation can be implemented as sum of multiple partial products , a sum of products of signals may be viewed as a sum of addends , where the partial product of inputs form the addends . referring to fig2 a and 2b , a dfg 101 is similar to that of fig1 a and 1b , except for a difference in the width of an output edge 171 , which is 5 bits in fig2 a rather than 10 as in fig1 a and 1b . since only 5 lsbs of the final sum 191 need to be generated , the required precision of every in the dfg 101 is only 5 bits . this is because the higher significance bits are superfluous . hence no extension is required on the edge 165 and the bottleneck of fig1 a and 1b may be seen to be avoidable by appropriate transformation of the dfg 101 . thus , the entirety of the dfg 101 is mergeable . the dfg 101 may be transformed to the dfg 200 , which has smaller respective widths of edges 240 , 250 , ( which correspond to edges 140 and 150 ), edges 245 and 260 ( which correspond to edges 145 and 160 ), operators n 4 and n 5 225 and 230 ( which correspond to operators n 1 and n 2 125 and 130 ) and edges 265 and 255 ( which correspond to edges 165 and 155 ) compared to the dfg 101 . the transformed dfg 200 may then be analyzed using prior art mergeability algorithms and clusters identified and merged . note that , although in this example the width of the output signal 191 is used to transform the width of the operators of the dfg 200 , the width of any node or edge inside the dfg can also be used to transform the widths of nodes and edges in the fan - in cone of the given node ( or edge , respectively ). essentially , a procedure may be followed in which , working backward from output to input , where an operator and / or its inputs are wider than required given the width of the output , the operator and its inputs are pruned . for example , if an 8 - bit - wide operator with inputs whose widths are also 8 bits , has an output that is only 6 bits wide , the operator and its inputs may be pruned to 6 bits , which is the minimum precision required for the output . any additional width results in the operator ignoring msbs of the inputs , so they are pruned in advance . then the pruned inputs are followed to their respective outputs and the same process is followed again for each operator , pruning along the way . note , the procedure may not hold for all operator types , for example shift and rotate operators . the following procedure is preferably recursive and , as suggested above , applied in bottom up fashion , i . e . the ports on the output nodes form the base case . for an input or output port p , a required precision r ( p ) for the signal entering or leaving the port , respectively , is defined by the following rules : for input port p of a non - output node n : r ( p )= min { r ( p o ); w ( n )}. here p o is the output port of n . r ( p o )= max e outedges ( n ) ( min { w ( e ); r ( p d )}) here p d denotes the input port at the destination node of edge e . referring to fig3 a procedure for implementing the above in a design for a circuit may be defined as follows . in step s 10 , a dfg is defined to represent a proposed circuit . in step s 15 , a new port in the dfg is identified . preferably , the nodes of a dfg are processed in reverse topological order . as stated , the ports are traversed in bottom - up fashion with the outputs taken first . in step s 20 , a new directed path from the port to an output node is identified . note that the directed path may be confined to the immediate fan - out region , or a selected number of levels of such , of the node . in step s 25 , the minimum width of any node or edge on that path is determined . then , in step s 30 , the required precision is taken as the maximum of this value over all of these directed paths . if the required precision of a signal is n , it means , not more than n least significant bits of the signal are needed to completely define the signals at every output node in the fan - out cone of the port . the remaining higher order bits of the signal get truncated by some intermediate operation or explicit truncation and the corresponding bits on subsequent paths may be regarded as superfluous . in step s 35 , if the last directed path from the current port has been followed , step s 40 is executed , if not , steps s 20 - s 30 are repeated for a new one , until all are followed out and a required precision determined for each . in step s 40 , if the last port has been traced , step s 45 is executed , if not , steps s 20 - s 35 are repeated for a new one , until all are followed out and a required precision determined for each directed path therefrom . in step s 45 , the dfg is transformed according to the new required precision values by applying each to a corresponding operator and edge . a transformation that changes the widths of nodes and edges in a dfg such that w ( n )= min { w ( n ); r ( p o )} and w ( e )= min { w ( e ); r ( p d )} where p o is the output port of node n and p d is the destination port of edge e preserves the functionality of the dfg . in step s 50 , mergeable clusters may be identified based on the transformed dfg and in step s 55 , the transformed dfg may be used as a basis for the design of a logic circuit , as an exemplary application of the method . as demonstrated by the examples given , analysis of required precision of a dfg graph can potentially reduce the required width of operators and operands and thereby expose the mergeability of operators to algorithms for identifying clusters . referring now to fig4 a and 4b , a simple example of a dfg 300 has inputs a 1 , b 1 , c 1 , and d 1 applied through edges 340 , 350 , 345 and 360 to operators n 7 and n 8 325 and 330 , respectively . outputs of operators n 7 and n 8 325 and 330 are applied through edges 365 and 355 to an operator n 9 335 , whose output is applied through edge 310 to an operator n 10 395 , whose output at edge 370 is a result 390 . note that the edge 310 appears at first inspection as a potential boundary of merging ( i . e ., a bottleneck ), because it is sign - extending an 8 bit truncated sum . however since a 1 , b 1 , c 1 , and d 1 all have narrow bitwidths , the 8 - bit result of nodes n 7 325 and n 8 330 are simply sign extensions of 4 bit sums . tracing the consequences of this observation one level further , the result of n 9 335 is , functionally , a sign - extension of 5 bit sum . this means , the combination of the widths of node n 9 335 , edge 310 and node n 10 395 does not required a sign - extension of a truncated result as may first appear . in fact , the operand entering n 9 335 via edge 365 is a sign extension of 5 bit sum . as a result , dfg 300 may be replaced with a functionally equivalent graph 301 , which has smaller widths for operators n 7 ′ and n 9 ′ 326 and 336 and edges 366 , 311 , and 356 . further , output r 390 may be expressed as sum of sign - extensible inputs a 1 , b 1 , c 1 , and d 1 and the entire graph is , thus , mergeable . the example illustrates that essential content of information in the result of every operator node may be transformed , in some situations , to allow the merging of operators that otherwise seem unmergeable . also , as noted in the context of preceding example , the same analysis also allows a reduction in the widths of datapath operators that are working on operands with low information content . an algorithm is described below for defining and exploiting an upper bound on the information content of signals at every port of a dfg . this information content results may then be used to prune the widths of nodes and edges in the dfg safely . the information content of a signal in a dfg may be defined as the tuple & lt ; i , t & gt ; of the smallest possible non - negative integer i and an extension type t { 0 ; 1 } ( i . e . unsigned , signed ) such that for all possible values of the inputs to the dfg , the signal is a t - extension of its i many least significant bits . for a port p , & lt ; i ( p ), t ( p )& gt ; may denote the information content of the signal entering ( or leaving ) the port if the port is an input ( resp . output ) port . intrinsic information content of a node may be defined as the information content of its result signal in terms of the information content of its operands , assuming the operation at the node is done without any loss of information . for example , intrinsic information content i int of addition of operands with information contents & lt ; m 1 , 0 & gt ; & lt ; m 2 , 0 & gt ; is & lt ; max { m 1 , m 2 }+ 1 , 0 & gt ;, again , the value 0 for t a signedness of unsigned . the problem of determining the first component of information content of signals in an arbitrary dfg with +, − and × operators is nondeterministic polynomial - hard ( np - hard ), which means it is essentially intractable . but , while computing the exact value ( say & lt ; i , t & gt ;) of information content is hard , a heuristic for efficiently computing an upper bound on information content i . e . a & lt ; i ′, t ′& gt ; where i ′≧ i such that the signal is a t ′- extension of its i ′ many least significant bits , is still possible . the notation î ( p ) ( similarly î ( n ) and î int ( n )) may be used to denote upper bounds on the information content & lt ; i ( p ), t ( p )& gt ; of a port . if the upper bounds on intrinsic information content of inputs of binary operators of addition (+), subtraction (−), multiplication (×), and unary minus (− u ), are denoted by & lt ; i 1 , t 1 & gt ;, & lt ; i 2 , t 2 & gt ; then : î int (+)=& lt ; max { i 1 , i 2 }+ 1 , t 1 | t 2 & gt ;; î int (×)=& gt ; i 1 + i 2 , t 1 | t 2 & gt ;; î int (− u )=& lt ; i 1 + i 2 , signed & gt ;. note that the vertical bar refers to a boolean or operation so that if any input is signed , then the output information content is signed . information content of a signal at the output edge of an operator node may depend on the width of the operator node and information content of the input operands of the operator node . as a consequence , the information content of signals are preferably computed in a given dfg in a top - down order ; i . e . starting at input nodes and finishing at output nodes . referring to fig5 a procedure for optimizing a design for a logic device begins with the definition of a dfg s 110 and identifying an next operator node s 115 in an output - to - input sequence . in steps s 120 and s 125 , propagating information content across an operator node , information content for the output port of the nodes are computed based on the information content of the inputs ports of the operator node . the information content at the output port of a node is the smaller of the intrinsic information content of the node and its width . if at step s 130 the last operator node has been identified and its output port information content determined , step s 135 is executed . if not , steps s 115 - s 125 are repeated for each . at step s 135 , an edge is identified in the dfg . in steps s 140 and s 145 , propagating information content across an edge , information content for the destination port of the edge is computed based on the information content for the source port of the edge . for propagating information content across an edge , if the signedness of the information content and the edge are the same , then the magnitude of the information content across the edge is the smaller of upper bound on i and w e . in the scenario where the signedness type t of the information content at the source port differs from signedness type t ( e ), when t = unsigned and t ( e )= signed , if there is a strict extension of the information content across the edge ( i . e . w ( n 1 )& gt ; upper bound on i and w ( e )& gt ; upper bound on i ), then the first component of the information content is upper bound on i and the signedness is unsigned . even though the edge is signed , in this case , the data going into the destination node can be regarded as unsigned because it will always have zeros in the most significant bits beyond the upper bound on i least significant bits . if , at step s 150 , the last edge has been identified and its information content determined , step s 155 is executed . if not , steps s 135 - s 145 are repeated for each edge . information content upper bound is used to reduce the widths of nodes and edges in the dfg at step s 155 , when widths exceed the information content . in step s 157 , to maintain compatible connections between a pruned subgraph and its inputs and outputs , a new type of operator may be defined and added to reconcile the interfaces , as required . this operator is referred to here as an extension node . the extension node may have the following two attributes : width and signedness ( denoted by w ( n ) and t ( n ) for node n ), may be defined such that the result of extension operation is : ( i ) if w ( n )& gt ; w ( e in ) ( where e in is the unique input edge of the node ), then result is a w ( n ) bit extension of the signal at the destination port of e and the type of extension is same as t ( n ). ( ii ) if w ( n )≦ w ( e in ), then result is the w ( n ) many least significant bits of the signal on destination port of e . if the intrinsic information content of an operator node n is & lt ; i , t & gt ; and w ( n )& gt ; i , then a transformation can be done without changing functionality of the dfg . this transformation begins by decreasing the width of n to i . then , all the outedges of n may be removed . the output port of n is then connected to a new extension node and the removed outedges of n connected to the output port of the new extension node . the width and signedness type of the edge connecting n and the new extension node is & lt ; w ( n ), x & gt ; ( where x means either of signed or unsigned ); the width and signedness type of the new extension node are w ( n ) ( old value ) and t respectively . if the information content at the destination port of an edge in a dfg is & lt ; i , t & gt ;, the width and sign type of the edge can be changed to i and t without changing the functionality of the dfg . the width transformations above are preferably performed while evaluating the information content in topological order from inputs towards outputs . in step s 160 , mergeable clusters are identified and merged ( i . e ., the dfg is repartitioned ) and in step s 162 , if new extension nodes are added from a previous iteration , the information content is propagated across the extension nodes by returning to step s 115 and iterating . there are situations , in which , a safe rebalancing of a subgraph of a dfg , can allow tighter ( i . e . smaller ) values of upper bounds on information content of signals . this may allow for potentially greater merging and smaller widths of operators . for example , consider the dfg shown in fig6 a , which , as in earlier examples , could be part of a bigger dfg . in a dfg 400 , inputs a 2 , b 2 , c 2 , and d 2 are applied through edges 440 , 450 , 445 and 460 to operators n 11 , n 12 and n 13 425 , 430 , and 435 , respectively . output of operators n 11 425 is applied through edge 465 to operator n 12 430 , whose output is applied through edge 455 to operator n 13 435 , whose output at edge 470 is a result 490 . note that the operators n 11 , n 12 and n 13 425 , 430 , and 435 form a skewed tree . the algorithm for computing information content would compute & lt ; 7 , 0 & gt ; as the upper bound on information content of the output signal r 590 . however , the dfg 400 shaped as a skewed tree may be rebalanced as illustrated at 500 in fig6 b . here , dfg 500 has inputs a 2 , b 2 , c 2 , and d 2 applied through edges 540 , 550 , 545 and 560 to operators n 14 and n 15 525 and 530 , respectively . outputs of operators n 14 and n 15 525 and 530 are applied through edges 565 and 555 to an operator n 16 535 , whose output at edge 570 is a result 590 . in the dfg 500 , the upper bound computed would be & lt ; 6 , 0 & gt ;. note that a rebalancing of a subgraph in a dfg did not alter its functionality . therefore once a subgraph has been identified as safely rebalanceable , the upper bounds on the output of the subgraph can be computed using a more balanced ordering of operations in the graph . note also that actual rebalancing of the nodes and alteration of the graph is not required . the only requirement is to define a more balanced ordering of operators to compute tighter upper bounds . preferably , subgraphs should be rebalanced only if doing so is safe . a cluster obtained from mergeability analysis is a safely rebalanceable subgraph ( for example , the subgraphs enclosed by boundaries 105 and 110 in fig1 b ), because the output of a cluster is expressible directly as sum of products of input signals . if a dfg consisting of addition , subtraction , multiplication and unary minus operators and a cluster exists such that its unique output is expressible as a sum of constant multiples of addends . for example , e . g . z = 5 * b − 4 * d + 3 * f ) is a safely rebalanceable subgraph because each constant integer product is equivalent to multiple addends coming from the same signal ( e . g . 5 * b is b + b + b + b + b and − 4 * d is (− d )+(− d )+(− d )+(− d )). therefore , the output can be viewed as sum of addends derived from input signals . after identifying clusters using an initial mergeability analysis , the information content of the output of the clusters can be computed by rebalancing them . further , if this recomputation leads to reduction in the value of the width component of information content , further merging of operators should be attempted . a computational problem exists which is how to compute tighter upper bounds on information content of a cluster representing a sum of constant multiples of inputs . an algorithm employs huffman rebalancing to take an expression representing a sum of constant multiples of input signals and compute an upper bound on the integer value of information content of the output signal using an optimal ordering of operations . the following is a definition of the proposed algorithm . the input to the algorithm is an expression representing a sum of constant multiples of input signals . the upper bounds on information contents of the input signals are assumed to be known . the output is an upper bound on information content of the output signal of the expression . referring to fig7 in step s 210 , a dfg is defined . in step s 220 , first , a priority heap structure h of integers is created . for each term c * i in the expression ( where c is an integer constant and i is an input signal , c copies of the numeric value of information content of i are placed in the heap . next , the following procedure , represented in pseudocode , is performed on the value in the heap , h . return extractmin ( h ); /* return the single remaining value in h . */ the above procedure computes the upper bound on information content , which is the best possible among all possible orderings of operations . among all possible orderings of operations in an expression representing sum of constant multiples of inputs , the ordering defined by the huffman rebalancing algorithm gives the tightest possible upper bound on information content of expression result . if the huffman rebalancing results in a change in topology , merging should be reattempted otherwise the procedure may be terminated — step s 230 . the other procedures for bitwidth reduction based on required precision and required information content may be applied as well in the procedure of fig7 immediately between steps s 230 and s 215 . referring now to fig8 the overarching problem of partitioning a dfg into clusters may employ each of the above measures in a single algorithm for computing maximal clusters based on the analyses of required precision and information content . the algorithm illustrated in fig8 involves an iterative bottom - up traversal ( outputs to inputs ) of the dfg and identifies break nodes i . e . every operator node n such that n is not mergeable with at least one of the operators at the destination of its outedges . this defines a partitioning of the graph into clusters , which are connected components obtained by removing those outedges of every break node whose destination nodes are not operator nodes . assuming that a dfg has been transformed based on analysis of required precision and information content , an operator node n of the dfg , is a break node if one or more of following conditions hold : 1 . safety condition 1 : for some outedge of the operator node n , the destination node of the outedge is an extension node . 2 . safety condition 2 : let p i ; . . . ; p m be the destination ports of outedges of the operator node . let r ( p i ) denote the required precision of signal for each p i . then min { i int ( n ); max {( p i ); . . . ; r ( p m )}}≦ w ( n ). 3 . synthesizability condition 1 : for some outedge of n , the destination node has multiplication operator . 4 . synthesizability condition 2 : there is a node n ′ such that every directed path starting at n goes through n ′ and there are no break nodes between n and n ′ on any of these paths . synthesizability condition 2 ensures that every cluster has a unique operator node providing outputs ; synthesizability condition 1 ensures that this unique output is expressible as sum of products of inputs to the cluster . then each cluster can be synthesized as a sum of addends . if the algorithm for information content computation encounters an extension node , created by the previous iteration of information content computation , it needs to propagate information content across the extension node . if n is an extension node and & lt ; i , t & gt ; are upper bounds on information content at its input port and e is the inedge of n , then an upper bound & lt ; i 0 , t 0 & gt ; on the output port of n can be defined as follows . ( i ) if (( t == t ( n )) or (( t == unsigned ) and ( t ( n )== signed ))) then i o = min { i ; w ( n )}; to = t ( n ); ( ii ) if (( t == signed ) and ( t ( n )== unsigned )) then i o = min { w ( e ); w ( n )}; t o = t ( n ); after initial computation of required precision and information content , the algorithm for maximal merging enters an iterative mode . every iteration defines a partitioning based on current values of information content and uses current set of clusters to compute tighter upper bounds on the information content of the output signals of clusters . whenever the value of information content of the output signals of any cluster change , another iteration of cluster definition is done with the anticipation that smaller information content could lead to more mergeability and result in bigger and fewer clusters . this way the algorithm converges to a partitioning with maximal safe clusters . a simple procedure for implementing the above method is outlined in fig8 . first , a dfg is defined for some target circuit design ( s 315 ). next , in steps s 315 and s 322 , the dfg is pruned responsively to required precision and information content upper bounds . preferably , this may be done using the algorithms defined above or parts thereof . next , in step s 326 , mergeable subgraphs may be identified in the dfg . next , in step s 335 , the potentially mergeable subgraphs are rebalanced and upper bound on information content determined . steps s 322 - s 335 are repeated the first time s 345 is encountered and if information content remains unchanged afterward , the process is terminated otherwise , steps s 322 - s 335 are repeated again until the information content upper bounds remains unchanged for all clusters . note that only a subset of clusters need be handled as required by the loop defined above . note also that the required precision step s 315 may be omitted and the benefit of information content and rebalancing obtained without it . also , other techniques for rebalancing , determining information content , and / or required precision may be substituted in the process of fig8 . the dfg partitioning algorithm was implemented and tested as a dfg optimization and datapath operator - merging step in the buildgates synthesis tool of cadence design systems . datapath intensive rtl test cases were used and experimental data collected on the performance of the algorithm . these were compared with results obtained using an older implementation of cdfg partitioning algorithm . the older algorithm did mergeability analysis using criteria similar to “ leakage of bits ” approach and without doing any transformations based on information content and required precision . using the tsmc 0 . 25 - micron technology cell library , two types of performance data were collected : ( i ) longest path delay and area of the netlists obtained after synthesis but before any timing driven gate level logic optimization . ( ii ) runtime of timing driven gate level logic optimization done on netlists obtained from synthesis . tables 1 and 2 respectively present the above two types of data from five datapath - only test cases . to highlight the impact of operator merging in datapath synthesis , table 1 also includes the data obtained using a synthesis flow which does not do any operator merging . when the non operator - merging based flow was used , the runtimes of logic optimization were much larger than those with operator - merging based flows ; so runtime was not included in table 2 . to further compare of the quality of the final netlists generated using old and new merging algorithm , table 2 includes the data on final longest path delay and final area after timing driven logic optimization . all delay numbers are in nanoseconds and the area numbers are scaled down by a factor of 100 . note that to collect data for both tables , we set the arrival times at all inputs in each test case to 0 . test case d 1 and d 2 were created using multiple addition operations , which are potentially mergeable . these addition operations did not have any redundant widths in rtl code , so the first pass of information - analysis leads to clusters that are not distinguishable from those created by the old merging algorithm . however , the post - clustering information analysis based on optimal reordering of operations , which is done by the second or subsequent iteration of the new merging algorithm , allows the inference of smaller information content for output signals of clusters . this allows the second or subsequent iterations to merge the set of clusters created in previous iteration into bigger and fewer clusters . this reduction in number of clusters , leads to the better longest path delay and area values after initial synthesis . since there were no apparent redundant widths in rtl , the gains seen after the initial synthesis do not seem as large as d 4 and d 5 . nevertheless during timing driven logic optimization , we see considerable advantages of creating larger clusters , and see significantly smaller runtimes . test cases d 4 and d 5 were created with a great deal of redundancy in the bit widths of intermediate paths in rtl , to test the effect of information - analysis based width reduction on timing and area of netlists . in these test cases , the merging algorithm was able to prune the redundant widths to the minimum required , and this in turn helped in reducing the number of clusters created . as a result , significant reduction in longest path delay and area after the initial synthesis was noted . this also translates to drastic reduction in the runtime of the timing driven logic optimization for these two test cases , as seen in table 2 . test case d 3 represented a sum of products of sum computation , where information - based - analysis allowed the new merging algorithm to prune with widths of outputs of products and merge them with the final addition . the above results demonstrate the benefits of using analyses of required precision and information content of signals in dfgs for operator merging based datapath synthesis . referring to fig9 any of the methods , algorithms , or techniques presented may be embodied in software and stored on media 600 according to known techniques . although the foregoing invention has been described by way of illustration and example , it will be obvious that certain changes and modifications may be practiced that will still fall within the scope of the appended claims . the devices and methods of each embodiment can be combined with or used in any of the other embodiments . for another example , the concepts of required precision , information content , the related transformations , and the partitioning algorithms described below are applicable to data flow graphs ( dfgs ) that have datapath operators other than addition , subtraction , unary minus and multiplication e . g . comparators and shifters . however , for the sake of clarity the discussion is limited to examples involving +, − and × operations . the following references are hereby incorporated by reference as if fully set forth herein in their entirety . d . a . huffman , a method for the construction of minimum - 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