Patent Application: US-201415118490-A

Abstract:
a method for optimizing an implementation of a logic circuit , comprising steps of providing an interpretation of the logic circuit in terms of 3 boolean variable majority operators m , with each of the majority operators being a function of a plurality of variables that returns a logic value assumed by more than half of the plurality of variables , and a single boolean variable complementation operator ′. the method further comprises providing a commutativity , a majority , an associativity , a distributivity , an inverter propagation , a relevance , a complementary associativity , and a substitution transformation ; and combining the ω . m , ω . c , ω . a , ω . d , ω . i , ψ . r , ψ . c and ψ . s transformations to reduce an area of the logic circuit via a reshaping procedure consisting of the ω . a , ω . c , ω . d , ω . i , ψ . r , ψ . s and ψ . c transformations , applied either left - to - right or right - to - left moving identical or complemented variables in neighbor locations of the logic circuit , an elimination procedure consisting of the ω . m transformation , applied left - to - right , and the ω . d transformation , applied right - to - left , that simplify redundant operators , or an iteration of steps and till a reduction in area is achieved .

Description:
the invention proposes a method to represent and optimize logic by using only majority ( maj ) and inversion ( inv ) as basis operations . the method makes use of a majority - inverter graph ( mig ), a logic representation structure consisting of three - input majority nodes and regular / complemented edges . migs include any and / or / inverter graphs ( aoigs ), therefore containing also aigs ( see reference [ 8 ]). to provide native manipulation of migs , a novel boolean algebra is introduced , based exclusively on majority and inverter operations . a set of five primitive transformations forms a complete axiomatic system . using a sequence of such primitive axioms , it is possible to explore the entire mig representation space . this remarkable property opens up great opportunities in logic optimization and synthesis . the potential of migs is shown by proposing a delay - oriented optimization technique . experimental results , over the mcnc benchmark suite , show that mig optimization decreases the number of logic levels by 18 %, on average , with respect to aig optimization run by abc academic tool . applied in a standard optimization - mapping circuit synthesis flow , mig optimization enables a reduction in the estimated { delay , area , power } metrics of { 22 %, 14 %, 11 %}, on average before physical design , as compared to academic / commercial synthesis flows . the study of majority - inverter logic synthesis is also motivated by the design of circuits in emerging technologies . in the quest for increasing computational performance per unit area ( see reference [ 9 ]), majority / minority gates are natively implemented in different nanotechnologies ( see references [ 10 ]-[ 12 ]) and also extend the functionality of traditional nand / nor gates . in this scenario , migs and their algebra represent the natural methodology to synthesize majority logic circuits in emerging technologies . in the present description , we focus on standard cmos , to first showcase the interest of migs in an ordinary design flow . this section presents relevant background on logic representations and optimization for logic synthesis . notations and definitions for boolean algebra and logic networks are also introduced . virtually , all digital integrated circuits are synthesized thanks to efficient logic representation forms and associated optimization algorithms ( see reference [ 1 ]). early data structures and related optimization algorithms ( see reference [ 2 ]) are based on two - level representation of boolean functions in sum of product ( sop ) form , which is a disjunction ( or ) of conjunctions ( and ) where variables can be complemented ( inv ). another pioneering data structure is the binary decision diagram ( bdd ) ( see reference [ 6 ]): a canonical representation form based on nested if - then - else ( mux ) formulas . later on , multi - level logic networks ( see references [ 3 ], [ 4 ]) emerged , employing and , or , inv , mux operations as basis functions , with more scalable optimization and synthesis tools ( see references [ 4 ], [ 7 ]). to deal with the continuous increase in logic designs complexity , a step further is enabled by reference [ 5 ], where multi - level logic networks are made homogenous , i . e ., consisting of only and nodes interconnected by regular / complement ( inv ) edges . the tool abc ( see reference [ 8 ]), which is based on the and - inverter graphs ( aigs ), is considered the state - of - art academic software for ( large ) optimization and synthesis . the present invention is directed at a new logic optimization paradigm that aims at extending the capabilities of modern synthesis tools . 1 ) boolean algebra : in the binary boolean domain , the symbol b indicates the set of binary values { 0 , 1 }, the symbols o and v represent the conjunction ( and ) and disjunction ( or ) operators , the symbol ′ represents the complementation ( inv ) operator and 0 / 1 are the false / true logic values . a standard boolean algebra is a non - empty set ( b , ∘, v , ′, 0 , 1 ) subject to commutativity , associativity , distributivity , identity and complement axioms over ∘, v and ′ ( see reference [ 16 ]). boolean algebra is the ground to operate on logic networks . 2 ) logic network : a logic network is a directed acyclic graph ( dag ) with nodes corresponding to logic functions and directed edges interconnecting the nodes . the direction of the edges follow the natural computation from inputs to outputs . the terms logic network , boolean network , and logic circuit are used interchangeably in this description . the incoming edges of a node link either to other nodes , to input variables or to logic constants 0 / 1 . two logic networks are said equivalent when they represent the same boolean function . a logic network is said irredundant if no node can be removed without altering the represented boolean function . a logic network is said homogeneous if each node has an indegree ( number of incoming edges , fan - in ) equal to k and represents the same logic function . in a homogeneous logic network , edges can have a regular or complemented attribute , to support local complementation . the depth of a node is the length of the longest path from any input variable to the node . the depth of a logic network is the largest depth of a node . the size of a logic network is its number of nodes . 3 ) majority function : the n - input ( n odd ) majority function m returns the logic value assumed by more than half of the inputs . in this section , we present migs and their associated boolean algebra . notable properties of migs are discussed . definition : an mig is a homogeneous logic network with indegree equal to 3 and with each node representing the majority function . in an mig , edges are marked by a regular or complemented attribute . we show the properties of migs by comparison to the general and / or / inverter graphs ( aoigs ), that are also including the popular aigs ( see reference [ 8 ]). for this purpose , note that the majority operator m ( a , b , c ) behaves as the conjunction operator and ( a , b ) when c = 0 and as the disjunction operator or ( a , b ) when c = 1 . therefore , majority can be seen as a generalization of conjunction and disjunction . this property leads to the following theorem . in both aoigs and migs , inverters are represented by complemented edge markers . an aoig node can be seen as a special case of an mig node , with the third input biased to logic 0 or 1 to realize an and or or , respectively . on the other hand , a mig node is not a special case of an aoig node , as the functionality of the three input majority cannot be realized by a single and or or . fig1 depicts two logic representation examples for migs . they are obtained by translating their optimal aoig representations into migs . note that even if such logic networks are optimal for aoigs , they can be further optimized with migs , as detailed later . more precisely fig1 show examples of mig representations ( right ) for ( a ) f = x ⊕ y ⊕ z and ( b ) g = x ( y + uv ) derived by transposing their optimal aoig representations ( left ). complement attributes are represented by bubbles on the edges . as a corollary of theorem 3 . 1 , migs include also aigs and are capable to represent any logic function ( universal representation ). this is formalized in the following . so far , we have shown that migs can be configured to behave as aoigs . hence , in principle , they can be manipulated using traditional and / or techniques . however , the potential of migs goes beyond standard aoigs and , in order to unlock their full expressive power , we introduce a new boolean algebra , natively supporting the majority / inverter functionality . we propose here a novel boolean algebra 1 , defined over the set ( b , m , ′, 0 , 1 ), where m is the majority operator of three variables and ′ is the complementation operator . the following set of five primitive transformation rules , referred to as ω , is an axiomatic system for ( b , m , ′, 0 , 1 ). all the variables considered hereafter belong to b . we prove that ( b , m , ′, 0 , 1 ) axiomatized by ω is a boolean algebra by showing that it induces a complemented distributive lattice ( see reference [ 17 ]). the set ( b , m , ′, 0 , 1 ) subject to axioms in ω is a boolean algebra . the system ω embed median algebra axioms ( see reference [ 13 ]). in such scheme , m ( 0 , x , 1 )= x follows by ω . m . in reference [ 18 ], it is proved that a median algebra with elements 0 and 1 satisfying m ( 0 , x , 1 )= x is a distributive lattice . moreover , in our scenario , complementation is well defined and propagates through the operator m ( ω . i ). thus , a complemented distributive lattice arises . every complemented distributive lattice is a boolean algebra ( see reference [ 17 ]). note that there are other possible axiomatic systems . for example , it is possible to show that in the presence of ω . c , ω . a and ω . m , the rule in ω . d is redundant ( see reference [ 14 ]). in this work , we consider ω . d as part of the axiomatic system for the sake of simplicity . desirable properties for a logic system are soundness and completeness . soundness ensures that if a formula is derivable from the system , then it is valid . completeness guarantees that each valid formula is derivable from the system . we prove that the proposed boolean algebra is sound and complete by linking back to stone &# 39 ; s theorem ( see reference [ 19 ]). the boolean algebra ( b , m , ′, 0 , 1 ) axiomatized by ω is sound and complete . owing to stone &# 39 ; s representation theorem , every boolean algebra is isomorphic to a field of sets ( see reference [ 19 ]). stone &# 39 ; s theorem implies soundness and completeness in the original logic system ( see reference [ 20 ]). since the proposed system is a boolean algebra , stone &# 39 ; s duality applies and soundness and completeness are true . intuitively , every ( m ,′, 0 , 1 )- formula can be interpreted as an mig . thus , the boolean algebra induced by ω is naturally applicable in mig manipulations . we show hereafter that any two equivalent migs can be transformed one into the other by ω . it is possible to transform any mig α into any other logically equivalent mig β , by a sequence of transformations in ω . say that α is one - to - one equivalent to the ( m , ′, 0 , 1 )— formula a and β is one - to - one equivalent to the ( m , ′, 0 , 1 )— formula b . all tautologies in ( b , m , ′, 0 , 1 ) are theorems provable by ω [ theorem 3 . 5 ]. the statement a = b is equivalent to the tautology m ( 1 , m ( a ′, b ′, 0 ), m ( a , b , 0 ))= 1 ( that means a ⊕ b = 1 ). using the sequence in ω proving m ( 1 , m ( a ′, b ′, 0 ), m ( a , b , 0 ))= 1 we can then transform mig α into mig β . as a consequence of theorem 3 . 6 , it is possible to traverse the entire mig representation space just by using ω . from a logic optimization perspective , it means that we can always reach a desired mig starting from any other equivalent mig . however , the length of the exact transformation sequence might be impractical for modern computers . to alleviate this problem , we derive from ω three powerful transformations , referred to as ψ , that facilitate the mig manipulation task . the first , relevance ( ψ . r ), replaces and simplifies reconvergent variables . the second , complementary associativity ( ψ . c ), deals with variables appearing in both polarities . the third and last , substitution ( ψ . s ), extends variable replacement also in the non - reconvergent case . we represent a general variable replacement operation , say replace x with y in all its appearence in z , with the symbol zx / y . by showing that ψ can be derived from ω , the validity of ψ follows from ω soundness . relevance ( ψ . r ): let s be the set of all the possible primary input combinations for m ( x , y , z ). let sx = y ( sx = y ′) be the subset of s such that x = y ( x = y ′). note that sx = y ∩ sx = y ′= ø and sx = y ∪ sx = y ′= s . according to ω . m , variable z in m ( x , y , z ) is only relevant for sx = y ′. thus , it is possible to replace x with y ′ ( x / y ′) in all its appearance in z , preserving the original functionality . m ( x , u , m ( u ′, v , z ))= m ( m ( x , u , u ′), m ( x , u , v ), z ) ( ω . d ) m ( m ( x , u , u ′), m ( x , u , v ), z )= m ( x , z , m ( x , u , v )) ( ω . m ) recalling that k = m ( x , y , z ), we finally obtain : m ( x , y , z )= m ( v , m ( v ′, mv / u ( x , y , z ), u ), m ( v ′, mv / u ′ ( x , y , z ), u ′)) so far , we have presented the theory for migs and their native boolean algebra . we show now how to optimize an mig accordingly . the optimization of an mig , representing a boolean function , ultimately consists of its transformation into a different mig , with better figures of merit in terms of area ( size ), delay ( depth ), and power ( switching activity ). in the rest of this section , we present heuristic algorithms to optimize the size , depth and activity of an mig using transformations from ω and ψ . to optimize the size of an mig , we aim at reducing its number of nodes . node reduction can be done , at first instance , by applying the majority rule . in the novel boolean algebra domain , that is the ground to operate on migs , this corresponds to the evaluation of the majority axiom ( ω . m ) from left to right ( l → r ), as m ( x , x , z )= x . a different node elimination opportunity arises from the distributivity axiom ( ω . d ), evaluated from right to left ( r → l ), as m ( x , y , m ( u , v , z ))= m ( m ( x , y , u ), m ( x , y , v ), z ). by applying repeatedly ω . ml → r and ω . dr - l over an entire mig , we can actually eliminate nodes and thus reduce its size . note that the applicability of majority and distributivity depends on the peculiar mig structure . indeed , there may be migs where no direct node elimination is evident . this is because ( i ) the optimal size is reached or ( ii ) we are stuck in a local minima . in the latter case , we want to reshape the mig in order to enforce new reduction opportunities . the rationale driving the reshaping process is to locally increase the number of common inputs / variables to mig nodes . for this purpose , the associativity axioms ( ω . a , ψ . c ) allow us to move variables between adjacent levels and the relevance axiom ( ψ . r ) to exchange reconvergent variables . when a more radical transformation is beneficial , the substitution axiom ( ψ . s ) replaces pairs of independent variables , temporarily inflating the mig . once the reshaping process created new reduction opportunities , majority ( ω . m ) and distributivity ( ω . d ) run again over the mig simplifying it . reshape and elimination processes can be iterated over a user - defined number of cycles , called effort . such mig - size optimization strategy is summarized in alg . 1 . for the sake of clarity , we comment on the mig - size optimization procedure of a simple example , reported in fig2 ( a ) . the input mig is equivalent to the formula m ( x , m ( x , z ′, w ), m ( x , y , z )), which has no evident simplification by majority and distributivity axioms . consequently , the reshape process is invoked to locally increase the number of common inputs . associativity ω . a swap w and m ( x , y , z ) in the original formula obtaining m ( x , m ( x , z ′, m ( x , y , z )), w ), where variables x and z are close to the each other . later , relevance ψ . r applies to the inner formula m ( x , z ′, m ( x , y , z )), exchanging variable z with x and obtaining m ( x , m ( x , z ′, m ( x , y , x )), w ). at this point , the final elimination process runs , simplifying the reshaped representation as m ( x , m ( x , z ′, m ( x , y , x )), w )= m ( x , m ( x , z ′, x ), w )= m ( x , x , w )= x by using ω . ml → r . the obtained result is optimal . note that migs resulting from alg . 1 are irredundant , thanks to the final elimination step . portions of alg . 1 can be interlaced with other optimization methods , to achieve a size - recovery phase . to optimize the depth of an mig , we aim at reducing the length of its critical path . a valid strategy for this purpose is to move late arrival ( critical ) variables close to the outputs . in order to explain how critical variables can be moved preserving the original functionality , we consider the general case in which a part of the critical path appears in the form m ( x , y , m ( u , v , z )). if the critical variable is x , or y , no simple move reduce the depth of m ( x , y , m ( u , v , z )). whereas , instead , the critical variable belongs to m ( u , v , z ), say z , depth reduction is achievable . we focus on the latter case , with order tz & gt ; tu ≧ tv & gt ; tx ≧ ty for the variables arrival time ( depth ). such order arises from ( i ) an unbalanced mig whose inputs have equal arrival times or ( ii ) a balanced mig whose inputs have different arrival times . in both cases , z is the critical variable arriving later than u , v , x , y , hence the local depth is tz + 2 . if we apply the distributivity axiom ω . d from left to right ( l → r ), we obtain m ( x , y , m ( u , v , z ))= m ( m ( x , y , u ), m ( x , y , v ), z ) where z is pushed one level up , reducing the local depth to tz + 1 . such technique is applicable to a broad range of cases , as all the variables appearing in m ( x , y , m ( u , v , z )) are distinct and independent . however , a size penalty of one node is introduced . in the favorable cases for which associativity axioms ( ω . a , ψ . c ) apply , critical variables can be pushed up with no penalty . furthermore , where majority axiom applies ω . ml → r , it is possible to reduce both depth and size . as noted earlier , there exist cases for which moving critical variables cannot improve the overall depth . this is because ( i ) the optimal depth is reached or ( ii ) we are stuck in a local minima . to move away from a local minima , the reshape process is useful . reshape and critical variable push - up processes can be iterated over a user - defined number of cycles , called effort . such mig - depth optimization strategy is summarized in alg . 2 . we comment on the mig - depth optimization procedure using two examples depicted by fig2 ( b - c ). the considered functions are f = x ⊕ y ⊕ z and f = x ( y + uv ) with initial mig representations translated from their optimal aoigs . in both of them , all inputs have 0 arrival time , thus no direct push - up operation is advantageous . the reshape process is invoked to move away from local minima . for f = x ( y + uv ), complementary associativity ψ . c enforces variable x to appear in two adjacent levels , while for f = x ⊕ y ⊕ z substitution ψ . s replaces x with y , temporarily inflating the mig . after this reshaping , the push - up procedure is applicable . for f = x ( y + uv ), associativity ω . a exchanges 1 ′ with m ( u , 1 ′, v ) in the top node , reducing by one level the mig depth . for f = x ⊕ y ⊕ z , majority ω . ml → r heavily simplifies the structure and reduces by two levels the original mig depth . the optimized migs are much shorter than their optimal aoigs counterparts . note that the depth of migs resulting from alg . 2 cannot be reduced by any direct push - up operation . to optimize the overall switching activity of an mig , we aim at reducing ( i ) its size and ( ii ) the probability for nodes to switch from logic 0 to 1 , or viceversa . for the size reduction task , we can run the mig - size optimization algorithm described previously . to minimize the switching probability , we want that nodes do not change values often , i . e ., the probability of a node to be logic 1 ( p1 ) is close to 0 or 1 . for this purpose , relevance ψ . r and substitution ψ . s can exchange variables with not desirable p1 ˜ 0 . 5 with more favorable variables having p1 ˜ 1 or p1 ˜ 0 . fig2 ( d ) shows an example where relevance ψ . r replaces a variable x having p1 = 0 . 5 with a reconvergent variable y having p1 = 0 . 1 , thus reducing the overall mig switching activity . in this section , we show the advantage of mig optimization and synthesis as compared to state - of - art academic / commercial tools . we present here the experimental method and results for logic optimization based on the mig theory . 1 ) methodology : we developed mighty a logic manipulation package for migs , consisting of about 6 k lines of c code . different optimization methods are implemented in mighty . in this paper , we employ depth - optimization interlaced with size and activity recovery phases . the mighty package reads a verilog description of a com - binational logic circuit , flattened into boolean primitives , and writes back a verilog description of the optimized mig . the benchmarks are the largest circuits from the mcnc suite , ranging from 0 . 1 k and 15 k nodes . for the sake of illustration , we considered separately a large logic compression circuit having ( unoptimized ) 0 . 3m nodes . we compare migs with aigs optimized by abc tool ( see reference [ 8 ]) and bdds decomposed by bds tool ( see reference [ 7 ]). the resyn2 script is used for abc , while the default execution options are used for bds . 2 ) results : table i - top summarizes experimental results for logic optimization . the average depth of migs is 18 . 6 % smaller than aigs and 23 . 7 % smaller than decomposed bdds . the average size of migs is roughly the same than aigs , just 0 . 9 % of difference , but 2 . 1 % smaller than decomposed bdds . the average activity of migs is again the same as aigs , just 0 . 3 % of difference , but 3 . 1 % smaller than decomposed bdds . fig3 depicts these results in a 3d ( size , depth , activity ) space . using a size “ depth ” activity figure of merit , migs are 17 . 5 % better than aigs and 27 . 7 % better than decomposed bdds . the runtime for migs is slightly longer than experimental methods and results for mig - based logic synthesis are presented hereafter . 1 . methodology : we employ mighty in a traditional optimization - mapping synthesis flow and we compare its results to state - of - art aca - demic and commercial tools . for this purpose , a standard cell library consisting of min - 3 , maj - 3 , xor - 2 , xnor - 2 , nand - 2 , nor - 2 and inv logic gates is characterized for cmos 22 nm technology ( see reference [ 15 ]). technology mapping after mig - optimization is carried out using a proprietary mapping tool . the academic counterpart is abc ( see reference [ 8 ]) ( aigs optimization ) followed by the same proprietary technology mapping tool as for migs . physical design is not taken into account in any synthesis flow . hence , { delay , area , power } metrics are estimated from the synthesized gate - level netlist . 2 . results : table 1 ( b ) summarizes experimental results for mig - based logic synthesis and its counterpart flows . on average , the mig flow generates { delay , area , power } estimated metrics that are { 22 %, 14 %, 11 %} smaller than the best academic / commercial counterpart . fig4 shows the dominance of migs synthesis results over aigs and commercial synthesis tool , in a 3d ( area , delay , power ) space . while , in logic optimization , migs were mainly shorter than aigs , in logic synthesis they enable also remarkable area and power savings . the reason for such improvement is twofold . on the one hand , the structure of migs is further simplifiable by technology mapping algorithms based on boolean techniques , such as equiva - lence checking using bdds , internal flexibilities computation ( don &# 39 ; t cares ), and others . this is especially effective when mig nodes are partially fed by logic i / o . one the other hand , the presence of maj - 3 and min - 3 gates in the standard - cell library allows us to natively recognize and preserve mig nodes , when their decomposition in simpler functions is not advantageous . experimental results validate the potential of migs in logic optimization and synthesis . even though the proposed algorithms are simple as compared to elaborated state - of - art techniques , they produce already competitive results , thanks to the expressive power of migs and their associated algebra . indeed , there exist logic circuits , for example the ones in fig1 and fig2 ( b - c ), for which traditional optimization reaches its limits while the proposed methodology can optimize further . in particular , migs open the opportunity for efficient synthesis of datapath circuits , where majority logic is dominant . as presented in the present description , majority - inverter graph ( mig ) is a novel logic representation structure for efficient optimization of boolean functions . to natively optimize migs , we propose a new boolean algebra , based solely on majority and inverter operations , with a complete axiomatic system . experimental results , over the mcnc benchmark suite , show that delay - oriented mig optimization reduces the number of logic levels by 18 %, on average , with respect to aig optimization run by abc academic tool . employed in a standard optimization - mapping circuit synthesis flow , mig optimization enables a reduction in the estimated { delay , area , power } metrics of { 22 %, 14 %, 11 %}, on average before physical design , as compared to academic / commercial counterparts . migs extend the capabilities of modern synthesis tools , especially with respect to datapath circuits , as majority functions are the ground for arithmetic operations . g . de micheli , synthesis and optimization of digital circuits , mcgraw - hill , new york , 1994 . r . l . rudell , a . sangiovanni - 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