Patent Application: US-75312607-A

Abstract:
an analog transconductance amplifier includes an input stage including a first transistor and a second transistor connected in series to the first transistor . the first and second transistors are connected between positive and negative voltages and are respectively controlled by an input voltage and a first control voltage for generating a normalized drive voltage . an amplification stage includes a first conduction path including an amplification transistor controlled by the normalized drive voltage . a first load transistor is connected in series to the amplification transistor and is controlled by a second control voltage . a second conduction path includes at least one second load transistor controlled by a third control voltage . a current mirror forces through the second conduction path a replica of current flowing through the first conduction path . an output stage transistor delivers an output current , and is controlled by a voltage on the second load transistor . all of the transistors in the analog transconductance amplifier are field effect transistors of a same conductivity type .

Description:
the transconductance analog amplifier substantially functions as a current generator controlled by the input voltage . when the input voltage varies in a certain interval , current variations are proportional to variations of the input voltage by the transconductance value gm . when the input voltage exits the specified interval , the output current reaches a saturation level . in the analog amplifier , voltage and current ranges may be configured by the users . even the modulus and the sign of the slope of the trans - characteristic may be designed for obtaining positive or negative gains . for a better understanding , a brief description of the ideal characteristics of organic analog amplifiers will now be discussed . the symbol of the analog amplifier and the ideal transfer characteristic for a transconductance amplifier with positive slope characteristics are depicted in fig1 a and 1 b , respectively . the output current iout is tied to the input voltage vin through the following relations : i out = { ⁢ g m · v i ⁢ ⁢ n + i 0 ⁢ se ⁢ ⁢ v min ≤ v i ⁢ ⁢ n ≤ v max ⁢ i min ⁢ se ⁢ ⁢ v i ⁢ ⁢ n & lt ; v min ⁢ i max ⁢ se ⁢ ⁢ v i ⁢ ⁢ n & gt ; v max ⁢ ⁢ with ⁢ ⁢ i max = g m · v max + i 0 i min = g m · v min + i 0 wherein gm is the transconductance and i 0 is the offset current . the input impedance is ideally infinite and prevents circuits coupled to the input nodes of the amplifier from influencing its transfer characteristic . a virtually null output impedance ensures a functioning characteristic such as that of a controlled current generator . fig2 a and 2 b depict the symbol of the analog amplifier having a trans - characteristic with a negative slope and the relative ideal trans - characteristic . in this case , input / output equations are : when the input voltage vin is in a certain interval , the analog amplifier operates as a linear transconductance amplifier , and the output current iout depends linearly from the input voltage vin , as schematically shown in fig3 for an amplifier with positive or negative slope characteristics . the analog amplifier may be ideally split in three blocks , as shown in fig4 . the input stage of the analog amplifier basically establishes the input offset voltage . that is , it establishes the minimum voltage in the range of input voltages inside which the amplifier operates as a transconductance amplifier . this input stage may invert the input voltage for implementing a negative slope trans - characteristic . the amplification stage , immediately downstream to the input stage , is input with a normalized input voltage v n and provides the corresponding output voltage vsat . by fixing the voltages vmax and vmin it is possible to establish the range of the input voltage inside which the amplifier operates according to a linear trans - characteristic . the amplitude of the output voltage vsat may be fixed by the user . the output stage substantially converts the output voltage vsat in an output current iout . this prevents a load of the analog transconductance amplifier from influencing its functioning . fig5 depicts a first circuit embodiment of the analog amplifier composed exclusively of organic p - type transistors . it may be observed that the amplifier depicted in fig5 is formed with only nine p - type transistors while the amplifier in the above - referenced japanese patent application is composed of fourteen transistors and seven resistors . the voltages vss and vdd are the positive and negative supply voltages , respectively . the voltage voffset establishes the input offset voltage . the voltage vin is the input voltage . the current iout is the output current . the voltage vgain fixes or sets the slope of the voltage - current characteristic , while the voltage vcurrent establishes the smallest saturation value of the output current . the input stage , composed of the transistors t 1 and t 2 , is substantially a common drain or common source amplification stage that provides a high input impedance , and by imposing the constant voltage voffset , it determines the operating point of the amplifier . the output of this first block is the normalized voltage v n . when the input signal vin is applied to the gate of the transistor t 2 and the voltage voffset is applied to the gate of the transistor t 1 , the slope of the transfer characteristic of the amplifier is positive ( common drain ). vice - versa , when the input signal vin is applied to the gate of the transistor t 1 and the voltage voffset is applied to the gate of the transistor t 2 , the transfer characteristic of the amplifier is negative ( common source ). the amplification stage produces the nonlinear trans - characteristic of the circuit . when the normalized voltage v n is applied , the amplification stage generates a voltage vsat that is proportional to the input voltage in the linear part of the trans - characteristic . the transistor t 4 operates as a switch . if the normalized voltage v n is small ( close to vdd ) the transistor t 4 is on and the supply voltage establishes the current i 1 that flows through the loads t 3 and t 5 . the value of the current i 1 is established by the constant voltage vcurrent applied to the gate of the transistor t 5 . when the normalized voltage v n is high ( close to the value vss ), the transistor t 4 is off and no current circulates ( i 1 = 0 ). when the normalized voltage v n assumes an intermediate value , the transistor t 4 operates in its saturation region , thus the current i 1 depends only on the normalized voltage v n . in this operating region , the relation between the current i 1 and the normalized voltage v n may be considered approximately linear . the current i 1 is amplified by the current mirror composed of the transistors t 3 and t 6 , that establishes the current i 2 on the other branch . the nonlinear characteristic of i 2 is magnified by the transistor t 6 that , as depicted in fig6 , establishes the normalized voltage value v n beyond which the current i 2 decreases . this point depends on the load applied by transistors t 7 and t 8 . the dimensions of the load transistors are set for reducing or minimizing this effect . moreover , the control input vgain determines the conductivity of the load . this architecture adjusts the voltage divider composed of the transistors t 7 and t 8 , and as a consequence , the voltage vsat . it is then necessary for an output current stage because the nonlinearity of the current i 2 depends strongly from the load transistors of the conduction path in which it circulates . a control voltage vgain applied to the gate of the transistor t 8 establishes the amplitude of the voltage vsat by modifying the conductivity of the load transistor t 8 . the voltage vsat is applied to the output stage for obtaining the output current iout independently from the load supplied by the amplifier . this output stage is implemented by the transistor t 9 , connected in an open drain configuration . the architecture depicted in fig5 , should it be composed of silicon mosfets ( that is , not of organic field effect transistors ), would be much less convenient than the common cmos architectures of analog amplifiers . the outstanding effectiveness of the architecture of fig5 is tied to the fact that it requires only p - type field effect transistors , and thus it can be realized with organic transistors . in order to simulate the functioning of the circuit of fig5 , a mathematical model of an organic p - type transistor has been used by using the universal mobility law in a variable range hopping charge transfer model . moreover , as suggested in [ 8 - 9 ], also the peculiar characteristics of the organic transistors of p - type have been considered . the circuit of fig5 has been simulated by using the toolbox eldo and xelga of the mentor graphics ™ ( cadence unicad ™). alternative circuit embodiments to that of fig5 are depicted in fig7 a and 7 b . in both cases the input stage is identical to that of fig5 . the only differences being the number of load transistors in series to the transistor t 6 , and in the way in which these transistors are connected . a characteristic of the amplifier of fig7 a includes that the voltage range of the linear region of the trans - characteristic ( vmax - vmin ) is larger than that of the amplifier of fig5 . this embodiment is useful for obtaining a block having a linear trans - characteristic for certain values of the input voltage . in the embodiment of fig7 b , the value of the transconductance gain is increased . the control voltage vgain is applied to the gate and to the drain of the load transistor t 7 . this configuration allows varying of the slope of the trans - characteristic by modifying the voltage drop on the nodes of the load transistor t 7 . this is instead of modifying the conductivity of the transistor t 7 as in the architecture of fig7 a , the amplifier of fig7 b may be used for limited input voltage ranges . by resuming , the trans - characteristic may be determined by the control voltages voffset , vgain and vcurrent , while it is possible to obtain a trans - characteristic with a positive or a negative slope by inverting the roles of the voltages voffset and vin . all the depicted architectures of amplifiers are characterized by a practically null current absorption , since the input voltage vin is always applied to the gate of a field effect transistor . this is while the output current iout is substantially independent , within certain limits , from the voltage drop on the supplied loads . the transistor t 9 is kept in a conduction state by the load voltage . the functioning characteristics of the amplifier of fig5 for different values of the control voltages voffset , vgain and vcurrent are depicted in fig8 a , 8 b and 8 c , respectively . fig9 a , 9 b and 9 c depict graphs similar to that of fig8 a , 8 b and 8 c , in case of exchanging the nodes to which the voltages voffset and vin are applied , in order to obtain a negative slope trans - characteristic . possible waveforms of the output current as a function of two different input voltages are depicted in fig1 a and 10 b for a transconductance characteristic with a negative and a positive slope , respectively . the analog amplifier may be used in a wide variety of circuits . for example , it may be used for realizing a nonlinear oscillator such as the well known chua &# 39 ; s circuit [ reference 10 ], according to the circuit scheme as depicted in fig1 . for the above discussed reasons , the existing chua &# 39 ; s circuits cannot be implemented with organic field effect transistors because there are no n - type transistors of adequate stability and with a sufficiently large mobility of carriers . this practical impediment is overcome by the circuit depicted in fig1 that is composed entirely of p - type transistors and transconductance amplifiers . the system of fig1 has been simulated for verifying its functioning as a classic chua &# 39 ; s circuit . fig1 depicts the evolution in the phase space of the oscillator of fig1 in case of a chaotic evolution ( fig1 a ) wherein the presence of two attractors is evident , and in the case of periodic functioning ( fig1 b ). even if the architectures are always referred to an implementation with organic p - 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