Patent Application: US-82873610-A

Abstract:
a method of power point tracking for operating a photovoltaic power plant , which includes a dc - dc converter of the output voltage of a panel having a power switch driven by a pwm control signal of variable duty - cycle generated by a pwm control circuit , in discontinuous conduction mode or continuous conduction mode depending on the current load of the converter , is implemented by low cost analog circuits . the method does not require the use of any analog - to - digital conversion , digital processing or storage resources and may use a single voltage sensor .

Description:
the duty cycle d of the power switch of a dc - dc converter is controlled by a pulse width modulated ( pwm ) driving signal , v pwm . the ratio between the on time and the whole period of the waveform is d , as shown in fig3 . if the amplitude of the pwm driving signal is a and if it is applied to a low - pass filter , the resulting signal may be a constant voltage proportional to the product a * d as far as ripple can be neglected . moreover the pwm signal may be used to switch the voltage between v pv and ground at the input of the same low - pass filter , such that the resulting output signal is a constant voltage proportional to v pv * d with negligible ripple . the product signal represents the power currently yielded from the pv panel or panels when the converter is functioning in discontinuous conduction mode ( dcm ). a functional block diagram of hardware for performing such a multiplication is depicted in fig4 . fig5 is an exemplary analog circuit for producing an output signal of amplitude proportional to the product v pv * d . the pwm driving signal is the same waveform that is used to control the power switch of the dc - dc converter of the pv generation plant . the low - pass filter may be a simple rc first order circuit , whose time constant may be 5 - 10 times the period of the pwm driving signal in order to reduce spurious ripple at the output . of course , an active low pass filter may alternatively be used . the amplifier is placed before the input switching circuitry for decoupling reasons , without any effect in respect to the basic diagram of fig4 . v pv may be a scaled version of the panel ( s ) voltage , tapped from an ordinary voltage divider . alternatively , and it can be directly coupled , thanks to the decoupling of the amplifier ( v pwm ), and its inverted counterpart are used to switch between v pv and ground the input voltage of the low pass filter . at the output side of the filter , a voltage follower may be used to decouple this stage from the next one . when the dc - dc converter works in ccm , the input current is large enough to be monitored as a voltage drop across a relatively small series resistance . considering the case of a step - up ( boost ) converter depicted in fig6 : in ( a ) for an ideal switch and in ( b ) for a practical implementation with a mosfet switch q 1 in position 1 ) and a diode d 1 or any equivalent synchronous rectifier in position 2 ), during the on time ( switch in position 1 ), the current flowing through the mosfet q 1 is i pv ( the same current that flows in the pv panel ( s )) increases the energy stored in the inductor l . during the off time ( switch in position 2 ), the stored energy is released through the diode d 1 to the output node , the voltage on which raises at a value higher than the input voltage . of course , the mosfet q 1 has an intrinsic resistance r dson when turned on , therefore i pv can be monitored as a voltage drop across q 1 during on times . the average output current is equal to the average current flowing through the diode that is given by the following equation : i out _ = 1 2 ⁢ i b · t off t = 1 2 ⁢ i b · ( 1 - d ) where i b is the median current flowing through the diode , as shown in fig7 , valid when the converter works in ccm . in fact , if the dc - dc converter works in dcm , the diode conduction time may be less than t on because the diode conducts until its current is greater than zero . thus , the above equation holds if t off means the effective diode conduction time rather than t on . furthermore i b is equal to the current i a flowing through the mosfet at t on / 2 , as shown in fig7 . thus the average output current can be monitored as the product between ( 1 − d ) and the voltage drop across the mosfet sampled at t on / 2 , which is equal to ( r dson * i a ). similarly to the product ( v pv * d ), this multiplication may be performed by a circuit functionally defined in the block diagrams of fig8 . in this case , the monitored voltage drop may be amplified by a factor k , due to the necessarily low value of r dson that for a mosfet is typically in the range of few hundreds mω . fig9 is an exemplary analog circuit for producing an output signal of amplitude proportional to the product of i b *( 1 − d ). the circuit may utilize a charge pump at the input for periodically sampling the relatively small voltage drop across the mosfet at t on / 2 instants accumulating electrical charge for a certain number of pwm cycles for amplifying the detected voltage drop by a certain factor , in the considered sample embodiment by six . the resulting voltage , vcp , is proportional to the current i a of the waveforms of fig7 . then , an analog circuit , similar to that of fig5 , performs the product ( vcp * 1d ). the output product signal represents a scaled replica of the average output current of the dc - dc converter i out , which tracks the input power trend as explained above . a simple mpp tracker based on a perturb & amp ; observe algorithm may need to compare the power extracted from the pv panel at time t n with the power extracted at a precedent time t n - 1 in order to verify whether the duty cycle of the pwm signal that controls the power switch of the dc - dc converter is varying in the right direction , i . e . determining an increment of the power extracted from the pv panel ( s ) or not . it is assumed that the duty cycle variation is correct if it causes an increase of the input power of the converter , otherwise the duty cycle may vary in the opposite direction . fig1 is a typical flow diagram of such a p & amp ; o algorithm . an effective embodiment of the core circuit of a fully analog implementation of a mppt control in a pv generation plant of this disclosure is shown in fig1 . the circuit used to delay the product signals produced at the output of the analog circuits of fig5 or of fig9 , that corresponds to the power currently extracted from the panel ( s ), here identified by the input voltage vpower may be a distributed rc network , with time constants ranging from about 10 to 100 times the period of the pwm driving signal v pwm . the current power value vpower is applied to the inverting input of a comparator , and its delayed counterpart is applied to the non - inverting input . when the output of the comparator vchange becomes high , it means that the direction of the duty cycle variation may be inverted in order to track the maximum power point of operation of the pv panel or panels of the generator plant . the number of rc elements in the network may be chosen in order to have the desired phase shift between the present value of power and its delayed version , sufficient to determine an appreciable voltage drop at the input terminals of the comparator . the output of the comparator may be periodically sampled by a common d - type flip flop and the result used to trigger the output inversion of a second flip flop , each time the comparison output vchange becomes high , that is to say each time the currently monitored power is less than its past value . the output of the second flip flop is used to control the slope sign of the reference voltage , vref , generated by an integrator that is ordinarily compared with a triangular waveform to generate the pwm control waveform . optionally , a single rc element with a time constant large enough to filter also the lower frequency components introduced by the perturbation process may be used instead of a distributed rc network . the time constant should be between about 500 and 1 , 000 times the period of the pwm drive signal . in this case , the so filtered value of the input power signal vpower may correspond to its time - averaged value , which may approach the maximum power when the mpp tracker circuit reaches steady state . the time - averaged value of power can be considered as a previous value of power . fig1 is a basic block diagram of an exemplary embodiment of the mppt controller . a zero crossing detector can be used to monitor the voltage drop across the diode or any other equivalent synchronous rectifier , and the produced “ zero - crossing ” flag is processed by any circuit adapted to implement a hysteresis ( these ancillary circuits are not shown in the block diagram , being of immediate recognition by any ordinarily skilled technician ). the dc - dc converter may be considered in dcm only if the flag occurs for at least a pre - established number n of pwm cycles , and it may be considered in ccm if the flag remains absent for at least the same number n of pwm cycles . thus , the hysteresis circuit carries out a “ working - mode ” flag processing that leads to select the pertinent one ( vpower ) of the two product signals : v pv * d or vcp *( 1 − d ), to be fed to the mpp tracker core circuit described above . of course , both analog product signals : v pv * d and vcp *( 1 − d ), are continuously generated by the respective blocks , but only one at the time of the two product signals is used , according to the “ working - mode ” selection signals ccm and dcm . in fact , both analog multiplier block include a “ memory ” element , the capacitor of the output low pass filter , whose state of charge may track the resulting product quantity , in order to guarantee availability of a meaningful analog signal when their output is selected to feed the mpp tracker block . preferably , as shown in the exemplary diagram of fig1 , another control loop , realized by the block threshold control , forces vref to stay within a voltage range such that the duty cycle of the pwm generator block be constrained to vary between about 10 % and 90 %. the block pwm generator typically compares the input value vref with a triangular waveform in order to generate the pwm driving signal v pwm that is used for controlling the step - up converter and the analog multiplication circuits of the blocks v pv * d and vcp *( 1 − d ). the pwm generator block also produces a timing signal that is used at the input of the charge pump block to sample the voltage drop on the power switch of the converter at t on / 2 instants . of course , the complete circuitry may include other ordinary blocks for functions such as start - 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