Opinion ID: 6215967
Heading Depth: 2
Heading Rank: 1

Heading: The Caltech Patents

Text: Caltech’s ’710 and ’032 patents disclose circuits that generate and receive irregular repeat and accumulate (“IRA”) codes, a type of error correction code designed to improve the speed and reliability of data transmissions. Wireless data transmissions are ordinarily susceptible to corruption arising from noise or other forms of interference. IRA codes help to identify and correct corruption after it occurs. The encoding process begins with the processing of data before it is transmitted. The data consists of information bits in the form of 1’s and 0’s. The information bits are input into an encoder, a device that generates codewords comprised of parity bits and the original information bits. Parity bits are appended at the end of a codeword. Codewords are created in part by repeating information bits in order to increase the transmission’s reliability. When noise or other forms of interference introduce errors into the codewords during transmission, the decoder identifies these errors and relies on the codeword’s redundant incorporation of the original string of information bits to correct and eliminate the errors. Before Caltech’s patents, error correction codes had already incorporated repetition and irregular repetition. These codes, however, were less than optimally efficient because they were either encoded or decoded in quadratic time, which meant that the number of computations Case: 20-2222 Document: 63 Page: 4 Filed: 02/04/2022 4 THE CALIFORNIA INSTITUTE v. BROADCOM LIMITED required to correct a given number of bits far exceeded the number of bits ultimately corrected. In the ’710 and ’032 patents, the IRA codes are lineartime encodable and decodable, rather than quadratic. ’710 patent, col. 2, ll. 6–7 (“The encoded data output from the inner coder may be transmitted on a channel and decoded in linear time.”); id. col. 2, l. 59 (“The inner coder 206 may be a linear rate-1 coder.”); id. col. 3, ll. 25–26 (“An IRA code is a linear code.”). Using a linear code means that the relationship between the bits corrected and the computations required is directly proportional. Minimizing the number of calculations that an encoder or decoder must perform permits smaller, more efficient chips with lower power requirements. The claimed improvement involves encoding the information bits through a process of irregular repetition, scrambling, summing, and accumulation. Repeating inputted information bits is necessary to increase the reliability of data transmissions, and irregular repetition minimizes the number of times that information bits are repeated. Minimizing the number of times that an information bit is repeated is crucial to the efficiency of the claimed inventions because the repetitions impact the device’s coding rate or speed, as well as the code’s complexity. The fewer repeated bits there are, the fewer number of computations that an encoder must perform, which in turn permits smaller circuits, decreased power requirements, and decreased operating temperatures in devices incorporating the circuits. The claims and accompanying specifications of the Caltech patents make clear that each inputted information bit must be repeated. The parties agree that every claim at issue requires irregular repetition of information bits either explicitly or via the court’s construction. This is so even where the irregular repetition is not expressly Case: 20-2222 Document: 63 Page: 5 Filed: 02/04/2022 THE CALIFORNIA INSTITUTE v. BROADCOM LIMITED 5 required by the claims. For example, the agreed-upon construction of a Tanner graph in the ’032 patent requires that “every message bit is repeated . . . .” J. App’x 33. Furthermore, the claims and accompanying specifications make clear that each bit must be repeated irregularly, stating, for example in the ’710 patent, “a fraction of the bits in the block may be repeated two times, a fraction of bits may be repeated three times, and the remainder of bits may be repeated four times.” ’710 patent, col. 2, ll. 53–58. The ‘781 patent discloses and claims a method for creating codewords in which “information bits appear in a variable number of subsets.” Before trial, Apple and Broadcom sought summary judgment that claim 13 was unpatentable under 35 U.S.C. § 101. After finding that the claims were directed to a patent-eligible subject matter (step 1 of Alice 1)—a method of performing error correction and detection encoding with the requirement of irregular repetition—the court declined to reach whether they contained an inventive concept (step 2 of Alice). To support patentability, Caltech argued that the “variable number of subsets” language required irregular information bit repetition. The district court agreed and adopted and relied on Caltech’s interpretation to deny summary judgment of unpatentability. No party on appeal challenges this claim interpretation.