Opinion ID: 1041849
Heading Depth: 3
Heading Rank: 2

Heading: “Write Request”

Text: The Board concluded that the claimed “write request” could include “the state of a signal,” which is usually represented by a single bit. Board Opinion at 11–13. The Board held that its construction comported with our holding in a prior case involving the same family of patents as the ’097 patent, Rambus Inc. v. Infineon Technologies AG, 318 F.3d 1081, 1093 (Fed. Cir. 2003). In that case, we construed the term “write request” to mean “a series of bits used to request a write of data.” Id. Rambus argues that the Board erroneously construed “write request” to cover conventional, transition-based RAMBUS INC. v. REA 7 control signals and disregarded our construction from Infineon. It asserts that the specification clearly shows that a “write request” includes multiple bits because each request carries at least two pieces of information. The PTO responds that the Board properly declined to limit the term “write request” to a sequence of multiple bits. It argues that the plain and ordinary meaning of the term allows for a one-bit signal. The PTO also points to the specification’s disclosure of an embodiment in which a single bit determines whether the system requests a read operation or a write operation. Lastly, the PTO argues that the Board’s construction is not inconsistent with the construction in Infineon because that case did not decide if such a “series of bits” could include one bit or a signal. We agree with the PTO that the Board correctly con- strued “write request.” As an initial matter, we do not find that the Board disregarded our construction in Infineon. In Infineon, the dispute centered on the accused infringer’s contention that the claimed “request” must include both address and control information. 318 F.3d at 1091. We rejected that argument. Id. at 1091–93. At no point did we resolve the claim-scope dispute presented in this appeal: whether the “write request” can be a single bit. Indeed, it appears that the parties in Infineon did not dispute the “series of bits” portion of the district court’s claim construction, id. at 1091–92, and we generally “decline to raise an issue sua sponte that the parties have not presented,” WMS Gaming Inc. v. Int’l Game Tech., 184 F.3d 1339, 1347 n.2 (Fed. Cir. 1999). We conclude that “write request” is not limited to a multiple-bit request. The plain language of the claim does not contain that requirement. The claims require a “write request” be issued to the memory device and that, in response to the request, the device sample portions of data. ’097 patent claim 1. Moreover, the specification expressly discloses that “write request” can be embodied 8 RAMBUS INC. v. REA in a single bit. ’097 patent col. 9 ll. 38–64. The specification discloses a preferred embodiment in which a single bit acts as a “Read/Write switch”: if its value is a 1, the system requests a read; if its value is a 0, the system requests a write. Id. “A claim construction that excludes the preferred embodiment ‘is rarely, if ever, correct and would require highly persuasive evidentiary support.’” Adams Respiratory Therapeutics, Inc. v. Perrigo Co., 616 F.3d 1283, 1290 (Fed. Cir. 2010) (quoting Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1583–84 (Fed. Cir. 1996)). There is no such evidentiary support here, and Rambus points to nothing in the intrinsic record that limits the claims to multi-bit requests. We conclude that the Board properly construed “write request.”